Abstract:
A system providing video compression/encoding functions incorporates an integrated video apparatus which includes a camera for capturing an image, a frame grabber coupled to the camera for storing a bitmap of the image, and a video processor coupled to the frame grabber. The video processor is coupled to the system bus and to a dedicated memory and executes an algorithm which compresses the bitmap into an encoded bitstream. A central processing unit manages the transfer of the encoded bitstream from the video processor to the network utilizing a main memory coupled to the system bus.

Description:
FIELD OF THE INVENTION 
     This invention relates to the field of computer-based video. More specifically, the invention relates to the capture of motion video in digital form, and to the compression of such motion video so as to reduce space and bandwidth requirements. The invention also relates to systems which combine video capture and processing with store and/or telecommunications capabilities. 
     BACKGROUND OF THE INVENTION 
     There is an increased emphasis today on the development of computing tools which incorporate digital video capabilities. For example, a common computing application is the use of a teleconferencing workstation in which digital video information is transmitted across ordinary telephone lines. Conventional teleconferencing systems consist of a camera which captures an image and outputs a digital stream of data. This data is then compressed by an ordinary processor and encoded for subsequent transmission across phone lines. At the other end of the phone lines, another processing device performs the decoding process, which is simply the inverse of the encoding algorithm. Eventually, the original digital video information is retrieved and stored at the destination computing resource. Typically, a central processing unit of a microprocessor is utilized to perform both the encoding and decoding functions in present teleconferencing systems. 
     One problem with these prior art approaches is that system performance is usually constrained by the memory traffic along the various data pathways. For instance, digital information output from the camera is typically transmitted to the central processing unit along a system bus, which also communicates with a main memory. Data transmission between the CPU, camera, memory, and network across the system bus is slowed by the frequent memory traffic associated with normal video processing. In certain circumstances, adding a cache memory can actually increase the memory traffic since the cache must frequently access the main memory (e.g., during writebacks, updates, etc.). 
     Another problem with such systems is that the video camera, frame grabber board and the compression hardware are separate components. This means that each of these components must be interfaced and maintained separately, as described above. 
     By way of example, video information is usually transmitted from by the camera at data rates in excess of 10 megabytes per second (MB/sec). In teleconferencing applications, this video data eventually gets sent to the outside world via a network. In the meantime, however, the network is also sending encoded images back to the central processing unit to be decoded. The decoding process requires that the information first be written to memory, and then be operated on by the central processing unit. This tends to increase the memory traffic along the system bus. 
     As will be seen, the present invention offers a system providing video compression/encoding for communications across a network which alleviates much of the memory traffic along the system bus. The novel features of the invention allow for a dramatic decrease in the memory bandwidth requirements of the system, as well as providing increased video processing and computational abilities. 
     SUMMARY OF THE INVENTION 
     A system providing video compression/encoding functions is described. In one embodiment, the system includes a system bus coupled to a communications network The system incorporates an integrated video apparatus which includes a camera for capturing an image, a frame grabber coupled to the camera for storing a bitmap of the image, and a video processor coupled to the frame grabber. The video processor executes an algorithm which compresses the bitmap into an encoded bitstream. The processor itself is coupled to the system bus and also to a dedicated memory. The integration of the camera, frame grabber, and video processor into a single package or subsystem prevents high bandwidth raw unencoded video data from crossing unit boundaries. 
     Also coupled to the system bus is a central processing unit for managing the transfer of the encoded bitstream from the video processor to the network. The central processing unit utilizes a main memory coupled to the system bus and has the capability for forming additional image manipulation, if desirable. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention will be understood more fully from the detailed description which follows and from the accompanying drawings, which, however, should not be taken to limit the invention to the specific embodiments shown but are for explanation and understanding only. 
     FIG. 1 is a block diagram illustrating a prior art video telecommunications system. 
     FIG. 2 illustrates the video system of the present invention. 
    
    
     DETAILED DESCRIPTION 
     A telecommunications system including video processing capabilities is disclosed. In the following description, numerous specific details are set forth in order to provide a thorough understanding of present invention. It will be obvious, however, to one skilled in the art that these specific details need not be employed to practice the present invention. In other instances, well-known logic gates, circuits, algorithms, etc., are not described in detail in order to avoid unnecessarily obscuring the present invention. 
     With reference to FIG. 1, there is shown a typical prior art teleconferencing workstation system. The system of FIG. 1 includes a camera  10  coupled to a frame grabber  11 . Frame grabber  11  takes the video information captured by camera  10  and sends it to memory  15  along system bus  12 . Memory  15  typically comprises a main memory, such as random-access memory (RAM) normally associated with a conventional computer system. Central processing unit (CPU)  14  reads the information stored in memory  15  via bus  12 , or directly accesses private memory in frame grabber  11 , and performs the compression/encoding operations on the video data. The result is a encoded bitstream which is then sent via bus  12  to network  18 . The prior art system of FIG. 1 commonly includes a graphics unit  17  coupled to system bus  12  to assist in the presentation aspects of the video transmission. 
     Most often, network  18  comprises ordinary phone lines which are connected to another computer system such as that shown in FIG.  1 . At the other end of the phone lines, the receiving telecommunications workstation performs the decode process, which is simply the inverse of the encoding process. The encoded bitstream is received by system bus  12  via network  18  and is stored in memory  15 . CPU  14  then performs the decoding process on the video information resident in memory  15 . It is appreciated that, in general, the decoding process is typically performed at a much faster speed as compared to the encoding process (e.g., 4-8×). However, it is not uncommon that CPU  14  is required to execute both the encoding and decoding processes at the same time, as video information is both transmitted and received across network  18 . 
     The problem with the video system of FIG. 1 is that there is a great deal of memory traffic along all of the data pathways. By way of example, frame grabber  11  is constantly generating data to be stored in memory  15 , whereas CPU  14  is repeatedly accessing memory  15  to process the data during the encoding and decoding processes. Meanwhile, encoded data is being received across network  18  and processed by CPU  14  to reproduce the transmitted image. All the time, both encoded and decoded video data is constantly being written and read to/from memory  15  by CPU  14 . 
     The present invention alleviates the much of the memory traffic by integrating the image capture and video compression/encoding processes in the same subsystem. The invention takes advantage of the fact that often times, the video processing data pathway is the highest bandwidth section of the communication system. For example, video information output by the frame grabber is often generated at a data rate of 10 megabytes per second or greater. FIG. 2 illustrates the system of the present invention including subsystem  20  comprising camera  21  coupled to frame grabber  22 . Frame grabber  22 , in turn, is coupled to a video processor  23 . Video processor is coupled to a dedicated scratch memory  24  (i.e., RAM) and to system bus  30 . System bus  30 , in turn, is coupled to CPU  31 , main memory  35 , graphics unit  34 , and network  33 . 
     In the video system of FIG. 2, video processor  23  is dedicated to producing the compressed/encoded bitstream from the video image captured by camera  21  and frame grabber  22 . Video processor  23  outputs this encoded bitstream to CPU  31  along system bus  30 . Because the encoding process is handled by dedicated processor  23 , the involvement of CPU  31  with the video encoding process is reduced to simply controlling the flow of the encoded information between the integrated camera/encoder subsystem  20  and network  33 . Because CPU  31  no longer is required to compress/encode the video information, much of the memory traffic on bus  30  is eliminated. By way of example, in a typical teleconferencing application, CPU  31  only performs image decompression, which is an order of magnitude faster than the compression/encoding process. This also frees CPU  31  so that it can perform additional memory manipulations involving various presentation aspects (e.g., color tuning, scaling, etc.) of the video transmission. It is appreciated, however, that most of the computational and memory bandwidth intensive operations are performed by video processor  23  utilizing dedicated memory  24 . 
     As stated, the function of video processor  23  is to compress and encode the video information received by frame grabber  22 . Instead of accessing main memory to perform these operations, video processor  23  is provided with a dedicated scratch memory  24 , which typically comprises ordinary random-access memory. Scratch memory  24  is primarily used by video processor  23  to perform computationally intensive operations, such as difference calculation between various frames, subtracting one frame from the video image of another, etc. 
     The salient point to remember, however, is that the data pathways involving the camera  21 , frame grabber  22 , video processor  23 , and scratch memory  24  require a high bandwidth channel (on the order of 10 megabytes per second or greater). On the other hand, the encoded bitstream output by video processor  23  to system bus  30  has a reduced bandwidth on the order of 10 kilobytes per second or less. Therefore, by packaging the video capture and the video compression/encoding functions in the same subsystem, the present invention manages to dramatically decrease the memory bandwidth requirements and the corresponding memory traffic in a telecommunications system. This dramatically reduces the memory bandwidth required between the camera and computer system as well as reducing the computational loading of the CPU. Moreover, the use of a special purpose or dedicated video processor  23  within subsystem  20  minimally intrudes upon the general purpose CPU  31 . 
     In summary, the present invention takes the encoding and compression functions that deal with video processing, along with a portion of dedicated memory, and packages it into a subsystem along with the camera and frame grabber. The result frees up the operation of the general purpose central processing unit for increased bandwidth and enhanced computation speed. The system configuration also allows the CPU to do specialized image manipulation functions such as cropping, isolating a portion of a picture, scaling, etc. Besides the decoding function, the main purpose of the CPU is to manage the transfer of data from the video processor to the network.