Abstract:
It is an object of this invention to provide a digital conversion method for an analog signal in which, when sin(θ−φ) is calculated as a error deviation ε, a first output signal sin(θ−φ)·f(t) of the previous stage of the error deviation ε is converted into a digital signal by positive/negative sign determination performed by a comparator to make almost circuits into digital circuits, thereby making it easy to form an IC. In the digital conversion method for an analog signal according to the invention, sin(θ−φ)·f(t) obtained by guiding the rotation detection signal to a multiplier and operating the rotation detection signal is converted into a digital signal by positive/negative sign determination performed by a comparator to achieve a stable and inexpensive configuration.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a digital conversion method for an analog signal and, more particularly, to an improvement in conversion performances (stability, high-speed performance, and noise resistance) by converting a first output signal sin(θ−φ)·f(t) into a digital signal by positive/negative sign determination performed by a comparator when sin(θ−φ) is calculated as an error deviation ε and a novel improvement for advantaging formation of a monolithic IC by reducing analog circuits in number. 
     2. Description of the Related Art 
     As a conventionally used digital conversion method for an analog signal of this type, for example, a tracking method shown in FIG. 1 is popularly used. More specifically, as shown in FIG. 1, reference numeral  1  denotes a resolver excited by an exciting signal (i.e., reference signal) E·sin ωt. Two-phase outputs KEsin θsin ωt and KEcos θsin ωt output from the resolver  1  are operated by an operation unit  2 , and a two-phase output signal KEsinwtsin(θ−φ) (where θ is a resolver rotation angle, and φ is an output counter value) output from the operation unit  2  is synchronously rectified by a synchronous rectifier  3  to which the exciting signal E·sin ωt is input. 
     An output signal KEsin(θ−φ) obtained from the synchronous rectifier  3  is input to a counter  5  as a pulse output  4   a  through a voltage controlled oscillator  4 , in order to obtain an output counter value φ serving as a digital angle output from the counter  5 . 
     The output counter value φ is fed back, and thus a feed back loop is formed. Therefore, a velocity signal  6  is obtained by the output signal KEsin(θ−φ) from the synchronous rectifier  3 , and a position signal  7  can be obtained from the output counter value φ of the counter  5 . 
     The conventional digital conversion method for an analog signal has the configuration described above, the following problem is posed. 
     More specifically, since each constituent portion in the circuit configuration described above is partially constituted by a complex analog configuration, the entire configuration cannot be easily formed by an integrated monolithic semiconductor, and an exciting circuit or the like is inevitably added as a discrete part. For this reason, a low price, a reduction in size and weight, high reliability, and utility cannot be easily achieved. In addition, a preferable improvement means for a tracking speed is not found. 
     SUMMARY OF THE INVENTION 
     The present invention has been made to solve the above problem, and has as its object to, more particularly, a digital conversion method for an analog signal in which an improvement in conversion performances (stability, high-speed performance, and noise resistance) by converting a first output signal sin(θ−φ)·f(t) into a digital signal by positive/negative sign determination performed by a comparator when sin(θ−φ) is calculated as an error deviation e and an improvement for advantaging formation of a monolithic IC by reducing analog circuits in number. 
     A digital conversion method for an analog signal according to the present invention is a method for obtaining a digital angle output (φ) from rotation detection signals [sin θ·f(t) and cos θ·f(t): where f(t) is an exciting component] obtained from a rotation detector, wherein the rotation detection signals [sin θ·f(t) and cos θ·(t)] are guided to a multiplier and mutually operated with sin φ and cos φ obtained from the digital angle output (φ), in order to obtain [sin θ·f(t)×cos φ]−[cos θ·f(t)·sin φ]=sin(θ−φ)·f(t) as a first output signal, and the first output signal sin(θ−φ)·f(t) is converted into a digital signal by positive/negative sign determination performed by a comparator when the first output signal sin(θ−φ)·f(t) is synchronously detected to remove the exciting component f(t) and to obtain a second output signal sin(θ−φ) as an error deviation ε. The method is a method wherein the error deviation ε is input to a counter as a digital angular velocity signal ω(−φdot) through a compensator to be counted, and a digital angle output (φ) is obtained from the counter. The method is a method wherein, in a multiplier, sin and cos 10-bit multiplying DIA converters are used, and a 12-bit counter is used as the counter. The method is a method wherein the digital angle output (φ) is fed back and input to the sin and cos 10-bit multiplying D/A converters through a sin ROM and a cos ROM, and nonlinear characteristics are written in the sin ROM and the cos ROM. The method is a method wherein a DC bias current is applied to an output winding for outputting the rotation detection signals [sin θ·f(t) and cos θ·f(t)] depending on rotation of a rotor of the rotation detector, and a disconnection detection signal having a voltage higher than the maximum voltage of the rotation detection signals [sin θ·f(t) and cos θ·f(t)] from a differential amplifier when the output winding is disconnected. In addition, the method is a method wherein a phase difference between an exciting component included in the rotation detection signals sin θ·f(t) and cos θ·f(t) and an exciting signal of the rotation detector is detected, leading and trailing edges of the rotation detection signal component are detected to cause a reference signal guided to a synchronous detector to be synchronized with the exciting component included in the rotation detection signals. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram of a conventional configuration. 
     FIG. 2 is a block diagram of a digital conversion method for an analog signal according to the present invention. 
     FIG. 3 is a schematic functional diagram showing functions in FIG.  2 . 
     FIG. 4 is a 4-phase divided operation waveform chart of an error deviation operation in FIG.  2 . 
     FIG. 5 is a block diagram of the error deviation operation in FIG.  2 . 
     FIG. 6 is an equivalent circuit of a compensator in FIG.  2 . 
     FIG. 7 is an equivalent circuit showing an operation of Z −1  in FIG.  6 . 
     FIG. 8 is an equivalent circuit of a counter in FIG.  2 . 
     FIG. 9 is a block diagram showing another embodiment of the present invention. 
     FIG. 10 is a waveform chart of the operation in FIG.  9 . 
     FIG. 11 is a diagram showing a main part of FIG. 2 according to the present invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Preferred embodiments of a digital conversion method for an analog signal according to the present invention will be described below with reference to the accompanying drawings. 
     FIG. 2 is a block diagram showing a digital tracking R/D converter to which the digital conversion method for an analog signal according to the present invention is applied. 
     In FIG. 2, reference numeral  1  denotes a rotation detector constituted by a resolver or a synchro. An exciting signal (component) f(t) serving as a reference signal sin ωt consisting of a 10-kHz sin wave from an exciting signal generator  50  of a digital tracking R/D (resolver/digital) converter  100  is applied to an exciting winding (not shown) of the rotation detector  1 . Two-phase rotation detection signals sin θ·f(t) and cos θ·f(t) are input from a two-phase output winding (not shown) to a sin 10-bit multiplying D/A converter 51 and a cos 10-bit multiplying D/A converter 52 depending on rotation of a rotor (not shown). 
     Outputs sin θ·f(t)·cos φ and cos θ·f(t)·sin φ (as will be described later, sin φ and cos φ of a digital angle output φ are fed back and input to the converters  51  and  52  through a sin ROM  60  and a cos ROM  61 , respectively) from the 10-bit multiplying D/A converters  51  and  52  are subtracted from each other {[sin θ·f(t)·cos φ]−[cos θ·f(t)·sin φ]=sin(θ−φ)·f(t)} by a subtractor  53  to obtain a first output signal sin(θ−φ)·f(t). This first output signal sin(θ−φ)·f(t) is subjected to positive/negative sign determination by a comparator  54  to be input to a synchronous detector  55 . The first output signal is synchronously detected by a reference signal f(t) from a synchronous phase detection disconnection detector  62 , an error deviation ε=sin(θ−φ) serving as a second output signal is counted by a 12-bit counter  57  through a compensator  56 , and the digital angle output φ is output as a parallel output  58   a  through a parallel interface  58 . 
     The digital angle output φ is output as a serial output  59   a  through a serial interface  59 , and pulse outputs  63   a  having known A, B, and Z phases and U, V, and W phases required to control a motor or the like are output by a pulse output generation logic  63 . At the same time, as described above, digital angle outputs φ are input to the sin ROM  60  and the cos ROM  61  in which required nonlinear characteristics are written in advance to output sin φ and cos φ,respectively. A multiplier (error deviation operation unit)  200  is constituted by the converters  51  and  52 , the subtractor  53 , and the comparator  54 . 
     In addition, a disconnection detection signal  62   a  output from the synchronous phase detection disconnection detector  62  is determined by a self-diagnosis unit  70 , and then input to a system controller  80 . The system controller  80  is designed to perform signal setting or outputting such as resolution setting, setting of U, V, and W poles, self-diagnosis outputting, outputting of an input/output control signal, and outputting of a system control signal. 
     Before concrete explanation of the respective parts in FIG. 2, the basic function of the present invention will be described below. The basic function is shown in FIG.  3 . More specifically, rotation detection signals sin θ·f(t) and cos θ·f(t) from the rotation detector  1  constituted by a resolver or a synchro are input to the error deviation operation unit  200  serving as a multiplier. The basic function is constituted by the compensator  56  for processing an obtained error deviation ε=sin(θ−φ) and the counter  57  serving as an object to be controlled. 
     Therefore, the rotation detection signals are given respectively: 
     
       
         sin θ· f ( t ), cos θ· f ( t )  (1)  
       
     
     where θ is a rotation angle of the resolver  1 , and f(t) is an exciting component. 
     In this case, the error deviation ε is calculated by the error deviation operation unit  200 , tracking is performed to make the error deviation ε zero, thereby performing R/D conversion. More specifically, 
     
       
         [sin θ· f ( t )×cos φ]−[cos θ· f ( t )×sin φ] 
       
     
     
       
         =(sin θ·cos φ−cos θ·sinφ)· f ( t )  
       
     
     
       
         =sin(θ−φ)· f ( t )  (2)  
       
     
     In this equation (2), the term f(t) can be omitted by synchronous detection. 
     
       
         Therefore, ε=sin(θ−φ)  (3)  
       
     
     Thus, to establish ε=0 in the control system, θ=φ is obtained, and then the digital conversion is established. The basic function in the conventional method is the same as that in the method of the present invention. However, in the present invention, the value (analog quantity and size) of the error deviation itself is not considered. The function of the present invention is considerably different from the function of the conventional method in that the result of the equation (2) is only quantized (digitalized) by positive/negative sign determination using the comparator  54  (actually constituted by one pair of comparators as shown in FIG.  5 ). 
     In the embodiment shown in FIG. 2, the RID converter having a resolution of 12 bits, and 12-bit converters are not used, but 10-bit converters are used as the multiplying DIA converters  51  and  52  serving as sin and cos multipliers which perform an operation in the error deviation operation unit  200 . 
     This is because, as will be described later, one rotation of 360° is divided into four phases each having 90°, and an operation process is repeated every 90° to simplify the hardware configuration of the circuit. 
     More specifically, the angle of 90° corresponds to 10 bits in a 12-bit RID converter. In addition, since digital processing is performed, degradation of performance can also be avoided even if the f our-phase dividing method for simplifying the circuit. 
     A method of calculating the error deviation ε by four-phase division will be described below. Operation waveforms obtained by the four-phase division are operations of quadrants PH1 to PH4 in FIG.  4 . When the operations are expressed by a table, the first table of Table 1 is obtained. 
     
       
         
               
             
               
               
               
               
             
           
               
                 TABLE 1 
               
             
             
               
                   
               
               
                 First Table 
               
             
          
           
               
                 Quadrant 
                 Range 
                 Error Deviation 
                 Remark 
               
               
                   
               
               
                 I 
                  0°˜90° 
                 ε = sinθ · cosφ − cosθ · sinφ 
                 PH1 
               
               
                 II 
                  90°˜180° 
                 ε = −(sinθ · {overscore (cosφ)} + cosθ · sinφ 
                 PH2 
               
               
                 III 
                 180°˜270° 
                 ε = −(sinθ · {overscore (cosφ)} − cosθ · {overscore (sinφ)} 
                 PH3 
               
               
                 IV 
                 270°˜360° 
                 ε = sinθ · cosφ + cosθ · {overscore (sinφ)} 
                 PH4 
               
               
                   
               
             
          
         
       
     
     The error deviation operation circuit  200  is as shown in FIG.  5 . The subtractor  53  and the comparator  54  shown in FIG. 2 are constituted by one pair of subtractors and one pair of comparators, respectively. In each of the comparators  54 , positive/negative sign determination of an output from each of the subtractors  53 , four-phase operations are sequentially performed by gates G 1  to G 4  in each of the quadrants PH1 to PH4, and an error deviation δ is obtained from a gate G 6  to which the reference signal f(t) is input. 
     The compensator  56  is constituted like an equivalent circuit shown in FIG.  6 . An object to be controlled by the digital tracking R/D converter according to the present invention is the counter  57 , and the digital tracking R/D converter has primary integral characteristics. For this reason, in order to realize feedback control systems of two types as means for stably controlling the counter  57 , serving as the object to be controlled, at a high speed and a high accuracy, the characteristics of the compensator  56  are given by PI (proportion+integration), and the compensator  56  is combined to a first-order-lag filter (Tf is a first-order-lag filter time constant). The compensator  56  in FIG. 6 is expressed by the following equation (4): 
     
       
           K ( s )=( Kp+Ki/S )×1/(1 +Tf·S )  (4)  
       
     
     where: 
     S is Laplacean; 
     1/(1+Tf·S) is a first-order-lag filter; and 
     ΔT is an operation-clock cycle. 
     Although KFB and KFF are not included in the equation (4), KFB is set to assure/improve stability in a static state, and KFF is set to assure/improve high-speed response. KFB and KFF are properly used in embodiments. 
     Z −1  represents a previous value which is latch data one clock cycle before a present value when data update is performed every clock cycle (ΔT) as shown in FIG.  7 . This state is as shown in FIG.  7 . 
     The counter  57  serving as the object to be controlled has the 12-bit configuration as described above, and is constituted by a known adder and a known subtractor for integrating an angular velocity ω(=φdot) obtained by the compensator  56  of the previous stage. The counter  57  is represented by an equivalent circuit shown in FIG. 8, and performs a count operation by an operation clock cycle ΔT. 
     As the method according to the present invention, a method of automatically correcting the phases between the rotation detection signals sin θ·f(t) and cos θ·f(t) shown in FIG.  9  and FIG. 10 can be applied. FIG. 9 is a block diagram, and FIG. 10 is a waveform chart. 
     In FIG. 9, rotation detection signals sin θ·f(t) and cos θ·f(t) consist of analog rotation detection signals having exciting components f(t) from the rotation detector  1 . The rotation detection signals sin θ·f(t) and cos θ·f(t) are input to an absolute value comparator  10  and connected to first and second terminals  12  and  13  of a switch means  11 . 
     An edge detector  14  for detecting leading and trailing edges are connected to a switching contact  11   a  of the switch means  11 , and an edge output  14   a  from the edge detector  14  is input to a synchronizing circuit  15 . 
     In this case, the exciting component f(t) of the rotation detection signal is given by f(t)=sin(ωt+Δω) in consideration of a phase difference Δω between the exciting component f(t) and a reference exciting signal, and the reference exciting signal is given by f(t)=sinωt. 
     The reference exciting signal f(t) supplied to the rotation detector  1  is input to a 90°·270° signal generator  16  and a phase adjustment region setting unit  17 . 
     An output  17   a  from the phase adjustment region setting unit  17  is input to the synchronizing circuit  15 , and a new reference signal  3   a  obtained by correcting sin(ωt+Δω) obtained by phase-shifting sin ωt of the reference exciting signal f(t) by Δω is obtained by the synchronizing circuit  15 . 
     A case wherein automatic phase correction is actually performed will be described below. 
     As shown in FIG. 10, the waveform of the reference exciting signal f(t) is shaped to check a reference phase, and a 90° trigger  16   a  and a 270° trigger  16   b  are output from the 90°-270° signal generator  16 . A polarity signal  20  is formed by the phase adjustment region setting unit  17 , and a trigger output  14   a  and a phase difference Δω of the rotation detection signals sin θ·f(t) and cos θ·f(t) are detected. When the waveforms of the rotation detection signals sin θ·f(t) and cos θ·f(t) are shaped, a rotation detection signal phase (reference component phase)  3   b A is obtained. 
     The new reference signal  3   a  synchronized by the trigger output  14   a  is obtained. When the new reference signal  3   a  is used as an exciting signal, the rotation detection signals sin θ·f(t) and cos θ·f(t) and the new reference signal  3   a  can be synchronized with each other, and the phase difference Δω generated by the rotation detector itself, a cable impedance, a change in temperature, and the like can be automatically corrected. 
     When the phase difference Δω described above is automatically corrected, as a phase-adjustable range, a range of a phase difference of about ±90° can be used. 
     The method shown in FIG. 11 represents a concrete example of a disconnection detection method of the rotation detector  1  shown in FIG.  2 . More specifically, the rotation detector  1  in FIG. 11 constituted by a resolver constituted by an exciting winding  1 A and an output winding  1 B. Since the output winding  1 B has two-phase outputs, the output winding  1 B is constituted by one pair of windings. However, one winding will be omitted, and only the output winding  1 B for outputting sin or cos signal will be described below. 
     An operation amplifier  8  is connected to input lines  300  and  301 , connected to both the terminals of the output winding  1 B, through first and second resistors R 1  and R 3 , a common terminal COM is connected to a positive-phase terminal  8   a  of the operation amplifier  8  through a third resistor R 2 , and a fourth resistor R 4  is connected between a negative-phase terminal  8   b  and an output terminal  8   c.  A known differential amplifier  350  is constituted by the operation amplifier  8  and the resistors R 1  to R 4  described above, so that the rotation detection signal sin θ·f(t) or cos θ·f(t) is output from the output terminal  8   c.    
     Fifth and sixth resistors R SU  and R SL  having equal resistances are connected to the input lines  300  and  301 , respectively, and a DC bias current I B  from a DC power source  351  is applied to flow from the fifth resistor R BU  to the sixth resistor R BL  through the output winding  1 B. Note that the DC bias current I B  is set not to adversely affect the voltage level of the rotation detection signal sin θ·f(t) or cos θ·f(t). 
     An operation will be described below. When the output winding  1 B is normal without being disconnected, the rotation detection signal sin θ·f(t) or cos θ·f(t) excited by the output winding  1 B is output from the output terminal  8   c  through the differential amplifier  350 . When the output winding  1 B is disconnected, the DC bias current I B  does not flow in the output winding  1 B and the sixth resistor R BL , and, at the same time, the voltage of the DC power source  351  is applied to the differential amplifier  350  to output a disconnection detection signal  400  in place of the rotation detection signal sin θ·f(t) or cos θ·f(t). The disconnection detection signal  400  has a voltage (for example, 5 V) higher than the voltage of the rotation detection signal sin θ·f(t) or cos θ·f(t). When the voltage level of the disconnection detection signal  400  is monitored by, a known window comparator or the like, the presence/absence of disconnection can be detected. 
     Since the digital conversion method for an analog signal according to the present invention has the configuration described above, the following advantages can be obtained. 
     More specifically, when sin(θ−φ) is calculated as a error deviation ε, a first output signal sin(θ−φ)·f(t) of the previous stage of the error deviation ε is converted into a digital signal by positive/negative sign determination performed by a comparator. The digital signal is input to a counter to obtain a digital angle output. For this reason, an R/D conversion process can be digitized, and improvements in conversion performances (stability, high-speed performance, and noise resistance) can be obtained. 
     When analog circuits are reduced in number, formation of a monolithic IC is advantaged, and products each having high reliability, a small size, and a low price can be manufactured (mass-production). 
     Since disconnection of a winding of a rotation detector can also be detected, an improvement in reliability can be achieved. 
     In addition, since a phase between a rotation detection signal and an exciting signal (reference signal) can be automatically corrected, detection accuracy can be improved and stabilized.