Abstract:
A resonant switching converter comprising a first pair of series connected switches comprising a high side switch and a low side switch coupled across a DC input voltage, there being a first switched node between the switches; a second pair of series connected switches comprising a high side switch and a low side switch coupled across a DC bus, there being a second switched node between the switches; a DC bus capacitor coupled across the DC bus; the first and second switched nodes adapted to have a load coupled therebetween; the high side switch of the first pair of switches supplying current to the load from the DC input voltage, the low side switch of the first pair of switches being switched opposite the high side switch of the first pair of switches and providing a re-circulation path to allow bi-directional current flow through the load; the high side switch of the second pair of switches supplying current to the load from the DC bus capacitor, the low side switch of the second pair of switches being switched opposite said high side switch of the second pair of switches and providing a re-circulation path to allow bi-directional current flow through the load; a controller for controlling the switching of each of the switches of the first and second pairs of switches, the controller comprising a phase shift circuit providing a phase shift between the control signals driving the switches of the first and second pairs of switches to shape the waveshape of the output voltage of the converter provided to the load; the controller further comprising a first circuit for providing a first compensation signal for the control signals driving the first pair of switches to compensate for variation of the DC input voltage; and a second circuit for providing a second compensation signal for the control signals driving the second pair of switches to compensate for variation of the DC bus voltage.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
   This application claims the benefit and priority of U.S. Provisional patent application Ser. No. 60/546,362 filed Feb. 19, 2004 entitled SWITCHING CONTROL METHOD AND SYSTEM FOR SINGLE STAGE RESONANT POWER CONVERTER, the entire disclosure of which is incorporated herein by reference. 

   BACKGROUND OF THE INVENTION 
   The present invention relates to power supply converter circuits, and in particular to converter circuits known as resonant converters, and more particularly to such converters for powering gas discharge lamps, e.g., fluorescent lamps. 
   Typical existing converter solutions include a power factor correction (PFC) stage for producing a sinusoidal input current and a regulated DC bus voltage, followed by a resonant mode output stage necessary for converting the DC bus voltage to the desired output voltage level. See  FIG. 1 . 
   The PFC stage is typically realized with a boost-type converter and requires a high voltage switch, an inductor, a diode, a high voltage DC bus capacitor, and a PFC control circuit. The resonant mode output stage is typically realized with a half-bridge driven resonant load and requires two high voltage switches, a resonant inductor, a resonant capacitor, a DC-blocking capacitor and a ballast control circuit. 
   In a traditional half-bridge ballast output stage configuration, as shown in  FIG. 2 , the top switch of the half-bridge, M 1 , and the top of the DC bus capacitor, Cbus, are connected together at a single node. The power factor controller, comprised of Lpfc, Mpfc, Dpfc and a PFC control chip (not shown), must first charge Cbus and then Cbus supplies the half-bridge resonant converter the entire time. 
   SUMMARY OF THE INVENTION 
   The present invention, called a pendulum resonant converter, combines the above functions into a single-stage, as shown in  FIG. 3 , and requires only a single resonant inductor, a resonant capacitor, four lower voltage switches, a lower voltage DC bus capacitor, and a single control circuit, as shown in  FIG. 4 . The gates of the switches M 1 , M 2 , M 3  and M 4  are then controlled as described herein to achieve high power factor and drive the lamp load. 
   In this configuration, as shown in  FIG. 4 , the DC bus capacitor, Cbus, is placed on the one side of a second half-bridge (M 3  and M 4 ). The DC bus capacitor is separated from the input voltage by the first half-bridge (M 1  and M 2 ), the resonant output stage (L, C, and Lamp), and the second half-bridge (M 3  and M 4 ), and the DC blocking capacitor CDC. 
   By connecting the circuit in this fashion, bi-directional power flow through the load is achieved. Power is supplied from the rectified line input, for example, when the rectified line input voltage is high, and then supplied from the capacitor Cbus when the rectified line input voltage is low. The capacitor, Cbus, must now only supply power for a portion of the input line voltage cycle. With proper control of the switches (M 1 , M 2 , M 3 , and M 4 ), sinusoidal current is drawn from the line with high power factor, the DC bus capacitor, Cbus, is charged, and a constant power in the load, Rload, is maintained. This is achieved by a phase control of the switches such that there is a phase shift between the times when switches M 1  and M 3  are turned on. Switches M 2  and M 4  are controlled complementarily to respective switches M 1  and M 3 , that is, when switch M 1  goes on, M 2  goes off, when M 1  goes off, M 2  goes on and likewise, when M 3  goes on, M 4  goes off and when M 3  goes off, M 4  goes on. Accordingly, there is a phase shift between M 1  and M 3 , and the same phase shift between M 2  and M 4 . This allows the lamp to be powered with a bi-directional flow and the capacitor Cbus to be charged and discharged. 
   The line side first half-bridge comprises switches M 1  and M 2 , and the second DC bus side half-bridge comprises switches M 3  and M 4 . The resonant output stage comprises inductor L, capacitor C and the Lamp, and the DC bus capacitor is labeled as CBUS. A simple overview of how the topology works is achieved by describing the function of each switch. Switch M 1  is used for supplying current to the load from the rectified line, and, is switched on and off in such a way that a sinusoidal current is drawn from the line for achieving high power factor. Switch M 2  is switched on and off oppositely from switch M 1  and serves as a re-circulation path to maintain bi-directional current flow in the circuit. Switch M 3  is used for supplying current to the load from the DC bus capacitor for maintaining a constant power. Switch M 4  is switched oppositely to switch M 3  and serves as a re-circulation path to maintain bi-directional current flow in the circuit, and, together with the body diode of M 3 , is used to control the charging of capacitor CBUS. In order to achieve a high power factor, the control signals for driving the gates of switches M 1 , M 2 , M 3  and M 4  are pulse width modulated, to compensate for the effects of changing DC input and DC bus voltage levels. 
   According to one aspect, the invention comprises a resonant switching converter comprising: a first pair of series connected switches comprising a high side switch and a low side switch coupled across a DC input voltage, there being a first switched node between the switches; a second pair of series connected switches comprising a high side switch and a low side switch coupled across a DC bus, there being a second switched node between the switches; a DC bus capacitor coupled across the DC bus; a load adapted to be coupled between the first and second switched nodes adapted to have a load coupled therebetween; the high side switch of said first pair of switches supplying current to the load from said DC input voltage, the low side switch of said first pair of switches being switched opposite said high side switch of said first pair of switches and providing a re-circulation path to allow bi-directional current flow through the load; the high side switch of said second pair of switches supplying current to the load from said DC bus capacitor, the low side switch of said second pair of switches being switched opposite said high side switch of said second pair of switches and providing a re-circulation path to allow bi-directional current flow through the load; a controller for controlling the switching of each of said switches of said first and second pairs of switches, said controller comprising a phase shift circuit providing a phase shift between control signals driving the switches of the first and second pairs of switches to shape the waveshape of the output voltage of the converter provided to the load; the controller further comprising a first circuit for providing a first compensation signal for the control signals driving the first pair of switches to compensate for variation of the DC input voltage; and a second circuit for providing a second compensation signal for the control signals driving the second pair of switches to compensate for variation of the DC bus voltage. 
   A method for operating the converter is also described. 
   Further, the invention also relates to a circuit and method for determining the lamp load current for the phase shift control. 
   Other objects, features and advantages of the invention will become apparent in the following detailed description. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention will now be described in greater detail in the following detailed description with reference to the drawings, in which: 
       FIG. 1  is a block diagram of a prior art converter circuit; 
       FIG. 2  is a schematic diagram of the prior art converter circuit of  FIG. 1 ; 
       FIG. 3  is a block diagram of a pendulum resonant converter; 
       FIG. 4  is a schematic diagram of the converter of  FIG. 3 ; 
       FIG. 5  shows the input rectified line voltage and current for the circuit of  FIG. 4 ; 
       FIG. 6  graphically shows the input power, load power and bus capacitor power for the circuit of  FIG. 4 ; 
       FIG. 7  is a flow diagram showing the power flows amongst the line input, load and bus capacitor for the circuit of  FIG. 4 ; 
       FIG. 8  shows the bus capacitor voltage of the circuit of  FIG. 4 ; 
       FIG. 9  shows the bus capacitor current of the circuit of  FIG. 4 ; 
       FIG. 10  shows waveforms of the switches M 1  to M 4  and the output voltage of the circuit of  FIG. 4 ; 
       FIG. 11  shows waveforms of the control voltages for the switches M 2  and M 4  and the inductor current and output voltage for the circuit of  FIG. 4 ; 
       FIG. 12  shows the relationship between the output voltage and phase shift for varying input voltages; 
       FIG. 13  shows the relationship between input voltage and phase shift for a defined output voltage; 
       FIG. 14  shows the phase shift between switch M 1  and the resonant current; 
       FIG. 15  shows graphs of waveforms of the circuit according to the invention shown in  FIG. 16  utilizing PWM compensation of the drive signals to the half-bridge switches; 
       FIG. 16  shows a schematic diagram of the circuit of the invention; 
       FIG. 17  shows waveforms of the circuit of  FIG. 16 , showing how the line side signal determines the pulse width of the line side control signals for the line side switches; 
       FIG. 18  shows waveforms of the circuit of  FIG. 16 , showing how the DC bus side signal determines the pulse width with the requisite phase shift of the DC bus side switches; 
       FIG. 19  shows further waveforms of the circuit of  FIG. 16 ; 
       FIG. 20  shows a circuit for determining lamp current for the phase shift control; 
       FIG. 21  shows a circuit for the phase shift control of the DC bus side switches of  FIG. 16 ; 
       FIG. 22  shows a circuit for the PWM signal for control of the line side switches of  FIG. 16 ; 
       FIG. 23  shows an input circuit for the converter according to the invention; 
       FIG. 24  presents two graphs showing how different values of the input capacitor affect the input current; 
       FIG. 25  shows a resonant tank circuit schematic; 
       FIG. 26  shows waveforms of the circuit of  FIG. 16  relating to soft switching; 
       FIG. 27  is a graph of resonant tank current and load current; 
       FIG. 28  shows the switching currents in switches M 3  and M 1 ; 
       FIG. 29  shows exemplary waveforms of the circuit of  FIG. 16  for one value of DC bus capacitor; and 
       FIG. 30  shows exemplary waveforms using a larger DC bus capacitor. 
   

   DETAILED DESCRIPTION 
   A more detailed and complete description of the invention is achieved with basic mathematical equations and timing diagrams. For high power factor, the input line voltage and current are both sinusoidal and in phase. This causes the circuit to appear resistive to the line input voltage. Starting at the output of a full-bridge rectifier converting the AC input voltage to the DC input voltage, the voltage and current are both full-wave rectified and in phase, as shown in  FIG. 5 . 
   The corresponding input power is obtained by multiplying the input voltage and current together and is given as:
 
 P   input   =P   load (1−cos 2θ)  (1.1)
 
   For a constant power load, the power supplied by the capacitor Cbus is obtained by subtracting the load power from the input power and is given as:
 
 P   capacitor   =P   load    −P   input   (1.2)
 
 P   capacitor   =P   load   −P   load (1−cos 2θ)= P   load  cos 2θ  (1.3)
 
   The graphical representation of the input power, load power and capacitor power shown in  FIG. 6  serves as an illustration of how the powers change dynamically over a complete cycle of the line voltage. As shown, the load power is constant. When the input power to the load decreases, the deficit in power is supplied by the DC bus capacitor and vice versa. 
   Based on equation (1.2) and the graph of  FIG. 6 , the diagram as shown in  FIG. 7  can be drawn showing how power flows amongst input, load and bus capacitor. 
   According to the current direction in this case, the equation follows: 
   
     
       
         
           
             
               
                 
                   
                     
                       
                         C 
                         ⁢ 
                         
                           
                             ⅆ 
                             Vc 
                           
                           
                             ⅆ 
                             t 
                           
                         
                       
                       = 
                       
                         - 
                         Ic 
                       
                     
                   
                 
                 
                   
                     
                       ( 
                       
                         
                           Vc 
                           = 
                           Vcapacitor 
                         
                         , 
                         
                           Ic 
                           = 
                           Icapacitor 
                         
                       
                       ) 
                     
                   
                 
               
             
             
               
                 ( 
                 1.4 
                 ) 
               
             
           
         
       
     
   
   And from equation (1.3), it follows that: 
   
     
       
         
           
             
               
                 
                   
                     
                       Ic 
                       = 
                       
                         
                           Pc 
                           Vc 
                         
                         = 
                         
                           
                             
                               P 
                               load 
                             
                             ⁢ 
                             cos 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             2 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             θ 
                           
                           Vc 
                         
                       
                     
                   
                 
                 
                   
                     
                       ( 
                       
                         
                           Pc 
                           = 
                           Pcapacitor 
                         
                         , 
                         
                           θ 
                           = 
                           
                             ω 
                             ⁢ 
                             
                                 
                             
                             ⁢ 
                             t 
                           
                         
                       
                       ) 
                     
                   
                 
               
             
             
               
                 ( 
                 1.5 
                 ) 
               
             
           
         
       
     
   
   Combining equation (1.4) and (1.5), the capacitor Cbus voltage is then determined as a function of the load power as: 
   
     
       
         
           
             
               
                 Vc 
                 = 
                 
                   
                     
                       Vc 
                       avg 
                       2 
                     
                     - 
                     
                       
                         
                           P 
                           load 
                         
                         
                           ω 
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           c 
                         
                       
                       ⁢ 
                       sin 
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       2 
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       θ 
                     
                   
                 
               
             
             
               
                 ( 
                 1.6 
                 ) 
               
             
           
         
       
     
   
   Graphs of the bus capacitor voltage and current are shown in  FIGS. 8 and 9 . 
   Although when the swing is not too large, Vc seems to be sinusoidal, it is actually not. This equation also provides a reference for calculating the DC bus value according to its voltage rating. 
   Table 1.1 compares the pendulum resonant converter with the conventional 2 stage ballast solution: 
   
     
       
             
           
             
             
             
           
             
             
           
         
             
               TABLE 1.1 
             
           
           
             
                 
             
             
               Comparison of Pendulum Converter with Conventional Ballast Solution 
             
           
        
         
             
                 
               Pendulum Converter 
               Conventional 2 stages Converter 
             
             
                 
             
             
               Inductor Number 
               Save the inductor for PFC stage 
               One for PFC stage and one for 
             
             
                 
                 
               resonant tank 
             
             
               DC Bus 
               Smaller, being able to use film capacitor 
               Larger value, can use electrolytic 
             
             
               Capacitor Value 
                 
               capacitors only 
             
             
               DC Bus 
               Lower 
               600 V 
             
             
               Capacitor 
             
             
               Voltage 
             
             
               Switches Voltage 
               Lower 
               600 V 
             
             
               In Rush Current 
               Yes 
               No 
             
             
               Limit 
             
             
               Power Flow 
               Bi-directional 
               Single direction 
             
             
               Control 
             
             
               Component 
               Reduced 
               Inductor, high voltage diode, two 
             
             
               Count 
                 
               separated control chips, etc. 
             
             
               Converter Size 
               Smaller size and lower cost for savings 
               Conventional 
             
             
               and Cost 
               from inductor, DC bus capacitor and the 
             
             
                 
               switches 
             
             
               Circuit Topology 
               New 
               Conventional 
             
             
               Control Method 
               New 
               Conventional 
             
             
               Manufacturability 
               Higher 
               Conventional 
             
             
               and Reliability 
             
           
        
         
             
               Efficiency 
               High 
             
             
               Power Factor 
               High 
             
             
               Total Harmonic 
               Low 
             
             
               Distortion (THD) 
             
             
                 
             
           
        
       
     
   
   A known pendulum resonant converter is designed with a phase shift control to operate switches on the two opposite half-bridges with a phase shift. As shown in  FIG. 10 , M 1  and M 3  operate with a phase shift θ (as do M 2  and M 4 ) and V out  is the voltage applied to the resonant tank. Switches M 1  and M 2  operate in complementary fashion, that is 180° out of phase, and switches M 3  and M 4  are switched likewise. However, a phase shift θ is provided between M 1  and M 3  (and M 2  and M 4 ) to generate an output voltage like that shown in  FIG. 10 . 
   Waveforms from the circuit are shown in  FIG. 11  and these indicate how the phase shift method works. 
   By employing phase shift control, the voltage V out  applied to the resonant tank will have the step waveform as shown in  FIG. 10  instead of the square waveform, which is normally seen in the half bridge resonant converter. By changing the amount of phase shift θ, V out  is changed accordingly, not only in amplitude but in shape as well. Further, the voltage in the resonant tank, as the fundamental component of V out , will also change. In the known pendulum converter employing phase control, the DC bus voltage is considered to be constant, because it is assumed that the DC bus value is large enough. By fixing the pulse width of each switch to be 50% of the switching period, the steady states of the resonant converter can then be calculated. 
   Assuming the DC bus voltage is one unit, the input voltage changes from 0 to 2, and switches M 1  and M 3  operate with phase shift from 0 to 180 degrees, which means that according to the turning on of M 1 , M 3  will be turned on from exactly the same time to half a switching period delayed from the turn on of M 1 . Based on a simulation done using Matlab, a graph of the voltage in the resonant tank vs. phase shift and input voltage is shown in  FIG. 11  according to the data acquired from the simulation. By choosing the voltage across the resonant tank to be constantly 0.6366,  FIG. 12  shows that the relationship between input voltage and the phase shift satisfies a cosine function: 
   
     
       
         
           
             
               
                 θ 
                 = 
                 
                   arccos 
                   ⁡ 
                   
                     ( 
                     
                       
                         V 
                         g 
                       
                       2 
                     
                     ) 
                   
                 
               
             
             
               
                 ( 
                 2.1 
                 ) 
               
             
           
         
       
     
   
   Equation (2.1) gives the relationship between the phase shift and input voltage, for example, when the input voltage is 1, by applying equation (2.1) with V OUT =0.6366, the phase shift will be calculated as 60 degrees, which means when M 3  operates with a time difference of ⅙ of the switching period (60°) according to M 1 , the voltage in the resonant tank will be 0.6366, which can be maintained constantly by applying equation (2.1) for the whole line period. This is shown in  FIGS. 12 and 13 . 
   Also, the phase shift between the turning on edge of M 1  and the fundamental component of the voltage across the resonant tank equals the phase shift θ between M 1  and M 3  as shown in  FIG. 14 . 
   Assuming the power factor of the resonant tank is one unit, the equation of input current i g  can be derived as follows: 
   
     
       
         
           
             
               
                 
                   
                     
                       
                         〈 
                         
                           i 
                           g 
                         
                         〉 
                       
                       = 
                       
                         
                           1 
                           
                             T 
                             s 
                           
                         
                         ⁢ 
                         
                           
                             ∫ 
                             0 
                             
                               
                                 T 
                                 s 
                               
                               2 
                             
                           
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           
                             
                               i 
                               Load 
                             
                             · 
                             
                               sin 
                               ⁡ 
                               
                                 ( 
                                 
                                   
                                     ω 
                                     · 
                                     t 
                                   
                                   + 
                                   θ 
                                 
                                 ) 
                               
                             
                             · 
                             
                               ⅆ 
                               t 
                             
                           
                         
                       
                     
                   
                 
                 
                   
                     
                       = 
                       
                         
                           1 
                           
                             T 
                             s 
                           
                         
                         ⁢ 
                         
                           
                             ∫ 
                             0 
                             
                               
                                 T 
                                 s 
                               
                               2 
                             
                           
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           
                             
                               i 
                               Load 
                             
                             · 
                             
                               sin 
                               ⁡ 
                               
                                 ( 
                                 
                                   
                                     2 
                                     · 
                                     π 
                                     · 
                                     
                                       t 
                                       
                                         T 
                                         s 
                                       
                                     
                                   
                                   + 
                                   θ 
                                 
                                 ) 
                               
                             
                             · 
                             
                               ⅆ 
                               t 
                             
                           
                         
                       
                     
                   
                 
                 
                   
                     
                       = 
                       
                         
                           2 
                           · 
                           
                             i 
                             load 
                           
                           · 
                           
                             1 
                             π 
                           
                           · 
                           cos 
                         
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         θ 
                       
                     
                   
                 
               
             
             
               
                 ( 
                 2.2 
                 ) 
               
             
           
         
       
     
   
   From equations (2.1) and (2.2), it can be seen that if the DC bus voltage equals half the peak input voltage, when the described phase shift technique is used to keep a constant output voltage, the input current will be sinusoidal and in the same phase with the input voltage, which realizes a single stage power factor controller. 
   However, in any practical implementation using a real capacitor in the circuit, the DC bus voltage will not be constant and actually will have to swing according to equation (1.6). According to the invention, a PWM control is employed to compensate for the swing to provide improved regulation of lamp current and improve the power factor and THD. Also, the DC input voltage will vary. Several different PWM compensations can be combined to provide compensation for these variations. In one implementation, the rectified input voltage is sensed and is fed back to control the line side switches. This is shown in  FIG. 16  and will be described in more detail below. The concept is to have a smaller pulse width for M 1 , when the input voltage is low or the input current is supposed to be low; and to have a larger pulse width for M 1  when the input voltage is high or the input current is supposed to be high. Similarly, the DC bus side switches are also controlled to compensate for the DC bus voltage swing. 
   In the graph of  FIG. 15 , channel  1  shows the DC bus voltage as a noisy triangular waveform. It swings from approximately 100V to 200V. 
   Channel  2 , which is a flipped rectified sinusoidal waveform with shift level, is the line side PWM compensation signal applied to the line side switches. In actuality, as would be apparent to one of skill in the art based on this disclosure, two complementary signals are generated from the PWM compensation signal, each 180° out of phase with the other and applied respectively to the two line sides M 1  and M 2 . This PWM sawtooth waveform has, in the example, a 15V peak and swings from 6V to 8V, which corresponds to about 50% pulse width. 
   Channel  3 , which is a rectified sinusoidal waveform, shows the voltage on the input capacitor, which has a peak voltage at about 300V and rms about 215V. This voltage can not go all the way down to zero when driving a lamp. 
   Channel  4  shows the lamp current, which is regulated most of the period but can not maintain its amplitude all the time. 
   The PWM compensation signal which is shown on channel  2  is also beneficial for THD and PFC, as it forces the current to change according to the input voltage. 
     FIG. 16  is a simplified schematic diagram of the circuit implementing the PWM compensation signals and from which the waveforms of  FIG. 15  are taken. An inductor L, a capacitor C and a lamp comprise the resonant tank and across which V out  is measured. A current signal is sensed from the resonant tank and filtered and supplied to the PI controller PI acting as a feedback path for the phase shift, previously described with reference to  FIGS. 10-14 . A circuit for sensing the lamp current will be described with reference to  FIG. 20 . 
   A sawtooth waveform SW with frequency illustratively at around 37 KHz is generated by a suitable oscillator. The sawtooth SW is compared in a first comparator COMP  1  with the signal V IN  from the line side voltage. This generates complementary PWM compensation signals for the line side switches M 1  and M 2 . The falling edge of M 1 , and thus the rising edge of M 2 , will be fixed according to the falling edge of the sawtooth waveform. As known to those of skill in the art, suitable dead time is maintained between the on times of the half-bridge switches to prevent cross conduction. 
   The feedback signal from the PI controller PI is compared to the saw-tooth waveform via comparator COMP 2 . This determines the previously discussed phase shift between the DC bus side switches and line side switches. 
   According to the invention, a third comparator COMP 3  compares the DC bus voltage, summed with a DC voltage DC (via the summer) and the sawtooth (SW). While the phase shift is determined by the falling edge, the DC bus voltage thus determines the pulse width of the DC bus side switches M 3  and M 4 . 
     FIGS. 17 and 18  show how the control method is implemented in the circuit and how the waveforms are generated.  FIG. 17  shows how the line side control signals are determined via comparator COMP  1 . Channel  1  is the line input voltage V IN ; channel  2  is the sawtooth SW; and channel  3  is the output of the comparator COMP  1 . 
   As shown, when the sawtooth exceeds the line input voltage, the comparator provides a high output. Depending on the input voltage level, a pulse width modulated control signal is thus generated. 
     FIG. 18  shows that the Cbus side signal determines the pulse of the DC bus side switches via comparator COMP 3 . Channel  1  is the input from the summer to COMP 3 ; channel  2  is the sawtooth SW; and channel  3  is the output of comparator COMP 3 . As shown, the circuit PWM 1  superimposes the phase shift on the pulse width modulated signal as shown in  FIG. 18  as determined by comparator COMP 2 . As shown, the pulse width of the output of PWM 1  is determined by the time period when the sawtooth SW exceeds the voltage DCB from the output of the summer. The phase shift of the output of PWM 1  is determined by COMP 2  as previously described. The phase shift of the output of PWM 1  is shown by the arrows marked “phase shift” in  FIG. 18 . 
   Turning to  FIG. 19 , channel  1  is the phase shift signal from circuit PWM  1 . According to the 15V peak sawtooth, the signal with about 1V swinging range gives about 25 degrees phase shift. Channel  2  is the line side PWM signal from COMP  1 , which changes the pulse width from about 35% to 60%. They both have a frequency the same as the rectified input voltage, which is 120 Hz in this case. Both signals are shown plotted against a low frequency time sweep, so the 120 Hz line frequency is apparent. 
   In order to provide the phase shift, the lamp current or some other output parameter must be sensed. As the lamp current is the main factor affecting the lumen level it is used. However, there is no direct way to sense the lamp current as it is only within the lamp. Also, because the lamp has a negative resistance behavior, the lamp will try to hold the voltage across it constant even when the lamp current amplitude is changing. 
     FIG. 20  shows a circuit to sense lamp current. 
   The voltage sensed in the circuit of  FIG. 20  can be represented as:
 
 V=I   L   *R   filament   +V   lamp   −I   c   *R   filament   =V   load +( I   L   −I   C )* R   filament   =V   load   +I   load   *R   filament  
 
   The filament resistances are shown outside the lamp, only for purposes of explanation. They are obviously inside the lamp. 
   As the lamp will try to keep V load  constant, V will reflect the trend of I load  and then can be used to be the current sensing feedback. Using an Op Amp, only a half cycle of the signal is sensed assuming the signal has a symmetric waveform. Because the filament resistance is small compared to the load, this approach is not particularly sensitive for sensing the lamp current. However, it is easy, effective and efficient. 
   The phase shift provided by COMP 2  is the main control of the circuit. For controlling the phase shift from 0 to 90 degrees, according to the 15V sawtooth waveform, the signal level is limited within 15V to 11.5V. Considering the practicalities, the actual limit is 14.3V to 12V. A voltage divider, an Op Amp, and a diode D can be used to realize the phase shift control as shown in  FIG. 21 . 
   By changing the reference input of the PI controller, the controller&#39;s output level changes and it moderately changes the lamp current level. The parameters of the PI controller do not need to be very accurate as long as it is fast enough. 
   Theoretically, the PWM signal from the output of COMP 1  of  FIG. 16  should have a valley of 50% pulse width, as it supplies the highest possible current for the peak of the line current. However, as the phase shift cannot go accurately to 0 degrees, this purpose can not be realized together with satisfying other regulations, and actually it swings from 35% to 60%. A circuit for generating the PWM control signal for the line switches M 1  and M 2  is shown in  FIG. 22 , also using an Op Amp. 
   Changing the voltage divider of  FIG. 22  gives different amplitudes of the swing. Basically, the bigger the swing, the better the THD and power factor, as it forces the current lower when it should be lower. However, applying this when controlling the lamp is slightly different, as when the pulse width gets too small, the input capacitor will not be able to be completely discharged. It then feeds back to make the swing to be smaller. 
   Changing the DC offset to the Op Amp of  FIG. 22  changes the level of the PWM signal. Raising it will lower the DC bus voltage level. When it is too high the DC bus will not be able to be charged up. However, the valley should be around 50% for the reason mentioned before so it can not be too low. Also, that makes THD and power factor worse. 
     FIG. 23  shows that the input stage of the pendulum converter is much the same as in a conventional converter. However, the input capacitor size matters when driving a lamp. For example, in one embodiment of the circuitry, using a 220 nF input capacitor gives 25.1% THD and 0.912 PF; while a 100 nF input capacitor gives 20.2% THD and 0.938 PF. 
     FIG. 24  shows how the input capacitor affects the input current. The left graph shows the input current with a 220 nF input capacitor in the circuit and the right graph shows the input current with a 100 nF capacitor. The top waveform shows the input current. The 100 nF input capacitor helps to make the input current less distorted. 
   Turning to  FIG. 25 , the resonant inductor and the resonant capacitor C determine the resonance frequency according to the equation 
             f   =     1     2   ⁢           ⁢   π   ⁢       L   ⁢           ⁢   C             ;         
the Q factor follows the equation
 
           Q   =     R       L   C               
while R is the load according to the resistance. The higher the Q factor, the higher the voltage applied to the load. Also, a higher circulation current will occur. As in this topology there is no high voltage supplied by a boost converter, the Q factor needs to be high enough to obtain the proper voltage across the lamp. In an exemplary embodiment, with a 22 nF resonant capacitor, 600 uH resonant inductor, and a lamp resistance of about 520 Ω, the Q factor is about 3.15, and the circulation current is about 3 times the load current. This high circulation current is one of the main drawbacks of this circuit. For this reason, the circuit is preferably used with a 220V AC input. With a 110V input, the Q factor needs to be twice as high and the circulation current will then be too high. By operating at a higher frequency, the inductor and capacitor can be reduced in size, saving cost and maintaining the Q factor at the same time.
 
   Higher Q factor helps in obtaining better THD and power factor, on the other hand. When Q factor is lowered, the input capacitor can not be discharged all the way to zero during the cycle, and thus causes a deteriorated THD and power factor. 
   Once the design power rating is fixed, the lamp should be chosen to place in the circuit. The circuit according to the described embodiments will power a 40W lamp. 
   The DC bus capacitor value determines the ripple amplitude of the DC bus voltage. The smaller the capacitor is, the larger the ripple. Using a 6.8 uF capacitor, in the illustrated circuit, the voltage swings from about 100V to 200V. A film capacitor is preferable as it has a much longer life compared with an electrolytic capacitor. Also, lower voltage rating (250V) MOSFETs can be used for the DC bus side compared with 600V ratings of conventional converters. 
   According to  FIG. 16 , a DC shift is added to the DC bus side signal by the summer to determine the pulse width for the control of the DC bus side switches. The pulse width controls the DC bus voltage level. The smaller the pulse width of switch M 3 , the higher the DC bus voltage. Higher DC bus voltage gives more stable lamp current. However, when it is too high, the input capacitor will not be discharged completely when the input voltage across it is zero. The DC bus voltage then is kept a little bit higher than the theoretical value which is half of the peak value of the input voltage as shown in  FIG. 15 . 
   According to the invention, the pendulum resonant converter does not have to work on the inductive side of resonance to have soft switching as in conventional ballast designs. 
   Assuming the circuit operates right at the resonance frequency, the soft switching issue can be analyzed by looking at  FIG. 14 . As shown in the figure, the phase shift between the turning on edge of M 1  and the fundamental component of the voltage of the resonant tank equals the phase shift θ between M 1  and M 3 . When θ&lt;0, the turning on edge of M 1  is always beyond the resonant current and soft switching occurs. The switching current is shown in  FIG. 26 . Channel  1  shows the switch M 3  control signal; channel  2  shows the switch M 1  control signal; and channel  4  shows the resonant tank current. It is shown that as the M 3  switching signal is leading, the current going through M 1  is negative when M 1  is turning on, and positive when M 1  is turning off, which fulfills the requirement of soft switching of M 1 , and by analysis according to  FIG. 5 , M 2  will have soft switching simultaneously. 
   This approach to soft switching is more related to the phase shift control but not the switching frequency vs. the resonance frequency as in conventional half bridge resonant converters. Even when the resonant tank is operated below resonance, soft switching can be obtained by proper phase control. This observation provides many new possibilities for the control of general-purpose pendulum converters. However, The trade off for this control method is that soft switching can not be realized for the DC bus bridge comprising switches M 3  and M 4 . In order to have soft switching on both sides of the bridge, a capacitive operating frequency is required, which means the switches operate with a frequency under resonance. As shown in  FIG. 27 , operating in this manner allows a large ratio of third harmonics into the resonant tank while the load current is still satisfactory according to the filtering behavior of the parallel resonant tank. 
   The third harmonics help the soft switching issue as shown in  FIG. 28 . While the line side switch M 1  still has soft switching, the DC side switch M 3  now has close-to-zero switching, which is semi soft switching. By the symmetric analysis done above, M 2  will have soft switching and M 4  will have semi soft switching at the same time. 
   In an exemplary embodiment, a 6.8 uF capacitor was used as the DC bus capacitor.  FIG. 29  shows waveforms for the circuit, including output current, line side PWM and DC bus voltage using a 6.8 uF DC bus capacitor. 
   In the exemplary embodiment, the Crest Factor of the output was 1.69, while the THD was 20.2% with 0.938 PF as indicated above. As shown in  FIG. 30 , using a 22 uF DC bus will give much better THD and PF performance while the Crest Factor is about the same. 
   However, the shape of the load current and input current, though acceptable, is not optimal. Also, as discussed, there is a large circulation current. The input is preferably 220v. The THD and PF can be significantly improved when using a purely resistive load, and a transformer can be used to allow the circuit to be used at lower input voltage. 
   In conclusion, Table 5 compares experimental data with the prior art 2 stage solution. All the datas are based on a 100 nF input capacitor and a 6.8 uF DC bus capacitor. 
   
     
       
             
           
             
             
             
           
             
             
             
           
         
             
               TABLE 5.1 
             
           
           
             
                 
             
             
               Comparisons of The Pendulum Ballast and Conventional Ballast Solution 
             
           
        
         
             
                 
               Pendulum Converter 
               Existing 2 Stages Solution 
             
             
                 
                 
             
           
        
         
             
               No. Of Inductors 
               3 
               4 
             
             
               No. Of MOSFETs 
               4 
               3 
             
             
               MOSFET Voltage Ratings 
               2 of 400 V, 2 of 250 V 
               All 600 V 
             
             
               CBUS Value 
               6.8 uF 
               22 uF 
             
             
               CBUS Voltage Rating 
               250 V 
               600 V 
             
             
               CBUS Type 
               Film capacitor 
               Electrolytic capacitor 
             
             
               Power Flow Control 
               Bi-directional 
               Single direction 
             
             
               In Rush Current Limit 
               Yes 
               No 
             
             
               Lamp Types 
               Determined by converter 
               Determined by converter 
             
             
                 
               power rating 
               power rating 
             
             
               Efficiency 
               70%-80% 
               70%-80% 
             
             
               THD 
               20.2% 
               20% 
             
             
               PF 
               0.938 
               0.99 
             
             
               Crest Factor 
               1.69 
               1.5-1.6 
             
             
               Input Voltage Range 
               220 V rating 
               110/220 V rating 
             
             
               Circulation Current 
               About 3 times load current 
               About 1.5 times load current 
             
             
               Soft-switching 
               1.5 hard switching switch 
               1 hard switching switch 
             
             
                 
             
           
        
       
     
   
   Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. Therefore, the present invention should be limited not by the specific disclosure herein, but only by the appended claims.