Abstract:
An electronic component assembly and a method for making an electronic component assembly. A non-limiting example electronic component assembly may, for example, comprise a lower component comprising a plurality of upward extending pins, and an upper component comprising a plurality of respective terminals, each which comprising a respective reflowable conductive structure that extends downward to a respective one of the plurality of upward extending pins.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS/INCORPORATION BY REFERENCE 
     The present application is a continuation of U.S. application Ser. No. 13/528,206, titled STACKABLE VIA PACKAGE AND METHOD, filed Jun. 20, 2012, presently pending; which is a continuation of U.S. application Ser. No. 12/483,913, titled STACKABLE VIA PACKAGE AND METHOD, filed Jun. 12, 2009, now U.S. Pat. No. 8,222,538. Each of the above-mentioned applications is hereby incorporated herein by reference in its entirety. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present application relates to the field of electronics, and more particularly, to methods of forming electronic component packages and related structures. 
     2. Description of the Related Art 
     To form an electronic component package, an electronic component is mounted to a substrate. The substrate includes traces on the same surface of the substrate to which the electronic component is mounted. Bond wires are formed to electrically connect bond pads of the electronic component to the traces. 
     To protect the electronic component as well as the bond wires, the electronic component and bond wires are covered in an encapsulant. The traces extend from under the encapsulant to an exposed area of the surface of the substrate outside of the periphery of the encapsulant, i.e., not covered by the encapsulant. The traces include terminals on the exposed area of the substrate outside of and around the encapsulant. 
     Solder balls are formed on the terminals. These solder balls extend from the substrate to a height greater than the height of the encapsulant to allow the solder balls to be electrically connected to a larger substrate such as a printed circuit motherboard. 
     However, the solder balls are substantially spherical in shape. Thus, forming the solder balls with a height greater than the height of the encapsulant places fundamental restrictions on minimizing the pitch of the solder balls. 
     SUMMARY OF THE INVENTION 
     In accordance with one embodiment, a stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. 
     A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A&lt;B and 0=&lt;C&lt;½×D. The shape of the via aperture prevents solder deformation of the solder column formed from the solder ball as well as prevents solder bridging between adjacent solder columns. 
     These and other features of the present invention will be more readily apparent from the detailed description set forth below taken in conjunction with the accompanying drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a cross-sectional view of a stackable via package during fabrication in accordance with one embodiment; 
         FIG. 2  is an enlarged cross-sectional view of the region II of the stackable via package of  FIG. 1  after formation of a via aperture solder ball structure in accordance with one embodiment; 
         FIGS. 3 ,  4 ,  5 ,  6 ,  7 ,  8 ,  9 ,  10 ,  11 ,  12 ,  13 ,  14 ,  15 ,  16  are enlarged cross-sectional views of via aperture solder ball structures in accordance with various embodiments; 
         FIG. 17  is a cross-sectional view of an electronic component assembly including the stackable via package of  FIGS. 1 ,  2  during fabrication in accordance with one embodiment; 
         FIG. 18  is a cross-sectional view of the electronic component assembly of  FIG. 17  at a later stage during fabrication in accordance with one embodiment; 
         FIG. 19  is a cross-sectional view of an electronic component assembly including a stackable via package having the via aperture solder ball structure of  FIG. 4  during fabrication in accordance with one embodiment; 
         FIG. 20  is a cross-sectional view of the electronic component assembly of  FIG. 19  at a later stage during fabrication in accordance with one embodiment; 
         FIG. 21  is a cross-sectional view of the electronic component assembly of  FIG. 17  having misalignment between an interconnection ball and a solder ball in accordance with one embodiment; 
         FIG. 22  is a cross-sectional view of the electronic component assembly of  FIG. 21  at a later stage during fabrication in accordance with one embodiment; 
         FIG. 23  is a cross-sectional view of the electronic component assembly of  FIG. 19  having misalignment between an interconnection ball and a solder ball in accordance with one embodiment; 
         FIG. 24  is a cross-sectional view of the electronic component assembly of  FIG. 23  at a later stage during fabrication in accordance with one embodiment; 
         FIG. 25  is a cross-sectional view of an electronic component assembly including the stackable via package of  FIGS. 1 ,  2  during fabrication in accordance with one embodiment; 
         FIG. 26  is a cross-sectional view of the electronic component assembly of  FIG. 25  at a later stage during fabrication in accordance with one embodiment; 
         FIG. 27  is a cross-sectional view of an electronic component assembly including a stackable via package having the via aperture solder ball structure of  FIG. 4  during fabrication in accordance with one embodiment; and 
         FIG. 28  is a cross-sectional view of the electronic component assembly of  FIG. 27  at a later stage during fabrication in accordance with one embodiment. 
     
    
    
     In the following description, the same or similar elements are labeled with the same or similar reference numbers. 
     DETAILED DESCRIPTION 
     As an overview and in accordance with one embodiment, referring to  FIGS. 1 and 2  together, a stackable via package  100  includes a substrate  102  having an upper surface  102 U and a trace  114  on upper surface  102 U, trace  114  including a terminal  228 . A solder ball  122  is on terminal  228 . Solder ball  122  has a solder ball diameter A and a solder ball height D. 
     A via aperture  230  is formed in a package body  124  enclosing solder ball  122  to expose solder ball  122 . Via aperture  230  includes a via bottom  234 , sometimes called a via aperture shelf, having a via bottom diameter B and a via bottom height C from upper surface  102 U of substrate  102 , where A&lt;B and 0=&lt;C&lt;½×D. The shape of via aperture  230  prevents solder deformation of the solder column formed from solder ball  122  as well as prevents solder bridging between adjacent solder columns. 
     Now in more detail,  FIG. 1  is a cross-sectional view of a stackable via package  100  during fabrication in accordance with one embodiment. Stackable via package  100 , sometimes called an electronic component package, includes a substrate  102  including an upper, e.g., first, surface  102 U and an opposite lower, e.g., second, surface  102 L. Substrate  102  further includes sides  102 S extending perpendicularly between upper surface  102 U and lower surface  102 L. Substrate  102  is a dielectric material such as laminate, ceramic, printed circuit board material, or other dielectric material. 
     Stackable via package  100  further includes an electronic component  104 . In one embodiment, electronic component  104  is an integrated circuit chip, e.g., an active component. However, in other embodiments, electronic component  104  is a passive component such as a capacitor, resistor, or inductor. 
     In accordance with this embodiment, electronic component  104  includes an active surface  106  and an opposite inactive surface  108 . Electronic component  104  further includes bond pads  110  formed on active surface  106 . Inactive surface  108  is mounted to upper surface  102 U of substrate  102  with an adhesive  112 , sometimes called a die attach adhesive. 
     Although electronic component  104  is illustrated and described as being mounted in a wirebond configuration, in other embodiments, electronic component  104  is mounted in a different configuration such as a flip chip configuration. In another embodiment, a plurality of electronic components are mounted, e.g., in a stacked configuration. 
     Formed on upper surface  102 U of substrate  102  are electrically conductive upper, e.g., first, traces  114 , e.g., formed of copper. Bond pads  110  are electrically connected to upper traces  114 , e.g., bond fingers thereof, by electrically conductive bond wires  116 . 
     Formed on lower surface  102 L of substrate  102  are lower, e.g., second, traces  118 . Lower traces  118  are electrically connected to upper traces  114  by electrically conductive vias  120  extending through substrate  102  between upper surface  102 U and lower surface  102 L. Although not illustrated in  FIG. 1 , in one embodiment as discussed in greater detail below with reference to  FIG. 2 , stackable via package  100  further includes solder masks on upper and lower surface  102 U,  102 L that protect first portions of upper and lower traces  114 ,  118  while exposing second portions, e.g., terminals and/or bond fingers, of upper and lower traces  114 ,  118 . 
     Although a particular electrically conductive pathway between bond pads  110  and lower traces  118  is described above, other electrically conductive pathways can be formed. For example, contact metallizations can be formed between the various electrical conductors. 
     Further, instead of straight though vias  120 , in one embodiment, substrate  102  is a multilayer substrate and a plurality of vias and/or internal traces form the electrical interconnection between upper traces  114  and lower traces  118 . 
     In accordance with one embodiment, one or more of upper traces  114  is not electrically connected to lower traces  118 , i.e., is electrically isolated from lower traces  118 , and electrically connected to bond pads  110 . To illustrate, a first upper trace  114 A of the plurality of upper traces  114  is electrically isolated from lower traces  118  and electrically connected to a respective bond pad  110 . In accordance with this embodiment, the respective bond pad  110  electrically connected to upper trace  114 A is also electrically isolated from lower traces  118 . 
     In accordance with one embodiment, one or more of upper traces  114  is electrically connected to both bond pads  110  and to lower traces  118 . To illustrate, instead of being electrically isolated from lower traces  118 , upper trace  114 A is electrically connected to lower traces  118  by a via  120 A of the plurality of vias  120 . In accordance with this embodiment, the respective bond pad  110  is electrically connected to upper trace  114 A and is also electrically connected to lower traces  118 . 
     Via  120 A is indicated by dashed lines to signify that formation of via  120 A is optional. If via  120 A is not formed, upper trace  114 A is electrically isolated from lower traces  118 . Conversely, if via  120 A is formed, upper trace  114  is electrically connected to lower traces  118 . 
     In accordance with one embodiment, one or more of upper traces  114  is not electrically connected to a bond pad  110 , i.e., is electrically isolated from bond pads  110 , and is electrically connected to lower traces  118 . To illustrate, the upper trace  114  to the left of electronic component  104  in the view of  FIG. 1  is electrically isolated from bond pads  110  and electrically connected to lower traces  118 . In accordance with this embodiment, the respective lower traces  118  electrically connected to the upper trace  114  electrically isolated from bond pads  110  are also electrically isolated from bond pads  110 . 
     Although various examples of connections between bond pads  110 , upper traces  114 , and lower traces  118  are set forth above, in light of this disclosure, those of skill in the art will understand that any one of a number of electrical configurations are possible depending upon the particular application. 
     Formed on upper traces  114  are electrically conductive solder balls  122 . Illustratively, solder balls  122  are formed of solder. In other embodiments, solder balls  122  are formed of other electrically conductive material such as plated copper or electrically conductive adhesive. 
     As set forth above, in accordance with various embodiments, upper traces  114  are electrically connected to lower traces  118 , to bond pads  110 , and/or to lower traces  118  and bond pads  110 . Thus, in accordance with various embodiments, solder balls  122  are electrically connected to lower traces  118  only, to bond pads  110  only, and/or to both lower traces  118  and bond pads  110 . 
     Electronic component  104 , bond wires  116 , solder balls  122  and the exposed portions of upper surface  102 U including upper traces  114  are enclosed, sometimes called encased, encapsulated, and/or covered, with a package body  124 . Illustratively, package body  124  is a cured liquid encapsulant, molding compound, or other dielectric material. Package body  124  protects electronic component  104 , bond wires  116 , solder balls  122 , and the exposed portions of upper surface  102 U including upper traces  114  from the ambient environment, e.g., from contact, moisture and/or shorting to other structures. 
     Package body  124  includes a principal surface  124 P parallel to upper surface  102 U of substrate  102 . In accordance with this embodiment, package body  124  includes sides  124 S extending perpendicularly between substrate  102  and principal surface  124 P. Sides  124 S are parallel to and lie in the same plane as sides  102 S of substrate  102 . Thus, package body  124  entirely covers upper traces  114 . 
     Illustratively, stackable via package  100  is formed simultaneously with a plurality of packages in an array or strip. The array or strip is singulated resulting in sides  124 S of package body  124  parallel to and lying in the same plane as sides  102 S of substrate  102 . 
     Although the terms parallel, perpendicular, and similar terms are used herein, it is to be understood that the described features may not be exactly parallel and perpendicular, but only substantially parallel and perpendicular to within excepted manufacturing tolerances. 
     To form stackable via package  100  as illustrated in  FIG. 1 , inactive surface  108  of electronic component  104  is mounted to upper surface  102 U of substrate  102  by adhesive  112 . Bond pads  110  are electrically connected to upper traces  114  by bond wires  116 . Solder balls  122  are formed on upper traces  114 . Electronic component  104 , bond wires  116 , solder balls  122  and the exposed portions of upper surface  102 U including upper traces  114  are enclosed within package body  124 . Via apertures are formed in package body  124  to expose solder balls  122  as discussed further below. 
       FIG. 2  is an enlarged cross-sectional view of the region II of stackable via package  100  of  FIG. 1  after formation of a via aperture solder ball structure  200  in accordance with one embodiment. Referring now to  FIG. 2 , substrate  102  includes a solder mask  226 , i.e., a dielectric material, on upper surface  102 U. A terminal  228  of upper traces  114  is exposed from solder mask  226 . Formation of solder mask  226  is optional, and in one embodiment, solder mask  226  is not formed. 
     Stackable via package  100  includes a via aperture  230  penetrating into package body  124  from principal surface  124 P to expose solder ball  122 . Although only a single via aperture  230 , a single terminal  228  and a single solder ball  122  are illustrated in  FIG. 2  and discussed herein, in light of this disclosure, those of skill in the art will understand that a plurality of via apertures  230  are formed. Each via aperture  230  exposes a respective solder ball  122  on a respective terminal  228 . 
     In one embodiment, via aperture  230  is formed using a laser-ablation process. More particularly, a laser is repeatedly directed at principal surface  124 P perpendicularly to principal surface  124 P. This laser ablates, i.e., removes, portions of package body  124  leaving via apertures  230 , sometimes called a through hole. 
     Although a laser-ablation process for formation of via aperture  230  is set forth above, in other embodiments, other via aperture formation techniques are used. For example, via aperture  230  is formed using selective molding, milling, mechanical drilling, chemical etching and/or other via aperture formation techniques. 
     As illustrated in  FIG. 2 , via aperture  230  extends between principal surface  124 P of package body  124  and solder ball  122 . Accordingly, solder ball  122  is exposed through via aperture  230 . 
     Via aperture  230  tapers from principal surface  124 P to solder ball  122 . More particularly, the diameter of via aperture  230  in a plane parallel to principal surface  124 P is greatest at the top of via aperture  230 , and smallest at the bottom of via aperture  230  and gradually diminishes between the top and bottom of via aperture  230 . The top of via aperture  230  is located at principal surface  124 P and the bottom of via aperture  230  is located between principal surface  124 P of package body  124  and upper surface  102 U of substrate  102  in this embodiment. 
     In another embodiment, via aperture  230  has a uniform diameter, i.e., has a cylindrical shape. In yet another embodiment, via aperture  230  tapers from the bottom to the top of via aperture  230 . More particularly, the diameter of via aperture  230  in a plane parallel to principal surface  124 P is smallest at the top of via aperture  230  and greatest at the bottom of via aperture  230  and gradually increases between the top and bottom of via aperture  230 . 
     Via aperture  230  is defined by a via aperture sidewall  232  and a via aperture shelf  234  of package body  124 . Via aperture shelf  234  is the via bottom of via aperture  230 . Via aperture sidewall  232  extends between principal surface  124 P of package body  124  and via aperture shelf  234 . In accordance with this embodiment, via aperture sidewall  232  is in the shape of the lateral surface of an inverted truncated cone, sometimes called a frustum. Via aperture sidewall  232  is thus sometimes called a sloped sidewall. 
     Via aperture shelf  234  is parallel to upper surface  102 U of substrate  102 . Via aperture shelf  234  extends from via aperture sidewall  232  to solder ball  122 . 
     As illustrated in  FIG. 2 , package body  124  encloses a lower, e.g., first, portion  236  of solder ball  122  while an upper, e.g., second, portion  238  of solder ball  122  is exposed through via aperture  230 . 
     Solder ball  122  has a solder ball diameter A, which is the diameter of solder ball  122 . Via aperture shelf  234  has a via aperture shelf diameter B, which is the diameter of via aperture shelf  234 . Via aperture shelf diameter B is also the diameter of the bottom of via apertures  230  as so is sometimes also called the via bottom diameter B. In accordance with this embodiment, via aperture shelf diameter B is greater than solder ball diameter A. More particularly, solder ball diameter A and via aperture shelf diameter B are governed by the following relation (1):
 
 A&lt;B.  
 
     Via aperture shelf  234  has a via aperture shelf height C from upper surface  102 U of substrate  102 . More particularly, via aperture shelf height C is the distance between upper surface  102 U of substrate  102  and via aperture shelf  234 . Via aperture shelf height C is also the distance between upper surface  102 U of substrate  102  and the bottom of via aperture  230  so is also sometimes called the via bottom height C. Solder ball  122  has a solder ball height D from upper surface  102 U of substrate  102 . More particularly, solder ball height D is the distance that solder ball  122  extends from upper surface  102 U of substrate  102 . 
     Via aperture shelf height C is greater than or equal to zero and less than one-half of solder ball height D (Solder ball height D is the middle of solder ball  122  in one embodiment). More particularly, via aperture shelf height C and solder ball height D are governed by the following relation (2):
 
0 =&lt;C&lt; ½ ×D.  
 
     According to relation (2), via aperture shelf  234  is located below the horizontal great circle of solder ball  122 , i.e., below the maximum horizontal width of solder ball  122 . Solder ball  122  is approximately spherical. The horizontal great circle is an imaginary circle on solder ball  122  that is parallel with upper surface  102 U of substrate  102  and has the same center and radius as solder ball  122 , and consequently divides solder ball  122  into two approximately equal parts. Accordingly, the cross-sectional area in a plane parallel to upper surface  102 U of substrate  102  of lower portion  236  of solder ball  122  increases between terminal  228  and via aperture shelf  234 . 
     Package body  124  includes a solder ball contact surface  240  in direct physical contact with lower portion  236  of solder ball  122 . Solder ball contact surface  240  extends between upper surface  102 U of substrate  102  and via aperture shelf  234 . The circumference in a plane parallel to upper surface  102 U of substrate  102  of solder ball contact surface  240  increases between upper surface  102 U of substrate  102  and via aperture shelf  234 . 
     Accordingly, the pocket defined by solder ball contact surface  240  which corresponds to lower portion  236  of solder ball  122  has a maximum diameter opening at via aperture shelf  234 . In this manner, it has been surprisingly discovered that gases released during reflow of solder ball  122  are readily vented thus avoiding solder deformation of the solder column formed from solder ball  122  as discussed in greater detail below with reference to  FIGS. 17 and 18 . 
     As a further surprising result, solder bridging (shorts) between the solder column formed from solder ball  122  and adjacent solder columns is also avoided by via aperture  230 . More particularly, by forming via aperture  230  with via aperture shelf  234 , in the event that there is excess solder during the solder reflow of solder ball  122 , via aperture  230  provides space for capture of the excess solder. This avoids the excess solder from overflowing on top of principal surface  124 P of package body  124  and shorting to other electrically conductive structures such as adjacent solder columns. This is also discussed in greater detail below with reference to  FIGS. 17 and 18 . 
       FIG. 3  is an enlarged cross-sectional view of a via aperture solder ball structure  300  in accordance with another embodiment. Via aperture solder ball structure  300  of  FIG. 3  is similar to via aperture solder ball structure  200  of  FIG. 2  and only the significant differences are discussed below. A solder ball  122 A of via aperture solder ball structure  300  of  FIG. 3  extends to a height from upper surface  102 U of substrate  102  which is less than the height that solder ball  122  of via aperture solder ball structure  200  of  FIG. 2  extends from surface  102 U of substrate  102 . 
     Referring now to  FIG. 3 , solder ball  122 A is hemispherical in shape. More particularly, solder ball  122 A approximates the northern hemisphere and is connected to terminal  228  approximate at the equator. 
     In accordance with this embodiment, via aperture solder ball structure  300  is governed by: relation (1): A&lt;B; and relation (2): 0=&lt;C&lt;½×D, where solder ball diameter A is the diameter of solder ball  122 A, via aperture shelf diameter B is the diameter of via aperture shelf  234 , via aperture shelf height C is the distance between upper surface  102 U of substrate  102  and via aperture shelf  234 , and solder ball height D is the distance that solder ball  122 A extends from upper surface  102 U of substrate  102 . 
       FIG. 4  is an enlarged cross-sectional view of a via aperture solder ball structure  400  in accordance with another embodiment. Via aperture solder ball structure  400  of  FIG. 4  is similar to via aperture solder ball structure  200  of  FIG. 2  and only the significant differences are discussed below. 
     Referring now to  FIG. 4 , via aperture solder ball structure  400  is governed by: relation (1): A&lt;B; and relation (2): 0=&lt;C&lt;½×D, where C=0, and where solder ball diameter A is the diameter of solder ball  122 , via aperture shelf diameter B is the diameter of via aperture  230 B at upper surface  102 U, and solder ball height D is the distance that solder ball  122  extends from upper surface  102 U of substrate  102 . 
     As there is no via aperture shelf in accordance with this embodiment, via aperture shelf diameter B is sometimes called the via bottom diameter B. Further, as there is no via aperture shelf in accordance with this embodiment, a via aperture sidewall  232 B of a via aperture  230 B extends from principal surface  124 P of package body  124  to upper surface  102 U of substrate  102 . The via bottom of via aperture  230  is at upper surface  102 U of substrate  102 . Further, an exposed portion  402  of upper surface  102 U around terminal  228  and solder ball  122  is exposed through via aperture  230 B. 
     In accordance with via aperture solder ball structure  400 , solder ball  122  is mounted to terminal  228  prior to the formation of package body  124 . More particularly, package body  124  is formed to enclose solder ball  122  in a manner similar to that discussed above in reference to  FIG. 1 . After formation of package body  124 , via aperture  230 B is formed to expose solder ball  122 . 
     In accordance with another embodiment, solder ball  122  is mounted to terminal  228  after formation of package body  124  and via aperture  230 B. In accordance with this embodiment, referring to  FIGS. 1 and 4  together, electronic component  104 , bond wires  116 , and the exposed portions of upper surface  102 U including upper traces  114  are enclosed within package body  124 . Referring now to  FIG. 4 , via aperture  230 B is formed to expose terminal  228 . Solder ball  122  is then mounted to terminal  228  resulting in via aperture solder ball structure  400  as illustrated in  FIG. 4 . 
       FIG. 5  is enlarged cross-sectional view of a via aperture solder ball structure  500  in accordance with another embodiment. Via aperture solder ball structure  500  of  FIG. 5  is similar to via aperture solder ball structure  200  of  FIG. 2  and only the significant differences are discussed below. 
     In accordance with this embodiment, via aperture solder ball structure  500  is governed by: relation (1): A&lt;B; and relation (2): 0=&lt;C&lt;½×D, where solder ball diameter A is the diameter of solder ball  122 , via aperture shelf diameter B is the diameter of via aperture shelf  234 , via aperture shelf height C is the distance between upper surface  102 U of substrate  102  and via aperture shelf  234 , and solder ball height D is the distance that solder ball  122  extends from upper surface  102 U of substrate  102 . 
     As illustrated in  FIG. 5 , via aperture solder ball structure  500  allows a substantial amount of misalignment between via aperture  230  and solder ball  122 . More particularly, solder ball  122  is not required to be centered within via aperture shelf  234 . In one embodiment, solder ball  122  is located within the area defined by via aperture shelf  234 . In this particular embodiment, solder ball  122  is formed at the outer periphery of via aperture shelf  234  and, more particularly, is formed at the intersection of via aperture sidewall  232  and via aperture shelf  234 . 
     Referring now generally to  FIGS. 1-5 , principal surface  124 P of package body  124  has a package body height H above upper surface  102 U of substrate  102 . Package body height H is the distance between upper surface  102 U of substrate  102  and principal surface  124 P. In accordance with the embodiments illustrated in  FIGS. 1-5 , package body height H is greater than solder ball height D, i.e., H&gt;D. Recall that solder ball height D is the distance that solder ball  122  (solder ball  122 A in  FIG. 3 ) extends from upper surface  102 U of substrate  102 . 
     In accordance with another embodiment, referring now to  FIG. 1 , package body  124  has a principal surface  124 P- 1 . Principal surface  124 P- 1  is located below the tops of solder balls  122  such that solder balls  122  protrude from package body  124  and extend above principal surface  124 P- 1 . In accordance with this embodiment, principal surface  124 P- 1  is indicated by the dashed line. A package body height H1 is the distance between upper surface  102 U of substrate  102  and principal surface  124 P- 1 . Package body height H1 is less than solder ball height D in accordance with this embodiment, i.e., H1&lt;D. 
       FIGS. 6 ,  7 ,  8 ,  9  are enlarged cross-sectional views of via aperture solder ball structures  600 ,  700 ,  800 ,  900  in accordance with various embodiments. Via aperture solder ball structures  600 ,  700 ,  800 ,  900  of  FIGS. 6 ,  7 ,  8 ,  9  are similar to via aperture solder ball structures  200 ,  300 ,  400 ,  500  of  FIGS. 2 ,  3 ,  4 ,  5 , respectively. One significant difference is that the height H1 of principal surface  124 P- 1  of package body  124  is less than solder ball height D of solder balls  122  (solder ball  122 A in  FIG. 7 ) in accordance with the embodiments of via aperture solder ball structures  600 ,  700 ,  800 ,  900  of  FIGS. 6 ,  7 ,  8 ,  9 , respectively. 
     In accordance with yet another embodiment, referring again to  FIG. 1 , package body  124  has a principal surface  124 P- 2 . Principal surface  124 P- 2  is parallel to the tops of solder balls  122  such that the tops of solder balls  122  are even with principal surface  124 P- 2 . In accordance with this embodiment, principal surface  124 P- 2  is indicated by the dashed dot line. A package body height H2 is the distance between upper surface  102 U of substrate  102  and principal surface  124 P- 2 . Package body height H2 is equal to solder ball height D in accordance with this embodiment, i.e., H2=D. 
       FIGS. 10 ,  11 ,  12 ,  13  are enlarged cross-sectional views of via aperture solder ball structures  1000 ,  1100 ,  1200 ,  1300  in accordance with various embodiments. Via aperture solder ball structures  1000 ,  1100 ,  1200 ,  1300  of  FIGS. 10 ,  11 ,  12 ,  13  are similar to via aperture solder ball structures  200 ,  300 ,  400 ,  500  of  FIGS. 2 ,  3 ,  4 ,  5 , respectively. One significant difference is that the height H2 of principal surface  124 P- 2  of package body  124  is equal to solder ball height D of solder balls  122  (solder ball  122 A in  FIG. 11 ) in accordance with the embodiments of via aperture solder ball structures  1000 ,  1100 ,  1200 ,  1300  of  FIGS. 10 ,  11 ,  12 ,  13 , respectively. 
       FIGS. 14 ,  15 ,  16  are enlarged cross-sectional views of via aperture solder ball structures  1400 ,  1500 ,  1600  in accordance with various embodiments. Via aperture solder ball structures  1400 ,  1500 ,  1600  of  FIGS. 14 ,  15 ,  16  are similar to via aperture solder ball structures  200 ,  300 ,  500  of  FIGS. 2 ,  3 ,  5 , respectively. Only the significant differences between via aperture solder ball structures  1400 ,  1500 ,  1600  of  FIGS. 14 ,  15 ,  16  and via aperture solder ball structures  200 ,  300 ,  500  of  FIGS. 2 ,  3 ,  5  are discussed below. 
     Referring now to  FIG. 14 , solder ball  122  includes an exposed solder ball diameter E. Exposed solder ball diameter E is the diameter of the portion of solder ball  122  exposed from via aperture shelf  234  when viewed perpendicular to principal surface  124 P from the topside, i.e., along the line  1442 . State another way, exposed solder ball diameter E is the diameter of the circle defined at the intersection of via aperture shelf  234  and solder ball  122 , i.e., at the inner periphery of via aperture shelf  234 . 
     Recall that solder ball  122  has solder ball diameter A. Via aperture shelf  234  has via aperture shelf diameter B. In accordance with this embodiment, solder ball diameter A is greater than via aperture shelf diameter B, which is greater than exposed solder ball diameter E. More particularly, solder ball diameter A, via aperture shelf diameter B, and exposed solder ball diameter E are governed by the following relation (3):
 
 A&gt;B&gt;E.  
 
     Referring now to  FIG. 15 , via aperture solder ball structure  1500  is also governed by relation (3): A&gt;B&gt;E, where solder ball diameter A is the diameter of solder ball  122 A, via aperture shelf diameter B is the diameter of via aperture shelf  234 , and exposed solder ball diameter E is the diameter of solder ball  122 A exposed from via aperture shelf  234 . 
     Referring now to  FIG. 16 , via aperture solder ball structure  1600  is also governed by relation (3): A&gt;B&gt;E, where solder ball diameter A is the diameter of solder ball  122 , via aperture shelf diameter B is the diameter of via aperture shelf  234 , and exposed solder ball diameter E is the diameter of solder ball  122  exposed from via aperture shelf  234 . 
     In  FIGS. 14 ,  15 ,  16 , via aperture solder ball structures  1500 ,  1600 ,  1700  include principal surface  124 P having package body height H greater than solder ball height D of solder balls  122  (solder ball  122 A in  FIG. 15 ). Referring now to  FIGS. 1 ,  14 ,  15 , and  16  together, in other embodiments, via aperture solder ball structures  1500 ,  1600 ,  1700  are formed to include principal surfaces  124 P- 1  or  124 P- 2  having package body height H1 or H2 less than or equal to solder ball height D of solder balls  122  (solder ball  122 A in  FIG. 15 ), respectively. 
       FIG. 17  is a cross-sectional view of an electronic component assembly  1700  including stackable via package  100  of  FIGS. 1 ,  2  during fabrication in accordance with one embodiment. Referring now to  FIG. 17 , a larger substrate  1750  such as a printed circuit motherboard includes a terminal  1752  formed on a first surface  1750 L of larger substrate  1750 . An electrically conductive interconnection ball  1754  is formed on terminal  1752 . Illustratively, interconnection ball  1754  is formed of solder or solder paste. First surface  1750 L further includes a solder mask  1756 . Solder mask  1756  is patterned to expose terminal  1752 . 
       FIG. 18  is a cross-sectional view of electronic component assembly  1700  of  FIG. 17  at a later stage during fabrication in accordance with one embodiment. Referring now to  FIGS. 17 and 18  together, interconnection ball  1754  is placed in contact with solder ball  122  as illustrated in  FIG. 17 . Assembly  1700  is heated to reflow interconnection ball  1754  and solder ball  122  forming solder column  1858  as illustrated in  FIG. 18 . 
     More particularly, interconnection ball  1754  and solder ball  122 , e.g., solder, are heated to melt interconnection ball  1754  and solder ball  122 . Upon melting, interconnection ball  1754  and solder ball  122  combine into a single molten structure, e.g., molten solder. This molten structure cools and forms solder column  1858 . In accordance with this embodiment, solder column  1858  is integral, i.e., is a single unitary structure and not a plurality of different layers connected together. 
     Gases released during reflow of solder ball  122  are readily vented thus avoiding solder deformation of solder column  1858 . Further, solder bridging (shorts) between adjacent solder columns  1858  is also avoided by the structure of via aperture  230 . More particularly, by forming via aperture  230  with via aperture shelf  234 , in the event that there is excess solder during the solder reflow, via aperture  230  provides space for capture of the excess solder. This avoids the excess solder from overflowing on top of principal surface  124 P of package body  124  and shorting to adjacent solder columns  1858 . 
     Solder column  1858  physically and electrically connects terminal  228  of stackable via package  100  with terminal  1752  of larger substrate  1750 . Further, package body  124  defines the shape of solder column  1858  at terminal  228 . More particularly, solder ball contact surface  240  of package body  124  defines the opening in package body  124  to terminal  228 . Solder column  1858  fills this opening, which defines the shape of solder column  1858  at terminal  228 . 
     Further, terminal  1752  and solder mask  1756  of larger substrate  1750  define the shape of solder column  1858  at terminal  1752 . More particularly, terminal  1752  is solder wettable, whereas solder mask  1756  is not. Accordingly, solder column  1858  wets (directly contacts and adheres to) terminal  1752  and does not wet (does not contact or adhere to) solder mask  1756 . Accordingly, terminal  1752  and solder mask  1756  define the shape of solder column  1858  at terminal  1752 . 
     By defining the shape of solder column  1858  at terminals  228 ,  1752 , reliability in the formation of solder column  1858  is maximized. 
       FIG. 19  is a cross-sectional view of an electronic component assembly  1900  including a stackable via package having via aperture solder ball structure  400  of  FIG. 4  during fabrication in accordance with one embodiment. Referring now to  FIG. 19 , electronic component assembly  1900  includes larger substrate  1750  having first surface  1750 L, terminal  1752 , interconnection ball  1754 , and solder mask  1756  as discussed above in reference to  FIGS. 17 ,  18 , the description of which is not repeated here for purposes of simplicity of discussion. 
       FIG. 20  is a cross-sectional view of electronic component assembly  1900  of  FIG. 19  at a later stage during fabrication in accordance with one embodiment. Referring now to  FIGS. 19 and 20  together, interconnection ball  1754  is placed in contact with solder ball  122  as illustrated in  FIG. 19 . Assembly  1900  is heated to reflow interconnection ball  1754  and solder ball  122  forming solder column  2058 . 
     More particularly, interconnection ball  1754  and solder ball  122 , e.g., solder, are heated to melt interconnection ball  1754  and solder ball  122 . Upon melting, interconnection ball  1754  and solder ball  122  combine into a single molten structure, e.g., molten solder. This molten structure cools and forms solder column  2058 . In accordance with this embodiment, solder column  2058  is integral, i.e., is a single unitary structure and not a plurality of different layers connected together. 
     Gases released during reflow of solder ball  122  are readily vented through via aperture  2303  thus avoiding solder deformation of solder column  2058 . Further, solder bridging (shorts) between solder column  2058  and adjacent solder columns  2058  is also avoided by the structure of via aperture  230 B. More particularly, by exposing exposed portion  402  of upper surface  102 U around terminal  228  and solder ball  122  through via aperture  230 B, in the event that there is excess solder during the solder reflow, via aperture  230 B provides space for capture of the excess solder. This avoids the excess solder from overflowing on top of principal surface  124 P of package body  124  and shorting to adjacent solder columns  2058 . 
     Solder column  2058  physically and electrically connects terminal  228  with terminal  1752  of larger substrate  1750 . Further, terminal  228  and solder mask  226  of substrate  102  define the shape of solder column  2058  at terminal  228 . More particularly, terminal  228  is solder wettable, whereas solder mask  226  is not. Accordingly, solder column  2058  wets (adheres to) terminal  228  and does not wet (does not adhere to) solder mask  226 . Accordingly, terminal  228  and solder mask  226  define the shape of solder column  2058  at terminal  228 . 
     As discussed above, terminal  1752  and solder mask  1756  of larger substrate  1750  define the shape of solder column  2058  at terminal  1752 . By defining the shape of solder column  2058  at terminals  228 ,  1752 , reliability in the formation of solder column  2058  is maximized. 
     In the embodiments illustrated in  FIGS. 17 ,  18 ,  19 ,  20 , interconnection ball  1754  is aligned with solder ball  122 . More particularly, referring to  FIGS. 17 ,  19 , interconnection ball  1754  has a first axis F1 perpendicular to terminal  1752 . Solder ball  122  has a second axis F2 perpendicular to terminal  228 . First axis F1 is aligned with second axis F2, i.e., axis F1 and axis F2 approximately lie upon a common line. By aligning interconnection ball  1754  with solder ball  122 , reliability in the formation of solder columns  1858 ,  2058  as illustrated in  FIGS. 18 ,  20  is maximized. 
     However, a via aperture solder ball structure in accordance with one embodiment accommodates a substantial amount of misalignment between interconnection ball  1754  and solder ball  122  as discussed further below in reference to  FIGS. 21 ,  22 ,  23 ,  24 . 
       FIG. 21  is a cross-sectional view of electronic component assembly  1700  of  FIG. 17  having misalignment between interconnection ball  1754  and solder ball  122  in accordance with one embodiment. Referring to  FIG. 21 , interconnection ball  1754  is misaligned with solder ball  122 . More particularly, first axis F1 of interconnection ball  1754  is offset from second axis F2 of solder ball  122 . Interconnection ball  1754  contacts and rests on both solder ball  122  and via aperture sidewall  232 . 
       FIG. 22  is a cross-sectional view of electronic component assembly  1700  of  FIG. 21  at a later stage during fabrication in accordance with one embodiment. Referring now to  FIGS. 21 and 22  together, assembly  1700  is heated to reflow interconnection ball  1754  and solder ball  122  forming solder column  2258 . 
     Solder column  2258  electrically and physically connects terminal  228  to terminal  1752 . Due to the misalignment of interconnection ball  1754  and solder ball  122  and thus the misalignment of terminal  228  and terminal  1752 , solder column  2258  is angled, i.e., has an angle of less than 90 degrees, with respect to upper surface  102 U of substrate  102 . In one embodiment, solder column  2258  rests on and contacts via aperture sidewall  232 . In another embodiment, surface tension of solder column  2258  while in the molten state moves larger substrate  1750  with respect to substrate  102  thus aligning terminal  1752  to terminal  228 . 
       FIG. 23  is a cross-sectional view of electronic component assembly  1900  of  FIG. 19  having misalignment between interconnection ball  1754  and solder ball  122  in accordance with one embodiment. Referring now to  FIG. 23 , interconnection ball  1754  is misaligned with solder ball  122 . More particularly, first axis F1 of interconnection ball  1754  is offset from second axis F2 of solder ball  122 . Interconnection ball  1754  contacts and rests on both solder ball  122  and via aperture sidewall  232 B. 
       FIG. 24  is a cross-sectional view of electronic component assembly  1900  of  FIG. 23  at a later stage during fabrication in accordance with one embodiment. Referring now to  FIGS. 23 and 24  together, assembly  1900  is heated to reflow interconnection ball  1754  and solder ball  122  forming solder column  2458 . 
     Solder column  2458  electrically and physically connects terminal  228  to terminal  1752 . Due to the misalignment of interconnection ball  1754  and solder ball  122  and thus the misalignment of terminal  228  and terminal  1752 , solder column  2458  is angled, i.e., has an angle of less than 90 degrees, with respect to upper surface  102 U of substrate  102 . In one embodiment, solder column  2458  rests on and contacts via aperture sidewall  232 B. In another embodiment, surface tension of solder column  2458  while in the molten state moves larger substrate  1750  with respect to substrate  102  thus aligning terminal  1752  to terminal  228 . 
       FIG. 25  is a cross-sectional view of an electronic component assembly  2500  including stackable via package  100  of  FIGS. 1 ,  2  during fabrication in accordance with one embodiment. Referring now to  FIG. 25 , a larger substrate  2550  such as a printed circuit motherboard includes a terminal  2552  formed on a first surface  2550 L of larger substrate  2550 . An electrically conductive pin  2554  is formed on terminal  2552 . Illustratively, pin  2554  is formed of copper, gold, or other electrically conductive material. In one embodiment, pin  2554  is formed of a material that has a higher melting temperature than solder ball  122  allowing reflow of solder ball  122  without melting of pin  2554 . First surface  2550 L further includes a solder mask  2556 . Solder mask  2556  is patterned to expose terminal  2552  and pin  2554 . 
       FIG. 26  is a cross-sectional view of electronic component assembly  2500  of  FIG. 25  at a later stage during fabrication in accordance with one embodiment. Referring now to  FIGS. 25 and 26  together, pin  2554  is placed in contact with solder ball  122  as illustrated in  FIG. 25 . Assembly  2500  is heated to reflow solder ball  122  forming thus encasing pin  2554  in a solder column  2558  as illustrated in  FIG. 26 . Solder column  2558  extends between terminal  228  and terminal  2552  in this embodiment. 
     More particularly, solder ball  122  is heated to melt solder ball  122 . Upon melting, pin  2554  passes through solder ball  122  to terminal  228 . Pin  2554  provides a fixed standoff in accordance with this embodiment, e.g., ensures a fixed space between terminals  228 ,  2552  equal to the length of pin  2554 . 
       FIG. 27  is a cross-sectional view of an electronic component assembly  2700  including a stackable via package having via aperture solder ball structure  400  of  FIG. 4  during fabrication in accordance with one embodiment. Referring now to  FIG. 27 , electronic component assembly  2700  includes larger substrate  2550  having first surface  2550 L, terminal  2552 , pin  2554 , and solder mask  2556  as discussed above in reference to  FIGS. 25-26 , the description of which is not repeated here for purposes of simplicity of discussion. 
       FIG. 28  is a cross-sectional view of electronic component assembly  2700  of  FIG. 27  at a later stage during fabrication in accordance with one embodiment. Referring now to  FIGS. 27 and 28  together, pin  2554  is placed in contact with solder ball  122  as illustrated in  FIG. 27 . Assembly  2700  is heated to reflow solder ball  122  thus encasing pin  2554  in solder column  2858  as illustrated in  FIG. 28 . Solder column  2858  extends between terminal  228  and terminal  2552  in this embodiment. 
     The drawings and the forgoing description gave examples of the present invention. The scope of the present invention, however, is by no means limited by these specific examples. Numerous variations, whether explicitly given in the specification or not, such as differences in structure, dimension, and use of material, are possible. The scope of the invention is at least as broad as given by the following claims.