Abstract:
A phase lock loop (PLL) circuit is provided. A voltage controlled oscillator (VCO) generates an output clock signal based on a control voltage. A controller provides a first digital control word, a second digital control word and a loop factor. A frequency modifier is coupled to the output clock signal, controlled by the controller to divide the output clock signal by the loop factor to generate a feedback frequency. A charge pump is controlled by the up signal and down signal to generate a charge pump current, comprising a first digital to analog converter (DAC) to generate a first current based on the first digital control word when the up signal is asserted. A second DAC generates a second current based on a second digital control word when the down signal is asserted. The controller defines a first relationship between the first digital control word and the loop factor, and the controller defines a second relationship between the second digital control word and the loop factor.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The invention relates to a phase lock loop, and in particular, to programmable loop gain factors to enhance the working range. 
         [0003]    2. Description of the Related Art 
         [0004]    A Phase lock loop (PLL) circuit is widely used in the communication area for the purpose of clock synchronous and clock synthesis. PLL is a kind of feedback control circuit. All feedback circuit should be designed carefully to make sure that the whole circuit is stable. If the circuit is unstable, the output clock frequency would vary periodically. 
         [0005]      FIG. 1  shows a general block diagram of the phase locked loop (PLL), comprising a phase detector  102 , a charge pump  104 , a low pass filter (LPF)  106 , a voltage controlled oscillator (VCO)  108  and a frequency modifier  110 . A reference frequency f ref  is provided to the phase detector  102  as an initial condition. The phase detector  102  typically has two input terminals and two output terminals. The phases of the reference frequency f ref  and a feedback frequency c are compared by the phase detector  102  to output either an up signal V UP  or a down signal V DOWN . For example, rising edges of the reference frequency f ref  and feedback frequency f back  are compared. An up signal V UP  is asserted when the rising edge of the reference frequency f ref  is detected while that of the feedback frequency f back  is not. The up signal V UP  will hold high until the rising edge of the feedback frequency f back  is detected. Conversely, down signal V DOWN  is asserted when the rising edge of the feedback frequency f back  is detected while that of the reference frequency f ref  is not. Likewise, down signal V DOWN  will hold high until the rising edge of the reference frequency f ref  is detected. 
         [0006]    The charge pump  104  typically comprises a current source to pull or drain a current based on the up signal V UP  and down signal V DOWN , such that a control voltage V f  is generated at the output end of the LPF  106 . 
         [0007]    The VCO  108  then generates an output clock signal f out  based on the control voltage V f  output from the LPF  106 . The frequency of the output clock signal f out  can be expressed as: 
         [0000]        f   out   =K*V   f    (1),
 
         [0008]    where K is a constant. This equation implies that the output clock frequency of the VCO  108  is proportional to the input voltage of it. The output clock signal f out  is also fed back to the frequency modifier  110 . The frequency modifier  110  performs a frequency division to generate a feedback frequency f back  having a frequency expressed as: 
         [0000]        f   back   =f   out   /M    (2),
 
         [0009]    where M is a loop factor equal or greater than 1. Consequently, a close loop is formed, and the PLL  100  is expected to be recursively converged to lock on a desired frequency. Parameters of the components within the PLL must be carefully designed to exhibit stability and effective convergence characteristics. Generally, a unity loop gain is desired for the loop to converge to a stable condition. The loop factor M is usually adjustable to increase the flexibility of PLL such that a wide range of desired frequency can by dynamically rendered. However, the loop factor M is inverse proportional to the loop gain of the PLL. When the loop factor M is adjusted, the loop gain may be biased away from unity, and stability of the loop is influenced, causing the convergence time undeterminable. It is possible that an inappropriate loop factor M would cause the PLL to oscillate, diverge, or converge slow. As the PLL is usually an essential component in communication systems, it is desirable to implement an enhanced design to overcome the loop gain issue. 
       BRIEF SUMMARY OF THE INVENTION 
       [0010]    An exemplary embodiment of a phase lock loop (PLL) circuit is provided. A voltage controlled oscillator (VCO) generates an output clock signal based on a control voltage. A controller provides a first digital control word, a second digital control word and a loop factor. A frequency modifier is coupled to the output clock signal, controlled by the controller to divide the output clock signal by the loop factor to generate a feedback frequency. A phase detector has a first input end for receiving a reference frequency, and a second end coupled to the feedback frequency, and compares phases of the reference frequency and the feedback frequency to assert an up signal or a down signal. A charge pump is controlled by the up signal and down signal to generate a charge pump current. In the charge pump, a first digital to analog converter (DAC) is operative to generate a first current based on the first digital control word when the up signal is asserted. A second DAC is operative to generate a second current based on a second digital control word when the down signal is asserted. The first current and the second current are output as the charge pump current. A low pass filter (LPF) is coupled to the charge pump current, performing a low pass filtering on the charge pump current to output the control voltage. The controller defines a first relationship between the first digital control word and the loop factor, and the controller defines a second relationship between the second digital control word and the loop factor. 
         [0011]    The first relationship and the second relationship may be linear non-decreasing functions. Alternatively, the first and second relationships may be non-decreasing stepwise functions. 
         [0012]    The first digital control word and second digital control word may be different digital control words. The first DAC generates the first current based on a unit current multiplying the first digital control word, and the second DAC generates the second current based on the unit current multiplying the second digital control word. 
         [0013]    In a further embodiment, the first digital control word and second digital control word are identical to the loop factor. A detailed description is given in the following embodiments with reference to the accompanying drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0014]    The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein: 
           [0015]      FIG. 1  shows a conventional PLL circuit; 
           [0016]      FIG. 2  shows an embodiment of a PLL circuit  200 ; and 
           [0017]      FIG. 3   a  and  3   b  show transfer functions of different loop factors. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0018]    The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims. 
         [0019]      FIG. 2  shows an embodiment of a PLL circuit  200 . A charge pump  230  is provided to replace the conventional charge pump  104  of  FIG. 1 . In the charge pump  230 , a first DAC  202   u  and a second DAC  202   d  are provided, each controlled by a first digital control word N 1  and a second digital control word N 2  to provide desired currents. The first digital control word N 1  and second digital control word N 2  are digital control words determined by a controller  220  based on various parameters of the PLL circuit  200 , and detailed calculation thereof will be described below. The frequency modifier  210  is a programmable divider for dividing the output clock signal f out  to generate the feedback frequency f back . The controller  220  provides a loop factor M to the frequency modifier  210  as a basis to determine the output clock signal f out . Since the frequency modifier  210  is programmable, the PLL circuit  200  is operative to provide an output clock signals f out  of wide frequency range. For example, a higher loop factor M would render a higher output clock signal f out , and vise versa. 
         [0020]    As the PLL circuit  200  is initialized, the phase detector  102  compares phases of the reference frequency f ref  and the feedback frequency f back . An up signal V UP  is asserted if the phase of reference frequency f ref  leads that of the feedback frequency f back . Conversely, down signal V DOWN  is asserted if the phase of feedback frequency f back  leads that of the reference frequency f ref . The asserted up signal V UP  would switch on the first switch  204   u,  allowing the first DAC  202   u  to inject a first current I UP  to the LPF  106 . The first DAC  202   u  is digitally controlled by the first digital control word N 1 . For example, there may be a plurality of current mirrors each corresponding to a digit value (not shown), and the first digital control word N 1  has a plurality of digits each enabling a corresponding current mirror to provide currents. Consequently, the total current output from the first DAC  202   u  forms the first current I UP . Likewise, the second DAC  202   d  and the second digital control word N 2  are of identical design, and when the down signal V DOWN  switches on the second switch  204 d, a second current I DOWN  is drained from the LPF  106 . When neither the up signal V UP  nor down signal V DOWN  are asserted, the charge pump  230  turns into a floating state, wherein no current is generated. In the embodiment, the LPF  106  comprises a string of a first resistor R 1  and a first capacitor C 1  cascaded with a second capacitor C 2  in parallel, coupled to the output end of the charge pump  230  to provide the control voltage V f . 
         [0021]    The stability is the major design concern while designing PLL. The transfer function of each functional block should be studied before analyzing the system stability. 
         [0022]    The transfer function of the frequency modifier  210  is: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       T 
                        
                       
                           
                       
                        
                       
                         F 
                         210 
                       
                     
                     = 
                     
                       
                         
                           Phase 
                            
                           
                             ( 
                             
                               f 
                               back 
                             
                             ) 
                           
                         
                         
                           Phase 
                            
                           
                             ( 
                             
                               f 
                               out 
                             
                             ) 
                           
                         
                       
                       = 
                       
                         
                           
                             Frequency 
                              
                             
                               ( 
                               
                                 f 
                                 back 
                               
                               ) 
                             
                           
                           
                             Frequency 
                              
                             
                               ( 
                               
                                 f 
                                 out 
                               
                               ) 
                             
                           
                         
                         = 
                         
                           1 
                           M 
                         
                       
                     
                   
                   , 
                 
               
               
                 
                   ( 
                   3 
                   ) 
                 
               
             
           
         
       
     
         [0023]    The transfer function of the phase detector  102  and charge pump  230  is: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       T 
                        
                       
                           
                       
                        
                       
                         F 
                         102 
                       
                     
                     = 
                     
                       
                         
                           I 
                           CP 
                         
                         
                           
                             Phase 
                              
                             
                               ( 
                               
                                 f 
                                 ref 
                               
                               ) 
                             
                           
                           - 
                           
                             Phase 
                              
                             
                               ( 
                               
                                 f 
                                 back 
                               
                               ) 
                             
                           
                         
                       
                       = 
                       
                         
                           I 
                           CP 
                         
                         
                           2 
                            
                           π 
                         
                       
                     
                   
                   , 
                 
               
               
                 
                   ( 
                   4 
                   ) 
                 
               
             
           
         
       
     
         [0024]    where the charge pump current I CP  represents the current flowing from the charge pump  230  to the LPF  106 . 
         [0025]    The transfer function of the LPF  106  is: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       T 
                        
                       
                           
                       
                        
                       
                         F 
                         106 
                       
                     
                     = 
                     
                       
                         
                           V 
                           f 
                         
                         
                           I 
                           cp 
                         
                       
                       = 
                       
                         
                           ( 
                           
                             1 
                             + 
                             
                               
                                 sC 
                                 1 
                               
                                
                               
                                 R 
                                 1 
                               
                             
                           
                           ) 
                         
                         
                           
                             s 
                              
                             
                               ( 
                               
                                 
                                   C 
                                   1 
                                 
                                 + 
                                 
                                   C 
                                   2 
                                 
                               
                               ) 
                             
                           
                            
                           
                             ( 
                             
                               1 
                               + 
                               
                                 
                                   sC 
                                   T 
                                 
                                  
                                 
                                   R 
                                   1 
                                 
                               
                             
                             ) 
                           
                         
                       
                     
                   
                    
                   
                     
 
                   
                    
                   
                     
                       
                         where 
                          
                         
                             
                         
                          
                         
                           C 
                           T 
                         
                       
                       = 
                       
                         
                           
                             C 
                             1 
                           
                            
                           
                             C 
                             2 
                           
                         
                         
                           
                             C 
                             1 
                           
                           + 
                           
                             C 
                             2 
                           
                         
                       
                     
                     , 
                   
                 
               
               
                 
                   ( 
                   5 
                   ) 
                 
               
             
           
         
       
     
         [0026]    The transfer function of the VCO  108  is: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       T 
                        
                       
                           
                       
                        
                       
                         F 
                         108 
                       
                     
                     = 
                     
                       
                         
                           Phase 
                            
                           
                             ( 
                             
                               f 
                               out 
                             
                             ) 
                           
                         
                         
                           V 
                           f 
                         
                       
                       = 
                       
                         2 
                          
                         π 
                          
                         
                             
                         
                          
                         
                           
                             K 
                             VCO 
                           
                           s 
                         
                       
                     
                   
                   , 
                 
               
               
                 
                   ( 
                   6 
                   ) 
                 
               
             
           
         
       
     
         [0027]    Therefore, an open loop transfer function from reference frequency f ref  to output clock signal f out  can be estimated from equations (3) to (6): 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       
                         A 
                         = 
                           
                          
                         
                           T 
                            
                           
                               
                           
                            
                           
                             F 
                             open 
                           
                         
                       
                     
                   
                   
                     
                       
                         ≡ 
                           
                          
                         
                           
                             Phase 
                              
                             
                               ( 
                               
                                 f 
                                 out 
                               
                               ) 
                             
                           
                           
                             Phase 
                              
                             
                               ( 
                               
                                 f 
                                 ref 
                               
                               ) 
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         = 
                           
                          
                         
                           T 
                            
                           
                               
                           
                            
                           
                             
                               F 
                               102 
                             
                             · 
                             T 
                           
                            
                           
                               
                           
                            
                           
                             
                               F 
                               106 
                             
                             · 
                             T 
                           
                            
                           
                               
                           
                            
                           
                             F 
                             108 
                           
                         
                       
                     
                   
                   
                     
                       
                         
                           = 
                             
                            
                           
                             
                               
                                 
                                   I 
                                   CP 
                                 
                                 · 
                                 
                                   K 
                                   VCO 
                                 
                               
                               
                                 ( 
                                 
                                   
                                     C 
                                     1 
                                   
                                   + 
                                   
                                     C 
                                     2 
                                   
                                 
                                 ) 
                               
                             
                             · 
                             
                               
                                 ( 
                                 
                                   1 
                                   + 
                                   
                                     
                                       sC 
                                       1 
                                     
                                      
                                     
                                       R 
                                       1 
                                     
                                   
                                 
                                 ) 
                               
                               
                                 
                                   s 
                                   2 
                                 
                                  
                                 
                                   ( 
                                   
                                     1 
                                     + 
                                     
                                       
                                         sC 
                                         T 
                                       
                                        
                                       
                                         R 
                                         1 
                                       
                                     
                                   
                                   ) 
                                 
                               
                             
                           
                         
                         , 
                       
                     
                   
                 
               
               
                 
                   ( 
                   7 
                   ) 
                 
               
             
           
         
       
     
         [0028]    A feedback factor β is expressed as: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       β 
                       ≡ 
                       
                         
                           Phase 
                            
                           
                             ( 
                             
                               f 
                               back 
                             
                             ) 
                           
                         
                         
                           Phase 
                            
                           
                             ( 
                             
                               f 
                               out 
                             
                             ) 
                           
                         
                       
                     
                     = 
                     
                       1 
                       M 
                     
                   
                   , 
                 
               
               
                 
                   ( 
                   8 
                   ) 
                 
               
             
           
         
       
     
         [0029]    The loop gain of the PLL is therefore calculated from equations (7) and (8): 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       G 
                       Loop 
                     
                     = 
                     
                       
                         a 
                          
                         
                             
                         
                          
                         β 
                       
                       = 
                       
                         
                           
                             
                               I 
                               CP 
                             
                             · 
                             
                               K 
                               VCO 
                             
                           
                           
                             M 
                             · 
                             
                               ( 
                               
                                 
                                   C 
                                   1 
                                 
                                 + 
                                 
                                   C 
                                   2 
                                 
                               
                               ) 
                             
                           
                         
                         · 
                         
                           
                             ( 
                             
                               1 
                               + 
                               
                                 
                                   sC 
                                   1 
                                 
                                  
                                 
                                   R 
                                   1 
                                 
                               
                             
                             ) 
                           
                           
                             
                               s 
                               2 
                             
                              
                             
                               ( 
                               
                                 1 
                                 + 
                                 
                                   
                                     sC 
                                     T 
                                   
                                    
                                   
                                     R 
                                     1 
                                   
                                 
                               
                               ) 
                             
                           
                         
                       
                     
                   
                   , 
                 
               
               
                 
                   ( 
                   9 
                   ) 
                 
               
             
           
         
       
     
         [0030]    The above equation shows that there are three pole frequencies and one zero frequency in the loop gain. The first two poles are at DC, and the third pole frequency f P3  is shown as: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       f 
                       
                         P 
                          
                         
                             
                         
                          
                         3 
                       
                     
                     = 
                     
                       1 
                       
                         2 
                          
                         π 
                          
                         
                             
                         
                          
                         
                           C 
                           T 
                         
                          
                         
                           R 
                           1 
                         
                       
                     
                   
                   , 
                 
               
               
                 
                   ( 
                   10 
                   ) 
                 
               
             
           
         
       
     
         [0031]    The zero frequency f Z  is shown as: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       f 
                       Z 
                     
                     = 
                     
                       1 
                       
                         2 
                          
                         π 
                          
                         
                             
                         
                          
                         
                           C 
                           1 
                         
                          
                         
                           R 
                           1 
                         
                       
                     
                   
                   , 
                 
               
               
                 
                   ( 
                   11 
                   ) 
                 
               
             
           
         
       
     
         [0032]      FIG. 3   a  show transfer functions of the phase locked loop. The upper part is a gain response in frequency domain. The X-axis is the frequency in log scale and the Y-axis is the magnitude of loop gain G LOOP  in dB unit. The frequency where the magnitude of the loop-gain is equal to 0 dB is called unity gain frequency F u . The lower part of  FIG. 3   a  shows a phase response of the loop gain in frequency domain. The phase difference between phase at unity gain frequency F u  and −180 degrees (shown as P) is called phase margin. 
         [0033]    To design a stable PLL, the phase margin is preferably between 60° and 75°. From  FIG. 3   a,  the phase margin at pole  3  frequency f P3  or zero frequency f Z  is subsequently 45°. In other words, a unity gain would be acquired while the operating frequency of the PLL circuit  200  is higher than zero frequency f Z * 2.5, and lower than the pole  3  frequency F U /2.5. Meanwhile, experiments have taught that the optimal condition would be acquired when the ratio of pole  3  frequency and zero frequency f P3 /f Z  is around 25. It turns out that the unity gain frequency f U  can be denoted as f Z *Y, where Y=2.5˜10. That is, a theoretically stable system can only generate a maximum f U  of at most up to 4 times a minimum f U . 
         [0034]    From previous discussion, zero frequency f Z  is defined by the resistance of the first resistor R 1  and the first capacitor C 1 . It is independent on the reference frequency f ref  or the output clock signal f out . Parameters to determine the unity gain frequency f U  may include: The current charge pump current I CP , the gain K VCO  of the VCO  108 , the capacitances (C 1 +C 2 ) in the LPF  106 , the loop factor M, the Pole  3  frequency f P3 , and the zero frequency f Z . 
         [0035]    The output clock signal f out  in most of system is regulated to be a constant. For example, most of the output clock signal f out  in computer sound card is 24.576 MHz. In this view, the loop gain G LOOP  can be re-written as: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       G 
                       Loop 
                     
                     = 
                     
                       
                         A 
                          
                         
                             
                         
                          
                         β 
                       
                       = 
                       
                         
                           
                             f 
                             ref 
                           
                           
                             f 
                             out 
                           
                         
                         · 
                         
                           
                             
                               I 
                               CP 
                             
                             · 
                             
                               K 
                               VCO 
                             
                           
                           
                             ( 
                             
                               
                                 C 
                                 1 
                               
                               + 
                               
                                 C 
                                 2 
                               
                             
                             ) 
                           
                         
                         · 
                         
                           
                             ( 
                             
                               1 
                               + 
                               
                                 
                                   sC 
                                   1 
                                 
                                  
                                 
                                   R 
                                   1 
                                 
                               
                             
                             ) 
                           
                           
                             
                               s 
                               2 
                             
                              
                             
                               ( 
                               
                                 1 
                                 + 
                                 
                                   
                                     sC 
                                     T 
                                   
                                    
                                   
                                     R 
                                     1 
                                   
                                 
                               
                               ) 
                             
                           
                         
                       
                     
                   
                   , 
                 
               
               
                 
                   ( 
                   12 
                   ) 
                 
               
             
           
         
       
     
         [0036]    Thus, the unity gain frequency f U  of the loop gain is proportional to reference frequency f ref . In real system, the reference frequency f ref  generally ranges from 1 MHz to 66 MHz, however, the frequency range is suggested to be at most 4 (Maximum f U /minimum f U &lt;=4) for stability concern. Therefore, the stability consideration severely restricts the allowable range of the reference frequency f ref . 
         [0037]    The embodiment of  FIG. 2  modifies the charge pump  230  to provide better flexibility, in which a first digital control word N 1  and a second digital control word N 2  are provided to control the first current I UP  and second current I DOWN , respectively. The first DAC  202   u  and second DAC  202   d  may output a multiple of a unity current I X  based on the first digital control word N 1  and second digital control word N 2 . For example, the first current I UP  output from the first DAC  202   u  may be: 
         [0000]        I   up   =N   1   ·I   x    (13)
 
         [0000]        I   down   =N   2   ·I   x    (14)
 
         [0038]    where I X  is a unit current provided by the first DAC  202   u  and second DAC  202   d.  In an example, the first digital control word N 1  and second digital control word N 2  can be selected to be identical to the loop factor M (N 1 =N 2 =M), thereby the magnitudes of the first current I UP  and second current I DOWN  are identical but the directions are inversed. Consequently, the magnitudes of the first current I UP  and second current I DOWN  are proportional to the loop factor M. That is, the charge pump current I CP =M*I X . Therefore the transfer function of the phase detector  102  and the charge pump  230  is rewritten as: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       T 
                        
                       
                           
                       
                        
                       
                         F 
                         102 
                       
                     
                     = 
                     
                       
                         
                           I 
                           CP 
                         
                         
                           
                             Phase 
                              
                             
                               ( 
                               
                                 f 
                                 ref 
                               
                               ) 
                             
                           
                           - 
                           
                             Phase 
                              
                             
                               ( 
                               
                                 f 
                                 back 
                               
                               ) 
                             
                           
                         
                       
                       = 
                       
                         
                           
                             I 
                             CP 
                           
                           
                             2 
                              
                             π 
                           
                         
                         = 
                         
                           
                             M 
                             · 
                             
                               I 
                               X 
                             
                           
                           
                             2 
                              
                             π 
                           
                         
                       
                     
                   
                   , 
                 
               
               
                 
                   ( 
                   15 
                   ) 
                 
               
             
           
         
       
     
         [0039]    and the loop gain is rewritten as: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       
                         
                           G 
                           Loop 
                         
                         = 
                           
                          
                         
                           A 
                            
                           
                               
                           
                            
                           β 
                         
                       
                     
                   
                   
                     
                       
                         = 
                           
                          
                         
                           
                             1 
                             M 
                           
                           · 
                           
                             
                               
                                 MI 
                                 X 
                               
                               · 
                               
                                 K 
                                 VCO 
                               
                             
                             
                               ( 
                               
                                 
                                   C 
                                   1 
                                 
                                 + 
                                 
                                   C 
                                   2 
                                 
                               
                               ) 
                             
                           
                           · 
                           
                             
                               ( 
                               
                                 1 
                                 + 
                                 
                                   
                                     sC 
                                     1 
                                   
                                    
                                   
                                     R 
                                     1 
                                   
                                 
                               
                               ) 
                             
                             
                               
                                 s 
                                 2 
                               
                                
                               
                                 ( 
                                 
                                   1 
                                   + 
                                   
                                     
                                       sC 
                                       T 
                                     
                                      
                                     
                                       R 
                                       1 
                                     
                                   
                                 
                                 ) 
                               
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         = 
                           
                          
                         
                           
                             
                               
                                 I 
                                 X 
                               
                               · 
                               
                                 K 
                                 VCO 
                               
                             
                             
                               ( 
                               
                                 
                                   C 
                                   1 
                                 
                                 + 
                                 
                                   C 
                                   2 
                                 
                               
                               ) 
                             
                           
                           · 
                           
                             
                               ( 
                               
                                 1 
                                 + 
                                 
                                   
                                     sC 
                                     1 
                                   
                                    
                                   
                                     R 
                                     1 
                                   
                                 
                               
                               ) 
                             
                             
                               
                                 s 
                                 2 
                               
                                
                               
                                 ( 
                                 
                                   1 
                                   + 
                                   
                                     
                                       sC 
                                       T 
                                     
                                      
                                     
                                       R 
                                       1 
                                     
                                   
                                 
                                 ) 
                               
                             
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   16 
                   ) 
                 
               
             
           
         
       
     
         [0040]    As shown in equation (16), the dependency of loop factor M is eliminated from the loop gain G LOOP . Thereby, a more flexibly adjustment can be made on the loop factor M without affecting the phase margin. Preferably, the unit current I X  can be selected to acquire a unity gain frequency f U : 
         [0000]        F   U   =√ {square root over (F Z   ·F   P3 )}  (17),
 
         [0041]    and such a configuration allows the PLL circuit  200  to operate with a phase margin of desirable range. 
         [0042]    Through configuration of the first digital control word N 1  and second digital control word N 2 , the consequences caused by loop gain offset can be is compensated. Nevertheless, the first digital control word N 1  and second digital control word N 2  do not need to be identical to the loop factor M. In another embodiment, the first digital control word N 1  and second digital control word N 2  are independently adjusted with a linear or non-linear function of the loop factor M. For example, a non-decreasing linear function such as Y=ax+b (a&gt;0) or Y=ax 2 +bx+c (a&gt;0) can be implemented in the controller  220  to calculate the digital control words N 1  and N 2  by substituting the loop factor M as the x. A stepwise function is also adaptable. For example, when the loop factor M is within a first range, the digital control words N 1  and N 2  are designated to a first value. Meanwhile, when the loop factor is within a second range, the N 1  and N 2  are a second value. The stepwise function is preferably non-decreasing, too. That is, the second range is no less than the first range, while the second value is no less than the first value. 
         [0043]      FIG. 3   b  shows an alternative embodiment of the transfer functions. In the upper part of  FIG. 3   b,  three gain responses TM 1 , TM 2  and TM 3  are presented, each corresponding to a different loop factor M. The desired unity frequencies are therefore fixed on different points, such as f U1 , f U2  and f U3 , respectively. In the lower part of  FIG. 3   b,  various phase responses S 1 , S 2  and S 3  are presented, each characterized with different zero frequencies (i.e. f Z1 , f Z2 , f Z3 ) and pole frequencies (i.e. f P1 , f P2, f   P3 ). The phase responses S 1 , S 2  and S 3  can be characterized by providing different first digital control word N 1  and second digital control word N 2 , thus the of the unity gain frequencies f U1 , f U2  and f U3  can be flexibly supported by appropriately selected phase margins, such as the phase margins counted from the points P 1 , P 2  and P 3 . 
         [0044]    Since the transfer function of the PLL circuit  200  can be compensated to avoid loop gain deviation, the reference frequency f ref  can be provided with a wider range than the prior arts. 
         [0045]    While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.