Abstract:
An operational amplifier has a bias circuit, a differential amplifier, an output stage, and a feed forward circuit. The bias circuit provides a reference. The differential amplifier is coupled to a pair of input terminals and provides a differential output based on the first and second inputs. The output stage responds to the reference and to the differential output so as to supply a current to an output terminal. The feed forward circuit responds to the differential output in order to increase and decrease current to the output terminal. As a result, the feed forward circuit extends the dynamic range of the operational amplifier.

Description:
TECHNICAL FIELD OF THE INVENTION  
         [0001]    The present invention relates to an operational amplifier and, more particularly, to an operational amplifier having a wide dynamic range.  
         BACKGROUND OF THE INVENTION  
         [0002]    Operational amplifiers have long been used as comparators, audio amplifiers, filters, etc. An operational amplifier is basically a differential amplifier that amplifies the difference between two inputs. One input has a positive effect on the output signal of the amplifier, and the other input has a negative effect on the output signal. Both inputs act on the output signal simultaneously, and the output signal is the sum of both inputs. Accordingly, if both inputs are equal, then the output signal is ideally zero.  
           [0003]    An electronic system incorporating an operational amplifier is frequently required to operate with a large dynamic range. Typically, this requirement means that the electronic system must be able to function properly with signal levels ranging from a very small signal level to a very large signal level. In order for the electronic system to operate well when the signal level is small, the electronic system must introduce very little electronic noise. On the other hand, in order to handle large signals, the electronic system must behave in a very linear manner so as not to introduce any distortion into its output signal.  
           [0004]    The present invention is directed to an operational amplifier with a wide dynamic range. Because operational amplifiers are used in a wide variety of electronic systems, the operational amplifier of the present invention is useful in many applications.  
         SUMMARY OF THE INVENTION  
         [0005]    In accordance with one aspect of the present invention, an operational amplifier comprises a bias circuit, an input stage, an output stage, and a feed forward circuit. The bias circuit provides a reference. The input stage includes a differential amplifier and is coupled to a pair of input terminals so as to provide an output signal on a differential amplifier output. The output stage is coupled to the reference, to the differential amplifier output, and to an output terminal. The feed forward circuit is coupled to the differential amplifier output and to the output stage so as to extend the dynamic range of the operational amplifier.  
           [0006]    In accordance with another aspect of the present invention, an operational amplifier comprises a differential amplifier, an output stage, and a feed forward circuit. The differential amplifier is coupled to a pair of input terminals and provides an output signal on a differential amplifier output. The output stage has a first active control element coupled between the differential amplifier output and an output terminal, and has a second active control element coupled between a reference and the output terminal. The feed forward circuit is coupled between the differential amplifier output and the second active control element so as to control increasing and decreasing of current to the output terminal in response to the output signal on the differential amplifier output.  
           [0007]    In accordance with yet another aspect of the present invention, a method of supplying a differential output based upon first and second inputs comprises the following: supplying a reference bias to a first control element of an output stage of an operational amplifier; amplifying a difference between the first and second inputs so as to provide an output signal; controlling a second control element of the output stage in accordance with the output signal so as to control a current to an output terminal; and, adjusting the reference bias in accordance with the output signal in a feed forward manner so as to increase and decrease the current to the output terminal. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWING  
       [0008]    These and other features and advantages will become more apparent from a detailed consideration of the invention when taken in conjunction with the drawings in which:  
         [0009]    [0009]FIG. 1 illustrates a standard two-stage operational amplifier;  
         [0010]    [0010]FIG. 2 illustrates the two-stage operational amplifier of FIG. 1 incorporating a current mirror;  
         [0011]    [0011]FIG. 3 illustrates the two-stage operational amplifier of FIG. 2 modified so as to include a feed forward circuit; and,  
         [0012]    [0012]FIG. 4 illustrates the two-stage operational amplifier of FIG. 3 incorporating input bias cancellation. 
     
    
     DETAILED DESCRIPTION  
       [0013]    An operational amplifier  10  as shown in FIG. 1 is a standard two-stage operational amplifier and includes a bias circuit  12 , an input stage  14 , and an output stage  16 . The bias circuit  12  includes a p-channel transistor  18  and two n-channel transistors  20  and  22 . The drain and gate regions of the n-channel transistor  20  are coupled together and to a source  24  through a resistor  26 . The gate and drain regions of the p-channel transistor  18  are coupled together and to the drain region of the n-channel transistor  22  whose gate region is coupled to the gate and drain regions of the n-channel transistor  20 . The bias circuit  12  creates a reference voltage on a reference line  28  for the output stage  16 .  
         [0014]    The input stage  14  includes three p-channel transistors  32 ,  34 , and  36  and two n-channel transistors  40  and  42 . The gate region of the p-channel transistor  32  is coupled to the reference line  28 , and the drain region of the p-channel transistor  32  is coupled to the source regions of the p-channel transistors  34  and  36 . The gate region of the p-channel transistor  34  is coupled to a first input terminal  44  of the operational amplifier  10 , and the gate region of the p-channel transistor  36  is coupled to a second input terminal  46  of the operational amplifier  10 . The gate and drain regions of the n-channel transistor  40  are coupled together, to the drain region of the p-channel transistor  34 , and to the gate region of the n-channel transistor  42 . The drain region of the p-channel transistor  36  is coupled to the drain region of the n-channel transistor  42 . The two p-channel transistors  34  and  36  form a differential amplifier having an amplifier output  48 . Accordingly, the two p-channel transistors  34  and  36  form a difference between the signals on the first and second input terminals  44  and  46  and supplies this difference as a signal to the amplifier output  48 .  
         [0015]    The output stage  16  includes a p-channel transistor  50  and an n-channel transistor  52 . The gate region of the p-channel transistor  50  is coupled to the reference line  28 , and the drain region of the p-channel transistor  50  is coupled to an output terminal  54  of the operational amplifier  10 . The gate region of the n-channel transistor  52  is coupled to the amplifier output  48 , and the drain region of the n-channel transistor  52  is coupled to the output terminal  54 . A resistor  56  and a capacitor  58  are coupled in series between the amplifier output  48  and the output terminal  54 . The p-channel transistor  50  acts as an active load, and the n-channel transistor  52  is an amplifier for the signal on the amplifier output  48 . The resistor  56  and the capacitor  58  are used to set the gain and phase performance of the operational amplifier  10 .  
         [0016]    An operational amplifier  60  is shown in FIG. 2 and is similar to the operational amplifier  10  shown in FIG. 1, differing only by the addition of a current mirror  62 . Accordingly, the same reference numerals are used in both FIGS. 1 and 2 to depict the same elements and to better illustrate the similarities, and highlight the differences, between the operational amplifier  10  and the operational amplifier  60 .  
         [0017]    The current mirror  62  includes two p-channel transistors  64  and  66  and two n-channel transistors  68  and  70 . The gate region of the p-channel transistor  64  is coupled to the reference line  28 , and the drain region of the p-channel transistor  64  is coupled to the gate and drain regions of the n-channel transistor  68 . The gate and drain regions of the p-channel transistor  66  are coupled together and to the drain region of the n-channel transistor  70  whose gate region is coupled to the gate and drain regions of the n-channel transistor  68 . The gate and drain regions of the p-channel transistor  66  are also coupled to the gate region of the p-channel transistor  50 .  
         [0018]    The current mirror  62  converts the voltage reference provided by the bias circuit  12  on the reference line  28  to a current. This current is mirrored and is used to create another reference voltage for the p-channel transistor  50  of the output stage  16 .  
         [0019]    An operational amplifier  80  is shown in FIG. 3 and is the same as the operational amplifier  60  shown in FIG. 2 except for the addition of a p-channel transistor  82  and an n-channel transistor  84  that converts the current mirror  62  into a feed forward circuit  86 . Accordingly, the same reference numerals are used in both FIGS. 2 and 3 to depict the same elements and to better illustrate the similarities, and highlight the differences, between the operational amplifier  60  and the operational amplifier  80 .  
         [0020]    The gate region of the p-channel transistor  82  and the gate region of the n-channel transistor  84  are coupled together, to the amplifier output  48  (i.e., the output of the differential amplifier formed by the p-channel transistors  34  and  36 ), and to the gate of the n-channel transistor  52 . The drain region of the p-channel transistor  82  and the drain region of the n-channel transistor  84  are coupled together, to drain region of the p-channel transistor  64 , to the gate and drain regions of the n-channel transistor  68 , and to the gate region of the n-channel transistor  70 . The feed forward circuit  86 , therefore, comprises the p-channel transistors  64 ,  66 , and  82  and the n-channel transistors  68 ,  70 , and  84 . In addition, a capacitor  88  is coupled between the gate and drain regions of the p-channel transistor  50  of the output stage  16  in order to provide compensation so as to preserve the gain and phase performance of the operational amplifier  80 .  
         [0021]    The feed forward circuit  86  monitors the output on the amplifier output  48  of the input stage  14  and dynamically changes the bias current supplied by the p-channel transistor  50  of the output stage  16  to the output terminal  54 . Thus, when the output of the input stage  14  is high, the feed forward circuit  86  decreases the bias current in the output stage  16 , thereby reducing the current supplied by the p-channel transistor  50 . On the other hand, when the output of the input stage  14  is low, the feed forward circuit  86  increases the current in the p-channel transistor  50 , making more current available to source an external load coupled to the output terminal  54 . The overall effect of this operation is to significantly improve the distortion performance of the operational amplifier  80  in a manner that negligibly decreases its noise performance.  
         [0022]    An operational amplifier  100  is shown in FIG. 4 and is the same as the operational amplifier  80  shown in FIG. 3 except for the addition of an input bias cancellation circuit  102  comprising a p-channel transistor  104 , four n-channel transistors  106 ,  108 ,  110 , and  112 , and a lateral PNP (LPNP) transistor  114 . In addition, the p-channel transistors  34  and  36  have been replaced by corresponding LPNP transistors  34   a  and  36   a  in order to lower flicker noise in the operational amplifier  100 . Otherwise, the same reference numerals are used in both FIGS. 3 and 4 to depict the same elements and to better illustrate the similarities, and highlight the differences, between the operational amplifier  80  and the operational amplifier  100 .  
         [0023]    The gate region of the p-channel transistor  104  is coupled to the reference line  28 , and the drain region of the p-channel transistor  104  is coupled to the emitter of the LPNP transistor  114 . The collector of the LPNP transistor  114  is coupled to the gate and drain regions of the n-channel transistor  108 . The gate and drain regions of the n-channel transistor  106  are coupled together, and to the gate regions of the n-channel transistors  110  and  112 . The drain region of the n-channel transistor  110  is coupled to the first input terminal  44 , and the drain region of the n-channel transistor  112  is coupled to the second input terminal  46 .  
         [0024]    The input bias cancellation circuit  102  is provided to cancel the base current of the LPNP transistors  34   a  and  36   a  in a manner which tracks process variations in the Beta parameter of the LPNP transistors, while not adding substantial noise.  
         [0025]    Accordingly, the operational amplifiers  80  and  100  minimize the noise that is typically introduced by operational amplifiers and at the same time the operational amplifiers  80  and  100  minimize distortion. The feed forward circuit  86  of the operational amplifiers  80  and  100  makes more current available at the output terminal  54  when more current is required for the load, and reduces current from the output terminal  54  when less current is required for the load. The resistor  56  and the capacitor  58  maintain an acceptable AC response and ensure stable amplifier operation.  
         [0026]    Certain modifications and/or alternatives of the present invention have been discussed above. Other modifications and/or alternatives will occur to those practicing in the art of the present invention. For example, specific types of transistors have been described above for the bias circuit  12 , the input stage  14 , the output stage  16 , the feed forward circuit  86 , and the input bias cancellation circuit  102 . However, other types of transistors or other active devices can be used for the bias circuit  12 , the input stage  14 , the output stage  16 , the feed forward circuit  86 , and/or the input bias cancellation circuit  102 .  
         [0027]    Moreover, fewer or more stages and/or circuits and/or elements than those described herein may be used for the present invention. Therefore, if a claim recites fewer stages and/or circuits and/or elements than those shown in the drawings and described above, such claim should not be interpreted as including any omitted stage, circuit, and/or element.  
         [0028]    Accordingly, the description of the present invention is to be construed as illustrative only and is for the purpose of teaching those skilled in the art the best mode of carrying out the invention. The details may be varied substantially without departing from the spirit of the invention, and the exclusive use of all modifications which are within the scope of the appended claims is reserved.