Abstract:
Apparatus for accurately determining the width of a traveling document in which respective groups of LEDs are disposed along a line extending transversely of the path of document travel inwardly from points spaced by a distance greater than the maximum document width. The groups of LEDs and respective strip photodiodes associated therewith are disposed on opposite sides of the path so that a document travelling along the path partially blocks respective LEDs of said groups. The LEDs are sequentially energized one by one from one end of the group to the other. The completely unblocked energized LEDs are counted and the percent blocked of the partially blocked LED is determined to permit an accurate width measurement to be calculated.

Description:
This is a continuation of copending application Ser. No. 07/676,188, filed on Mar. 27, 1991, now abandoned. 
    
    
     FIELD OF THE INVENTION 
     The invention is in the field of width detector more particularly, it relates to a currency note width detector for measuring the dimension of a currency note in a direction transverse to the direction of travel thereof. 
     BACKGROUND OF THE INVENTION 
     Many systems are known in the prior art for testing currency notes to determine the genuineness thereof and to discriminate between notes of different denominations. Most of these devices involve reading indicia printed on a face of the note and comparing it with stored data. Some of the devices involve a rough measurement of a dimension of the note in the direction of travel thereof through the device. 
     A few devices of the prior art make a determination of the dimension of a note in a direction transverse to the direction of travel thereof. For example, Pauli et al U.S. Pat. No. 4,435,834 discloses an arrangement in which the note passes through the space between an illuminating means and a row of photodiodes. The number of darkened photodiodes is counted and divided by the number of diodes per unit width to obtain a measure of width which is compared with maximum and minimum values. 
     Favre U.S. Pat. No. 4,298,807 discloses an arrangement in which the document passes by an array of sixty photodiodes corresponding to the maximum width of the document to be inspected. These photodiodes are arranged in groups of four for analog multiplexing. The outputs of the multiplexing circuit are applied to analog to digital converters and averaging circuits and to a common comparator circuit to give information as to the dimension of a note. 
     While the systems just described afford a rough indication of the width of a document being inspected, the measurement afforded thereby is not as accurate as is desirable in many instances. For example, in certain countries respective denominations of currency are differentiated by width. Known systems do not afford as accurate a width measurement as is necessary effectively to discriminate between notes of different denominations. 
     SUMMARY OF THE INVENTION 
     One object of our invention is to provide a device for measuring the width of a document such as a currency note. 
     Another object of our invention is to provide a currency note width measuring device which is more accurate than are similar devices of the prior art. 
     Still another object of our invention is to provide a currency note width detecting device which is certain in operation. 
     A further object of our invention is to provide a currency note width measuring device which is simple in construction and operation for the results achieved thereby. 
     Other and further objects of our invention will appear from the following description. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     In the accompanying drawings to which reference is made in the instant specification and which are to be read in conjunction therewith and in which like reference characters are used to indicate like parts in the various views: 
     FIG. 1 is a schematic view of our currency note detecting device illustrating the geometry thereof. 
     FIG. 2 is a fragmentary view of the device illustrated in FIG. 1 drawn on an enlarged scale. 
     FIG. 3 is a schematic view of the circuitry of our currency note width measuring device. 
     FIG. 4 is a flowchart illustrating the initial portion of the operation of the calibration system of our currency note width detector. 
     FIG. 5 is a flowchart illustrating a further portion of the operation of the calibration system of our currency note width detector. 
     FIG. 6 is a flowchart illustrating the final portion of the operation of the calibration system of our currency note width detector. 
     FIG. 7 is a flowchart illustrating a first stage in the operation of our currency note width detector. 
     FIG. 8 is a flowchart illustrating a second stage in the operation of our currency note width detector. 
     FIG. 9 is a flowchart illustrating a third stage in the operation of our currency note width detector. 
     FIG. 10 is a flowchart illustrating the overall operation of our currency note width detector. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring now to FIG. 1, our improved currency note width measuring device may be used with any type of sheet handling device known to the prior art. For example, Pat. No. 4,474,365 shows such an apparatus which includes a pair of feed rolls 12 and 14 mounted in spaced relationship on a shaft 16. As is known in the art, feed rolls 12 and 14 and associated strippers (not shown) are adapted to remove currency notes one by one from the bottom of a supply of notes. Notes removed from the supply by the feed rolls 12 and 14 are advanced toward the nip between a pair of accelerating rolls 18 and 20, one of which is rotatably supported on the shaft 16 by means of a bearing 22. Further as is known in the prior art, notes picked out of the supply by the feed rolls 12 and 14 and advanced by the accelerating rolls 18 and 20 are moved to a delivery location. In the course of this movement a pair of LEDs 24 and 26 and associated photodiodes 28 and 30 detect the presence of a note in the feed path. 
     Our width measuring system includes a first or left-hand array indicated generally by the reference character 32 of sixteen LEDs 34a to 34p. A strip photodiode 36 of a type known in the art spans the left-hand array 32 of LEDs. As will be explained more fully hereinbelow, a left-hand four-to-sixteen line decoder 38 of a type known in the art responds to a binary coded input 40 sequentially to connect the LEDs 34a to 34p between a source 42 of potential and ground 44 through conductors 35a to 35p to illuminate the same. 
     We provide our system with a right-hand array indicated generally by the reference character 46 of LEDs 48a to 48p associated with a strip photodiode 50 which spans the array 46. A right-hand four-to-sixteen line decoder 52 responds to binary coded input 54 to connect the LEDs 48a through 48p sequentially from outermost to innermost between a source 56 and ground 58 through conductors 49a to 49p. 
     Referring now to FIG. 2, we have shown an idealized form of our device in which adjacent LEDs such as 48e, 48f and 48g illuminate contiguous areas of the associated photodiode 50. It will readily be appreciated that in practice some overlapping of the adjacent illuminated areas takes place which must be compensated for in the course of the calculations described hereinbelow. 
     Referring now to FIG. 3, our width measuring system includes an interface 60 which may, for example, be a Z84C2 having control input terminals B/A, C/D, CE, M1, IORQ, and RD, which receive control input signals from a CPU 61 which may be a Z80 to respective lines 62, 64, 66, 68, 70 and 72 and a CLK input on line 74 by means of a control bus 63. In operation of the system component 60 puts out the line decoder input signals 40 and 54. 
     We connect the photodiode 36 across the input terminals of an operational amplifier 78. In so doing we connect a parallel RC circuit 76 between one terminal of the diode and the associated terminal of the operational amplifier 78 to compensate for the phase lag introduced by the capacitance of the strip photodiode 36. We apply the output of operational amplifier 78 to a buffer amplifier 80, the output of which is applied to one terminal of a comparator 82. A reference voltage at terminal 84 is connected to the other terminal of the comparator 82. 
     Our system first produces left and right digital signals indicating respectively the number of energized completely unblocked LEDs 34 and the number of energized completely unblocked LEDs 48. When that has been done, left and right analog signals are produced indicating respectively the percentage unblocked of the partially blocked LED34 and the percentage unblocked of the partially blocked LED48. 
     As will be apparent from the description hereinbelow, we set the gain of the operational amplifier 78 to provide a predetermined voltage of, for example, five volts when any energized LED is completely uncovered. We further so select the reference voltage at 84 that the comparator 82 produces an output signal when the voltage of amplifier 78 drops below, for example, 4.5 volts indicating that the LED which has been energized is partially blocked. When this occurs, comparator 82 puts out a signal WID DOC L on line 86. In response to this signal, component 60 stops and holds the input to decoder 38 so that the next inboard LED34 of array 32 is not illuminated. 
     We connect the strip photodiode 50 across the terminals of an operational amplifier 98. A phase compensating network 96 accounts for the phase lag introduced by the strip photodiode. A buffer amplifier 100 applies the output of amplifier 98 to one terminal of a comparator 102, the other terminal of which is connected to the source 84 of reference potential by a conductor 104. As was the case with the left LED, when the energized right LED 48 is not completely blocked, the output of amplifier 98 drops below a predetermined value to cause comparator 102 to put out a WID DOC R signal on line 106. In response thereto, the component 60 inhibits further energization of LEDs in the right-hand array and holds the current address on output 54. 
     As known in the art, the strip photodiodes 36 and 50 are linear devices. Consequently, the output of the converter 92 represents the percentage of the area illuminated by that energized light emitting diode which is partially blocked by the edge of the note. This will readily be appreciated from the showing of FIG. 2 in which the areas of the strip photodiode 50 which are illuminated by the respective LEDs 48 are bounded by the dot-dash lines. As is shown therein, a note partially blocks the LED 48f. If this is the energized LED the corresponding output of ADC 92 will indicate the percentage of the area which is not blocked by the edge of the note N. In FIG. 2 the blocked area is indicated by the shading below the note. 
     After the left and right digital signals have been produced, component 60 provides a LEFT SEL signal on line 88. This signal closes a switch 90 to couple the output of the buffer 80 to the input of an analog to digital converter 92 which may be an ADC0804. In response thereto, the converter 92 provides a digital output signal on a data bus 94 connected to the CPU 61. 
     Next, component 60 puts out a RIGHT SEL signal on conductor 108 to close switch 110 to apply the output of buffer 100 to the ADC 92. 
     As has been explained hereinabove, the LEDs 34 and 48 of each of the arrays 32 and 46 are sequentially energized from the outermost to the innermost until a partially blocked LED is encountered, at which time no further LEDs are energized. In arriving at our width measurement, we count the number of energized, completely unblocked LEDs. 
     The system is provided with means for controlling the gain of the amplifiers 78 and 98 in such a way as to compensate for any differences in illumination intensity provided by the LEDs 34 and 48 of the two groups, 32 and 46. A digital to analog converter 136 receives its control inputs from the CPU control bus 63 on lines 138, 140 and 142. Bus 94 provides the data inputs to component 136. When one of the LEDs 34 is energized, DAC 136 provides a signal on line 144 to regulate the gain of amplifier 78. 
     More specifically, in our arrangement for compensating for any differences in illumination intensity provided by the LEDs 34 and 48 of the two groups 32 and 46, the current through each LED and the light emitted by each LED stays the same. However, the gain of the associated amplifier is so controlled that no matter which LED is energized, the particular strip photodiode amplifier 78 or 98 puts out 5 volts with no document present. The gains required to produce this result are stored in tables in the microprocessor 61. Then, when a particular LED is turned on, the microprocessor causes the gain of the associated photodiode amplifier to be such as will produce the desired 5 volt output in the absence of a document. 
     Referring now to FIGS. 4 to 6, the flowcharts shown therein illustrate our system for calibrating the width detector so that no matter which LED is energized, the amplifier associated with the corresponding linear photodiode will, in the absence of a document, always produce the same output voltage. Starting at 220, the system is initialized at 222 and the left side control is selected at 224. At this point a register of the Z80 microprocessor 61 is set as the left calibration table. The D register carries the gain count and the E register carries the LED count which, at this point, is equal to 1. The D register is set at the minimum gain at 228, the current LED in E is turned on and the gain is set to D at 230. The LED state is checked at 232 and a determination is made at 234 of whether or not the LED is blocked. If so, an analog to digital conversion is initiated at 236 and the data is read into memory at 238. A check is made at 240 to determine whether or not the analog to digital value is less than the maximum allowable voltage. If not, the system proceeds to &#34;1&#34; in FIG. 5. 
     If it is determined at 234 that the LED is not blocked, the gain representation in register D is increased by one count at 242 and the system returns to block 230. By the same token, if the analog to digital value is determined to be less than the maximum voltage at 240, the gain count in register D is increased by 1, as indicated by block 244 and the system returns to 230. 
     If it had been determined at 240 that the analog to digital value was not less than the maximum voltage so that the system proceeded to &#34;1&#34; in FIG. 5, the gain value is saved in the left calibration table as indicated by 246 and the table pointer (HL) is incremented at 248. Next a determination is made at 250 of whether or not the left LED array calibration is complete. If not, register E is incremented to the next LED at 252 and the system returns to &#34;2&#34; of FIG. 4. 
     If a determination has been made at 250 that the left LED calibration is complete, the right side control is selected at 254. Register HL is set to the right calibration table and register E to the LED count which, at this point, is equal to 1, all as indicated at 256. Next, register D, the gain count, is set to the minimum gain as indicated at 258 and LED in register E is turned on and the gain is set to D, as indicated at 260. Next, the LED state is checked at 262 and a determination is made at 264 of whether or not the LED is blocked. If it is, an analog to digital conversion is initiated at 266, the data is read into memory at 268 and the system proceeds to &#34;3&#34; of FIG. 6. 
     If the check at 264 indicates that the LED is not blocked, the gain is increased by one count at 270 and the system returns to block 260. 
     Following a reading of the data into memory at 268 so that the system proceeds to &#34;3&#34; of FIG. 6, a determination is then made at 272 of whether or not the analog to digital value is less than the maximum allowable voltage. If so, the gain count in register D is increased by 1 and the system returns to &#34;4&#34; of FIG. 5. 
     If, at 272, a determination is made that the analog to digital value is not less than the maximum volts, the gain value is saved in the right calibration table at 276. The table pointer (HL) is incremented at 278. Next, a determination is made at 280 of whether or not the right LED array calibration is complete. If not, register E is incremented to the next LED at 282 and the system returns to &#34;5&#34; of FIG. 5. 
     If, at 280, a determination is made that the right LED calibration is complete, all LEDs are turned off at 284, gains are minimized for circuit protection at 286, and the system is restored at 288 to EXIT at 290. 
     The operation of our currency note width detector can best be understood by reference to the flow charts of FIGS. 7 to 9. First, the system START is indicated at 120, power is up and the motor (not shown) starts as indicated by block 122. Next, at 124 the LED and strip photodiodes are calibrated as shown in FIGS. 4 to 6. Once a document starts flowing through the system, as indicated at block 126, as soon as it crosses both count sensors made up of LEDs 24 and 26 and photodiodes 28 and 30, the width system is set up for search a indicated at 128. This entails loading the LED gain calibration tables and turning on the outermost left and right LEDs 34a and 48a, as indicated at block 130. 
     When the system has been set up in the manner described, a check is made at 132 to see if the current left LED is blocked. If so, a left digital reading is calculated at 134 and the system proceeds to &#34;1&#34; at FIG. 8. If the current left LED is not blocked, a check is made at 136 to see if the current right LED is blocked. If so, the right digital reading is calculated at 138 and the system again proceeds to &#34;1&#34; at FIG. 8. 
     If the current right LED is not blocked, a check is made at 140 to see if this is the last LED set. If so, at 142 the system shuts down indicating that the width is zero and proceeds to EXIT at 144. If it is not the last LED set, the next innermost LEDS are turned on at 146 and the system returns to the input of 132. 
     The process of FIG. 7 is repeated until, for instance, a left side LED is the first to be blocked. The digital value is calculated at 134 and saved. The process of FIG. 7 is repeated until one side, left or right, is found to be blocked. The digital value is then calculated and saved at 134 for a blocked left LED or at 138 for a blocked right LED. 
     Regardless of which side is found to be blocked first, processing continues from either 134 or 138 in the manner outlined in FIG. 8. 
     The calculations represented by blocks 134 and 138 are performed in the manner outlined in FIG. 8. A determination is made at 148 of whether it is the left or the right side LED which is blocked. If it is a left side LED, the left side position is saved at 150. A check is then made at 152 to determine whether or not the current right LED is blocked. If so, a right digital reading is calculated at 156 and saved. 
     If the current right LED is not blocked, the next right LED is switched on at 154 and the system returns to the input of 152. 
     If, at 148 it has been determined that the right side LED is blocked, this position is saved at 158 and a determination is made at 160 of whether or not the current left LED is blocked. If so, the left digital reading is calculated at 168 and saved. If the current left LED is not blocked, the next left LED is switched on at 162 and the system returns to the input of 160. 
     Referring now to FIG. 9, after the right and left digital readings have been calculated the found left and right LEDs are turned on at 170. A left percent analog reading is taken at 172 and a right analog percent reading is taken at 174. This analog data is saved at 176 and the LEDs are turned off and the width system reset at 178. At this point the sample count is incremented at 180. Next, a determination is made at 182 of whether or not the sample count is equal to or greater than 4. If not, as indicated by block 184, the system returns to get another set of values beginning at block 128. 
     If the sample count is equal to or greater than 4, a width value is calculated at 186 in accordance with the algorithm W i  =2ΣD i  +ΣA i  /128. Where Σ D 1  is the sum of the left and right digital values and dividing Σ A 1  (the sum of left and right analog values) by 128 provides a decimal value which can be added to Σ D i  to give the width value W i . The resultant value is compensated for skew at 188, the actual width W is saved, and the system proceeds to EXIT at 190. 
     In the foregoing description, the readings indicated in blocks 172 and 174 are inverted so that a lighter document has a smaller reading. 
     The algorithm of block 186 fits the width data in order to provide the best approximation to the true document width. 
     Skew compensation in block 188 may be accomplished in any suitable manner known to the art, such for example as that shown and described in Pat. No. 4,944,505 issued Jul. 31, 1990 to William Sherman III, the disclosure of which is incorporated herein by reference. Skew compensation subtracts an offset based on the skew angle φ such that W=W 1  cos of φ. 
     Referring now to FIG. 10, in the overall operation of the system starting at 192, four samples of width data are fit and compensated for skew, resulting in W, as indicated at 194. Next, an adaptive check is performed at 196 to compare the measurement of the bill which has just undergone scrutiny with a number of stored values. Following that check, a determination is made at 198 of whether or not W is less than (W avg  -8). The tolerance value of 8 is a variable which can be adjusted depending on desired sensitivity. The value of 8 could possibly be altered to read &#34;Error Threshold &#34;. If this is true, as indicated at 200, a width error has occurred. The status flag is set at 202 and the unit stops. The system exits at 204. The number 8 provides an arbitrary window of acceptability. 
     If there is no error, the width average buffer is set up at 206 and a check is made at 208 of whether or not it is the first note. If it is not, the current width measurement is added into the buffer 210 to produce an average at 212 and the system exits at 214. If it had been the first note, the average is indicated at 216 and the system exits at 218. 
     While we have described our invention in terms of counting the number of energized, completely unblocked LEDs and obtaining a percentage by which a partially blocked LED is unblocked, it will readily be appreciated that we could as well count the number of fully blocked LEDs and obtain a percentage by which a partially blocked LED is blocked. 
     It will be seen that we have accomplished the objects of our invention. We have provided a device for measuring the width of a document, such as a currency note. Our device is more accurate than are similar devices of the prior art. It is certain in operation. It is simple in construction and operation for the results achieved thereby. 
     It will be understood that certain features and subcombinations are of utility and may be employed without reference to other features and subcombinations. This is contemplated by and is within the scope of our claims. It is further obvious that various changes may be made in details within the scope of our claims without departing from the spirit of our invention. It is, therefore, to be understood that our invention is not to be limited to the specific details shown and described.