Abstract:
A method and apparatus of connecting an active computing device ( 15 ) to an active peripheral option ( 20 ) comprising the steps of making a physical connection ( 210 ) between the device ( 15 ) and the option ( 20 ) wherein the option ( 20 ) is communicably linked ( 44 ) to one or more peripheral devices ( 35, 40 ). A system interrupt signal is generated ( 240 ) and detected ( 250 ) by the system processor ( 17 ) causing all activity along the connection path between the device ( 15 ) and the option ( 20 ) to be suspended ( 250 ).

Description:
TECHNICAL FIELD  
         [0001]    The present invention relates in general to a method and device for connecting computing devices and in particular to a method of interfacing two functionally active devices without first requiring a power down cycle of either device.  
         BACKGROUND OF THE INVENTION  
         [0002]    Without limiting the scope of the invention, its background is described in connection with a portable computer system coupled to an expansion base unit for operably linking one or more external peripheral devices to the portable computer system.  
           [0003]    The increased demand for portable computer systems, such as laptop and notebook computers, has resulted in a proliferation of peripheral devices and external options designed to increase the functionality and convenience of the portable computer. One such option is commonly referred to as the expansion base or “docking” unit.  
           [0004]    In essence, a portable computer system is coupled (“docked”) to the docking unit via a connector which consists of pins forming signal paths from the computer to the docking unit. The docking unit, in turn, houses one or more peripheral devices which are communicably linked to the portable computer&#39;s microprocessor and other subsystems via the connector. The devices may include peripherals such as a harddisk drive, sound card, video card and others. In this way, a portable computer user can have both the functionality of a desktop computer and the portability of a notebook system.  
           [0005]    Many desktop and portable computer systems run internal system configuration and diagnostic programs during the power up stage. Sometimes referred to as the Power-On-Self-Tests (“POST)”, these internal program routines are used to verify the functionality of the computer&#39;s subsystems such as the microprocessor, keyboard controller, memory systems, I/O ports, attached peripheral devices and others.  
           [0006]    Some prior arts docking systems require that both the portable computer and expansion base unit be nonactive (power OFF) during the docking process. Still other prior art systems permit the expansion base to be ON but require the portable computer system power to be OFF. In this way the portable system internal configuration setup system (such as POST) can update the system Basic Input Output System (“BIOS”) by determining what devices are available via the expansion base unit and making the appropriate port assignments and interrupt signal designations.  
           [0007]    Yet another aspect of known prior art systems is the use of dedicated buffers on the expansion base connector to maintain the expansion bus in a “dead” nonoperative state and thus effectively disconnect the portable computer processor from the expansion base peripheral devices during docking. With known prior art systems power is applied to the portable system only after it has been connected to the expansion base unit. Moreover, the use of dedicated buffers increase the amount of real estate on the system printed circuit board and increase overall system cost.  
         SUMMARY OF THE INVENTION  
         [0008]    It is herein recognized that a need exists for a method or device to connect the portable system to the expansion base unit that did not require the portable system power to be turned OFF and the use of dedicated buffers on the expansion base connector. The connect and disconnect of an “active” operational portable computer system to and from an “active” expansion base unit (sometimes referred to as “hot docking”) presents several difficulties. First, the risk of device latch up, which often leads to a peripheral device, processor or both, “freezing up” and ceasing operation is present. Device latch up occurs when a device pulls excessive current through the expansion base connector due to sudden and unexpected signals and power levels. While latch up may destroy or damage a device, the use of protection circuitry in most modern day component can protect the device but still render it inoperable until the user cycles power by turning the system OFF and then ON.  
           [0009]    Other known problems with interfacing an active portable to an active expansion base unit are signal glitching and cycle corruption. Timing differences between the signals appearing at the output of the expansion base connector and the input of the device interface contribute to such signal problems.  
           [0010]    Moreover, the physical contact at the expansion base connector may cause signal breaks which are interpreted as false conditions by the system processor. The end result may be an incorrect command sent to the system controller, loss data segments, process interrupt sequences, loss of video or system memory, slow system performance or system freeze as well as other faulty conditions.  
           [0011]    Accordingly, it is one object of the present invention to provide a method and device of interfacing active device components without effecting overall system performance or function. This is accomplished by generating a connect or disconnect interrupt signal which is intercepted by the system processor to cause system activity to be suspended during for a period of time while the connection is completed.  
           [0012]    Another object of the present invention is to provide a method and device of interfacing operative devices that accounts for differences in device power states. A power state defines a device&#39;s power-on/power-off status at the time of connection or disconnection. In this regard, the invention enables nonintrusive connect and disconnect in all possible power state configurations.  
           [0013]    Yet another object of the present invention is to provide a device interface method and device that determines the status of a device connection. Dedicated signals on the expansion base connector are used to determine if a docking or undocking event is about to occur. A set of contacts on the expansion base unit generates an interrupt to the portable computer system processor when docking is occurring which suspends activity for a predetermined period of time enabling signal synchronization between the portable system processor and the expansion base unit. Device latch up is avoided by using make-first break-last type contacts at the expansion base unit interface ensuring that a complete connection is made for power prior to signal mating.  
           [0014]    Still another object of the present invention is to provide a method of disconnecting operable devices that minimizes device freeze up during undocking of the portable computer system from the expansion base unit. A lever maintained on the expansion base platform actuates the undocking procedure and initiates an interrupt to the processor. All outstanding commands and system requests are terminated prior to the physical disconnect from the expansion base unit.  
           [0015]    The expansion base unit is programmed to power-down peripherals maintaining them in a dormant state until subsequent docking. The portable computer Basis Input/Output System (“BIOS”) communicates with each active device via the Peripheral Component Interface (“PCI”) and reconfigures each device as part of the interface process in order to set each peripheral in its native power-up operational mode.  
           [0016]    Disclosed is a method and device of connecting an active computing device to an active peripheral option comprising the steps of making a physical connection between the device and the option wherein the option is communicably linked to one or more peripheral devices. A system interrupt signal is generated to suspend all activity along the signal path between the device and the option.  
           [0017]    For a more complete understanding of the present invention, including its features and advantages, reference is now made to the following detailed description, taken in conjunction with the accompanying drawings.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0018]    In the drawings:  
         [0019]    [0019]FIG. 1 is a sketch diagram of a portable computer coupled to an expansion base unit;  
         [0020]    [0020]FIG. 2 is a detailed schematic diagram illustrating the expansion base connector interface in accordance with the preferred embodiment of the invention;  
         [0021]    [0021]FIG. 3 is flow diagram illustrating the docking process in accordance with the preferred embodiment of the invention; and  
         [0022]    [0022]FIG. 4 is flow diagram illustrating the undocking process in accordance with the preferred embodiment of the invention.  
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT  
       [0023]    In reference to FIG. 1, an expansion base configuration  10  of a portable computer system  15  and expansion base unit  20  is shown. The portable computer system  15  fits in the docking bay  27  areas of the expansion base unit  20 . Expansion base unit  20  illustrates one of the available docking stations on the market today having one or more expansion slots for holding one or more peripheral devices  35  and  40  such as a hard disk drive, sound card, CD drive and other peripheral devices. A display means  45  may be externally coupled to the expansion base unit  20  at connector  42 .  
         [0024]    In one embodiment, devices  35  and  40  communicate with components in the portable computer system  15  using the Peripheral Component Interface (“PCI”) standard along the PCI bus  22 . In this configuration, processor  17  is the master PCI device on PCI bus  22 . The physical level interface between portable computer  15  and expansion base unit  20  is achieved by joining expansion male connect  25  with expansion female connect  30 .  
         [0025]    System processor  17  communicates with devices  35  and  40  in expansion base unit  20  via PCI bus  22  using the PCI protocol (as originally proposed by the Intel Technical Forum in December 1991 including subsequent revisions). A host bridge  19  within portable computer  15  is the interface between processor  17  and PCI bus  22 . PCI bus  22  has a signal pathway (at least 47 pins for a PCI target device and  49  pins for a PCI master) to devices  35  and  40  in expansion base unit  20  via male connect  25  and female connect  30 .  
         [0026]    It should be understood the male connect  25  and female connect  30  are joined to form the expansion base connector to expansion base unit  20  having a plurality of signal pathways for transmission of data and power signals between the portable computer system  15  and expansion base unit  20 . In the preferred embodiment,  160  conductive pins are used to form the signal pathways and physical level interface between portable computer system  15  and expansion base unit  20 . In table 1, a pin-by-pin signal designation is shown for one possible arrangement of expansion signals, although other arrangements are possible and within the scope of the invention:  
                                                                                   TABLE 1                           Expansion base connector signal designations            Pin   Signal   Pin   Signal   Pin   Signal   Pin   Signal       #   Name   #   Name   #   Name   #   Name                    1   GND   41   INTA#   81   EXT-SMI   121   BAT       2   TCK   42   INTB#   82   GND   122   VCC       3   TMS   43   INTD#   83   PCICLK   123   GND       4   GND   44   REQ1#   84   GND   124   INTC#       5   MIDITXD   45   GND   85   REQ0#   125   GNT1#       6   MIDIRXD   46   AD(31)   86   GND   126   GNT0#       7   GND   47   AD (29)   87   AD (30)   127   GND       8   ACK64#   48   GND   88   AD (27)   128   AD (28)       9   REQ64#   49   AD (25)   89   GND   129   AD (26)       10   GND   50   C/BE# (3)   90   AD (24)   130   GND       11   SIRQDAT   51   GND   91   AD (22)   131   AD (23)       12   SDACK   52   AD (20)   92   GND   132   AD (21)       13   GND   53   AD (18)   93   AD (19)   133   GND       14   BAT   54   GND   94   GND   134   AD (17)       15   BAT   55   C/BE# (2)   95   FRAME#   135   AD (16)       16   MICGND   56   IRDY#   96   GND   136   GND       17   DIN_CLK   57   GND   97   DEVSEL#   137   TRDY#       18   KBDDAT   58   PERR#   98   GND   138   STOP#       19   GND   39   SBO#   99   SDONE   139   GND       20   LINGND   60   GND   100   PAR   140   SERR#       21   TRST   61   AD (15)   101   GND   141   C/BE (1)       22   GND   62   AD (13)   102   AD (14)   142   GND       23   TDO   63   GND   103   AD (11)   143   AD (12)       24   TDI   64   AD (09)   104   GND   144   AD (10)       25   GND   65   C/BE# (0)   105   AD (08)   145   GND       26   RST#   66   GND   106   AD (06)   146   AD (07)       27   LOCK#   67   AD (04)   107   GND   147   AD (05)       28   GND   68   AD (02)   108   AD (03)   148   GND       29   Unused   69   GND   109   AD (00)   149   AD (01)       30   SDREQ   70   FCP (01)   110   GND   150   FCP (00)       31   GND   71   FCP (03)   111   FCP (02)   151   GND       32   SMUXSYNC   72   GND   112   FCP (05)   152   FCP (04)       33   BAT   73   FCP (07)   113   GND   153   FCP (06)       34   GND   74   FCESYNC-   114   FCBLANK-   154   GND       35   LMICIN   75   GND   115   VAFC   155   OVRW       36   RMICIN   76   CPUON-   116   GND   156   VINS       37   DIN_DAT   77   PWR_SWOF-   117   FCEVIDEO   157   GND       38   KBDCLK   78   LFLNOUT   118   GND   158   FCVCLK       39   RTLNIN   79   LNOUTGND   119   GND   159   GND       40   LFLNIN   80   RTLNOUT   120   DOCK-   160   VCC                  
 
         [0027]    In the preferred embodiment, a set of Make-First Break-Last (“MFBL”) contacts on the portable computer system  15  side of configuration  10  are used permitting physical contact between male connect  25  and female connect  30  prior to completing the signal circuit pathways.  
         [0028]    Also shown is expansion controller  32  on the expansion base unit  20  side of configuration  10 . Expansion controller  32  is used to control various devices  35 ,  40  including power on and power off, and is communicably linked to female connect  30  for detection of docking and undocking activity with portable computer system  15 .  
         [0029]    In operation, the expansion controller  32  detects the presence of portable computer system  15  when docked in dock bay  27  area of expansion base unit  20 . In this regard, dedicated docking signals on the expansion base connector are sensed by expansion controller  32  when male connect  25  makes physical contact with female connect  30 .  
         [0030]    In the preferred embodiment, expansion base controller  32  is programmed to power up and power down devices  35  and  40  corresponding to docked and undocked conditions, respectively. Expansion base controller  32  remains dormant while not docked in order to conserve power. Likewise, devices  35  and  40  are turned off while not docked to conserve power.  
         [0031]    A docking condition corresponds to male connect  25  making physical contact with female connect  30 . Docking signals on the expansion base connector are detected by the expansion base controller  32  when differences in signals swings are sensed initiating the docking process. Expansion base controller  32 , in turn, powers up devices  35  and  40  within expansion base unit  20  during the docking process.  
         [0032]    Also during docking, the action of the MFBL contacts is sensed by processor  17  as an SMI interrupt signal. The presence of an SMI interrupt signal causes the system processor  17  to suspend or cease any system activity on the bus  22  for a predetermined amount of time. Thus, any outstanding device requests, program instructions or application routines or commands are suspended by processor  17  to provide sufficient amount of time to complete the physical connection between the portable computer system  15  and the expansion base unit  20 . Processor  17  attempts to determine the presence of a docking condition at the expansion base connector. As a master PCI device, processor  17  can maintain control of the PCI bus  22  for any amount of time during the docking process.  
         [0033]    In reference to FIG. 2, the preferred embodiment of the expansion base connector, denoted generally as  100 , is shown. Connector  100  has a physical connector harness  110  which contains pin contacts  120  and  125 . As shown, pin contacts  120  and  125  consist of individual pins numbered 1-40, 41-80, 81-120 and 121-160 for a total of 160 separate signal pathways.  
         [0034]    The signal pathways are collectively designated in signal map  130  wherein each pin is denoted as an expansion signal similar to those shown in Table 1. Among the expansion signals is the power supply signal  140  (VCC), PCI clock signal  140  (PCICLKBS), dock signal  145  (DOCK-) and expansion unit signals  150  and  155  (EXUNIT-, EXUNIT).  
         [0035]    Turning now to FIG. 3, a flow diagram of the docking process  200  is shown. Process  200  begins with a physical contact  210  of the male connect  25  and female connect  30  of the expansion base connector. Contact of the MFBL lines  210  signals the beginning of the process  200  to the expansion base controller  32  and system processor  17 . Hardware in the computer  15  generates the SMI interrupt signal and the processor checks the status of the docking process  230  to determine whether the portable computer  15  is being-docked or undocked. In essence, dedicated signals on the expansion base connector indicate the presence of docking by pulling a pin low or high. The processor then detects the signal state at the expansion base-connector.  
         [0036]    Where docking is occurring, PCI bus activity is suspended  250  for a predetermined amount of time. In one embodiment, PCI bus activity is suspended for 40 msec permitting the completion of the docking process and interface with the expansion base unit  20 . It should be understood that PCI bus  22  activity can be suspended by any amount of time without departing from the true scope and spirit of the invention.  
         [0037]    Once a complete connection is obtained  260 , the expansion base controller  32  performs a device reset  270  wherein all expansion devices are powered up to normal operable conditions. Next, the system processor  17  finds the available PCI devices  280  such as  35  and  40  which are active via the PCI bus  22 . Step  280  is necessary for system configuration purposes in the portable computer system  15  BIOS.  
         [0038]    All devices found on the PCI bus  280  are configured  290  by assigning port and interrupt designations the BIOS registers of the portable computer system  15  memory space. Step  290  place each device into its native operational mode, such as when the device is initially powered-up, to permit communications with the portable computer system  15  using the assignned port and interrupt designations. Process terminates wherein the system resource configuration and system BIOS are reconfigured  300  to reflect the new designations.  
         [0039]    An undock condition  230  proceeds to completing the disconnect  310  between the male connect  25  and the female connect  30 . An undock condition is detected by the expansion base controller  32 , which cause a power down of the expansion base devices  320  in order to conserve power and prepare for future docking. The computer  15  system BIOS and SMI interrupt code suspends the PCI bus activity for a predetermined amount of time. In one embodiment, the PCI dock pin on the expansion base connector is set so the processor can see the MFBL contacts disconnect. BIOS will then re-enumerate the PCI bus and report new system resource condition to the operating system if it can handle dynamic resource definitions or perform a system reboot. Should the system be able to handle dynamic system definitions, the operating system can unload drivers as required.  
         [0040]    The following program listing is one implementation of a routine for handling the system BIOS functions described above: 
         
         
         
         
         
         
         
         
         
         
         
         
         
         
         
         
 
         [0041]    The process  200  for docking active devices such as a portable notebook computer  15  and an expansion option unit  20  has application in four (4) possible case scenarios:  
                                       Possible   Notebook (15)   Option (20)       Case   Power State   Power State                   (1)   OFF   OFF       (2)   OFF   ON       (3)   ON   OFF       (4)   ON   ON                  
 
       Case (1): Notebook OFF/Option OFF  
       [0042]    This configuration presents no problems if it can be assured that the two devices  15 ,  20  are indeed off.  
       Case (2): Notebook OFF/Option ON  
       [0043]    This scenario is of particular interest for expansion base units  20  with automatic style loading mechanisms where the unit  20  power is ON at the time of plugging the two systems  15 ,  20  together. The power to the bus connector  25 ,  30  signals can either be ON or OFF at the time of connector  25 ,  30  engagement.  
         [0044]    With some connector  25 ,  30  types it may take a minimum of 30 milliseconds to engage any signals after the MFBL contact has engaged in the docking station  20 . Thus, in the 30 msec it takes between MFBL engagement and other signal engagement, it is necessary to either turn the power ON in the portable computer system  15  or turn power OFF in the expansion base unit  20 .  
         [0045]    Turning the power ON in the computer  15  takes several hundred milliseconds making it necessary to delay the remainder of the plug operation until it is complete. Thus it is preferable to first turn the expansion base unit  20  OFF, complete the plug sequence and then turn the entire system  15 ,  20  ON together.  
         [0046]    A short delay may be required during the plug sequence to give the power supply time to shut down outputs on the expansion side. This could be provided by slowing the plug operation to cause a longer delay between MFBL and signal engagement.  
       Case (3): Notebook ON/Option OFF  
       [0047]    In this scenario the expansion power to the PCI bus  22  devices at least should be turned ON within the time between MFBL and signal contacts mating (30 ms for example). The expansion base units  20  can initially take power from the portable computer system  15  via the expansion base connector MFBL contacts or assure the power supplies obtain safe levels in this time period.  
       Case (4): Notebook ON/Option ON  
       [0048]    This is the normal and desired form of a hot docking operation between a portable computer system  15  and an expansion base unit  20  with externally powered options. Where an expansion base unit  20  who is partitioning data from the portable computer system  15  output signal  25  to an external video controller via the PCI bus  22  the connection of the two devices  15 ,  20  in their active ON state may be technically challenging.  
         [0049]    For example, plugging address/data lines and parity check lines simultaneously (actually in two staggered rows), is likely to result in data errors. It is necessary to suspend activity or the PCI bus  22  while the plug operation is occurring.  
         [0050]    Since the advent of 386SL and later processors, a System Management Interrupt signal is provided. The processor  17  is therefore programmed to detect a plug/unplug event on the connector  25 ,  30  through a set of MFBL contacts and a single MLBF (make last break first) contact in the connector  25 ,  30 . The system  15  will then have the amount of time required to plug/unplug the connector the distance between the MFBL/MLBF contacts and the nearest row of signal contacts to shutdown the PCI bus  22 . In the preferred embodiment, PCI bus  22  activity is suspended until all operations in the portable computer system are complete (approx. 100 msec). This prevents applications from attempting to communicate with the PCI devices while the PCI bus  22  is being connected or disconnected.  
         [0051]    The time it takes to travel the 0.030 inches between MFBL and the first row of contacts in some connectors ( 25 ,  30 ) is approximately 0.005 msec. Other travel times are also envisioned. In any case, it is estimated that the lever terminates the connection between the portable computer system  15  and the expansion base unit  20  is thrown is approximately 0.3 ms.  
         [0052]    During connection time the portable computer system  15  will travel about 1.5 inches which yields a linear velocity of 0.222 inches per second and a time to travel 0.03 inches of 6.7 msec which we round down to 5 msec. Thus, in the preferred embodiment it is desirable to get a complete shutdown in under 2 msec. Event signaling for plug and unplug operations will depend on the availability of MFBL and MLBF contacts in the connector  25 ,  30 .  
       4(a): MFBL and MLBF Contacts Available  
       [0053]    Dedicated hardware in the notebook ( 15 ) and option ( 20 ) generate interrupts to the processor due to signal status changes on one or more MFBL contacts. The interrupt signal may also on a MFBL contact so the act of connecting can generate the interrupt signal prior to the signal contacts being mated.  
       4(b): No MLBF Contacts Available  
       [0054]    In other embodiments, no MLBF contacts are used and the unplug event will have to be detected through something other than a contact break condition. The expansion base unit ( 20 ) can handle this with the expansion base controller ( 32 ). Normally, this is the device ( 32 ) which performs the undock operation in motorized VCR style docks. For hand plug/unplug options it is only possible if the plug/unplug event is detected through a lever actuated plug/unplug operation or sensing physical proximity to the notebook ( 15 ). Thus a system interrupt signal is generated in sufficient time for the notebook ( 15 ) to handle PCI shutdown prior to any signal contacts unmating.  
         [0055]    An interrupt service routine checks the status of the appropriate dock/undock related signals on the expansion base connector ( 25 ,  30 ) and performs a suspend of any PCI bus ( 22 ) activity until the dock/undock operation is completed. Next, control is passed to the system BIOS in order to have the system resource configuration reconfigured according to the existing device peripherals.  
         [0056]    Reference is now made to FIG. 4 which illustrates, in flow chart form, the undocking process, denoted generally as numeral  350 , in accordance with the preferred embodiment of the invention. A mechanical disconnect, such as a button or lever, on the expansion base unit  20 , is depressed or activated  360  by the user to initiate the undocking process  350  and generates a system interrupt.  
         [0057]    Step  360  permits the system processor  17  to complete current or outstanding processing tasks  370  prior to disconnect from the expansion base unit  20  or peripheral devices  35 ,  40 . In this way, an outstanding request or instruction to peripheral devices  35 ,  40  can be satisfied. In any case, should the user disconnect in a disruptive manner (by extracting the personal computer  15  from the expansion base unit  20  prematurely), individual device drivers will timeout to ensure no system  15  hangup or freeze.  
         [0058]    The undocking process  350  continues to generating a system interrupt signal  380  which is detected by the system processor  17  to inform the portable computer system  15  that an undocking sequence is about to take place. As with docking, the processor  17  can obtain the PCI bus  22  upon interrupt  380  and maintain control for a predetermined amount of time while the physical disconnect is completed.  
         [0059]    In the preferred embodiment, the physical disconnect consists of first breaking the signal contacts  400  between the peripheral devices  35 ,  40  and the PCI bus  22  during the time PCI bus  22  activity is suspended  390 . Second, the MFBL contacts break  410  at the male connect  25  and female connect  30  resulting in a complete separation of the portable computer system  15  from the expansion base unit  20 . It should be understood that, the disconnect sequence  350  may be accomplished manually by a user or automatically by a motorized undocking means, without departing from the true scope of the invention.  
         [0060]    “Processor” or “microprocessor” in some contexts is used to mean that a microprocessor is being used on the portable system board but may also mean that a memory block (RAM cache, DRAM, flash memory and the like) coprocessor subsystem and the like is being used. The usage herein is that terms can also be synonymous and refer to equivalent things. The phrase “circuitry” comprehends ASIC (Application Specific Integrated Circuits), PAL (Programmable Array Logic), PLA (Programmable Logic Array), decoders, memories, non-software based processors, or other circuitry, or digital commuters including microprocessors and microcomputers of any architecture, or combinations thereof. Words of inclusion are to be interpreted as nonexhaustive in considering the scope of the invention.  
         [0061]    Internal and external connections, communications links circuit or signal pathways can be ohmic, capacitive, direct or indirect, via intervening circuits or otherwise. Implementation is contemplated in discrete components or fully integrated circuits in silicon, gallium arsenide, or other electronic material families, as well as in optical-based or other technology-based forms and embodiments. It should be understood that various embodiments of the invention can employ or be embodied in hardware, software or micro coded firmware. Process diagrams are also representative of flow diagrams for micro coded and software based embodiments.  
         [0062]    While this invention has been described in reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.