Abstract:
One DC-DC converter includes primary side circuit between high and low side inputs including first primary winding of first transformer, and auxiliary section; and rectifier circuits, with separate secondary windings of first transformer, and in parallel with one another and output and capacitor; an output capacitor between outputs and across rectifier circuit. Auxiliary causes transfer of power from first primary to first secondary winding and operation without saturation. Another converter includes primary side circuit including primary winding of plurality of transformers, and an auxiliary section; a rectifier circuit having secondary winding of the plurality of transformers, the rectifier circuit in parallel with output and capacitor; an output capacitor between outputs and across rectifier circuit. Auxiliary section includes switches for connecting and disconnecting primary windings from input, and for resetting transformers. Alternatively, auxiliary section includes switches and capacitors. Switches and capacitors in auxiliary section shared between transformers.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
   This application claims priority from and is entitled to the benefit of the filing date of U.S. Provisional Patent Application No. 60/431,754 filed 9 Dec. 2002 under the same title and by the same inventors. 

   FIELD OF THE INVENTION 
   The invention relates to DC-DC converters. More particularly, it relates to such converters that require electrical isolation between the input voltage and output load, and that are employed for low output voltage, high current applications such as central processing unit (CPU) for computer and for communication equipment. 
   BACKGROUND OF THE INVENTION 
   Computers are widely used both in our personal life and in our work. The heart of the computer is the central processing unit (CPU), which performs all the numerical calculation needed for today&#39;s ever demanding operation. In order to increase the calculation speed of the CPU, and, thus the speed of the computer, the voltage required to power the CPU is becoming lower and lower. At the same time, the current that the CPU draws is becoming higher and higher. For example, the next generation CPU will require supply voltage of less than 1V and current of more than 100 A. The current view is that the required CPU supply voltage is from 0.8V to 1.6V for the next generation CPU. 
   For the CPU in a high-end server, the type of computer used to direct our Internet traffic and data transfer, the CPU&#39;s current requirement is even larger. The current for a server CPU could be up to 500 A. 
   As an example, in a personal computer, power is typically drawn from a 120V AC wall outlet. This AC voltage is converted into a 12V DC voltage by an AC-to-DC converter. The 12V DC is distributed to a motherboard where the CPU is located. This 12V DC voltage cannot power the CPU directly. A DC-DC converter (often referred to as a voltage regulator module or VRM) is used to convert the 12V DC into the lower voltage required by the CPU. This power system architecture is currently preferred from a performance and cost point of view. 
   Another requirement of CPU powering is fast dynamic response. During a time when little calculation is required, the CPU will draw very low current. For a time when a lot of calculation is required, the CPU will draw large current. The transition between the low current and large current is very fast. The current change rate can be as high as 10,000 A per microsecond. Therefore, the converter should have very fast dynamic response to meet this requirement. 
   If the response speed of the converter is not fast enough, the voltage across the CPU will have significant overshoot during the transition from large CPU current to low CPU current because an inductor is typically used in the converter. This voltage overshoot could cause damage to the CPU. Similarly, the voltage across the CPU will have significant undershoot during the transition from low CPU current to large CPU current. If the voltage is too low, the CPU may not operate properly. 
   In addition, the power loss for the converter should be small in order to reduce the temperature rise of the semiconductors used to implement the converter. 
   Referring to  FIG. 1 , a Buck converter is typically used to convert incoming 12V into low output voltage such as 1.5V. 
   The output voltage of a Buck converter is calculated as:
 
 V out= D*V in
 
   Where Vout is the output voltage and Vin is the input voltage. D is the duty cycle and is defined as:
 
 D=T on/ Ts 
 
   Where Ton is the time period during which the top switch Q 1  is conducting, and Ts is the switching period of Q 1 . 
   In order to achieve Vin=12V to Vout=0.8V conversion, the required duty cycle for a Buck converter is D=0.8/12=7%. It is noted that a small duty cycle such as 7% is not optimal for the design and operation of a Buck converter when the switching time of the MOSFET (“metal-oxide semiconductor field-effect transistor”) is considered. For example, for a typical MOSFET, the turn on time is around 50 ns and the turn off time is around 100 ns. This means that the MOSFET will be conducting for at least 150 ns regardless of the control signal. If we assume the switching frequency is 300 KHz, the switching period is 3.33 μs. The switching time of 150 ns is equivalent to 150 ns/3.33 μs=4.5%. This means that we only have control of about 2.5% (7%-4.5%) of conducting time of the MOSFET. Considering the delay time of the controller, it is very difficult to design in actual implementation. The compromise is to reduce the switching frequency to a lower level, such as 200 KHz. However, lower switching frequency will also lower the dynamic response, which is a very important performance measurement for DC-DC converters. 
   In addition, operating at a very small duty cycle has another detrimental impact to the dynamic response. During the transition from low CPU current to high CPU current, the inductor current should be ramped up. This can be done by increasing the duty cycle from 7% (take the above example) to 100% (maximum). The duty cycle has 93% change, which is very beneficial to handle this transition. However, during the transition from high CPU current to low CPU current, the inductor current should be ramped down. The only way to achieve this is to reduce the duty cycle. Nevertheless, the duty cycle can only be reduced from 7% to 0%. The duty cycle has only 7% change, which results in poor dynamic response. 
   To improve the dynamic response point of view, it is desirable to select higher switching frequency for the converter. It is also desirable for the converter to operate at around a 50% duty cycle. 
   Referring to  FIG. 2 , in order to improve dynamic response an interleaved Buck converter can be used, such as a four-phase interleaved Buck converter. By interleaving, the equivalent ripple frequency is four times the switching frequency of each phase. For example, if the switching frequency of each Buck converter is 200 KHz, the equivalent switching frequency for four-phase interleaved Buck converter will be 800 KHz. Another benefit of interleaving is that the ripple current through the output capacitor and input capacitor is also significantly reduced. However, each Buck converter still operates at very small duty cycle, which is not desirable. 
   In computer and communications applications DC-DC converters may be used to perform various conversions. Some standard conversion applications include approximately 400V DC to 48V DC (e.g., DC stage of AC-DC rectifiers for communication power plant), 48V DC to 0.8-5V DC (communications equipment), 48V DC to 0.8-1.6V DC (CPU), and 48V DC to 24 or 12V DC (intermediate voltage bus, or wireless systems). In higher load current applications, electrical isolation between the input voltage and output load may be required for safety reasons. 
   SUMMARY OF THE INVENTION 
   In a first aspect the invention provides an isolated DC-DC converter for use with a DC power source having a DC voltage across a first voltage source output and a second voltage source output and with a load. The converter includes an input for accepting the DC voltage, the input having a first voltage input and a second voltage input, and an output for outputting a converted DC voltage, the output having a first voltage output and a second voltage output. It also includes a primary side circuit connected between the first voltage input and the second voltage input including a first primary winding of a first transformer and an auxiliary section, a plurality of rectifier circuits, each rectifier circuit having a separate secondary winding of the first transformer, the rectifier circuits connected in parallel with one another and with the output, and an output capacitor connected between the first voltage output and the second voltage output and across the rectifier circuit. An output converted DC voltage between the first voltage output and the second voltage output has the same polarity as a DC voltage input between the first voltage input and the second voltage input. The auxiliary section is for causing the first transformer to transfer power from the first primary winding to the first secondary winding and to operate without saturation. The rectifier circuit is for converting output of the first secondary winding into a one-direction waveform and converting the one-direction waveform into a DC voltage. The output capacitor is for filtering the converted DC voltage. 
   The plurality of rectifier circuits may include only first and second rectifier circuits. 
   In a second aspect the invention provides an isolated DC-DC converter for use with a DC power source having a DC voltage across a first voltage source output and a second voltage source output and with a load. The converter includes an input for accepting the DC voltage, the input having a first voltage input and a second voltage input, and an output for outputting a converted DC voltage, the output having a first voltage output and a second voltage output. It also includes a primary side circuit connected between the high side input and the low side input including a primary winding of each of a plurality of transformers, and an auxiliary section, a rectifier circuit having a secondary winding for each of the plurality of transformers, the rectifier circuit connected in parallel with the output, and an output capacitor connected between the first voltage output and the second voltage output and across the rectifier circuit. An output converted DC voltage between the first voltage output and the second voltage output has the same polarity as a DC voltage input between the first voltage input and the second voltage input. The auxiliary section is for causing the transformers to transfer power from the primary windings to the secondary windings and to operate without saturation, and the auxiliary section includes switches for repeatedly connecting and disconnecting the primary windings from the input, and for resetting the transformers. A plurality of the switches in the auxiliary section are shared between transformers. The rectifier circuit is for converting output of the secondary windings into a one-direction waveform and converting the one-direction waveform into a DC voltage. The output capacitor is for filtering the converted DC voltage. 
   The rectifier circuit may have a plurality of switches for performing the conversion of output of the secondary winding into a one-direction waveform, and wherein a plurality of the switches of the rectifier circuit are shared between the secondary windings of the transformers. 
   The transformer primary windings of the plurality of transformers may be connected one to the next in a ring. 
   In a third aspect the invention provides an isolated DC-DC converter for use with a DC power source having a DC voltage across a first voltage source output and a second voltage source output and with a load. The converter includes an input for accepting the DC voltage, the input having a first voltage input and a second voltage input, and an output, the output having a first voltage output and a second voltage output. It also includes a primary side circuit connected between the first voltage input and the second voltage input including a primary winding of each of a plurality of transformers, and an auxiliary section, a rectifier circuit having a secondary winding for each of the plurality of transformers, the rectifier circuit connected in parallel with the output, and an output capacitor connected between the first voltage output and the second voltage output and across the rectifier circuit. An output converted DC voltage between the first voltage output and the second voltage output has the same polarity as a DC voltage input between the first voltage input and the second voltage input. The auxiliary section is for causing the transformers to transfer power from the primary windings to the secondary windings and to operate without saturation, and the auxiliary section includes a combination of switches and capacitors for repeatedly connecting and disconnecting the primary windings from the input, and for resetting the transformers. The combination of switches and capacitors in the auxiliary section is shared between transformers. The rectifier circuit is for converting output of the secondary windings into a one-direction waveform and converting the one-direction waveform into a DC voltage. The output capacitor is for filtering the converted DC voltage. 
   The rectifier circuit may have a plurality of switches for performing the conversion of output of the secondary windings into a one-direction waveform, and wherein a plurality of the switches of the rectifier circuit are shared between the secondary windings of the transformers. 
   The converters may have primary switches that have input for gate drive signals for operating the primary windings out of phase with one another. The converters of the first and second aspects may have an auxiliary section that includes four switches. Each switch may be a MOSFET. 
   The auxiliary section of the first aspect may have a first switch connected between a first side of the first primary winding and the first voltage input, a second switch connected between a second side of the first primary winding and the first voltage input, a third switch connected between the first side of the first primary winding and the second voltage input, and a fourth switch connected between the second side of the first primary winding and the second voltage input. 
   Each switch may have an input for a gate drive signal for controlling the operation of the switch. The gate drive signals may repeatedly turn on and turn off the first and fourth switch. The gate drive signals may repeatedly turn on and turn off the second and third switches whereby the first transformer can be reset. 
   Alternatively, the auxiliary section may have a first switch connected between a first side of the first primary winding and the first voltage input, a first capacitor connected between a second side of the first primary winding and the first voltage input, a second switch connected between the first side of the first primary winding and the second voltage input, and a second capacitor connected between the second side of the first primary winding and the second voltage input. Each switch may have an input for a gate drive signal for controlling the operation of the switch. The gate drive signals may be adapted to repeatedly turn on and turn off the first switch and repeatedly turn on and turn off the second switch whereby the first transformer can be reset from the capacitors. The capacitors may be large enough that the voltage across the capacitors will not change significantly during normal operation of the converter. 
   In the first aspect, the rectifier circuit may have a combination of inductors and switches, wherein the switches are for converting alternating voltage in the first secondary winding into pulsating one-direction voltage and the inductors are for converting pulsating one-direction voltage into DC voltage. 
   Alternatively, the rectifier circuit may have a combination of inductors and diodes, wherein the diodes are for converting pulsating alternating voltage in the first secondary winding into pulsating one-direction voltage and the inductors are for converting pulsating one-direction voltage into DC voltage. 
   In the second or third aspect, the rectifier circuit may have a first rectifier switch connected between the second voltage output and a first side of the first secondary winding, a second rectifier switch connected between a second side of the first secondary winding and the second voltage output, a first inductor connected between the first side of the first secondary winding and the first voltage output, and a second inductor connected between the second side of the first secondary winding and the first voltage output. 
   Again, each switch may have an input for a gate drive signal for controlling the operation of the switch. The gate drive signals may be adapted to switch the first and second rectifier switches to convert pulsating alternating voltage at the first secondary winding into one-direction pulsating voltage. 
   Alternatively, the rectifier circuit may have a first rectifier switch connected between the second voltage output and a first side of the first secondary winding, a second rectifier switch connected between a second side of the first secondary winding and the second voltage output, and a first inductor connected between the first side of the first secondary winding and the first voltage output not in series with the second rectifier switch. 
   Alternatively, the rectifier circuit may have first and second rectifier diodes and a first inductor, and the first diode is connected between a first side of the first secondary winding and the first inductor, and the inductor is further connected between the first diode and the first voltage output, for forward conduction from the secondary winding through the inductor, and the second diode is connected between (a) a point between the second side of the first secondary winding and the second voltage output and (b) a point between the first inductor and first diode, also for forward conduction from the secondary winding through the inductor. 
   Alternatively, the rectifier circuit may have a second secondary winding, first and second rectifier diodes and a first inductor, and a second side of the first secondary winding is connected to a first side of the second secondary winding and the second voltage output, and the first diode is connected between a first side of the first secondary winding and the first inductor, and the inductor is further connected between the first diode and the first voltage output, for forward conduction from the secondary winding through the inductor, and the second diode is connected between (a) the second side of the second secondary winding and (b) a point between the first inductor and first diode, also for forward conduction from the secondary winding through the inductor. 
   Alternatively, the rectifier circuit may have a second secondary winding, first and second rectifier switches and a first inductor, and a second side of the first secondary winding is connected to a first side of the second secondary winding and the inductor which is further connected to the first voltage output, and the first rectifier switch is connected between a first side of the first secondary winding and the second voltage output, and the second rectifier switch is connected between a second side of the second secondary winding and the second voltage output. 
   The first and second rectifier switches, the first secondary winding and the first and second inductors may be included within a first rectifier section, and the rectifier circuit may include a second rectifier section similar to the first rectifier section, and the first and second rectifier sections are connected in parallel with one another and with the output capacitor and the output. 
   The first and second diodes, the first secondary and second secondary windings and the inductor may be included within a first rectifier section, and the rectifier circuit may also include a second rectifier section similar to the first rectifier section, and the first and second rectifier sections are connected in parallel with one another and with the output capacitor and the output. 
   The first and second rectifier switches, the first secondary and second secondary windings and the inductor may be included within a first rectifier section, and the rectifier circuit may include a second rectifier section similar to the first rectifier section, and the first and second rectifier sections are connected in parallel with one another and with the output capacitor and the output. 
   In the second aspect, the plurality of transformers may be a first and a second transformer and wherein the primary side primary windings consist of a first primary winding of the first transformer and a second primary winding of the second transformer, and the plurality of switches of the auxiliary section may be a first switch connected between a first side of the first primary winding and the first voltage input, a second switch connected between a second side of the first primary winding and the first voltage input, a third switch connected between the first side of the first primary winding and the second voltage input, and a fourth switch connected between the second side of the first primary winding and the second voltage input, and a fifth switch connected between the first voltage input and a first side of the second primary winding, and a sixth switch connected between the first side of the second primary winding and the second voltage input, and a second side of the second primary is connected to a side of the first primary winding. 
   The second primary switches may have input for gate drive signals for operating the second primary winding out of phase with the first primary winding. The plurality of transformers may be a first, second, and third transformer and wherein the primary side primary windings consist of a first primary winding of the first transformer and a second primary winding of the second transformer and a third primary winding of the third transformer, and the plurality of switches of the auxiliary section consist of a first switch connected between a first side of the first primary winding and the first voltage input, a second switch connected between a second side of the first primary winding and the first voltage input, a third switch connected between the first side of the first primary winding and the second voltage input, and a fourth switch connected between the second side of the first primary winding and the second voltage input, and a fifth switch connected between the first voltage input and a first side of the second primary winding, and a sixth switch connected between the first side of the second primary winding and the second voltage input, and a second side of the second primary is connected to a side of the first primary winding, the third transformer connected between the first side of the first primary winding and the second side of the second primary winding. 
   In the second aspect, the plurality of transformers may be a first, second, and third transformer and wherein the primary side primary windings may be a first primary winding of the first transformer and a second primary winding of the second transformer and a third primary winding of the third transformer, and the plurality of switches of the auxiliary section may be a first switch connected between a first side of the first primary winding and the first voltage input, a second switch connected between a second side of the first primary winding and the first voltage input, a third switch connected between the first side of the first primary winding and the output, and a fourth switch connected between the second side of the first primary winding and the second voltage input, and a fifth switch connected between the first voltage input and a first side of the second primary winding, and a sixth switch connected between the first side of the second primary winding and the second voltage input, and a second side of the second primary is connected to a side of the first primary winding, a first side of the third primary winding connected to the second side of the second primary winding, and a seventh primary switch connected between a second side of the third primary winding and the first voltage input, and an eighth primary switch connected between the second side of the third primary winding and the second voltage input. 
   The primary switches may have input for gate drive signals for operating the primary windings out of phase with one another, and no additional drive components are added for the third primary. 
   For the converters the input voltage may be approximately 48 volts DC and the output voltage may be within a range of 0.8 volts DC to 1.6 volts DC, the input voltage may be approximately 48 volts DC and the output voltage may be within a range of 0.8 volts DC to 5 volts DC, the input voltage may be approximately 48 volts DC and the output voltage may be approximately 24 volts DC or 12 volts DC, or the input voltage may be approximately 400 volts DC and the output voltage may be approximately 48 volts DC. It is noted that other input and output voltage levels can also be implemented by choosing the turns ratio properly. 
   In the first aspect and in any other converter having two or fewer transformers the duty cycle of each transformer may be between 40% and 60%. The duty cycle of each transformer may be approximately 50%. This is the preferred duty cycle for the transformers in these converters. 
   In any converter having only three transformers, the duty cycle of each transformer may be approximately 33⅓%. This is the preferred duty cycle for the transformers in these converters. 
   A fourth aspect includes a method of operating the converters of any one of the above aspects by driving the auxiliary section to cause the first transformer to transfer power from the first primary winding to the first secondary winding, while at the same time driving the auxiliary section to cause the transformer to operate without saturation. 
   Other aspects of the invention, including further methods employing converters, will be evident from the figures and detailed description herein. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     For a better understanding of the present invention and to show more clearly how it may be carried into effect, reference will now be made, by way of example, to the accompanying drawings which show the preferred embodiment of the present invention and in which: 
       FIG. 1  is a schematic diagram of a Buck converter of known configuration; 
       FIG. 2  is a schematic diagram of a four-phase interleaved Buck converter of known configuration; 
       FIG. 3  is a schematic diagram of an isolated single phase full-bridge converter of known configuration; 
       FIG. 4  is a schematic diagram of a two-phase interleaved full-bridge DC converter of known configuration; 
       FIG. 5  is a schematic diagram of a full-bridge DC converter with parallel rectifier circuits in accordance with a preferred embodiment of the present invention; 
       FIG. 6  is a schematic diagram of a two-phase interleaved full-bridge converter with shared primary switch in accordance with a preferred embodiment of the present invention; 
       FIG. 7  is a graphic illustration of a gate drive scheme for the two-phase interleaved full-bridge converter with shared primary switch embodiment shown in  FIG. 6 ; 
       FIG. 8  is a graphic illustration of gate drive signals and input and output current waveforms for the two-phase interleaved full-bridge converter with shared primary switch embodiment shown in  FIG. 6  with a duty cycle of 40%; 
       FIG. 9  is a schematic diagram of a two-phase interleaved full-bridge converter with shared primary switch and shared secondary switch in accordance with a preferred embodiment of the present invention; 
       FIG. 10  is a graphic illustration of gate drive signals for the converter of  FIG. 9 ; 
       FIG. 11  is a schematic diagram of a three-phase interleaved full-bridge converter with shared primary switch in accordance with a preferred embodiment of the present invention; 
       FIG. 12  is a graphic illustration of a possible gate drive scheme for the converter shown in  FIG. 11 ; 
       FIG. 13  is a graphic illustration of gate drive signals and input and output current waveforms for the converter of  FIG. 11 ; 
       FIG. 14  is a schematic diagram of a three-phase interleaved full-bridge converter with shared primary switch and shared secondary switch in accordance with a preferred embodiment of the present invention; 
       FIG. 15  is a graphic illustration of gate drive signals for the converter of  FIG. 14 ; 
       FIG. 16  is a schematic diagram of another three-phase interleaved full-bridge converter with shared primary switch in accordance with a preferred embodiment of the present invention; 
       FIG. 17  is a schematic diagram of a three-phase interleaved full-bridge converter with shared primary switch and with shared secondary switch in accordance with a preferred embodiment of the present invention; 
       FIG. 18  is a schematic diagram of a rectifier circuit with two windings and two diodes for use in the above converters; 
       FIG. 19  is a schematic diagram of a rectifier circuit with two windings and synchronous rectifier for use in the above converters; 
       FIG. 20  is a schematic diagram of a half-bridge DC converter of known configuration; 
       FIG. 21  is a schematic diagram of a half-bridge DC converter with parallel rectifier circuits in accordance with a preferred embodiment of the present invention; 
       FIG. 22  is a schematic diagram of a two-phase interleaved half-bridge converter with shared primary capacitor in accordance with a preferred embodiment of the present invention; and 
       FIG. 23  is a schematic diagram of a two-phase interleaved half-bridge converter with shared secondary switch in accordance with a preferred embodiment of the present invention. 
   

   DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
   Some embodiments of a family of isolated DC-DC converters that are suitable for a variety of existing applications for isolated DC-DC converters, such as those mentioned in the Background section of this description, will be described. In addition, multi-phase interleaved converters will be described to further improve performance. 
   The converters can be used for the next generation voltage regulator module (VRM) to meet the stringent power requirement of the next generation CPU. The converters can have high efficiency and fast dynamic response, and can provide high current to the CPU. They can also be used for other applications, such as in a communication system where similar performance is needed. 
   Several novel isolated DC converters based on full-bridge converters will now be described. 
   Referring to  FIG. 3 , isolated full-bridge converter  301  of known configuration has a primary side  303  and secondary side  305 . The primary side  303  includes one or more transformer primary winding(s) and an auxiliary section that will operate the transformer(s) properly. The auxiliary section may consist of switches (such as MOSFET, BJT (“bipolar junction transistor”), etc). The auxiliary section may also consist of a combination of switches and capacitors. The function of the auxiliary section is to make the transformer(s) operate properly. The term “operate properly” means that the transformer(s) will not saturate and the power can be transferred from each primary winding to its secondary winding(s) efficiently. Various examples of auxiliary sections, such as full-bridge and half-bridge, will be described herein. 
   The primary side  303  consists of the auxiliary section (Q 1 , Q 2 , Q 3 , and Q 4  combined), and transformer primary winding T 1 A. The secondary side  305  consists of Q 5 , Q 6 , transformer secondary winding T 1 B, and inductors L 1 , L 2 . By changing the duty cycle of the primary switches Q 1 - 4 , the output voltage Vout+ can be regulated. The secondary side  305  is a “current doubler circuit”. Other types of known secondary circuits can be used, as will be evident to those skilled in the art using the principles described herein. 
   One problem is that for higher load current, the power loss in the secondary side  305  is very high. More specifically, the conduction loss of Q 5  and Q 6  is very high. 
   Also the converter  301  has higher input ripple current. This requires a larger capacitor, not shown, to filter out the ripple current in order to meet EMI (electro-magnetic interference) requirements. 
   Referring to  FIG. 4 , as is known, two full-bridge converters can be connected in parallel to create converter  401 . Converter  401  is operated in interleaved mode in order to solve the above-mentioned problems, i.e., to reduce the power loss in the secondary side and to reduce the input current ripple. 
   Referring to  FIG. 5 , full-bridge DC converter  501  has parallel rectifier circuits  503 ,  505  to reduce current loss. Each rectifier circuit  503 ,  505  consists of one transformer secondary winding T 1 B, T 1 C, two MOSFETs Q 5 , Q 6  and Q 7 , Q 8  and two inductors L 1 , L 2  and L 3 , L 4 . When handling similar power the converter  501  will have higher efficiency than the converter  301  in  FIG. 3  because the conduction loss is lower for the converter  501 . The two windings T 1 B, T 1 C are coupled with the primary winding T 1 A. Using this method the load current is shared between two secondary windings T 1 B, T 1 C. As we know the conduction loss is I 2  R; if the resistance is not changed, and the current becomes half, the conduction losses will be half. This is more effective than paralleling two switches to reduce conduction losses when parasitic components are considered. 
   In converter  501 , two rectifiers  503 ,  505  connected in parallel are shown. In actual implementation, three or more rectifier circuits can be connected in parallel to share the load current. The detailed circuits will be evident to those skilled in the art using the principles described herein, and there implementation will not be further described. 
   It is to be noted that typical implementations will have the high side voltage as a positive voltage and the low side voltage as a negative voltage. It is possible to provide converters embodying the principles described herein where the high side voltage is negative with respect to the low side voltage. Thus, the voltage inputs to the converters could simply be a first voltage and a second voltage, rather than always being positive and negative DC voltages (or “potentials”) with the positive voltage always being the input voltage to the high side circuit. Similarly, the output voltage of the converter could be first and second DC voltages, rather than requiring the converter output that receives current from the high side circuit to be a positive voltage when compared to the other converter output. In any case the output converter DC voltage between the first voltage and the second voltage has the same polarity as a DC voltage input between the first voltage and the second voltage. 
   Referring to  FIG. 6 , in two-phase interleaved full-bridge converter  601  with shared primary switches, the primary side  603  requires only six MOSFETs Q 1 - 6 , instead of eight for the converter  401  shown in FIG.  4 . However, the input current ripple and output current ripple are similar for the converter  601  as compared to the converter  401  when using similar drive schemes. 
   Referring to  FIG. 7 , an improved gate drive scheme for two-phase interleaved full-bridge converter  601  with shared primary switch is shown.  FIG. 8  shows the related current waveforms. 
   Q 2  and Q 5  work out of phase with each other. Q 2  is on for the first half switching period, and Q 5  is on for next half switching period. Q 1  and Q 3  are phase-shifted from each other. Note that in the control logic above, the move direction of Q 1  and Q 3  are different from conventional phase shift control. Q 1  is turned on when Q 5  is turned on. By changing the turn off time, the duty cycle of Q 1  is controlled. Q 3  is turned off when Q 5  is turned off. By changing the turn on time, the duty cycle of Q 3  is controlled. 
   Q 4  and Q 6  work in the same way as Q 1  and Q 3 . 
   For synchronous rectifiers, Q 7  is driven by the complementary signal of Q 6 . Q 8  is driven by the complementary signal of Q 3 . Q 9  is driven by the complementary signal of Q 1 . Q 10  is driven by the complementary signal of Q 4 . The gate drive signals are shown in  FIGS. 7 and 8 . 
   The input and output current waveforms show that the input current ripple and the output current ripple can be reduced significantly. 
   Referring to  FIG. 9 , the rectifier switches for the converter  601  in  FIG. 6  can also be shared to derive converter  901 . In the converter  901 , three MOSFETs are needed for the secondary side switches Q 7 - 9 . 
   Referring to  FIG. 10 , a gate drive scheme for all the nine switches Q 1 - 9  of converter  901  is shown. The gate drive signals for the primary side MOSFETs Q 1 - 6  are the same as those for converter  601  of FIG.  6 . For synchronous rectifier switches, Q 7  is off when Q 2  and Q 6  are on. Q 8  is off when Q 3  and Q 5  or Q 1  and Q 5  are on. Q 9  is off when Q 2  and Q 4  are on. 
   Using the principles discussed with respect to converters  601  and  901  of FIG.  6  and  FIG. 9 , respectively, three-phase interleaved full-bridge converters with shared switches will now be described. 
   Referring to  FIG. 11 , using shared switches a three-phase interleaved full-bridge DC converter  1101  has eight primary switches Q 1 -Q 8 , as opposed to 12 primary switches for conventional interleaving. 
   Referring to  FIG. 12 , there is shown a gate drive scheme for the converter  1101 , to achieve performance similar to a conventional three-phase interleaved converter.  FIG. 13  also shows input current and output current waveforms for the three-phase interleaved full-bridge converter  1101  with shared primary switches. 
   Q 1  and Q 2  work out of phase with each other. Q 1  is on for the first half switching period and Q 2  is on for the next half switching period. Q 3  and Q 4  work out of phase with each other also. Q 3  is on for the first half switching period and Q 4  is on for the next half switching period. Q 3  and Q 4  are phase-shifted with respect to Q 1  and Q 2 . Q 5  is turned on when Q 4  is turned on. Q 6  is turned on when Q 3  is turned on. 
   The duty cycle of Q 7  and Q 8  are controlled by changing the turn on time. Q 7  is turned off when Q 2  is turned off. Q 8  is turned off when Q 1  is turned off 
   It should be noted that for a three-phase interleaved converter when the duty cycle is 33.33%, the smallest input and output current ripple is achieved. The ripple frequency is also increased. 
   Compared with the two-phase interleaved full-bridge DC converter  601  shown in  FIG. 6 , the three-phase interleaved full-bridge converter  1101  uses two more primary switches Q 7 , Q 8 , and another transformer T 3  and 2 secondary switches Q 13 , Q 14 . More switches can be added in the primary side and secondary side to form a four-phase shift or more phase shift interleaved full-bridge converter. 
   Referring to  FIG. 14 , in converter  1401 , rectifier switches can also be shared using only four secondary switches Q 9 - 12 . 
     FIG. 15  shows one possible implementation of the gate drive signals for the converter  1401  of FIG.  14 . In the gate drive waveform, the gate drive signals for primary switches Q 1 - 8  are the same as those without a shared secondary switch (FIG.  11 ). For synchronous rectifier switching, Q 9  is off when Q 3  and Q 6  are on. Q 1  is off when Q 4  and Q 5  or Q 1  and Q 4  are on. Q 11  is off when Q 2  and Q 3  or Q 7  and Q 2  are on. Q 12  is off when Q 1  and Q 8  are on. 
   Referring to  FIG. 16 , another three-phase interleaved full-bridge converter  1601  is shown. In this circuit, only six primary switches Q 1 - 6  are used. However, the ripple cancellation effect is not as good as that of converter  1101  shown in FIG.  11 . 
   Referring to  FIG. 17 , the rectifier switches can also be shared for the converter  1601  of  FIG. 16  as shown in converter  1701 . 
   Several interleaved full-bridge DC converters with reduced numbers of MOSFETs have been described. It should be noted that the same principles can be used to derive other multiple-phase interleaved full-bridge converters that will not otherwise be described herein, but which can be implemented by one skilled in the art using the principles described herein. 
   In the above analysis, only the so-called “current doubler” has been used as an example in the rectifier circuit. In actual implementation, other types of rectifier circuits can also be used and the new interleaved full-bridge converters can be derived in the same way.  FIG. 18  shows one example of another rectifier circuit  1801  that may be used.  FIG. 19  shows a rectifier circuit  1901  where one diode rectifier in the rectifier circuit of  FIG. 18  is replaced by a synchronous rectifier to obtain rectifier circuit. 
   Novel interleaved half-bridge DC converters will now be described.  FIG. 20  shows a conventional half-bridge DC converter  2001 . 
   Referring to  FIG. 21 , two or more rectifier circuits can be connected in parallel at the secondary side in order to reduce the conduction loss of the rectifier circuit, to produce a half-bridge DC converter  2101  with parallel rectifier circuits. In actual implementation, three or more rectifier circuits can be connected in parallel to share the load current. Detailed circuits are not shown in this description, but will be evident to those skilled in the art using the principles described herein. 
   A conventional two-phase half-bridge DC converter, not shown, using the converter  2001  of  FIG. 20 , requires four primary MOSFETs and four capacitors. Referring to  FIG. 22 , the capacitors can be shared and only two capacitors C 1 , C 2  are used. A two-phase interleaved half-bridge DC converter  2201  with shared capacitor is shown. The primary side needs four MOSFETs Q 1 -Q 4  and two capacitors C 1 , C 2 . However, the input current ripple can also be significantly reduced. 
   Referring to  FIG. 23 , a two-phase interleaved half-bridge converter  2301  with shared primary capacitors and shared secondary switches is shown. In this circuit, only three MOSFETs Q 1 -Q 3  are used in the secondary circuit. It should be noted that same principles can be used to derive other multiple-phase interleaved half-bridge converters, which will be evident to those skilled the art using the principles described herein. 
   It will be understood by those skilled in the art that this description is made with reference to the preferred embodiment and that it is possible to make other embodiments employing the principles of the invention which fall within its spirit and scope as defined by the following claims.