Abstract:
An active antenna array for a mobile communications network and a method for receiving radio signals is disclosed. The active antenna array has a plurality of antenna elements for relaying radio signals, a plurality of first amplifiers for amplifying a plurality of individual receive signals a plurality of first analogue-to-digital converters and a plurality of first gain switches located between one of the plurality of first analogue-to-digital converters and the plurality of first amplifiers. A digital signal processor is connected to outputs of the plurality of first analogue-to-digital converters and has a common gain switch control line connected to at least two of the plurality of first switches for controlling the gain of the first gain switches.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    Current analogue to digital converters (ADC) do not have a sufficient dynamic range to process the full range of receive signals that the ADCs are likely to encounter in a mobile communications network radio base station. It is therefore known in the art to break down the likely range of receive signals into two or more sub-ranges of radio signals. Some form of gain control or gain switching is used to reduce the amplitude of the radio signal impinging upon the ADC in strong signal conditions. Each one of the switched receivers in the base station will have its own threshold level at which the gain of the receiver is switched (e.g. from “high” to “low” gain) and a (different) threshold level at which the gain changes in the reverse direction (i.e. from “low” to “high”). An element of hysteresis is deliberately build into the process of gain switching in order to prevent excessive amounts of gain control or gain switching from occurring when the receive signals are close to or at the threshold level. 
         [0002]      FIG. 1  shows a prior art antenna array with a single downconversion stage. The receive signals are received at antenna elements Ant and passed to a duplex filter  100 . The duplex filter  100  removes any unwanted out-off-band signals from the receive signals. The receive signals are passed through a gain switch  105 . The gain switch  105  can either pass the receive signal unmodified or reduce the amplitude of the receive signal by adding attenuation to the receive signal. The gain switch  105  is connected by a gain switch control line  106  to an output of a digital signal processor  130 . The amount of attenuation added to the receive signal is controlled by a signal along the gain switch control line  106  from the digital signal processor  130 , as will be explained later. 
         [0003]    The remainder of the receiver shown in  FIG. 1  is a conventional single downconversion design with a low noise amplifier  200  receiving the receive signals (either unmodified or attenuated) from the gain switch  105  and passing the amplified (and possibly attenuated) receive signals to a mixer  110  which downconverts the amplified receive signals to a lower frequency. The downconverted receive signals are passed to a bandpass filter  120  to remove any unwanted out-off-band signals from the downconverted receive signals. The output of the bandpass filter  120  is connected to an analogue-to-digital converter  125  which converts the down converted signals in the analogue domain to the digital domain at a digital intermediate frequency. The digital signals are passed to the digital signal processor  130  and then output as baseband digital signals  135 . 
         [0004]    The ADC  125  has a limited dynamic range and the digital signal processor  130  will analyse the digital signals in order to determine if the ADC  125  is close to overloading or saturation. The digital signal processor  130  does this analysis by comparing the digital signal level output from the ADC  125  to a predetermined threshold level. If the threshold level is exceeded, the strength of the receive RF signals is reduced by switching in the attenuation in the gain switch  105 . A typical six-sector radio base station will have six of these receivers (or twelve if diversity reception is applied). The presence of six identical receivers in the base station increases the amount of real estate required on a chip and in the base station for all six of the receivers and also requires sufficient processing power to ensure that all six of the receivers act in tandem with each other. 
       SUMMARY OF THE INVENTION 
       [0005]    An active antenna array for a mobile communications network is disclosed which has a plurality of antenna elements for relaying radio signals. A plurality of first amplifiers for amplifying a plurality of individual receive signals and a plurality of first analogue-to-digital converters is included in the active antenna array. A plurality of first gain switches is located between one of the plurality of antenna elements and the plurality of first analogue to digital converters. A digital signal processor connected to outputs of the plurality of analogue-to-digital converters and has a common gain switch control line connected to at least two of the plurality of first switches. The digital signal processor can thus control the switching on or off of the first gain switches by monitoring the output from the plurality amplifiers. 
         [0006]    It will be appreciated that the digital signal processor may not be connected directly to the outputs of the plurality of first amplifiers. There are likely to be further elements between the digital signal processor and the first amplifiers. 
         [0007]    In some aspects of the invention, more than one gain switch, a multi-level gain switch or multi-stage gain switch is connected into each one of signal paths between the antenna elements and the digital signal processor. This enables a greater degree of flexibility to the switching. 
         [0008]    A method for receiving a plurality of individual radio signals is also disclosed. This method comprises concurrently receiving the plurality of individual radio signals and centrally changing by a similar amount a signal level of the plurality of individual radio signals. The plurality of individual radio signals is converted from the analogue domain to the digital domain. The similar amount is in general substantially identical for each one of the individual radio signals. 
         [0009]    A chip set is also disclosed which comprises a plurality of first amplifiers for amplifying a plurality of individual receive signals, a plurality of first analogue-to-digital converters, a plurality of first gain switches located prior to the plurality of first analogue-to-digital converters, and a digital signal processor connected to outputs of the plurality of amplifiers and having a common gain switch control line connected to at least two of the plurality of first switches. 
         [0010]    A computer program product is also disclosed. The computer program product comprises a computer-usable medium having control logic stored therein for causing a computer to manufacture an active antenna array for a mobile communications network. The active antenna array comprises a plurality of antenna elements for relaying radio signals, a plurality of first amplifiers for amplifying a plurality of individual receive signals, a plurality of first analogue-to-digital converters, a plurality of first gain switches located between one of the plurality of antenna elements and the plurality of first analogue-to-digital converters, and a digital signal processor connected to outputs of the plurality of first analogue-to-digital converters and having a gain switch control line connected to at least one of the plurality of first switches. 
         [0011]    Finally a computer program product is disclosed comprising a computer-usable medium having control logic stored therein for causing an active antenna to execute a method for receiving a plurality of individual radio signals. The computer program product comprises first computer readable code means for causing the active antenna array to concurrently receive the plurality of individual radio signals, second computer readable code means for causing the active antenna array to centrally reduce a signal level of at least two of the plurality of individual radio signals, and third computer readable code means converting the plurality of individual radio signals from the analogue domain to the digital domain. 
     
    
     
       DESCRIPTION OF THE FIGURES 
         [0012]      FIG. 1  shows a receiver system of the prior art. 
           [0013]      FIG. 2  shows a receiver system employing a common switching threshold and a common switching control for the receivers in an active antenna array. 
           [0014]      FIG. 3  shows an example of the common switching threshold in common switching control in a two-stage downconversion. 
           [0015]      FIG. 4  shows another aspect of a common switching threshold for all elements. 
           [0016]      FIG. 5  shows a further aspect of a common switching threshold in common switching control for all elements in an antenna-embedded radio system. 
           [0017]      FIG. 6  shows a flow diagram illustrating the method for the receiving of the radio signals. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0018]    The invention will now be described on the basis of the drawings. It will be understood that the embodiments and aspects of the invention described herein are only examples and do not limit the protective scope of the claims in any way. The invention is defined by the claims and their equivalents. It will be understood that features of one aspect or embodiment of the invention can be combined with a feature of a different aspect or aspects and/or embodiments of the invention. 
         [0019]      FIG. 2  shows a first aspect of the invention applying a common switching threshold and a common switching control for all of the receivers in an active antenna array  1 . It will be noted that the reference numerals for elements in each signal path in the active antenna array  1  are identical with each other, except that a suffix is added to the reference numeral to indicate the signal path in which the element is present. It will also be appreciated that similar reference numerals in each of the Figures are used for similar elements. For simplicity the suffixes will be omitted in the following description for those elements commonly referred. 
         [0020]    The active antenna array  1  has a plurality of antenna elements Ant- 1 , Ant- 2 , . . . , Ant-N which are connected each to a receive signal path  102  through a duplex filter  100 . The duplex filter  100  removes any out-off-band signals from the received radio signal from the antenna element Ant. It will be also noted that transmit signals are passed through the duplex filter prior to transmission from the antenna elements. 
         [0021]    A gain switch  105  is connected to the output of the duplex filter  100  and to an input of a low noise amplifier  200 . A control of the gain switch  105  is connected to an output of a digital signal processor  130  over a common gain switch control line  106 , as will be explained later. The low noise amplifier  200  amplifies the received signals to form an amplified receive signal which can then be passed optionally to a second gain switch  115 . The second gain switch  115  is also controlled through the gain switch control line  106  from the digital signal processor  130 . An output of the second gain switch  115  is connected to an input of a first mixer  110 . The amplified receive signal is downconverted in the mixer  110  with a signal from a first local oscillator  140 . An output of the mixer  110  at a downconverted frequency is optionally passed through a third gain switch  117  (which is also controlled from the digital signal processor  130  through the gain switch control line  106 ) and then through a band pass filter  120  to an analogue-to-digital converter (ADC)  125  in which it is converted to a digital IF signal before being passed from its digital signal output to the digital signal processor  130 . The digital IF signal is output from the digital signal processor  130  as a baseband output signal  135 . 
         [0022]    The aspect of the invention shown in  FIG. 2  has three gain switches: A first gain switch  105 , a second switch gain  115  and a third gain switch  117 . It will be appreciated that it is not necessary to have all three of the gain switches  105 ,  115  and  117  in the receive signal path  102 . It is merely required that one of the three gain switches  105 ,  115  or  117  is present which can attenuate the receive signal either in an amplified form, at the incoming radio frequency or at the downconverted frequency. The choice of the gain switch  105 ,  115  or  117  is one left to the designer of a circuit. 
         [0023]    Each of the first gain switch  105 , the second gain switch  115  and/or the third gain switch  117  is connected, as described above, by the gain switch control line to the digital signal processor  130 . The digital signal processor  130  will monitor the digital signal output from the ADC  125  to determine whether the digital signals are close to a threshold level or not. In the event that any one of the digital signals is close to the threshold level, the digital signal processor  130  will output on the gain switch control line  106  an instruction to reduce or attenuate the receive signal at one or more of the first gain switch  105 , the second gain switch  115  or the third gain switch  117 . Each one of the gain switches  105 ,  115  or  117  in all of the receive signal paths  102 - 1 ,  102 - 2 , . . . ,  102 -N are attenuated by substantially the same amount. 
         [0024]      FIG. 3  shows a second aspect of the invention employing a two stage downconversion. It will be appreciated that the first stage conversion is identical with the aspect shown and described in connection with  FIG. 3 . The second stage down conversion employs a bandpass filter  155  to remove out-off-band signals from the first mixer  110  before the output signals from the first mixer  110  are passed to an IF amplifier  160  prior to further downconversion in a second mixer  160 . The second mixer  160  is connected to a second local oscillator  145  and has output signals in the analogue domain which are passed through the bandpass filter  120  before being converted in the ADC  125 . 
         [0025]    The aspect shown in  FIG. 3  has four possible gain switches: a first gain switch  105  between the duplex filter  100  and the low noise amplifier  100 , a second gain switch  115  between the output of the low noise amplifier  200  and the input of the first mixer  110 , a fourth gain switch  150  between the output of the first mixer  110  and an input of the second band pass filter  155  and finally a third gain switch  117  between an output of the second mixer  160  and an input of the first bandpass filter  120 . As noted above it is not necessary for all of the four gain switches  105 ,  115 ,  150  or  117  to be present in each one of the receive signal paths  102 . Similarly as noted above the gain switch control line  102  is connected to all of the four gain switches  105 ,  115 ,  150  and  117  in each one of the receive signal paths  102  to attenuate incoming receive signals to substantially the same amount on all of the receive signal paths  102 . 
         [0026]      FIG. 4  shows a further aspect of the invention employing a single downconversion process for the receive signals. In this Figure the first mixer  110  of  FIG. 2  is replaced by a third mixer  214  and a fourth mixer  215  which receive the amplified (and possibly attenuated) receive signals from the low noise amplifier  200  through a third splitter  210 . Both the third mixer  214  and the fourth mixer  215  are connected to the first local oscillator  140  through the first splitter  142  and a 90° phase shifter  220 . The 90° phase shifter has two outputs: a first output passes the oscillator signal from the local oscillator  140  without any phase shift to the third mixer  214  and a second output from the 90° phase shifter passes the local oscillator signal with a 90° shift to the fourth mixer. The output of the third mixer  214  is therefore a downconverted I-component of the amplified (and possibly attenuated) received signal and the output of the fourth mixer  215  is a downconverted Q-component of the amplified (and possibly attenuated) receive signal. The output of the third mixer  214  is passed to a first low pass filter  230  to remove unwanted high frequency signals and thence to a second ADC  240  which digitises the downconverted I-component of the received signal and passes the downconverted I-component to the digital signal processor  130 . Similarly the output of the fourth mixer  215  is connected to a second low pass filter  235  and thence to a third analogue to digital converter  245  for passing the two components of the receive signal to the digital output converter. It will be seen that there is optionally a fourth gain switch  225  between the output of the fourth mixer  215  and the second low pass filter  235 . There is also an optional fifth gain switch  227  between the output of the third mixer  214  and the input of the first low pass filter  230 . 
         [0027]      FIG. 5  shows another aspect to the invention in which the first mixer  110  of the aspect illustrated in  FIG. 2  is replaced by a delta-sigma converter  310 . It will be appreciated that in this aspect of the invention there is no first mixer  110  present and therefore no local oscillator  140  present. The first gain switch  105  and/or a further gain switch  150  can be placed on either side of the low noise amplifier  200  which amplifies the receive signals. As noted above the amount of attenuation is controlled by a signal on the gain switch control line  106 . 
         [0028]      FIG. 6  shows a flow diagram illustrating the method for receiving a plurality of receive signals. In a first step  500  the receive signals are received at the plurality of antenna elements Ant. The amplitude of the plurality of individual receive signals may be reduced by attenuating the signal in  510  in one of the gain switches. It will be noted, as explained above, that substantially the same degree of attenuation is provided to all of the plurality of the receive signals. In step  520  the plurality of individual radio signals are converted from the analogue domain to the digital domain before being passed in step  530  to the digital signal processor  130 . 
         [0029]    In step  540  the digital signal processor  130  compares the amplitude of the digital signals with a threshold level and, if the amplitude is above or below the threshold level, a control signal will be issued in step  540  to at least one gain switch in each one of the receive signal paths  102 . Depending on the control signal the amount of attenuation will be adjusted in step  550  in at least one of the gain switches in all of the receive signal paths  102  to ensure that the analogue digital converter in the receive signal path  102  operates correctly. 
         [0030]    While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example, and not limitation. It will be apparent to persons skilled in the relevant arts that various changes in form and detail can be made therein without departing from the scope of the invention. In addition to using hardware (e.g., within or coupled to a central processing unit (“CPU”), micro processor, micro controller, digital signal processor, processor core, system on chip (“SOC”) or any other device), implementations may also be embodied in software (e.g. computer readable code, program code, and/or instructions disposed in any form, such as source, object or machine language) disposed for example in a computer useable (e.g. readable) medium configured to store the software. Such software can enable, for example, the function, fabrication, modelling, simulation, description and/or testing of the apparatus and methods describe herein. For example, this can be accomplished through the use of general program languages (e.g., C, C++), hardware description languages (HDL) including Verilog HDL, VHDL, and so on, or other available programs. Such software can be disposed in any known computer useable medium such as semiconductor, magnetic disc, or optical disc (e.g., CD-ROM, DVD-ROM, etc.). The software can also be disposed as a computer data signal embodied in a computer useable (e.g. readable) transmission medium (e.g., carrier wave or any other medium including digital, optical, analogue-based medium). Embodiments of the present invention may include methods of providing the apparatus described herein by providing software describing the apparatus and subsequently transmitting the software as a computer data signal over a communication network including the internet and intranets. 
         [0031]    It is understood that the apparatus and method describe herein may be included in a semiconductor intellectual property core, such as a micro processor core (e.g., embodied in HDL) and transformed to hardware in the production of integrated circuits. Additionally, the apparatus and methods described herein may be embodied as a combination of hardware and software. Thus, the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.