Abstract:
An integrated circuit including a structure of inductances on a semiconductor substrate, intended for operating at frequencies greater than several hundreds of MHz, including a first inductance formed by a conductive track and having first and second terminals respectively connected to each of the two ends of the conductive track, including a second inductance formed by the conductive track between the second terminal and any intermediary point of the conductive track connected to a third terminal, said second and third terminals forming the two terminals of the second inductance, and means for setting the third terminal to high impedance when the first inductance is used.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
   This application is a divisional of U.S. patent application Ser. No. 09/918,792, filed Jul. 30, 2001, now pending, which application is incorporated herein by reference in its entirety. 

   BACKGROUND OF THE INVENTION 
   1. Field of Invention 
   The present invention relates to inductances with shared values formed on a semiconductor substrate, and especially to such inductances intended for operating in a range of frequencies greater than several hundreds of MHz, which will be here called the RF range. 
   2. Description of the Related Art 
     FIG. 1  schematically shows a perspective view of an inductance L integrated on a semiconductor substrate  1 , intended for operating in the RF range. Inductance L includes a substantially planar conductive track  2  deposited on a first insulating layer  5  of the semiconductor substrate. Conductive track  2  forms a winding comprised of a succession of rectilinear segments arranged between a first end  3 , on the external side of the winding, and a second end  4 , on the internal side of the winding. The rectilinear segments forming the winding are substantially parallel two by two and separated by a constant distance. A first terminal A of inductance L is formed by end  3  of track  2 . A second terminal B of inductance L is connected to end  4  of track  2  via a conductive segment  6  passing under the segments of track  2 . 
     FIG. 2  schematically shows a circuit  8  for receiving RF signals using integrated inductances. Circuit  8  includes a first processing chain T 1  enabling reception of signals modulated on a carrier of frequency f 1 , for example, on the order of 900 MHz, and a second processing chain T 2  enabling reception of signals modulated on a carrier of frequency f 2 , for example on the order of 1800 MHz. Such a circuit is useable in a device like a cell phone provided for operating either only with frequency f 1 , or only with frequency f 2 , or indifferently with one of frequencies f 1  or f 2 . 
   Circuit  8  includes an input  10  connected to an antenna  12 . The first processing chain T 1  includes a low-noise amplifier  14 , a mixer  16 , and a first local oscillator (not shown). Amplifier  14 , provided for amplifying signals modulated on a carrier of frequency f 1 , is connected to input  10  and provides a differential signal to mixer  16 . Mixer  16  further receives a sinusoidal signal of frequency f 11  provided by the first local oscillator. It provides a signal of intermediary frequency IF=f 1 −f 11  to an output  18 . The second processing chain T 2  includes a low-noise amplifier  20 , a mixer  22 , and a second local oscillator (not shown). Amplifier  20 , provided to amplify signals modulated on a carrier of frequency f 2 , is connected to input  10  and provides a differential signal to mixer  22 . Circuit  22  also receives a sinusoidal signal of frequency f 12  generated by the second local oscillator and provides a signal of intermediary frequency IF=f 2 −f 12  to output  18 , the intermediary frequencies provided by mixers  16  and  22  being the same. A control means (not shown) activates one of the processing chains according to the desired frequency. 
   Mixer  16  includes a so-called “Gilbert cell” (not shown), having terminals G 1  and G 2  respectively connected to the first terminals A 1 , A 2  of two inductances L 1  and L 2 . The second terminals B 1  and B 2  of inductances L 1  and L 2  are connected to the circuit ground. Inductances L 1  and L 2  have equal values. When the Gilbert cell operates, the alternating currents flowing through inductances L 1  and L 2  have the same frequency, the same absolute value, and opposite directions. The value of inductances L 1  and L 2  is inversely proportional to the operating frequency. 
   Similarly, mixer  22  includes a Gilbert cell (not shown) having two terminals G 3  and G 4  respectively connected to the first terminals A 3 , A 4  of two inductances L 3  and L 4 . The second terminals B 3 , B 4  of inductances L 3  and L 4  are connected to the circuit ground. Inductances L 3  and L 4  have equal values. Frequency f 2  being greater than frequency f 1 , inductances L 3  and L 4  have a value smaller than that of inductances L 1 , L 2 . 
   In an implementation in integrated form of circuit  8 , the four inductances L 1 , L 2 , and L 3 , L 4  occupy a significant surface area, which increases the cost of the integrated circuit. 
   SUMMARY OF THE INVENTION 
   An embodiment of the present invention provides an inductance structure occupying a reduced surface on a semiconductor substrate. 
   Another embodiment of the present invention provides an integrated circuit including a structure of inductances on a semiconductor substrate, intended for operating at frequencies greater than several hundreds of MHz, including a first inductance formed by a conductive track and having first and second terminals respectively connected to each of the two ends of the conductive track, including a second inductance formed by the conductive track between the second terminal and any intermediary point of the conductive track connected to a third terminal, said second and third terminals forming the two terminals of the second inductance, and means for setting the third terminal to high impedance when the first inductance is used. 
   According to an embodiment of the present invention, the conductive track is formed of rectilinear segments. 
   According to an embodiment of the present invention, the conductive track is substantially of octagonal shape. 
   According to an embodiment of the present invention, said intermediary point is connected to the third terminal via a rectilinear conductive segment. 
   According to an embodiment of the present invention, said conductive segment is substantially perpendicular to the conductive track. 
   According to an embodiment of the present invention, the circuit includes at least one second inductance structure symmetrical to the first structure and formed of the same elements, in which the conductive tracks of the first and second structures are interleaved so that the two conductive tracks have the same length, and in which the distances from each of the intermediary points of each of the conductive tracks of the first and second inductance structures to the second end of said conductive tracks are equal. 
   According to an embodiment of the present invention, the circuit includes first and second processing chains, the first chain including a first mixer adapted to using a first frequency and the second chain including a second mixer adapted to using a second frequency, the first terminal of the first inductance being connected to the first mixer, the second terminal of the first inductance being connected to a circuit ground, and the third terminal of the second inductance being connected to the second mixer. 
   According to an embodiment of the present invention, the circuit includes a second inductance structure identical to the first structure, the first terminal of the first inductance of the second structure being connected to the first mixer, the second terminal of the first inductance of the second structure being connected to the circuit ground, and the third terminal of the second inductance of the second structure being connected to the second mixer. 
   The foregoing objects, features and advantages of the present invention, will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1 , previously described, shows a perspective view of a conventional inductance; 
       FIG. 2 , previously described, schematically shows a circuit using several inductances; 
       FIG. 3  schematically shows a top view of an inductance structure according of the present invention; 
       FIG. 4  schematically shows a circuit using the inductance structure according to the present invention; 
       FIG. 5  schematically shows a top view of a first alternative of the present invention; and 
       FIG. 6  schematically shows a top view of a second alternative of the present invention. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   Only those elements likely to ease the understanding of the present invention have been shown. Same references refer to same elements in the different drawings. 
   An embodiment of the present invention provides forming an integrated circuit including an inductance structure comprised of a first inductance formed of a conductive track, and of a second inductance formed between one end of the conductive track and any point of the conductive track, connected to a terminal by a connection conductive segment. Thus, a bi-band circuit like circuit  8  can use either the first inductance or the second inductance according to its operating mode. 
   Such an inductance structure implies the connection of a conductive segment to any intermediary point of the first inductance. Now, those skilled in the art have a strong prejudice following which the connection of such a conductive segment creates insuperable problems. Especially, those skilled in the art of the field of RF frequencies would think that a conductive segment connected to any point of the first inductance would increase the stray capacitance of the track forming the first inductance in a manner which would be difficult to quantify. Now, an increase in the stray capacitance of an inductance decreases the resonance frequency of a circuit incorporating this inductance. Further, those skilled in the art consider that the presence of an intermediary connection point causes an electromagnetic coupling due to the modified parasitic elements between the conductive segment and the conductive track, likely to modify the values of the inductances in a manner which is difficult to quantify. 
   A contribution of the present inventors has been to perform tests and to notice that the modification of the resonance frequencies of the first and second inductances by the unused conductive track segments is actually negligible if the first and second inductances are not simultaneously used, and if the ends of the unused track segments, and at least that of the conductive segment connected to the intermediary point, are maintained at high impedance. 
     FIG. 3  schematically shows a top view of an inductance structure L 5 , L 6  according to an embodiment of the present invention. Inductance L 5  includes a conductive track  38  forming a winding comprised of a succession of rectilinear segments between a first end  40 , on the external side of the winding, and a second end  42 , on the internal side of the winding. A first terminal A 5  of inductance L 5  is formed by the first end  40  of track  38 . A second terminal B 5  of inductance L 5  is connected to the second end of track  38  via a first conductive segment  44 . An inductance L 6  is formed by the portion of conductive layer  38  located between end  42  and a predetermined point J of track  38 . A second conductive segment  46  enables connecting point J to a first terminal A 6  of inductance L 6 . Preferably, conductive segment  46  is substantially perpendicular to the segments of track  38 . The second terminal of inductance L 6  is formed by terminal B 5 . 
   The applicant has acknowledged that, even in the RF range, the coupling existing between conductive segment  46  and track  38  has a negligible influence upon the value of inductance L 5  when terminal A 6  is maintained at high impedance. 
   Inductance structure L 5 , L 6  substantially occupies the same surface as inductance L 5  alone, which represents a considerable surface area gain. This structure applies to any circuit using a single one of the two inductances L 5 , L 6  at a time during which the terminal of the unused inductance can be maintained at high impedance. 
     FIG. 4  illustrates a bi-band circuit similar to that of  FIG. 2 , in which same references designate same elements. 
   Two inductance structures L 7 , L 8  on the one hand, and L 9 , L 10  on the other hand, replace inductances L 1 , L 3 , and L 2 , L 4  of the circuit of  FIG. 2 . Terminal G 1  of mixer  16  is connected to the first terminal, A 7 , of inductance L 7 . The second terminal, B 7 , of inductance L 7  is grounded. Terminal G 3  of mixer  22  is connected to the first terminal, A 8 , of inductance L 8 . Similarly, terminal G 2  of mixer  16  is connected to the first terminal, A 9 , of inductance L 9 . The second terminal of inductance L 9  is grounded. Terminal G 4  of mixer  22  is connected to the first terminal, A 10 , of inductance L 10 . 
   When the first processing chain T 1  is used, mixer  16  is activated and mixer  22  is deactivated. Inductances L 7  and L 9  are then used. Terminals G 3 , G 4  of mixer  22 , which is deactivated, are at high impedance. Similarly, when the second processing chain T 2  is used, mixer  22  is activated and mixer  16  is deactivated. Inductances L 8  and L 10  are used. Terminals G 1 , G 2  of mixer  16 , which is deactivated, then are at high impedance. 
   The surface area occupied by inductance structures L 7 , L 8 , and L 9 , L 10  according to the present invention is substantially half the surface area occupied by inductances L 1 , L 2 , L 3 , and L 4 . 
     FIG. 5  schematically shows a top view of a device including two structures of two inductances according to the present invention, respectively L 11 , L 12 , and L 13 , L 14 , which are symmetrical and interleaved. The first inductance L 11  includes a conductive track  50  formed of a succession of rectilinear segments arranged in a winding between a first end  52 , on the external side of the winding, and a second end  54 , on the internal side of the winding. The first terminal A 11  of inductance L 11  is formed by end  52  of track  50 . The second terminal B 11  of inductance L 11  is connected to end  54  of track  50  via a conductive segment  56 . 
   Inductance L 12  is formed by the portion of conductive track  50  located between end  54  and a predetermined point J 1  of track  50 . A conductive segment  58  enables connecting point J 1  to a first terminal A 12  of inductance L 12 . The second terminal of inductance L 12  is formed of terminal B 11 . 
   Inductance L 13  includes a conductive track  60  formed of a succession of rectilinear segments arranged according to a symmetrical winding with respect to the winding of conductive track  50 . The segments of track  60  cross the segments of track  50  in several points, by a contactless overlapping. Tracks  50 ,  60  have the same length and inductances L 11  and L 13  have the same value. Track  60  includes a first end  62 , on the external side of the winding, and a second end formed by the second end  54  of track  50 . The first terminal A 13  of inductance L 13  is formed by end  62  of track  60 . The second terminal of inductance L 13  is common with the second terminal B 11  of inductance L 1 . 
   Inductance L 14  is formed by the portion of conductive track  60  located between end  54  and a predetermined point J 2  of track  60 . A conductive segment  64  enables connecting point J 2  to a first terminal A 14  of inductance L 14 . The second terminal of inductance L 14  is formed by terminal B 11 . 
   Such an arrangement of tracks  50  and  60  can be used in the circuit of  FIG. 2 . Thus, the two inductances L 11 , L 13  can be used to replace inductances L 1  and L 2  while the two inductances L 12  and L 14  may be used to replace inductances L 3  and L 4 . Further, the proximity of terminals A 11  and A 13  eases the connection of inductance pair L 11  and L 13  respectively to terminals G 1  and G 2  of mixer  16  by tracks of same length and same impedance. Similarly, the proximity of terminals A 12  and A 14  eases the connection of inductance pair L 12  and L 14  respectively to terminals G 3  and G 4  of mixer  22 . 
   Of course, the present invention is likely to have various alterations, modifications, and improvements which will readily occur to those skilled in the art. Thus, the use of an inductance structure according to the present invention in a bi-band receive circuit such as the circuit of  FIG. 4  has been described. Of course, the inductance structure according to the present invention can be used in a bi-band transmit circuit and, generally, in any circuit comprised of two inductances used non-simultaneously. 
   Further, although, for clarity, inductances according to the present invention having a winding with a substantially square or rectangular shape have been shown in  FIGS. 3 and 5 , those skilled in the art will easily adapt the present invention to inductances having a winding with any shape. 
   As an example,  FIG. 6  shows an inductance structure L 15 , L 16  according to the present invention, the conductive track  70  of which has a substantially octagonal shape between a first end  72 , on the external side of the winding, and a second end  74 , on the internal side of the winding. A first terminal A 15  of inductance L 15  is formed by first end  72  of track  70 . A second terminal B 15  of inductance L 15  is connected to second end  74  of track  70  via a conductive segment  76 . Inductance L 16  is formed by the portion of conductive track  70  located between end  74  and a point J 3 . A second conductive segment  78  enables connecting point J 3  to a first terminal A 16  of inductance L 16 . The second terminal of inductance L 16  is formed by terminal B 15 . 
   In the foregoing description, the second inductance of the inductance structures according to the present invention is formed by the portion of the conductive track located between the second terminal of the first inductance and a predetermined point. However, those skilled in the art will easily adapt the present invention to the case where the second inductance is formed by the portion of the conductive layer located between the first terminal and said predetermined point. 
   Only inductance structures according to the present invention using one conductive track and including two inductances have been described, the second inductance being formed between a predetermined point of the conductive track and one end of the conductive track. The prejudice discarding the possibility of branching a conductive segment at any point of the conductive track having been overcome, it is believed that it is possible to adapt the present invention to a structure comprised of three inductances or more, each inductance being formed between a specific predetermined point of the conductive track and one end of the conductive track. 
   Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and the scope of the present invention. Accordingly, the foregoing description is by way of example only and is not intended to be limiting. The present invention is limited only as defined in the following claims and the equivalents thereto.