Abstract:
A method of forming metal posts. A fixture having an array of wire guide heads is provided. A conductive wire is threaded through a hole in each wire guide heads. The wire guide heads have a transient electric arcing mechanism for heating the conductive wire so that a teardrop shaped blob of material is formed at the tip of the conductive wire. The wire guide heads on the fixture are pulled towards a substrate, thereby forming a plurality of metal posts over the substrate. The technique of forming metal posts finds applications in the manufacturing of printed circuit board, package substrate (carrier) and silicon wafer.

Description:
CROSS-REFERENCE TO RELATED APPLICATION  
         [0001]    This application claims the priority benefit of Taiwan application serial no. 91101024, filed Jan. 23, 2002.  
         BACKGROUND OF THE INVENTION  
         [0002]    1. Field of Invention  
           [0003]    The present invention relates to a metal post manufacturing method. More particularly, the present invention relates to a metal post manufacturing method that involves the conduction of a transient electric arc welding using a conductive electrode. The metal posts serve as via plugs on a ceramic circuit board, a soft or hard plastic circuit board, a glass substrate or a silicon wafer.  
           [0004]    2. Description of Related Art  
           [0005]    Due to rapid progress in the electronic industry, electronic products continue to shrink in size and increase is functional capacity. In chip packaging area, ball grid array (BGA) and chip scale (CS) packages are developed through market&#39;s demand for miniaturization and highly integrated packages. In the manufacturing of printed circuit boards, a multi-layered structure is introduced to reduce area occupation of electronic circuits. To connect various circuit layers within the substrate of a ball grid array package or a chip scale package, a multi-layered printed circuit board or a wafer, conductive via plugs are often formed. Hence, dimensions of minor circuits and plugs within the substrate layer will largely affect the packing density of a package and the level of integration of a printed circuit board and a wafer.  
           [0006]    [0006]FIGS. 1 through 9 are schematic cross-sectional views showing the progression of steps for forming a conventional build-up substrate board. As shown in FIG. 1, an insulating core layer  100  having a conductive layer  102  on each side of the core layer  100  is provided. In general, the conductive layers  102  are copper layers.  
           [0007]    As shown in FIG. 2, a plurality of through holes  104  are formed in the insulating core layer  100  by laser drilling or mechanical drilling. A conductive layer  106  is formed on the sidewalls of the through holes  104  as well as the two surfaces of the insulating core layer  102 . The conductive layer  106  is also a copper layer. The conductive layer  106  is formed, for example, by forming a seeding layer before conducting an electroplating operation.  
           [0008]    As shown in FIGS. 3 and 4, a hole-filling operation is carried out. An insulating material  108  is deposited into the through holes  104 . The purpose of filling the through hole  104  is to prevent the intrusion of any moisture. Any moisture that gets into the through hole  104  may expand in the presence of heat to form popcorn-like bubbles. Thereafter, any insulating material  108  above the insulating core layer  100  is ground down to a suitable roughness level.  
           [0009]    As show in FIG. 5, a conductive layer  110  is formed over the second surface of the insulating core layer  100  globally. The conductive layer  110  covers the exposed insulating material  108  above the insulating core layer  100 . The conductive layer  110  is formed, for example, by forming a seeding layer before conducting an electroplating operation.  
           [0010]    As shown in FIG. 6, the conductive layer  110  on each side of the core layer  100  is patterned by coating a photoresist layer, conducting photo-exposure, developing the photoresist, etching the conductive layer  110  and removing the photoresist layer.  
           [0011]    As shown in FIG. 7, a dielectric layer  112  is formed over each side of the insulating core layer  100 . The dielectric layer  112  has a plurality of openings  114 . Each opening  114  exposes a portion of the conductive layer  110 .  
           [0012]    As shown in FIG. 8, a conductive layer  116  is formed over the dielectric layers  112 , the sidewalls of the openings  114 , and the exposed conductive layer  110 . The conductive layer  116  is formed, for example, by forming a seeding layer before conducting an electroplating operation.  
           [0013]    As shown in FIG. 9, conductive material is deposited into the openings  114  to form a plurality of via plugs  118 . The conductive layer  116  is patterned by coating a photoresist layer, conducting photo-exposure, developing the photoresist, etching the conductive layer  116  and removing the photoresist layer.  
           [0014]    In the conventional build-up substrate manufacturing method, the conductive layers  110  are electrically connected through a plug formed by a plating through-hole (PTH) process. The conductive layer  110  and the conductive layer  116  are electrically connected through a via plug  118 . In other words, to produce the build-up substrate, holes must be drilled to form the through holes  104 , electroplating must be conducted to form the conductive layers ( 106 ,  110  and  116 ) and insulating material  108  must be deposited to fill the through holes. Hence, the conventional fabrication method is both time consuming and complicated.  
           [0015]    Moreover, as the level of integration increases and the size of through holes  104  reduces to a diameter of 100 μm or less, the conventional method no longer can provide a suitable means of fabrication.  
         SUMMARY OF THE INVENTION  
         [0016]    Accordingly, one object of the present invention is to provide a metal post manufacturing method capable of producing via plugs having a dimension ranging from 1 to 200 μm. The metal post manufacturing method according to this invention is able to replace the conventional plating through-hole (PTH) process.  
           [0017]    To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a metal post manufacturing method. A fixture having an array of wire guide heads thereon is provided. Each wire guide head contains a conductive wire. A substrate receiving the metal posts is put under the wire guide heads of the fixture. The wire guide heads utilize the production of a transient electric arc to generate the energy necessary for transforming one end of the conductive wire into a dangling block of material having a teardrop shape underneath the guide head. Simultaneously, the entire fixture moves and pulls the array of wire guide heads down to form a plurality of metal posts over the substrate.  
           [0018]    In this invention, the conductive wire is made from a material such as aluminum, gold, silver, copper, platinum, zinc or lead-tin alloy. Alternatively, the conductive wire may contain a core material enclosed by one or more conductive material layers such as a copper layer enclosing a lead-tin core, a lead-tin layer enclosing a copper core or a tin or a silver layer enclosing an alloy steel core. In addition, the conductive wire may have a diameter ranging between 1 to 200 μm.  
           [0019]    In this invention, the wire guide heads move towards the substrate so that the teardrop shaped block of conductive material may attach to the substrate. Thereafter, the wire guide heads are pulled in the opposite direction away from the substrate so that height level of the metal post can be properly set. Height level of the metal posts may be modified according to the specification. To form a metal post having a height over the dielectric layer about 1 to 10 μm, a teardrop shaped block of conductive material is repeatedly formed over the one already attached. In addition, dimension of the metal posts can be controlled by choosing conductive wires with the optimum diameter, from smaller than 50 μm, between 50 to 100 μm, between 100 to 200 μm to 200 μm and beyond.  
           [0020]    The metal post manufacturing method according to this invention may also be applied to the fabrication of a printed circuit board, the substrate (carrier) of a package or a wafer.  
           [0021]    This invention also provides a method of forming a build-up substrate board. A carrier having a first conductive layer thereon is provided. The aforementioned metal post manufacturing method is applied to form a plurality of first metal posts over the first conductive layer. A first dielectric layer is formed over the first conductive layer. The first dielectric layer encloses the first metal posts but the upper ends of the first metal posts are exposed. A second conductive layer is formed over the first dielectric layer. Removing the carrier, the first conductive layer and the second conductive layer are concurrently patterned. Finally, a build-up process is carried out to form material layers over the first and the second conductive layer.  
           [0022]    In this invention, the first dielectric layer is formed, for example, by placing a sheet-shaped dielectric layer over the carrier. The first metal posts pierce through the sheet-shaped dielectric layer. The first dielectric layer may also be formed by spin coating operation or curtain coating, especially for a very fine metal post processing.  
           [0023]    After forming the first dielectric layer, a curing operation of the first dielectric layer may be carried out. Thereafter, the upper ends of the metal posts are pressed in a coining operation or laminated with the copper foil.  
           [0024]    In the build-up process, second metal posts may form over the substrate by conducting the same metal post manufacturing method. A dielectric layer and a conductive layer are sequentially formed. The conductive layer is patterned. The number of layers formed by the build-up process depends on actual requirements.  
           [0025]    To pattern the conductive layer, a seed layer is formed over the dielectric layer before forming the conductive layer. Thereafter, a patterned photoresist layer is formed over the conductive layer. The conductive layer and the seed layer outside the photoresist layer are removed together. Finally, the photoresist layer is also removed.  
           [0026]    In an alternative method of patterning the conductive layer, a seed layer is formed over the dielectric layer before forming a patterned photoresist layer over the seed layer so that a portion of the seed layer is exposed. Thereafter, a conductive layer is formed over the exposed seed layer. The photoresist layer is removed. Finally, the seed layer and a fraction of the thickness of the conductive layer are removed through a flash etching operation. In a flash etching operation, fine circuit lines are produced.  
           [0027]    It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0028]    The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings,  
         [0029]    [0029]FIGS. 1 through 9 are schematic cross-sectional views showing the progression of steps for forming a conventional build-up substrate board;  
         [0030]    [0030]FIGS. 10 through 19 are schematic cross-sectional views showing the progression of steps for forming a build-up substrate board according to a first preferred embodiment of this invention;  
         [0031]    [0031]FIGS. 10 through 17 and FIGS. 20 through 23 are schematic cross-sectional views showing the progression of steps for forming a build-up substrate board according to a second preferred embodiment of this invention;  
         [0032]    [0032]FIGS. 24 through 36 are schematic cross-sectional views showing the progression of steps for forming a build-up substrate board according to a third preferred embodiment of this invention;  
         [0033]    [0033]FIGS. 37 and 38 are schematic cross-sectional views showing alternative steps that can substitute for the steps shown in FIGS. 30 and 31; and  
         [0034]    [0034]FIGS. 39 through 44 are schematic cross-sectional views showing the progression of steps for forming a build-up substrate board according to a fourth preferred embodiment of this invention.  
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0035]    Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.  
         [0036]    [0036]FIGS. 10 through 19 are schematic cross-sectional views showing the progression of steps for forming a build-up substrate board according to a first preferred embodiment of this invention. As shown in FIG. 10, a carrier  200  having a conductive layer  202  thereon is provided. The conductive layer  202 , for example, can be a copper layer. A fixture  204  having a plurality of wire guide heads  206  therein is provided. The wire guide heads  206  have heat production capability. Each wire guide head  206  holds a conductive wire  208 . The conductive wire  208  is made from a material including, for example, aluminum, gold, silver, copper, platinum, zinc and lead-tin alloy. Alternatively, the conductive wire  208  may have a composite structure consisting of a first conductive layer enclosing a second conductive core layer such as a copper (Cu), gold (Au) or silver (Ag) material enclosing a lead-tin, tin or lead core; a lead-tin, tin or lead material enclosing a copper (Cu), gold (Au) or silver (Ag) core; and a tin, silver (Ag), copper (Cu), or gold (Au) material enclosing an alloy steel core. The conductive wire  208  has an outer diameter ranging between 1 to 200 μm or greater than 200 μm. In general, the conductive wire  208  has a diameter between 1 to 100 μm.  
         [0037]    As shown in FIG. 10, the fixture  204  is placed over the carrier  200 . The conductive wires  208  thread through the holes inside the wire guide heads  206 . By forming a transient electric arc through the conductive wire  208 , the conductive wire  208  is heated to a high temperature to form a teardrop shaped conductive blob  210  at the end of the conductive wire  208 .  
         [0038]    As shown in FIG. 11, the fixture  204  is driven to move towards the carrier  200  so that the teardrop shape blob  210  attaches to the conductive layer  202 . Thereafter, the fixture  204  is pulled away from the carrier  200  so that metal posts  212  are formed on the conductive layer  202 . The profile and height level of the metal posts  212  depend on the rapidity of movement of the fixture  204  and a proper control of the moving direction. Moreover, height of the metal posts  212  may be adjusted by repeating the aforementioned attachment operation. In this embodiment, the metal post  212  may have a height ranging from 1 to 10 μm above a subsequently formed dielectric layer  214 . Furthermore, dimension of the metal posts  212  is largely controlled by the diameter of the conductive wire deployed.  
         [0039]    As shown in FIG. 12, a dielectric layer  214  is formed over the conductive layer  202 . The dielectric layer  214  encloses the metal posts  212  but exposes the upper ends of the metal posts  212 . The dielectric layer  214  is formed, for example, by placing a dielectric sheet over the conductive layer  202  and permitting the metal posts  212  to pierce through the dielectric sheet. Alternatively, the dielectric layer  214  is formed over the conductive layer  202  by conducting a spin coating or a curtain coating operation.  
         [0040]    As shown in FIG. 13, the dielectric layer  214  is cured. A coining operation is carried out so that the upper ends of the metal posts  212  are flattened.  
         [0041]    As shown in FIG. 14, the carrier  200  is removed after the coining and curing operating. A conductive layer  216  is formed over the dielectric layer  214 . To ensure good electrical connection with the conductive layer  216 , the upper ends of the metal posts  212  are surface-treated by conducting a plasma etching operation or a plastic residue decontamination operation. The conductive layer  216  can be a copper layer formed, for example, by growing a seed layer over the dielectric layer  214  before conducting an electroplating operation.  
         [0042]    The coining and the curing of the dielectric layer  214  and the fabrication of the conductive layer  216  as shown in FIGS. 13 and 14 can be conducted concurrently. For example, the conductive layer  216  is formed over the dielectric layer  214  by conducting a vacuum high pressure stamping process so that the dielectric layer  214  is coined and cured at the same time.  
         [0043]    As shown in FIG. 15, the conductive layers  202  and  216  are patterned by forming a photoresist layer, conducting a photo-exposure of the photoresist layer, developing the photoresist layer chemically, etching the conductive layers  202  and  216  and finally removing the photoresist layer. The conductive layer  202  and the conductive layer  216  are connected through the metal posts  212  after the patterning operation.  
         [0044]    As shown in FIG. 16, metal posts  218  are formed on the patterned conductive layers  202  and  216 . A dielectric layer  220  is formed over the respective surfaces of the dielectric layer  214 . The dielectric layers  220  enclose the metal posts  218  but expose the upper ends of the metal posts  218 . The dielectric layers  220  are formed, for example, by placing a dielectric sheet over the dielectric layer  214  and permitting the metal posts  218  to pierce through the dielectric sheet. Alternatively, the dielectric layers  220  are formed over the dielectric layer  214  by conducting a spin coating or a curtain coating operation.  
         [0045]    As shown in FIG. 17, the dielectric layers  220  are cured. A coining operation is carried out so that the upper ends of the metal posts  218  are flattened to the same level as the dielectric layer  220 .  
         [0046]    As shown in FIG. 18, conductive layers  222  are formed over the dielectric layers  220 . To ensure good electrical connection with the conductive layers  222 , the upper ends of the metal posts  218  are surface-treated by conducting a plasma etching operation or a plastic residue decontamination operation. The conductive layers  222  can be a copper layer formed, for example, by growing a seed layer over the dielectric layers  220  before conducting an electroplating operation, or laminating with the copper foil directly.  
         [0047]    The coining and the curing of the dielectric layer  220  and the fabrication of the conductive layers  222  as shown in FIGS. 17 and 18 can be conducted concurrently. For example, the conductive layers  222  are formed over the dielectric layer  220  by conducting a vacuum high pressure stamping process so that the dielectric layers  220  are coined and cured at the same time.  
         [0048]    As shown in FIG. 19, the conductive layers  222  are patterned by forming a photoresist layer, conducting a photo-exposure of the photoresist layer, developing the photoresist layer chemically, etching the conductive layers  222  and finally removing the photoresist layer. The conductive layers  222  are electrically connected to the conductive layers  202  and  216  through the metal posts  218  after the patterning operation.  
         [0049]    [0049]FIGS. 10 through 17 and FIGS. 20 through 23 are schematic cross-sectional views showing the progression of steps for forming a build-up substrate board according to a second preferred embodiment of this invention. Since the initial steps from FIGS.  10  to  17  in the first embodiment are again used in the second embodiment, detailed description is omitted.  
         [0050]    As shown in FIG. 20, conductive layers  224  are formed over the respective dielectric layers  220  after the coining and the curing operation. To ensure good electrical connection with the conductive layers  224 , the upper ends of the metal posts  218  are surface-treated by conducting a plasma etching operation or a plastic residue decontamination operation. The conductive layer  224  can be a copper layer, for example. The conductive layers  224  later serves as a seed layer.  
         [0051]    As shown in FIGS. 21 and 22, photoresist layers  226  are formed over the respective conductive layers  224  by forming a photoresist layer over the conductive layers  224 , photo-exposing the photoresist layer and developing the exposed photoresist layer. Thereafter, conductive layers  228  are formed over the exposed conductive layers  224 . The conductive layer  228  can be a copper layer, for example.  
         [0052]    As shown in FIG. 23, the photoresist layer  226  is removed and the conductive layers  224  and  228  are concurrently etched. Since the conductive layer  224  has a thickness smaller than the conductive layer  228 , the etching operation is stopped as soon as the conductive layer  224  is completely removed and the dielectric layer  220  is exposed. The patterned conductive layers  228  are electrically connected to the conductive layer  202  and the conductive layer  216  respectively through the metal posts  218 .  
         [0053]    In the second embodiment, a flash etching technique is used to remove conductive layer  224  so that finer circuit lines are formed on the substrate board.  
         [0054]    [0054]FIGS. 24 through 36 are schematic cross-sectional views showing the progression of steps for forming a build-up substrate board according to a third preferred embodiment of this invention. As shown in FIG. 24, a carrier  300  having a conductive layer  302  thereon is provided. The conductive layer  302 , for example, can be a copper layer. A fixture  304  having a plurality of wire guide heads  306  therein is provided. The wire guide heads  306  have heat production capability. Each wire guide head  306  holds a conductive wire  308 . The conductive wire  308  is made from a material including, for example, aluminum, gold, silver, copper, platinum, zinc and lead-tin alloy. Alternatively, the conductive wire  308  may have a composite structure consisting of a first conductive layer enclosing a second conductive core layer such as a copper (Cu), gold (Au) or silver (Ag) material enclosing a lead-tin, tin or lead core; a lead-tin, tin or lead material enclosing a copper (Cu), gold (Au) or silver (Ag) core; and a tin, silver (Ag), copper (Cu), or gold (Au) material enclosing an alloy steel core. The conductive wire  308  has an outer diameter ranging between 1 to 200 μm or greater than 200 μm. In general, the conductive wire  308  has a diameter between 1 to 50 μm.  
         [0055]    As shown in FIG. 24, the fixture  304  is placed over the carrier  300 . The conductive wires  308  thread through the holes inside the wire guide heads  306 . By forming a transient electric arc through the conductive wire  308 , the conductive wire  308  is heated to a high temperature to form a teardrop shaped conductive blob  310  at the end of the conductive wire  308 .  
         [0056]    As shown in FIG. 25, the fixture  304  is driven to move towards the carrier  300  so that the teardrop shape blob  310  attaches to the conductive layer  302 . Thereafter, the fixture  304  is pulled away from the carrier  300  so that metal posts  312  are formed on the conductive layer  302 . The profile and height level of the metal posts  312  depend on the rapidity of movement of the fixture  304  and a proper control of the moving direction. Moreover, height of the metal posts  312  may be adjusted by repeating the aforementioned attachment operation. In this embodiment, the metal post  312  may have a height ranging from 1 to 10 μm above a subsequently formed dielectric layer  314 . Furthermore, dimension of the metal posts  312  is largely controlled by the diameter of the conductive wire deployed. In general, diameter of the metal posts  312  is under 50 μm, between 50 to 100 μm, between 100 to 200 μm or above 200 μm.  
         [0057]    As shown in FIG. 26, a dielectric layer  314  is formed over the conductive layer  302 . The dielectric layer  314  encloses the metal posts  312  but exposes the upper ends of the metal posts  312 . The dielectric layer  314  is formed, for example, by placing a single or multiple layered dielectric sheet over the conductive layer  302  and permitting the metal posts  312  to pierce through the dielectric sheet. Alternatively, the dielectric layer  314  is formed over the conductive layer  302  by conducting a spin coating or a curtain coating operation.  
         [0058]    As shown in FIG. 27, the dielectric layer  314  is cured. A coining operation is carried out so that the upper ends of the metal posts  312  are flattened.  
         [0059]    As shown in FIG. 28, the carrier  300  is removed after the coining and curing operating. A conductive layer  316  is formed over the dielectric layer  314 . To ensure good electrical connection with the conductive layer  316 , the upper ends of the metal posts  312  are surface-treated by conducting a plasma etching operation or a plastic residue decontamination operation. The conductive layer  316  can be a copper layer formed, for example, by growing a seed layer over the dielectric layer  314  before conducting an electroplating operation.  
         [0060]    The coining and the curing of the dielectric layer  314  and the fabrication of the conductive layer  316  as shown in FIGS. 27 and 28 can be conducted concurrently. For example, the conductive layer  316  is formed over the dielectric layer  314  by conducting a vacuum high pressure stamping process so that the dielectric layer  314  is coined and cured at the same time.  
         [0061]    As shown in FIG. 29, the conductive layers  302  and  316  are patterned by forming a photoresist layer, conducting a photo-exposure of the photoresist layer, developing the photoresist layer chemically, etching the conductive layers  302  and  316  and finally removing the photoresist layer. The conductive layer  302  and the conductive layer  316  are electrically connected through the metal posts  312  after the patterning operation.  
         [0062]    As shown in FIG. 30, dielectric layers  320  are formed over the conductive layers  302  and  316  respectively. The dielectric layer  320  has a plurality of openings  328  that expose the conductive layers  302  and  316 . The dielectric layers  320  are formed over the conductive layer  302  and the conductive layer  316 , for example, by spin coating or curtain coating.  
         [0063]    As shown in FIG. 31, metallic material is deposited into the openings  328  to form metal posts  318 . The dielectric layer  320  encloses the conductive posts  318  and exposes only the top ends of the conductive posts  318 .  
         [0064]    As shown in FIG. 32, a coining operation is carried out so that the upper ends of the metal posts  318  are flattened to the same level as the dielectric layer  320 .  
         [0065]    As shown in FIG. 33, conductive layers  322  are formed over the dielectric layers  320 . The conductive layers  322  are copper layers, for example. The conductive layers  322  serve as a seed layer for subsequent use.  
         [0066]    As shown in FIGS. 34 and 35, a photoresist layer  326  is formed over the respective conductive layers  322  by forming a photoresist layer, exposing the photoresist layer to light and developing the exposed photoresist layer chemically. Conductive layers  324  are formed over the exposed conductive layers  322 . In fact, the photoresist layer  326  determines the locations for forming the conductive layers  324 . The conductive layers  324  are, for example, copper layers. In this embodiment, a flash etching technique is used to remove the conductive layer  322  so that finer circuit lines are formed on the substrate board.  
         [0067]    As shown in FIG. 36, the photoresist layer  326  is removed and the conductive layers  322  and  324  are concurrently etched. Since the conductive layer  322  has a thickness smaller than the conductive layer  324 , the etching operation is stopped as soon as the conductive layer  322  is completely removed and the dielectric layer  320  is exposed. The patterned conductive layers  324  are electrically connected to the conductive layer  302  and the conductive layer  316  respectively through the metal posts  318 .  
         [0068]    [0068]FIGS. 37 and 38 are schematic cross-sectional views showing alternative steps that can substitute for the steps shown in FIGS. 30 and 31. As shown in FIGS. 37 and 38, metal posts  318  are formed over the conductive layers  302  and  316  before forming the dielectric layer  320 . The sequence is exactly the opposite of the one shown in FIGS. 30 and 31, where the dielectric layer  320  is formed before the metal posts  318 .  
         [0069]    [0069]FIGS. 39 through 44 are schematic cross-sectional views showing the progression of steps for forming a build-up substrate board according to a fourth preferred embodiment of this invention. As shown in FIG. 39, a substrate board with plugged holes is provided. The substrate board can be a single or a multiple-layered board, a multiple-layered soft circuit board, a multiple-layered hard circuit board or a wafer. The substrate board comprises an insulating core layer  400  having a plurality of plated through holes (PTH)  401  and a conductive layer  402  on each side of the insulating core layer  400 . The conductive layer  402 , for example, can be a copper layer. A fixture  404  having a plurality of wire guide heads  406  therein is provided. The wire guide heads  406  have heat production capability. Each wire guide head  406  holds a conductive wire  408 . The conductive wires  408  are made from a material including, for example, aluminum, gold, silver, copper, platinum, zinc and lead-tin alloy. Alternatively, the conductive wires  408  may have a composite structure consisting of a first conductive layer enclosing a second conductive core layer such as a copper (Cu), gold (Au) or silver (Ag) material enclosing a lead-tin, tin or lead core; a lead-tin, tin or lead material enclosing a copper (Cu), gold (Au) or silver (Ag) core; and a tin, silver (Ag), copper (Cu), or gold (Au) material enclosing an alloy steel core. The conductive wires  408  have an outer diameter ranging between 1 to 200 μm or greater than 200 μm. In general, the conductive wires 208 have a diameter between  1  to 50 μm.  
         [0070]    As shown in FIG. 39, the fixture  404  is placed over the insulation core layer  400  having plugged holes therein. The conductive wires  408  thread through the holes inside the wire guide heads  406 . By forming a transient electric arc through the conductive wire  408 , the conductive wire  408  is heated to a high temperature to form a teardrop shaped conductive blob  410  at the end of the conductive wire  408 .  
         [0071]    As shown in FIG. 40, the fixture  404  is driven to move towards the insulation core layer  400  so that the teardrop shape blob  410  is attached to the conductive layer  402 . Thereafter, the fixture  404  is pulled away from the insulating core layer  400  so that metal posts  412  are formed on the conductive layer  402 . The profile and height level of the metal posts  412  depend on the rapidity of movement of the fixture  404  and a proper control of the moving direction. Moreover, height of the metal posts  412  may be adjusted by repeating the aforementioned attachment operation. In this embodiment, the metal post  412  may have a height ranging from 1 to 10 μm above a subsequently formed dielectric layer  414 . Furthermore, dimension of the metal posts  412  is largely controlled by the diameter of the conductive wire deployed. In general, diameter of the metal posts  412  is under 50 μm, between 50 to 100 μm, between 100 to 200 μm or above 200 μm.  
         [0072]    A dielectric layer  414  is formed over the conductive layer  402 . The dielectric layer  414  encloses the metal posts  412  but exposes the upper ends of the metal posts  412 . The dielectric layer  414  is formed, for example, by placing a dielectric sheet over the conductive layer  402  and permitting the metal posts  412  to pierce through the dielectric sheet. Alternatively, the dielectric layer  414  is formed over the conductive layer  402  by conducting a spin coating or a curtain coating operation.  
         [0073]    As shown in FIG. 41, the dielectric layer  414  is cured. A coining operation is carried out so that the upper ends of the metal posts  412  are flattened.  
         [0074]    As shown in FIG. 42, the processes described in FIGS. 40 and 41 are repeated to form metal posts  412  and an enclosing dielectric layer  414  over the other side of the insulating core layer  400 . Similarly, coining operation is carried out to flatten the upper ends of the metal posts  412 .  
         [0075]    As shown in FIG. 43, a conductive layer  420  is formed over the dielectric layer  414 . To ensure good electrical connection with the conductive layer  420 , the upper ends of the metal posts  412  are surface-treated by conducting a plasma etching operation or a plastic residue decontamination operation. The conductive layer  420  can be a copper layer formed, for example, by growing a seed layer over the dielectric layer  414  before conducting an electroplating operation.  
         [0076]    The coining and the curing of the dielectric layer  414  and the fabrication of the conductive layer  402  as shown in FIGS.  42  and the formation of the conductive layer  420  as shown in FIG. 43 can be conducted concurrently. For example, the conductive layer  420  is formed over the dielectric layer  414  by conducting a vacuum high pressure stamping process so that the dielectric layer  414  is coined and cured at the same time.  
         [0077]    As shown in FIG. 44, the conductive layers  402  and  420  are patterned by forming a photoresist layer, conducting a photo-exposure of the photoresist layer, developing the photoresist layer chemically, etching the conductive layers  402  and  420  and finally removing the photoresist layer. The conductive layer  402  and the conductive layer  420  are connected through the metal posts  412  after the patterning operation.  
         [0078]    The method of forming a build-up substrate according to this invention can be applied to the fabrication of a printed circuit board or a package substrate (carrier). Furthermore, the technique for forming metal posts can be applied to produce the via plugs in a printed circuit board, a packaging substrate (carrier) or a silicon wafer.  
         [0079]    In conclusion, major advantages of this invention includes:  
         [0080]    1. Metal posts are formed quickly.  
         [0081]    2. Height level of metal posts can be adjusted by repeating the teardrop attachment operation.  
         [0082]    3. The metal post fabrication process permits the production of metal posts with very small diameters through the use of very fine metallic wires.  
         [0083]    4. The way metal posts are produced eliminates the need for complicated processing steps including drilling, electroplating and hole plugging.  
         [0084]    It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.