Abstract:
An apparatus and method relative to the operating of a control turn-off semiconductor device provide for determining the actual control electrode to cathode voltage upon the application of a turn-off control signal by adjusting the apparent value of that voltage by a value representing the voltage drop due to inductance in lead lines. The thusly adjusted value is employed to develop an output signal which indicates that the device has been turned off. In a further embodiment, the output signal may also be employed to reduce the value of the control signal from a first, relatively high value to a second, relatively low value.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates generally to the operation of control turn-off semiconductor devices and more particularly to a method and apparatus for determining, with respect to such a device, the control electrode to cathode junction voltage and the use of that determined voltage in the control of a signal utilized to render the device nonconductive. 
     Many power conversion and control systems presently in use employ semiconductor devices of the type generally referred to as control turn-off semiconductors. These semiconductor devices are of two general types, namely, power transistors and gate turn-off thyristors (GTOs). Although the GTO is more prevalent in today&#39;s applications, particularly in higher power applications, both device types have the common attributes of three electrodes which, although the commonly used terminology may vary, are basically an anode, a cathode and a control electrode, often referred to as a gate. These devices are rendered conductive (turned on) by a first type signal (normally positive) and rendered nonconductive (turned off) by a second type signal (usually negative). The magnitude of the signal required to turn a device off, however, and particularly in the case of the GTO, may be many times (e.g., 25 to 30) the magnitude of the signal required to turn the device on. For this reason, the greater problems are normally experienced with turning these devices off. 
     In many applications of the control turn-off semiconductor it is desirable to know the extant value of the control electrode to cathode junction voltage. A common purpose is to determine the conductive state of the semiconductor device for control purposes and for alarm or shutdown purposes, if the device is conducting at an improper time. An example of such a system is found in U.S. Pat. No. 4,641,231 &#34;Apparatus and Method for Failure Testing of a Control Turn-Off Semiconductor&#34; by Loren H. Walker and Georges R. Lezan, which patent is assigned to the assignee of the present invention and which patent is specifically incorporated hereinto by reference. That patent describes a typical power conversion scheme in which two semiconductors are connected in a series arrangement (commonly referred to as a leg) between the buses of a dc source. As illustrated in that patent, the commonly used three-phase converter has three legs each connected in mutual parallel between negative and positive dc buses. The semiconductors of the legs are rendered conductive in a predetermined order or sequence to control the ac electric power delivered from the bus to a load. If both semiconductors of any one leg become simultaneously conductive, it is apparent that a short circuit will exist between the two buses, which may result in damage to the load, the power source, and/or the semiconductors themselves. 
     The above cited patent employs the control electrode to cathode junction voltage in a scheme as just described. In that patent, a driver circuit (driver) is used to supply negative signals to the control electrode (gate of a GTO) to render the device nonconductive. It is assumed that the voltage at the output of the driver is the same as the control electrode to cathode junction voltage of the device itself. The value of this signal is directly compared to a fixed reference voltage to determine the conductive state of the device. That is, when the sensed voltage of this junction exceeds a value, that is an indication of a good device and a nonconducting or off condition. This indication, in the system described in that patent, allows the other semiconductor device or GTO of the leg to be turned on. In devices having relatively small current ratings, the direct sensing scheme as taught by the patent is entirely valid since the voltage drop due to lead inductance is relatively small with the smaller currents required to control the GTO. In fact, an inductance is often added to the driver circuit to limit the rate of current change (i.e., di/dt) and to protect the GTO. With higher rated devices, however, the magnitude of the current signal required to turn the device off (for example, 700 amperes) results in a voltage drop across the lead inductance (L di/dt) which may be so large as to obscure the true value of the control electrode to cathode voltage if the voltage at the output of the driver circuit is considered. While it is possible to employ a separate set of leads solely for purposes of voltage sensing, this is often not practical because of the particular physical configuration of the device and/or the structure of the heat sinks associated with the device. 
     A further problem with higher rated systems is that lead inductance severely limits the rate of change in the current (di/dt) for any given driver circuit voltage. While the use of a higher drive circuit voltage will provide sufficient di/dt for turn-off, if these higher voltages are allowed to remain across the control electrode to cathode junction once the semiconductor has been rendered nonconductive, the device may be destroyed because of excess reverse avalanche power. 
     SUMMARY OF THE INVENTION 
     It is, therefore, an object of the present invention to provide an improved method and apparatus for determining the control electrode to cathode junction voltage of a control turn-off semiconductor device. 
     It is a further object to provide a scheme to determine the control electrode to cathode junction voltage on a control turn-off device through measurement remote from the actual junction. 
     It is an additional object to determine the voltage of the control electrode to cathode junction of a control turn-off device through the adjustment of the apparent voltage by the voltage drop in the leads to the junction electrodes. 
     It is a still further object to determine the control electrode to cathode junction voltage of a control turn-off device and to employ that determination to control the power to the control electrode of the device to better assure turn-off while protecting the device from excess reverse avalanche power. 
     The foregoing and other objects are achieved, in accordance with the present invention, by the development of a first signal representing the voltage of the control signal to the control electrode at the output of a drive circuit which supplies that control signal. A second signal representing the voltage drop existing through the conductor or leads transmitting that control signal is also developed. The second signal is combined with the first, as by subtracting, to yield a third signal representative of the actual control electrode to cathode junction voltage. This third signal can be used in a scheme for protection and/or controlling the operation of other devices within the system. In accordance with a further embodiment of the present invention the third signal is used to control the magnitude of the power of the control signal furnished by a drive circuit in order to permit the initial use of a higher voltage to better insure turn-off while subsequently protecting the device from excess reverse avalanche power. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     While the present invention is defined in particularity in the claims annexed to and forming a part of this specification, a better understanding thereof can be had by reference to the following description taken in conjunction with the accompanying drawing in which: 
     FIG. 1 is a schematic diagram illustrating the present invention in its preferred physical embodiment; and, 
     FIG. 2 shows waveforms helpful in the understanding and the operation of the circuit depicted in FIG. 1 and the method of the present invention. 
    
    
     DETAILED DESCRIPTION 
     Reference is now made to FIG. 1 which illustrates the circuitry of the preferred embodiment of the present invention. A control turn-off semiconductor device 10, illustrated as a GTO, includes an anode A, a cathode K and a control electrode or gate G. The GTO 10 is connected between a positive bus 12 and a negative bus 14 by conductors 11 and 13. As is common and indicated by the break in line 13 between the cathode K and the bus 14, other devices and circuitry may exist in circuit with the GTO 10. Normally, in a polyphase power conversion system, one or more additional devices would be connected in series with the device 10. GTO 10 is connected to a driver circuit 16 by way of two conductors (leads) 18 and 20. Driver circuit 16, in response to input commands on an input line 24, as well as on line 46 as will be further described, serves to apply control (gating) signals to the control electrode to cathode junction to render the device 10 selectively in the conductive (on) and nonconductive (off) conditions. As is understood in the art, in a typical application, a positive signal of proper magnitude on line 18 to the gate electrode G will render the GTO conductive, while the application of an appropriate negative signal on that line will render the device nonconductive. (Customarily, a much larger magnitude signal is required to turn the device off than to turn it on; for example, a ratio in the range of about 25-30 to 1.) The exact nature of the driver circuit is not important to the present invention and it may take any suitable form common in the art. One well known type of driver circuit includes electronic switch devices such as field effect transistors (fets) which serve, in response to input commands, to connect supply buses to the conductors 18 and 20. Typically, consistent with the previous discussion, the positive bus voltage is smaller than the negative bus voltage. Most importantly, however, the driver circuit must provide the current requirements of the relative negative and positive gate signals of the ratio earlier described. As will be further understood as this description proceeds, the driver circuit 16 utilized in accordance with the present invention may include two different voltage levels (buses) for turn-off operation. 
     Included within a dashed line block 22, respectively in lines 18 and 20, are two inductances L G  and L K . These inductances do not actually exist as discrete entities as shown but are distributed along the length of lead lines connecting the driver circuit 16 to the respective electrodes of the device 10. Points D and C at the output of driver circuit 16 are designated as reference points for various signals to be described. Point D on line 18 is the reference point for driver circuit output voltages to the logic ground point C on line 20. 
     A current transformer 34 has one end connected to conductor 20 and is positioned around line 18 to be responsive to currents therein. Current transformer 34 is preferably of the &#34;miniature&#34; type having a high exciting current so that it may be thought of as generating a secondary voltage which is a measure of the rate of change of current in line 18 (i.e., di/dt). Current transformer 34 may be, for example, of the air core or ferrite core types with the air core type being preferred since a ferrite core transformer might, in certain circumstances, exhibit saturation characteristics which would require additional circuitry for reset purposes. The other end of current transformer 34 is connected by way of a variable resistor 32 to circuit node 38. The output of the current transformer 34 is a voltage proportional to the rate of change (di G ) of the gate current in lead 18. 
     A second connection to node 38, by way of resistor 28 connected to node 36 on gate lead 18, provides a signal to node 38 representing the driver output voltage. Node 38 is further connected to logic ground by way of a resistor 30. 
     The resistor network formed by resistors 28, 30 and 32 is the summing network which combines the driver circuit output voltage to the signal proportional to the rate of change of gate current (di G ) to thus reconstruct, at node 38, a voltage proportional to the instantaneous voltage at the gate to cathode voltage of the GTO 10. By properly adjusting the value of resistor 32 with respect to the value of resistor 28, the gain of the network 32, 28, 30 can be made such that the voltage at node 38 will have the same waveform as the gate to cathode junction voltage of GTO 10. One way of accomplishing the adjustment of resistor 32 is to observe by way of, for example, an oscilloscope, the voltage at node 38. The value of resistor 32 will be essentially a constant for a given configuration of drive circuit and lead lines and once set does not require frequent adjustment. It is noted that the setting of resistor 32 is not highly critical. 
     The signal at node 38, the representation of the voltage at the gate to cathode junction is applied as one input to a comparator 40. The other input of comparator 40, applied via line 42, is a fixed voltage from a reference source -V 1 . The value of voltage -V 1  is normally about one-half the reverse avalanche voltage of the GTO 10. When the gate to cathode voltage represented at node 38 becomes less than -V 1 , comparator 40 provides an output signal on line 44 indicating that the GTO 10 has been rendered nonconductive. This signal may be used, for example, to indicate that it is now safe to fire other devices which are in series with device 10 without creating, as illustrated in FIG. 1, a short between buses 12 and 14. The output at line 44 corresponds directly to the output of the comparators (30, 32) shown in the aforementioned U.S. Pat. No. 4,641,231 and this output on line 44 may be used for the purposes defined in that patent. 
     The output of comparator 40 is also applied, via line 46, to the driver circuit 16. This signal, in accordance with the second feature of the present invention, is used to reduce the output of the driver circuit 16 from an initial value which was adequate to provide sufficient di/dt to render the GTO nonconductive (but which if retained might damage that device) to a value which is safe for steady state application to device 10. This feature, as earlier indicated, requires a dual negative output capability from drive current 16 and is more fully understood from FIG. 2. 
     The waveforms of FIG. 2 illustrate the operation of the circuitry of FIG. 1 and the method of the present invention. As shown in FIG. 2, in the upper trace, waveshape V D  is the output of the driver circuit as seen at point D on line 18. Waveform V GK , shown in heavy dashed line, illustrates the actual voltage across the gate to cathode junction of GTO 10. The difference between these two voltages would be the voltage that is dropped across the distributed lead inductances L G  and L K . Prior to time t 1 , the V D  signal is positive indicating a conducting state of the GTO. At time t 1 , the driver circuit initiates a turn-off signal and thus applies a large negative voltage to the control electrode (gate) of device 10. This large negative voltage causes a rapid rate of change (negative) in gate current (I G ) as shown in the center trace of FIG. 2. At time t 2  the gate to cathode voltage (V GK ) decreases suddenly to level V A , the negative avalanche voltage of the gate to cathode junction. This V A  voltage is seen as the signal which appears in node 38 (FIG. 1) and is applied to comparator 40 which detects this rise in voltage and sends a signal, via line 46, to the gate driver circuit 16 commanding that gate driver to reduce the reverse drive voltage on conductor 18 to some lesser value; for example, a value slightly lower than gate avalanche voltage V A . At time t 3 , driver circuit 16 responds to the command on line 46 and drops the voltage V D  to that value. The time between times t 2  and t 3  should be minimized in the design of the driver circuit. That is, that response time of the circuit 16 should be as fast as practical. 
     The center trace in FIG. 2 shows the waveform of the gate current I G . It is seen that it rises rapidly in the reverse direction between times t 1  and t 2  under the influence of the large negative V D  voltage. At time t 2  the back emf introduced by the avalanche voltage of the GTO reduces the rate of change in I G  (period t 2  to t 3 ). At time t 3  the drive voltage V D  becomes smaller than the reverse avalanche voltage and the sense of the rate of change of I G  reverses. At time t 4  the reverse gate current matches the so-called &#34;tail current&#34; of the GTO, and the GTO controls its own gate current during the period t 4  and t 5 . (Tail current is the anode to gate current after the anode to cathode current of the GTO has been reduced to zero). At time t 6  the reduced V D  voltage may be removed since the tail current has gone to zero. However, whether or not this hard voltage is removed is basically immaterial since, if this voltage as shown after time t 3  is less than the avalanche voltage of the device, no harm will be done by leaving this voltage on. If the voltage is removed, however, time t 6  becomes the minimum off signal time for the driver circuit 16. After time t 6  there is no need to change the output of the driver circuit unless the main controls call for the GTO to turn on again. 
     The bottom trace on FIG. 2 is the rate of current change signal di G  as it appears across the current transformer 34. In accordance with the previous discussion, this signal represents the voltage drop across the lead inductances (L G  and L K ). The V GK  signal is derived by subtracting the di G  signal of the lower trace from the V D  signal of the upper trace. This subtraction is accomplished by the resistor summing network, resistors 28, 30 and 32 in FIG. 1. 
     As a safety feature, so as to prevent damage to the semiconductor device 10, the driver circuit 16 might include a timing feature which would limit the time the large negative voltage (V D ), shown between times t 1  and t 2 , is applied to device 10. 
     While there have been known and described what are presently considered to be the of the preferred embodiments of the present invention, modifications thereto will readily occur to those skilled in the art. It is not desired, therefore, that the present invention be limited to the specific arrangements shown and described and it is intended to cover, in the appended claims, all such modifications as fall within the true spirit and scope of the invention.