Abstract:
The key comprises a movable part guided in a fixed support on a base plate and contacts which are closed when the key is depressed against the action of a return spring. The symbol associated with the key is displayed through a window in the key top by an LCD device with a matrix of display areas controlled by an integrated circuit bonded to the underside of the LCD device and fed with signals from the CPU via conductors which enable the integrated circuit to be programmed to define the symbol to be displayed, whereby the keys of a keyboard can be set to match the language currently being used. In an alternative embodiment the key is supported by a flat cable connected with an input circuit of the keyboard and the terminals of the LCD device.

Description:
BACKGROUND OF THE INVENTION 
     The present invention concerns a key for the input of data with a selective symbol display and a keyboard using this key. 
     A key of the diaphragm type is known, which, in the lower part thereof, comprises a liquid crystal display and, above the display, a flixible transparent film separated from the display by a suitable spacer. Two wires which are respectively deposited on the upper part of the display and on the lower part of the transparent film can come into contact to generate an input signal as a result of the transparent film being operated by means of a finger. Selective activation of the various areas permits the key to display a plurality of symbols. On the other hand, a key of that type has rather limited reliability and ergonomic characteristics and is not suitable in particular for keyboard operation for typewriters in which an error in finger operation causes incorrect characters to be printed. Furthermore, the use of a key of that type in a keyboard requires a large number of conductors for activation of the various areas, giving rise to major problems in regard to space and reliability. 
     SUMMARY OF THE INVENTION 
     An object of the present invention is to provide a key having an activatable display for the representation of a plurality of symbols, which has reliability and ergonomic characteristics which are comparable to those of keys used in the better electronic typewriters which are available on the market at the present time. 
     Another object of the invention is to provide a keyboard using a plurality of keys having selectively activatable symbol display which has a reduced number of connections for activation of the various areas of the display. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention will be described in more detail, by way of example, with reference to the accompaying drawings, in which: 
     FIg. 1 is a diagrammatical sectional view of a key according to the invention, 
     FIG. 2 is a view of a detail from FIG. 1, 
     FIG. 3 is a second view of the detail shown in FIG. 2, 
     FIG. 4 is a diagrammatic view of a keyboard according to the invention, 
     FIG. 5 is a block circuit diagram of the keyboard shown in FIG. 4, 
     FIG. 6 shows some electrical signals of the circuit shown in FIG. 5, 
     FIG. 7 is a detail from FIG. 5, 
     FIG. 8 is an alternative form of the block shown in FIG. 5, 
     FIG. 9 is a second alternative form of the block shown in FIG. 5, 
     FIG. 10 is an alternative form of the key shown in FIG. 1, and 
     FIG. 11 is another alternative form of the key shown in FIG. 1. 
     FIG. 12 is a further alternative form of the key according to the invention. 
     FIG. 13 is a top view of the key of FIG. 12. 
     FIG. 14 is a view of the key of FIGS. 12 and 13. 
     FIG. 15 is a third alternative form of the block shown in FIG. 5. 
     FIG. 16 is a detail from FIG. 15. 
     FIG. 17 shows signals from the circuit of FIG. 15. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Referred to FIGS. 1 and 11, a key 20 comprises a support 23, 123 which slidably guides a movable part 24, 124 provided in its upper portion with a finger-operable cap 25, 125 and normally held in a raised position by resilient means 26, 126. 
     The support 23, 123 is mounted in a fixed position with respect to a base plate 27, 127 which is provided with conductors 28, 128 which are electrically connected together by a movable contact 29, 129 which is movable by the movable part 24, 124. A key 20 in which the movable contact 29 is carried by a rubber `dome portion` 57 and the means 26 are formed by a coil spring is described in the U.S. Pat. No. 4,602,138, assigned to Ing. C. Olivetti &amp; C., S.p.A. to which reference is made for further details. In the case of the key 120 shown in FIG. 11, the resilient means 126 are formed exclusively by a `dome portion` similar to the dome portion 57 in FIG. 1. 
     In accordance with the invention, the cap 125, 25 is transparent or comprises a transparent portion 30 respectively. Fixed below the finger-operable portion of the cap 25, 125 is a liquid crystal display 31 (LCD), comprising and upper glass 32 and a lower glass 33. A double series of conductors which are distributed in the two glasses in twenty four rows 34 and thirty two columns 35 defines a matrix of areas as indicated at 36 (see FIG. 2) in a nematic liquid interposed between the two glass plates 32 and 33. Reflectance and transparency of the areas 36 can be modified electrically by the signals of the conductors 34 and 35 in per se known manner and in their whole define the symbol associated with the key, which can be easily observed through the transparent portion 30 or 125. The number of areas is sufficient for even the most complicated symbols of oriental languages to be recognised. 
     The conductors 34 and 35 of the display 31 are electrically connected to the output conductors of a microcircuit (chip) 40 (see FIG. 3). The chip 40 is fixed to the lower glass plate 33 of the display 31, for example by means of epoxy resin, and the output conductors thereof are electrically connected to the conductors 34 and 35 by means of the conductors 41 and 42 which are integrated on the glass plate 33 by screen printing. 
     The input conductors of the chip 40 are electrically connected to at least two other conductors 42 and 46 which are integrated on the glass plate 34 and which in turn are connected for example by flat cables 43 and 44 to a selector circuit 50. In the key 20 (see FIG. 1), the cables 43 and 44 are connected to conductors 48 and 49 of the base plate 27. In the key 120 (see FIG. 11), the cables 43 and 44 are connected to conductors 148 and 149 of a printed circuit 131 which is mounted above the base plate 127, provided with a shock-absorbing rubber layer 132 and supported by the support 123. In response to the signals transmitted from the circuit 50 on the conductors 45 and 46, the chip 40 selectively activates the various areas of the display 31, forming the character to be displayed. 
     In the alternative form shown in FIG. 10, the display 31 is connected to a chip 55 provided with its own container and with connecting stems of commerical type. In that case, the conductors of the display 31 are connected to the output conductors of the chip 55 for example by means of the further cables 56. As another alternative, the conductors of the chip 40 may be connected to the conductors 47 and 48 by means of conductors deposited on the upper portion of the rubber `dome portion` 57 of the key 20. 
     The key 20, 120 is particularly advantageous for use in a keyboard 60 (see FIG. 4) of electronic typewriters which are intended for printing a plurality of languages A, B, . . . X and as described for example in the U.S. Pat. No. 4,580,916 assigned to Ing. C. Olivetti &amp; C., S.p.A. 
     In that Patent and in the present disclosure, the typewriter provides a selector 61 which supplies the control unit (CPU) 62 of the machine with a code indicative of the keyboard associated with the selected language A, B, . . . X. In accordance with the specific standard, corresponding groups (font) of characters and national symbols 63 which can be selectively operated by the various keys of the keyboard belong to the selected keyboard. The selector code 61 causes activation of a transcoding routine which converts the position code in respect of the depressed key 20 into a machine code in respect of the symbol introduced. The circuit 50 in turn activates the chips 40 to display at the displays 31 the symbols associated with each key 20 in the position which belongs to that symbol of the selected keyboard A, B, . . . X. 
     The number of connecting conductors between the chip 40 and the circuit 50 may be reduced to a single pair for each chip, by providing for serial transmission of autosynchronous data as indicated by CK/D in FIG. 6. The time signal is received at each switching of the signal CK/D and the zero and one bits are transmitted respectively as low/high and high/low switching of the signal CK/D. In the case of sequential transmission of one bit, the same as the foregoing, the circuit 50 provides for a reset switching after a time t1 from switching of the first bit which is less than the response time of the circuit. Reset switching is therefore ignored both for generation of the signal CK and for recognition of the value of the bit. 
     The supply voltage for each chip 40, mainly of CMOS type, is produced from the signal CK/D by means of a simple circuit comprising a capacitor 70 (see FIG. 7), a diode 71 and a Zener diode 72. The reset signal is also generated by the chips 40 at the first high switching of the signal CK/D after a sufficiently long period during which there is no signal. 
     The circuits of the chip 40 may be simplified in the case where the displays are of SMETIC type or the like, in which therefore the optical states of the areas 36 are defined by suitable switching signals on the intersecting conductors 34 and 35 and provide the characteristics thereof with a `memory` effect until fresh switching signals are generated. In that case the chips 40 become simple decoders for the signals CK/D. 
     The circuit 50 supplies the chips 40-1, 40-2, 40-n by means of one or more multiplexers 75 provided with outputs CK/D1, CK/D2 . . . CK/D. The circuit 50 is provided with memory locations A, B, . . . X where there are stored the bits which define the optical state desired for the individual areas 36 of each keyboard A, B, . . . X. 
     An initialisation phase of the keyboard involves the generation in succession of the signals CK/D1 which define the state of all the areas 36 of the first chip 40-1 and progressively the other signals CK/D2 . . . CK/Dn, until all the symbols corresponding to the national keyboard A, B, . . . X selected, are represented. Since there is no activation of the chips until the state of the selector 61 is changed, the functions of the circuit 50 can be performed directly by the CPU of the machine and the respective memories, without adversely affecting the levels of performance. 
     If the number of keyboards which can be selected is very high, the number of memory locations of the circuit 50 may be substantially reduced by using packing techniques or redundancy elimination techniques, in ways which are known in the art. 
     In the case of LCD without a memory effect, the chips 40 also provide for `refreshing` of the signals for the areas 36 and each chip 40 comprises an RAM for storing the corresponding signals for the key which are derived from the selected location in the circuit 50 and the logic circuits which provide for the cyclic supply of the areas 36. 
     In the diagram in FIG. 8, the chips 40 are very simple and the refreshing function is performed by a high-speed circuit 50 which is connected to an external RAM 80 and in which the chips 40 are connected in series by three conductors, data conductor D, clock signal conductor CK and feed conductor +5. 
     Each chip 40 comprises a data input terminal and a data output terminal. The first chip 40-1 has its data input terminal directly connected with the circuit 50. Each other chip has its data output terminal connected with the input data terminal of a following chip and its input data terminal connected with the output data terminal of a preceding chip. The selection information for all the areas 36 of the chips are transmitted in sequence and each chip provides to select in the correct time information pertaining to its connected display. A reset code for all the chips is preliminary sent by the circuit 50 (FIG. 5) of the present disclosure and each chip 40 comprises a suitable decoder circuit to recognize the reset code. 
     In the diagram of FIG. 9, the chips are connected serially as in FIG. 8, are devoid of the decoder circuit to recognize the reset code and their resetting function is performed by the circuit 50 through another dedicated conductor RES common to all the chips 40. 
     The FIGS. 12 and 13 relate to a key 220 similar to the key 120 of FIG. 11 and comprising a movable part 224 provided in its upper part with a finger-operable cap 225. The key 220 is included in a keyboard 221 comprising a lower support frame 222 and an upper support 223. The upper support 223 slidably guides the movable part 224 and the part 224 is normally held in a raised position with respect to the support 222 by a rubber &#34;dome portion&#34; 226. The key 220 cooperates with output conductors 228 (FIG. 12) supported by the lower support 222. A depression of the key 220 provides an electrical connection of the conductors 228 by means of a movable contact 229 of the rubber dome portion 226 in a manner known per se. Other kinds of switching or sensing elements of capacitive, inductive or others can be provided as alternative. 
     The cap 225 is transparent and covers an LCD display 231 similar to the LCD display 31 of FIG. 11 and having a matrix of sixteen rows and twenty-four columns of dots connected to corresponding side terminals 232. These terminals 232 are electrically connected with first ends 233 of a flat cable 234 having second ends 236 electrically connected with terminals 235 by an input board 237 bearing on the upper support 223 and covered by a shock-absorbing rubber layer 238. 
     According to the invention, a chip 246 is supported by the flat cable 234 on an upper portion 248 adjacent to the first ends 233, and has its terminals electrically connected with the conductors of the flat cable for being connected with the terminals 233 of the display 231 and the terminals 235 of the input board 237. The flat cable 234 is folded by itself through a bent portion 242 of relatively large radius and comprises a lower portion 249 adjacent to the second ends 236. The upper portion 248 supports the driver chip 246, bears on an upper portion of a key stem 251 of the cap 225 and crosses a slot 252 of the key stem 251. The lower portion 249 of the flat cable has its ends 236 below and offset with respect to the ends 233. 
     The flat cable 234 (FIG. 14) has an insulative layer of mylar or kapton, or other foexible high quality material, provides conductive areas, on a single face and, on this case, the chip 246 is of &#34;slip&#34; type having its terminal embedded in a soldering layer to be soldered by the combined action of low heat, pressure and vibration with the conductive areas of the cable 234. The input board 237 comprises, for all the keys, also a common flat cable having an insulative layer of mylar of kapton whose terminals 235 for each key 220 are constitued by conductive areas to be soldered with the second ends 236 of an associated flat cable 234. The ends 233 and 236 of each cable 234 comprise portions of the conductive wires projecting from the insulative layer of the cable and which are soldered with conductive areas defining the terminals 232 and 235 of the display 231 and the common flat cable 237, respectively. 
     The assembly of the keyboard 221 provides the preliminary soldering of a chip 246 and a display 231 with a flat cable 234 for each key 220. The display 231 (FIG. 12) is inserted in a seat of the key stem 251 and the cable 234 is inserted in the slot 252. Thereafter, the ends 236 are soldered with the conductive areas 235 and the key stem 251 is inserted in the movable part 224. 
     The replacement of a defective display-cable-chip sub-assembly for each key 220 occurs by removal of the cap 225, cutting conductors and insulating layer of its cable 234 adjacent to the second ends 236 and removal of the defective sub-assembly. The mounting of a new sub-assembly includes soldering of the wires of the ends 236 of the new cable 234 overposed and shifted with respect to the cutted ends 236 of the removed cable. The new soldering causes the radius of the bent portion 242 to become larger without affecting the reliability of the key. 
     In the case of a flat cable 234 having conductive areas on both faces, the terminals of the chip 246 are constitued by tips or wires crossing the insulated layer of the cable and soldered with the conductive areas of the opposite face of the cable 234. The replacement of a defective sub-assembly occurs as in the preceding case, but no shifting of the ends 236 is necessary and there is no modification in the bent portion 242. 
     A depression of the key 220 reduces a little the radius of the bent portion 242, largely within the fatigue limits of the cable 234, without causing any flexion in the upper portion 248. The cable 234 provides two shoulders 253, adjacent to its upper portion 248, which cooperate with the sides of the slot 252 to prevent any shifting of the cable. Therefore the portion of the cable 234 including the solderings with the chip 246 is not affected by flexure solicitations during depression of the movable part 224. 
     The keys 20, 120, 220 are also particularly advantageous for use in a keyboard 260 (FIG. 15) which is a further modification of the keyboard 60, and provides a controller circuit 261 connected through a reduced number of conductors with n+m driver chips 246. These chips 246 comprise two groups of chips designated with the suffixes A and B, namely, 246-A1, 246-A2 . . . 246-An; and 246-B1, 246-B2 . . . 246-Bm, wherein the n chips of the group A and the m chips of the group B are connected in a serial fashion. The output circuits of the keyboard 260 connected with the conductors 228 are known per se and are not shown in the figure. 
     The controller circuit 261 is connected, via a data bus 262 with the CPU 62 of the machine and feeds the driver chips 246-A and 246-B with strings of trains of pulses including a reset code and data codes, as control information for the new characters to be displayed in the keys. The controller circuit 261 also feeds the driver chips with refresh codes when the displayed characters should remain unchanged. It is achieved through two sole output terminals 263-A and 263-B of the controller circuit 261 which are connected, via the input board 237, with the first driver chips 246-A1 and 246-B1 of the two groups of chips 246-A and 246-B, respectively. 
     Each chip 246 comprises an input terminal 273, a control output terminal 274, two feed terminals 276 and 277 and a group of display output terminals 278. The input terminal 273 of each chip 246-A, 246-B is connectable either to the output terminal 263-A, 263-B of the controller circuit 261 or with the control output terminal 274-A, 274-B of another chip 246-A, 246-B. The feed terminals 276 and 277 are connected with the terminals of a power supply, not shown in the drawings and the output display terminals 278 are connected with the terminals of the display 31, 231. 
     In the case of the key 220, the terminals 273, 274, 276 and 277 are connected with the four wires of the cable 234, connected with the ends 236 of the input board 237 and the display output terminals 278 are connected with the forty wires of the cable 234, connected with the ends 232 of the display 231. 
     Each chip 246 (FIG. 16) comprises a power-on reset circuit 281, a clock generating circuit 282, a delay circuit 283, a decoder circuit 284, a four phases generator circuit 285, a RAM memory 286, a RAM address counter 287, a RAM timing and control 288, a display driver circuit 289, an end of counting counter 290, and an output control circuit 292. The RAM memory 286 has 384 of one bit locations of memory associated with the 384 dots of matrix of the display 231 and the status of the locations of the RAM defines the optical status of the dots of the display 231. 
     In a preferred embodiment, the pulses coming from the controller circuit 261 of FIG. 15 are autosynchronous. The reset code and the data codes each include a train of eight pulses and are represented with the numerals 14a, 14b and 14c in FIG. 17. These pulses are similar to the ones of FIG. 6, and have a rising edge up to the high level at constant 1 MHz frequency, defining a clock commutation and a restore commutation to provide an end portion of low level and whose phase in a clock period defines a bit information. In particular restore commutation defines in the last part or in the first part of the clock period in its intermediate portion the high level (one) or to the low level (zero) bits associated with the information to be transferred to the chips 246. Each refresh code includes the train of pulses REFRESH in FIG. 17, all of zeros. The signals entering in the chips 246-A1 and 246-B1 are the pulses directly geerated by the controller circuit 261. 
     The signals on the input terminals 273 are indicated as DATAIN and the signals on the output terminals 274 are indicated as DATAOUT. The clock generating circuit 282 derives from each rising edge of the DATAIN signal, 1 MHz square wave pulses CK, from which the circuit 285 derives four phases signals for the feeding of the RAM 286 and the display control circuit 289. The delay control circuit 283 derives from the clock pulses CK delayed pulses CKD1 and DELCK for the timing of the decoder circuit 284 and the output control circuit 292. Moreover, the decoder circuit 284 derives from the signals DATAIN and pulses DELCK unmodulated signals REFRESH synchronous with DATAIN identical to the pulses from the controller circuit 261, also defining the refresh code and all constitued by short pulses (zeroes). The signals REFRESH are sent to the output control circuit 292 and utilized to refresh the status of the RAM memory 286 and the display 231. 
     The trains of DATAIN signals 14a, 14b and 14c of FIG. 17 inlcuded in a period T, as defined by eight commutations of DELCK pulses, comprise a &#34;reset&#34; information a &#34;one&#34; and a &#34;zero&#34; bit information, defining the reset code and the data codes, respectively, in dependence of the high and low levels of DATAIN found in the different phases of the period T. The decoder circuit 284 (FIG. 16) recognizes in the string of DATAIN signals a &#34;reset&#34; code in response to a low value of DATAIN associated with the seventh commutation of the DELCK pulses, corresponding to sequence 11111100 and a &#34;one&#34; and a &#34;zero&#34; code information in response to a low value of DATAIN associated with a fifth and a third commutation of the DELCK pulses, and corresponding to sequences 11110000 and 11000000, respectively. Upon recognizing a bit information the decoder circuit 284 actuates a writing conductor 1,0 for writing a &#34;one&#34; or a &#34;zero&#34; bit in the RAM 286, through suitable circuits including the timing and control circuit 288 and the address counter 287. 
     The signals DATAOUT which leave the output control circuit 292 of a given chip 246-Ai, 246-Bj have the same timing features of the signals DATAIN entering in the chip and represent the signals DATAIN for the following chip 246-Ai+1, 246-Bj+1 in the serial connection of FIG. 15. Each output control circuit 292 receives the signals DATAIN and REFRESH, is connected with the end of counting counter 290 and transmits as DATAOUT either the signal DATAIN with the asociated information received on the input terminal 273, or the unmodulated signals REFRESH devoid of information generated by the decoder circuit 284. 
     The mode of operation of each driver chip 246 is the following. 
     Upon the start up of the keyboard, the power-on reset circuit 281 (FIG. 16) clears the RAM memory 286 and the display 231 and sets the other circuits of the chip 246 in a predetermined status, providing, inter-alia, the enabling of the control output circuit 292 to the unchanged transmission of the received signals DATAIN. 
     The first train of signals DATAIN of the controller circuit 261 (FIG. 15) contains the &#34;reset&#34; code and reaches all the chips 246 in view of the temporary &#34;transparency&#34; of the chips 246-A, 246-B. The &#34;reset&#34; code is recognized by the decoder circuit 284 of the chips 246 and causes the switching of the output control circuit 292 to transmit only the unmodulated signals REFRESH coming from the decoder circuit 284. The following train of DATAIN signals contains the first &#34;zero&#34; or &#34;one&#34; bit information and reaches only the first chip 246-A1, 246-B1. This information is decoded by the decoder circuit 284 and is written in the first location of the RAM memory 286 for defining the optical status of the first dot of the display 231. The RAM address counter 287 is also updated for the addressing of the second bit information in the second location of the RAM 286. This process continues in similar manner for the setting of all the 384 locations of the RAM 286 and the associated dots of the display 231 in view of representing the first character of the keyboard. 
     Upon the 384th bit of information has been decoded by the circuit 284, the end of counting counter 290 sets the output control circuit 292 to transmit unchanged the DATAIN signals as DATAOUT to the following chip 246-A2, 246-B2. The decoder circuit 284 stops the actuation of the writing conductor 1,0 upon recognizing the 384th bit. The circuit 288 stops the writing of bits on the RAM 286 and the circuits 284 and 285 clock and refresh the signals for the RAM 286 and the display driver circuit 289. 
     The operation of the other driver chips 246-A2, 246-B2 is similar to the one of the first chip 246-A1, 246-B1, with the difference that, after the receipt of the &#34;reset&#34; code, the second chip 246-A2, 246-B2 receives 384 unmodulated trains of signals REFRESH which hold the RAM 286 and the display 231 in the blank status and which are transmitted unchanged to the following chip 246-A3, 246-B3. 
     When the output control circuit 292 of the first chip 246-A1, 246-B1 is set to its &#34;transparent&#34; status, the bit information entered in the driver chip 246-A2, 246-B2 is decoded by the associated decoder circuit 284 and updates the RAM 286 and the driver 231 as previously described, in connection with the operation of the first chip 246-A1, 246-B1. 
     The displaying of the various characters on the displays 231 occurs sequential and when the controller circuit 262 has transmitted the codes of character for all the keys, it generates only unmodulated REFRESH signals which &#34;refresh&#34; the memory and the display of all the keys 220. 
     It will be clear that the key and the keyboard as described above may be the subject of other modifications and alterations without departing from the scope of the invention. By way of example, it is possible to provide for reversed switching of the activated areas with respect to the unactivated `background` areas, to define a different state of the machine.