Abstract:
A uniform amplitude modulator includes in-phase component &amp; quadrature component generation units and a modulated signal generation unit. The in-phase component &amp; quadrature component generation units receive data represented by phase information and generate in-phase and quadrature components as analog signals. The modulated signal generation unit receives the in-phase and quadrature components and generates a modulated signal whose amplitude is uniform. One of the in-phase component &amp; quadrature component generation units is constituted by a device for outputting an analog signal having any one of three, predetermined positive and negative values associated with the phase information, and 0. The other is constituted by a device for outputting an analog signal associated with the phase information.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates to a modulator for generating a waveform by digital processing in a communication apparatus and, more particularly, to a modulation system for making the amplitude of a transmission waveform uniform. 
     In an apparatus for generating an analog waveform signal to be transmitted by a modulator using digital processing in data transmission, a modulator for outputting an analog signal waveform with reference to data of a memory device using an input signal as an address is known (see, e.g., Japanese Patent Laid-Open No. 62-85538). FIG. 1 shows a modulator disclosed in this reference. This modulator comprises two memory devices  11  and  12  for generating quadrature and in-phase components of an analog waveform like the one shown in FIG.  2 . 
     The modulator shown in FIG. 1 comprises the two memory devices  11  and  12  for generating quadrature and in-phase components of an analog waveform, and two D/A converters  13  and  14  for converting digital values from the memory devices  11  and  12  into analog values. The memory device is generally large in circuit scale. As the precision of an output signal increases, the circuit scale further increases, posing a problem in downsizing the modulator. The D/A converter greatly consumes the power for a higher speed and higher precision, posing a problem in reducing power consumption of the modulator. 
     SUMMARY OF THE INVENTION 
     The present invention has been made to solve the above problem, and has as its object to provide a modulator capable of reducing the circuit scale and power consumption by reducing the scales of the memory device and D/A converter. 
     To achieve the above object, according to the present invention, there is provided a uniform amplitude modulator comprising means for receiving data represented by phase information and generating in-phase and quadrature components as analog signal components, and means for receiving the in-phase and quadrature components and generating a modulated signal whose amplitude is uniform, one of the means for generating in-phase and quadrature components being constituted by a device for outputting an analog signal component having any one of three, predetermined positive and negative values associated with the phase information, and 0, and the other being constituted by a device for outputting an analog signal component associated with the phase information. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 a block diagram showing an example of a conventional uniform amplitude modulator; 
     FIG. 2 is a graph for explaining the signal components of a modulated signal; 
     FIG. 3 is a block diagram showing a uniform amplitude modulator according to an embodiment of the present invention; 
     FIGS. 4A,  4 B, and  4 C are graphs for explaining the principle of operation of the present invention; 
     FIG. 5 is a block diagram showing an example of application of the present invention to a 16-phase PSK modulator; 
     FIGS. 6A,  6 B,  6 C, and  6 D are graphs for explaining the principle of operation in FIG. 5; 
     FIG. 7 is a table showing a ROM table in FIG. 5; 
     FIG. 8 is a graph showing a 16-phase PSK modulated signal point; 
     FIG. 9 is a block diagram showing another embodiment of the present invention; and 
     FIG. 10 is a table showing a ROM table in FIG.  9 . 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 3 shows an embodiment of the present invention. As shown in FIG. 3, this modulator comprises a memory device (ROM table)  31 , a selector  32  for selecting and outputting the presence/absence and sign of a signal, a D/A converter  33 , a ternary D/A converter  34 , a quadrature modulator  35 , and an amplitude limiter  36  for limiting the amplitude of the signal. 
     In this embodiment, the memory device  31  and the D/A converter  33  constitute a first analog signal converter  37 - 1 . The selector  32  for selecting and outputting the presence/absence and sign of the signal, and the ternary output D/A converter  34  constitute a second analog signal converter  37 - 2 . The first and second analog signal converters  37 - 1  and  37 - 2  constitute an in-phase component &amp; quadrature component (analog signal) generation means  37 . The quadrature modulator  35  and amplitude limiter  36  constitute a modulated signal generation means  38  for generating a modulated signal whose amplitude is uniform. 
     Operation of the modulator will be described with reference to FIGS. 4A,  4 B, and  4 C. A desired transmission signal is represented as a point on a circle  41  indicated by the dotted line in FIG.  4 A. I′ represents an output from the memory device  31  in FIG. 3, and Q′ represents an output from the selector  32  for outputting the presence/absence and sign of the signal. The output Q′ takes one of values indicated by the chain lines in FIG. 4B and 0. 
     When a desired transmission signal point is a signal  45  (I, Q) in FIG. 4C, if the output I′ from the memory device  31  is set to a value like the one shown in FIG. 4C, the quadrature modulator  35  outputs a signal  44  (I′, Q′). This signal is limited by the amplitude limiter  36  to obtain a desired transmission signal (I, Q). 
     When a value θ shown in FIG. 4C changes within the range of −π/2&lt;θ&lt;π/2, if only the digital value of the in-phase component I′ is changed using the memory device  31  without changing the value of the quadrature component Q′, a desired transmission signal can be obtained in combination with the amplitude limiter  36 . Similarly, when the value θ changes within the ranges of −π&lt;θ&lt;−π/2 and π/2&lt;θ&lt;π, only the sign is inverted without changing the value of the quadrature component Q′, only the digital value of the in-phase component I′ is changed using the memory device  31 , and the amplitude is limited, thereby obtaining a desired transmission signal. 
     That is, to achieve the above object, the present invention reduces the numbers of memory devices and D/A converters by giving attention to the fact that the amplitude suffices to be finally limited in a modulator for making the amplitude uniform by PSK (Phase Shift Keying) modulation or the like. The phase amount θ represents an accurate signal value. A signal having an arbitrary amplitude is generated, and the amplitude of this signal is limited by the limiter to obtain a desired modulated signal. 
     Since the amplitude is arbitrary, memory devices need not be prepared for both in-phase and quadrature components, and either component can be generated by an output from the selector. The output from the selector can be converted into an analog signal component using a ternary output D/A converter. 
     With this arrangement, two memory devices necessary for the conventional modulator can be reduced to one. One of the D/A converters can be realized by a simple ternary output D/A converter. 
     FIG. 5 shows the case in which the present invention is applied to the baseband signal generation circuit of a 16-phase PSK modulator. FIGS. 6A,  6 B,  6 C, and  6 D show the signal generation procedure. FIG. 7 shows the contents of a ROM table  51  in FIG.  5 . In the 16-phase PSK modulation, a 4-bit input signal is transmitted as phase information. As shown in FIG. 8, a modulated signal takes any value of 16 points on the circumference. 
     In FIG. 5, the ROM table  51  is used as a memory device and outputs a quadrature component Q′. A selector  52  is used as a selection device for outputting the presence/absence and sign of a signal, and selects and outputs any one of three values 1, 0, and −1. 
     As shown in FIG. 5, the baseband signal generation circuit of the 16-phase PSK modulator according to the present invention is constituted by the ROM table  51 , the selector  52 , a D/A converter  53 , a ternary D/A converter  54 , a quadrature modulator  55 , and a limiter  56 . 
     FIGS. 6A,  6 B,  6 C, and  6 D show the signal generation procedure for input data of 0000 to 1000. As shown in FIG. 6A, a signal Q′ (0, ±0.4, ±1, ±2.4) output from the ROM table  51  and a signal I′ (0, ±1) output from the selector  52  are respectively set as quadrature and in-phase components using an input signal θ as an address. The quadrature and in-phase components are respectively converted into analog signal components by the D/A converter  53  and ternary D/A converter  54 . The analog signal components are input to the quadrature modulator  55  to generate a prototype signal for a baseband signal like the one shown in FIG.  6 B. 
     In this case, the quadrature component Q′ takes one of values shown in FIG. 7 for the phase information θ. As shown in FIG. 7, an output from the selector  52  is selected such that the in-phase component I′ is +1 when the start bit of input data is 0, −1 when the start bit is 1, and 0 when all the remaining three bits are 0. 
     As shown in FIG. 6C, the prototype signal is passed through the limiter  56  in order to limit the amplitude with a circle having a radius of 1 represented by the dotted line. The signal obtained finally moves on the circumference, as shown in FIG.  6 D. This procedure is for input data of 0000 to 1000. The same procedure can also apply to input data of 1001 to 1111, and a 16-phase PSK modulated baseband signal like the one shown in FIG. 8 can be obtained by the circuit shown in FIG.  5 . 
     FIG. 9 shows the case in which the present invention is applied to the baseband signal generation circuit of a GMSK (Gaussian-filtered Minimum Shift Keying) modulator. FIG. 10 shows the contents of a ROM table  94  in FIG.  9 . As shown in FIG. 9, the baseband signal generation circuit of the GMSK modulator is constituted by an integrator  91 , delay elements  92  and  93 , a ROM table  94 , a selector  95 , a D/A converter  96 , a ternary output D/A converter  97 , a quadrature modulator  98 , and a limiter  99 . The delay elements  92  and  93  are circuits considering interference between the current symbol and one preceding or succeeding symbol. 
     An input signal is integrated into 1-symbol 2-bit data by the integrator  91 . The 2-bit data is input to the ROM table  94  and selector  95  together with one preceding symbol and one succeeding symbol from the delay elements  92  and  93 . At this time, an input symbol sequence is generated by the integrator  91  and thus takes consecutive values like the ones shown in FIG.  10 . The signals I′ and Q′ are respectively converted into analog signal components by the ternary output D/A converter  97  and D/A converter  96 . The analog signal components are passed through the quadrature modulator  98  and limiter  99  to be output as a GMSK modulated signal having a uniform amplitude. 
     According to the present invention, the number of memory devices used in the conventional digital modulator can be decreased to half. The modulator can be realized with a selector relatively small in circuit scale, ternary output D/A converter, and limiter. As a result, the circuit scale and power consumption can be reduced.