Abstract:
A solid state disk drive is provided among the storage devices controlled by a storage controller. The solid state disk drive may serve as a level 2 cache using standard multi-level cache management algorithms. The solid state disk may share a drive channel with other storage devices or may have a dedicated channel.

Description:
BACKGROUND OF THE INVENTION 
   1. Technical Field 
   The present invention relates to data storage and, in particular, to data cache in a storage controller. Still more particularly, the present invention provides a method and apparatus for using a solid state disk as a storage controller level 2 cache. 
   2. Description of the Related Art 
   A storage controller is an embedded system logically connected between a host computer system and a pool of storage.  FIG. 1  illustrates an example of a typical storage controller system. Input/output (I/O) host  102  sends read and write data access requests to storage module  110 . The storage module includes storage controller  120  and disk drives  130 . Storage controller  120  performs read and write operations to satisfy the data access requests of the I/O host. 
   Storage controller  120  includes I/O cache  122 . This I/O cache, also referred to as storage controller level 1 cache, is located in the storage controller memory. Data blocks that are read from disk drives 0–N may be stored in the I/O cache so that frequently accessed data may be read from the faster memory device rather than the slower disk drives. Furthermore, I/O cache  122  may also serve as intermediate storage for data blocks that are written to the disk drives. Subsequent reads of these data blocks may be found in the cache, thus reducing access time. 
   More particularly, redundant array of independent disks (RAID) systems, may stripe data blocks and store each stripe on a different physical disk drive. For example, in the storage controller system shown in  FIG. 1 , a data block written to storage module  110  may be striped into N–1 stripes, each stripe being stored on a respective one of drives 0-N  130 . With the greater number of reads and writes to physical drives in RAID systems, the importance of I/O cache is increased. 
   Therefore, it would be advantageous to provide an improved multi-level cache for storage controller systems. 
   SUMMARY OF THE INVENTION 
   The present invention provides a solid state disk drive among the storage devices controlled by a storage controller. The solid state disk drive may serve as a level 2 cache using standard multi-level cache management algorithms. The solid state disk may share a drive channel with other storage devices or may have a dedicated channel. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The novel features believed characteristic of the invention are set forth in the appended claims. The invention itself however, as well as a preferred mode of use, further objects and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying drawings, wherein: 
       FIG. 1  illustrates an example of a typical storage controller system; 
       FIG. 2  illustrates an example of a storage controller system in accordance with a preferred embodiment of the present invention; 
       FIGS. 3A and 3B  are block diagrams illustrating example storage controller architectures in accordance with a preferred embodiment of the present invention; and 
       FIG. 4  is a flowchart illustrating the operation of a storage controller in accordance with a preferred embodiment of the present invention. 
   

   DETAILED DESCRIPTION 
   The description of the preferred embodiment of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art. The embodiment was chosen and described in order to best explain the principles of the invention the practical application to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated. 
   With reference now to the figures and in particular with reference to  FIG. 2 , a storage controller system is illustrated in accordance with a preferred embodiment of the present invention. Input/output (I/O) host  202  sends read and write data access requests to storage module  210 . The storage module includes storage controller  220  and disk drives  230 . Storage controller  220  performs read and write operations to satisfy the data access requests of the I/O host. 
   The depicted example illustrated in  FIG. 2  and above-described examples are not meant to imply architectural limitations. For example, drives  230  may be hard disk drives. However, other storage devices, such as tape drives, optical disk drives, and the like, may be used in addition to or in place of the hardware shown in  FIG. 2 . 
   Storage controller  220  includes I/O cache  222 , which serves as the storage controller level 1 (L1) cache. I/O cache  222  may be a random access memory (RAM). A typical example of a storage controller system may allocate 1 GB of memory for storage controller level 1 cache; however, more or less memory may be allocated for cache depending on the implementation. 
   Advances in memory technologies have led to the emergence of solid state disks. Solid state disk devices are essentially a non-volatile random access memory connected to an I/O channel. Due to the I/O channel protocol, memory access is not as fast for solid state disks as it is for the memory on the storage controller. However, the underlying random access memory generally has much improved I/O latency, I/O rate and sustained bandwidth as compared to hard disk drives. 
   In accordance with a preferred embodiment of the present invention, drives  230  also include solid state disk drive  232 , which serves as the storage controller level 2 cache. With the improved performance characteristics of solid state disks over hard disk drives, solid state disk drive  232  may be used as a second level cache by a storage processor using standard multi-level cache management algorithms. 
   With reference now to  FIGS. 3A and 3B , block diagrams are shown illustrating example storage controller architectures in accordance with a preferred embodiment of the present invention. Particularly,  FIG. 3A  illustrates a single-memory storage controller architecture. Storage controller  300  employs a peripheral component interconnect (PCI) local bus architecture. Although the depicted example employs a PCI bus, other bus architectures such as Industry Standard Architecture (ISA) may be used. Microprocessor  302 , with internal level 1 cache, and memory pool  308  are connected to PCI local bus  310  through memory controller  304 . Microprocessor level 2 cache  306  is also connected to memory controller  304 . PCI bus  310  also may include an integrated memory controller and cache memory for processor  302 . 
   In the depicted example, ethernet adapter  314 , PCI to ISA bridge  312 , drive channel adapters  316 – 318 , and host channel adapter  320  are connected to PCI bus  310  by direct component connection. PCI to ISA Bridge  312  provides a connection through ISA bus  330  for basic input output system (BIOS)  332  and serial port  324 . 
   Processor  302  is used to coordinate and provide control of various components within storage controller  300  in  FIG. 3A . Instructions for the storage controller may be located on storage devices, such as BIOS  322 , and may be loaded into memory pool  308  for execution by processor  302 . 
   Memory pool  308  is a single memory pool that is logically partitioned into two regions. A first region serves as processor memory. This portion of memory is used by processor  302 , for example, as “scratch pad” memory to perform the operations of the storage controller. The second region of memory pool  308  serves as I/O buffer memory or level 1 storage controller cache. 
   Drive channel adapters  316 – 318  provide drive channels for storage devices, such as hard disk drives. A storage controller may have, for example, four drive channels. Each drive channel may support multiple drives per channel. The number of drives is limited by I/O hardware and communication protocol. 
   In accordance with a preferred embodiment of the present invention, solid state disk  340  is connected to one of the drive channel adapters, such as drive channel adapter  318  in  FIG. 3A . Solid state disk  340  serves as storage controller level 2 cache to supplement the level 1 cache stored in memory pool  308 . The solid state disk may store, for example, 8 GB of data. Therefore, read request performance may be greatly improved due to an increased probability of the data residing either in the storage controller level 1 cache or the high-speed solid state disk. 
   Turning now to  FIG. 3B , a dual-memory storage controller architecture is shown in accordance with a preferred embodiment of the present invention. Storage controller  350  employs a peripheral component interconnect (PCI) local bus architecture. Although the depicted example employs a PCI bus, other bus architectures such as Industry Standard Architecture (ISA) may be used. Microprocessor  352 , with internal level 1 cache, and memory pool  358  are connected to PCI local bus  360  through memory controller  354 . Microprocessor level 2 cache  356  is also connected to memory controller  354 . PCI bus  360  also may include an integrated memory controller and cache memory for processor  352 . 
   In the depicted example, ethernet adapter  364 , PCI to ISA bridge  362 , drive channel adapters  366 – 368 , and host channel adapter  370  are connected to PCI bus  360  by direct component connection. PCI to ISA Bridge  362  provides a connection through ISA bus  380  for basic input output system (BIOS)  382  and serial port  384 . 
   Processor  352  is used to coordinate and provide control of various components within storage controller  350  in  FIG. 3B . Instructions for the storage controller may be located on storage devices, such as BIOS  382 , and may be loaded into memory pool  358  for execution by processor  352 . 
   Memory pool  358  is used by processor  352 , for example, as “scratch pad” memory to perform the operations of the storage controller. Memory pool  374  is connected to PCI bus  360  by memory controller  372 . Memory pool  374  serves as I/O buffer memory or level 1 storage controller cache. 
   Drive channel adapters  366 - 368  provide drive channels for storage devices, such as hard disk drives. In accordance with a preferred embodiment of the present invention, solid state disk  390  is connected to one of the drive channel adapters, such as drive channel adapter  368  in  FIG. 3B . Solid state disk  390  serves as storage controller level 2 cache to supplement the level 1 cache stored in memory pool  374 . The solid state disk may store, for example, 8 GB of data. Therefore, read request performance may be greatly improved due to an increased probability of the data residing either in the storage controller level 1 cache or the high-speed solid state disk. 
   Those of ordinary skill in the art will appreciate that the hardware in  FIGS. 3A and 3B  may vary depending on the implementation and the depicted examples in  FIGS. 3A and 3B  and above-described examples are not meant to imply architectural limitations. For example, the examples shown in  FIGS. 3A and 3B  illustrate bus architectures; however, the present invention may be implemented using other architectures, such as a switched architecture. For example, the present invention may be implemented using a fibre channel architecture. 
   With reference now to  FIG. 4 , a flowchart illustrating the operation of a storage controller is shown in accordance with a preferred embodiment of the present invention. The process begins and receives a data access request (step  402 ). A determination is made as to whether the data access request is a read request or a write request (step  404 ). 
   If the data access request is a read request, a determination is made as to whether the data is in level 1 cache (step  406 ). If the data is in level 1 cache, the process fetches the data from level 1 cache (step  408 ) and the process ends. If the data is not in level 1 cache in step  406 , a determination is made as to whether the data is in the level 2 cache stored in the solid state disk (step  410 ). If the data is stored in the storage controller level 2 cache, the process fetches the data from level 2 cache in the solid state disk (step  412 ) and the process ends. However, if the data is not stored in level 2 cache in step  410 , the process reads the data from the storage device (step  414 ) and ends. 
   Returning to step  404 , if the data access request is a write request, a determination is made as to whether the data is cached (step  416 ). If the data is cached, a determination is made as to whether the data is cached in level 1 cache or level 2 cache (step  418 ). If the data is cached in level 1 cache, the process overwrites the data in level 1 cache in memory (step  420 ) and ends. If the data is cached in level 2 cache in step  418 , the process overwrites the data in the level 2 cache in the solid state disk (step  422 ) and the process ends. 
   If the data is not cached in step  416 , the process allocates space in level 1 cache for the written data (step  424 ). A determination is made as to whether level 1 cache needs to be flushed to make space to cache the written data (step  426 ). If a flush of level 1 cache is not necessary, the process ends. 
   If a flush of level 1 cache is necessary in step  426 , the process writes data from level 1 cache to the level 2 cache in the solid state disk (step  428 ) and a determination is made as to whether a flush is necessary to make space to write data in level 2 cache (step  430 ). If a flush is not necessary, the process ends. However, if a flush is necessary in step  430 , the process flushes data from level 2 cache (step  432 ) and ends. 
   Thus, the present invention provides a second level of storage controller cache using a solid state disk device. Read request performance is improved due to an increased probability of data residing in either the storage controller level 1 cache in memory or the solid state disk device. 
   Certain applications and I/O profiles may greatly benefit from such a feature. Specifically, some database applications use small, frequently accessed data volumes for transaction logging, in addition to the large volumes for actual record storage. Even though the volumes are small, the nature of the database application would generally allow the data to be flushed out of the storage processor cache in memory to accommodate caching other volume data, resulting in cache misses and longer latencies for this data. Using a second-level cache increases the probability that the data will be present in either the level 1 cache in memory or the second level cache in the solid state disk. The performance improvement can be achieved by simply attaching a solid state disk in parallel to the storage controller and configuring the transaction log volumes on this secondary device. However, by incorporating the solid state disk into the storage system cache, the storage system cache management would encompass this device, reducing system management complexity. 
   Retrieving the data from this second level cache is a less expensive operation than reading the data from the hard disks, especially if the data is striped across several disks as in a RAID storage system. Allowing the volumes to be configured as second level cacheable allows users to tune system performance for specific applications. Solid state disk devices are available in standard hard disk drive form factors. Using these devices as customer replaceable units in hard drive modules allows users to upgrade and expand simply by populating additional units in the system.