Abstract:
An image recording apparatus provided with a thermal head, records a two-dimensional image on heat-sensitive recording paper by controlling ON times of heating elements dots. The heating elements dots are divided into a plurality of blocks which are time-divisionally driven to print one-line pixels without white lines.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an apparatus for recording a two-dimensional image on heat-sensitive recording paper by controlling ON times of heating element dots of a thermal head. 
     2. Description of the Prior Art 
     Several techniques have been extensively studied to reproduce hard copy images such as photographs from electrical image signals derived from television cameras, video cameras, video disks and electronic still cameras. Among these, a typical example is a heat-sensitive image recording technique. According to this technique, a line thermal head having heating element dots (corresponding to one line) aligned in a horizontal direction is shifted on heat-sensitive recording paper (including heat-sensitive color development paper and a laminate of an imaging sheet and a thermal transfer ink sheet). Only predetermined heating element dots are energized and heated in accordance with input image signals, and pixels for one horizontal line are printed on the recording paper. The pixels in units of horizontal lines are sequentially printed to obtain a single two-dimensional image. 
     In this case, the number of heating element dots corresponding to one-line pixels is determined by an image size. For example, as many as 1280 dots are used for one-line pixels. However, when such a large number of dots is used, a maximum current flow for energizing all the dots is increased. As a result, a high power source is required. 
     In order to solve the above problem, a conventional system is proposed wherein a plurality of heating element dots are divided into, for example, two blocks which are then time-divisionally driven. According to this system, although print time for one-line pixels is doubled, a maximum current can be decreased to 1/2 or less. 
     A temperature distribution of one heating element during heating is illustrated by a curve having a peak at the center thereof, as shown in FIG. 1. Assuming that all the dots of each block are heated, a temperature of a boundary between an energized block B n  (i.e., hatched dot regions) and a nonenergized block B n+1  (i.e., nonhatched dot regions) is low. The term &#34;temperature&#34; is abbreviated by TEM in the drawings. Since the region outside the boundary of the energized block B n  belongs to the nonenergized block B n+1  the temperature is low, and heat escapes. This phenomenon cannot be prevented and occurs when the block B n  is turned off and the block B n+1  is turned on. A temperature distribution shown in FIG. 2B is obtained. Therefore, a boundary region between two adjacent blocks cannot be sufficiently heated at the beginning and end of a heating cycle (FIG. 2C). The printed pixels are blanked at the boundary, thus resulting in white dots thereat. The white dots appear as a white line in an image along the feed direction of the recording paper. When an image such as a photograph is created, the white line results in a decisive disadvantage. 
     SUMMARY OF THE INVENTION 
     It is, therefore, an object of the present invention to provide an image recording apparatus wherein heating element dots are divided into a plurality of blocks which are time-divisionally driven to print one-line pixels without white lines. 
     The present inventor found that white lines were eliminated when the heating element dots were divided into a plurality of blocks such that boundary dots were commonly assigned to each two adjacent blocks. 
     In order to achieve the above object of the present invention, there is provided a line thermal head having a large number of heating element dots, wherein the heating element dots are divided into a plurality of blocks which are time-divisionally driven to print one-line pixels, and at least one common dot is present between each two adjacent blocks. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIGS. 1, 2A, 2B and 2C are respectively graphs showing temperature distributions of a conventional thermal head; 
     FIGS. 3A, 3B and 3C are respectively graphs showing temperature distributions so as to explain the principle of operation of a thermal head according to the present invention; 
     FIG. 4 is a graph showing a waveform of a one-line image signal in a thermal head according to a first embodiment of the present invention; 
     FIG. 5 is a timing chart of level data signals in the thermal head of the first embodiment; 
     FIG. 6 is a circuit diagram of the thermal head of the first embodiment; 
     FIG. 7 is a timing chart of strobe signals of the first embodiment; 
     FIG. 8A and 8B are timing charts of block level data signals of the first embodiment; 
     FIG. 9 is a block diagram of an image recording apparatus according to the first embodiment of the present invention; 
     FIGS. 10A and 10B are respectively timing charts for explaining the operation of the image recording apparatus of the first embodiment; 
     FIGS. 11A and 11B are respectively timing charts of strobe signals in an image recording apparatus according to a second embodiment of the present invention; 
     FIG. 12 is a block diagram of the image recording apparatus according to the second embodiment of the present invention; 
     FIGS. 13A and 13B and respectively timing charts for explaining the operation of the image recording apparatus of the second embodiment; 
     FIG. 14 is a timing chart of strobe signals in an image recording apparatus according to a third embodiment of the present invention; and 
     FIG. 15 is a block diagram of the image recording apparatus of the third embodiment. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     As shown in FIG. 3A, one dot Dd is commonly assigned to two blocks B n  and B n+1 . The block B n  is energized and heated, as shown in FIG. 3A. Subsequently, the blocks B n  and B n+1  are simultaneously deenergized and energized, respectively, as shown in FIG. 3B. In this state, the temperature of the boundary is decreased. The pixels of one horizontal line are uniformly printed. One horizontal line at the boundary will not be blanked, thus eliminating a white line. 
     However, the dot Dn commonly assigned to the blocks B n  and B n+1  is continuously heated and has a short lifetime as compared with dots belonging only to the blocks B n  and B n+1 . The pixel corresponding to the common dot is printed twice and is thus emphasized. A black stripe (to be called as a black line hereinafter) tends to appear in the image. 
     In order to resolve these two problems, the present invention employs a dot drive scheme wherein the common dot Dd is changed randomly for each line, i.e., the block boundary position is changed randomly. This scheme solves the problem of shortened lifetime for one or more specific dots. In addition, emphasized pixels are scattered throughout the image to eliminate black lines. 
     According to the present invention, therefore, the block boundary position is prefereably changed randomly for each line. 
     Another solution can be proposed to resolve the two problems described above. Heat generated from the common dot can be reduced to substantially half that of the normal dot. Either a current supplied to a dot or an energization time or both can be reduced to half. However, the printing density of a pixel does not always correspond to heat generated from a corresponding dot. Therefore, the current or energization time must be larger or longer than 1/2. 
     The present invention will be described in detail with reference to the preferred embodiments, but will not be limited thereto. For illustrative convenience, an electrical image signal is separated and provided as a monochrome image signal. 
     The electrical image signals are sequentially supplied in units of horizontal lines from the first line to the end line. A typical example of a one-line image signal is illustrated in FIG. 4. The image signal is divided into 10 time intervals along the time base. The intervals 1 to 10 correspond to heating element dots, respectively. 
     Gradation is expressed by an ON time of one heating element dot. By way of simplicity, there are six gradation levels 0, 1, 2, 3, 4 and 5, and 10 pixels for one horizontal line. A one-line image signal is sequentially compared with five comparison levels L 1 , L 2 , . . . and L 5  representing different densities. When the image signal is equal to or higher than a given comparison level, the signal is set at level &#34;1&#34;. Otherwise, the signal is set at level &#34;0&#34;. The level data &#34;0&#34; and &#34;1&#34; are obtained for each comparison level, as shown in Table 1. 
     
                       TABLE 1______________________________________Comparison                        Sig-Level    Level Data               nal______________________________________L.sub.5  1     0     0   0   0   0   0   0   0   1    LD.sub.15L.sub.4  1     0     0   0   1   0   0   0   0   1    LD.sub.14L.sub.3  1     0     0   1   1   0   0   1   0   1    LD.sub.13L.sub.2  1     1     0   1   1   0   1   1   0   1    LD.sub.12L.sub.1  1     1     1   1   1   0   1   1   1   1    LD.sub.11Time (t) 1     2     3   4   5   6   7   8   9   10______________________________________ Note: Level data &#34;0&#34; represents nonprinting, and level data &#34;1&#34; represents printing. 
    
     The one-line image signal density is sequentially compared with the levels L 1  to L 5 , and the resultant binary signals are given as LD 11 , LD 12 , LD 13 , LD 14  and LD 15 . The waveforms of these signals are respectively illustrated in FIG. 5. 
     FIG. 6 shows an example of a thermal head TH used in an image recording apparatus according to a first embodiment. Heating element dots D 1 , D 2 , D 3 , . . . and D 10  correspond to 10 pixels for one line. The thermal head has a terminal 1 for receiving a block level data signal (to be described later) a terminal 2 for receiving a clock timing signal, a terminal 3 for receiving a load signal, and a thermal head drive signal input terminal 4. The thermal head comprises a shift register 5, a latch circuit 6 and a NAND gate array 7 having 10 NAND gates. 
     The heating element dots D 1 , D 2 , . . . , and D 10  are divided into a first block B 1  consisting of the heating element dots D 1 , D 2 , . . . and D 5  and a second block B 2  consisting of the heating element dots D 5 , D 7 , . . . and D 10 . In this case, the heating element dot D 5  is commonly assigned to both the first and second blocks B 1  and B 2 . The number of dots in the first block B 1  is preferably equal to that in the second block B 2 . During the first time interval, the first block B 1  is energized to perform printing. During the next interval, the first block B 1  is deenergized, and at the same time the second block B 2  is energized. 
     For this purpose, a strobe signal generator (to be described in detail later) generates two strobe signals SS1 and SS2 corresponding to the number of blocks, as shown in FIG. 7. 
     The level data signal LD 11  is multiplied by an AND gate (to be described later) with the strobe signals SS1 and SS2 to obtain block level data signals BLD 111  and BLD 112 , as shown in FIGS. 8A and 8B. 
     The block level data signal BLD 111  is supplied to the terminal 1 of the thermal head shown in FIG. 6. The signal BLD 111  is supplied as a serial signal to the shift register 5 in response to a clock signal. The serial signal is transferred as a parallel signal to the latch circuit 6 in response to a load signal supplied from a sequence controller (to be described later) to the terminal (3). 
     An output from the latch circuit 6 is multiplied by the respective gates of the NAND gate array 7 with the drive signal from the sequence controller, so that a current flows in some of the dots D 1  to D 5  of the block B 1  which are designated by the block level data signal BLD 111 . The designated dots are energized for a unit time Tu (Tu varies in accordance with the gradation level) and are heated. As a result, the pixels of gradation level 1 are printed on substantially half of one line on the imaging sheet. Nonprinted pixels are gradation level 0, i.e., they are left white. 
     The next level data signal LD 12  in place of the level data signal LD 11  is supplied to obtain block level data BLD 121  in response to the strobe signal SS1 in the same manner as described above, thereby performing pixel printing of gradation level 2. When printing of a given gradation level is changed to that of the next gradation level, a given heating element dot is often reenergized. In this case, time between the energization cycles is substantially zero or, if any, several nanoseconds. When the level data signal is supplied up to the highest level data signal LD 15 , printing of pixels corresponding to the first line of the block B 1  is completed. 
     In order to perform printing by the block B2, the strobe signal SS1 is replaced by the strobe signal SS2. The level data signal LD 11  is processed to obtain block level data BLD 112  and the signal BLD 112  is supplied to the terminal 1. An output from the latch circuit 6 is multiplied by the respective gates of the NAND gate array 7 with the drive signal supplied to the terminal 4. Some of the dots D 5  to D 10  of the block B 2  which are designated by the data signal BLD 112  are energized for the unit time Tu. Therefore, pixels of gradation level 1 are printed on the second half of one line of the imaging sheet. 
     The level data signals LD 12 , LD 13 , LD 14  and LD 15  are sequentially processed in the same manner as described above, and pixels of the gradation level for the block B 2  are printed, thereby completing printing of the first line. 
     When the imaging sheet is fed for the next line, the next line image signal is printed on the corresponding line. When printing is completed up to the last line, a monochrome two-dimensional image having gradation levels is formed on the imaging sheet. In order to obtain a full-color image, yellow, magenta and cyan color signals, or yellow, magenta, cyan and black color signals are used to repeat the operation for monochrome image printing for each color. An additional circuit is added to the dot D 5  commonly assigned to the two blocks so as to decrease one or both of a current and an energization time for the dot D 5 . Alternatively, the common dot may be shifted to prevent an excessive density of the pixels printed by the dot D 5  or reduce overloading of the dot D 5 . 
     Referring to FIG. 9 showing the image recording apparatus of the first embodiment, a sequence controller 12 controls the overall sequence of the apparatus. A one-line image signal designated by the controller 12 is read out from a memory 8 and is supplied to a comparator 9. The comparator 9 prestores the comparison levels L 1  to L 5 . The controller 12 sequentially accesses the comparison levels L 1  to L 5  stored in the comparator 9. The comparator 9 compares the image signal with the level accessed by the controller 12. 
     The controller 12 repeatedly accesses for each block the image signal the number of times corresponding to the number of levels. An AND gate 10 receives the level data signal and a strobe signal and generates a block level data signal BLD as a logical product. A flip-flop 111 generates an identification signal α1 for identifying the block B 1  or B 2  under the control of the controller 12. The signal α1 is set at low level (corresponding to level &#34;0&#34; to be referred to as &#34;L&#34; hereinafter) when the signal α1 designates the block B 1 . However, when the signal α1 designates the block B 2 , it is set at high level (corresponding to level &#34;1&#34; to be referred to as &#34;H&#34; hereinafter). In this embodiment, the dot D 5  is given as the boundary dot. A bit generator 114 generates dot number &#34;5&#34; when the signal α1 is set at &#34;L&#34;. However, when the signal α1 is set at &#34;H&#34;, the bit generator 114 generates dot number &#34;4&#34;. A presettable down counter 115 counts clock pulses to detect a sleeve signal waveform changing position represented by the bit number generated from the bit generator 114. One pulse of the clock signal corresponds to one pixel. A flip-flop 112 resets an output α2 thereof under the control of the controller 12 and sets the output α2 in response to a borrow signal when the counter 115 counts a predetermined number of clock pulses. An exclusive OR inverting gate 113 receives the output α1 from the flip-flop 111 and the output α2 from the flip-flop 112 and generates a strobe signal. The controller 12 supplies a load signal to the terminal 3 of the thermal head TH and a drive signal to the terminal 4. A motor 13 provides a relative displacement between the imaging sheet and the thermal head TH under the control of the sequence controller 12. 
     The controller 12 generates a pulsed line start signal LNST immediately before every line printing. The line start signal LNST initializes the flip-flop 111. In this case, the signal α1 is set at &#34;H&#34;. A pulsed block start signal BST is generated from the controller 12 immediately before every printing of the block B 1 . The flip-flop 111 performs toggling, and the signal α1 is set at &#34;L&#34;. The controller 12 sequentially supplies a pulsed level start signal LVST to the flip-flop 112 every time the level in the comparator 9 is designated. The flip-flop 112 is reset in response to the level start signal LVST, and the output α2 is set at &#34;L&#34;. At the same time, the output value &#34;5&#34; from the bit generator 114 is set in the counter 115. The level data signal LD 11  is supplied to one input terminal of the AND gate 10 in synchronism with a clock signal C. The counter 115 counts down the clock signal C. When the counter 115 counts the fifth clock pulse, it generates a borrow signal B0, thereby setting the flip-flop 112. Therefore, the output α2 is set at &#34;H&#34;. Thereafter, the output α2 is kept &#34;H&#34; until the first level data signal LD 11  is completely sent. In this case, the output from the exclusive OR inverting gate 113 has a waveform of the signal SS1 set at &#34;H&#34; during the data period of the first to fifth dots of the level data signal LD 11  synchronized with the clock and at &#34;L&#34; during the data period of the sixth to tenth dots thereof. The timing chart of printing time of the first level is illustrated in FIG. 10A. The same operation as in the first level can be performed for the second to fifth levels, except that only the level data signal LD 11  is replaced with the level data signals LD 12  to LD 15 . In printing by the block B 2 , as shown in the timing chart of FIG. 10B, the controller 12 generates the block start signal BST immediately before printing for the block B 2 . The flip-flop 111 inverts the output α1 therefrom to &#34;H&#34;. Since the signal α1 is set at &#34;H&#34;, the value &#34;4&#34; is supplied from the bit generator 114 to the counter 115. The level data signals LD 11  to LD 15  are sequentially supplied to one input terminal of the AND gate 10, and the same operation as in the block B 1  is repeated. The borrow signal is generated when the counter 115 counts five clock pulses for the block B 1 . However, for the block B 2 , the borrow signal is generated when the counter 115 counts four clock pulses. For the block B 2 , since the signal α1 is set at &#34;H&#34;, the strobe signal has a waveform of SS2, as shown in FIG. 10B. Printing operations by the blocks B 1  and B 2  are alternately repeated in units of horizontal lines. The controller 12 comprises flip-flops or a microcomputer so as to generate the above signals at predetermined timings. 
     In the first embodiment, the common dot is predetermined as the dot D 5  when the heating element dots are divided into two blocks B 1  and B 2 . However, the pixel corresponding to the dot D 5  is printed twice and tends to be emphasized, resulting in a black line which is less apparent than the white line. In this case, the dot D 5  is used twice as compared with the dots belonging only to the blocks B 1  and B 2 . The lifetime of the dot D 5  is shortened. As a result, the lifetime of the thermal head as a whole is shortened. 
     According to a second embodiment, the common dot is shifted randomly for each line. 
     Unlike the first embodiment, the strobe signals comprise signals SS 11  and SS 12 , as shown in FIG. 11A. The heating dots are divided into a first block B 1  consisting of the dots D 3  to D 8  and a second block B 2  consisting of the dots D 1  to D 3  and D 8  to D 10  In this case, two boundaries are formed. The common dots are the dots D 3  and D 8 . A maximum of 6 pixels can be printed by the first half of one line, and a maximum of 6 pixels can also be printed by the second half of one line. 
     For the second line, independently of the first line, the strobe signals are updated to signals S 21  and S 22 , as shown in FIG. 11B. In order to update the strobe signals randomly, a random signal is supplied from a random bit generator (to be described later) to a strobe signal generator (to be described later). 
     The signals are processed in the same manner as in the first embodiment, and printing is performed. The positions of dots commonly assigned to the two blocks are changed randomly. The emphasized pixels are scattered randomly throughout the two-dimensional image and are averaged. Since the dots are equally used, the lifetime of the thermal head will not be shortened. 
     FIG. 12 is a block diagram of a strobe signal generator 11a according to the second embodiment of the present invention. A memory 8, a motor 13 and a thermal head TH are omitted. The number of pixels for one line is given as M in the second embodiment, so that the thermal head has M heating element dots. 
     A flip-flop 111a is initialized in response to a line start signal LNST from a controller 12a, so that an output α21 from the flip-flop 111a is set at &#34;H&#34;. Toggling is performed by a block start signal BST from the controller 12a. A flip-flop 112a is initialized in response to the level start signal LVST generated from the controller 12a before the level data signal is generated for each level. An output α22 from the flip-flop 112a is set at &#34;L&#34;. The output α22 is set at &#34;H&#34; in response to a borrow signal β1 from a counter 115a. The output α22 is set at &#34;L&#34; in response to the borrow signal β2 from the counter 116a. A random bit generator 113a determines a given random number immediately before line printing and keeps the given random number during printing of the corresponding line. The random bit generator 113a supplies the value &#34;l&#34; to the counter 115a when the output α21 from the flip-flop 111a is set at &#34;L&#34;. However, the random bit generator 113a supplies a value &#34;l+1&#34; to the counter 115a when the output α21 is set at &#34;H&#34;. A bit generator 114a supplies a value &#34;(M/2)+1&#34; to a counter 116a when the output α21 is set at &#34;L&#34;. However, when the output α21 is set at &#34;H&#34;, the bit generator 114a supplies a value &#34;(M/2)-1&#34; to the counter 116a. The presettable down counter 115a presets the output value from the random bit generator 113a in response to the line start signal LNST. When the counter 115a counts the random bit value, it generates the borrow signal β1. The random bit generator 113a comprises a RAM storing bits accessed at random. The presettable down counter 116a presets the output value from the bit generator 114a. When a count of the counter 116a reaches this output value, it generates a borrow signal β2. The strobe signal generator 11a also comprises an exclusive OR gate 117a and an AND gate 118a. 
     In operation, the strobe signal comprises a repetition signal SS 1  for each level during printing for the block B 1 . During printing for the block B 2 , a signal SS 2  having a waveform different from that of the signal SS 1  is repeated for each level. The waveform of the strobe signal in a given level for each block will be described. 
     The random bit generator 113a generates the given value &#34;l&#34; before one-line printing is started. During printing by the block B 1 , the output α21 from the flip-flop 111a is set at &#34;L&#34;. The output α22 from the flip-flop 112a is set at &#34;L&#34; in response to the level start signal LVST. The initial value &#34;l&#34; and the initial value &#34;(M/2)+1&#34; are preset in the counters 115a and 116a, respectively. When the level data signal is supplied to one input terminal of an AND gate 10 in synchronism with the clock signal C, the counter 115a starts counting down the clocks. In this case, the counter 116a has not started counting since the output α22 is set at &#34;L&#34;. When a count of the counter 115a exceeds the preset value &#34;l&#34;, it generates the borrow signal β1 to set the output α22 from the flip-flop 112a to be &#34;H&#34;. When the output α22 is set at &#34;H&#34;, the counter 116a starts counting up to the preset value (M/2)+1. When a count of the counter 116a exceeds the preset value, it generates the borrow signal β2 to set the output from the flip-flop 112a to &#34;L&#34;. The above operation is shown in the timing chart of FIG. 13A, thereby obtaining the strobe signal SS1 for the block B 1 . Subsequently, as shown in the timing chart of FIG. 13B, the strobe signal for the block B 2  is obtained in response to the block start signal BST in the same manner as in the first embodiment, except that the output α21 is set at &#34;H&#34;, the initial value of the counter 115a is l+1 and the initial value of the counter 116a is (M/2)-1. 
     A thermal head used in an image recording apparatus of a third embodiment has M (even number) heating element dots which are divided into blocks B 1   and B 1  each having (M/2)+1 dots. Two common dots are assigned to the blocks B 1  and B 2  in the same manner as in the second embodiment. In addition, the thermal head is controlled to stop employing the common dots during gradation printing for each of a plurality of levels so as to prevent emphasis of the pixel corresponding to the common dot. 
     For this reason, two strobe signals are required for each block printing. The first strobe signal is used for the first half of each gradation level, and the second strobe signal is used for the second half of the gradation level. One strobe signal has a pulse width shorter by a common dot(s) than that of the other strobe signal. In the third embodiment, the comparison levels include comparison levels L 1  to L p . 
     FIG. 14 shows the two strobe signals for one line. A strobe signal SS 11a  is used for printing pixels of the first half of a given gradation level of the first line by the block B 1 . A strobe signal SS 11b  is used for printing pixels of the second half of gradation level of the first line by the block B 1  &#39;. Similarly, a strobe signal SS 12a  is used for printing pixels of the first half of the gradation level of the first line by the block B 2 , and a strobe signal SS 12b  is used for printing pixels of the second half of the gradation level of the first line by the block B 2  &#39;. 
     A data strobe signal generator 11b shown in FIG. 15 generates the strobe signals SS 11a  and SS 11b  for causing blocks B 1  and B 1  &#39; to perform printing for the first line and the strobe signals SS 12a  and SS 12b  for causing blocks B 2  and B 2  &#39; to perform printing for the first line. Waveforms of these signals are changed randomly for each line. The strobe signal SS 11a  is supplied for the level data signals LD 1  to LD q  to an AND gate 10 to perform printing by the block B 1 . 
     Printing is performed in the same manner as in the previous embodiments in response to each level data signal from the signal LD 1  to the signal LD 1q . Thereafter, following the signal LD 1q+1  &#39; the strobe signal SS 11b  instead of the strobe signal SS 11a  is used for the level data signal so as to perform printing by the block B 1  &#39;. 
     When the level data signal is supplied up to the signal LD 1p  &#39; the pixels corresponding to the blocks B 1  and B 1  &#39; are completely printed. 
     The lowest level data signal LD 11  is supplied again to one terminal of the AND gate 10. The strobe signal SS 12a  is supplied to the other input terminal of the block B 2  so as to drive the block B 2 . 
     Printing is repeated in accordance with the subsequent level data LD 12  to LD 1q , so that the pixels of a gradation level up to the gradation level q are printed. 
     Pixels corresponding to the common dots D l+1   and D m  of the blocks B 1  and B 2  have thus been subjected to printing 2q number of times. When a parameter q is properly selected, the pixel density can be equal to the highest gradation level p. As a result, the common dots D l+1  and D m  need not be used for level data having a higher level than the (q+1) level. 
     For this reason, the strobe signal SS 12b  is used for the level data LD 1q+1 . 
     Subsequently, when printing is repeated up to the highest level data LD 1p , pixels corresponding to the blocks B 2  and B 2  &#39; are completely printed. As a result, pixels of the first line are printed. In this state, a sequence controller 12 supplies a signal to a motor 13 which is rotated to shift the imaging sheet and the heating element dots of the thermal head are aligned with the start position of the second line. 
     When strobe signals which are not related to the strobe signals SS 11a , SS 11b , SS 12a  and SS 12b  of the first line are used to process the second-line image signals, pixels for the second line can be printed. 
     FIG. 15 is a block diagram of a random strobe signal generator. The thermal head, the memory 8 and the motor 13 are omitted. A comparator 9b stores comparison levels L 1  to L p  unlike the comparator of the first and second embodiments. A data selector 117b receives two inputs α31 and α32 and selects one of them. Flip-flops 111b and 112b have the same functions as the flip-flops 111a and 112a described previously. The output α31 from the flip-flop 111b is set at &#34;L&#34; when the block B 1  is driven. However, when the block B 2  is driven, the output α32 from the flip-flop 112b is set at &#34;H&#34;. The output α32 from the flip-flop 112b is set at &#34;H&#34; in response to a borrow signal β21 from a counter 115b. The output α32 from the flip-flop 112b is set at &#34;L&#34; in response to a borrow signal β22 from a counter 116b. A random bit generator 113b supplies a value representing the number l of dots of the block B 1  of the first line to the counter 115b and maintains the value l for the printing time of the same line. The counters 115b and 116b comprise presettable up/down counters for counting down the preset values and generating the borrow signals β21 and β22. 
     A counter 14 counts the number of comparison levels and detects the qth gradation level. An output from the data selector 117b is set at &#34;L&#34; when the outputs α31 and α32 are both set at &#34;L&#34;. The output from the data selector 117b is set at &#34;H&#34; when the signal α31 is set at &#34;L&#34; and the signal α32 is set at &#34;H&#34;, or when the signal α31 is set at &#34;H&#34; and the signal α32 is set at &#34;L&#34;. When the signals α31 and α32 are both set at &#34;H&#34;, the output from the data selector 117b is set at &#34;L&#34;. The data selector 117b can be replaced with an exclusive OR gate for receiving the signals α31 and α32. 
     Assume that printing is performed for the first line. The random bit generator 113b generates a given random number &#34;l&#34;. During printing of the first line, the value &#34;l&#34; is kept constant. When the level data signals LD 11  to LD 1p  are sequentially supplied to the AND gate 10 in synchronism with the clock signal, the flip-flops 111b and 112b are cleared immediately before the level data signals LD 11  to LD 1p  are supplied in response to the clock signal. The random number &#34;l&#34; is set in the counter 115b, and the dot number (m-l), i.e., (M/2)+1 is set in the counter 116b. The parameter q is preset in the counter 14 in response to the block start signal BST and is decremented by one in response to each pulse of the level start signal LVST. When the count of the counter 14 reaches zero, it generates a borrow signal. When printing by the block B 1  is performed, the counter 14 generates the borrow signal. A pulse from the sequence controller 12b is supplied to the count up input terminal of the counter 115b before the next level data signal LD q+1  is supplied, so that the preset value of the counter 115b is l+1. Two pulses are supplied from the controller 12b to the count down input terminal of the counter 116b, so that the preset value thereof is (M/2)-1. 
     The operation description will return to the beginning. The value &#34;l&#34; is preset in the counter 115b  and the value (M/2)+1 is preset in the counter 116b before the level data signal LD 11  is supplied. When this level data signal is supplied, the counter 115b performs count-down operation in response to the clock signal. When the count of the counter 115 reaches zero, the flip-flop 112b is set. At the same time, the counter 116b performs count-down operation in response to the clock signal. When the count of the counter 116b reaches zero, the flip-flop 112b is reset, thereby generating the strobe signal SS 11a . The same operation as described above is repeated up to the highest level data signal LD 1q . 
     When the level data signal LD 1q  is processed, the counter 14 generates the borrow signal. In response to the borrow signal, the controller 12b supplies one pulse to the count up terminal of the counter 115b and two pulses to the count down terminal of the counter 116b. The counters 115b and 116b are preset to be l+1 and (M/2)-1, respectively. For this reason, after the level data signal LD 1q+1 , the counter 115b counts down the value from l+1, and the counter 116b counts down the value from (M/2)-1. As a result, the strobe signal SS 11b  is generated. The same operation as described above is repeated until the level data LP 1p  is reached. 
     When the block B 1  &#39; is completely driven, the block B 2  is initiated. One pulse is supplied from the controller 12b to the count up input terminal of the counter 115b, so that the preset value of the counter 115b is l+1. Two pulses are supplied from the controller 12b to the count down input terminal of the counter 116b, so that the preset value thereof is (M/2)-1. The output α31 from the flip-flop 111b is set at &#34;H&#34; to generate the strobe signal SS 12a  having an inverted waveform of the strobe signal SS 11b . The same operation as described above is repeated until the highest level data signal LD 1q  is reached. 
     When the level data signal LD 1q  is processed and the counter 14 generates the borrow signal, the block B 2  &#39; is driven. In this case, the count up and down control signals are not supplied to the counters 115b and 116b, respectively. The preset values of the counters 115b and 116b are kept at l and M/2, respectively. For this reason, the strobe signal SS 12b  is generated. The same operation as described above is repeated until the highest level data signal LD 1p  is reached. 
     According to the third embodiment, the pixel corresponding to the dot commonly assigned to the blocks B 1  and B 2  is not printed twice. The density of this pixel is not higher than those of other pixels. The common dots are shifted randomly to completely eliminate black lines.