Abstract:
An embodiment of a power supply includes an input node operable to receive an input voltage, an output node operable to provide a regulated output voltage, an odd number of magnetically coupled phase paths each coupled between the input and output nodes, and a first magnetically uncoupled phase path coupled between the input and output nodes. Such a power supply may improve its efficiency by activating different combinations of the coupled and uncoupled phase paths depending on the load conditions. For example, the power supply may activate only an uncoupled phase path during light-load conditions, may activate only coupled phase paths during moderate-load conditions, and may activate both coupled and uncoupled phase paths during heavy-load conditions and during a step-up load transient.

Description:
PRIORITY CLAIM 
       [0001]    The present application is a Continuation-In-Part of copending U.S. patent application Ser. No. 12/136,014 filed Jun. 9, 2008; which application claims the benefit of U.S. Provisional Patent Application Ser. No. 60/933,949, filed Jun. 8, 2007, now expired; all of the foregoing applications are incorporated by reference herein in their entireties. 
       CROSS-RELATED APPLICATIONS 
       [0002]    The present application is related to U.S. patent application Ser. No. 12/136,018 entitled COUPLED-INDUCTOR CORE FOR UNBALANCED PHASE CURRENTS, filed on Jun. 9, 2008, and is related to U.S. patent application Ser. No. 12/136,023 entitled INDUCTOR ASSEMBLY HAVING A CORE WITH MAGNETICALLY ISOLATED FORMS, filed on Jun. 9, 2008, now U.S. Pat. No. 8,179,116, issued on May 15, 2012; all of the foregoing applications have a common owner and are incorporated herein by reference in theirs entireties. 
     
    
     SUMMARY 
       [0003]    This Summary is provided to introduce, in a simplified form, a selection of concepts that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. 
         [0004]    An embodiment of a power supply includes an input node operable to receive an input voltage, an output node operable to provide a regulated output voltage, an odd number of magnetically coupled phase paths each coupled between the input and output nodes, and a first magnetically uncoupled phase path coupled between the input and output nodes. 
         [0005]    Such a power supply may improve its efficiency by activating different combinations of the coupled and uncoupled phases depending on the load conditions. For example, the power supply may activate only an uncoupled phase path during light-load conditions, may activate only coupled phase paths during moderate-load conditions, and may activate both coupled and uncoupled phase paths during heavy-load conditions and during a step-up load transient. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0006]      FIG. 1  is a schematic diagram of an embodiment of a multiphase buck converter that includes an even number of magnetically coupled phase paths and a magnetically uncoupled phase path. 
           [0007]      FIG. 2  is a timing diagram of phase switching signals and phase currents generated by the buck converter of  FIG. 1  while operating according to a first embodiment of a switching technique. 
           [0008]      FIG. 3  is a timing diagram of phase switching signals and phase currents generated by the buck converter of  FIG. 1  while operating according to a second embodiment of a switching technique. 
           [0009]      FIG. 4  is a schematic diagram of another embodiment of a multiphase buck converter that includes an odd number of magnetically coupled phase paths and at least one magnetically uncoupled phase path. 
           [0010]      FIG. 5  is a timing diagram of phase switching signals and phase currents generated by the buck converter of  FIG. 4  while operating according to the first embodiment of a switching technique. 
           [0011]      FIG. 6  is a timing diagram of phase switching signals and phase currents generated by the buck converter of  FIG. 4  according to the second embodiment of a switching technique. 
           [0012]      FIG. 7  is a timing diagram of phase switching signals and phase currents generated by the buck converter of  FIG. 4  while operating according to a third embodiment of a switching technique. 
           [0013]      FIGS. 8-13  are diagrams of embodiments of inductor assemblies that may provide the phase windings of the buck converters of  FIGS. 1 and 4 . 
           [0014]      FIG. 14  is a block diagram of a system that may incorporate one or both of the buck converters of  FIGS. 1 and 4 . 
       
    
    
     DETAILED DESCRIPTION 
       [0015]    Magnetically coupled inductors are used in circuits such as multiphase switching power supplies. For example, using coupled inductors in a multiphase buck converter may allow a designer to reduce the size (e.g., the component count and component values) of the output filter, and thus the size of the converter, for a given transient response and a given amplitude of the output ripple voltage. 
         [0016]    Magnetically uncoupled inductors are also used in circuits such as multiphase switching power supplies. Although using uncoupled inductors in a multiphase power supply may increase the size of the supply for a given transient response and for a given amplitude of the output ripple voltage as compared to a coupled-inductor (CI) multiphase supply, an uncoupled-inductor (UI) multiphase supply may be more efficient than a CI multiphase supply under certain load conditions. 
         [0017]      FIG. 1  is a schematic diagram of an embodiment of a multiphase buck converter  10 , which includes magnetically coupled phases  12   1 - 12   2  and a magnetically uncoupled phase  14  for driving a load (e.g., an integrated circuit such as a processor)  15  with a regulated output voltage V out . As further discussed below, selectively activating the coupled and uncoupled phases  12  and  14  in response to the load may improve the efficiency of the buck converter  10  as compared to purely CI and purely UI converters. Improving the efficiency of the buck converter  10  may not only reduce the amount of energy dissipated by the converter, but, by reducing the amount of heat generated by the converter, may also reduce the amount of energy required to cool a system (e.g., a computer) in which the converter is disposed. 
         [0018]    The magnetically coupled phase  12   1  includes a switching circuit  16   1 , a winding  18   1 , and a current sensor  20   1 . The switching circuit  16   1  includes a high-side transistor  22   1  and a low-side transistor  24   1 . The winding  18   1  includes a conductor that is wound about a magnetically permeable core (not shown in  FIG. 1 ). And the current sensor  20   1  may be any conventional current sensor, for example, a resistor in series with the winding  18   11 , or a series combination of a resistor and a capacitor in parallel with the winding. 
         [0019]    Similarly, the magnetically coupled phase  12   2  includes a switching circuit  16   2 , a winding  18   2 , and a current sensor  20   2 . The switching circuit  16   2  includes a high-side transistor  22   2  and a low-side transistor  24   2 . The winding  18   2  includes a conductor that is wound about the same magnetically permeable core (not shown in  FIG. 1 ) as is the winding  18   1 . And the current sensor  20   2  may be similar to the current sensor  20   1 . 
         [0020]    The magnetically uncoupled phase  14  includes a switching circuit  26 , a winding  28 , and a current sensor  30 . The switching circuit  26  includes a high-side transistor  32  and a low-side transistor  34 . As discussed below in conjunction with  FIGS. 8-13 , the winding  28  includes a conductor that may be wound about the same core (not shown in  FIG. 1 ) as are the windings  18   1  and  18   2 . And the current sensor  28  may be similar to the current sensors  20   1  and  20   2 . 
         [0021]    In addition to the phases  12   1 ,  12   2 , and  14 , the converter  10  includes a power-supply controller  36 , which may be disposed on an integrated circuit (IC), and an output filter capacitor C out    37 . 
         [0022]    The controller  36  includes a phase activator  38 , phase enable circuits (AND gates in the illustrated embodiment)  40   1 ,  40   2 , and  42 , phase drivers  44   1 ,  44   2 , and  46 , and an output-current detector  48 . Under steady-state operating conditions, the average output current I out     —     avg  equals the load current I Load ; hence, changes in I Load  are reflected in corresponding changes in the output current I out . 
         [0023]    The phase activator  38  generates switching signals PWM 1 , PWM 2 , and PWM 3  for the phases  12   1 ,  12   2 , and  14 , respectively, and generates enable signals EN 1 , EN 2 , and EN 3 . If the signal EN 1  is logic 1, then the enable circuit  40   1  allows the switching signal PWM 1  to propagate to the driver  44   1 , and thus enables the phase activator  38  to activate the phase  12   1 . Likewise, if the signal EN 1  is logic 0, then the enable circuit  40   1  prohibits the switching signal PWM 1  from propagating to the driver  44   1 , and thus disables, i.e., deactivates, the phase  12   1 . The enable circuits  40   2  and  43  operate similarly in response to signals EN 2  and EN 3 , respectively. 
         [0024]    The drivers  44  and  46  may each include an inverter. For example, the driver  44 , may include an inverter having an input node coupled to the output of the AND gate  40   1  and to the gate of the high-side transistor  22   1 , and having an output node coupled to the gate of the low-side transistor  24   1 . The inverters of the drivers  44   2  and  46  may be coupled in a similar manner. 
         [0025]    The output-current detector  48  includes a window comparator  50  and a summer  52 . The comparator  50  receives from the summer  52  a sum signal representing the total output current I out , compares the sum signal to two reference voltages Threshold 1  and Threshold 2  (Threshold 2 &gt;Threshold 1 ), and provides the result of the comparison to the phase activator  38 . For example, if the sum signal is less than or equal to Threshold 1 , then the phase activator  38  generates EN 1 =EN 2 =logic 0 and EN 3 =logic 1 to deactivate the coupled phases  12   1  and  12   2  and to activate the uncoupled phase  14 . If the sum signal is greater than Threshold 1  and less than Threshold 2 , then the phase activator  38  generates EN 1 =EN 2 =logic 1 and EN 3 =logic 0 to activate the coupled phases  12   1  and  12   2  and to deactivate the uncoupled phase  14 . And, if the sum signal is greater than Threshold 2 , then the phase activator  38  generates EN 1 =EN 2 =EN 3 =1 to activate all of the phases  12   1 ,  12   2 , and  14 . The summer  52  may include, for example, a summing node of an operational amplifier (not shown in  FIG. 1 ), and Threshold 1  and Threshold 2  may be generated externally to the power-supply controller  36 , may be generated internally, or may be generated internally and adjustable externally. 
         [0026]    The power-supply controller  36  may include other circuitry that is omitted from  FIG. 1  for brevity. For example, the controller  36  may include circuitry that causes each of the active ones of the phases  12   1 ,  12   2 , and  14  to carry a respective percentage of I out . Where such circuitry causes each of the active ones of the phases  12   1 ,  12   2 , and  14  to carry equal percentages of I out , then the active phases may be described as carrying balanced currents. Examples of such circuitry are described in U.S. Pat. No. 6,278,263, which is incorporated by reference. And where such circuitry causes each of the active ones of the phases  12   1 ,  12   2 , and  14  to carry unequal percentages of I out , then the active phases may be described as carrying unbalanced currents. Examples of such circuitry are described in U.S. patent application Ser. No. 12/136,018, which is incorporated by reference. 
         [0027]    Operation of the multiphase buck converter  10  is discussed according to an example where Threshold 1  has a level that corresponds to I out ˜10 Amperes (A), and where Threshold 2  has a level that corresponds to I out ˜50 A. 
         [0028]    In a first mode of operation where the summing signal from the comparator  52  is between Threshold 1  and Threshold 2 , and thus ˜10 A&lt;I out &lt;˜50 A, the phase activator  38  activates the coupled phases  12   1  and  12   2 , and deactivates the uncoupled phase  14  such that the converter  10  has its highest efficiency for this range of I out . To activate the phases  12   1  and  12   2 , the phase activator  38  generates EN 1 =EN 2 =1 so as to cause the switch circuits  16   1  and  16   2  to switch the coupled phases  12   1  and  12   2  at a switching frequency and with respective duty cycles sufficient to regulate V out  to a specified voltage level, such as 1.8 Volts (V), which is less than an input voltage V in  such as 3.3 V. For example, where the phases have equivalent electrical characteristics and  12   1  and  12   2  carry balanced currents, i.e., equal portions (here half) of the average I out , and have similar electrical characteristics (e.g., inductance) then the phase activator  38  causes the switching circuits  16   1  and  16   2  to switch the phases  12   1  and  12   2  with substantially the same duty cycle. And to deactivate the phase  14 , the phase activator  38  generates EN 3 =0 so that the switching circuit  26  puts both the high-side and low-side transistors  32  and  34  in a high-impedance state. 
         [0029]    In a second mode of operation where the summing signal is less than or equal to Threshold 1  (and thus also less than Threshold 2 ), and thus I out ˜10 A, the phase activator  38  deactivates the coupled phases  12   1  and  12   2 , and activates the uncoupled phase  14  such that the converter  10  has its highest efficiency for this range of I out . To activate the phase  14 , the phase activator  38  generates EN 3 =1 so as to cause the switch circuit  26  to switch the uncoupled phase  14  at a switching frequency and with a duty cycle sufficient to regulate V out  to the specified voltage level. And to deactivate the coupled phases  12   1  and  12   2 , the phase activator  38  generates EN 1 =EN 2 =0 so that the switching circuits  16   1  and  16   2  put both the high-side and low-side transistors  22   1 ,  22   2 ,  24   1 , and  24   2  in a high-impedance state. 
         [0030]    In a third mode of operation where the summing signal is greater than or equal to Threshold 2  (and thus also greater than Threshold 1 ), and thus I out ˜50 A, the phase activator  38  activates the coupled phases  12   1  and  12   2  and the uncoupled phase  14  such that the converter  10  has its highest efficiency for this range of l out . To activate the phases  12   1 ,  12   2 , and  14 , the phase activator  38  generates EN 1 =EN 2 =EN 3 =1 so as to cause the switch circuits  16   1 ,  16   2 , and  26  to switch each of the phases  12   1 ,  12   2 , and  14  at respective switching frequencies and with respective duty cycles sufficient to regulate V out  to the specified voltage level. 
         [0031]    Still referring to  FIG. 1 , in summary, by selectively activating the coupled phases  12   1  and  12   2  and the uncoupled phase  14  in response to the level of I out , the phase activator  38  may allow the converter  10  to operate at its highest efficiency for each identifiable load level. 
         [0032]    Alternate embodiments of the multiphase buck converter  10  are contemplated. For example, although the converter  10  is described as having two coupled phases  12   1  and  12   2  and a single uncoupled phase  14 , the converter may have more than two coupled phases and more than one uncoupled phase—an example of a multiphase buck converter having three coupled phases and a single uncoupled phase is described below in conjunction with  FIG. 4 . Furthermore, although shown as being external to the power-supply controller  36 , the transistors  22 ,  24 ,  32 , and  34  may be disposed on the same IC as the other components of the controller  36 , as may be any of the other components (e.g., windings  18 , current sensors  20 ) of the converter  10  shown external to the controller in  FIG. 1 . Moreover, instead of activating or deactivating all of the coupled phases  12  together, the phase activator  38  may activate fewer than all of the coupled phases (with or without an active uncoupled phase) in response to more than two threshold levels. A technique for activating fewer than all coupled phases is disclosed in U.S. patent application Ser. No. 11/519,516, filed Sep. 12, 2006, which is incorporated by reference. In addition, although described in conjunction with a buck converter, the above-described concepts for selectively activating coupled and uncoupled phases may be useful in any type of multiphase power supply. Furthermore, although the buck converter  10  is described as having a pulse-width-modulated (PWM) architecture, the converter may have another switching architecture such as a constant-on-time architecture. Moreover, the detector  48  may be omitted, and the load  15  may provide a load signal to the phase activator  38 , the load signal indicating the load level. For example, the load signal may be similar to the signal that would otherwise be generated by the comparator  50 . Or, the load  15  may provide the load signal even when the detector  48  is present. In either case, the load signal may give the phase activator  38  advance notice of a significant load change that will cause the phase activator to activate a combination of CI and UI phases different from the current combination. Therefore, in response to the load signal, the phase activator  38  may begin to change the combination of active phases before the load  15  changes, and thus may reduce or eliminate load-transient-induced overshoot and undershoot on V out . In addition, the phase-enable circuits  40  and  42  may include circuitry other than, or in addition to, NAND gates. Furthermore, although shown as MOS transistors, the transistors  22 ,  24 ,  32 , and  34  may be bipolar transistors, or the transistors  24  and  34  may be replaced with diodes. 
         [0033]      FIG. 2  is a timing diagram of the signals PWM 1 , PWM 2 , and PWM 3  of  FIG. 1 , the respective phase currents IL 1 , IL 2 , and IL 3  through the phases  12   1 ,  12   2 , and  14  of  FIG. 1 , and I out  while the converter  10  is operating in the above-described third mode and according to a first embodiment of a switching technique. These signals may not be drawn to scale, however. Furthermore, in this example, the signals PWM 1 , PWM 2 , and PWM 3  (or amplified versions thereof) respectively drive high-side transistors  22   1 ,  22   2  and  32 , and the inverses of these signals respectively drive the low-side transistors  24   1 ,  24   2 , and  34 . Moreover, although shown as having the same duty cycle, the signals PWM 1 , PWM 2 , and PWM 3  may have different duty cycles. 
         [0034]    Referring to  FIGS. 1 and 2 , the phase activator  38  implements this switching technique by causing the switching circuits  16   1 ,  16   2 , and  26  to switch the active ones of the phases  12   1 ,  12   2 , and  14  at a frequency F sw  and at relative phase shifts of 360°/NA, where NA=number of active coupled and uncoupled phases. For example, during the third operating mode when all three phases  12   1 ,  12   2 , and  14  are active, the switching circuits  16   1 ,  16   2 , and  26  switch the phases at relative phase shifts of 0°, 120°, and 240° as shown in  FIG. 2 . During the second operating mode when only the two coupled phases  12   1  and  12   2  are active, then the switching circuits  16   1  and  16   2  switch the coupled phases at frequency F sw  and relative phase shifts of 0° and 180°. And during the first operating mode when only the uncoupled phase  14  is active, then the switching circuit  26  switches the uncoupled phase at frequency F sw . 
         [0035]    With this switching technique, the ripple frequency of I out , and thus the ripple frequency of V out , approximately equals NA·F sw . 
         [0036]    Still referring to  FIG. 2 , alternate embodiments of the described switching technique are contemplated. Two or more of the active ones of the phases  12   1 ,  12   2 , and  14  may be switched at the same relative phase shifts. For example, during the third operating mode of the converter  10  ( FIG. 1 ) while all of the phases  12   1 ,  12   2 , and  14  are active, the phase  14  may be switched with the same relative phase shifts as phase  12   1  or phase  12   2 . That is, PWM 3  may be aligned in time with PWM 1  or PWM 2 . Moreover, although the converter  10  includes only two coupled phases and one uncoupled phase, the described switching technique may be scaled for more than two coupled phases and for more than one uncoupled phase. 
         [0037]      FIG. 3  is a timing diagram of the signals PWM 1 , PWM 2 , and PWM 3  of  FIG. 1 , the respective phase currents IL 1 , IL 2 , and IL 3  through the phases  12   1 ,  12   2 , and  14  of  FIG. 1 , and I out  while the converter  10  of  FIG. 1  is operating in the above-described third mode and according to a second embodiment of a switching technique. And as discussed above in conjunction with  FIG. 3 , these signals may not be drawn to scale, and PWM 1 , PWM 2 , and PWM 3  may have a different duty cycles and respectively drive the high-side transistors  22   1 ,  22   2 , and  32 . 
         [0038]    Referring to  FIGS. 1 and 3 , the phase activator  38  implements the second embodiment of a switching technique by causing the switching circuits  16   1  and  16   2  to switch the phases  12   1  and  12   2  at a frequency F sw  and at relative phase shifts of 360°/NAC, where NAC=the number of active coupled phases, and by causing the switching circuit  26  to switch the phase  14  at a frequency equal to NAC·F sw  and at phase shifts relative to F sw  of 360°/2(NAC). That is, the high-side transistor  32  switches “on” the phase  14  at times that are approximately centred between the times that the transistors  22   1  and  22   2  switch “on” the phases  12   1  and  12   2 . For example, during the third mode of operation when all three phases  12   1 ,  12   2 , and  14  are active, the switching circuits  16   1  and  16   2  switch the phases  12   1  and  12   2  at F sw  and at relative phase shifts of 0° and 180°, and the switching circuit  26  switches the phase  14  at 2·F sw  and at relative phase shifts of 90° and 270° as shown in  FIG. 3 . During the second operating mode when only the two coupled phases  12   1  and  12   2  are active, the switching circuits  16   1  and  16   2  switch the coupled phases at frequency F sw  and at relative phase shifts of 0° and 180°. And during the first operating mode when only the uncoupled phase  14  is active, then the switching circuit  26  switches the uncoupled phase at frequency F sw , or, alternatively, at 2·F sw . 
         [0039]    With the second switching technique, the ripple frequency of I out , and thus the ripple frequency of V out , approximately equals 2·NAC·F sw . Also, in the third operating mode when all of the phases  12   1 ,  12   2 , and  14  are active, the ripple amplitude of I out , and thus the ripple amplitude of V out , may be less than when the converter  10  operates according to the first embodiment of the switching technique as discussed above in conjunction with  FIG. 2 . 
         [0040]    Still referring to  FIG. 3 , alternate embodiments of the second switching technique are contemplated. For example, the phase  14  may be switched on at approximately the same times that the phases  12   1  and  12   2  are switched on; in the embodiment of  FIG. 3 , this may be accomplished by shifting PWM 3  by 90° relative to F sw , which would reduce the frequency of the I out /V out  ripple to 2·F sw . Moreover, although the converter  10  of  FIG. 1  includes only two coupled phases and one uncoupled phase, the second switching technique may be scaled for more than two coupled phases and for more than one uncoupled phase. Furthermore, the alternate embodiments discussed above in conjunction with  FIG. 2  for the first switching technique may also be applicable to the second switching technique. 
         [0041]      FIG. 4  is a schematic diagram of an embodiment of a multiphase buck converter  60 , which is similar to the buck converter  10  of  FIG. 1  except that it includes an odd number (here three) of magnetically coupled phases  12   1 - 12   3  instead of two coupled phases. In  FIG. 4 , like numbers reference like components relative to the buck converter  10  of  FIG. 1 . As discussed above in conjunction with  FIG. 1  and as further discussed below, selectively activating the coupled and uncoupled phases  12  and  14  in response to the load  15  may improve the efficiency of the buck converter  60  as compared to purely CI and purely UI buck converters. 
         [0042]    Operation of the converter  60  is discussed according to an example where Threshold 1  has a level that corresponds to I out ˜10 A, and where Threshold 2  has a level that corresponds to I out ˜50 A. 
         [0043]    In a first mode of operation where the summing signal from the comparator  52  is between Threshold 1  and Threshold 2 , and thus ˜10 A&lt;I out &lt;˜50 A, the phase activator  38  activates the coupled phases  12   1 ,  12   2 , and  12   3 , and deactivates the uncoupled phase  14  such that the converter  60  has its highest efficiency for this range of I out . To activate the phases  12   1 - 12   3 , the phase activator  38  generates EN 1 =EN 2 =EN 3 =1 so as to cause the switch circuits  16   1 - 16   3  to switch the coupled phases  12   1 - 12   3  at a switching frequency and with respective duty cycles sufficient to regulate V out  to a specified voltage level, such as 1.8 V, which is less than an input voltage Vin such as 3.3 V. For example, where the phases  12   1 - 12   3  carry balanced currents and have similar electrical characteristics, then the phase activator  38  causes the switching circuits  16   1 - 16   3  to switch the phases  12   1 - 12   3  with substantially the same duty cycle. And to deactivate the phase  14 , the phase activator  38  generates EN 4 =0 so that the switching circuit  26  puts both the high-side and low-side transistors  32  and  34  in a high-impedance state. 
         [0044]    In a second mode of operation where the summing signal is less than or equal to Threshold 1  (and thus also less than Threshold 2 ), and thus I out ≦˜10 A, the phase activator  38  deactivates the coupled phases  12   1 - 12   3 , and activates the uncoupled phase  14  such that the converter  60  has its highest efficiency for this range of I out . To activate the phase  14 , the phase activator  38  generates EN 4 =1 so as to cause the switch circuit  26  to switch the uncoupled phase  14  at a switching frequency and with a duty cycle sufficient to regulate V out  to the specified voltage level. And to deactivate the coupled phases  12   1 - 12   3 , the phase activator  38  generates EN 1 =EN 2 =EN 3 =0 so that the switching circuits  16   1 - 16   3  put the high-side and low-side transistors  22   1 ,  22   2 ,  22   3 ,  24   1 ,  24   2 , and  24   3  in a high-impedance state. 
         [0045]    In a third mode of operation where the summing signal is greater than or equal to Threshold 2  (and thus also greater than Threshold 1 ), and thus I out ≧˜50 A, the phase activator  38  activates the coupled phases  12   1 - 12   3  and the uncoupled phase  14  such that the converter  60  has its highest efficiency for this range of I out . To activate the phases  12   1 - 12   3  and  14 , the phase activator  38  generates EN 1 =EN 2 =EN 3 =EN 4 =1 so as to cause the switch circuits  16   1 - 16   3  and  26  to switch each of the phases  12   1 - 12   3  and  14  at respective switching frequencies and with respective duty cycles sufficient to regulate V out  to the specified voltage level. 
         [0046]    Still referring to  FIG. 4 , in summary, by selectively activating the coupled phases  12   1 - 12   3  and the uncoupled phase  14  in response to the level of I out , the phase activator  38  may allow the converter  60  to operate at its highest efficiency for each identifiable load level. 
         [0047]    Furthermore, alternate embodiments of the multiphase buck converter  60  are contemplated. For example, although the converter  60  is described as having three coupled phases  12   1 - 12   3  and a single uncoupled phase  14 , the converter may have more than three coupled phases and more than one uncoupled phase. Furthermore, the alternate embodiments described above for the buck converter  10  of  FIG. 1  may also apply to the buck converter  60 . 
         [0048]      FIG. 5  is a timing diagram of the signals PWM 1 , PWM 2 , PWM 3 , and PWM 4  of  FIG. 4 , the respective phase currents IL 1 , IL 2 , IL 3 , and IL 4  through the phases  12   1 ,  12   2 ,  12   3 , and  14  of  FIG. 4 , and I out  while the converter  60  is operating in the above-described third mode and according to the first embodiment of a switching technique. These signals may not be drawn to scale, and PWM 1 -PWM 4  may have different duty cycles and respectively drive the high-side transistors  22   1 - 22   3  and  32 , respectively. 
         [0049]    Referring to  FIGS. 4 and 5 , the phase activator  38  implements this switching technique by causing the switching circuits  16   1 ,  16   2 ,  16   3 , and  26  to switch the active ones of the phases  12   1 ,  12   2 ,  12   3 , and  14  at a frequency F sw  and at relative phase shifts of 360°/NACU, where NACU=number of active coupled and uncoupled phases. For example, during the third operating mode when all four phases  12   1 ,  12   2 ,  12   3 , and  14  are active, the switching circuits  16   1 ,  16   2 ,  16   3 , and  26  switch the phases at relative phase shifts of 0°, 90°, 180°, and 270° as shown in  FIG. 5 . During the second operating mode when only the three coupled phases  12   1 ,  12   2 , and  12   3  are active, then the switching circuits  16   1 - 16   3  switch the coupled phases at frequency F sw  and relative phase shifts of 0°, 120°, and 240°. And during the first operating mode when only the uncoupled phase  14  is active, then the switching circuit  26  switches the uncoupled phase at frequency F sw . 
         [0050]    With this switching technique, the ripple frequency of I out , and thus the ripple frequency of V out , approximately equals NACU·F sw . 
         [0051]    Still referring to  FIG. 5 , alternate embodiments of the described switching technique are contemplated. For example, the alternate embodiments described above in conjunction with  FIGS. 2 and 3  may be applicable. 
         [0052]      FIG. 6  is a timing diagram of the signals PWM 1 , PWM 2 , PWM 3 , and PWM 4  of  FIG. 1 , the respective phase currents IL 1 , IL 2 , IL 3 , and IL 4  through the phases  12   1 ,  12   2 ,  12   3 , and  14  of  FIG. 4 , and I out  while the converter  60  of  FIG. 1  is operating in the above-described third mode and according to a second embodiment of a switching technique. These signals may not be drawn to scale, and PWM 1 , PWM 2 , PWM 3 , and PWM 4  may have different duty cycles and respectively drive the high-side transistors  22   1 - 22   3  and  32 , respectively. 
         [0053]    Referring to  FIGS. 4 and 6 , the phase activator  38  implements the second embodiment of a switching technique by causing the switching circuits  16   1 ,  16   2 , and  16   3  to switch the phases  12   1 ,  12   2 , and  12   3  at a frequency F sw  and at relative phase shifts of 360°/NAC, where NAC=the number of active coupled phases, and by causing the switching circuit  26  to switch the phase  14  at a frequency equal to NAC·F sw  and at a phase shifts relative to F sw  of 360°/2(NAC). That is, the high-side transistor  32  switches “on” the phase  14  at times that are approximately centred between the times that the circuits switches  22   1 - 22   3  switch “on” the phases  12   1 ,  12   2 , and  12   3 . For example, during the third mode of operation when all four phases  12   1 ,  12   2 ,  12   3 , and  14  are active, the switching circuits  16   1 ,  16   2 , and  16   3  switch the phases  12   1 ,  12   2 , and  12   3  at F sw  and at a relative phase shifts of 0°, 120°, and 240°, and the switching circuit  26  switches the phase  14  at 3·F sw  and at a relative phase shifts of 60°, 180°, and 300° as shown in  FIG. 6 . During the second operating mode when only the three coupled phases  12   1 ,  12   2 , and  12   3  are active, the switching circuits  16   1 ,  16   2 , and  16   3  switch the coupled phases at frequency F sw  and at relative phase shifts of 0°, 120°, and 240°. And during the first operating mode when only the uncoupled phase  14  is active, then the switching circuit  26  switches the uncoupled phase at frequency F sw , or, alternatively, at 2·F sw  or 3·F sw . 
         [0054]    With the second switching technique, the ripple frequency of I out , and thus the ripple frequency of V out , approximately equals 2·NAC·F sw . Also, in the third operating mode when all of the phases  12   1 - 12   3  and  14  are active, the ripple amplitudes of I out  and V out  may be less than when the converter  60  operates according to the first embodiment of the switching technique. 
         [0055]    Still referring to  FIG. 6 , alternate embodiments of the second switching technique are contemplated. For example the phase  14  may be switched on at approximately the same times that the phases  12   1 ,  12   2 , and  12   3  are switched on; in the embodiment of  FIG. 6 , this may be accomplished by shifting PWM 4  by 60° relative to F sw , which would reduce the frequency of the I out /V out  ripple to 3·F sw . Moreover, although the converter  60  of  FIG. 4  includes only three coupled phases and one uncoupled phase, the second switching technique may be scaled for more or fewer than three coupled phases and for more than one uncoupled phase. Furthermore, the alternate embodiments discussed above in conjunction with  FIGS. 2 ,  3 , and  5  may also be applicable. 
         [0056]      FIG. 7  is a timing diagram of the signals PWM 1 , PWM 2 , PWM 3 , and PWM 4  of  FIG. 4 , the respective phase currents IL 1 , IL 2 , IL 3 , and IL 4  through the phases  12   1 ,  12   2 ,  12   3 , and  14  of  FIG. 4 , and I out  while the converter  60  of  FIG. 1  is operating in the above-described third mode and according to a third embodiment of a switching technique. These signals may not be drawn to scale, and PWM 1 , PWM 2 , PWM 3 , and PWM 4  may have different duty cycles and respectively drive the high-side transistors  22   1 - 22   3  and  32 , respectively. 
         [0057]    Referring to  FIGS. 4 and 7 , the phase activator  38  of  FIG. 4  implements the third embodiment of the switching technique by causing the switching circuits  16   1 ,  16   2 ,  16   3 , and  26  to switch the phases  12   1 ,  12   2 ,  12   3  at a frequency F sw  and at relative phase shifts of 360°/NAC, where NAC=number of active coupled phases, and by causing the switching circuit  26  to switch the uncoupled phase  14  at F sw  and at the same relative phase shift as one of the coupled phases. For example, during the third operating mode when all four phases  12   1 ,  12   2 ,  12   3 , and  14  are active, the switching circuits  16   1 ,  16   2 ,  16   3 , and  26  switch the phases  12   1 - 12   3  at relative phase shifts of 0°, 120°, 240°and the phase  14  at a relative phase shift of 0° (the same relative phase shift as the phase  12   1 ) as shown in  FIG. 7 . During the second operating mode when only the three coupled phases  12   1 ,  12   2 , and  12   3  are active, then the switching circuits  16   1 - 16   3  switch the coupled phases at frequency F sw  and at relative phase shifts of 0°, 120°, and 240°. And during the first operating mode when only the uncoupled phase  14  is active, the switching circuit  26  switches the uncoupled phase at frequency F sw . 
         [0058]    With the third switching technique, the ripple frequency of I out , and thus the ripple frequency of V out , approximately equals NAC·F sw . 
         [0059]    Still referring to  FIG. 7 , alternate embodiments of the third switching technique are contemplated. For example, the third switching technique may be scaled for numbers of coupled phases greater than or less than three and for numbers of uncoupled phases greater than one. Furthermore, alternate embodiments described above in conjunction with  FIGS. 2 ,  3 ,  5 , and  6  may be applicable. 
         [0060]      FIG. 8  is an isometric view of an inductor assembly  70  that may include a common core  72  for the magnetically coupled windings  18  and the magnetically uncoupled winding  28  of the buck converters  10  and  60  of  FIGS. 1 and 4 . For purposes of illustration, the assembly  70  is described as including the windings  18   1 - 18   3  and  28  of the buck converter  60 . Including a common core for coupled and uncoupled windings may reduce the cost of, and the layout area occupied by, the windings as compared to using separate cores for the coupled and uncoupled windings. 
         [0061]    The common core  72  includes magnetically coupled winding forms  74   1 - 74   3 , an optional leakage form  76 , a magnetically uncoupled winding form  78 , and members  80  and  82 , which interconnect the forms. That is, using a ladder analogy, the forms  74   1 - 74   3 ,  76 , and  78  are the rungs of the ladder, and the members  80  and  82  are the rails to which the rungs are coupled. The member  80  includes an optional first gap  84  and a second gap  86 . And spaces  88   1 - 88   4  separate the forms  74   1 - 74   3 ,  76 , and  78 . 
         [0062]    The forms  74   1 - 74   3  may have the same cross-sectional dimensions and be made from the same material, for example, where the windings  18   1 - 18   3  carry balanced portions of the output current I out . 
         [0063]    Alternatively the forms  74   1 - 74   3  may have different dimensions or be made of different materials, for example, where the windings  18   1 - 18   3  carry unbalanced currents as described in related U.S. patent application Ser. No. 12/136,018. 
         [0064]    The first gap  84  and the leakage form  76  cooperate to allow a specified amount of leakage flux φ leak  to flow when a high-side switch  22  or  32  ( FIG. 4 ) couples a respective one of the windings  18   1 - 18   3  is driven with the input voltage Vin ( FIG. 4 ). The gap  84  has a length I 1  and may be partially or fully filled with a material other than air, I 1  and the fill material depending on the specified leakage flux φ leak . Likewise, the leakage form  76  has cross-sectional dimensions and is made from a material (which may be different from the material from which the forms  74  are made), the dimensions and material depending on the specified leakage flux φ leak . The leakage flux φ leak  provides an effective filter inductance that the load  15  ( FIG. 4 ) “sees” when the phases  12   1 -  12   3  are active and the phase  14  is inactive. U.S. patent application Ser. No. 11/903,185 discusses such leakage inductance in more detail. 
         [0065]    The second gap  86  has a length I 2  (which may be longer or shorter than I 1 ) and may be partially or fully filled with a material other than air to allow at most a negligible amount of flux to flow between any of the forms  74   1 - 74   3  and the form  78 , where a “negligible amount” may be defined for the specific application. For example, the flux flowing from the form  74   1  to the form  78  via the gap  86  may be negligible if this flux is no more than 1.0% of the total flux φ T  induced in the form  74   1  by the current IL 1  flowing through the winding  18   1 . Likewise, in this example, the flux flowing from the form  78  to the forms  74   1 - 74   3  via the gap  86  may be negligible if this flux is no more than 1.0% of the flux induced in the form  78  by the current IL 4  ( FIGS. 5-7 ) through the winding  28 . 
         [0066]    The dimensions and material of the form  78  may be selected to give the magnetically uncoupled winding  28  a specified inductance. 
         [0067]    Each winding  18   1 - 18   3  and  28  is formed from a respective conductor  90   1 - 90   3  and  92 , which has a respective width W 1 -W 4 , is partially wound about a corresponding form  74   1 - 74   3 , and  78 , and extends beneath and adjacent to the remaining forms. For example, the winding  18   1  is formed from a conductor  90   1  that is partially wound about the form  74   1  and extends beneath and adjacent to the remaining forms  74   2 - 74   3 ,  76 , and  78 . Similarly, the winding  18   2  is formed from a conductor  90   2  that is partially wound about the form  74   2  and extends beneath and adjacent to the remaining forms  74   1 ,  74   3 ,  76 , and  78 , and so on. The conductors  90   1 - 90   3  and  92  may be made from any suitable conductive material such as copper or another metal, and may, but need not be, electrically insulated from the forms  74   1 - 74   3 ,  76 , and  78 . 
         [0068]    Furthermore, the implications of the conductors  90   1 - 90   3  and  92  being partially wound about the respective forms  74   1 - 74   3  and  78  are discussed in U.S. patent application Ser. No. 11/903,185, which is incorporated by reference. 
         [0069]    Referring to  FIGS. 4 and 8 , the operation of the inductor assembly  70  is described when a current IL 1  flows from V in , trough the transistor  22   1 , and through the winding  18   1  in the direction shown, it being understood that the operation is similar when a current flows through the other windings  18   2 - 18   3 . For purposes of example, it is assumed that the entire core  72  (the forms  74   1 - 74   3 ,  76 , and  78  and the members  80  and  82 ) is formed from the same magnetic material. It is also assumed that the forms  74   1 - 74   3  have the same dimensions, and that the conductors  90   1 - 90   3  and  92  have the same widths W. Furthermore, it is assumed that the forms  74   2 - 74   3  do not pass inside the Faraday loop through which the current IL 1  flows. Moreover, it is assumed that the form  76  and the gap  84  are present. 
         [0070]    As the current IL 1  flows through the winding  18   1 , it generates a total magnetic flux φ T , which, in a first-order approximation, flows through the form  74   1 —in this approximation, flux flowing outside of the core  72  is presumed to be negligible, and is thus ignored. 
         [0071]    A first portion φ 1  of the total flux φ T  flows through the form  74   2 , a second portion φ 2  of the total flux φ T  flows through the form  74   3 , and a third portion φ leak  flows through the leakage form  76  such that φ T  is given by the following equation: 
         [0000]      φ T =φ 1 +φ 2 +φ leak   (1)
 
         [0000]    where φ 1 =φ 2  because the forms  74   2  and  74   3  have the same dimensions and are made from the same material, and the reluctance of the portion of the members  80  and  82  between the forms  74   2  and  74   3  is assumed to be negligible. 
         [0072]    The flux φ 1  induces a current IL 2  to flow through the transistor  24   2  and the winding  18   2 , and the flux φ 2  induces a current IL 3  to flow through the transistor  24   3  and the winding  18   3 . 
         [0073]    Because the current IL 1  flowing in the winding  18   1  induces currents IL 2  and IL 3  in the windings  18   2  and  18   3 , respectively, the windings  18   1 - 18   3  are magnetically coupled to one another. 
         [0074]    But the gap  86  has a reluctance large enough to allow no more than a negligible portion of φ T  to flow through the form  78 , and, therefore, the current IL 1  induces no more than a negligible current in the winding  28 . 
         [0075]    Similarly, when a current IL 4  flows through the transistor  32  and the winding  28  and generates a flux through the form  78 , the gap  86  allows no more than a negligible portion of this flux to flow through the form  74   1 , and, therefore, the current IL 4  through the winding  28  induces no more than a negligible current in the winding  18   1 . 
         [0076]    Consequently, because a current IL 1  through the winding  18   1  effectively induces no current in the winding  28 , and because a current driven through the winding  28  effectively induces no current in the winding  18   1 , the winding  18   1  is magnetically uncoupled from the winding  28 . And because an analysis similar to the above analysis holds for the windings  18   2  and  18   3 , the windings  18   2  and  18   3  are also magnetically uncoupled from the winding  28 . 
         [0077]    Therefore, because the windings  18   1 - 18   3  are magnetically coupled to one another but magnetically uncoupled from the winding  28 , the inductor assembly  70  is electrically equivalent to a first core having the windings  18   1 - 18   3  and second core separate from the first core and having the winding  28 . 
         [0078]    But as stated above, the inductor assembly  70  having the common core  72  may be smaller and otherwise less costly than an electrically equivalent multi-core inductor assembly. 
         [0079]    Still referring to  FIG. 8 , alternate embodiments of the inductor assembly  70  are contemplated. For example, although described as including three magnetically coupled windings and one magnetically uncoupled winding, the assembly  70  may be scaled to include more or fewer coupled windings and more uncoupled windings (an alternate embodiment with two coupled windings and one uncoupled winding may be suitable for use in the buck converter  10  of  FIG. 1 ). Furthermore, in some applications one may leave one or more of the windings  18  and  28  uncoupled. Moreover, the leakage form  76  and the gap  84  may be omitted. In addition, the conductors  90  and  92  may be wound about the respective forms  74  and  78  any number of times. Furthermore, one or both of the gaps  84  and  86  may be disposed in the member  82  instead of in the member  80 . Moreover, the structure  70  may include multiple leakage forms. In addition, a gap similar to the gap  86  may be disposed on the other side of the form  78 , and the members  80  and  82  may be extended to accommodate one or more additional groups of magnetically coupled windings and leakage forms similar to the group including the windings  18   1 - 18   3  (and forms  74   1 - 74   3 ) and leakage form  76 , and to accommodate one or more additional uncoupled forms similar to the form  78 . Each of these additional groups of coupled windings may include more or fewer than three windings. An example of such an alternate embodiment is described below in conjunction with  FIG. 13 ; moreover, the inductor assembly  70  may be disposed within a package. 
         [0080]      FIG. 9  is an isometric view of an inductor assembly  100  in which like numbers reference like components relative to the inductor assembly  70  of  FIG. 8 . 
         [0081]    The inductor assembly  100  may be similar to the inductor assembly  70  of  FIG. 8 , except that the gap  84  is disposed in the form  76  instead of in the member  80 . Forming the gap  84  in the form  76  may increase the structural integrity of the assembly  100  as compared to that of the assembly  70 . And although not shown, the gap  86  may be disposed in the form  78 . 
         [0082]    Alternate embodiments of the inductor assembly  100  are contemplated. For example, the alternate embodiments described above in conjunction with the inductor assembly  70  of  FIG. 8  may be applicable to the assembly  100 . 
         [0083]      FIG. 10  is an isometric view of an inductor assembly  110  in which like numbers reference like components relative to the inductor assembly  70  of  FIG. 8 . 
         [0084]    The inductor assembly  110  may be similar to the inductor assembly  70  of  FIG. 8 , except that the leakage form  76  and the gap  84  are omitted and replaced with a leakage plate  112  (shown in transparent dashed line) that is disposed over and separated from the core  72 . 
         [0085]    Therefore, the leakage flux φ Leak  flows through the plate  112  and the gap between the plate and the core  72 . The dimensions and material of the plate  112  may be selected to present a leakage-flux path having a specified reluctance to yield specified leakage inductances for the windings  18   1 - 18   3 , and to also provide a specified inductance for the winding  28  (a portion of the flux generated in the form  78  by the current IL 4  flowing through the winding  28  may flow through the plate  112 , thus affecting the inductance of the winding  28 ). 
         [0086]    An inductor assembly that includes a similar leakage plate is described in U.S. patent application Ser. No. 11/903,185, which is incorporated by reference. 
         [0087]    Alternate embodiments of the inductor assembly  110  are contemplated. For example, the plate  112  may be sized so that it is not disposed over all of the forms  74  and  78 . For example, the plate  112  may not be disposed over the form  78  so as to have little or no affect on the inductance of the winding  28 . Furthermore, the dimensions and material of the plate  112 , and the spacing of the plate from the core  72 , may vary as a function of location so as to impart to each winding a flux leakage path having characteristics different from those of at least one other flux leakage path. Also, the assembly  110  may include a leakage form such as the leakage form  76  of  FIG. 9  in addition to the leakage plate  112 . Moreover, the alternate embodiments described above in conjunction with the inductor assemblies  70  and  100  of  FIGS. 8 and 9  may be applicable to the assembly  110 . 
         [0088]      FIG. 11  is an isometric view of an inductor assembly  120  in which like numbers reference like components relative to the inductor assembly  70  of  FIG. 8 . 
         [0089]    The inductor assembly  120  may be similar to the inductor assembly  70  of  FIG. 8 , except that the windings  18   1 - 18   3  and  28  extend generally parallel to the forms  74   1 - 74   3 ,  76 , and  78  instead of generally perpendicular to them, and the gap  86  is disposed in the form  78  instead of in the member  80 . A core similar to the core  72  of  FIG. 11  is described in U.S. patent application Ser. No. 11/903,185, which is incorporated by reference. 
         [0090]    Alternate embodiments of the inductor assembly  120  are contemplated. For example, the gap  84  may be disposed in the form  76  or in the member  82 , and the gap  86  may be disposed in the member  80  or the member  82 . Furthermore, a leakage plate similar to the leakage plate  112  of  FIG. 10  may replace or be included in addition to the leakage form  76 . Moreover, the alternate embodiments described above in conjunction with the inductor assemblies  70 ,  100 , and  110  of  FIGS. 8-10  may be applicable to the assembly  120 . 
         [0091]      FIG. 12  is an exploded isometric view of an inductor assembly  130  in which like numbers reference like components relative to the inductor assembly  70  of  FIG. 8 . 
         [0092]    The inductor assembly  130  may be similar to the inductor assembly  70  of  FIG. 8 , except that members  80  and  82  may be wider and closer together, and the windings  18   1 - 18   3  and  28  may extend generally in parallel with the forms  74   1 - 74   3 ,  76 , and  78  and be wound about the forms in a plane that is generally parallel to the members  80  and  82 . For better viewing, the member  80  is shown exploded from the forms  74   1 - 74   3 ,  76 , and  78  although the member  80  may be integral with these forms. A core similar to the core  72  of  FIG. 12  is described in U.S. patent application Ser. No. 11/903,185, which is incorporated by reference. 
         [0093]    Alternate embodiments of the inductor assembly  130  are contemplated. For example, a leakage plate similar to the leakage plate  112  of  FIG. 10  may replace or be included in addition to the leakage form  76 . Moreover, the alternate embodiments described above in conjunction with the inductor assemblies  70 ,  100 ,  110 , and  120  of  FIGS. 8-11  may be applicable to the assembly  130 . 
         [0094]      FIG. 13  is an exploded isometric view of an inductor assembly  140  in which like numbers reference like components relative to the inductor assembly  70  of  FIG. 8  and to the inductor assembly  130  of  FIG. 12 . 
         [0095]    The inductor assembly  140  may be similar to the inductor assembly  130  of  FIG. 13 , except that the uncoupled winding  28  is omitted, and a second group of coupled windings  142   1 - 142   3  are added and are respectively wound about forms  144   1 - 144   3 . 
         [0096]    In an embodiment, a form  146  acts as a shared leakage form, and the gaps  148   1  and  148   2  magnetically isolate the first group of coupled windings  18   1 - 18   3  from the second group of coupled windings  142   1 - 142   3 . For example, a current IL 1  driven through the winding  18   1  generates a total flux φ T1  and a leakage flux φ leak1 , which circulates through the gap  148   1  and the form  146 . However, the reluctance of the gap  148   2  allows no more than a negligible portion of the flux φ T1  to circulate through any one of the forms  144   1 - 144   3 . Similarly, a current IL 2  driven through the winding  142   1  generates a total flux φ T2  and a leakage flux φ leak2 , which circulates through the gap  148   2  and the form  146 . However, the reluctance of the gap  148   1  allows no more that a negligible portion of the flux φ T2  to circulate through any one of the forms  74   1 - 74   3 . Alternatively, the form  146  may be replaced with two forms separated by a third gap. In this alternative, the leakage flux φ leak1  would circulate through the form closest to the first group of windings  18   1 - 18   3 , and the leakage flux φ leak2  would circulate through the form closest to the second group of windings  142   1 - 142   2 . 
         [0097]    In another embodiment, the form  146  is omitted, and a single gap  148  magnetically isolates the first group of coupled windings  18   1 - 18   3  from the second group of coupled windings  142   1 - 142   3 . One or more leakage plates similar to the plate  112  of  FIG. 10  may be included in the assembly  140  to provide paths for leakage inductance. Or, respective leakage forms, one for each group of coupled windings, may be disposed remote from the single gap  148 . 
         [0098]    In yet another embodiment, the gaps  148   1  and  148   2  may have respective reluctances large enough to allow no more than a negligible flux to flow through either gap and through the form  146 . Therefore, because in this embodiment the form  146  is magnetically isolated from the first and second groups of windings  18   1 - 18   3  and  142   1 - 142   3 , a magnetically uncoupled winding may be wound about the form  146 . 
         [0099]    Alternative embodiments of the inductor assembly  140  are contemplated. For example, the lengths of the members  80  and  82  may be extended to include more than two magnetically isolated groups of magnetically coupled windings, and to include more leakage forms and uncoupled windings. Furthermore, one or more leakage plates may be included, instead of or in addition to leakage forms. For example, a leakage plate may be included adjacent to one group of windings, and another group may include a leakage form. Or, a leakage plate may be adjacent to a group of coupled windings that also includes a leakage form. Also, a single leakage plate may be adjacent to more than one group of windings. Moreover, alternate embodiments described above in conjunction with the inductor assemblies  70 ,  100 ,  110 ,  120 , and  130  of  FIGS. 8-12  may be applicable to the assembly  140 . 
         [0100]      FIG. 14  is a block diagram of a system  150  (here a computer system), which may incorporate a power supply (such as one of the buck converters  10  and  60  of  FIGS. 1 and 4 )  152  that includes one or more of the inductor assemblies  70 ,  100 ,  110 ,  120 ,  130 , and  140  of  FIGS. 8-13 . 
         [0101]    The system  150  includes computer circuitry  154  for performing computer functions, such as executing software to perform desired calculations and tasks. The circuitry  154  typically includes a controller, processor, or one or more other integrated circuits (ICs)  156 , and the power supply  152 , which provides power to the IC(s)  156 . As discussed above in conjunction with  FIGS. 1 and 4 , one or more of these ICs may provide a load signal to the power supply  152 , which may use this signal to activate a corresponding combination of CI and UI phases. One or more input devices  158 , such as a keyboard or a mouse, are coupled to the computer circuitry  154  and allow an operator (not shown) to manually input data thereto. One or more output devices  160  are coupled to the computer circuitry  154  to provide to the operator data generated by the computer circuitry. Examples of such output devices  160  include a printer and a video display unit. One or more data-storage devices  162  are coupled to the computer circuitry  154  to store data on or retrieve data from external storage media (not shown). Examples of the storage devices  162  and the corresponding storage media include drives that accept hard and floppy disks, tape cassettes, compact disk read-only memories (CD-ROMs), and digital-versatile disks (DVDs). 
         [0102]    From the foregoing it will be appreciated that, although specific embodiments have been described herein for purposes of illustration, various modifications may be made without deviating from the spirit and scope of the present disclosure. Furthermore, where an alternative is disclosed for a particular embodiment, this alternative may also apply to other embodiments even if not specifically stated.