Abstract:
A physical layer device provides both timestamp processing and security processing. The timestamp processing may be PTP processing according to IEEE Std. 1588 and/or OAM processing according to ITU-T Recommendation Y.1731. The security processing may be MACsec processing according to IEEE Std. 802.1AE. The timestamp processing may delay some packets to avoid impairing accuracy of timing information. For example, the accuracy of timing information could be impaired when a packet containing the timing information is delay due to additional bits added to a preceding packet to include a security tag and integrity check value.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims the benefit of U.S. Provisional Application No. 61/556,732, filed on Nov. 7, 2011, the disclosure of which is incorporated herein by reference. 
     
    
     BACKGROUND OF THE INVENTION 
       [0002]    The present invention relates generally to processing timestamps in communication packets and, more particularly, to processing timestamps in communication networks that include media access control security. 
         [0003]    It may be advantageous in a networked system for devices in the network to include timestamp information in some communication packets. The timestamp information may be indicative of when a packet is transmitted or received by one of the devices. The timestamp information may be used, for example, to synchronize clocks between devices in the network. The timestamp information may also be used for operation, administration, and maintenance functions in the network. The electronics industry has developed several standard protocols that use timestamped packets, for example, the Precision Time Protocol (PTP) of IEEE Std. 1588 and ITU-T Recommendation Y.1731 on Internet protocol aspects—Operation, administration and maintenance. 
         [0004]    It may also be advantageous to secure at least some communication in a network to avoid interception of information or disruption of network operations. Some information may be protected by encrypting the information at its source and decrypting it at its destination. Other information may be protected by inclusion of a check value or digital signature that allows a receiving device to confirm that the information has not been altered since it was sent from a transmitting device. One protocol for increasing network security is Media Access Control (MAC) Security of IEEE Std. 802.1AE. 
         [0005]    It may be further advantageous for a network to provide both timestamp information and increased security. However, security measures may interfere with timestamp information by, for example, increasing uncertainty with respect to the timing information, which in many cases should also be subject to the security measures. Reducing effects of security measures on timing information may be difficult, however, particularly without unduly reducing bandwidth of a communication system. 
       BRIEF SUMMARY OF THE INVENTION 
       [0006]    Some aspects of the present invention provide a method performed by a physical layer communication device implemented using electronic circuitry, the method comprising: receiving a packet for transmission; determining whether the packet is a packet that is to receive timestamp processing; if the packet is to receive timestamp processing, determining a value indicative of a time of transmission of the packet to a communication network; if the packet is to receive timestamp processing, delaying the packet for a time interval determined to avoid having the packet incur a variable delay during subsequent processing due to MACsec processing of a prior packet; and transmitting the packet over the communication network. 
         [0007]    Another aspect of the invention provides a method performed by a physical layer device (PHY) comprising a transmit chain including a transmitter, a MACsec processing block, a timestamp processing block, and a flow control block, the method comprising: buffering packets for transmission by the flow control block; determining, by the timestamp processing block, whether packets for transmission are packets subject to timestamp processing; providing, by the timestamp processing block, for the packets subject to timestamp processing, an indication of predicted time of transmission of the packet from the PHY; delaying, by the timestamp processing block, provision to the MACsec processing block of packets subject to timestamp processing so as to reduce in accuracy of the predicted time of transmission; performing, by the MACsec processing block, MACsec operations on at least some of the packets; and transmitting, by the transmitter, the packets. 
         [0008]    Another aspect of the invention provides a physical layer device, comprising: a transmit chain including a transmit flow control block, a transmit timestamp processing block, a transmit MACsec processing block, and a transmitter; a receive chain including a receiver, a receive MACsec processing block, a receive timestamp processing block, and a receive flow control block; and wherein the transmit timestamp processing block is configured to determine whether a packet is subject to timestamp processing, and delay provision of the packet to the transmit processing block if and only if the packet is determined to be subject to timestamp processing. 
         [0009]    Another aspect of the invention provides a physical layer device, comprising: means for receiving a packet for transmission; means for determining whether the packet is a packet that is to receive timestamp processing; means for, if the packet is to receive timestamp processing, determining a value indicative of a time of transmission of the packet to a communication network; means for, if the packet is to receive timestamp processing, delaying the packet for a time interval determined to avoid having the packet incur a variable delay during subsequent processing due to MACsec processing of a prior packet; and means for transmitting the packet over the communication network. 
         [0010]    Another aspect of the invention provides a communication network device including a physical layer device (PHY), a media access controller (MAC), and a packet processing module, the PHY comprising: means for receiving a packet for transmission; means for determining whether the packet is a packet that is to receive timestamp processing; means for inserting a value into the packet indicative of a time of transmission of the packet to a communication network if the packet is to receive timestamp processing; means for delaying the packet for a time interval determined to avoid having the packet incur a variable delay during subsequent processing due to MACsec processing of a prior packet if the packet is to receive timestamp processing; and means for transmitting the packet over the communication network. 
         [0011]    These and other aspects of the invention are more fully comprehended upon review of this disclosure. 
     
    
     
       BRIEF DESCRIPTION OF THE FIGURES 
         [0012]      FIG. 1  is a block diagram of physical layer communication device in accordance with aspects of the invention; 
           [0013]      FIG. 2  is a block diagram of a transmit path for a physical layer communication device in accordance with aspects of the invention; 
           [0014]      FIG. 3  is a flowchart of a process for handling timing information in accordance with aspects of the invention; and 
           [0015]      FIG. 4  is a block diagram of a communication network device in accordance with aspects of the invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0016]      FIG. 1  is a block diagram of a physical layer communication device (PHY) in accordance with aspects of the invention. The PHY includes a receive block  100  to receive an input signal from a communication network and a transmit block  110  to transmit an output signal to the communication network. A local clock  121  may be included in the PHY to provide a timebase for the PHY and supply time values to the receive block and the transmit block. The receive and transmit blocks provide both timestamp processing and MAC security (MACsec) processing. The PHY also includes an interface block  131  for coupling to a higher-level device, such as a media access control device. In some embodiments, other processing blocks may also be included in the signal paths between the receive block and the interface block and between the transmit block and the interface block. The blocks of the PHY are generally implemented with electronic circuitry. As one of skill in the art would understand, the PHY may be implemented as a stand-alone device or as part of a higher layer device that contains the PHY or parts thereof. For example, in one embodiment the PHY is provided in an integrated circuit. Software programming may be used to control operation of some circuitry in the PHY. A programmable processor may be used to configure the circuitry of the PHY and to handle exception conditions. 
         [0017]    The transmit block  110  generally receives packets for transmission, buffers the packets, performs timestamp processing for appropriate packets, performs MACsec processing for appropriate packets, and transmits the packets. In various embodiments the transmit block may also perform other functions commonly performed in a transmit chain of a PHY. In addition, in some embodiments the transmit block also pauses packets for flow control purposes in response to receipt of a valid PAUSE frame requesting a pause in transmission in packets by the receive block  100 . In the embodiment shown in  FIG. 1 , a transmit flow control block  113  performs the buffering of packets, a transmit timestamp processing block  115  performs the timestamp processing for appropriate packets, a transmit MACsec processing block  119  performs MACsec processing for appropriate packets, and a transmitter  111  transmits the packets. 
         [0018]    The transmit flow control block  113  receives packets to be transmitted from the PHY and buffers the packets. As shown in  FIG. 1  the transmit flow control block  113  receives packets from the interface block  131 . The transmit flow control block buffers the packets, for example to account for differences in rates between a rate of a higher-level device and a rate of transmission from the transmit block  110 . For example, the reception and transmission may occur at the same nominal bit rate, but the transmit MACsec processing block  119  may add additional bits to packets that slow packet transmission. Additionally, the transmit timestamp processing block  115  may delay transmission of packets. The transmit flow control block  113  may receive indications from the transmit MACsec processing block  119  and the transmit timestamp processing block  115  that data transmission is extended. Alternatively, the transmit flow control block  113  may receive an indication that transmission may proceed. The transmit flow control block  113  may signal the higher-level device to pause or slow supplying packets to the PHY. In some embodiments, the signaling occurs by way of the receive block  100 , with for example the transmit flow control block  113  providing signals to a receive flow control block  107  of the receive chain. In addition, in some embodiments the transmit flow control block delays transmission of packets in response to an indication that a PAUSE frame requesting a pause in transmission of packets has been received. In some of these embodiments control packets, however, are not so delayed. In various embodiments the transmit flow control block receives the indication from the receive block and/or from a higher level by way of the interface block  131 . Pausing packets for flow control purposes in the transmit chain prior to calculating and writing timestamp values may be beneficial in assisting in maintaining accuracy of timestamp information. 
         [0019]    The buffered packets are received by the transmit timestamp processing block  115 . The transmit timestamp processing block  115  adds, in some of the packets, an indication of the time the packet is transmitted from the PHY. 
         [0020]    The transmit timestamp processing block  115 , for each packet received from the transmit flow control block  113 , determines, for example, using addresses and tags in the packet, whether the packet is one for which timestamp processing will be performed. The timestamp processing generally utilizes the time, as indicated by the local clock  121 , that the packet will be transmitted. For various packets, the time of transmission may be inserted in the packet, added or subtracted to a value in the packet, or supplied to the higher-layer device. 
         [0021]    The transmit timestamp processing block  115  may predict the time of transmission by adjusting a time value from the local clock based on expected delays related to or in the transmit MACsec processing block  119  and the transmitter  111 . In some embodiments the transmit timestamp processing block may adjust the time value by a fixed amount for packets subject to MACsec processing. The delay incurred by a timestamped packet in the transmit MACsec processing block  119  may depend on what processing the transmit MACsec processing block  119  performs on a preceding packet. For example, the transmit MACsec processing block  119  may add bits to the preceding packet, and in some embodiments perform operations on information of the packet, for example encryption processing, that otherwise delays the packet, and possibly delays processing of the subsequent packet. Accordingly, the transmit timestamp processing block  115  may delay supplying an already timestamped packet to the transmit MACsec processing block  119 , and account for that delay in determining a timestamp value, so that the added bits, and/or other delays, do not cause a delay in transmission that would reduce accuracy of the predicted time of transmission. In some embodiments all timestamped packets, but not non-timestamped packets, are so delayed, without regard to whether the preceding packet in the transmit chain is modified or to be modified by MACsec processing. In some embodiments the delay of packets subject to timestamping may be performed after determination that a packet is to be timestamped, but prior to timestamping of the packet, such that delay of a packet by the timestamp processing block need not be accounted for in determining timestamp values. The transmit timestamp processing block  115  may also signal the transmit flow control block  113  when a packet is delayed. 
         [0022]    The transmit MACsec processing block  119  receives the packets from the timestamp processing block  115 . The transmit MACsec processing block  119  performs, for some of the packets, security related processing, such as encryption. The transmit MACsec processing block  119 , for each packet received from the transmit timestamp processing block  115 , determines, for example, based on addresses and tags in the packet, whether the packet is one for which MACsec processing will be performed. For packets subject to MACsec processing, the MACsec processing generally adds a security tag to a packet and utilizes a cipher to generate and add an integrity check value (ICV) to the packet for use at a receiver to verify that the packet has not been modified. The MACsec processing may also encrypt payload data in the packet. The addition of the security tag and ICV increases the size of the MACsec processed packet so that a following packet may be delayed by the time used to transmit the additional bits, and possibly also delayed due to time required for, for example, encryption processing. The delay incurred may vary with the gap between packets provided to the MACsec processing block, with the delay decreasing as the gap between the packets increases. For example, if the following packet were separated from the MACsec processed packet by a minimum allowed gap, the delay would be large, and if the following packet were separated from the MACsec processed packet by at least the minimum allowed gap plus the number of bits added by the MACsec processing, no additional delay would be incurred. 
         [0023]    The transmitter  111  is coupled to the communication link, for example, a fiber optic cable or other communication medium in the communication network, to transmit the output signal. The transmitter  111  processes the packets from the transmit MACsec processing block  119  to produce the output signal. In many embodiments, the output signal is transmitted according to a standard format, for example, a standard for Ethernet. 
         [0024]    The receive block  100  generally include blocks that correspond to the blocks of the transmit block  110 . A receiver  101  is coupled to a communication link, for example, another fiber optic cable in the communication network, and thereby receives the input signal. In many embodiments, the input signal is received according to the same standard format as used for the output signal from the transmitter  111 . The receiver  101  processes the input signal to recover data from the input signal and produces data packets. In various embodiments, the receiver  101  also determines starts of the packets, for example, by determining that frame delimiter signals or frame synchronization signals have been received. 
         [0025]    A receive MACsec processing block  103  receives packets from the receiver  101 . For each packet, the receive MACsec processing block  103  may determine if a packet is subject to MACsec processing and, if so, perform MACsec processing for the packet. The MACsec processing uses a security tag and ICV in the packet to verify integrity of the packet. The packet may also be decrypted. In some embodiments the receive MACsec processing block performs additional MAC related processing. For example, in some embodiments the receive MACsec processing block also determines if a valid PAUSE frame has been received by the receive block  100 . If so, the receive MACsec processing block provides a signal indicative of receipt of a valid PAUSE frame and in most embodiments information of a length of a requested pause time indicated by the PAUSE frame. The signal is provided to the transmit block  110 , in some embodiments directly and in some embodiments by way of being passed to the receive flow control block  107 . Performing PAUSE frame reception related processing in the PHY, particularly soon after reception, may be beneficial in reducing numbers of packets transmitted after receipt of a PAUSE frame requesting a pause in transmission, or in earlier recommencing of transmission of packets if the PAUSE frame indicates, usually by way of a zero value, that transmission of packet should no longer be paused. 
         [0026]    A receive timestamp processing block  105 , for each packet received from the receive MACsec processing block  103 , determines, for example, using addresses and tags in the packet, whether the packet is one for which timestamp processing will be performed. The timestamp processing generally utilizes the time, as indicated by the local clock  121 , that the packet was received. For various packets, the time of reception may be inserted in the packet, added or subtracted to a value in the packet, or supplied to the higher-layer device. The receive timestamp processing block  105  may adjust time values from the local clock based on delays in the receiver  101  and receive MACsec processing block  103  for use as the time of reception. In some embodiments the receive timestamp processing block adjusts time values based on delays in the receive MACsec processing block by a fixed amount for packets subject to MACsec processing. 
         [0027]    The receive flow control block  107  receives packets from the receive timestamp processing block  105  and transmits the packets to the interface block  131 . The flow control block  107  buffers the packets to match rates that may differ between reception and transmission. For example, in some embodiments, the reception and transmission may occur at the same nominal bit rate, but with specific bit rates that vary from the nominal rate by different amounts. Additionally, the receive flow control block  107  may supply signals to the higher-layer device to indicate flow control in the transmit path  110 . In addition, in some embodiments the receive flow control block receives a signal from the receive MACsec processing block regarding receipt of a valid PAUSE frame, and the receive flow control block provides information of the PAUSE frame to the transmit flow control block  113  and/or to the interface block  131  for use by higher level processes. 
         [0028]    The local clock  121  generally provides time values that are synchronized or syntonized to another clock in the communication network. In some embodiments, the PHY may receive time from a clock external to the PHY. 
         [0029]      FIG. 2  is a block diagram of a transmit path for a physical layer communication device in accordance with aspects of the invention. The transmit path may, in some embodiments, be the transmit path in the PHY of  FIG. 1 . Accordingly, the transmit path of  FIG. 2  receives packet from a higher-layer for transmission and transmits the packets, after processing, to a communication link. Processing that may be performed includes timestamp processing and MACsec processing. 
         [0030]    The transmit path includes a flow control block  213  that receives the packets to be transmitted. The flow control block  213  rate buffers the packets and supplies them to a timestamp classifier  215 . The timestamp classifier  215  determines whether the packets are to receive timestamp processing and what type of processing. A timestamp calculator  216  calculates timestamp values related to transmission times of the packets, and a timestamp writer  217  may write the calculated timestamp values into the packets. A MACsec classifier  219  determines whether the packets are to receive security processing and what type of processing. A MACsec cipher block  220  performs the security processing and supplies the packets to a transmitter  211  that outputs a physical signal to the communication link. 
         [0031]    The flow control block  213  is similar to or in some embodiments that same as the transmit flow control block of  FIG. 1 . Accordingly, the flow control block  213  buffers the packets it receives to match rates that may differ between reception from the higher-level device and transmission from the transmitter  211 . The rates may differ, for example, due to different tolerances between rates that are nominally equal, bits added to packet for security processing, or delays added for timestamp processing. The flow control block  213  may signal the higher-level device to pause or slow supplying packets for transmission. 
         [0032]    The timestamp packet classifier  215  classifies the packets according to what type, if any, timestamp action is to be performed. In one embodiment, the packets are classified to be one of five types. A first type includes packets that are not to receive timestamp processing in the transmit path. A second type includes packets that are to have a transmission time value written into the packet. A third type includes packets that are to have a timestamp in the packet modified by subtracting the transmission time value and adding an offset value. A fourth type includes packets that are to have a timestamp in the packet modified by adding the transmission time value and adding an offset value. A fifth type includes packets for which the transmission time value is to be supplied to the higher-layer device. In some embodiments, a timestamp FIFO is used to supply the transmission time values to the higher-layer device. Packets may be classified using values of source and destination addresses in the packets. In some embodiments, the timestamp packet classifier  215  classifies packets according to values of addresses and/or tags in the packets. For example, some of the packets may contain tags for virtual local area networking (VLAN) and/or for multiprotocol label switching (MPLS). Additionally, packets, in some embodiments, may be classified using messages contained in the packets, such as precision time protocol or operations, administration, and maintenance messages. Furthermore, packet classification may use combinations of packet characteristics. 
         [0033]    The timestamp packet classifier  215  may delay supplying packets that are classified to receive processing to the timestamp calculator  216 . In some embodiments, however, the delay may be provided subsequent to writing of the timestamp, with for example the timestamp writer  217  instead providing the delay, and with the timestamp calculator  216  taking account of such a delay. The delay is to avoid variation in transmission time, with respect to a timestamp value, that may occur due to MACsec processing. In one embodiment, the timestamp packet classifier  215  delays packets that will receive timestamp processing to allow transmission of a maximum number of bits that may be added to packets by MACsec processing of a preceding packet, and, in some embodiments, an amount of additional time that may be required by MACsec processing of the preceding packet, for example additional time due to encryption processing. In another embodiment, packets are delayed by an amount that provides a gap between a timestamped packet and the preceding packet of at least a minimum gap between packets plus the maximum number of bits that may be added to the preceding packet for MACsec processing. The timestamp packet classifier  215 , in many embodiments, signals the flow control block  213  when packets are delayed for timestamp processing. 
         [0034]    The timestamp calculator  216  produces a new timestamp value depending on the classification of the packet. For many packet classifications, the timestamp calculator  216  uses time values supplied to the timestamp calculator  216 . The time values may be supplied by a clock such as the local clock of the PHY of  FIG. 1 . Since transmission time may be defined by when a specific part of the packet (for example, the end of an Ethernet start of frame delimiter) enters the communication link from the transmitter  211 , the timestamp calculator  216  adjusts the time values for delays expected in subsequent blocks of the transmit path. In some embodiments the timestamp calculator adjusts the time values by a fixed amount to account for MACsec processing. However, due to delays provided by the timestamp packet classifier  215 , the timestamp calculator  216  may provide accurate timestamp information without adjusting for variable delays caused by MACsec processing, if the packet to be time stamped is delayed by the timestamp packet classifier. In embodiments in which a timestamped packet is delayed to allow for MACsec processing of a preceding packet after timestamp writing, the timestamp calculator also accounts for that delay. 
         [0035]    The timestamp writer  217  may write the new timestamp value from the timestamp calculator  216  to a location in the packet. The location written may vary depending on the format of the packet and the classification of timestamp processing. For example, the location of a PTP packet&#39;s correction field. In one embodiment, the receive packet writer  107  additionally updates checksum fields in packets that have timestamp values written. 
         [0036]    The MACsec packet classifier  219  classifies the packets according to what type, if any, security processing is to be performed. For example, some packets may be classified to have an ICV added to allow integrity checking of the packet, other packets may be classified to be encrypted, and other packets may be classified to receive no MACsec processing. Packets may be classified using values of source and destination addresses in the packets. In some embodiments, the MACsec packet classifier  219  classifies packets according to values of tags in the packets, such as VLAN or MPLS tags. Packet classification may use combinations of packet features. Packets that receive MACsec processing have additional bits added to the packets, accordingly the MACsec packet classifier  219  may signal the flow control block  213  so that it may adequately buffer the packets it receives from the higher-layer device including, in some cases, signaling the higher-layer device to defer supplying packets to the transmit path. 
         [0037]    The MACsec cipher block  220  performs security processing according to the classifications provided by the MACsec packet classifier  219 . A security tag is added to the packets that receive security processing. The security tag may be formatted according to IEEE Std. 802.1AE. Various packets have integrity check values added for use at a receiver to verify that the packet has not been modified. The MACsec processing may also encrypt payload data in the packet. Additionally, the MACsec cipher block  220  may recalculate checksum fields for packets that receive security processing. In some embodiments, the MACsec cipher block  220  recalculates checksum fields for packets that had timestamp values written by the timestamp writer  217 . 
         [0038]    The transmitter  211  receives packets from the MACsec cipher block  220  and supplies the output signal to the communication link coupled to the transmit path. The transmitter  211  is similar to or in some embodiments that same as the transmitter of  FIG. 1 . The blocks of the transmit path may operate on a packet concurrently with one part of the packet in one of the blocks while another part of the packet is in another one of the blocks. 
         [0039]      FIG. 3  is a flowchart of a process for handling timing information in accordance with aspects of the invention. The process may be implemented by a PHY device, for example, the device of  FIG. 1 . 
         [0040]    In block  302 , the process receives a packet for transmission. The packet may be received from a higher-layer device, for example, a media access controller. 
         [0041]    In block  312 , the process determines whether the packet is a packet that will receive timestamp processing. Whether a packet will receive timestamp processing may be determined utilizing values of source and destination addresses in the packet. In some embodiments, the process may utilize the values of tags, such as VLAN or MPLS tags, in the packets. Additionally, in some embodiments, the process may utilize a message contained in the packets, such as a precision time protocol or operations, administration, and maintenance message. Furthermore, the process may determine whether the packet is a packet that will receive timestamp processing utilizing a combination of packet features. If the packet is a packet that will receive timestamp processing, the process continues to block  322 ; otherwise, the process continues to block  332 . 
         [0042]    In block  322 , the process processes the packet according to a timestamp protocol. For example, the process may insert a value into the packet indicative of when the packet is transmitted to a communication network. The transmission time may be determined by adjusting a time value from a clock to compensate for delays incurred by the packet subsequent to timestamp processing. For example, the packet may be delayed by a MACsec processing block and a transmitter in a PHY as shown in  FIG. 1 , and a delay as discussed with respect to block  324 . 
         [0043]    In block  324 , the process delays for a time interval. The delay is of a length determined so as to avoid having the packet incur a variable delay in subsequent processing that would impair accuracy of the timestamp processing performed in block  322 . For example, when the packet is transmitted via a block that performs MACsec processing, the packet may be delayed by an amount that depends on the MACsec processing performed on a preceding packet. In one embodiment, the delay length corresponds to a time for transmission of a maximum number of bits that may be added to the preceding packet for MACsec processing. In another embodiment, the delay length corresponds to a time that provides a minimum gap from the preceding packet after the maximum number of bits that may be added to the preceding packet for MACsec processing. In some embodiments the process performs operations of block  324  prior to performing operations of block  322 , in which case the operations of block  322  would not account for the delay provided by the operations of block  324 . 
         [0044]    In block  332 , the process transmits the packet on a communication link. The packet may be transmitted by way of a block that performs MACsec processing. The process thereafter returns. 
         [0045]      FIG. 4  is a block diagram of a communication network device in accordance with aspects of the invention. The device includes a first line card  401  and a second line card  403 . The first line card includes a PHY  403  that provides timestamp processing and MACsec processing. The PHY may be a PHY as described with reference to  FIG. 1 . The PHY is coupled to a MAC  405  which is coupled to a packet processing module  407 . Operation of the first line card is controlled and monitored by a line card control processor  409 . The second line card  411  includes corresponding blocks and in some embodiments is the same as the first line card.  FIG. 4  shows two line cards but a system may include many more line cards. 
         [0046]    The PHYs  403 ,  413  of the first and second line cards  401 ,  411  may include a transmit path as described with reference to  FIG. 2 . The PHYs provide timestamp processing that includes delaying timestamped packets so that variable delays that the packets may incur due to the MACsec processing do not impair accuracy of timestamp information. 
         [0047]    A system card  441  is coupled to the first and second line cards. A switch fabric  445  couples the line cards and switches packets between line cards. A system control processor  443  controls and monitors operation of the system card. 
         [0048]    Although the invention has been discussed with respect to various embodiments, it should be recognized that the invention comprises the novel and non-obvious claims supported by this disclosure.