Abstract:
In an image coding system, block based motion estimation is used to determine motion vectors for blocks of pixels in a current frame or field. Only a portion of blocks from a predetermined pattern of blocks in a current frame or field are searched for a match with a block of pixels in a previous frame or field over a designated search area. Motion vectors for the blocks of the current frame or field not selected for searching are obtained by interpolation from motion vectors obtained for associated searched neighboring blocks, respectively, or by using the zero motion vector, or by performing a search over a limited range around the position defined by each of the motion vectors from neighboring blocks.

Description:
FIELD OF THE INVENTION 
     The field of the present invention relates generally to systems for transmitting and storing image sequences, and more particularly to methods and apparatus for reducing the computational complexity in determining motion vectors for block based motion estimation. 
     RELATED APPLICATION 
     This application is related to U.S. Pat. No. 5,210,605, issued on May 11, 1993. The inventors and assignee of the related patent are identical herewith. 
     BACKGROUND OF THE INVENTION 
     An image sequence, such as video, consists of frames of images. The coding of video sequences has been the focus of a great deal of research in recent years. High Definition Television (HDTV), video conferencing and CD-ROM archival are some of the possible applications. In the coding of such sequences, information on motion of objects in the scene from one frame to the next plays an important role. Because of the high redundancy that exists between the consecutive frames of a video sequence, high compression ratios can be obtained. For example if there is no moving object, a frame would be identical to the previous frame. The receiver can simply repeat the previous frame, and there is no need to send the current frame. The natural way to exploit the redundancy between consecutive frames consists in predicting a frame using a prior frame. 
     Ideally, a current frame can be reconstructed from the immediately previous frame and the difference between the current and previous frames, i.e. by using the motion information. In applications such as video conferencing, video telephone, and digital television, motion is the key to data compression. The extraction of motion information is computationally intensive and puts a burden on the hardware designed to perform such a task. In HDTV, for example, the use of four high speed processors operating in parallel was proposed recently. 
     In video sequences using interlaced scan, each frame is composed of two fields: one containing only the even scan lines, and one containing only the odd scan lines. It is well known that in such interlaced sequences, motion can be estimated by dividing the pixels in each field into blocks and estimating the motion of the blocks from a full or limited search in a prior field or fields. 
     The majority of systems determine the motion information using a block based approach. In this approach, as shown in FIG. 1 hereof, the present frame 1 is divided into blocks of pixels 3. For each block of pixels, a search is made in the previous frame 7 for the block of pixels that is the closest to it. The location of that closest block relative to the present block then defines a motion vector. To determine the closest matching block in the previous frame, a search area 13 is selected. The block 5 selected of the present frame 1 is placed on the previous frame 7 at one position 9. The pixels of the two blocks are compared. The present block is then moved to a different position 11 and another comparison is made. This process is continued until all positions in the search area 13 have been searched. The position that yields the best match is taken as the position of the current block 5 in the previous frame 7, and thus defines a motion vector. Such an approach is called the full search or the exhaustive search approach. The determination of motion vectors by the full search approach is computationally intensive. 
     Various approaches have been suggested to reduce the search, but the performance of these reduced search approaches are inferior to that of the full search. A number of known prior systems are discussed below. 
     In Hatori et al. U.S. Pat. No. 4,217,609, a television signal coding system is discussed which chooses both intra-field differences or encoding between picture elements, and inter-field difference quantizing between picture elements in one frame and an immediately successive frame. The restored values of the picture elements obtained from the intra-field predictive coding and the inter-field predictive coding are compared to a true picture element value for selecting the coding then providing the smallest error. Inter-field coding is selected when successive frames are indicative of a stationary picture, whereas intra-field coding is selected between successive frames in which the picture is moving. 
     Netravali et al. U.S. Pat. No. 4,278,996 teaches a &#34;pel recursive&#34; method and system for encoding pictorial information. The intensity value of the picture elements in a successive frame are first predicted relative to the intensity of the corresponding picture elements in the immediately prior frame adjusted by a predetermined gain factor. If an error is detected that exceeds a predetermined value, this is indicative of the pixels having moved or changed position, whereby the intensity value for the picture element at the given location is then recorded. Otherwise, it is assumed that the picture element remains unchanged between one frame and an immediately successive frame. In another embodiment of the invention, a dual prediction mode is incorporated for detecting changes in intensity beyond a predicted intensity between successive frames, and changes in displacement relative to predicted changes in displacement. Prediction errors are transmitted or encoded only if the error exceeds a predetermined level. 
     Tanimoto U.S. Pat. No. 4,675,733 refers to a bandwidth compression system. In FIG. 3A thereof, a subsampling technique is shown which is used for reducing the number of pixels sampled in a high definition television signal by one-half, for reducing the sampling frequency from 64.8 MHz to 32.4 MHz. A bandwidth compression system is then utilized to further reduce the number of pixels by a factor of one-half, and to reduce the frequency bandwidth required to 8.1 MHz. In FIG. 3B thereof, a subsampling pattern is shown for selecting predetermined ones of the pixels in the pattern for transmission. The number of basic pixels transmitted is equivalent to about one quarter of the original number of pixels of the associated frame. The basic pixels are processed through an interpolation circuit 20 (see FIG. 2A), for synthesizing the deleted pixels through an interpolation scheme based upon the weighted average values of neighboring basic pixels. The basic and synthesized pixels are transmitted to a receiver, for reconstructing the image. If the receiver detects an excessive error between the basic pixels and the synthesized pixels, only the basic pixels are used for reconstructing the image. 
     Shimura U.S. Pat. No. 4,776,029 teaches a method for compressing image signals. As shown in FIG. 2 thereof, and as described in column 4, lines 1 through 28, a Mask is formed for providing a moving average filter, whereby at any given time the average value of the pixels in the Mask frame (in this example a 3×3 picture element size or nine pixels are included within the Mask area) is calculated for providing an average image signal representative of the Mask. After the smoothing process, a sampling pattern is predetermined as shown in the example of FIG. 3 thereof, for sampling selected ones of main signals as shown. 
     Pirsch U.S. Pat. No. 4,827,340 refers to a video-signal-coding system that includes predictor circuitry for switching between two-dimensional intraframe predictors and pure interframe predictors. The decision as to which of the predictor networks or circuits are chosen is dependent upon a determination of where the least error in coding can be obtained. 
     Van der Meer et al. U.S. Pat. No. 4,924,306 shows a method and apparatus for providing motion estimation for pixels of a video picture. The comparisons are made relative to threshold values, which if exceeding are indicative of motion. The extent of motion of a given pixel is determined by comparing that pixel with a group of pixels from a subsequent or prior frame. 
     Kondo U.S. Pat. No. 4,947,249 teaches a system for coding digital video data. The pixels of each frame are encoded using a subsampling in one embodiment as shown in FIG. 4 thereof (see column 4, lines 42 through 68, and column 5, lines 1 through 19). As described a &#34;thinning-out&#34; process is used for eliminating a number of picture elements from being transmitted, but always within a sampling block such as shown in FIG. 4 at least one picture element is transmitted without modification. The other picture elements are compared with an average value of two other picture elements, and if the comparison results in an error below a predetermined threshold, then the pixel or picture element being examined is eliminated. Contrariwise, if the detected error is greater than the given threshold, the picture element is transmitted. 
     Haskell et al. U.S. Pat. No. 4,958,226 teaches the encoding of and decoding of motion in digital video in a system employing motion compensated interpolation. Two out of every three frames is interpolated for providing information coding in replacement of actual frame coding information for obtaining a reduction in the corresponding number of bytes that must be transmitted. 
     Carr et al. U.S. Pat. No. 5,008,748 teaches a system for coding video signals. Only picture elements of a frame which have changed relative to a previous frame are transmitted. A frame is broken down into a plurality of blocks, and picture elements of a selected block are compared with those of a corresponding block of a previous coded image to produce a matrix of values indicative of any change in value between the blocks for identifying regions of each block that have changed, whereby these changed regions are coded for transmission. Also, for each block or image area that is compared, that one of a plurality of possible sequences of picture elements within the area is selected which has the highest correlation between successive elements in the sequence. 
     Gillard U.S. Pat. No. 5,012,336 refers to a method and apparatus for converting a video signal conforming with a first video standard to a video signal conforming to a second video standard. Gillard teaches the &#34;comparison of a plurality of blocks in respective first and second intervals of a video signal with a plurality of blocks in respective intervals of the video signal adjacent thereto for deriving a corresponding plurality of motion vectors for each of the plurality of blocks representing motion of the image portion represented by each of the plurality of blocks.&#34; Each interval of the video signal is equivalent to each frame of video for the corresponding picture. &#34;The content of a search block in one field or frame is compared with the respective contents of a plurality of search blocks comprised in a search area in the following field or frame, to determine the minimum difference between the contents so compared, and hence the direction and distance of motion (if any) of the content of the original search block.&#34; 
     Koga U.S. Pat. No. 4,371,895, teaches a system for transmitting and receiving coded video information. In this system a frame of video is formed into a plurality of blocks of picture elements. The blocks of picture elements are processed for generating prediction errors indicative of the difference in value between the picture elements of a given block and the predicted values of such elements. The detected errors are utilized for optimizing the prediction signals. The optimized prediction error signals are coded and compressed for a transmission to a receiver, which decodes the information for reassembling the associated frame of video information. 
     Hirano et al. U.S. Pat. No. 4,460,923 discloses another predictive coding system for video signals. The system disclosed is similar to that of the immediately above-described Koga U.S. Pat. No. 4,371,895. 
     Koga, U.S. Pat. No. 4,562,468 discloses another adaptive predictive coding apparatus for coding video signals. 
     In T. Koga, et al., &#34;MOTION-COMPENSATED INTERFRAME CODING FOR VIDEO CONFERENCING&#34;, Proc. Nat. Telecommun. Conf., pp. G5.3.1-5.3.5, New Orleans, La., Nov. 29-Dec. 3, 1981, the use of an algorithm for providing block-by-block motion compensated video data is taught. Motion vectors relative to video information on a frame-by-frame basis are determined by a trial and error iterative process. Comparisons are made between frames through use of blocks of picture elements. This paper is related to the above Koga U.S. Pat. No. 4,371,895, and teaches a limited search technique. 
     The present inventors recognize that there is a need in the art to reduce the complexity of methods and apparatus for estimating motion vectors in imaging systems. 
     SUMMARY OF THE INVENTION 
     An object of the invention is to provide a method for reducing the complexity for motion estimation in imaging systems. 
     Another object of the invention is to provide an improved method and apparatus for estimating motion vectors between successive but not necessarily consecutive frames of an imaging system. 
     With these and other objects in mind, and in consideration of the need in the prior art, in various embodiments of the invention, a predetermined block pattern is utilized for each successive frame of pixels, and given blocks are selected from the pattern of one frame for comparison with given blocks of pixels in a prior frame in a predesignated search area. The block of the prior frame search area most closely matching the block of the present frame chosen for matching is positionally compared for defining a motion vector indicative of movement of the present block relative to its position in the prior frame. The motion vectors for predetermined selected blocks from a given pattern of blocks are then used for estimating the motion vectors of adjacent or neighboring blocks. The motion vectors indicative of the movement of a given block of pixels are transmitted for permitting a present frame to be constructed from a prior frame of pixels. The process is continued in an repetitive manner for successive frames. 
     The particular block pattern utilized typically is chosen from a tradeoff between desired performance and desired reduction in computational complexity. In another embodiment of the invention, at a first level of computation the frame of pixels is divided up into a predetermined block pattern, and at a more extended or lower level of computational reduction each block of pixels of a pattern is itself divided into a predetermined pattern of pixels, whereby only a fraction or given ones of the pattern of pixels within the block are used for comparison with similarly patterned blocks of pixels within a search area of a prior frame for determining the motion vector. In this manner, even greater reduction in the computational complexity is attained. Alternatively, in yet another embodiment, the frame of pixels is divided into blocks but not of any pattern, with each block of pixels being divided into a pattern as indicated above. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     Various embodiments of the present invention are illustrated below with reference to the drawings in which like items may be identified by the same reference designation, wherein: 
     FIG. 1 shows a known block estimation technique for determining motion vectors. 
     FIG. 2 is a pictorial diagram showing a rectangular lattice of pixels in a typical image frame. 
     FIG. 3 is a simplified block diagram of submodules required for carrying out various embodiments of the invention. 
     FIGS. 4, 5A, 5B, 6, and 7 are block diagrams showing details of one of the submodules of FIG. 3 of various embodiments of the invention, respectively. 
     FIGS. 8 through 10 are flowcharts of various embodiments of the invention. 
     FIGS. 11 through 18 show various block and pixel patterns associated with different embodiments of the invention. 
     FIGS. 19A and 19B are block diagrams illustrative of measuring techniques involved in various embodiments of the invention. 
     FIGS. 20 through 22 show simulations of curves of average mean square error (MSE) per pixel obtained for successive frames of a video sequence known as the tennis sequence, from known exhaustive search techniques, and various embodiments of the invention, respectively. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     As shown in FIG. 2, each frame 15 of the image sequence consists of pixels on a rectangular lattice 17. Although this illustration is based upon pixels arranged in a rectangular lattice, the present embodiments of the invention are applicable to non-rectangular lattices such as quincunx or offset lattices. A point s in lattice 17 is specified by (x,y) where x and y denote the row and column indices, respectively. In this example S 1  is at (x 1 , Y 1 ). I n  (s) denotes the intensity at pixel s of frame n (n=1, 2, 3 . . . ) to be coded and I n  (s) denotes the pixel intensity of the corresponding decoded frame. In color images, I n  (s) and I n  (s) may refer to the intensities of the red, green, or blue components, or they may refer to the luminance, or one of the chrominance components. The pixel argument s is omitted when referring to an entire frame, e.g. I n . A motion vector v is a two dimensional vector relating two pixels s 1  and s 2  on the lattice S; viz v=s 1  -s 2 . The motion vector v a   n  represents the object motion from frame n-1 to n. The subscript &#34;a&#34;  denotes either a pixel, or a group of pixels to which the motion vector is assigned; it is omitted when its meaning is understood from the text. The set of motion vectors for all pixels is called a motion field. Note that the example discussed above defines motion vectors in terms of successive frames n and n-1 (n=2, 3, 4 . . . ). However, in general, motion vectors can be defined in terms of frames that are not necessarily immediate successors. For example, the motion vectors can be defined from frames n and n-2, or frames n and n-5. 
     The displacement frame difference DFD n  (s,v) produced by a motion vector v at pixel s of frame n is shown in equation (1) below: 
     
         DFD.sup.n (s,v)=I.sup.n (s)-I.sup.n-1 (s-v)                (1) 
    
     The DFD n  (s,v) represents the error produced by predicting I n  (s) with a pixel from the previously decoded frame. The argument (s,v) is omitted when its meaning is understood from the text. 
     FIG. 3 illustrates an encoder 19 for a typical block based motion compensation coding system. As shown the encoding subsystem 19 includes a motion estimation module 21, a module 23 for the coding and quantizing of motion vectors, a subtractor 25, a motion compensation module 27, a module 29 for decoding motion vectors, a delay module 31, a code and quantizing DFD module 33, a summer 35, a decode DFD module 37, and a microprocessor 39, for example. 
     Within encoder 19, a decoder is included for providing access to decoded frames. The decoding is a two-step process for reconstructing each frame: the first being motion compensated prediction (MCP) 27, and the second being displaced frame difference decoding (DFDD) 37. MCP 27 uses the previously decoded frame I n-1  and a motion field v n  to construct an estimate of the current frame as shown in equation (2). 
     
         I.sup.n (s)=I.sup.n-1 (s-v.sup.n)                          (2) 
    
     The motion field v n  is decoded from a set of block motion vectors which are determined at the encoder, coded and transmitted over the channel. Thus v R   n  is an encoding of the motion field v n  which is originally computed at the encoder. 
     At the code and quantize DFD module 33, I n  -I n  is coded to obtain a set of coefficients c n , which are transmitted over the channel. The decoded displaced frame difference, denoted by DFD n , is decoded from the coefficients c n . Thus, DFD n  differs from DFD n  by the quantization noise associated with generating and decoding c n . 
     At the summer 35, the estimate of the current frame I n  is improved by adding the decoded DFD: 
     
         I.sup.n (s)=I.sup.n (s)+DFD.sup.n (s,v.sup.n).             (3) 
    
     The motion estimation module 21 is involved with various embodiments of the invention. Details are illustrated in FIG. 4, and discussed below. Also, a microprocessor 39 is shown in this example, for providing primary control signals via appropriate programming. The microprocessor 39 can also be replaced by hardwired logic if desired. 
     The function of the motion estimation block 21 of FIG. 3 is described with reference to FIG. 4. The pixels of the present frame, fed from line L1, are stored in memory unit U1. The pixels of either an immediately preceding frame, or of some other previous frame, fed from line L2, are stored in memory unit U2. The pixels of the frame are processed by blocks in this example. Parallel processing can be used, i.e. a number of blocks of pixels can be processed simultaneously. The function of the motion estimation block 21 is described below for the case where the processing is done sequentially. It is possible to modify the illustrated embodiments for processing several blocks in parallel. 
     The motion estimation procedure is controlled by the control block U3. The control block U3 outputs on line L3 the address of the block of pixels to be processed, designated herein as the present block. The control block U3 also outputs on line L5 a shift vector obtained from the motion estimation procedure. The memory unit U1 receives from line L3 the address of the present block of pixels, and outputs the pixels of that present block of pixels on line L4. The memory unit U2 receives from line L3 the address of the present block of pixels and the shift vector from line L5. It then sends on line L6 the pixels of the block whose address is equal to the address of the present block shifted by the values of the shift vector. In some motion estimation procedures of this invention, blocks of pixels are separated in categories. According to which category a block belongs and the shift vector, the processing to be performed on the blocks varies. The control block U3 sends on line L7 a signal indicating the type of processing to be performed. 
     The estimator U4 receives from line L4 the pixels of the present block, from line L6, the pixels of the block from the preceding frame, and from line L5, the shift vector used to determine the block from the preceding frame. The estimator U4 then determines the sum of absolute difference (SAD) according to the signal received on line L7. Other criteria such as the MSE can also be used. The estimator U4 also determines the shift vector minimizing the SAD, and outputs the minimizing shift vector on line L8. When the motion estimation of the present block is terminated, the control block U3 receives from line L8 the minimizing shift vector, and outputs the minimizing shift vector on line L10. 
     The function of the estimator U4 in FIG. 4 is described with reference to FIG. 5A. The pixels of the present block are fed by line L4 and the pixels of the block from the preceding frame are fed by line L6 to the arithmetic unit U6. The SAD is computed in the arithmetic unit U6 according to the signal fed from line L7. The result of the calculation is sent on line L11. Register U9 contains the shift vector that minimizes the SAD in the previous steps of the motion estimation process. Register U8 contains that minimum value of the SAD. The shift vector stored in register U9 is sent on line L15. The minimum value of the SAD stored in register U8 is sent on line L13. The comparator unit U7 receives on lines L5 and L15 the shift vectors whose SAD values are also fed to the comparator unit U7 via lines L11 and L13. The comparator unit U7 selects the minimum of two SAD values and sends that minimum value on line L12. The comparator unit U7 also sends on line L14 the shift vector whose SAD value is outputted on line L12. Register U8 stores the minimum SAD value fed via line L12. The register U9 saves the shift vector fed on line L14. When the present block has been processed with all the shift vectors, the register U9 contains the shift vector that minimizes the SAD for the present block. This is the motion vector of the present block. The register U9 also sends on line L8 the value of the shift vector that it contains. Note that at the first step of the motion estimation process for the present block, the register U8 is set to a large value. 
     The function of the comparator unit U7 of FIG. 5A is described with reference to FIG. 5B. The comparator U19 receives on lines L11 and L13 the two SAD values to be compared. If the SAD value on line L11 is smaller than the SAD value on line L13, the comparator U19 sends, via line L25, a signal to the multiplexers U20 and U21 such that multiplexer U20 outputs on line L12 the signal received on line L11, and multiplexer U21 outputs on line L14 the signal received on line L5. If the SAD value on line L13 is smaller than the SAD value on line L11, comparator U19 sends, via line L25, a signal to multiplexers U20 and U21 such that they respectively output, on lines L12 and L14, the signals they receive on lines L13 and L15, respectively. 
     The function of the arithmetic unit U6 in FIG. 5A is described with reference to FIG. 6. The pixels of the present block are provided on line L4, and the pixels of the block from the preceding frame are provided on line L6 to the pixel selector U10. In the different motion estimation procedures of the invention, blocks of pixels are separated in categories. The category to which a block belongs determines which pixels of the blocks are used to compute the SAD. The pixel selector U10 receives on line L7a a signal that indicates which pixels of the present block (line L4) and of the block from the preceding frame (line L5) are used to compute the SAD. These pixels are outputted by the pixel selector U10 to the lines L16 and L17. Note that the pixel selector U10 can simply be a multiplexer board consisting of a plurality of multiplexers, for example. The pixels of the present block are outputted on lines L16a and L16b. The pixels of the block from the preceding frame are outputted on lines L17a and L17b. The embodiment presented here processes two pixels simultaneously. Other embodiments processing one pixel at a time or processing more than two pixels in parallel are also possible. The absolute difference unit U11a computes the absolute difference between the values on lines L16a and L17a. The absolute difference unit U11b does similarly for the values on lines L16b and L17b. The outputs of the absolute difference units U11a and U11b are then added to the content of the accumulators U13a and U13b. These accumulators U13a and U13b  have to be cleared at the beginning of the computation of the SAD for each of the shift vectors. The signal fed to the accumulators U13a and U13b by line L7b indicates when to clear the accumulators. The outputs of the accumulators are fed to the adder U14. When all the pixels have been processed, the output of the adder is the SAD and is sent on line L11. 
     The function of the control block U3 in FIG. 4 is described with reference to FIG. 7. In the present invention, an image frame is divided into blocks of pixels, and these blocks are separated into two categories, dark and light shaded blocks. FIGS. 11 and 12 are examples of separating blocks into dark and light shaded blocks, designated herein as dark and light blocks, respectively. In certain applications, it is desirable to consider all blocks on the boundary of a frame as dark blocks. For each of the two block types, there are three options to estimate the motion vector of a block. Each of these options corresponds to a branch of the flowcharts of FIGS. 8, 9, and 10. Each of these branches in FIGS. 9 and 10 are terminated by a step indicating &#34;estimate motion vector&#34; of the block. Those steps are steps 51, 57 and 63 (see FIG. 9) for the dark blocks, and steps 71, 75 and 79 (see FIG. 10) for the light blocks. 
     The functions of the control block U3 when used to estimate the motion vector of a dark block will now be described. The motion vector of a dark block is estimated using all the possible shift vectors of the search area. There are three options specifying which pixels of a dark block are to be used to estimate its motion vector. Those options correspond to the branches, in the flowchart of FIG. 9, terminated by the steps 51, 57 and 63. The functions of the control block for each of these options will now be described. 
     The first option corresponds to the flowchart branch terminated by step 51 (see FIG. 9). For that option, all the pixels of the block are used to estimate its motion vector. The control circuit U15 sends on line L3 the address of the present block of pixels. The control circuit U15 sends on line L19 one of the shift vectors used to determine the motion vector of the present block. The signal sent on line L18 by the control circuit U15 is such that the signal fed on line L5 by the multiplexer U16 is the signal that the multiplexer receives on line L19. The control circuit U15 sends on line L7 the signal indicating that all the pixels of the block have to be used to compute the SAD. When all the possible shift vectors have been applied to the present block of pixels, the motion vector of the present block of pixels is received on line L8, stored in memory U17 and fed to line L10. 
     The second option corresponds to the flowchart branch terminated by step 57 (see FIG. 9). For that option, only the pixels specified by sparse pixel patterns are used to estimate its motion vector. The control circuit U15 sends on line L3 the address of the present block of pixels. The control circuit U15 sends on line L19 one of the shift vectors used to determine the motion vector of the present block. The signal sent on line L18 by the control circuit U15 is such that the signal fed on line L5 by the multiplexer U16 is the signal that the multiplexer receives on line L19. The control circuit U15 sends on line L7 the signal indicating that only the pixels of a given sparse pixel pattern are used to compute the SAD. FIGS. 13, 14, 15 and 16 give some sparse pixel patterns that can be used for this purpose. When all the possible shift vectors have been applied to the present block of pixels, the motion vector of the present block of pixels is received on line L8, stored in memory U17, and outputted to line L10. 
     The third option corresponds to the flowchart branch terminated by step 63 (see FIG. 9). In this case, the motion vector of a dark block is estimated using alternately several sparse pixel patterns for the different shift vectors. In this example, the four sparse pixel patterns of FIG. 17 are used, as is the alternating schedule of FIG. 18. The control circuit U15 first sends on line L3 the address of the present block of pixels. The control circuit U15 then sends on line L7 the signal indicating that only the pixels of the first sparse pixel pattern have to be used to compute the SAD. The control circuit U15 then sends on line L19 one of the shift vectors designated to be used with the first sparse pixel pattern. The signal sent on line L18 by the control circuit U15 is such that the signal fed on line L5 by the multiplexer U16 is the signal that the multiplexer U16 receives on line L19. When all the shift vectors designated to be used with the first sparse pixel pattern have been applied to the present block, the shift vector received on line L8 is the motion vector for the first sparse pixel pattern. That shift vector is then stored in memory U18. The process is similar for the other three sparse pixel patterns. When the process for the four sparse pixel patterns is completed, the motion vectors obtained with the four sparse pixel patterns are stored in memory U18. Next, the control circuit U15 sends on line L7 the signal indicating that all the pixels of the blocks are now to be used to compute the SAD. The control circuit U15 also sends on line L23 the address of the motion vector obtained with one of the sparse pixel patterns. The memory U18 sends on line L20 the motion vector whose address is received on line L23. The signal sent on line L18 by the control circuit is such that the signal fed on line L5 by the multiplexer U16 is the signal that the multiplexer U16 receives on line L20. When all the motion vectors corresponding to the four sparse pixel patterns have been applied to the present block of pixels, the shift vector received on line L8 is the motion vector of the present block. The motion vector is stored in memory U17 and fed to line L10. 
     The functions of the control block U3 as used to estimate the motion vector of a light block will now be described. The motion vector of a light block is estimated using the motion vectors of predetermined neighboring dark blocks. There are three options specifying how to determine the motion vector of a light block from the motion vectors of these neighboring dark blocks. Those options correspond to the branches, in the flowchart of FIG. 10, terminated by the steps 71, 75, and 79. The functions of the control block for each of these options will now be described. 
     The first option corresponds to the flowchart branch terminated by step 71 (see FIG. 10). For that option, the motion vector of a light block is solely determined from the motion vectors of predetermined neighboring dark blocks. The motion vectors of these dark blocks have been previously determined. The control circuit U15 sends on line L22 the address of one of the predetermined neighboring dark blocks of the present light block. The memory U17 sends on line L21 the motion vector of the block whose address is fed on line L22. The signal sent on line L18 by the control circuit is such that the signal fed on line L5 by the multiplexer U16 is the signal that the multiplexer receives on line L21. The control circuit U15 receives via line 5 that motion vector. When all the motion vectors of the predetermined neighboring dark blocks that have to be considered have been received by the control circuit, the control circuit U15 determines the motion vector of the light block using a predetermined procedure. For example, this predetermined procedure can simply consist of computing the average of the motion vectors of the neighboring dark blocks. The control circuit then sends on line L24 that motion vector, and on line L22 the address of the present light block. The memory U17 stores the motion vector received on line L24 at the address given on line L22 and also sends that vector on line L10. 
     The second option corresponds to the flowchart branch terminated by step 75 (See FIG. 10.). For that option, all the pixels of the light block are used to determine its motion vector. The control circuit U15 sends on line L3 the address of the present block of pixels. The control circuit U15 also sends on line L7 a signal indicating that all the pixels of the block have to be used to compute the SAD. The control circuit U15 sends on line L22 the address of one of the predetermined neighboring dark blocks of the present light block. The motion vector of that neighboring dark block has been previously determined. The memory U17 sends on line L21 the motion vector of the block whose address is fed on line L22. The signal sent on line L18 by the control circuit U15 is such that the signal fed on line L5 by the multiplexer U16 is the signal that the multiplexer receives on line L21. When all the motion vectors of the predetermined neighboring dark blocks that have to be considered have been applied to the present block of pixels, the motion vector of the present block of pixels is received on line L8, stored in memory U17 and fed to line L10. 
     In the above discussion, only the motion vector of the neighboring dark blocks are used. Alternatively, one can also send additional motion vectors via lines L5 in FIG. 4. For example, one can include the zero motion vector, which would indicate that the white block in question has no motion. One can also modify the motion vectors of each of the neighboring dark blocks by a small change, indicating the motion of the white block may be slightly different from that of the neighboring dark blocks. As an example, suppose the motion vector of a neighboring dark block is (4,-3). More specifically, +4 pixel in the horizontal direction and -3 in the vertical direction. This will permit the use of five motion vectors (0,0), (4,-2), (4,-4), (3,-3), and (5,-3) in addition to the vector (4,-3). Other vectors sightly different from (4,-3) can also be used. 
     The third option corresponds to the flowchart branch terminated by step 79 (See FIG. 10.). For that option, only the pixels of the light block specified by a sparse pixel pattern are used to determine its motion vector. The control circuit U15 sends on line L3 the address of the present block of pixels. The control circuit also sends on line L7 the signal indicating that only the pixels of given sparse pixel pattern have to be used to compute the SAD. The control circuit sends on line L22 the address of one of the predetermined neighboring dark block of the present light block. The motion vector of that neighboring dark block has been previously determined. The memory U17 sends on line L21 the motion vector of the block whose address is fed on line L22. The signal sent on line L18 by the control circuit U15 is such that the signal fed on line L5 by the multiplexer U16 is to the signal that the multiplexer receives on line L21. When all the motion vectors of the predetermined neighboring dark blocks that have to be considered have been applied to the present block of pixels, the motion vector of the present block of pixels is received on line L8, stored in memory U17 and fed to line L10. Note that the control circuit U15 can be hardwired logic or a microprocessor, for example. 
     Note that as discussed above, in the processing of a white or light block terminating in step 75 of flowchart 64 (see FIG. 10), additional motion vectors can be sent via line L5 for processing a light block terminating in step 79. 
     
                       TABLE 1______________________________________Arrangement    Terminating stepNumber   Flowchart 40                Flowchart 48                            Flowchart 64______________________________________100      43          51200      43          57300      43          63400      47          51          71500      47          51          75600      47          51          79700      47          57          71800      47          57          75900      47          57          791000     47          63          711100     47          63          751200     47          63          79______________________________________ 
    
     FIGS. 8 through 10, previously briefly discussed, are flowcharts that show program arrangements for various embodiments of the invention. Table 1 gives the different combinations that can be obtained by going through the three flowcharts 40, 48, and 64. 
     Each of the arrangements are specified by the branch taken in each of the three flowcharts. The steps 43, 47, 51, 57, 71, 75 and 79 are the &#34;terminating&#34; steps of each of the branches and will be used to represent them. The arrangements given in Table 1 are all the possible combinations of the terminating steps. The different arrangements are illustrated below by describing each of the branches that can be taken in the three flowcharts. 
     The branches terminated by steps 43 and 47 (see FIG. 8) specify if the blocks of a frame are to be processed identically or not. When step 43 is part of an arrangement, the motion vectors of all the blocks are determined in the same manner. These blocks are labeled as dark blocks. When step 47 is part of an arrangement, the blocks are separated into two groups, the dark blocks and the light blocks. The motion vectors of the dark blocks and the light blocks are then determined in a different manner. FIGS. 11 and 12 show two examples of how blocks can be divided into dark and light blocks. 
     The branches terminated by steps 51, 57 and 63 (see FIG. 9) specify how to process the dark blocks. When step 51 is part of an arrangement, all the pixels of a dark block are to be used to determine its motion vector. When step 57 is part of an arrangement, only a predetermined fraction of the pixels of a dark block are to be used to determine its motion vector. The fraction of the pixels to be used is identified as a sparse pixel pattern. FIGS. 13, 14, 15 and 16 show some examples of sparse pixel patterns. When step 63 is part of an arrangement, predetermined fractions of the pixels of a dark block are used alternately over the search area to determine its motion vector. FIG. 17 shows an example of four sparse pixel patterns that can be used alternately over the search area; the pixels identified as &#34;a&#34; define one pattern, the pixels identified as &#34;b&#34; define another one, and similarly for the pixels identified as &#34;c&#34; and &#34;d&#34;. FIG. 18 shows how these four sparse pixel patterns can be used alternately over the search area. Blocks &#34;A&#34; indicate search locations where the sparse pixel pattern &#34;a&#34; is used; blocks &#34;B&#34; indicate search locations where the sparse pixel pattern &#34;b&#34; is used, and so on for blocks &#34;C&#34; and &#34;D&#34;. 
     The branches terminated by the steps 71, 75, and 79 (see FIG. 10) specify how to process the light blocks. When step 71 is part of an arrangement, motion vector of a light block is solely determined from the motion vector of the neighboring dark blocks. For example, in FIG. 11, block &#34;A&#34; is a light block. Blocks &#34;B&#34;, &#34;C&#34;, &#34;D&#34;, and &#34;E&#34; are the neighboring dark blocks from which the motion vector of block &#34;A&#34; is to be determined. The motion vector of block &#34;A&#34; can simply be the motion vector equal to the average of the motion vectors of blocks &#34;B&#34;, &#34;C&#34;, &#34;D&#34;, and &#34;E&#34;. When step 75 is part of an arrangement, the motion vector of a light block is determined from the motion vector of the predetermined neighboring black blocks, and uses all the pixels of the light block. For example, in FIG. 12, the motion vector of block &#34;a&#39;&#34; can be determined as follows. The light block &#34;a&#39;&#34; is matched to the two blocks in the previous frame whose locations are determined by the motion vectors of blocks &#34;A&#34; and &#34;B&#34;. The matching is done using all the pixels of the light block. When step 79 is part of an arrangement, the motion vector of a light block is determined from the motion vector of the predetermined neighboring black blocks and from a predetermined fraction of the pixels of the light block. That fraction of the pixels of the light block is given by a sparse pixel pattern. For example, in FIG. 12, the motion vector of block &#34;b&#39;&#34; can be determined as follows. We match the light block &#34;b&#39;&#34; to the two blocks in the previous frame whose locations are determined by the motion vectors of blocks &#34;A&#34; and &#34;C&#34;. The matching is accomplished using only the dark pixels of the sparse pattern of FIG. 13, for example. 
     Arrangement 100 consists in estimating the motion vectors of all the blocks identically. For each block, all the pixels of the block are employed in the computation. This arrangement corresponds to a standard block matching algorithm. 
     Arrangement 200 of one embodiment of the invention consists in estimating the motion vectors of all the blocks identically. For each block, the same predetermined fraction of the pixels of the block are used to determine its motion vector. The fraction of the pixels to be used is determined by a sparse pixel pattern. The term subsampling of pixels is understood in the literature to mean a uniform pattern of the pixels, such as the one in FIG. 13, where every other pixel is used. Use of a sparse pixel pattern is more general. It includes the pattern of FIG. 16, which is not a uniform pattern and is not taken to be subsampling in the usual sense of the terminology. All of the other arrangements are illustrative of other embodiments of the invention. 
     As an example, arrangement 1100 (see Table 1) will now be described using specific dark and light blocks and sparse pixel patterns. 
     First, notation must be established. Assume that a frame is made of V lines and that there are H pixels per line. Line O is the top line in the frame and pixel O is the leftmost pixel on each line. A block of pixels has M*N pixels, i.e. M pixels on each of the N lines. A block of pixels is designated by its upper left coordinate, i.e. B(i,j) is a block consisting of the pixels j, j+1, j+2, . . . , j+M-1 on the lines i, i+1, i+2, . . . , i+N-1. 
     The arrangement 1100 uses the branch terminated by step 47 (see FIG. 8). Step 45 of that branch separates the blocks of pixels into dark and light blocks. As an example, use FIG. 11 as the pattern for separating the blocks of the frame into dark and light blocks. The dark blocks are the blocks with coordinates B(2Nk,2Mr) and B(N(2k+1), M(2r+1)) for k=0, 1, . . . , V/(2N)-1 and for r=0, 1, . . . , H/(2M)-1. The light blocks are the blocks with coordinates B(2Nk,M(2r+1)) and B(N(2k+1),2Mr) for k=0, 1, . . . , V/(2N)-1 and for r=0, 1, . . . , H/(2M)-1. As step 47 indicates, the dark and light blocks are processed in that step. 
     Arrangement 1100 uses the branch terminated by step 63 (see FIG. 9) to process the dark blocks. Step 59 in that branch, indicates one must first choose sparse pixel patterns in order to process the dark blocks. In this example, please refer to the four sparse patterns of FIG. 17. Let B(i,j) be the dark block for which a motion vector is to be estimated. The sparse pixel pattern &#34;a&#34; is made of the pixels B(i+k,j+r) for k and r even, and for k strictly less than N and r strictly less than M. The sparse pattern &#34;b&#34; is made of the pixels B(i+k,j+1+r) for k and r even, for k strictly less than N, and for r strictly less than M-1. The sparse pattern &#34;c&#34; is made of the pixels B(i+1+k,j+r) for k and r even, for k strictly less than N-1, and for r strictly less than M. The sparse pattern &#34;d&#34; is made of the pixels B(i+1+k,j+1+r) for k and r even, for k strictly less than N-1, and for r strictly less than M-1. 
     Step 61 of the branch specifies an alternating schedule for the sparse pixel patterns. In this example, use the alternating schedule of FIG. 18. The four sparse pixel patterns described in the preceding paragraph are alternately used over the search area using the schedule of FIG. 18. For this case, assume that the search area covers motion of YT pixels up, YB pixels down, XL pixels left and XR pixels right. That search area for the block B(i,j) is shown in FIGS. 19A and 19B. The search area consists of the locations (i-YT+k, j-XL+r) for k=0, 1, 2, . . . , YB+YT and for r=0, 1, 2, . . . , XL+XR. The locations of the search area are given as a reference to the upper left coordinate of the block. 
     The alternating schedule can then be described as follows. The sparse pixel pattern &#34;a&#34; is used over the locations (i-YT+k,j-XL+r) for k and r even, k strictly less than YB+YT+1, and r strictly less than XL+XR+1. The sparse pixel pattern &#34;b&#34; is used over the locations (i-YT+k+1, j-XL+r) for k and r even, k strictly less than YB+YT and r strictly less than XL+XR+1. The sparse pixel pattern &#34;c&#34; is used over the locations (i-YT+k+1,j-XL+r+1) for k and r even, k strictly less than YB+YT and r strictly less than XL+XR. The sparse pixel pattern &#34;d&#34; is used over the locations (i- YT+k,j-XL+r+1) for k and r even, k strictly less than YB+YT+1 and r strictly less than XL+XR. 
     The motion vector of the dark block B(i,j) (step 63 of FIG. 9) can now be determined. Using the search locations described in the previous paragraph, determine by block matching a motion vector for each of the sparse pixel patterns. For these four locations and using all the pixels of the block, then determine by block matching the motion vector of the dark block B(i,j). One proceeds similarly for the other dark blocks. 
     The third flowchart (FIG. 10) specifies how to process the light blocks. In step 65, the neighboring dark blocks used to determine the motion vectors of the light blocks are chosen. FIG. 11 shows the dark blocks &#34;B&#34;, &#34;C&#34;, &#34;D&#34;, and &#34;E&#34; used in this example as the neighboring blocks of the light blocks. The motion vector of light block &#34;A&#34; is determined from the motion vectors of blocks &#34;B&#34;, &#34;C&#34;, &#34;D&#34;, and &#34;E&#34;. For this example, one chooses in step 67 to determine the motion vector by block matching; and in step 73, to use all the pixels of the light blocks. At step 75, all the light blocks according to the specified parameters are processed. Specifically, this means that for a light block with coordinates B(i,j), one determines its motion vector by block matching using the locations determined by the motion vectors of the neighboring dark blocks B(i-N,j), B(i+N,j), B(i,j-M) and B(i,j+M). The block matching is performed using all the pixels of the block. 
     In FIG. 20, curves are shown for comparing the average MSE per pixel of motion-compensated frames produced by one embodiment of the invention, and the known exhaustive search technique for frames of the video sequence known as the tennis sequence. Blocks of 16-by-16 pixels were used. Curve 72 represents a plot derived from the known exhaustive search technique, in which all of the blocks in a current frame are searched throughout search areas of a previous frame, for obtaining motion vectors, as previously described. Curve 74 represents a plot derived from an embodiment of the invention using the block pattern 70 of FIG. 12. Note that with reference to FIG. 12, the motion vectors were obtained by exhaustive search for the dark blocks &#34;A&#34; through &#34;D&#34;, and interpolating or estimating the motion vectors for the light blocks non-exhaustively searched through use of the motion vectors obtained for neighboring blocks thereto for unsearched blocks such as a&#39;, b&#39;, and c&#39;, respectively. The computer simulation shown in FIG. 20 is for the first 90 frames of tennis sequence. As shown, curve 74 obtained for one embodiment of the invention closely approaches the results obtained from the exhaustive search technique known in the art. The embodiment of the invention from which curve 74 is obtained requires only 25.0% of the computation of the exhaustive search technique. 
     In FIG. 21, a computer simulation is shown for frames of the tennis sequence relative to the plotting of a known exhaustive search shown by curve 76; to an embodiment of the invention using the sparse pixel pattern 89 of FIG. 17 in combination with the alternating schedule of sparse pixel patterns 91 of FIG. 18, resulting in curve 78; and to another embodiment of the invention using the sparse pixel pattern 85 of FIG. 15 for producing the result shown by curve 80. In this example, blocks of 8-by-8 pixels were used. Note that the results of curve 78 of an embodiment of the invention shows an average MSE comparable to the exhaustive search results shown by curve 76. 
     In FIG. 22, the results of a computer simulation using two known techniques, and techniques of the present invention are shown. In this example, blocks of 8-by-8 pixels were used. Curve 86 shows the results obtained using the triple search technique taught in U.S. Pat. No. 4,371,895, and discussed in the Background Of The Invention. Curve 82 was obtained using the exhaustive full block search technique. Curve 84 was obtained for an embodiment of the invention using the block pattern 68 of FIG. 11, in combination with the pixel pattern 89 of FIG. 17 and the alternating schedule of pixel patterns 91 of FIG. 18. Note that the curve 84 of this embodiment of the invention compares very favorably to curve 82 obtained from the known exhaustive search technique. All of these curves were obtained from 90 frames of the tennis sequence. 
     As previously described, with reference to FIGS. 11 through 18, various embodiments of the invention may be combined in different combinations. For example, one of the block patterns 68 or 70 of FIGS. 11 and 12, respectively, can be combined with one of the sparse pixel patterns 81, 83, 85, 87, or 89 of FIGS. 13 through 17, respectively, in either a non-alternating schedule or in an alternating schedule 91 as shown in FIG. 18, for example, for obtaining motion vectors in an imaging system with reduced computation. 
     Although various embodiments of the invention have been illustrated and described herein, they are not meant to be limiting. Those of skill in the art may recognize modifications to these various embodiments, which modifications are meant to be covered by the spirit and scope of the claims appended hereto. For example, many other block patterns, sparse pixel patterns and alternating schedule for given sparse pixel patterns can be devised for use in the present invention.