Abstract:
Photoelectric conversion apparatus including a photoelectric conversion sensor unit having a plurality of photoelectric conversion sensors, a driving signal generating circuit, which outputs a control signal for a phtoelectric converting operation of the photoelectric conversion sensor, and a scanning circuit for outputting a control signal to output a photoelectrically converted signal from the photoelectric conversion sensor unit, where a clock signal input into the driving signal generating circuit and a clock signal input into the scanning circuit are independently provided.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention is related to a photoelectric conversion apparatus, particularly an apparatus comprising a photoelectric conversion sensor unit having a plurality of photoelectric conversion sensors, driving signal generating means for outputting a control signal for a photoelectric converting operation of the photoelectric conversion sensor unit and scanning means for outputting a control signal to output a photoelectrically converted signal from said photoelectric conversion sensor unit. 
     2. Related Background Art 
     Among the photoelectric conversion apparatus, there are such apparatus requiring a pixel resetting operation because an electric charge remains in each pixel. 
     FIG. 1 is an equivalent circuit diagram to indicate one sensor pixel of a photoelectric conversion apparatus and FIG. 2 is the schematic block diagram of the photoelectric conversion apparatus. 
     As shown in FIG. 1, one sensor pixel is composed of a bipolar photoelectric conversion sensor Tr, storage condenser Cr to store the signal from the photoelectric conversion sensor Tr, MOS transistors M1 and M2, which reset the base area and emitter area of photoelectric conversion sensor Tr, MOS transistor M3, which transmits the electric charge to storage condenser Cr and resets it, and MOS transistor M4 for output which outputs, the electric charge stored in the storage condenser Cr. The sign φs represents the scanning signal of MOS transistor M4 for output, φBR, φVRS and φT are signals for driving and resetting MOS transistors M1, M2 and M3. 
     In FIG. 2, said sensor pixels are arranged on the sensor pixel array 3 and signals φBR, φVRS and φT for driving and resetting are generated by the reset signals φA and φB coming from a driving signal generating circuit 1. Scanning signal φS is generated by the scanning circuit 2. Driving signal generating circuit 1 is engaged by the trigger signal φTR and basic action clock signal φCLK. Scanning circuit 2 is engaged by the basic action clock signal φCLK and start signal φST. Signals coming from sensor pixel array 3 are output through output circuit 4. 
     However with the aforesaid photoelectric conversion apparatus, there have been such problems that, for example, when the frequency of basic operation clock signal φCLK is raised in order to increase the signal output frequency, the signals φBR, φVRS and φT for driving and resetting are uniformly shortened and the reset time becomes shorter than the preset reset time and it gives serious influence on the photoelectric characteristics of the system. 
     SUMMARY OF THE INVENTION 
     The object of the present invention is to give a solution to the aforesaid problems, and for such a purpose the present invention provides a photoelectric conversion apparatus comprising photoelectric conversion sensor unit having a plurality of photoelectric conversion sensors, driving signal generating means for outputting a control signal for photoelectric conversion operation of the photoelectric conversion sensor unit and scanning means for outputting a control signal to output signals of a photoelectrically converted signal from the photoelectric conversion sensor unit, wherein a clock signal input to said scanning means and a clock signal input to the driving signal generating means are independently provided. 
     Another embodiment of the present invention is the photoelectric conversion apparatus comprising a photoelectric conversion sensor unit having a plurality of photoelectric conversion sensors, driving signal generating means for outputting a control signal for a photoelectric conversion operation of said photoelectric conversion sensor unit and scanning means for outputting a control signal to output a photoelectrically converted signal from the photoelectric conversion sensor unit, wherein there is provided means for receiving either one of a clock signal input into the driving signal generating means and a clock signal input into the scanning means and a signal providing the correlation between the received clock signal and the other clock signal and for generating the other clock signal. 
     The photoelectric conversion apparatus of the present invention enables the control of a photoelectric conversion operation such as storage or resetting action of the photoelectric conversion sensor unit and the output operation to output the photoelectrically converted signal from the photoelectric conversion sensor unit by a frequency which can be arbitrarily set, since a clock signal input to said scanning means and a clock signal input to the driving signal generating means are independently provided. 
     Furthermore, the photoelectric conversion apparatus of the present embodiment enables the control of a photoelectric conversion operation such as the storage operation and resetting operation of a photoelectric conversion sensor unit and the output operation to output the photoelectrically converted signal from the photoelectric conversion sensor unit by the frequency which can be arbitrarily set and also enables to generate, upon receipt of either the clock signal input into the driving signal generating means or the clock signal input into the scanning means, the other clock signal, since there is provided means for receiving either one of a clock signal input into the driving signal generating means and a clock signal input into the scanning means and a signal providing the correlation between the received clock signal and the other clock signal and for generating the other clock signal. 
     Still other embodiment of the present invention is the photoelectric conversion apparatus comprising a photoelectric conversion sensor unit having a plurality of photoelectric conversion sensors, driving signal generating means for outputting a control signal for a photoelectric conversion operation of the photoelectric conversion sensor unit and scanning means for outputting a control signal to output a photoelectrically converted signal from the photoelectric conversion sensor unit, wherein a frequency of a clock signal input into the scanning means is changed by controlling a signal width of a trigger signal input into the driving signal generating means. 
     Photoelectric conversion apparatus of the present embodiment enables the individual control of a photoelectric converting operation of photoelectric conversion sensor unit, such as the storage operation, the resetting operation etc. and the output operation to output a photoelectrically converted signal from the photoelectric conversion sensor unit by a frequency which can be arbitrarily set, by changing the frequency of the clock signal input into the scanning means by controlling the signal width of a trigger signal input into the driving signal generating means, since a frequency of the clock signal input into the scanning means is changed by controlling the signal width of the trigger signal input into the driving signal generating means. 
     Other objects and characteristics of the present invention shall be made evident by the drawings and specifications given below. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is the equivalent circuit diagram to show a sensor pixel of a photoelectric conversion device and FIG. 2 is the schematic block diagram of the photoelectric conversion apparatus; 
     FIG. 3 is the schematic block diagram to show the composition of Embodiment 1 of the photoelectric conversion apparatus of the present invention and FIG. 4 is the timing chart to explain the performance of the photoelectric conversion apparatus; 
     FIG. 5 is the schematic block diagram of the Embodiment 2 of the photoelectric conversion apparatus of the present invention and FIG. 6 is the timing chart to explain the performance of the present photoelectric conversion apparatus; 
     FIG. 7 is the schematic block diagram of the Embodiment 3 of the photoelectric conversion apparatus of the present invention and FIG. 8 is the timing chart to explain the performance of such photoelectric conversion apparatus; 
     FIG. 9 is the schematic block diagram of Embodiment 4 of the photoelectric conversion apparatus of the present invention and FIG. 10 is the timing chart to explain the performance of such photoelectric conversion apparatus; 
     FIG. 11 is the schematic drawing of the Embodiment 5 of the photoelectric conversion apparatus of the present invention; and 
     FIG. 12 is the timing chart to explain the performance of such photoelectric conversion apparatus. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Hereunder are described the details of the Embodiment of the present invention in reference to the drawing. 
     FIG. 3 is the schematic block diagram of the photoelectric conversion apparatus of the present invention and FIG. 4 is the timing chart to explain the performance of such photoelectric conversion apparatus. 
     In the Embodiment described below, the same components to those indicated in FIG. 2 are given the same symbols and their explanations are omitted. The composition of the sensor pixel of the photoelectric conversion equipment of the present embodiment is identical to the sensor pixel explained in reference to FIG. 1. 
     As indicated in FIG. 3, in the case of the present Embodiment, in addition to the trigger signal φTR and the basic operation clock signal φCLK (here, the &#34;clock signal to be input into the driving signal generating means 1 mentioned in the present Embodiment&#34; means this basic operation clock signal φCLK. Same applies to the Embodiment 2 to be stated later), the clock signal φSCAN for scanning (in the present Embodiment, &#34;clock signal to be input into scanning means&#34; means this clock signal φSCAN for scanning. Same applies to the Embodiment 2 to be stated later) is provided. 
     When trigger signal φTR and the basic operation clock signal φCLK are input, the reset signal φA, φB are generated at the driving signal generation circuit and the start signal φST of the scanning circuit 2 is generated. 
     Here, the driving and resetting signal φBR, φVRS and φT to be generated by reset signal φA and φB, must be in an operation during preset time, and therefore trigger signal φTR and the basic performance clock signal φCLK are constant clock signals. 
     When scanning clock signal φSCAN is input, scanning circuit 2 functions. Since scanning clock signal φSCAN and the basic operation clock signal φCLK are independently input, it is possible to change the frequency of the optical signal output synchronizing it with the scanning clock signal φSCAN and making it irrelevant to the basic operation clock signal φCLK as shown in FIG. 4 (in the Figure, Case 1 shows the case when the frequency of scanning clock signal φSCAN is smaller than the that of the basic operation clock signal φCLK and Case 2 is the case when the frequency of scanning clock signal φSCAN is equal to that of the basic operation clock signal φCLK). 
     FIG. 5 is the schematic block diagram of Embodiment 2 of the photoelectric conversion equipment of the present invention and FIG. 6 is the timing chart to explain the performance of this photoelectric conversion apparatus. 
     The component members same as those of FIG. 2 are given the same symbols and their explanations are omitted. The composition of the sensor pixel of the photoelectric conversion apparatus of the present Embodiment is identical to that of the sensor pixel explained in FIG. 1. 
     In the Embodiment 1 stated above, three clock signals, namely, the trigger signal φTR, the basic operation clock signal φCLK and the scanning clock signal φSCAN have been input but in the present Embodiment, it is intended that the basic operation clock signal φCLK be generated from trigger signal φTR and the scanning clock signal φSCAN. In other words, the scanning clock signal φSCAN is counted by counter 5 while the trigger signal φTR is at &#34;H&#34; level (i.e., high level) and the basic operation clock signal φCLK is generated therefrom. 
     Therefore, if the period when trigger signal φTR is held at &#34;H&#34; level is made constant, even when the frequency of the scanning clock signal φSCAN should change, always the same basic operation clock signal φCLK is obtained as long as the scanning clock signals φSCAN of the preset number are input into the counter 5 within the &#34;H&#34; level period of trigger signal φTR and therefore also for reset signal φA, φB and φST, always the desired clock signal is obtained. As the result, the signal output having the desired photoelectric characteristics can be obtained at the desired frequency. 
     FIG. 7 is the schematic block diagram of the Embodiment 3 of the photoelectric conversion apparatus of the present invention and FIG. 8 is the timing chart to explain the performance of the present photoelectric conversion apparatus. 
     In the present Embodiment, in addition to the trigger signal φTR and the basic operation clock signal φCLK, the digital input D1-Dn are input as shown in FIG. 7. 
     When the trigger signal φTR and the basic operation clock signal φCLK are input, digital input D1-Dn are decoded through decoder 6 and the signals are sent to counter 5. At counter 5, based on such signals, the clock signal φCLK to be used in the driving signal generation circuit 1 is generated. The timing chart of FIG. 8 assumes the case of D1=0, D2=1, D3=D4=. . . =Dn i.e., the case when information from the digital input is &#34;2&#34;. 
     At the driving signal generation circuit 1, reset signals φA, φB and φST are generated based on the clock signal φCLK (in this Embodiment, &#34;the clock signal to be input into the driving signal generation means&#34; means this clock signal φCLK). 
     On the other hand, basic operation clock signal φCLK (in this Embodiment, &#34;clock signal to be input into the scanning means&#34; means this basic operation clock signal φCLK) is directly input into scanning circuit 2 and consequently the signal output frequency is determined by the frequency of basic operation clock signal φCLK. Here, even when the basic operation clock signal φCLK is made at high speed and signal output frequency is set at high level, it is possible to set the frequency of the clock signal φCLK at the preset level by changing the value of digital input D1-Dn and desired photoelectric characteristics are obtained from each sensor pixel. In FIG. 6, the basic operation clock signal φCLK is used for scanning circuit 2 and clock signal φCLK is used for driving signal generation circuit 1 but as shown in FIG. 9 and FIG. 10, the similar effect is obtained when the connection is reversed and the basic operation clock signal φCLK is used for the driving signal generation circuit 1 (that is, the basic operation clock signal φCLK is used as the &#34;clock signal to be input into the driving signal generating means&#34;) and clock signal φCLK is used for the scanning circuit 2 (this is, the clock signal φCLK that is used as the &#34;clock signal to be input into scanning means&#34;). 
     As described in detail as above, according to the photoelectric conversion apparatus of the present Embodiment, by independently providing the clock signal to be input into the driving signal generating means and the clock signal to be input into scanning means, the photoelectric converting action such as the storage operation and the resetting operation of the photoelectric conversion sensor unit and the output operation to output the signal having received the photoelectric conversion from the photoelectric conversion sensor unit can be controlled by the frequency which may be set arbitrary. 
     According to the photoelectric conversion apparatus of the present invention, by providing the means which, upon receipt of either the clock signal input into the driving signal generating means or the clock signal input into the scanning means and the input signal providing the correlation between the input signal and the other clock signal, generates the other clock signal, the photoelectric conversion operation of the photoelectric conversion sensor unit such as the storage operation and the resetting operation and the output operation to output the signal having received photoelectric conversion from the photoelectric conversion sensor unit can be controlled by the frequency which can be arbitrary set and also, based on either the clock signal input into the driving signal generating means or the clock signal input into the scanning means, the other clock signal having been input as above can be generated. 
     Hereunder is described in detail the Embodiment 5 of the present invention in reference to the drawings. 
     FIG. 11 is the schematic block diagrams of an Embodiment of the photoelectric conversion apparatus of the present invention and FIG. 12 is the timing chart to explain the performance of such photoelectric conversion apparatus. 
     As shown in FIG. 11, when trigger signal φTR and the basic operation clock signal φCLK are input, the clock number of the basic operation clock signal φCLK during the period when trigger signal φTR is at H level (in the case of the circuit of the present Embodiment, positive logic, wherein &#34;1&#34; is H level and &#34;0&#34; is L level (i.e., low level) is employed but it may be a negative logic) is counted by counter 5 and based on such data, the clock signal φCLK is generated. Basic operation clock signal φCLK is input into the driving signal generation circuit 1 and there the reset signal φA, φB and start signal φST of scanning circuit 2 are generated. Clock signal φCLK is input into the scanning circuit 2. 
     The frequency of the basic operation clock signal φCLK is set irrespective of the change of signal width T of the trigger signal φTR (width of the duration when trigger signal φTR is at H level) and as stated above, clock signal φCLK can be set arbitrarily by the control of signal width T of trigger signal φTR. As the result, the frequency of the scanning signal φSCAN to be generated based on the clock signal φCLK can be set independently from the frequency of the driving and resetting signals φBR, φVRS, φT which are generated based on the basic operation clock signal φCLK. 
     As explained in detail in the above, according to the photoelectric conversion device of the present Embodiment, the photoelectric conversion operation of the photoelectric conversion sensor unit, such as the storage operation and the resetting operation and the output operation to output the signal having received photoelectric conversion from the respective photoelectric conversion sensors of the photoelectric conversion sensor unit can be controlled independently by the frequency, which can be arbitrarily set.