Abstract:
An apparatus and method for igniting a lamp during a strike mode of an inverter comprising: sequentially controlling a duty cycle sweep and a frequency sweep of driving signals in the inverter to provide an increasing output voltage to the lamp. One embodiment advantageously includes a closed feedback loop to implement the duty cycle sweep and the frequency sweep such that an open lamp voltage is reliably regulated during the strike mode. For example, the closed feedback loop stops the duty cycle sweep or the frequency sweep when the output voltage to the lamp reaches a predetermined threshold and makes adjustments to the duty cycle or frequency the driving signals as needed to keep the output voltage at approximately the predetermined threshold if the lamp has not ignited.

Description:
CLAIM FOR PRIORITY 
       [0001]    This application claims the benefit of priority under 35 U.S.C. §119(e) of U.S. Provisional Application No. 60/806,714 filed on Jul. 6, 2006 and entitled “Striking and Open Lamp Regulation for CCFL Controller,” U.S. Provisional Application No. 60/849,211 filed on Oct. 4, 2006 and entitled “Compensation for Supply Voltage Variations in a PWM,” and U.S. Provisional Application No. 60/849,254 filed on Oct. 4, 2006 and entitled “PWM Duty Cycle Inverse Adjustment Circuit,” each of which is incorporated herein in its entirety by reference. 
     
    
     BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    This invention relates to inverter controllers for controlling power to fluorescent lamps and more particularly to an inverter controller with reliable lamp ignition and open lamp voltage regulation. 
         [0004]    2. Description of the Related Art 
         [0005]    Fluorescent lamps are used in a number of applications where light is required but the power required to generate the light is limited. One particular type of fluorescent lamp is a cold cathode fluorescent lamp (CCFL). CCFLs are used for back lighting or edge lighting of liquid crystal displays (LCDs), which are typically used in notebook computers, web browsers, automotive and industrial instrumentations, and entertainment systems. Such fluorescent lamps require a high starting voltage (on the order of 700-1,600 volts) for a short period of time to ionize the gas contained within the lamp tubes for ignition. After the gas in the CCFL is ionized and the CCFL is fired, less voltage is needed to keep the CCFL on. 
         [0006]    A CCFL tube typically contains a gas, such as Argon, Xenon, or the like, along with a small amount of Mercury. After an initial ignition stage and the formation of plasma, current flows through the tube, which results in the generation of ultraviolet light. The ultraviolet light in turn strikes a phosphorescent material coated in the inner wall of the tube, resulting in visible light. 
         [0007]    A power conversion circuit, known as an inverter, is generally used for driving the CCFL. The inverter accepts a direct current (DC) input voltage and provides an alternating current (AC) output voltage to the CCFL. The brightness (or the light intensity) of the CCFL is controlled by controlling the current (i.e., the lamp current) through the CCFL. For example, the lamp current can be amplitude modulated or pulse width modulated to control the brightness of the CCFL. 
         [0008]    One type of inverter includes a resonant circuit. The inverter includes switching transistors in a half bridge topology or a full bridge topology using power metal-oxide-semiconductor-field-effect-transistors (MOSFETs) to provide the DC to AC conversion. Maximum power is provided at the output of the inverter by switching the MOSFETs with driving signals at a resonant frequency. To control the output voltage as well as the current through the lamp, the inverter can change the frequency of the driving signals either towards the resonant frequency or away from the resonant frequency. 
       SUMMARY OF THE INVENTION 
       [0009]    One aspect of the present invention is an inverter with a closed feedback loop that sequentially controls a duty cycle sweep and a frequency sweep of at least one driving signal for igniting a lamp and regulating an open lamp voltage. In one embodiment, the closed feedback loop includes a detector circuit, a control voltage generator and two voltage converters. The detector circuit monitors an output voltage of the inverter and indicates when the output voltage of the inverter is greater than a predetermined threshold. The control voltage generator generates a control voltage signal that can vary from a first level to a second level at a predefined rate when the inverter enters a strike mode to ignite the lamp. The control voltage generator is coupled to an output of the detector circuit and the control voltage signal stops varying at the predefined rate when the output of the detector circuit indicates that the output voltage of the inverter is greater than the predetermined threshold. One voltage converter generates a first control output in response to a first range of values for the control voltage signal and another voltage converter generates a second control output in response to a second range of values in the control voltage signal. In one embodiment, the first range of values do not overlap with the second range of values for the control voltage signal so that the duty cycle sweep and the frequency sweep of the driving signal do not occur at the same time during an ignition attempt. In another embodiment, the duty cycle sweep and the frequency sweep partially overlap. The duty cycle sweep or the frequency sweep may be terminated to regulate the output voltage of the inverter at a desired open lamp voltage level. In addition, the strike mode ends when the lamp ignites (e.g., when the lamp conducts a current above a predetermined level) or when a time out condition occurs without ignition of the lamp. 
         [0010]    In one embodiment, a method of igniting a lamp (e.g., a fluorescent lamp) includes sequentially controlling a duty cycle sweep and a frequency sweep in a pulse width modulation (PWM) controller to provide an increasing output voltage to the lamp. For example, the method controls both parameters (duty cycle and frequency) in a novel manner for lamp ignition and open lamp voltage regulation. The method allows for seamless operation of ignition and open lamp voltage regulation schemes during a strike mode of the PWM controller. 
         [0011]    The method advantageously provides reliable lamp ignition and open lamp voltage regulation in applications that have variables (e.g., battery voltage, transformer parameters, lamp characteristics, printed circuit board parasitics, etc.) with wide operating ranges. In one embodiment, a lamp is coupled to a secondary winding of a transformer. The lamp strikes when a voltage across the secondary winding (e.g., secondary voltage or lamp voltage) is sufficiently high. In one embodiment, the secondary voltage is dependent on three parameters: duty cycle of signals (e.g., switching signals) coupled to a primary winding of the transformer, frequency of the switching signals, and battery voltage applied to the primary winding. 
         [0012]    The method also provides accurate (or improved) regulation of open lamp voltage (e.g., when lamp is missing during the strike mode). In one embodiment, the ignition scheme works in conjunction with the open lamp voltage regulation scheme. For example, if the lamp is not present or defective during the strike mode, the PWM controller regulates the secondary voltage to prevent damage to the secondary winding. The open lamp voltage regulation scheme advantageously controls (or limits) the secondary voltage to a window (or range) of secondary voltages that are sufficient to ignite a lamp without causing damage to the secondary winding. The open lamp voltage regulation scheme reduces overshoot in the secondary voltage and regulates the secondary voltage over a wide range of variables. For example, the open lamp peak voltage regulation is specified to be within five percent in one embodiment. 
         [0013]    In one embodiment, the invention is used in notebook or laptop computer backlighting applications in which duty cycle and frequency vary over a wide range for lamp ignition and open lamp voltage regulation. The invention also applies to television, automotive and other applications that use backlighting for visual displays. The invention advantageously controls both duty cycle and frequency in a stable closed feedback loop (e.g., with minimal overshoot in the secondary voltage). A combination of duty cycle control and frequency control provides flexibility to generate a secondary voltage sufficient to strike the lamp without exceeding a maximum rating of the secondary winding in applications with different lamps, transformers, printed circuit board layouts, battery voltages, etc. For example, the invention ensures that a striking frequency is not too low or too high, a duty cycle is not too low for relatively lower battery voltages or too high for relatively higher battery voltages, or open lamp voltage does not exceed secondary voltage ratings. 
         [0014]    In one embodiment, a cold cathode fluorescent lamp (CCFL) controller is interfaced to a primary winding of a transformer to control power to a CCFL coupled to a secondary winding of the transformer. The CCFL controller controls a set of switches (e.g., by alternately turning on and off semiconductor switches) to generate an alternating current (AC) signal in the primary winding with a frequency and duty cycle determined by the CCFL controller. In one embodiment, a transformer primary to secondary turns ratio is chosen to increase a voltage across the secondary winding. The secondary winding is part of a high Q, resonant circuit comprising the secondary winding&#39;s parasitic inductance along with resistors, capacitors, and other parasitics coupled to the secondary winding. 
         [0015]    The secondary peak voltage is a parameter of interest for lamp ignition and open lamp voltage regulation. The secondary voltage is relatively high (e.g., 1.5 Kilo-volts) to ignite the CCFL. The secondary voltage is dependent on applied battery voltage, duty cycle and frequency. Since the secondary winding is part of the high Q, resonant circuit (or secondary tank circuit) that has steep skirts, the secondary voltage may change rapidly in response to frequency or duty cycle changes near the resonant frequency. The resonant frequency may vary considerably due to different lamp characteristics and printed circuit board parasitics. 
         [0016]    In one embodiment, a square wave switching signal (or driving signal) is used to generate the AC signal in the primary winding. The square wave switching signal is comprised of odd harmonic frequencies with magnitude ratios determined by the square wave switching signal&#39;s duty cycle. Energy in each pulse of the square wave switching signal is distributed to the harmonic frequencies. A square wave switching signal with narrow pulses results in a secondary voltage with relatively narrow peaks of high voltage. A square wave switching signal with wider pulses results in a secondary voltage that has a wider, more sinusoidal shape with relatively lower peak amplitudes. There is a diminishing increase in the peak amplitudes of the secondary voltage as the duty cycle (or pulse width) of the square wave switching signal increases further. 
         [0017]    In one embodiment of the invention, a controller changes the duty cycle of a driving signal during a first stage of a strike mode and changes the frequency of the driving signal during a second stage of the strike mode to ignite a CCFL. The adjustment of the duty cycle (e.g., from a minimum to a maximum duty cycle) followed by adjustment of the frequency (e.g., from a lower frequency to a higher frequency), as needed, has many advantages. First, closed loop regulation (e.g., open lamp voltage regulation) is easier to control and compensate since the initial stage of changing (or sweeping) the duty cycle does not change the closed loop gain. Second, loop stability improves by maximizing the secondary voltage at the lower frequency which is achieved by sweeping the duty cycle to a maximum duty cycle before sweeping the frequency. As the frequency increases toward a resonant frequency, the closed loop gain changes rapidly. The closed loop gain does not change dramatically at lower frequencies away from the resonant frequency. Thus, maximizing the secondary voltage at a low frequency provides loop stability which leads to a more stable open lamp voltage regulation. Third, sweeping the duty cycle first is helpful in applications with relatively high battery voltages in which a relatively lower duty cycle is sufficient to strike the CCFL and a relatively high duty cycle may cause the secondary voltage to exceed a specification for a maximum open lamp voltage. Fourth, transformer saturation (in which the primary winding appears as a short circuit) can be avoided by sweeping the duty cycle from the minimum to the maximum duty cycle. This method of duty cycle sweeping allows the CCFL to safely ignite at a relatively lower duty cycle before reaching transformer saturation. Transformer saturation depends on a product of the battery voltage and the driving signal pulse width. 
         [0018]    In another embodiment of the invention, a controller changes the frequency of a driving signal during a first stage of a strike mode and changes the duty cycle of the driving signal during a second stage of the strike mode to ignite a CCFL. The sequence of sweeping the frequency first and then sweeping the duty cycle also has advantages. For example, a transformer is capable of more power transfer at relatively higher frequencies. In some applications using an under-designed transformer, the transformer may saturate when operating at a relatively low frequency and a high duty cycle. Thus, one striking sequence sweeps the driving signal from a relatively low frequency to a relatively high frequency at a relatively low duty cycle first and then, as needed, sweeps the driving signal from the relatively low duty cycle to a relatively high duty cycle at the relatively high frequency. Starting with a low, but fixed, duty cycle driving signal and sweeping the frequency of the driving signal first is a safer way to prevent transformer saturation since higher frequency operation reduces the danger of saturation, especially in applications without feed forward circuits that limit duty cycle as a function of the battery voltage. 
         [0019]    For the purpose of summarizing the invention, certain aspects, advantages and novel features of the invention have been described herein. It is to be understood that not necessarily all such advantages may be achieved in accordance with any particular embodiment of the invention. Thus, the invention may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught herein without necessarily achieving other advantages as may be taught or suggested herein. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0020]      FIG. 1  is a block diagram of an inverter for powering a fluorescent lamp according to one embodiment of the present invention. 
           [0021]      FIG. 2  is a circuit diagram of one embodiment of a voltage converter shown in  FIG. 1 . 
           [0022]      FIG. 3  illustrates various waveforms from a circuit simulation of the inverter. 
           [0023]      FIG. 4  illustrates various waveforms showing open lamp voltage regulation. 
           [0024]      FIG. 5  provides an expanded view of the waveforms shown in  FIG. 4 . 
       
    
    
     DETAILED DESCRIPTION 
       [0025]    Further descriptions of several embodiments of the invention will be described hereinafter with reference to the drawings.  FIG. 1  illustrates a circuit block diagram of one embodiment of an inverter for powering a lamp (e.g., a CCFL)  100 . The inverter comprises a closed feedback loop that seamlessly controls ignition of the lamp  100  and provides open lamp voltage regulation during a strike mode of the inverter. In one embodiment, the closed feedback loop comprises a voltage detector circuit  102 , a control voltage generator  104 , a first voltage converter  106 , and a second voltage converter  108 . 
         [0026]    For example, the voltage detector circuit  102  receives a first feedback signal (VSNS) indicative of an output voltage (or a voltage across the lamp  100 ) and generates an output indicating when the output voltage is greater than a predetermined voltage level corresponding to a first reference voltage (VREF 1 ). The control voltage generator  104  generates a control voltage (VC) that can vary at a first predefined rate (e.g., from a first level to a second level) until an output of the voltage detector circuit  102  indicates that the voltage across the lamp is greater than the predetermined voltage level (e.g., when VSNS is greater than VREF 1 ). The voltage detector circuit  102  stops the control voltage generator  104  from varying at the first predefined rate and adjusts the control voltage in response to the first feedback signal so as to regulate the output voltage of the inverter at approximately the predetermined voltage level. For example, the control voltage can be adjusted by being reduced at a second predefined rate when the first feedback signal exceeds the first reference voltage (e.g., a partial discharge of capacitor  120  through resistor  144 ). Thus, if the lamp  100  is not present during the strike mode, the output voltage is regulated at approximately the predetermined voltage level to prevent damage to inverter components (e.g., a high voltage transformer). 
         [0027]    The control voltage is provided to the first voltage converter  106  and the second voltage converter  108 . The first voltage converter  106  responds to a first range of the control voltage to generate a first control output that determines duty cycles of driving signals during the strike mode. The second voltage converter  108  responds to a second range of the control voltage to generate a second control output that determines frequency of the driving signals during the strike mode. For example, the first control output and the second control output are selectively provided to a PWM circuit  110  during the strike mode to generate a PWM signal for controlling power to the lamp  100 . In one embodiment, the PWM circuit  110  is implemented in a common controller integrated circuit  154  with the voltage detector circuit  102 , the control voltage generator  104 , the first voltage converter  106 , and the second voltage converter  108   
         [0028]    In one embodiment, the PWM signal is provided to a bridge driver  112  to generate a plurality of driving signals for controlling respective semiconductor switches in a switching network  114 . The switching network  114  couples a supply voltage (e.g., a substantially DC source voltage or VBAT) in alternating polarity across a primary winding of a transformer  116  to generate a substantially AC voltage across a secondary winding of the transformer  116 . The lamp  100  is coupled to the secondary winding of the transformer  116 . 
         [0029]    In the embodiment shown in  FIG. 1 , the switching network  114  is shown as a full-bridge switching networking comprising four transistors M 1 , M 2 , M 3 , M 5 . Other switching network topologies (e.g., half-bridge, push-pull, etc.) are also possible. In one embodiment, the secondary winding of the transformer  116  is coupled to the lamp  100  through a resonant inductor  150  and a DC blocking capacitor  152 . The resonant inductor  150  can be a leakage inductance associated with the secondary winding and not a separate component. The resonant inductor  150  is part of a secondary resonant circuit that also comprises resistors, capacitors, and other parasitics (not shown) coupled to the secondary winding to establish a resonant frequency. 
         [0030]    In one application, the control voltage (VC) has an initial state of zero volts at the beginning of a strike mode and increases at a predefined rate to a preset value (e.g., VDD or a supply voltage). The control voltage can be generated by many methods using different circuit topologies, and  FIG. 1  shows one method of generating the control voltage. For example, a peak detector transistor (or NMOS transistor M 0 )  118  is initially off and a capacitor (C 0 )  120  is charged through a pull-up resistor  122  to produce the control voltage across the capacitor  120  at an exponential RC rate of change. 
         [0031]    The control voltage is provided to input terminals (or input ports) of the first and second voltage converters  106 ,  108 . In one embodiment, the voltage converters  106 ,  108  have limited and non-overlapping input ranges. For example, the first voltage converter (or voltage converter # 1 )  106  has a first limited input range (e.g., from 0-1 volt) while the second voltage converter (or voltage converter # 2 )  108  has a second limited input range (e.g., from 1-2 volts). The output of each voltage converter changes when the control voltage is within the respective limited input range. 
         [0032]      FIG. 2  is a schematic diagram of one embodiment of a voltage converter. A reference voltage is generated across a first resistor (R 1 )  200 . For example, the reference voltage is approximately 0.5 volt for the first voltage converter  106 . The value of this reference voltage and a second resistor (R 2 )  202  can be chosen to determine (or limit) the input range of the voltage converter. The control voltage (VC) from  FIG. 1  is provided to an input port (VIN). The reference voltage and the control voltage are level shifted by respective PMOS source followers (M 6  and M 7 )  215 ,  212 . A differential voltage (VDIFF) between an input voltage at the input port (VIN) and the reference voltage is seen across the second resistor (R 2 )  202 . A current conducted by the second resistor (R 2 )  202  is added to or subtracted from a current conducted by a transistor M 2   204 . The transistor M 2   204  conducts a current reference derived from a bandgap circuit comprising transistor M 4   214 . A sum of the current reference and the current conducted by the second resistor (R 2 )  202  is mirrored by a current-mirror circuit  208  comprising transistors M 9 , M 8 , M 5  and M 0  to produce an output voltage (VOUT) across an output resistor (R 0 )  206 . The current mirror gain and the output resistor (R 0 )  206  can be used to scale and offset the differential voltage between the input voltage and the reference voltage across the first resistor  200 . Specific details for the output portion of the voltage converter are dependent on circuits that will be coupled to the output voltage. 
         [0033]    In the embodiment shown in  FIG. 1 , the outputs from the first voltage converter  106  and the second voltage converter  108  are selectively provided to first and second input terminals of the PWM circuit  110  during the strike mode. In one embodiment, the PWM circuit  110  comprises an oscillator  124 , a PWM comparator  126  and an optional feed-forward circuit  128 . The optional feed-forward circuit  128 , if present, is coupled between the first input terminal of the PWM circuit  110  and a first input terminal of the PWM comparator  126 . The voltage at the first input terminal of the PWM circuit  110  determines the pulse width (or duty cycle) of a PWM signal at an output terminal of the PWM comparator  126 , which is also the output terminal of the PWM circuit  110 . The oscillator  124  generates a sawtooth waveform for a second input terminal of the PWM comparator  126 . The frequency of the sawtooth waveform is determined by the voltage at the second input terminal of the PWM circuit  110 . 
         [0034]    During steady state operations (or run mode), a substantially fixed reference voltage (VREF 3 ) is selectively provided to the second input terminal of the PWM circuit  110  to establish a substantially constant operating frequency for the inverter. During the run mode, the first input terminal of the PWM circuit  110  is selectively coupled to a current feedback loop comprising an error amplifier  130 . For example, the current feedback loop senses current conducted by the lamp  100  and generates a current feedback signal (ISNS) indicative of the lamp current level. In one embodiment, the current feedback signal is a voltage generated across a sensing resistor  132  coupled in series with the lamp  100 . A capacitor  134  is optionally coupled in parallel with the sensing resistor  132  for filtering. The current feedback signal is provided to a full wave rectifier  136  to generate a substantially DC signal for a first input terminal of the error amplifier  130 . A voltage (VREF 2 ) indicative of desired lamp current amplitude is provided to a second input terminal of the error amplifier  130 . In one embodiment, the error amplifier  130  is a transconductance amplifier and a capacitor (C 1 )  138  is coupled to an output terminal of the error amplifier  130  to generate an error voltage for the first input terminal of the PWM circuit  110  during the run mode. The error voltage is used to adjust the pulse width (or duty cycle) of the PWM signal at the output of the PWM circuit  110  to achieve the desired lamp current amplitude during the run mode. 
         [0035]    In one embodiment, the first voltage converter  106  is configured to transfer a 0-1 volt input voltage into an output voltage that is within a trough and peak of the sawtooth waveform generated by the oscillator  124 . For example, the sawtooth waveform may have a peak-to-peak voltage of 3 volts with a 1 volt trough (or offset) voltage. The output voltage of the first voltage converter  106  is provided as a reference voltage to the first input terminal of the PWM comparator  126 . As the reference voltage at the first input terminal of the PWM comparator  126  changes, the duty cycle of the signal at the output terminal of the PWM comparator  126  changes (e.g., sweeps or changes without significant discontinuity). In the embodiment shown in  FIG. 1 , an optional feed-forward circuit  128  is shown between the output of the first voltage converter  106  and the first input terminal of PWM comparator  126 . The optional feed-forward circuit  128  may make additional adjustments to the duty cycle of the signal at the output terminal of the PWM comparator  126  in response to supply voltage variations, as described further below. 
         [0036]    In one embodiment, the second voltage converter  108  is configured to transfer a 1-2 volts input voltage from the control voltage (VC) into an output voltage that is used to sweep the frequency of the oscillator  124  from a starting frequency (e.g., a normal lamp running frequency) to several times (e.g., two times) the starting frequency. Other frequency sweeping ranges are also possible. Since the control voltage ramps starting from zero volt and the input range of the first voltage converter  106  is less than the input range of the second voltage converter  108 , the output voltage of the first voltage converter  106  will vary (or sweep) before the output voltage of the second voltage converter  108 . 
         [0037]    In the embodiment described above, the input ranges for the voltage converters  106 ,  108  are chosen such that the output of the PWM comparator  126  sweeps in duty cycle first at a starting frequency and then sweeps in frequency at a predetermined (or maximum) duty cycle. Preferably, the duty cycle and the frequency sweep independently and do not interact simultaneously. In one embodiment, the predetermined duty cycle is limited by a feed-forward circuit that correlates duty cycle with applied battery voltage. For example, the feed-forward circuit adjusts the duty cycle to compensate for variations in the applied battery voltage. Details of some feed-forward circuits are disclosed in co-owned U.S. Provisional Application No. 60/849,211, filed on Oct. 4, 2006 and entitled “Compensation for Supply Voltage Variations in a PWM,” and U.S. Provisional Application No. 60/849,254, filed on Oct. 4, 2006 and entitled “PWM Duty Cycle Inverse Adjustment Circuit,” the disclosure of which is hereby incorporated by reference herein in its entirety. 
         [0038]    In other embodiments, the input ranges of the voltage converters  106 ,  108  are chosen (or limited) such that the frequency sweep occurs before the duty cycle sweep. For example, the input voltage ranges for the voltage converters  106 ,  108  can be altered as described above with reference to  FIG. 2  and the input voltage ranges discussed above can be reversed between the voltage converters  106 ,  108  such that the frequency sweep occurs first. The frequency sweep is more effective in striking the lamp  100  with relatively low battery voltages (e.g., about 7 volts) while the duty cycle sweep is more effective at striking the lamp  100  with relatively high battery voltages (e.g., about 20 volts). In yet another embodiment, the input voltage ranges of the voltage converters  106 ,  108  overlap to provide an overlap between the duty cycle sweep and the frequency sweep. 
         [0039]      FIG. 3  illustrates a simulation showing a control voltage  300 , a secondary or lamp voltage  302  and a switching signal  304  with respect to time in an application with a  10  volts battery voltage. For example, as the control voltage  300  is ramping from approximately zero volt to approximately two volts, the duty cycles of the lamp voltage  302  and the switching signal  304  sweep first and then their frequencies sweep at a maximum duty cycle. The change from duty cycle sweep to frequency sweep is marked with a lined denoted “A.” In a normal application, the control voltage  300  stops ramping and the sweeping stops when the lamp voltage  302  is sufficiently high to strike a lamp or exceeds a predetermined open lamp voltage corresponding to VREF 1  in  FIG. 1 . In the simulation shown in  FIG. 3 , the control voltage is allowed to continue ramping to show how continued sweeping affects the lamp voltage  302 . For example, the lamp voltage  302  increases with time initially due to increasing duty cycle of the switching signal  304  until a time marked by line A. Thereafter, the lamp voltage  302  continues to increase with time due to increasing frequency of the switching signal  304  until the frequency exceeds a resonant frequency associated with a secondary resonant tank circuit. The lamp voltage  302  begins to decrease when the frequency increases beyond the resonant frequency because the voltage gain of the secondary resonant tank circuit decreases as the frequency moves away from the resonant frequency. 
         [0040]    Referring to  FIG. 1 , one embodiment of the voltage detector circuit  102  used to regulate open lamp voltage during the strike mode comprises a full wave rectifier  140 , a comparator  142 , the transistor MO (e.g., NMOS)  118  and a resistor R 0   144 . A capacitor divider circuit comprising a capacitor C 6   146  and a capacitor C 11   148  is used to monitor a transformer secondary voltage and to generate a sensed voltage (e.g., the first feedback signal or VSNS) that is provided to an input terminal of the full wave rectifier  140 . The comparator  142  compares an output of the full wave rectifier  140  with a reference VREF 1 . If the output of the full wave rectifier  140  (e.g., output peak voltage) exceeds the reference VREF 1  (such as during an open lamp condition), the comparator will turn on the transistor M 0   118  to adjust the control voltage such that the transformer secondary voltage is maintained (or regulated) at a predetermined open lamp voltage level (or amplitude). Thus, a combination of the transistor M 0   118 , the capacitor C 0   120 , the resistor R 0   144  and the pull-up resistor  122  forms a peak detector circuit. In one embodiment, a ratio between the resistor R 0   144  and the pull-up resistor  122  is chosen such that the capacitor C 0   120  has a faster discharging rate and a slower charging rate. 
         [0041]    A closed feedback loop is formed since an output of the voltage detector circuit  102  is coupled to the control voltage that regulates ignition. The closed feedback loop regulates the transformer secondary voltage by adjusting the control voltage until the output of the full wave rectifier  140  is approximately equal to the reference voltage VREF 1 .  FIG. 4  illustrates one example of the transformer secondary voltage (or open lamp voltage, e.g., voltage across the secondary winding of the transformer  116 ) as a function of time shown as waveform  502  in relationship to the control voltage as a function of time shown as waveform  504  and one of the driving signals applied to a semiconductor switch in the switching network  114  as a function of time shown as waveform  500 .  FIG. 5  illustrates in more detail a portion of  FIG. 4  that confirms excellent regulation of the open lamp voltage. For example, at approximately time T 1 , the transformer secondary voltage reaches a predetermined level and the control voltage levels off (or stops increasing) to maintain the transformer secondary voltage at approximately the predetermined level. 
         [0042]    In one embodiment, two single-pole-double-throw (SPDT) switches are used to toggle (or select) between strike and run modes in  FIG. 1 . For example, ignition of the lamp  100  can be detected to toggle from the strike mode to the run mode. In one embodiment, ignition is determined by monitoring when the current feedback signal (ISNS) exceeds a threshold. In the embodiment shown in  FIG. 1 , the output of the full wave rectifier  136  can be compared to the threshold voltage VREF 2  or a separate voltage reference to determine ignition of the lamp  100 . When the lamp  100  is considered lit, the SPDT switches toggle and latch to run mode positions. In the run mode positions, the oscillator  124  is coupled to a reference voltage VREF 3  that sets the oscillator&#39;s frequency to a run mode frequency (e.g., the starting or the lowest strike mode frequency). An input of an optional feed forward circuit  128  is coupled to the output of the error amplifier  130  that regulates the lamp current amplitude once the lamp  100  is lit. 
         [0043]    While certain embodiments of the invention have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.