Abstract:
A monitor system and method are described for sensing voltage changes in a plurality of transistors of a multiphase circuit comprising a sensor connected to each one of the plurality of transistors for measuring a voltage drop across the each one, a difference detector for comparing the voltage drop to a previous voltage drop attributable to the each one of the plurality of transistors, and a driver circuit for controlling a state of the plurality of transistors, wherein the driver circuit deactivates one or more of the plurality of transistors when the voltage drop varies from the previous voltage drop by a predefined amount.

Description:
BACKGROUND 
   Source converters generally provide power to a load in one form after having converted that power from a different form. For example, an alternating current (AC) to direct current (DC) source converter will take input from an AC source and convert that input into a DC source. Additionally, voltage regulators may take input from a source with a certain voltage level (e.g., 5 Volts) and convert that input into another voltage level (e.g., 3.5 Volts) that is compatible with the load specifications. 
   These types of circuits are generally coupled to the load through some sort of isolation electronics or circuit, such as a transistor. This isolation helps reduce the chance that the incorrect form of the input would be applied to the load, if the conversion circuit were to ever fail. However, in some conversion architectures even the typical isolation means may not work properly depending on what part of the conversion circuit may fail. 
   SUMMARY 
   Representative embodiments of the present invention are related to a monitor for sensing voltage changes in a plurality of transistors of a multiphase circuit comprising a sensor connected to each one of the plurality of transistors for measuring a voltage drop across the each one, a difference detector for comparing the voltage drop to a previous voltage drop attributable to the each one of the plurality of transistors, and a driver circuit for controlling a state of the plurality of transistors, wherein the driver circuit deactivates one or more of the plurality of transistors when the voltage drop varies from the previous voltage drop by a predefined amount. 
   Additional representative embodiments of the present invention are related to a method for monitoring performance of a plurality of transistors in a multiphase circuit comprising measuring a voltage across the plurality of transistors, comparing the measured voltage against a prior measurement of the voltage, and deactivating one or more of the plurality of transistors when the measured voltage exceeds the prior measurement by a predetermined amount. 
   Further representative embodiments of the present invention are related to a system for preventing catastrophic failure in a multiphase circuit comprising a sensor for determining a series resistance of a plurality of transistors, a resistance monitor for comparing the series resistance to a threshold resistance value, and a switch for deactivating ones of the plurality of transistors when the series resistance exceeds the threshold resistance value. 
   Further representative embodiments of the present invention are related to a system for monitoring a status of a plurality of transistors in a multiphase circuit comprising means for evaluating a voltage drop across the plurality of transistors, means for comparing the measured voltage drop against a previously evaluated voltage drop, and means for turning off one or more of the plurality of transistors when the measured voltage drop varies from the previously evaluated voltage drop by predefined value. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     For a more complete understanding of the present invention, reference is now made to the following descriptions taken in conjunction with the accompanying drawing, in which: 
       FIG. 1  is a block diagram illustrating a single phase section of a multiphase voltage regulator module (VRM) configured according to an embodiment of the transistor monitor described herein; 
       FIG. 2  is a circuit schematic illustrating one embodiment of the transistor monitor described herein; and 
       FIG. 3  is a block diagram illustrating a multiphase VRM configured according to an embodiment of the transistor monitor described herein. 
   

   DETAILED DESCRIPTION 
     FIG. 1  is a block diagram illustrating single phase section  10  of a multiphase voltage regulator module (VRM) configured according to an embodiment of the transistor monitor described herein. Single phase section  10  is made up of input capacitor, C 1 , MOSFETs, M 1  and M 2 , inductor, L 2 , and output capacitor, C 2 . M 1  is driven by gate driver  100 , and M 2  is driven by gate driver  101 . Single phase section  10  is shown in  FIG. 1  providing power to load microprocessor  106 . In operation, when M 1  is on, M 2  is off. The current passing through M 1  from the input charges L 2 , which provides the output load current. As M 1  turns off, M 2  turns on providing a current path for L 2 . The energy stored in L 2  from the M 1  charging period now supplies the output load current. 
   As a MOSFET begins to fail over time, changes in the thermal resistance of the die attach or ion contamination may cause a degradation in performance and increase the series resistance between the drain and the source nodes (r DS ). The increase in r DS  will usually increase the power dissipation of the MOSFET, which typically causes a further increase in the junction temperature. Once the junction temperature reaches a certain level, catastrophic failure generally occurs in the MOSFET. Single phase section  10  includes current sensors  102  and  103  across M 1  and M 2 . By monitoring the current flowing through M 1  and M 2 , changes in r Ds  of that device may be quickly discovered. Detected changes in r Ds  allow the system to shut down M 1  and M 2  before catastrophic failure. 
   In operation, the peak currents that flow in M 1  and M 2  are normally equal during the switching period due to the inductive load of L 2 . Therefore, current sensors  102  and  103  monitor the voltage drops across M 1  and M 2 . Current sensors  102  and  103  may be configured as a sample and hold circuit which would be used to continuously compare the measured voltage drops in difference detector  104 . Transient signals from load microprocessor  106  may interfere with the comparison by difference detector  104 . Therefore, delay module  105  allows for the transients from load microprocessor  106  to reduce or eliminate the effect on the comparison. If difference detector  104  detects an unacceptable deviation between the monitored voltage drops, M 1  and/or M 2  will be disabled and latched off by various means such as deactivating gate drivers  100  and  101 . Because single phase section  10  is part of a multiphase converter, the remaining phases would continue to properly operate even with single phase section  10  latched off. 
   It should be noted that in additional embodiments of the transistor monitor described herein, latch  107  may be added to ensure that either of transistors M 1  and M 2  do not unintentionally reactivate after being deactivated. 
     FIG. 2  is a circuit schematic illustrating one embodiment of the transistor monitor described herein. A sensor for detecting current changes or the voltage drop across M 1  is implemented using a small signal MOSFET, M sense1 , capacitor, C 3 , and differential amplifier, E 1 . When M 1  is on, M sense1  is also on. The current running through M sense1  charges C 3  which causes E 1  to develop a differential voltage. The differential voltage at E 1  provides a level shifting voltage with respect to ground, which is communicated to current sense  102 . When implemented as a store and hold circuit, current sense  102  passes the current differential voltage from E 1  with the previously measured differential voltage to difference detector  104  ( FIG. 1 ). Difference detector  104  then determines whether a significant change in the voltage has occurred. If so, difference detector  104  triggers gate drives  100  and  101  to disable M 1  and M 2  to prevent catastrophic failure. 
   In similar operation, the voltage drop across M 2  is monitored through M sense2 . When M 2  is on, M sense2  is also on. The current flowing through M sense2  charges C 1  which communicates its voltage level to current sense  103 . As a sample and hold circuit, current sense  103  sends the current measurement as well as the held measurement to difference detector  104  to determine whether a significant change has occurred in the voltage drop across M 2 . If such a difference is detected, M 1  and M 2  are shut down by gate drives  100  and  101 . Therefore, by sensing the changes in the voltage drop and corresponding current flow through M 1  and M 2 , changes that may indicate an imminent failure are detected with the ability to shut down M 1  and M 2  before failure. 
     FIG. 3  is a block diagram illustrating multiphase VRM  30  configured according to an embodiment of the transistor monitor described herein. Multiphase VRM  30  presents four single-phase sections, including single phase section  10 , and single phase sections  31 – 33 . Multiphase VRM  30  powers load microprocessor  106 . Multiphase VRM  30  incorporates MOSFETs, M 1 –M 8 , inductors, L 2 –L 5 , and input and output capacitors, C 1  and C 2 . The transistor monitor portions of multiphase VRM  30  include current sensors  102 ,  103 ,  102 A–C, and  103 A–C, difference detectors  104  and  104 A–C, and delays  105  and  105 A–C. Current sensors  102  and  103  measure the voltage drop/current across M 1  and M 2 , as described with respect to  FIG. 1 . The sensed voltage drop is then communicated to difference detector  104  to determine whether either of M 1  or M 2  are close to failure. Similarly, the voltage drops across each of M 3 –M 8  are measured by current sensors  102 A–C and  103 A–C, respectively. These sensed voltages are sent to different detectors  104 A–C to determine whether any of M 3 –M 8  are close to failure. Depending on the results of these determinations, signals are sent to gate driver circuits  300 – 303 , which are a collection of gate drivers for supplying the requisite power at gates D 1 –D 8 . If a possible failure is detected in any one or more of M 1 –M 8 , a signal is directed to the corresponding ones of gate drivers  300 – 303  to turn off any of the pairs of transistors, M 1 –M 2 , M 3 –M 4 , M 5 –M 6 , and M 7 –M 8  that include the transistors which are close to failure, thus preventing catastrophic failure of the entire multiphase VRM  30 .