Abstract:
A fan test device to connect a motherboard and a fan includes a control chip, a first connector, a second connector, a first switch chip, a second switch chip, a first electronic switch, and a second electronic switch. The control chip is connected to sensing pins of the first and second connectors. The first electronic switch is connected between a power terminal and a power pin of the first connector. The second electronic switch is connected between the power terminal and a power pin of the second connector. The control chip outputs different signals corresponding to the connection of the first and second connectors to control the first and second switch chips.

Description:
FIELD 
       [0001]    The present disclosure relates to a fan test device. 
       BACKGROUND 
       [0002]    Typically, a fan test device has a first connector to connect to a motherboard and a second connector to connect a fan. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWING 
         [0003]    Many aspects of the present disclosure can be better understood with reference to the following drawing. The components in the drawing are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawing, like reference numerals designate corresponding parts throughout the several views. 
           [0004]    The FIGURE is a circuit diagram of an embodiment of a fan test device of the present disclosure. 
       
    
    
     DETAILED DESCRIPTION 
       [0005]    It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale and the proportions of certain parts have been exaggerated to better illustrate details and features of the present disclosure. 
         [0006]    The term “coupled” is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections. The connection can be such that the objects are permanently connected or releasably connected. The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series and the like. 
         [0007]    The FIGURE illustrates an embodiment of a fan test device  10  of the present disclosure. 
         [0008]    The fan test device  10  can comprise a first connector J 1 , a second connector J 2 , a control chip U, a switch chip U 1 , a switch chip U 2 , a first resistor R 1 , a second resistor R 2 , a third resistor R 3 , a first diode D 1 , a second diode D 2 , a light-emitting diode (LED) D 3 , a first fuse FS 1 , a second fuse FS 2 , a first electronic switch Q 1 , and a second electronic switch Q 2 . 
         [0009]    A first terminal of the first electronic switch Q 1  is connected to a control terminal C 1  of the control chip U. A power pin  1  of the first connector J 1  is connected to the second terminal of the first electronic switch Q 1 . A third terminal of the electronic switch Q 1  is connected to a first power terminal P 12 V_FB. The third terminal of the electronic switch Q 1  is also connected to a cathode of the first diode D 1 . An anode of the first diode D 1  is coupled to the power pin  1  of the first connector J 1  through the first fuse FS 1 . A signal pin  2  of the first connector J 1  is coupled to a signal pin A 1  of the first switch chip U 1 . A sense pin  3  of the first connector J 1  is connected to an input pin I 1  of the control chip U. A ground pin  4  of the first connector J 1  is grounded. 
         [0010]    A first terminal of the second electronic switch Q 2  is connected to a control pin C 2  of the control chip U. A power pin  1  of the second connector J 2  is connected to a second terminal of the second electronic switch Q 2 . A third terminal of the second electronic switch Q 2  is connected to the first power terminal P 12 V_FB. The third terminal of the second electronic switch Q 2  is also connected to a cathode of the second diode D 2 . An anode of the second diode D 2  is coupled to the power pin  1  of the second connector J 2  through the second fuse FS 2 . A signal pin  2  of the second connector J 2  is coupled to a signal pin A 2  of the second switch chip U 2  through the second resistor R 2 . A sense pin  3  of the second connector J 2  is connected to an input pin I 2  of the control chip U. A ground pin  4  of the second connector J 2  is grounded. 
         [0011]    A power pin VCC of the first switch chip U 1  is connected to a second power terminal P 5 V. A signal pin S 1 , a signal pin B 1 , and a signal pin B 2  of the first switch chip U 1  are connected to an output pin O 1 , a speed pin TACH 1 , and an alarm pin Alarm 1  of the control chip U respectively. A ground pin OE and a ground pin GND of the first switch U 1  are grounded. 
         [0012]    A power pin VCC of the second switch chip U 1  is connected to the second power terminal P 5 V. A signal pin S 2 , a signal pin B 3 , and a signal pin B 4  are connected to an output pin O 2 , a speed pin TACH 2 , and an alarm pin Alarm 2  of the control chip U respectively. A ground pin OE and a ground pin GND of the second switch U 2  are grounded. 
         [0013]    When the first connector is connected to the motherboard and the second connector is connected to the fan, the motherboard outputs a first signal to the input pin I 1  of the control chip U through the sense pin  3  of the first connector J 1 . The control chip U outputs a low level signal, such as logic 0, to the first terminal of the first electronic switch Q 1  through the control pin C 1 . The first electronic switch Q 1  is turned off The motherboard outputs a first voltage to the first power terminal P 12 V_FB through the first fuse FS 1  and the first diode D 1  in that order. The fan outputs a second signal to the input pin I 2  of the control chip U through the sense pin  3  of the second connector J 2 . The control chip outputs a high level signal, such as logic 1, to the first terminal of the second electronic switch Q 2  through the control pin C 2 . The second electronic switch is turned on. The first power terminal P 12 V_FB supplies power for the fan that is connected to the second connector J 2 . The control chip U outputs a first control signal to a signal pin S 1  of the first switch chip U 1  through the output pin O 1  to couple the signal pin A 1  of the first switch chip U 1  and the signal pin B 2  of the first switch chip U 1 . The control chip U outputs a second control signal to a signal pin S 2  of the second switch chip U 2  through the output pin O 2  to connect the signal pin A 2  and the signal pin B 3 . The control chip U receives a speed signal of the fan through the speed pin TACH 2 . When the control chip U determines the speed of the fan is abnormal, the control chip U outputs an alarm signal to the motherboard through the alarm pin Alarm 1 , the signal pin B 2  of the first switch chip U 1 , the signal pin A 1  of the first switch chip U 1 , and the signal pin  2  of the first connector J 1  in that order. The fuse FS 1  can protect the circuit. 
         [0014]    When the first connector J 1  is connected to the fan and the second connector J 2  is connected to the motherboard, the motherboard outputs the first signal to the input pin I 2  of the control chip U through the sense pin  3  of the second connector J 2 . The control chip U outputs a low level signal to the first terminal of the second electronic switch Q 2  through the control pin C 2 . The second electronic switch Q 2  is turned off. The motherboard outputs the first voltage to the first power terminal P 12 V_FB through the second fuse FS 2 , and the second diode D 2  in that order. The fan outputs the second signal to the input pin I 1  of the control chip U through the sense pin  3  of the first connector J 1 . The control chip U outputs a high level signal to the first terminal of the first electronic switch Q 1  through the control pin C 1 . The first power terminal P 12 V_FB supplies power for the fan through the first connector J 1 . The control chip U outputs the second control signal to the signal pin S 1  of the first switch chip U 1  connecting the signal pin A 1  of the first switch chip U 1  and the signal pin B 1  of the first switch chip U 1 . The control chip U outputs the first control signal to the signal pin S 2  of the second switch chip U 2  connecting the signal pin A 2  of the second switch chip U 2  and the signal pin B 4  of the second switch chip U 2 . The control chip U receives a speed signal of the fan through the speed pin TACH 1 . When the control chip U determines the speed of the fan is abnormal, the control chip U outputs an alarm signal to the motherboard through the alarm pin Alarm 2 , the signal pin B 4  of the second switch chip U 2 , the signal pin A 2  of the second switch chip U 2 , and the signal pin  2  of the second connector J 2  in that order. The fuse FS 2  can protect the circuit. 
         [0015]    The fan test device  10  further comprises an alarm module  20  connected to the control chip U. The alarm module  20  can comprise the third resistor R 3  and the LED D 3 . An anode of the LED D 3  is connected to the second power terminal PSV. A cathode of the LED D 3  is coupled to the output pin O 3  of the control chip U through the third resistor R 3 . When the control chip U determines the speed of the fan is abnormal, the control chip U outputs a low level signal through the output pin O 3 . The LED is lit up to warn a user that the speed of the fan is abnormal. 
         [0016]    In the embodiment, the first electronic switch Q 1  and the second electronic switch Q 2  are n-channel field effect transistors. 
         [0017]    The fan test device operates normally either when the first connector J 1  is connected to the motherboard and the second connector J 2  is connected to the fan or when the first connector J 1  is connected to the fan and the second connector J 2  is connected to the motherboard. 
         [0018]    While the disclosure has been described by way of example and in terms of preferred embodiment, it is to be understood that the disclosure is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the range of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.