Abstract:
A pixel circuit, a display device, and a drive method therefor. The pixel circuit comprises: a first power source (ELVDD), a second power source (ELVSS), an organic light-emitting diode (OLED), a first capacitor (C 1 ), a first transistor (T 1 ), a second transistor (T 2 ), and a third transistor (T 3 ), wherein the first transistor (T 1 ) is configured to compensate a threshold voltage of the third transistor (T 3 ). According to the drive method, the pixel circuit is driven to emit light by sequentially applying scanning signals to the pixel circuit on scanning lines (Sn 1,  Sn 2,  Sn 3 ). The pixel circuit and the method for driving the pixel circuit can improve the response characteristics of active matrix organic light-emitting diodes, thereby enabling the display device to display images having uniform image quality.

Description:
TECHNICAL FIELD 
       [0001]    The present invention relates to a pixel circuit, a display device and a method for driving the pixel circuit, and more particularly relates to a pixel circuit of an organic light-emitting diode capable of compensating a threshold voltage of a driving transistor, a display device and a method for driving the pixel circuit. 
       BACKGROUND 
       [0002]    In recent years, various types of flat panel display devices, which have light weight and small size compared with cathode ray tube (CRT) displays, have been developed. Among the various types of flat panel display devices, by using a self-light-emitting organic light-emitting diode (OELD) to display images, an active matrix organic light-emitting display device with a thin-film transistor (TFT) backplane usually has the characteristics of short response time, low power consumption for driving, and better brightness and color purity. Therefore, the organic light-emitting display device has become a focus of the next-generation display devices. 
         [0003]      FIG. 1  schematically shows a circuit diagram of a traditional active matrix organic light-emitting display device  100 , wherein the active matrix organic light-emitting display device  100  comprises a data driver and a scanning driver (not shown in  FIG. 1 ). The data driver is configured to control a plurality of data lines DA 1  . . . DAm in transversal arrangement, and the scanning driver is configured to control a plurality of scanning lines SC 1  . . . SCn in longitudinal arrangement. A plurality of pixel circuits  110  are formed in intersection areas between the plurality of data lines DA 1  . . . DAm and the plurality of scanning lines SC 1  . . . SCn. 
         [0004]    With reference to  FIG. 1 , the pixel circuit  110  comprises an organic light-emitting diode (OLED) 1 , a storage capacitor C 11 , a switching transistor T 11 , a driving transistor T 12 , a first power source ELVDD 1 , and a second power source ELVSS 1 , wherein both the transistors T 11  and T 12  are P-channel metal-oxide semiconductor transistors (PMOS). A grid of the switching transistor of the switching transistor T 11  is coupled to one scanning line SC 1 , a source of the switching transistor T 11  is coupled to one data line DA 1 , and a drain of the switching transistor T 11  is coupled to a grid of the second transistor T 12 . A source of the driving transistor T 12  is coupled to the high-voltage power source ELVDD 1 , and a drain of the driving transistor T 12  is coupled to an anode of the OLED 1 . A cathode of the OLED 1  is coupled to the low-voltage power source ELVSS 1 . A first terminal of the storage capacitor C 11  is coupled to the first power source ELVDD 1 , and a second terminal of the storage capacitor C 11  is coupled to the grid of the second transistor. 
         [0005]    The scanning driver applies scanning signals to the scanning lines SC 1  to SCn in sequence, and the data driver applies corresponding data signals via the data lines DA 1  to DAm according to image data to be displayed. Thus, the pixel circuits  110  located in the intersection areas supply a driving current flowing through the organic light-emitting diode according to the signals of the scanning lines and data lines coupled to the pixel circuits. 
         [0006]    Using the pixel circuit  110  shown in  FIG. 1  as an example, when the scanning drive applies the scanning signals to the scanning line SC 1 , the switching transistor T 11  is conducted, and at this point, a voltage of the data signals on the data line DA 1  is stored in the storage capacitor C 11  through the switching transistor T 11 . The driving transistor T 12  supplies a driving current I OLED1  according to the voltage stored in the storage capacitor C 11  to drive the organic light-emitting diode OLED 1  to emit the light of the corresponding brightness. A formula for the driving current is shown as below: 
         [0000]        I   OLED1 = 1/12 μ 12   ×C   ox12   ×W   12   /L   12  ( V   GS12   −V   TH12 ) 2    (Formula 1),
 
         [0000]    wherein μ 12  is a carrier mobility of the driving transistor T 12 , C ox12  is a capacitance of a control end oxidation layer per unit area of the driving transistor T 12 , W 12  is a channel width of the driving transistor T 12 , L 12  is a channel length of the driving transistor T 12 , V GS12  is a voltage difference between the grid and the source of the driving transistor T 12 , and V TH12  is a threshold voltage of the driving transistor T 12 . That is, the driving current flowing through the organic light-emitting diode OLED 1  can be controlled according to the magnitude of a data voltage from the data line DA 1  to display a predefined grayscale. 
         [0007]    A large active matrix organic light-emitting display device comprises a number of pixel circuits, and each of which need to comprise a driving transistor. The electric difference among different driving transistors results in different threshold voltages on the driving transistors. Therefore, according to the formula 1, it can be known that when the data voltages supplied to the pixel circuits  110  are the same, the driving currents supplied to the organic light-emitting diodes may vary with different threshold voltages of the driving transistors. This will result in the problems of poor quality uniformity and poor consistency of an image displayed by a plurality of pixel circuits. 
       SUMMARY 
       [0008]    In view of this, a main objective of the present invention is to provide a novel pixel circuit structure capable of compensating a difference in a threshold voltage of the driving transistor. The present invention provides a pixel circuit capable of producing a desired brightness and an active matrix organic light-emitting display device employing the pixel circuit, wherein the pixel circuit is capable of improving the response characteristic of the active matrix organic light-emitting diode to display the image with uniform image quality. 
         [0009]    To achieve the above objective, technical solutions of the present invention are implemented as follows: 
         [0010]    The present invention provides a pixel circuit, comprising: a first power source, a second power source, an organic light-emitting diode, a first capacitor, a first transistor, a second transistor, and a third transistor; wherein 
         [0011]    a cathode of the organic light-emitting diode is coupled to the second power source; 
         [0012]    the first capacitor is coupled between a node and the second power source; 
         [0013]    each of the first transistor, the second transistor, and the third transistor is provided with a control end, a first electrode, and a second electrode; 
         [0014]    the control end of the first transistor is coupled with the node, and the first electrode of the first transistor is configured to receive a data signal; 
         [0015]    the control end of the second transistor is configured to receive a first scanning signal, the first electrode of the second transistor is coupled to the second electrode of the first transistor, and the second electrode of the second transistor is coupled to the node; 
         [0016]    the control end of the third transistor is coupled to the node, the first electrode of the third transistor is coupled to the first power source, and the second electrode of the third transistor is coupled to an anode of the light-emitting diode; and 
         [0017]    the first transistor is configured to compensate a threshold voltage of the third transistor. 
         [0018]    The first transistor and the third transistor are approximate in channel width, and are arranged in the pixel circuit in a close range. 
         [0019]    The pixel circuit is arranged on a TFT backplane; and 
         [0020]    the first transistor and the third transistor are symmetrically arranged on the TFT backplane. 
         [0021]    The pixel circuit further comprises a fourth transistor; 
         [0022]    wherein a control end of the fourth transistor is configured to receive a second scanning signal, a first electrode of the fourth transistor is coupled to the second electrode of the third transistor, and a second electrode of the fourth transistor is coupled to an anode of the light-emitting diode. 
         [0023]    The pixel circuit further comprises a fifth transistor and a third power source; 
         [0024]    wherein the fifth transistor comprises: a control end configured to receive a third scanning signal, a first electrode coupled to the node, and a second electrode coupled to the third power source. 
         [0025]    A voltage of the third power source is lower than or equal to a voltage of the second power source. 
         [0026]    The pixel circuit further comprises a sixth transistor; 
         [0027]    wherein the sixth transistor comprises: a control end configured to receive the third scanning signal, a first electrode coupled to the anode of the light-emitting diode, and a second electrode coupled to the second power source. 
         [0028]    The pixel circuit further comprises a second capacitor coupled between the control end of the second transistor and the node. 
         [0029]    The first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are P-channel metal-oxide semiconductor transistors. 
         [0030]    The present invention further provides a method for driving a pixel circuit; wherein the pixel circuit comprises: a first transistor, a second transistor, a third transistor, a storage capacitor and an organic light-emitting diode, and is driven by signals from data lines and scanning lines; and the drive method comprises: 
         [0031]    applying a first scanning signal to a first scanning line for conducting the second transistor such that data signals from a data line are provided to a node via the first transistor and the second transistor, and storing a voltage at the node in the storage capacitor, wherein a control end of the first transistor and a terminal of the storage capacitor are jointly coupled to the node; 
         [0032]    providing the data signals to the light-emitting diode via the third transistor; and 
         [0033]    emitting, by the light-emitting diode, light with a brightness matching the data signals. 
         [0034]    The pixel circuit further comprises a fourth transistor; and 
         [0035]    the method further comprises: 
         [0036]    applying a second scanning signal to a second scanning line for conducting the fourth transistor such that the data signals are provided to the light-emitting diode via the third transistor. 
         [0037]    The pixel circuit further comprises a fifth transistor; and 
         [0038]    a third scanning signal is applied for conducting the fifth transistor before the first scanning signal is applied, thereby initializing the node. 
         [0039]    The first transistor and the third transistor are approximate in channel width, and are arranged in the pixel circuit in a close range. 
         [0040]    The pixel circuits arranged on a TFT backplane; and 
         [0041]    the first transistor and the third transistor are symmetrically arranged on the TFT backplane. 
         [0042]    The present invention further provides a display device, comprising: 
         [0043]    A scanning driver is configured to apply a scanning signal to a scanning line; 
         [0044]    a data driver is configured to apply a data signal to a data line; and 
         [0045]    a pixel circuit is coupled between the data line and the scanning line; 
         [0046]    wherein the pixel circuit comprises: a first power source, a second power source, an organic light-emitting diode, a first capacitor, a first transistor, a second transistor, and a third transistor; wherein 
         [0047]    the organic light-emitting diode comprises an anode and a cathode which is coupled to the second power source; 
         [0048]    the first capacitor is coupled between a node and the second power source; 
         [0049]    each of the first transistor, the second transistor, and the third transistor is provided with a control end, a first electrode, and a second electrode; wherein 
         [0050]    the control end of the first transistor is coupled to the node, and the first electrode of the first transistor is coupled to with the data lines; 
         [0051]    the control end of the second transistor is coupled to a first scanning line, the first electrode of the second transistor is coupled to the second electrode of the first transistor, and the second electrode of the second transistor is coupled to the node; 
         [0052]    the control end of the third transistor is coupled to the node, the first electrode of the third transistor is coupled to the first power source, and the second electrode of the third transistor is coupled to an anode of the light-emitting diode; and 
         [0053]    the first transistor is configured to compensate a threshold voltage of the third transistor. 
         [0054]    The first transistor and the third transistor are approximate in channel width, and are arranged in the pixel circuit in a close range. 
         [0055]    The display device further comprises a TFT backplane, the pixel circuit being arranged on the TFT backplane; and 
         [0056]    the first transistor and the third transistor are symmetrically arranged on the TFT backplane. 
         [0057]    The pixel circuit further comprises a fourth transistor; wherein a control end of the fourth transistor is coupled to a second scanning line, a first electrode of the fourth transistor is coupled to the second electrode of the third transistor, and a second electrode of the fourth transistor is coupled to the anode of the light-emitting diode. 
         [0058]    The pixel circuit further comprises a fifth transistor and a third power source; wherein the fifth transistor comprises a control end coupled to a third scanning line, a first electrode coupled to the node, and a second electrode coupled to the third power source. 
         [0059]    A voltage of the third power source is lower than or equal to a voltage of the second power source. 
         [0060]    The pixel circuit further comprises a sixth transistor; wherein the sixth transistor comprises: a control end coupled to the third scanning line, a first electrode coupled to the anode of the light-emitting diode, a second electrode coupled to the second power source. 
         [0061]    The pixel circuit further comprises a second capacitor coupled between the control end of the second transistor and the node. 
         [0062]    The first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are P-channel metal-oxide semiconductor transistors. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0063]      FIG. 1  is a diagram of a pixel circuit of a traditional active matrix organic light-emitting display device; 
           [0064]      FIG. 2  is a schematic diagram of a pixel circuit according to a first embodiment of the present invention; 
           [0065]      FIG. 3  is a signal timing diagram of a method for driving the pixel circuit as shown in  FIG. 2 . 
           [0066]      FIG. 4  is a schematic diagram of a pixel circuit according to a second embodiment of the present invention; 
           [0067]      FIG. 5  is a signal timing diagram of a method for driving the pixel circuit as shown in  FIG. 4 . 
           [0068]      FIG. 6  is a schematic diagram of a pixel circuit according to a third embodiment of the present invention; 
           [0069]      FIG. 7  is a signal timing diagram of a method for driving the pixel circuit as shown in  FIG. 6 . 
           [0070]      FIG. 8  is a schematic diagram of a pixel circuit according to a fourth embodiment of the present invention; 
           [0071]      FIG. 9  is a schematic diagram of a pixel circuit according to a fifth embodiment of the present invention; and 
           [0072]      FIG. 10  is a schematic diagram of an active matrix organic light-emitting display device of the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0073]    In the following, the pixel circuit and the method for driving the pixel circuit according to the present invention will be further described in detail with reference to the appended drawings and the embodiments of the present invention. 
         [0074]    It is necessary to note that the term “coupled/couple/coupling” as referred to in the present invention includes either direct connection between elements or connection between elements via other components. 
         [0075]    For ease of description, a pixel circuit and a method for driving the pixel circuit according to an embodiment of the present invention will be described with reference to  FIG. 2  and  FIG. 3 . 
         [0076]      FIG. 2  shows a schematic diagram of a pixel circuit  200  according to a first embodiment of the present invention. 
         [0077]    With reference to  FIG. 2 , the pixel circuit  200  comprises: a first transistor T 1 , a second transistor T 2 , a third transistor T 3 , a capacitor C 1 , and an organic light-emitting diode (OLED). Each of the transistors T 1  to T 3  comprises a control end, a first electrode  1 , and a second electrode  2 . The first electrode of the first transistor T 1  is coupled to a data line Dm, the control end of the first transistor T 1  is coupled to a node N 1 , and the second electrode of the first transistor T 1  is coupled to the first electrode of the second transistor T 2 . The control end of the second transistor T 2  is coupled to a first scanning line Sn 1  configured to receive a first scanning signal from the first scanning line Sn 1 , the first electrode of the second transistor T 2  is coupled to the second electrode of the second transistor, and the second electrode of the second transistor T 2  is coupled to the node N 1 . A first terminal of the capacitor C 1  is coupled to the node N 1 , and a second terminal of the capacitor C 1  is coupled to a second power source ELVSS. The control end of the third transistor T 3  is coupled to the node N 1 , the first electrode of the third transistor T 3  is coupled to the first power source ELVDD, and the second electrode of the third transistor T 3  is coupled to an anode of the OLED. A cathode of the OLED is coupled to the second power source ELVSSO. Preferably, the control end may be a grid of each of the transistors T 1  to T 3 , the first electrode may be a source of each of the transistors T 1  to T 3 , and the second electrode may be a drain of each of the transistors T 1  to T 3 . Similarly, the control end of each of the transistors T 4 , T 5  and T 6  may be a grid of each of the transistors T 4  to T 6 , the first electrode may be a drain of each of the transistors T 1  to T 3 , and the second electrode may be a drain of each of the transistors T 1  to T 3 . 
         [0078]      FIG. 3  shows a signal timing diagram for a method for driving the pixel circuit  200  as shown in  FIG. 2 . The signal timing as shown in  FIG. 3  includes a first phase and a second phase, wherein the first phase t 1  is a data writing phase, and the second phase t 2  is a normal light-emitting phase. As all the transistors T 1  to T 3  in the pixel circuit  200  as shown in  FIG. 2  are described using PMOS transistors as an example, the transistors are conducted when low-level signals are applied to the control ends of the transistors. 
         [0079]    As shown in  FIG. 3 , in the first phase, i.e., a time period t 1  in which the scanning signals are applied to the scanning line Sn 1 , the first transistor T 1  and the second transistor T 2  respond to the low-level scanning signals Sn 1  to be conducted. Therefore, the data signals Vdata from the data line Dm are provided to the node N 1  via the first transistor T 1  and the second transistor T 2 . It can be understood that, at this point, the voltage value at the node N 1  is a voltage value corresponding to a differential value between the data signals Vdata and the threshold voltage of the first transistor T 1 , i.e., Vdata-|V TH1 |, which is equivalent to Vdata+V TH1 . Further, the voltage at the node N 1  is also stored in the capacitor C 1 . That is, the data signals Vdata on the data line Dmare are read into the pixel circuit  200 . 
         [0080]    In the second phase t 2 , that is, after the voltage of the first scanning line Sn 1  jumps to a high level, the OLED enters the normal light-emitting phase. At this point, a current of the first power source ELVDD flows through the third transistor T 3  into the anode of the OLED. 
         [0081]    The driving current flowing into the OLED is shown as a formula below: 
         [0000]        I   OLED =½ μ 3   ×C   ox3   ×W   3   /L   3 ×( V   GS3   −V   TH3 ) 2    (Formula 2),
 
         [0000]    wherein μ 3  is a carrier mobility of the third transistor T 3 ; C ox3  is a capacitance of a control end oxidation layer per unit area of the third transistor T 3 , W 3  is a channel width of the third transistor, and L 3  is a channel length of the third transistor T 3 . V  GS3  is a voltage difference between the grid and the source of the third transistor T 3 , and V TH3  is the threshold voltage of the third transistor T 3 . 
         [0082]    At this point, as the third transistor is conducted, the voltage V GS3  for the grid and the source is the voltage (Vdata+V TH1 ) at the node N 1 , and the voltage difference between the voltage V GS3  and the voltage Vdd of the first power source is Vdata+V TH1 −Vdd. Therefore, through calculation in the above formula, the following formula may be obtained: 
         [0000]        I   OLED =½ μ 3   ×C   ox3   ×W   3   /L   3 ×( V   data   +V   TH1   −V   dd   −V   TH3 ) 2    (Formula 3).
 
         [0083]    It follows that the impact of the threshold voltage of the third transistor T 3  to the driving current of OLED may be reduced by arranging the first transistor T 1  with appropriate electric characteristics. 
         [0084]    Preferably, if the transistors T 1  and T 3  with similar electrical characteristics as much as possible are arranged, the threshold voltage of the third transistor T 3  can be offset to almost zero, thereby allowing the driving current flowing into the OLED to be free from the impact of the threshold voltage of the third transistor T 3 . That is, the current value of the OLED is as follows: 
         [0000]        I   OLED =½ μ 3   ×C   ox3   ×W   3   /L   3 ×( V   data   −V   dd ) 2    (Formula 4).
 
         [0085]    Wherein for the arrangement of the first transistor T 1  and the third transistor T 3  with similar electrical characteristics as much as possible, two transistors approximate in channel width and channel length as much as possible may be arranged, and are arranged in the pixel circuit  200  in a close range. 
         [0086]    Preferably, the pixel circuit  200  may also be arranged on a TFT backplane, with the first and third transistors T 1  and T 3  symmetrically arranged, so that the threshold voltages of the first and third transistors T 1  and T 3  are as close as possible. 
         [0087]      FIG. 4  shows a schematic diagram of a pixel circuit  300  according to a second embodiment of the present invention. Compared with the pixel circuit as shown in  FIG. 2 , the pixel circuit  300  further comprises a fourth transistor T 4 ; wherein a control end of the fourth transistor T 4  is coupled to a second scanning line Sn 2  configured to receive a second scanning signal from the second scanning line Sn 2 , a first electrode of the fourth transistor T 4  is coupled to the second electrode of the third transistor T 3 , and a second electrode of the fourth transistor T 4  is coupled to the anode of the OLED 
         [0088]      FIG. 5  shows a signal timing diagram of a drive method according to the pixel circuit  300  as shown in  FIG. 4 . Compared with the signal timing diagram as shown in  FIG. 3 , the signal timing diagram as shown in  FIG. 4  is different in that the scanning signal is provided to the second scanning line Sn 2  in the second phase t 2 . At this point, the third transistor T 3  and the fourth transistor T 4  are conducted simultaneously, thereby providing the data signals to the OLED through the third transistor T 3  and the fourth transistor T 4 . Furthermore, the OLED enters the normal light-emitting phase. 
         [0089]    It can be understood that as the fourth transistor T 4  is arranged in the pixel circuit  300 , the conduction time and the shutdown time of the fourth transistor T 4  may be controlled through the second scanning line Sn 2 , thereby controlling the light-emitting time of the OLED through the fourth transistor T 4 . That is, when the transistor T 4  is shut down, the OLED does not emit light; and when the transistor T 4  is conducted, the OLED emits light. The OLED in the pixel circuit  200  as shown in  FIG. 2  is always in a light-emitting state since the third transistor T 3  is conducted continuously. Therefore, the light-emitting effect of the pixel circuit  3  becomes more stable. 
         [0090]      FIG. 6  shows a schematic diagram of a pixel circuit  400  according to a third embodiment of the present invention. Compared with the pixel circuit  300  as shown in  FIG. 4 , the pixel circuit  400  further comprises a fifth transistor T 5 ; wherein a control end of the fifth transistor T 5  is coupled to a third scanning line Sn 3  configured to receive a third scanning signal from the third scanning line Sn 3 , a first electrode of the fifth transistor T 5  is coupled to the node N 1 , and a second electrode of the fifth transistor T 5  is coupled to the third power source. The voltage Vinit of the third power source is not higher than V ELVSS . 
         [0091]    For those skilled in the art, it can be understood that when the value of Vinit is equal to that of V E1VSS , the source electrode of the fifth transistor can be coupled to the second power source ELVSS. 
         [0092]      FIG. 7  shows a signal timing diagram of a pixel circuit  400  as shown in  FIG. 6 . The signal timing further comprises an initialization phase before the first phase. 
         [0093]    In the initialization phase, i.e., the time period t 0  in which the scanning signals are provided to the scanning line Sn 3 , the fifth transistor T 5  is conducted, thereby supplying the voltage of the third power source Vinit to the node N 1  and the anode of the OLED. 
         [0094]    That is, the fifth transistor T 5  supplies a constant voltage to the node N 1  and the anode of the OLED in the initialization time period. Thus, the voltage at the node N 1  and the voltage of the capacitor C 1  are initialized to be Vinit. 
         [0095]    Preferably, the initialized voltage Vinit may be set to be the same as the voltage of the second power source ELVSS. 
         [0096]      FIG. 8  shows a schematic diagram of a pixel circuit  500  according to the fourth embodiment of the present invention. Compared with the circuit as shown in  FIG. 6 , the pixel circuit  500  further comprises a sixth transistor T 6 . 
         [0097]    The sixth transistor T 6  is coupled between the anode of the OLED and the second power source ELVSS. A control end of the sixth transistor T 6  and the control end of the fifth transistor T 5  are jointly coupled to the scanning line Sn 3  configured to receive a third scanning signal; and a first electrode and a second electrode of the sixth transistor T 6  are respectively coupled to the anode and the cathode of the OLED. In the time period in which the low-level scanning signal is provided to the scanning line Sn 3 , the sixth transistor T 6  is conducted. Since the first and second electrodes of the sixth transistor T 6  are respectively coupled to the anode and the cathode of the OLED, the driving current may be prevented from being supplied to the OLED. 
         [0098]      FIG. 9  shows a schematic diagram of a pixel circuit  600  according to a fifth embodiment of the present invention. Compared with the circuit as shown in  FIG. 7 , the pixel circuit  600  further comprises a second capacitor C 2 . The second capacitor C 2  is coupled between the control end of the second transistor T 2  and the node N 1 . 
         [0099]    It can be understood that in the time period in which the scanning signal of the scanning line Sn 1  jumps from low level to high level, since Vdata is stored in the node N 1 , the voltage increases the potential of the node N 1  through the coupling effect of the second capacitor C 2  when the voltage of the scanning line Sn 1  turns into high level, thereby correspondingly improving the voltage Vdata+V TH1  of the control end of the third transistor T 3  and storing the corresponding voltage into the second capacitor C 2 .Due to Vdata&lt;Vdd, from the formula 4, it can be known that the increase in the voltage value of the control end of the third transistor T 3  results in the decrease of the differential value between the voltage of the control end of the third transistor T 3  and Vdd. Therefore, when the voltage of the data signals, read into the pixel circuit  600 , is very small, i.e. when the grayscale for light emitting is very low, the driving current flowing through the OLED is made to decrease further, thereby improving the contrast among different grayscales of the pixel circuit. 
         [0100]    It is necessary to note that the first transistor T 1 , the second transistor T 2 , the third transistor T 3 , the fourth transistor T 4 , the fifth transistor T 5 , and the sixth transistor T 6  in the pixel circuits of the embodiments above are described by using the P-channel metal-oxide semiconductor transistor as an example. Those skilled in the art may understand that the transistors T 1  to T 6  in the pixel circuit of the present invention may also be implemented by using N-channel metal-oxide semiconductor transistors. 
         [0101]      FIG. 10  shows an active matrix organic light-emitting display device  600  comprising the pixel circuit according to the embodiments of the present invention. 
         [0102]    With reference to  FIG. 10 , a display device  700  comprises: a first power source ELVDD, a second power source ELVSS, a scanning driver  702 , a data driver  703 , and a plurality of pixel circuits  701  arranged in intersection areas between the scanning lines Sn 1 , Sn 2  and Sn 3  and the data lines D 1  to Dm in a matrix manner. The first power source ELVDD and the second power source ELVSS supply corresponding power voltages to the plurality of pixel circuits  701  through corresponding row lines (with the number of n) and column lines (with the number of m). 
         [0103]    Each pixel circuit  701  is coupled to the corresponding scanning line (for example, Sn 2 , Sn 2  and Sn 3 ) and data line respectively. For example, the pixel circuit  701  located in the row i and the column j is coupled to the scanning lines Si 1 , Si 2  and Si 3  of the row i and the data line Dj of the column j. 
         [0104]    The scanning driver  702  generates the scanning signals corresponding to the scanning signals provided externally (for example, by a certain control unit). The scanning signals generated by the scanning driver  702  are respectively provided to the pixel circuits  701  in sequence through the scanning lines Si 1  to Sin. 
         [0105]    The data driver  703  generates the data signals corresponding to the data and data control signals provided externally (for example, by a certain control unit). The data signals generated by the data driver  703  are provided to the pixel circuit  701  through the data lines D 1  to Dm in synchronization with the scanning signals, wherein the pixel circuit  701  may be any one pixel circuit as shown in the embodiments above. It can be understood that the number of the scanning lines in each row may be differently arranged accordingly according to different embodiments of the pixel circuit. 
         [0106]    Although the present invention is described with reference to specific exemplary embodiments, it should be understood that the present invention is not limited to such embodiments. However, the present invention intends to cover various modifications and equivalent arrangements made under the spirit and scope of the claims and equivalents thereof. 
         [0107]    The embodiments above are only used for describing the technical solutions of the present invention instead of limiting the present invention. Although the present invention is described in detail with reference to preferred embodiments, those of ordinary knowledge in the related technical field may make some modifications and polishments without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to that defined by the claims.