Abstract:
In one example, a method for fabricating a device includes patterning a substrate with a set of features forming a portion of the device, depositing a first photoresist layer on the substrate by a first deposition process, depositing a second photoresist layer on the first photoresist layer by a second deposition process, and inducing spalling of the features from the substrate, after depositing the second photoresist layer.

Description:
BACKGROUND OF THE DISCLOSURE 
     Spalling is a process in which stress causes particles of a brittle material to detach from the surface of the material. Controlled spalling can be used to fabricate fine features of microelectronics and other devices, such as those used in medical implants (e.g., health monitors, biomedical devices), flexible sensor arrays, imaging devices, electronics built on three-dimensional surfaces, photovoltaics, and wearable electronics. 
     SUMMARY OF THE DISCLOSURE 
     In one example, a method for fabricating a device includes patterning a substrate with a set of features forming a portion of the device, depositing a first photoresist layer on the substrate by a first deposition process, depositing a second photoresist layer on the first photoresist layer by a second deposition process, and inducing spalling of the features from the substrate, after depositing the second photoresist layer. 
     In another example, a method for fabricating a device includes patterning a substrate with a set of features forming a portion of the device, depositing a first photoresist layer directly on the substrate, patterning the first photoresist layer to create a series of trenches, depositing a conformal seed layer directly on the first photoresist layer and in the series of trenches, depositing a second photoresist layer directly on the seed layer, patterning the second photoresist layer to maintain the series of trenches, depositing a stressor layer directly on the second photoresist layer and in the series of trenches, applying a first adhesive layer to the stressor layer, inducing spalling of the features from the substrate, and pulling the first adhesive layer in a direction away from the substrate, after spalling is induced, so that portions of the substrate are detached and lifted away from a body of the substrate. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The teachings of the present disclosure can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which: 
         FIGS. 1A-1I  illustrate cross sectional views of a structure for patterning fine spalled features during various stages of a patterning process performed according to examples of the present disclosure. 
     
    
    
     To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the Figures. 
     DETAILED DESCRIPTION 
     In one example, a dual-layer photoresist structure for controlled spalling of fine features is disclosed. The dual-layer photoresist structure may be employed in a controlled spalling process to pattern fine features of a device down to approximately ten μm. For instance, the dual-layer photoresist structure allows an electroplating process to be performed uniformly on a metal seed layer. Subsequently, spalling can be performed in a controlled manner on small features across the substrate or wafer. Thus, the disclosed process is able to produce features having a finer resolution than is possible using conventional spalling techniques. 
     Examples of the present disclosure provide a process in which the dual-layer photoresist structure is deposited between a patterned surface layer, such as a patterned silicon substrate, and a stressor layer, such as a layer of plated nickel. The two layers of the photoresist structure may be deposited in separate processing steps and may be physically separated by an intervening layer of a seed material. The seed material may be formed from the same material as the stressor layer (e.g., nickel). Controlled spalling may continue by applying stress to the structure and utilizing an adhesive, such as stretchable and/or ultraviolet (UV) release tape. 
       FIGS. 1A-1I  illustrate cross sectional views of a structure  100  for patterning fine spalled features during various stages of a patterning process performed according to examples of the present disclosure. As such, when viewed in sequence,  FIGS. 1A-1I  also serve as a flow diagram for the patterning process. 
     Referring to  FIG. 1A , the structure  100  begins as a substrate  102 , formed, for example, from bulk silicon (Si) or another brittle semiconductor material, such as germanium (Ge), gallium arsenide (GaAs), indium phosphide (InP), gallium nitride (GaN), and others. The substrate forms the surface layer of the structure  100 . Fine features are patterned onto the surface of the substrate  102 . The fine features may form, for example, a resistor of an electronic device or circuit. 
     Referring to  FIG. 1B , a first photoresist layer  104  is next deposited directly on the substrate  102  and then patterned. The first photoresist layer  104  may be deposited, for example, by spin coating, and then patterned, for example, by photolithography. Patterning of the first photoresist layer  104  removes portions of the first photoresist layer  104  residing directly above patterned features of the substrate  102 , but leaves other portions of the first photoresist layer  104  intact. This creates a series of trenches in the first photoresist layer  104 . 
     Referring to  FIG. 1C , a conformal seed layer  106  is next deposited over the substrate  102  and the patterned first photoresist layer  104 . The seed layer  106  conforms to the profile created by the series of trenches. In one example, the seed layer has a thickness in a range of a few nanometers to hundreds of nanometers and may be deposited, for example, by sputtering, thermal evaporation, or other processes. In one example, the seed layer  106  comprises a stressor material formed from a metal or metal-containing material. For instance, the seed layer  106  may include nickel (Ni). In a further example, the seed layer  106  includes a thin adhesion layer, formed, for example, from titanium (Ti), followed by a thicker layer of a stressor material that is not easily oxidized. 
     Referring to  FIG. 1D , a second photoresist layer  108  is next deposited directly on the seed layer  106  and then patterned. The second photoresist layer  108  may be deposited, for example, by spin coating, and then patterned, for example, by photolithography. Patterning of the second photoresist layer  108  removes portions of the second photoresist layer  108  residing directly above patterned features of the substrate  102 , but leaves other portions of the second photoresist layer  108  intact. This creates a series of trenches in the first photoresist layer  104  and the second photoresist layer  108  (e.g., in the same locations as the trenches created in  FIG. 1B ). Collectively, the remaining portions of the first photoresist layer  104 , the seed layer  106 , and the second photoresist layer  108  form a dual-layer photoresist structure. 
     Referring to  FIG. 1E , a stressor layer  110  is next deposited directly over the seed layer  106  and the second photoresist layer  108 . The stressor layer  110  may be deposited, for example, by plating. The stressor layer  110  fills in the trenches in the first photoresist layer  104  and the second photoresist layer  108 . In one example, the stressor layer  110  comprises a material with tensile or ductile stress, such as nickel or tungsten (W). In one example, the stressor layer  110  and the seed layer  106  comprise the same material (e.g., nickel). However, in other examples, the stressor layer  110  is formed from a different material than the seed layer  106 . 
     Referring to  FIG. 1F , controlled spalling of the substrate  102  is next performed. In one embodiment, controlled spalling of the substrate  102  involves applying a first adhesive layer  112  to the second photoresist layer  108  and/or the stressor layer  110 . In one example, the first adhesive layer  112  is comprises a detachable adhesive. The first adhesive layer  112  may comprise, for example, ultraviolet release tape having an adhesive strength that diminishes through exposure to ultraviolet irradiation. The controlled spalling may further involve activating stress to the substrate  102 , e.g., through thermal processing of the stressor layer  110 . The thermal processing may involve heating and/or cooling of the stressor layer  110  to induce the propagation of cracks in the substrate  102 . After the stress has been activated, the first adhesive layer  112  is pulled in a direction away from the substrate  102 . As illustrated in  FIG. 1F , the first adhesive layer  112  lifts the first photoresist layer  104 , the seed layer  106 , the second photoresist layer  108 , and the stressor layer  110  away from the substrate  102 . Portions of the substrate  102  also detach from the body of the substrate  102  and adhere to the seed layer  106 . The detached portions of the substrate  102  will form the fine features of the device being fabricated (e.g., portions of a resistor). 
     Referring to  FIG. 1G , a second adhesive layer  114  is next applied to the detached or spalled surfaces of the substrate  102 . The second adhesive layer  114  may comprise, for example, stretchable tape. 
     Referring to  FIG. 1H , the first adhesive layer  112  is next released or removed from the structure  100 . In one example, where the first adhesive layer  112  comprises ultraviolet release tape, the first adhesive layer  112  may be released by exposing it to ultraviolet irradiation until its adhesive strength has diminished to the point where the tape can be removed without undue effort or damage to the structure  100 . 
     Referring to  FIG. 1I , the first photoresist layer  104 , the seed layer  106 , the second photoresist layer  108 , and the stressor layer  110  are next removed, for example by etching. This leaves the detached or spalled portions of the substrate  102  on the second adhesive layer  114 . As discussed above, the detached or spalled portions of the substrate  102  will form the fine features of the device being fabricated (e.g., portions of a resistor). 
     Although various embodiments which incorporate the teachings of the present invention have been shown and described in detail herein, those skilled in the art can readily devise many other varied embodiments that still incorporate these teachings.