Abstract:
Methods and apparatuses for using single-ended common mode signaling, additional data can be transferred in backward, forward, and/or both directions over an existing differential pair connection without adding extra wire.

Description:
PRIORITY 
       [0001]    This U.S. patent application claims priority to and incorporates by reference the corresponding U.S. provisional patent application Ser. No. 61/108,757, titled, “I NDEPENDENT  L INK ( S ) O VER  D IFFERENTIAL  P AIRS  U SING  C OMMON -M ODE  S IGNALING ,” filed on Oct. 27, 2008. 
     
    
     BACKGROUND 
       [0002]    Differential signaling may be used to send serial data over a cable. To increase data transfer rate, two or more differential pairs are may be used in a high-speed serial link.  FIG. 1  illustrates one example system for creating a virtual differential pair using two differential pairs. In the computer system, processor  101  includes transmitter  106  and receiver  110 . The processor transmits digital pixel to video display terminal  102  using, for example, the Transition Minimized Differential Signaling (TMDS) communications protocol. Accordingly, processor  101  is coupled to video display terminal  102  through four twisted wire differential pairs  105   a - d . Twisted wire differential pairs  105   a - d  may be implemented within a single cable assembly. 
         [0003]    Alternatively, processor  101  may transfer digital pixel data to video display terminal  102  using any other appropriate communications protocol (such as Low-Voltage Differential Signaling, or LVDS), in which case the number of twisted wire differential pairs which are coupled between processor  101  and video display terminal  102  may be different. These twisted wire differential pairs are used to transmit red, green and blue digital pixel data to video display terminal  102 , along with a clock signal for synchronizing the data. 
         [0004]    Display terminal  102  includes receiver  107 , transmitter  115  and DC offset module  125 . Receiver  107  receives incoming digital pixel data and routes the data to row and column driver circuitry within display terminal  102 . Transmitter  115  in display terminal  102  receives incoming digital data from peripherals which may be coupled to display terminal  102  and transmits this digital data to processor  101  using DC offset module  125 . DC offset module  125  is used to manipulate the DC offsets on two of twisted wire differential pairs  105   a - d . When the DC offsets in each of the two twisted wire pairs are compared, the difference between the two DC offsets is used to transmit digital data in a reverse direction. 
         [0005]    Both wires in a first pair may have their DC offset adjusted by a small amount while the DC offset in both wires of a second pair remains unchanged. The first DC offset is compared with the second offset in order to communicate digital formation in the reverse direction. Further, both wires in the second pair may have their DC offset adjusted by a small amount while the DC offset in both wires of the first pair remains unchanged. The first DC offset is compared with the second offset in order to communicate digital information in the reverse direction. This allows for the bidirectional transfer of digital data. Digital data is also transferred in a reverse direction over two of the twisted wire differential pairs,  140  and  150 . 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0006]    The invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings in which like reference numerals refer to similar elements. 
           [0007]      FIG. 1  illustrates a system that incorporates a bidirectional data transfer system. 
           [0008]      FIG. 2  is a block diagram of one embodiment of a system that incorporates a bidirectional data transfer system utilizing common mode signaling. 
           [0009]      FIG. 3  is an example waveform that may be created using the techniques described herein. 
           [0010]      FIG. 4  illustrates one embodiment of a transmitter and receiver connected by a cable that may communicate utilizing common-mode signaling. 
           [0011]      FIG. 5  illustrates one embodiment of a transmission circuit that may be utilized in a dual-mode receiver. 
       
    
    
     DETAILED DESCRIPTION 
       [0012]    In the following description, numerous specific details are set forth. However, embodiments of the invention may be practiced without these specific details. In other instances, well-known circuits, structures and techniques have not been shown in detail in order not to obscure the understanding of this description. 
         [0013]    In the common-mode signaling configuration illustrated in  FIG. 2 , pairs of differential pairs are utilized to create a virtual differential pair. That is, four wires are utilized to provide the virtual differential pair. Further, the data transmission over the virtual differential pair is uni-directional. In the configurations described below, data can be transmitted over a differential pair using common-mode voltage signaling. That is, in addition to the differential pair data transfer signal, another data transfer signal may be provided by the common-mode voltage of the differential pair. Data can be sent data uni-directionally or bi-directionally. 
         [0014]      FIG. 2  is a block diagram of one embodiment of a system that incorporates a bidirectional data transfer system utilizing common mode signaling. This scheme modulates the common mode of two differential pairs in opposite directions to represent a bit and detects the common mode differential between those two pairs to recover the bit. 
         [0015]    In the example of  FIG. 2 , the additional virtual differential pair is illustrated as transmitting from processor  201  to display  202 . In alternate embodiments, transmission can be from display device  202  to processor  201 , or bi-directional communications. The transmitter of  FIG. 3  (described in greater detail below) may be utilized to provide additional data transmission capacity over differential pairs  205   a - d.    
         [0016]    In the computer system of  FIG. 2 , processor  201  includes transmitter  206  and receiver  210 . Processor  201  transmits digital data (e.g., digital pixel data) to display terminal  202  using, for example, the Transition Minimized Differential Signaling (TMDS) communications protocol. Processor  201  is coupled to display terminal  202  through a wired interface that includes at least four differential pairs  205   a - d . Differential pairs  205   a - d  may be implemented within a single cable assembly. In one embodiment, the four differential pairs carry red pixel data, green pixel data, blue pixel data and a clock signal. Other data may also be carried using differential pairs. The differential pairs may take the form or twisted wire pairs. 
         [0017]    Alternatively, processor  201  may transfer digital pixel data to video display terminal  202  using any other appropriate communications protocol (e.g., LVDS), in which case the number of differential pairs between processor  201  and video display terminal  202  may be different. These differential pairs may be used to transmit red, green and blue digital pixel data to display terminal  202 , along with a clock signal for synchronizing the data. 
         [0018]    Display terminal  202  includes receiver  207 , transmitter  215  and DC offset module  225 . Receiver  207  receives incoming data and routes the data to row and column driver circuitry  230 . Transmitter  215  in display  202  may receive incoming data from peripherals which may be coupled to display terminal  202  and may transmit this data to processor  201  using DC offset module  225 . DC offset module  225  operates to manipulate the DC offsets on two of differential pairs  105   a - d . When the DC offsets in each of the two twisted wire pairs are compared, the difference between the two DC offsets is used to transmit digital data from display  202  to processor  201 . 
         [0019]    Manipulation of the DC offsets by transmitter  215  allows for transmission of data over pairs of differential pairs to create virtual differential pairs  280  and  290 . While the transmission is illustrated as from display device  202  to processor  201 , a transmitter may be included in processor  201  and a receiver in display device  202  to allow for transmission over the virtual differential pairs from processor  201  to display device  202 . Further, bi-directional communications may be supported over the virtual differential pairs. 
         [0020]    Both wires in a first pair may have their DC offset adjusted by a small amount while the DC offset in both wires of a second pair remains unchanged. The first DC offset is compared with the second offset in order to communicate digital formation in the reverse direction. Further, both wires in the second pair may have their DC offset adjusted by a small amount while the DC offset in both wires of the first pair remains unchanged. The first DC offset is compared with the second offset in order to communicate digital information in the reverse direction. This allows for the bidirectional transfer of digital data. Digital data is also transferred in a reverse direction over two of the twisted wire differential pairs,  240  and  250 . 
         [0021]    In order to transmit the additional data transmitter  215  may mix data from a first data stream and a second data stream to generate a signal to be transmitted over a differential pair that represents both data streams via differential data with common-mode signaling. Receiver  210  decodes the differential data and common-mode signaling to recover the two data streams. Using the transmitter circuitry described with respect to  FIGS. 3 and 4 , two data streams may be transmitted over a single differential pair. 
         [0022]      FIG. 3  is an example waveform that may be created using these techniques. The signaling techniques and devices described herein are applicable to any differential pair data transfer mechanism, for example, MHL (Mobile High-Definition Link) over micro-USB (Universal Serial Bus) cable, so that both clock and data signals may be transmitted via a single pair of differential wires of a USB cable, or a dual-mode receiver that receives both MHL signals described above, and conventional HDMI signals. 
         [0023]    In  FIG. 3 , DP and DN are differential signals, as indicated by the solid lines. The differential part of these two waveform V diff =(DP−DN) delivers one data stream D 1 , which is decoded as 10101010 . . . from above example. The common-mode part V common =(DP+DN)/2, which is drawn as a dashed line C, delivers another data stream D 2 , which is decoded as 000111110000011. 
         [0024]    Because this common-mode voltage variation in a differential pair does not significantly affect differential data transfer, the differential and common-mode can be independent. Data can be sent data uni-directionally or bi-directionally. A different signal swing can be used for differential and common-mode signals. The signals can have different data rates. In the example of  FIG. 3 , the data rate of the common-mode data signal is much less than the data rate of the differential pair data signal. 
         [0025]      FIG. 4  illustrates one embodiment of a transmitter and receiver connected by cable  400  that may communicate utilizing both wired differential pair and common-mode signaling, for example, by sending two unidirectional data streams D 1  and D 2 . In general,  FIG. 4  consists of three parts—a transmitter which mixes data stream D 1  and D 2  to generate differential data with common-mode signaling, a differential pair cable, and a receiver which separates differential and common-mode signal and recovers data stream D 1  and D 2 . In the example of  FIG. 4 , D 1  corresponds to the differential pair data signal and D 2  corresponds to the common mode data signal. 
         [0026]    A current switch circuit driven by D 2 + and D 2 − modulates common-mode of differential pair via resistors R 1  and R 2 . R 1  and R 2  also serve as differential source termination, thus the ideal value would be half of differential impedance of the cable. Resistors R 3  and R 4  serve as termination for the common-mode signal, thus the ideal value would be twice the common-mode impedance of the cable for termination impedance matching. 
         [0027]    Resistors R 5  and R 6  extract common-mode voltage. They are also part of differential termination network composed of R 3 , R 4 , R 5 , and R 6 , thus the ideal value should meet this formula for differential impedance matching with the cable: 
         [0000]        Z   differential =( R 3+ R 4)//( R 5+ R 6) 
         [0000]    Differential amplifier AMP 1  recovers data stream D 1 , and single-ended amplifier AMP 2  recovers data stream D 2 . 
         [0028]      FIG. 5  illustrates one embodiment of a transmission circuit that may be utilized in a dual-mode receiver. The example of  FIG. 5  may be used, for example, with a MHL/HDMI dual-mode receiver. The concept of the example of  FIG. 5  may be applied to other dual-mode environments as well. 
         [0029]    In one embodiment, for HDMI mode, switch S is connected, which causes the receiver to work as a conventional HDMI receiver, getting four differential signal from CLK channel and Data Channel  0 , 1 , 2 , and delivers CLK, D 0 , D 1 , D 2  to system. For MHL mode, differential data with common mode clk signal added is applied to Data channel  0 , all the other inputs—Clk Channel, Data channel  1  and  2 —are floating, also the switch S is disconnected. Then the configuration is the same as described above and recovers CLK and D 0 . 
         [0030]    Reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment. 
         [0031]    In the foregoing specification, the invention has been described with reference to specific embodiments thereof. It will, however, be evident that various modifications and changes can be made thereto without departing from the broader spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.