Abstract:
A hardware apparatus ( 10 ) for conditioning pilot symbols for channel estimation in a mobile radio comprises a time-division multiplexed low-pass filter unit for filtering the received pilot symbols. The time-division multiplexed low-pass filter unit comprises, between its input and its output, a feedback path which can be switched in and which can be used to implement a plurality of filter stages in a time-division multiplexed arrangement.

Description:
PRIORITY  
         [0001]    This application claims priority to German application no. 103 22 943.4 filed May 21, 2003.  
           [0002]    1. Technical Field of the Invention  
           [0003]    The present invention relates to a hardware apparatus which is used to condition pilot symbols, which have been transmitted by a base station and have been received by a mobile radio and are also known to the mobile radio, for channel estimation by means of adaptive low-pass filtering.  
           [0004]    2. Background of the Invention  
           [0005]    In mobile radio systems, the signal propagation occurs in the form of multiway paths whose influence on the signal can be described in a form of a linear transformation which varies over time. Such signal distortions make correct detection of the data transferred between the base station and the mobile radio impossible. For this reason, the channel distortions in the case of data transfer based on the UMTS (Universal Mobile Telecommunications System) standard, for example, are estimated using a pilot signal (Common Pilot Channel; CPICH). The pilot signal is a signal which is transmitted by the base station and is used for continuously transmitting the same pilot symbol or a continuously recurring pattern comprising two different pilot symbols.  
           [0006]    In one simple channel model, the symbols r k  received by the mobile radio can be described mathematically in the following manner:  
             r   k   =s   k   ·c   k   +n   k   (1)  
           [0007]    In equation (1), s k  represents the symbols transmitted from the base station, c k  represents the channel parameter and n k  represents a noise component. The channel parameter ck describes the rotation-stretching for the symbols s k  in the transmission channel. The integer index k indicates the chronological order of the symbols. All variables in equation (1) represent complex numbers.  
           [0008]    Equation (1) also applies to the pilot symbols transmitted. If the noise component n k  is ignored, then it is possible to ascertain the channel parameter ck by multiplying the received pilot symbols r k  by the complex-conjugate known pilot symbols s k . The channel parameter ck obtained in this manner can be used to eliminate the influence of the transmission channel on the transmitted symbols after they have been received in the mobile radio in line with equation (1). However, physical effects (in the radio frequency receiver, inter alia) mean that the signals received are subject to noise, meaning that the channel parameter ck can be estimated only with finite accuracy.  
           [0009]    The German patent application with the file reference 102 50 361.3-35 allocated by the German Patent and Trade Marks Office proposes a cascaded and adaptive structure of low-pass filter units which is used to filter the pilot symbols received by the mobile radio. This allows a considerable improvement in the accuracy of the channel estimation. The aforementioned patent application is incorporated hereby in the disclosed content of the present patent application.  
         SUMMARY OF THE INVENTION  
         [0010]    It is an object of the invention to provide a hardware apparatus which conditions the pilot symbols in optimum fashion for channel estimation and which can nevertheless be produced with as little complexity as possible. In this case, the target variable to be minimized is the chip area for the hardware unit. In addition, the intention is to specify a method for operating the hardware unit. The intention is also to provide a channel estimator which comprises the hardware apparatus and is integrated in the hardware of the mobile radio in a suitable manner.  
           [0011]    The object on which the invention is based can be achieved by a hardware apparatus for conditioning pilot symbols for channel estimation, wherein the pilot symbols are transmitted by a base station and are received by a mobile radio, and the pilot symbols are known to the mobile radio, comprising a time-division multiplexed low-pass filter unit for filtering the received pilot symbols, the time-division multiplexed low-pass filter unit comprising, between its input and its output, a feedback path which can be switched in.  
           [0012]    The object can also be achieved by a method for operating a hardware apparatus for conditioning pilot symbols for channel estimation, wherein the pilot symbols are transmitted by a base station and are received by a mobile radio, and the pilot symbols are known to the mobile radio, wherein the apparatus comprises a time-division multiplexed low-pass filter unit comprising an IIR low-pass filter, and between its input and its output, a feedback path which can be switched in, a first buffer store for providing first values for main registers in the IIR low-pass filter, and a second buffer store for buffer-storing second values which are output from the main registers in the IIR low-pass filter, the method comprising the steps of:  
           [0013]    (1) loading first values from the first buffer store into the main registers in the IIR low-pass filter;  
           [0014]    (2) filtering a pilot symbol in the IIR low-pass filter;  
           [0015]    (3) storing at least some of the second values output from the main registers in the second buffer store; and  
           [0016]    (4) repeating method steps (1) to (3) at least once, with the feedback path which can be switched in supplying the result of the filtering from method step to the IIR low-pass filter instead of the pilot symbol.  
           [0017]    The feedback loop which can be switched in can be used to produce at least two low-pass filter stages in time-division multiplex mode with various filter coefficients and scaling factors. The hardware apparatus may further comprise a multiplexer which is connected upstream of the low-pass filter unit, a first input on the multiplexer being coupled to the output of the low-pass filter unit, and a second input on the multiplexer being able to be fed the received pilot symbols. The low-pass filter unit may have an IIR low-pass filter which can be used to produce at least two filter stages in time-division multiplex mode. The hardware apparatus may further comprise a first buffer store for providing first values for main registers in the IIR low-pass filter, and a second buffer store for buffer-storing second values which are output from the main registers in the IIR low-pass filter. A pilot symbol filtered using the IIR low-pass filter can be stored in the second buffer store. The function of the first buffer store can be interchanged with the function of the second buffer store. The hardware apparatus may further comprise first registers storing filter coefficients, the low-pass filter unit being fed, during its operation, with the filter coefficients which are stored in the first registers, and second registers, in which it is possible to store filter coefficients during the operation of the low-pass filter unit, the functions of the first registers and of the second registers being interchangeable. The hardware apparatus may further comprise a digital signal processor for generating the filter coefficients. The hardware apparatus may condition the pilot symbols received by various RAKE fingers in a time-division multiplex mode. The hardware apparatus may further comprise a control unit for controlling the hardware apparatus, the control unit activating and deactivating the low-pass filter unit, in particular, and/or determining the number of feedback loops and filter stages through which a pilot symbol needs to pass and/or supplying the filtered pilot symbol or a default value, particularly the value “0”, to a downstream unit, particularly an MRC unit. The hardware apparatus may further comprise a unit for determining the relative speed of the mobile radio with respect to the base station, and/or a unit for determining the signal-to-noise ratio which is present at the receiver end, wherein the number of feedback loops or filter stages through which a pilot symbol needs to pass in the low-pass filter unit is dependent on the relative speed and/or the signal-to-noise ratio.  
           [0018]    The object may further be achieved by a channel estimator comprising a computation unit for multiplying received pilot symbols by complex-conjugate known pilot symbols and a hardware apparatus as described above, wherein the computation unit and the hardware apparatus being connected in series.  
           [0019]    The noise produced in the mobile radio receiver is distributed with spectral uniformity over the bandwidth of the pilot signal and can be significantly reduced in power by means of low-pass filtering. When subjecting the pilot symbols to low-pass filtering, however, it should be noted that the low-pass filtering results in propagation-time delays. Without further measures, pure low-pass filtering sometimes results in the channel estimation being worsened, since after the low-pass filtering the transmission of the pilot symbols used may be so far back in time that the channel state has already altered noticeably. It is therefore necessary to find a compromise between low-pass filtering and propagation-time delay.  
           [0020]    The inventive hardware apparatus takes into account the channel dynamics using adaptive low-pass filtering. To filter the pilot symbols transmitted by the base station and received by the mobile radio, the inventive hardware apparatus has a low-pass filter unit which is operated with N-fold time-division multiplexing and thus delivers the same results as a low-pass filter unit having N filter stages. The time-division multiplex mode is implemented by a feedback path which can be switched in.  
           [0021]    The feedback path, which can be switched in allows the pilot symbols received to be able to pass through the low-pass filter unit N times (in a corresponding manner to N filter stages) and to be subjected to corresponding filtering. The number of times that the pilot symbols pass through the low-pass filter unit can be matched to the channel dynamics. This allows the pilot symbols received to be conditioned in optimum fashion for the channel estimation using the inventive hardware apparatus.  
           [0022]    In addition, the inventive hardware apparatus has the advantage that it requires only one time-division multiplexed low-pass filter unit instead of N filter stages provided in hardware. This means that the chip area is reduced in comparison with a low-pass filter unit having N filter stages.  
           [0023]    Advantageously, the feedback loop which can be switched in makes it possible to produce at least two filter stages in time-division multiplex mode with different filter coefficients and scaling factors.  
           [0024]    In line with one preferred refinement of the invention, the feedback path which can be switched in is produced using a multiplexer which is connected upstream of the low-pass filter unit. A first input on the multiplexer is connected to the output of the low-pass filter unit, at which the filtered pilot symbols are output. The received, still unfiltered pilot symbols are input into a second input on the multiplexer. The multiplexer&#39;s setting determines whether the last pilot symbol filtered is to pass through the low-pass filter unit again or whether a still unfiltered pilot symbol needs to be filtered for the first time.  
           [0025]    Preferably, the time-division multiplexed low-pass filter unit contains an IIR (Infinite Impulse Response) low-pass filter which can be used to produce at least two filter stages in time-division multiplex mode.  
           [0026]    In one particularly preferred refinement of the invention, the hardware apparatus has a first and a second buffer store. In order to filter a pilot symbol, the first buffer store provides for first values which are loaded into the main registers (delay elements) in one of the at least two filter stages in the IIR low-pass filter. When a pilot symbol has been filtered, at least some of the results from a filter stage in the IIR low-pass filter, which results are contained in the main memories (delay elements), are stored in the second buffer store as second values.  
           [0027]    Advantageously, the filtered pilot symbols are also buffer-stored in the second buffer store.  
           [0028]    Storing the second values which have come from the filter stages (results of filtering) and the filtered pilot symbols allows a high degree of flexibility for the hardware apparatus, since it is possible to access the stored second values and the filtered pilot symbols again at a later time, and they can be fed into the filter stages in the IIR low-pass filter again, for example.  
           [0029]    For the purpose described above, it is advantageous that the function of the first buffer store can be interchanged with the function of the second buffer store. It is thus possible for the second values and the filtered pilot symbols, which have previously been stored in the second buffer store, to be input into the IIR low-pass filter again, and first values which have come from the IIR low-pass filter can be written to the first buffer store.  
           [0030]    A further preferred refinement of the invention is characterized by first and second registers. The first registers store filter coefficients which are fed to the filter stages in the low-pass filter unit during operation of the low-pass filter unit. During operation of the low-pass filter unit, the second registers can store filter coefficients which are intended to be used as filter coefficients for the low-pass filter unit at a later time. As soon as the filter coefficients which are stored in the second registers need to be used, the second registers replace the first registers, so that the filter coefficients stored in the second registers can feed the filter stages in the low-pass filter unit. Filter coefficients which are intended to be used as filter coefficients at a later time can then be written to the first registers. This refinement of the invention guarantees a high level of flexibility in order to be able to match the low-pass filter unit to changing conditions in the transmission channel.  
           [0031]    Preferably, the filter coefficients are generated by a digital signal processor.  
           [0032]    In one particularly preferred refinement of the invention, the hardware apparatus conditions the pilot symbols received by various RAKE fingers in a time-division multiplex mode. This means that it is possible for the hardware apparatus to process not only a CPICH signal but also all of this signal&#39;s paths detected in the mobile radio and also all detected paths for other base stations.  
           [0033]    In line with another particularly preferred refinement of the invention, a control unit produces control signals for controlling the hardware apparatus. In particular, these are control signals for activating and deactivating the low-pass filter unit and/or control signals which determine the number of feedback loops (filter passes) for a pilot symbol in the low-pass filter unit. In addition, the control unit may be designed such that it supplies the filtered pilot symbol or a default value, particularly the value “0”, to a downstream unit, particularly an MRC unit.  
           [0034]    The use of a specific control unit is advantageous over the use of a unit which serves the same purpose but is incorporated directly into the flow of signals. In addition, the control signals produced by the control unit may be oriented to procedures taking place in the mobile radio, such as the compressed mode or the initialization of the RAKE fingers, and may thus also be used for other areas of the mobile radio.  
           [0035]    The changes in the channel properties over time are brought about, in particular, by a relative movement from the mobile radio in relation to the base station. In the frequency domain, the pilot symbols received are in the form of a Doppler spectrum with a bandwidth which is dependent on the relative speed of the mobile radio in relation to the base station.  
           [0036]    By taking into account the relative speed of the mobile radio in relation to the base station, it is possible to optimize the conditioning of the pilot symbols for the channel estimation. The hardware apparatus therefore preferably comprises a unit for determining the relative speed of the mobile radio with respect to the base station and/or a unit for determining the signal-to-noise ratio which is present at the receiver end. The relative speed and/or the signal-to-noise ratio can be used to stipulate the number of feedback loops (filter passes) for a pilot symbol in the low-pass filter unit.  
           [0037]    By way of example, provision can be made for a high relative speed to involve a pilot symbol passing through just one or two filter stages in order to cause a short propagation-time delay. By contrast, the propagation-time delay when the relative speed of the mobile radio is relatively low is quite uncritical on account of the very slow channel changes in this case, and effective filtering of the pilot symbols is much more crucial, which means that it is possible to pass through a plurality of, for example, up to four filter stages in this context.  
           [0038]    The inventive method is designed for operating the inventive hardware apparatus. In a first method step, first values are loaded from the first buffer store into the main registers in the IIR low-pass filter. In a second method step, a pilot symbol is filtered in the IIR low-pass filter. In a third method step, at least some of the second values output from the main registers are stored in the second buffer store. Next, the aforementioned three method steps are repeated at least once, with the feedback path which can be switched in supplying the respective result of the filtering from the second method step to the input of the IIR low-pass filter instead of the pilot symbol.  
           [0039]    A channel estimator in accordance with the invention comprises a computation unit and a hardware apparatus in accordance with the invention. The computation unit is used to multiply the received pilot symbols by the complex-conjugate known pilot symbols. In line with the above equation (1), this multiplication can be used to calculate the channel parameter.  
           [0040]    The inventive hardware apparatus is connected either upstream or downstream of the computation unit. As a result, the two arrangements do not differ. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0041]    The invention is explained in more detail below by way of example with reference to the drawings, in which:  
         [0042]    [0042]FIG. 1 shows a schematic illustration of an apparatus for conditioning pilot symbols for channel estimation and implementation thereof in a mobile radio;  
         [0043]    [0043]FIG. 2A shows a schematic diagram of an exemplary embodiment of the inventive hardware apparatus;  
         [0044]    [0044]FIG. 2B shows a schematic diagram of the computation unit IIR_ARITH —1;    
         [0045]    [0045]FIG. 2C shows a schematic diagram of the computation unit IIR_ARITH —2;    
         [0046]    [0046]FIG. 3 shows a timing diagram for the processing of the pilot symbols provided by the RAKE fingers by the apparatus ( 10 ); and  
         [0047]    [0047]FIG. 4 shows a schematic illustration of the implementation of the apparatus ( 10 ) in a mobile radio. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0048]    [0048]FIG. 1 shows a schematic illustration of an apparatus  1  for conditioning pilot symbols for channel estimation and the incorporation thereof into a mobile radio. In the present case, the radio transmission between the base station and the mobile radio is based on the UMTS standard.  
         [0049]    A RAKE receiver  2  in the mobile radio receives chips  100 . The chips  100  are progressively supplied in the RAKE receiver  2  to a descrambling unit (descrambler), to a dispreading unit and to an “integrate &amp; dump” unit. As a result, the chips  100  are transformed into data symbols  101  and pilot symbols  102 . The pilot symbols  102  are forwarded to the apparatus  1 , which subjects the pilot symbols  102  to low-pass filtering. The filtered pilot symbols  103  feed a channel estimator  3 , which calculates channel parameters  104  from the filtered pilot symbols  103 . On the basis of the channel parameters  104 , a weighting unit  4  is used to calculate the distortion caused by the transmission channel from the data symbols  101 , and symbols  105  are obtained which are available for further processing.  
         [0050]    The apparatus  1  contains filter stages  5 ,  6 ,  7  and  8 , which are each in the form of low-pass filters, in a cascade structure, i.e. in series. In addition, the outputs of the filter stages  5 ,  6 ,  7  and  8  are respectively connected to an input on a 4:1 multiplexer  9 . The 4:1 multiplexer  9  is controlled by means of a control signal  106  which can be provided by a digital signal processor, for example. The output of the 4:1 multiplexer  9  is simultaneously the output of the apparatus  1 .  
         [0051]    The connection of the components in the apparatus  1  makes it possible for the number of filter stages through which the pilot symbols  102  are intended to pass before they are processed further by the channel estimator  3  to be variable.  
         [0052]    The more filter stages traversed, the more effective is the noise suppression attained by the low-pass filtering. However, this also lengthens the signal propagation time, which means that the filtered pilot symbols  103  are available only with a corresponding time delay.  
         [0053]    By way of example, the decision criterion used for the number of filter stages through which the pilot symbols  102  are intended to pass may be the relative speed between the mobile radio and the base station. While the relative speed is high, the 4:1 multiplexer  9  is set such that the filtered pilot symbols  103  are tapped off at the output of a filter stage which is arranged a relatively long way ahead in the series circuit. This keeps down the propagation-time delay for the filtered pilot symbols  103  which is caused by the low-pass filtering. At a low relative speed, good filtering of the pilot symbols  102  is possible, which means that the pilot symbols  102  pass through a relatively large number of filter stages before they get to the channel estimator  3 . It is therefore necessary to balance effective noise suppression against tolerable signal propagation-time delay in order to determine the number of filter stages through which the pilot symbols  102  need to pass.  
         [0054]    [0054]FIG. 2A shows the schematic diagram of an apparatus  10  as an exemplary embodiment of the inventive hardware apparatus. In the case of this exemplary embodiment of the invention, the radio transmission between the base station and the mobile radio is based on the UMTS standard.  
         [0055]    Arranged downstream of an input, input, on the apparatus  10  is an input register sample_reg, which is connected to an input 2:1 multiplexer MUX 1 . A control input on the 2:1 multiplexer MUX 1  has a control signal  110  applied to it. The output of the 2:1 multiplexer MUX 1  is connected to an input on a multiplier MULT 1 . A further input on the multiplier MULT 1  has a scaling factors applied to it. Connected downstream of the multiplier MULT 1  is an input on an adder ADD 1 . From the output of the adder ADD 1 , lines are routed to an input register inreg 0 , to an output register outreg 1  and to an output, output, on the apparatus  10 . The input register inreg 0  feeds a further input on the 2:1 multiplexer MUX 1 .  
         [0056]    In addition, the apparatus  10  has a buffer store CCWE_TEMP_RAM 1 . The input registers inreg 1 , inreg 2  and inreg 3  are fed by the buffer store CCWE_TEMP_RAM 1 . Connected downstream of the input registers inreg 1 , inreg 2  and inreg 3  is a respective one of the main registers (delay elements) reg 1 , reg 2  and reg 3 .  
         [0057]    From the output of the main register reg 1 , connections are routed both to an input  11  on a computation unit IIR_ARITH_ 1  and to an output register outreg 2 . From the output of the main register reg 2 , connections are routed both to an input  15  on a computation unit IIR_ARITH_ 2  and to an output register outreg 3 . The output of the main register reg 3  is connected to an input on a multiplier MULT 2 .  
         [0058]    The output registers outreg 1 , outreg 2  and outreg 3  feed a buffer store CCWE_TEMP_RAM 2 .  
         [0059]    The computation units IIR_ARITH_ 1  and IIR_ARITH_ 2  have the same design. Their schematic diagrams are shown in FIGS. 2B and 2C.  
         [0060]    The computation units IIR_ARITH_ 1  and IIR_ARITH_ 2  have inputs  11 ,  12  and  13 , and  15 ,  16  and  17 , and also an output  14  or  18 , respectively. In addition, the computation unit IIR_ARITH_ 1  or IIR_ARITH_ 2  contains a multiplier MULT 3  or MULT 4  and an adder ADD 2  or ADD 3 . The input side of the multiplier MULT 3  or MULT 4  is connected to the inputs  11  and  13  or  15  and  17 , respectively. The input side of the adder ADD 2  or ADD 3  is connected to the input  12  or  16  and to the output of the multiplier MULT 3  or MULT 4  respectively. From the output of the adder ADD 2  or ADD 3 , a connecting line is routed to the output  14  or  18  respectively.  
         [0061]    Input  12  of the computation unit IIR_ARITH_ 1  is connected to the output  18  of the computation unit IIR_ARITH_ 2 . The input  13  is provided with a filter coefficient a 1 . The output  14  is routed to an input on the adder ADD 1 .  
         [0062]    The input  16  of the computation unit IIR_ARITH_ 2  is connected to the output of the multiplier MULT 2 . The input  17  has a filter coefficient a 2  applied to it.  
         [0063]    An input on the multiplier MULT 2  has a filter coefficient a 3  applied to it.  
         [0064]    The scaling factor s is transmitted to the multiplier MULT 1  using a unit scale 1 . The unit scale 1  stores scaling factors in registers s_l, s_ 2 , s_ 3  and s_ 4 . The scaling factors have been calculated beforehand by a digital signal processor DSP and have been stored in the registers s_ 1 , s_ 2 , s_ 3  and s_ 4 . A  4 : 1  multiplexer MUX 2  connects the necessary scaling factor to the multiplier MULT  1 .  
         [0065]    A further unit scale 2  contains “shadow registers”. The unit scale 2  has the same design as the unit scale 1 . During the time in which the scaling unit scale 1  is used to provide the scaling factor s, the digital signal processor DSP is able to store scaling factors which are required at a later time in the unit scale 2 . A control signal  111  indicates when the functions of the units scale 1  and scale 2  are interchanged.  
         [0066]    The filter coefficients a 1 , a 2  and a 3  are likewise calculated by the digital signal processor DSP and are then stored in a unit par 1 . For the filter coefficient a 1 , the registers a 1 _l, a 1 _ 2 , a 1 _ 3  and a 1 _ 4  are provided in the unit par 1 . Correspondingly, the filter coefficients a 2  and a 3  are stored in the registers a 2 _ 1 , a 2 _ 2 , a 2 _ 3  and a 2 _ 4 , and a 3 _ 1 , a 3 _ 2 , a 3 _ 3  and a 3 _ 4 , respectively. Using 4:1 multiplexers MUX 3 , MUX 4  and MUX 5 , a respective register value is connected to the multipliers MULT 3 , MULT 4  and MULT 2 .  
         [0067]    A further unit par 2  contains shadow registers for the scaling factors a 1 , a 2  and a 3 . The unit par 2  has the same design as the unit par 1 . The control signal  111  indicates which of the units par 1  and par 2  has been activated.  
         [0068]    The text below describes the way in which the apparatus  10  works.  
         [0069]    The fundamental idea of the apparatus  10  is based on the way in which the apparatus  1  shown in FIG. 1 works, i.e. the number of filter passes by the pilot symbols is variable. In the apparatus  10 , however, this is not produced by a cascaded structure of low-pass filters, as in the apparatus  1 , but rather by just one low-pass filter which is operated using a time-division multiplex method.  
         [0070]    One particular characteristic of the apparatus  10  is the 2:1 multiplexer MUX 1 , which selects either the pilot symbol which is received at the input, input, and is stored in the input register sample_reg or selects the pilot symbol which is in the input register inreg 0  and has already been filtered beforehand for further processing. The setting for the 2:1 multiplexer MUX 1  is stipulated by means of the control signal  110 . The control signal  110  can be produced, by way of example, by a finite state machine which stipulates the order of events in the time-division multiplexed filter cascade.  
         [0071]    The pilot symbol connected by the 2:1 multiplexer MUX 1  is first multiplied by the scaling factor s in a multiplier MULT 1  and is then subjected to low-pass filtering.  
         [0072]    The low-pass filter contained in the apparatus  10  is a third-order IIR filter. The three main registers reg 1 , reg 2  and reg 3  characterize a filter stage&#39;s output which is delayed by one, two or three time units and is injected into the input again. In addition, the low-pass filter&#39;s transfer function is determined by the filter coefficients a 1 , a 2  and a 3 .  
         [0073]    The values which the main registers reg 1 , reg 2  and reg 3  require for each filter pass are stored in the buffer store CCWE_TEMP_RAM 1  and are made available to the main registers reg 1 , reg 2  and reg 3  via the input registers inreg 1 , inreg 2  and inreg 3 .  
         [0074]    Directly after a filter pass (a processing clock cycle), the pilot symbol previously selected by the 2:1 multiplexer MUX 1  and now filtered is available at the output, output, and can be tapped off there. This filtered pilot symbol is also written to the input register inreg 0  and to the output register outreg 1 . Furthermore, the value which is passed through the main register reg 1  during the filter process is written to the output register outreg 2 , and the value which has passed through the main register reg 2  is written to the output register outreg 3 . The contents of the output registers outreg 1 , outreg 2  and outreg 3  are buffer-stored in the buffer store CCWE_TEMP_RAM 2 . At a later time, they can be loaded again from there via the input memories inreg 1 , inreg 2  and inreg 3  into the main registers reg 1 , reg 2  and reg 3 .  
         [0075]    Subsequently, either a new pilot symbol received at the input, input, and stored in the input register sample_reg or the pilot symbol which is in the input register inreg 0  and has already been filtered beforehand can be filtered.  
         [0076]    While the 2:1 multiplexer MUX 1  has been set such that the pilot symbol stored in the input register inreg 0  passes through the low-pass filter in the apparatus  10 , this can be regarded as having the same effect in terms of result as filtering an output value from a filter stage  5 ,  6  or  7 , shown in FIG. 1, using the respective downstream filter stage.  
         [0077]    In one particular embodiment of the apparatus  10 , each pilot symbol received at the input, input, is filtered four times in the apparatus  10 . This corresponds to the progressive filtering, shown in FIG. 1, by the filter stages  5 ,  6 ,  7  and  8 . In addition, this embodiment involves the operating clock rate for the apparatus  10  being much higher than the chip rate of the CPICH signal received by the mobile radio. By way of example, the operating clock rate at which the apparatus  10  is operated is 124.8 MHz. In the case of UMTS systems, the chip rate is generally 3.84 MHz.  
         [0078]    A pilot symbol passes through the low-pass filter in the apparatus  10  once during an operating clock cycle. Consequently, four operating clock cycles in the apparatus  10  are required in order to filter a pilot symbol four times, which corresponds to the pass through the filter stages  5 ,  6 ,  7  and  8  in FIG. 1.  
         [0079]    The order of events in the filtering of a newly arriving pilot symbol using the apparatus  10  (shown in FIG. 2A) with four-fold time-division multiplexing (or using the four filter stages  5 ,  6 ,  7  and  8  in the apparatus  1  shown in FIG. 1) can be summarized in the manner below.  
         [0080]    First Time-Division Multiplexed Filtering (First Operating Clock Cycle) in the Apparatus  10  (or Filtering in the Filter Stage  5 ):  
         [0081]    From the buffer store CCWE_TEMP_RAM 1 , the register contents based on the last filtering performed are loaded into the input registers inreg 1 , inreg 2  and inreg 3 . When the pilot symbol arrives (input register sample_reg), the contents are transferred to the main registers reg 1 , reg 2  and reg 3 , the arithmetic calculations are performed, and in the next step the events are transferred via the output registers outreg 1 , outreg 2  and outreg 3  to the buffer store CCWE_TEMP_RAM 2 . All operating steps are performed using the pipeline method, which means that effectively only one operating clock cycle is required. The output values are available in the buffer store CCWE_TEMP_RAM 2  for filtering the next pilot symbol which arrives. Prior to filtering the next pilot symbol which arrives, the roles of the buffer stores CCWE_TEMP_RAM 1  and CCWE_TEMP_RAM 2  need to be reversed.  
         [0082]    Second Time-Division Multiplexed Filtering (Second Operating Clock Cycle) in the Apparatus  10  (or Filtering in the Filter Stage  6 ):  
         [0083]    In the second operating clock cycle, the result of the filtering by the first time-division multiplexed filter stage needs to pass through the second time-division multiplexed filter stage. The result of the first time-division multiplexed filter stage, which is stored in the input register inreg 0 , is supplied to the second filter stage via the 2:1 multiplexer MUX 1  (in contrast to the first time-division multiplexed filtering, in which the newly arrived pilot symbol was processed). In addition, the register contents for the second time-division multiplexed filtering of the preceding pilot symbol are loaded from the buffer store CCWE_TEMP_RAM 1  into the input registers inreg 1 , inreg 2  and inreg 3 , from where they are transferred to the main registers reg 1 , reg 2  and reg 3 . Next, the contents of the input register inreg 0  and of the main registers reg 1 , reg 2  and reg 3  are used to perform the arithmetic procedures, the contents of the output registers outreg 1 , outreg 2  and outreg 3  are loaded into the buffer store CCWE_TEMP_RAM 2 , and the result of the filtering, which can be tapped off at the output, output, is transferred to the input register inreg 0 , where it is available as an input signal for the third time-division multiplexed filtering.  
         [0084]    The third and fourth time-division multiplexed filtering (or the filtering in the filter stages  7  and  8 ) is performed in line with the method described above.  
         [0085]    Upon the next incoming pilot symbol, the roles of the buffer stores CCWE_TEMP_RAM 1  and CCWE_TEMP_RAM 2  are reversed.  
         [0086]    In addition, the time-division multiplexing mode of the apparatus  10  allows not just a CPICH signal but also all of this signal&#39;s transmission paths detected in the mobile radio to be handled using the apparatus  10 . To detect the various transmission paths, the mobile radio&#39;s RAKE receiver orients the respective RAKE finger towards a transmission path. By way of example, a total of 32 RAKE fingers are oriented towards the transmission paths. For every RAKE finger, four successive operating clock cycles in the apparatus  10  are reserved. During these four operating clock cycles, a pilot symbol provided by the RAKE finger is filtered four times. A pilot symbol for the next RAKE finger is then filtered four times.  
         [0087]    The procedure described above is shown in FIG. 3. The top part of FIG. 3 shows the chip rate  120  in a UMTS system. The bottom part shows the operating clock  121  in the apparatus  10 .  
         [0088]    [0088]FIG. 3 shows that pilot symbols are generated by the RAKE fingers only during the first four chips in an interval comprising 256 chips. On account of the high operating clock rate of the apparatus  10 , all of the pilot symbols generated by the 32 RAKE fingers in this interval can be handled by the apparatus  10  during the first four chips. In this case, a pilot symbol is generated by a RAKE finger in every fourth operating clock cycle. This pilot symbol is subsequently available at the input, input, on the apparatus  10  and can be conditioned for the channel estimation during four operating clock cycles (four time-division multiplexed filter stages or four filter stages).  
         [0089]    While the 32 pilot symbols are being conditioned, the values in the output registers outreg 1 , outreg 2  and outreg 3  are written to the buffer store CCWE_TEMP_RAM 2  after each individual time-division multiplexed filter stage (four filter stages). As soon as the RAKE fingers produce pilot symbols again after a pause of 252 chips, the functions of the two buffer stores CCWE_TEMP_RAM 1  and CCWE_TEMP_RAM 2  are reversed, which means that the buffer store CCWE_TEMP_RAM 2  now delivers the values for the input memories inreg 1 , inreg 2  and inreg 3 , and the values in the output memories outreg 1 , outreg 2  and outreg 3  are stored in the buffer store CCWE_TEMP_RAM  1 .  
         [0090]    The values stored in the buffer stores CCWE_TEMP_RAM 1  and CCWE_TEMP_RAM 2  are complex numbers whose real and imaginary parts each comprise 16 bits. The result of this is that the buffer stores CCWE_TEMP_RAM 1  and CCWE_TEMP_RAM 2  each need to have a minimum storage capacity of 32×4×3×2×16 bits. In the above product, the first factor ( 32 ) relates to the number of RAKE fingers, the second factor ( 4 ) relates to the number of filter passes per pilot symbol, the third factor ( 3 ) relates to the number of main registers reg 1 , reg 2  and reg 3 , and the last two factors (2×16 bits) relate to the word length of the values which are required for the main memories reg 1 , reg 2  and reg 3 .  
         [0091]    In addition, the scaling factor s and the filter coefficients a 1 , a 2  and a 3  are required in order to operate the apparatus  10 . The scaling factor s is obtained from the unit scale 1  or scale 2 . The filter coefficients a 1 , a 2  and a 3  are provided by the unit par 1  or par 2 . Four different values (four filter stages) are respectively available both for the scaling factor s and for the filter coefficients a 1 , a 2  and a 3 . These values are progressively forwarded to the respective multipliers MULT 1 , MULT 2 , MULT 3  and MULT 4  within a pilot symbol&#39;s four filter passes using the 4:1 multiplexers MUX 2 , MUX 3 , MUX 4  and MUX  5 .  
         [0092]    While the values stored in the units scale 1  and par 1  are being used to operate the apparatus  10 , for example, the digital signal processor DSP can calculate new values for the scaling factor s and the filter coefficients a 1 , a 2  and a 3  and can store these values in the registers of the units scale 2  and par 2 . When a time marker arrives, for example the start of a frame or the start of a TTI, the units scale 2  and par 2  can then be replaced by the units scale 1  and par 1 .  
         [0093]    [0093]FIG. 4 schematically shows the implementation of the apparatus  10  in the mobile radio. The apparatus  10  is controlled by a control unit  20 . The control unit  20  receives control signals  130  from other units in the mobile radio, and these control signals are used by the control unit  20  to generate control signals  131 ,  132 ,  133  and  134 .  
         [0094]    The control signal  131  can be used to activate and deactivate the filter function in the apparatus  10 . By way of example, the filter function is deactivated in compressed mode if the mobile radio is being operated at another frequency extraneous to the cell (measurement on monitor cells).  
         [0095]    The control signal  132  is used to control a gate  21  which is connected downstream of the output, output, of the apparatus  10 . The gate  21  selects the pilot symbol provided at the output, output, of the apparatus  10 , said pilot symbol being intended to be processed further. In the present case, the gate  20  undertakes the function which befits the 4:1 multiplexer  9  in FIG. 1. By way of example, the four filter stages  5 ,  6 ,  7  and  8  need to reach a steady state after the initialization of a RAKE finger before the filter results can be used further. During this period of time, which can be as much as a period comprising four pilot symbols, the output of one of the filter stages  5  or  6  can be routed out for further use by default, since these filter stages actually deliver a usable value after the period comprising one or two pilot symbols.  
         [0096]    The output of the gate  21  is connected to an input on a 2:1 multiplexer  22 . The other input of the 2:1 multiplexer  22  has the value 0 applied to it. The 2:1 multiplexer  22  is controlled by the control signal  133 . The 2:1 multiplexer  22  allows the incoming pilot symbols to be weighted with the factor 0. This can be performed, by way of example, in compressed mode or after a new RAKE finger has been initialized. By way of example, during the first pilot symbols after a RAKE finger has been initialized, the contributions made by this RAKE finger to the maximum ratio combining are weighted with “zero” until the associated filter stages have reached a steady state.  
         [0097]    The control signal  134  is used to control a downstream MRC unit. This allows the MRC unit to be disconnected entirely in compressed mode.