Abstract:
An embedded PCB, a multi-layer PCB using the embedded PCB, and a method of manufacturing the same are provided. The method of manufacturing an embedded PCB includes a first step of patterning an insulating layer on which a photoresist layer is formed using a laser such that parts of the insulating layer are selectively etched to form a circuit pattern region and a second step of filling the circuit pattern region with a plating material to form a circuit pattern. Accordingly, the method of manufacturing an embedded PCB can simultaneously or sequentially etch a photoresist layer and an insulating layer using a laser to form a circuit pattern so as to obtain a micro pattern and simplify a manufacturing process and achieve alignment accuracy in construction of a multi-layer PCB using the embedded PCB to thereby improve product reliability and yield.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
       [0001]    This application claims the benefit under 35 U.S.C. §119 of Korean Patent Application No. 10-2009-0116879, filed Nov. 30, 2009, which is hereby incorporated by reference in their entirety. 
       BACKGROUND OF THE DISCLOSURE 
       [0002]    1. Field of the Invention 
         [0003]    The present invention relates to a method of manufacturing a printed circuit board (PCB) and a PCB structure manufactured by the method. 
         [0004]    2. Discussion of the Related Art 
         [0005]    A PCB, obtained by printing a circuit line pattern on an electrically insulating substrate using a conductive material such as copper, refers to a board before electronic components are mounted thereon. That is, the PCB is a circuit board that defines mounting positions of various electronic components and fixes a line pattern, printed thereon, for connecting the components such that the various electronic components are mounted on the board. 
         [0006]    Methods of manufacturing the PCB use photolithography that has advantages of high productivity and low manufacturing cost. Methods of manufacturing the PCB board using photolithography include a subtractive process, a full additive process, and a semi-additive process. Particularly, the semi-additive process draws attraction since it can form a micro circuit pattern. 
         [0007]    Referring to  FIG. 1 , the subtractive process forms a metal layer  2  on an insulating layer  1  (a), coats photoresist  3  on the metal layer  2 , patterns the photoresist layer  3  through exposure and development (b), etches the metal layer  2  to form a circuit pattern (c), and removes the photoresist (d). 
         [0008]    Referring to  FIG. 2 , the semi-additive process forms a seed layer  5  on an insulating layer  1  (a), forms a photoresist pattern  3  on the seed layer  5  (b), fills a metal material in the photoresist pattern  3  to form a circuit pattern (c), removes the photoresist pattern (d), and eliminates the seed layer  5  (e). 
         [0009]    However, the above conventional processes are difficult to secure reliability in micro circuits because of a variation in patterns during photolithography and adhesion of materials in the micro circuits. 
         [0010]    With the recent high integration of semiconductor chips and increase in a signal transfer rate, circuit miniaturization and PCB technology for achieving high electrical property, high reliability and high functionality are required. Accordingly, an embedded PCB having a circuit pattern embedded in an insulator, as shown in  FIG. 3 , is considered. 
         [0011]    Referring to  FIG. 3 , a conventional method of manufacturing an embedded PCB includes a step (a) of preparing a carrier substrate having a metal layer  20  and an insulating layer  10  supporting the metal layer  20 , a step (b) of coating photoresist on the metal layer  20  and patterning the photoresist to form a photoresist pattern  30 , a step (c) of filling the photoresist pattern  30  with a metal material  40 , a step (d) of removing the photoresist pattern to form a circuit pattern, a step (e) of aligning the carrier substrate on an insulating layer  50  with the circuit pattern  40  facing the insulating layer  50 , a step (l) of pressing the carrier substrate against the insulating layer  50  using a press to embed the circuit pattern in the insulating layer  50 , a step (g) of removing the metal layer, and a step (h) of removing the insulating layer. 
         [0012]    However, the above conventional method of manufacturing an embedded PCB is complicated and it is difficult to perform interlayer alignment for embedding the circuit pattern in the insulating layer. Accordingly, there is a limitation in manufacturing a multi-layer PCB using a conventional manufacturing method. 
       BRIEF SUMMARY 
       [0013]    It is an object of the present invention to provide a method of manufacturing an embedded PCB, which simultaneously or sequentially etches a photoresist layer and an insulating layer using a laser to form a circuit pattern so as to obtain a micro pattern and simplify a manufacturing process and which achieves alignment accuracy in construction of a multi-layer PCB using the embedded PCB to thereby improve product reliability and yield, and a PCB manufactured by the method. 
         [0014]    According to an aspect of the present invention, a method of manufacturing an embedded printed circuit board (PCB) comprises a first step of patterning an insulating layer on which a photoresist layer is formed using a laser such that parts of the insulating layer are selectively etched to form a circuit pattern region; and a second step of filling the circuit pattern region with a plating material to form a circuit pattern. 
         [0015]    The circuit pattern region may be formed by selectively etching the photoresist layer by the entire thickness thereof and selectively etching the insulating layer by a predetermined thickness to form a concave pattern. 
         [0016]    The circuit pattern region may be formed by sequentially or simultaneously etching the photoresist layer and the insulating layer. 
         [0017]    The second step may comprise a step of forming a metal seed layer on the insulating layer in which the circuit pattern region is formed; and a step of filling the circuit pattern region with a metal material. 
         [0018]    The metal seed layer may be formed of one or at least two of Cu, Au, Ni, Pd, In, Ti and Sn, or a conductive polymer. The metal material may include at least one of Cu, Ag, Sn, Au, Ni and Pd. 
         [0019]    The circuit pattern region may be filled with the metal material using one of electroless plating, electroplating, screen printing, sputtering, evaporation, ink jetting and dispensing or a combination thereof. 
         [0020]    The method may further comprise a third step of removing the metal seed layer on the circuit pattern and the photoresist layer. The third step may comprise a step of grinding the top face of the circuit pattern before the photoresist layer is removed. 
         [0021]    The insulating layer may be composed of a carrier layer and an insulating member formed thereon. 
         [0022]    A method of manufacturing a multi-layer PCB aligns an inner circuit board including an insulating layer and a circuit pattern formed on the top face and/or bottom face of the insulating layer with an embedded PCB having a circuit pattern partially embedded in an insulating layer, which is manufactured through the above manufacturing method, and laminates the inner circuit board and the embedded PCB. 
         [0023]    The circuit pattern is formed on the top and bottom faces of the inner circuit board, the circuit pattern of the embedded PCB may be aligned with the top and bottom faces of the inner circuit board and the embedded PCB may be laminated on the inner circuit board. 
         [0024]    According to another aspect of the present invention, a method of manufacturing an embedded PCB comprises an eleventh step of forming an insulating layer on an inner circuit board composed of an insulating layer and a circuit pattern formed on the top face and/or bottom face of the insulating layer; a twelfth step of forming a photoresist layer on the insulating layer and patterning the photoresist layer such that parts of the insulating layer are selectively etched to form a circuit pattern region; and a thirteenth step of filling the circuit pattern region with a plating material. 
         [0025]    The circuit pattern region may be formed by selectively etching the photoresist layer by the entire thickness thereof and selectively etching the insulating layer by a predetermined thickness to form a concave pattern. The circuit pattern region may be formed through laser processing. 
         [0026]    An embedded PCB manufactured by the aforementioned manufacturing method according to the present invention comprises a circuit pattern formed on an insulating layer, wherein parts of the circuit pattern are embedded in the insulating layer. The circuit pattern may be formed of at least one of Cu, Ag, Sn, Au, Ni and Pd. 
         [0027]    The embedded PCB may further comprise a metal seed layer formed on the side and bottom face of the circuit pattern other than the top face of the circuit pattern. The metal seed layer may be formed of one or at least two of Cu, Au, Ni, Pd, In, Ti and Sn, or a conductive polymer. 
         [0028]    A multi-layer PCB manufactured using the above embedded PCB comprises an inner circuit board including a first circuit pattern formed on the top or bottom face of an insulating layer; and an outer circuit board laminated on the top or bottom face of the inner circuit board, wherein a second circuit pattern formed on the outer circuit board is formed on a second insulating layer such that parts of the second circuit pattern are embedded in the second insulating layer. The first and second circuit patterns may be formed of at least one of Cu, Ag, Sn, Au, Ni and Pd. 
         [0029]    The multi-layer PCB may further comprise a metal seed layer formed on the side and bottom face of the second circuit pattern other than the top face of the second circuit pattern. The metal seed layer may be formed of one or at least two of Cu, Au, Ni, Pd, In, Ti and Sn, or a conductive polymer. 
         [0030]    According to the present invention, the method of manufacturing an embedded PCB can simultaneously or sequentially etch a photoresist layer and an insulating layer using a laser to form a circuit pattern so as to obtain a micro pattern and simplify a manufacturing process and achieve alignment accuracy in construction of a multi-layer PCB using the embedded PCB to thereby improve product reliability and yield. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0031]    The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principle of the invention. In the drawings: 
           [0032]      FIGS. 1 ,  2  and  3  are cross-sectional views showing conventional methods of manufacturing a printed circuit board (PCB); 
           [0033]      FIGS. 4 and 5  illustrate a method of manufacturing an embedded PCB according to the present invention; 
           [0034]      FIG. 6  illustrates a process of manufacturing a multi-layer PCB according to an embodiment of the present invention; and 
           [0035]      FIGS. 7 and 8  illustrate a process of manufacturing a multi-layer PCB according to another embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0036]    In methods of manufacturing an embedded PCB and a multi-layer PCB using the embedded PCB, the present invention processes photoresist and an insulating layer using a laser to form a circuit pattern so as to simplify a manufacturing process and improve the reliability of accomplished products. 
         [0037]    A method of manufacturing an embedded PCB according to the present invention comprises a first step of patterning an insulating layer on which a photoresist layer is formed using a laser such that parts of the insulating layer are selectively etched to form a circuit pattern region and a second step of filling the circuit pattern region with a plating material to form a circuit pattern. The manufacturing method may further comprise a step of removing the photoresist layer. 
         [0038]    The present invention will now be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. Like reference numerals in the drawings refer to like elements, and thus their description will be omitted. Though “first” and “second” are used to explain various components, the components are not limited by the terms and the terms are used only to discriminate one component from another component. 
       Method of Manufacturing Embedded PCB 
       [0039]      FIGS. 4 and 5  illustrate a method of manufacturing an embedded PCB according to the present invention. 
         [0040]    The method of manufacturing an embedded PCB according to the present invention includes a first step of patterning an insulating layer on which a photoresist layer is formed using a laser such that parts of the insulating layer are selectively etched so as to form a circuit pattern region and a second step of filling the circuit pattern region with a plating material to form a circuit pattern. The manufacturing method may further include a step of removing the photoresist layer. 
         [0041]    Specifically, a photoresist layer  130  is formed on an insulating layer  110  and a metal layer  120  serving as a carrier layer, in steps S 1  and S 2  shown in  FIG. 5 . The photoresist layer  130  may be formed using a coating or lamination method. The photoresist layer  130  and parts of the insulating layer  110  are etched using a laser L to form a circuit pattern region in step S 3 . That is, the photoresist layer  130  is etched by the entire thickness T 3  and the insulating layer  110  is etched by a predetermined thickness T 2  to form the circuit pattern region. Parts of the circuit pattern are embedded later in the portion of the insulating layer  100  corresponding to the thickness T 2  (Total thickness of the insulating layer=T 1 +T 2 ). The photoresist layer  130  and the insulating layer  110  may be sequentially or simultaneously etched using the laser. 
         [0042]    A seed layer  140  is formed on the insulating layer  110  and the photoresist layer  130  in which the circuit pattern region is defined in step S 4 . The seed layer  140  may be formed of one or at least two of Cu, Au, Ni, Pd, In, Ti and Sn, or a conductive polymer. Here, the conductive polymer may be at least one of polyacetylene, polypyrrole, polythiophene, poly(3-alkylthiophene), polyphenylene sulfide, polyphenylenevinylene, polythienylenevinylene, polyphenylene, polyisothianaphthene, polyazulene, polyfuran, and polyaniline. A conductive polymer layer may be formed using a solution containing a monomer of a conductive polymer and an oxidation polymer solution. The monomer of the conductive polymer may use one of acetylene, pyrrole, thiophene, 3-alkylthiophene, phenylene sulfide, phenylene, thienylenevinylene, phenylene, isothianaphthene, azulene, furan, aniline and derivatives of these materials. An organosilane coupling agent may be selectively added to the monomer solution of the conductive polymer. 
         [0043]    A metal material is filled in the circuit pattern region on which the seed layer  140  is formed to form a circuit pattern  150  in step S 5 . The circuit pattern  150  may be formed of at least one of Cu, Ag, Sn, Au, Ni and Pd. The metal material forming the circuit pattern may be filled using one of electroless plating, electroplating, screen printing, sputtering, evaporation, ink jetting and dispensing or a combination of these methods. 
         [0044]    The surface of the circuit pattern  150  may be etched through flash etching or grinding in step S 6 . The surface of the circuit pattern  150  and the seed layer formed on the photoresist layer  130  are etched until the surface of the photoresist layer  130  is exposed. 
         [0045]    Subsequently, the photoresist layer  130  is removed to accomplish an embedded PCB in step S 7 . In the structure of the PCB, the circuit pattern  150  is partially embedded in the portion of the insulating layer  110 , which corresponds to the thickness T 2 . Furthermore, the seed layer  140  is formed on the bottom face and side of the circuit pattern  150  other than the surface of the circuit pattern  150 . Here, the boundary of the circuit pattern  150  and the seed layer  140  may be indistinct when the circuit pattern  150  and the seed layer  140  are formed of the same material. The carrier layer  120  is removed later. 
       Method of Manufacturing Multi-Layer PCB 
       [0046]    A method of manufacturing a multi-layer PCB using the aforementioned embedded PCB according to an embodiment of the present invention will now be explained. 
         [0047]    Referring to  FIG. 6 , the embedded PCB manufactured through steps S 1  through S 7  shown in  FIG. 5  is prepared in step P 1 . The carrier layer  120  may be removed according to the characteristic of the insulating layer. 
         [0048]    An inner circuit board is aligned with the embedded PCB and heat and pressure are applied to the aligned inner circuit board and the embedded PCB to form a multi-layer PCB in steps P 2  and P 3 . The inner circuit board may have a structure in which a predetermined circuit pattern  170  is formed on the top and/or bottom face of an insulating layer  160 . In this case, the inner circuit board and the embedded PCB may be pressed against each other such that the insulating layer  110  of the embedded PCB is inserted into recesses formed in the inner circuit board at regions other than the circuit pattern  170 . 
         [0049]    In the structure of the multi-layer PCB manufactured through the above method, shown in P 3  of  FIG. 6 , the circuit pattern  170  (referred to as a first circuit pattern) is embedded in the insulating layer and the second circuit pattern  150  is formed on the surface of the insulating layer and partially embedded in the insulating layer. Furthermore, the metal seed layer  140  may be formed on the side and bottom face of the second circuit pattern  150  other than the top face of the second circuit pattern  150 . Here, the boundary of the second circuit pattern  150  and the metal seed layer  140  may be indistinct if the second circuit pattern  150  and the metal seed layer  140  are formed of the same material. The metal seed layer  140  and the second circuit pattern  150  are formed of the same materials as those of the aforementioned embedded PCB. 
         [0050]    A method of manufacturing a multi-layer PCB according to another embodiment of the present invention will now be explained with reference to  FIGS. 7 and 8 . 
         [0051]    In an embodiment of the invention, the accomplished embedded PCB according to the present invention is not used and an embedded PCB is formed on the top and bottom faces of an inner circuit board through the above embedded PCB manufacturing method. 
         [0052]    Specifically, an insulating layer  230  is laminated on the top and bottom faces of an inner circuit board including an insulating layer  210  and a predetermined first circuit pattern  220  formed on the top and bottom faces of the insulating layer  210  in steps Q 1  and Q 2 . 
         [0053]    A photoresist layer  240  is formed on the insulating layer  230  in step Q 3  and the photoresist layer  240  and the insulating layer  230  are selectively etched using a laser to form a circuit pattern region in step Q 4 . Here, the photoresist layer  240  is etched by the entire thickness T 3  thereof and the insulating layer  230  is etched by a predetermined thickness T 2 . 
         [0054]    A metal seed layer  250  is formed on the circuit pattern region in step Q 5 . The metal seed layer  250  may be formed of the same material as the above-described seed layer. The circuit pattern region with the metal seed layer  250  formed thereon is filled with a metal material to form a circuit pattern  260  in step Q 6 . The metal material may be identical to the above-described metal material. 
         [0055]    Step Q 5  of forming the metal seed layer  250  is essential when the metal material is filled in the circuit pattern region using electroplating in step Q 6 . However, if the metal material is filled using electroless plating, screen printing, sputtering, evaporation, ink jetting and dispensing in step Q 6 , step Q 6  may be performed after the step Q 5  or step Q 5  may be omitted. 
         [0056]    The top face of the circuit pattern  260  and the filled metal material may be etched through flash etching or grinding in step Q 7 . Here, the metal seed layer  250  formed on the circuit pattern  260  and the photoresist layer  240  is etched until the surface of the photoresist layer  240  is exposed. Subsequently, the photoresist layer  240  is removed to achieve a multi-layer PCB in step Q 8 . 
         [0057]    The multi-layer PCB manufactured according to the current embodiment may have the same structure as the multi-layer PCB manufactured according to the above embodiment shown in  FIG. 6 . 
         [0058]    While the present invention has been particularly shown in and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing the spirit and scope of the present invention as defined by the following claims.