Abstract:
A method of fabricating a pixel electrode of a liquid crystal display uses an etchant that has low damage to metals to thereby enhance yields. In the method, a protective film covers a switching device, and a contact hole is defined at the protective film in such a manner to expose one electrode of the switching device. The pixel electrode, connected via the contact hole to the one electrode of the switching device, is formed on the protective film by using a low-temperature process in which a Hydrogen-containing gas is injected within a vacuum chamber. Accordingly, the etching process time can be shortened and damage to the metal can be virtually eliminated.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    This invention pertains to a method of fabricating a liquid crystal display having a pixel electrode, wherein an etchant having low damage to metals enhances yields of the pixel electrode and a thin film transistor.  
           [0003]    2. Description of the Related Art  
           [0004]    A liquid crystal display (LCD) with an active matrix driving system uses thin film transistors (TFT&#39;s) as switching devices to display a natural moving picture. Since such a LCD can be made into a device having a smaller size than the existent Brown tube, it has been widely used as a monitor for a personal computer or a notebook computer as well as for office automation equipment such as a copy machine or portable equipment such as a cellular phone or a pager.  
           [0005]    [0005]FIG. 1A to FIG. 1D show a conventional process of fabricating a LCD.  
           [0006]    Referring to FIG. 1A, aluminum (Al) or copper (Cu) is deposited on a transparent substrate  11  at a thickness of about 1500 to 4000 Å by a sputtering technique to form a metallic thin film. The metallic thin film is patterned by photolithography, including a wet method step, to thereby form a gate electrode  13  on the transparent substrate  11 .  
           [0007]    Referring to FIG. 1B, a gate insulating film  15 , an active layer  17  and an ohmic contact layer  19  are sequentially formed on the transparent substrate  11  by a chemical vapor deposition (CVD) technique in a manner to cover the gate electrode  13 . A gate insulating film  15  is formed by depositing an insulation material such as silicon oxide (SiO x ) or silicon nitride (SiN x ) on the transparent substrate  11  at a thickness of about 3000 to 5000 Å. The active layer  17  is formed by depositing undoped amorphous silicon or undoped polycrystalline silicon onto a portion corresponding to the gate electrode  13  on the gate insulating film  15  at a thickness of about 1500 to 2000 Å. The ohmic contact layer  19  is formed by depositing an amorphous silicon or a polycrystalline silicon doped with a n-type or p-type impurity at a high concentration onto each side portion on the active layer  17  of a thickness of about 200 to 500 Å. The ohmic contact layer  19  is not formed at a middle portion of the active layer  17 .  
           [0008]    The ohmic contact layer  19  and the active layer  17  are patterned by photolithography, including anisotropic etching, in such a manner to remain only at a portion corresponding to the gate electrode  13 .  
           [0009]    Referring to FIG. 1C, a metal such as molybdenum (Mo), chromium (Cr), titanium (Ti) or tantalum (Ta), etc., or a molybdenum alloy such as MoW, MoTa or MoNb, etc. is deposited on the gate insulating film  15  at a thickness of about 1000 to 2000 Å by CVD or sputtering to cover the ohmic contact layer  19 , thereby forming a metallic thin film. In this case, the ohmic contact layer  19  makes ohmic contact with the metallic thin film.  
           [0010]    Subsequently, a photoresist pattern  25  is formed at a portion corresponding to each side of the gate electrode  13  by coating photoresist on the metallic thin film and then exposing and developing it. The metallic thin film is wet etched according to the photoresist pattern  25  to form source and drain electrodes  21  and  23 . The exposed portion of the ohmic contact layer  19  is dry etched according to the photoresist and the source and drain electrodes  21  and  23  in a manner so as to expose the active layer  17 . At this time, the ohmic contact layer  19  is etched to be inconsistent with, i.e., offset to, the side surface of the photoresist pattern  25 , and the active layer  17  at the portion corresponding to the gate electrode  13  between the unetched ohmic contact layer  19  and the active layer  17 , thereby forming a channel.  
           [0011]    Referring to FIG. 1D, the photoresist pattern  25  is removed. A passivation layer  27  is formed on the gate insulating layer  15  so as to cover the source and drain electrodes  21  and  23 . The passivation layer  27  is made from an inorganic insulating material such as silicon nitride silicon oxide, etc. The passivation layer  27  can also be made from an organic insulation material having a small dielectric constant such as an acrylic organic compound, i.e., an acrylic, TEFLON (polytetrafluoroethylene), BCB (benzocyclobutene), CYTOP (fluoropolymer resin) or PFCB (perfluorocyclobutane), etc. Since step coverage between the active layer  17  and the source and drain electrodes  21  and  23  becomes reduced due to the ohmic contact layer  19 , a surface evenness of the passivation layer  27  increases.  
           [0012]    Then, the passivation layer  25  is patterned by the photolithography to define a contact hole  28  for exposing the drain electrode  23 . A transparent conductive material such as indium tin oxide (ITO), tin oxide (TO) or indium zinc oxide (IZO) is deposited onto the passivation layer  27  in a manner to contact the drain electrode  23  via the contact hole  28 . The transparent conductive material is then patterned by photolithography to form a pixel electrode  29 .  
           [0013]    Prior to deposition of the pixel electrode  29 , pre-heating is first performed. After pre-heating, the pixel electrode  29  is deposited in a high-temperature vacuum chamber at a deposition temperature of more than 400° C. Upon deposition at high temperature, the pixel electrode  29  crystallizes.  
           [0014]    This deposition process results in the pixel electrode  29  having inferior etch characteristics due to the interplay of polyamorphous and crystalline states. As a result, it becomes necessary to use a strong acid (HCl series) etchant or to etch for an extended time period. After this etch process, the gate electrode is damaged and a metallic residue remains, thereby causing problems relating to uniformity and subsequently affect to the post process. As a result, there is a need to manufacture liquid crystal displays utilizing etch technologies that minimize damage to the display structure.  
         SUMMARY OF THE INVENTION  
         [0015]    Accordingly, the present invention provides a method of fabricating a pixel electrode of a liquid crystal display wherein a weak acid etchant having a low metal damage characteristic is used to etch the pixel electrode to yield an etching process having a short etch time to thereby prevent damage to the metal.  
           [0016]    The invention, in part, pertains to a method of fabricating a pixel electrode in a liquid crystal display including a switching device for driving the pixel electrode, the method including depositing a protective film over a substrate to cover the switching device, defining a contact hole in the protective film to expose one electrode of the switching device, and forming the pixel electrode connected, via the contact hole, to said one exposed electrode. The pixel electrode is formed by placing the substrate in a vacuum chamber and injecting Hydrogen-containing gas at a temperature of less than about 400° C. The method further includes forming a gate electrode over the substrate, entirely depositing a gate insulating film over the substrate to cover the gate electrode, and continuously depositing an active layer and an ohmic contact layer to overlap the gate electrode.  
           [0017]    The invention, in part, pertains to the pixel electrode having an amorphous structure. The pixel electrode is etched with a weak acid etchant.  
           [0018]    The invention, in part, pertains to the substrate having a temperature of less than about 200° C., preferable between about 50° C. and 150° C., when forming the pixel electrode.  
           [0019]    The invention, in part, pertains to the protective layer being a passivation layer made from an inorganic insulation material or an organic insulation material that can be one of silicon nitride, silicon oxide, an acrylic, polytetrafluoroethylene, benzocyclobutene, fluoropolymer resin or perfluorocyclobutane. The pixel electrode can be a transparent conductive material such as indium tin oxide, tin oxide or indium zinc oxide. The switching device has source and drain electrodes, and the source and drain electrodes can be Mo, Cr, Ti, Ta, MoW, MoTa or MoNb.  
           [0020]    The invention, in part, pertains to a pixel electrode of a liquid crystal display, which has a substrate, a switching device over the substrate, a protective film over a substrate covering the switching device, and a contact hole in the protective film, the contact hole exposing one electrode of the switching device, the pixel electrode being connected, via the contact hole, to said one exposed electrode, wherein the pixel electrode is formed by placing the substrate in a vacuum chamber and injecting Hydrogen-containing gas at a temperature of less than about 400° C.  
           [0021]    It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0022]    The accompanying drawings are included to provide a further understanding of the invention. The drawings illustrate embodiments of the invention and together with the description serve to explain the principles of the embodiments of the invention.  
         [0023]    [0023]FIG. 1A to FIG. 1D are sectional views for explaining a conventional art method of fabricating a pixel electrode in a liquid crystal display.  
         [0024]    [0024]FIG. 2A to FIG. 2G are section views for explaining a method of fabricating a pixel electrode in a liquid crystal display according to a preferred embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION  
       [0025]    Advantages of the present invention will become more apparent from the detailed description given herein after. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.  
         [0026]    [0026]FIG. 2A to FIG. 2G are sectional views for explaining a method of fabricating a pixel electrode in a liquid crystal display according to a preferred embodiment of the present invention.  
         [0027]    Referring to FIG. 2A, aluminum (Al) or copper (Cu) is deposited over a transparent substrate  31  at a thickness of about 1500 to 4000 Å, typically by a sputtering technique, to form a metal thin film. The metal thin film is patterned by photolithography, including a wet method step, to thereby form a gate electrode  33  over the transparent substrate  31 .  
         [0028]    Referring to FIG. 2B, a gate insulating film  35 , an active layer  37  and an ohmic contacts layer  39  are sequentially formed over the transparent substrate  31  by, e.g., a chemical vapor deposition (CVD) technique so as to cover the gate electrode  33 . The gate insulating film  35  is formed by depositing an insulation material such as silicon oxide (SiO x ) or silicon nitride (SiN x ) over the transparent substrate  31  into a thickness of about 3000 to 5000 Å. The active layer  37  is formed by depositing undoped amorphous silicon or undoped polycrystalline silicon onto a portion corresponding to the gate electrode  33  on the gate insulating film  35  at a thickness of about 1500 to 2000 Å. An ohmic contact layer  39  is formed by depositing amorphous silicon or polycrystalline silicon doped with a n-type or p-type impurities at high concentration onto each side portion, other than the middle portion thereof, on the active layer  37  at a thickness of about 200 to 500 Å.  
         [0029]    The ohmic contact layer  39  and the active layer  37  are patterned by photolithography, including an anisotropic etch, in such a manner as to leave only a portion corresponding to the gate electrode  13 .  
         [0030]    Referring to FIG. 2C, a metal such as molybdenum (Mo), chromium (Cr), titanium (Ti) or tantalum (Ta), etc., or a molybdenum alloy such as MoW, MoTa or MoNb, etc. is deposited on the gate insulating film  35  at a thickness of about 1000 to 2000 Å by CVD or sputtering to cover the ohmic contact layer  39 , thereby forming a metallic thin film. In this case, the ohmic contact layer  39  makes an ohmic contact with the metallic thin film.  
         [0031]    Subsequently, a photoresist pattern  45  is formed at a portion corresponding to each side of the gate electrode  13  by coating photoresist on the metallic thin film and then exposing and developing the photoresist. The metallic thin film is wet etched through the photoresist pattern  45  to form source and drain electrodes  41  and  43 . The exposed portion of the ohmic contact layer  39  is dry etched through the photoresist and the source and drain electrodes  41  and  43  to expose the active layer  37 . At this time, the ohmic contact layer  39  is etched to be inconsistent, i.e., offset, with the side surface of the photoresist pattern  45 , and the active layer  37  at the portion corresponding to the gate electrode  33  between the ohmic contact layer  39  remains unetched to form a channel over the active layer  37 .  
         [0032]    Referring to FIG. 2D, the photoresist pattern  45  is removed. A passivation layer  47  is formed on the gate insulating layer  35  to cover the source and drain electrodes  41  and  43 . The passivation layer  47  is made from an inorganic insulating material that can be but is not restricted to silicon nitride or silicon oxide, or an organic insulation material having a small dielectric constant that can be but is not restricted to an acrylic organic compound (acrylic), TEFLON (polytetrafluoroethylene), BCB (benzocyclobutene), CYTOP (fluoropolymer resin) or PFCB (perfluorocyclobutane), etc.  
         [0033]    Referring to FIG. 2E, the passivation layer  47  is patterned by the photolithography to define a contact hole  48  for exposing the drain electrode  43 . A transparent conductive material that can be but is not restricted to indium tin oxide (ITO), tin oxide (TO) or indium zinc oxide (IZO) is deposited onto the passivation layer  47  in such a manner as to be in contact with the drain electrode  43  via the contact hole  48 . The transparent conductive material is then patterned by photolithography, thereby forming a pixel electrode  49 .  
         [0034]    Referring to FIG. 2F, in order to operate a liquid crystal cell having the pixel electrode  49  provided over the substrate  31 , the pixel electrode  49  is deposited by the sputtering technique after a RGB (red-blue-green) pattern was formed as a common electrode.  
         [0035]    This process of depositing the pixel electrode  49  by sputtering is conducted at low temperature using a Hydrogen-containing gas such as a vapor, i.e., H 2 O gas, within a vacuum chamber  30 . Here, low temperature means that a set temperature within the vacuum chamber  30  during sputtering is less than about 400° C. This allows the substrate temperature to be less than about 200° C., corresponding to half the set temperature, when the pixel electrode  49  is deposited in the vacuum chamber  30  having the temperature of less than about 400° C. In a preferred embodiment of the invention, the substrate has a temperature between about 50° C. and about 150° C.  
         [0036]    Accordingly, the above-mentioned deposition requires no pre-heating, as was necessary in the conventional art, for high-temperature deposition. As a result, the process time can be shortened. Also, the deposition is made at low temperature in the vacuum chamber  30 , so that the pixel electrode is amorphous, thereby permitting etching using a weak acid etchant.  
         [0037]    Etching the amorphous electrode using a weak acid etchant allows the etching time to be reduced to about one fifth to one sixth the time compared, to etching using a conventional art strong acid etchant technology. This also allows the baking process for the etch to be simplified. Furthermore, a weak acid etchant causes virtually no damage to the metal electrode and thereby assures a high yield. The weak acid etchant additionally virtually eliminates the possibility or leaving a residual substance film, owing to the fast etching rate of the pixel electrode film itself. Consequently, the pixel electrode  49  of the liquid crystal display is formed as shown in FIG. 2G.  
         [0038]    As described above, the present invention deposes a pixel electrode by a sputtering technique conducted at a low temperature under a Hydrogen-containing gas, followed by an etch using a weak acid etchant, so that it becomes possible to shorten the etching process time as well as virtually eliminating damage to the metal.  
         [0039]    Although the present invention has been explained by the embodiments shown in the drawings described above, it should be understood by a person having ordinary skill in the art that the invention is not limited to the embodiments, but rather that various changes or modifications thereof are possible without departing from the scope and spirit of the invention. Accordingly, the scope of the invention shall be determined only by the appended claims and their equivalents.