Abstract:
The present invention discloses a smart driving method for a secondary synchronous rectifier of an isolated converter and its apparatus thereof. The apparatus comprises: a main circuit having a secondary synchronous rectifier Q 1;  a differentiation filter circuit, filtering the drain-source voltage Vds of the secondary synchronous rectifier, comprising a capacitor and at least one resistor connected in series and outputting a filtered voltage Vf from either between said capacitor and said at least one resistor or between said at least one resistor; a smart driver, receiving Vf and Vds and putting out a driving signal to the gate of the secondary synchronous rectifier. The control approach is fulfilled by comparing Vds to a reference voltage Vthr 2  and comparing the absolute value of Vf to another reference voltage Vthr 3.  When Vds&lt;Vthr 2  and |Vf|&gt;Vthr 3,  Q 1  is turned on. When Vds&gt;Vthr 1,  Q 1  is turned off, where Vthr 1  is a predetermined reference voltage. The driving is reliable with an additional differentiation filter circuit to eliminate error trigger.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims the benefit of Chinese Patent Application No. 200810096214.8, filed on Apr. 30, 2008, which is incorporated herein by reference in its entirety. 
       TECHNICAL FIELD 
       [0002]    The present invention relates to an improved driving scheme for a synchronous rectifier. 
       BACKGROUND 
       [0003]    Generally speaking, two types of rectifying schemes may be used in the secondary side of a flyback converter: (1) non-synchronous rectifying which requires a diode ( FIG. 1A ) and (2) synchronous rectifying which rectifies the current through controlling on/off of a synchronous rectifier, e.g. an N-MOSFET ( FIG. 1B ). The voltage-current characteristic is plotted in  FIG. 1C , for a diode (curve  12 ) and a synchronous rectifier (curve  11 ). In practical applications, the work area of a low power flyback power converter always falls into the shadowed area. The resistance of a synchronous rectifier is less than that of a diode in the area because curve  11  is always above curve  12 . So, compared with using a diode, a scheme that uses a synchronous rectifier is more preferable because of less power waste and better efficiency. Synchronous rectifiers have thus found increasingly wide applications in devices sensitive to power efficiency, such as laptop adapters, wireless equipment, LCD power management modules and so on. 
         [0004]    There are two methods for driving a synchronous rectifier. One method controls on/off of the synchronous rectifier based on the switching signal of the primary side switch. The drawback of this method is high cost for its relatively complicated structure. Furthermore, when light load or no load occurs, the control result is not always reliable. 
         [0005]    A better method is independent on the primary side switching signal, but instead utilizes the characteristic of the body diode in a MOSFET. The method simulates the working function of a Schottky Diode, where the MOSFET will be turned on at forward-biased voltage and turned off at reversed-biased voltage.  FIG. 2A  shows a flyback power converter with a secondary synchronous rectifier Q 1 , arranged in the low side of the converter, with its source terminal connected to the ground terminal.  FIG. 2B  shows the waveform of Vds, the drain to source voltage of Q 1 . Vthr 1  and Vthr 2  are threshold voltages predetermined both lower than 0V and Vthr 2  is lower than Vthr 1  but higher than −Vcon, and Vcon is the voltage across body diode of Q 1 . Signal Vg drives gate of Q 1  to turn it on when Vds is lower than Vthr 2  and turn it off when Vds is higher than Vthr 1 . 
         [0006]    When rectifier Q 1  is off, switch A turns on with a direct current voltage Vin applied on the primary side of transformer T 1 , which inducts a voltage on the secondary side of T 1  and makes body diode of Q 1  reversed-biased. Vds can be given by Vds=(N 2 /N 1 )*Vin+Vout, here N 1  and N 2  standing for the winding turns of the primary and secondary side of T 1  respectively. At time t=t 1 , switch A is cut off, leading to a reversed voltage induced across the secondary side of T 1 , so energy can be supplied to load through the forward-biased body diode of Q 1 . Forward-biasing of body diode makes Vds drop to a lower level equal to −Vcon, which is lower than Vthr 2 , so a driving signal is applied to gate of Q 1  and turns it on. When Q 1  enters into the equilibrium state, Vds can be expressed as Vds=−Rdson*I, in which I is source-drain current of Q 1  and Rdson is the on-resistance of Q 1 . With the source-drain current decays, Vds rises gradually. At time t=t 2 , Vds rises to higher than Vthr 1 , which turns Q 1  off. With the repetition of switching of switch A, the whole process repeats. 
         [0007]    The drawback of this method is that it may cause false triggers under some conditions. Referring to  FIG. 2B , after the time t 1  when Q 1  is turned on, there is a short period during which Vds fluctuates rapidly. If Vds rises to a value higher than Vthr 1  as point A in  FIG. 2B , Q 1  will be turned off falsely. And after time t 2  when Q 1  is turned off, if body diode of Q 1  is turned on again for the residual current, Vds may drop to a value lower than Vthr 2  as point B in  FIG. 2B , Q 1  will be turned on falsely. 
       SUMMARY 
       [0008]    A smart driving apparatus for a synchronous rectifier is disclosed. The main circuit has a synchronous rectifier, a differentiation filter circuit which receives drain-source voltage of the synchronous rectifier and outputs a differentiation signal, a smart driver which receives voltage on the drain terminal of said rectifier, voltage on the source terminal of said rectifier and the output signal of said differentiation filter circuit to control on/off of the rectifier. 
         [0009]    In one embodiment, the rectifier will not be turned on until the drain-source voltage of the rectifier is lower than Vthr 2  and the output signal of said differentiation filter circuit is lower than Vthr 3 . With this approach, false turning on of the rectifier shortly after turn-off can be avoided. The condition for turning off the rectifier is that the drain-source voltage of the rectifier is higher than Vthr 1 . To avoid false turning off of the rectifier shortly after being turned on further, the condition for turning off the rectifier is that the drain-source voltage of the rectifier is higher than Vthr 1  and the output signal of the differentiation filter circuit is higher than Vthr 4 , where Vthr 4  equals to Vthr 3 . 
         [0010]    In one embodiment, a differentiation filter circuit comprises a capacitor and at least one resistor connected in series, one end of the capacitor receiving the drain-source voltage and the other end of the capacitor connected to one end of the at least one resistor, the other end of the at least one resistor connected to the source terminal of the rectifier. The output signal of the differentiation filter circuit can be derived from node either between the capacitor and the at least one resistor or between the at least one resistor. By adjusting value of at least one resistor and/or value of the capacitor, the waveform of filtered voltage can be adjusted. 
         [0011]    In one embodiment, the smart driver comprises: a subtraction circuit, subtracting the source voltage from the drain voltage to output the drain-source voltage; a first comparator, with its non-inverting input receiving the drain-source voltage and its inverting input receiving a first reference voltage; a second comparator, with its inverting input receiving the drain-source voltage and its non-inverting input receiving a second reference voltage; a third comparator, with its inverting input receiving the filtered voltage and its non-inverting input receiving a third reference voltage; a AND gate, with its inputs connected to the output of the second comparator and the third comparator; a flip flop, with its reset input connected to the output of the first comparator, the set input connected to the output of the AND gate; and a driving circuit, with input connected to the output of the flip flop and output to the gate of the rectifier. 
         [0012]    In another embodiment, to avoid falsely turning on and turning off the rectifier, the smart driver further comprises a NOT gate, inverting the output of the third comparator and a second AND gate, with its inputs connected to the outputs of the first comparator and the NOT gate; where the flip flop has its reset input connected to the output of the second AND gate. 
         [0013]    In another embodiment, the smart driver further comprises: an absolute circuit, with input connected to the output of the differentiation filter circuit and outputting the absolute value of the filtered voltage to the non-inverting input of the third comparator. The absolute value of the third reference voltage is connected to the inverting input of the third comparator. 
         [0014]    In one embodiment, the smart driver includes following terminals: a source signal input connected to the source terminal of the rectifier, a drain signal input connected to the drain terminal of the rectifier, a filtered voltage input connected to the output of the differentiation filter circuit, a power input, a ground terminal connected to the source terminal of the rectifier and a driving signal output connected to the gate of the rectifier. 
         [0015]    The application of the smart driver for driving the low-side secondary synchronous rectifier of DC-DC flyback power converter is further disclosed as one embodiment of the invention, in which the power input of the smart driver is connected to the output of the power converter. 
         [0016]    The application of the smart driver for driving the high-side secondary synchronous rectifier of DC-DC flyback power converter is further disclosed as one embodiment of the invention, in which the converter comprises a powering circuit, supplying power to the smart driver. The powering circuit is a flyback converter, making use of the primary side circuit of the converter and further comprising, a secondary winding, a rectifier diode and a capacitor, with its ground connected to the source terminal of secondary synchronous rectifier and output connected to the power input of the smart driver. 
         [0017]    The application of the smart driver for driving the secondary synchronous rectifier and the secondary freewheeling rectifier of the DC-DC forward converter is further disclosed as one embodiment of the invention, in which one smart driver is for driving a secondary synchronous rectifier and another driving a secondary freewheeling rectifier. An additional powering circuit is included in the forward converter, which is a flyback converter, utilizing the primary side circuit of the forward converter, with its ground connected to the source terminal of secondary synchronous rectifier and the ground of the smart driver, output connected to the power input of the smart driver. The output of secondary side circuit of the forward converter supplies power to the smart driver for the secondary freewheeling rectifier. 
         [0018]    A smart driving method for avoiding false turning on the rectifier is disclosed, comprising: receiving a drain-source voltage of the rectifier and the differentiation signal thereof, the rectifier is turned on when the drain-source voltage of the rectifier is lower than a second reference voltage and the differentiation signal is lower than a third reference voltage, the rectifier is turned off when the drain-source voltage of the rectifier is higher than a first reference voltage. 
         [0019]    To avoid falsely turning off the rectifier further, condition for turning off the rectifier in the method is that the drain-source voltage of the rectifier is higher than a first reference voltage and the differentiation signal is higher than a fourth reference voltage, in which the fourth reference voltage could be equal with the third reference voltage. Said differentiation signal is from the differentiation filter circuit with one capacitor and at least one resistor in series, which can be derived from either between the capacitor and the at least one resistor or between the at least one resistor. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0020]    The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments of the invention and, together with the description serve to explain the principles of the invention. 
           [0021]      FIG. 1A  shows a non-synchronous rectifying scheme applied in the flyback converter. 
           [0022]      FIG. 1B  shows a synchronous rectifying scheme applied in the flyback converter. 
           [0023]      FIG. 1C  shows the voltage-current characteristics of a diode (curve  12 ) and a synchronous rectifier (curve  11 ). 
           [0024]      FIG. 2A  shows a prior art circuit for driving a secondary synchronous rectifier in the flyback converter. 
           [0025]      FIG. 2B  shows the waveform of Vds in  FIG. 2A . 
           [0026]      FIG. 3  shows a schematic block diagram illustrating the smart driving apparatus for a synchronous rectifier. 
           [0027]      FIG. 4  shows the working waveforms corresponding to the smart driver in  FIG. 3 . 
           [0028]      FIG. 5A  and  FIG. 5B  are two differentiation filter circuit embodiments for the smart driving apparatus. 
           [0029]      FIG. 6A  shows a schematic diagram disclosing the detailed structure of the smart driver. 
           [0030]      FIG. 6B  shows the working waveforms corresponding to  FIG. 4  with absolute value of the filtered voltage. 
           [0031]      FIG. 7  shows a schematic diagram illustrating the application of the smart driver for the low side secondary synchronous rectifier in a flyback converter. 
           [0032]      FIG. 8  shows a schematic diagram illustrating the application of the smart driver for the high side secondary synchronous rectifier in a flyback converter. 
           [0033]      FIG. 9  is the simulation waveform based on the embodiment illustrated in  FIG. 7 . 
           [0034]      FIG. 10  shows two exemplary structures of the differentiation filter circuit and their respective waveforms, illustrating the adjustability of the trigger point. 
           [0035]      FIG. 11  is a schematic diagram illustrating application of two smart drivers in a forward converter, one for a secondary synchronous rectifier and another for a freewheeling rectifier. 
       
    
    
     DETAILED DESCRIPTION 
       [0036]    Though the invention will be described with reference to the preferred embodiment thereof, it should be understood that the invention is not limited to said embodiments. On the contrary, it is intended to cover various modifications and substitutions to said invention included within the spirit and scope of the appended claims. To better understand the invention, more specific details will be disclosed for describing embodiments, yet one with ordinary skill in the art should know he can realize said invention departing from said specific details. Well-known materials and methods have not been described in order to avoid obscuring the present invention. 
         [0037]      FIG. 3  is a schematic block diagram illustrating a smart driving apparatus for a synchronous rectifier. The smart driving apparatus comprises a main circuit with a synchronous rectifier, a differentiation filter circuit and a smart driver. The voltages on the drain terminal and source terminal of the synchronous rectifier are delivered to the differentiation filter circuit and the smart driver. The smart driver receives the output of the differentiation filter circuit, voltages on the drain and source terminal of the synchronous rectifier, and outputs a driving signal back to control the on/off of said synchronous rectifier. In some other embodiments, the smart driver receives other input signals. 
         [0038]      FIG. 4  illustrates the working principle of the smart driving apparatus in accordance with one embodiment of the present invention. Though the description is based on an NMOSFET as the synchronous rectifier, other types of semiconductor switches can be applied, for example an IGBT. 
         [0039]    Referring to  FIG. 4  and  FIG. 2A , to avoid the rectifier being falsely turned on just after the rectifier is normally turned off and avoid the rectifier being falsely turned off just after the rectifier is normally turned on, a differentiation filter circuit is introduced to generate an output voltage Vf to further control on/off of the synchronous rectifier. Vf is a filtered voltage of Vds (drain-source voltage of the synchronous rectifier). The differentiation filter circuit is illustrated in  FIG. 5A  as one embodiment and  FIG. 5B  as another embodiment, comprising one capacitor and at least one resistor. In  FIG. 5A , the differentiation filter circuit comprises one capacitor C and one resistor R in series, with one terminal of C connected to Vds, the other terminal connected to R and the other terminal of R connected to the ground. In  FIG. 5B , the differentiation filter circuit comprises one capacitor C and two resistors of R 1  and R 2  in series. One terminal of C is connected to Vds, the other terminal is connected to one terminal of R 1 . One terminal of R 2  is connected to another terminal of R 1 , the other terminal is connected to the ground of the main circuit, and Vf is derived from the point between R 1  and R 2 . For another embodiment of the invention, the terminal of capacitor C at one end is connected to the drain voltage of the synchronous rectifier and the other end of the terminal of R is connected to the source terminal of the synchronous rectifier. 
         [0040]    The condition for turning on the rectifier is that Vds is lower than Vthr 2  and Vf is lower than Vthr 3  and condition for turning off the rectifier is that Vds is higher than Vthr 1  and Vf is higher than Vthr 4 , for which Vthr 3  and Vthr 4  may be equal. If false turning off the rectifier need not be taken into consideration, the turning off condition will be satisfied with only Vds&gt;Vthr 1 . 
         [0041]    After time t 0 , switch A in primary side of transformer is turned on and secondary synchronous rectifier is kept off, Vds is given by Vds=(N 2 /N 1 )*Vin+Vout, here N 1  and N 2  standing for the winding turns of the primary and secondary side of T 1  respectively, Vout being output voltage of main circuit. At time t=t 1 , switch A in primary side is turned off, leading to a reversed voltage induced across the secondary side of T 1 , so energy can be supplied to load through the forward-biased body diode of Q 1 . The forward-biasing of body diode makes Vds lower to −Vcon, which further decreases Vf, Vcon representing the on-voltage of Q 1 . When it is satisfied that Vds&lt;Vthr 2  and Vf&lt;Vthr 3 , driving signal Vg is set to high, thus turning on Q 1 . 
         [0042]    After Q 1  is turned on, Vds fluctuates rapidly and may rises to higher than Vthr 1 . because Vf is still lower than Vthr 4  under the condition, false turning off Q 1  can be avoided. After Q 1  is turned on, Vds changes in accordance with expression Vds=−Rdson*I. With the secondary current I decaying, Vds rises gradually. At time t=t 2 , it is satisfied that Vds&gt;Vthr 1  and Vf&gt;Vthr 4 , driving signal Vg is set to low, thus turning off Q 1 . After Q 1  is turned off, residual current may flow through body diode of Q 1  again, making Vds&lt;Vthr 2 , for Vf is still higher than Vthr 3 , false turning on Q 1  can be avoided. 
         [0043]    To turn on Q 1 , it is required that Vds must be lower than Vthr 2 , so value of Vthr 2  should be set slightly higher than −Vcon, yet lower than −Rdson*I. Vthr 1  should be higher than Vthr 2 , better conversion efficiency and reliability can be achieved through setting Vthr 1  to an appropriate value. Q 1  will be turned off too early if Vthr 1  is set too low, so interval during which the current flowing through body diode of Q 1  will become longer, with a consequence of more power wasted and efficiency decreased for the relative higher voltage drop across Q 1 &#39;s body diode. Q 1  will be turned off too late if Vthr 1  is set too high, and there may be a period of time during which Q 1  and switch A are both on, thus affecting the output stability and even damaging Q 1  for the inverse flow of current through Q 1 . In order to make it applicable in all situations from DCM to CCM, an appropriate value of Vthr 1  should be set with the load taken into consideration. Vthr 3  should be slightly higher than Vf filtered from Vds at the time t=t 1  when Vds drops quickly. The setting of Vthr 4  should make it satisfied that when Vf is higher than Vthr 4 , voltage fluctuation just after Q 1  is normally opened has disappeared or Vds caused by the fluctuation is lower than Vthr 1 . 
         [0044]      FIG. 6A  is an exemplary schematic diagram of a smart driver which is used for driving synchronous rectifier and also for realizing the control method in accordance with one embodiment of the present invention. To be simple, Vthr 3  and Vthr 4  could be equal in one embodiment, so only three comparators are enough to fulfill the smart driving in accordance with one embodiment. Thus condition for turning off Q 1  is that Vds is higher than Vthr 1  and Vf is higher than Vthr 3  and condition for turning on Q 1  is that Vds is lower than Vthr 2  and Vf is lower than Vthr 3 . The smart driver comprises following terminals, terminal VS connected to the source terminal of Q 1 , terminal VD connected to the drain terminal of Q 1 , terminal VF connected to the output of differentiation filter circuit, terminal VCC as power input, terminal GATE is connected to the gate of Q 1  to drive Q 1  and terminal GND is also connected to the source terminal of Q 1 . Sampling precision of terminal VS is generally higher than that of terminal GND. 
         [0045]    The smart driver  600  in  FIG. 6A  comprises: a subtraction circuit  61 , an absolute circuit  62 , a first comparator  631 , a second comparator  632 , a third comparator  633 , a PWM logic circuit, a driving circuit  65 , and an UVLO and voltage regulation circuit. Said subtraction circuit  61  subtracts voltage on terminal VS from that on terminal VD, outputting Vds to the non-inverting terminal of comparator  631  and to the inverting terminal of comparator  632 . To avoid the problem that a comparator can&#39;t work normally with a great negative value input, an absolute circuit  62  is arranged between terminal VF and comparator  633  in one embodiment, the absolute value of terminal VF is inputted to the non-inverting terminal of comparator  633 . Vthr 1  is connected to the inverting terminal of comparator  631 , Vthr 2  is connected to the non-inverting terminal of comparator  632  and Vthr 3 ′ is connected to the inverting terminal of comparator  633  where Vthr 3 ′ is the absolute value of Vthr 3 . In another embodiment of the invention, the absolute circuit is not included. VF is directly connected to the inverting terminal of comparator  633  and Vthr 3  is connected to the non-inverting terminal of comparator  633 . Said PWM logic circuit receives output from comparator  631 ,  632  and  633 , comprising: a first AND gate  641 , a second AND gate  642 , a NOT gate  644  and a flip flop  643 . The outputs of comparator  632  and comparator  633  are connected to the inputs of AND gate  641 , which generates an output signal to the SET terminal of flip flop  643 . The output of comparator  633  is also connected to the input of NOT gate  644 , which outputs to one input of AND gate  642 , the other input of AND gate  642  is connected to the output of comparator  631 . AND gate  642  outputs to the RESET terminal of flip flop  643 . When Vds falls lower than Vthr 2  and Vf lower than Vthr 3  or |Vf| higher than Vthr 3 ′, the output of AND gate  641  is turned to high, which sets flip flop  643  high, thus turning on the synchronous rectifier. When Vds rises higher than Vthr 1  and Vf higher than Vthr 3  or |Vf| lower than Vthr 3 ′, the output of AND gate  642  is turned to high, which resets flip flop  643  low, thus turning off the synchronous rectifier. Here Vthr 3 ′ is equal to |Vthr 3 |. In another embodiment of the invention, in which the possibility is ignored that rectifier may be again falsely turned off by voltage vibration just after it is normally turned on, AND gate  642  and NOT gate  644  are not included in the PWM logic circuit, thus the output of comparator  631  is directly connected to the RESET terminal of flip flop  643 . In yet another embodiment of the invention with no subtraction circuit, terminal VD is directly connected to the non-inverting terminal of comparator  631  and inverting terminal of comparator  632 . The smart driver  600  can further comprises an UVLO and voltage regulation circuit connected to terminal VCC, supplying power to the smart driver  600  and protecting the smart driver  600  from working on low voltage condition. The smart driver  600  can further comprise a driving circuit  65 , with its input connected to the output of the flip flop  643 , and its output connected to terminal GATE, which outputs signal Vg to the gate of the synchronous rectifier. 
         [0046]      FIG. 7  is one embodiment of application of the smart driver for the secondary synchronous rectifier on the low side of a flyback converter. The flyback converter in the embodiment comprises: an input circuit  70 , a switch A, a transformer T 1 , a synchronous rectifier Q 1 , a capacitor C 1 , a differentiation filter circuit  71 , a smart driver  72  and an output terminal Vout. A DC voltage, output by the input circuit  70 , is applied on the primary winding of T 1  through the switching of switch A, a relevant AC voltage is present on the secondary side of T 1  and is further converted into a DC voltage through the rectifying function of Q 1  and filtering function of C 1 , powering the load with DC voltage. In some embodiment, the load can be portable computer, wireless communication device, LCD or Ethernet device. In one embodiment, one terminal of Q 1  is connected to the ground with another terminal connected to the secondary winding N 2  of T 1 , though the embodiment is based on an NMOSFET as Q 1 , other types of semiconductor switch are also applicable. 
         [0047]    To realize the smart driving of Q 1 , the differentiation filter circuit  71  and the smart driver  72  are utilized in the embodiment. Said differentiation filter circuit  71  comprises a capacitor C 2 , a resistor R 1  and a resistor R 2 . The internal structure of the smart driver  72  is as what has been described above. 
         [0048]    To only avoid Q 1  being falsely turned on, the smart driver comprises in one embodiment: a first comparator with its non-inverting terminal connected to VD and inverting terminal connected to Vthr 1 ; a second comparator with its inverting terminal connected to VD and non-inverting terminal connected to Vthr 2 ; a third comparator with its inverting terminal connected to VF and non-inverting terminal connected to Vthr 3 ; a PWM logic circuit, comprising: a first AND gate, receiving the outputs of the second comparator and the third comparator; and a flip flop, with the RESET terminal connected to the output of the first comparator, the SET terminal connected to the output of the first AND gate; a driving circuit, receiving the output of the flip flop and driving the gate of the Q 1 ; and an ULVO circuit. 
         [0049]    To avoid Q 1  being falsely turned off and being falsely turned on, the smart driver comprises in one embodiment: a first comparator with its non-inverting terminal connected to VD and inverting terminal connected to Vthr 1 ; a second comparator with its inverting terminal connected to VD and non-inverting terminal connected to Vthr 2 ; a third comparator with its inverting terminal connected to VF and non-inverting terminal connected to Vthr 3 ; a PWM logic circuit comprising: a first AND gate, a NOT gate, a second AND gate and a flip flop, where the first AND gate with its inputs connected to the outputs of the second comparator and the third comparator, the NOT gate inverting the output of the third comparator, a second AND gate with its inputs connected to the outputs of the first comparator and the NOT gate, the flip flop with its reset input connected to the output of the second comparator, the set input connected to the output of the first comparator; a driving circuit, with its input connected to the output of the flip flop and the output to the gate of the rectifier; and an UVLO circuit. The terminal VF of the smart driver receives the filtered voltage of Vds which is differentiated by the circuit  71 , terminal VS is connected to the source terminal of Q 1 , terminal VD is connected to the drain terminal of Q 1 , terminal VCC is connected to Vout, terminal GND is connected to the ground of secondary circuit and terminal GATE drives Q 1 . Said embodiment described in  FIG. 7  can be used as an example corresponding to the waveform shown in  FIG. 4  or  FIG. 6B . 
         [0050]      FIG. 8  is another embodiment of application of the smart driver where the secondary synchronous rectifier is on the high side of a flyback converter. In the embodiment, Q 1  is connected between the positive pole of Vout and the secondary winding N 2 . Waveform of Vds in the embodiment is the same as that in the previous embodiment illustrated in  FIG. 7 , so the same driving method can be applied. The flyback converter in the embodiment comprises: an input circuit  80 , a switch A, a transformer T 1 , a synchronous rectifier Q 1 , a capacitor C 1 , a differentiation filter circuit  81 , a smart driver  82  and the output terminal Vout. Though the embodiment is based on an NMOSFET as Q 1 , other types of semiconductor switch are also applicable. 
         [0051]    The transformer T 1  comprises a primary winding N 1 , a secondary winding N 2  and a secondary winding N 3 , in which N 2  is used for providing regulated voltage of the flyback converter and N 3  for powering the smart driver  82 . In order to filter Vds, one end of R 2  in the filter circuit  81  is connected to the source terminal of Q 1  and the source terminal of Q 1  is also connected to terminal GND of the smart driver  82 . For powering circuit  82 , an additional powering circuit  83  is arranged, which comprises a the winding N 3 , a diode D 1  and a capacitor C 3 . the anode of D 1  is connected to N 3  and cathode of D 1  connected to one end of C 3 , and the other end of C 3  is connected to source terminal of Q 1 . Circuit  83  powers circuit  82  through terminal VCC of circuit  82 . Voltage on terminal VCC is higher than that on terminal GND. 
         [0052]    To realize the smart driving of Q 1 , a differentiation filter circuit  81  and a smart driver  82  as illustrated above are disposed here. Circuit  81  comprises a capacitor C 2 , a resistor R 1  and a resistor R 2 . For circuit  82 , terminal VF receives filtered voltage of Vds differentiated by circuit  81 , terminal VD is connected to the drain terminal of Q 1 , terminal VS is connected to the source terminal of Q 1 , terminal VCC receives the output from powering circuit  83 , terminal GND is connected to the source terminal of Q 1  and terminal GATE is connected to the gate of Q 1 . For circuit  81 , one end of C 2  is connected to the drain terminal of Q 1  and at the other end, R 2  is connected to the source terminal of Q 1 , thus a voltage of Vds is applied to circuit  81  and a filtered voltage is output to circuit  82  through terminal VF thereof. Said embodiment described in  FIG. 8  can be used as an example corresponding to the waveform shown in  FIG. 4  or  FIG. 6B . 
         [0053]      FIG. 9  shows the simulation waveform based on the embodiment illustrated in  FIG. 7 . During the interval from the time Q 1  is turned off to the time switch A is turned on, driving signal Vg never changes to high as illustrated in  FIG. 2C , which would make Q 1  be turned on falsely. 
         [0054]      FIG. 10  illustrates the method for adjusting the trigger point as one embodiment. Vthr 3  is set to be −1V as an example. One embodiment of differentiation filter circuit shown in the upper left area of  FIG. 10  comprises a capacitor CT and a resistor RT, Vf is derived from the point between CT and RT and its waveform is shown in the upper right area of  FIG. 10 . Another embodiment of differentiation filter circuit shown in the down left area of  FIG. 10  comprises a capacitor CT, a resistor RT 1  and a resistor RT 2 . And Vf′ is derived from the point between RT 1  and RT 2  and its waveform is shown in the down right area of  FIG. 10 . For the waveform in the upper right area of  FIG. 10 , when Q 1  is turned off normally, Vf is still lower than Vthr 3 , thus turning on Q 1  falsely. Though when the differentiation filter circuit as in the down side is applied, Vf′ can be kept higher than Vthr 3  when Q 1  is turned off normally, which is illustrated in the down right area of  FIG. 10 . Thus, by selecting the filtered voltage from the node between the capacitor CT and resistor RT or between the resistors of RT 1  and RT 2 , the proper trigger point can be selected and false triggering can be avoided. Besides, by adjusting the value of RT 1 , RT 2 , or CT, the trigger point also can be adjusted. 
         [0055]    The smart driving method illustrated above is applicable not only in flyback converter but also in other converters such as forward converter. It can be used for driving the synchronous rectifier Q 2  and freewheeling rectifier Q 3  for forward converter illustrated in  FIG. 11 . The forward converter comprises: an input circuit  100 , a switch A, a diode D 0 , a transformer T 1 , a secondary synchronous rectifier Q 2 , a freewheeling rectifier Q 3 , an inductor L 1 , a capacitor C 1 , a first filter circuit  1011  for Q 2 , a second filter circuit  1012  for Q 3 , a first smart driver  1021  for Q 2 , a second smart driver  1022  for Q 3 , a powering circuit  103  for the first smart driver  1021 . The transformer T 1  comprises a primary winding N 1 , a secondary winding N 2 , a winding N 0  for demagnetization and a winding N 3  for supplying power to the first smart driver  1021 . 
         [0056]    Continuing with  FIG. 11 , when switch A is turned on, body diode of Q 2  will be conduct current accordingly, followed by Q 2  being turned on by the first smart driver  1021  and the drain-source voltage of Q 3  can be given as Vds=(N 2 /N 1 )*Vin, Vin is the output voltage of circuit  100 . If switch A is turned off, Q 2  will be turned off by circuit  1021  accordingly and body diode of Q 3  will conduct current, followed by Q 3  being turned on by circuit  1022  and the drain-source voltage of Q 2  can be given as Vds=(N 2 /N 0 )*Vin. The circuit  103  supplies power to circuit  1021 , sharing the primary circuit with the forward converter, with its secondary circuit comprising: a winding N 3 , a diode D 1 , a resistor R 5  and a capacitor C 4 . N 3  is connected to the anode of D 1 , the cathode of D 1  is connected to one end of R 5 , the other end of R 5  is connected to C 4  and to terminal VCC of circuit  1021 , and the other end of C 4  is connected to the source terminal of Q 2 . 
         [0057]    In some embodiments, the smart driver further comprises the circuits for providing the reference voltage Vthr 1 , Vthr 2  and Vthr 3 . Filter circuit can be in other form and outputs an equivalent waveform to the filtered voltage as described above and reaches the same object, based on sampling the drain-source voltage of the synchronous rectifier. 
         [0058]    Though the invention is described with reference to the preferred embodiment thereof, it should be understood that the invention is not limited to the embodiments. On the contrary, it is intended to cover various modifications and substitutions to the invention included within the spirit and scope of the appended claims.