Abstract:
A hybrid integrated circuit device of the present invention includes: a circuit board having a front surface subjected to an insulation process; a conductive pattern formed on the front surface of the circuit board; a circuit element placed at a desired position on the conductive pattern and electrically connected to the conductive pattern; and a plurality of leads fixed to the conductive pattern and led to the outside. End portions of the leads which are led to the outside extend approximately parallel to the circuit board in a plane different from that of the front surface of the circuit board.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     Priority is claimed to Japanese Patent Application Number JP2004-089495 filed on Mar. 25, 2004, the disclosure of which is incorporated herein by reference in its entirety.  
         [0002]     1. Field of the Invention  
         [0003]     The present invention relates to a hybrid integrated circuit device. In particular, the present invention relates to a hybrid integrated circuit device having leads led to the outside.  
         [0004]     2. Description of the Related Art  
         [0005]     With reference to  FIGS. 6A and 6B , the constitution of a conventional hybrid integrated circuit device  100  will be described.  FIG. 6A  is a plan view of the conventional hybrid integrated circuit device  100 , and  FIG. 6B  is a cross-sectional view showing a packaging structure thereof.  
         [0006]     Referring to  FIG. 6A , a conductive pattern  102  is formed on the front surface of a circuit board  101  made of metal such as aluminum with an insulating layer interposed therebetween, and a desired hybrid integrated circuit device is realized by mounting circuit elements  105  at predetermined positions on the conductive pattern  102 . Here, an IC, a chip resistor, a chip capacitor, a power transistor, and the like are adopted as the circuit elements  105 , and a transistor mounted face-up is electrically connected to the conductive pattern  102  through fine metal wires  103 . A plurality of pads  102 A of the conductive pattern  102  are formed on one side edge of the circuit board  101 . At the positions of the pads  102 A, leads  104  are fixed with brazing material such as solder.  
         [0007]     Referring to  FIG. 6B , the hybrid integrated circuit device  100  is fixed to a mount board  111  by inserting the leads  104  into holes made in the mount board  111 , thus establishing electrical connection. Further, in order to prevent the leads  104  from bending due to vibration or the like, the leads  104  have curved shapes.  
         [0008]     With reference to  FIG. 7 , one example of a circuit formed in the hybrid integrated circuit device  100  will be described.  FIG. 7  is a conceptual diagram showing the outline of a circuit formed on the front surface of the circuit board  101 .  
         [0009]     Here, a plurality of channels CH, each of which is an amplifier circuit for amplifying a signal inputted from one lead  104  and outputting the amplified signal from one lead  104 , are formed on the front surface of the circuit board  101 . Three channels each having such a circuit configuration are constituted.  
         [0010]     A first channel CH 1  is formed in the vicinity of a middle portion of the circuit board  101 . A second channel CH 2  is formed to surround the first channel CH 1 . A third channel CH 3  is formed to surround the second channel CH 2 . This technology is described for instance in Japanese Patent Publication No. 2000-12987 (page 4, FIG. 1).  
         [0011]     However, in the hybrid integrated circuit device  100 , since the leads  104  are long, parasitic inductance are generated. This destabilizes the operation of the entire device. Further, the entire device is vertically fixed to a mount board in an upright position. This inhibits the thinning of a set in which the hybrid integrated circuit device is incorporated.  
         [0012]     Moreover, if a plurality of channels are formed on the circuit board  101  in the case where the leads  104  are fixed on one edge of the circuit board  101 , the length of each channel becomes uneven, and there has been the fear of problems such as electrical signal delay. Further, in order to equalize the length of each channel, means for crossing interconnections using jumper wires or the like are necessary. There has been the fear that this may newly increase the number of manufacturing steps and generate inductance sources.  
         [0013]     Furthermore, there are cases where the voltages of input signals inputted into the hybrid integrated circuit device and those of output signals outputted from the hybrid integrated circuit device are greatly different from each other. In such a case, if a lead through which an input signal passes and a lead through which an output signal passes are adjacent to each other, there has been the problem that either of these signals is affected by the other.  
       SUMMARY OF THE INVENTION  
       [0014]     The present invention has been accomplished in light of the above-described problems. The present invention provides a hybrid integrated circuit device having leads for stable operation.  
         [0015]     A hybrid integrated circuit device of the present invention includes: a circuit board having a front surface subjected to an insulation process; a conductive pattern formed on the front surface of the circuit board; a circuit element placed at a desired position on the conductive pattern and electrically connected to the conductive pattern; and a plurality of connecting means fixed to the conductive pattern and led to an outside. This hybrid integrated circuit device is surface-mounted on a mount board using the connecting means. The connecting means in the present invention are means for ensuring electrical continuity between an electric circuit constituted inside and the outside. As the connecting means, brazing material such as solder, leads, or the like can be adopted.  
         [0016]     Further, in the hybrid integrated circuit device of the present invention, the connecting means are leads each having one end portion fixed to the conductive pattern, and end portions of the leads which are led to the outside extend approximately parallel to the circuit board in a plane different from that of the front surface of the circuit board.  
         [0017]     Further, in the hybrid integrated circuit device of the present invention, the end portions of the leads which are led to the outside extend to protrude in the same direction as a direction in which the circuit element is mounted.  
         [0018]     Further, in the hybrid integrated circuit device of the present invention, the leads are formed in gull-wing shapes.  
         [0019]     Further, in the hybrid integrated circuit device of the present invention, the circuit element is placed on a front surface of the mount board, in a region corresponding to a place under the circuit board.  
         [0020]     Further, in the hybrid integrated circuit device of the present invention, a conducting path is formed on a front surface of the mount board, in a region corresponding to a place under the circuit board; and the conducting path is connected to ground potential.  
         [0021]     Further, a hybrid integrated circuit device of the present invention includes: a circuit board having a front surface subjected to an insulation process; a conductive pattern formed on the front surface of the circuit board; a circuit element placed at a desired position on the conductive pattern and electrically connected to the conductive pattern; and a plurality of connecting means fixed to the conductive pattern in a peripheral portion of the circuit board and led to an outside. The connecting means include first connecting means into which an input signal is inputted and second connecting means to which an output signal controlled by the input signal is outputted. The first and second connecting means are fixed to opposite edge portions of the circuit board, respectively.  
         [0022]     Further, in the hybrid integrated circuit device of the present invention, a circuit generating the output signal by amplifying the input signal is formed of the conductive pattern and the circuit element; and the circuit is formed on the front surface of the circuit board, in a region sandwiched between the first and second connecting means.  
         [0023]     Further, in the hybrid integrated circuit device of the present invention, the plurality of circuits are arranged in parallel on the front surface of the circuit board.  
         [0024]     Further, in the hybrid integrated circuit device of the present invention, the connecting means are leads.  
         [0025]     The present invention has the following effects.  
         [0026]     A hybrid integrated circuit device can be surface-mounted on a mount board by fixing tip portions of leads to the mount board with brazing material such as solder. Accordingly, compared to conventional examples, the length of leads can be reduced. Thus, it is possible to prevent a malfunction and the like of a circuit due to inductive components originating in the leads. Further, since the entire device can be surface-mounted, mounting on the mount board can be easily performed.  
         [0027]     Moreover, the problem of electrical signal delay can be avoided because, in an opposite edge portion of a circuit board from first leads through which input signals pass, second leads through which output signals controlled by the input signals pass are provided. Furthermore, in the case where a plurality of channels are provided on the front surface of the circuit board, the lengths of paths of the channels can be equalized by arranging the channels in parallel. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0028]      FIG. 1A  is a perspective view of a hybrid integrated circuit device of the preferred embodiment, and  FIGS. 1B and 1C  are cross-sectional views thereof.  
         [0029]      FIG. 2A  is a perspective view of a hybrid integrated circuit device of the preferred embodiment, and  FIG. 2B  is a cross-sectional view thereof.  
         [0030]      FIG. 3  is a plan view of the hybrid integrated circuit device of the preferred embodiment.  
         [0031]      FIG. 4  is a circuit diagram of the hybrid integrated circuit device of the preferred embodiment.  
         [0032]      FIG. 5A  is a circuit diagram of the hybrid integrated circuit device of the preferred embodiment, and  FIGS. 5B and 5C  are characteristic diagrams thereof.  
         [0033]      FIGS. 6A and 6B  are a plan view and a cross-sectional view for explaining a conventional hybrid integrated circuit device, respectively.  
         [0034]      FIG. 7  is a plan view for explaining the conventional hybrid integrated circuit device. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0035]     With reference to  FIGS. 1A  to  1 C, the constitution of a hybrid integrated circuit device  10  will be described.  FIG. 1A  is a perspective view of the hybrid integrated circuit device  10 , and  FIG. 1B  is a cross-sectional view showing a mount mode thereof.  FIG. 1C  is a cross-sectional view showing another mount mode.  
         [0036]     Referring to  FIGS. 1A and 1B , metal such as aluminum or copper is adopted as material for a circuit board  11 . Alternatively, alloy may be adopted as material for the circuit board  11 . Here, the circuit board  11  made of aluminum is adopted. For example, both sides thereof are anodized. An insulating layer  17  is formed on the front surface of the circuit board  11 , and has the function of insulating a conductive pattern  12  from the circuit board  11 . Further, filler such as alumina may be added to the insulating layer  17  at high density in order to actively transfer heat generated in circuit elements  15  to the circuit board  11 . Here, oxide such as Al 2 O 3  formed on the surface of the aluminum board for the purpose of insulation and the like is not necessarily essential. Accordingly, the front surface of the circuit board may be subjected to other insulation process. Further, the circuit board  11  may penetrate the insulating layer  17  formed on the front surface thereof to be electrically connected to the conductive pattern  12 . In this case, the operation of an electric circuit formed on the front surface is stabilized by connecting the circuit board  11  to ground potential.  
         [0037]     Moreover, other than a board made of metal, a board of other type, such as a flexible sheet, a printed circuit board, or a ceramic board, can be adopted as the circuit board  11 . Furthermore, the conductive pattern  12  having a multilayer wiring structure can also be constituted on the front surface of the circuit board  11 .  
         [0038]     The conductive pattern  12  is provided on the surface of the insulating layer  17  and formed of metal such as copper. The circuit elements  15  are fixed at predetermined positions on the conductive pattern  12 . A plurality of pads  12 A of the conductive pattern  12  are placed on side edges of the circuit board  11 . A predetermined electric circuit is formed on the circuit board  11  by fixing the circuit elements  15  at the predetermined positions on the conductive pattern  12 . For example, a plurality of bridge circuits are formed on the front surface of the circuit board  11 . Further, the conductive pattern  12  may be covered with a resin coating, except for electrical connection points.  
         [0039]     The circuit elements  15  are mounted at the predetermined positions on the conductive pattern  12  with brazing material such as solder interposed therebetween. As the circuit elements  15 , a passive element, an active element, a circuit device, and the like can be widely adopted. Further, in the case where a power element is mounted, the relevant element may be mounted on a heat sink fixed on the conductive pattern. A transistor or an IC, which is mounted face-up, is electrically connected to the conductive pattern  12  through thin metal wires  13 . Further, a resin-packaged IC may be fixed as the circuit element  15  to the conductive pattern  12 . As examples of the circuit elements  15 , a power switching element and an IC which controls the power switching element can be adopted. Further, as the passive element, a chip resistor or a chip capacitor can be adopted.  
         [0040]     A semiconductor element applicable to the present application is, for example, a metal-oxide-semiconductor field effect transistor (MOSFET). More preferably, it is possible to adopt a power MOSFET which performs switching with an amplitude of 50 V or more, or a semiconductor element which operates at high speed with small amplitude. Furthermore, a semiconductor element constituting a bridge circuit can be adopted.  
         [0041]     Sealing resin  16  covers the conductive pattern  12  formed on the front surface of the circuit board  11  and the circuit elements  15 . Here, the sealing resin  16  is formed only on the front surface of the circuit board  11  by potting. Alternatively, the sealing resin  16  may be formed to cover all surfaces of the circuit board  11 . This makes it possible to improve the moisture resistance of the entire device. Further, the sealing resin  16  may be formed by transfer molding.  
         [0042]     Leads  14  are fixed to the pads  12 A of the conductive pattern  12  with brazing material such as solder, and, for example, have the function of performing electrical input/output to/from the outside. That is, the leads  14  function as connecting means. Here, the leads  14  are provided on two opposite longitudinal edges of the circuit board  11 . Furthermore, one ends of the leads  14  are fixed to the pads  12 A of the conductive pattern, and the other ends of the leads  14  extend approximately parallel to the circuit board  11 . Further, the leads  14  are formed in gull-wing shapes. That is, portions in contact with the pads  12 A and conducting paths  31  are formed to be parallel to the circuit board  11 , and middle portions extend in directions oblique to the circuit board  11 . Further, as a replacement for the leads  14  as connecting means, brazing material such as solder can also be adopted.  
         [0043]     With reference to  FIG. 1B , a mount structure of the hybrid integrated circuit device  10  will be described. Here, the hybrid integrated circuit device  10  is mounted on the conducting paths  31  formed on the front surface of a mount board  30 . Tip portions of the leads  14  are bonded to the mount board  30  with brazing material, whereby the hybrid integrated circuit device  10  is surface-mounted on the mount board  30 . Accordingly, the hybrid integrated circuit device  10  can be treated as one of surface-mounted components similarly to other mounted circuit components (e.g., chip components). That is, compared to a mount structure in which leads are inserted into a mount board as in conventional examples, a mount process can easily performed. Here, the leads  14  have gull-wing shapes protruding in the same direction as the direction in which the circuit elements  15  are mounted.  
         [0044]     With the aforementioned constitution of the leads  14 , the leads  14  can be shortened compared to conventional examples. Accordingly, even in the case where a high-frequency electrical signal is passed through the lead  14 , the amount of inductance originating in the lead  14  can be reduced. Thus, the operation of the electric circuit formed on the front surface of the circuit board  11  can be stabilized. In particular, when an input signal inputted into the hybrid integrated circuit device is considered, in the case where the frequency of the input signal, which is a digital signal, is several hundreds of kilohertz, spectral components constituting this digital signal include components of several megahertz. Accordingly, in the case where such an electrical signal of a very high frequency passes, it is very meaningful to shorten the leads  14  by adopting the leads  14  having the aforementioned shapes.  
         [0045]     Moreover, if a circuit which performs a digital process is incorporated in the hybrid integrated circuit device  10 , the number of terminals for performing input/output of digital signals increases. Accordingly, in the preferred embodiment, a plurality of leads  14  are provided along the opposite longitudinal edges of the circuit board  11 , thus making it possible to provide a larger number of leads  14 . Further, the leads  14  can also be provided along four edges of the circuit board  11 .  
         [0046]     In a region corresponding to a place under the circuit board  11 , the conducting paths  31  are formed on the front surface of the mount board  30 , and circuit elements  32  are mounted at desired positions on the conducting paths  31 . This constitution makes it possible to constitute an electric circuit even in a region under the circuit board  11 . Accordingly, the packaging density of the entire mount board  30  can be improved. Further, as the circuit element  32 , a capacitor for reducing noise can be adopted. The placement of a capacitor under the circuit board  11  can reduce the distance between the electric circuit incorporated in the hybrid integrated circuit device  10  and the capacitor mounted on the mount board  30 . Accordingly, the noise reduction effect of the capacitor can be maximized.  
         [0047]     Referring to  FIG. 1C , in the region corresponding to the space under the circuit board  11 , a conducting path  31  is formed on the front surface of the mount board  30 . Further, the conducting path  31  is connected to ground potential. This allows the barrier effect of the conducting path  31  to be exerted, and makes it possible to prevent noise generated in the electric circuit formed on the front surface of the circuit board  11  from passing through the mount board  30  and propagating to the outside.  
         [0048]     With reference to  FIGS. 2A and 2B , the constitution of the hybrid integrated circuit device  10  of another embodiment will be described.  FIG. 2A  is a perspective view of the hybrid integrated circuit device  10 , and  FIG. 2B  is a cross-sectional view thereof. The basic constitution of the hybrid integrated circuit device shown in these drawings is the same as that shown in  FIGS. 1A  to  1 C, and the difference therebetween is sealing style.  
         [0049]     Here, the sealing resin  16  seals the entire circuit board  11  including the back surface thereof. The sealing resin  16  can be formed by injection molding using thermoplastic resin or transfer molding using thermosetting resin. By sealing the entire device with the sealing resin  16  as described above, the moisture resistance and shock resistance of the entire device can be improved. Furthermore, sealing with the sealing resin  16  can also be performed with the back surface of the circuit board  11  exposed. In this case, heat can be actively released to the outside through the exposed back surface of the circuit board  11 . Further, the effect of heat release through the sealing resin  16  can be improved by mixing filler into the sealing resin  16 .  
         [0050]     With reference to  FIG. 3 , one example of a circuit incorporated in the hybrid integrated circuit device  10  of this embodiment will be described. This drawing is a plan view of the circuit board  11 .  
         [0051]     Referring to this drawing, the leads  14  include first leads  14 A and second leads  14 B. The first leads  14 A are fixed to the longitudinal edge located in the upper part of the drawing at approximately equal intervals, and the second leads  14 B are provided at approximately equal intervals to be opposite to the first leads  14 A.  
         [0052]     The first leads  14 A are leads through which electrical signals inputted into the circuit formed on the front surface of the circuit board  11  pass. As the electrical signals, digital input signals having voltages of approximately several volts can be adopted. In general, the voltage of an input signal is 5 V. However, in recent years, an input signal having a lower voltage, such as approximately 3 V or 2.5 V, is sometimes used in order to reduce power consumption.  
         [0053]     The second leads  14 B are leads through which output signals obtained from processes performed based on the electrical signal inputted from the first leads  14 A pass. As the output signals, analog signals having voltages of approximately several tens of volts to several hundreds of volts can be adopted. As the analog signals, for example, audio output signals can be cited. Further, electrical signals which pass through the second leads  14 B may also be digital signals.  
         [0054]     On the front surface of the circuit board  11 , a plurality of channels, which are amplifier circuits for amplifying the input signals into the output signals, are provided in parallel. Here, a first channel CH 1 , a second channel CH 2 , . . . , and an Nth channel CHn are provided. The number of channels provided in parallel can be changed according to the intended use.  
         [0055]     The first channel CH 1  is an amplifier circuit including a control element  15 A and a power element  15 B. In the first channel CH 1 , a digital input signal inputted from the first lead  14 A is amplified to be outputted from the second lead  14 B. Further, the first channel CH 1  is a circuit including a control element  15 A and a power element  15 B. The control element  15 A, which is, for example, an IC, performs a calculation on the input signal in accordance with a predetermined rule and controls the power element  15 B. The power element  15 B is, for example, a power switching element such as an IGBT, and a control electrode thereof is connected to the control element  15 A. Further, the power element  15 B performs switching in accordance with a control signal from the control element  15 A. Moreover, an output signal from the power element  15 B is outputted to the outside through the second lead  14 B. Other channels including the second channel CH 2  and subsequent channels each have basically the same constitution as that of the first channel CH 1  described above.  
         [0056]     An advantage of this embodiment is that the first leads  14 A through which input signals pass and the second leads  14 B through which output signals pass are respectively fixed to opposite edge portions of the circuit board  11 . Specifically, as described previously, the voltages of input signals are low voltages of approximately 5 V and becoming lower in order to reduce power consumption. On the other hand, the voltages of output signals which pass through the second leads  14 B are high voltages of approximately several tens to one hundred volts. Accordingly, in the case where the second leads  14 B are provided in the vicinity of the first leads  14 A, noise generated in the second leads  14 B may affect the first leads  14 A. Accordingly, interference between the first leads  14 A and the second leads  14 B can be prevented by placing the first leads  14 A and the second leads  14 B in opposite edge portions of the circuit board  11 , respectively, as in this embodiment.  
         [0057]     With reference to  FIG. 4 , an example of a circuit constituted in the hybrid integrated circuit device  10  will be described. Here, in the hybrid integrated circuit device  10 , four channels including a first channel CH 1 , a second channel CH 2 , a third channel CH 3 , and a fourth channel CH 4  are constituted, each of which constitutes a half bridge circuit. Further, output signals of these channels are converted into analog signals by lowpass filters. That is, in the preferred embodiment, pulse width modulation (PWM) in which class D amplification is performed is performed.  
         [0058]     Details of the first channel CH 1  will be described. TR 1  and TR 2  are switching elements constituting a bridge circuit. For example, power MOSFETs can be adopted. The gate electrodes of TR 1  and TR 2  are connected to a first control element IC 1 , and TR 1  and TR 2  perform switching in accordance with electrical signals from IC 1 . The drain electrode D 1  of TR 1  is connected to a first power source Vcc 1 . Further, S 1 , which is the source electrode of TR 1 , is connected to the drain electrode D 2  of TR 2 , and a first output OUT 1  is extracted from an intermediate position between S 1  and D 2 . The source electrode S 2  of TR 2  is connected to a first ground potential GND 1 , and connected to a first connection point SUB 1  of the circuit board  11  in the vicinity of TR 1  and TR 2 . Here, an electrical signal inputted into IC 1  passes through the first lead  14 A of this embodiment. Further, OUT 1 , which is an output signal, passes through the second lead  14 B of this embodiment.  
         [0059]     An electrical signal passed through the first lead  14 A and inputted into IC 1  is, for example, a digital signal having a PWM waveform as shown in  FIG. 5B . A digital signal having a PWM waveform is a signal which is very sensitive to noise compared to an ordinary digital signal. Accordingly, with the constitution of this embodiment, noise in output signals can be prevented from affecting input signals by separating the first leads  14 A and the second leads  14 B. Here, a signal inputted into IC 1  may be an analog signal.  
         [0060]     A first capacitor C 1 , which is a coupling capacitor, is provided to short the first ground potential GND 1  and the first power source Vcc 1 . Furthermore, one or two first capacitors C 1  are provided in parallel in the vicinity of the first connection point SUB 1 . Accordingly, even if the potential of the circuit board  1  in the vicinity of TR 1  and TR 2  increases due to high-speed operation of TR 1  and TR 2 , the potential immediately flows into the first capacitor or capacitors C 1 .  
         [0061]     In the second channel CH 2 , which has a constitution similar to that of the first channel CH 1  described above, an output signal is outputted from OUT 2 . Further, the first and second channels CH 1  and CH 2  constitute an H-bridge circuit. That is, the first and second outputs OUT 1  and OUT 2 , which are pulse signals, are connected to a first lowpass filter LF 1 , whereby the digital signals are converted into an analog signal. Further, a first speaker S 1 , which is a load, operates according to the analog signal.  
         [0062]     The third and fourth channels CH 3  and CH 4  each constitute a half bridge similar to that of the first channel CH 1  described previously, and collectively constitute an H bridge. That is, third and fourth outputs OUT 3  and OUT 4 , which are pulse signals, are converted into an analog signal by a second lowpass filter LF 2 . Further, a second speaker S 2  operates according to the analog signal.  
         [0063]     In this embodiment, electrical signals inputted into the ICs pass through the first leads  14 A. Further, power signals Vcc, OUT, and GND pass through the second leads  14 B. Accordingly, in the hybrid integrated circuit device  10  of this embodiment, digital signals having PWM waveforms are inputted, and digital signals having PWM waveforms with amplitudes larger than those of the inputted signals are outputted. Furthermore, coils and capacitors constituting lowpass filters can also be incorporated in the hybrid integrated circuit device  10 . In this case, analog signals amplified based on inputted digital signals are outputted from the second leads  14 B.  
         [0064]     With reference to  FIGS. 5A  to  5 C, electrical signals processed by the hybrid integrated circuit device  10  of this embodiment will be described.  FIG. 5A  is a circuit diagram showing part of a circuit incorporated in the device,  FIG. 5B  is a waveform diagram showing properties of a signal inputted, and  FIG. 5C  is a waveform diagram showing properties of a signal outputted.  
         [0065]     Referring to  FIG. 5A , the level of voltage at PT 1  through which a signal inputted into IC 1  passes corresponds to a digital signal of approximately 3 V to 5 V. The waveform of this signal is shown in  FIG. 5B . A signal obtained from a process performed based on the inputted signal inputted into IC 1  is outputted from IC 1 . This output signal is a signal amplified for driving a transistor. Accordingly, the level of voltage at PT 2  corresponds to a digital signal at a level of approximately 12 V.  
         [0066]     Output signals from IC 1  are applied to the control electrodes of TR 1  and TR 2 , whereby these transistors are controlled. Further, an output signal is extracted from a midpoint of the bridge circuit formed of these transistors. The level of voltage at a point PT 3  through which this output signal passes corresponds to a digital signal of a high voltage of, for example, approximately 50 V. In the case where a lowpass filter which converts this digital signal into an analog signal is formed outside the hybrid integrated circuit device  10 , an output signal from OUT 1  passes through the second lead  14 B.  
         [0067]     An output signal of the first channel CH 1  and that of the second channel CH 2  are converted into an analog signal by the first lowpass filter LF 1 . The waveform of this analog signal is shown in  FIG. 5C . The level of voltage of this analog signal is approximately 50 V at a point PT 4 .  
         [0068]     In the above description, the hybrid integrated circuit device  10  constitutes an audio amplifier module, but can also constitute an electric circuit for other use. For example, an inverter circuit, a DC/DC converter circuit, or the like can be constituted.