Abstract:
An analog switch circuit is disclosed. A plurality of cell switches ( 10 ) and load resistors ( 33, 34 ) are employed. One of cell switches ( 10 A) is active and another ( 10 B) is nonactive by controlling switches ( 15 ). Each of cells includes two pair of common-base transistors ( 3  to  6 ), which are inserted between a differential amplifier ( 1, 2 ) and load resistors ( 33, 34 ). Each of bases of common-base transistors ( 3  to  6 ) isolate the collector from the base. Thereby, effects of collector-to-emitter capacitances of nonactive transistors are decreased in high frequency range. The remarkably small leakages are canceled out by paired transistors  5  and  4 , and,  6  and  3 . Thus, the cross-talk between  21   a   , 22   a  and  21   b   , 22   b  is eliminated.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an analog switch circuit. The circuit has a plurality of analog differential signal inputs. Therein, one of signal inputs is selected. 
     The invention is particularly concerned with a wideband switch for switching differential input signals of DC to several GHz. The switch has low cross-talk characteristics isolated from non-selected signal channels. 
     2. Description of the Prior Art 
     A conventional oscilloscope has a switching circuit to select an input signal channel from a plurality of analog differential input signal channels. 
     Prior Art 1 of a conventional analog switch circuit is shown in FIG.  1 . 
     In FIGS. 1,  21 A and  22 A are the first channel differential signal input terminals, which are respectively connected to bases of transistors  1 A and  2 A. In like manner,  21 B and  22 B are the second channel differential signal input terminals, which are respectively connected to bases of transistors  1 B and  2 B. 
     Emitters of transistors  1 A and  2 A are connected with each other via resistors  11 A and  12 A. The junction point of resistors  11 A and  12 A is connected with a terminal of a constant current source  16 A via a switch  15 A. Another terminal of the source  16 A is connected to a power source V EE . 
     Emitters of transistors  1 B and  2 B are connected with each other via resistors  11 B and  12 B. The junction point of resistors  11 B and  12 B is connected with a terminal of a constant current source  16 B via a switch  15 B. Another terminal of the source  16 B is connected to the power source V EE . 
     Collectors of transistors  1 A and  1 B are connected to a power source V CC  via a load resistor  33 . Collectors of transistors  2 A and  2 B are connected to the power source V CC  via a load resistor  34 . 
     A pair of transistors  1 A and  2 A forms a differential amplifier. Another pair of transistors  1 B and  2 B forms another differential amplifier. 
     When the switch  15 A is on and the switch  15 B is off, the first pair of transistors  1 A and  2 A amplifies the first differential input signal between input terminals  21 A and  22 A to obtain a differential output between differential signal output terminals  37  and  38 . The second pair of transistors  1 B and  2 B does not amplify the second differential input signal between input terminals  21 B and  22 B, because of no collector currents of transistors  1 B and  2 B. 
     When the switch  15 A is off and the switch  15 B is on, reversely, the second pair of transistors  1 B and  2 B amplifies the second differential input signal between input terminals  21 B and  22 B to obtain a differential output between differential signal output terminals  37  and  38 . The first pair of transistors  1 A and  2 A does not amplify the first differential input signal between input terminals  21 A and  22 A, because of no collector currents of transistors  1 A and  2 A. 
     Therefore, by means of on-off switching operation of switches  15 A and  15 B, the analog switch circuit shown in FIG.1 can selectively amplify a signal of two differential input signals. The first signal between input terminals  21 A and  22 A, or the second signal between input terminals  21 B and  22 B, is selectable. 
     In FIG. 1, two differential amplifiers of two pairs of transistors  1 A,  2 A and  1 B,  2 B are shown. Many differential amplifiers with switches  15   s  are usable, too. When only one of switches  15   s  is on and the other switches  15   s  are off, the only one differential signal is amplified to obtain the output between terminals  37  and  38 . However, the other differential input signals are not amplified. 
     The analog switch circuit shown in FIG. 1 has the disadvantage of cross-talk, because of base-to-collector capacitances C bc s. 
     In spite of no collector current, high frequency ingredients of the input signals of bases leak out to collectors via the capacitances C bc s. 
     In FIG. 2, there are shown a base-to-collector capacitance C bc , a base-to-emitter capacitance C be  and a collector-to-emitter capacitance C ce . 
     In FIG. 3, there is shown the base-to-collector capacitance C bc  depending on the collector-to-base voltage. 
     The base-to-emitter capacitance C be  and the collector-to-emitter capacitance C ce , which are not shown in FIG. 3, have the same characteristics as that of the base-to-collector capacitance C bc . 
     Prior Art  2  is shown in Japanese Provisional Publication No. 10-285006. Therein, an analog switch circuit is disclosed. The circuit employs means to leak high frequency ingredients for reducing the cross-talk. 
     In FIG. 4, the circuit of the prior art  2  is shown. The first differential signal input terminals  21 A and  22 A are respectively connected to bases of transistors  1 A and  2 A. 
     The second differential signal input terminals  21 B and  22 B are respectively connected to bases of transistors  1 B and  2 B. 
     Emitters of the transistors  1 A and  2 A are connected to each other via resistors  11 A and  12 A. The junction point of resistors  11 A and  12 A is connected with a terminal of a constant current source  16 A via a switch  15 A. Another terminal of the source  16 A is connected to a power source V EE . 
     In like manner, emitters of the transistors  1 B and  2 B are connected to each other via resistors  11 B and  12 B. The junction point of resistors  11 B and  12 B is connected with a terminal of a constant current source  16 B via a switch  15 B. Another terminal of the source  16 B is connected to.the power source V EE . 
     Transistors  7 A,  8 A,  7 B and  8 B are employed. In each of them, the emitter is connected with the base. The base of the transistor  7 A is connected with that of  1 A. In like manner, the base of  8 A with  2 A,  7 B with  1 B and  8 B with  2 B. 
     The collector of the transistor  7 A is connected with that of  2 A. In like manner, the collector of  8 A with  1 A,  7 B with  2 B and  8 B with  1 B. 
     Transistors  1 A and  2 A form a differential amplifier with means to leak high frequency ingredients for reducing the cross-talk. Transistors  7 A and  8 A operate as the leak means. 
     In like manner, transistors  1 B and  2 B form a differential amplifier with means to leak high frequency ingredients for reducing the cross-talk. Transistors  7 B and  8 B operate as the leak means. 
     When the switch  15 A is on and the switch  15 B is off, the first differential amplifier of transistors  1 A and  2 A amplifies the first differential input signal between input terminals  21 A and  22 A to obtain a differential output between differential signal output terminals  37  and  38 . 
     The second differential amplifier of transistors  1 B and  2 B does not amplify the second differential input signal between the second differential input terminals  21 B and  22 B, because of no collector currents of transistors  1 B and  2 B. 
     However, a part of high frequency ingredients of the second differential input terminals  21 B and  22 B appears at collectors of transistors  1 B and  2 B by passing through base-to-collector capacitances C bc s of transistors  1 B and  2 B. 
     Transistors  7 B and  8 B, which have base-to-collector capacitances C bc s, leak a part of high frequency ingredients to collectors  2 B and  1 B in reverse phase respectively. Therefore, if the both leaks of transistors  1 B and  8 B are equal in their amplitude, the leaks can be canceled, because of their phase reverse to each other. In like manner, the leaks of transistors  2 B and  7 B can be canceled, because of their phase reverse to each other. 
     Actually, collector-to-base voltages of transistors  1 B and  2 B are not equal, and their base-to-collector capacitances are not same in value. Their capacitances vary in value depending on the collector-to-base voltages which are varied by differential input signal between input terminals  21 B and  22 B. Therefore, the cancellation by using leaks is not satisfied. The dispersion of base-to-collector capacitances is one of impedimental factors of the cancellation. 
     SUMMARY OF THE INVENTION 
     An object of the invention is to provide an analog switch circuit. 
     Another object of the invention is to provide a wideband analog switch circuit selecting a signal from differential signals without cross-talk. 
     A further object of the invention is to provide an analog switch circuit easy producible as a monolithic integrated circuit without cross-talk. 
     In the circuit of the invention, a plurality of cell switch means and a differential load means are included. Each of cell switch means includes a cell amplifying means and cell common-base means. 
     The cell amplifying means amplifies a differential input signal between differential input terminals to obtain a differential amplified signal between differential output terminals. The cell common-base means added with the differential amplified signal obtains a cell differential output. The output has the same polarity as or the reverse polarity to those of the differential input signal. 
     The differential load means supplies load currents to selected one of the plurality of cell switch means to obtain a differential signal output. The selected cell switch means is active and the others are nonactive. 
     Each of cell switch means includes a cell common-base means. Therefore, differential input signals added to nonactive cell switch means do not leak to differential signal output terminals. 
     The cell common-base means includes common-base transistors. When common-base transistors are off, input signals from emitters leak almost nothing to collectors, because grounded bases, which exist between emitters and collectors, insulate collectors from emitters. 
     In nonactive cell switch means, even remarkably reduced leak signals are canceled out by opposite polarity leak signals. Therefore, a wideband analog switch circuit switching signals of DC to several GHz is obtainable. 
     Additional objects and advantages of this invention will be apparent from the following detailed description of preferred embodiments thereof that proceed with reference to the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The principle construction and operation of the present invention will be clearly understood from following detailed description taken in conjunction with the accompanying drawings, in which: 
     FIG. 1 is a circuit diagram of an analog switch circuit in accordance with the prior art; 
     FIG. 2 is a circuit diagram showing capacitances of a transistor in accordance with the prior art; 
     FIG. 3 is a typical collector voltage to capacitance characteristic of a transistor in accordance with the prior art; 
     FIG. 4 is a circuit diagram of an analog switch circuit with means to leak high frequency ingredients for reducing crosstalk in accordance with the prior art; 
     FIG. 5 is a circuit diagram of an analog switch circuit in accordance with the present invention; 
     FIG. 6 is a cross-talk characteristic simulated in accordance with the present invention; 
     FIG. 7 is a circuit diagram of an analog switch circuit of the second embodiment in accordance with the present invention; 
     FIG. 8 is a circuit diagram of an analog switch circuit of the third embodiment in accordance with the present invention; and 
     FIG. 9 is a circuit diagram of an analog switch circuit of the forth embodiment in accordance with the present invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The present invention will be described hereinunder in detail with reference to the accompanying drawings. 
     FIG. 5 shows the first embodiment of an analog switch circuit in accordance with the present invention. In FIG. 5, elements similar to those previously described with reference to FIGS. 1 and 4 are denoted by the same reference numerals. 
     In a cell switch  10 A, a differential input signal is applied to a pair of differential signal input terminals  21 A and  22 A. Terminals  21 A and  22 A are respectively connected to bases of transistors  1 A and  2 A. Transistors  1 A and  2 A form the first emitter-coupled differential amplifier. 
     In the first emitter-coupled differential amplifier, resistors  11 A and  12 A connect between emitters of transistors  1 A and  2 A. Resistors  11 A and  12 A give the effects of negative feedback to the differential amplifier. 
     The junction point of resistors  11 A and  12 A is connected with a terminal of a constant current source  16 A via a switch  15 A. Another terminal of the constant current source  16 A is connected to a power source V EE . 
     The collector of transistor  1 A is connected with emitters of transistors  3 A and  5 A. The collector of transistor  2 A is connected with emitters of transistors  4 A and  6 A. 
     Transistors  5 A and  6 A form the first common-base circuit. Transistors  3 A and  4 A form the second common-base circuit. 
     Collectors of transistors  5 A and  4 A are connected with a load resistor  33 . Collectors of transistors  3 A and  6 A are connected with a load resistor  34 . 
     In a cell switch  10 B, a differential input signal is applied to a pair of differential signal input terminals  21 B and  22 B. Terminals  21 B and  22 B are respectively connected to bases of transistors  1 B and  2 B. Transistors  1 B and  2 B form the second emitter-coupled differential amplifier. 
     In the second emitter-coupled differential amplifier, resistors  11 B and  12 B connect between emitters of transistors  1 B and  2 B. Resistors  11 B and  12 B give the effects of negative feed-back to the differential amplifier. 
     The junction point of resistors  11 B and  12 B is connected with a terminal of a constant current source  16 B via a switch  15 B. Another terminal of the constant current source  16 B is connected to the power source V EE . 
     The collector of transistor  1 B is connected with emitters of transistors  3 B and  5 B. The collector of transistor  2 B is connected with emitters of transistors  4 B and  6 B. 
     Transistors  5 B and  6 B form the first common-base circuit. Transistors  3 B and  4 B form the second common-base circuit. 
     Collectors of transistors  5 B and  4 B are connected with the load resistor  33 . Collectors of transistors  3 B and  6 B are connected with the load resistor  34 . 
     The other terminals of load resistors  33  and  34  are connected to the power source V cc . In common-base circuits, common-base voltages of base terminals  23 A,  24 A,  23 B and  24 B are individually controllable. Switching constant current sources, of which currents can be switched from predetermined value to zero, are usable for switches  15 A,  15 B and constant current sources  16 A,  16 B. 
     Assuming the cell switch  10 A is on, and another cell switch  10 B is off, the operation of the circuit shown in FIG. 5 will be described. 
     When the switch  15 A is on and  15 B is off, the first emitter-coupled differential amplifier including transistors  1 A and  2 A becomes active in the first cell switch  10 A. At the same time, the second amplifier including transistors  1 B and  2 B becomes nonactive in the second cell switch  10 B. 
     The differential input signal between a pair of differential terminals  21 A and  22 A is converted to signal currents by transistors  1 A,  2 A and negative feedback resistors  11 A,  12 A. Emitter and collector currents of transistors  1 A and  2 A depend on the amplitude of the differential input signal. 
     Collector current of the transistor  1 A flows from transistors  3 A and  5 A. Collector current of the transistor  2 A flows from transistors  4 A and  6 A. In base terminals  23 A and  24 A of common-base (i.e., grounded-base) circuits, it is assumed that the static voltage of the base terminal  23 A, of which level is constant for an arbitrary period, is higher than that of  24 A by 1 volt. 
     It is assumed that the static voltage of the base terminal  23 A, of which level is constant for an arbitrary period, is lower than that of  24 A by 1 volt. The collector current of transistor  1 A flows from the load resistor  34  via the transistor  3 A and the collector current of transistor  2 A flows from the load resistor  33  via the transistor  4 A. A differential output signal as the same phase as that of the differential signal input terminals  21 A and  22 A appears between differential signal output terminals  37  and  38 . 
     It is assumed that the voltage of the base terminal  23 A is lower than that of  24 A by 1 volt. The collector current of transistor  1 A flows from the load resistor  34  via the transistor  3 A and the collector current of transistor  2 A flows from the load resistor  33  via the transistor  4 A. A differential output signal as the same phase as that of the differential signal input terminals  21 A and  22 A appears between differential signal output terminals  37  and  38 . 
     Namely, the analog switch circuit of FIG. 5 delivers selectively a differential input signal between terminals  21 A and  22 A to differential signal output terminals  37  and  38 . However, another differential input signal between terminals  21 B and  22 B is not selected as the switch  15 B is off. 
     When the switch  15 B is off, transistor  1 B and  2 B, which form an emitter-coupled differential amplifier in the cell switch  10 B, are off. Therefore, the differential signal, which is inputted between terminals  21 B and  22 B, is not converted to a signal current. No signal current, therefore, flow common-base transistors  3 B,  4 B,  5 B and  6 B. Namely, transistors  3 B,  4 B,  5 B and  6 B are off. 
     In the addition, in spite of capacitances of transistors  1 B to  6 B, which are off, high frequency ingredients of the input signal between terminals  21 B and  22 B can not leak to differential signal output terminals  37  and  38 . The effects reducing cross-talk will be described hereinafter. 
     When transistors  1 B and  2 B of the cell switch  10 B are off, high frequency ingredients of the input signal between terminals  21 B and  22 B can leak to collectors of transistors  1 B and  2 B through their base-to-collector capacitances. The leakages are described in the prior arts  1  (FIG. 1) and  2  (FIG.  4 ). The signal leaked at collectors of transistors  1 B and  2 B would be flow to load resistors  33  and  34  via collector-to-emitter capacitances of common-base transistors  3 B to  6 B. 
     Common-base transistors have effects of isolation between collectors and emitters, as their bases, which exist between emitters and collectors, are grounded. Accordingly, input signals from emitters leak almost nothing to collectors of transistors being off. 
     When transistors are off, collector-to-emitter capacitances of common-base transistors are very or remarkably smaller than those of the prior art  2  or  1 . Therefore, the cross-talk is decreased extremely or extraordinary smaller than those of the prior art  2  or  1 , as the prior art  1  has no measure for preventing the leakage. 
     In common-base transistors  5 B,  6 B connected with a base terminal  23 B, and  3 B,  4 B with  24 B, it is supposed that a terminal voltage  23 B equals to another terminal voltage  24 B. 
     Those collector-to-emitter capacitances are very small, because of common-base transistors  3 B,  4 B and  5 B,  6 B. All of those capacitances are substantially equal to each others. 
     Accordingly, a small signal leaked to the collector of the transistor  5 B equals to that of  4 B in amplitude and is added to another in the reverse phase. At the same time, a small signal leaked to the collector of the transistor  6 B equals to that of  3 B in amplitude and is added to another in the reverse phase. The small leaked signals are, thereby, canceled out. 
     In nonactive cell switch  10 B, which is off, signals leaked to terminals  37  and  38  are remarkably small by canceling. 
     An operation of active cell switch  10 A and nonactive cell switch  10 B has been described above. The other way, another operation of active cell switch  10 B and nonactive cell switch  10 A will be easily understandable from that of the operation above-mentioned. 
     Base control means delivering base voltages to base terminals  23 A,  24 A,  23 B and  24 B are not shown. Those base voltages are practically DC or the like. The same voltage of the terminal  23 A as that of  24 A is obtained by shorting both terminals. The same voltage of the terminal  23 B as that of  24 B is obtained by shorting both terminals. The base control means are very simple. 
     Effects of the analog switch circuit according to the invention will be simulated. Parameters used in the simulation will be shown. It is assumed that the dispersion of capacitances of transistors included in an IC is 5%. 
     Parameters of transistors are shown as follows. 
     (1) Forward transition time for a step input; 
     TF=20 ps 
     (2) Capacitances; 
     C be =C bc =C cs =0.6 pF(±5%) 
     C be ; base-to-emitter 
     C bc ; base-to-collector 
     C cs ; collector-to-substratum 
     (3) Bias dependent multiplication coefficient of junction capacitances 
     MJ=0.4 
     (4) Current of a current source  16   
     I=20 mA 
     (5) Resistors  11  and  12  of emitters for negative feedback 
     R11=R12=100 Ω 
     (6) Load resistors  33  and  34   
     R33=R34=100 Ω 
     FIG. 6 shows simulated cross-talk characteristics of the analog switch circuits of the present invention and the prior art  2 . The X and Y coordinates show signal frequencies by Hz and cross-talks by dB, respectively. 
     The curve {circle around (1)} shows a cross-talk characteristic of the prior art  2  shown in FIG.  4 . 
     The curve {circle around (2)} shows a cross-talk characteristic of the present invention shown in FIG. 5, wherein the voltage of the terminal  24 B is higher than that of  23 B by 1 volt. 
     The curve {circle around (3)} shows a cross-talk characteristic of the present invention shown in FIG. 5, wherein the voltage of the terminal  24 B equals to that of  23 B. 
     In comparison with the prior art  2  shown by the curve {circle around (1)}, the present invention shown by the curves {circle around (2)} and {circle around (3)} realizes the analog switch circuit having remarkably small cross-talk. The curve {circle around (3)}, wherein the voltage of the terminal  24 B equals to that of  23 B, clearly shows the character superior to that of curve {circle around (2)}. 
     FIG. 7 shows the analog switch circuit of the second embodiment of the present invention. The reference numerals in FIG.7 are the same as those of FIG.  5 . 
     Therefore, elements different from those of FIG. 5 will be described. In FIG. 7, common-base transistors  31  and  32  are connected between cell switches  10 A,  10 B and load resistors  33 ,  34 . The bases of transistors  31  and  32  are connected to a bias source V B . The common-base transistors  31  and  32  are in series to load resistors  33  and  34 . 
     Although big amplitude output can be delivered between terminals  37  and  38 , collector voltages of transistor  3 B to  6 B are substantially constant. 
     Therefore, collector-to-emitter capacitances of transistors  3 B to  6 B are constant without influence of amplitudes of the input signal voltage. The superior uniformity of capacitances is obtainable. The better effects to cancel out the leak than those of FIG. 5 are obtained. 
     There is another merit in the circuit of FIG.  7 . In FIG. 5, collector capacitances of transistors  3 A to  6 A and  3 B to  6 B are directly connected with load resistors  33  and  34 . 
     In FIG. 7, however, collector capacitances of only transistors  31  and  32  are connected with load resistors  33  and  34 . The capacitances are small, because of the common-base transistors  31  and  32 . The wideband characteristics are, therefore, improved. 
     In FIG. 8, there is shown the circuit diagram of the third embodiment of the present invention. Four cell switches  10 A to  10 D are employed in FIG.  5 . 
     In FIG. 9, there is shown the circuit diagram of the forth embodiment of the present invention. Four cell switches  10 A to  10 D are employed in FIG.  7 . 
     The common-base transistors  31  and  32  remarkably eliminate the influence of capacitances of cell switches  10 A to  10 D to the load resistors  33  and  34 . Therefore, the circuit of FIG. 9 is wider than of FIG. 8 in their bandwidth. 
     As shown in FIGS. 8 and 9, the number of cell switches  10 s is the arbitrary plurality. Therein, one of them is on and the others are off. A differential input signal is selected from the other signals to obtain a differential output signals. 
     In FIGS. 5,  7 ,  8  and  9 , it is assumed that resistances of emitter negative feedback resistors  11  and  12  equal to those of load resistor  33  and  34  (R11=R12=R33=R34). 
     The differential output signal between terminals  37  and  38  equals to the differential input signal between terminals  21  and  22  in amplitude. Namely, the voltage gain is 1. In like manner, if R11=R12, R33=R34 and R33=2R11 are employed, the voltage gain is 2. 
     The analog switch circuit of the present invention can switch signals of DC to several GHz to selectively obtain a differential output signal without cross-talk. 
     The circuit is easy producible as a small sized monolithic integrated circuit without cross-talk. The circuit can select a signal from a plurality of wideband differential input signals in high fidelity. 
     While the invention has been described in its preferred embodiments, it is to be understood that within the scope of the appended claims the invention can be practiced otherwise than as specifically described.