Abstract:
A printed circuit board includes a base member including a major surface; a first region and a second region adjacent to the first region when viewed in a direction perpendicular to the major surface; a first conductive pattern layer formed over the major surface and comprising a plurality of conductive features positioned in the first region; and a connector placed over the major surface and comprising a portion located in the second region. The first conductive pattern layer does not comprise a portion formed in the second region and overlapping the connector when viewed in the direction.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is based on and claims priority from Korean Patent Application No. 10-2014-0013169, filed on Feb. 5, 2014 in the Korean Intellectual Property Office, to the disclosure of which is incorporated herein in its entirety by reference. 
       BACKGROUND 
       [0002]    1. Field 
         [0003]    The present disclosure relates to a printed circuit board and a display device including the same. 
         [0004]    2. Description of the Prior Art 
         [0005]    A display device is a device that displays data. The display device may be a liquid crystal display, an electrophoretic display, an organic light emitting display, an inorganic electroluminescent (EL) display, a field emission display, a surface-conduction electron-emitter display, a plasma display, or a cathode ray display. 
         [0006]    In general, the display device includes at least one printed circuit board to mount an integrated circuit thereon and to transfer signals. The printed circuit board transfers the signals through connectors connected to the printed circuit board. 
       SUMMARY 
       [0007]    However, the printed circuit board and the connectors are not integrally formed, but are separately formed to be combined with each other. Accordingly, impedance matching may not be performed in a connection portion between the printed circuit board and the connectors, and this may cause signal integrity (SI) characteristics of the display device to deteriorate. 
         [0008]    In particular, with the increase of a transfer speed such as in a multi-Gbps (Giga bit per sec) ultra-high speed interface, the influence that is caused by impedance mismatch in the connection portion between the printed circuit board and the connectors may be increased. 
         [0009]    Accordingly, one aspect of the present invention provides a printed circuit board that can improve signal integrity characteristics through structural optimization of a connector connection portion. 
         [0010]    Another aspect of the present invention provides a display device including a printed circuit board that can improve signal integrity characteristics through structural optimization of a connector connection portion. 
         [0011]    Additional advantages, subjects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. 
         [0012]    One aspect of the invention provides a printed circuit board comprising: a base member including a major surface; a first region and a second region adjacent to the first region when viewed in a direction perpendicular to the major surface; a first conductive pattern layer formed over the major surface and comprising a plurality of conductive features positioned in the first region; and a connector placed over the major surface and comprising a portion located in the second region, wherein the first conductive pattern layer does not comprise a portion formed in the second region such that the first conductive pattern layer does not overlap the connector in the second region when viewed in the direction. 
         [0013]    In the foregoing printed circuit board (PCB), the PCB may further comprise a second conductive pattern layer embedded in the base member or formed over another surface of the base member, wherein the second conductive pattern layer does not comprise a portion formed in the second region. The second region may comprise at least a part of an edge of the base member. The connector does not overlap the second conductive pattern layer when viewed in the direction. Two or more of the plurality of conductive features are connected to the connector, and a minimum width of each of the two or more of the plurality of conductive features that are connected to the connector may be smaller than a minimum width of each of the other conductive features that are not connected to the connector. The minimum width of each of the plurality of conductive features that are connected to the connector may be about 0.1 mm. 
         [0014]    Still in the foregoing PCB, the base member may comprise an insulator that is interposed between the first and second conductive pattern layers. The printed circuit board may further comprise a third conductive pattern layer embedded in the base member or formed over the other surface of the base member, wherein the second conductive pattern layer is located between the first and third conductive pattern layers, wherein the base member further comprises at least one insulator between the second and third conductive pattern layer, and wherein the third conductive pattern layer does not comprise a portion formed in the second region. The printed circuit board may further comprise at least one additional conductive pattern layer embedded in the base member or formed over the other surface of the base member, wherein the at least one additional conductive pattern layer does not overlap the connector when viewed in the direction. 
         [0015]    Another aspect of the invention provides a printed circuit board comprising: a base member including a major surface; a first region and a second region that is adjacent to the first region when viewed in a direction perpendicular to a major surface of the base member; a plurality of conductive features formed over the major surface and positioned in the first region; a plurality of conductive pattern layers, each of which is embedded in the base member or formed over another surface of the base member; and a connector placed over the major surface and comprising a portion located in the second region, wherein each of the plurality of conductive pattern layers comprises a portion in the first region, wherein at least one of the plurality of conductive pattern layers does not comprise a portion formed in the second region. 
         [0016]    In the foregoing printed circuit board, wherein the connector may comprise at least one conductive terminal connected to at least one of the plurality of conductive features, and extending to the second region. Each of the plurality of conductive pattern layers does not overlap the connector when viewed in the direction. The base member may comprise a plurality of insulator layers that are stacked, and the plurality of conductive pattern layers and the plurality of insulator layers are alternately stacked with each other. 
         [0017]    A further aspect of the invention provides a display device comprising: a display panel configured to display an image; a first printed circuit board connected to the display panel, comprising: a base member including a major surface, a first region and a second region adjacent to the first region when viewed in a direction perpendicular to the major surface, and a conductive pattern layer formed over the major surface and comprising a plurality of conductive features positioned in the first region; and a connector attached to the printed circuit board, placed over the major surface and comprising a portion located over the second region, wherein the first conductive pattern layer does not comprise a portion formed in the second region such that the first conductive pattern layer does not overlap the connector in the second region when viewed in the direction. 
         [0018]    In the foregoing device, the display device may further comprise a flexible cable comprising an end portion which is connected the connector and does not overlap the first conductive pattern layer when viewed in the direction. The display device may further comprise at least one additional conductive pattern layer embedded in the base member or formed over the other surface of the first base member, wherein the at least one additional conductive pattern layer does not comprise a portion formed in the second region and overlapping either the connector or the flexible cable when viewed in the direction. The display device may further comprise a second printed circuit board connected to the first printed circuit board using the flexible cable. 
         [0019]    Still in the foregoing display device, the device may further comprise an additional conductive pattern layer embedded in the base member or formed over the other surface of the first base member, wherein the additional conductive pattern layer does not overlap either the connector or the flexible cable when viewed in the direction. Two or more of the plurality of second conductive features may be connected to the connector, and a minimum width of each of the two or more of the plurality of second conductive features that are connected to the second connector is smaller than a minimum width of each of the other conductive features that are not connected to the connector. The display device may further comprise two or more additional conductive pattern layers embedded in the base member or formed over the other surface of the first base member, wherein a first one of the two or more additional conductive pattern layers does not comprise a portion overlapping the end portion of the flexible cable when viewed in the direction, wherein a second one of the two or more additional conductive pattern layers overlaps the end portion of the flexible cable when viewed in the direction. 
         [0020]    In one aspect of the present invention, A printed circuit board may comprise a base member including a first region where at least one conductive layer is positioned and a second region that is adjacent to the first region, and a plurality of conductive features positioned on the at least one conductive layer. 
         [0021]    The at least one conductive layer is not formed in the second region. 
         [0022]    The second region may be at least a part of an edge portion of the base member. 
         [0023]    The second region may be a region where at least a part of a connector that is connected to at least one of the plurality of conductive features is arranged. 
         [0024]    Parts of the plurality of conductive features may be connected to the connector, and a minimum width of each of the plurality of conductive features that are connected to the connector may be smaller than a minimum width of each of the plurality of conductive features that are not connected to the connector. 
         [0025]    The minimum width of each of the plurality of conductive features that are connected to the connector may be 0.1 mm. 
         [0026]    The base member may further comprise an insulating layer that is interposed between the plurality of conductive features and the at least one conductive layer. 
         [0027]    The base member may further comprise at least one insulating layer, and the at least one insulating layer may be positioned in both the first region and the second region. 
         [0028]    A plurality of conductive layers and insulating layers may be provided, and the plurality of conductive layers and insulating layers may be alternately stacked with each other. 
         [0029]    In another aspect of the present invention, a printed circuit board may comprise a base member including a first region and a second region that is adjacent to the first region, and a plurality of conductive features positioned in the first region of the base member, wherein the base member includes a plurality of conductive layers that are successively stacked, all the plurality of conductive layers exist in the first region, and at least one of the plurality of conductive layers does not exist in the second region. 
         [0030]    The second region may be a region where a connector that is connected to at least one of the plurality of conductive features is arranged. 
         [0031]    At least one of the plurality of conductive layers that does not exist in the second region may be adjacent to the connector. 
         [0032]    The base member may further comprise a plurality of insulating layers that are successively stacked, and the plurality of conductive layers and the plurality of insulating layers may be alternately stacked with each other. 
         [0033]    In another aspect of the present invention, a display device may comprise a display panel configured to display an image, and a first printed circuit board connected to the display panel, wherein the first printed circuit board includes a first base member including a first region where at least one first conductive layer is positioned and a second region that is adjacent to the first region, and a plurality of first conductive features positioned on the at least one first conductive layer. 
         [0034]    The display device may further comprise a first connector positioned on the first printed circuit board and connected to at least one of the plurality of first wiring patterns, wherein at least a part of the first connector may be positioned in the second region of the first base member. 
         [0035]    Parts of the plurality of first conductive features may be connected to the first connector, and a minimum width of each of the plurality of first conductive features that are connected to the first connector may be smaller than a minimum width of each of the plurality of first conductive features that are not connected to the first connector. 
         [0036]    The display device may further comprise a second printed circuit board connected to the first printed circuit board, wherein the second printed circuit board may include a second base member including a first region where at least one second conductive layer is positioned and a second region that is adjacent to the first region, and a plurality of second conductive features positioned on the at least one second conductive layer. 
         [0037]    The display device may further comprise a second connector positioned on the second printed circuit board and connected to at least one of the plurality of second wiring patterns, wherein at least a part of the second connector may be positioned in the second region of the second base member. 
         [0038]    Parts of the plurality of second conductive features may be connected to the second connector, and a minimum width of each of the plurality of second conductive features that are connected to the second connector may be smaller than a minimum width of each of the plurality of second conductive features that are not connected to the second connector. 
         [0039]    The display device may further comprise a flexible cable configured to connect the first connector and the second connector to each other. 
         [0040]    According to the embodiments of the present invention, at least the following effects can be achieved. 
         [0041]    It becomes possible to provide a display device having improved signal integrity characteristics. 
         [0042]    The effects according to embodiments of the present invention are not limited to the contents as exemplified above, but further various effects are included in the description. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0043]    The above and other features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: 
           [0044]      FIG. 1  is a plan view of a display device according to an embodiment of the present invention; 
           [0045]      FIG. 2  is an enlarged perspective view of a portion II of  FIG. 1 ; 
           [0046]      FIG. 3  is an enlarged plan view of a portion II of  FIG. 1 ; 
           [0047]      FIG. 4  is an enlarged plan view of a portion IV of  FIG. 3 ; 
           [0048]      FIG. 5  is a cross-sectional view taken along line V-V′ of  FIG. 3 ; 
           [0049]      FIG. 6  is a cross-sectional view taken along line VI-VI′ of  FIG. 3 ; 
           [0050]      FIG. 7  is a graph illustrating the results of measuring time domain reflectometry of the display device of  FIG. 1 ; 
           [0051]      FIG. 8  is an enlarged graph of a portion VIII of  FIG. 7 ; 
           [0052]      FIG. 9  is a graph illustrating the results of analyzing an S parameter of the display device of  FIG. 1 ; 
           [0053]      FIG. 10  is an enlarged graph illustrating a portion X of  FIG. 9 ; 
           [0054]      FIG. 11  is a perspective view of a first printed circuit board, a first connector, and a flexible cable of a display device according to another embodiment of the present invention; 
           [0055]      FIG. 12  is a plan view of the first printed circuit board, the first connector, and the flexible cable of  FIG. 11 ; 
           [0056]      FIG. 13  is a perspective view of a first printed circuit board, a first connector, and a flexible cable of a display device according to still another embodiment of the present invention; 
           [0057]      FIG. 14  is a plan view of the first printed circuit board, the first connector, and the flexible cable of  FIG. 11 ; 
           [0058]      FIG. 15  is a cross-sectional view taken along line XV-XV′ of  FIG. 14 ; and 
           [0059]      FIGS. 16 to 19  are cross-sectional views of first printed circuit boards of display devices according to other embodiments of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF EMBODIMENTS 
       [0060]    Advantages and features of the present invention and methods of accomplishing the same may be understood more readily by reference to the following detailed description of preferred embodiments and the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concept of the invention to those skilled in the art, and the present invention will only be defined by the appended claims. Thus, in some embodiments, well-known structures and devices are not shown in order not to obscure the description of the invention with unnecessary detail. Like numbers refer to like elements throughout. In the drawings, the thickness of layers and regions are exaggerated for clarity. 
         [0061]    It will be understood that when an element or layer is referred to as being “on,” or “connected to” another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers may be present. In contrast, when an element is referred to as being “directly on” or “directly connected to” another element or layer, there are no intervening elements or layers present. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. 
         [0062]    Spatially relative terms, such as “below,” “beneath,” “lower,” “above,” “upper,” and the like, may be used herein for ease of description to describe one element or feature&#39;s relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. 
         [0063]    Embodiments described herein will be described referring to plan views and/or cross-sectional views by way of ideal schematic views of the invention. Accordingly, the exemplary views may be modified depending on manufacturing technologies and/or tolerances. Therefore, the embodiments of the invention are not limited to those shown in the views, but include modifications in configuration formed on the basis of manufacturing processes. Therefore, regions exemplified in figures have schematic properties and shapes of regions shown in figures exemplify specific shapes of regions of elements and not limit aspects of the invention. 
         [0064]    Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. 
         [0065]      FIG. 1  is a plan view of a display device according to an embodiment of the present invention. Referring to  FIG. 1 , a display device according to an embodiment of the present invention may include a display panel  100 , a gate tape carrier package  200 , a gate integrated circuit  200   a , a data tape carrier package  300 , a data integrated circuit  300   a , a first printed circuit board  400 , a first connector  500 , a second printed circuit board  600 , a timing controller  600   a , a second connector  700 , and a flexible cable  800 . 
         [0066]    The display panel  100  is a panel that displays data. The display panel  100  may be a liquid crystal display (LCD) panel, an electrophoretic display panel, an organic light emitting display (OLED) panel, a light emitting diode (LED) panel, an inorganic electroluminescent (EL) display panel, a field emission display (FED) panel, a surface-conduction electron-emitter display (SED) panel, a plasma display panel (PDP), or a cathode ray tube (CRT) display panel. Hereinafter, as a display device according to an embodiment of the present invention, a liquid crystal display is exemplified, and as a display panel  100 , an LCD panel is exemplified. However, the display device and the display panel  100  according to embodiments of the present invention are not limited thereto, and various types of display devices and display panels may be used. 
         [0067]    Although not illustrated in the drawing, the display panel  100  may include a display region where an image is displayed and a non-display region where an image is not displayed. In an exemplary embodiment, the display region may be surrounded by the non-display region. For example, the display region may be a center region of the display panel  100 , and the non-display region may be an edge region of the display panel  100 . 
         [0068]    Further, although not illustrated in the drawing, the display panel  100  may include a first substrate, a second substrate that faces the first substrate, and a liquid crystal layer interposed between the first substrate and the second substrate. The first substrate and the second substrate may be in a cuboidal shape. However, the shape of the first substrate and the second substrate is not limited thereto, but the first substrate and the second substrate may be manufactured in various shapes. Further, between the first substrate and the second substrate, a sealing member, such as a sealant, may be arranged along the edge portions of the first substrate and the second substrate to attach and seal the first substrate and the second substrate. 
         [0069]    The gate tape carrier package (TCP)  200  may be connected to at least one side of the display panel  100 . In an exemplary embodiment, the gate tape carrier package  200  may be formed in the non-display region of the display panel  100 . Further, the gate tape carrier package  200  may be positioned on two short sides of the display panel  100 , but is not limited thereto. The gate tape carrier package  200  may be positioned on one short side or long side of the display panel  100 . 
         [0070]    The gate tape carrier package  200  may include a flexible film. In an exemplary embodiment, such a flexible film may be made of a plastic material. 
         [0071]    A plurality of gate tape carrier packages  200  may be provided. The plurality of gate tape carrier package  200  may be arranged to be spaced apart from each other by a predetermined distance. In an exemplary embodiment illustrated in  FIG. 1 , four gate tape carrier packages  200  may be positioned on one short side, and four gate tape carrier packages  200  may be positioned on the other short side that is opposite to the one short side, but are not limited thereto. 
         [0072]    The gate integrated circuit  200   a  may be mounted on the gate tape carrier package  200 . The gate integrated circuit  200   a  may be connected to a plurality of gate lines (not illustrated) of the display panel  100  via the gate tape carrier package  200 . The gate integrate circuit  200   a  may successively provide a scan signal of a gate high voltage to the plurality of gate lines. Further, the gate integrated circuit  200   a  may supply a gate low voltage to the plurality of gate lines in the remaining period except for a period when the gate high voltage is supplied. 
         [0073]    The data tape carrier package  300  may be connected to at least one side of the display panel  100 . In an exemplary embodiment, the data tape carrier package  300  may be formed in the non-display region of the display panel  100 . Further, the data tape carrier package  300  may be positioned on one long side of the display panel  100 , but is not limited thereto. The data tape carrier package  300  may be positioned on two long sides or short sides of the display panel  100 . 
         [0074]    The data tape carrier package  300  may include a flexible film. In an exemplary embodiment, such a flexible film may be made of a plastic material. 
         [0075]    A plurality of data tape carrier packages  300  may be provided. The plurality of data tape carrier package  300  may be arranged to be spaced apart from each other by a predetermined distance. In an exemplary embodiment illustrated in  FIG. 1 , eight data tape carrier packages  300  may be positioned on one long side, but are not limited thereto. 
         [0076]    The data integrated circuit  300   a  may be mounted on the data tape carrier package  300 . The data integrated circuit  300   a  may be connected to a plurality of data lines (not illustrated) of the display panel  100  via the data tape carrier package  300 . The data integrate circuit  300   a  may convert pixel data into an analog pixel signal and supply the analog pixel signal to the plurality of data lines. 
         [0077]    The first printed circuit board (PCB)  400  may be connected to the data tape carrier package  300 . In embodiments, one end of the data tape carrier package  300  may be connected to the display panel  100 , and the other end of the data tape carrier package  300  that faces the one side may be connected to the first printed circuit board  400 . The first printed circuit board  400  may be a source printed circuit board. The first printed circuit board  400  may supply a control signal that is output from the timing controller  600   a  mounted on the second printed circuit board  600  to be described later to the data integrated circuit  300   a.    
         [0078]    A plurality of printed circuit boards  400  may be provided. In an exemplary embodiment, two first printed circuit boards  400  may be arranged along the long side of the display panel  100 , but are not limited thereto. In an exemplary embodiment illustrated in  FIG. 1 , the plurality of first printed circuit boards  400  may be connected to four data tape carrier packages  300 , respectively, but are not limited thereto. 
         [0079]    The first connector  500  may be connected to the first printed circuit board  400 . In an exemplary embodiment, the first connector  500  may be positioned on the other side of the first printed circuit board  400  that faces one side of the first printed circuit board  400  to which the gate tape carrier package  200  is connected. The first connector  500  may transfer a control signal that is output from the timing controller  600   a  mounted on the second printed circuit board  600  to be described later to the first printed circuit board  400 . 
         [0080]    A plurality of first connectors  500  may be provided. In an exemplary embodiment, the plurality of first connectors  500  may be positioned on the plurality of first printed circuit boards  400 , respectively. In embodiments, the first connectors  500  and the first printed circuit boards  400  may have one-to-one correspondence relationship. 
         [0081]    The structure of a connection portion between the first printed circuit board  400  and the first connector  500  will be described in detail later. 
         [0082]    The second printed circuit board  600  may be connected to the first printed circuit board  400 . In embodiments, the second printed circuit board  600  may be connected to the first printed circuit board  400  through the flexible cable  800  to be described later. The second printed circuit board  600  may be a control printed circuit board. The second printed circuit board  600  may transfer a control signal that is output from the timing controller  600   a  to be described later to the first connector  500 . 
         [0083]    One second printed circuit board  600  may be provided. In an exemplary embodiment, one second printed circuit board  600  may be connected to two first printed circuit boards  400 , but is not limited thereto. 
         [0084]    The timing controller  600   a  may be mounted on the second printed circuit board  600 . The timing controller  600   a  may output various kinds of control signals that are transferred to the display panel  100  to match the timing thereof. The control signals generated by the timing controller  600   a  may be transferred to the data integrated circuit  300   a  via the second printed circuit board  600 , the second connector  700 , the flexible cable  800 , the first connector  500 , the first printed circuit board  400 , and the data tape carrier package  300 . 
         [0085]    The second connector  700  may be connected to the second printed circuit board  600 . In an exemplary embodiment, the second connector  700  may be positioned on one side of the second printed circuit board  600  that faces the first printed circuit board  400 . The second connector  700  may transfer the control signals from the timing controller  600   a  to be described later to the first connector  500 . 
         [0086]    A plurality of second connectors  700  may be provided. In an exemplary embodiment, the plurality of second connectors  700  may be positioned on one second printed circuit boards  600 . The plurality of second connectors  700  may correspond to the plurality of first connectors  500 , respectively. That is, the first connectors  500  and the second connectors  700  may have one-to-one correspondence relationship. 
         [0087]    The structure of a connection portion between the second printed circuit board  600  and the second connector  700  will be described in detail later. 
         [0088]    The flexible cable  800  may connect the first connector  500  and the second connector  700  to each other. In an exemplary embodiment, the flexible cable  800  may be a flat flex cable (FFC). The flexible cable  800  may have a structure in which insulating plastic surrounds a metal thin film. The flexible cable  800  may serve to transfer the control signal generated by the timing controller  600   a  from the second connector  700  to the first connector  500 . 
         [0089]    Hereinafter, the structure of the connection portion between the first printed circuit board  400  and the first connector  500  in accordance with embodiments will be described in detail with reference to  FIGS. 2 to 5 .  FIG. 2  is an enlarged perspective view of a portion II of  FIG. 1 , and  FIG. 3  is an enlarged plan view of a portion II of  FIG. 1 .  FIG. 4  is an enlarged plan view of a portion IV of  FIG. 3 , and  FIG. 5  is a cross-sectional view taken along line V-V′ of  FIG. 3 . 
         [0090]    Referring to  FIGS. 2 to 5 , the first printed circuit board  400  may include a first base member  410 , a plurality of first conductive features  430 , and a first adhesive layer  450 . In embodiments, the conductive features may include conductive tracks, conductive wires, conductive pads and other features formed on an insulator substrate for forming a printed circuit board. Such conductive features may be provided by forming a conductive metal layer, for example, copper layer, on the insulation substrate and patterning the conductive metal layer to form a conductive pattern layer with the conductive features, but not limited thereto. 
         [0091]    The first base member  410  may be a base that forms the first printed circuit board  400 . The first base member  410  may include at least one first conductive layer  410   a  and at least one first insulating layer  410   b.    
         [0092]    The first conductive layer  410   a  may be made of a conductive material. In an exemplary embodiment, the first conductive layer  410   a  may be a copper foil layer, but is not limited thereto. The first conductive layer  410   a  may be made of various conductive materials that can transfer an electrical signal. In embodiments, the first conductive layer  410   a  may include a ground of a circuit. 
         [0093]    The first insulating layer  410   b  may be made of an insulating material. In an exemplary embodiment, the first insulating layer  410   b  may be made of a resin that includes polyimide (PI), but is not limited thereto. The first insulating layer  410   b  may be made of various insulating materials. 
         [0094]    The first base member  410  may include a plurality of first conductive layers  410   a  and a plurality of first insulating layers  410   b . The plurality of first conductive layers  410   a  and the plurality of first insulating layers  410   b  may be alternately stacked. In an exemplary embodiment illustrated in  FIGS. 2 to 5 , five first conductive layers  410   a  and five insulating layers  410   b  may be stacked, but are not limited thereto. That is, the first base member  410  may have a multilayer structure. 
         [0095]    Although not illustrated in the drawing, at least one of the plurality of first insulating layers  410   b  may include at least one via hole that connects the plurality of first conductive layers  410   a  and the plurality of first conductive features  430  to each other. 
         [0096]    In embodiments, the printed circuit board may include a first region  10   a  and a second region  20   a  when viewed in a viewing direction perpendicular to a major surface of t 0  the base member. The second region  20   a  is next to the first region  10   a.    
         [0097]    The first region  10   a  may be a region where the first conductive layer  410   a  is positioned. Further, the first region  10   a  may be a region where the plurality of first conductive features  430  are positioned. Further, the first region  10   a  may be a center region of the first base member  410 . 
         [0098]    The second region  20   a  may be adjacent to the first region  10   a . The second region  20   a  may be a region where the first conductive layer  410   a  is not positioned. Further, the second region  20   a  may be a region where the plurality of first conductive features  430  are not positioned. Further, the second region  20   a  may be a part of an edge region of the first base member  410 . Further, the second region  20   a  may be a region where a part of the first connector  500  is arranged. In an exemplary embodiment, the second region  20   a  may be a region that corresponds to a main body of the first connector  500 . In embodiments, the first connector  500  includes a plurality of conductive terminals each of which is attached to one of the corresponding conductive features  430  in the first region. 
         [0099]    As described above, the first conductive layer  410   a  may be positioned only in the first region  10   a , and the first insulating layer  410   b  may be positioned in both the first region  10   a  and the second region  20   a.    
         [0100]    The plurality of first conductive features  430  may be positioned on the first base member  410 . Specifically, the plurality of first conductive features  430  may be positioned on the first conductive layer  410   a . Further, the plurality of first wiring pattern  430  may be positioned in the first region  10   a . Further, the plurality of first conductive features  430  may not be positioned in the second region  20   a . Further, the plurality of first conductive features  430  may be directly positioned on the first insulating layer  410   b . That is, the first insulating layer  410   b  may be interposed between the plurality of first conductive features  430  and the first conductive layer  410   a . Control signals that are transferred from the timing controller  600   a  may be applied to the plurality of conductive features  430 . 
         [0101]    The plurality of first conductive features  430  may be made of a conductive material. In an exemplary embodiment, the plurality of first conductive features  430  may be made of the same material as the first conductive layer  410   a . The plurality of first conductive features  430  may have impedance of about 100 ohms. 
         [0102]    Parts of the plurality of first conductive features  430  may be connected to the first connector  500 . In an exemplary embodiment illustrated in  FIGS. 2 to 4 , four first conductive features  430  are connected to the first connector  500 , but are not limited thereto. 
         [0103]    The minimum width d 1  of each of the plurality of first conductive features  430  that are connected to the first connector  500  may be smaller than the minimum width d 2  of each of the plurality of first conductive features  430  that are not connected to the first connector  500 . In an exemplary embodiment, referring to  FIG. 4 , the minimum width d 1  of each of the plurality of first conductive features  430  that are connected to the first connector  500  may be about 0.8 mm to about 1.2 mm. Preferably, the minimum width d 1  of each of the plurality of first conductive features  430  that are connected to the first connector  500  may be about 1 mm. The minimum width d 1  of each of the plurality of first conductive features  430  that are connected to the first connector  500  may be determined by the amount of increase of necessary inductance and the tolerance in a process of manufacturing the first printed circuit board  400  to be described later. Further, the minimum width d 2  of each of the plurality of first conductive features  430  that are not connected to the first connector  500  may be about 1.2 mm to about 1.6 mm. The minimum width d 2  of each of the plurality of first conductive features  430  that are not connected to the first connector  500  may be preferably about 1.4 mm. 
         [0104]    The first adhesive layer  450  may be positioned on the first base member  410 . Specifically, the first adhesive layer  450  may be positioned in the second region  20   a . Further, the first adhesive layer  450  may be positioned on the same plane as the plurality of first conductive features  430 . Further, the first adhesive layer  450  may be interposed between the first connector  500  and the first base member  410 . The first adhesive layer  450  may serve to fix the first connector  500  to the first base member  410 . The first adhesive layer  450  may be made of an adhesive resin that is generally used. The first adhesive layer  450  may be omitted according to circumstances. 
         [0105]    As described above, the main body of the first connector  500  may be arranged in the second region  20   a  of the first base member  410 , on which the first conductive layer  410   a  is not positioned, to be electrically connected to parts of the plurality of first conductive features  430 . 
         [0106]    Hereinafter, the structure of the connection portion between the second printed circuit board  600  and the second connector  700  will be described in detail with reference to  FIG. 6 .  FIG. 6  is a cross-sectional view taken along lint VI-VI′ of  FIG. 1 . 
         [0107]    Referring to  FIG. 6 , a second printed circuit board  600  may include a second base member  610 , a plurality of second conductive features  630 , and a second adhesive layer  650 . 
         [0108]    The second base member  610  may include at least one second conductive layer  610   a  and at least one second insulating layer  610   b . Since the second conductive layer  610   a  and the second insulating layer  610   b  have substantially the same material and structure as the first conductive layer  410   a  and the first insulating layer  410   b  as described above, the detailed description thereof will be omitted. 
         [0109]    The second base member  610  may include a first region  10   b  and a second region  20   b . Since the first region  10   b  and the second region  20   b  mean substantially the same regions as the first region  10   a  and the second region  20   a  as described above, the detailed description thereof will be omitted. 
         [0110]    The plurality of second conductive features  630  may be positioned on the second base member  610 . Since the plurality of second conductive features  630  have substantially the same material and structure as the plurality of first conductive features  430  as described above, the detailed description thereof will be omitted. 
         [0111]    The second adhesive layer  650  may be positioned on the second base member  610 . Since the second adhesive layer  650  has substantially the same material and structure as the first adhesive layer  450  as described above, the detailed description thereof will be omitted. 
         [0112]    As described above, the connection structure between the first printed circuit board  400  and the first connector  500  may be substantially the same as the connection structure between the second printed circuit board  600  and the second connector  700 . 
         [0113]    According to an embodiment of the present invention as described above, the signal integrity characteristics of the display device can be improved by the connection structure between the first printed circuit board  400  and the first connector  500  and the connection structure between the second printed circuit board  600  and the second connector  700 . This will be described in detail with reference to  FIGS. 7 to 10 .  FIG. 7  is a graph illustrating the results of measuring time domain reflectometry of the display device of  FIG. 1 , and  FIG. 8  is an enlarged graph of a portion VIII of  FIG. 7 .  FIG. 9  is a graph illustrating the results of analyzing an S parameter of the display device of  FIG. 1 , and  FIG. 10  is an enlarged graph illustrating a portion X of  FIG. 9 . 
         [0114]    First, referring to  FIGS. 7 and 8 , graph A of  FIG. 7  is a graph in the case where the first conductive layer  410   a  and the second conductive layer  610   a  exist not only in the first regions  10   a  and  10   b  but also in the second regions  20   a  and  20   b , and the minimum width of the plurality of first conductive features  430  and the plurality of second conductive features  630  is constantly about 1.4 mm. On the other hand, a transition region TR of  FIG. 7  is a region that corresponds to the connection region between the first printed circuit board  400  and the first connector  500  and the connection region between the second printed circuit board  600  and the second connector  700 . That is, if the first conductive layer  410   a  and the second conductive layer  610   a  exist not only in the first regions  10   a  and  10   b  but also in the second regions  20   a  and  20   b , and the minimum width of the plurality of first conductive features  430  and the plurality of second conductive features  630  is constantly about 1.4 mm (graph A), the impedance is excessively lowered in the transition region TR. Referring to  FIG. 8 , the minimum point of the graph A is about 71.2979 ohms at about 1.4231 ns. Such excessive impedance lowering may deteriorate the signal integrity characteristics. 
         [0115]    The excessive impedance lowering may be mainly caused by parasitic capacitance between the first connector  500  and the first conductive layer  410   a , parasitic capacitance between the second connector  700  and the second conductive layer  610   a , parasitic capacitance between the plurality of first conductive features  430 , and parasitic capacitance between the plurality of second conductive features  630 . Accordingly, a method for decreasing the parasitic capacitance or increasing the inductance based on an impedance formula, Z 0 =root (L/C) (here, Z 0  is the characteristic impedance, L is the inductance, and C is the capacitance), may be considered. 
         [0116]    First, the first conductive layer  410   a  of the lower portion of the main body of the first connector  500  and the second conductive layer  610   a  of the lower portion of the main body of the second connector  700  may be removed (graph B). Through this, if the first conductive layer  410   a  of the lower portion of the main body of the first connector  500  and the second conductive layer  610   a  of the lower portion of the main body of the second connector  700  are removed, the parasitic capacitance between the first connector  500  and the first conductive layer  410   a  and the parasitic capacitance between the second connector  700  and the second conductive layer  610   a  can be removed, and thus the impedance in the transition region TR can be prevented from being excessively decreased. Referring to  FIG. 8 , the minimum point of the graph B is about 72.8754 ohms at about 1.4231 ns. That is, the impedance on the condition of graph B with respect to the condition of graph A is increased by about 1.57 ohms in the transition region TR. 
         [0117]    Next, the minimum width of each of the plurality of first conductive features  430  connected to the first connector  500  and the minimum width of each of the plurality of second conductive features  630  connected to the second connector  700  may be decreased (graph C) simultaneously with the removal of the first conductive layer  410   a  of the lower portion of the main body of the first connector  500  and the second conductive layer  610   a  of the lower portion of the main body of the second connector  700 . As described above, if the minimum width of each of the plurality of first conductive features  430  connected to the first connector  500  and the minimum width of each of the plurality of second conductive features  630  connected to the second connector  700  are decreased, the distance between the plurality of first conductive features  430  connected to the first connector  500  and the distance between the plurality of second conductive features  630  connected to the first connector  500  can be increased, and thus the parasitic capacitance between the plurality of first conductive features  430  and the parasitic capacitance between the plurality of second conductive features  630  can be decreased. Further, if the minimum width of each of the plurality of first conductive features  430  connected to the first connector  500  and the minimum width of each of the plurality of second conductive features  630  connected to the second connector  700  are decreased, the impedance in this portion is increased. Accordingly, the impedance in the transition region TR can be prevented from being excessively decreased. Referring to  FIG. 8 , the minimum point of the graph C is about 74.3948 ohms at about 1.4260 ns. That is, the impedance on the condition of graph C with respect to the condition of graph B is increased by about 1.52 ohms in the transition region TR. 
         [0118]    As a result, the impedance on the condition of graph C with respect to the condition of graph A is improved by about 3.09 ohms in the transition region TR. That is, the display device according to an embodiment of the present invention has superior signal integrity characteristics in the connection portion between the first printed circuit board  400  and the first connector  500  and the connection portion between the second printed circuit board  600  and the second connector  700 . 
         [0119]    Next,  FIGS. 9 and 10  are referred to.  FIG. 9  illustrates the results of measuring a forward transfer coefficient (S 21 ) of an S parameter. The conditions of graphs D, E, and F of  FIG. 9  correspond to the conditions of graphs A, B, and C of  FIG. 7 , respectively. Referring to  FIG. 10 , in the ultra-high speed driving of 6 Gbps (3 GHz), the minimum point of graph D is −5.7691 dB, the minimum point of graph E is −4.5593 dB, and the minimum point of graph F is −4.4877 dB. That is, in the ultra-high speed driving of 3 GHz, the S 21  characteristics on the condition of graph F with respect to the condition of graph D are improved by about 1.28 dB. That is, the display device according to an embodiment of the present invention has superior signal integrity characteristics in the connection portion between the first printed circuit board  400  and the first connector  500  and the connection portion between the second printed circuit board  600  and the second connector  700 . 
         [0120]    On the other hand, although not illustrated in the drawing, as the results of testing the signal integrity characteristics through application of the condition of 6 Gbps in a linear source, the eyeheight on the condition of graph C of  FIG. 7  (or the condition of graph F of  FIG. 9 ) with respect to the condition of graph A of  FIG. 7  (or the condition of graph D of  FIG. 9 ) is increased from about 317 mV to about 383 mV. That is, the eyeheight on the condition of graph C of  FIG. 7  (or the condition of graph F of  FIG. 9 ) with respect to the condition of graph A of  FIG. 7  (or the condition of graph D of  FIG. 9 ) is improved by about 66 mV (about 21%). That is, the display device according to an embodiment of the present invention has superior signal integrity characteristics in the connection portion between the first printed circuit board  400  and the first connector  500  and the connection portion between the second printed circuit board  600  and the second connector  700 . 
         [0121]    Hereinafter, other embodiments of the present invention will be described. In other embodiments of the present invention, the structure of the first printed circuit boards  401  and  402  is substantially the same as the structure (not illustrated) of the second printed circuit boards, and thus explanation will be made to focus on the structure of the first printed circuit boards  401  and  402 . 
         [0122]      FIG. 11  is a perspective view of a first printed circuit board  401 , a first connector  500 , and a flexible cable  800  of a display device according to another embodiment of the present invention, and  FIG. 12  is a plan view of the first printed circuit board  401 , the first connector  500 , and the flexible cable  800  of  FIG. 11 . For convenience in explanation, the same reference numerals are used for substantially the same elements as the elements illustrated in the drawings as described above, and the duplicate explanation thereof will be omitted. 
         [0123]    Referring to  FIGS. 11 and 12 , in a first base member  411  of the first printed circuit board  401 , the ranges of a first region  11   a  and a second region  21   a  may differ from each other. That is, the first region  11   a  may mean a center region of the first base member  411 , and the second region  21   a  may mean the whole edge region of the first base member  411 . That is, the second region  21   a  may mean not only the region that corresponds to the first connector  500  but also the whole edge region of the first base member  411 . On the other hand, a plurality of first conductive features  431  may be positioned on the first region  11   a  as described above or may be positioned on the second region  21   a  as described above. Here, since the range of the second region  21   a  differs, an area occupied by a first adhesive layer  451  may also differ. 
         [0124]      FIG. 13  is a perspective view of a first printed circuit board  402 , a first connector  500 , and a flexible cable  800  of a display device according to still another embodiment of the present invention.  FIG. 14  is a plan view of the first printed circuit board  402 , the first connector  500 , and the flexible cable  800  of  FIG. 13 , and  FIG. 15  is a cross-sectional view taken along line XV-XV′ of  FIG. 14 . For convenience in explanation, the same reference numerals are used for substantially the same elements as the elements illustrated in the drawings as described above, and the duplicate explanation thereof will be omitted. 
         [0125]    Referring to  FIGS. 13 to 15 , in a first base member  412  of the first printed circuit board  402 , the ranges of a first region  12   a  and a second region  22   a  may differ from each other. That is, the first connector  500  may be arranged only on the second region  22   a , but may not be arranged on the first region  12   a . Further, one side of a plurality of first conductive features  432  may be positioned on the first region  12   a , but the other side of the plurality of first conductive features  432 , which faces the one side, may be positioned on the second region  22   a . That is, the plurality of first conductive features  432  may be arranged to further project from an end portion of a first conductive layer  412   a . In other words, end portions of the plurality of first conductive features  432  may not overlap the first conductive layer  412   a , but may overlap a first insulating layer  412   b . On the other hand, a first adhesive layer  452  may be positioned on the second region  22   a  as described above. 
         [0126]      FIGS. 16 to 19  are cross-sectional views of first printed circuit boards  403 ,  404 ,  405 , and  406  of display devices according to other embodiments of the present invention. For convenience in explanation, the same reference numerals are used for substantially the same elements as the elements illustrated in the drawings as described above, and the duplicate explanation thereof will be omitted. 
         [0127]    Referring to  FIGS. 16 to 19 , a plurality of first conductive layers  413   a ,  414   a ,  415   a , and  416   a  may all exist on a first region  10   a . However, at least one of the plurality of first conductive layers  413   a ,  414   a ,  415   a , and  416   a  may not exist on a second region  20   a . In an exemplary embodiment, at least one of the plurality of first conductive layers  413   a ,  414   a ,  415   a , and  416   a , which does not exist on the second region  20   a , may be adjacent to a first connector  500 . That is, it is most helpful in improving the signal integrity characteristics to remove all the first conductive layers  413   a ,  414   a ,  415   a , and  416   a  from the second region  20   a  on which the first connector  500  is arranged. However, even if only one of the plurality of first conductive layers  413   a ,  414   a ,  415   a , and  416   a  that are adjacent to the first connector  500  is removed, the parasitic capacitance between the first connector  500  and the plurality of first conductive layers  413   a ,  414   a ,  415   a , and  416   a  can be decreased to improve the signal integrity characteristics. Here, as going from a structure (see  FIG. 16 ) in which the first conductive layer  413   a  that is most adjacent to the first connector  500  is removed from the second region  20   a  to a structure (see  FIG. 19 ) in which only the first conductive layer  416   a  that is farthest apart from the first connector  500  remains, the parasitic capacitance between the first connector  500  and the plurality of first conductive layers  413   a ,  414   a ,  415   a , and  416   a  can be decreased to improve the signal integrity characteristics. 
         [0128]    Although preferred embodiments of the present invention have been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.