Abstract:
A pixel includes a light emitting diode, and a switching circuit that is coupled to a data line, and includes a transistor including a control terminal, a first main terminal coupled to a power source line, and a second main terminal coupled to the light emitting diode. The switching circuit generates a control signal based on at least a voltage of a data signal transmitted through the data line and a voltage drop of the light emitting diode, and applies the control signal to the control terminal of the first transistor to control a current flowing in the light emitting diode so that the current varies in accordance with the voltage of the data signal and is independent of variations in the voltage drop of the light emitting diode.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims the benefit of Korean Patent Application 2007-107850 filed on Oct. 25, 2007, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    Aspects of the invention relate to a pixel and an organic light emitting display using the same, and more particularly to a pixel capable of compensating for the threshold voltage of a transistor of the pixel and for deterioration of the pixel, and an organic light emitting display using the same. 
         [0004]    2. Description of the Related Art 
         [0005]    Due to recent advances in thin film transistor (TFT) technology, active matrix type flat panel displays that display images using TFTs have become widely used. In particular, organic light emitting displays having high emission efficiency, brightness, and response speed and a large viewing angle have been in the spotlight recently. 
         [0006]    An organic light emitting display displays an image using a plurality of organic light emitting diodes (OLEDs). An OLED includes an anode electrode, a cathode electrode, and an organic light emitting layer disposed between the anode electrode and the cathode electrode to emit light resulting from recombination of electrons and holes. 
         [0007]      FIG. 1  is a circuit diagram of a pixel used in an organic light emitting display according to the related art. Referring to  FIG. 1 , the pixel includes a first transistor T 1 , a second transistor T 2 , a capacitor Cst, and an organic light emitting diode (OLED). 
         [0008]    The source of the first transistor T 1  is coupled to a first power source ELVDD, the drain of the first transistor T 1  is coupled to the OLED, and the gate of the first transistor T 1  is coupled to a node N. The source of the second transistor T 2  is coupled to a data line Dm, the drain of the second transistor T 2  is coupled to the node N, and the gate of the second transistor T 2  is coupled to a scan line Sn. The first electrode of the capacitor Cst is coupled to the first power source ELVDD, and the second electrode of the capacitor Cst is coupled to the node N. The OLED includes an anode electrode, a cathode electrode, and a light emitting layer disposed between the anode electrode and the cathode electrode. The anode electrode is coupled to the drain of the first transistor T 1 , and the cathode electrode is coupled to a second power source ELVSS. When current flows from the anode electrode to the cathode electrode in the OLED, the light emitting layer emits light having a brightness that depends on the magnitude of the current flowing in the OLED. The following Equation 1 expresses the current that flows in the OLED: 
         [0000]    
       
         
           
             
               
                 
                   
                     I 
                     d 
                   
                   = 
                   
                     
                       β 
                       2 
                     
                      
                     
                       
                         ( 
                         
                           ELVDD 
                           - 
                           Vdata 
                           - 
                           Vth 
                         
                         ) 
                       
                       2 
                     
                   
                 
               
               
                 
                   ( 
                   1 
                   ) 
                 
               
             
           
         
       
     
         [0000]    where I d  is the current that flows in the OLED, Vdata is the voltage of a data signal applied to the data line Dm, ELVDD is the voltage of the first power source applied to the source of the first transistor T 1 , Vth is the threshold voltage of the first transistor T 1 , and β is a constant. 
         [0009]    Referring to Equation 1, the current that flows in the OLED depends on the voltage ELVDD of the first power source, the voltage Vdata of the data signal, and the threshold voltage Vth of the first transistor T 1 . Therefore, the current that flows in the OLED varies in accordance with the voltage deviation of the first power source ELVDD applied to each pixel and the deviation of the threshold voltage of the first transistor Ti, thereby causing a deviation in the brightness of the OLED. In addition, when current flows in the OLED for a long time, the OLED deteriorates so that the brightness of the light that is generated varies even though the same current flows, thereby deteriorating picture quality. 
       SUMMARY OF THE INVENTION 
       [0010]    Aspects of the invention relate to providing a pixel capable of compensating for a threshold voltage of a transistor of the pixel and preventing picture quality from deteriorating due to the deterioration of an organic light emitting diode of the pixel, and an organic light emitting display using the same. 
         [0011]    According to an aspect of the invention, a pixel includes an organic light emitting diode (OLED) including an anode electrode, a cathode electrode, and a light emitting layer disposed between the anode electrode and the cathode electrode; a first transistor including a source coupled to a first power source line, a drain coupled to a first node, and a gate coupled to a second node; a second transistor including a source coupled to a data line, a drain coupled to a third node, and a gate coupled to a first scan line; a third transistor including a source coupled to the first node, a drain coupled to the second node, and a gate coupled to a second scan line; a fourth transistor including a source coupled to the anode electrode, a drain coupled to the third node, and a gate coupled to a third scan line; a fifth transistor including a source coupled to the first node, a drain coupled to the anode electrode, and a gate coupled to an emission control line; a first capacitor including a first electrode coupled to the first power source line, and a second electrode coupled to the second node; and a second capacitor including a first electrode coupled to the third node, and a second electrode coupled to the second node. 
         [0012]    According to an aspect of the invention, an organic light emitting display includes a pixel unit including a plurality of pixels each arranged to receive a first scan signal, a second scan signal, a third scan signal, an emission control signal, and a data signal to display an image; and a scan driver to generate the first scan signal, the second scan signal, the third scan signal, and the emission control signal. At least one pixel of the plurality of pixels includes an organic light emitting diode (OLED) including an anode electrode, a cathode electrode, and a light emitting layer disposed between the anode electrode and the cathode electrode; a first transistor including a source coupled to a first power source line, a drain coupled to a first node, and a gate coupled to a second node; a second transistor including a source coupled to a data line, a drain coupled to a third node, and a gate coupled to a first scan line; a third transistor including a source coupled to the first node, a drain coupled to the second node, and a gate coupled to a second scan line; a fourth transistor including a source coupled to the anode electrode, a drain coupled to the third node, and a gate coupled to a third scan line; a fifth transistor including a source coupled to the first node, a drain coupled to the anode electrode, and a gate coupled to an emission control line; a first capacitor including a first electrode coupled to the first power source line, and a second electrode coupled to the second node; and a second capacitor including a first electrode coupled to the third node, and a second electrode coupled to the second node. 
         [0013]    According to an aspect of the invention, a pixel includes a switching circuit including a first transistor including a control terminal, a first main terminal coupled to a first power source line, and a second main terminal; a first capacitor including a first electrode coupled to the first power source line, and a second electrode coupled to the control terminal of the first transistor; and a second capacitor including a first electrode coupled to a data line, and a second electrode coupled to the control terminal of the first transistor. The pixel further includes a light emitting diode including a first terminal coupled to the second main terminal of the first transistor, and a second terminal coupled to a second power source line. The switching circuit generates a control signal based on at least a voltage of a data signal transmitted through the data line and a voltage drop of the light emitting diode, and applies the control signal to the control terminal of the first transistor to control a current flowing in the light emitting diode so that the current varies in accordance with the voltage of the data signal and is independent of variations in the voltage drop of the light emitting diode. 
         [0014]    Additional aspects and/or advantages of the invention will be set forth in part in the description that follows and, in part, will be obvious from the description, or may be learned by practice of the invention. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0015]    The above and/or other aspects and advantages of the invention will become apparent and more readily appreciated from the following description of embodiments of the invention, taken in conjunction with the accompanying drawings of which: 
           [0016]      FIG. 1  is a circuit diagram of a pixel used in an organic light emitting display according to the related art; 
           [0017]      FIG. 2  is a circuit diagram of an organic light emitting display according to an aspect of the invention; 
           [0018]      FIG. 3  is a circuit diagram of a pixel according to an aspect of the invention used in the organic light emitting display of  FIG. 2 ; 
           [0019]      FIG. 4  is a timing diagram of signals transmitted to the pixel of  FIG. 3 ; 
           [0020]      FIG. 5  is a circuit diagram of a pixel according to an aspect of the invention used in the organic light emitting display of  FIG. 2 ; and 
           [0021]      FIG. 6  is a timing diagram of signals transmitted to the pixel of  FIG. 5 . 
       
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
       [0022]    Reference will now be made in detail to the embodiments of the invention, examples of which are shown in the accompanying drawings, wherein like reference numerals refer to like elements throughout. The embodiments are described below in order to explain the invention by referring to the figures. 
         [0023]    When one element is described as being coupled to another element in the following description, this indicates that the one element may be directly connected to the other element, or may be indirectly connected to the other element through one or more intervening elements. 
         [0024]      FIG. 2  is a circuit diagram of an organic light emitting display according to an aspect of the invention. Referring to  FIG. 2 , the organic light emitting display includes a pixel unit  100 , a data driver  200 , and a scan driver  300 . The pixel unit  100  includes a plurality of pixels  101 , and each of the pixels  101  includes an organic light emitting diode (OLED) (not shown) that emits light having a brightness that depends on the magnitude of a current flowing in the OLED. In addition, 3n scan lines S 11 , S 12 , S 13 , S 21 , S 22 , S 23 , . . . , S(n- 1 ) 1 , S(n- 1 ) 2 , Sn 2 , and Sn 3  for transmitting scan signals are formed in a row direction, n emission control lines E 1 , E 2 , . . . , E(n- 1 ), and En for transmitting emission control signals are formed in the row direction, and m data lines D 1 , D 2 , . . . , D(m- 1 ), and Dm for transmitting data signals are formed in a column direction. In addition, a first power source ELVDD and a second power source ELVSS provide power from the outside for driving the pixel unit  100 . Therefore, in the pixel unit  100 , driving currents that flow in the OLEDs of the pixels  101  are generated by the scan signals, the emission control signals, the data signals, the first power source ELVDD, and the second power source ELVSS so that the OLEDs of the pixels  101  emit light having a brightness that depends on the driving currents to display an image. 
         [0025]    As shown in  FIG. 2 , three scan lines are coupled to one pixel  101  so that three scan signals are transmitted to the pixel  101 . When one scan signal is transmitted to the pixel  101 , the voltage drop of the OLED of the pixel  101  is compensated for. When another scan signal is transmitted to the pixel  101 , a threshold voltage of a transistor of the pixel  101  is compensated for. When still another scan signal is transmitted to the pixel  101 , a data signal is transmitted to the pixel  101  for use in generating a driving current for driving the OLED of the pixel  101 . Therefore, the driving current can be controlled according to the voltage drop of the OLED and the threshold voltage of the transistor. 
         [0026]    The data driver  200  for applying data signals to the pixel unit  100  receives video data having red, blue, and green components to generate the data signals. The data driver  200  is coupled to the data lines D 1 , D 2 , . . . , D(m- 1 ), and Dm of the pixel unit  100  to apply the generated data signals to the pixel unit  100 . 
         [0027]    The scan driver  300  for applying scan signals and emission control signals to the pixel unit  100  is coupled to the scan lines S 11 , S 12 , S 13 , S 21 , S 22 , S 23 , . . . , S(n- 1 ) 1 , S(n- 1 ) 3 , Sn 1 , Sn 2 , and Sn 3  and the emission control lines E 1 , E 2 , . . . , E(n- 1 ), and En to transmit the scan signals and the emission control signals to specific rows of the pixel unit  100 . The data signals output from the data driver  200  are transmitted to the pixels  101  to which the scan signals are being transmitted so that the driving currents are generated by the pixels  101 , and the generated driving currents flow to the OLEDs under control of the emission control signals. 
         [0028]      FIG. 3  is a circuit diagram of a pixel according to an aspect of the invention used in the organic light emitting display of  FIG. 2 . Referring to  FIG. 3 , a pixel includes a first transistor M 1 , a second transistor M 2 , a third transistor M 3 , a fourth transistor M 4 , a fifth transistor M 5 , a first capacitor C 1 , a second capacitor C 2 , and an organic light emitting diode OLED.  FIG. 3  shows PMOS MOSFET transistors, but it is understood that other types of transistors can be used. 
         [0029]    The source of the first transistor M 1  is coupled to a first power source line ELVDD, the drain of the first transistor M 1  is coupled to a first node N 1 , and the gate of the first transistor M 1  is coupled to a second node N 2 . Therefore, the first transistor M 1  controls the magnitude of the driving current of the pixel that flows from its source to its drain in accordance with the voltage of the second node N 2 . 
         [0030]    The source of the second transistor M 2  is coupled to the data line Dm, the drain of the second transistor M 2  is coupled to a third node N 3 , and the gate of the second transistor M 2  is coupled to the first scan line Sn 1 . The second transistor M 2  transmits the data signal transmitted through the data line Dm to the pixel in accordance with the scan signal transmitted through the first scan line Sn 1 . 
         [0031]    The source of the third transistor M 3  is coupled to the first node N 1 , the drain of the third transistor M 3  is coupled to the second node N 2 , and the gate of the third transistor M 3  is coupled to the second scan line Sn 2 . The third transistor M 3  makes the voltages of the first node N 1  and the second node N 2  equal to each other in accordance with the scan signal transmitted through the second scan line Sn 2  so that the first transistor M 1  operates as a diode-connected transistor. 
         [0032]    The source of the fourth transistor M 4  is coupled to the anode electrode of the OLED, the drain of the fourth transistor M 4  is coupled to a first electrode of the second capacitor C 2  at the third node N 3 , and the gate of the fourth transistor is coupled to the third scan line Sn 3 . Therefore, the fourth transistor M 4  transmits a voltage drop of the OLED, i.e., a voltage between the anode electrode and the cathode electrode of the OLED when a current is flowing in the OLED, to the first electrode of the second capacitor C 2  at the third node N 3  in accordance with the scan signal transmitted through the third scan line Sn 3 . 
         [0033]    The source of the fifth transistor M 5  is coupled to the first node N 1 , the drain of the fifth transistor M 5  is coupled to the anode electrode of the OLED, and the gate of the fifth transistor M 5  is coupled to the emission control line En. Therefore, the fifth transistor M 5  transmits the driving current from the first transistor M 1  to the OLED in accordance with the emission control signal transmitted through the emission control line En. 
         [0034]    A first electrode of the first capacitor C 1  is coupled to the first power source line ELVDD, and a second electrode of the first capacitor C 1  is coupled to the second node N 2  to enable the first capacitor C 1  to maintain the voltage of the second node N 2 . 
         [0035]    The first electrode of the second capacitor C 2  is coupled to the third node N 3 , and a second electrode of the second capacitor C 2  is coupled to the second node N 2  so that the first capacitor C 1  and the second capacitor C 2  are connected in series at the second node N 2  to enable the voltage of the second node N 2  to be controlled in accordance with the voltage of the third node N 3  and the voltage-dividing effect of the series connection of the first capacitor C 1  and the second capacitor C 2 . 
         [0036]    The OLED includes an anode electrode, a cathode electrode, and a light emitting layer disposed between the anode electrode and the cathode electrode to emit light when a current flows from the anode electrode to the cathode electrode. The brightness of the light emitted by the OLED varies in accordance with the magnitude of the current that flows in the OLED, thereby enabling the OLED to display gray scales. 
         [0037]      FIG. 4  is a timing diagram of the signals transmitted to the pixel of  FIG. 3 . Referring to  FIG. 4 , a pixel is coupled to three scan lines Sn 1 , Sn 2 , and Sn 3 . The scan signal transmitted through the first scan line Sn 1  is referred to as a first scan signal sn 1 , the scan signal transmitted through the second scan line Sn 2  is referred to as a second scan signal sn 2 , and the scan signal transmitted through the third scan line Sn 3  is referred to as a third scan signal sn 3 . In addition, the data signal is transmitted to the pixel through the data line Dm, and the emission control signal en is transmitted to the pixel through the emission control line En. 
         [0038]    First, in a period T 1 , the second scan signal sn 2 , the third scan signal sn 3 , and the emission control signal en are in a low state so that the third transistor M 3 , fourth transistor M 4  and the fifth transistor M 5  are turned on. The third transistor M 3  being turned on causes the first transistor M 1  to operate as a diode-connected transistor so that a current flows from the first power source ELVDD to the OLED via the first transistor M 1  and the fifth transistor M 5 . At this time, due to the characteristic of the OLED, the current flowing in the OLED produces a voltage drop (hereinafter referred to as Vel) in the OLED that appears as a voltage on the anode electrode of the OLED. The voltage drop Vel is transmitted to the third node N 3  by the fourth transistor M 4  to initialize the first capacitor C 1  and the second capacitor C 2 . 
         [0039]    In a period T 2 , the second scan signal sn 2  and the third scan signal sn 3  are in a low state and the emission control signal is in a high state so that a current does not flow in the OLED. 
         [0040]    Since the second scan signal sn 2  is still in the low state in the period T 2 , the third transistor M 3  is still turned on, so that the first transistor M 1  is still operating as a diode-connected transistor. The voltage between the source and the drain of a diode-connected transistor is equal to the threshold voltage of the transistor, plus a value that is a function of the current flowing through the transistor. Since the fifth transistor M 5  is turned off during the period T 2  because the emission control signal is in the high state, no current flows through the diode-connected first transistor M 1  during the period T 2 , such that the voltage between the source and the drain of the diode-connected first transistor M 1  during the period T 2  is equal to the threshold voltage of the first transistor M 1 . Therefore, the threshold voltage of the first transistor M 1  is transmitted to the second node N 2  during the period T 2 , thereby causing a voltage expressed by the following Equation 2 to be applied to the second node N 2 : 
         [0000]        Vg=ELVDD+Vth    (2) 
         [0000]    where Vg is the voltage of the second node N 2 , ELVDD is the voltage of the first power source, and Vth is the threshold voltage of the first transistor M 1 . 
         [0041]    In a period T 3 , the second transistor M 2  is turned on by the first scan signal sn 1  to transmit a data signal received through the data line Dm to the third node N 3  so that the voltage of the third node N 3  becomes a voltage (hereinafter referred to as Vdata) of the data signal. Therefore, the voltage of the third node N 3  changes from Vel to Vdata. As the voltage of the third node N 3  changes, the voltage of the second node N 2  changes by an amount that is proportional to Vdata-Vel in accordance with the voltage-dividing effect of the series connection of the first capacitor C 1  and the second capacitor C 2 . Therefore, a voltage expressed by the following Equation 3 appears on the second node N 2 : 
         [0000]    
       
         
           
             
               
                 
                   Vg 
                   = 
                   
                     ELVDD 
                     + 
                     Vth 
                     + 
                     
                       
                         ( 
                         
                           
                             C 
                              
                             
                                 
                             
                              
                             2 
                           
                           
                             
                               C 
                                
                               
                                   
                               
                                
                               1 
                             
                             + 
                             
                               C 
                                
                               
                                   
                               
                                
                               2 
                             
                           
                         
                         ) 
                       
                        
                       
                         ( 
                         
                           Vdata 
                           - 
                           Vel 
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   3 
                   ) 
                 
               
             
           
         
       
     
         [0042]    Finally, in a period T 4 , the fifth transistor M 5  is turned on by the emission control signal en so that a driving current flows through the OLED via the first transistor M 1  and the fifth transistor M 5 , thereby causing the OLED to emit light. The driving current flowing through the OLED is equal to a drain current I d  of the first transistor M 1 , which is expressed by the following Equation 4: 
         [0000]    
       
         
           
             
               
                 
                   
                     I 
                     d 
                   
                   = 
                   
                     
                       β 
                       2 
                     
                      
                     
                       
                         ( 
                         
                           Vgs 
                           - 
                           Vth 
                         
                         ) 
                       
                       2 
                     
                   
                 
               
               
                 
                   ( 
                   4 
                   ) 
                 
               
             
           
         
       
     
         [0000]    where β is a constant, Vgs is the gate-to-source voltage of the first transistor M 1 , and Vth is the threshold voltage of the first transistor M 1 . 
         [0043]    For a MOSFET, the constant β in Equation 4 is expressed by the following Equation 5: 
         [0000]    
       
         
           
             
               
                 
                   β 
                   = 
                   
                     μ 
                     · 
                     
                       C 
                       OX 
                     
                     · 
                     
                       W 
                       L 
                     
                   
                 
               
               
                 
                   ( 
                   5 
                   ) 
                 
               
             
           
         
       
     
         [0000]    where μ is a surface mobility of the first transistor M 1 , C OX  is a gate oxide capacitance per unit area of the first transistor M 1 , W is a gate width of the first transistor M 1 , and L is a gate length of the first transistor M 1 . 
         [0044]    The gate-to-source voltage Vgs in Equation 5 is the voltage difference between the gate voltage Vg of the first transistor M 1 , which, as can be seen from  FIG. 3 , is the voltage of the second node N 2  that is expressed by Equation 3 above, and the source voltage Vs of the first transistor M 1 , which, as can be seen from  FIG. 3 , is ELVDD. Thus, the gate-to-source voltage Vgs of the first transistor M 1  is expressed by the following Equation 6: 
         [0000]    
       
         
           
             
               
                 
                   Vgs 
                   = 
                   
                     
                       Vg 
                       - 
                       Vs 
                     
                     = 
                     
                       
                         [ 
                         
                           
                             
                               
                                 ELVDD 
                                 + 
                                 Vth 
                                 + 
                               
                             
                           
                           
                             
                               
                                 
                                   ( 
                                   
                                     
                                       C 
                                        
                                       
                                           
                                       
                                        
                                       2 
                                     
                                     
                                       
                                         C 
                                          
                                         
                                             
                                         
                                          
                                         1 
                                       
                                       + 
                                       
                                         C 
                                          
                                         
                                             
                                         
                                          
                                         2 
                                       
                                     
                                   
                                   ) 
                                 
                                  
                                 
                                   ( 
                                   
                                     Vdata 
                                     - 
                                     Vel 
                                   
                                   ) 
                                 
                               
                             
                           
                         
                         ] 
                       
                       - 
                       ELVDD 
                     
                   
                 
               
               
                 
                   ( 
                   6 
                   ) 
                 
               
             
           
         
       
     
         [0045]    Equation 6 reduces to the following Equation 7: 
         [0000]    
       
         
           
             
               
                 
                   Vgs 
                   = 
                   
                     Vth 
                     + 
                     
                       
                         ( 
                         
                           
                             C 
                              
                             
                                 
                             
                              
                             2 
                           
                           
                             
                               
                                 C 
                                  
                                 
                                     
                                 
                                  
                                 1 
                               
                               + 
                               
                                 C 
                                  
                                 
                                     
                                 
                                  
                                 2 
                               
                             
                              
                             
                                 
                             
                           
                         
                         ) 
                       
                        
                       
                         ( 
                         
                           Vdata 
                           - 
                           Vel 
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   7 
                   ) 
                 
               
             
           
         
       
     
         [0046]    Combining Equations 4 and 7 results in the following Equation 8: 
         [0000]    
       
         
           
             
               
                 
                   
                     I 
                     d 
                   
                   = 
                   
                     
                       
                         β 
                         2 
                       
                       [ 
                       
                         
                           [ 
                           
                             Vth 
                             + 
                             
                               
                                 ( 
                                 
                                   
                                     
                                       C 
                                        
                                       
                                           
                                       
                                        
                                       2 
                                     
                                      
                                     
                                         
                                     
                                   
                                   
                                     
                                       C 
                                        
                                       
                                           
                                       
                                        
                                       1 
                                     
                                     + 
                                     
                                       C 
                                        
                                       
                                           
                                       
                                        
                                       2 
                                     
                                   
                                 
                                 ) 
                               
                                
                               
                                 ( 
                                 
                                   Vdata 
                                   - 
                                   Vel 
                                 
                                 ) 
                               
                             
                           
                           ] 
                         
                         - 
                         Vth 
                       
                       ] 
                     
                     2 
                   
                 
               
               
                 
                   ( 
                   8 
                   ) 
                 
               
             
           
         
       
     
         [0047]    Equation 8 reduces to the following Equation 9: 
         [0000]    
       
         
           
             
               
                 
                   
                     I 
                     d 
                   
                   = 
                   
                     
                       
                         β 
                         2 
                       
                       [ 
                       
                         
                           ( 
                           
                             
                               C 
                                
                               
                                   
                               
                                
                               2 
                             
                             
                               
                                 C 
                                  
                                 
                                     
                                 
                                  
                                 1 
                               
                               + 
                               
                                 C 
                                  
                                 
                                     
                                 
                                  
                                 2 
                               
                             
                           
                           ) 
                         
                          
                         
                           ( 
                           
                             Vdata 
                             - 
                             Vel 
                           
                           ) 
                         
                       
                       ] 
                     
                     2 
                   
                 
               
               
                 
                   ( 
                   9 
                   ) 
                 
               
             
           
         
       
     
         [0048]    As can be seen from Equations 6, 8, and 9, the driving current I d  that flows in the OLED is independent of the voltage ELVDD of the first power source and the threshold voltage Vth of the first transistor M 1  because the voltage ELVDD was canceled out in Equation 6, and the threshold voltage Vth was canceled out in Equation 8. In addition, as the OLED deteriorates, the voltage drop Vel of the OLED changes, and the driving current I d  that flows in the OLED can be controlled in accordance with the changed voltage drop Vel because the current voltage drop Vel is transmitted to the third node N 3  during the period T 1  each time the pixel is driven. Therefore, it is possible to compensate for the deterioration of the picture quality caused by the deterioration of the OLED. 
         [0049]      FIG. 5  is a circuit diagram of a pixel according to an aspect of the invention used in the organic light emitting display of  FIG. 2 .  FIG. 6  is a timing diagram of signals transmitted to the pixel of  FIG. 5 . In  FIG. 5 , the transistors of the pixel are NMOS MOSFET transistors, rather than PMOS MOSFET transistors as shown in  FIG. 3 , although it is understood that other types of transistors can be used. Therefore, when the signals of  FIG. 6 , which are obtained by inverting the signals of  FIG. 4 , are transmitted to the pixel of  FIG. 5 , the pixel of  FIG. 5  operates in the same way as the pixel of  FIG. 3 . 
         [0050]    In a pixel according to aspects of the invention and an organic light emitting display using the same, deviations in a threshold voltage of a transistor that controls a driving current of an OLED of the pixel, a voltage drop of the OLED of the pixel, and a power source voltage are compensated for to prevent the picture quality from deteriorating. 
         [0051]    Although several embodiments of the invention have been shown and described, it would be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the claims and their equivalents.