Abstract:
Presented herein are a system and method for sharpening edges in a region. In one embodiment, there is presented a method for sharpening edges. The method comprises measuring differences between at least a value associated with a first pixel and a value associated with a second pixel of a plurality of pixels, and applying a sharpening mask to the plurality of pixels. The sharpening mask is a function of at least one of the measured differences, a first value associated with any one of the plurality of pixels, and a second value associated with any other of the pixels, thereby resulting in sharpened pixels.

Description:
RELATED APPLICATIONS 
       [0001]    This case is related to “System and Method for Sharpening Edges”, U.S. application Ser. No. ______, filed ______ (Attorney Docket 17276US01), by Schoner. 
     
    
     FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT 
       [0002]    [Not Applicable] 
       MICROFICHE/COPYRIGHT REFERENCE 
       [0003]    [Not Applicable] 
       BACKGROUND OF THE INVENTION 
       [0004]    Video signals typically include signals corresponding to different color components that make up the picture. For example, some video signals include luma (Y), chroma red (Cr), and chroma blue (Cb) color components. The signals correspond to pixel values for a grid of pixels representing the color component in the picture. 
         [0005]    The video picture is formed by overlaying the pixel grids on a screen. However, the pixel grids must be overlayed in the proper positions relative to each other. If the pixel grids are not overlayed in the proper positions relative to each other, the picture will not appear properly. Additionally, edge sharpening can further aggravate the problem. 
         [0006]    There are several reasons that can cause the pixel grids not to be overlayed in the proper positions relative to each other. For example, the video signals may not be properly synchronized. When the video signals are not properly synchronized, the pixel grids may have an offset with respect to one another when overlayed on the screen. 
         [0007]    Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings. 
       BRIEF SUMMARY OF THE INVENTION 
       [0008]    A system and/or method is provided for aligning chroma pixels as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims. 
         [0009]    These and other features and advantages of the present invention may be appreciated from a review of the following detailed description of the present invention, along with the accompanying figures in which like reference numerals refer to like parts throughout. 
     
    
     
       BRIEF DESCRIPTION OF SEVERAL VIEWS OF THE DRAWINGS 
         [0010]      FIG. 1  is a block diagram for aligning pixels in accordance with an embodiment of the present invention; 
           [0011]      FIG. 2  is a flow diagram for aligning pixels in accordance with an embodiment of the present invention; 
           [0012]      FIG. 3  is a block diagram of an exemplary circuit in accordance with an embodiment of the present invention; 
           [0013]      FIG. 4  is a block diagram of an exemplary circuit for aligning pixels in accordance with an embodiment of the present invention; and 
           [0014]      FIG. 5  is a flow diagram for aligning pixels in accordance with an embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0015]    Referring now to  FIG. 1 , there is illustrated a block diagram for aligning chroma pixels in accordance with an embodiment of the present invention. The video data comprises a series of pictures  100 . A picture  100  can comprise a number of grids of pixels  102 , wherein each grid  102 ( 0 ), . . . ,  102 ( n ) corresponds to a particular color component. For example, a picture  100  can include a grids of luma Y, chroma red Cr, and chroma blue Cb pixels. 
         [0016]    When the grids of pixels  102  corresponding to the color components are overlayed on a screen, the pictures  100  are formed. However, if the grids of pixels  102  are not overlayed in the proper positions relative to each other, the picture  102  may not appear correctly. There are several reasons that can cause the grids of pixels  102  not to be overlayed in the proper positions relative to each other. For example, when the video signals are not properly synchronized, the pixel grids  102  may have an offset d with respect to one another when overlayed on the screen. 
         [0017]    The pixel grids  102  can be aligned by examining each of the individual pixel grids  102  for edges  104 . The locations of the edges in the pixel grids  102  can be compared and statistically correlated. Edges within the color components of the pictures are usually co-located. Additionally, misalignments or offsets d are relatively constant over numerous frames. Accordingly, based on the statistical correlations of the individual grids  102  for a number of frames, misalignments or offsets can be detected and corrected. Where there is a misalignment or offset d between grids of pixels  102 , such as due to non-synchronization, the correlation of the locations of the edges in the grids  102  over a number of frames will generally be indicative of the offset between the grids. 
         [0018]    Therefore, the grids of pixels  102  representing color components can be aligned by detecting edges  104  in the grids  102 ( 0 ) . . .  102 ( n ) for a picture  100 , e.g., picture  100 ( 1 ). A statistical correlation between the locations of the edges that are detected in the grids  102 ( 0 ) . . .  102 ( n ) can then be calculated. The statistical correlation between the locations of the edges in the grids  102 ( 0 ) . . .  102 ( n ) for other pictures  100  are also calculated. Based on the statistical correlations between the locations of the edges in grids  102 ( 0 ) . . .  102 ( n ) over a number of pictures  100 , e.g., pictures  100 ( 0 ) . . .  100 ( n ), an offset d due to misalignment of the grids  102  can be detected. The grids  102  can be aligned by moving the grids  102  by the offset d in a direction opposite of the offset. 
         [0019]    Referring now to  FIG. 2 , there is illustrated a block diagram of a system for aligning grids of pixels in accordance with an embodiment of the present invention. The system comprises an edge detection circuit  205 , a correlation circuit  210 , and an alignment circuit  215 . The operation of the system will be described in connection with  FIG. 3 , which is a flow diagram for aligning grids of pixels in accordance with an embodiment of the present invention. 
         [0020]    At  305 , the edge detection circuit  205  detects edges in a first grid of pixels for a first frame. At  310 , the edge detection circuit  205  detects edges in a second grid of pixels for a first frame. At  315 , the correlation circuit  210  calculates a first statistical correlation of locations of detected edges in the first grid of pixels and locations of detected edges in the second grid of pixels for the first frame. At  320 , the edge detection circuit  205  detects edges in a first grid of pixels for a second frame. At  325 , the edge detection circuit  205  detects edges in a second grid of pixels for a second frame. 
         [0021]    At  330  the correlation circuit  210  calculates a second statistical correlation of locations of detected edges in the first grid of pixels and locations of detected edges in the second grid of pixels for the second frame. At  335 , the alignment circuit aligns a first grid and a second grid of pixels for a third frame, based on the first statistical correlation and the second statistical correlation. 
         [0022]    Referring now to  FIG. 4 , there is illustrated a block diagram describing an exemplary circuit in accordance with an embodiment of the present invention. The circuit comprises an interface  405 . The interface  405  provides pixel data to line buffers  410 . The line buffers  410  separate the luma pixels L, chroma red pixels Cr, and chroma blue pixels Cb. 
         [0023]    Circuit  415 , filter  420 , and circuit  425  receive the luma pixels L. Advanced 4:2:2→4:4:4 conversion circuit  430  and Linear 4:2:2→4:4:4 conversion circuit  435  receive chroma blue pixels Cb, and Advanced 4:2:2→4:4:4 conversion circuit  440  and Linear 4:2:2→4:4:4 conversion circuit  445  receive the chroma red pixels. 
         [0024]    The circuit  415  determines the maximum and minimum values for the 3×3 regions of the picture. Circuit  425  determines the maximum values, minimum values, maximum difference, and minimum difference for associated pixels in each 7×5 region of the picture and provides the same to sharp edge avoidance circuit  450 . 
         [0025]    The sharp edge avoidance circuit  450  uses the foregoing values to adapt the edge sharpening mask to sharpen each 7×5 portion. In different embodiments of the present invention, the sharp edge avoidance circuit  450  can use any one and/or a combination of the edge sharpening techniques described in “System and Method for Sharpening Edges”, Ser. No. ______, which is incorporated herein by reference. 
         [0026]    The peaking and coring circuit  452  scales oversharpened luma pixels. In certain embodiments of the present invention, the peaking and coring circuit  452  uses any one and/or a combination of the peaking techniques described in “System and Method for Sharpening Edges”, Ser. No. ______, which is incorporated herein by reference. 
         [0027]    Linear 4:2:2→4:4:4 conversion circuit  435  provides linearly interpolated chroma blue pixels Cb to a 7×5 filter  455  and circuit  460 . Circuit  460  determines the maximum and minimum values associated with pixels in 3×3 regions of the picture. The 7×5 filter provides the filtered chroma blue Cb pixels to a peak and false color avoidance circuit  465 . The circuit  460  provides the maximum and minimum values associated with the pixels in the 3×3 regions of the picture to the peak and false color avoidance circuit  465 . 
         [0028]    Linear 4:2:2→4:4:4 conversion circuit  445  provides linearly interpolated chroma blue pixels Cb to a 7×5 filter  475  and circuit  480 . Circuit  480  determines the maximum and minimum values associated with pixels in 3×3 regions of the picture. The 7×5 filter  475  provides the filtered chroma blue Cb pixels to the peak and false color avoidance circuit  465 . The circuit  480  provides the maximum and minimum values associated with the pixels in the 3×3 regions of the picture to the peak and false color avoidance circuit  465 . 
         [0029]    The peak and false color avoidance circuit  465  scales oversharpened chroma pixels and prevents false colors from appearing. In certain embodiments of the present invention, the peak and false color avoidance circuit  465  can use any one or a combination of the techniques described in “System and Method for Sharpening Edges”, Ser. No. ______, which is incorporated herein by reference. 
         [0030]    The L/C alignment circuit  467  aligns chroma pixels with the luma pixels. In certain embodiments of the present invention, the L/C alignment circuit  467  can use any one or a combination of the techniques described herein. 
         [0031]    In certain embodiments of the present invention, L/C alignment only compares Cr OR Cb (but not both) on a picture, thereby reducing the number of gates. 
         [0032]    In certain embodiments of the present invention, L/C alignment can performed in the 4:4:4 space using 8-bit precision: 
         [0000]        Y _diff= y[x]−y[x+ 1]; 
         [0000]        C _diff= C[x]−C[x+ 1]; // selectable.  C  can be either  Cr  or  Cb    
         [0000]      center_sum+=abs( Y _diff* C _diff); 
         [0033]    Correlations with luma differences can be done one pixel to the left, and one pixel to the right (left_sum, right_sum). 
         [0034]    Keeping sums over a 1920×1080 frame uses around 37 bits per sum. It is very unlikely that all correlations are even 10% of maximum. In such cases, the signal has such high frequency content, that the correlation has less value. Accordingly, in certain embodiments of the present invention, the sums can be saturated at 32 bits. In such embodiments, the L/C alignment circuit  467  can comprise 3 small multipliers and 3×32-bit adders. 
         [0035]    For a correct image, the center value should be the largest, and the left/right values should be roughly equal. For example: 
         [0036]    Correct: Left=10,000; Center=15,000; Right=11,000 
         [0000]    For slight mis-alignments, the left &amp; right values are lopsided. For example: 
         [0037]    Slight Mis-align: Left=9,000; Center=15,000; Right=12,000 
         [0000]    For an image mis-aligned by full pixel, the values should be monotonic. For example: 
         [0038]    Mis-Aligned: Left=8,000; Center=12,000; Right=15,000 
         [0039]    Software can be used to average measurements over many frames (30) for both Cr &amp; Cb, before making a decision. If an L/C alignment problem is detected, the system can correct the alignment problem by adjusting the phase offset in horizontal scalers. 
         [0040]    Referring now to  FIG. 5 , there is illustrated a flow diagram for aligning pixels in accordance with an embodiment of the present invention. The flow diagram will be described in connection with  FIG. 6 , which is a block diagram of exemplary pixels aligned in accordance with an embodiment of the present invention. 
         [0041]    At  505 , edges in a luma grid  600 L for a first frame  600 ( 0 ) are detected by calculating Y_diff[x,y]=Y[x,y]−Y[x−1,y] for each luma pixel in the luma grid  600 L for the first frame  600 ( 0 ). At  510 , edges in a chroma red grid  600 Cr for a first frame  600 ( 0 ) are detected by calculating Cr_diff[x,y]=Cr(x,y)−Cr(x−1,y) for each chroma red pixels in the chroma red grid  600 Cr for the first frame  600 ( 0 ). At  515 , edges in the chroma blue grid  600 Cb for a first frame  600 ( 0 ) are detected by calculating Cb_diff[x,y]=Cb(x,y)−Cb(x−1,y). 
         [0042]    At  520 , one or more statistical correlations of the location of the edges in the luma and chroma red grids for the first frame are calculated: 
         [0000]      center YCr (0)=ΣΣ abs( Y _diff[ x,y]*Cr _diff[ x,y ]) 
         [0000]      left_sum YCr (0)=ΣΣ abs( Y _diff[ x,y]*Cr _diff[ x− 1, y ]) 
         [0000]      right_sum YCr (0)=ΣΣ abs( Y _diff[ x,y]*Cr _diff[ x+ 1, y ]) 
         [0043]    At  525 , one or more statistical correlations of the location of edges in the luma and chroma blue grids for the first frame are calculated: 
         [0000]      center YCr (0)=ΣΣ abs( Y _diff[ x,y]*Cr _diff[ x,y ]) 
         [0000]      left_sum YC b   (0)=ΣΣ abs( Y _diff[ x,y]*C b _diff[   x− 1, y ]) 
         [0000]      right_sum YC b   (0)=ΣΣ abs( Y _diff[ x,y]*C b _diff[   x+ 1 ,y ]) 
         [0044]    At  530 ,  505 - 525  are repeated for a predetermined number of frames, e.g.,  600 ( 0 ) . . .  600 ( n ). After the statistical correlations are calculated for the predetermined frames, at  535 , the grids of luma, chroma red, and chroma blue pixels are aligned based on the statistical correlations that are calculated during  520  and  525  for the frames  600 ( 0 ) . . .  600 (n), as well as future frames  600 (n+1). 
         [0045]    The embodiments described herein may be implemented as a board level product, as a single chip, application specific integrated circuit (ASIC), or with varying levels of the system integrated with other portions of the system as separate components. Alternatively, if the processor is available as an ASIC core or logic block, then the commercially available processor can be implemented as part of an ASIC device wherein certain aspects of the present invention are implemented as firmware. 
         [0046]    The degree of integration may primarily be determined by the speed and cost considerations. Because of the sophisticated nature of modern processors, it is possible to utilized a commercially available processor, which may be implemented external to an ASIC implementation. 
         [0047]    While the present invention has been described with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the present invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the present invention without departing from its scope. Therefore, it is intended that the present invention not be limited to the particular embodiment disclosed, but that the present invention will include all embodiments falling within the scope of the appended claims.