Abstract:
The invention relates to recovering a carrier for a synchronous demodulator, that receives an input signal. A carrier is reconstructed for the provided input signal, and the input signal (in) and carrier (tr) are mixed to generate a mixed signal to be outputted (i, q), wherein a residual phase error of the mixed signal is corrected by a phase shift to provide a phase corrected output signal.

Description:
PRIORITY INFORMATION  
       [0001]     This patent application claims priority from German patent application 10 2004 047 424.9 filed Sep. 28, 2004, which is hereby incorporated by reference.  
       BACKGROUND OF THE INVENTION  
       [0002]     The invention relates to the field of signal processing, and in particular to recovering a carrier for a synchronous demodulator.  
         [0003]     In order to transmit a signal, especially through a wireless interface, the signal is modulated before transmission. Demodulation is implemented on the receiver side. In order to demodulate the signal using a synchronous demodulator, it is necessary to reconstruct the carrier signal or the carrier for the signal. The received signal is then mixed with this reconstructed carrier into the baseband using an I/Q mixer, and demodulated therewith. A phase-locked loop (PLL) is used to reconstruct the carrier in the process of carrier recovery. This loop measures the current phase difference between the received and reconstructed carrier to calculate a control correction signal for the phase therefrom, this correction signal is used to track the reconstructed signal.  
         [0004]     The maximum speed of the phase-locked loop, the so-called PLL bandwidth, is limited by the propagation times that occur within the control loop. In control engineering, these propagation times are called dead times. They reduce the maximum possible loop gains at which the system continues to operate in a stable fashion. However, if the received signal contains components lying outside the PLL bandwidth, a residual phase error remains. This error causes a reduction in the level of demodulation, thereby causing the signal to be demodulated incorrectly.  
         [0005]     The disadvantage is thus that error-free demodulation cannot be effected due to this residual phase error. For this reason, an appropriately improved method or circuit for recovering the carrier is proposed.  
         [0006]      FIG. 4  is a block diagram illustrating a known synchronous demodulator. A received input signal is applied on a line  402  to an I/Q mixer  404  (I: in-phase, Q: quadrature phase). The mixer  404  uses two multipliers  406 ,  408  to multiply the input signal on the line  402  with a locally reconstructed picture carrier or signal carrier in the form of a carrier on a line  410 , and thus mixes the input signal into the baseband. During multiplication, mixing products are created which are located at double the carrier frequency. These mixing products are undesirable and are therefore filtered out within the mixer  404  by low-pass filters  412 ,  414 . At the output of the mixer  404 , the carrier is approximately at a frequency of f≈0. What is thus output is a mixed signal i, q, with in-phase and quadrature-phase components I, Q.  
         [0007]     Referring still to  FIG. 4 , the mixed signal i, q is also supplied to a PLL control loop  416 . The in-phase and quadrature signal components are input to low pass filters  418 ,  420 , respectively. To remove audio information in the case of a television signal, the filtered mixed signal is applied to a so-called COordinate Rotation DIgital Computer (CORDIC). Using a polar coordinate transformation, the CORDIC  421  determines the phase value of the I/Q signal pair at the input, and provides the phase value on a line  422 . If the reconstructed carrier on the line  410  equals the received carrier of the input signal on the line  402  exactly, then the measured phase on the line  422  is equal to zero. If this is not true, the phase value on the line  422  is used to correct a digital I/Q oscillator  424 . This digital oscillator LO  424  generates the carrier on the line  410  which is supplied to the mixer  404  to be mixed with input signal on the line  402 . For this purpose, the phase value on the line  422  is fed by the CORDIC  421  to a control device  426  which performs the appropriate calculations and controls the oscillator  424  accordingly.  
         [0008]     In an implementation as a digital circuit, the necessary calculations within this type of control loop, also called an All Digital PLL (ADPLL), (e.g.,calculations such as those performed by a CORDIC algorithm, filtering, and calculation of a correction signal by the control device  426 ), produce signal delays due to the calculation time and group propagation times of the filters. These delays are often called dead times in control engineering and reduce the maximum possible loop gain and thus the speed of the control loop. If in this case an excessively high loop gain is selected, the control loop becomes unstable. To characterize the speed of an ADPLL, the PLL-bandwidth is used which is obtained from the system transfer function. This indicates which frequency changes can still be compensated.  
         [0009]      FIG. 5  illustrates the simulation of a signal in which the picture carrier contains unwanted frequency modulation. The frequency of the picture carrier here changes very quickly as soon as the amplitude changes. Since in this circuit the carrier recovery is not able to react quickly enough, the frequency change manifests itself as a rotation, meaning that the phase error becomes increasingly larger until the amplitude, and thus the frequency, change back to the original state.  
         [0010]      FIG. 6  shows that the actual outputted demodulated signal demonstrates a response which clearly deviates from the ideal response. The signal example here is a video signal having a black picture content. The horizontal synchronization pulses of an ideal signal would be rectangular and free of high-frequency noise components. The simulated demodulated signal, on the other hand, reveals a high noise component and oblique edges with strong high-frequency oscillation components. For a connected television set, these distortions of the synchronization pulses mean that the horizontal alignment of the scanning lines cannot be precisely determined—with the resulting distorted picture contents.  
         [0011]     There is a need for improved recovery of a carrier which takes into account the residual phase error.  
       SUMMARY OF THE INVENTION  
       [0012]     In a synchronous demodulator that receives an input signal, a carrier is reconstructed for the provided input signal, and the input signal and the carrier are mixed in order to generate a mixed signal, wherein in order to provide an output signal a residual phase error of the mixed signal is corrected by a phase shift.  
         [0013]     The mixer mixes the input signal with the carrier, and the resultant mixed signal is input to a phase-locked loop to determine a control correction signal to control the carrier. The circuit includes a phase shifter to correct a residual phase error of the mixed signal, for the purpose of providing an output signal.  
         [0014]     The residual phase error is used to augment recovery of the carrier such that demodulation can be implemented without disturbance even in the case of signal changes outside the PLL bandwidth, or at least be implemented in a significantly improved manner.  
         [0015]     The residual phase error within a control loop is determined in order to measure the phase of the mixed signal and to determine a control correction signal to control the carrier.  
         [0016]     The residual phase error may be determined within the control loop, then employed for the phase shift following the control loop in the form of a supplemental phase shift.  
         [0017]     The mixed signal may be delayed before the phase shift based on the propagation times in the control loop.  
         [0018]     In the event of a control action during reconstruction of the carrier a phase error value is interpolated before application of the phase shift to the sampling rate employed.  
         [0019]     The parameters for the low-pass filtering of the residual phase error may be defined based on a compromise between the sensitivity and control bandwidth of a control action during reconstruction of the carrier.  
         [0020]     The phase-locked loop is designed and/or controlled to determine the residual phase error and to provide a correction signal for the phase shifter.  
         [0021]     The phase shifter may be located following a control tap of the mixed signal for the phase-locked loop.  
         [0022]     A delay device may be connected on the input side of the phase shifter to delay the mixed signal before the phase shifter.  
         [0023]     An interpolation device may be located before the phase shifter to interpolate a phase error value or a correction value for an employed sampling rate in the event of undersampling within the phase-locked loop.  
         [0024]     A low-pass filter may filter the residual phase error, a phase error value to provide a correction signal, wherein the parameters of the low-pass filter are defined by a control device in the form of a compromise between sensitivity and control bandwidth.  
         [0025]     These and other objects, features and advantages of the present invention will become more apparent in light of the following detailed description of preferred embodiments thereof, as illustrated in the accompanying drawings. 
     
    
     BREIF DESCRIPTION OF THE DRAWINGS  
       [0026]      FIG. 1  illustrates a circuit for recovering a carrier taking into account a residual phase error;  
         [0027]      FIGS. 2A and 2B  shows simulation results which illustrate curves for a pure PLL as compared with a PLL with correction of the residual phase error;  
         [0028]      FIG. 3  is a block diagram illustration of a digitally implemented television receiver with this type of circuit;  
         [0029]      FIG. 4  is a block diagram illustration of a prior art synchronous demodulator for recovering a carrier;  
         [0030]      FIG. 5  is a baseband graph for a frequency-modulated television signal of a prior art synchronous demodulator; and  
         [0031]      FIG. 6  is a graph of a demodulated video signal for a frequency-modulated picture carrier and slow recovery of the carrier based on prior art. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0032]      FIG. 1  illustrates a circuit  100  to effect carrier recovery of a reconstructed carrier for an input signal in, specifically, a television signal input on a line  102 . The individual components described may be designed as individual and separate structural elements. Implementation is also possible in the form of an integrated circuit or software in a processor, to the extent this is feasible for the individual components.  
         [0033]     The input signal on the line  102  is input to a mixer  104 , which includes multipliers  106 ,  108  that generate in-phase and quadrature signal components, repectively. The in-phase and quadrature signal components are filtered by low-pass filters  110 ,  112 , respectively and the resultant I and Q signal components are output on lines  114 ,  116 , respectively. At each of the two second inputs of the multipliers  106 ,  108 , a carrier signal tr is applied in the known manner such that after multiplication of the input signal by the carrier signal an in-phase and a quadrature-phase signal are outputted at the respective outputs of multipliers.  
         [0034]     The I, Q signal components on lines  114 ,  116  are input to a phase-locked loop (PLL)  120  and to a first processing unit  122  with a CORDIC  124 . At the same time, the two components of the mixed signal i, q are fed to low-pass filters  130 ,  132  if, for example, in the case of a television signal audio information must be removed. The output signals of the two low-pass filters  130 ,  132  are then fed to the CORDIC  124  for processing. Since the phase value of the I/Q signal pair determined by the CORDIC  124  at its input is important in terms of later considerations, for the sake of simplification this value is shown only in  FIG. 1  and then taken into account subsequently. Also for the sake of simplification, additional signals as well as components normally found within such a circuit are not considered and should be added as dictated by common technical knowledge.  
         [0035]     The signal output on the line  134  by the CORDIC  124  is fed along with the specific instantaneous phase value to a control device  136  which generates and provides a control correction signal on a line  138  to a local oscillator  140 . The local oscillator  140  utilizes the control correction signal to adjust the carrier signal on the line  142  which is generated by the local oscillator  140  and is fed to the mixers for multiplication with input signal on the line  102 .  
         [0036]     The signal on the line  134  with phase value ph, which is determined and outputted by the CORDIC  124 , is fed to a low-pass filter  146 , which provides a correction signal on a line  148  to re-adjust the carrier. This correction signal on the line  148  is fed as a control signal to a phase shifter  152 . Since a propagation time delay z −k  is caused by the control loop, delay devices  154 ,  156  delay the mixed signal i, q respectively by a corresponding value z −k . The output signal or its components from the delay devices  154 ,  156  are fed to the two inputs of the phase shifter  152 . Using the applied correction signal on the line  138 , the phase shifter  152  provides for a correction of the residual phase error of the mixed signal i, q, and outputs a in-phase and quadrature corrected signals on lines  160 ,  162 , respectively. Depending on the design, the phase shifter  152  can also be designed based on independent components for the two signal components i, q of the mixed signal.  
         [0037]      FIG. 3  is a block diagram of a digitally implemented television receiver  300  in which a carrier recovery circuit of the present invention can be implemented. A received television signal IFin on a line  302  is converted by a local oscillator LO′  304  and mixer MIX′  306  to a second intermediate frequency. After bandpass filtering in a, bandpass filter  308 , unwanted mixing products are removed from the signal which can then be digitized without aliasing in an analog-to-digital converter A/D  310 . The resultant digitized signal is input to a digital signal processor (DSP)  312 , and mixed by a synchronous demodulator  314  into the baseband. By additional filtering in another filter  316  and additional algorithms, a video signal and audio intermediate-frequency signal are obtained from the I, Q signals, outputted from the synchronous demodulator  314 . Using an automatic gain control (AGC) tuner, a tuner output level is adjusted so that the analog-to-digital converter A/D  310  is not overloaded. On the output side and using various known components VAGC (video AGC) and AAGC (audio AGC), signals to be outputted are modulated in an optimum manner for the corresponding digital-to-analog converters. The digital-to-analog converters output corresponding known signals tuner-ABC, FBAS (composite color video signal) or audio-IF (audio intermediate frequency) to additional components of a television receiver.  
         [0038]     In this embodiment of a digitally implemented television receiver, the circuit of  FIG. 1  can be advantageously employed as the synchronous demodulator  314 . The synchronous demodulator of  FIG. 1  can also be advantageously employed in other receiver systems. The theoretical principles for reception of analog television signals are shown merely as an exemplary description. The input signal at the analog-to-digital converter using the example of an analog television is produced according to the equation: 
 
 u ( t )= û   BT ·cos(2π f   BT ( t )· t )·(1+ m·U   Bild ( t ))+ û   TT ·cos(2π f   TT   ·t+Δφ   TT   ·U   Ton ( t )),   (1) 
 
 the first term corresponding to a picture AM modulation and the second term corresponding to an audio FM modulation where û BT  is the picture carrier amplitude, m is the modulation index, U Bild (t) is the picture information, f BT (t) is the picture carrier frequency, û TT  is the audio carrier amplitude, f TT  is the audio carrier frequency, Δφ TT  is the phase deviation of the FM modulation, and U Ton (t) is audio information. 
 
         [0039]     The audio carrier is removed by filtering, and the signal model relevant for carrier recovery is obtained according to the equation: 
 
 u ( t )= û   BT ·cos(2π f   BT ( t )· t )·(1+ m·U   Bild ( t ))   (2) 
 
 as picture AM-modulation. 
 
         [0040]     As is evident from equation (2), the picture carrier frequency is altered as a function of time. It can change in a purely random fashion, for example as a result of phase jitter from the transmitter, or as a function of the amplitude of the video signal in the form of additional frequency modulation.  
         [0041]     The known carrier recovery loop is augmented, as shown in  FIG. 1 , by a forward supervision that corrects the residual phase error via the phase shifter  152  ( FIG. 1 ) in the actual signal path following the mixer  104  and following the tap for the control loop. Here the delay devices  156 ,  158  are used to adjust the system delay z −k  of the filtering and phase measurement in the signal path so that the appropriate phase error is simultaneously applied for each I/Q value pair of mixed signal i, q at the input of the phase shifter  152 .  
         [0042]     The phase shifter  152  can be implemented, for example, by employing the known CORDIC algorithm. Implementation of the phase shifter  152  is also feasible using complex multiplication that can be executed according to the equations  
                       I   rot     +     jQ   rot       =       (       I   in     +     jQ   in       )     ·     e     -   jφ                     =       (       I   in     +     jQ   in       )     ·     (       cos   ⁢           ⁢   φ     -     j   ⁢           ⁢   sin   ⁢           ⁢   φ       )                   =       (       I   ⁢           ⁢   cos   ⁢           ⁢   φ     +     Q   ⁢           ⁢   sin   ⁢           ⁢   φ       )     +     j   ⁡     (       Q   ⁢           ⁢   cos   ⁢           ⁢   φ     -     I   ⁢           ⁢   sin   ⁢           ⁢   φ       )                       (   3   )             
 
         [0043]     The correction signal TP-ph on the line  148  for the phase shifter  152  is generated, as described above, from the phase value ph on the line  134  by the low-pass filter  146  in the forward correction path, this value being output by the CORDIC  124 . Using this low-pass filter  146 , it is possible to adjust the bandwidth of the error correction. This property is advantageous, for example, in allowing the broadband phase jitter of the transmitting oscillator to be excluded from the correction.  
         [0044]     In order to save computational effort, the loop of the control loop is often set to a lower sampling rate. In this case, the other low-pass filter  146  can be designed to have either an additional or alternative function as an interpolation filter to recover the original sampling rate.  
         [0045]      FIGS. 2A and 2B  show simulation results for a simulation of the entire system. The example here graphs a demodulated television signal, specifically, an FBAS signal, based on a simple implementation of the control loop (PLL), as a first signal a relative to a second signal b with an additional correction of the residual phase error. The graph here emphasizes the horizontal synchronization pulses or vertical synchronization pulses which without utilization of the forward correction as first signals a both exhibit significant distortions, with the result that a connected television set is not able to generate a stable picture from the signal. After activation of the forward correction, the juxtaposed second signals b exhibit correctly demodulated synchronization pulses.  
         [0046]     Although the present invention has been illustrated and described with respect to several preferred embodiments thereof, various changes, omissions and additions to the form and detail thereof, may be made therein, without departing from the spirit and scope of the invention.