Abstract:
A wafer processing method. The method includes providing a semiconductor wafer. The semiconductor wafer includes (i) a semiconductor layer and (ii) a dopant layer on top of the semiconductor layer. The dopant layer comprises dopants. The method further includes removing the dopant layer from the semiconductor wafer. No chemical etching is performed on the dopant layer before said removing the dopant layer is performed.

Description:
FIELD OF THE INVENTION 
       [0001]    The present invention relates generally to ion implantation monitor wafers and more particularly to recycling of ion implantation monitor wafers. 
       BACKGROUND OF THE INVENTION 
       [0002]    Ion implantation monitor wafers are used to monitor ion implantation tools. More specifically, a monitor wafer is put in an ion implantation tool and the ion implantation process is performed on the monitor wafer. Then, the monitor wafer is taken out of the ion implantation tool and the doping dose on the monitor wafer is measured to determine if the ion implantation process is within specification. The ion implantation monitor wafers are expensive. Therefore, there is a need for a method for recycling ion implantation monitor wafers. 
       SUMMARY OF THE INVENTION 
       [0003]    The present invention provides a wafer processing method, comprising providing a semiconductor wafer which includes (i) a semiconductor layer and (ii) a dopant layer on top of the semiconductor layer, wherein the dopant layer comprises dopants; and removing the dopant layer from the semiconductor wafer, wherein no chemical etching is performed on the dopant layer before said removing the dopant layer is performed. 
         [0004]    The present invention provides a wafer processing method, comprising providing a semiconductor wafer which includes (i) a semiconductor layer and (ii) a dopant layer on top of the semiconductor layer, wherein the dopant layer comprises dopants; removing the dopant layer from the semiconductor wafer; and performing a chemical mechanical polishing (CMP) process on a top surface of the semiconductor wafer on which the dopant layer resided a using CMP apparatus. 
         [0005]    The present invention provides a wafer processing method, comprising providing a semiconductor wafer which includes (i) a semiconductor layer and (ii) a dopant layer on top of the semiconductor layer, wherein the dopant layer comprises dopants; removing the dopant layer from the semiconductor wafer; wherein no chemical etching is performed on the dopant layer before said removing the dopant layer is performed; performing a chemical mechanical polishing (CMP) process on a top surface of the semiconductor wafer on which the dopant layer resided using a CMP apparatus; and implanting dopants in the resulting semiconductor wafer after said removing the dopant layer from the semiconductor wafer is performed 
         [0006]    The present invention provides a method for recycling ion implantation monitor wafers. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]      FIG. 1A  shows a cross-section view of a monitor wafer, in accordance with embodiments of the present invention. 
           [0008]      FIG. 1B  shows a cross-section view of the monitor wafer of  FIG. 1A  after a dopant implantation process and a thermal activation are performed, in accordance with embodiments of the present invention. 
           [0009]      FIG. 2  shows a flowchart that illustrates a method for recycling the monitor wafer of  FIG. 1B , in accordance with embodiments of the present invention. 
           [0010]      FIG. 3A  shows a cross-section view of a coarse grinding tool, in accordance with embodiments of the present invention. 
           [0011]      FIG. 3B  shows a cross-section view of the monitor wafer of  FIG. 1B  after the coarse grinding process is performed, in accordance with embodiments of the present invention. 
           [0012]      FIG. 4  shows a cross-section view of a chemical mechanical polishing (CMP) apparatus, in accordance with embodiments of the present invention. 
           [0013]      FIG. 5A  shows a cross-section view of the monitor wafer of  FIG. 1B  after removing a dopant layer is performed, in accordance with embodiments of the present invention. 
           [0014]      FIG. 5B  shows a cross-section view of the monitor wafer of  FIG. 1B  after removing a dopant layer and polishing the monitor wafer of  FIG. 1B  are performed, in accordance with embodiments of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0015]      FIG. 1A  shows a cross-section view of a monitor wafer  110 , in accordance with embodiments of the present invention. More specifically, the monitor wafer  110  is a silicon wafer that is used for monitoring a dopant implantation process (as opposed to a product wafer which is a silicon wafer on which semiconductor devices are formed). More specifically, the monitor wafer  110  can be placed in a dopant implantation tool (not shown) and the dopant implantation process is performed on the monitor wafer  110 . Then, the monitor wafer  110  (i) is taken out of the dopant implantation tool and (ii) is annealed so as to thermally activate the implanted dopants using a conventional method such as RTA (rapid thermal anneal). It should be noted that after the dopant implantation process and the thermal activation are performed, a dopant layer  112  (shown in  FIG. 1B ) comprising the implanted dopants is created at top of the monitor wafer  110  ( FIG. 1B ). It should be noted that the dopant layer  112  is created by adding a certain percentage of foreign atoms in the regular crystal lattice of the monitor wafer  110  of  FIG. 1A . More specifically, the foreign atoms are arsenic, phosphorus, aluminum, and gallium, etc. It should be noted that the dopant layer  112  may be n-type or p-type semiconductor responding to the foreign atoms which are added in the regular crystal lattice of the monitor wafer  110  of  FIG. 1A . 
         [0016]    Next, in one embodiment, the doping dose of the dopant layer  112  of the monitor wafer  110  is measured using a 4-point RS measuring probe (not shown). More specifically, the 4-point RS measuring probe is used to measure the sheet resistance of the monitor wafer  110 , and from the results, the doping dose can be determined. As a result, from the determined doping dose, it can be determined whether the dopant implantation process is within specification. 
         [0017]      FIG. 2  shows a flowchart that illustrates a method  200  for recycling the monitor wafer  110  of  FIG. 1B , in accordance with embodiments of the present invention. More specifically, in one embodiment, the method  200  starts with a step  210  in which the dopant layer  112  ( FIG. 1B ) of the monitor wafer  110  ( FIG. 1B ) is removed. More specifically, in one embodiment, the dopant layer  112  of the monitor wafer  110  is removed by using a two-step grinding process—a coarse grinding process followed by a fine grinding process. 
         [0018]      FIG. 3A  shows a cross-section view of a coarse grinding tool  300 , in accordance with embodiments of the present invention. More specifically, in one embodiment, the coarse grinding tool  300  comprises a coarse grinding wheel  320  and a chuck  330  below the coarse grinding wheel  320 . Illustratively, the coarse grinding wheel  320  contains diamond particles  322  of specific dimensions held to the coarse grinding wheel  320  by a bonding material such as epoxy or ceramic (not shown). In one embodiment, the monitor wafer  110  is physically attached to the chuck  330  such that the non-doped side of the monitor wafer  110  (i.e., the side of the monitor wafer  110  which is not ion implanted) is in direct physical contact with the top surface of the chuck  330 . 
         [0019]    In one embodiment, the coarse grinding tool  300  further comprises a rotary driving unit  324  connected to the coarse grinding wheel  320  and a rotary driving unit  334  connected to the chuck  330 . Illustratively, the rotary driving unit  324  rotates in a direction indicated by arrow  326  resulting in the coarse grinding wheel  320  rotating in the same direction. In one embodiment, the rotary driving unit  334  rotates in a direction indicated by arrow  336  resulting in the chuck  330  rotating in the same direction. Illustratively, during the coarse grinding process, the coarse grinding wheel  320  comes down on the top surface of the dopant layer  112  such that the diamond particles  322  of the coarse grinding wheel  320  is in direct physical contact with the top surface of the dopant layer  112 . As a result, every point on the top surface of the dopant layer  112  comes into contact with the diamond particles  322  of the coarse grinding wheel  320  resulting in the dopant layer  112  is thinned until the dopant layer  112  is removed from the monitor wafer  110 . In one embodiment, it can be determined that the dopant layer  112  is completely removed from the monitor wafer  110  by using the 4-point RS measuring probe to measure the sheet resistance of the monitor wafer  110 .  FIG. 3B  shows a cross-section view of the monitor wafer  110  after the coarse grinding process is performed, in accordance with embodiments of the present invention. 
         [0020]    In the embodiments described above, right after the coarse grinding process is performed, the 4-point RS measuring probe can be used to measure the sheet resistance of the resulting monitor wafer  110 , and from the results, it is determined whether the dopant layer  112  is completely removed. 
         [0021]    Next, in one embodiment, the fine grinding process is performed on the top surface  116  ( FIG. 3B ) of the monitor wafer  110  (i.e., the surface on which the coarse grinding process is performed). Illustratively, the fine grinding process can be performed using a fine grinding tool (not shown) which is similar to the coarse grinding tool  300  except that the dimensions of the diamond particles  322  in the fine grinding tool is smaller than the dimensions of the diamond particles  322  in the coarse grinding tool  300 . In one embodiment, the operation of the fine grinding tool is similar to the operation of the coarse grinding tool  300 . Illustratively, the fine grinding process helps get rid of the silicon lattice damage at top surface  116  of the monitor wafer  110  created by the coarse grinding process resulting in a smooth top surface  116  of the resultant monitor wafer  110 . It should be noted that, the wafer removal rate is higher in the coarse grinding process than in the fine grinding process. 
         [0022]    In summary, the dopant layer  112  ( FIG. 1B ) of the monitor wafer  110  ( FIG. 1B ) is removed by using the coarse grinding process followed by the fine grinding process. More specifically, the coarse grinding process removes the dopant layer  112  of the monitor wafer  110  and then the fine grinding process helps get rid of the silicon lattice damage at top surface  116  ( FIG. 3B ) of the monitor wafer  110  ( FIG. 3B ) created by the coarse grinding process resulting in the smooth top surface  116  of the resultant monitor wafer  110 . In an alternative embodiment, the fine grinding process can be omitted. In one embodiment, both the coarse grinding process and the fine grinding process can be performed in that order in a conventional back-side grinding tool (not shown). 
         [0023]    Next, with reference to  FIG. 2 , in step  220 , in one embodiment, the top surface  116  ( FIG. 4 ) of the monitor wafer  110  ( FIG. 4 ) is polished by a chemical mechanical polishing (CMP) process using a CMP apparatus  400  (shown in  FIG. 4 ).  FIG. 4  shows a cross-section view of the CMP apparatus  400 , in accordance with embodiments of the present invention. More specifically, in one embodiment, the CMP apparatus  400  comprises a polishing wheel  410  and a chuck  420 . Illustratively, the polishing wheel  410  comprises a polishing pad  412  which is generally a planar pad made from a continuous phase matrix material such as polyurethane. In one embodiment, the monitor wafer  110  is physically attached to the chuck  420  such that the top surface  116  of the monitor wafer  110  is in direct physical contact with the top surface  416  of the polishing pad  412 . 
         [0024]    In one embodiment, the CMP apparatus  400  further comprises a rotary driving unit  430  connected to the polishing wheel  410  and a rotary driving unit  440  connected to the chuck  420 . Illustratively, the rotary driving unit  430  rotates in a direction indicated by arrow  432  resulting in the polishing wheel  410  rotating in the same direction. In one embodiment, the rotary driving unit  440  rotates in a direction indicated by arrow  442  resulting in the chuck  420  rotating in the same direction. Illustratively, the chuck  420  comes down on the top surface  416  of the polishing pad  412  such that the entire top surface  116  of the monitor wafer  110  is in direct physical contact with the top surface  416  of the polishing pad  412 . 
         [0025]    In one embodiment, slurry and a basic solution (not shown) are dripped onto the top surface  416  of the polishing pad  412  and are thereby dispensed through the interface between the top surface  416  of the polishing pad  412  and the top surface  116  of the monitor wafer  110 . Illustratively, the slurry contains abrasive particles made of material such as silicon dioxide. As a result, the top surface  116  of the monitor wafer  110  is polished by the action of the polishing pad  412 , monitor wafer  110 , and the basic solution and the slurry disposed there between. The basic solution helps dissolve silicon on top surface  116  of the monitor wafer  110 . This is to ensure that the top surface  116  of the monitor wafer  110  is clean and has no residue left after the CMP process is performed. In one embodiment, the basic solution has a pH value of about ten. 
         [0026]    In one embodiment, after the step  220  is performed, the top surface  116  of the monitor wafer  110  can be cleaned using a Huang A solution (NH 4 OH/H 2 O 2 /H 2 O) and/or a Huang B solution (HCl/H 2 O 2 /H 2 O). More specifically, the Huang A solution can remove organic materials, whereas the Huang B solution can remove metallic materials. It should be noted that the Huang A and/or Huang B solutions remove the organic and metallic materials without affecting silicon lattice of the monitor wafer  110 . In one embodiment, after the cleaning using the Huang A solution and/or the Huang B solution, the monitor wafer  110  is annealed using a conventional method such as RTA. After that, the monitor wafer  110  can be reused for monitoring the dopant implantation process. Alternatively, the cleaning using the Huang A solution and/or the Huang B solution and the annealing of the monitor wafer  110  can be omitted. As a result, the monitor wafer  110  can be reused for monitoring the dopant implantation process right after the CMP process is performed. 
         [0027]      FIG. 5A  shows a cross-section view of the monitor wafer  110  after the step  210  of  FIG. 2  is performed, in accordance with embodiments of the present invention. More specifically, after the step  210  is performed, the top surface of the monitor wafer  110  has a maximum roughness height  115   a  (also called Rmax  115   a ), wherein Rmax  115   a  is the maximum vertical distance between two adjacent peak and valley of the top surface of the monitor wafer  110 . More specifically, Rmax  115   a  is vertical between the two adjacent peak  510   a  and valley  520   a . In one embodiment, the Rmax  115   a  is about 77 nanometers. 
         [0028]      FIG. 5B  shows a cross-section view of the monitor wafer  110  after the step  220  of  FIG. 2  is performed, in accordance with embodiments of the present invention. More specifically, after the step  220  is preformed, the top surface of the monitor wafer  110  has a maximum roughness height  215   b  (also called Rmax  215   b ). In one embodiment, Rmax  215   b  is about 8.7 nanometers. As a result, the Rmax  215   b  (8.7 nm) is much smaller than the Rmax  115   a  (77 nm) in case of  FIG. 5A . As a result, it can be determined that the top surface of the monitor wafer  110  of  FIG. 5B  is smoother than the top surface of the monitor wafer  110  of  FIG. 5A . This indicates that the CMP process has made the top surface of the monitor wafer  110  smoother. 
         [0029]    In summary, the monitor wafer  110  (i) is grinded to remove the dopant layer  112  by using the two-step grinding process (the step  210  of  FIG. 2 ) and then (ii) is polished by using the CMP apparatus  400  (the step  220  of  FIG. 2 ). It should be noted that the top surface of the monitor wafer  110  after performing the step  220  is smoother than the top surface of the monitor wafer  110  after performing the step  210 . It should be noted that, after performing the method  200  of  FIG. 2 , the monitor wafer  110  can be reused for monitoring the dopant implantation process. 
         [0030]    In one embodiment, before the removal of the dopant layer  112  ( FIG. 1B ) using the coarse grinding tool ( FIG. 3A ), no chemical etching (wet etch or dry etch) is performed on the dopant layer  112 . 
         [0031]    While particular embodiments of the present invention have been described herein for purposes of illustration, many modifications and changes will become apparent to those skilled in the art. Accordingly, the appended claims are intended to encompass all such modifications and changes as fall within the true spirit and scope of this invention.