Abstract:
There is described a method for operating an electronically controlled inverter. The inverter is controlled during the positive half-wave of the output alternating voltage in such a way that it operates as a SEPIC converter, and during the negative half-wave of the output alternating voltage in such a way that it operates as a CUK converter.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is the US National Stage of International Application No. PCT/EP2005/007486, filed Jul. 11, 2005 and claims the benefit thereof. The International Application claims the benefits of Austrian application No. 1178/2004 A filed Jul. 12, 2004, both of the applications are incorporated by reference herein in their entirety. 
     
    
     FIELD OF INVENTION 
       [0002]    The invention relates to a method for operating an electronically controlled inverter and to an arrangement for executing the method. 
       BACKGROUND OF INVENTION 
       [0003]    Electronically controlled inverters are for example known from US-Z.: C. M. Penalver, et al “Microprocessor Control of DC/AC Static Converters”; IEEE Transactions on industrial Electronics, Vol. IE-32, No. 3, 1985, P. 186-191; They are used for example in solar power systems to transform the direct current created by the solar cells in such a way as to enable it to be fed into the public AC power network. Only in this way is a practically unrestricted use of solar-produced energy guaranteed. 
         [0004]    One of the results of the plurality of applications for inverters has been the development of basic derivative types of step-up converters, step-up/step-down converters and step-down converters for specific applications. An article published in the periodical EDN dated 17 Oct. 2002 “Slave converters power auxiliary outputs”, Sanjaya Maniktala is cited here as an example in which different possible combinations of basic inverter types are described. 
       SUMMARY OF INVENTION 
       [0005]    An object of the invention is to further develop the inverters known from the prior art. 
         [0006]    In accordance with the invention the object is achieved with a method of the type mentioned at the start, in which the inverter is controlled during the positive half-wave of the output alternating voltage in such a way that it operates as a SEPIC converter and in which the inverter is controlled during the negative half-wave of the output alternating voltage in such a way that it operates as a CUK converter. 
         [0007]    The inventive combination of the functions of SEPIC and CUK converter lead to an especially low-loss inverter which is thus highly efficient and is therefore particularly suited for use in solar systems. 
         [0008]    It is advantageous for the inverter to comprise a semiconductor bridge circuit formed from a first, second, third and fourth semiconductor switch, of which the first output is connected to a first terminal of an alternating current output of the inverter, of which the second output is connected to second terminal of the alternating current output of the inverter, also for a first choke to be provided of which the first side is connected to the positive pole of a direct current source and of which the second side is connected via a fifth semiconductor switch to the negative pole of the direct current source, for the connection between first choke and fifth semiconductor switch to be connected via a first capacitor to the first terminal of a second choke and the anode of a diode, for the second terminal of the second choke to be connected to the first input of the bridge circuit and the cathode of the diode to be connected to a second input of the bridge circuit, and for the negative pole of the direct current source to be connected to the second terminal of the alternating current output. 
         [0009]    Furthermore it is advantageous if, by means of microcontrollers the second and third semiconductor switches are permanently switched on during the positive half-wave of the output alternating current and the first and fourth semiconductor switches are permanently switched off, and the fifth semiconductor switch is switched pulsed, and during the negative half-wave of the output alternating current, the first and fourth semiconductor switches are permanently switched on and the second and third semiconductor switches are permanently switched off and the fifth semiconductor switch is switched pulsed. 
         [0010]    It is useful for a microcontroller to be provided which is appropriately programmed for control of the semiconductor switches. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0011]    The invention is explained in greater detail with reference to Figures. The Figures typically show: 
           [0012]      FIG. 1  the circuit diagram of a typical inverter  FIG. 2  the circuit diagram of a typical inverter when n-channel barrier layer MOSFETs are used. 
           [0013]      FIGS. 3 , and  4  current flow and switching states in a typical inverter during the positive half-wave of the output alternating current, 
           [0014]      FIGS. 5 and 6  current flow and switching states in a typical inverter during the negative half-wave of the output alternating current, and 
           [0015]      FIG. 7  the signal timing of typical activation signals for the semiconductor switches. 
       
    
    
     DETAILED DESCRIPTION OF INVENTION 
       [0016]    The inverter shown in the Figures comprises a semiconductor bridge circuit made up of a first, second, third and fourth semiconductor switch S 1 , S 2 , S 3 , S 4 . The first output of the semiconductor bridge circuit formed from the connection of first and second semiconductor switches S 1 , S 2  is connected to a first terminal of an alternating current output U OUT  of the inverter. The second output of the semiconductor bridge circuit formed from the connection of third and fourth semiconductor switches S 3 , S 4  is connected to a second terminal of an alternating current output U OUT  of the inverter. Furthermore a first choke L 1  is provided, of which the first side is connected to the positive pole of a direct current source U IN  and of which the second side is connected via a fifth semiconductor switch S 5  to the negative pole of the direct current source U IN . The connection between first choke L 1  and fifth semiconductor switch S 5  is made via a first capacitor C C  to the first terminal of a second choke L 2  and the anode of a diode D 1  and of the second terminal of the second choke L 2  to a first input of the bridge circuit S 1 , S 2 , S 3 , S 4  formed by the connection of first and third semiconductor switches S 1 , S 3 . 
         [0017]    First and second choke L 1 , L 2  can have a common core. 
         [0018]    The cathode of the diode D 1  is connected to a second input of the bridge circuit S 1 , S 2 , S 3 , S 4  formed by the connection of second and fourth semiconductor switches S 2 , S 4 . Furthermore the negative pole of the direct current source U IN  is connected to the second terminal of the alternating current output U OUT . 
         [0019]    When n-channel barrier layer MOSFETs are used as semiconductor switches S 1 , S 2 , S 3 , S 4 , S 5 , the direction of installation should be noted. Indicated in  FIG. 2  by the diode symbol being shown as a dashed outline. 
         [0020]    In this embodiment of the invention the use of a diode D 2  is worthwhile, but its function can also be implemented however by a controlling the semiconductor switches in an appropriate manner. 
         [0021]    The semiconductor switches are controlled by means of microcontrollers (not shown). 
         [0022]    In this case, in accordance with the invention, the output alternating current of the second and third semiconductor switches S 2 , S 3  is permanently switched on during the positive half-wave and that of the first and fourth semiconductor switches S 1 , S 4  is permanently switched off, while the switching of the fifth semiconductor switch is pulsed. 
         [0023]    During the negative half-wave of the output alternating current first and fourth semiconductor switches S 1 , S 4  are permanently switched on and second and third semiconductor switches S 2 , S 3  permanently switched off and the fifth semiconductor switch S 5  is switched pulsed. 
         [0024]      FIG. 3  in this case shows the state in which the inverter accepts electrical energy from the direct current source U IN  during a positive half-wave of the output voltage. To this end the fifth semiconductor switch S 5  is closed and thereby a current path established between the positive pole of the direct current source U IN  via the first choke L 5  and the first semiconductor switch S 1 . A second circuit is forced by the energy stored in the capacitor C C  via the fifth and the third semiconductor switches S 5  and S 3  and the second coil L 2 . 
         [0025]    In this state the first choke L 1  stores energy, which, as shown in  FIG. 4 , is output after the opening of the fifth semiconductor switch S 5  via the first semiconductor diode D 1  and the semiconductor bridge circuit to the alternating current output U OUT  and simultaneously to the first capacitor C C . 
         [0026]    The energy stored in the second choke L 2  is output after the opening of the fifth semiconductor switch S 5  via semiconductor diode D 1  and via the semiconductor bridge circuit to the alternating current output U OUT . 
         [0027]    The circuits produced in such cases run on one side from the positive pole of the direct current source U IN  via the first choke L 1 , the first capacitor C C , the diode D 1 , the second semiconductor switch S 2  to the alternating current output U OUT  and via the alternating current network to the negative pole of the direct current source U IN  and one the other side from the second choke L 2  via the diode D 1  and the second semiconductor switch S 2  to the alternating current output U OUT  and via the alternating current network and the third semiconductor switch S 3  back to the second choke L 2 . 
         [0028]    The switching states during the negative half-wave of the output alternating current are now explained with reference to  FIG. 5  and  FIG. 6 . As can also be seen from  FIG. 7 , the fifth semiconductor switch S 5  is switched pulsed during this period, the first and the third semiconductor switches S 1 , S 3  are permanently on and second and the fourth semiconductor switches S 2 , S 4  permanently off. This means that in accordance with the invention the function of what is known as a CUK converter is executed during the negative half-wave of the output alternating current. 
         [0029]    In this connection  FIG. 5  shows the circumstances under which the fifth semiconductor switch S 5  is closed. A current path is formed between the positive pole of the direct current source U IN  via the first choke L 1  and the fifth semiconductor switch S 5  to the negative pole of the direct current source and a second current path via the second choke L 2 , first capacitor C C , the fifth semiconductor switch S 5 , the output alternating current network U OUT  and the first semiconductor switch S 1 . 
         [0030]    In the next switching process—as shown in FIG.  6 —the fifth semiconductor switch S 5  is opened. 
         [0031]    The circuits thus produced run on one side from the positive pole of the direct current source U IN  via the first choke L 1 , the first capacitor C C , the diode D 1  and the fourth semiconductor switch S 4  to the negative pole of the direct current source U IN  and on the other side via the second choke L 2 , the diode D 1 , the fourth semiconductor switch S 4 , the output alternating current network U OUT  and the first semiconductor switch S 1 . 
         [0032]      FIG. 7  shows the typical signal timing waveforms of the control signals for the semiconductor switches S 1 , S 2 , S 3 , S 4  and S 5 .