Abstract:
A set top box used in a satellite TV system includes a diode coupled in a particular way to better protect an adjustable linear regulator used in the set top box from transient voltages as may result from lighting or the like.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    Not Applicable. 
       STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH 
       [0002]    Not Applicable. 
       FIELD OF THE INVENTION 
       [0003]    This invention relates generally to satellite TV set top boxes and, more particularly, to a satellite TV set top box with an improved ability to survive a transient signal. 
       BACKGROUND OF THE INVENTION 
       [0004]    Satellite television systems generally include a low noise block converter (LNB) at a satellite dish for controlling reception of satellite television signals, and a set top box to control the LNB. Functions of the LNB include downconverting received satellite signals, changing the frequency band of signal reception, changing the signal polarization of reception and, in some applications, controlling more than one receive antenna. For these purposes, the LNB requires control signals and power, both of which are provided by circuitry housed in the set top box located near a television set. A user can change the channel of reception via the set top box. Only a single coaxial cable couples the LNB to the set top box, therefore, the control and power signals are carried by the single coaxial cable. 
         [0005]    EUTELSAT, a European organization, which governs television satellite communications, establishes specifications for the low noise block converter control and power signals. Analog AC tone control signals are provided by a 22 kHz, 600 mV peak-to-peak, signal which can be used to implement DiSEgC™ (Digital Satellite Equipment Control) encoding for the purpose of changing the polarization and frequency band of received radio frequency (RF) signals. Power to the LNB circuitry itself is provided by whatever DC voltage is being used to transmit digital control information at any given time. The LNB circuitry requires on the order of 0.6 amp of current. 
         [0006]    Adjustable linear amplifiers are conventionally used to provide the control and power signals to the LNB. In this arrangement, the linear amplifier provides an AC modulated output voltage, which has an adjustable DC voltage in response to control signals from a microprocessor within the set top box. 
         [0007]    An arrangement that uses a switching regulator to power the adjustable linear amplifier is described in U.S. Pat. No. 7,207,054, issued Apr. 17, 2007, which is assigned to the assignee of the present invention, and which is incorporated by reference herein in its entirety. 
         [0008]    Various techniques have been used to protect the set top box from transient signals that can be received from the environment in the cable that connects the set top box to the LNB or in the satellite antenna. Such environmental signals can be the result of lightning or static electricity. 
         [0009]    Referring to  FIG. 1 , a conventional satellite TV system  10  includes a set top box  12  coupled to an LNB  70  though a single coaxial cable  68 , coupled to a television set (TV)  64  with a cable  65 , and coupled to a remote control  62  with a infrared (IR) link  63 . 
         [0010]    As described in the above-mentioned U.S. Pat. No. 7,207,054, the set top box  12  can include a switching regulator  16  coupled to receive a DC power input signal  14  and configured to generate a regulated output voltage  16   a . The switching regulator  16  can be coupled at its output to a capacitor  18 , which can have a large capacitance, for example, about one hundred microfarads. In some embodiments, the capacitor  18  is an electrolytic capacitor. The switching regulator  16  can also be coupled at its output to a capacitor  20 , which can have a smaller capacitance, for example, about one microfarad. In some embodiments, the capacitor  20  is a ceramic capacitor. As is known, a ceramic capacitor tends to behave like an ideal capacitor at higher frequencies than an electrolytic capacitor. Thus, the capacitor  16  tend to reduce ripple as may otherwise be generated by the switching regulator  16 , and the capacitor  20  tends to reduce higher frequency switching transients as may otherwise be generated by the switching regulator  16 . 
         [0011]    An adjustable linear voltage regulator  30  is shown here as a field effect transistor (FET)  32  in parallel with a parasitic diode  34 . The parasitic diode  34  is not a separate diode, but is a diode inherent to the structure of the FET  32 , and is shown in phantom lines accordingly. While the adjustable linear regulator  30  is shown as a FET, it will be understood that an adjustable linear regulator can be designed with a variety of circuit topologies and a variety of circuit components. 
         [0012]    The adjustable linear regulator  30  can have an input node  30   a  coupled to a drain of the FET  32 , an output node  30   c  coupled to a source of the FET  32 , and a control node  30   b  coupled to a gate of the FET  32 . 
         [0013]    The source of the FET  32  can be coupled to a parallel combination of a diode  54 , two capacitors  56 ,  58 , and a zener diode  60 , each of which can terminate to ground. In some alternate embodiments, the zener diode is instead a transient voltage suppressor (TVS) 
         [0014]    A diode  40 , referred to herein as a protection diode, having an anode and a cathode, can be coupled such that the anode is coupled to the source of the FET  32  and the cathode is coupled to the capacitors  18 ,  20 . 
         [0015]    The source of the FET  32  is coupled to a connector  66 . A signal  32   a  to and from the set top box  12  is carried by the cable  68 . The signal  32   a  is received by the LNB  70  as a control signal. 
         [0016]    The signal  32   a  also contains television information that travels from the LNB  70  to a TV receiver  52  within the set top box  12 . The TV receiver  52  is configured to generate a TV signal  52   a  carried on the cable  65 . 
         [0017]    The set top box  12  can also include a voltage divider  24  coupled to receive the regulated output voltage  16   a  and configured to generate a divided signal  24   a . A switching regulator controller  22  can be coupled to receive the divided signal  24   a  and configured to generate a control signal  22   a  to control the regulated output voltage  16   a  of the switching voltage regulator  16 . Exemplary switching regulators and control thereof are described more fully below in conjunction with  FIGS. 4 and 5 . 
         [0018]    The set top box  12  can also include an IR sensor  50  coupled via the IR link  63  to receive an IR control signal  62   a  from the remote control  62  and configured to generate a control signal  50   a . A microprocessor  48  can be coupled to receive the control signal  50   a  and configured to generate a voltage level control signal  48   a  and a tone control signal  48   b.    
         [0019]    The set top box  12  can include a linear regulator controller  46  coupled to receive the voltage level control signal  48   a  and coupled to receive the signal  32   a  as a feedback signal in a control loop that controls the adjustable linear regulator  30 . The linear regulator controller  46  is configured to generate a linear regulator control signal  46   b  and a corresponding reference signal  46   a . The set top box  12  can also include a tone generator  26  coupled to receive the tone control signal  48   b  and configured to generate a tone signal  26   a.    
         [0020]    The set top box  12  can also include a summing circuit  44  coupled to receive the reference signal  46   a  and coupled to receive an offset signal  42   a  generated by a voltage offset generator  42 . The summing circuit  44  is configured to generate a sum signal  44   a , which is received by the switching regulator controller  22  as a voltage reference signal to control the regulated voltage output signal  16   a.    
         [0021]    The set top box can  12  also include another summing circuit  28  coupled to receive a tone signal  26   a , coupled to receive the linear regulator control signal  46   b , and configured to generate another sum signal  28   a . The FET  32  is coupled to receive the sum signal  28   a  the gate and the adjustable linear regulator  30  is configured to provide a voltage drop controlled by the sum signal  28   a.    
         [0022]    It should be understood that the set top box  12  includes two voltage control loops. A first control loop is coupled around the adjustable linear regulator  30  (comprised of signals  32   a  and  46   b  to and from the linear regulator controller  46 ). A second control loop is coupled around the switching regulator  16  (comprised of signals  16   a  and  22   a  to and from the switching regulator controller  22 ). The second control loop is influenced by the first control loop via the reference signal  46   a . In other words, the switching regulator loop is controlled by the adjustable linear regulator loop to maintain the regulated output voltage  16   a  a predetermined number of volts (determined by the offset voltage generator  42 ), for example, one volt, above a DC voltage drop through the adjustable linear regulator  30  (i.e., from node  30   a  to node  30   c ). 
         [0023]    In operation, the linear regulator controller  46  is controlled by the microprocessor  48  and also by the feedback signal  32   a  to generate the linear regulator control signal  46   b  to control the signal  32   a  to be selected one of about thirteen volts or about eighteen volts. The microprocessor  48  also controls the tone generator  26  to generate the tone signal  26   a , for example, a 22 kHz, 600 mV peak-to-peak, tone signal, which can be used to implement DiSEgC™ (Digital Satellite Equipment Control) encoding for the purpose of changing the polarization and frequency band of received RF signals. The sum signal  28   a  contains both the tone signal  26   a  and the linear regulator control signal  46   b  with a selected DC voltage level. 
         [0024]    Via the divided signal  24   a  and via the sum signal  44   a  (a reference signal), the switching regulator  16  is controlled by the microprocessor  48  to maintain its regulated voltage  16   a  at a voltage level in accordance with the selected voltage in the reference signal  46   a . For example, when the reference signal  46   a  is about thirteen volts, the regulated output voltage  16   a  can be about fourteen volts and when the reference signal  46   a  is about eighteen volts, the regulated output voltage  16   a  can be about nineteen volts. 
         [0025]    As a result of the above, the signal  32   a  carried on the cable  68  contains a DC level of either about thirteen or about eighteen volts and also a selected tone signal corresponding to the tone signal  26   a . The combination of DC level and tone frequency results in commands to the LNB  70  to tune to one of a plurality of TV channel frequencies. In response, the part of the signal  32   a  that travels from the antenna  72  to the TV receiver  52  contains one TV channel signal. 
         [0026]    When subjected to an external undesired signal  74  (also referred to herein as a transient signal), for example, a signal due to lightning or static electricity, which is coupled to the cable  68  by direct, capacitive, or by inductive means, an undesired current  38  (also referred to herein as a transient current signal) flows through the diode  40  and an undesired current  36  (also referred to herein as a transient current signal) flows through the parasitic diode  34 . The diode  40  can be a high capacity diode intended to pass the bulk of the overall transient current, discharging the transient current primarily into the large capacitor  18 , and less so into the smaller capacitor  20 . However, if the transient current  36  has sufficient magnitude, the transient current  36  can cause the FET  32  to fail by damaging the parasitic diode structure  34 . It will be understood that, if the transient currents  36 ,  38  were not allowed to discharge into the capacitor  18 , a voltage would be generated on the cable  68  that could destroy other circuits, for example, more of the set top box  12  or the LNB  70 . 
         [0027]    It would be desirable to provide a different arrangement that can cause the set top box  12  to survive the undesired signal  74  without damage. 
       SUMMARY OF THE INVENTION 
       [0028]    The present invention provides a circuit arrangement in a set top box that can cause the set top box to survive an undesired signal, such as that resulting for lightning or from static electricity. 
         [0029]    In accordance with one aspect of the present invention, an electronic circuit includes a switching regulator. The switching regulator includes a switching regulator input node at which an input voltage is received. The switching regulator also includes a voltage holding node. The switching regulator also includes a capacitor coupled at one end to the voltage holding node and coupled at the other end to a reference voltage. The switching regulator also includes a switching regulator control node. The electronic circuit also includes a reverse current blocking circuit comprising first and second nodes. The first node is coupled to the voltage holding node and the second node is coupled to a regulated voltage output node. The reverse current blocking circuit is configured to prevent a current from flowing from the regulated voltage output node into the capacitor. The electronic circuit also includes an adjustable linear regulator. The reverse current blocking circuit is coupled between the switching regulator and the adjustable linear regulator. The electronic circuit also includes a switching regulator controller circuit coupled between the regulated voltage output node and the switching regulator control node. The switching regulator is configured to generate a regulated voltage at the regulated voltage output node. 
         [0030]    In some embodiments, the reverse current blocking circuit comprises a reverse current blocking diode having an anode and a cathode, wherein the first node corresponds to the anode and the second node corresponds to the cathode. 
         [0031]    In accordance with another aspect of the present invention, an electronic circuit includes a switching regulator. The switching regulator includes a switching regulator input node at which an input voltage is received. The switching regulator also includes a voltage holding node. The switching regulator also includes a capacitor coupled at one end to the voltage holding node and coupled at the other end to a reference voltage. The switching regulator also includes a switching regulator control node. The electronic circuit further includes a reverse current blocking circuit comprising first and second nodes. The first node is coupled to the voltage holding node and the second node is coupled to a regulated voltage output node. The reverse current blocking circuit is configured to prevent a current from flowing from the regulated voltage output node into the capacitor. The electronic circuit further includes an adjustable linear regulator. The reverse current blocking circuit is coupled between the switching regulator and the adjustable linear regulator. The electronic circuit further includes a switching regulator controller circuit coupled between the regulated voltage output node and the switching regulator control node. The switching regulator is configured to generate a regulated voltage at the regulated voltage output node. The electronic circuit further includes a resistor and/or an inductor coupled between the adjustable linear regulator and a circuit output node, wherein a circuit output signal is generated at the circuit output node related to the regulated voltage. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0032]    The foregoing features of the invention, as well as the invention itself may be more fully understood from the following detailed description of the drawings, in which: 
           [0033]      FIG. 1  is a block diagram showing a prior art satellite television (TV) system, including a set top box with circuits to protect the set top box when it experiences a transient signal as may be generated by lightning, static electricity, or the like; 
           [0034]      FIG. 2  is a block diagram showing another satellite television (TV) system including a set top box with an exemplary circuit arrangement configured to protect the set top box when it experiences a transient signal as may be generated by lightning, static electricity, or the like; 
           [0035]      FIG. 2A  is a block diagram showing another satellite television (TV) system including a set top box with another exemplary circuit arrangement configured to protect the set top box when it experiences a transient signal; 
           [0036]      FIG. 3  is a block diagram showing another satellite television (TV) system including a set top box with another exemplary circuit arrangement configured to protect the set top box when it experiences a transient signal; 
           [0037]      FIG. 3A  is a block diagram showing another satellite television (TV) system including a set top box with another exemplary circuit arrangement configured to protect the set top box when it experiences a transient signal; 
           [0038]      FIG. 4  is a block diagram showing a boost switching regulator as may be used in any of the set top boxes of  FIGS. 2-3A ; and 
           [0039]      FIG. 5  is a block diagram showing a buck switching regulator as may be used in any of the set top boxes of  FIGS. 2-3A . 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0040]    Before describing the present invention, some introductory concepts and terminology are explained. As used herein, the term “boost switching regulator” is used to describe a known type of switching regulator that provides an output voltage higher than an input voltage to the boost switching regulator. As used herein, the term “buck switching regulator” is used to describe a known type of switching regulator that provides an output voltage lower than an input voltage to the buck switching regulator. While certain particular circuit topologies of boost and buck switching regulators are shown herein, it should be understood that a buck or a boost switching regulator can be formed in a variety of circuit configurations. 
         [0041]    Referring now to  FIG. 2 , in which like elements of  FIG. 1  are shown having like reference designations, a satellite TV system  150  includes a set top box  152  coupled to the LNB  70  though the signal cable  68 , coupled to the television set (TV)  64  with the cable  65 , and coupled to the remote control  62  with the infrared (IR) link  63 . 
         [0042]    The voltage divider  24  is coupled to receive a regulated output voltage  156  generated by the switching regulator  16 , and is configured to generate a divided signal  164 , which is received by the switching regulator controller  22  instead of the divided signal  24   a  of  FIG. 1 . A DC voltage within an out put signal  151  is regulated and stable. 
         [0043]    The set top box  152  is similar to the set top box  12  of  FIG. 1 . However, the set top box  152  may not include the diode  40  of  FIG. 1 . Also, in some embodiments, the set top box  152  includes a diode  106  coupled as shown and as further described below. In some embodiments, the set top box  152  also includes a resistor  112  coupled in series with the cable  68 . 
         [0044]    The feedback signal to the adjustable linear regulator controller  46 , which is shown in  FIG. 1  as the signal  32   a , can instead be provided as the output signal  151  passing through an optional filter  153 , and provided as a signal  170  to the linear regulator controller  46 . With this arrangement, any voltage drop through the resistor  112  is compensated in the closed feedback loop around the adjustable linear regulator  30 . In turn, via a reference signal  172   a  generated by the linear regulator controller  46  and via the signal  42   a  generated by the offset voltage generator  42 , the switching regulator  16  is controlled to maintain the regulated output voltage  156  above the DC voltage of the signal  151 . 
         [0045]    The filter  153  can be a low pass filter configured to remove the above-described 22 kHz tones from the feedback signal  170 . However, in other embodiments, there is no filter and the linear regulator controller  46  is directly coupled to receive the signal  151 , similar to the arrangement of  FIG. 1 . In still other embodiments, the filter  153  can instead be any electronic network. 
         [0046]    The set top box  152  includes the switching regulator  16 . The switching regulator  16  includes a switching regulator input node  17   a  at which the input voltage  14  is received. The switching regulator  16  also includes a voltage holding node  17   b . The switching regulator  16  also includes the capacitor  18  coupled at one end to the voltage holding node  17   b  and coupled at the other end to a reference voltage, for example, ground. The switching regulator  16  also includes a switching regulator control node  17   c . The set top box  152  also includes a reverse current blocking circuit  106  comprising first and second nodes  106   a ,  106   b , respectively. The first node  106   a  is coupled to the voltage holding node  17   b  and the second node  106   b  is coupled to a regulated voltage output node  19 . The reverse current blocking circuit  106  is configured to prevent a current from flowing from the regulated voltage output node  19  into the capacitor  18 . The set top box  152  also includes the adjustable linear regulator  30 . The reverse current blocking circuit  106  is coupled between the switching regulator  16  and the adjustable linear regulator  30 . The set top box  152  also includes the switching regulator controller circuit  22  coupled between the regulated voltage output node  19  and the switching regulator control node  17   c . The switching regulator  16  is configured to generate a regulated voltage  156  at the regulated voltage output node  19 . 
         [0047]    In operation, as described above, the reverse current blocking circuit, here shown as a diode  106 , prevents a current from flowing from the regulated voltage output node  19  into the capacitor  18 . With this arrangement, the parasitic diode  34 , and therefore, the FET  32 , are protected from any current that arises from the unwanted signal  74 . 
         [0048]    The switching regulator control node  17   c  is coupled to the regulated voltage output node  19  via the resistor divider  24 . Thus, a DC voltage at the regulated voltage output node  19  is regulated and stable, and has a value determined by signals  164  and  174   a.    
         [0049]    It will be recognized that, since the voltage regulator  16  is controlled in a slightly different way than the voltage regulator  16  of  FIG. 1 , signals  156  and  151  can be slightly different than (but nominally the same as) the signals  16   a  and  32   a  of  FIG. 1 . The divided signal  164  can also be slightly different than the divided signal  24   a  of  FIG. 1  and control signal  166  can be slightly different than the control signal  22   a  of  FIG. 1 . 
         [0050]    In some embodiments, the set top box  102  can also include the resistor  112  coupled in series with the cable  68 . However, since the feedback path of the signal  151  is coupled at an output node  180 , the signal  151  carried by the cable  68  is nominally the same as the signal  32   a  of  FIG. 1 , which is carried by the cable  68 . 
         [0051]    Referring now to  FIG. 2A , in which like elements of  FIGS. 1 and 2  are shown having like reference designations, a satellite TV system  200  includes a set top box  202 , which is similar to the set top box  152  of  FIG. 2 . The voltage divider  24  is coupled to receive a regulated output voltage  208  generated by the switching regulator  16 , and is configured to generate a divided signal  218 , which is received by the switching regulator controller  22  instead of the divided signal  164  of  FIG. 2 . The filter circuit  153  is coupled to receive an output signal  201  carried by the cable  68 . A DC voltage within the output signal  201  is regulated and stable. 
         [0052]    It will be recognized that, since the voltage regulator  16  is controlled in a slightly different way that voltage regulator  16  of  FIG. 2 , signals  208  and  201  can be slightly different than (but nominally the same as) the signals  156  and  151  of  FIG. 2 , respectively. The divided signal  218  can also be slightly different than the divided signal  164  of  FIG. 2  and the control signal  220  can be slightly different than the control signal  166  of  FIG. 2 . 
         [0053]    In some embodiments, the set top box  202  can also include an inductor  212  coupled in series with the resistor  112 , resulting in a signal  201  carried by the cable  68  that is nominally the same as the signal  151  of  FIG. 2 , which is carried by the cable  68 . 
         [0054]    The feedback signal to the adjustable linear regulator controller  46 , which is shown in  FIG. 1  as the signal  32   a , can instead be provided as signal  201  passing through the optional filter  153 , and provided as a signal  222  to the linear regulator controller  46 . With this arrangement, any voltage drop through the resistor  112  and through the inductor  212  is compensated in the closed feedback loop around the adjustable linear regulator  30 . In turn, via a reference signal  224   a  from the linear regulator controller  46  and via the signal  42   a  from offset voltage generator  42 , the switching regulator  16  is also controlled to maintain a regulated output voltage  208  above the DC voltage of the signal output  201 . 
         [0055]    Using language similar to language recited above in conjunction with  FIG. 2 , the set top box  202  includes the switching regulator  16 . The switching regulator  16  includes the switching regulator input node  17   a  at which the input voltage  14  is received. The switching regulator  16  also includes the voltage holding node  17   b . The switching regulator  16  also includes the capacitor  18  coupled at one end to the voltage holding node  17   b  and coupled at the other end to a reference voltage, for example, ground. The switching regulator  16  also includes the switching regulator control node  17   c . The set top box  202  also includes the reverse current blocking circuit  106  comprising first and second nodes  106   a ,  106   b , respectively. The first node  106   a  is coupled to the voltage holding node  17   b  and the second node  106   b  is coupled to a regulated voltage output node  19 . The reverse current blocking circuit  106  is configured to prevent a current from flowing from the regulated voltage output node  19  into the capacitor  18 . The set top box  202  also includes the adjustable linear regulator  30 . The reverse current blocking circuit  106  is coupled between the switching regulator  16  and the adjustable linear regulator  30 . The set top box  202  also includes the switching regulator controller circuit  22  coupled between the regulated voltage output node  19  and the switching regulator control node  17   c . The switching regulator  16  is configured to generate a regulated voltage  208  at the regulated voltage output node  19 . 
         [0056]    The signal  201  includes both the regulated DC voltage and also a tone signal representative of the tone signal  26   a.    
         [0057]    Referring now to  FIG. 3 , in which like elements of  FIGS. 1 ,  2 , and  2 A are shown having like reference designations, a satellite TV system  300  includes a set top box  302 , which does not include the diode  106  of  FIGS. 2-2A , but which includes a diode  254  coupled in series with an output signal  301  carried by the cable  68 . 
         [0058]    Like the diode  106  of  FIGS. 2 and 2A , the diode  254  blocks a current resulting from the unwanted signal  74  from passing through the diode  34 . 
         [0059]    In order to avoid a voltage drop resulting from the diode  254 , the linear regulator controller  46  is coupled to receive a signal  312  from the filter circuit  153 . The filter circuit  153  is coupled to receive the output signal  301 . 
         [0060]    With this arrangement, the DC voltage of the output signal  301  does not suffer the voltage drop of the diode  254 . 
         [0061]    Referring now to  FIG. 3A , in which like elements of  FIGS. 1 ,  2 ,  2 A, and  3  are shown having like reference designations, a satellite TV system  350  includes a set top box  352 , which does not include the diode  106  of  FIGS. 2 and 2A , but which includes the diode  254 . 
         [0062]    Unlike the set top box  302  of  FIG. 3A , the set top box  352  includes an inductor coupled in series with the diode  254 , resulting in an output signal  351  carried by the cable  68 . 
         [0063]    With this arrangement, like the arrangement of  FIG. 3 , the DC voltage of the output signal  351  does not suffer the voltage drop of the diode  254  or of the inductor  358 . 
         [0064]    While diodes  106  and  254  are shown in figures above to provide the reverse current blocking circuits necessary to protect the diode  34  and the FET  32 , in other embodiments, the diodes  106  and  254  can be replaced with other circuit components that can also block currents like a diode. For example, the diodes  106  and  254  can be replaced with a silicon controlled rectifier (SCR) or with a bipolar transistor alone or in a transistor circuit. 
         [0065]    Referring now to  FIG. 4 , a circuit  400  includes a boost switching regulator circuit  402 , which can be the same as or similar to the switching regulator  16  of  FIGS. 2-3A . It will be recognized that the boundaries of the boost switching regulator circuit  402  may include other portions of the circuit  400 . However, for the sake of discussion, it is described herein that the boost switching regulator contains at least the circuit  402 . 
         [0066]    The boost switching regulator includes an inductor  406  having first and second nodes. The first node of the inductor  406  is coupled to receive a DC input signal  404  at an input node  402   a  of the boost switching regulator  402 . The boost switching regulator  402  also includes a diode  408  having an anode and a cathode. The anode is coupled to the second node of the inductor  406 . The boost switching regulator  402  also includes a capacitor  410  coupled between the cathode and ground. The boost switching regulator  402  also includes a switching circuit  420  having a switching node coupled to the second node of the inductor  406 . In some embodiments, an input capacitor (not shown) can be coupled to the input node  402   a  of the boost switching regulator  402 . The capacitor  410  can be the same as or similar to the capacitor  18  of  FIGS. 2-3A . 
         [0067]    In some embodiments, the circuit  400  includes a diode  412  having an anode and a cathode. The anode is coupled to a voltage holding node  402   b  of the boost switching regulator  402  and the cathode is coupled to a regulated voltage output node  413 , at which a regulated DC output voltage  415  is generated. The diode  412  can be the same as or similar to the diode  106  of  FIGS. 2-2A . 
         [0068]    It will be understood that a regulated output voltage  415  is maintained by providing feedback to the boost switching regulator  402 . To provide the feedback, a voltage divider  414  is coupled to receive the regulated voltage output signal  415  and configured to generate a divided signal  414   a . A switching regulator controller  416  is coupled to receive the divided signal  414   a  and configured to provide a control signal  418   a  coupled to a control node  402   c  of the switching regulator  402 , which is coupled to a control node of the switching circuit  420 . The switching regulator controller  416  can be the same as or similar to the switching regulator controller  22  of  FIGS. 2-3A  and the voltage divider  414  can be the same as or similar to the voltage divider  24  of  FIGS. 2-3A . 
         [0069]    In some embodiments, the switching regulator controller  416  includes an amplifier, e.g., a comparator, coupled to receive the divided signal  414   a  and coupled to receive a reference voltage signal  422  (e.g., signal  174   a  of  FIG. 2 ). The amplifier  420  is configured to compare the divided signal  414   a  to the reference signal  422  and to generate a comparison signal  420   a . A pulse width modulation (PWM) circuit  418  is coupled to receive the comparison signal  420  and configured to generate the control signal  418   a.    
         [0070]    The circuit  400  is coupled in a circuit topology like a portion of the circuit  150  of  FIG. 2 . In particular, the circuit  400  includes the diode  412  coupled as shown and the resistor divider  414  coupled as shown. However, it will be understood that the boost switching regulator  402 , the resistor divider  414 , and the switching regulator controller  416  can be coupled into any of the arrangements of  FIGS. 2-3A . 
         [0071]    Referring now to  FIG. 5 , in which like elements of  FIG. 4  are shown having like reference designations, a circuit  450  includes a buck switching regulator circuit  452 , which can be the same as or similar to the switching regulator  16  of  FIGS. 2-3A . It will be recognized that the boundaries of the buck switching regulator circuit  452  can include other portions of the circuit  450 . However, for the sake of discussion, it is described herein that the buck switching regulator contains at least the circuit  452 . 
         [0072]    The buck switching regulator includes a switching circuit  456  having a switching node coupled to receive a DC input signal  454  at an input node  452   a  of the buck switching regulator  452 . The buck switching regulator  452  also includes a diode  458  having an anode and a cathode. The cathode is coupled to an output node of the switching circuit  456  and the anode can be coupled to ground. The buck switching regulator  452  also includes an inductor  460  having first and second nodes. The first node of the inductor  460  is coupled to the cathode of the diode  458 . In some embodiments, an input capacitor (not shown) can be coupled to the input node  452   a  of the buck switching regulator  452 . The buck switching regulator  452  also includes a capacitor  462  coupled to the second node of the inductor  460 , which can be the same as or similar to the capacitor  18  of  FIGS. 2-3A . 
         [0073]    In some embodiments, the circuit  450  includes the diode  412  having an anode and a cathode. The anode is coupled to a voltage holding node  452   b  of the buck switching regulator  452  and the cathode is coupled to the regulated voltage output node  413 , at which a regulated DC output voltage  468  is generated. The regulated voltage  468  can be the same as or similar to the regulated voltage  415  of  FIG. 4 . The diode  412  can be the same as or similar to the diode  106  of  FIGS. 2-2A . 
         [0074]    It will be understood that the regulated output voltage  468  is maintained by providing feedback to the buck switching regulator  452 . To provide the feedback, the voltage divider  414  is coupled to receive the regulated voltage output signal  468  and configured to generate a divided signal  470 . The switching regulator controller  416  is coupled to receive the divided signal  470  and configured to provide a control signal  474  coupled to a control node  452   c  of the switching regulator  452 , which is coupled to a control node of the switching circuit  456 . The switching regulator controller  416  can be the same as or similar to the switching regulator controller  22  of  FIGS. 2-3A . 
         [0075]    The circuit  450  is coupled in a circuit topology like a portion of the circuit  150  of  FIG. 2 . In particular, the circuit  450  includes the diode  412  coupled as shown and the resistor divider  414  coupled as shown. However, it will be understood that the buck switching regulator  452 , the resistor divider  414 , and the switching regulator controller  416  can be coupled into any of the arrangements of  FIGS. 2-3A . 
         [0076]    While boost and buck switching regulators are shown and described above, it should be understood that the switching regulator  16  of  FIGS. 2-3A  can be any one of the many forms of switching regulators, including, but not limited to, a boost switching regulator, a buck switching regulator, and a buck-boost switching regulator. 
         [0077]    All references cited herein are hereby incorporated herein by reference in their entirety. 
         [0078]    Having described preferred embodiments, which serve to illustrate various concepts, structures and techniques, which are the subject of this patent, it will now become apparent to those of ordinary skill in the art that other embodiments incorporating these concepts, structures and techniques may be used. Accordingly, it is submitted that that scope of the patent should not be limited to the described embodiments but rather should be limited only by the spirit and scope of the following claims.