Abstract:
An Active edge connector for memory modules has a base including two PCB sides and a spacer separating the sides, with driver chips mounted on each side of each side, printed wiring electrically connecting a first set of electrical signals from each of the driver chips to a mother board on which the connector is mounted, and printed wiring for electrically connecting a second set of electrical signals from each of the driver chips to a memory module inserted in the edge connector. When a group of connectors are mounted on a mother board, electrical signals arriving at the first connector are routed to its driver chips, producing re-driven signals to the next connector, and so on. A decoder circuit provides addressing signals determining the last such connector to which the signals are intended, and which prevents the signals from going to any connectors containing memories not addressed.

Description:
[0001]    This application claims priority based on U.S. patent application Ser. No. 11/831,062 filed on Jul. 31, 2007 for “Active Dual in Line Memory Module Connector with Re-driven Propagated Signals,” as well as Provisional Patent 60/834,844 (Aug. 2, 2006), for “Active dual in line memory module connector (ADIMMC) with re-driven propagated signals”. 
     
    
     FIELD OF THE INVENTION 
       [0002]    This invention relates to the field of systems and methods for creating high capacity Dual In-Line Memory Module (DIMM) connectors with controlled impedance. Said connectors accommodate active circuits to meet requirements of high density memory module systems operating at high frequency data rates. Structures containing the proposed DIMM systems provide point to point connections in a series signal propagation arrangement. 
       DESCRIPTION RELATIVE TO THE PRIOR ART 
       [0003]    Throughout the evolution of the computer memory systems, memory chips have either been used soldered on the motherboard or have been packaged in small PCB (printed circuit board) substrates with edge connector contacts and then plugged into connectors which are permanently soldered onto the motherboard. 
         [0004]    Memories packaged in PCB substrates are known by different names such as SIMM (Single In line Memory Module) or DIMM (Dual In line Memory Module). To accommodate those modules, connectors have been designed and used on motherboards throughout the industry. None of those prior art connectors used in the industry have ever accommodated active circuits as an integral part of the physical structure. 
         [0005]    The present invention will be better understood by describing the physical structure of the prior-art DIMM connector and then contrasting to the one proposed in the present invention. 
         [0006]    Referring to  FIG. 1A  and  FIG. 1B , the presently used DIMM connector, shown in cross sectional view, consists of a three dimensional plastic assembly  100  of long rectangular shape forming a cavity with partitioned compartments. A plethora of pins  101  in an array formation, properly formed, populates each side of the cavity in two parallel rows. The pins on one end are formed to make contact with and exert pressure on the tabs  102  of the edge connector of the DIMM  103  bearing memory chips  104 . Those formed pin ends protrude within the walls of the cavity. The other end of each pin  101  is protruding through the plastic  100  and extends beyond to provide a soldering point to the motherboard  105 . Such said extension is either a straight pin  101  to solder into a plated hole or is formed  106  to solder attach onto the surface of motherboard  105 . Said formed pins are farther away from ground or VCC pins and as such present an impedance alteration and discontinuity which causes reflections of the signals. 
         [0007]    Referring to  FIG. 2 , a prior-art memory sub-system consists of a controller  200  supporting, on one end, the interface of a CPU  207  and on the other end the interface to multiple memory DIMM modules  203  having DRAM devices  204  that are plugged into connectors  202 . A DQ (data bit line) from each connector pin is attached to the same motherboard DQ line  201  line by a short wire  206  called a stub. The DQ line  201  could have a termination network  205 . The capacitive load from each DRAM chip of each DIMM is cumulative on the DQ line  201 . The higher the capacitive load the slower the signal becomes on that line. 
         [0008]    Therefore, the data rate of the signal is inversely proportional to the capacitive load of the line. In addition, reflection from each DIMM load degrades the quality of the signal. 
         [0009]    The objective of all methods known and implemented is to include as many as possible memory chips in whatever packaged form so that the total arrangement results in a DIMM module with high memory capacity. However, such an arrangement of DIMMs and memory chips slows down the data rate. 
         [0010]    The number of connectors on a motherboard of prior-art systems is constantly shrinking for space availability, frequency requirements, heat considerations and costs. 
         [0011]    Presently, two connectors, and in some cases only one, is the norm depending on the data rate of the memory devices and of the interface. 
         [0012]    However, the ever increasing demand for more memory capacity requires techniques to allow more memory capacity in restricted numbers of connectors with ability to provide heat dissipation. Cost reduction is a further consideration in the design of the memory sub-system. 
         [0013]    In order to achieve high memory capacity and increase the data rate, a reduction of capacitive load is necessary. 
         [0014]    The best result is achieved only if a single load is presented to the driver of each data bit line in the direction of transmission. 
         [0015]    The prior-art architecture of multiple drop-off connections as shown in  FIG. 2  is not the solution. An architecture is needed where each data bit from point to point has a driver and a receiver, called point-to point-connection, with minimum capacitive load from point to point and a repeater driver and receiver for the same data bit for the next DIMM module down the line of the memory sub-system. Repeaters are used in many designs in order to accomplish point-to-point connections. 
         [0016]    However, in the memory sub-system of prior art designs such solution has been impractical and requires more space on the motherboard, thus increasing the cost and complexity of the system. Another inhibiting factor is the long propagation delay due to the lengths of the repeater transmission lines in a multi-DIMM system on the motherboard. Yet another factor is the presence of long connecting stubs that create signal reflections, thus further distorting the quality of the signal. Bad signal quality results in receiver data bit errors. 
         [0017]    The present invention of active connectors provides solutions to the above mentioned deficiencies of present designs. 
       SUMMARY OF THE INVENTION 
       [0018]    It is the object of the present invention to provide an active connector which facilitates high density memory module systems operating at high frequency data rates. 
         [0019]    In accordance with a first aspect of the invention, a connector is constructed having active circuits as part of the physical structure of the connector. 
         [0020]    In accordance with a second aspect of the invention, the connector consists of two rigid double faced PCB, single or multiple layers, having long and short edges on the perimeter separated by material of thickness sufficient to form a cavity between the two PCBs, and to maintain alignment and rigidity of the PCB sides. 
         [0021]    In accordance with a third aspect of the invention, each PCB bears active circuits in a packaged or Chip On Board (COB) arrangement, printed connecting wires on one or multiple layers for interconnections, connecting tabs on the surfaces for surface mounted active circuits with inputs connecting to input pins of the connector and multiple outputs connecting to connector output pins, connecting tabs or vias on the long perimeter sides for attaching pins. Each PCB bears said connecting tabs or vias on one long perimeter edge and on one or both faces for attaching surface mounting pins for motherboard connections. Furthermore, said other connecting tabs or vias are on the other long perimeter edge side for attaching springy pins to mate with the edge connector tabs of the DIMM PCB. 
         [0022]    In accordance with a fourth aspect of the invention, the rectangular PCB pieces are attached to material which serves to keep the two PCB pieces in a parallel arrangement, thus creating a physical cavity for DIMM acceptance. This arrangement provides support and attachment of two latching mechanisms, one on each end in line with the cavity, for securing the inserted DIMM in position and for assisting in the extraction of the DIMM from the cavity. It further provides guiding pins for alignment of the connector on the proper position on the motherboard at time of solder reflow. 
         [0023]    In accordance with a fifth aspect of the invention, the pins on the side of the connector that attaches to the motherboard are of “U” shape with a perpendicular extension at the bottom of the “U”. The sides of the “U” are secured onto the PCB edge tabs and the perpendicular extension solders onto the motherboard PCB. The pins on the side that connects to the DIMM edge connector tabs are of “U” shape with a bent upward extension to provide a springy connecting pin to pressure against the edge tabs of the DIMM PCB. 
         [0024]    In accordance with a sixth aspect of the invention, the connector attaches to the motherboard PCB with actual printed tabs on the face of the connector PCB and extending to the edge. Said tabs are soldered on the tabs of the motherboard with solder at the time of reflow. 
         [0025]    In accordance with a seventh aspect of the invention, the connector is constructed with flexible material and with solid non-conductive substrate. The non-conductive substrate, either plastic or metal, with sides and cavity and guide pins, constitute a connector. The Flex PCB material with Signal, Ground and VCC planes is designed to accept the active circuits with all the interconnecting printed wires for the active circuits and the input/output connector pins. The connector pins that attach to the motherboard tabs are tabs formed on the Flex PCB or pins attached to the said Flex PCB tabs. The pins that connect to the DIMM edge connector are secured onto the Flex PCB tabs at the entry of the cavity of the rigid substrate. The Flex PCB substrate wraps around the bottom and sides of the rigid substrate and is adhered to the substrate with adhesive substance. The attachment of the connector to the motherboard is made by means of reflowing solder on the motherboard tabs, and on the corresponding tabs or pins of the Flex PCB connector that constitute the input/output pins. 
         [0026]    In accordance with an eighth aspect of the invention, the Flex PCB layer with the active circuits are in two pieces, each attaching to the sides of the preformed connector. The input/output pins of the connector are attached to the solid non-conductive body of the connector and to the corresponding tabs that appear on the respective positions on the Flex PCB layers. 
         [0027]    In accordance with a ninth aspect of the invention, the active circuits which re-drive the input/output signals on the active connector include the functions of receiving a signal from the connector pin to the motherboard and providing re-driven outputs. One output feeds the output pin of the connector that attaches to the corresponding DIMM edge connector tab and the other output of the same signal feeds the pin of the connector that serves as the propagation path to the next connector on the motherboard. All of the data signal paths through the active circuits are bi-directional. The address and control signal paths are unidirectional from the controller to all the DIMM connections. 
         [0028]    In accordance with a tenth aspect of the invention the control of the direction of the data from connector to connector is performed at the time that the Write/Read is interpreted from command signals, and the appropriate control signals are passed to the active circuits on each connector of the system. The control signals are either sent to the connector system from the controller or are interpreted from the commands and address and controls that are re-driven on each active connector of the invention. 
         [0029]    The active circuits that are not required in the non-selected connectors are turned off. 
         [0030]    In accordance with an eleventh aspect of the invention an inactive High Speed Connector is manufactured with flexible material with the active circuits absent so that the connections from the motherboard tabs to the pins that engage the DIMM tabs are printed wires with controlled impedance referenced to the Ground or VCC plane which is part of the Flex PCB substrate. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0031]    These, and further features of the invention, may be better understood with reference to the accompanying specification and drawings depicting the preferred embodiments, in which: 
           [0032]      FIG. 1A  depicts a typical prior art DIMM connector construction without any active circuits. 
           [0033]      FIG. 1B  depicts an alternative prior-art DIMM connector construction without any active circuits. 
           [0034]      FIG. 2  depicts a typical prior art memory system interface with drop off connection arrangement of the DIMM connectors. 
           [0035]      FIG. 3A  depicts an active connector of the present invention with active circuits as part of the connector body. 
           [0036]      FIG. 3B  depicts a front elevation view of one side of the connector. 
           [0037]      FIG. 3C  shows a layout of the tabs on the connector sides, beneath one of driver chips. 
           [0038]      FIG. 3D  depicts a front elevation view of the connector. 
           [0039]      FIG. 3E  depicts a layout of the pads beneath one of the driver chips. 
           [0040]      FIG. 4A  depicts a front elevation view of the connector of the present invention with the DIMM board inserted, and further showing the driver chips attached to the connector sides. 
           [0041]      FIG. 4B  is a perspective view which depicts the latching mechanism affixed to the spacer block of the connector. 
           [0042]      FIG. 5  depicts the footprint of two connectors of the present invention on the motherboard where each connector is attached and showing the wiring providing for of the propagation of a signal from one connector to the next. 
           [0043]      FIG. 6  depicts a block diagram of the logic implementation of active circuits for a single data bit signal of the present invention. 
           [0044]      FIG. 7  depicts a block diagram of the logic implementation of active circuits for a single unidirectional address or command or control signal of the present invention. 
           [0045]      FIG. 8  depicts a cross sectional view of a connector of the present invention which includes Flex PCB printed circuits in its construction. 
           [0046]      FIG. 9A  depicts cross sectional views and a view of the multi-plane of the Flex PCB substrate which forms the outer surface of the connector of the present invention, in a second embodiment. 
           [0047]      FIG. 9B  depicts a cross section of the connector using the Flex PCB substrate of  FIG. 9A   
           [0048]      FIG. 9C  depicts a cross section of the connector using the Flex PCB substrate of  FIG. 9A  in an alternative embodiment. 
           [0049]      FIG. 10  depicts a cross section of the connector using a layer of copper clad material between two layers of substrate, and affixed to a metallic spacer. 
       
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0050]    The invention is better explained by reference to the drawings described above, and to the detailed descriptions and explanations which follow. 
       DEFINITIONS 
       [0051]    The term “PCB” will be used to describe printed circuit board assemblies, which contain conducting materials including wiring leads, pads, and other features affixed to the surface, usually by a process of etching. Unless otherwise specified, PCBs are assumed to be rigid. 
         [0052]    The term “Flex PCB” will be used to describe printed circuit board assemblies which are flexible. 
         [0053]    The term “re-driver chip” will be used to describe the integrated circuit chip, located on the connector of the present invention or in close proximity to it, which contains both receivers and drivers that process data signals of the memory modules, in addition to other circuitry to support these functions. The re-driver chip in an alternative embodiment may also contain circuits that perform addressing and command and control functions. 
         [0054]    The term “addressing chip” will be used to describe integrated circuit chips which perform addressing and command and control functions for the memory modules. 
       Operation of the Circuits 
       [0055]    Referring first to  FIGS. 3A through 3E , it may be seen that two long rectangular PCB members  300  and  301 , each having two long and two short perimeter edges, a front face and a back face, are arranged and structured to make up the active connector. The dimensions of the PCB are such that the connector arrangement has a very low profile in height and width. 
         [0056]    Still referring to  FIGS. 3A and 3E , the front face of PCB  300 , on which the driver chips  302  are mounted, contains etched wires and pads to facilitate the operation of the driver chips. One such area is shown in this figure, representing a typical configuration of wire and pads, corresponding to a single chip. In this figure the connections on the front face of the PCB are shown in bold, while those routed to the back face of the PCB are shown in phantom, having dotted lines instead of solid lines. 
         [0057]    Along the lower perimeter edge of the front face of PCB  300 , tabs  312  are etched in specified spacing. Along the same lower perimeter edge, at the back face of PCB  300 , tabs  317  are etched. In a similar manner, tabs  314  are etched on the upper perimeter edge of PCB  300 , on the back face. Pins  303  are attached onto tabs  312  of PCB  300 , while pins  304  are attached onto tabs  317  of PCB  300 . 
         [0058]    In another arrangement, pins  305  are attached for both front and back face tabs of PCB  300 . 
         [0059]    The etched lines of PCB  301  are disposed in a similar way. 
         [0060]    In order to maximize space utilization the pins on the bottom of the connectors are offset, as shown in the group  309  of  FIG. 3C . Pins in the same column of this figure are exclusively from the front surface, or side, of a PCB, while those in the other column are from the other surface of the same PCB. Thus, referring again to  FIG. 3E , the bold tabs at the bottom of the figure, typified by  312 , are all attached to a pin belonging to one column of pins in  FIG. 3C , while those shown in phantom, typified by  317 , are all attached to a pin belonging to the other column. 
         [0061]    Still referring to  FIG. 3E , a plurality of footprint pads  311  are etched on the front face of PCB  300 , to accept pins or solder balls of the active circuit chips. Tabs  312  which are connected to pins  303  connect to corresponding pads of the motherboard. Thus, pins  303  for PCB  300  carry input signals from motherboard to the active circuits and output signals from active circuits to the motherboard. 
         [0062]    Referring again to  FIG. 3E  it may be seen that tabs  314  are etched on the back face of PCB  300 . The tabs on the upper edge of PCB  300  connect to pins  306  on PCB  300 , while those on the upper edge of PCB  301  connect to pins  306  on PCB  301 . These pins make contact with the corresponding tabs on the DIMMS or other memory boards which insert into the connectors. 
         [0063]    Some of the pads of the active circuit package, typified by  313  in  FIG. 3E , are connected with etched wires  315  and via pads  316  to predefined tabs  317  which are etched on the back face of the long perimeter edge of PCB  300 . 
         [0064]    Still referring to  FIG. 3E , it is noted that in the path where the direction of the signal is from the motherboard to the active circuit, the signal enters through tab  312  to the active circuit. The active circuit provides two output signals, which are copies of the input, one on tab  314  and one on pad  317 . 
         [0065]    As just noted, the output on tab  314  is sent to the DIMM that is attached to the connector through pins  306 . The other output copy on tab  317  is sent back to the motherboard and is propagated to the next active connector attached to the motherboard. The process is repeated for every active connector in the memory subsystem. 
         [0066]    For PCB  301  the active circuit pads are etched on the back face and the connections from front face edge pads to the active circuits on the back face is done through a via connection and printed wire. 
         [0067]    In another embodiment of the invention, the active circuit pads are located in either face of the PCB when it becomes easier and convenient. There is no restriction on the actual locations and routings of the pads and via connections, except in accordance with the objectives of maximizing density and minimizing signal interference and degradation. 
         [0068]    Still referring to  FIGS. 3A through 3E  each PCB,  300  and  301 , will have a plurality of tabs  312  and  317  with pins  303  and  304  or with pins  305  or with pins  321  or any other shape of pins chosen and attached along one long perimeter edge of the PCB shown as row  308 , which connects to the motherboard. 
         [0069]    When the PCBs have the configuration shown in  FIG. 3E , the plane of the PCBs are at right angles to the plane of the motherboard to which the connector is affixed. Thus, the tabs  312  will be at right angles to the corresponding tabs on the motherboard. Since the thickness of the tabs  312  is typically of the order of several mils, before soldering there will be a very small area of contact between these tabs and the corresponding tabs on the motherboard. However, after flow soldering, the solder will provide a substantial area of contact between the said tabs. 
         [0070]    The other long perimeter edge of the PCB  300  and  301  will have a plurality of tabs  314  and pins  306 , or with pins  320  or any other shape of pins chosen and attached along the said long perimeter edge of the PCB shown as row  307  that connect to the inserted DIMM edge connector tabs. 
         [0071]    Referring next to  FIG. 3D  a front elevation view  310  of the assembled connector is also shown. The PCBs  300 ,  301  are shown separated by the separator  316 . The driver chips  302  are seen attached to the outside surfaces of the PCBs, while the spring clips  306  which mate with the DIMM board (not shown) appear. Pins of the type  303  or  304  are shown at the bottom of the PCBs, and these are used for attachment to the mother board. 
         [0072]    Referring next to  FIG. 4A , it is seen that the two assembled PCBs with the active and inactive components and the appropriate pins, are assembled together around a spacer block  318  of rigid material either of PCB nature or metal, such as aluminum, or any other substance that has enough rigidity to keep the PCB in a parallel configuration. The rigid spacer block  318  has a protruding bottom member  322  for alignment to the footprint of the motherboard during the reflow process. A shroud or molded material can be included during reflow soldering to protect components and pins where necessary. 
         [0073]    When the spacer block  318  is made of a heat conducting material, such as copper, further heat dissipation may be achieved by the use of a plate of heat conducting metal on the back of each of the PCBs which make up the sides of the connector. The optimum location for the plate is within the PCB substrate, wherein no electrically conducting signals are present, so that the plate does not interfere with the electrical conductivity of the circuitry on the outsides of the PCBs. 
         [0074]    Referring to  FIG. 10 , it is seen that the non-conductive outer layer  300   a  of the PCB contains the circuit elements  302  as in  FIG. 3A , and the middle layer  300   b  is a copper-clad layer which is intimately affixed to the metal spacer block  318 . A further non-conductive layer  300   c  on the inside of the PCB provides further insulation of the inside of the connector. 
         [0075]    The structure of  FIG. 10  provides a heat path for the dissipation of any heat generated by the electronic circuitry. The metal spacer block  318  may have fins formed at the ends to provide further heat dissipation if required. 
         [0076]    Referring next to  FIG. 4B  a sample of latch mechanism  405  that may be included in each end of the rigid block is also shown. This latch mechanism holds the DIMM board securely in place once it has been inserted into the connector. 
         [0077]    Referring next to  FIG. 5  a further explanation of the propagation of a signal from controller to the first DIMM and from first DIMM to the second DIMM and so on, may be understood. Representative footprints of the active connectors  501  and  502  on the motherboard appear in this drawing. 
         [0078]    Still referring to this drawing, controller  500  interface provides all the signals required by the memory sub-system. DQ 1  signal connects to tab  503  of the first connector  501 . The re-driven output DQ 1 R 1  appears on tab  504  of connector  501  and connects to tab  505  of the second connector  502 . The re-driven output DQ 1 R 2  on tab  506  from the active circuit of connector  502  is propagated to the next connector footprint, if there is one. The same principle applies to DQ 2   507  and final re-driven output  508  DQ 2 R 2 . 
         [0079]    Referring next to  FIG. 6  the active circuits on the connector that process the data signals are shown. It should be noted that the signals processed by the active circuits are classified as either data signals or control and address signals. 
         [0080]    Along with the re-driving function, these must be such as to allow a selection of a direction of the bi-directional signals based on the function performed either WRITE or READ. 
         [0081]    The circuits shown in this figure contain both receiver circuits and driver circuits. The receiver portion matches the characteristic impedance of the point-to-point connection trace on the motherboard. This receiver portion receives small amplitude signals and restores the amplitude to pass through to the re-driving circuit. 
         [0082]    The driving circuit provides power to the signal in full amplitude to preserve signal quality and drive through to the next point-to-point receiver, and also match the characteristic impedance of the next point-to-point connection trace on the motherboard. 
         [0083]    The combination allows high speed signal transmission since the signaling will be short distance in point-to-point format. 
         [0084]    A DQ 1  I/O signal  600  will be used for purposes of illustration. The active circuit  601  controlling DQ 1  is shown in its simplest form. Other more advanced designs with additional functions such as memory and registers and control functions can be used without departing from the invention. 
         [0085]    DQ 1  I/O BFR  601  has two paths. For a WRITE function, assuming that the WRITE function is intended for DIMM 1 , the signal travels through receiver  602 , driver  604  and connects to DRAM  612  of DIMM 1   611 . Drivers  603 ,  606  and receivers  605  and  607  are disabled to avoid conflict and conserve power. The directionality is controlled by enabled gate  608  and disabled gate  609 . 
         [0086]    For a READ function from DIMM 1 , receivers  602 ,  607  and drivers  604  and  606  are disabled. Receiver  605  and driver  603  are enabled to pass the signal from DRAM  612  to the controller. 
         [0087]    For a WRITE operation to DIMM 2 , CONN  1  active circuits are enabled only in the pass through WRITE mode. Receiver  602  and driver  606  are enabled and drivers  603 ,  604  and receivers  605  and  607  are disabled. 
         [0088]    For a READ operation on DIMM 2 , CONN  1  active circuits are enabled only in the pass through READ mode. Drivers  604 ,  606  and receivers  602  and  605  are disabled due to the fact that DIMM 1  is not selected. The signal travels from DQ 1  I/O line  610  through receiver  607  and driver  603  to the controller. DQ 1  I/O BFR  613  is similar to  601  in function and selection based on the function performed. 
         [0089]    For continuation to more connectors, signal will travel through DQ 1  I/O  615 . 
         [0090]    What has been just described, and shown in  FIG. 6 , is a simplified logic design of active circuits which may be used on the connectors. A more advanced and higher performance design, in further embodiments, can include extensive buffering of data to Registers or built in memory either static or non-volatile. 
         [0091]    The controlling of the direction on each connector can be done on each connector through a decoding function of the address, command and control lines and Clocks since all are going through active circuits on each connector. 
         [0092]    Referring next to  FIG. 7  a block diagram of the logic implementation of active circuits for a single unit address or command or control signal of the present invention may be seen. As previously stated, the logic of  FIG. 7  does not describe the processing of data signals, but rather the addressing and command and control signals processed by the active connector. 
         [0093]    All address, command and control lines  700  are re-driven through the active circuits of each connector. For the DIMM inserted in the connector, each signal is re-driven through driver  701  and applied to it. The same signal is re-driven through driver  702  and exits the connector to be connected to the next connector in line. 
         [0094]    Decode circuits  703  are used to decode the address, command and control lines to produce selection and directional signals  704  for the intended function for the active circuits on the same connector. The same arrangement of receiver and drivers is copied and applied to every unidirectional line in each connector. 
         [0095]    Referring next to  FIG. 8  an alternative embodiment of the connector, utilizing an external Flex PCB for mounting of components, is shown. The Flex PCB also provides a means for printed wiring connecting the various components for communication with the inserted DIMM and with the mother board below the connector. 
         [0096]    A connector body  800  is molded from plastic or other material in the form of a connector to provide rigidity and the required cavity to accept the DIMM edge connector. 
         [0097]    A thin flexible sheet  801  with copper clad of a multi-layer substrate is etched to provide the motherboard connecting pads  803 ,  804 ,  805  and  806 , pin connecting pads  807  and  808  for attaching pins  809  and  810  respectively, pads for soldering active circuits  802  and printed wires for interconnections. 
         [0098]    The exterior surface of the body  800  is prepared with adhesive substance to accept the Flex PCB. The prepared Flex PCB is then wrapped around the connector and pressed against it to permanently adhere to it. 
         [0099]    Pads  803 ,  804 ,  805  and  806  become the surface mounting contact points soldering the connector to the motherboard by use of solder balls or metal pins. Pins  809  and  810  are pressed around the connector body and the tabs  807  and  808  respectively and are soldered to said tabs for good electrical connection. 
         [0100]    Another approach to creating surface mounting pins is to actually use pins such as  811 ,  812  or  813 . Said pins are forced through the pads  803 ,  804 ,  805  and  806  and lodge themselves within the body of the connector. Then the external portion of the pin is soldered to the pad for good electrical connection. 
         [0101]    In another embodiment of the invention, the active circuits  802  could be placed on the inside surface  801  of material facing the face of the connector body  800 . In this case hollow packets are formed on the body  800  to hide the active circuits. 
         [0102]    A shroud can be used to protect the components and the pins during reflow soldering, as in a previous embodiment. 
         [0103]    In alternative embodiment of the invention the active circuits described in this invention could be applied directly on the motherboard as Chip on Board (COB) and use a conventional connector instead. 
         [0104]    Referring next to  FIG. 9A , depicting an alternative embodiment of the present invention, a view of the multi-plane of the flexible substrate which forms the outer surface of the connector of the present invention is shown.  FIGS. 9B and 9C  further show how this embodiment functions. 
         [0105]    A high speed connector with controlled impedance and without active circuits is constructed as shown herein. 
         [0106]    Item  900  is shown as a multi-layer substrate with copper clad surfaces. One layer is used for ground plane  902 , one for VCC power plane  903  and one for signal interconnections  901 . The signal plane  901  contains pads of different shape and size and printed wires. The printed wires  905  are used to connect corresponding pads. Wire  905  connects pad  906  to pad  904 . All other pads are connected in a similar fashion. Pads that are connected to Ground and VCC Power planes on the motherboard are connected also through plated via holes to corresponding ground  902  and VCC Power  903  planes of item  900 . The total thickness of item  900  is as thin as possible to allow for flexible bending around corners of item  909 . Item  909  shown in a U shape is prefabricated by known methods of injection molding for plastic or other suitable material, or mechanically pre-cast or machined. It is constructed to appropriate dimensions so that a DIMM edge connector can be inserted into it. The finished item  900  is wrapped around the outside perimeter of item  909 , shown as  900 F, and attached to it with adhesive material permanently. 
         [0107]    Solder balls  907  are affixed to pads  906 . The solder balls are used to make connection to the corresponding pads of the motherboard that the connector is attached during the re-flow process. 
         [0108]    On pads  904  which appear on top of the U shape sides of item  909 F, pins  908  or  913  or any other suitable shape are attached and soldered for good electrical connection. The formed portion of pins  908  or  913  that protrude to the inside of the U shaped cavity is used to mate and make connection to the corresponding pads of the inserted DIMM edge connector. Since behind each wire  905  there is a reference plane, the impedance is fabricated to match the motherboard impedance. The path of wire  905  becomes a transmission line instead of a stub. Stubs present impedance discontinuity, with attendant signal degradation. Therefore, the impedance discontinuity of the signal path from the motherboard pad to the pin connection to the DIMM pad should be minimized. 
         [0109]    Instead of item  900 A, item  900 B can be used without departing from the invention. The only difference is that item  900 B has item  900  wrapped around the top edges of item  909  as shown. 
         [0110]    Pins  908  can be substituted with pins  913  or any other suitable shape and material. Solder balls  907  can be substituted with pins such as  910 ,  911  or  912  or any other shape and material without diminishing the value of the invention. 
         [0111]    It will be apparent that improvements and modifications may be made within the purview of the invention without departing from the scope of the invention defined in the appended claims.