Abstract:
A high-voltage light emitting diode and fabrication method thereof, in which, the liquid insulating material layer/the liquid conducting material layer, after curing, is used for insulating/connecting, making the isolated groove between the light emitting units extremely narrow (opening width≦0.4 μm, such as ≦0.3 μm), which improves single chip output, expands effective light emitting region area and improves light emitting efficiency; the serial/parallel connection yield is improved for this method avoids easy disconnection of wires across a groove with extremely large height difference in conventional high-voltage light emitting diodes; in addition, the manufacturing cost is reduced for the LED can be directly fabricated at the chip fabrication end.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    The present application is a continuation of, and claims priority to, PCT/CN2015/073464 filed on Mar. 2, 2015, which claims priority to Chinese Patent Application No. 201410358143.X filed on Jul. 25, 2014. The disclosures of these applications are hereby incorporated by reference in their entirety. 
     
    
     BACKGROUND 
       [0002]    A light emitting diode (LED) is a type of semiconductor diode. It can convert electric energy into the luminous energy and emit visible light in yellow, green, blue, and the like, as well as invisible infrared and ultraviolet light. 
         [0003]    In recent years, high-power LEDs have become a key development concern by factories to meet lighting demands. In conventional high-power normal-chip LEDs, in general, the light emitting unit is a single chip featured with high current and low voltage, and the light emitting efficiency is affected by the raising junction temperature when big current is injected to the chip. In recent years, integrated high-voltage LEDs consisting several low-power LEDs have been introduced by big international factories, in which, the insulating layer is filled into an opened groove and plated with metal and an integrated LED is made after serial or parallel connection. Under serial connection, a low current passes through the small LED units and a high-voltage and low-current LED is formed. Compared with high-voltage diodes by wiring several light emitting diodes in series, the high-voltage light emitting diode has lower thermal resistance, which requires smaller heat dissipation modules in lighting fixtures. 
         [0004]    According to Chinese patent CN03820622.6, an integrated light-emitting device is disclosed, where several LED arrays are formed in a two-dimensional single chip on an insulating substrate like sapphire, and overhead bridge wiring is made between single LEDs and between the LED and the electrode. High drive voltage and low drive current are obtained through zigzag-shaped configuration of LED arrays. Problems exist in this integrated light-emitting device, like low light emitting efficiency, difficult heat dissipation, low power and poor reliability. Each independent LED is separated from its adjacent LEDs by etching an N-type semiconductor layer to the insulating substrate surface. Serial wires have to pass through the groove with extremely large height difference, easily causing disconnection of wires during fabrication and making the entire diode impossible to be connected. 
       SUMMARY 
       [0005]    To solve the aforesaid problems, the present disclosure aims at providing a high-voltage LED chip structure and the fabrication method thereof to reduce groove area, increase effective light emitting region area and output of single wafer-level chips and improve serial/parallel connection yield and light emitting efficiency. 
         [0006]    According to the first aspect of the present disclosure, a high-voltage LED chip is provided, comprising: a substrate and a light-emitting epitaxial laminated layer on the substrate; the light-emitting epitaxial laminated layer has several light emitting units, each comprising, from bottom to up, an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer; the light emitting units are separated from each other through the extremely-narrow groove above the substrate, wherein, the groove opening width is less than or equals to 0.4 μm; an insulating material layer cured from liquid insulating materials that stretches across the opening end of the extremely-narrow groove yet is not adhered to the side wall of the groove; and electrode connection wires on the insulating material layer, which electrically connect the adjacent light emitting units through the P electrodes or/and the N electrodes of the adjacent units. 
         [0007]    According to a second aspect of the present disclosure, a high-voltage LED chip is provided, comprising: a substrate and a light-emitting epitaxial laminated layer on the substrate; the light-emitting epitaxial laminated layer has several light emitting units, each comprising, from bottom to up, an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer; the light emitting units are separated from each other through the extremely-narrow groove above the substrate, wherein, the groove opening width is less than or equals to 0.4 μm; and electrode connection wires cured from liquid conducting materials that stretch across the opening end of the extremely-narrow groove yet are not adhered to the side wall of the groove, which electrically connect the adjacent light emitting units through the P electrodes or/and the N electrodes of the adjacent units. 
         [0008]    According to a third aspect of the present disclosure, a fabrication method of high-voltage LED chips is provided, comprising: providing a substrate; forming a light-emitting epitaxial laminated layer on the substrate; patterning the light-emitting epitaxial laminated layer and forming an extremely-narrow groove till exposure to the substrate surface to divide the light-emitting epitaxial laminated layer into several light emitting units, thus forming a light emitting diode wafer, wherein, each light emitting unit, from bottom to up, comprises an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer, and the groove opening width is less than or equals to 0.4 μm; coating a liquid insulating material layer on the light emitting diode wafer surface; heating and curing the liquid insulating material layer; patterning the cured liquid insulating material layer to make it stretch across the opening end of the extremely-narrow groove yet is not adhered to the side wall of the groove; and forming electrode connection wires on the insulating material layer that electrically connect the adjacent light emitting units. 
         [0009]    According to a fourth aspect of the present disclosure, a fabrication method of high-voltage LED chips is provided, comprising: providing a substrate; forming a light-emitting epitaxial laminated layer on the substrate; patterning the light-emitting epitaxial laminated layer and forming an extremely-narrow groove till exposure to the substrate surface to divide the light-emitting epitaxial laminated layer into several light emitting units, thus forming a light emitting diode wafer, wherein, the light emitting unit, from bottom to up, comprises an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer, and the groove opening width is less than or equals to 0.4 μm; coating a liquid conducting material layer on the light emitting diode wafer surface; heating and curing the liquid conducting material layer; patterning the cured liquid conducting material layer to make it as the electrode connection wire that stretches across the opening end of the extremely-narrow groove yet is not adhered to the side wall of the groove, and electrically connects adjacent light emitting units. 
         [0010]    Preferably, the substrate is an insulating substrate, like a sapphire substrate, an AlN substrate or other non-conducting substrates. 
         [0011]    Preferably, the light-emitting epitaxial laminated layer is formed through the metal-organic chemical vapor deposition (MOCVD). 
         [0012]    Preferably, the light emitting unit is in parallelogram, rectangle, circular or oval. 
         [0013]    Preferably, the liquid insulating material layer is made of spin coating glass (SOG), polymer, silica gel or any of their combinations. 
         [0014]    Preferably, the liquid conducting material layer is made of liquid ITO, liquid metal, conductive adhesive (such as elargol), electrically conductive silicone, or any of their combinations. 
         [0015]    Preferably, the extremely-narrow groove is formed through wet etching, dry etching, laser etching or any of their combinations. 
         [0016]    Preferably, the cured liquid insulating material layer after patterning, except stretching across the opening end of the extremely-narrow groove yet being not adhered to the side wall of the groove, also extends to part of the side wall of the light-emitting epitaxial laminated layer of one of the adjacent light emitting units. 
         [0017]    Preferably, the cured liquid insulating material layer after patterning, except stretching across the opening end of the extremely-narrow groove yet being not adhered to the side wall of the groove, also extends to part of the side walls of the light-emitting epitaxial laminated layers of the adjacent light emitting units. 
         [0018]    Preferably, before coating a liquid conducting material layer on the light emitting diode wafer surface, an insulating material layer is formed, which, except stretching across the opening end of the extremely-narrow groove yet being not adhered to the side wall of the groove, also extends to part of the side wall(s) of the light-emitting epitaxial laminated layer(s) of the adjacent light emitting units (or one of the adjacent light emitting units). 
         [0019]    Preferably, the cured liquid conducting material layer after patterning, except stretching across the opening end of the extremely-narrow groove yet being not adhered to the side wall of the groove, also extends to the insulating material layer at part of the side wall(s) of the light-emitting epitaxial laminated layer(s) of the adjacent light emitting units (or one of the adjacent light emitting units). 
         [0020]    In another aspect, a light-emitting system is provided including a plurality of the high-voltage LED chips described above. The light-emitting system can be used, for example, lighting, signage, display, etc. 
         [0021]    Compared with prior art, various embodiments of the present disclosure can have one or more of the following advantages: the liquid insulating material layer/the liquid conducting material layer, after curing, is used for insulating/connecting, making the isolated groove between the light emitting units extremely narrow (opening width≦0.4 μm), which improves single chip output, expands effective light emitting region area and improves light emitting efficiency; the serial/parallel connection yield is improved for this method avoids easy disconnection of wires across a groove with extremely large height difference in conventional high-voltage light emitting diodes; in addition, the manufacturing cost is reduced for the LED can be directly fabricated at the chip fabrication end. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0022]      FIG. 1  is a schematic diagram for a first step of fabricating a high-voltage LED chip according to Embodiment 1. 
           [0023]      FIG. 2  is a schematic diagram for a second step of fabricating a high-voltage LED chip according to Embodiment 1. 
           [0024]      FIG. 3  is a schematic diagram for a third step of fabricating a high-voltage LED chip according to Embodiment 1. 
           [0025]      FIG. 4  is a schematic diagram for a fourth step of fabricating a high-voltage LED chip according to Embodiment 1. 
           [0026]      FIG. 5  is a schematic diagram for a fifth step of fabricating a high-voltage LED chip according to Embodiment 1. 
           [0027]      FIG. 6  is a schematic diagram for a sixth step of fabricating a high-voltage LED chip according to Embodiment 1. 
           [0028]      FIG. 7  is a schematic diagram for a first step of fabricating a high-voltage LED chip according to Embodiment 2. 
           [0029]      FIG. 8  is a schematic diagram for a second step of fabricating a high-voltage LED chip according to Embodiment 2. 
           [0030]      FIG. 9  is a schematic diagram for a third step of fabricating a high-voltage LED chip according to Embodiment 2. 
           [0031]      FIG. 10  is a schematic diagram for a fourth step of fabricating a high-voltage LED chip according to Embodiment 2. 
           [0032]      FIG. 11  is a schematic diagram for a fifth step of fabricating a high-voltage LED chip according to Embodiment 2. 
           [0033]      FIG. 12  is a schematic diagram for a sixth step of fabricating a high-voltage LED chip according to Embodiment 2. 
           [0034]      FIG. 13  is a structural schematic diagram of a high-voltage LED chip according to Embodiment 3. 
           [0035]      FIG. 14  is a structural schematic diagram of a high-voltage LED chip according to Embodiment 4. 
       
    
    
       [0036]    In the drawings: 
         [0037]      101 ,  201 ,  301 ,  401 : substrate; 
         [0038]      102 ,  202 ,  302 ,  402 : N-type semiconductor layer; 
         [0039]      103 ,  203 ,  303 ,  403 : light emitting layer; 
         [0040]      104 ,  204 ,  304 ,  404 : P-type semiconductor layer; 
         [0041]      105 ,  205 ,  305 ,  405 : extremely-narrow groove; 
         [0042]      106 ,  206 ,  306 ,  406 : P electrode; 
         [0043]      107 ,  207 ,  307 ,  407 : N electrode; 
         [0044]      108 ,  208 ,  408 : insulating material layer; 
         [0045]      109 ,  209 ,  309 ,  409 : electrode connection wires. 
       DETAILED DESCRIPTION 
       [0046]    The LED device structure and fabrication method thereof will be described in detail with reference to the schematic diagrams, to help understand and practice the disclosed embodiments, regarding how to solve technical problems using technical approaches for achieving the technical effects. It should be understood that the embodiments and their characteristics described in this disclosure may be combined with each other and such technical proposals are deemed to be within the scope of this disclosure without departing from the spirit of this invention. 
       Embodiment 1 
       [0047]    Referring to  FIGS. 1-6 , the schematic diagrams for fabricating a high-voltage LED chip according to this present disclosure, the implementation steps comprise: 
         [0048]    Referring to  FIG. 1 , provide a substrate  101  for epitaxial growth, preferably, a sapphire insulating substrate, or an AlN substrate or other non-conducting substrates; form a light-emitting epitaxial laminated layer on the substrate  101  through MOCVD, which comprises, from bottom to up, an N-type semiconductor layer  102 , a light emitting layer  103  and a P-type semiconductor layer  104 . 
         [0049]    Referring to  FIG. 2 , pattern the light-emitting epitaxial laminated layer and form a V-shaped extremely-narrow groove  105  till exposure to the substrate  101  surface to divide the light-emitting epitaxial laminated layer into several circular light emitting units (as shown in the figure, there are 2 light emitting units; however, number of the light emitting units can be added based on actual requirements), thus forming a light emitting diode wafer, wherein, the light emitting unit, from bottom to up, comprises an N-type semiconductor layer  102 , a light emitting layer  103  and a P-type semiconductor layer  104 , and opening width of the extremely-narrow groove  105  is ≦0.4 μm; and the depth of the groove depends on the thickness of the light-emitting epitaxial laminated layer, in general, from several micrometers to a dozen of micrometers, and 10 μm is preferred in this embodiment. 
         [0050]    Referring to  FIG. 3 , etch from the surface of the P-type semiconductor layer  104  downwards to the N-type semiconductor layer  102  through dry/wet etching to expose some parts of the N-type semiconductor layer  102 ; and form the side wall of the light-emitting epitaxial laminated layer into an inclined plane through laser cutting. 
         [0051]    Referring to  FIG. 4 , fabricate a P electrode  106  and an N electrode  107  on the P-type semiconductor layer  104  and the exposed N-type semiconductor layer  102 . 
         [0052]    Referring to  FIG. 5 , coat the liquid insulating material layer made of polymer on the light emitting diode wafer surface, and then heat and cure the liquid insulating material layer; pattern the cured liquid insulating material layer through its surface tension via photomask and etching/stripping, to enable that the insulating material layer  108  stretches across the opening end of the extremely-narrow groove  105  yet is not adhered to the side wall of the groove, and also extends to part of the side wall of the light-emitting epitaxial laminated layer of a single light emitting unit. 
         [0053]    Referring to  FIG. 6 , form electrode connection wires  109  on the insulating material layer  108  through electronic beam evaporation, which connect the adjacent light emitting units through the P electrode  106  and the N electrode  107  by serial connection. 
         [0054]    Referring to  FIG. 6  for the high-voltage LED chip structure fabricated through the aforesaid steps. The high-voltage LED structure comprises: a substrate  101  and a light-emitting epitaxial laminated layer on the substrate; the light-emitting epitaxial laminated layer has several circular light emitting units, each comprising, from bottom to up, an N-type semiconductor layer  102 , a light emitting layer  103  and a P-type semiconductor layer  104 ; the light emitting units are separated from each other through the extremely-narrow groove  105  above the substrate, wherein, the groove  105  opening width is less than or equals to 0.4 μm; a P electrode  106  and an N electrode  107  formed on the P-type semiconductor layer  104  and the exposed N-type semiconductor layer  102  respectively; a polymer insulating material layer  108  that stretches across the opening end of the extremely-narrow groove yet is not adhered to the side wall of the groove, and also extends to the part of the side wall of the light-emitting epitaxial laminated layer of one of the adjacent light emitting units; electrode connection wires  109  on the insulating material layer  108 , which connect the adjacent light emitting units through the P electrode  106  and the N electrode  107  of the adjacent units by serial connection. 
         [0055]    In various embodiments of the present disclosure, the liquid insulating material layer/the liquid conducting material layer, after curing, is used for insulating/connecting, making the isolated groove between the light emitting units extremely narrow. In addition, the insulating material layer stretches across the opening end of the extremely-narrow groove yet is not adhered to the side wall of the groove, i.e., is not filled into the groove with high depth difference, making the electrode connection wires formed in later processes relatively flat, without causing big ups, downs or sags. In this way, connection yield and device reliability are improved. 
       Embodiment 2 
       [0056]    Referring to  FIGS. 7-12 , the schematic diagrams for fabricating a high-voltage LED chip according to this present disclosure, the implementation steps comprise: 
         [0057]    Referring to  FIG. 7 , provide a substrate  201  for epitaxial growth, preferably, a sapphire insulating substrate; form a light-emitting epitaxial laminated layer on the substrate  201  through MOCVD, which comprises, from bottom to up, an N-type semiconductor layer  202 , a light emitting layer  203  and a P-type semiconductor layer  204 . 
         [0058]    Referring to  FIG. 8 , pattern the light-emitting epitaxial laminated layer and form a V-shaped extremely-narrow groove  205  till exposure to the substrate  201  surface to divide the light-emitting epitaxial laminated layer into several rectangular light emitting units, thus forming a light emitting diode wafer, wherein, the light emitting unit, from bottom to up, comprises an N-type semiconductor layer  202 , a light emitting layer  203  and a P-type semiconductor layer  204 , and opening width of the extremely-narrow groove  205  is ≦0.4 μm. 
         [0059]    Referring to  FIG. 9 , etch from the surface of the P-type semiconductor layer  204  downwards to the N-type semiconductor layer  202  through dry/wet etching to expose some parts of the N-type semiconductor layer  202 ; and form the side wall of the light-emitting epitaxial laminated layer into an inclined plane through drilling tool cutting. 
         [0060]    Referring to  FIG. 10 , fabricate a P electrode  206  and an N electrode  207  on the P-type semiconductor layer  204  and the exposed N-type semiconductor layer  202 . 
         [0061]    Referring to  FIG. 11 , coat the liquid insulating material layer made of silica gel on the light emitting diode wafer surface, and then heat and cure the liquid insulating material layer; pattern the cured liquid insulating material layer through its surface tension via photomask and etching/stripping, to enable that the insulating material layer  208  does not stretch across the opening end of the extremely-narrow groove  205  and only extends to part of the side wall of the light-emitting epitaxial laminated layer. 
         [0062]    Referring to  FIG. 12 , coat an ITO liquid conducting material layer on the light emitting diode wafer surface, and then heat and cure the liquid conducting material layer; pattern the cured liquid conducting material layer through capillarity of the ITO liquid conducting materials via photomask and etching/stripping, to enable the cured conducting material layer as the electrode connection wires  209 , which stretch across the opening end of the extremely-narrow groove yet are not adhered to the side wall of the groove, and also extend to the insulating material layer at the side wall of part of the light-emitting epitaxial laminated layer of one of the adjacent light emitting units, and in this way, the adjacent light emitting units are connected in serial connection through the P electrode  206  and the N electrode  207 . 
         [0063]    Refer to  FIG. 12  for the high-voltage LED chip structure fabricated through the aforesaid steps. The high-voltage LED structure comprises: a substrate  201  and a light-emitting epitaxial laminated layer on the substrate; the light-emitting epitaxial laminated layer has several circular light emitting units, each comprising, from bottom to up, an N-type semiconductor layer  202 , a light emitting layer  203  and a P-type semiconductor layer  204 ; the light emitting units are separated from each other through the extremely-narrow groove  205  above the substrate, wherein, the groove  205  opening width is less than or equals to 0.4 μm; a P electrode  206  and an N electrode  207  formed on the P-type semiconductor layer  204  and the exposed N-type semiconductor layer  202  respectively; an insulating material layer  208  that does not stretch across the opening end of the extremely-narrow groove  205  and only extends to part of the side wall of the light-emitting epitaxial laminated layer; electrode connection wires  209  cured from the ITO liquid conducting material layer, which stretch across the opening end of the extremely-narrow groove yet are not adhered to the side wall of the groove, and also extend to the insulating material layer at part of the side wall of the light-emitting epitaxial laminated layer of one of the adjacent light emitting units, and in this way, the adjacent light emitting units are connected in serial connection through the P electrode  206  and the N electrode  207 . 
       Embodiment 3 
       [0064]    Referring to  FIG. 13 , compared with Embodiment 2, in this embodiment, the electrode connection wires  309  stretch across the opening end of the extremely-narrow groove yet are not adhered to the side wall of the groove, and do not extend to part of the side walls of the light-emitting epitaxial laminated layers of the adjacent light emitting units, and the electrode connection wires  309  connect the adjacent light emitting units in serial connection through the N electrode  307  of the adjacent light emitting units. The cured liquid conducting material layer directly stretches across the opening end of the extremely-narrow groove yet is not adhered to the side wall of the groove, and in this way, the conventional insulating material layer between the side wall of the light-emitting epitaxial laminated layer and the electrode connection wires is omitted, thus simplifying manufacturing processes and saving costs. 
       Embodiment 4 
       [0065]    Referring to  FIG. 14 , compared with Embodiment 1, the insulating material layer  408  in this embodiment is made of spin coating glass (SOG), which, except stretching across the opening end of the extremely-narrow groove yet being not adhered to the side wall of the groove, also extends to part of the side walls of the light-emitting epitaxial laminated layers of the adjacent light emitting units; in this embodiment, the electrode connection wires  409  are made of elargol, which, except stretching across the opening end of the extremely-narrow groove yet being not adhered to the side wall of the groove, also extend to the insulating material layer of part of the side walls of the light-emitting epitaxial laminated layers of the adjacent light emitting units. 
         [0066]    All references referred to in the present disclosure are incorporated by reference in their entirety. Although specific embodiments have been described above in detail, the description is merely for purposes of illustration. It should be appreciated, therefore, that many aspects described above are not intended as required or essential elements unless explicitly stated otherwise. Various modifications of, and equivalent acts corresponding to, the disclosed aspects of the exemplary embodiments, in addition to those described above, can be made by a person of ordinary skill in the art, having the benefit of the present disclosure, without departing from the spirit and scope of the disclosure defined in the following claims, the scope of which is to be accorded the broadest interpretation so as to encompass such modifications and equivalent structures.