Abstract:
A noise injection system adds comfort noise to an audio signal. The system includes a background noise estimator that determines a spectral content of a background noise associated with the audio signal. A comfort noise generator generates a comfort noise signal having a random phase. A gain circuit adjusts the comfort noise signal based on the spectral content of the background noise. A combining circuit combines a gain-adjusted comfort noise signal and the audio signal to generate an output signal.

Description:
PRIORITY CLAIM 
       [0001]    This application is a Continuation of U.S. patent application Ser. No. 11/930,968 filed on Oct. 31, 2007, now U.S. Pat. No. 8,139,777 issued on Mar. 20, 2012. 
     
    
     BACKGROUND 
       [0002]    1. Technical Field 
         [0003]    This disclosure relates to communications systems. In particular, this disclosure relates to the injection of comfort noise in an audio communication system. 
         [0004]    2. Related Art 
         [0005]    Communication systems may inject noise into an audio signal. The noise (“comfort noise”) may improve the audio quality. The noise may provide a user in a telecommunication system with an indication that a connection is intact. A mismatch between the injected comfort noise and the background noise of the audio signal may result in a perceptible audio artifact when the signal is heard. 
         [0006]    The mismatch between the comfort noise and the background noise in the audio signal may cause gating, which may manifest as a varying magnitude of background noise in the audio output signal. Gating may adversely affect the quality and intelligibility of the audio output signal. Gating may cause listener fatigue, and may degrade the performance of automatic speech recognition (ASR) systems. 
       SUMMARY 
       [0007]    A noise injection system adds comfort noise to an audio signal. The system includes a background noise estimator to determine a spectral content of a background noise associated with the audio signal. A comfort noise generator generates a comfort noise signal having a randomized phase. A gain circuit generates a gain value for adjusting the comfort noise signal based on the determined spectral content of the background noise, and generates a gain-adjusted comfort noise signal. A combining circuit combines the gain-adjusted comfort noise signal and the audio signal to generate an output signal. 
         [0008]    Other systems, methods, features, and advantages will be, or will become, apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the following claims. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0009]    The system may be better understood with reference to the following drawings and description. The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. Moreover, in the figures, like-referenced numerals designate corresponding parts throughout the different views. 
           [0010]      FIG. 1  is a noise injection system. 
           [0011]      FIG. 2  is a conversion circuit. 
           [0012]      FIG. 3  is a processing circuit. 
           [0013]      FIG. 4  is a synthesis circuit. 
           [0014]      FIG. 5  is a noise generation circuit. 
           [0015]      FIG. 6  is a gain circuit. 
           [0016]      FIG. 7  is a gain compensation process. 
           [0017]      FIG. 8  is an output signal without noise injection gain compensation. 
           [0018]      FIG. 9  is an output signal with noise injection gain compensation. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0019]    Hands-free systems, communication devices, and wireless telephones in vehicles or enclosures may be susceptible to noise. The spatial, linear, and non-linear properties of noise may degrade speech quality and cause listener fatigue. A speech enhancement system may improve speech quality by generating a steady soothing noise, referred to as “comfort noise.” 
         [0020]    Communication systems, especially wireless communication systems, may suffer bandwidth limitations. To reduce bandwidth requirements, digital communication systems, such as wireless or mobile telephone systems, may transmit speech signals and eliminate the background noise signals. This may create in a very quiet communication link between the calling party and the receiving party. The communication system at the receiving side may inject a comfort noise to reassure a user that the connection between the parties is intact. The comfort noise may provide the user with a “smooth” sounding background. 
         [0021]      FIG. 1  is a noise injection system  100 . The noise injection system  100  may include a conversion circuit  120 , which may receive an input signal  122 . The conversion circuit  120  may transform the input signal  122  from the time domain to the frequency domain. The conversion circuit  120  may be an analysis circuit or analysis stage. A processing circuit  130  may process the input signal  122  in the frequency domain and may inject a comfort noise signal  136 . A synthesis circuit  150  may receive the processed signal and transform it from the frequency domain to the time domain, to generate an output signal  160 . 
         [0022]      FIG. 2  is the conversion circuit  120 . An analog-to-digital converter  210  may convert the input signal  122 , such as a time-domain speech signal, into digital format. A digital signal processor  220  (DSP) may process the digitized input signal  122  as a plurality of digitized samples. The DSP  220  may process the digitized samples in a block format. For example, the digitized samples may be processed in blocks of 256 digitized samples, where each block may overlap a previous block by a predetermined number of samples. Consecutive blocks may overlap by about a one-half block length, or by about 128 samples. The block overlap or frame shift, may be equal to about 50%. The amount of overlap between blocks and the number of samples per block may vary, and may depend on system requirements. The quality of the output signal may be increased if the frame shift is reduced, but at the cost of computational load. 
         [0023]    A window/filter circuit  230  may process a block of data using a window function. Windows used in processing may include a rectangular window, a triangular window, a Hanning window, a Hamming window, or a Blackman window. Other types of windows may be used depending upon system criteria, such as pass-band, side-lobe attenuation, and other windows. The window/filter circuit  230  may apply a polyphase filter or other filter. Application of window functions and/or filters may improve frequency resolution. The window/filter circuit  230  may be an analysis window circuit, analysis window processing or analysis filtering. 
         [0024]    An analysis filter circuit  250  may extract spectral components of the data. The analysis filter circuit  250  may be part of the DSP  220 , or it may be separate from the DSP  220 . The DSP  220  and/or the analysis filter circuit  250  may include one or more Fast Fourier Transform (FFT) circuits  252 , or it may include one or more linear prediction analysis filters. The FFT circuit  252  may convert the data from the time domain to the frequency domain. The linear prediction filter coefficients may be adapted using a normalized least mean squares process or other adaptive filtering processes, such as recursive least squares or proportional least mean squares. 
         [0025]    The digital signal processor  220  may execute instructions that delay an input signal one or more additional times, or perform pre-processing, such as noise reduction, energy tracking, or may attenuate or boost an amplitude of a signal. The digital signal processor  220  may be discrete logic or circuitry, a mix of discrete logic and a processor, or comprise multiple processors or software programs. 
         [0026]      FIG. 3  is the processing circuit  130 . A sub-processing circuit  330  may receive frequency domain data  332  from the conversion circuit  120 . The sub-processing circuit  330  may perform additional processing, such as noise reduction, echo-cancellation, and signal reinforcement. Other signal processing may be performed. A noise generation circuit  340  may generate the comfort noise signal  136 , which may have a semi-stable power spectral density. A combining circuit  350  may combine the comfort noise signal  136  with frequency domain processed data  360  to generate processed data  362 . The processing circuit  130  may provide processed data  362  to the synthesis circuit  150 . 
         [0027]    Noise injection or comfort noise generation may be based on random number generation using a random number generator. The comfort noise may be a form of a random noise. While the power spectral density of the random noise may be matched to the noise estimation, phase matching may be difficult. Therefore, the phase of the injected noise may be randomized. However, when injected noise with a random phase is converted from the frequency domain to the time domain, it may not have the same magnitude as the noise that was passed through the system. The noise estimate may correspond to the noise of the input signal after it is processed by the analysis filters  230 . 
         [0028]    The difference in magnitude between the injected noise and the pass through noise may generate perceptible artifacts, referred to as gating. Gating may be heard as a difference in noise volume, which may annoy the user. Gating may affect the performance of automatic speech recognition systems that processes audio in the time domain. Gating may reduce the accuracy of recognition systems. 
         [0029]    Some systems may require a manual “tuning” to compensate for and correct gating. The tuning processes may be cumbersome and expensive, and may need to be performed each time a system parameter is changed. A closed processing solution that reduces or eliminates gating may eliminate the need for a manual system tuning. 
         [0030]      FIG. 4  is the synthesis circuit  150 . The synthesis circuit  150  may receive the processed data  362  (frequency domain data) from the processing circuit  130 . A synthesis filter  450  may reconstruct a time domain signal using the processed data  362 . A digital signal processor  420  (DSP) may post-process the reconstructed data. The synthesis filter circuit  450  may be part of or separate from DSP  420 . The DSP  420  and/or the synthesis filter may include one or more Inverse Fast Fourier Transform (IFFT) circuits  452 , or it may include one or more linear prediction filters. The IFFT circuit  452  may convert the processed data  362  from the frequency domain to the time domain. The linear prediction filter coefficients may be the same as the coefficients in the analysis filter  250 . 
         [0031]    A window/filter circuit  460  may process the time domain data using window functions and/or filters. Processing using window functions and filters, such as polyphase filters, may avoid discontinuities when the signal is processed in overlapping blocks. The window/filter circuit  460  may be a synthesis window circuit that performs synthesis window processing or synthesis filtering. A digital-to-analog converter  480  may convert the digital time-domain signal into analog format output data  160  for reproduction by a transducer, such as a loudspeaker or headset component. 
         [0032]      FIG. 5  is the noise generation circuit  340 . The noise generation circuit  340  may receive the processed signal from the sub-processing circuit  130 . The random noise (pseudo-random noise) or comfort noise that is injected may be a closed-form representation of the comfort noise. The random noise may be robust relative to different frame shifts, and may be robust relative to various windows and/or filter functions applied to the signal by the conversion circuit  120  and/or the synthesis circuit  150 . The noise generation circuit  340  may generate noise in the frequency domain that may match the statistical properties of the local background noise. Thus, the power spectrum of comfort noise injected may match the power spectrum of the background noise signal in the system. This may eliminate gating when the synthesis filter circuit  450  converts the signal into the time domain. 
         [0033]    A background noise estimation circuit  510  may estimate the power spectrum of the background noise, and may generate a magnitude value at the various frequencies to match the spectral shape of the background noise. A speech detection circuit  520  may provide a signal to the background noise estimation circuit  510  so that background noise may be sampled between speech segments. 
         [0034]    The speech detection circuit  520  may determine speech activity based on an average value of the input signal. The speech detection circuit  520  may measure the energy of the envelope of the input signal. When the energy of the envelope exceeds a predetermined value, for example, twice the average background level, the speech detection circuit  520  may issue a signal to the background noise estimation circuit  510  indicating the presence of speech. Accurate speech detection assumes that the energy of the speech signal is greater than the energy of the background noise signal. 
         [0035]    Because the analysis filter  250  of the conversion circuit  120  may provide complex data, a random number generator  530  may generate a random number having a real portion and an imaginary portion. A real random number generation circuit  536  may generate the real portion of the random number, while an imaginary random number generation circuit  540  may generate the imaginary portion of the random number. At each frequency or frequency bin, the real and imaginary random number generation circuits  536  and  540  may independently generate a Gaussian random number having a zero mean and a unit variance. The random numbers generated may range from about −1 to about +1. The Gaussian random numbers may correspond to the real and imaginary portions of the complex comfort noise. A summing circuit  546  may sum the real and imaginary portions. 
         [0036]    Based on the output of the background noise estimation circuit  510 , a multiplier circuit  560  may scale the magnitude of the generated noise to match the background noise level at the corresponding frequency bin. Randomizing the phase of the injected noise may eliminate the need to track the phase and encode phase information when transmitting data through the communication system. This may reduce the computational load and bandwidth requirements of the communication system. 
         [0037]    Randomizing the phase may attenuate narrow band noise, such as tonal noise, which may be present in the input signal  122 . Because some of the energy of the tonal noise signal may be preserved in the phase, reducing the amplitude of the tonal noise may not totally eliminate it. Randomizing the phase of the injected noise may further reduce the effects of tonal noise so that artifacts may not be heard in the injected comfort noise. The random number may be generated by the random number generation circuit  530  based in hardware, or may be provided by software processes, such as processes based on seed number selection. 
         [0038]    A gain circuit  570  may generate a gain factor corresponding to each frequency bin. The gain factor may compensate for the difference between the local noise and the injected comfort noise when the data is transformed back to the time domain. A multiplier circuit  580  may apply the gain factor to the signal. The gain factor may range between about 0 and about 5, where a value of 1 may represent unity gain. Other gain factors may be used. The gain factor may compensate the energy loss or increase of the injected comfort noise, because the original phase information was not tracked. Application of the gain may compensate for such loss of phase information. 
         [0039]      FIG. 6  is the gain circuit  570 . The gain circuit  570  may include a ripple compensator  610 , a mismatch compensator  620 , and a window compensator  630 . A multiplier circuit may multiply the output from the ripple compensator  610 , the mismatch compensator  620 , and the window compensator  630 , to generate the gain factor. Calculation of the gain factor “g” may be represented as a closed parameter described in Equation 1. 
         [0000]    
       
         
           
             
               
                 
                   g 
                   = 
                   
                     
                       ( 
                       
                         1 
                         
                           1 
                           + 
                           
                             σ 
                             s 
                           
                         
                       
                       ) 
                     
                      
                     
                       ( 
                       
                         
                           
                             ∑ 
                             
                               T 
                               o 
                               2 
                             
                           
                           
                             ∑ 
                             
                               
                                 ω 
                                 a 
                               
                                
                               
                                 ω 
                                 s 
                                 2 
                               
                             
                           
                         
                       
                       ) 
                     
                      
                     
                       ( 
                       
                         
                           
                             
                               
                                 ω 
                                 a 
                               
                                
                               
                                 ω 
                                 s 
                                 2 
                               
                             
                             _ 
                           
                         
                         
                           
                             
                               
                                 ω 
                                 a 
                                 2 
                               
                               _ 
                             
                           
                            
                           
                             
                               
                                 ω 
                                 s 
                                 2 
                               
                               _ 
                             
                           
                         
                       
                       ) 
                     
                   
                 
               
               
                 
                   ( 
                   
                     Eqn 
                     . 
                     
                         
                     
                      
                     1 
                   
                   ) 
                 
               
             
           
         
       
     
         [0040]    The first term may be generated by the ripple compensator  610 , the second term may be generated by the mismatch compensator  620 , and the third term may be generated by the window compensator  630 . 
         [0041]    The first term, 
         [0000]    
       
         
           
             
               ( 
               
                 1 
                 
                   1 
                   + 
                   
                     σ 
                     s 
                   
                 
               
               ) 
             
             , 
           
         
       
     
         [0000]    may compensate for an energy increase caused by ripples (varying amplitudes) in the output signal  160 . The window and filter functions applied by the conversion circuit  120  and synthesis circuit  150 , respectively, may be designed such that when the windows and/or filters are applied, a uniform energy output may be achieved using an overlap-and-add synthesis process. Introducing random phase for the injected comfort noise may affect the windowing properties. Random phase may cause ripple, which may change the energy of the output signal. A ripple compensator  610  may compensate for such ripples. 
         [0042]    The second term, 
         [0000]    
       
         
           
             
               ( 
               
                 
                   
                     ∑ 
                     
                       T 
                       o 
                       2 
                     
                   
                   
                     ∑ 
                     
                       
                         ω 
                         a 
                       
                        
                       
                         ω 
                         s 
                         2 
                       
                     
                   
                 
               
               ) 
             
             , 
           
         
       
     
         [0000]    may adjust for a mismatch between coherent and incoherent overlapping data. A time domain framed-shifted signal may be coherent with the signal in a previous frame or a subsequent frame because of the frame-to-frame overlap. Because frame buffers may overlap due to frame shift in initial processing, there may be data in common between the data blocks, thus providing the coherence. However, the injected random noise or comfort noise may no longer be coherent with respect to the previous or subsequent frame of noise due to the phase randomization. Such loss of coherence between frames may result in a loss of energy when signals are overlapped and added by the synthesis circuit  150 . The mismatch compensator  620  may compensate for this loss of energy. 
         [0043]    The third term, 
         [0000]    
       
         
           
             
               ( 
               
                 
                   
                     
                       
                         ω 
                         a 
                       
                        
                       
                         ω 
                         s 
                         2 
                       
                     
                     _ 
                   
                 
                 
                   
                     
                       
                         ω 
                         a 
                         2 
                       
                       _ 
                     
                   
                    
                   
                     
                       
                         ω 
                         s 
                         2 
                       
                       _ 
                     
                   
                 
               
               ) 
             
             , 
           
         
       
     
         [0000]    may compensate for the removal of energy caused by the mismatch of windowing functions and filters. For example, the window/filtering circuit  230  of the conversion circuit  120  may apply a first Hann window. The window/filtering circuit  460  of the synthesis circuit  150  may apply a second Hann window to the Hann-windowed signal. A combined window may be equal to two Hann windows multiplied together. When a random phase is introduced, the first window applied in the analysis circuit  120  may no longer be a Hann window, while the combined window may no longer be equal to two Hann windows multiplied together. Application of random phase for comfort noise may affect the magnitude of the combined window and thus affect the energy of a processed signal. The window compensator  630  may compensate for this energy change. 
         [0044]    Equation 1 is reproduced below: 
         [0000]    
       
         
           
             
               
                 
                   g 
                   = 
                   
                     
                       ( 
                       
                         1 
                         
                           1 
                           + 
                           
                             σ 
                             s 
                           
                         
                       
                       ) 
                     
                      
                     
                       ( 
                       
                         
                           
                             ∑ 
                             
                               T 
                               o 
                               2 
                             
                           
                           
                             ∑ 
                             
                               
                                 ω 
                                 a 
                               
                                
                               
                                 ω 
                                 s 
                                 2 
                               
                             
                           
                         
                       
                       ) 
                     
                      
                     
                       ( 
                       
                         
                           
                             
                               
                                 ω 
                                 a 
                               
                                
                               
                                 ω 
                                 s 
                                 2 
                               
                             
                             _ 
                           
                         
                         
                           
                             
                               
                                 ω 
                                 a 
                                 2 
                               
                               _ 
                             
                           
                            
                           
                             
                               
                                 ω 
                                 s 
                                 2 
                               
                               _ 
                             
                           
                         
                       
                       ) 
                     
                   
                 
               
               
                 
                   ( 
                   
                     Eqn 
                     . 
                     
                         
                     
                      
                     1 
                   
                   ) 
                 
               
             
           
         
       
     
         [0045]    The terms Ω a  and Ω s  may correspond to the analysis and synthesis window or prototype filters, respectively. 
         [0046]    The value of the root-mean-squares (RMS) of the synthesis and analysis window or prototype filter may be given by Equation 2, as follows: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       
                         ω 
                         s 
                         2 
                       
                       _ 
                     
                   
                   = 
                   
                     
                       
                         
                           
                             
                               ∑ 
                               
                                 i 
                                 = 
                                 0 
                               
                               N 
                             
                              
                             
                               
                                 
                                   c 
                                   s 
                                 
                                  
                                 
                                   ( 
                                   i 
                                   ) 
                                 
                               
                               2 
                             
                           
                           N 
                         
                       
                        
                       
                           
                       
                        
                       and 
                        
                       
                           
                       
                        
                       
                         
                           
                             ω 
                             a 
                             2 
                           
                           _ 
                         
                       
                     
                     = 
                     
                       
                         
                           
                             ∑ 
                             
                               i 
                               = 
                               0 
                             
                             N 
                           
                            
                           
                             
                               
                                 c 
                                 a 
                               
                                
                               
                                 ( 
                                 i 
                                 ) 
                               
                             
                             2 
                           
                         
                         N 
                       
                     
                   
                 
               
               
                 
                   ( 
                   
                     Eqn 
                     . 
                     
                         
                     
                      
                     2 
                   
                   ) 
                 
               
             
           
         
       
     
         [0047]    The terms c a  and c s  may be the coefficients of the analysis and synthesis windows or prototype filter respectively, where N is the window or prototype filter length. 
         [0048]    Equation 3 below may represent the summation of the analysis and synthesis windowing or prototype filter coefficients multiplied together by a multiplier circuit  640 . 
         [0000]    
       
         
           
             
               
                 
                   
                     ∑ 
                     
                       
                         ω 
                         a 
                       
                        
                       
                         ω 
                         s 
                         2 
                       
                     
                   
                   = 
                   
                     
                       ∑ 
                       
                         i 
                         = 
                         1 
                       
                       N 
                     
                      
                     
                       
                         ( 
                         
                           
                             
                               c 
                               a 
                             
                              
                             
                               ( 
                               i 
                               ) 
                             
                           
                            
                           
                             
                               c 
                               s 
                             
                              
                             
                               ( 
                               i 
                               ) 
                             
                           
                         
                         ) 
                       
                       2 
                     
                   
                 
               
               
                 
                   ( 
                   
                     Eqn 
                     . 
                     
                         
                     
                      
                     3 
                   
                   ) 
                 
               
             
           
         
       
     
         [0049]    The value of N may be the length of the filters. If the analysis filters have a different length than the synthesis filters, the smaller of the two values may be used, and the larger filter may be down-sampled to be about equal in length. 
         [0050]    Equation 4 may represent the root-mean-square of the analysis and synthesis windowing or prototype filter coefficients multiplied together: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       
                         
                           
                             ω 
                             a 
                           
                            
                           
                             ω 
                             s 
                             2 
                           
                         
                         _ 
                       
                     
                     = 
                     
                       
                         
                           
                             ∑ 
                             
                               i 
                               = 
                               0 
                             
                             N 
                           
                            
                           
                             
                               ( 
                               
                                 
                                   
                                     c 
                                     a 
                                   
                                    
                                   
                                     ( 
                                     i 
                                     ) 
                                   
                                 
                                 · 
                                 
                                   
                                     c 
                                     s 
                                   
                                    
                                   
                                     ( 
                                     i 
                                     ) 
                                   
                                 
                               
                               ) 
                             
                             2 
                           
                         
                         N 
                       
                     
                   
                   , 
                 
               
               
                 
                   ( 
                   
                     Eqn 
                     . 
                     
                         
                     
                      
                     4 
                   
                   ) 
                 
               
             
           
         
       
     
         [0051]    The term σ s  may be the standard deviation of the synthesis filter based on an overlapped and added synthesis filter over the length of the frame shift of the system, as shown by Equation 5. 
         [0000]    
       
         
           
             
               
                 
                   
                     σ 
                     s 
                   
                   = 
                   
                     
                       
                         1 
                         FS 
                       
                        
                       
                         
                           ∑ 
                           
                             i 
                             = 
                             1 
                           
                           FS 
                         
                          
                         
                           
                             ( 
                             
                               
                                 
                                   T 
                                   s 
                                 
                                  
                                 
                                   ( 
                                   i 
                                   ) 
                                 
                               
                               - 
                               
                                 
                                   T 
                                   s 
                                 
                                 _ 
                               
                             
                             ) 
                           
                           2 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   
                     Eqn 
                     . 
                     
                         
                     
                      
                     5 
                   
                   ) 
                 
               
             
           
         
       
       
         
           
             where FS=frameshift, and T s  is given by Equation 6, as follows: 
           
         
       
     
         [0000]    
       
         
           
             
               
                 
                   
                     
                       T 
                       s 
                     
                      
                     
                       ( 
                       i 
                       ) 
                     
                   
                   = 
                   
                     
                       ∑ 
                       
                         j 
                         = 
                         1 
                       
                       M 
                     
                      
                     
                       
                         c 
                         s 
                       
                        
                       
                         ( 
                         
                           i 
                           + 
                           
                             
                               ( 
                               
                                 j 
                                 - 
                                 1 
                               
                               ) 
                             
                              
                             N 
                           
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   
                     Eqn 
                     . 
                     
                         
                     
                      
                     6 
                   
                   ) 
                 
               
             
           
         
       
       
         
           
             where 
           
         
       
     
         [0000]    
       
         
           
             M 
             = 
             
               ⌊ 
               
                 
                   length 
                    
                   
                     ( 
                     
                       F 
                        
                       
                           
                       
                        
                       F 
                        
                       
                           
                       
                        
                       T 
                     
                     ) 
                   
                 
                 frameshift 
               
               ⌋ 
             
           
         
       
     
         [0000]    and  T s    is the mean of T s (i). 
         [0054]    The value of T o  may be given by Equation 7, as follows: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       T 
                       o 
                     
                      
                     
                       ( 
                       i 
                       ) 
                     
                   
                   = 
                   
                     
                       ∑ 
                       
                         j 
                         = 
                         1 
                       
                       M 
                     
                      
                     
                       
                         
                           c 
                           a 
                         
                          
                         
                           ( 
                           
                             i 
                             + 
                             
                               
                                 ( 
                                 
                                   j 
                                   - 
                                   1 
                                 
                                 ) 
                               
                                
                               N 
                             
                           
                           ) 
                         
                       
                        
                       
                         
                           c 
                           s 
                         
                          
                         
                           ( 
                           
                             i 
                             + 
                             
                               
                                 ( 
                                 
                                   j 
                                   - 
                                   1 
                                 
                                 ) 
                               
                                
                               N 
                             
                           
                           ) 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   
                     Eqn 
                     . 
                     
                         
                     
                      
                     7 
                   
                   ) 
                 
               
             
           
         
       
       
         
           
             where 
           
         
       
     
         [0000]    
       
         
           
             M 
             = 
             
               ⌊ 
               
                 
                   length 
                    
                   
                     ( 
                     
                       F 
                        
                       
                           
                       
                        
                       F 
                        
                       
                           
                       
                        
                       T 
                     
                     ) 
                   
                 
                 frameshift 
               
               ⌋ 
             
           
         
       
     
         [0056]      FIG. 7  is a process  700  for injecting noise. Window and filter functions may be applied to the time domain signal (Act  710 ). A time domain signal may be converted to the frequency domain (Act  720 ). Processing, such as noise reduction and echo-cancellation may be performed in the frequency domain (Act  730 ). A noise signal or comfort noise may be injected (Act  738 ). Noise injection may include estimating a background noise level (Act  740 ) and generating a complex random number to randomize the phase of the signal (Act  750 ). A gain factor may be applied, which may include compensating for ripple (Act  760 ), compensating for coherency mismatch due to overlapping windows (Act  770 ), and compensating for window energy loss due to window functions and filtering (Act  780 ). Next, the signal may be converted from the frequency domain back to the time domain (Act  784 ). Window and filter functions may be applied to the time domain signal (Act  788 ). The signal may be converted to analog format and output to a subsequent stage (Act  790 ). 
         [0057]      FIG. 8  is an output signal  800  of the noise injection system  100  when white noise is input to the system. The upper panel may represent the output signal corresponding to 5 seconds of data, with comfort noise injected without gain compensation every other 300 milliseconds. The X-axis may represent time in seconds, while the Y-axis may represent signal amplitude. The lower panel may represent the power level corresponding to the signal of the upper panel. The injected comfort noise may not be gain compensated. The signal may have a randomized phase with no compensation for the background noise spectral shape. Thus, the signal may exhibit gating, which may be indicated by the variation  810  in amplitude of the signal and the corresponding variation in power  820 . 
         [0058]      FIG. 9  is an output signal  900  of the noise injection system  100  when white noise is input to the system. The upper panel may represent the output signal corresponding to 5 seconds of data, with comfort noise injected having gain compensation every other 300 milliseconds. The X-axis may represent time in seconds, while the Y-axis may represent signal amplitude. The lower panel represents the power level corresponding to the signal of the upper panel. The injected comfort noise may have a randomized phase, which may be spectrally adjusted based on background noise spectral shape. The injected comfort noise may be gain compensated. Thus, gating may be minimized or eliminated, which may be indicated by the lack of variation in amplitude of signal  910  and the corresponding lack of variation in power  920 . Smooth random fluctuations in the signal may be indicated. 
         [0059]    The logic may be represented in (e.g., stored on or in) a computer-readable medium, machine-readable medium, propagated-signal medium, and/or signal-bearing medium. The media may comprise any device that contains, stores, communicates, propagates, or transports executable instructions for use by or in connection with an instruction executable system, apparatus, or device. The machine-readable medium may selectively be, but is not limited to, an electronic, magnetic, optical, electromagnetic, or infrared signal or a semiconductor system, apparatus, device, or propagation medium. A non-exhaustive list of examples of a machine-readable medium includes: a magnetic or optical disk, a volatile memory such as a Random Access Memory “RAM,” a Read-Only Memory “ROM,” an Erasable Programmable Read-Only Memory (i.e., EPROM) or Flash memory, or an optical fiber. A machine-readable medium may also include a tangible medium upon which executable instructions are printed, as the logic may be electronically stored as an image or in another format (e.g., through an optical scan), then compiled, and/or interpreted or otherwise processed. The processed medium may then be stored in a computer and/or machine memory. 
         [0060]    The systems may include additional or different logic and may be implemented in many different ways. A controller may be implemented as a microprocessor, microcontroller, application specific integrated circuit (ASIC), discrete logic, or a combination of other types of circuits or logic. Similarly, memories may be DRAM, SRAM, Flash, or other types of memory. Parameters (e.g., conditions and thresholds) and other data structures may be separately stored and managed, may be incorporated into a single memory or database, or may be logically and physically organized in many different ways. Programs and instruction sets may be parts of a single program, separate programs, or distributed across several memories and processors. The systems may be included in a wide variety of electronic devices, including a cellular phone, a headset, a hands-free set, a speakerphone, communication interface, or an infotainment system. 
         [0061]    While various embodiments of the invention have been described, it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the invention. Accordingly, the invention is not to be restricted except in light of the attached claims and their equivalents.