Abstract:
A solder pad structure includes a first metal layer disposed on an insulation layer, wherein the first metal layer is electrically connected with an underlying interconnection circuit layer through a conductive through hole disposed in the insulation layer. A solder resist layer having an opening exposing a central portion of the first metal layer is disposed on the insulating layer. A pillar-shaped second metal layer is disposed within the opening directly on the first metal layer. A solder ball filled into the opening is in contact with the pillar-shaped second metal layer.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates generally to the field of packaging substrate. More particularly, the present invention relates to a solder pad structure provided on the chip side of a packaging substrate and fabrication method thereof, which is capable of improving solderjoint reliability of the solder ball. 
         [0003]    2. Description of the Prior Art 
         [0004]    The current trend toward lighter, thinner and smaller electronic products has driven the market to pay more attention to the flip chip packaging technology. The flip chip technology has several advantages over the conventional packaging approaches and has thus become the mainstream in the packaging and testing industry. As the high-level ball type packaging such as ball grid array (BGA) or flip chip is widely employed, the demand for the packaging substrate thereof is increased. 
         [0005]    The trace or circuit on the surface of the packaging substrate has become denser and denser. It is a major challenge to improve the stability, reliability and yield of both the product and the fabrication process, reduce the cost, and concurrently increase the trace density of the packaging substrate. 
         [0006]    As known in the art, the back end process of fabricating the packaging substrate includes solder printing on the solder pads and thermal re-flow process (to form solder balls). The aforesaid solder pads are exposed by corresponding openings, which are also referred to as solder resist openings or S/R openings, formed in the surface insulation layer, i.e., solder resist layer. 
         [0007]    As the trace density becomes denser, the dimension of the S/R opening shrinks. The amount of solder paste squeezed into the shrunk S/R opening becomes inadequate and can not contact with the solder pad at the bottom of the S/R opening. This results in defects such as falling out or contact failure of the solder ball during or after the re-flow process. The shrinkage of the S/R opening creates a test on the ability and limit of the solder paste printing process and apparatus. 
         [0008]    Practically, the aforesaid defects such as falling out or contact failure of the solder ball often occur when the S/R opening shrinks to less than 85 micrometers and it has been known that some advanced products has S/R openings with dimension of about 60 micrometers or even less. 
         [0009]    In light of the above, there is a strong need in this industry to provide an improved structure or method to solve the defects such as falling out or contact failure of the solder ball at the back end of the fabrication of the packaging substrate. 
       SUMMARY OF THE INVENTION 
       [0010]    It is one object of the present invention to provide an improved solder pad structure in order to solve the above-mentioned problems. 
         [0011]    According to the claimed invention, a solder pad structure is provided. The solder pad structure includes a packaging substrate comprising a base substrate, a plurality of additive metal wires; at least one insulating layer comprising therein at least one conductive through hole; a solder pad comprising a first metal layer on the insulating layer and filling into the conductive through hole, and a second metal layer stacked on the first metal layer, wherein the first and second metal layers constitute a bump structure; and a solder resist layer covering the insulating layer, the solder resist layer comprising at least one solder resist opening for exposing a portion of the solder pad. 
         [0012]    These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0013]      FIGS. 1-10  are schematic, cross-sectional diagrams illustrating the back end process for the fabrication of a packaging substrate in accordance with the first preferred embodiment of this invention. 
           [0014]      FIG. 11  is an enlarged view showing the solder pad of  FIG. 10 . 
           [0015]      FIGS. 12-19  are schematic, cross-sectional diagrams illustrating the process for the fabrication of a packaging substrate in accordance with the second preferred embodiment of this invention. 
           [0016]      FIGS. 20-26  are schematic, cross-sectional diagrams illustrating the process for the fabrication of a packaging substrate in accordance with the third preferred embodiment of this invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0017]    The present invention pertains to an improved back end process for fabricating packaging substrates. The back end process includes solder paste printing on solder pads and subsequent re-flow process to form solder balls that are firmly and steadily connected to the solder pads. 
         [0018]    The present invention can resolve the prior art problems of small solder resist (S/R) opening and inadequate solder paste squeezed into the S/R opening. The inadequate solder paste in the S/R opening is the root cause of ball falling out and contact failure during the re-flow process. The present invention can improve the product yield. 
         [0019]    The present invention also provides an improved solder pad structure which is capable of firmly connecting with the solder ball and prevents the prior art problems of small solder resist (S/R) opening and contact failure in the S/R opening. 
         [0020]    Please refer to  FIGS. 1-10 .  FIGS. 1-10  are schematic, cross-sectional diagrams illustrating the back end process for the fabrication of a packaging substrate in accordance with the first preferred embodiment of this invention. 
         [0021]    As shown in  FIG. 1 , a packaging substrate  1  including a base substrate  10  is provided. A plurality of metal conductors  12   a ,  12   b ,  13   a  and  13   b , and insulating layers  14   a  and  14   b  are formed on the first side  1   a  and second side  1   b  of the packaging substrate  1 . The metal conductors  12   a ,  12   b ,  13   a  and  13   b  may be formed by conventional additive methods including lithography, plating, film deposition, hole drilling, etc. The metal conductors  12   a  and  13   a  are connected through the conductive through hole  15   a , and the metal conductors  12   b  and  13   b  are connected through the conductive through hole  15   b.    
         [0022]    According to this invention, a semiconductor chip or die will be eventually mounted onto the first side  1   a  of the packaging substrate  1 . Therefore, the first side  1   a  of the packaging substrate  1  is also referred to the chip side. The second side  1   b  of the packaging substrate  1  will be eventually mounted onto an external circuit board or a printed circuit board. It is the major object of the present invention to solve the problems of ball falling out or contact failure on the first side  1   a  of the packaging substrate  1 . 
         [0023]    It is understood that the packaging substrate  1  is for illustration purpose. The present invention is not limited to the double side substrate that has additive circuits on both sides of the substrate. The present invention is applicable to single side substrate that has additive circuits on only one side of the substrate. Besides, the present invention is not limited to the substrate that has multiple layers of additive circuits. The present invention is applicable to substrate that has single layer of additive circuit. 
         [0024]    The insulating layers  14   a  and  14   b  may be composed of at least one layer or multiple layers of epoxy such as Ajinomoto Build-up Film (ABF), BT, and polyimide, or any other suitable thermosetting insulating materials. The through holes  16   a  and  16   b  are formed in the insulating layers  14   a  and  14   b , respectively, by conventional drilling methods such as laser drilling methods. The through holes  16   a  and  16   b  expose portions of the underlying metal conductors  13   a  and  13   b  respectively. Solder pads will be formed directly above the through holes  16   a  and  16   b.    
         [0025]    Next, a first dry film lamination process is performed to cover the first side  1   a  and second side  1   b  of the packaging substrate  1  with a photoresist dry film  18   a  and a photoresist dry film  18   b  respectively. The photoresist dry film  18   a  and the photoresist dry film  18   b  are laminated on the insulating layer  14   a  and the insulating layer  14   b  respectively. Prior to the lamination of the photoresist dry films  18   a  and  18   b , a blanket conductive layer such as chemical copper layer (not shown) may be deposited on the insulating layer  14   a  and the insulating layer  14   b.    
         [0026]    As shown in  FIG. 2 , an exposure and development process is carried out to form openings  20   a  and  20   b  in the photoresist dry films  18   a  and  18   b , respectively. The opening  20   a  exposes the through hole  16   a  and the opening  20   b  exposes the through hole  16   b . It is understood that the position of the conductive through holes are merely for illustration purpose, that is, the real conductive through hole is not necessary situated directly under the solder pad. In some cases, there is no conductive through hole directly under the solder pad. 
         [0027]    As shown in  FIG. 3 , an electroplating process is carried out to fill the openings  20   a  and  20   b  and the exposed through holes  16   a  and  16   b  with first metal layers  22   a  and  22   b . The first metal layers  22   a  and  22   b  may be copper, tin, silver, lead, gold, nickel or alloys thereof, preferably copper. Thereafter, a pre-clean process is performed to wash the surfaces of the plated packaging substrate  1  with water. After drying, the packaging substrate  1  is transferred to a clean room and is subjected to second time dry film lamination process. It is noted that at this phase the photoresist dry films  18   a  and  18   b  are still on the packaging substrate  1 . 
         [0028]    As shown in  FIG. 4 , subsequently, a second dry film lamination process is performed to cover the first side  1   a  and the second side  1   b  of the packaging substrate  1  with a photoresist dry films  28   a  and  28   b  respectively. The photoresist dry films  28   a  and  28   b  are directly laminated on the photoresist dry films  18   a  and  18   b  and on the first metal layers  22   a  and  22   b , respectively. 
         [0029]    As shown in  FIG. 5 , a second exposure and development process is carried out to form openings  30   a  merely in the photoresist dry film  28   a . The openings  30   a  is directly above the first metal layer  22   a  and exposes portions of the first metal layer  22   a . It is noteworthy that the photoresist dry film  28   b  on the second side  1   b  of the packaging substrate  1  is deliberately not subjected to the exposure and development process. 
         [0030]    As shown in  FIG. 6 , another electroplating process is performed to fill the openings  30   a  with a second metal layer  32   a,  for example, copper, tin, silver, lead, gold, chrome or nickel, preferably copper. The second metal layer  32   a  is in direct contact with the first metal layer  22   a  to form a bump structure on the top surface of the first metal layer  22   a . According to the preferred embodiment of this invention, the second metal layer  32   a  has a thickness of about 15 micrometers to 20 micrometers. 
         [0031]    As shown in  FIG. 7 , after the electroplating of the second metal layer  32   a , the photoresist dry films  28   a  and  28   b  and the photoresist dry films  18   a  and  18   b  are stripped off concurrently. At this point, the solder pad  42   a  consisting of the first metal layer  22   a  and the second metal layer  32   a  is formed on the first side  1   a  of the packaging substrate  1 . The solder pad  42   b  on the second side  1   b  of the packaging substrate  1  only consists of the first metal layer  22   b . After stripping the photoresist dry films, several post treatment steps are carried out, for example, ABF post bake, palladium removal and copper surface roughing. 
         [0032]    As shown in  FIG. 8 , a solder resist coating process is performed to coat solder resist layers  50   a  and  50   b  on the first side  1   a  and second side  1   b  of the packaging substrate  1 . The solder resist layer  50   a  covers the first metal layer  22   a  and the second metal layer  32   a  of the solder pad  42   a . The solder resist layer  50   b  covers the solder pad  42   b . The solder resist layers  50   a  and  50   b  are composed of photosensitive materials. 
         [0033]    As shown in  FIG. 9 , the solder resist layers  50   a  and  50   b  are subjected to an exposure and development process to form S/R openings  60   a  and  60   b  in the solder resist layers  50   a  and  50   b  respectively. The S/R opening  60   a  is directly above the solder pad  42   a  and exposes the second metal layer  32   a  and a portion of the metal layer  22   a . The S/R opening  60   b  exposes a portion of the solder pad  42   b . The remaining treatment includes de-smear and final surface treatment. 
         [0034]    The aforesaid final surface treatment may include deposition of material layer  62  such as chemical nickel gold, nickel silver, tin, silver or organic solder preservative (OSP) on the solder pad  42   a  or solder pad  42   b.    
         [0035]    As shown in  FIG. 10 , a solder printing process and re-flow process are then carried out to form solder ball  65  on the solder pad  42   a  on the first side  1   a  of the packaging substrate  1 . 
         [0036]    The present invention features that the solder pad  42   a  can wedge and firmly stick to the overlying solder ball  65  such that the solder ball  65  does not fall out during the re-flow process. The contact area between the solder paste squeezed into the S/R opening  60   a  and the solder pad  42   a  is increased due to that the solder pad  42   a  has an upwardly protruding bump structure, i.e., the second metal layer  32   a.    
         [0037]      FIG. 11  is an enlarged view showing the solder pad  42   a  of  FIG. 10  (indicated by the dashed line  100 ). As shown in  FIG. 11 , structurally, the solder pad  42   a  includes a first metal layer  22   a  that is electroplated concurrently with the underlying conductive through hole  23   a . The first metal layer  22   a  is electrically connected to the metal conductor  13   a  through the conductive through hole  23   a . The pillar-shaped second metal layer  32   a  is laminated on the center area of the first metal layer  22   a  to form a central bump structure. Depending on the customer&#39;s requirements, some conductive through holes directly under the solder pads may be omitted. 
         [0038]    The first metal layer  22   a  is inlaid in the solder resist layer  50   a  and the vertical sidewalls of the first metal layer  22   a  is covered by the solder resist layer  50   a . The second metal layer  32   a  and a portion of the top surface of the first metal layer  22   a  is exposed by the S/R opening  60   a  in the solder resist layer  50   a . The S/R opening  60   a  is filled with the solder ball  65 . According to the preferred embodiment of this invention, the second metal layer  32   a  has a width that is about ⅓ to ¼ of the diameter of the S/R opening  60   a . A smaller second metal layer  32   a  can prevent misalignment during the exposure of the solder resist layer  50   a  and also the resist residual problem. According to the preferred embodiment of this invention, the S/R opening  60   a  has a depth d of about 15-35 micrometers, preferably 20-30 micrometers, and a diameter w of about 10-85 micrometers, preferably 20-70 micrometers. The second metal layer  32   a  has a thickness of about 10-30 micrometers, preferably 15-20 micrometers. 
         [0039]      FIGS. 12-19  are schematic, cross-sectional diagrams illustrating the process for the fabrication of a packaging substrate in accordance with the second preferred embodiment of this invention. As shown in  FIG. 12 , a packaging substrate  1  including a base substrate  10  is provided. Likewise, a plurality of metal conductors  12   a ,  12   b ,  13   a  and  13   b , and insulating layers  14   a  and  14   b  are formed on the first side  1   a  and second side  1   b  of the packaging substrate  1 . The metal conductors  12   a ,  12   b ,  13   a  and  13   b  may be formed by conventional additive methods including lithography, plating, film deposition, hole drilling, etc. The metal conductors  12   a  and  13   a  are connected through the conductive through hole  15   a , and the metal conductors  12   b  and  13   b  are connected through the conductive through hole  15   b.    
         [0040]    The insulating layers  14   a  and  14   b  may be composed of at least one layer or multiple layers of Ajinomoto Build-up Film (ABF), BT, polyimide, or any other suitable thermosetting insulating materials. The through holes  16   a  and  16   b  are formed in the insulating layers  14   a  and  14   b , respectively, by conventional drilling methods such as laser drilling methods. The through holes  16   a  and  16   b  expose portions of the underlying metal conductors  13   a  and  13   b  respectively. Solder pads will be formed directly above the through holes  16   a  and  16   b.    
         [0041]    Next, a first dry film lamination process is performed to cover the first side  1   a  and second side  1   b  of the packaging substrate  1  with a photoresist dry film  18   a  and a photoresist dry film  18   b  respectively. The photoresist dry film  18   a  and the photoresist dry film  18   b  are laminated on the insulating layer  14   a  and the insulating layer  14   b  respectively. Prior to the lamination of the photoresist dry films  18   a  and  18   b , a blanket conductive layer such as chemical copper layer (not shown) may be deposited on the insulating layer  14   a  and the insulating layer  14   b . An exposure and development process is carried out to form openings  20   a  and  20   b  in the photoresist dry films  18   a  and  18   b , respectively. The opening  20   a  exposes the through hole  16   a  and the opening  20   b  exposes the through hole  16   b.    
         [0042]    As shown in  FIG. 13 , an electroplating process is carried out to fill the openings  20   a  and  20   b  and the exposed through holes  16   a  and  16   b  with first metal layers  22   a  and  22   b . The first metal layers  22   a  and  22   b  may be copper, tin, silver, lead, gold, nickel or alloys thereof, preferably copper. 
         [0043]    As shown in  FIG. 14 , a second dry film lamination process is performed to cover the first side  1   a  and second side  1   b  of the packaging substrate  1  with a photoresist dry film  28   a  and a photoresist dry film  28   b  respectively. The photoresist dry film  28   a  and the photoresist dry film  28   b  are laminated on the photoresist dry films  18   a  and  18   b  and the first metal layer  22   a  and  22   b  respectively. 
         [0044]    As shown in  FIG. 15 , the photoresist dry films  18   a  and  28   a  are subjected to a laser drilling process. Using the laser with pre-selected laser energy and wavelength, openings  130   a  are formed in the photoresist dry films  18   a  and  28   a . The opening  130   a  is directly above the first metal layer  22   a  and exposes the top surface  122   a  and sidewall  122   b  of the first metal layer  22   a.    
         [0045]    The photoresist dry film  28   a  on the second side  1   b  of the packaging substrate  1  is intact and is not removed by the laser. According to the second preferred embodiment, the opening  130   a  defines the position and pattern of the solder pad that will be formed in the subsequent processes. One of the advantages of the second preferred embodiment is that one photo mask and lithographic process can be omitted. 
         [0046]    As shown in  FIG. 16 , another electroplating process is performed to fill the openings  130   a  with a second metal layer  32   a , for example, copper, tin, silver, lead, gold or nickel, preferably copper. The second metal layer  32   a  is in direct contact with the first metal layer  22   a  and covers the top surface  122   a  and sidewall  122   b  of the first metal layer  22   a , thereby forming a solder bump pad  142   a.    
         [0047]    As shown in  FIG. 17 , after the electroplating of the second metal layer  32   a , the photoresist dry films  28   a  and  28   b  and the photoresist dry films  18   a  and  18   b  are stripped off concurrently. At this point, the solder bump pad  142   a  consisting of the first metal layer  22   a  and the second metal layer  32   a  is formed on the first side  1   a  of the packaging substrate  1 . The solder pad  142   b  on the second side  1   b  of the packaging substrate  1  only consists of the first metal layer  22   b . After stripping the photoresist dry films, several post treatment steps are carried out, for example, ABF post bake, palladium removal and copper surface roughing. 
         [0048]    As shown in  FIG. 18 , a solder resist coating process is performed to coat solder resist layers  50   a  and  50   b  on the first side  1  a and second side  1   b  of the packaging substrate  1 . The solder resist layers  50   a  and  50   b  are composed of photosensitive materials. 
         [0049]    The solder resist layers  50   a  and  50   b  are subjected to an exposure and development process to form S/R openings  60   a  and  60   b  in the solder resist layers  50   a  and  50   b  respectively. The S/R opening  60   a  is directly above the solder bump pad  142   a  and exposes a portion of the second metal layer  32   a . The S/R opening  60   b  exposes a portion of the solder pad  142   b . The remaining treatment includes de-smear and final surface treatment such as surface metal plating process. 
         [0050]    The remaining treatment includes de-smear and final surface treatment such as surface metal plating process. The aforesaid final surface treatment may include deposition of material layer  62  such as chemical nickel gold, nickel silver, tin, silver or organic solder preservative (OSP) on the solder bump pad  142   a  or solder pad  142   b.    
         [0051]    As shown in  FIG. 19 , a solder printing process and re-flow process are then carried out to form solder ball  65  on the solder bump pad  142   a  on the first side  1   a  of the packaging substrate  1 . 
         [0052]      FIGS. 20-26  are schematic, cross-sectional diagrams illustrating the process for the fabrication of a packaging substrate in accordance with the third preferred embodiment of this invention. As shown in  FIG. 20 , a packaging substrate  1  including a base substrate  10  is provided. Likewise, a plurality of metal conductors  12   a ,  12   b ,  13   a  and  13   b , and insulating layers  14   a  and  14   b  are formed on the first side  1   a  and second side  1   b  of the packaging substrate  1 . The metal conductors  12   a ,  12   b ,  13   a  and  13   b  may be formed by conventional additive methods including lithography, plating, film deposition, hole drilling, etc. The metal conductors  12   a  and  13   a  are connected through the conductive through hole  15   a , and the metal conductors  12   b  and  13   b  are connected through the conductive through hole  15   b.    
         [0053]    The insulating layers  14   a  and  14   b  may be composed of at least one layer or multiple layers of Ajinomoto Build-up Film (ABF), BT, polyimide, or any other suitable thermosetting insulating materials. The through holes  16   a  and  16   b  are formed in the insulating layers  14   a  and  14   b , respectively, by conventional drilling methods such as laser drilling methods. The through holes  16   a  and  16   b  expose portions of the underlying metal conductors  13   a  and  13   b  respectively. Solder pads will be formed directly above the through holes  16   a  and  16   b.    
         [0054]    Next, a first dry film lamination process is performed to cover the first side  1   a  and second side  1   b  of the packaging substrate  1  with a photoresist dry film  18   a  and a photoresist dry film  18   b  respectively. The photoresist dry film  18   a  and the photoresist dry film  18   b  are laminated on the insulating layer  14   a  and the insulating layer  14   b  respectively. 
         [0055]    Prior to the lamination of the photoresist dry films  18   a  and  18   b,  a blanket conductive layer such as chemical copper layer (not shown) may be deposited on the insulating layer  14   a  and the insulating layer  14   b.    
         [0056]    An exposure and development process is carried out to form openings  20   a  merely in the photoresist dry film  18   a . The opening  20   a  exposes the through hole  16   a . It is noteworthy that after the exposure and development process, there is no opening formed in the photoresist dry film  18   b.    
         [0057]    As shown in  FIG. 21 , an electroplating process is carried out to fill the opening  20   a  and the exposed through hole  16   a  with first metal layer  22   a . The first metal layer  22   a  may be copper, tin, silver, lead, gold, nickel or alloys thereof, preferably copper. Since the second side  1   b  is covered by the photoresist dry film  18   b , there is no metal plated thereon. 
         [0058]    As shown in  FIG. 22 , the photoresist dry films  18   a  and  28   a  are subjected to a laser drilling process. Using the laser with pre-selected laser energy and wavelength, openings  230   a  and  330   a  are formed in the photoresist dry film  18   a  and opening  230   b  is formed in the photoresist dry film  18   b . The opening  230   a  is directly above the first metal layer  22   a  and exposes the top surface  122   a  and sidewall  122   b  of the first metal layer  22   a . The openings  230   a  and  230   b  define the position and pattern of the solder pad to be formed. 
         [0059]    The opening  330   a  in the photoresist dry film  18   a  defines the third level circuit pattern on the first side  1   a  of the packaging substrate  10 . Comparing to the second preferred embodiment, the third preferred embodiment saves photoresist dry films because the solder pad pattern is defined only using one single layer of photoresist dry film on the first side  1   a.    
         [0060]    As shown in  FIG. 23 , an electroplating process is carried out to fill the openings  230   a ,  230   b  and  330   a  with metal such as copper, tin, silver, lead, gold, nickel or alloys thereof, preferably copper, thereby forming solder bump pad  142   a , solder bump pad  142   b  and wire  430   a.    
         [0061]    As shown in  FIG. 24 , the photoresist dry films  18   a  and  18   b  are stripped off. After stripping the photoresist dry films, several post treatment steps are carried out, for example, ABF post bake, palladium removal and copper surface roughing. 
         [0062]    As shown in  FIG. 25 , a solder resist coating process is performed to coat solder resist layers  50   a  and  50   b  on the first side  1   a  and second side  1   b  of the packaging substrate  1 . The solder resist layers  50   a  and  50   b  are composed of photosensitive materials. The solder resist layers  50   a  and  50   b  are subjected to an exposure and development process to form S/R openings  60   a  and  60   b  in the solder resist layers  50   a  and  50   b  respectively. 
         [0063]    The S/R opening  60   a  is directly above the solder bump pad  142   a  and exposes a portion of the solder bump pad  142   a . The S/R opening  60   b  exposes a portion of the solder pad  142   b . The wire  430   a  is covered by the solder resist layers  50   a.    
         [0064]    The remaining treatment includes de-smear and final surface treatment such as surface metal plating process. The aforesaid final surface treatment may include deposition of material layer such as chemical nickel gold, nickel silver, tin, silver or organic solder preservative (OSP) on the solder bump pad  142   a  or solder pad  142   b.    
         [0065]    As shown in  FIG. 26 , a solder printing process and re-flow process are then carried out to form solder ball  65  on the solder bump pad  142   a  on the first side  1   a  of the packaging substrate  1 . 
         [0066]    Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.