Abstract:
A variable frequency adjustable speed motor drive allows restart of a spinning induction motor by initially increasing the frequency of the associated inverter while keeping the DC voltage source thereof low, then by decreasing the frequency of the inverter while monitoring the effective motor impedance V DC  /I DC  or V AC  /I AC  until the latter jumps at an initial level indicating matching of the frequency with the motor spinning speed. Thereafter, the DC voltage is restored in magnitude and the inverter is increased in frequency to match the desired motor speed.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates to starting of an AC motor which is already coasting. This occurrence may be the result of a short power failure where the motor has a large moment of inertia. An immediate restart is desired upon return of the power so that the motor can be reaccelerated from its coasting speed up to the operative speed. 
     In contrast, conventional adjustable frequency drives are designed to start with the induction motor at rest. During acceleration, the appropriate volts-per-hertz is maintained from the low frequency and the system is slowly accelerated up to desired speed. The motor slip remains small and large motor currents do not occur. However, where the motor load has a large inertia and the motor has been suddenly stopped, it continues spinning. Therefore, a restart of the motor by turning the inverter ON, for instance where the motor stoppage was due to a short outage in the power and the latter is restored, raises a problem. When the inverter is turned ON, the actual inverter frequency and the frequency required for the motor spinning speed, will not match. Therefore, the motor has a large slip. Under the circumstance, as the inverter voltage and frequencies in the starting sequence are increasing slowly, large currents will flow and the inverter will trip. One solution has been to hold the inverter output at a low value for a period of time, and and to allow the motor and load to decelerate almost to a standstill. In many applications, though, it is desirable to be able to restart the motor as soon as possible. To do this, it is necessary to find how to match the inverter frequency with the spinning speed of the motor. This has been done with information derived from a tachometer measuring the shaft speed, hence the required starting frequency for the inverter. This solution requires the use of sensors on the motor. 
     In contrast, the present invention does not require the addition of sensors on the motor and it enables to restart the motor drive at any frequency including standstill. 
     SUMMARY OF THE INVENTION 
     Restarting of a spinning AC motor is initiated by reducing the AC voltage applied to the motor to a predetermined minimum level while bringing the frequency of the motor AC input to a predetermined high level of frequency. 
     The restarting process is performed from such initial conditions by reducing progressively the frequency of the motor AC input until it matches the motor spinning speed. The motor is, thereafter, brought back to operative speed from such matching speed under a restored voltage on the AC input of the motor. Matching of the AC motor input frequency with the spinning speed is detected by measuring the voltage to current ratio ahead of the motor as a characteristic of the motor slip. 
     In a motor drive including AC/DC converter, DC-link and an inverter, the ratio V DC  /I DC  in the DC link is used as an indication of the slip. In such case, while the DC-link voltage is held at a minimum in the process, the DC-link current is used as motor slip detecting signal to stop reducing the frequency and initiate speed ramping up with a restored DC link voltage. Control of the frequency of the AC motor input is effected by controlling the inverter. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a basic GTO inverter illustrating the choice of parameters in detecting when the inverter frequency is matching the motor spinning frequency, according to the present invention; 
     FIG. 2 is a block diagram illustrating the preferred embodiment of the coasting AC motor restart system according to the present invention; 
     FIG. 3 is a curve illustrating for both directions of rotation the critical magnitude of the detected signal according to the invention when AC input frequency is matching the spinning speed. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring to FIG. 1 a variable speed motor drive is illustrated comprising a converter CNV, a DC-link, an inverter INV and a motor MT. From the industrial network (L1, L2, L3) AC power is applied to a converter CNV consisting of a thyristor bridge T1-T6. The DC voltage generated on terminals (TA, TB) across a capacitor C is applied to the GTO bridge of an inverter INV including three poles connected across the DC terminals about nodes JA, JB, JC for the respective motor phases (A, B, C) which are star-connected about a neutral point O. As explained hereinafter, the present invention proposes, as control parameters in detecting the matching frequency of the inverter with the spinning speed of the motor, either measuring V DC  across capacitor C and I DC  the current in the DC link, or measuring V AC  across the phases (A, B or C) and I AC  the current flowing in any of these phases. More generally, the voltage to current ratio of the inverter in operation is measured, while the motor is spinning. 
     Referring to FIG. 2, the invention will now be described in its preferred embodiment. As in FIG. 1, the motor MT is supplied with AC power from an inverter INV responding to a DC link sustained by a converter CNV. For the purpose of disclosing a motor drive of the type shown in FIGS. 1 and 2, reference is made to: &#34;Application of Gate-Turn-OFF Thyristors in 460 V, 7S-250 HP AC Motor Drives&#34; by D. A. Paice and K. E. Mattern in IEEE 1982 IAS82 pp. 663-669. This publication is hereby incorporated by reference. Also, with regard to the description of a microprocessor-based AC motor drive control as shown in FIG. 2, reference is made to: &#34;Microprocessor-Based Control of an AC Motor Drive&#34; by C. W. Edwards in IEEE 1982 IAS82 pp. 452-456. This second publication is hereby incorporated by reference. For the purpose of disclosing a microprocessor-based start system for an induction motor drive, copending patent application Ser. No. 858,131; filed Apr. 30, 1986 and entitled &#34;Multifunction Control System for an Induction Motor Drive&#34;, is hereby incorporated by reference. 
     In FIG. 2 the derivation of a signal V 1  representative of the current I DC  drawn through the converter CNV into the DC-link, is shown through the use of a side converter CNV&#39; consisting in a bridge of rectifiers RT1-RT6 mounted across DC terminals (TA&#39;, TB&#39;). This method of deriving a signal representative of I DC  without sensing in the DC link is known. See for instance U.S. Pat. No. 3,713,012. The inverter is shown in FIG. 2 controlled by a controller via a processor PR. 
     The invention will now be described specifically by reference to FIG. 2 in the context of the afore-stated prior art. 
     The DC-link voltage V DC  is sensed from lines 15 and 16, and the I DC  DC current representative signal is derived from lines 13 and 14. A comparator CMP determines whether the ratio V DC  /I DC  has become larger than a critical level K. When this occurs, an ENABLE signal is applied by line 18 to the processor. The motor is assumed to be spinning when, following a short outage causing the inverter INV to be cut-off, power is restored and the system is to be restarted (line 17 to the controller). The problem is to find the initial frequency of the inverter which matches the spinning speed. 
     Referring to FIG. 3, the slip of the motor, is: 
     
         s=(f.sub.inv -f.sub.m)/f.sub.inv 
    
     where 
     f inv  =inverter frequency and 
     f m  =motor spinning frequency 
     It is represented varying from +v e  to -v e  when the frequency of the inverter decreases from very high to a low value and reaches the value f m . The curve of FIG. 3 shows that when f inv  goes through the value f m  the ratio |V DC  /I DC  | sharply increases to an infinite level. Accordingly, comparator CMP (FIG. 2) will easily detect the critical passage through f m  when the frequency of the inverter is varied downwardly. 
     The method according to the present invention consists in first setting the inverter to operate at the highest operating frequency. However, concurrently therewith, the DC-link voltage is much reduced, thereby reducing the AC input voltage to the motor, so as to prevent excessive current therethrough. These steps are performed by the processor, causing by line 20 a voltage regulator 6 to control by line 24 the conduction angle controller 7 of converter CNV. Lines 25 from block 7 are applied to the several thyristors T1-T6 of the converter. Retarding the firing angle of the thyristors will reduce the voltage V DC  across capacitor C of the DC link, as generally known. Processor PR causes the firing circuit FCD to ramp-up the inverter in frequency, up to a relatively high speed reference set on line 9. 
     Following the afore-stated two initial steps, processor PR causes the firing circuit FCD to ramp-down slowly the inverter in frequency. This is achieved typically at 10 Hz/s while holding at 10% the normal ratio volts-per-hertz. Concurrently, comparator CMP is monitoring the ratio V DC  /I DC . When the critical level K (FIG. 3) has been detected, the ramp-down effect on the inverter is cancelled. The processor is appraised of the fact, and by line 20 the voltage regulator is caused to restore the DC-link voltage V DC  to its normal level, while the inverter is caused to ramp-up to the assigned operative frequency. 
     In practice, once matching of the inverter frequency with the spinning motor speed has been detected, the motor having then begun to regenerate, the frequency is held constant while the DC-link voltage is being restored to normal. This is the &#34;acquire mode&#34;, which lasts about 500 ms. Also, before starting the search by deceleration from the highest frequency, the deceleration rate is initially held at only 1 Hz/s while monitoring by comparator CMP is held inoperative. This delay is just enough to allow the DC-link regulator to settle before actually beginning the search. The processor, thus, distinguishes a first and a second submode in the &#34;search mode&#34;, which is to be followed by the &#34;acquire mode&#34;. 
     The restart sequence is enabled by closing a switch on the processor board. Once the restart sequence from line 17 has been enabled, the four following basic operative modes are successively performed: 
     (1) normal mode- 
     (2) reset mode- 
     (3) search mode- 
     (4) acquire mode- 
     The reset mode involves increasing the inverter frequency to maximum with a low DC-link voltage, even zero volts, being established. 
     In the search mode the inverter frequency is preferably decelerated first at 1 Hz/s to allow settling of the DC link regulator. Then at 10 Hz/s deceleration at 10 Hz/s allows searching. 
     The acquire mode occurs when the detection has been achieved. The frequency is, then, held constant and the DC-link voltage is restored. 500 ms thereafter acceleration in the normal mode is allowed. 
     During the preset, search and acquire modes, a standby condition is flashed on the status panel, in order to warn the operator that the processor is functioning normally, thus, that the drive is not malfunctioning. The four modes are numbered zero (normal) and one through three (the latter being for the acquire mode) The variable which stores the mode number is called CM MODE. 
     There are three times associated with the respective functions. A first counter CNTR4 determines the preset time. 
     During the preset interval, the acceleration is set to 480 Hz/s (the highest possible value) for 64 main program loop periods. Since the main loop takes approximately 7 ms to execute, the preset interval will last about 450 ms. 
     A second timer CNTR5 is used to control the delay which allows the DC link voltage regulator to settle. The delay lasts 127 main program loops, thus, about 900 ms. A third timer CNTR6 is used to establish a delay of 80 main program loops, that is 450 ms for the acquire time. 
     A counter (BCNTR) is used to determine the blink rate, indicating the standby status during spinning speed search. 
     In the preferred embodiment, instead of looking for the ratio V DC  /I DC  with the comparator, since V DC  has been established at a minimum value, searching involves only monitoring discontinuity occurring when the DC-link current is going through zero. 
     It is observed that, instead of using V DC  /I DC , the search mode can be conducted with the ratio |V AC  I AC  | as the parameter. 
     It appears that the coasting motor search operation sequence according to the present invention may be performed even for a &#34;conventional&#34; start, whereby no special design is necessary to distinguish between a normal start and a coasting motor restart. 
     To summarize: The following steps are performed by the microprocessor associated with the motor drive: 
     MICROPROCESSOR 
     Actions to start into spinning motor 
     At start set V DC  to near zero 
     Set acceleration to a very high value 
     Set inverter frequency to maximum speed 
     Set inverter output to a fixed low voltage (typically 10% volts/Hz) 
     Reset acceleration to normal 
     Set deceleration to a nominal 10 Hz/second 
     Set frequency command to zero and start search 
     When DC link current goes below a user selectable value: stop search (typical 1 to 16% rated) 
     Set frequency command to present frequency 
     Have voltage to normal 
     Wait some time (typically 0.5 seconds) for transients to decay 
     Set the deceleration rate back to normal