Abstract:
A capacitance detection circuit inhibits noise. The capacitance detection circuit detects a change in capacitance between a pair of electrodes of a physical quantity sensor, with these electrodes generating the change in capacitance in response to a change in physical quantity. The capacitance detection circuit has a carrier signal generating circuit that supplies a carrier signal to one of the electrodes, an operational amplifier that has an inverting input terminal to which the other one of the electrodes is input, a dummy capacity that is connected in parallel to the pair of electrodes, and a carrier signal conditioning circuit that inverts a phase of a carrier signal supplied from the carrier signal generating circuit to the dummy capacity and adjusts a gain to inhibit the dummy capacity.

Description:
TECHNICAL FIELD 
       [0001]    The present invention relates to a capacitance detection circuit for detecting a change in capacitance between a pair of electrodes of a physical quantity sensor, with these electrodes generating the change in capacitance in response to a change in physical quantity. 
       BACKGROUND ART 
       [0002]    An acceleration sensor, a gyroscope, a displacement sensor, a pressure sensor, or other type of physical sensor for detecting a physical change as a capacitance change, is required to reduce circuit noise when a capacitance detection circuit thereof needs to have a high resolution or when a MEMS (Micro Electro Mechanical System) sensor needs to be combined with the capacitance detection circuit in order to achieve cost/size reduction. 
         [0003]    As such a capacitance detection circuit, there is known, for example, a capacitance detection circuit in which a sensor drive circuit applies drive voltage to a capacitance sensor element, a change in capacitance of the sensor element is converted into a voltage signal by a continuous-time C-V conversion circuit, a synchronous detecting circuit detects a signal component from a voltage signal obtained as a result of the conversion, and a smoothing circuit smoothes an output signal of the synchronous detecting circuit (see Patent Document 1, for example). 
         [0004]    Patent Document 1: Japanese Patent Application Publication No. 2011-107086 
         [0005]    Incidentally, the prior art described in Patent Document 1 is capable of accurately obtaining a detected output as an analog signal even when the capacitance changes continuously and slightly in response to a quantity change. When obtaining a detected output as an analog signal, the sensor drive circuit supplies sensor drive signals to a detection capacitor (capacitance Cs) and a reference capacitor (capacitance Cr), wherein the sensor drive signal is inverted in phase in order to be supplied to the reference capacitor (capacitance Cr). The sensor drive signal supplied to the detection capacitor (capacitance Cs) and the sensor drive signal supplied to the reference capacitor (capacitance Cr) are added up, and the difference therebetween is supplied to a charge amplifier. 
       SUMMARY 
       [0006]    The problem with the prior art is that the capacitance Cr of the reference capacitor needs to be conformed to the capacitance Cs of the detection capacitor, but the capacitance Cr of the reference capacitor cannot be reduced in order to reduce a noise gain. 
         [0007]    The present invention was contrived in view of the unsolved problem of the prior art, and an object of the present invention, therefore, is to provide a capacitance detection circuit that is capable of reliably reducing noise and detecting a small capacitance. 
         [0008]    In order to achieve the object described above, a first aspect of the capacitance detection circuit according to the present invention is a capacitance detection circuit for detecting a change in capacitance between a pair of electrodes of a physical quantity sensor, the pair of electrodes generating the change in capacitance in response to a change in physical quantity. This capacitance detection circuit has a carrier signal generating circuit that supplies a carrier signal to one of the electrodes, and an operational amplifier that has an inverting input terminal to which the other one of the electrodes is input. The capacitance detection circuit also has a dummy capacity connected in parallel to the pair of electrodes, and a carrier signal conditioning circuit that inverts a phase of a carrier signal supplied from the carrier signal generating circuit to the dummy capacity, and adjusts a gain to inhibit the dummy capacity. 
         [0009]    The capacitance detection circuit according to the present invention further has a demodulating circuit which is connected to an output side of the operational amplifier and to which a carrier signal of the carrier signal generating circuit is input, a low pass filter that smoothes a demodulated output of the demodulating circuit, and an A/D conversion circuit that converts a filter output of the low pass filter to a digital signal. The carrier signal conditioning circuit has an offset adjuster that adjusts a zero offset of the A/D conversion circuit. 
         [0010]    In the capacitance detection circuit according to the present invention, the dummy capacity is formed on a printed circuit board mounted with the operational amplifier. 
         [0011]    In addition, in the capacitance detection circuit according to the present invention, one terminal of the pair of the electrodes and a series circuit of the dummy capacity and carrier signal conditioning circuit are connected in parallel to an inverting input terminal of the operational amplifier, and an inverting input terminal is imaginary-shorted to the ground by connecting a non-inverting input side of the operational amplifier to the ground. 
         [0012]    According to the present invention, due to the presence of the carrier signal conditioning circuit in the capacitance detection circuit, the carrier signal conditioning circuit inverting the phase of a carrier signal supplied from the carrier signal generating circuit to the dummy capacity and adjusting a gain to control the dummy capacity, the amplification factor of the carrier signal can be increased and the dummy capacity can be reduced, reducing noise gain and inhibiting noise. 
         [0013]    Furthermore, the carrier signal conditioning circuit can adjust the zero offset of the A/D conversion circuit when the demodulating circuit demodulates the output of the operational amplifier and when the demodulated output is denoised by the low pass filter and subjected to A/D conversion. In this manner, an SN ratio of the A/D conversion circuit can be improved. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0014]      FIGS. 1A and 1B  are schematic diagrams showing an acceleration sensor to which the present invention can be applied, wherein  FIG. 1A  is a plan view and  FIG. 1B  is a cross-sectional diagram taken along the line A-A of  FIG. 1A ; 
           [0015]      FIG. 2  is a circuit diagram showing a capacitance detection circuit in an XY direction; 
           [0016]      FIG. 3  is a circuit diagram showing the capacitance detection circuit in a Z direction; 
           [0017]      FIG. 4  is a circuit diagram showing a comparative example of the capacitance detection circuit in the Z direction; 
           [0018]      FIG. 5  is a circuit diagram showing a modification of an inverting amplifier circuit of  FIG. 3 ; and 
           [0019]      FIG. 6  is a circuit diagram showing a conditioning circuit for conditioning a dummy capacity. 
       
    
    
     DETAILED DESCRIPTION 
       [0020]    An embodiment of the present invention is described hereinafter with reference to the drawings. 
         [0021]      FIGS. 1A and 1B  are schematic diagrams showing an example of an acceleration sensor to which a capacitance detection circuit according to the present invention can be applied.  FIG. 1A  is a plan view showing the acceleration sensor without an upper substrate.  FIG. 1B  is a cross-sectional diagram taken along the line A-A of  FIG. 1A . 
         [0022]    In the diagram, reference numeral  1  represents an acceleration sensor. This acceleration sensor  1  is configured by an SOI (Silicon On Insulator) substrate  2 . The SOI substrate  2  is configured by a silicon support layer  2   a  forming an underlayer of the SOI substrate  2 , an oxide silicon layer  2   b  formed on the silicon support layer  2   a , and a silicon active layer  2   c  formed on the oxide silicon layer  2   b.    
         [0023]    The silicon support layer  2   a  and the oxide silicon layer  2   b  have a weight  7 , described hereinafter, which has its outer circumferential portion formed into a square frame and its central portion dry-etched into a square groove. 
         [0024]    The silicon active layer  2   c  has at its center a square movable electrode  4  that is supported at its corners on the oxide silicon layer  2   b  by spring materials  3 , a pair of X-axis fixed electrodes  5 Xa,  5 Xb fixed to the oxide silicon layer  2   b  in such a manner as to face the two sides of the movable electrode  4  that extend in an X-direction, and a pair of Y-axis fixed electrodes  6 Ya,  6 Yb fixed to the oxide silicon layer  2   b  in such a manner as to face the two sides of the movable electrode  4  that extend in a Y-direction. On the upper surface of the movable electrode, the weight  7  is provided. 
         [0025]    Furthermore, the upper and lower sides of the SOI substrate  2  are covered with glass substrates  8   a  and  8   b  respectively. A Z-axis fixed electrode  9  is formed on the glass substrate  8   a  in such a manner as to face the movable electrode  4 . Through-holes  10  are formed in these glass substrates  8   a  and  8   b  in order to extract signals of the X-axis fixed electrodes  5 Xa,  5 Xb, the Y-axis fixed electrodes  6 Ya,  6 Yb, the movable electrode  4 , and the Z-axis fixed electrode  9  to the outside. 
         [0026]    In X direction of the acceleration sensor  1 , therefore, capacitances Cxa and Cxb between the movable electrode  4  and the pair of left and right fixed electrodes  5 Xa and  5 Xb form a differential structure having a horizontally symmetric correlation where one of the capacitances increases while the other decreases. Similarly, in the Y direction, capacitances Cya and Cyb between the movable electrode  4  and the pair of front and rear fixed electrodes  6 Ya and  6 Yb form a differential structure having a vertically symmetric correlation where one of the capacitances increases while the other decreases. 
         [0027]    In a Z direction of the acceleration sensor  1 , however, due to the presence of the weight  7  formed on a lower surface of the movable electrode  4 , an asymmetric structure is formed only by a capacitance Cz between the movable electrode and the Z-axis fixed electrode  9  facing the movable electrode  4  from above. 
         [0028]    When an acceleration is applied to the acceleration sensor  1 , the movable electrode  4  supporting the weight  7  moves in the XYZ direction in accordance with the direction of this acceleration. Consequently, the capacitances Cxa and Cxb in the X direction, the capacitances Cya and Cyb of the Y-axis direction, and the capacitance Cz in the Z-axis direction change. The acceleration applied can be measured using the changes in these capacitances. 
         [0029]    In the symmetric structures in the X-axis direction and Y-axis direction, the capacitances can be detected by a capacitance detection circuit  20  shown in  FIG. 2 . 
         [0030]    In other words, the capacitance Cxa or Cya is represented as a variable capacitance Cs 1 , and the capacitance Cxb or Cyb as a variable capacitance Cs 2 . 
         [0031]    An electrode of either the variable capacitance Cs 1  or Cs 2  is connected to a carrier signal generating circuit  21  to supply a carrier signal. A carrier signal here is an AC waveform, such as a sine wave or square wave, having a frequency higher than that of the acceleration to be measured. Such a carrier signal is required to detect a capacitance from a low frequency of or approximately 0 Hz. 
         [0032]    Capacitors C 2  and C 3  with the same capacitance are connected between an electrode of the other variable capacitance Cs 1  or Cs 2  and the ground, and a resistor R 2  is connected in parallel to the capacitor C 2 . The capacitor C 2  is provided for the purpose of swiftly charging the capacitance Cs 1  with an electric charger, and the connection of capacitor C 3  is implemented to maintain circuit balance. Generally, the capacity of the capacitor C 2  is set to be equal to the capacity of the capacitor C 3 . 
         [0033]    The connection point between the variable capacitance Cs 1  and the capacitor C 2  is connected to a non-inverting input terminal of a differential amplifier Q 21 , and the connection point between the variable capacitance Cs 2  and the capacitor C 3  is connected to an inverting input terminal of the differential amplifier Q 21 . An output terminal of the differential amplifier Q 21  is fed back to the inverting input terminal via a parallel circuit of a resistor R 1  and capacitor C 4 . In this state, the capacitor C 4  determines a gain A 1  of the differential amplifier Q 21 , the gain A 1  being expressed as follows: 
         [0000]        A 1=( Cs 1− Cs 2)/ C 4  (1).
 
         [0034]    The resistors R 1  and R 2  are used for the purpose of stabilizing a DC potential of the differential amplifier Q 21 . 
         [0035]    This differential amplifier Q 21  outputs the difference between the variable capacitances Cs 1  and Cs 2 . For instance, when an acceleration of “0” is applied to the acceleration sensor  1 , the weight  7  is displaced by 0, and consequently the variable capacitance Cs 1  becomes equal to the variable capacitance Cs 2 . As a result, the differential amplifier Q 21  outputs a zero value. 
         [0036]    When the acceleration is not “0,” the weight  7  is displaced, and consequently the variable capacitances Cs 1  and Cs 2  become unequal to each other. As a result, the difference between these variable capacitances is output from the differential amplifier Q 21 . The greater the acceleration applied to the acceleration sensor  1 , the greater the difference between the variable capacitances and therefore the greater the output from the differential amplifier Q 21 . 
         [0037]    The output from the differential amplifier Q 21  is supplied to a demodulating circuit  22  to which a carrier signal of the carrier signal generating circuit  21  has been input. The demodulating circuit  22  demodulates an output signal that is amplitude-modulated by the carrier signal obtained from the differential amplifier Q 21 . 
         [0038]    The demodulated signal that is output from the demodulating circuit  22  is denoised with a low pass filter  23 , which is then converted into a digital signal by an A/D conversion circuit  24  and output as an acceleration signal. 
         [0039]    The capacitance detection circuit  20  shown in  FIG. 2  can be applied when the variable capacitances Cs 1  and Cs 2  having the differential structures are obtained in the X-axis and Y-axis directions. However, when an acceleration in the Z-axis direction is applied, a capacitance detection circuit  30  shown in  FIG. 3  is applied in place of the above-described capacitance detection circuit  20  shown in  FIG. 2 , because the asymmetric structure is formed. 
         [0040]    In the capacitance detection circuit  30  shown in  FIG. 3 , a non-inverting input terminal of an operational amplifier Q 31  corresponding to the differential amplifier Q 21  shown in  FIG. 2  is connected to the ground, and a variable capacitance Cs between the movable electrode  4  of the acceleration sensor and the Z-axis fixed electrode  9  is connected to an inverting input terminal of the operational amplifier Q 31 . Further, the series circuit of a carrier signal conditioning circuit  31  and a dummy capacity Cd connects the dummy capacity Cd to the inverting input terminal of the operational amplifier Q 31  in parallel with the variable capacitance Cs. The dummy capacity Cd does not need to be formed in the acceleration sensor  1  and can be disposed on a printed circuit board mounted with the capacitance detection circuit  30 . 
         [0041]    Furthermore, the carrier signal generating circuit  21  similar to the capacitance detection circuit  20  shown in  FIG. 2  is connected to the other end of the variable capacitance Cs between the movable electrode  4  of the acceleration sensor  1  and the Z-axis fixed electrode  9  and to the input side of the carrier signal conditioning circuit  31 . 
         [0042]    The carrier signal conditioning circuit  31  here has an operational amplifier Q 32  which has an inverting input terminal thereof connected to the carrier signal generating circuit  21  via a resistor R 4  and a non-inverting input terminal of the same to the ground. The output side of the operational amplifier Q 32  is connected to an inverting input terminal of the operational amplifier Q 32  via a resistor R 3 , forming a negative feedback circuit. 
         [0043]    In the carrier signal conditioning circuit  31 , a non-inverting input terminal of the operational amplifier Q 32  is connected to the ground and negatively fed back. Thus, an imaginary short occurs where a differential input voltage Vs between the inverting and non-inverting input terminals of the operational amplifier Q 32  becomes approximately equal to 0. 
         [0044]    In other words, when a voltage applied to the resistor R 4  is represented as Vin, an output voltage of the operational amplifier Q 32  as Vout, and an input current input through the resistor R 4  as Ir 1 , this input current Ir 1  is expressed as follows: 
         [0000]        Ir 1≅ V in/ R 4  (2).
 
         [0045]    Because no current flows to the input terminals of the operational amplifier Q 32 , a current Ir 1  flowing to the feedback resistor R 3  is expressed as follows: 
         [0000]        Ir 2= Ir 1≅ V in/ R 4  (3).
 
         [0046]    Therefore, an inter-terminal voltage Vr 3  of the feedback resistor R 3  is expressed as follows: 
         [0000]        Vr 3= Ir 2· R 3≅( V in/ R 4) R 3  (4).
 
         [0047]    Consequently, the output voltage Vout of the operational amplifier Q 32  is expressed as follows: 
         [0000]        V out≅− Vr 3≅−( R 3/ R 4) V in  (5).
 
         [0048]    Thus, a gain A 2  of the operational amplifier Q 32  is expressed as follows: 
         [0000]        A 2= V out/ V in=− R 3/ R 4  (6).
 
         [0049]    Hence, the operational amplifier Q 32  is an inverting amplifier of the gain A 2 . 
         [0050]    As a result, the carrier signal is inverted in phase and amplified by the carrier signal conditioning circuit  31 , and the inverted amplified output of the carrier signal is supplied to the dummy capacity Cd. 
         [0051]    A differential capacity (=Cs−Cd) is obtained by adding a carrier signal output from the dummy capacity Cd and a carrier signal output from the variable capacitance Cs, and this differential capacity is input to the inverting input terminal of the operational amplifier Q 31 . 
         [0052]    In so doing, when the acceleration in the Z direction that is applied to the weight  7  of the acceleration sensor  1  is zero, the gain A 2  of the operational amplifier Q 32  of the carrier signal conditioning circuit  31  is adjusted in such a manner that the carrier signal output from the variable capacitance Cs and the carrier signal output from the dummy capacity Cd are balanced out to zero. 
         [0053]    When the acceleration in the Z direction that is applied to the weight  7  of the acceleration sensor  1  is zero, the level of an input signal input to the inverting input terminal of the operational amplifier Q 31  becomes zero, as well as an acceleration signal output from the A/D conversion circuit  34 . 
         [0054]    When an upward acceleration is applied to the weight  7  of the acceleration sensor  1 , the variable capacitance Cs increases from the state in which the Z-direction acceleration is zero. As a result, the level of the input signal input to the inverting input terminal of the operational amplifier Q 31  increases in a positive direction, while the output of the operational amplifier Q 31  decreases in a negative direction. The output of the operational amplifier Q 31  is demodulated by a demodulating circuit  32 , which is then denoised by a low pass filter  33 . The resultant signal is converted into a digital value by the A/D conversion circuit  34  and output as a Z-direction acceleration signal. 
         [0055]    While on the other hand, when a downward acceleration is applied to the weight  7  of the acceleration sensor  1 , the variable capacitance Cs decreases from the state in which the Z-direction acceleration is zero. As a result, the level of the input signal input to the inverting input terminal of the operational amplifier Q 31  decreases in the negative direction, while the output of the operational amplifier Q 31  increases in the positive direction. The output of the operational amplifier Q 31  is demodulated by the demodulating circuit  32 , which is then denoised by the low pass filter  33 . The resultant signal is converted into a digital value by the A/D conversion circuit  34  and output as a Z-direction acceleration signal. 
         [0056]    A capacitance detection circuit  40  shown in  FIG. 4  is now examined in comparison to the capacitance detection circuit  20  of  FIG. 2  in order to explain the characteristics of the present embodiment illustrated in  FIG. 3 , the capacitance detection circuit  40  having the variable capacitance Cs 2  substituted with a dummy capacity C 41  of the same capacity as the variable capacity Cs 2 . 
         [0057]    In this case, the acceleration sensor  1  generally has a greater spring constant in the Z direction of a sensor beam than in the X or Y direction due to the design complexity of the structure of the sensor beam. This is because the width of the beam as seen from above can be narrowed but the cross-sectional thickness thereof cannot be reduced as much as the aforementioned width in order to keep the strength of the entire weight. Generally, while the width of the beam perpendicular to a vibration direction is related to the first power of the spring constant, the thickness of the beam in the direction identical to the direction of vibration is related to the third power of the spring constant. Thus, the spring constant is greater in the direction of vibration (i.e., the Z-axis direction), which is the cross-sectional thickness direction, than in the X-axis or Y-axis direction. 
         [0058]    Therefore, the rate of change in the capacitance in the Z-axis direction is smaller than that that in the X-axis or Y-axis direction. In this case, the following formula is established when the same acceleration is applied: 
         [0000]      Δ Cs/Cs&lt;ΔCs 1/ Cs 1  (7),
 
         [0059]    where ΔCs represents a change in capacity resulting from the Z-axis direction acceleration, and ΔCs 1   a  change in capacity in the X-axis or Y-axis direction acceleration. 
         [0060]    Next, noise gain of an operational amplifier circuit that is generated by the differential amplifier Q 21  is taken into consideration. Generally, the noise gain with respect to an equivalent input noise of the differential amplifier Q 21  becomes as follows in the circuit shown in  FIG. 2  and the circuit shown in  FIG. 4 , respectively: Gn 2 =(Cs 1 +C 2 )/C 4 , and Gn 3 =(Cs+C 2 )/C 4 . Generally the capacity of the capacitor C 2  is substantially proportional to Cs and Cs 1 , and the capacity of the capacitor C 4  is proportional to ΔCs and ΔCs 1 . Thus, the following formulae are established: 
         [0000]      ( Cs 1+ C 2)/ C 4∝ Cs 1/Δ Cs 1  (8); and
 
         [0000]      ( Cs+C 2)/ C 4∝ Cs/ΔCs   (9).
 
         [0061]    Based on the formula (7), (8)&lt;(9) is established, meaning that the noise gain in the Z-axis is greater than that of the X-axis or Y-axis. This brings about a problem that a Z-axis output noise from the acceleration becomes large. 
         [0062]    In the present embodiment shown in  FIG. 3 , however, the dummy capacity Cd can be made lower than the capacity C 2  shown in  FIG. 4 , by making the absolute value of the gain A 2  of the operational amplifier Q 32  be greater than Cs/C 2  shown in  FIG. 4 . 
         [0063]    In other words, the dummy capacity Cd can be set as follows: 
         [0000]        Cd=Cs/A 2  (10).
 
         [0064]    When A 2 &gt;Cs/C 2 , the dummy capacity Cd is set as follows: 
         [0000]        Cd=Cs/A 2&lt; Cs /( Cs/C 2)= C 2  (11).
 
         [0065]    Consequently, a Z-axis noise gain Gn 1  according to the present embodiment is calculated as follows: 
         [0000]        Gn 1=( Cs+Cd )/ C 4  (12).
 
         [0066]    As a result, the Z-axis noise gain Gn 1  according to the present embodiment is smaller than the noise gain Gn 3  calculated by the formula (9) shown in  FIG. 4 . In addition, the Z-axis noise gain calculated by the formula (12) according to the present embodiment can be set to be equal to the X-axis or Y-axis noise gain Gn 2  calculated by the formula (8) by further increasing the gain A 2  of the operational amplifier Q 32 . 
         [0067]    According to the present embodiment, the configuration described above can be applied to the case where the operational amplifier Q 31  has a linear input range. In case of the capacitance detection circuit  40  shown in  FIG. 4 , the following formula needs to be satisfied: 
         [0000]        Vo×Cs /( Cs+C 2)&lt; Vi   (13).
 
         [0068]    Where Vi represents a linear input range of the differential amplifier Q 21  and Vo represents an output amplitude of the carrier signal generating circuit  21 . The capacity C 2  needs to be increased in order to satisfy the abovementioned formula. 
         [0069]    The smaller the linear input range Vi of the differential amplifier Q 21 , the greater the capacity C 2  needs to be. This results in an increase in the noise gain Gn 3  expressed by the formula (9), bringing about a problem that the Z-axis output noise from the acceleration increases. 
         [0070]    According to the present embodiment, however, because the non-inverting input terminal of the operational amplifier Q 31  is connected to the ground, the inverting input terminal of the same is imaginary-shorted to the ground. Thus, the input signal level of the operational amplifier Q 31  is kept within the linear operation range Vi. Even if the linear operation range of the operational amplifier Q 31  is narrow, the input signal level can reliably be kept within the range. Therefore, the dummy capacity Cd (C 2  of  FIG. 4  corresponds to the dummy capacity Cd shown in  FIG. 3 ) does not need to be increased despite the restriction shown in the formula (13), preventing the noise gain from increasing. 
         [0071]    According to the present embodiment described above, the dummy capacity Cd does not have to be formed in the acceleration sensor  1  but can be loaded on the printed circuit board mounted with the capacitance detection circuit  30 ; thus, the configuration of the acceleration sensor  1  can be reduced in size. 
         [0072]    Moreover, an imaginary short configuration is formed in the carrier signal conditioning circuit  31  by connecting the non-inverting input terminal of the operational amplifier Q 32  to the ground and thereby forming a negative feedback circuit. As a result, the operational amplifier Q 32  can be configured as an inverting amplifier having the gain A 2  equal to R 3 /R 4 , and the dummy capacity Cd can be set at a small value by adjusting the gain A 2 . Thus, reducing the Z-axis noise gain Gn 1  enables highly accurate capacitance detection. 
         [0073]    Because the imaginary short configuration is obtained by connecting the non-inverting input terminal of the operational amplifier Q 31  to the ground and forming the negative feedback circuit, the inverting input terminal of the operational amplifier Q 31  is connected to the ground, and the input signal level of the operational amplifier Q 1  can be kept within the linear operation range even when the linear input range Vi is narrow. For this reason, it is not necessary to increase the dummy capacity Cd in order to keep the input signal level within the linear input range Vi, reliably preventing the noise gain from increasing and the Z output noise of the acceleration from increasing. 
         [0074]    Note that the aforementioned embodiment has described that the gain A 2  of the operational amplifier Q 32  of the carrier signal conditioning circuit  31  is determined based on the resistors R 3  and R 4 ; however, the present invention is not limited thereto. In other words, a variable resistor VR can be interposed between the output side of the operational amplifier Q 32  and the ground, and the resistor R 3  can be connected to a sliding terminal of the variable resistor VR, as shown in  FIG. 5 . As a result, with a resistance value of the variable resistor VR set as R 5 , the gain A 2  of the operational amplifier Q 32  can be calculated as follows: A 2 =(R 3 +R 5 )/R 4 . The gain A 2  can be adjusted to any value by adjusting the resistance value R 5  of the variable resistor VR. Consequently, the difference between the dummy capacity Cd and the capacitance Cs can be finely adjusted based on the relationship shown in the formula (10). 
         [0075]    Furthermore, the output of the operational amplifier Q 31  can easily be adjusted to zero when the acceleration is “0.” Consequently, with effective use of an input range of the A/D conversion circuit  34  connected to the output side of the low pass filter  23 , an SN ratio of the A/D conversion circuit  34  can be improved. 
         [0076]    In other words, the SN ratio of the A/D conversion circuit  34  is expressed as follows: (Vrange−Z of)/Nadc, where Nadc represents noise of the A/D conversion circuit  34 , and Zof represents zero offset of the A/D conversion circuit  34 . 
         [0077]    Therefore, by adjusting the gain of the carrier signal conditioning circuit  31  and the output of the operational amplifier Q 31 , the zero offset Z of the A/D conversion circuit  34  can be reduced, resulting in an increase of the SN ratio of the A/D conversion circuit  34 . 
         [0078]    Although  FIG. 5  illustrates how the gain A 2  of the carrier signal conditioning circuit  31  is adjusted and the difference between the dummy capacity Cd and the capacitance Cs is finely adjusted, the present invention is not limited to this configuration. The same operation effects as those obtained by the configuration shown in  FIG. 5  can be achieved by connecting a variable capacity Cvr in parallel to the dummy capacity Cd and adjusting the combined capacity of the dummy capacity Cd and the variable capacity Cvr, as shown in  FIG. 6 . 
       INDUSTRIAL APPLICABILITY 
       [0079]    The present invention can provide a capacitance detection circuit capable of reducing noise and accurately detecting a very small capacitance. 
       EXPLANATION OF REFERENCE NUMERALS 
       [0080]      1  . . . Acceleration sensor,  3  . . . Plate spring material,  4  . . . Movable electrode,  5   xa ,  5   xb  . . . X-direction fixed electrode,  6   ya ,  6   yb  . . . Y-direction fixed electrode,  7  . . . Weight,  9  . . . Z-direction fixed electrode,  20  . . . Capacitance detection circuit,  21  . . . Carrier signal generating circuit, Cs 1 , Cs 2  . . . Variable capacitance, C 2  to C 4  . . . Capacitor, R 1 , R 2  . . . Resistor, Q 21  . . . Differential amplifier,  22  . . . Demodulating circuit,  23  . . . Low pass filter,  24  . . . A/D conversion circuit,  30  . . . Capacitance detection circuit,  31  . . . Carrier signal conditioning circuit,  32  . . . Demodulating circuit,  33  . . . Low pass filter,  34  . . . A/D conversion circuit, Q 31 , Q 32  . . . Operational amplifier, Cs . . . Variable capacitance, Cd . . . Dummy capacity, R 3 , R 4  . . . Resistor, VR . . . Variable resistor, Cvr . . . Variable capacity