Abstract:
An over current protection circuit provides over current protection (O.C.P) and short current protection (S.C.P) and can selectively operate in auto recover mode or latch off mode by replacing certain elements therein. Hence, the present invention can be designed easily and is cheaper than the prior art.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to a power supply, and more particularly to an over current protection circuit for power supplies. 
         [0003]    2. Description of the Prior Art 
         [0004]    In the current art, electronic power source products, such as a power supply, mounts an over current protection circuit (O.C.P) to avoid breakages caused by users or malfunctioning products. 
         [0005]    In order to protect an overloaded circuit, a switching power supply is used. The switching power supply limits its output current to a certain range. However, the switching power supply wastes energy and causes high temperatures when the circuit is over current for long periods. 
         [0006]    Hence, in order to improve upon such problems, over current protection circuits operate in two ways. The first is a latch off mode, and the second is an auto recover mode. In latch off mode, the switching power supply automatically disables its output when the output end of the switching power supply shorts or is over current. It then cold-boots to try to supply power again when the output end of the switching power supply has returned to normal levels. 
         [0007]    In auto recover mode, the over current protection circuits further operate in two detailed ways. The first is a cycle-by-cycle mode, and the second is a hiccup mode. In cycle-by-cycle mode, the switching power supply may waste energy in each operation cycle. In hiccup mode, the switching power supply automatically disables its output when the output end of the switching power supply shorts or overloads, and then automatically warm-boots to try to supply power again. The switching power supply in hiccup mode may repeatedly disable its output and automatically warm-boots until the output end of the switching power supply has returned to normal. 
         [0008]    Hence, in order to design such previous electronic power source products such as a switching power supply, that can operate in latch off mode and auto recover mode simultaneously, users further mount more expensive controllers or combine extras with various mode circuits in electronic power source products. However, such improved products are expensive and have complex circuits. 
       SUMMARY OF THE INVENTION 
       [0009]    It is the object of the present invention to provide an O.C.P and an S.C.P for a power supply. 
         [0010]    It is another object of the present invention that the power supply can operate selectively in latch off mode or auto recover mode by replacing certain elements therein. 
         [0011]    In order to achieve the above objects, the present invention provides an over current protection circuit for power supplies. The over current protection circuit includes: an input detection unit receiving a current sensing signal to generate an input voltage; a comparison circuit connecting to the input detection circuit and comparing the input voltage with a reference voltage to generate a compared voltage; a positive feedback sampling and maintaining unit connecting to the input detection unit and the comparison circuit and providing a first and second feedback currents based on the compared voltage; a timing circuit connecting to the comparison circuit and the positive feedback sampling and maintaining unit and determining the operation cycle of the over current protection circuit; and an output switch connecting to the timing circuit and, according to the second feedback current, determining whether the over current protection circuit restrains the outputs of the power supply. 
         [0012]    Wherein, the first feedback current is provided to the input detection unit for further determining the period the over current protection circuit spends operating in normal mode. 
     
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0013]    The above and further advantages of this invention may be better understood by referring to the following description, taken in conjunction with the accompanying drawings, in which: 
           [0014]      FIG. 1  is a circuit diagram of the over current protection circuit of the power supply of the present invention; 
           [0015]      FIG. 2  is a waveform diagram of the input voltage of the amplifier of the over current protection circuit of the present invention; 
           [0016]      FIG. 3  is a waveform diagram of the output voltage of the transistor of the over current protection circuit of the present invention; 
           [0017]      FIG. 4  is a curve diagram of the operation cycle of the over current protection circuit of the present invention; and 
           [0018]      FIG. 5  is a circuit diagram of another embodiment of the over current protection circuit of the present invention. 
       
    
    
       [0019]    The drawings will be described further in connection with the following detailed description of the present invention. 
       DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0020]    The present invention provides an over current protection circuit to offer protection for a power supply from over loading and shorting. The over current protection circuit of the present invention disables the output of the power supply during a protection period and then automatically warm-boots it. If any errors occur in the output of the power supply, the over current protection circuit disables the output of the power supply. Alternatively, if there are no errors in the output of the power supply, the over current protection circuit enables the output of the power supply. 
         [0021]    In  FIG. 1 , the over current protection circuit of the present invention includes a input detection unit  10 , a comparison circuit  210 , a timing circuit  220 , a positive feedback sampling and maintaining unit  30 , and an output switch  40 . 
         [0022]    The input detection unit  10  connects to the comparison circuit  210  and the output end of the power supply (not shown). The comparison circuit  210  connects to the timing circuit  220 . The timing circuit  220  connects to the output switch  40 . The positive feedback sampling and maintaining unit  30  connects to the input detection unit  10 , the comparison circuit  210 , and the timing circuit  220 . The output switch  40  connects to the loading connecting to the output end of the power supply. 
         [0023]    The input detection unit  10  includes a diode D 1  and a charging and discharging circuit that includes a resistance R 1  and a capacitance C 1 . The comparison circuit  210  includes an amplifier OP 1  and two proportion resistances R 2  and R 3 . The inverse end of the diode D 1  connects to the resistance R 1 , the capacitance C 1 , and the positive input end of the amplifier OP 1 . The negative input end of the amplifier OP 1  connects to the proportion resistances R 2  and R 3 , wherein the proportion resistance R 2  connects to a status power source VDD and the proportion resistance R 3  connects to the ground. The output end of the amplifier OP 1  connects to the timing circuit  220 . 
         [0024]    The timing circuit  220  includes a charging resistance R 5 , a discharging resistance R 4 , a discharging diode D 2  and a capacitance C 2 . The positive feedback sampling and maintaining unit  30  includes a feedback transistor Q 1  and a feedback resistance R 6 . The output switch  40  includes a transistor Q 2 . 
         [0025]    The inverse end of the discharging diode D 2  connects to the output end of the amplifier OP 1  and the emitter end of the feedback transistor Q 1 . The discharging diode D 2  and the discharging resistance R 4  are displaced on a discharging path for the capacitance C 2 . One end of the capacitance C 2  connects to the charging resistance R 5 , the discharging resistance R 4 , and the grain end of the transistor Q 2 , while the other end connects to the ground. The source end of the transistor Q 2  connects to the ground, and the drain end of the transistor Q 2  is the output end of the over current protection circuit. 
         [0026]    The base end of the feedback transistor Q 1  connects to the charging resistance R 5  to form a charging path for the capacitance C 2 . The collector end of the feedback transistor Q 1  connects to one end of the feedback resistance R 6 , and a second end of the feedback resistance R 6  connects to the inverse end of the diode D 1 . 
         [0027]    First, the diode D 1  transmits a current sensing signal ICT of the output end of the power supply to the input detection unit  10  for further charging the capacitance C 1 . The charged capacitance C 1  has an input voltage Vi that is the voltage level of the positive input end of the amplifier OP 1 . The proportion resistances R 2  and R 3  divide the status power source VDD to generate a resistance voltage V REF  as the voltage level of the negative input end of the amplifier OP 1 . 
         [0028]    In normal mode, that is when the input voltage Vi is less than or equal to the reference voltage V REF , the compared voltage of the output end of the amplifier OP 1  is low. Then, the output of the amplifier OP 1  disables the feedback transistor Q 1 , and the capacitance C 2  discharges into the ground through the discharging path including the discharging resistance R 4  and the discharging diode D 2 . In this case, when the voltage level between the grate end and the source end is less than the threshold voltage in the transistor Q 2 , the transistor Q 2  disables, and the power supply does not provide the current sensing signal ICT to drive the over current protection circuit. 
         [0029]    In protection mode, that is when the input voltage Vi is greater than the reference voltage V REF , the compared voltage of the output end of the amplifier OP 1  is high. Then, the output of the amplifier OP 1  enables the feedback transistor Q 1 . The enabled feedback transistor Q 1  provides a first feedback current I FB1  to charge the capacitance C 1  via the charging resistance R 6  and provides a second feedback current I FB2  to charge the capacitance C 2  via the charging resistance R 5 . 
         [0030]    When the feedback transistor Q 1  provides the first feedback current I FBI  to charge the capacitance C 1 , the amplifier OP 1  provides the positive feedback via the feedback transistor Q 1  to maintain the high level output of the amplifier OP 1 . When the feedback transistor Q 1  provides the second feedback current I FB2  to charge the capacitance C 2 , the voltage level between the grate end and the source end is greater than the threshold voltage in the transistor Q 2  so as to enable the transistor Q 2 . Hence, the over current protection circuit disables the output of the power supply, that is, the output voltage Vo of the power supply is zero. 
         [0031]    Furthermore, when providing the second feedback current I FB2  to charge the capacitance C 2 , the enabled feedback transistor Q 1  operates in a saturation region and then moves to a linear region. The feedback transistor Q 1  in the linear region provides the first feedback current I FB1  to the capacitance Cl decreasingly. Then, the input voltage Vi of the amplifier OP 1  becomes less than the reference voltage V REF  so that the amplifier OP 1  outputs zero. The capacitance C 2  discharges into the ground via the discharging path. Finally, when the voltage level stored in the capacitance C 2  is less than the threshold voltage of the transistor Q 2 , the transistor Q 2  is cut off, and the power supply recovers. If the output current of the power supply is over, the over current protection circuit starts to operate again. 
         [0032]    According to the above description, the feedback transistor Q 1  can be a PNP-type bipolar junction transistor (BJT), the discharging resistance R 4  can be a tunable resistance, and the transistor Q 2  can be an N-type field effect transistor (FET). 
         [0033]    In  FIG. 2 , a waveform diagram of the input voltage Vi of the amplifier OP 1  of the over current protection circuit of the present invention is shown. The output voltage Vo of the over current protection circuit is shown as a dot-line curve. The input voltage Vi of the amplifier OP 1  is shown as a real-line curve, wherein the characteristic curve of the input voltage Vi has five stages (the first stage I, the second stage II, the third stage III, the fourth stage IV, and the fifth stage V). 
         [0034]    The first stage I illustrates that the capacitance C 1  is charged by the current sensing signal ICT. The second stage II illustrates the voltage stored in the capacitance C 1  in self-holding mode. The third stage III illustrates the maximum input voltage Vi of the amplifier OP 1 . The fourth stage IV illustrates the voltage stored in the capacitance C 1  during the feedback transistor Q 1  operating in linear region. The fifth stage V illustrates that the capacitance Cl discharges fast when the input voltage Vi is less than the reference voltage In  FIG. 3 , a waveform diagram of the output voltage Vo of the transistor Q 2  of the over current protection circuit is shown. The input voltage Vi of the amplifier OP 1  is shown as a dot-line curve. The output voltage Vo of the over current protection circuit is shown as a real-line curve, wherein the characteristic curve of the output voltage Vo has two stages (the first stage I and the second stage II). The first stage I illustrates the output voltage Vo in normal mode. The second stage II illustrates the output voltage Vo in over current protection mode. 
         [0035]    According to the above description, the over current protection circuit can adjust the discharging period of the capacitance C 2  based on the discharging resistance R 4  so as to adjust the delay period for entering the over current protection mode. The power supply can directly obtain the output voltage Vo from the output switch  40  without amplifying. In  FIG. 4 , a curve diagram of the operation cycle of the over current protection circuit of the present invention is shown. 
         [0036]    The over current protection circuit in  FIG. 1  can execute the hiccup mode in the auto recover mode. If replacing some element of the over current protection circuit in  FIG. 1 , such an over current protection circuit will be able to execute the latch off mode. 
         [0037]    In  FIG. 5 , the present invention uses a division resistance R 7  to replace the capacitance C 2  in  FIG. 1 , and the division resistance R 7  and the charging resistance R 5  can be combined to form a voltage division unit. Hence, the over current protection circuit in  FIG. 5  can execute the latch off mode. 
         [0038]    An advantage of the present invention is that the present invention uses the charging and discharging circuit to control the operation cycle of the over current protection circuit. 
         [0039]    Another advantage of the present invention is that it uses the positive feedback circuit to control the charging and discharging circuit. 
         [0040]    Another advantage of the present invention is that it uses the compared voltage outputted by the comparison circuit, to control the positive feedback circuit. 
         [0041]    Yet another advantage of the present invention is that it can execute the latch mode and the auto recover mode by replacing certain elements. 
         [0042]    The description above only illustrates specific embodiments and examples of the invention. The invention should therefore cover various modifications and variations made to the herein-described structure and operations of the invention, provided they fall within the scope of the invention as defined in the following appended claims.