Abstract:
A test method for measuring adsorbed molecular contamination uses a test structure that includes a substrate comprising a plurality of separated test sites having a plurality separate thicknesses having a base design thickness and a designed thickness interrelationship. The test structure is exposed to a molecular contaminant environment to provide an adsorbed molecular contaminant layer upon each of the plurality of separated test sites. The plurality of separated test sites with the adsorbed molecular contaminant layer thereon is measured. An appropriate algorithm that considers the designed thickness interrelationship is used to determine at least one of: (1) the base design thickness; and (2) a thickness of the adsorbed molecular contaminant layer.

Description:
BACKGROUND 
       [0001]    1. Field of the Invention 
         [0002]    The invention relates generally to microelectronic fabrication. More particularly, the invention relates to adsorbed molecular contaminant film measurement within microelectronic fabrication. 
         [0003]    2. Description 
         [0004]    The process of fabricating microelectronic structures, and in particular semiconductor structures, typically requires the use of a variety of materials and related process environments. The materials include wet chemical materials as well as dry plasma materials. Process environments include ambient environments as well as vacuum environments. 
         [0005]    As a result of using multiple process environments, microelectronic structures are typically exposed to, or transferred within, process environments that may prove to be contaminant environments with respect to subsequent environments within which they are processed. The process environments provide for adsorption of molecular contaminants which are often particularly detrimental. They are particularly undesirable when they are strongly adsorbed or otherwise unable to be desorbed prior to a subsequent process that otherwise requires an atomically clean or chemically reproducible surface for subsequent processing. 
         [0006]    Quantification of adsorbed molecular contaminants thus provides an important challenge within microelectronic structure and semiconductor structure fabrication. 
         [0007]    Adsorbed molecular contamination may be quantified using any of several quantification methods. Included are optical ellispometry methods, thermal desorption methods and secondary ion mass spectroscopy methods. 
         [0008]    While each of the foregoing quantification methods provides value within the context of adsorbed molecular contaminations determination, needs continue to exist for generally simplified apparatus and methods that allow for direct quantification of adsorbed molecular contamination. It is to that end that the invention is directed. 
       SUMMARY OF THE INVENTION 
       [0009]    The invention provides a test method for quantifying adsorbed molecular contamination. The test method may also be used for determining a base design thickness for a series of test sites within a test structure. The method uses the test structure that comprises a substrate comprising a plurality of separated test sites. The plurality of separated test sites has a base design thickness, and a plurality of separate thicknesses related thereto by means of a designed thickness interrelationship. The test structure is placed in a molecular contaminant environment to allow a layer of molecular contaminant to adsorb upon the plurality of test sites A thickness of each of the plurality of test sites including the layer of adsorbed molecular contaminant is then measured. At least one of: (1) a thickness of the adsorbed molecular contaminant layer; and (2) the base designed thickness, is determined using an algorithm that considers the designed thickness interrelationship between the plurality of test sites. The adsorbed molecular contaminant may include moisture, or an alternative adsorbed organic molecular contaminant such as but not limited to: an alcohol or a ketone. 
         [0010]    The method is particularly applicable to quantification of adsorbed molecular contamination upon a gate dielectric material layer that may be used within a semiconductor structure. 
         [0011]    A method in accordance with the invention includes exposing a test structure comprising a substrate comprising a plurality of separated test sites having a plurality of separate thicknesses having a base design thickness and a designed thickness interrelationship to a molecular contaminant environment to provide an adsorbed molecular contaminant layer upon each of the plurality of separated test sites; The method also includes measuring heights of the plurality of separated test sites with the adsorbed molecular contaminant layer thereon. The method also includes determining at least one of: (1) a thickness of the adsorbed molecular contaminant layer; and (2) the base design thickness within the designed thickness interrelationship, while using an algorithm that considers the designed thickness interrelationship. 
     
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0012]    The objects, features and advantages of the invention are understood within the context of the Description of the Preferred Embodiment, as set forth below. The Description of the Preferred Embodiment is understood within the context of the accompanying drawings, which form a material part of this disclosure, wherein: 
           [0013]      FIG. 1  to  FIG. 7  show a series of schematic cross-sectional diagrams illustrating the results of progressive stages in fabricating and using an adsorbed molecular contaminant test structure in accordance with a preferred embodiment of the invention. 
           [0014]      FIG. 8  show a graph of Reported Thickness versus Target Number illustrating the results of using an adsorbed molecular contaminant test structure in accordance with the invention. 
       
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0015]    The invention, which includes a method for quantifying adsorbed molecular contamination while using a particular adsorbed molecular contaminant test structure, is disclosed in further detail within the context of the description provided below. The description provided below is understood within the context of the drawings described above. The drawings are intended for illustrative purposes, and as such are not necessarily drawn to scale. 
         [0016]      FIG. 1  to  FIG. 7  show a series of schematic cross-sectional diagrams illustrating the results of progressive stages of fabrication and use of an adsorbed molecular contaminant test structure in accordance with the preferred embodiment of the invention. 
         [0017]      FIG. 1  shows a substrate  10 . A first photoresist layer  12  is located upon the substrate  10 . 
         [0018]    The substrate  10  may comprise any of several materials. Non-limiting examples include conductor materials, semiconductor materials and dielectric materials. For convenience of use within semiconductor fabrication, the substrate  10  typically comprises a semiconductor substrate. Preferably, the substrate  10  has a comparatively low affinity for an adsorbed molecular contaminant material desired to be quantified in accordance with the invention. 
         [0019]    The first photoresist layer  12  may comprise any of several photoresist materials. Non-limiting examples include positive photoresist materials, negative photoresist materials and hybrid photoresist materials. Typically, the first photoresist layer  12  is formed using conventional spin-coating and thermal curing methods that provide the first photoresist layer  12  with a thickness from about 1000 to about 20000 angstroms. 
         [0020]      FIG. 2  shows the results of photoexposing and developing the first photoresist layer  12  to yield first photoresist layer  12 ′ that exposes the substrate  10  at the bottom of a first aperture A 1 . The first aperture A 1  typically has a linewidth from about 10 to about 100 microns. The photoexposing and developing of the first photoresist layer  12  to provide the first aperture A 1  is undertaken using generally conventional methods and materials. 
         [0021]      FIG. 3  shows the results of depositing a first test material layer  15  (i.e., a first test site) upon the semiconductor structure of  FIG. 2  and in particular partially filling the first aperture A 1 . Similarly with the substrate  10 , the first test material layer  15  may comprise any one of a conductor material, a semiconductor material and a dielectric material. Typically, the test material is selected as a material that may be of particular importance with respect to adsorbed molecular contamination determination within a manufacturing process. Within the context of a semiconductor manufacturing process, a dielectric material, such as a dielectric material having a composition that may be used within a gate dielectric layer, is often of particular importance. 
         [0022]    Within the embodiment, the first test material layer  15  is deposited with a thickness K 1 V, where V is intended as a base design thickness (which may be experimentally determined and verified as an actual value) and K 1  is intended to designate a multiplier for the base design thickness V. For example and-without limitation, a base design thickness V may be in a range from about 10 to about 50 angstroms, and a first multiplier K 1  for the base design thickness may be an integral multiplier or a non-integral multiplier. Typically, K 1  equals unity. 
         [0023]      FIG. 4  shows an additional sequence of processing that corresponds with the sequence of processing of  FIG. 2  to  FIG. 3 , but with a second photoresist layer  13  that has a second aperture A 2  therein laterally separated from the first aperture A 1 .  FIG. 4  also illustrates a second test material layer  15 ′ that has a second thickness K 2 V. Similarly with the fist thickness K 1 V, the second thickness K 2 V also comprises a base design thickness V and a second multiplier K 2 . Thus, the first test material layer  15  and the second test material layer  15 ′ are interrelated in thickness by a first multiplier K 1  and a second multiplier K 2  with respect to a base design thickness V. 
         [0024]      FIG. 5  shows an additional sequence of processing that corresponds with the sequence of processing of  FIG. 2  to  FIG. 3 , but with a third photoresist layer  14  and a third test material layer  15 ″. The third photoresist layer  14  is otherwise analogous or equivalent to the second photoresist layer  13  or the first photoresist layer  12 ′, but the third photoresist layer  14  defines a third aperture A 3  separated from the second aperture A 2  and the first aperture A 1 . In accordance with disclosure above, the third test material layer  15 ″ has a third thickness K 3 V, where, again, V is a base design thickness and K 3  is a third multiplier. Thus, each of the first test material layer  15 , the second test material layer  15 ′ and the third test material layer  15 ″ is interrelated to a base design thickness V by way of the corresponding first multiplier K 1 , second multiplier K 2  and third multiplier K 3  (i.e., a designed thickness interrelationship). Typically, although not exclusively, the first multiplier K 1 , the second multiplier K 2  and the third multiplier K 3  are integrally related. 
         [0025]      FIG. 6  shows the results of stripping excess portions of the third test material layer  15 ″ from the third photoresist layer  14  and then stripping the third photoresist layer  14  from the substrate  10 . 
         [0026]      FIG. 6  thus shows a test structure that comprises a substrate  10  having a series of first, second and third test material layers  15 ,  15 ′ and  15 ″ located thereupon. Within the invention, the substrate  10  may comprise any of several materials, including but not limited to: conductor materials, semiconductor materials and dielectric materials. Similarly, the first, second and third test material layers  15 ,  15 ′ and  15 ″ may also comprise any of several test materials (i.e., conductor, semiconductor or dielectric), but they are all formed of the same material preferably deposited identically. 
         [0027]      FIG. 7  shows a schematic cross-sectional diagram illustrating the results of exposing the test structure of  FIG. 6  within a test environment that comprises a concentration of a molecular contaminant that absorbs upon the test material layers  15 ,  15 ′ and  15 ″. The adsorbed molecular contaminant forms adsorbed molecular contaminant layer  1   8 , having a nominally identical thickness S upon each of the test material layers  15 ,  15 ′ and  15 ″. 
         [0028]    In accordance with the invention, a total film thickness measurement is made for each of the composite layers comprising a first, second or third test material layer  15 ,  15 ′ or  15 ″ and the adsorbed molecular contaminant layer  18  (i.e.,  15 / 18 ,  15 ′/ 18  and  15 ″/ 18 ). The thickness of the individual composite layers are T 1 =K 1 V+S, T 2 =K 2 V+S and T 3 =K 3 V+S (i.e., in general Tm,n=Km,nV+S, where m,n equal 1, 2, 3 . . . etc.). The measurements maybe made using an ellipsometry method, an optical scattering method, an ion beam method or an alternative quantification method having an appropriate resolution. The thickness measurement uses a measurement beam  19  that is nominally perpendicular to the plane of the substrate  10 . In light of the foregoing equations, actual values for V (i.e., base design thickness) and S (i.e., adsorbed contaminant layer thickness) may be calculated using any two test structures Km and Yn having any two thicknesses Tm and Tn as follows. 
         [0000]        V =( Tm−Tn )/( Km−Kn ) 
         [0000]        S =−( KnTm−KmTn )/( Km−Kn ) 
         [0029]    The foregoing process and measurement are subject to measurement variation within the context of only two data points. Thus, a regression analysis may be used for purposes of reducing measurement variations. 
         [0030]    The result of such a regression analysis is shown in the graph of  FIG. 8 . In general the graphical analysis uses the linear regression equation: Tn=V*Kn+S. 
         [0031]    For the graph of  FIG. 8 , an intercept S is equal to 8.25 angstroms as the actual measured value of the adsorbed molecular contaminant layer. A slope is equal to 9.91 angstroms which equates to the base design thickness V. 
         [0032]    The preferred embodiment of the invention is illustrative of the invention rather than limiting of the invention. Revisions and modifications may be made to methods, materials, structures and dimensions in accordance with the preferred embodiment of the invention, while still providing an embodiment in accordance with the invention, further in accordance with the accompanying claims.