Abstract:
A circuit for acquiring a differential signal and a single-ended signal from a differential signal bus generates a differential output strobe signal and a single-ended strobe signal. A differential amplifier, first and second single-ended amplifiers, and a logic circuit cooperate to produce a digital logic output signal that exhibits an active edge that always occurs later in time than an active edge of the differential output strobe signal.

Description:
FIELD OF THE INVENTION  
         [0001]    The subject invention generally concerns the field of circuitry for receiving signals from a digital signal bus, and specifically concerns the field of circuitry employing both a differential receiver circuit and a single-ended receiver circuit to capture a differentially driven signal from a digital signal bus.  
         BACKGROUND OF THE INVENTION  
         [0002]    In modern digital electronic equipment and instruments, it may be necessary for a receiving agent to employ both a differential receiver circuit and a single-ended (i.e., ground-referenced) receiver circuit to capture a differentially driven signal from a digital signal bus. For example, the use of a single-ended receiver circuit is advantageous where the differential bus driver circuit driving the digital bus is a tri-state device, and when and the output of the bus driver is disabled. In such a condition, the input terminals of the differential receiver are held to the same voltage level, which causes its output signal to oscillate. The operation of any edge-triggered circuitry downstream from the differential receiver will be adversely affected by this oscillating output signal. In contrast, the single-ended receiver circuit will not oscillate because its input terminals will not see the same voltage level for any appreciable amount of time.  
           [0003]    While use of the single-ended receiver is advantageous in the above-described (i.e. tri-stated) situation, the operation of the differential receiver circuit is superior when data is being driven onto the bus. In such a case, the differential output signal should be used to properly latch data within its specified time window.  
           [0004]    Unfortunately, when working with both a differential version and a single-ended version of the same signal, some timing problems can result. These timing problems arise because the single-ended switching point of the signal is unpredictable with respect to the differential switching point, for reasons to be explained in detail below. When the output signals of these two receivers interact in a given system, the above-mentioned timing problems can cause the generation of glitches and other asynchronous anomalies.  
           [0005]    What is needed is a circuit that will deterministically locate the output signal of a single-ended receiver with respect to the output signal of a differential receiver, to allow the differential and single-ended output signals to interact in a predictable manner within a given system.  
         SUMMARY OF THE INVENTION  
         [0006]    A digital signal receiving circuit employs both a differential receiver circuit and a single-ended receiver circuit to capture a differentially driven signal from a digital signal bus. The output signal of the differential receiver circuit and the output signals of first and second single-ended receiver circuits are coupled to a logic circuit for producing a digital logic output signal exhibiting a substantially stable timing relationship with respect to the output signal of the differential receiver circuit. The logic circuit comprises an AND-OR circuit arrangement for producing a strobe signal exhibiting an active edge that always occurs later in time than an active edge of the differential circuit. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWING  
       [0007]    [0007]FIG. 1 is a simplified schematic of a prior art circuit for receiving the same signal in both single-ended form and in differential form.  
         [0008]    [0008]FIG. 2 is an illustration of waveforms that may be useful in understanding a cause of the problem to be solved by the subject invention.  
         [0009]    [0009]FIG. 3 is an illustration of waveforms that may be useful in understanding a first aspect of the problem to be solved by the subject invention.  
         [0010]    [0010]FIG. 4 is an illustration of waveforms that may be useful in understanding a second aspect of the problem to be solved by the subject invention.  
         [0011]    [0011]FIG. 5 is a simplified schematic of a circuit for receiving the same signal in both single-ended form and in differential form in accordance with the subject invention.  
         [0012]    [0012]FIG. 6 is an illustration of waveforms showing correction applied by the subject invention with respect to the first aspect of the problem to be solved.  
         [0013]    [0013]FIG. 7 is an illustration of waveforms showing correction applied by the subject invention with respect to the second aspect of the problem to be solved. 
     
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS  
       [0014]    [0014]FIG. 1 shows a prior art circuit topology including a differential bus driver amplifier  105  applying a differentially driven strobe signal to a digital signal bus BUS  101 , and capturing it in a receiving circuit employing both a differential receiver  110  and single-ended receiver  120 . Bus  101  may comprise a pair of transmission lines TL 101  TL 102 . For purposes of the following explanation, one should assume that the voltage level of VREF is centered between the output-high OH and the output-low OL voltage levels of differential bus driver amplifier  105 . Also assume V TERM &gt;V OH .  
         [0015]    Note that when the output enable signal (ENABLE) is disabled in the circuitry of FIG. 1, the inputs to the differential receiver  110  will both be held at the same voltage level: V TERM . As noted above, this condition causes the outputs of this receiver to have a tendency to oscillate. The single-ended receiver  120 , however, will not oscillate since the input signals to both the STB P  and the V REF  inputs will never be identical for an appreciable amount of time.  
         [0016]    Assume that a utilization circuit (not shown) is coupled to the output of FIG. 1 and includes internal state machine logic that advances state in response to the detection of an active edge of a strobe signal. One skilled in the art will realize that such a utilization circuit should use the single-ended receiver output signal STB p—Single  to advance the state machine logic to avoid glitches caused by the above-mentioned unpredictable oscillations in the output signal of differential amplifier  110 .  
         [0017]    However, if data is driven onto the bus and it has a very tight timing relationship relative to the differential crossing point of the strobe, then the receiving system should use a differential receiver to capture the strobe. The differential output signal STB P—Diff  can then be used to properly latch the data within the specified timing window.  
         [0018]    Three pairs of waveforms, ( 201   a    201   b ), ( 201   a    201   c ), and ( 201   a    201   d ), each illustrating a time relationship between complementary strobe signals STBP and STBN are shown in FIG. 2. The ideal situation is shown with respect to the top waveform pair comprising waveforms  201   a  and  201   b . Note that waveforms  201   a  and  201   b  cross each other exactly at the V REF  level.  
         [0019]    Unfortunately, it sometime happens that complementary strobe signals STB P  and STB N  are not properly time-aligned. The vertical dotted line of FIG. 2 highlights the fact that strobe signal STB N  has been held in a constant position for purposes of the following explanation. The center illustration of FIG. 2 shows a waveform pair  201   a    201   c  in which strobe signal STB P  is delayed with respect to strobe signal STB N . This condition causes the falling edge of STB P  to cross the VREF level at a point later than the ideal differential crossing point of the strobe pair. The bottom illustration of FIG. 2 shows a waveform pair  210   a    201   d  in which strobe signal STB P  is advanced with respect to strobe signal STB N . This condition causes the falling edge of STB P  to cross the V REF  level at a point earlier than the ideal differential crossing point of the strobe pair.  
         [0020]    The undesirable effects that the center and bottom waveform pairs cause will be explained with respect to FIGS. 3 and 4. FIGS. 3 and 4 are examples showing the single-ended switching point varying in time with respect to the differential switching point. Note that in both figures the falling-edge of the STB P  signal is considered to be the active edge. Referring to waveforms  301   a ,  301   b ,  312 , and  315  of FIG. 3, strobe signal STB P  is delayed with respect to strobe signal STB N . This situation causes differential amplifier  110  to switch at point  303  instead of ideal switching point  302 . The output signal STB P—Diff  of differential amplifier  110  is shown as waveform  312 . This situation causes also single-ended amplifier  120  to switch at point  304  instead of ideal switching point  302 . The output signal STB P—Single  of single-ended amplifier  120  is shown as waveform  315 . Note that in this situation, a timing error has developed between strobe signals STB P—Diff  and STB P—Single .  
         [0021]    Referring to waveforms  401   a ,  401   b ,  412 , and  415  of FIG. 4, strobe signal STB P  is advanced with respect to strobe signal STB N . This situation causes differential amplifier  110  to switch at point  404  instead of ideal switching point  402 . The output signal STB P—Diff  of differential amplifier  110  is shown as waveform  412 . This situation causes also single-ended amplifier  120  to switch at point  403  instead of ideal switching point  402 . The output signal STB P—single  of single-ended amplifier  120  is shown as waveform  415 . Note that in this situation also, a timing error has developed between strobe signals STB P—Diff  and STB P—Single .  
         [0022]    With such a timing error between the strobe signals, one can readily see that timing problems will result in a system in which data is strobed by strobe signal STB P—Diff  and single-ended strobed state machine logic is advanced by use of strobe signal STB P—single . As a result, the updating of the state machine logic will be unpredictable relative to the latching of the data.  
         [0023]    For the cases shown in FIGS. 3 and 4, the unpredictability of the single-ended switching point with respect to the differential switching point was caused by skew between the members of the strobe pair. In addition, the differences between switching characteristics of the two receivers themselves can also add to the unpredictability. For example, differential receiver amplifier  110  will most likely switch before single-ended amplifier  120  because the internal difference amplifier of differential receiver amplifier  110  will see a larger voltage delta (i.e., larger voltage change) in a shorter period of time.  
         [0024]    The subject invention will now be described with respect to FIGS. 5, 6, and  7 . FIG. 5 shows a circuit arrangement that allows the output signals of both differential receiver amplifier  110  and single-ended receiver amplifier  120  to safely interact within the utilization circuit. The apparatus of FIG. 5 includes circuitry that predictably locates the output signal of the single-ended amplifier  120  in time with respect to the location of the output signal of differential amplifier  110 .  
         [0025]    The circuit of FIG. 5 solves the unpredictability problem by using AND-OR logic  540 ,  550 ,  560  to delay the single-ended receiver output. The AND-gates  540 ,  550 ,  560  of AND-OR logic  540 ,  550 ,  560  wait for the later of the two differential strobe inputs to cross its respective switching threshold. Once both inputs have crossed their switching thresholds, AND-OR logic  540 ,  550 ,  560  will allow the STB P—Single—Good  strobe signal to switch. As a result, the active edge of the STB P—Single—Good  strobe signal will always occur later in time than the active edge of the STB P—Diff  strobe signal.  
         [0026]    Elements  505 , TL 501 , TL 502 , R 501 , R 502 , Voltages sources V TERM , and differential amplifier  510  serve the same functions as do similarly numbered elements of FIG. 1 and need not be described again. Single-ended amplifier  520  receives strobe signal STB P , produces strobe signal STB P—single , and its complement strobe signal STB P—single —bar, and applies them to AND-gates  540  and  550  respectively. A second single-ended amplifier  530  receives strobe signal STB N  and in response, produces strobe signal STB N—single  (not used) and its complement strobe signal STB N—single -bar. Strobe signal STB N —single —bar is applied to AND-gate  550 . An enable signal may also be applied to an input terminal of AND-gate  550 . The circuit of FIG. 5 uses identical AND-gate structures  540 ,  550  to ensure equalized propagation delay through AND-OR logic  540 ,  550 ,  560  to avoid glitches on the output.  
         [0027]    [0027]FIG. 6 is similar to FIG. 3 in that it illustrates the condition in which strobe signal STB P , is delayed with respect to strobe signal STB N , however, FIG. 6 also includes a further waveform  618  representing the output signal STB P—Single—Good  of AND-OR logic  540 ,  550 ,  560 .  
         [0028]    [0028]FIG. 7 is similar to FIG. 4 in that it illustrates the condition in which strobe signal STB P , is advanced with respect to strobe signal STB N , however, FIG. 7 also includes a further waveform  718  representing the output signal STB P—Single—Good  of AND-OR logic  540 ,  550 ,  560 . It is important to note that strobe signal STB P—single—Good  of both FIG. 6 and  7  always occurs later in time than the active edge of the STB P—Diff  strobe signal. Thus, the unpredictability of location of strobe signals with respect to each other has been eliminated.  
         [0029]    It is noted that the subject invention is useful in test and measurement instruments such as logic analyzers and oscilloscopes for analyzing signals from circuits under test. It is herein recognized that this subject invention is also useful in general digital circuit applications involving the generation of single-ended and differential versions of the same digital signal.  
         [0030]    While the invention has been described with respect to strobe signals, it is herein recognized that it is also useful for generating stable single-ended and differential versions of other digital signals from the same source signal.  
         [0031]    For purposes of explanation, it was assumed that the falling edge is the active edge for both the STB P—Diff  and STB P—Single—Good  signals. However, one skilled in the art will realize that the circuit can be easily modified to process rising edges instead falling edges.