Abstract:
A self-repairing interconnection system and methods for forming the system are disclosed. The system includes a metal pathway adjacent a metal-doped chalcogenide material. The system is configured to repair defects in the metal pathway by donating metallic ions from the metal-doped chalcogenide material to the metal pathway.

Description:
RELATED APPLICATIONS  
       [0001]    This application claims the benefit of pending Provisional Application Ser. No. 60/098,609, filed Aug. 31, 1998. 
     
    
     
       TECHNICAL FIELD  
         [0002]    The present invention generally relates to methods and apparatus for forming self-repairing interconnections for electrical circuits. More particularly, the present invention relates to an interconnection system using metal-doped chalcogenide material in contact with metal interconnections which heal defects in the metal interconnections.  
         BACKGROUND  
         [0003]    The performance and cost of electronic systems have improved continuously due in part to advances in manufacturing progressively smaller electronic devices. Advances in semiconductor technology have resulted in a tremendous reduction in the feature sizes of electronic devices, thereby increasing the density of electrical circuits. In fact, over the past two decades, the density of components which can be located on a single microchip has increased by a factor of 100 per decade.  
           [0004]    As the density of components has increased, so has the requirement for the density of interconnection pathways formed between these components. In order to increase the density of interconnection pathways, the size of interconnections must be reduced. Small geometry interconnections, however, are highly prone to failure by electromigration at points where the lines have a reduced cross-section due to thinning at topographical features (e.g., an underlying step), line narrowing by reflective notching during a photolithography step, and morphological effects such as width variations at grain boundaries after etching. The ultimate quality and reliability of many electronic systems are determined largely by the reliability of the interconnection system.  
           [0005]    To mitigate problems associated with high density devices and increase device reliability, metal lines are desirably designed or made wider than the minimum lithographical line width, preferably by a factor of two or more, to reduce current density at the thin regions of the lines and thereby reduce electromigration. Manufacturing devices with wider lines, however, reduces the overall interconnection density for the devices.  
           [0006]    Therefore, interconnections capable of healing defects and/or breaks in interconnection pathways are highly desirable to thereby increase overall system reliability.  
         SUMMARY OF THE INVENTION  
         [0007]    The present invention relates to methods and apparatus for forming self-healing interconnections for electrical circuits. In accordance with an exemplary embodiment of the present invention, an interconnection metal (e.g., copper, silver, and the like) is deposited on a layer of metal-doped chalcogenide material. When breaks occur in the interconnection metal, the break is healed (i.e., filled in) by the formation of a metal element formed by metal precipitation at the break.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWING FIGURES  
       [0008]    The present invention will hereinafter be described in conjunction with the appended drawing figures, wherein like numerals denote like elements, and:  
         [0009]    [0009]FIG. 1 is a sectional schematic illustration of a multi-level interconnection system in accordance with one aspect of the present invention; and  
         [0010]    FIGS.  2 A- 2 C are schematic depictions of a break and healing process in an interconnection pathway in accordance with the present invention. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0011]    In order to provide a more thorough understanding of the present invention, the following description sets forth numerous specific details, such as specific material, parameters, etc. However, these specific details need not be employed to practice the present invention.  
         [0012]    With reference to FIG. 1, a multi-level self-healing interconnect system  10  in accordance with a preferred embodiment of the present invention is shown. In accordance with one aspect of the present invention, interconnection system  10  includes a plurality of metal interconnection pathways  18  in contact with a metal-doped chalcogenide material  12 , dielectric separation layers  14 , and vias  16 .  
         [0013]    In accordance with one aspect of the present invention, a suitable metal-doped chalcogenide material includes any compound containing sulfur, selenium and/or tellurium, whether ternary, quaternary or higher compounds. In a preferred embodiment of the present invention, the chalcogenide material is selected from the group consisting of arsenic, germanium, selenium, tellurium, bismuth, nickel, sulfur, polonium and zinc (preferably, arsenic sulphide, germanium sulfide, or germanium selenide) and the metal comprises various Group I or Group II metals (preferably, silver, copper, zinc or a combination thereof). The metal-doped chalcogenide material may be obtained by photo dissolution, by depositing from a source comprising the metal and chalcogenide material, or by other means known in the art. For a more detailed discussion of metal-doped chalcogenide material, see U.S. Pat. No. 5,761,115, issued on Jun. 2, 1998 to Kozicki et al, the entire disclosure of which is incorporated herein by reference.  
         [0014]    In an exemplary embodiment, chalcogenide material  12  is doped with silver or copper. In accordance with this embodiment, metal pathways  18  are also formed from silver or copper. However, any conductive material may be used as long as there are no adverse reaction between the conductor and the chalcogenide material.  
         [0015]    In accordance with one aspect of the present invention, metal pathways  18  are deposited on and in contact with chalcogenide material  12  using any convenient deposition method. Although in FIG. 1 metal pathways  18  are depicted above chalcogenide material  12 , metal pathways  18  can be deposited beneath or completely within chalcogenide material  12 . Additionally, vias  14  are preferably kept free of the metal-doped chalcogenide material to minimize the resistance of the connection between interconnect layers.  
         [0016]    With reference to FIG. 2A, a defect in a conductor pathway  22  can result from thinning at topographical features (e.g., an underlying step), line narrowing by reflective notching during a photolithography step, morphological effects such as width variations at grain boundaries after etch, and the like. With additional reference to FIG. 2B, as a weak region  23  in conductor pathway  22  becomes thinner (e.g., by electromigration), pathway  22  resistance increases, thereby also increasing the voltage drop across pathway  22 . With additional reference to FIG. 2C, this potential difference creates an electric field which moves dissolved metal ions from metal-doped chalcogenide material  24  to the most electrically negative part of the defect, whereupon the metal ions will come out of solution and form a solid metal element  26  (e.g., a dendrite) at the surface of chalcogenide material  24 . Metal element  26  will grow until the defect is bridged (i.e., returned to a low resistance state). Although metal element  26  is depicted in FIG. 2C as substantially oval, metal element  26  may assume any suitable shape.  
         [0017]    In this manner, defects and breaks in interconnection pathways can be repaired in-situ. Additionally, as described above, this repair mechanism is self-regulating as it will only operate when the defect resistance becomes high and will turn-off when the repair is complete. Accordingly, the present self-healing interconnection system provides for increased system reliability.  
         [0018]    While preferred embodiments of the present invention have been shown in the drawings and described above, it will be apparent to one skilled in the art that various embodiments of the present invention are possible. For example, the present invention may be used to cure interconnection pathways in 3-dimensional circuits or any semiconductor or integrated circuit application. Therefore, the present invention should not be construed as limited to the specific form shown and described above.