Abstract:
A method for fabricating a substrate structure is provided, which includes the steps of: disposing at least a strengthening member on a carrier; sequentially forming a first circuit layer and a dielectric layer on the carrier, wherein the strengthening member is embedded in the dielectric layer; forming a second circuit layer on the dielectric layer; removing the carrier; and forming an insulating layer on the first circuit layer and the second circuit layer. The strengthening member facilitates to reduce thermal warping of the substrate structure.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to substrate structures and fabrication methods thereof, and more particularly, to a substrate structure and a fabrication method thereof for reducing thermal warping. 
         [0003]    2. Description of Related Art 
         [0004]    Along with the rapid development of electronic industries, electronic products are required to be reduced in thickness, and accordingly thin type substrates are needed. 
         [0005]      FIGS. 1A to 1G  are schematic cross-sectional views showing a method for fabricating a substrate structure according to the prior art. 
         [0006]    Referring to  FIG. 1A , a carrier  10  is provided and a seed layer  11  is formed on opposite surfaces of the carrier  10 . 
         [0007]    Referring to  FIG. 1B , a patterned resist layer  12  having a plurality of openings is formed on the seed layer  11 . Thereafter, a first circuit layer  13  is formed in the openings of the patterned resist layer  12  by electroplating. 
         [0008]    Referring to  FIG. 1C , the patterned resist layer  12  is removed. 
         [0009]    Referring to  FIG. 1D , a dielectric layer  14  is formed on the carrier  10  and the first circuit layer  13 . 
         [0010]    Referring to  FIG. 1E , a plurality of openings are formed in the dielectric layer  14 . Then, a second circuit layer  15  is formed on the dielectric layer  14 , and a plurality of conductive vias  15   a  are formed in the openings of the dielectric layer  14  and electrically connecting the first circuit layer  13  and the second circuit layer  15 . 
         [0011]    Referring to  FIG. 1F , the carrier  10  and the seed layer  11  are removed to expose the first circuit layer  13 . 
         [0012]    Referring to  FIG. 1G  an insulating layer  16  made of, for example, solder mask is formed on opposite surfaces of the dielectric layer  14 . As such, a substrate structure  1  is obtained. 
         [0013]    Through the above-described method, a thin type substrate structure is obtained. However, when the substrate structure is bonded with a chip and subjected to a molding process for forming a package structure, thermal warping easily occurs to the substrate structure. On the other hand, the molding compound generally has a thickness too small (for example, less than 0.5 mm) to overcome or balance thermal warping stresses, thus leading to warping of the overall package structure. 
         [0014]    Therefore, there is a need to provide a substrate structure and a fabrication method thereof so as to overcome the above-described drawbacks. 
       SUMMARY OF THE INVENTION 
       [0015]    In view of the above-described drawbacks, the present invention provides a method for fabricating a substrate structure, which comprises the steps of: disposing at least a strengthening member on a carrier and forming a first circuit layer on the carrier; forming a dielectric layer on the carrier, the strengthening member and the first circuit layer; forming a second circuit layer on the dielectric layer, wherein the second circuit layer is electrically connected to the first circuit layer; removing the carrier to expose the first circuit layer; and forming an insulating layer on the first circuit layer and the second circuit layer, wherein the insulating layer has a plurality of openings exposing portions of the first circuit layer and the second circuit layer. 
         [0016]    The present invention further provides a substrate structure, which comprises: a dielectric layer having opposite first and second surfaces; a first circuit layer formed on the first surface of the dielectric layer; a second circuit layer formed on the second surface of the dielectric layer and electrically connected to the first circuit layer; at least a strengthening member embedded in the dielectric layer; and an insulating layer formed on the dielectric layer, the first circuit layer and the second circuit layer and having a plurality of openings exposing portions of the first circuit layer and the second circuit layer. 
         [0017]    Therefore, by embedding the strengthening member in the dielectric layer, the present invention strengthens the substrate structure and also reduces variation in size of the dielectric layer per unit of temperature variation. As such, the present invention reduces thermal warping of the substrate structure. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0018]      FIGS. 1A to 1G  are schematic cross-sectional views showing a method for fabricating a substrate structure according to the prior art; 
           [0019]      FIGS. 2A to 2H  are schematic cross-sectional views showing a method for fabricating a substrate structure according to the present invention; 
           [0020]      FIGS. 3A and 3B  are schematic planar views of a substrate structure according to an embodiment of the present invention; 
           [0021]      FIG. 4  is a schematic planar view of a substrate structure according to another embodiment of the present invention; 
           [0022]      FIG. 5  is a schematic planar view of a substrate structure according to a further embodiment of the present invention; and 
           [0023]      FIG. 6  is a schematic cross-sectional view of a substrate structure according to still another embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
       [0024]    The following illustrative embodiments are provided to illustrate the disclosure of the present invention, these and other advantages and effects can be apparent to those in the art after reading this specification. 
         [0025]    It should be noted that all the drawings are not intended to limit the present invention. Various modifications and variations can be made without departing from the spirit of the present invention. Further, terms such as “first”, “second”, “on”, “a” etc. are merely for illustrative purposes and should not be construed to limit the scope of the present invention. 
         [0026]      FIGS. 2A to 2H  are schematic cross-sectional views showing a method for fabricating a substrate structure according to the present invention. 
         [0027]    Referring to  FIG. 2A , a carrier  20  having opposite first and second surfaces is provided and at least a strengthening member  27  is disposed on the first and second surfaces of the carrier  20 . The strengthening member  27  can be made of a laminating compound or an injection molding compound. Alternatively, the strengthening member  27  can be made of a metal material such as copper, or an organic material having high strength, for example, an ABS (acrylonitrile-butadiene-styrene) resin. The organic material has a tensile strength greater than 3200 kg/mm 2  and a coefficient of thermal expansion less than 5 ppm/deg. 
         [0028]    Referring to  FIG. 2B , a seed layer  21  is formed on the first and second surfaces of the carrier  20 . Then, a patterned resist layer  22  is formed on the seed layer  21  and covers the strengthening member  27 . The patterned resist layer  22  has a plurality of openings exposing portions of the seed layer  21 . In the present embodiment, the seed layer  21  is made of, for example, copper and formed by electroless plating or sputtering. 
         [0029]    Referring to  FIG. 2C , a first circuit layer  23  is formed on the exposed portions of the seed layer  21  by, for example, electroplating. 
         [0030]    Referring to  FIG. 2D , the patterned resist layer  22  is removed. 
         [0031]    Referring to  FIG. 2E , a dielectric layer  24  is formed to cover the first circuit layer  23 , the strengthening member  27  and the seed layer  21 . Further, a plurality of openings  24   a  are formed in the dielectric layer  24 , exposing portions of the first circuit layer  23 . In the present embodiment, the openings  24   a  are formed by laser drilling or mechanical drilling. The strengthening member  27  has higher strength than the dielectric layer  24 , and the strengthening member  27  is embedded in the dielectric layer  24 . 
         [0032]    Referring to  FIG. 2F , a second circuit layer  25  is formed on the dielectric layer  24 , and a plurality of conductive vias  25   a  are formed in the openings  24   a  of the dielectric layer  24  and electrically connecting the second circuit layer  25  and the first circuit layer  23 . 
         [0033]    Referring to  FIG. 20 , the carrier  20  and the seed layer  21  on the first and second surfaces of the carrier  20  are removed, thus exposing the first circuit layer  23  and the strengthening member  27 . 
         [0034]    Referring to  FIG. 2H , an insulating layer  26  is formed on the dielectric layer  24 , the strengthening member  27 , the first circuit layer  23  and the second circuit layer  25 , and has a plurality of openings exposing portions of the first circuit layer  23  and the second circuit layer  25 . As such, a substrate structure  2  is obtained. In the present embodiment, the insulating layer  26  is made of, for example, solder mask. 
         [0035]    The substrate structure  2  of the present invention has: a dielectric layer  24  having opposite first and second surfaces; a first circuit layer  23  formed on the first surface of the dielectric layer  24 ; a second circuit layer  25  formed on the second surface of the dielectric layer  24 ; a plurality of conductive vias  25   a  formed in the dielectric layer  24  and electrically connecting the second circuit layer  25  and the first circuit layer  23 ; at least a strengthening member  27  embedded in the dielectric layer  24 ; and an insulating layer  26  formed on the dielectric layer  24 , the first circuit layer  23  and the second circuit layer  25  and having a plurality of openings exposing portions of the first circuit layer  23  and the second circuit layer  25 . 
         [0036]    The insulating layer  26  can be made of solder mask. 
         [0037]    The strengthening member  27  can be made of a laminating compound, an injection molding compound, a metal material, or an organic material having high strength, for example, an ABS (acrylonitrile-butadiene-styrene) resin. 
         [0038]    The strengthening member  27  can have higher strength than the dielectric layer  24 . The strengthening member  27  facilitates to strengthen the substrate structure so as to reduce thermal warping of the substrate structure. 
         [0039]      FIGS. 3A and 3B  are schematic planar views of a substrate structure  3  according to an embodiment of the present invention; 
         [0040]    Referring to  FIGS. 3A and 3B , the strengthening member  37  of the substrate structure  3  has a frame structure that can be arranged inside the substrate structure  3 , as shown in  FIG. 3A , or arranged along an edge of the substrate structure  3 , as shown in  FIG. 3B . The frame structure can have, but not limited to, a rectangular shape, a circular shape or the like. 
         [0041]      FIG. 4  is a schematic planar view of a substrate structure  4  according to another embodiment of the present invention. 
         [0042]    Referring to  FIG. 4 , the strengthening member  47  of the substrate structure  4  is a copper pour that covers the dielectric layer of the substrate structure  4  except for the circuit layer. 
         [0043]      FIG. 5  is a schematic planar view of a substrate structure  5  according to a further embodiment of the present invention. 
         [0044]    Referring to  FIG. 5 , the strengthening member  57  of the substrate structure  5  consists of a plurality of columns that are distributed in the dielectric layer of the substrate structure  5  to thereby reduce variation in size of the dielectric layer per unit of temperature variation. 
         [0045]      FIG. 6  is a schematic cross-sectional view of a substrate structure  6  according to still another embodiment of the present invention. 
         [0046]    Referring to  FIG. 6 , the substrate structure  6  further has at least a dielectric layer and a third circuit layer formed on the second circuit layer. The third circuit layer is electrically connected to the second circuit layer. The strengthening member  67  can be optionally located in a single dielectric layer or penetrate through multiple dielectric layers. 
         [0047]    Therefore, by embedding the strengthening member in the dielectric layer, the present invention strengthens the substrate structure and also reduces variation in size of the dielectric layer per unit of temperature variation. As such, the present invention reduces thermal warping of the substrate structure. 
         [0048]    The above-described descriptions of the detailed embodiments are only to illustrate the preferred implementation according to the present invention, and it is not to limit the scope of the present invention. Accordingly, all modifications and variations completed by those with ordinary skill in the art should fall within the scope of present invention defined by the appended claims.