Abstract:
A system comprises a first operating environment and a second operating environment. The first and second operating environments exchange information in encrypted form using a shared encryption key (K 3 ). The first and second operating environments cooperate to change said encryption key K 3  using another shared encryption key (K 4 ). The encryption key K 4  is changed upon the encryption key K 3  being changed.

Description:
BACKGROUND 
       [0001]    Many computing systems comprise multiple, generally independent operating environments such as an operating system (OS) and a basic input/output system (BIOS). Such operating environments communicate with each other. In at least some instances, unfortunately the communication mechanism between the operating environments is susceptible to being snooped by unauthorized entities such as “viruses.” 
     
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0002]    For a detailed description of exemplary embodiments of the invention, reference will now be made to the accompanying drawings in which: 
           [0003]      FIG. 1  shows a system in accordance with embodiments of the invention; 
           [0004]      FIG. 2  shows a method of changing keys shared between at least two operating environments in accordance with embodiments of the invention; 
           [0005]      FIGS. 3A and 3B  show another illustrative method of changing shared keys; and 
           [0006]      FIG. 4  shows a method of resetting keys shared between at least two operating environments in accordance with embodiments of the invention. 
       
    
    
     NOTATION AND NOMENCLATURE 
       [0007]    Certain terms are used throughout the following description and claims to refer to particular system components. As one skilled in the art will appreciate, computer companies may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following discussion and in the claims, the terms “including” and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to . . . .” Also, the term “couple” or “couples” is intended to mean either an indirect, direct, optical or wireless electrical connection. Thus, if a first device couples to a second device, that connection may be through a direct electrical connection, through an indirect electrical connection via other devices and connections, through an optical electrical connection, or through a wireless electrical connection. 
       DETAILED DESCRIPTION 
       [0008]      FIG. 1  shows an embodiment of a system  50  comprising a processor  52 , a system read only memory (ROM)  54  and storage  59 . The system ROM  54  stores a basic input/output system (BIOS)  56  that is code which is executable by processor  52 . The BIOS  56  comprises power on-self test (POST) that tests and initializes the system  50  during boot-up. BIOS  56  also provides low-level interfaces to various of peripheral components (e.g., floppy disk drive, hard drive, keyboard, etc.) of the system  50 . 
         [0009]    Storage  59  comprises volatile memory such as random access memory (RAM), non-volatile storage such as ROM, a hard disk drive, etc., or combinations thereof. The storage  59  stores an operating system (OS)  62  which also comprises code that is executed by the processor  52 . One or more applications/drivers  64  may be present that run under the OS  62  and are executed by processor  52 . 
         [0010]    The BIOS  56  and OS  62  comprise two software operating environments that communicate with each other via a secure communication mechanism. The following description is provided in the context of the BIOS  56  and OS  62 , but can apply in general to other operating environments. To the extent any of the following actions are attributed to the OS  62 , such actions may be performed by the OS itself or one or more of the applications/drivers  64  that run under the OS. 
         [0011]    The BIOS  56  and OS  62  communicate with each other by encrypting commands and data to be transferred back and forth therebetween. In accordance with embodiments of the invention, the encryption protocol comprises a symmetrical encryption protocol meaning that the BIOS  56  and OS  62  each uses a copy of the same encryption key. For example, the OS  62  uses the encryption key to encrypt a request to send to the BIOS  56 , and the BIOS  56  uses its copy of the same encryption key to decrypt the encrypted request. The “shared” encryption key is used to encrypt information in either direction—from OS  62  to BIOS  56  and vice versa. 
         [0012]    It is theoretically possible for an entity (e.g., a virus) to snoop encrypted communications between the BIOS  56  and the OS  62  to determine the encryption key that is used. To reduce the possibility of such an unauthorized entity to snoop the communications between the BIOS  56  and OS  62  to deduce the encryption key, a security mechanism is implemented to update the shared key. The security mechanism causes the BIOS  56  and OS  62  to change their shared key in a secure manner. That is, the manner in which the shared key is updated is itself secure. The shared key update procedure can be scheduled to be performed at predetermined or programmable time periods (e.g., once per hour, once per day, etc.) or upon the occurrence of n number of communications between the BIOS  56  and OS  62  (e.g., with each communication packet or every five communication packets). 
         [0013]    Referring again to  FIG. 1 , system ROM  54  contains storage for various encryption keys  58  labeled as K 1 , K 2 , K 3  and K 4 . A copy of keys K 1  and K 2  are loaded into system ROM  54  and, in accordance with some embodiments of the invention, are not erasable, over-writeable, or otherwise eradicated. Keys K 3  and K 4  can be erased and overwritten as will be explained below. The K 1 -K 4  keys  58  on the system ROM may be part of the BIOS  56  or may be separate from the BIOS  56 . The OS  62  also has access to a set of keys K 1 -K 4   66 . In accordance with illustrative embodiments, the keys K 1 -K 4   66  for the OS are identical to the keys K 1 -K 4   58  for the BIOS  56 . As for the BIOS keys  58 , in some embodiments a copy of keys K 1  and K 2  for the OS  62  are protected from being overwritten or otherwise eradicated. The keys K 3  and K 4  for the OS can be erased and overwritten. 
         [0014]    The term “key” as used herein (e g., K 3 ) refers to the value of the key. Thus, the value of K 3  can be changed to a new value that will still be referred to as K 3 . 
         [0015]    As shown in  FIG. 1 , each of the BIOS  56  and OS  62  has access to a shared encryption key for purposes of encrypting information to be exchanged between the BIOS  56  and OS  62 . In accordance with embodiments of the invention, the encryption process is symmetrical encryption meaning that the same key value used to encrypt information is also used during the decryption process. For example, the OS  62  uses its copy of shared key K 1  to encrypt information (e.g., commands, data) to be sent to the BIOS  56 . The BIOS  56  uses its copy of shared key K 1  to decrypt the received communication and recover the underlying information. The BIOS  56  can also send encrypted information to the OS  62  and, to that end, BIOS  56  uses key K 1  to encrypt such information and OS  62  uses key K 1  to decrypt. The OS  62  and BIOS  56  thus exchange information in encrypted form using a shared encryption key (e.g., K 1 ). Shared key K 2  is used during the key update procedure shown in the example of  FIG. 2 . 
         [0016]    As discussed above, it is possible to deduce the value of a symmetric encryption key by monitoring the encrypted packets passed back and forth. Thus, encryption key K 1  could be deduced by monitoring the encrypted information exchanged between the BIOS  56  and OS  62 . In accordance with embodiments of the invention, a mechanism is provided by which the encryption key used to encrypt information between two operating environments (e.g., the BIOS  56  and OS  62 ) is changed. Further, changing the encryption key is performed in a way that itself is secure so that the new value of the encryption key is not compromised. Shared symmetrical encryption key K 2  is used for purposes of changing encryption key K 1  in a way that helps to verify that only an authorized entity is attempting to change K 1 . Upon changing key K 1 , key K 2  is also changed. Further, in accordance with various embodiments of the invention, the current value of key K 2  is used only during the process of changing key K 1  during which K 2  is also changed. That is, during the process of changing K 1 , key K 2  is also set to a new value which is then used the next time key K 1  is to be changed. Because the current value of K 2  is used to assist in changing K 1  one time (although K 2  may be used more than once each time K 1  is changed), its value cannot reasonably be deduced by unauthorized entities monitoring traffic between the BIOS  56  and the OS  62 . In some embodiments, K 1  and K 2  are changed. In other embodiments, to ensure that the BIOS  56  and OS  62  can communicate with one another even in the event of an error of some sort, keys K 1  and K 2  remain unchanged; instead, a copy of keys K 1  and K 2  (discussed herein as keys K 3  and K 4 , respectively) is used to encrypt/decrypt messages and perform the key update process. In the event of an error, the system can revert back to K 1  and K 2 . 
         [0017]    In accordance with embodiments of the invention, one of the BIOS  56  and OS  62  requests the other of the BIOS and OS to compute a new encryption key value for K 1  and K 2 . In one embodiment, the OS  62  requests the BIOS  56  to compute new values for K 1  and K 2 . During this process, key K 2  is used by the BIOS  56  to verify the OS&#39;s request to change the encryption key K 1 . Further, key K 2  is also used by the OS  62  to verify the communication from the BIOS back to the OS with the new value of K 1  and K 2 . Using K 2  to verify the communications between the OS  62  and BIOS  56  helps to prevent an unauthorized entity from exchanging a new key pair with either or both of the OS or BIOS. In the embodiments described herein, only those computing environments (e.g., the BIOS  56  and OS  62 ) that have access to the shared key K 2  can effectuate a change in keys K 1  and K 2 . 
         [0018]    In accordance with at least some embodiments of the invention, the system  50  is provided to a user of the system with the values of K 3  and K 4  being set to the values of K 1  and K 2 , respectively, for both the BIOS  56  and OS  62 . That is, initially K 3  equals K 1  and K 4  equals K 2  for both the BIOS  56  and OS  62 . During an install process for system  50 , keys K 3  and K 4  are changed for both the BIOS  56  and OS  62  in accordance with the method described below. From that point on, encryption between the BIOS  56  and OS  62  uses key K 3 , and key K 4  is used to change key K 3  with a resulting change to K 4  as well. 
         [0019]    In some embodiments, keys K 1  and K 2  for both the BIOS  56  and OS  62  are not erasable thereby providing the system  50  the ability to revert back to a known functional set of keys (K 1  and K 2 ) as desired or needed. For example, if storage  59  malfunctions and is replaced, the replacement hard drive will have the original values for K 1  and K 2  with keys K 3  and K 4  mirroring keys K 1  and K 2 . Keys K 3  and K 4  on system ROM  54  can also be set back to the initial values of K 1  and K 2 . 
         [0020]    Referring to  FIG. 2 , an example of a key change process  80  is shown comprising actions  82 - 90 . The process  80  of  FIG. 2  describes the BIOS  56  computing new values for K 1  and K 2  at the request of the OS  62 . In other embodiments, the roles of the BIOS  56  and OS  62  are reversed with the BIOS  56  requesting the key update and the OS  62  computing the new key values. 
         [0021]    At  82 , the OS  62  requests the BIOS  56  to generate a replacement set of key values for shared keys K 3  and K 4 . At  84 , the BIOS  56 , through use of K 4 , verifies the OS&#39;s request. If the BIOS  56  successfully verifies the OS&#39;s request, then at  86  the BIOS computes a new set of encryption key values (K 5  and K 6 ) and provides the new key values K 5  and K 6  to the OS  62 . The key values K 5  and K 6  are transient in nature meaning that they are only used, in at least some embodiments, for purposes of changing the values of K 3  and K 4 . If the BIOS  56  fails to verify the OS&#39;s request, then the process stops or performs another suitable action (e.g., annunciate an alert). 
         [0022]    Referring still to  FIG. 2 , at  88 , through the use again of K 4 , the OS  62  verifies the communication from the BIOS  56  containing the new encryption key set (K 5 , K 6 ). If the OS  62  successfully verifies the BIOS&#39; communication, then at  90  the OS replaces the OS&#39;s copy of the K 3  and K 4  keys with the new keys K 5  and K 6 . That is, K 5  is used to overwrite K 3  and K 6  is used to overwrite K 4 . A message is sent by the OS to the BIOS that the OS has accepted the new keys and the BIOS then also replaces its copy of the K 3  and K 4  keys with the value of the new keys K 5  and K 6 . 
         [0023]    The key change process  100  of  FIGS. 3A and 3   b  explains in more detail some of the actions of  FIG. 2 . At  102 , the OS  62  requests the BIOS  56  to provide a random number to the OS. The term “random number” (RN) comprises a number that is sufficiently random to be usable in conjunction with the embodiments described herein. Thus, the random number need not be a mathematically truly random number. At  104 , the BIOS  56  generates a random number, modifies the random number using key K 3 , and provides the modified random number to the OS  62  Generating the random number can be via any suitable technique such as by sampling an analog parameter (e.g., heat, noise, etc.) and using the sample to generate the random number. In at least one embodiment, the modification to the random number comprises performing an exclusive-OR operation in which the random number is exclusive-ORed with K 3 . At  106 , the OS  62  receives the modified random number and recovers the original random number. In the example in which the random number was exclusive-ORed with K 3  by BIOS  56 , the OS  62  recovers the random number by exclusive-ORing the modified random number and the OS&#39;s copy of K 3 . 
         [0024]    At  108 , the OS  62  computes a Hash function-based Message Authentication Code (HMAC) using K 4  and the random number recovered  106  to produce an output value, HMAC_OS 1 . An HMAC is usable to verify the authenticity of a source entity that sends a communication to a destination entity. Other mechanisms besides HMAC are possible and within the scope of the disclosure. At  110 , the OS  62  provides the HMAC_OS 1  value to the BIOS  56  and requests the BIOS to generate a new set of keys to replace shared keys K 3  and K 4 . Before the BIOS  56  generates the new key values, the BIOS verifies that the request is from an authorized source (i.e., OS  62 ). The BIOS performs this verification by computing its own HMAC (called HMAC_BIOS 1 ) at  112  using the random number the BIOS generated at  104  and also using the BIOS&#39; copy of K 4 , which will be the same values used by the OS  62  to generate the HMAC_OS 1  value. Accordingly, the HMAC values computed by the OS  62  and the BIOS  56  should match. The HMAC values will not match, however, if an unauthorized entity provided an HMAC value to the BIOS because such unauthorized entity will not have access to the correct values of K 4  and/or the random number and thus will have computed a mismatching HMAC value. 
         [0025]    At  114 , the BIOS  56  compares the HMAC_OS 1  and HMAC_BIOS 1  values to determine if the values match. If the values do not match, the process fails and stops at  116 . An alert or other suitable response can be performed in this situation as desired. If, however, the HMAC_OS 1  and HMAC_BIOS 1  values, the method continues at  118  at which the BIOS generates a new key pair, K 5  and K 6 . Such keys can be computed in accordance with any suitable technique. 
         [0026]    At  120 , the BIOS computes another HMAC value, this time using the BIOS&#39; copy of K 4  and another value that is the combination of K 5 , K 6 , and the random number generated at  104 . The resulting HMAC value at  120  is called HMAC_BIOS 2  and, as explained below, will be used by the OS  62  to verify the new key values K 5  and K 6  are transmitted to the OS by an authorized source (i.e., the BIOS  56 ). The values of K 5 , K 6 , and the random number are combined together, in at least one embodiment, by concatenating such values together. Other techniques for combining K 5 , K 6  and the random are possible as well and within the scope of this disclosure. 
         [0027]    Referring still to  FIG. 3A , at  122 , the BIOS computes a hash of K 4  and the random number generated at  104  to produce a value called Hash_BIOS. Any suitable hash function can be used in this regard. At  124 , the BIOS  56  modifies the newly computed keys K 5  and K 6  using the Hash_BIOS value to produce modified versions of K 5  and K 6 . As such, K 5  is modified using Hash_BIOS and K 6  is also modified using Hash_BIOS. In at least some embodiments, the modification to the K 5  and K 6  values comprises exclusive-ORing each of the K 5  and K 6  values with the Hash_BIOS value. At  126 , the BIOS  56  provides the modified K 5 , modified K 6  and the HMAC_BIOS 2  values to the OS  62 . 
         [0028]    At  128  ( FIG. 3B ), the OS  62  receives the modified K 5  and K 6  values as well as the HMAC_BIOS 2  value. At  130 , the OS  62  computes a hash (using the same hash function as was used by the BIOS at  122 ) of the OS&#39; copy of K 4  and the random number provided to the OS by the BIOS at  104 . The hash value computed at  130  is called Hash_OS. At  132 , the OS  62  recovers the original versions of K 5  and K 6  from the modified versions of K 5  and K 6  by using the hash computed at  130 . In embodiments in which K 5  and K 6  were modified by exclusive-ORing K 5  and K 6  with the Hash_BIOS value, the recovery operation is performed by exclusive ORing the modified versions of K 5  and K 6  with Hash_OS. 
         [0029]    At  134 , the OS computes an HMAC value using K 4  and a combination of K 5 , K 6  (recovered in  132 ) and the random number from  104 . In at least some embodiments, the values of K 5 , K 6  and the random number are combined together in  134  in the same way as such values were combined together in  120  (e.g., concatenation). The resulting HMAC value from  134  is called HMAC_OS 2 . The OS  62  compares at  136  HMAC_OS 2  with HMAC_BIOS 2  to verify that the source of the new keys K 5  and K 6  is an authorized entity (e.g., BIOS  56 ). If the HMAC values do not match in  136 , then the key update process terminates in failure at  138 . Otherwise, at  140  the OS accepts the new keys K 5  and K 6  from BIOS  56  by using K 5  and K 6  to overwrite K 3  and K 4 , respectively. At  142 , the OS  62  informs the BIOS  56  that the OS has received and accepted the new key values K 5  and K 6 . This acknowledgment causes the BIOS  56  to use its copy of K 5  and K 6  to overwrite its copy of K 3  and K 4 , thereby replacing the previous values of K 3  and K 4  with the values of K 5  and K 6 . 
         [0030]    In addition to being able to update the shared keys K 3  and K 4  used between the BIOS  56  and OS  62 , the security mechanism of the disclosed embodiments also permits a reset to occur by which the BIOS  56  and OS  62  reset their shared keys to a prior known set of keys, K 1  and K 2  so that keys K 1  and K 2  can be used for encryption/decryption and key update purposes.  FIG. 4  provides an illustrative method  150  depicting this process. At  152 , the OS  62  prompts the user to enter an administration password, which the user does at  154 . At  156 , the administration password is verified and then encrypted with key K 1 . At  158 , the OS sends the encrypted administration password to the BIOS  56  which then decrypts and validates the encrypted password ( 160 ). The BIOS  56  then resets to keys K 1  and K 2 . This reset operation is performed in some embodiments using the values of K 1  and K 2  to overwrite the values of K 3  and K 4  in storage  66 . Similarly, the OS resets to keys K 1  and K 2  by, for example, using the OS&#39; values of K 1  and K 2  to overwrite the OS&#39; values of K 3  and K 4  in storage  58 . 
         [0031]    In accordance with at least some of the embodiments of the invention, no two systems will have the same Kodd and Keven. Thus, even if an attacker gains access to the key pair on one system, such knowledge will be of no use to attack other systems thereby protecting against a global attack. 
         [0032]    The above discussion is meant to be illustrative of the principles and various embodiments of the present invention. Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. It is intended that the following claims be interpreted to embrace all such variations and modifications.