Abstract:
A method of measuring group delay of a device under test is provided. The method includes the steps of providing an analog input signal with a predetermined period to the device under test to obtain a delayed output signal from the device under test, converting the analog input signal and the delayed output signal into first and second digital signals, generating a phase difference signal indicative of a phase difference between the first and the second digital signals, and determining the group delay of the device under test based on the predetermined period and average signal level of the phase difference voltage and average signal level of the first digital signal.

Description:
CROSS REFERENCE TO RELATED APPLICATION  
       [0001]     This is a continuation-in-part of a U.S. patent application Ser. No. 10/262,746, filed on Oct. 2, 2002, which application is incorporated by reference. 
     
    
     BACKGROUND OF THE INVENTION  
       [0002]     1. Field of the Invention  
         [0003]     The present invention relates to a method and apparatus for measuring group delay of a device under test, more particularly, to a method and apparatus for measuring group delay of a device under test that utilize a single-tone analog input signal.  
         [0004]     2. Description of the Related Art  
         [0005]     Group delay of most electronic devices will result in non-negligible influences. For example, in a data storage system, if group delay of an internal electronic device of the data storage system cannot be managed, correct timing sequence during data reproduction cannot be ensured, which can result in incorrect decoding of data. Furthermore, for digital communication systems, if group delay cannot be properly processed, non-linear distortion of transmission signals cannot be avoided. As such, measurement of group delay of an electronic device is very important.  
         [0006]     In a conventional method of measuring group delay (T gd ) of a device under test having a high cut-off frequency band, a multi-tone signal, which is a high frequency signal, is provided to the device under test. As shown in  FIG. 1 , the multi-tone signal, which is provided from a multi-tone input source, includes two high frequency components  11  &amp;  12 . There exists a frequency difference (Δf) between the high frequency components  11  and  12 . For example, the high frequency components  12 ,  11  may be 40 MHz and 40.05 MHz, respectively. A phase difference (ΔP) between the high frequency components  11 ,  12  can be calculated by discrete Fourier transform using relevant analysis instruments after passing the device under test (DUT). As such, the group delay (T gd ) equal to −ΔP/Δf may be obtained accordingly.  
         [0007]     However, in order to obtain a precise measurement, the analysis instruments used in the aforesaid method must include a high-speed digitizer for high-speed digitizing of the high frequency components  11 ,  12 , and a high-resolution measuring device for calculating the phase difference (ΔP). Unfortunately, the high-speed digitizer and the high-resolution measuring device are very expensive and use of the same results in high costs.  
       SUMMARY OF THE INVENTION  
       [0008]     Therefore, the objective of the present invention is to provide a method and apparatus for measuring group delay of a device under test at a relatively low cost.  
         [0009]     According to one aspect of the present invention, a method of measuring group delay (T gd ) of a device under test, comprising the steps of: 
    (a) providing an analog input signal with a predetermined period (T) to the device under test to obtain a delayed output signal from the device under test;     (b) converting the analog input signal and the delayed output signal into first and second digital signals, respectively;     (c) generating a phase difference signal indicative of a phase difference between the first and the second digital signals; and     (d) determining the group delay (T gd ) of the device under test based on the predetermined period and average signal levels of the phase difference voltage and the first digital signal.    
 
         [0014]     According to another aspect of the present invention, a method of measuring group delay (T gd ) of a device under test, comprising the steps of: 
    (a) providing an analog input signal having a predetermined period;     (b) converting the analog input signal into first and second calibrating digital signals;     (c) generating a calibrating phase difference signal indicative of a phase difference between the first and the second calibrating digital signals;     (d) providing the analog input signal to the device under test to obtain a delayed output signal from the device under test;     (e) converting the analog input signal and the delayed output signal into first and second measuring digital signals, respectively;     (f) generating a measuring phase difference signal indicative of a phase difference between the first and the second measuring digital signals; and     (g) determining the group delay (T gd ) of the device under test based on the predetermined period, average signal level of the calibrating phase difference signal, average signal level of the measuring phase difference signal, average signal level of the first measuring digital signal, and average signal level of the first calibrating digital signal.    
 
         [0022]     According to still another aspect of the present invention, an apparatus for measuring group delay (T gd ) of a device under test that has input and output ends, the apparatus includes a signal source, a first analog-to-digital converter, a second analog-to-digital converter, a phase detector, a average voltage calculator, and a decision unit. The signal source, coupled to the input end of the device under test, provides an analog input signal having a predetermined period (T) to the input end of the device under test, thereby enabling the device under test to generate a delayed output signal at the output end thereof. The first analog-to-digital converter, coupled to the signal source, converts the analog input signal into a first digital signal. The second analog-to-digital converter, coupled to the output end of the device under test, converts the delayed output signal into a second digital signal. The phase detector, coupled to the first and second analog-to-digital converters, generates a phase difference signal between the first and second digital signals. The average unit is for calculating average signal level of the first digital signal and average voltage of the phase difference signal. The decision unit determines the group delay (T gd ) of the device under test according to the predetermined period, the average voltage of the first digital signal and average voltage of the phase difference signal. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0023]     Other features and advantages of the present invention will become apparent in the following detailed description of the preferred embodiment with reference to the accompanying drawings, of which:  
         [0024]      FIG. 1  illustrates two frequency components of a multi-tone signal used in a conventional method of measuring group delay.  
         [0025]      FIG. 2  is a schematic circuit block diagram illustrating the preferred embodiment of an apparatus for measuring group delay of a device under test.  
         [0026]      FIG. 3  shows a schematic circuit block diagram illustrating the preferred embodiment when the calibrating unit operates in a measuring mode.  
         [0027]      FIG. 4  shows waveforms of various signals as the circuitry of  FIG. 3  is operated in the measuring mode.  
         [0028]      FIG. 5  illustrates the schematic diagram of one another embodiment of the present invention.  
         [0029]      FIG. 6  is a schematic circuit block diagram illustrating the preferred embodiment when the calibrating unit operates in a calibrating mode. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT  
       [0030]     Referring to  FIG. 2 , the preferred embodiment of an apparatus for measuring group delay (T gd ) of a device under test  2  according to the present invention is shown to include a signal source  31 , a calibrating unit  32 , a first analog-to-digital converter  33 , a second analog-to-digital converter  34 , a phase detector  35 , an average unit  36 , and a decision unit  38 . The device under test  2  has input and output ends  21 ,  22 .  
         [0031]     The signal source  31  is adapted to be connected to the input end  21  of the device under test so as to provide an analog input signal (S i ), which is a single-tone signal, having a predetermined period (T) to the input end  21  of the device under test  2 , thereby enabling the device under test  2  to generate a delayed output signal (S d ) at the output end  22  thereof. In this embodiment, the analog input signal (S i ) provided by the signal source  31  is a sinusoidal wave signal.  
         [0032]     The calibrating unit  32  has a first input  321  coupled to the input end  21  of the device under test  2 , a second input  322  adapted to be connected to the output end  22  of the device under test  2 , and first and second outputs  323 ,  324 . The calibrating unit  32  is operable in a selected one of a calibrating mode and a measuring mode. In this embodiment, the calibrating unit  32  is a multiplexer. Such that, while operated in the calibrating mode, the calibrating unit  32  is multiplexed to output the analog input signal (S i ) simultaneously at the first and second outputs  323 ,  324 . While operated in the measuring mode (see  FIG. 3 ), the calibrating unit  32  is multiplexed to output the analog input signal (S i ) and the delayed output signal (S d ) at the first and second outputs  323 ,  324 , respectively.  
         [0033]     Please refer to  FIG. 3  and  FIG. 4 .  FIG. 3  shows a schematic circuit block diagram illustrating the preferred embodiment when the calibrating unit operates in a measuring mode.  FIG. 4  shows waveform of various signals as the circuitry of  FIG. 3  is operated in the measuring mode. The first analog-to-digital converter  33  is connected to the first output  323  of the calibrating unit  32 , and the second analog-to-digital converter  34  is connected to the second output  324  of the calibrating unit  32 . When the calibrating unit  32  is operated in the measuring mode, the first analog-to-digital converter  33  receives the analog input signal (S i ) from the first output  323  of the calibrating unit  32 , and converts the analog input signal (S i ) into a first digital signal (S 1 ), while the second analog-to-digital converter  34  receives the delayed output signal (S d ) from the second output  324  of the calibrating unit  32 , and converts the delayed output signal (S d ) into a second digital signal (S 2 ) (as shown in  FIG. 4 ).  
         [0034]     In one embodiment of the present invention, the first analog-to-digital converter  33  and the second analog-to-digital converter  34  are implemented as slicers for slicing the input signals of the analog-to-digital converter  33  and analog-to-digital converter  34  into rectangular wave.  
         [0035]     The phase detector  35 , coupled to the first and second analog-to-digital converters  33 ,  34 , receives the first and second digital signals (S 1 , S 2 ) from the first and second analog-to-digital converters  33 ,  34 , detects and measures phase difference between the first and second digital signals (S 1 , S 2 ) (see  FIG. 4 ) to accordingly generate a measuring phase difference signal (S p ). Then, the average unit  36  calculates an average signal level of the measuring phase difference signal S p , and an average signal level of the first digital signal S 1 . As illustrated in  FIG. 4 , the average signal level of the first digital signal S 1 , which is an average voltage V av , equals to ½*V 0 *T/T, where V 0  is a high voltage level of the first digital signal. The average signal level of the measuring phase difference signal S p , which is an average voltage V avp , equals to T gd *V 0 /T. In one embodiment of the present invention, the average unit  36  is a low-pass filter which averages the signal levels by low-pass filtering the voltage levels of the measuring phase difference signal and the first digital signal. Therefore, the decision unit  38  determines the group delay (T gd ) of the device under test  2  which is concluded as an equation of T gd =½*T*(V avp /V av ), where the period (T) of the analog input signal is known.  
         [0036]     Please refer to  FIG. 5 , the schematic diagram of one another embodiment of the present invention. In this case of the embodiment, the high level voltage V 0  of the first digital signal is predetermined as a known value. Such that, the group delay (T gd ) could be obtained according to the average signal level of the measuring phase difference and the predetermined voltage level V 0 . While the average unit  36  obtains the average signal level of the measuring phase difference signal by calculating an average voltage V avp  of the measuring phase difference signal, the decision unit  38  also determines the group delay T gd  by the relationship of T gd =V avp *T/V 0 .  
         [0037]     It is noted that, in an ideal condition (i.e., the effect of the device mismatch of the present invention is limited), a group delay difference ΔT gd  occurred between the path of calibrating unit  32 , through the first analog-to-digital  33  and the path of calibrating unit  32 , through the second analog-to-digital  34  is substantially eliminated. Such that, the group delay (T gd ) can be simplified to equal to T gd =½*T*(V avp /V av ). However, for real circuitry, calibration of the group delay difference ΔT gd  is required in order to obtain precise group delay. In this case, a calibrating phase difference signal is generated for calibrating the group delay difference ΔT gd . Referring to  FIG. 6 , when the calibrating unit  32  is operated in the calibrating mode, the first analog-to-digital converter  33  receives the analog input signal (S i ) from the first output  323  of the calibrating unit  32 , and converts the analog input signal (S i ) into a first digital signal (S 1 ). The second analog-to-digital converter  34  is connected to the second output  324  of the calibrating unit  32 . The second analog-to-digital converter  34  receives the analog input signal (S i ) from the second output  324  of the calibrating unit  32 , and converts the analog input signal (S i ) into a third digital signal (S 3 ). The phase detector  35 , coupled to the first and second analog-to-digital converters  33 ,  34 , receives the first and second digital calibrating signals (S 1 , S 3 ) from the first and second analog-to-digital converters  33 ,  34 , detects and measures phase difference between the first and second digital calibrating signals (S 1 , S 3 ) to accordingly generate the calibrating phase difference signal (S p′ ).  
         [0038]     Similarly, the average unit  36  calculates an average voltage of the calibrating phase difference signal S p′  (i.e. V avp′ ) and an average voltage of the first digital signal S i  (i.e. V av ). Thus the decision unit  38  can determine the group delay difference ΔT gd  of the path from the calibrating unit  32  to the phase detector  35 . In this manner, the precise group delay is concluded as: 
 
 T   gd =½ *T *( V   avp   /V   av )− ΔT   gd =½ *T *( V   avp   /V   av )−½ *T *( V   avp′   /V   av ). 
 
         [0039]     In summary, the preferred embodiment uses the phase detector  35  so as to obtain the phase difference signal (S p ) between the first and second digital signals (S 1 , S 2 ) converted from the analog input signal (S i ) and the delayed output signal (S d ). Finally, by simply using the relationship between period (T) of the analog input signal, average voltage of the phase difference signal (S p ), and the average voltage of the first digital signal S 1  (or the average voltage of the second digital signal S 2  having the same period T), a precise group delay can be obtained. Therefore, there is no need to calculate the phase difference occurred between different frequency components of the output multi-tone signals, such that the expensive high-speed digitizer and high-resolution measuring device used in the prior art can be eliminated, thereby resulting in lower costs. The objective of the invention is thus met.  
         [0040]     While the present invention has been described in connection with what is considered the most practical and preferred embodiment, it is understood that this invention is not limited to the disclosed embodiment but is intended to cover various arrangements included within the spirit and scope of the broadest interpretation so as to encompass all such modifications and equivalent arrangements.