Abstract:
A timing control circuit for an electronic device is disclosed. The timing control circuit includes a first power supply voltage input, a second power supply voltage input, a third power supply voltage input, a first output, a second output, a switch circuit and a control circuit. The control circuit is connected with the switch circuit and configured to turn the switch circuit on/off. The switch circuit is connected between the first power supply voltage input and the first output and responds to the control circuit to delay, by means of adjustable (different capacitance values) capacitors, the power connections when the electronic device is turned on but to immediately disconnect the power connections when the electronic device is shut down, thereby controlling the sequence of power applications and avoiding the need for expensive chips or circuits.

Description:
BACKGROUND 
     1. Technical Field 
     Embodiments of the present disclosure relate to power supply management circuits and, particularly, to a timing control circuit and electronic device using the same. 
     2. Description of related art 
     Many electronic devices use dedicated chips to control the sequence of the power supplies of a display when the electronic devices are started, however, using such dedicated chips are expensive. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a block diagram of one embodiment of a power supply circuit for a display of an electronic device. 
         FIG. 2  is a detail circuit diagram of one embodiment of the timing control circuit in  FIG. 1 . 
     
    
    
     DETAILED DESCRIPTION 
     The disclosure, including the accompanying drawings in which like references indicate similar elements, is illustrated by way of examples and not by way of limitation. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean “at least one.” 
       FIG. 1  is a block diagram of one embodiment of a power supply circuit of an electronic device  10 . The electronic device  10  includes a power supply transforming circuit  110 , a working circuit  120  and a timing control circuit  130 . When the electronic device  10  is turned on, the power supply transforming circuit  110  converts an outer power supply voltage into a first power supply voltage V 1 , a second power supply voltage V 2  and a third power supply voltage V 3 . The first power supply voltage V 1  and the second power supply voltage V 2  are supplied to the working circuit  120 , and the third power supply voltage V 3  is supplied to the timing control circuit  130 . The working circuit  120  is a dedicated circuit or chip for realizing a particular function, such as a display circuit, a storage circuit or a processor. The timing control circuit  130  is connected between the power supply transforming circuit  110  and the working circuit  120  for controlling the sequence of application of the first power supply voltage V 1  and the second power supply voltage V 2  supplied to the working circuit  120 . 
     The timing control circuit  130  includes a first power supply voltage input  1301 , a second power supply voltage input  1032 , a third power supply voltage input  1303 , a first output  1304 , a second output  1305 , a control circuit  1306 , and a switch circuit  1307 . The first power supply voltage input  1301  receives the first power supply voltage V 1 , the second power supply voltage input  1302  receives the second power supply voltage V 2 , and the third power supply voltage input  1303  receives the third power supply voltage V 3 . The first output  1304  outputs the first power supply voltage V 1 , the second output  1305  outputs the second power supply voltage V 2 . The control circuit  1306  is connected between the third power supply voltage input  1303  and the switch circuit  1307 , and can turn on and turn off the switch circuit  1306 . The switch circuit  1307  is connected between the first power supply voltage input  1301  and the first output  1304 , and connects or disconnects the first power supply voltage input  1301  and the first output  1304  in response to the control circuit  1306 . The second output  1305  is directly connected to the second power supply voltage input  1302 . When the electronic device  10  is turned on, the control circuit  1306  receives the third power supply voltage V 3  and delays the switching on of the switch circuit  1307 , so the first power supply voltage V 1  is supplied to the working circuit  120  later than the second power supply voltage V 2 . When the electronic device is shut down, the control circuit  1306  causes the switch circuit  1307  to cut off immediately and stops the power supply voltage V 1  supplying the working circuit  120  earlier than the delayed second power supply voltage V 2 . 
       FIG. 2  is a detailed circuit diagram of the timing control circuit in  FIG. 1 . The working circuit  120  is a display circuit  140  of the electronic device  10 . The power supply transforming circuit  110  includes a power input  1100  for receiving an outer power supply voltage and a first power supply voltage output  1101 , a second power supply voltage output  1102 , and a third power supply voltage output  1103 . The power supply transforming circuit  110  converts the outer power supply voltage into the first power supply voltage V 1 , the second power supply voltage V 2  and the third power supply voltage V 3  and outputs the first power supply voltage V 1 , the second power supply voltage V 2  and the third power supply voltage V 3 , respectively from the first power supply voltage output  1101 , the second power supply voltage output  1102 , and the third power supply voltage output  1103 . 
     In the embodiment, the first power supply voltage V 1  is a driving voltage, the second power supply voltage V 2  is a digital-logic voltage, and the third power supply voltage V 3  is a reference voltage. The driving voltage V 1  drives the display circuit  140 , the logical voltage V 2  provides a digital-logic voltage to the display circuit  140 , and the reference voltage V 3  is provided to the control circuit  1306 . The control circuit  1306  is connected between the third power supply voltage input  1303  and the switch circuit  1307 , and turns on or turns off the switch circuit  1307  and further controls the driving voltage V 1  to be supplied to or not to be supplied to the display circuit  140 . The second power supply voltage input  1302  is directly connected to the second output  1305  and further connected to the working circuit  140 , the digital-logic voltage V 2  is directly supplied to the display circuit  140 . 
     The control circuit  1306  includes a first switch component Q 1 , a second switch component Q 2 , a third switch component Q 3 , a capacitor C 1 , and resistors R 1 -R 4 . The first switch component Q 1 , the second switch component Q 2  and the third switch component Q 3  are three PNP bipolar transistors. 
     Specifically, the base of the bipolar transistor Q 1  is connected to the third power supply input  1303  through the resistor R 1 , the emitter of the bipolar transistor Q 1  is directly connected to the third power supply input  1303 , and the collector of the bipolar transistor Q 1  is connected to the base of the bipolar transistor Q 3 . The base of the bipolar transistor Q 2  is connected with the third power supply input  1303  and grounded through resistor R 2 , the emitter of the bipolar transistor Q 2  is connected to the base of the bipolar transistor Q 1 , and the collector of the bipolar transistor Q 2  is connected to the collector of the bipolar transistor Q 1  and to the base of the bipolar transistor Q 3 . The first end of the capacitor C 1  is connected to the third power supply input  1303  through the resistors R 2  and R 3 , and the second end of the capacitor is grounded. The first end of the capacitor C 1  is also connected to the base of the bipolar transistor Q 1  and to the emitter of the bipolar transistor Q 2  through the resistor R 3 . The base of the third bipolar transistor Q 3  is grounded through resistor R 4 , the collector of the third bipolar transistor is directly grounded and the emitter of the bipolar transistor Q 3  is connected to the switch circuit  1307 . 
     The switch circuit  1307  includes a fourth switch component Q 4  and a fifth resistor R 5 , the fourth switch component Q 4  is a p-type metal-oxide-semiconductor field-effect transistor (PMOSFET) Q 4 . The resistor R 5  is connected between the source and the gate of the PMOSFET Q 4 . The source of the PMOSFET Q 4  is connected to the first power supply voltage input  1301 , the drain of the PMOSFET Q 4  is connected to the first output  1304 , and the gate of the PMOSFET Q 4  is connected to the emitter of the bipolar transistor Q 3 . 
     In the embodiment, when the electronic device  10  is started, the power supply transforming circuit  110  converts an outer power supply voltage into the driving voltage V 1 , the digital-logic voltage V 2  and the reference voltage V 3 . The first power supply voltage input  1301  receives the driving voltage V 1 , the second power supply voltage input  1302  receives the digital-logic voltage V 2  and the third power supply voltage input  1303  receives the reference voltage V 3 . The capacitor C 1  is then charged. Since the base of the bipolar transistor Q 1  is grounded through the resistors R 1  and R 2 , the bipolar transistor Q 1  is turned on and the base of the bipolar transistor Q 3  gets a digital-high voltage from the third power supply input  1303  through the bipolar transistor Q 1  in the “on” state, so the bipolar transistor Q 3  is cut off. Meanwhile, the gate of the PMOSFET Q 4  gets a digital-high voltage from the first power supply input  1301  through the resistor R 5 , so the PMOSFET Q 4  is cut off. The first power supply voltage input  1301  is disconnected from the first output  1304  and the driving voltage V 1  is not supplied to the display circuit  140 , resulting in non-operation of the display circuit  140 . At the same time, the base of the transistor Q 2  gets a digital-high voltage from the third power supply input  1303 , causing the bipolar transistor Q 2  to be cut off. 
     When the capacitor C 1  is charged to a certain level, the voltage of the base of the bipolar transistor Q 1  is pulled to a digital-high level by the capacitor C 1  which causes the bipolar transistor Q 1  to be cut off. The base of the bipolar transistor Q 3  gets a digital-low voltage from the ground through the resistor R 4  and causes the bipolar transistor Q 3  to be turned on, so the gate of the PMOSFET Q 4  connected is grounded and receives a low level voltage, causing the PMOSFET Q 4  to be turned on. The first power supply voltage input  1301  and the first output  1301  are connected to each other, and the driving voltage is thus supplied to the display circuit  140  and the display circuit  140  starts to work. 
     Because some time is needed for charging the capacitor C 1 , the driving voltage supplied to the display circuit  140  is delayed. However, when the electronic device  10  starts, the second power supply voltage input  1302  and the second output  1305  are connected immediately and the digital-logic voltage V 2  is directly supplied to the display circuit  140 , so the digital-logic voltage V 2  is supplied to the display circuit  140  prior to the driving voltage V 1  being received. 
     In the embodiment, the interval between the digital-logic voltage V 2  and the subsequent driving voltage V 1  being supplied to the display circuit  140  can be adjusted by changing the capacitance of capacitor C 1 . 
     When the electronic device is shut down, the power supply transforming circuit  110  stops giving any output. The capacitor C 1  then begins to discharge through the resistor R 3 . The emitter of the bipolar transistor Q 2  connected to the first end of the capacitor C 1  through the resistor R 3  is at a digital-high level, the base of the bipolar transistor Q 2  is grounded, thereby causing the bipolar transistor Q 2  to be on. The base of the bipolar transistor Q 3  gets a digital-high level from the capacitor C 1  through the bipolar transistor Q 2  in the “on” state, and the bipolar transistor Q 3  is cut off, causing the PMOSFET Q 4  to be cut off. The first power supply voltage input  1301  and the first output  1304  are disconnected, and the driving voltage V 1  is immediately stopped from supplying the display circuit  140 . The digital-logical voltage V 2  will endure for a while after the driving voltage V 1  is stopped, so the cessation of the logical voltage V 2  is after the cessation of the driving voltage V 1 . 
     In the embodiment, the electronic device also includes a discharging circuit  150  for the display circuit  140  to release its built-up and stored voltage, the discharging circuit  150  is connected between the working circuit  140  and the ground as a discharging path of the display circuit  140  when the electronic device  10  is shut down. The discharging circuit  150  includes a fifth switch component Q 5 , a diode D 1  and a resistor R 6 . In the embodiment, the fifth switch component Q 5  is an n-type-metallic-oxide-semiconductor-field-effect transistor (NMOSFET) Q 5 , the gate of the NMOSFET Q 5  is connected to the second output  1305 , the source of the NMOSFET Q 5  is grounded, and the drain of the NMOSFET Q 5  is connected to the first output  1304  through resistor R 6 . The diode D 1  is connected between the source and the drain of the NMOSFET Q 5 , the positive pole of the diode D 1  is connected to the source of the transistor Q 5 , and the negative pole of the diode D 1  is connected to the drain of the NMOSFET Q 5 . 
     At the moment the power supply transforming circuit  110  stops converting the outer power supply voltage, the NMOSFET Q 5  still conducts, thus the built-up voltage of the display circuit  140  discharges quickly from the discharging circuit  150 , the display circuit being then disconnected from any power supply. 
     Although certain inventive embodiments of the present disclosure have been specifically described, the present disclosure is not to be construed as being limited thereto. Various changes or modifications may be made to the present disclosure without departing from the scope and spirit of the present disclosure.