Abstract:
A voltage regulator apparatus and an associated method are provided, where the voltage regulator apparatus includes: a voltage regulator module for regulating an input voltage according to a bandgap reference voltage to generate an output voltage; and a plurality of sensing modules. Ina situation where the output voltage abruptly decreases, a sensing module reduces, based on a variation amount of the output voltage, a decrement of the output voltage. In a situation where the output voltage abruptly increases, another sensing module reduces, based on another variation amount of the output voltage, an increment of the output voltage. In addition, yet another sensing module senses variation of the output voltage, converts the variation of the output voltage into a current signal, and applies the current signal to a control terminal within the voltage regulator module to indirectly control the output voltage.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to controlling a low dropout (LDO) voltage regulator with fast transient response, and more particularly, to a voltage regulator apparatus and a related method. 
         [0003]    2. Description of the Prior Art 
         [0004]    As the operation efficiency of prior art voltage regulators is not good enough, prior art techniques have provided some solutions to improve the operation efficiency of voltage regulators. However, some problems are caused by these conventional solutions. For example, a prior art solution requires many additional paths configured in a traditional voltage regulator, where these additional paths are configured with additional elements, respectively. This results in a significant increase of the chip area. For another example, another related art solution makes the structure of a traditional voltage regulator too complicated without remarkably improving the performance of the voltage regulator. Hence, there is a need for a novel method to improve the control of the voltage regulator, to increase the overall performance without introducing any side effect. 
       SUMMARY OF THE INVENTION 
       [0005]    Hence, one objective of the present invention is to provide a voltage regulator apparatus and a related method, to solve the aforementioned problems. 
         [0006]    Another objective of the present invention is to provide a voltage regulator apparatus and a related method, to improve the operation performance of a voltage regulator. 
         [0007]    According to at least one preferred embodiment, a voltage regulator apparatus is provided. The voltage regulator apparatus includes a bandgap reference circuit, a voltage regulator module, a first sensing module, a second sensing module and a third sensing module. The bandgap reference circuit is arranged for generating a bandgap reference voltage. The voltage regulator module is coupled to the bandgap reference circuit, and the voltage regulator module is arranged for regulating an input voltage according to the bandgap reference voltage to generate an output voltage. The first sensing module is coupled to the voltage regulator module, and the first sensing module is arranged for sensing a variation of the output voltage to selectively control the output voltage, wherein when the output voltage abruptly decreases, the first sensing module reduces a decrement of the output voltage based on a variation amount of the output voltage. The second sensing module is coupled to the voltage regulator module, and the second sensing module is arranged for sensing the variation of the output voltage, converting the variation of the output voltage into a current signal, and applying the current signal to a control terminal within the voltage regulator module, to indirectly control the output voltage. The third sensing module is coupled to the voltage regulator module, and the third sensing module is arranged for sensing a variation of the output voltage to selectively control the output voltage, wherein when the output voltage abruptly increases, the third sensing module reduces an increment of the output voltage based on another variation amount of the output voltage. 
         [0008]    Besides providing the above voltage regulator apparatus, the present invention also correspondingly provides a method for operating the voltage regulator apparatus. The method includes following steps: using a bandgap reference circuit of the voltage regulator apparatus to generate a bandgap reference voltage, and using a voltage regulator module of the voltage regulator apparatus to regulate an input voltage according to the bandgap reference voltage to generate an output voltage; and sensing a variation of the output voltage to selectively control the output voltage. The step of sensing the variation of the output voltage to selectively control the output voltage further comprises: when the output voltage abruptly decreases, using a first sensing module of the voltage regulator apparatus to reduce a decrement of the output voltage based on a variation amount of the output voltage; when the output voltage abruptly increases, using a third sensing module of the voltage regulator apparatus to reduce an increment of the output voltage based on another variation amount of the output voltage; and using a second sensing module of the voltage regulator apparatus to sense the variation of the output voltage, convert the variation of the output voltage into a current signal, and apply the current signal to a control terminal within the voltage regulator module, to indirectly control the output voltage. 
         [0009]    These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]      FIG. 1  is a diagram illustrating a voltage regulator apparatus according to a first embodiment of the present invention. 
           [0011]      FIG. 2  is a flowchart illustrating an operation method of the voltage regulator apparatus according to an embodiment of the present invention. 
           [0012]      FIG. 3  is a diagram illustrating a control scheme involved with the operation method shown in  FIG. 2  according to an embodiment of present invention. 
           [0013]      FIG. 4  is a diagram illustrating a control scheme involved with the operation method shown in  FIG. 2  according to another embodiment of present invention. 
           [0014]      FIG. 5  is a diagram illustrating a control scheme involved with the operation method shown in  FIG. 2  according to yet another embodiment of present invention. 
           [0015]      FIG. 6  is a diagram illustrating an output voltage curve of the operation method shown in  FIG. 2  according to an embodiment of present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0016]    Please refer to  FIG. 1 , which is a diagram illustrating a voltage regulator apparatus  100  according to a first embodiment of the present invention. The voltage regulator apparatus  100  includes a bandgap reference circuit  110 , a voltage regulator module  120  coupled to the bandgap reference circuit  110 , and a plurality of sensing modules  130 ,  140  and  150  coupled to the voltage regulator module  120 . The bandgap reference circuit  110  is arranged for generating a bandgap reference voltage VREF. The voltage regulator module  120  is arranged for regulating an input voltage VCC according to the bandgap reference voltage VREF and accordingly generating an output voltage V OUT  at an output terminal VOUT of the voltage regulator module  120 . More particularly, the sensing module  130  is used to sense a variation of the output voltage V OUT  to selectively control the output voltage V OUT , wherein when the output voltage V OUT  abruptly decreases, the sensing module  130  reduces a decrement of the output voltage V OUT  based on a variation amount of the output voltage V OUT . Further, the sensing module  140  is used to sense the variation of the output voltage V OUT , and then convert the variation of the output voltage V OUT  into a current signal and further apply the current signal to a control terminal PGATE (not shown in  FIG. 1 ) within the voltage regulator module  120 , in order to indirectly control the output voltage V OUT . Moreover, the sensing module  150  is arranged for sensing a variation of the output voltage V OUT  to selectively control the output voltage V OUT , wherein when the output voltage V OUT  abruptly increases, the sensing module  150  reduces an increment of the output voltage V OUT  based on another variation amount of the output voltage V OUT . 
         [0017]    Please refer to  FIG. 2 , which is a flowchart illustrating an operation method  200  of a voltage regulator apparatus according to an embodiment of the present invention. The operation method  200  may be applied to the voltage regulator apparatus  100  shown in  FIG. 1 , and more particularly, to the sensing modules  130 ,  140  and  150 . The operation method  200  is described as follows. 
         [0018]    In step  210 , the voltage regulator apparatus  100  utilizes the bandgap reference circuit  110  of the voltage regulator apparatus  100  to generate the bandgap reference voltage VREF, and utilizes the voltage regulator module  120  to generate the output voltage V OUT  by regulating the input voltage VCC according to the bandgap reference voltage VREF. 
         [0019]    In step  220 , the voltage regulator apparatus  100  utilizes the sensing modules  130 ,  140  and  150  to sense the variation of the output voltage V OUT  to selectively control the output voltage V OUT . For example, when the output voltage V OUT  abruptly decreases, the voltage regulator apparatus  100  utilizes the sensing module  130  to reduce the decrement of the output voltage V OUT  based on a variation amount of the output voltage V OUT . For another example, when the output voltage V OUT  abruptly increases, the bandgap reference circuit  110  utilizes the sensing module  150  to reduce the increment of the output voltage V OUT  based on another variation amount of the output voltage V OUT . For yet another example, the voltage regulator apparatus  100  utilizes the sensing module  140  to sense the variation of the output voltage V OUT , convert the variation of the output voltage V OUT  into the current signal, and apply the current signal to the control terminal PGATE within the voltage regulator module  120 , to indirectly control the output voltage. 
         [0020]    More particularly, when the output voltage V OUT  abruptly decreases, the voltage regulator apparatus  100  utilizes the sensing module  130  to obtain an instant current from a voltage source of the input voltage VCC based on the variation amount of the output voltage V OUT  and add the instant current to the output terminal VOUT of the voltage regulator module  120 , to reduce the decrement of the output voltage V OUT , wherein the voltage source generates the input voltage VCC, and the output terminal VOUT of the voltage regulator module  102  outputs the output voltage V OUT . Further, when the output voltage V OUT  abruptly increases, the voltage regulator apparatus  100  utilizes the sensing module  150  to obtain another instant current from the output terminal VOUT of the voltage regulator module  120  based on the other variation amount of the output voltage V OUT  and release the other instant current to a grounding terminal, to reduce the increment of the output voltage V OUT    
         [0021]    Please note that the operation procedure including steps  210  and  220  depicted in  FIG. 2  is merely for illustrative purposes, and is not used to limit the present invention. According to a modification of the present embodiment, the operation procedure can be modified. For example, at least a portion (i.e., part or all) of the operation in step  210  and/or at least a portion (i.e., part or all) of the operation in step  220  can be performed repeatedly as long as the present invention can be implemented. For another example, at least a portion (i.e., part or all) of the operation in step  210  and at least a portion (i.e., part or all) of the operation in step  220  can be performed repeatedly as long as the present invention can be implemented. 
         [0022]    Based on the structure shown in  FIG. 1 , the voltage regulator apparatus  100  and the related method do not need additional paths and additional elements on these paths, thus avoiding a significant increase of the chip area. Hence, the present invention can avoid the problems of the prior art techniques. More particularly, the sensing modules  130 ,  140  and  150  may have the feedback control functions for accurately correcting the aforementioned output voltage V oUT . Further, compared with the prior art designs, the voltage regulator apparatus  100  and the related method of the present invention can be easily implemented and have fast transient response. Hence, the present invention can concretely increase the overall performance and also save the related production cost. 
         [0023]    Please refer to  FIG. 3 , which is a diagram illustrating a control scheme involved with the operation method  200  shown in  FIG. 2  according to an embodiment of present invention. According to this embodiment, the voltage regulator module  120  includes an operational amplifier (Op-Amp)  122  (for brevity, the operational amplifier  122  is denoted as “OP” in  FIG. 3 ) coupled to the bandgap reference circuit  110 , a transistor such as a P-type metal oxide semiconductor field effect transistor (PMOSFET) MP 1  coupled to the operational amplifier  122 , the input voltage VCC and the output terminal VOUT, and a voltage dividing circuit coupled to the output terminal VOUT, the transistor and the operational amplifier  122 , wherein the voltage dividing circuit includes a plurality of resistors R 1  and R 2 . The operational amplifier  122  compares a divided voltage with the bandgap reference voltage VREF, to generate a control signal. The transistor such as the PMOSFET MP 1  is selectively turned on based on the control signal, to regulate the input voltage VCC to generate the output voltage V OUT . Further, the voltage dividing circuit generates the divided voltage corresponding to the output voltage V OUT , wherein the ratio of the divided voltage to the output voltage V OUT  is determined by the resistance values of the resistors R 1  and R 2 . Moreover, the sensing modules  130  and  150  are coupled to a plurality of power terminals P+ and P− of the operational amplifier  122  to receive a positive power signal and a negative power signal of the operational amplifier  122 , respectively, for sensing operations. In practice, the aforementioned control terminal PGATE is the control terminal in the transistor for receiving the control signal, especially the gate of the PMOSFET MP 1 , wherein the source of the PMOSFET MP 1  is coupled to the input voltage VCC, and the drain of the PMOSFET MP 1  is coupled to the output terminal VOUT. 
         [0024]    As shown in  FIG. 3 , the sensing module  130  includes a capacitor C 1  having a first terminal and a second terminal (in this embodiment, the upper terminal and the lower terminal of the capacitor C 1 ). The first terminal of the capacitor C 1  is coupled to the power terminal P+ of the operational amplifier  122 . The second terminal of the capacitor C 1  is coupled to the output terminal VOUT of the voltage regulator module  122 . The sensing module  130  also includes a PMOSFET PM 2  having a gate, a drain and a source. The gate of the PMOSFET PM 2  is coupled to the first terminal of the capacitor C 1 , the drain of the PMOSFET PM 2  is coupled to the second terminal of the capacitor C 1 , and the source of the PMOSFET PM 2  is coupled to the input voltage VCC. More particularly, in step  220 , when the output voltage V OUT  abruptly decreases, the voltage regulator apparatus  100  utilizes the capacitor C 1  to couple the output voltage V OUT  to the gate of the PMOSFET, and utilizes the other PMOSFET MP 2  to obtain the instant current from the voltage source of the input voltage VCC and apply the instant current to the output terminal VOUT to reduce the decrement of the output voltage V OUT . 
         [0025]    Further, the sensing module  140  includes a capacitor C 2  and a sensing circuit  142 . The capacitor C 2  has a first terminal and a second terminal (in this embodiment, the upper terminal and the lower terminal of the capacitor C 2 ). The first terminal of the capacitor C 2  is coupled to the output terminal VOUT. The sensing circuit  142  is coupled to the second terminal of the capacitor C 2  and the gate of the PMOSFET MP 1 . More particularly, in step  220 , when the output voltage V OUT  abruptly increases or decreases, the voltage regulator apparatus  100  utilizes the second capacitor C 2  to couple the output voltage V OUT  to the sensing circuit  142 , and utilizes the sensing circuit  142  to convert the output voltage V OUT  into the current signal, to increase the response speed of the PMOSFET MP 1 . 
         [0026]    Further, the sensing module  150  includes a capacitor C 3  and an N-type metal oxide semiconductor field effect transistor (NMOSFET) MN 1 . The capacitor C 3  has a first terminal and a second terminal (in this embodiment, the left terminal and the right terminal of the capacitor C 3 ). The first terminal of the capacitor C 3  is coupled to the power terminal P− of the operational amplifier  122 . The second terminal of the capacitor C 3  is coupled to the output terminal VOUT. The NMOSFET MN 1  has a gate, a drain and a source. The gate of the NMOSFET MN 1  is coupled to the first terminal of the capacitor C 3 , the drain of the NMOSFET MN 1  is coupled to the second terminal of the capacitor C 3 , and the source of the NMOSFET MN 1  is coupled to the grounding terminal. More particularly, in step  220 , when the output voltage V OUT  abruptly increases, the voltage regulator apparatus  100  utilizes the second capacitor C 3  to couple the output voltage V OUT  to the gate of the NMOSFET MN 1 , and utilizes the NMOSFET MN 1  to obtain another instant current from the output terminal VOUT and release the other instant current to the grounding terminal, to reduce the increment of the output voltage V OUT . 
         [0027]    Please refer to  FIG. 4 , which is a diagram illustrating a control scheme involved with the operation method  200  shown in  FIG. 2  according to another embodiment of present invention. The capacitor C 2  shown in the left-down corner in  FIG. 4  and the capacitor C 2  shown in  FIG. 3  are the same element. The sensing circuit  142  includes a current source, an NMOSFET MN 3 , a resistor R 3  and an NMOSFET MN 4 . In this embodiment, the current source is a constant current source arranged to generate a specific current for the sensing circuit  142 , wherein an output terminal of the current source outputs the specific current. The NMOSFET MN 3  has a gate, a drain and a source. The gate of the NMOSFET MN 3  is coupled to the second terminal of the capacitor C 2 , the drain of the NMOSFET MN 3  is coupled to the output terminal of the current source, and the source of the NMOSFET MN 3  is coupled to ground. The resistor R 3  has two terminals coupled to the gate and the drain of the NMOSFET MN 3 , respectively. The NMOSFET MN 4  has a gate, a drain and a source. The gate of the NMOSFET MN 4  is coupled to the drain of the NMOSFET MN 3 , the drain of the NMOSFET MN 4  is coupled to the gate of the PMOSFET MP 1 , and the source of the NMOSFET MN 4  is coupled to ground. Hence, in step  220 , when the output voltage V OUT  abruptly decreases or increases, the voltage regulator apparatus  100  utilizes the capacitor C 2  to couple the output voltage V OUT  to the gate of the NMOSFET MN 3 , and utilizes a common source structure formed by the NMOSFETs MN 3  and MN 4  to amplify a coupling voltage obtained from the capacitor C 2 , to increase the response speed of the PMOSFET MP 1 . 
         [0028]    More particularly, the sensing circuit  142  may further include an NMOSFET MN 5 . The NMOSFET MN 5  has a gate, a drain and a source. The gate of the NMOSFET MN 5  is coupled to the output terminal of the current source, the drain of the NMOSFET MN 5  is coupled to the gate of the PMOSFET MP 1  (the control terminal PGATE in this embodiment), and the source of the NMOSFET MN 5  is coupled to the drain of the NMOSFET MN 4 , wherein the drain of the NMOSFET MN 4  is coupled to the gate of the PMOSFET MP 1  through the NMOSFET MP 5 . Hence, in step  220 , when the output voltage V OUT  abruptly increases or decreases, the voltage regulator apparatus  100  utilizes the connection relationship of the gate of the NMOSFET MN 5  in the sensing circuit  142  to convert the variation of the voltage source into the current signal. 
         [0029]    As shown in  FIG. 4 , the sensing circuit  142  may further include a NMOSFET MN 6 . The NMOSFET MN 6  has a gate, a drain and a source. The gate of the NMOSFET MN 6  is coupled to the gate of NMOSFET MN 5 , the drain of the NMOSFET MN 6  is coupled to the output terminal of the current source, and the source of the NMOSFET MN 6  is coupled to the drain of the NMOSFET MN 3 , wherein the gate of the NMOSFET MN 6  is short-circuited to the drain of the NMOSFET MN 6 , and the drain of the NMOSFET MN 3  is coupled to the output terminal of the current source through the NMOSFET MN 6 . Please note that, the voltage regulator apparatus  100  may utilize the common gate structure formed by the NMOFET MN 6  and the NMOFET MN 5  to convert the output voltage V OUT  into the current signal. Since the current signal corresponds to the variation of the output voltage V OUT , the voltage regulator apparatus  100  may utilize the sensing circuit  142  to increase the response speed of the PMOSFET MP 1  for reducing the variation of the output voltage VOUT when the output voltage V OUT  abruptly decreases or increases. Further, the structure shown in  FIG. 4  utilizes the NMOSFET MN 6  to provide a bias point for the NMOSFET MN 5 . However, it is merely for illustration, not a limitation to the present invention. According to some modifications of this embodiment, the sensing circuit  142  may omit the NMOSFET MN 6 . For example, the NMOSFET MN 6  can be replaced with a resistor. 
         [0030]    Please refer to  FIG. 5 , which is a diagram illustrating a control scheme involved with the operation method  200  shown in  FIG. 2  according to yet another embodiment of present invention. The capacitor C 2  shown in the left-down corner in  FIG. 5  and the capacitor C 2  shown in  FIG. 3  are the same element. As shown in  FIG. 5 , the sensing circuit  142  may further include a resistor R 4  having two terminals coupled to the output terminal of the current source and the drain of the NMOSFET MN 3 , respectively, wherein the drain of the NMOSFET MN 3  is coupled to the output terminal of the current source through the resistor R 4 . Hence, the voltage regulator apparatus  100  may utilize the connection relationship of the resistor R 4  and the NMOSFET MN 5  in the sensing circuit  142  to convert the variation of the output voltage V OUT  into the current signal. The rest of this embodiment is similar to those of the previous embodiments, and further description thereof will be omitted here for brevity. 
         [0031]    Please refer to  FIG. 6 , which is a diagram illustrating an output voltage curve of the operation method  200  shown in  FIG. 2  according to an embodiment of present invention. In this embodiment, once the load current varies, the output voltage V OUT  will vary accordingly. For example, when the load current abruptly changes from a small current value to a large current value, the output voltage V OUT  will abruptly drop. As shown in the partial curve  601 , through performing the operation method  200 , the output voltage V OUT  will be pushed up to the original level, thus reducing the decrement of the output voltage V OUT . Further, when the load current abruptly changes from a large current value to a small current value, the output voltage V OUT  will abruptly increase. As shown in the partial curve  602 , through performing the operation method  200 , the output voltage V OUT  will be pulled down to the original level, thus reducing the increment of the output voltage V OUT . Hence, compared with the prior art designs, the voltage regulator apparatus  100  and the related method of the present invention indeed make the output voltage V OUT  more stable. 
         [0032]    Those skilled in the art will readily observe that numerous modifications and alterations of the apparatus and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.