Abstract:
A process for detecting foreign particle defects and scratch defects on semiconductor products including detecting foreign particle and scratch defects on the semiconductor products; placing the semiconductor products in a first wafer carrier and docking to a first load port of a semiconductor processing tool; opening a door of the first wafer carrier; transferring the semiconductor products from the first wafer carrier through the first load port to and through an interior of the semiconductor processing tool to a second load port of the semiconductor processing tool; transferring the semiconductor products from the second load port to a second wafer carrier; closing a door of the second wafer carrier and undocking from the second load port; and detecting foreign particle and scratch defects on the semiconductor products and comparing to the foreign particle defects on the semiconductor products prior to placing the semiconductor products in the first wafer carrier.

Description:
BACKGROUND 
       [0001]    The present invention relates to a process for detecting foreign particle and scratch defects on semiconductor products processed through a semiconductor manufacturing processing tool. 
         [0002]    In semiconductor manufacturing, contamination, for example by particles or foreign substances, and scratches constitutes a great risk with the consequences of reducing the quality and total failure of the electronic components. For this reason, the environmental conditions during semiconductor fabrication are kept at the highest possible quality level by filters and by monitoring the physical conditions in the room. That is, the number of contaminating particles per volume element is kept as low as possible. 
         [0003]    In order to meet the requirements on structure widths which decrease to an ever increasing extent, much better clean conditions, as compared with the clean room condition, are created by using mini environments to transport the semiconductor products (for example, semiconductor wafers, masks or flat panel displays) to and from the manufacturing tools. As compared with the surrounding clean room, the air in the mini environments has a much lower number of contaminating particles per volume. The mini environments may also be called wafer carriers, substrate transports or substrate transfer carriers, hereafter collectively referred to as wafer carriers. 
         [0004]    Unfortunately, all moveable parts and components produce contamination, even during fault-free operation. The handling systems of the manufacturing tools for semiconductor products can produce unacceptable contamination if maladjustments of the handling systems arise, for example, when semiconductor products being loaded or unloaded in a wafer carrier are scraped as a result of an inaccurate adjustment; in the process, layers on the semiconductor product or in/on the wafer carrier flake off and become a contamination source. The particles flaked off can be deposited on the same semiconductor product or on the semiconductor products which follow or are located underneath and can lead to yield losses in the latter. 
         [0005]    In particular, wafer carriers may themselves constitute a serious contamination source. Typically, such wafer carriers are used during the deposition of layers on semiconductor products. Therefore, not only are the semiconductor products but also the wafer carriers may be coated with the material respectively deposited. 
         [0006]    Since the wafer carriers may be neither cleaned immediately nor replaced following processing of semiconductor products in a manufacturing tool, contaminants may accumulate in the course of processing semiconductor products through several tools. Accordingly, foreign particle defects due to contamination in the manufacturing tools or the wafer carriers may remain undetected for an undesirably long time. 
       BRIEF SUMMARY 
       [0007]    The various advantages and purposes of the exemplary embodiments as described above and hereafter are achieved by providing, according to a first aspect of the exemplary embodiments, a process for detecting foreign particle defects and scratch defects on a plurality of semiconductor products comprising:
       detecting foreign particle and scratch defects on the plurality of semiconductor products;   placing the plurality of semiconductor products in a first wafer carrier;   docking the first wafer carrier to a first load port of a multi-port semiconductor processing tool;   opening a door of the first wafer carrier;   transferring the plurality of semiconductor products from the first wafer carrier through the first load port to an interior of the multi-port semiconductor processing tool;   moving the semiconductor products through the interior of the multi-port processing tool without performing a processing operation on the semiconductor products that alters the semiconductor products to a second load port of the multi-port semiconductor processing tool;   transferring the plurality of semiconductor products from the second load port to a second wafer carrier;   closing a door of the second wafer carrier;   undocking the second wafer carrier from the second load port; and   detecting foreign particle and scratch defects on the semiconductor products and comparing to the foreign particle defects on the semiconductor products prior to placing the plurality of semiconductor products in the first wafer carrier.       
 
         [0018]    According to a second aspect of the exemplary embodiments, there is provided a process for detecting foreign particle and scratch defects on a plurality of semiconductor products comprising:
       (a) detecting foreign particle and scratch defects on the plurality of semiconductor products;   (b) transferring the plurality of semiconductor products to a wafer carrier;   (c) docking the wafer carrier to a load port of a multi-port semiconductor processing tool;   (d) opening a door of the wafer carrier;   (e) transferring the plurality of semiconductor products from the wafer carrier through the load port to an interior of the multi-port semiconductor processing tool;   (f) moving the semiconductor products through the interior of the multi-port processing tool without performing a processing operation on the semiconductor products that alters the semiconductor products to another load port of the multi-port semiconductor processing tool;   (g) transferring the plurality of semiconductor products from the another load port to another wafer carrier;   (h) closing a door of the another wafer carrier;   (i) undocking the another wafer carrier from the another load port;   (j) docking the another wafer carrier to the another load;   (k) repeating the processes of (e) to (j) until the semiconductor products have been moved to any remaining load ports of the multi-port semiconductor processing tool and transferred to an remaining wafer carriers corresponding to the remaining load ports; and   (l) detecting foreign particle and scratch defects on the semiconductor products and comparing to the foreign particle defects on the semiconductor products prior to placing the plurality of semiconductor products in the first wafer carrier.       
 
         [0031]    According to a third aspect of the exemplary embodiments, there is provided a computer program product for detecting foreign particle and scratch defects on a plurality of semiconductor products, the computer program product comprising:
       a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code comprising:   (a) computer readable program code configured to detect foreign particle and scratch defects on the plurality of semiconductor products;   (b) computer readable program code configured to transfer the plurality of semiconductor products to a wafer carrier;   (c) computer readable program code configured to dock the wafer carrier to a load port of a multi-port semiconductor processing tool;   (d) computer readable program code configured to open a door of the wafer carrier;   (e) computer readable program code configured to transfer the plurality of semiconductor products from the wafer carrier through the load port to an interior of the multi-port semiconductor processing tool;   (f) computer readable program code configured to move the semiconductor products through the interior of the multi-port processing tool without performing a processing operation on the semiconductor products that alters the semiconductor products to another load port of the multi-port semiconductor processing tool;   (g) computer readable program code configured to transfer the plurality of semiconductor products from the another load port to another wafer carrier;   (h) computer readable program code configured to close a door of the another wafer carrier;   (i) computer readable program code configured to undock the another wafer carrier from the another load port;   (j) computer readable program code configured to dock the another wafer carrier to the another load;   (k) computer readable program code configured to repeat the processes of (e) to (j) until the semiconductor products have been moved to any remaining load ports of the multi-port semiconductor processing tool and transferred to an remaining wafer carriers corresponding to the remaining load ports; and   (l) computer readable program code configured to detect foreign particle and scratch defects on the semiconductor products and compare to the foreign particle defects on the semiconductor products prior to placing the plurality of semiconductor products in the first wafer carrier.       
 
     
    
     
       BRIEF DESCRIPTION OF SEVERAL VIEWS OF THE DRAWINGS 
         [0045]    The features of the exemplary embodiments believed to be novel and the elements characteristic of the exemplary embodiments are set forth with particularity in the appended claims. The Figures are for illustration purposes only and are not drawn to scale. The exemplary embodiments, both as to organization and method of operation, may best be understood by reference to the detailed description which follows taken in conjunction with the accompanying drawings in which: 
           [0046]      FIG. 1A  is front view of a wafer carrier with the door removed and  FIG. 1B  is a side view of the wafer carrier of  FIG. 1A  showing the door in the removed position. 
           [0047]      FIGS. 2 to 6  illustrate a method of the exemplary embodiments for testing for foreign particle and scratch defects due to the movement of semiconductor products from wafer carriers into a semiconductor processing tool, through the semiconductor processing tool and into other wafer carriers wherein: 
           [0048]      FIG. 2  illustrates three semiconductor products in a wafer carrier at a first load port of a four-load port semiconductor processing tool; 
           [0049]      FIG. 3  illustrates the movement of the semiconductor products into the semiconductor processing tool through the first load port, through the semiconductor processing tool to a fourth load port and into a second wafer carrier; 
           [0050]      FIG. 4  illustrates the movement of the semiconductor products into the semiconductor processing tool through the fourth load port, through the semiconductor processing tool to a second load port and into a third wafer carrier; 
           [0051]      FIG. 5  illustrates the movement of the semiconductor products into the semiconductor processing tool through the second load port, through the semiconductor processing tool to a third load port and into a third wafer carrier; and 
           [0052]      FIG. 6  illustrates the movement of the semiconductor products into the semiconductor processing tool through the third load port, through the semiconductor processing tool to the first load port and into the first wafer carrier. 
           [0053]      FIG. 7  is a flow chart for practicing the exemplary embodiments. 
       
    
    
     DETAILED DESCRIPTION 
       [0054]    Referring to the Figures in more detail, and particularly referring to  FIGS. 1A and 1B , there is shown a wafer carrier  10 . The wafer carrier  10  has space for a certain number of semiconductor products  12 . In the wafer carrier  10  shown in  FIGS. 1A and 1B , there are spaces for 25 semiconductor products  12  such as semiconductor wafers. A typical wafer carrier  10  may have 25 spaces or 13 spaces and the exemplary embodiments are applicable to these wafer carriers as well as future wafer carriers that may be used in which the spaces for semiconductor products may vary from 25 spaces or 13 spaces. Not shown in  FIG. 1  are the shelves that support each of the semiconductor products  12 . The top semiconductor product  12 A may be on the 25th numbered shelf and is indicated by the number  25  while the bottom semiconductor product  12 B may be on the first numbered shelf and is indicated by the number  1 . Not shown in  FIG. 1A  is a door to the wafer carrier  10 , either on the front or the bottom of the wafer carrier  10 , that may be opened to remove the semiconductor products  12  from the wafer carrier  10 .  FIG. 1B  shows a door  15  for a wafer carrier  10 . In operation, the door  15  is typically separated from the body of the wafer carrier  10  to allow the semiconductor products  12  to be transported from the wafer carrier into the semiconductor processing tool. 
         [0055]    In operation, a wafer carrier  10  may be positioned with respect to a load port of a semiconductor processing tool. When the processing of the semiconductor products  12  in the wafer carrier  10  is called for by the semiconductor processing tool, the door  15  of the wafer carrier  10  is opened at a load port, one or more of the semiconductor products  12  may be moved into the semiconductor processing tool through the load port, the one or more of the semiconductor products  12  may be processed by the semiconductor processing tool, and then the one or more of the semiconductor products processed by the semiconductor processing tool may be moved through the load port back into the wafer carrier  10  that originally carried the one or more semiconductor products or, more typically, into a different wafer carrier  10 . The door  15  to the wafer carrier  10  may then be closed, the wafer carrier  10  removed from the load port and transported to another tool for further processing. 
         [0056]    While the exemplary embodiments pertain to wafer carriers in general, a most preferred exemplary embodiment of a wafer carrier is a so-called FOUP (front opening unified pod). A FOUP is a particular kind of wafer carrier  10  which has a front opening door  15  that may be opened by the load port. FOUPs may be the standard wafer carrier in a semiconductor wafer manufacturing fabrication facility. 
         [0057]    The present inventors have found that contamination of semiconductor products  12  may occur from different sources. Contamination may occur from opening of the wafer carrier door  15 , transporting of the semiconductor products  12  from the wafer carrier  10  into the semiconductor processing tool, transporting of the semiconductor products through the semiconductor processing tool, transporting of the semiconductor products  12  back into the wafer carrier  10  and then closing of the wafer carrier door  15 . Processing of the semiconductor products  12  in the semiconductor processing tool may be an additional source of contamination but the preferred exemplary embodiments are concerned with testing for contamination from transportation sources and are not concerned with processing contamination. 
         [0058]    The contamination sources may be characterized as coming from “X”, “Y” and “Z” directions. That is, “X” contamination sources may be from opening of the wafer carrier door, transporting of the semiconductor products  12  from the wafer carrier  10  into the semiconductor processing tool, transporting of the semiconductor products  12  back into the wafer carrier  10  and then closing of the wafer carrier door. “Y” contamination sources may be from transporting of the semiconductor products  12  through the semiconductor processing tool. “Z” contamination sources may be from movement of the semiconductor products  12  from a low position (such as the first numbered shelf) to a higher position (such as the 25 th  numbered shelf) in the wafer carrier  10 . 
         [0059]    Accordingly, the present inventors have proposed exemplary embodiments to detect contamination of semiconductor products from the sources indicated above. In the exemplary embodiments, the possibilities for contamination from the X, Y and Z sources of contamination may be maximized in order to provide the best solution for detection of contaminants. The preferred exemplary embodiments may use the full range of motions into, out of and through the semiconductor processing tool to detect foreign particle contaminants. 
         [0060]    Referring now to  FIGS. 2 to 6 , there is described a method of the exemplary embodiments. In  FIG. 2 , there is illustrated a semiconductor processing tool  14  having four load ports, LP 1 , LP 2 , LP 3  and LP 4 . Four load ports may be typical in semiconductor processing tools although there may be semiconductor processing tools that may have more or less than four load ports. Older semiconductor processing tools may have less than four load ports while newer semiconductor processing tools may have more than four load ports. Four load ports have been used as an example for the purpose of describing the exemplary embodiments and the exemplary embodiments have applicability to the older semiconductor processing tools as well as the newer semiconductor processing tools. An important concept of the exemplary embodiments is to transport the semiconductor products  12  the maximum amount of distance as possible in the X, Y and Z directions as described above through at least two of the load ports using at least two wafer carriers. 
         [0061]    Not shown in  FIG. 2 , three semiconductor products  18 , semiconductor wafers for example, may be scanned by a conventional process to measure any contaminants (including scratches) on the semiconductor products  18 . This measure constitutes the initial contaminant measurement. The semiconductor products  18  may be blank semiconductor products or may have some patterns formed on them. The semiconductor products  18  are placed in a wafer carrier  16  which has been cleaned to substantially remove any contaminants. The wafer carrier  16  may have, for example, 25 shelves for receiving the semiconductor products  18 . The wafer carrier  16  may be similar to wafer carrier  10  shown in  FIG. 1 . It is preferred that one of the semiconductor products  18 A be placed on a lower shelf of the wafer carrier  16 , one of the semiconductor products  18 B be placed on an upper shelf of the wafer carrier  16  and another one of the semiconductor products  18 C be placed between the lower shelf and the upper shelf. 
         [0062]    Referring back to  FIG. 2 , wafer carrier  16  is shown docked at LP 1  of the semiconductor processing tool  14 . Semiconductor product  18 A is on the first shelf of the wafer carrier  16  while semiconductor product  18 B is on the 25 th  or top shelf of the wafer carrier  14 . Semiconductor product  18 C is on a shelf between the first and 25 th  shelves but is preferably on the 24 th  shelf. There are several reasons for this preferred arrangement of the semiconductor wafers  18 . The first reason is that there is maximum range of “Z” motion when the positions of the semiconductor products  18 A,  18 B are exchanged as explained hereafter. 
         [0063]    The second reason is that semiconductor product  18 C should be on the 24 th  shelf just below the top shelf of the wafer carrier  16  so as to catch any contaminants that may fall from the semiconductor product  18  on the top shelf, semiconductor product  18 B as shown in  FIG. 2 , or to detect possible scratching across the top of the semiconductor product, semiconductor product  18 C as shown in  FIG. 2 , immediately below the top most semiconductor product, semiconductor product  18 B as shown in  FIG. 2 . Semiconductor products  18  may be placed in the wafer carrier  16  by a handling tool which steps up a predetermined amount for each shelf. If the handler is off by a small amount for each shelf, by the time the handler gets to place semiconductor product  18 B on the top shelf of the wafer carrier  16 , the amount the handler may be off is multiplied by the number of shelves so the maximum offset will be at the top shelf which is shelf  25  in the present wafer carrier  16 . The semiconductor product  18 B in wafer carrier  16  may then scrape the 25 th  shelf or the top of the inside of the wafer carrier  16 . Any debris from this scraping may fall on semiconductor product  18 C below semiconductor product  18 B. If the handler comes in with a negative offset it could come in low to pick up the top most semiconductor product, semiconductor product  18 B, dragging material across the top of the semiconductor product in the second most top shelf, semiconductor product  18 C. 
         [0064]    It is noted that in  FIGS. 2 to 6 , four wafer carriers are in place at semiconductor processing tool  14  having four load ports. It is preferred that the process begin with a wafer carrier at each load port which in the case of  FIGS. 2 to 6  means all four wafer carriers in place at the four load ports. However, at a minimum, there should be at least two wafer carriers in place so that one of the test semiconductor products  12  may be transported through the semiconductor processing tool  14  to a second wafer carrier while a semiconductor product  12  is retrieved from the first wafer carrier. 
         [0065]    Referring now to  FIG. 3 , the door (not shown) of wafer carrier  16  is opened and conventional picking and placing tools (not shown) from the semiconductor processing tool  14  may move the semiconductor products  18  from wafer carrier  16  docked at LP 1  through the semiconductor processing tool  14  to LP 4  as indicated by arrow  22 . The semiconductor products  18  in wafer carrier  16  are shown in phantom indicating that the semiconductor products  18  are no longer in wafer carrier  16 . The movement from LP 1  to LP 4  through the semiconductor processing tool  14  gives the greatest range of “positive Y” motion within the semiconductor processing tool  14  and thus the greatest possibility for the detection of contaminants within the semiconductor processing tool  14 . 
         [0066]    Docked at LP 4  is wafer carrier  20  which has been precleaned to substantially remove any contaminants. The door of wafer carrier  20  may then be opened to receive semiconductor products  18  through LP 4 . It is noted that the positions of semiconductor products  18 A and  18 B have been reversed. That is, semiconductor product  18 A on the first shelf in wafer carrier  16  is now on the 25 th  shelf of wafer carrier  20  while semiconductor product  18 B on the 25 th  shelf of wafer carrier  16  is now on the first shelf of wafer carrier  20 . Semiconductor product  18 C remains on a shelf between semiconductor products  18 A,  18 B, which for purposes of illustration and not limitation is the 24 th  shelf. 
         [0067]    It should be noted that each of the semiconductor products  18  have been numbered with their starting shelf position in wafer carrier  16  so as to keep track of the movements of the semiconductor products  18  as they are transported from wafer carrier  16  to wafer carrier  20  and then to other wafer carriers as explained hereafter. 
         [0068]    Once the semiconductor products are within wafer carrier  20 , the door (not shown) of wafer carrier  20  may be closed and wafer carrier  20  may be undocked from LP 4 . 
         [0069]    In a further step in the preferred exemplary embodiment, wafer carrier  20  may be redocked with LP 4 . 
         [0070]    To obtain the best advantage of the exemplary embodiments, it is most preferred that the semiconductor products be moved in the order of top semiconductor product, middle semiconductor product and then bottom semiconductor or bottom semiconductor product, middle semiconductor product and then top semiconductor product. For example, in the transporting of semiconductor products from wafer carrier  16  in  FIG. 2  to wafer carrier  20  in  FIG. 3 , the semiconductor products  18  are preferably moved in the order of semiconductor products  18 A,  18 B, then  18 C or alternatively, in the order of semiconductor products  18 B,  18 C, then  18 A. 
         [0071]    Referring now to  FIG. 4 , the door (not shown) of wafer carrier  20  is opened and conventional picking and placing tools (not shown) from the semiconductor processing tool  14  may move the semiconductor products  18  from wafer carrier  20  docked at LP 4  through the semiconductor processing tool  14  to LP 2  as indicated by arrow  24 . The semiconductor products  18  in wafer carrier  20  are shown in phantom indicating that the semiconductor products  18  are no longer in wafer carrier  20 . The movement from LP 4  to LP 2  through the semiconductor processing tool  14  gives the greatest range of “negative Y” motion within the semiconductor processing tool  14  and thus the greatest possibility for the detection of contaminants within the semiconductor processing tool  14 . 
         [0072]    For purposes of illustration and not limitation, Applicants have arbitrarily chosen movements to the right, such as from LP 1  to LP 4  to be “positive” motion movements in the Y direction while movements to the left, such as from LP 4  to LP 2  to be “negative” motion movements in the Y direction. 
         [0073]    Docked at LP 2  is wafer carrier  26  which has been precleaned to substantially remove any contaminants. The door of wafer carrier  26  may then be opened to receive semiconductor products  18 . It is noted that the positions of semiconductor products  18 A and  18 B have been reversed again. That is, semiconductor product  18 A on the 25 th  shelf in wafer carrier  20  is now on the first shelf of wafer carrier  26  while semiconductor product  18 B on the first shelf of wafer carrier  20  is now on the 25 th  shelf of wafer carrier  26 . Semiconductor product  18 C remains on a shelf between semiconductor products  18 A,  18 B, which for purposes of illustration and not limitation is the 24 th  shelf. 
         [0074]    Once the semiconductor products are within wafer carrier  26 , the door (not shown) of wafer carrier  26  may be closed and wafer carrier  26  may be undocked from LP 2 . 
         [0075]    In a further step in the preferred exemplary embodiment, wafer carrier  26  may be redocked with LP 2 . 
         [0076]    Referring now to  FIG. 5 , the door (not shown) of wafer carrier  26  is opened and conventional picking and placing tools (not shown) from the semiconductor processing tool  14  may move the semiconductor products  18  from wafer carrier  26  docked at LP 2  through the semiconductor processing tool  14  to LP 3  as indicated by arrow  28 . The semiconductor products  18  in wafer carrier  26  are shown in phantom indicating that the semiconductor products  18  are no longer in wafer carrier  26 . The movement from LP 2  to LP 3  through the semiconductor processing tool  14  gives the next greatest range of “positive Y” motion within the semiconductor processing tool  14  and thus the greatest possibility for the detection of contaminants within the semiconductor processing tool  14 . 
         [0077]    Docked at LP 3  is wafer carrier  30  which has been precleaned to substantially remove any contaminants. The door of wafer carrier  30  may then be opened to receive semiconductor products  18 . It is noted that the positions of semiconductor products  18 A and  18 B have been reversed again. That is, semiconductor product  18 A on the first shelf in wafer carrier  26  is now on the 25th shelf of wafer carrier  30  while semiconductor product  18 B on the 25th shelf of wafer carrier  26  is now on the first shelf of wafer carrier  30 . Semiconductor product  18 C remains on a shelf between semiconductor products  18 A,  18 B, which for purposes of illustration and not limitation is the 24 th  shelf. 
         [0078]    Once the semiconductor products are within wafer carrier  30 , the door (not shown) of wafer carrier  30  may be closed and wafer carrier  30  may be undocked from LP 3 . 
         [0079]    In a further step in the preferred exemplary embodiment, wafer carrier  30  may be redocked with LP 3 . 
         [0080]    Referring now to  FIG. 6 , the door (not shown) of wafer carrier  30  is opened and conventional picking and placing tools (not shown) from the semiconductor processing tool  14  may move the semiconductor products  18  from wafer carrier  30  docked at LP 3  through the semiconductor processing tool  14  to LP 1  as indicated by arrow  32 . The semiconductor products  18  in wafer carrier  30  are shown in phantom indicating that the semiconductor products  18  are no longer in wafer carrier  30 . The movement from LP 3  to LP 1  through the semiconductor processing tool  14  gives the next greatest range of “negative Y” motion within the semiconductor processing tool  14  and thus the greatest possibility for the detection of contaminants within the semiconductor processing tool  14 . 
         [0081]    Docked at LP 1  is wafer carrier  16  which was the first wafer carrier to be used in the exemplary embodiments. The door of wafer carrier  16  may then be opened to receive semiconductor products  18 . It is noted that the positions of semiconductor products  18 A and  18 B have been reversed again. That is, semiconductor product  18 A on the 25th shelf in wafer carrier  30  is now on the first shelf of wafer carrier  16  while semiconductor product  18 B on the first shelf of wafer carrier  30  is now on the 25th shelf of wafer carrier  16 . Semiconductor product  18 C remains on a shelf between semiconductor products  18 A,  18 B, which for purposes of illustration and not limitation is the 24 th  shelf. 
         [0082]    In the preferred exemplary embodiment, the semiconductor products  18  have been processed through all four load ports (LP 1 , LP 2 , LP 3 , LP 4 ), all four wafer carriers ( 16 ,  20 ,  26 ,  30 ) and four times through the semiconductor processing tool  14 . 
         [0083]    Once the semiconductor products are within wafer carrier  16 , the door (not shown) of wafer carrier  16  may be closed and wafer carrier  16  may be undocked from LP 1  and transported to another tool to have the semiconductor products  18  scanned and the contaminants (including scratches) on the semiconductor products  18  measured. This measurement may be compared with the initial contamination measurement to result in the net contaminants added by the various movements into, out of and through the semiconductor processing tool  14 . 
         [0084]    It should be understood that the exemplary embodiments may be varied. For example, the semiconductor product  18 A may be placed on a different lower shelf than the first shelf, the semiconductor product  18 B may be placed on a different upper shelf other than the 25 th  shelf and the semiconductor product  18 C may be placed on a different shelf between the semiconductor products  18 A,  18 B other than the 24 th  shelf. Further, the order of transporting the semiconductor products through the load ports may be varied from LP 1 -LP 4 -LP 2 -LP 3 -LP 1  to something different such as LP 1 -LP 2 -LP 3 -LP 4 . The same wafer carrier may be used at all load ports instead of using a different wafer carrier at each load port. In addition, more than three semiconductor products may be used in each wafer carrier. While the preferred exemplary embodiment processes the semiconductor products  18  through all of the load ports, the method may be varied so that the semiconductor products  18  may be processed through less than all of the load ports. 
         [0085]    It should be understood further that no processing of the semiconductor products that alters the semiconductor products may occur during the exemplary embodiments. That is, the semiconductors products may undergo a process such as mapping but this process does not alter the semiconductor products in any way other than possibly adding contaminants to the semiconductor products. 
         [0086]    A flow chart of the exemplary embodiments is illustrated in  FIG. 7 . The process may begin by scanning semiconductor products, for example semiconductor wafers, for contaminants (including scratches) and then measuring the contaminants, box  40 . 
         [0087]    Then, the semiconductor products are inserted in a wafer carrier, either manually or by a product handler, box  42 . The wafer carrier may be precleaned before insertion of the semiconductor products to substantially remove any contaminants in the wafer carrier. 
         [0088]    The wafer carrier with the semiconductor products is docked at a first load port of a semiconductor processing tool, box  44 . 
         [0089]    The door of the wafer carrier is opened and the semiconductor products within the wafer carrier are moved through the semiconductor processing tool to a next load port of the semiconductor tool and into a next wafer carrier, box  46 . As described previously, this next load port of the semiconductor processing tool preferably is the load port farthest away from the first load port although the process may be varied by moving to a different load port. It is preferred that the next wafer carrier be a different wafer carrier than the first wafer carrier but in other exemplary embodiments it could be the same wafer carrier. It is further preferred that the next wafer carrier be precleaned to substantially remove any contaminants. 
         [0090]    The door of the next wafer carrier is closed, box  48 , and the next wafer carrier is undocked from the next load port of the semiconductor processing tool, box  50 . 
         [0091]    The process continues to other load ports and wafer carriers, box  52 . If there are other load ports that have not been tested, the process proceeds on the “yes” path to redock the next wafer carrier, box  54 , and then return to open the door of the wafer carrier and move the semiconductor products through the semiconductor processing tool to the next port of the semiconductor processing tool and the next wafer carrier, box  46 . 
         [0092]    The process continues until there are no more load ports to be tested and, preferably, the semiconductor products have been transported back to the first wafer carrier. In this case, the process follows the “no” path. 
         [0093]    The semiconductor products are removed from the wafer carrier, box  56 , and then the semiconductor products are scanned for contaminants (including scratches) and the contaminants are measured. The measurement of the contaminants in this last step, box  58 , are compared with the measurement of the contaminants in the first step, box  40 , to determine the net contaminants resulting from the movement of the semiconductor products into, out of and through the semiconductor processing tool. 
         [0094]    The exemplary embodiments may be performed manually or by computer. 
         [0095]    The present invention may be a system, a method, and/or a computer program product. The computer program product may include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present invention. 
         [0096]    The computer readable storage medium can be a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable storage medium may be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer readable storage medium includes the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or raised structures in a groove having instructions recorded thereon, and any suitable combination of the foregoing. A computer readable storage medium, as used herein, is not to be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses passing through a fiber-optic cable), or electrical signals transmitted through a wire. 
         [0097]    Computer readable program instructions described herein can be downloaded to respective computing/processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and/or a wireless network. The network may comprise copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. A network adapter card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium within the respective computing/processing device. 
         [0098]    Computer readable program instructions for carrying out operations of the present invention may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++ or the like, and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The computer readable program instructions may execute entirely on the user&#39;s computer, partly on the user&#39;s computer, as a stand-alone software package, partly on the user&#39;s computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user&#39;s computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present invention. 
         [0099]    Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer readable program instructions. 
         [0100]    These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, a programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable storage medium having instructions stored therein comprises an article of manufacture including instructions which implement aspects of the function/act specified in the flowchart and/or block diagram block or blocks. 
         [0101]    The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process, such that the instructions which execute on the computer, other programmable apparatus, or other device implement the functions/acts specified in the flowchart and/or block diagram block or blocks. 
         [0102]    The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions. 
         [0103]    It will be apparent to those skilled in the art having regard to this disclosure that other modifications of the exemplary embodiments beyond those embodiments specifically described here may be made without departing from the spirit of the invention. Accordingly, such modifications are considered within the scope of the invention as limited solely by the appended claims.