Abstract:
Circuits, methods, and apparatus that provide for the powering of active components in connector inserts at each end of a cable may in various ways. For example, where a host is coupled to a device that is not self-powered, the host may provide power for circuitry at each end of the cable. In various embodiments of the present invention, the device may request higher voltage from the host, such that more power can be delivered. In these cases, the device may regulate the voltage received from the host to a lower voltage, and then provide the lower voltage to circuitry at one or both ends of the cable. Where the host is connected to a device that is self-powered, the host and the self-powered device may power their respective connector insert circuits.

Description:
CROSS-REFERENCES TO RELATED APPLICATIONS 
     This application is a continuation of U.S. patent application Ser. No. 13/615,642, filed Sep. 14, 2013, which is a continuation of Ser. No. 13/173,979, filed Jun. 30, 2011, which claims the benefit of U.S. provisional patent applications Nos. 61/360,436, filed Jun. 30, 2010, 61/360,432, filed Jun. 30, 2010, and 61/446,027, filed Feb. 23, 2011, and is related to co-pending U.S. patent application Ser. No. 13/173,739, filed Jun. 30, 2011, titled Circuitry for Active Cable, which are incorporated by reference. 
    
    
     BACKGROUND OF THE INVENTION 
     Electronic devices often include connectors to provide ports where power and data signals can be shared with other devices. These connectors are often designed to be compliant with a standard, such that the electronic devices can communicate with each other in a reliable manner. The various Universal Serial Bus (USB), Peripheral Component Interconnect Express (PCie), and DisplayPort (DP) standards are but a few examples. 
     Often, devices communicate over cables. These cables may have a plug or insert on each end, which plug into receptacles in the devices. But the data rates of these standards are increasing tremendously, and new types of cables are needed in order for devices to communicate at these higher data rates. 
     To meet these increased data rates, active circuits may be included in the cable. But these active circuits need to be powered. It is typically undesirable to provide power to these cables using a source other than one of the connected devices. That is, it may be undesirable to power a first cable using a second cable. 
     For this reason, power may be provided to active circuits in a cable by the devices being connected by the cable. But these devices may have unequal power delivery capabilities. For example, a first device may be powered by a wall outlet, while a second device may derive its power from the first device. Also, various devices may provide various voltage levels. 
     Thus, what is needed are circuits, methods, and apparatus that power active circuits in a cable in an intelligent and configurable manner. It may also be desirable to reduce power by providing various states such as sleep and other lower power states. 
     BRIEF SUMMARY OF THE INVENTION 
     Accordingly, embodiments of the present invention provide circuits, methods, and apparatus that power active circuits in a cable in an intelligent and configurable manner. 
     In various embodiments of the present invention, the active components in connector inserts at each end of a cable may be powered in various ways. For example, where a host is coupled to a device that is not self-powered, the host may provide power for circuitry at each end of the cable. In various embodiments of the present invention, the device may request higher voltage from the host, such that more power can be delivered. In these cases, the device may regulate the voltage received from the host to a lower voltage, and then provide the lower voltage to circuitry at one or both ends of the cable. Where the host is connected to a device that is self-powered, the host and the self-powered device may power their respective connector insert circuits. 
     More specifically, in one embodiment of the present invention, a host may be coupled to communicate with a device that is not powered by a wall-outlet or other external power source, though in various embodiments of the present invention, the device may be powered by an internal or external battery. The host may provide a low-voltage supply to the device via the cable. Circuitry in the cable may be powered from this same low-voltage supply. The cable circuitry may include circuitry in a first cable plug connected to the host, and circuitry in a second cable plug connected to the device. 
     In another embodiment of the present invention, a host may provide a higher voltage to a device. This higher voltage may provide an increased amount of power to the device, and it may allow for faster charging of a battery in, or associated with, the device. But this higher voltage may not be needed to power cable circuits, and using the higher voltage may cause excess power dissipation in the cable. This higher power dissipation may, in turn, cause heating and an unpleasant user experience. Accordingly, the device may receive this higher voltage, and reduce the higher voltage to a lower voltage. This lower voltage may then be used to power the cable circuits. In this way, the circuitry needed to reduce the high voltage to a lower voltage is only included on devices that will use it, and it does not need to be included on every host device. 
     In another embodiment of the present invention, a host may be in communication with a device that is self-powered or powered by a wall outlet or other power source. In this case, the host and the device may each power circuitry in the plug that they are connected to. 
     In other embodiments of the present invention, signals compliant with one of multiple protocols may be provided on a cable. These embodiments of the present invention may provide circuitry to detect which protocol is being used. Also, embodiments of the present invention may provide circuitry to save power by turning off unused circuitry, and providing for sleep states during periods of inactivity. 
     Various embodiments of the present invention may incorporate one or more of these and the other features described herein. A better understanding of the nature and advantages of the present invention may be gained by reference to the following detailed description and the accompanying drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  illustrates a legacy system that may be improved by the incorporation of embodiments of the present invention; 
         FIG. 2  illustrates a computer system according to an embodiment of the present invention; 
         FIG. 3  illustrates a pinout of a connector according to an embodiment of the present invention; 
         FIG. 4  illustrates an electronic system according to an embodiment of the present invention; 
         FIG. 5  illustrates an electronic system where a host provides a high voltage to a device via a cable; 
         FIG. 6  illustrates an electronic system where a host provides power to a left plug, and a host or self-powered device provides power to a right plug; 
         FIG. 7  illustrates another electronic system according to an embodiment of the present invention; 
         FIG. 8  illustrates another electronic system where a host provides a high voltage to a device via a cable; 
         FIG. 9  illustrates another electronic system where a host provides power to a left plug, and a host or self-powered device provides power to a right plug; 
         FIG. 10  illustrates a method of conserving power according to an embodiment of the present invention; 
         FIG. 11  illustrates a state machine that may be used in configuring a data link according to an embodiment of the present invention; and 
         FIG. 12  illustrates another state machine that may be used in configuring a data link according to an embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       FIG. 1  illustrates a legacy system that may be improved by the incorporation of embodiments of the present invention. This figure illustrates computer  110  in communication with legacy display  120  over legacy connection  115 . In a specific embodiment of the present invention, legacy connection  115  is a DisplayPort connection, though in other embodiments of the present invention, other connections may be used. 
     In this figure, connection  115  is shown as a legacy connection. In other embodiments of the present invention, connection  115  may also be a new type of connection. Also, while computer  110  is shown communicating with display  120 , other types of connections may be improved by the incorporation of embodiments of the present invention. For example, a connection may be provided between a portable media player and a display, a computer and a portable media player, or between other types of devices. In various embodiments of the present invention, computer  110 , display  120 , and the other devices shown or discussed may be manufactured by Apple Inc. of Cupertino, Calif. 
     Again, it may be desirable for computer  110  to be able to drive either a legacy display, such as display  120 , or any newer computer, display, or other type of device. Typically, this requires the addition of another connector on computer  110 . This may be undesirable, as it adds complexity, cost, and size to the computer  110 . The addition of another connector may also increase consumer confusion. 
     Accordingly, embodiments of the present invention may provide a newer connection using the same connector as legacy connection  115 . An example is shown in the following figure. 
       FIG. 2  illustrates a computer system according to an embodiment of the present invention. This figure, as with the other included figures, is shown for illustrative purposes and does not limit either the embodiments of the present invention or the claims. 
     This figure illustrates computer  110  communicating with computer or display  220  over high-speed connection  225 . Computer or display  220  communicates with disk drive  230  over high-speed connection  235 . Computer  110  may use the same connector to form a legacy connection  115  in  FIG. 1  and high-speed connection  225  in  FIG. 2 . As shown, the high-speed connection provided by computer  110  may be daisy-chained to multiple devices. In this configuration, each high-speed connection  225  and  235  shares the bandwidth available at the connector of computer  110 . 
     By providing a connector on computer  110  that can support legacy connection  115  in  FIG. 1  and high-speed connection  225  in  FIG. 2 , the number of connectors on computer  110  is reduced. This reduces device size, saves money, and eases consumer confusion. In this example, computer  110  communicates with computer or display  220  and disk drive  230 . In other embodiments of the present invention, other types of devices may be employed. For example, computer  110  may drive a display of an all-in-one computer, a second computer, a stand-alone monitor, an expansion device, a raid drive, or other type of device. 
     An embodiment of the present invention may account for at least two considerations when arranging pinouts for a high-speed connection using an existing legacy connector. First, signals in different channels of the high-speed connection may be arranged such that they do not interfere with each other. That is, cross talk between high-speed signals may be reduced and the signals may be isolated. Second, circuitry to drive and receive the new, high-speed signals and circuitry associated with the legacy standard may be isolated to limit interference between them. An example is shown in the following figure. 
       FIG. 3  illustrates a pinout of a connector according to an embodiment of the present invention. In this example, DisplayPort is the legacy standard, which has been overlaid with pins for a new standard, referred to here as HSIO, and elsewhere in this document as T29. In other embodiments of the present invention, other standards may be used. Also, one or both of these standards may be legacy standards, or one or both of these standards may be newer standards. Also, while two standards are shown here as sharing a connector, in other embodiments of the present invention, other numbers of standards may share a connector. 
     In various embodiments of the present invention, the two standards may be separate and unrelated. In other embodiments of the present invention, they may be related. For example, HSIO may be a high speed signaling technique that carries DisplayPort information. That is, DisplayPort information may tunnel using HSIO signals. HSIO may also carry other types of signal information at the same time, such as PCIe information. In this way, the connector in  FIG. 3  may carry DisplayPort signals directly, or it may carry DisplayPort information that is conveyed as HSIO signals. It should be noted that in various embodiments of the present invention described below, HSIO is also referred to as T29. 
     In this arrangement, the high-speed input and output pins may be isolated from one another. Specifically, high-speed receive signals may be placed on pins  4  and  6 , and  16  and  18 . Each of these pairs of signals may be isolated by signals that are AC grounds. For example, high-speed receive pins  4  and  6  may be isolated by hot plug detect pin  2  and ground pin  8 . Similarly, high-speed receive pins  16  and  18  may be isolated by ground  14  and power pin  20 . High-speed transmit pins  3  and  5 , and  15  and  17 , may be isolated by ground pins  1 ,  7 ,  13 , and  19 . Some or all of the ground pins, such as pins  1  and  7 , may be AC grounds, as opposed to a direct DC connection to ground. That is, these pins may be coupled through a capacitor to ground. This provides a ground connection at high frequencies, while providing an open at low frequencies. This arrangement allows power supplies to be received at these pins, while maintaining a ground at high frequency. 
     In a specific embodiment of the present invention, pin  20  at a first end of cable connects to pin  1  at a second end of the cable. This allows power provided on pin  20  by a host device to be supplied to pin  1  at a device connection. Since pin  1  is coupled to ground through a capacitor, the DC power may be received, though pin  1  provides an AC ground. 
     Also in this arrangement, the high-speed signals in the high-speed HSIO standard may share pins with appropriate signals of the legacy DisplayPort standard. Specifically, the high-speed receive signals on pins  4  and  6  may share pins with configuration signals in the DisplayPort standard. High-speed receive signals on pins  16  and  18  may share pins with auxiliary signals in the DisplayPort standard. High-speed transmit signals on pins  3  and  5  may share pins with DisplayPort output signals, as may the high-speed transmit signals on pins  15  and  17 . 
     Again, in various embodiments of the present invention, active cables may convey signals compliant with various standards. As discussed above, in a specific embodiment of the present invention, these may be referred to as HSIO and DisplayPort. The active cables may be able to determine which standards are being used by detecting the states of various pull-up or pull-down resistors. Examples of this may be found in co-pending U.S. patent application Ser. No. 13/173,739, titled Circuitry for Active Cable, which is incorporated by reference. 
     In various embodiments of the present invention, active cables may connect various types of electronic devices together. These electronic devices may include host devices and other types of devices. These other types of devices may include their own power supplies, or they may be powered by the host device. A device that has its own power supply may draw power from a battery, wall socket, car charger, or other supply. These devices may be devices such as disk drives, monitors, or other types of devices. 
     Again, a host according to an embodiment of the present invention may be capable of providing a higher voltage, such as 12 or 15V. In these circumstances, more power can be provided to a second device without increasing the maximum current. Components in the cable may not operate at the high voltage, so the second device may provide the lower voltage to the cable circuitry. Also, by providing the circuitry for generating the lower voltage on the second device, this circuitry does not need to be included in the host. An example is shown in the following figure. 
       FIG. 4  illustrates an electronic system according to an embodiment of the present invention. This figure includes host  480  coupled to device  490  via cable  410 . Cable  410  includes left plug  424  connected to host  480 , and right plug  454  connected to device  490 . Host  480  may be capable of providing one or more voltages to both device  490  and cable circuitry in cable  410 . Host  480  may provide a lower voltage of 3.3 V, or a higher voltage of 12 or 15 volts. In other embodiments of the present invention, host  480  may provide various voltage levels to host  480  and cable circuitry in cable  410 . 
     In this specific example, host  480  provides 3.3 V to the cable circuitry in cable  410  and device  490 . Accordingly, switch  482  in host  480  provides 3.3 V as voltage V 1 . This voltage pulls up on the gate of transistor N 1 , thereby turning on transistors N 1  and P 1 . Transistor P 1  provides 3.3 V to cable microcontroller  422  and switches  424 . This voltage further turns on the body diode of transistor P 2 , which pulls the voltage on line V 2  to 2.6 V, or 3.3 V less one diode drop. This voltage turns on transistors N 3  and P 3 , thereby connecting the voltage on line V 2  to cable microcontroller  452  and switches  454 . Transistors N 4  and P 4  are off, thereby isolating the voltage on line V 2  from the voltage on line V 1 . 
     Voltage V 1  is received by low-drop-out regulator  492  in device  490 , which provides power to port microcontroller  494 . The host port microcontroller  484  may then communicate with cable microcontrollers  422  and  452  and port microcontroller  494  to determine proper configuration for the cable. In a specific embodiment of the present invention, the host port microcontroller  484  may check with device port microcontroller  494  to determine whether device  490  requires a higher level of power. If it does, host port microcontroller  484  may check with cable microcontroller  422  to determine whether the cable can support the delivery of this higher level of power. If device  490  requires higher power, and the cable can deliver it, then host  480  may provide the higher level of power. In another embodiment of the present invention, host port microcontroller  484  may determine how much power will be needed by the cable and device  490 . In some circumstances, one link including one pair of clock and data recovery circuits, or other circuitry, may need to be powered off. 
     In this example, power supply  496  receives only 3.3 V on line V 1  from host  480 . At this voltage, power supply  496  may be in an under-voltage lock-out state, and may therefore be powered off. In this state, power supply  496  does not provide power to the cable circuitry. 
     In this example, the cable plug circuitry includes clock and data recovery circuits  426  and  456 . These clock and data recovery circuits may receive and retime data received from host  480 , device  490 , and from each other. Examples of this can be found in co-pending U.S. patent application Ser. No. 13/173,739, titled Circuitry for Active Cable, which is incorporated by reference. 
     Again, host  480  is capable of providing a higher voltage, such as 12 or 15 V. In these circumstances, while it may be desirable to provide this higher voltage to device  490 , this higher voltage may cause excess power dissipation, and thus heating, in circuitry of cable  410 . Accordingly, in various embodiments of the present invention, while device  490  receives a higher voltage from host  480 , device  490  in turn provides a lower voltage to the cable circuitry. This allows cable power dissipation to remain low. Also, by providing the circuitry for generating the lower voltage on device  490 , this circuitry does not need to be included in host  480 . Accordingly, in circumstances where host  480  does not need to provide this lower voltage, the circuitry is not wasted. Instead, the circuitry is only included on devices that need the higher voltages. An example is shown in the following figure. 
       FIG. 5  illustrates an electronic system where host  580  provides a high voltage to device  590  via cable  510 . Again, providing a high voltage to cable circuitry in cable  510  may cause excessive power dissipation and component heating in left plug  520  and right plug  550 . Accordingly, in this embodiment of the present invention, device  590  receives a higher voltage from host  580 , and in turn provides a lower voltage to cable circuitry in cable  510 . Either the higher voltage provided by the host  580 , or the lower voltage generated by device  590 , may be used to power device  590 , charge a battery in or associated with device  590 , or used for other purposes. 
     Specifically, high voltage power switch  586  in host  580  provides 12 V on line V 1 . This 12 V causes shunt regulator  522  to turn off transistors N 1  and P 1 . The high voltage is received in device  590  by low-drop-out regulator  592 , which provides a lower regulated voltage to port microcontroller  594 . The higher voltage received by device  590  is regulated to a lower supply, such as 3.3 V, and provided on line V 2  by power supply  596 . This in turn may turn on transistor P 3 , which provides the voltage on line V 2  to cable microcontroller  552  and switches  554 . Since transistor N 1  is off, transistors N 2  and P 2  are on, thereby coupling the 3.3 V on line V 2  to cable microcontroller  523  and switches  524 . 
     In this way, host  580  provides a high voltage (12V) to device  590 . This higher voltage increases the amount of power that host  580  can provide to device  590 . This, in turn, may decrease battery charging times. Device  590 , in turn, returns a low voltage (3.3V) to cable circuitry in left plug  520  and right plug  550  in cable  510 . That is, the high voltage V 1  is not used to directly power any of the cable circuits. Instead, the higher voltage on V 1  is reduced by power supply  596  to a lower voltage, which is provided on line V 2 . This lower voltage then powers the active circuits in left plug  520  and right plug  550 . 
     Again, in some embodiments of the present invention, a host may connect to another host or a self-powered device. In such a case, it is desirable for each host or self-powered device to power its own corresponding plug. In this way, power does not need to be sent through the cable. An example is shown in the following figure. 
       FIG. 6  illustrates an electronic system where host  680  provides power to left plug  620 , and host or self-powered device  690  provides power to right plug  650 . In this example power switch  682  in host  680  provides 3.3 V on line V 1  to left plug  620 . This voltage turns on transistors N 1  and P 1 , thereby providing 3.3 V to cable microcontroller  622  and switches  624 . Similarly, power switch  692  in host or self-powered device  690  provides 3.3 V on line V 2  to right plug  650 . This voltage turns on transistors N 3  and P 3 , thereby providing 3.3 V to cable microcontroller  652  and switches  654 . 
     A transient condition may occur when left plug  620  is connected to host  680  before right plug  650  is connected to a host or self-powered device  690 . During this transient condition, the 3.3 V on line V 1  may turn on transistors N 1  and P 1 . This may turn on P 2  through its body diode, thereby bringing the voltage on line V 2  to 2.6 V. When right plug  650  is connected to host or self-powered device  690 , power switch  692  may provide 3.3 V on line V 2 , thereby shutting off transistor P 2 . 
     In the above embodiments of the present invention, specific circuit configurations are shown. In other embodiments of the present invention, other circuit configurations may be employed. These circuits may be formed using discrete components, they may be partially integrated, or they may be fully integrated. Another specific circuit configuration is shown in the following figures. 
       FIG. 7  illustrates another electronic system according to an embodiment of the present invention. In these examples, two shunt regulators are used. Using two shunt regulators may prevent a situation where both a host and a device provide a high voltage, and both plugs connect their circuits to their respective pin  1 , even though a high voltage is provided on that pin. Using two shunt regulators means circuits in both plugs may be disconnected and therefore protected from the higher power. 
     This figure includes host  780  coupled to device  790  via cable  710 . Cable  710  includes left plug  724  connected to host  780 , and right plug  754  connected to device  790 . Host  780  may be capable of providing one or more voltages to both device  790  and cable circuitry in cable  710 . Host  780  may provide a lower voltage of 3.3 V, or a higher voltage of 12 or 15 volts. In other embodiments of the present invention, host  780  may provide various voltage levels to host  780  and cable circuitry in cable  710 . 
     In this specific example, host  780  provides 3.3 V to the cable circuitry in cable  710  and device  790 . Accordingly, switch  782  in host  780  provides 3.3 V as voltage V 1 . This voltage pulls up on the gate of transistor P 1 , thereby turning off transistors P 1  and turning on transistor P 2 . Transistor P 2  provides 3.3 V to cable microcontroller  722  and switches  724 . This voltage further turns on the body diode of transistor P 4 , which pulls the voltage on line V 2  to 2.6 V, or 3.3 V less one diode drop. This voltage turns off transistor P 5  and turns on transistor P 6 , thereby connecting the voltage on line V 2  to cable microcontroller  752  and switches  754 . Transistor P 8  is off, thereby isolating the voltage on line V 2  from the voltage on line V 1 . 
     Voltage V 1  is received by low-drop-out regulator  792  in device  790 , which provides power to port microcontroller  794 . Host port microcontroller  784  may then communicate with cable microcontrollers  722  and  752  and device port microcontroller  794  to determine proper configuration for the cable. As before, the host port microcontroller  784  may determine whether higher power levels may be provided, and whether some circuits may need to be powered down. 
     In this example, power supply  796  receives only 3.3 V on line V 1  from host  780 . At this voltage, power supply  796  may be in an under-voltage lock-out state, and may therefore be powered off. In this state, power supply  796  does not provide power to the cable circuitry. 
     Again, host  780  is capable of providing a higher voltage, such as 12 or 15 V. In these circumstances, while it may be desirable to provide this higher voltage to device  790 , this higher voltage may cause excess power dissipation, and thus heating, in circuitry of cable  710 . Accordingly, in various embodiments of the present invention, while device  790  receives a higher voltage from host  780 , device  790  in turn provides a lower voltage to the cable circuitry. This allows cable power dissipation to remain low. Also, by providing the circuitry for generating the lower voltage on device  790 , this circuitry does not need to be included in host  780 . Accordingly, in circumstances where host  780  does not need to provide this lower voltage, the circuitry is not wasted. Instead, the circuitry is only included on devices that need the higher voltages. An example is shown in the following figure. 
       FIG. 8  illustrates another electronic system where host  880  provides a high voltage to device  890  via cable  810 . Again, providing this high voltage to cable circuitry in cable  810  may cause excessive power dissipation and component heating in left plug  820  and right plug  850 . Accordingly, in this embodiment of the present invention, device  890  receives a higher voltage from host  880 , and in turn provides a lower voltage to cable circuitry in cable  810 . Again, either the higher voltage provided by the host  880 , or the lower voltage generated by device  890 , may be used to power device  890 , charge a battery in or associated with device  890 , or used for other purposes. 
     Specifically, high voltage power switch  886  in host  880  provides 12 V on line V 1 . This 12 V causes shunt regulator  812  to turn on transistors P 1 , which turns off transistor P 2 . The high voltage is received in device  890  by low-drop-out regulator  892 , which provides a lower regulated voltage to port microcontroller  894 . The higher voltage received by device  890  is regulated to a lower supply, such as 3.3 V, and provided on line V 2  by power supply  896 . This in turn may turn on transistor P 6 , which provides the voltage on line V 2  to cable microcontroller  852  and switches  854 . Since transistors N 1  and P 3  are off, transistor P 4  is on, thereby coupling the 3.3 V on line V 2  to cable microcontroller  822  and switches  824 . 
     In this way, host  880  provides a high voltage (12V) to device  890 . This higher voltage increases the amount of power that host  880  can provide to device  890 . This, in turn, may decrease battery charging times. Device  890 , in turn, returns a low voltage (3.3V) to cable circuitry in left plug  820  and right plug  850  in cable  810 . That is, the high voltage V 1  is not used to directly power these cable circuits. Instead, the higher voltage on V 1  is reduced by power supply  896  to a lower voltage, which is provided on line V 2 . This lower voltage then powers the active circuits in left plug  820  and right plug  850 . 
     Again, if a high voltage is provided on the respective pin  20 s by both host  880  and device  890 , the additional shunt regulators  814  and  864  may turn off device P 4  and P 8 , respectively. This, in turn, protects the cable circuitry from being connected to the high voltages. 
     Again, in some embodiments of the present invention, a host may connect to another host or a self-powered device. In such a case, it is desirable for each host or self-powered device to power its own corresponding plug. In this way, power does not need to be sent through the cable. An example is shown in the following figure. 
       FIG. 9  illustrates another electronic system where host  980  provides power to left plug  920 , and host or self-powered device  990  provides power to right plug  950 . In this example power switch  982  in host  980  provides 3.3 V on line V 1  to left plug  920 . This voltage turns on transistor P 1 , thereby providing 3.3 V to cable microcontroller  922  and switches  924 . Similarly, power switch  992  in host or self-powered device  990  provides 3.3 V on line V 2  to right plug  950 . This voltage turns on transistor P 6 , thereby providing 3.3 V to cable microcontroller  952  and switches  954 . 
     A transient condition may occur when left plug  920  is connected to host  980  before right plug  950  is connected to a host or self-powered device  990 . During this transient condition, the 3.3 Von line V 1  may turn on transistor P 1 . This may turn on P 4  through its body diode, thereby bringing the voltage on line V 2  to 2.6 V. When right plug  950  is connected to host or self-powered device  990 , power switch  992  may provide 3.3 V on line V 2 , thereby shutting off transistor P 4  and reducing its body diode current. 
     Again, in various embodiments of the present invention, various circuit configurations may be used. In this and other embodiments, shunt regulators may be used. These shunt regulators may receive a voltage, provided in the above examples by a resistor divider. This received voltage is compared to an internal reference voltage. If the received voltage is higher than the reference, an output transistor may conduct; if the received voltage is lower than the reference, an output transistor may be off. For example, in  FIG. 7 , the voltage on line V 1  is only 3.3V, and the received voltage is less than the reference. In this case, the output transistor in the shunt regulator is off, and P 1  is off, which turns on P 2 . In  FIG. 8 , the voltage on line V 1  is 12V, and the received voltage is higher than the reference. In this case, the output transistor in the shunt regulator is on, and P 1  is on, which turns off P 2 . 
     With the above configurations, if received power is below a threshold, the received power is used to power both plugs if the sink device is not self-powered. If the received power is above the threshold the received power is used by the sink device to generate a voltage to power the active circuitry in the plugs. If the sink device is self-powered, each device can power its own plug. In various embodiments of the present invention, various numbers of these regulators may be used, and they may be placed in various locations. 
     In these and other embodiments of the present invention, hysteresis may be included to reduce chattering and the possibility of oscillations. For example, resistors Rhys have been added to the circuits in  FIGS. 7-9  to provide hysteresis to the above threshold where the various states are entered. 
     Embodiments of the present invention may include circuits to receive and retime data. For example, one of more clock and data recovery circuits  926  and  956  may be included in either or both of the plugs  920  and  950 . Clock and data recovery circuits  926  in left plug  920  may receive signals from host  980  and provide them to the clock and data recovery circuits  966  in the right plug  950 . Similarly, clock and data recovery circuits  956  in right plug  950  may receive signals from device  990  and provide them to the clock and data recovery circuits  926  in the left plug  920 . In various embodiments of the present invention, one or two lanes of bidirectional traffic may be provided by the clock and data recovery circuits  926  and  956 . Examples of this can be found in co-pending U.S. patent application Ser. No. 13/173,739, titled Circuitry for Active Cable, which is incorporated by reference. 
     In these examples, a switch is shown as being coupled to each of two clock and data recovery circuits in each plug. In other embodiments of the present invention, only one switch may be connected to two clock and data recovery circuits. When one clock and data recovery circuit is not needed, it may be powered down via software instead of a physical switch. In other embodiments of the present invention, other power management techniques may be used. 
     In various embodiments of the present invention, much of the configuration of the cable circuitry is controlled using the port microcontrollers  984  and  994 , and cable microcontrollers  922  and  952 . These microcontrollers may be connected to each other using signals that originate on the LSR2P TX and LSP2R RX pins. These pins may be referred to as the LSx bus. 
     This bus may convey signals that turn off circuitry associated with unused channels or lanes, that determine the presence of a connection, and that may negotiate for higher voltages. For example, the presence of a connection may be facilitated by each endpoint (host or device) having a weak (1MΩ) pull-down on the LSP2R RX pin and a stronger (10KΩ) pull-up on the LSR2P TX pin. Since the cable crosses over from end-to-end, each end can sense its P2R signal to determine whether there is a powered host or device on the far side, and continue to allow power management when the cable is not fully connected. Also, if a device requires that a higher voltage be provided by a host, the device may request the increase in voltage using the LSx bus. 
     Again, in various embodiments of the present invention, the cable microcontrollers may be in communication with the port microcontrollers in hosts and devices that are communicating over the cable. In a specific embodiment of the present invention, a port microcontroller in a first device may communicate directly with a cable microcontroller in the plug inserted in the first device, as well as a port microcontroller in a remote device attached to the remote plug. Further communication may be had with the remote or far-end plug by “bouncing” messages of the port microcontroller in the remote device. 
     These communications between port and cable microcontrollers may take various forms. Traditionally, interconnections were fixed at each end, with little opportunity for discovery of improved capabilities or flexible implementations. Accordingly, embodiments of the present invention provide this ability to communicate, such that, for example, a cable may share information regarding its features to a host or device, and the host or device may utilize such features. 
     In other examples, these communications between the various port and cable microcontrollers may be diagnostic in nature. These diagnostic communications may aid in the isolation of faults, by an end user or other, which may allow rapid remediation of issues and may focus attention on devices causing the fault. These communications may be useful in test and manufacturing as well. They may also be used to optimize the configuration for power savings, for example, a channel that is not used may be powered down, a low-power remote device may be powered by a host, such that the device does not require a connection to a wall-outlet. Also, power consumed by remote devices may be monitored, and power increases (or decreases) may be enabled as needed. They may also allow devices to continue to operate despite various impairments. They may also enable the use of either copper or other conductor, or fiber optics in the cable itself. Further examples of this can be found in co-pending U.S. patent application Ser. No. 13/173,739, titled Circuitry for Active Cable, which is incorporated by reference. 
     In these embodiments of the present invention, cable microcontrollers  922  and  952  control switches  924  and  954 , which connect or disconnect power to and from clock and data recovery circuits  926  and  956 . Cable microcontrollers  922  and  952  and clock and data recovery circuits  926  and  956  consume power, which may discharge a battery over time or otherwise waste power. Accordingly, when these circuits are not needed, they may be powered down. For example, if only one data link in cable  910  is used, one set of clock and data recovery circuits  926  and  956  may be disabled by cable microcontrollers  922  and  952 . Also, if no data is being transferred from host  980  to device  990 , circuits in the left plug  920  and right plug  950  may be turned off to save power. An example is shown in the following figure. 
       FIG. 10  illustrates a method of conserving power according to an embodiment of the present invention. After a power-up, reset, or other start event  1010 , it is determined in act  1020  whether there has been no data activity through the cable for a time T 1 . If there has not been activity, a low-power sleep state may be entered in act  1030 . In act  1040 , it is determined whether there has been a data edge, for example on a low speed or high-speed input. If there has been a data edge, the sleep state may be exited and code needed for operation of the cable may begin being loaded in act  1050 . On occasion, such an edge may be a noise transient. Such an edge might not be followed by any further activity. In this case, the sleep state may be reentered in act  1030 . If there is activity within the time T 2  (act  1060 ), the remainder of the code may be loaded in act  1070 , and or normal operation resumed. 
     Again, connectors and cables consistent with embodiments of the present invention may be able to handle two or more signal protocols. In a specific embodiment of the present invention, two protocols are DisplayPort and a high-speed protocol HSIO, which in the following example is referred to as T29. Accordingly, when devices are connected together using a cable consistent with embodiments of the present invention, a determination is made by a port microcontroller, such as port microcontroller  984 , as to which protocol is being used. An example of how this determination is made is shown in the following figure. 
       FIG. 11  illustrates a state machine that may be used in configuring a data link according to an embodiment of the present invention. In a specific embodiment of the present invention, these determinations may be made by a port microcontroller, such as port microcontroller  984 , or other microcontroller or state machine. 
     After a power up or reset condition, the reset state  1100  is entered. In general, the presence of a DisplayPort link is detected by a high pull-up on hot plug detect line HPD. Accordingly, if hot plug detect is sensed as high, a connect state  1110  is entered. At this point, it is determined whether the high state is maintained for a period of time, for example, 100 ms. This determination has the effect of debouncing the voltage on the HPD line. If this high state is maintained, the DisplayPort state  1112  may be entered. If there is a low signal on the hot plug detect line, reset stage  1100  is reentered. The port microcontroller may remain in DisplayPort state  1112  until the hot plug detect returns low. In this case, the disconnect state  1114  is entered. 
     Disconnect state  1114  provides an amount of hysteresis to prevent DisplayPort state  1112  from being exited prematurely. For example, DisplayPort provides for second interrupts via the HPD pin. These interrupts may be high-low-high pulses on HPD lasting for less than 1 ms. These interrupts should not be seen as a disconnect, and providing this hysteresis (the 10 ms delay) prevents this. Accordingly, if hot plug detect remains low for 10 ms, the reset stage  1100  is reentered, otherwise DisplayPort state  1112  is re-entered. 
     Also, in general, the presence of a T29 connection is determined by a configuration pin CONFIG.  2  (identified elsewhere as CFG 2 ) being high. When this is true, reset state  1100  is exited and T29 connect state  1120  is entered. A loopback state  1122  may be entered by passing a unique ID from an input to an output. If CONFIG.  2  returns low, T29 disconnect state  1124  may be entered. As with the disconnect state  1114 , T29 disconnect state  1124  provides an amount of hysteresis, and prevents an early exit from a T29 connect state. 
     Once in T29 connect state  1120 , if data is received, cable state  1126  is entered. Once cable state  1126  is entered, if data is again received, the T29 state  1128  is entered. Cable state  1126  and cable state  1128  may be exited if CONFIG.  2  returns low, as shown. 
     As described above, in various embodiments of the present invention, various sleep states may be entered. For example, a command may be received instructing the port microcontroller to prepare to sleep or prepare to enter a quiescence state, whereupon states  1158  or  1160  are entered. 
     In the above example, as the supplied power ramps up from a low voltage to a high voltage, there may be a time where P 2  in  FIG. 8  turns off because the shunt threshold has been crossed, but device  890  does not yet have enough voltage to provide 3.3V to its pin  20 . As a result the cable “browns-out,” and CONFIG.  2  may drop. It may be undesirable to detect this as disconnect. Accordingly, once serial communications have been done successfully CONFIG.  2  becomes a don&#39;t-care and only a UART break may be detected as a disconnect. An example is shown in the following figure. 
       FIG. 12  illustrates a state machine that may be used in configuring a data link according to an embodiment of the present invention. In a specific embodiment of the present invention, these determinations may be made by a port microcontroller, such as host port microcontroller  984 , or other microcontroller or state machine. 
     After a power up or reset condition, the reset state  1200  is entered. In general, the presence of a DisplayPort link is detected by a high pull-up on hot plug detect line HPD. Accordingly, if hot plug detect is sensed as high, a connect state  1210  is entered. At this point, it is determined whether the high state is maintained for a period of time, for example, 100 ms. This determination has the effect of de bouncing the voltage on the HPD line. If this high state is maintained, the DisplayPort state  1212  may be entered. If there is a low signal on the hot plug detect line, reset stage  1200  is reentered. The port microcontroller may remain in DisplayPort state  1212  until the hot plug detect returns low. In this case, the disconnect state  1214  is entered. 
     Disconnect state  1214  provides an amount of hysteresis to prevent DisplayPort state  1212  from being exited prematurely. For example, DisplayPort provides for second interrupts via the HPD pin. These interrupts may be high-low-high pulses on HPD lasting for less than 1 ms. These interrupts should not be seen as a disconnect, and providing this hysteresis (the 10 ms delay) prevents this. Accordingly, if hot plug detect remains low for 10 ms, the reset stage  1200  is reentered, otherwise DisplayPort state  1212  is re-entered. 
     Also, in general, the presence of a T29 (or TBT) connection is determined by a configuration pin CONFIG.  2  (identified elsewhere as CFG 2 ) being high. When this is true, reset state  1200  is exited and TBT (identified elsewhere as T29) connect state  1220  is entered. A loop back state  1222  may be entered by passing a unique ID from an input to an output. If CONFIG.  2  returns low, TBT disconnect state  1224  may be entered. As with the disconnect state  1214 , TBT disconnect state  1224  provides an amount of hysteresis, and prevents an early exit from a TBT connect state. 
     Once in TBT connect state  1120 , if data is received, cable state  1226  is entered. Once cable state  1226  is entered, if data is again received, the TBT state  1228  is entered. Once TBT state  1228  is entered, it is exited by a UART break, and the Break state  1240  is entered. Again, in this embodiment of the present invention, TBT state  1228  is not exited by the loss of the pull-up on CONFIG.  2 . If data is not received in 5 ms, the cable state  1226  is entered. If data is received, the TBT state  1228  may be reentered. Also, in this embodiment, one or more lanes may not be enabled for TBT data transmission. In this case, when in the cable state  1226 , a wait for power state  1242  may be entered until the lane or channel is enabled. 
     Again, in various embodiments of the present invention, various sleep states may be entered. For example, a command may be received instructing the port microcontroller to prepare to sleep or prepare to enter a quiescence state, whereupon state  1258  is entered. 
     The above description of embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form described, and many modifications and variations are possible in light of the teaching above. The embodiments were chosen and described in order to best explain the principles of the invention and its practical applications to thereby enable others skilled in the art to best utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. Thus, it will be appreciated that the invention is intended to cover all modifications and equivalents within the scope of the following claims.