Abstract:
A method of changing driving sequence to output a charge coupled device signal, the method is applied to a scanner. The scanner has a pixel processor and a charge coupled device. A plurality of charge signals detected by the charge coupled device is sequentially output to the pixel processor according to the driving sequence. In the method of changing the driving sequence to output the charge coupled device signal, a fast driving sequence is provided. The fast driving sequence has a period equal to 1/N of the original driving sequence. According to the fast driving sequence, the charge signal is sent to the pixel processing circuit. The charge signals are sampled by the processing circuit according to a sampling sequence, and the data obtained by sampling is output.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The invention relates in general to methods of scanning and outputting a charge coupled device signal, and more particularly, to a method of outputting a charge coupled device signal by changing the period of the driving sequence. 
     2. Description of the Related Art 
     In a normal color scanner, a color charge coupled device (CCD) is used as an optical sense device. The color charge coupled device is formed of several sensor cells to sense the intensities of the red (R), green (G) and blue (B) primary color lights.  FIG. 1A  shows a linear charge coupled device. The first row of sensor cells  102  of the linear charge coupled device is used to detect the R light intensity. The second row of sensor cells  104  is to detect the green light intensity, and the third row of sensor cells  106  is used to detect the blue light intensity. After a period of exposure time, different amounts of charges are accumulated according to the light intensities detected by the sensor cells. A charge signal formed by the charges is sent to a register within the period of a dump sequence.  FIG. 2A  shows the sequence of conventional linear charge coupled device signals. When the dump sequence SH is high, the charge signals of the first row of sensor cells  102  are sent to the register  108 . Meanwhile, the charge signals of the second row of sensor cells  104  are sent to the register  110 , and the charge signals of the third row of sensor cells  106  are sent to the register  112 . According to  FIG. 2A , in period T 1  of driving signals φ 1  and φ 2  (using the rising edge of the signal as the data transmitting point), the register  108  sends the charge signal S 1  to the pixel processing circuit  114 . Similarly, in period T 2 , the charge signal S 2  is sent to the pixel processing circuit  114 . The charge signals in the register  108  are thus sequentially sent to the pixel processing circuit  114 . During a pixel sampling sequence, the pixel processing circuit  114  sends the charge signal S 1  to a subsequent circuit at the period TS 1 , and sends the charge signal S 2  to a subsequent circuit at the period TS 2 . Thereafter, the charge signals are sequentially output to the subsequent circuit. The registers  110 ,  112 , and the pixel processing circuits  116  and  118  are similar to the above description. 
     In  FIG. 1B , the stagger charge coupled device has six rows of sensor cells  122 ,  124 ,  126 ,  128 ,  130  and  132 . The first and second rows of sensor cells  122  and  124  are to detect the red light intensities. The third and fourth rows of sensor cells  126  and  128  are to detect the green light intensities. The fifth and the sixth rows of sensor cells  130  and  132  are to detect the blue light intensities. After a certain exposure time, different amounts of charges are accumulated according to the light intensities detected by the sensor cells  122  to  132 .  FIG. 2B  shows the sequence of the stagger charge coupled device signals. When the dump sequence SH is high, the charge signals of the first, second, third, fourth, fifth and sixth rows of sensor cells  122  to  132  are sent to the registers  134 ,  136 ,  138 ,  140 ,  142  and  144 , respectively. In the period T 11  of the driving sequences φ 1  and φ 2 , the register  134  sends the charge signal S 1  to the pixel processing circuit  146 . The charge signal S 3  is sent to the pixel processing circuit  146  in the period T 12 . The register  136  sends the charge signal S 2  to the pixel processing circuit  146  in the period T 21  of the driving sequences φ 1  and φ 2 . The charge signal S 4  is sent to the pixel processing circuit  146  in the period T 22 . Thereafter, the charge signals of the register  134  are sequentially sent to the pixel processing circuit  146 . During the pixel sampling sequence, the pixel processing circuit  146  outputs the charge signals S 1  and S 2  to the subsequent circuit at the period TS 1  and TS 2 , respectively. The registers  126 ,  128 ,  130 ,  132  and the pixel processing circuits  148  and  150  are similar to the above. 
       FIG. 3  shows a block diagram of a scanner. In  FIG. 3 , the sensor  302  converts the charged signal detected by the charge coupled device into an analog voltage signal. Using an analog/digital converter  304 , the analog voltage signal output from the sensor  302  is converted into a digital voltage signal. An application specified integrated circuit  306  and a compensation RAM  310  perform a calculation on the compensation value and the digital voltage signal. The calculated video signal is stored into a video RAM  308 . The data of the image signal is then read from the video RAM  308  by the application specified integrated circuit  306 , and sent to the I/O port  312 . 
     When the scanner is scanning a video document, a high resolution is not always required. Without changing the scanner structure (that is, the amount of the sensor cells in each row of the charge coupled device), the sampling sequence of the analog/digital converter is changed. That is, the scanning optical resolution is reduced to one half, and the sampling sequence of the analog/digital converter is reduced to one half. Or alternatively, the scanning optical resolution is reduced to one quarter, and the sampling sequence of the analog/digital converter is reduced to one quarter. When the optical resolution of the scanner is reduced, and the sampling time of the analog/digital converter is not reduced, the scanning time of the scanner is not reduced, that is, the scanner does not have the function of high scanning speed at low optical resolution. 
     SUMMARY OF THE INVENTION 
     The invention provides a method of changing a driving sequence to output a charge coupled device applied to a scanner. The scanner has a pixel processor and a charge coupled device. According to the driving sequence, a plurality of charge signals detected by the charged couple device is output to the pixel processor sequentially. The pixel processor then sequentially outputs the charged signals according to a sampling sequence. The method of changing the driving sequence to output the charge coupled device signal includes the following steps. A fast driving sequence is provided. The period of the fast driving sequence is 1/N of the period of the original driving sequence. During the fast driving sequence, the charge signal is sent to the pixel processor. The charge signal is then sampled at the pixel processor according to the sampling sequence. The data obtained by sampling is output, such that the scanner possesses the high scanning speed function at a low optical resolution. 
     Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1A  shows a linear charge coupled device; 
         FIGS. 1B  shows a stagger charge coupled device 
         FIGS. 2A  shows the sequence of the conventional linear charge coupled device signal; 
         FIG. 2B  shows the sequence of the conventional stagger charge device signal; 
         FIG. 3  is a block diagram of a scanner; 
         FIG. 4A  shows that the period of the driving sequence becomes one half of the original value; 
         FIG. 4B  shows that the period of the driving sequence becomes one fourth of the original value; and 
         FIG. 4C  shows that the period of the driving sequence becomes one eighth of the original value. 
     
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     In this embodiment, a stagger charge coupled device is used as an example (the linear charge coupled device has different number of rows of sensor cells), of which the structure is illustrated as  FIG. 2B . At the descending edge of the driving sequence, the register sends the charge signal to the video processor. After exposing the stagger charge coupled device within a period of time, different amounts of charges are accumulated according to the light intensity detected by the sensor cells. The charge signals formed by the charges are all sent to the register within a period of a dump sequence. In  FIG. 4A , the period of the driving sequence is reduced to one half. When the dump sequence SH is high, the first row of sensor cells  122  outputs the charge signal to the register  134 . The charge signals of the second row of the sensor cells  124  are sent to the register  136 . Within the period T 1  of the driving sequences φ 1 , φ 2 , the charge signal S 1  is sent to the pixel processor  146 , which then outputs the charge signal S 1  to a subsequent circuit within the period T 1  of the pixel sampling sequence. The register  134  sends the charge signal to the pixel processor  146  within the period T 3  of the register  134 . The pixel processor  146  outputs the charge signal S 3  to the subsequent circuit within the period T 3  of the pixel sampling sequence. The register  136  sends the charge signal S 2  to the pixel processor  146  within the period T 2  of the driving sequence φ 1 , φ 2 . The pixel processor  146  outputs the charge signal S 2  to the subsequent circuit within the period T 2  of the pixel sampling sequence. The register  136  sends the charge signal S 4  to the pixel processor  146  within the period T 4  of the driving sequence φ 1 , φ 2 . The pixel processor  146  outputs the charge signal S 4  to the subsequent circuit within the period T 4  of the pixel sampling sequence. The subsequent sequence operation is similar. 
     When only one half of the optical resolution is required, the period of the driving sequence is one half of the original one. In  FIG. 4A , the register  134  sends the charge signal S 1  to the pixel processor  146  within the period T 21  of the driving sequence φ 1 /2, φ 2 /2. The register  136  sends the charge signal S 2  to the pixel processor  146  within the period T 22  of the driving sequence φ 1 /2, φ 2 /2. The pixel processor  146  outputs the charge signal S 2  to the subsequent circuit within the period T 1  of the pixel sampling sequence. The register  134  sends the charge signal S 3  to the pixel processor  146  within the period T 23  of the driving sequence φ 1 /2, φ 2 /2. The register  136  sends the charge signal S 4  to the pixel processor  146  within the period T 24  of the driving sequence φ 1 /2, φ 2 /2. The pixel processor  146  outputs the charge signal S 4  to the subsequent circuit within the period T 2  of the pixel sampling sequence. Thus, the charge signal of the even number of rows of sensor cells can be output to the subsequent circuit, so that the optical resolution of the scanner is reduced to a half. 
     If the charge signals of the odd number of row of sensor cells are sent to the subsequent circuit, the driving sequence φ 1 /2, φ 2 /2 is shifted by 180°. In  FIG. 4A , the register  134  sends the charge signal S 1  to the pixel processor  146  within the period T 22  of the driving sequence φ 1 /2+π, φ 2 /2+π. The pixel processor  146  then outputs the charge signal S 1  to the subsequent circuit within the period T 1  of the pixel sampling sequence. The register  136  sends the charge signal S 2  to the pixel processor  146  within the period T 23  of the driving sequence φ 1 /2+π, φ 2 /2+π. The register  134  sends the charge signal S 3  to the pixel processor  146  within the period T 24  of the driving sequence φ 1 /2+π, φ 2 /2+π. The pixel processor  146  then outputs the charge signal S 3  to the subsequent circuit within the period T 2  of the pixel sampling sequence. The operation of the subsequent sequences is similar. 
     When only one fourth of the optical resolution of the scanner is required, that is, when the period of the driving sequence becomes one fourth of the original one as shown in  FIG. 4B , the register  134  sends the charge signal S 1  to the pixel processor  146  within the period T 41  of the driving sequence φ 1 /4, φ 2 /4. Meanwhile, the register  136  sends the charge signal S 2  to the pixel processor  146  within the period T 42  of the driving sequence φ 1 /4, φ 2 /4. The register  134  sends the charge signal S 3  to the pixel processor  146  within the period T 43  of the driving sequence φ 1 /4, φ 2 /4. The register  136  sends the charge signal S 4  to the pixel processor  146  within the period T 44  of the driving sequence φ 1 /4, φ 2 /4. The pixel processor  146  then outputs the charge signal S 4  to the subsequent circuit within the period T 1  of the pixel sampling sequence. The register  134  sends the charge signal S 5  to the pixel processor  146  within the period T 45  of the driving sequence φ 1 /4, φ 2 /4. The register  136  sends the charge signal S 6  to the pixel processor  146  within the period T 46  of the driving sequence φ 1 /4, φ 2 /4. The register  134  sends the charge signal S 7  to the pixel processor  146  within the period T 47  of the driving sequence φ 1 /4, φ 2 /4. The register  136  sends the charge signal S 8  to the pixel processor  146  within the period T 48  of the driving sequence φ 1 /4, φ 2 /4. The pixel processor  146  then outputs the charge signal S 8  to the subsequent circuit within the period T 2  of the pixel sampling sequence. Thus, the charge signals of every other four of the sensor cells is output to the subsequent circuit to reduce the optical resolution of the scanner into one fourth. 
     If the third sensor cell is the initial position to output, and the charge signal of every other four sensor cells is sent to the subsequent circuit, the driving sequence is shifted by 180°. In  FIG. 4B , the register  134  sends the charge signal S 1  to the pixel processor  146  within the period T 42  of the driving sequence φ 1 /4+π, φ 2 /4+π. The register  136  sends the charge signal S 2  to the pixel processor  146  within the period T 43  of the driving sequence φ 1 /4+π, φ 2 /4+π. The register  134  sends the charge signal S 3  to the pixel processor  146  within the period T 44  of the driving sequence φ 1 /4+π, φ 2 /4+π. The pixel processor  146  then outputs the charge signal S 3  to the subsequent circuit within the period T 1  of the pixel sampling sequence. The register  136  sends the charge signal S 4  to the pixel processor  146  within the period T 45  of the driving sequence φ 1 /4+π, φ 2 /4+π. The register  134  sends the charge signal S 5  to the pixel processor  146  within the period T 46  of the driving sequence φ 1 /4+π, φ 2 /4+π. The register  136  sends the charge signal S 6  to the pixel processor  146  within the period T 47  of the driving sequence φ 1 /4+π, φ 2 /4+π. The register  134  sends the charge signal S 7  to the pixel processor  146  within the period T 48  of the driving sequence φ 1 /4+π, φ 2 /4+π. The pixel processor  146  then outputs the charge signal S 7  to the subsequent circuit within the period T 2  of the pixel sampling sequence. Thereby, the third sensor cell is the output initial position and the charge signal of every other four sensor cells is output to the subsequent circuit. 
     If the second sensor cell is the initial position for output, and the charge signal of every other four sensor cells is sent to the subsequent circuit, the driving sequence φ 1 /4, φ 2 /4 is shifted by 360°. In  FIG. 4B , the register  134  sends the charge signal S 1  to the pixel processor  146  within the period T 43  of the driving sequence φ 1 / 4 +2π, φ 2 / 4 +2π. The register  136  sends the charge signal S 2  to the pixel processor  146  within the period T 44  of the driving sequence φ 1 / 4 +2π, φ 2 / 4 +2π. The pixel processor  146  then outputs the charge signal S 2  to the subsequent circuit within the period T 1  of the pixel sampling sequence. The register  134  sends the charge signal S 3  to the pixel processor  146  within the period T 45  of the driving sequence φ 1 / 4 +2π, φ 2 / 4 +2π. The register  136  sends the charge signal S 4  to the pixel processor  146  within the period T 46  of the driving sequence φ 1 / 4 +2π, φ 2 / 4 +2π. The register  134  sends the charge signal S 5  to the pixel processor  146  within the period T 47  of the driving sequence φ 1 / 4 +2π, φ 2 / 4 +2π. The register  136  sends the charge signal S 6  to the pixel processor  146  within the period T 48  of the driving sequence φ 1 / 4 +2π, φ 2 / 4 +2π. The pixel processor  146  then outputs the charge signal S 6  to the subsequent circuit within the period T 2  of the pixel sampling sequence. Thereby, the second sensor cell is the output initial position and the charge signal of every other four sensor cells is output to the subsequent circuit. 
     When the scanner requires only one eighth of the optical resolution, the period of the driving sequence becomes one eighth.  FIG. 4C  shows the sequence with a period one eighth of the original one. In  FIG. 4C , the sixth sensor cell is used as the initial position, and the charge signal of every other eight sensor cells is output to the subsequent circuit. The driving sequence φ 1 /8, φ 2 /8 is shifted by 360°. 
     The register  134  sends the charge signal S 1  to the pixel processor  146  within the period T 83  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  136  sends the charge signal S 2  to the pixel processor  146  within the period T 84  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  134  sends the charge signal S 3  to the pixel processor  146  within the period T 85  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  136  sends the charge signal S 4  to the pixel processor  146  within the period T 86  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  134  sends the charge signal S 5  to the pixel processor  146  within the period T 87  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  136  sends the charge signal S 6  to the pixel processor  146  within the period T 88  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The pixel processor  146  then outputs the charge signal S 6  to the subsequent circuit within the period T 1  of the pixel sampling sequence. The register  134  sends the charge signal S 7  to the pixel processor  146  within the period T 89  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  136  sends the charge signal S 8  to the pixel processor  146  within the period T 810  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  134  sends the charge signal S 9  to the pixel processor  146  within the period T 811  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  136  sends the charge signal S 10  to the pixel processor  146  within the period T 812  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  134  sends the charge signal S 11  to the pixel processor  146  within the period T 813  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  136  sends the charge signal S 12  to the pixel processor  146  within the period T 814  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  134  sends the charge signal S 13  to the pixel processor  146  within the period T 815  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The register  136  sends the charge signal S 14  to the pixel processor  146  within the period T 816  of the driving sequence φ 1 /8+2π, φ 2 /8+2π. The pixel processor  146  then outputs the charge signal S 146  to the subsequent circuit within the period T 2  of the pixel sampling sequence. Thus, the sixth sensor cell is used as the initial position for output, and the charge signal of every other eight sensor cells is sent to the subsequent circuit. The optical resolution of the scanner is reduced to one eighth. 
     According to the above, by changing the period of the driving sequence of the charge coupled device, the optical resolution of the scanner can be changed. A phase shift can be performed to the period of the driving sequence to determine which sensor cell is the initial position to output the charge signal thereof to the subsequent circuit. 
     When the scanner is scanning a video document without the requirement of a high resolution, the period of the driving sequence of the charge signal output from the charge coupled device is changed without changing the structure of the scanner. For example, when the optical resolution is reduced to one half, the period of the driving sequence is reduced to one half. When the optical resolution is reduced to one fourth, the period of the driving sequence is reduced to one fourth. When the optical resolution is reduced, the sampling sequence of the analog/digital converter and the operation sequence of the application specific integrated circuit are not changed. Therefore, with the same amount of sampling and processing of data, the scanning speed is increased to output the charge signal by the same amount before reducing the optical resolution. The scanner can thus possess the function of high scanning speed at low optical resolution. 
     The advantage of the invention is to have the function of high scanning speed of the scanner even when the optical resolution is low. 
     Other embodiments of the invention will appear to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples are to be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.