Abstract:
Disclosed herein are a method of preventing fault-injection attacks on Chinese Remainder Theorem (CRT)-Rivest Shamir Adleman (RSA) cryptographic operations, and a recording medium for storing a program implementing the same. First, the method receives first and second primes, that is, different primes, and a randomly selected prime, that is, a random prime, which are used for CRT-RSA cryptographic operations. Thereafter, a cumulative value is calculated by performing an XOR (Exclusive OR) operation on the first prime, the second prime, and the random prime using a push function. Thereafter, the first prime, the second prime, and the random prime are loaded by performing an XOR operation on the cumulative value using a pop function corresponding to the push function. Finally, CRT-RSA operations are executed by computing modulo operations based on the first prime and the second prime.

Description:
CROSS REFERENCE TO RELATED APPLICATION 
       [0001]    This application claims the benefit of Korean Patent Application Nos. 10-2012-0013776 and 10-2012-0074949, filed on Feb. 10, 2012 and Jul. 10, 2012, which are hereby incorporated by reference in its entirety into this application. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Technical Field 
         [0003]    The present invention relates generally to a method of preventing fault-injection attacks on Chinese Remainder Theorem (CRT)-Rivest Shamir Adleman (RSA) cryptographic operations and a recording medium for storing a program implementing the same, and, more particularly, to a method of preventing fault-injection attacks which occur during the execution of a CRT-RSA cryptography algorithm and a recording medium for storing a program implementing the same. 
         [0004]    2. Description of the Related Art 
         [0005]    RSA is a cryptography and authentication system which performs encryption and decryption using a public key and a private key. A CRT-RSA algorithm applies CRT to an RSA algorithm, thereby providing an operational speed four times faster. 
         [0006]    A fault-injection attack on a cryptographic operation device is an analysis method that induces electronic security equipment which executes a cryptography algorithm to make a fault during operations using a variable voltage, a variable clock or a laser, and then analyzes obtained resulting values, thereby obtaining confidential information such as an encryption key. 
         [0007]    A representative of fault-injection attacks on the CRT-RSA algorithm is a Bellcore attack. A variety of protection techniques starting with a Shamir&#39;s protection scheme have been proposed. An example thereof is disclosed in Korean Unexamined Patent Publication Application No. 10-2008-0098252. 
         [0008]    However, the convention protection techniques are problematic in that they are vulnerable to fault-injection attacks or require excessively more operations than the CRT-RSA algorithm. 
       SUMMARY OF THE INVENTION 
       [0009]    Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and an object of the present invention is to provide a method of preventing fault-injection attacks which is capable of preventing fault-injection attacks occurring during the execution of the operations of a CRT-RSA cryptography algorithm, thereby being safe from the fault-injection attacks and also efficiently computing a signature value, and a recording medium for storing a program implementing the method. 
         [0010]    In order to accomplish the above object, the present invention provides a method of preventing fault-injection attacks on CRT-RSA cryptographic operations, including receiving first and second primes, that is, different primes, and a randomly selected prime, that is, a random prime, which are used for CRT-RSA cryptographic operations; calculating a cumulative value by performing an XOR (Exclusive OR) operation on the first prime, the second prime, and the random prime using a push function; loading the first prime, the second prime, and the random prime by performing an XOR operation on the cumulative value using a pop function corresponding to the push function; and executing CRT-RSA operations by computing modulo operations using the first prime and the second prime. 
         [0011]    A fault having occurred during the loading of any one of the first prime, the second prime, and the random prime may spread to remaining values of the first prime, the second prime, and the random prime via the cumulative value, thereby preventing the fault-injection attacks. 
         [0012]    The method may further include calculating first and second multiplication values by multiplying each of the loaded first and second primes by the random prime, calculating a first random reference value by computing (a message to be sent raised to a power of a first exponent) mod (the first multiplication value) and a second random reference value by computing (the message raised to a power of a second exponent) mod (the second multiplication value), and detecting a fault, having occurred during the operations for calculating the first and second random reference values, using the first random reference value and the second random reference value. 
         [0013]    The detecting the fault may include a value obtained by computing (the first random reference value) mod (the loaded random prime) with a value obtained by (the second random reference value) mod (the random prime), and determining that the fault has occurred if the two values are different from each other. 
         [0014]    The method may further include calculating third and fourth random reference values by computing (the loaded first prime) mod (the first random reference value) and (the loaded second prime) mod (the second random reference value), and detecting a fault that has occurred during an operation for calculating a signature value using the third and fourth random reference values. 
         [0015]    The detecting a fault that has occurred during an operation for calculating a signature value may include determining that the fault has occurred if a value obtained by computing (the signature value) mod (the first prime) and a value obtained by computing (the first prime) mod (the first random reference value) are different from each other, or if a value obtained by computing (the signature value) mod (the second prime) and a value obtained by computing (the second prime) mod (the second random reference value) are different from each other. 
         [0016]    The method may further include detecting the fault having occurred during the CRT-RSA operation using a value obtained by adding the first prime, the second prime and the random prime together. 
         [0017]    The random prime may have a size of at least 32 bits. 
         [0018]    In order to accomplish the above object, the present invention provides a recording medium for storing a program implementing the method of preventing fault-injection attacks on CRT-RSA cryptographic operations. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0019]    The above and other objects, features and advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which: 
           [0020]      FIG. 1  is a diagram showing a CRT-RSA cryptography algorithm that is applied to the present invention; 
           [0021]      FIG. 2  is a diagram showing the push function algorithm of the CRT-RSA cryptography algorithm which is applied to the present invention; 
           [0022]      FIG. 3  is a diagram showing the pop function algorithm of the CRT-RSA cryptography algorithm which is applied to the present invention; 
           [0023]      FIGS. 4 to 6  are flowcharts showing the operational flow of a method of preventing fault-injection attacks on CRT-RSA cryptographic operations according to the present invention; and 
           [0024]      FIG. 7  is a block diagram showing the configuration of an apparatus for preventing fault-injection attacks on CRT-RSA cryptographic operations according to the present invention. 
       
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0025]    Reference now should be made to the drawings, throughout which the same reference numerals are used to designate the same or similar components. 
         [0026]    Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. 
         [0027]      FIG. 1  is a diagram showing a CRT-RSA cryptography algorithm that is applied to the present invention. 
         [0028]    As shown in  FIG. 1 , the CRT-RSA cryptography algorithm that is applied to the present invention receives a message m to be sent, a plurality of keys, that is, d, primes p and q, and z=q −1  mod p, and also receives a randomly selected short prime r. 
         [0029]    Thereafter, the value of d is calculated by computing d mod (p−1)*(r−1), and the total cumulative value is calculated by performing an XOR (eXclusive OR) operation on the values of p and r using a push function. Furthermore, the value of d pr  is calculated by computing d mod (q −1 )*(r−1), and the total cumulative value is calculated by performing an XOR operation on the value of q using a push function. 
         [0030]    Here, for a push function that is used to calculate the total cumulative value for the values of p, q and r, refer to  FIG. 2   
         [0031]      FIG. 2  illustrates the push function algorithm of the CRT-RSA cryptography algorithm which is applied to the present invention, particularly the algorithm of the function push(x, y). 
         [0032]    As shown in  FIG. 2 , push(x, y) performs an XOR operation on x and y, and accumulates a resulting value in sum. The set W has variable values accumulated in sum, as elements. 
         [0033]    Accordingly, when push(p, r) in the third row is computed in the algorithm shown in  FIG. 1 , sum=p⊕r and W={p, r} are obtained. Furthermore, when push(q) in the fifth row of  FIG. 1  is calculated, sum=p⊕q⊕r and W={p, q, r} are obtained. 
         [0034]    After the push function in the fifth row of  FIG. 1  has been calculated, p′ is calculated from the product of pop(p) and pop(r), and q′ is calculated from the product of pop(q) and pop(r). 
         [0035]    Here, for the detailed algorithm of the pop function, refer to  FIG. 3 . 
         [0036]      FIG. 3  illustrates the pop function algorithm of the CRT-RSA cryptography algorithm which is applied to the present invention, particularly the detailed algorithm of the function pop(x). 
         [0037]    As shown in  FIG. 3 , pop(x) first calculates the value of T_sum by performing an XOR operation on the remaining elements obtained by eliminating the element x from the set W of  FIG. 2 . Thereafter, the value of Result is calculated by performing an XOR operation on sum calculated in  FIG. 2  and T_sum calculated in  FIG. 3 , and, in turn, the value of Sum is calculated by performing an XOR operation on T_sum and Result. 
         [0038]    Accordingly, T_sum=q⊕r is obtained because T={q, r} is obtained by pop(p) in the sixth row of the algorithm shown in  FIG. 1 , and Result=(p⊕q⊕r)⊕(q⊕r)=p is obtained by performing an XOR operation on sum and T_sum accumulated in  FIG. 2 , with the result that Sum=p⊕q⊕r is obtained. 
         [0039]    In contrast, if p becomes p* because a fault is caused by a Bellcore attack while memory is being accessed in order to retrieve p in  FIG. 2 , the value which is pushed is not p but p*. In this case, the value accumulated in sum is p*⊕q⊕r. Thereafter, Result(q)=(p*⊕q⊕r)⊕(p⊕r)=(p*⊕p⊕q) is obtained while q is being popped in  FIG. 3 , and therefore Result(q)≠q is obtained, with the result that Sum=p*⊕q⊕r is obtained. 
         [0040]    That is, it can be seen that the fault spreads because the fault injected into p influences not only p but also q. In the same manner, the fault may be spread to r. 
         [0041]    When the fault injected into p spreads to q and r as described above, the value of the fault is applied to the value of S pr  calculated by computing m d     pr    mod p′ in the eighth row and the value of S qr  calculated by computing m d     qr    mod q′ in the ninth row, and therefore S pr  in the tenth row becomes different from a value obtained by computing S qr  mod pop(r), with the result that a primary fault is detected in the tenth row. In this case, the probability of detecting the fault is proportional to the length of r. 
         [0042]    Here, since r is a random prime, the length of r is variable. If a large value is selected for r, the probability of an undetectable fault being present decreases, but operational efficiency deteriorates because the modular operation involving the large number should be computed. In contrast, if a small value is selected for r, operational efficiency is relatively higher, but safety may be jeopardized because there is an increased probability of an undetectable fault being present. As a result, in order to provide sufficient safety, the number of bits of r should be at least 32. 
         [0043]    Thereafter, in the 11th row, S p  is calculated by computing S pr  mod pop(p), and in the 12th row, S q  is calculated by computing S qr  mod pop(q). Then the signature value S is calculated by applying S p  and S q , calculated in the 11th and 12th rows, to Garner&#39;s CRT recombination formula. 
         [0044]    An equation for calculating the signature value S using CRT recombination is expressed by the following Equation 1: 
         [0000]        S =((( S   p   −S   q )mod  p )× q   −1  mod  p )× q+S   q    (1)
 
         [0045]    As expressed in Equation 1, the signature value S can be calculated by adding S q  to a value obtained by multiplying a value by q, the last value being obtained by multiplying a value obtained by computing (S p −S q ) mod p by a value obtained by computing q −1  mod p. 
         [0046]    Meanwhile, in the 14th row of  FIG. 1 , a fault injected during CRT recombination in the 13th row is detected using the correlation between the signature value S calculated in the 13th row and S p  or S q . That is, if a value obtained by computing S pr  mod p or a value obtained by computing S qr  mod q is different from the signature value S, it is determined that a fault has been injected, and the fault is detected. 
         [0047]    Furthermore, when a fault is injected during an internal operation of the pop function in the 11th row of  FIG. 1 , the value of p which is used for a modulo operation is distorted, and also the distorted value of q is calculated when the value of q is popped in the 12th row, so that the fault spreads. In this case, a Bellcore attack is not applied. 
         [0048]    When a fault is injected during an internal operation of the pop function in the 11th row as described above, check≠0 is obtained because of the spread of the fault in the 15th row, with the result that the fault is finally detected in the 16th row. 
         [0049]      FIG. 4  to  FIG. 6  are flowcharts showing the operational flow of a method of preventing fault-injection attacks on CRT-RSA cryptography operations according to the present invention. 
         [0050]    First, as shown in  FIG. 4 , the method of preventing fault-injection attacks on CRT-RSA cryptography operations according to the present invention receives a plurality of factors, that is, a message m to be sent, d, primes p and q, and z=q −1  mod p as keys, and also receives a randomly selected short primer at step S 100 . 
         [0051]    Thereafter, the value of d pr  is calculated using d, p and r, input at step S 100 , at S 110 , and a value obtained by performing an XOR operation on the values of p and r used using a push function is accumulated in sum at step S 120 . Here, the value of d pr  is calculated by computing d mod (p−1)*(r−1). 
         [0052]    Meanwhile, the value of d pr  is calculated using d, q and r, input at step S 100 , at S 130 , and a value obtained by performing an XOR operation on the value of q using a push function is accumulated in sum at step S 140 . Here, the value of d pr  is calculated by computing d mod (q−1)*(r−1). 
         [0053]    For the push function which is used to calculate the cumulative value for the values of p, q and r at steps S 120  and S 140 , refer to  FIG. 2 . 
         [0054]    Furthermore, p′ and q′ are calculated from p, q and r using a pop function at step S 150 . In other words, p′ is calculated from the product of pop(p) and pop(r), and q′ is calculated from the product of pop(q) and pop(r). For the detailed algorithm of the pop function, refer to  FIG. 3 . 
         [0055]    Here, the value of p applied to pop(p) may be calculated from sum⊕(q⊕r)=(p⊕q⊕r)⊕(q⊕r)=p, and the calculated value of p is used in the pop function to calculate the cumulative value Sum. Here, since the length of r is different from the length of p and q, zero-extension is applied to the front part of p in order to adjust the length of r to the length of p and q. 
         [0056]    Thereafter, S pr  is calculated using d pr  calculated at step S 110  and p′ calculated at step S 150 , and S pr  is calculated using d qr  calculated at step S 130  and q′ calculated at step S 150  at step S 160 . 
         [0057]    In other words, S pr  is calculated by computing m d     pr    mod p′ and S qr  is calculated by computing m d     qr    mod q′. 
         [0058]    Meanwhile, if a fault is injected while the value of p is being retrieved to calculate p′ at step S 150 , the value accumulated in Sum in the pop function becomes p*⊕q⊕r, and the fault injected into p spreads to q and r. 
         [0059]    As an example, if p becomes p* because a fault is caused by a Bellcore attack while memory is being accessed in order to retrieve the value of p, the value which is pushed is not p but p*. In this case, the value accumulated in sum is p*⊕q⊕r. Thereafter, Result(q)=(p*⊕q⊕r)⊕(p⊕r)=(p*⊕p⊕q) is obtained while q is being popped, and therefore Result(q)≠q is obtained, with the result that Sum=p*⊕q⊕r is obtained. 
         [0060]    That is, it can be seen that the fault spreads because the fault injected into p influences not only p but also q. 
         [0061]    Accordingly, if the fault injected into p spreads to q and r, the fault value is also applied to the values of S pr  and S qr  calculated at step S 160 , and therefore a primary fault-injection attack may be detected by comparing the values of S pr  and S qr  at step S 170 . In this case, if S pr  is different from a value obtained by computing S qr  mod pop(r), it is determined that a fault has been injected, thereby detecting the fault. 
         [0062]    In this case, the probability of detecting a fault is proportional to the length of r. Here, since r is a random prime, the length of r is variable. If a large value is selected for r, the probability of an undetectable fault being present decreases, but operation efficiency deteriorates because the modular operation involving the large number should be computed. In contrast, if a small value is selected for r, operational efficiency relatively increases, but safety may be jeopardized because there is an increased probability of an undetectable fault being present. As a result, in order to provide sufficient safety, the number of bits of r should be at least 32. 
         [0063]    If a fault is not detected at step S 170 , a process subsequent to A of  FIG. 5  will be performed. 
         [0064]    As shown in  FIG. 5 , the method of preventing fault-injection attacks on CRT-RSA cryptography operations according to the present invention calculates S p  and S q  using the values of S pr , S qr , p and q calculated at step S 160 . 
         [0065]    In other words, S p  is calculated by computing S pr  mod pop(p), S pr  being calculated at step S 160 , and S q  is calculated by computing S qr  mod pop(q), S qr  being calculated at step S 160 . 
         [0066]    Thereafter, the signature value S is calculated by performing CRT recombination on S p  and S q  which are calculated at S 200  at step S 210 . The signature value S can be calculated by adding S q  to a value obtained by multiplying a value by q, the last value being obtained by multiplying a value obtained by computing (S p −S q ) mod p by a value obtained by computing q −1  mod p. 
         [0067]    Then, at step S 220 , a secondary fault-injection attack may be detected by comparing the signature value S calculated at step S 210  with S p  and S q  calculated at S 200 . That is, if a value obtained by computing S pr  mod p or a value obtained by computing S qr  mod q is different from the signature value S, it is determined that a fault has been injected, and the fault is detected. At step S 220 , a fault injected into a CRT recombination during the process of calculating the signature value S is detected. 
         [0068]    Thereafter, a process subsequent to B of  FIG. 6  is performed. 
         [0069]    As shown in  FIG. 6 , method of preventing fault-injection attacks on CRT-RSA cryptography operations according to the present invention calculates the value of check using the cumulative value of sum at step S 300 . Thereafter, it is checked whether the value of check is 0 at step S 310 . Here, a tertiary fault-injection attack may be detected depending on whether the value of check is 0. 
         [0070]    In other words, in a normal case, sum=p⊕q⊕r and W={p, q, r}, thus resulting in check=sum⊕(p⊕q⊕r)=0. 
         [0071]    Meanwhile, when a fault is injected during an internal operation of the pop function, the value of p which is used for a modulo operation is distorted, and also the distorted value of q is calculated when the value of q is popped, so that the fault spreads. That is, when a fault is injected during an internal operation of the pop function, check≠0 is obtained because of the spread of the fault. 
         [0072]    Accordingly, if the value of check is not 0 at step S 310 , it is determined that a fault has been injected and the fault is detected at step S 320 . 
         [0073]    Meanwhile, it is possible to implement all the steps of a method of preventing fault-injection attacks on CRT-RSA cryptography operations according to the present invention using computer readable code which is stored in a computer readable medium. 
         [0074]    The computer readable medium includes all types of recording media in which data which can be read by a computer system can be stored. Examples of the computer readable recording medium include ROM, RAM, CD-ROM, CD-RW, magnetic tape, a floppy disk, a HDD, an optical disk, and a magneto-optical storage device. Furthermore, the computer readable recording medium may be implemented in the form of carrier waves (for example, in the case of transmission over the Internet). Furthermore, the computer readable recording medium may be distributed among computer systems connected via a network, and computer readable code is stored and executed in a distributed manner. 
         [0075]      FIG. 7  shows an apparatus for preventing fault-injection attacks on CRT-RSA cryptography operations. 
         [0076]    As shown in  FIG. 7 , the apparatus for preventing fault-injection attacks on CRT-RSA cryptography operations includes a control unit  10 , an input unit  20 , an output unit  30 , a storage unit  40 , a communication unit  50 , a computation unit  60 , a comparison unit  70 , a checking unit  80 , and a fault detection unit  90 . Here, the control unit  10  controls the operations of the units of the apparatus for preventing fault-injection attacks. 
         [0077]    The input unit  20  is means for receiving initial values or key values for the performance of the CRT-RSA cryptography algorithm from an administrator. The input unit  20  receives a plurality of factors, that is, a message m to be sent, d, primes p and q, and z=q −1  mod p as keys, and also receives a randomly selected short prime r. 
         [0078]    The output unit  30  outputs the results of the performance of the CRT-RSA cryptography algorithm, or the results of the detection of a fault which is injected during the performance of the CRT-RSA cryptography algorithm. 
         [0079]    The storage unit  40  stores the CRT-RSA cryptography algorithm which is applied to the present invention. Here, the CRT-RSA cryptography algorithm stored in the storage unit  40  is implemented as computer readable code. The storage unit  40  may be at least one of ROM, RAM, CD-ROM, CD-RW, magnetic tape, a floppy disk, a HDD, an optical disk, and a magneto-optical storage device, or computer systems which are connected via a network. 
         [0080]    The communication unit  50  provides a communication interface which enables communication with an external receiving terminal or computer system. Using the communication unit  50 , initial values or key values for the performance of the CRT-RSA cryptography algorithm may be received from the outside, and the results of the performance of the CRT-RSA cryptography algorithm may be sent to the outside. 
         [0081]    The computation unit  60  executes the CRT-RSA cryptography algorithm stored in the storage unit  40  when the initial values or key values for the performance of the CRT-RSA cryptography algorithm are input. In this case, the computation unit  60  calculates the values of d pr , d qr , p′, q′, S pr , S qr , S p , S q , and S shown in  FIG. 1  by applying the initial values or key values to the CRT-RSA cryptography algorithm. Here, since the method of calculating the values of d pr , d qr , p′, q′, S pr , S qr , S p , S q , and S has been described above, the description of the method is omitted here. 
         [0082]    The comparison unit  70  compares predetermined values that are selected from among the values which are calculated while the computation unit  60  executes the CRT-RSA cryptography algorithm. 
         [0083]    As an example, the comparison unit  70  compares a value calculated by computing S pr  mod pop(r) with a value calculated by computing S qr  mod pop(r), as shown in the tenth row of  FIG. 1 . Furthermore, the comparison unit  70  compares S with S pr  mod p, or compares S with S qr  mod q, as shown in the 14th row of  FIG. 1 . 
         [0084]    In this case, the results of the comparison of the comparison unit  70  are used by the fault detection unit  90  to detect a fault. 
         [0085]    The checking unit  80  checks the total cumulative value of the variables at the last step of the CRT-RSA cryptography algorithm. In other words, the checking unit  80  calculates the value of check from the value of sum in which p, q and r are accumulated, and finally checks whether the value of check is 0. 
         [0086]    The fault detection unit  90  detects a fault-injection attack based on the results of the comparison unit  70  and the results of the checking of the checking unit  80 . 
         [0087]    As an example, the fault detection unit  90  determines that a fault has been injected if S pr  is different from a value calculated by computing S qr  mod pop(r), and detects the fault. Furthermore, the fault detection unit  90  determines that a fault has been injected if a value calculated by computing S pr  mod p or a value calculated by computing S qr  mod q is different from the signature value S, and detects the fault. Furthermore, the fault detection unit  90  determines that a fault has been injected if the value of check calculated in the final checking process is not 0, and detects the fault. 
         [0088]    As described above, a fault injected during the retrieval of a specific value, a fault injected during the internal operation of a pop function, or a fault injected during CRT recombination influences not only the specific value, for example, p, but also other variables, that is, q and r, because of the spread of the fault, so that it is possible to easily detect the fault using the CRT-RSA cryptography algorithm which is applied to the present invention. 
         [0089]    The present invention has the advantage of being safe from fault-injection attacks and also the advantage of efficiently computing a signature value because the method according to the present invention is capable of preventing fault-injection attacks occurring during the execution of the operations of a CRT-RSA cryptography algorithm. 
         [0090]    Although the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims. 
         [0091]    In the attached claims, the “message” corresponds to m, the “first prime” corresponds to p, the “second prime” corresponds to q, the “random prime” corresponds to r, the “first multiplication value” corresponds to p′, the “first exponent” corresponds to d pr , the “second exponent” corresponds to d qr , the “second multiplication value” corresponds to q′, the “first random reference value” corresponds to S pr , the “second random reference value” corresponds to S qr , the “third random reference value” corresponds to S p , the “fourth random reference value” corresponds to S q , and the “signature value” corresponds to S.