Abstract:
A method is proposed for accessing the memory of a de-interleaving unit. The conventional access method has the drawback of ineffective use of the memory space of the de-interleaving unit, while the proposed method uses only about half the memory space for implementation. The proposed method utilizes a specially-formulated write-operation interleaving algorithm to write data into the memory of the de-interleaving unit, and subsequently utilizes a specially-formulated read-operation de-interleaving algorithm to read data from the memory of the de-interleaving unit.

Description:
CROSS-REFERENCE TO RELATED APPLICATION  
         [0001]    This application claims the priority benefit of Taiwanese application ser. no. 90120811, filed on Aug. 24, 2001.  
         BACKGROUND OF THE INVENTION  
         [0002]    1. Field of the Invention  
           [0003]    This invention relates to a method of accessing memory of de-interleaving unit in an optical disc device.  
           [0004]    2 Description of Related Art  
           [0005]    To increase the reliability of read operation on a CD-ROM (Compact-Disc Read-Only-Memory) drive, data are interleaved before they are recorded on a CD-ROM disc. Therefore, the read operation in the CD-ROM drive should include a de-interleaving procedure. FIG. 1 is a schematic diagram showing a series of functional units involved in a read operation in the CD-ROM drive, which includes an EFM demodulation unit  102 , a C 1  decoding unit  104 , a de-interleaving unit  106 , and a C 2  decoding unit  108 . The EFM demodulation unit  102  is capable of demodulating data on the disc into a stream of 8-bit data. After the C 1  decoding unit  104  receives a frame of 32 bytes (8-bit) data from the EFM demodulation unit  102 , it decodes them into a frame of 28 bytes data and then transfers these decoded data to the de-interleaving unit  106  for de-interleaving. The de-interleaving unit  106  then transfers the de-interleaved data to the C 2  decoding unit  108 . During the de-interleaving procedure, each frame includes 28 bytes of data.  
           [0006]    The de-interleaving unit  106  includes a memory unit for the de-interleaving process. FIG. 2 shows the memory allocation for the memory of the de-interleaving unit  106 . Referring to FIG. 2 together with FIG. 1, the address range is from 0 to 3051. The 28 8-bit (byte) data in the first frame from the C 1  decoding unit  104  are respectively denoted by (f 0 ,  0 ), (f 0 ,  1 ), . . . , (f 0 ,  27 ). When the C 1  decoding unit  104  transfers the first frame to the de-interleaving unit  106 , data in the first frame are written into the memory of the de-interleaving unit  106  in such a manner according to the conventional access method as following. The first data (f 0 ,  0 ) is written into Row  108  Column  0 (i.e., the address 3024); the second data (f 0 ,  1 ) is written into Row  104  Column l(i.e., the address 2913); and so forth, the last data (f 0 ,  27 ) is written into Row  0  Column  26  (i.e., the address 27).  
           [0007]    After the first frame is written completely, the second frame is then written into the de-interleaving unit  106 . In the following, the 28 8-bit data in the second frame from the C 1  decoding unit  104  are respectively denoted by (f 1 ,  0 ), (f 1 ,  1 ), . . . , (f 1 ,  27 ). When the C 1  decoding unit  104  transfers the second frame to the de-interleaving unit  106 , data in the second frame are written into the memory of the de-interleaving unit  106  in such a manner according to conventional access method that the first data (f 1 ,  0 ) is written into Row  109  Column  0 (i.e., the address 0); the second data (f 1 ,  1 ) is written into Row  105  Column I(i.e., the address 2914); and so forth the last data (f 1 ,  27 ) is written into the Row  1  Column  26 (i.e., the address 55). The similar procedure is repeated for each of the subsequent frames.  
           [0008]    When a certain row in the memory of the de-interleaving unit  106  is fully rewritten by the decoded data, the de-interleaving unit  106  will then output all the data stored in that row to the C 2  decoding unit  108 . For example, when Row  108  is fully rewritten, the de-interleaving unit  106  will output all the data stored in Row  108  to the C 2  decoding unit  108 . In other words, when address 3051 (Row  108  Column  27 ) is rewritten by (f 108 ,  27 ), all data stored in Row  108 , including  0 (f 0 ,  0 ), (f 4 ,  1 ), (f 8 ,  2 ), . . . and (f 108 ,  27 ) will be transferred to the C 2  decoding unit  108 .  
           [0009]    One drawback to the forgoing memory access scheme, however, is that the memory of the de-interleaving unit  106  is ineffectively utilized (i.e., some memory locations are unused during the de-interleaving process). By the conventional memory access scheme, it requires a total of 109*28=3052 bytes of memory space for the de-interleaving process, which is considerably large and thus is cost-ineffective in memory utilization.  
         SUMMARY OF THE INVENTION  
         [0010]    It is therefore an objective of this invention to provide a method of accessing the memory of a de-interleaving unit, which allows effective use of the memory space of the de-interleaving unit to save cost.  
           [0011]    The proposed method according to the invention utilizes a special access method to write into and read from the memory of the de-interleaving unit. The write operation is formulated for the purpose of storing a sequence of frames of data from a decoding unit at address locations specified by Write Memory Address WMA based on Write Frame Index WFIDX and Control Word Count CWCNT. The read operation according to the invention is formulated for the purpose of reading a sequence of de-interleaved frames of data from the memory of the de-interleaving unit specified by Read Memory Address RAM based on Read Frame Index RFIDX and Control Word Count CWCNT.  
           [0012]    The method according to the invention reduces the required memory space in the de-interleaving unit by half as compared to the prior art for performing a de-interleaving process and is therefore more cost-effective t than the prior art. 
       
    
    
     BRIEF DESCRIPTION OF DRAWINGS  
       [0013]    The invention can be more fully understood by reading the following detailed description of the preferred embodiments, with reference made to the accompanying drawings, wherein:  
         [0014]    [0014]FIG. 1 (PRIOR ART) is a schematic diagram showing a series of functional units involved in a read operation in a CD-ROM drive;  
         [0015]    [0015]FIG. 2 (PRIOR ART) is a schematic diagram showing a memory allocation for the memory of de-interleaving unit according to the conventional access method;  
         [0016]    [0016]FIG. 3 is a schematic diagram showing the memory allocation for the memory of de-interleaving unit according to the invention;  
         [0017]    [0017]FIG. 4 is a schematic diagram showing the address mapping for each frame during write operation;  
         [0018]    [0018]FIG. 5 is a schematic diagram showing the address mapping for each frame during read operation;  
         [0019]    [0019]FIG. 6 is a flow diagram showing the steps in the method of the invention for write operation; and  
         [0020]    [0020]FIG. 7 is a flow diagram showing the steps in the method of the invention for read operation. 
     
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS  
       [0021]    The invention is designed for use to effectively use the memory of the de-interleaving unit for performing a de-interleaving process, so that the required memory can be reduced as compared to the prior art to make the memory utilization more cost-effective than the prior art.  
         [0022]    [0022]FIG. 3 is a schematic diagram showing the memory allocation for the memory of de-interleaving unit according to the method of the invention. The invention allows the total memory size in the de-interleaving unit  106  to be only 14*116=1624 bytes, which is nearly half of that required by the prior art. As shown in FIG. 3, the address range is from 0 to 1623. In the following, the 28 8-bit data in the first frame from the C 1  decoding unit  104  are respectively denoted by (f 0 ,  0 ), (f 0 ,  1 ), . . . , (f 0 ,  27 ). When the C 1  decoding unit  104  transfers the first frame to the de-interleaving unit  106 , the data contained in the first frame are written into the memory of the de-interleaving unit  106  according to the method of the invention in such a manner that the first data (f 0 ,  0 ) is written into Row  0  Column  0  (i.e., the address 0); the second data (f 0 ,  1 ) is written into Row  9  Column  4  (i.e., the address 116); and so forth until the last data (f 0 ,  27 ) is written into Row  0  Column  4  (i.e., the address 4).  
         [0023]    After the first frame is completely written into the memory, the second frame from the C 1  decoding unit  104  is then written into the de-interleaving unit  106 . The 28 8-bit data in the second frame from the C 1  decoding unit  104  are respectively denoted by (f 1 ,  0 ), (f 1 ,  1 ), . . . , (f 1 ,  27 ). When the C 1  decoding unit  104  transfers the second frame to the de-interleaving unit  106 , data in the second frame are written into the memory of the de-interleaving unit  106  according to the method of the invention in such a manner that the first data (f 1 ,  0 ) is written into Row  0  Column  1 (i.e., the address 1); the second data (f 1 ,  1 ) is written into Row  9  Column  5  (i.e., the address 117); and so forth until the last data (f 1 ,  27 ) is written into Row  0  Column  5  (i.e., the address 5). The similar procedure is repeated for each of the subsequent frames. FIG. 4 shows the address mapping for each frame during write operation.  
         [0024]    In FIG. 4, the term “WR” represents the sequence of the frames to be de-interleaved. That is, WR  0  represents the first frame, and WR  1  represents the second frame and so on. The terms C 0 ˜C 27  represent the data sequence in the frame. The write address for 28 bytes data of the first frame (WR) is respectively  0 ,  116 ,  232 , . . .  124  and  4 .  
         [0025]    The write address for other frames is known from FIG. 4.  
         [0026]    After the write operation for some incoming frames is completed, the de-interleaving unit  106  then reads data stored in the memory according to the method of the invention and outputs these data to the C 2  decoding unit  108 . FIG. 5 shows the address mapping for each frame during this read operation. It is to be noted that a certain frame can be read only after the last data in this frame is already rewritten (or updated). For example, as shown in FIG. 5, the data in Row  0  (which includes data in the address 8, 128, 248, . . . 4) can be read only after all data in Row  0  have been rewritten (i.e., the last address, address 4, in this frame is rewritten).  
         [0027]    The write operation according to the method of the invention is based on the parameter WFIDX (Write Frame Index, which is used to indicate the index of the currently-received frame from the C 1  decoding unit  104 ) and CWCNT (Code Word Count, which is used to indicate the sequence of data in the currently-received frame) to write the currently-received frame into the memory of the de-interleaving unit  106  at WMA (Write Memory Address). The parameter WFIDX indicates which frame from the C 1  decoding unit  104  is currently being written into the de-interleaving unit  106 ; the parameter CWCNT indicates which data in the currently-received frame is being written into the de-interleaving unit  106 ; and the parameter WMA indicates the address where the data is to be stored in the memory of the de-interleaving unit  106 .  
         [0028]    [0028]FIG. 6 is a flow diagram showing the steps in the method of the invention to compute for the value of the parameter WMA. As shown, in the first step  602 , WFIDX is set to 0. In the next step  604 , WMA is set to be equal to WFIDX, and CWCNT is set to be equal to 1. The action of the step  604  is performed due to the fact that the WMA corresponding to the first data in each frame (whose CWCNT is equal to 0) is directly related to WFIDX. For example if WFIDX=0, then WMA=0, and if WFIDX=1, then WMA=1. Therefore, once the WMA value is known, the first data in each of the frames from the C 1  decoding unit  104  can be written into the memory of the de-interleaving unit  106 . The write operation is then directed to the next data (it is required that CWCNT=1).  
         [0029]    The subsequent steps shown in FIG. 6 are used to compute for the current WMA value for the currently-received data from the C 1  decoding unit  104  based on the previous WMA value for the previously-received data. Details of these steps are described in the following.  
         [0030]    (Step  606 ) It is checked whether WFIDX is less than 60. If YES, the procedure goes to step  608 ; or, the procedure goes to the step  618 .  
         [0031]    (Step  608 ) In the case of WFTDX being less than 60, it is checked whether CWCNT is less than 14. If YES, the procedure goes to step  610 ; or, the procedure goes to step  612 .  
         [0032]    (Step  610 ) In the case of CWCNT being less than 14, WMA=WMA+116.  
         [0033]    (Step  614 ) In the case of CWCNT being equal to 14, WMA=WMA+56,  
         [0034]    (Step  616 ) In the case of CWCNT being greater than 14, WMA  32  WMA−120.  
         [0035]    (Step  618 ) In the case of WFIDX being equal to or greater than 60, it is checked whether CWCNT is less than 14. If YES, the procedure goes to step  620 ; or, the procedure goes to step  622 .  
         [0036]    (Step  620 ) In the case of CWCNT being less than 14, WMA=WMA+116.  
         [0037]    (Step  624 ) In the case of CWCNT being equal to 14, WMA=WMA−60.  
         [0038]    (Step  626 ) In the case of CWCNT being greater than 14, it is checked whether the result of dividing WFIDX by 4 is equal to the current CWCNT value. If YES, the procedure goes to step  628 ; or, the procedure goes to step  630 .  
         [0039]    (Step  628 ) In the case of the result of dividing WFIDX by 4 being equal to the current CWCNT value, WMA=WMA−4.  
         [0040]    (Step  630 ) In the case of the result of dividing WFIDX by 4 being unequal to the current CWCNT value, WMA=WMA−120.  
         [0041]    (Step  632 ) Based on the WMA value obtained through the forgoing steps, the corresponding data into the memory of the de-interleaving unit is written.  
         [0042]    (Step  634 ) CWCNT=CWCNT+1;  
         [0043]    (Step  636 ) It is checked whether the current CWCNT value is equal to or greater than 28. If YES, the procedure goes to step  638 ; or, the procedure returns to step  606  to check whether WFIDX is less than 60 and repeats the subsequent steps for the next WMA value to write the next incoming data.  
         [0044]    (Step  638 ) In the case of CWCNT being equal to or greater than 28, WFIDX=WFIDX+1.  
         [0045]    (Step  640 ) It is checked whether the current WFIDX value is equal to or greater than 116. If YES, the procedure is ended; or, the procedure returns to step  604  to set WMA=WFIDX and CWCNT=1 and repeats the subsequent steps for the next WMA value to write the next incoming data.  
         [0046]    Based on the foregoing procedure, those skilled in the art can obtain the address mapping shown in FIG. 4.  
         [0047]    After a certain incoming frame is completely written, the de-interleaving unit  106  then reads the data stored in the memory according to the method of the invention and outputs these data to the C 2  decoding unit  108 . The read operation according to the method of the invention is based on RFIDX (Read Frame Index) and CWCNT to obtainthe parameter RMA (Read Memory Address) that indicates the memory address to be accessed. The parameter RFIDX indicates which frame in the memory of the de-interleaving unit  106  is currently being accessed. The parameter CWCNT indicates which data in the currently-accessed frame to be read. The parameter RMA indicates the address where the data word being read is stored in the memory of the de-interleaving unit  106 .  
         [0048]    [0048]FIG. 7 is a flow chart showing the steps in the method of the invention to compute for the value of the parameter RMA for a read operation. As shown, in the first step  702 , RFIDX is set to 0. In the next step  704 , RMA is set to be equal to RFIDX, and CWCNT is set to be equal to 1. The action of step  704  is so performed due to the fact that the RMA corresponding to the first data in each frame (whose CWCNT is equal to 0) is directly related to RFIDX. For example, if RFIDX=8, then RMA=8, and if RFIDX=9, then RMA=9. Therefore, once the RMA value is known, the data stored in the address specified by RMA can be accessed and transferred to the C 2  decoding unit  108 .  
         [0049]    The subsequent steps shown in FIG. 7 are used to compute for the current RMA value based on the previous RMA value to read data from the RMA-specified address in the memory of the de-interleaving unit  106  and transfer the accessed data to the C 2  decoding unit  108 . Details of these steps are described in the following.  
         [0050]    (Step  706 ) It is checked whether RFIDX is less than 4. If YES, the procedure goes to step  708 ; or, the procedure goes to step  718 .  
         [0051]    (Step  708 ) In the case of WFIDX being less than 4, it is checked whether CWCNT is less than 14. If YES, the procedure goes to step  710 ; or, the procedure goes to step  712 .  
         [0052]    (Step  710 ) In the case of CWCNT being less than 14, RMA=RMA+120.  
         [0053]    (Step  714 ) In the case of CWCNT being equal to 14, RMA=RMA+60.  
         [0054]    (Step  716 ) In the case of CWCNT being greater than 14, RMA=RMA−116.  
         [0055]    (Step  718 ) In the case of RFIDX being equal to or greater than 4, it is checked whether RFIDX is less than 60. If YES, the procedure goes to step  720 ; or, the procedure goes to step  730 .  
         [0056]    (Step  720 ) In the case of RFIDX being less than 60, it is checked whether CWCNT is less than 14. If YES, the procedure goes to step  722 ; or, the procedure goes to step  724 .  
         [0057]    (Step  722 ) In the case of CWCNT being less than 14, RMA=RMA+120.  
         [0058]    (Step  726 ) In the case of CWCNT being equal to 14, RMA=RMA−56.  
         [0059]    (Step  728 ) In the case of CWCNT being greater than 14, RMA=RMA−116.  
         [0060]    (Step  730 ) In the case of RFIDX being equal to or greater than 60, it is checked whether CWCNT is less than 14. If YES, the procedure goes to step  732 ; or, the procedure goes to step  738 .  
         [0061]    (Step  732 ) In the case of CWCNT being less than 14, it is checked whether the result of dividing RFIDX by 4 is equal to the result of 29 minus CWCNT. If YES, the procedure goes to step  734 ; or, the procedure goes to step  736 .  
         [0062]    (Step  734 ) In the case of the result of dividing RFIDX by 4 being equal to the result of 29 minus CWCNT, RMA=RMA+4.  
         [0063]    (Step  736 ) In the case of the result of dividing RFIDX by 4 being unequal to the result of 29 minus CWCNT, RMA=RMA+120.  
         [0064]    (Step  740 ) In the case of CWCNT being equal to 14, RMA=RMA+60.  
         [0065]    (Step  742 ) In the case of CWCNT being greater than 14, RMA=RMA−116.  
         [0066]    (Step  744 ) Based on the RMA value obtained through the forgoing steps, data is read from the RMA-specified address in the memory of the de-interleaving unit.  
         [0067]    (Step  746 ) CWCNT=CWCNT+1.  
         [0068]    (Step  748 ) It is checked whether the current CWCNT value is equal to or greater than 28. If YES, the procedure goes to step  750 ; or, the procedure returns to step  706 .  
         [0069]    (Step  750 ) In the case of CWCNT being equal to or greater than 28, RFIDX=RFIDX+1.  
         [0070]    (Step  752 ) It is checked whether the current RFIDX value is equal to or greater than 116. If YES, the procedure is ended; or, the procedure returns to step  704  to reset RMA=RFIDX and CWCNT=1 and repeats the subsequent steps for the next RMA value to read the next data from the memory of the de-interleaving unit.  
         [0071]    Based on the foregoing procedure, those skilled in the art can obtain the address mapping scheme shown in FIG. 5.  
         [0072]    The invention can reduce the required memory space in the de-interleaving unit, substantially by half, for performing the de-interleaving process and is therefore more cost-effective than the prior art.  
         [0073]    The invention has been described using exemplary preferred embodiments. However, it is to be understood that the scope of the invention is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements. The scope of the claims, therefore, should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.