Abstract:
An electrical power converter receives input power of one type or level at input terminals and supplies output power of another type or level at output terminals. The power converter includes a high frequency transformer, an input circuit connected between the input terminals and the primary of the transformer, and an output circuit connected between the secondary of the transformer and the output terminals, a controller for controlling pulse width of current pulses produced by the input circuit, and a current limiting circuit. The current limiting circuit allows very high surge currents immediately upon demand without waiting for a voltage drop feedback circuit, then dynamically reduces the current limit over time based on the averaged current in the input circuit

Description:
CROSS-REFERENCE TO RELATED APPLICATION(S)  
       [0001]     Reference is made to a copending application entitled “Power Converter with Improved Output Switching Timing,” filed on even date with this application, and which is incorporated by reference.  
       BACKGROUND OF THE INVENTION  
       [0002]     The present invention relates to electrical power conversion. More particularly, the present invention relates to a power converter having dynamic current limiting.  
         [0003]     Electrical power is supplied in one of two forms: direct current (DC) power and alternating current (AC) power. There are often times when it is desirable to convert one form of electrical power to another form. A power converter can convert power from AC to DC, DC to AC, AC to AC, or DC to DC. In this way, a power converter allows a device that uses one form or level of power to connect to a power source that supplies a different form or level of power.  
         [0004]     Most power converters have a surge power rating, which is typically a multiple of a continuous rating. The surge power rating is typically about twice the continuous rating, and in some cases may be as high as three or four times the continuous rating. A power surge from a power converter is needed, for example, when an electrical motor first starts. There must be enough current delivered from the power converter to initiate rotation of the rotor of the motor. This involves overcoming static and inertial forces in the motor. As a result, a higher level of current is required for a short period of time when first starting an electrical motor. Once the motor is turning, the power demand is reduced to the normal operating range of the converter (i.e. below the continuous power rating).  
         [0005]     One advantageous form of power converter makes use of a high frequency transformer in conjunction with an input circuit which produces high frequency pulse width modulated current pulses to the primary of the transformer. An output circuit connected to the high frequency transformer converts the transformed pulse width modulated pulses into the desired form of output power, such as continuous wave AC power. Power converters of this type generally include some form of feedback control which will limit maximum current to a level corresponding to the surge power rating. The feedback circuit typically senses voltage at the output of the power converter. When output voltage decreases (such as when a motor is being started), the feedback circuit causes the normal current limit of the input circuit to increase up to the maximum or surge limit. Current is allowed to remain at the higher level for a set time period (for example: five seconds). If the current does not decrease by the end of that time period, the power converter stops so that the higher current levels do not damage electrical components of the converter or the load (such as a motor) connected to the output of the power converter.  
         [0006]     This type of current limiting feedback control causes a delay in matching the maximum current limit to the demand for higher current. It is immediately when the motor turns on that the highest current is needed, yet the feedback control requires numerous AC cycles to increase the current limit up to the surge power rating. In the meantime, the increasing current causes electrical components such as transistors within the power converter to heat up, and causes increased heat within the motor, without providing enough current to break the motor free and allow it to start turning. Ideally, the current limit should be at its highest when the motor first calls for current and then should decrease over time.  
         [0007]     Prior current limiting feedback control, however, does not allow current to be at a maximum when current is first called for by the motor, but rather introduces a time delay before maximum current is available.  
       BRIEF SUMMARY OF THE INVENTION  
       [0008]     The present invention is a power converter having dynamic current limiting, in which the current limit is at its highest level when an initial demand for current is received, and in which the current limit decreases over time as a function of averaged current through the input circuit of the power converter. This method not only allows surge current to be available immediately (before components heat up), but consequently allows for a short but extremely high surge (e.g. on the order of 10 to 20 times continuous current).  
         [0009]     The power converter of the present invention includes input terminals for receiving input power and output terminals for supplying output power. An input circuit is connected between the input terminals and a primary of a transformer, while an output circuit is connected between a secondary of the transformer and the output terminals. A controller controls the input circuit to provide pulse width modulated pulses to the primary. A current limiting circuit senses the pulse width modulated pulses and causes the controller to control the pulse width of the pulses as a function of averaged current in the input circuit. As the averaged current through the input circuit increases over time, the current limit decreases, thereby causing the pulse width of the pulses to be controlled to maintain current within a dynamic current limit.  
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0010]      FIG. 1  is a block diagram of the power converter of the present invention.  
         [0011]      FIGS. 2A and 2B  are a schematic diagram of one embodiment of the dynamic current limiting circuit of the power converter of  FIG. 1 .  
         [0012]      FIG. 3A  is a graph of motor current as a function of time, showing input current and dynamic current limit in a normal case of starting a motor.  
         [0013]      FIG. 3B  is a graph of current as a function of time, showing motor current and dynamic current limit in a case of a motor with a locked rotor or a direct short across the converter output.  
     
    
     DETAILED DESCRIPTION  
       [0014]      FIG. 1  is a block diagram of power converter  10  of the present invention. Power converter  10  includes input terminals IN 1  and IN 2 , output terminals OUT 1  and OUT 2 , input circuit  12 , transformer  14 , output circuit  16 , primary controller  18 , input controller  20 , output controller  22 , and current limit circuit  24 . Input DC power having a voltage VIN is received at input terminals IN 1  and IN 2  from a DC power source. Power converter  10  provides output AC power having voltage V OUT  to an electrical load connected to output terminals OUT 1  and OUT 2 .  
         [0015]     In the embodiment shown in  FIG. 1 , input circuit  12  is a push-pull circuit which provides high frequency pulse width modulated pulses to transformer  14 . Input circuit  12  includes first switch  30 A and second switch  30 B. Each switch  30 A and  30 B includes one or more semiconductor switches, such as MOSFETS, bipolar transistors, or solid state relays. Switches  30 A and  30 B are controlled by control pulses SWA and SWB, respectively, from input controller  20 .  
         [0016]     Transformer  14  includes primary winding  40  and secondary winding  42 . In the embodiment shown in  FIG. 1 , primary winding  40  is a center tapped primary, having first leg  40 A and second leg  40 B connected at center tap  44 . Input terminal IN 1  is connected to center tap  44 . First leg  40 A is connected at node  46 A to one of the main current carrying terminals of switch  30 A while the other main current carrying terminal of switch  30 A is connected to input terminal IN 2 . Similarly, leg  40 B is connected at node  46 B to one of the main current carrying electrodes of switch  30 B, while the other main current carrying electrode of switch  30 B is connected to input terminal IN 2 .  
         [0017]     Switches  30 A and  30 B are operated in a push-pull pulse width modulated mode. When switch  30 A is turned on, current flows from input terminal IN 1  to center tap  44 , through first leg  40 A of primary  40  and through switch  30 A to input terminal IN 2 . Similarly, when switch  30 B is turned on, current flows from IN 1  to center tap  44 , through primary leg  40 B and switch  30 B to input terminal IN 2 . The time duration of the current pulses through windings  40 A and  40 B are controlled by the control pulses SWA and SWB received by switches  30 A and  30 B from input controller  20 .  
         [0018]     Secondary winding  42  is also a center tapped winding, with legs  42 A and  42 B connected together at center tap  48 . Output circuit  16  is connected to secondary  42  to receive transformed pulses. Output controller  22  provides control signals to output circuit  16  to convert the transformed pulses to a full wave AC output at output terminals OUT 1  and OUT 2 . Output circuit  16  can take many different forms. One example of output circuit  16  is shown in copending application entitled “Power Converter With Improved Output Switching Timing,” filed on even date with this application. The operation of input circuit  12  and output circuit  16  is coordinated by primary controller  18 , which provides timing and control signals to input controller  20  and output controller  22 .  
         [0019]     Current limit circuit  24  senses current flowing through switches  30 A and  30 B when the switches are turned on. The sensed current is compared to a dynamic current limit which is a function of the current flowing through switches  30 A and  30 B averaged over time. The longer the time, the lower the current limit, which allows current to be at a maximum when the current demand is first created (such as by turning on a motor which is connected to output terminals OUT 1  and OUT 2 ).  
         [0020]     When a current pulse flowing through either switch  30 A or  30 B exceeds the dynamic current limit, a shut-down signal is supplied to primary controller  18 . That causes primary controller  18  to signal input controller  20  to terminate the current pulse then flowing through either switch  30 A or  30 B. In other words, as soon as the current pulse reaches the dynamic current limit, that pulse width modulated pulse is terminated. The width of the pulses, therefore, is limited by the dynamic current limit.  
         [0021]      FIGS. 2A and 2B  are schematic diagrams showing current limit circuit  24  together with switches  30 A and  30 B. In  FIG. 2A , switch  30 A is shown as including input resistor  50 A, and MOSFET  52 A (with inherent diode  54 A shown). The gate of MOSFET  52 A receives SWA control pulses from input controller  20 . The drain of MOSFET  52 A is connected to node  46 A at one end of primary winding leg  40 A. The source of MOSFET  52 A is connected to ground and to input terminal IN 2 .  
         [0022]     Similarly, switch  30 B includes input resistor  50 B, and MOSFET  52 B (with inherent diode  54 B shown). The gate of MOSFET  52 B receives SWB control pulses from input controller  20 . The drain of MOSFET  52 B is connected to node  46 B at one end of primary winding leg  40 B. The source of MOSFET  52 B is connected to ground and to input terminal IN 2 .  
         [0023]     Although switches  30 A and  30 B are each shown as a single MOSFET switch, they may also be implemented using a number of MOSFET switches in parallel. Alternatively, bipolar transistors or solid state relays can be used in switches  30 A and  30 B.  
         [0024]     Current limit circuit  24  has five main portions: current sensing circuits  60 A and  60 B, filter  62 , limit generator  64 , and comparator circuit  66 . Current sensing circuits  60 A and  60 B sense the current flowing through switches  30 A and  30 B, respectively, when those switches are turned on. The sensed current is provided by sensing circuits  60 A and  60 B to filter  62  and to comparator  66 . Filter  62  provides an averaged current value to limit circuitry  64 . The output of limit circuit  64  is a dynamic current limit signal which is used by comparator circuit  66  to compare with the sensed current signal. As long as the sensed current during any closure of switch  30 A or switch  30 B is less then the dynamic current limit, the output of comparator circuit  66  is high. If the sensed current during the pulse rises to a level that exceeds the current limit, the output comparator  66  goes low which causes primary controller  18  to terminate the current pulse. Primary controller  18  can also change the dynamic current limit by providing a Current Set signal to limit generator  64 .  
         [0025]     Current sensing circuit  60 A includes operational amplifier  70 A, comparator  72 A, MOSFET  74 A, zener diode ZD 1 A, resistors R 1 A, R 2 A, R 3 A and R 4 A, diode D 1 A, capacitors C 1 A and C 2 A, and potentiometers P 1 A and P 2 A. Current sensing circuit  60 B has similar components, which are labeled similarly except that the reference numerals are followed by the letter “B”. The operation of each circuit is the same, and will be described with reference to current sensing circuit  60 A.  
         [0026]     Operational amplifier  70 A senses current through switch  30 A by comparing voltage at the source and drain of MOSFET  52 A. The non-inverting input of operational amplifier  70 A is connected through resistor R 1 A to the source of MOSFET  52 A, while the inverting input is connected through resistor R 2 A to the drain of MOSFET  52 A. The output of operational amplifier  70  varies as a function of the sensed voltage, which is representative of the current flowing through switch  30 A when it is closed.  
         [0027]     When switch  30 A is open, the non-inverting input of operational amplifier  70 A is connected to ground, thereby disabling the output of operational amplifiers  70  except during the time when a current pulse is flowing through switch  30 A. Circuitry including diode D 1 A, resistor R 3 A, capacitor CIA and C 2 A, potentiometer P 2 A, comparator  72 A, resistor R 4 A, and MOSFET  74 A respond to the SWA control pulse. MOSFET  74 A is OFF when switch  30 A is turned ON. The output of comparator  72 A provides immediate turning ON of switch  74 A, but delays the turning OFF of MOSFET  74 A so that the leading edge noise which otherwise would be presented to operational amplifier  70 A can be shorted to ground through transistor  74 A. The output of comparator  72 A is normally high, causing MOSFET  74 A to be ON, except when the SWA pulse is high. At that point, diode D 1 A will be reversed biased and the voltage at the minus input of comparator  72 A will rise toward 5 volts as capacitor CIA begins to charge. When the voltage at the minus input exceeds the reference voltage set by potentiometer P 2 A at the plus input of comparator  72 A, the output of comparator  72 A goes low, turning OFF MOSFET  74 A.  
         [0028]     The outputs of operational amplifiers  70 A and  70 B of current sensing circuits  60 A and  60 B are provided to both comparator circuit  66  and to filter  62 . Sensed currents are averaged within filter  62  for use in setting the dynamic current limit.  
         [0029]     Filter  62  shown in  FIG. 2B  includes gain adjustment stage  80  and Bessel filter stages  82  and  84 . Gain adjustment stage  80  includes operational amplifier  90 , resistors R 5 -R 8  and potentiometer P 3 . First Bessel filter stage  82  includes operational amplifier  92 , resistors R 9 -R 12  and capacitors C 3  and C 4 . Second Bessel filter stage  84  includes operational amplifier  94 , resistors R 13 -R 16  and capacitors C 5  and C 6 .  
         [0030]     The inputs to filter  62  are the sensed current outputs of current sensing circuits  60 A and  60 B. These sensed current signals are pulses which occur during the time when switches  30 A and  30 B are turned on. The inputs are summed and amplified at gain adjustment stage  80  and then are filtered at filter stages  82  and  84  to produce an averaged current signal. When a load such an electrical motor is first turned on, the output of filter  62  is at a minimum level. As the amount of current being drawn increases, the averaged sensed current will increase at the output of filter  62 .  
         [0031]     Limit circuitry  64  receives the output of filter  62 , adds it to a current limit adjust signal, and inverts the sum to produce a dynamic current limit signal. Limit circuit  64  receives digital commands from primary controller  18  through which primary controller  18  can adjust the current limit and set the initial (highest) limit. Limit circuit  64  includes operational amplifier  96 , digital-to-analog (D/A) converter  98 , and resistors R 17 -R 24 .  
         [0032]     Operational amplifier  96  acts as an inverter. A voltage divider formed by R 19 -R 22  provides a reference voltage to the non-inverting input of operational amplifier  96 . The inverting input of operational amplifier  96  receives the averaged sensed current through resistor R 17  and a current limit adjustment provided by primary controller  18  through digital-to-analog converter  98  and resistor R 18 .  
         [0033]     The output of limit circuit  64  is a dynamic current limit signal in the form of a voltage applied to comparator circuit  66 . In the embodiment shown in  FIG. 2B , comparator circuit  66  includes comparator  100  and resistors R 25 -R 28 . Comparator circuit  66  compares the sensed current (which is supplied to the minus input of comparator  100 ) with the dynamic current limit (which is supplied to the plus input of comparator  100 ). Comparator circuit  66  includes hysteresis feedback through resistor R 27 . The output of comparator circuit  66  is a Stop Pulse signal which is active when it goes low. In other words, when the output of comparator circuit  66  goes low, primary controller  18  terminates the current pulse through whichever input switch is active, switch  30 A or switch  30 B.  
         [0034]      FIGS. 3A and 3B  are graphs illustrating the operation of the present invention.  FIG. 3A  illustrates a normal case of starting a motor, while  FIG. 3B  illustrates a case in which the motor has a locked rotor or there is a direct short across the output of the converter. In both Figures, current I is shown on a vertical scale as multiples of the converter continuous current X, while time in milliseconds is shown on a horizontal axis.  
         [0035]     In  FIG. 3A , both the motor current and the dynamic current limit are shown. In this normal case, the maximum limit of the dynamic current limit is higher than the peak motor current required to start motor rotating. At all times, the dynamic current is higher than the motor current, and therefore the motor current is not affected. Because the dynamic current limit is a function of the inverted and averaged input current, it is at its maximum as the motor first starts—when the need for motor current is greatest.  
         [0036]      FIG. 3B  illustrates a situation where current at the output of the converter would rise to and stay at a level (shown by a dashed line) which could damage components of the converter and the motor. In this case, however, the rise of output current is curtailed by the decreasing dynamic current limit. The output current is forced downward by the decreasing dynamic current limit. Eventually, the output voltage drops to a level which causes primary controller  18  to shut off the converter.  
         [0037]     In conclusion, the power converter of the present invention provides dynamic current limiting which permits high levels of current immediately when starting a load such as an electrical motor, while reducing the current limit over time to avoid damage to either the electrical components in the power converter or the load. This dynamic current limit is achieved by sensing current flowing through the switches of the input circuit while they are turned on and producing a current limit which varies as a function of the averaged or total sensed current over time. As the averaged sensed current increases, the dynamic current limit decreases so that pulse width of pulses generated by the input circuit are controlled to maintain current within the dynamic current limit.  
         [0038]     Although the present invention has been described with reference to preferred embodiments, workers skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the invention.