Abstract:
A packaging and interconnection for connecting a contact structure to an outer peripheral component with a short signal pass length to achieve a high frequency operation. The packaging and interconnection is formed of a contact structure made of conductive material and formed on a contact substrate, a contact trace formed on the contact substrate and electrically connected to the contact structure at one end, and the other end of the contact trace is provided with a contact pad for establishing packaging and interconnection from an upper surface thereof, a contact target provided at an outer periphery of the contact structure, a conductive lead for electrically connecting an upper surface of the contact pad and the contact target, an elastomer provided under said contact substrate for allowing flexibility in the interconnection and packaging of the contact structure, and a support structure provided between the elastomer and the PCB substrate for supporting the contact structure, contact substrate and elastomer. The contact structure is projected from the contact substrate to a free space to allow free movements of at least a horizontal portion and a contact portion thereof.

Description:
FIELD OF THE INVENTION 
     This invention relates to an electronic packaging and interconnection of a contact structure, and more particularly, to an electronic packaging and interconnection for mounting a contact structure on a probe card or equivalent thereof which is used to test semiconductor wafers, semiconductor chips, packaged semiconductor devices or printed circuit boards and the like with increased accuracy, density and speed. 
     BACKGROUND OF THE INVENTION 
     In testing high density and high speed electrical devices such as LSI and VLSI circuits, high performance probe contactors or test contactors must be used. The electronic packaging and interconnection of a contact structure of the present invention is not limited to the application of testing and burn-in of semiconductor wafers and die, but is inclusive of testing and burn-in of packaged semiconductor devices, printed circuit boards and the like. However, for the convenience of explanation, the present invention is described mainly with reference to a probe card to be used in semiconductor wafer testing. 
     In the case where semiconductor devices to be tested are in the form of a semiconductor wafer, a semiconductor test system such as an IC tester is usually connected to a substrate handler, such as an automatic wafer prober, to automatically test the semiconductor wafer. Such an example is shown in FIG. 1 in which a semiconductor test system has a test head  100  which is ordinarily in a separate housing and electrically connected to the test system through a bundle of cables. The test head  100  and the substrate handler  400  are mechanically connected with one another by means of a manipulator  500  and a drive motor  510  own in FIG.  1 . The semiconductor wafers to be tested are automatically provided to a test position of the test head by the substrate handler. 
     On the test head, the semiconductor wafer to be tested is provided with test signals generated by the semiconductor test system. The resultant output signals from the semiconductor wafer under test are transmitted to the semiconductor test system wherein they are compared with expected data to determine whether IC circuits on the semiconductor wafer function correctly or not. 
     As shown in FIG. 2, the test head and the substrate handler are connected with an interface component  140  consisting of a performance board  120  which is typically a printed circuit board having electric circuit connections unique to a test head&#39;s electrical footprint, such as coaxial cables, pogo-pins and connectors. The test head  100  includes a large number of printed circuit boards  150  which correspond to the number of test channels (tester pins). Each of the printed circuit boards  150  has a connector  160  to receive a corresponding contact terminal  121  of the performance board  120 . In the example of FIG. 2, a “frog” ring  130  is mounted on the performance board  120  to accurately determine the contact position relative to the substrate handler  400 . The frog ring  130  has a large number of contact pins  141 , such as ZIF connectors or pogo-pins, connected to contact terminals  121 , through coaxial cables  124 . 
     FIG. 2 further shows a structure of the substrate handler  400 , the test head  100  and the interface component  140  when testing a semiconductor wafer. As shown in FIG. 2, the test head  100  is placed over the substrate handler  400  and mechanically and electrically connected to the substrate handler through the interface component  140 . In the substrate handler  400 , a semiconductor wafer  300  to be tested is mounted on a chuck  180 . A probe card  170  is provided above the semiconductor wafer  300  to be tested. The probe card  170  has a large number of probe contactors (contact structures)  190 , such as cantilevers or needles, to contact with circuit terminals or contact targets in the IC circuit of the semiconductor wafer  300  under test. 
     Electrical terminals or contact receptacles of the probe card  170  are electrically connected to the contact pins  141  provided on the frog ring  130 . The contact pins  141  are also connected to the contact terminals  121  of the performance board  120  via the coaxial cables  124  where each contact terminal  121  is connected to the printed circuit board  150  of the test head  100 . Further, the printed circuit boards  150  are connected to the semiconductor test system main frame through the cable bundle  110  having several hundreds of cables therein. 
     Under this arrangement, the probe contactors  190  contact the surface of the semiconductor wafer  300  on the chuck  180  to apply test signals to the IC chips in the semiconductor wafer  300  and receive the resultant signals of the IC chips from the wafer  300 . The resultant output signals from the semiconductor wafer  300  under test are compared with the expected data generated by the semiconductor test system to determine whether the IC chips in the semiconductor wafer  300  properly perform the intended functions. 
     FIG. 3 is a bottom view of the probe card  170  of FIG.  2 . In this example, the probe card  170  has an epoxy ring on which a plurality of probe contactors  190  called needles or cantilevers are mounted. When the chuck  180  mounting the semiconductor wafer  300  moves upward in FIG. 2, the tips of the cantilevers  190  contact the pads or bumps on the wafer  300 . The ends of the cantilevers  190  are connected to wires  194  which are further connected to transmission lines (not shown) formed in the probe card  170 . The transmission lines in the probe card  170  are connected to a plurality of electrodes  197  which contact the pogo pins  141  of FIG.  2 . 
     Typically, the probe card  170  is structured by a multi-layer of polyimide substrates having ground planes, power planes, signal transmission lines on many layers. As is well known in the art, each of the signal transmission lines is designed to have a characteristic impedance such as 50 ohms by balancing the distributed parameters, i.e., dielectric constant of the polyimide, inductances, and capacitances of the signal within the probe card  170 . Thus, the signal transmission lines are impedance matched to achieve a high frequency transmission bandwidth to the wafer  300 . The signal transmission lines transmit small current during a steady state of a pulse signal and large peak current during a transition state of the device&#39;s outputs switching. For removing noise, capacitors  193  and  195  are provided on the probe card  170  between the power and ground planes. 
     An equivalent circuit of the probe card  170  is shown in FIGS.  4 A-AE to explain the limitations of bandwidth in the conventional probe card technology. As shown in FIGS. 4A and 4B, the signal transmission line on the probe card  170  extends from the electrode  197 , the strip line (impedance matched line)  196 , the wire  194  and the needle (cantilever)  190 . Since the wire  194  and needle  190  are not impedance matched, these portions function as an inductor L in the high frequency band as shown in FIG.  4 C. Because of the overall length of the wire  194  and needle  190  is around 20-30 mm, the significant frequency limitation is resulted in testing a high frequency performance of a device under test. 
     Other factors which limit the frequency bandwidth in the probe card  170  reside in power and ground needles shown in FIGS. 4D and 4E. If a power line can provide large enough currents to the device under test, it will not seriously limit the operational bandwidth in testing the device. However, because the series connected wire  194  and needle  190  for supplying the power to the device under test are equivalent to the inductors as shown in FIG. 4D, which impede the high speed current flow in the power line. Similarly, because the series connected wire  194  and needle  190  for grounding the power and signals are equivalent to the inductors as shown in FIG. 4E, the high speed current flow is impeded by the wire  194  and needle  190 . 
     Moreover, the capacitors  193  and  195  are provided between the power line and the ground line to secure a proper performance of the device under test by filtering out the noise or surge pulses on the power lines. The capacitors  193  have a relatively large value such as 10 μF and can be disconnected from the power lines by switches if necessary. The capacitors  195  have a relatively small capacitance value such as 0.01 μF and fixedly connected close to the DUT. These capacitors serve the function as high frequency decoupling on the power lines, which also impede the high speed current flow in the signal and power lines. 
     Accordingly, the most widely used probe contactors as noted above are limited to the frequency bandwidth of approximately 200 MHz which is insufficient to test recent semiconductor devices. It is considered, in the industry, that the frequency bandwidth be of at least that equal to the tester&#39;s capability which is currently on the order of 1 GHz or higher, will be necessary in the near future. Further, it is desired in the industry that a probe card is capable of handling a large number of semiconductor devices, especially memories, such as 32 or more, in parallel (parallel test) to increase test throughput. 
     To meet the next generation test requirements noted above, the inventors of this application has provided a new concept of contact structure in the U.S. application Ser. No. 09/099,614 “Probe Contactor Formed by Photolithography Process” filed Jun. 19, 1998 now abandoned. The contact structure is formed on a silicon or dielectric substrate through a photolithography process. FIGS.  5  and  6 A- 6 C show the contact structure in the above noted application. In FIG. 5, all of the contact structures  30  are formed on a silicon substrate  20  through the same photolithography process. The silicon substrate  20  having the contact structures  30  may be mounted on a probe card such as shown in FIGS. 2 and 3. When the semiconductor wafer  300  under test moves upward, the contact structures  30  contact corresponding contact targets (electrodes or pads)  320  on the wafer  300 . 
     The contact structure  30  on the silicon substrate  20  can be directly mounted on a probe card such as shown in FIG. 3, or molded in a package, such as a traditional IC package having leads, so that the package is mounted on a probe card. In the above noted patent application by the inventors, such technologies of packaging and interconnection of the contact structure  30  with respect to the probe card or equivalent thereof is not described. 
     SUMMARY OF THE INVENTION 
     Therefore, it is an object of the present invention to provide a packaging and interconnection of a contact structure with respect to a probe card or equivalent thereof to be used in testing a semiconductor wafer, packaged LSI and the like. 
     It is another object of the present invention to provide a packaging and interconnection of a contact structure with respect to a probe card or equivalent thereof to achieve a high speed and frequency operation in testing a semiconductor wafer, packaged LSI and the like. 
     It is a further object of the present invention to provide a packaging and interconnection of a contact structure with respect to a probe card or equivalent thereof wherein the packaging and interconnection is formed at an upper surface (top) of the contact structure. 
     It is a further object of the present invention to provide a packaging and interconnection of a contact structure which is established through a bonding wire, a tape automated bonding (TAB), and a multi-layer TAB. 
     It is a further object of the present invention to provide a packaging and interconnection of a contact structure which is formed between a contact trace provided at the upper surface of the contact structure and a connector. 
     It is a further object of the present invention to provide a packaging and interconnection of a contact structure which is formed between a contact trace provided at the upper surface of the contact structure and an interconnect pad of a printed circuit board through a solder bump. 
     It is a further object of the present invention to provide a packaging and interconnection of a contact structure which is formed between a contact trace provided at the upper surface of the contact structure and an interconnect pad of a printed circuit board through a conductive polymer. 
     In the present invention, an electronic packaging and interconnection of a contact structure to be used in a probe card or equivalent thereof to test semiconductor wafers, semiconductor chips, packaged semiconductor devices or printed circuit boards and the like is established between a contact trace formed at an upper surface of the contact structure and various types of connection means on the probe card. 
     In one aspect of the present invention, a packaging and interconnection of a contact structure is comprised of: a contact structure made of conductive material and formed on a contact substrate through a photolithography process wherein the contact structure has a base portion vertically formed on the contact substrate, a horizontal portion, one end of which being formed on the base portion, and a contact portion vertically formed on another end of the horizontal portion; a contact trace formed on the contact substrate and electrically connected to the contact structure at one end, and an upper surface of the other end of the contact trace is formed as a contact pad; a contact target provided on a printed circuit board (PCB) substrate or lead frame to be electrically connected with the contact pad of the contact trace through a conductive lead or wire; an elastomer provided under the contact substrate for allowing flexibility in the interconnection and packaging of the contact structure; and a support structure for supporting the contact structure, the contact substrate and the elastomer. 
     In another aspect of the present invention, a connector is provided to receive the other end of the contact trace to establish electrical connection therebetween. In a further aspect of the present invention, a conductive bump is provided between the other end of the contact trace and the PCB pad to establish electrical connection thereamong. In a further aspect of the present invention, a conductive polymer is provided between the other end of the contact trace and the PCB pad to establish electrical connection thereamong. 
     In a further aspect of the present invention, the interconnection and packaging of the contact structure is established through a bonding wire between the contact pad of the contact trace and a contact target. In a further aspect of the present invention, the interconnection and packaging of the contact structure is established through a single layer lead of tape automated bonding (TAB) structure extending between the contact pad of the contact trace and a contact target. In a further aspect of the present invention, the interconnection and packaging of the contact structure is established through double layer leads of tape automated bonding (TAB) structure extending between the contact pad of the contact trace and a contact target. In a further aspect of the present invention, the interconnection and packaging of the contact structure is established through triple layer leads of tape automated bonding (TAB) structure extending between the contact pad of the contact trace and a contact target. 
     According to the present invention, the packaging and interconnection has a very high frequency bandwidth to meet the test requirements in the next generation semiconductor technology. The packaging and interconnection is able to mount the contact structure on a probe card or equivalent thereof by electrically connecting therewith through the upper surface of the contact structure. Moreover, because of the relatively small number of overall components to be assembled, the interconnection and packaging of the present invention can be fabricated with low cost and high reliability as well as high productivity. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a schematic diagram showing a structural relationship between a substrate handler and a semiconductor test system having a test head. 
     FIG. 2 is a schematic diagram showing an example of detailed structure for connecting the test head of the semiconductor test system to the substrate handler. 
     FIG. 3 is a bottom view showing an example of the probe card having an epoxy ring for mounting a plurality of cantilevers as probe contactors. 
     FIGS. 4A-4E are circuit diagrams showing equivalent circuits of the be card of FIG.  3 . 
     FIG. 5 is a schematic diagram showing contact structures associated with the present invention produced through a photolithography process. 
     FIGS. 6A-6C are schematic diagrams showing examples of contact structure associated with the present invention formed on a silicon substrate. 
     FIG. 7 is a schematic diagram showing a first embodiment of the present invention in which the packaging and interconnection is established by a bonding wire between a contact pad provided at an upper surface of the contact structure and a lead frame. 
     FIG. 8 a schematic diagram showing a modified structure of the first embodiment of the present invention. 
     FIG. 9 is a schematic diagram showing a second embodiment of the present invention in which the packaging and interconnection is established by a single layer TAB (tape automated bonding) between a contact pad provided at an upper surface of the contact structure and a contact target on a probe card or package. 
     FIG. 10 is a schematic diagram showing a modified structure of the second embodiment of the present invention in which a straight TAB is incorporated as an interconnection and payckaging member. 
     FIG. 11 is a schematic diagram showing a further modified structure of the second embodiment of the present invention in which a contact target is a connector. 
     FIG. 12 is a schematic diagram showing a further modified structure of the second embodiment of the present invention in which a conductive bump is incorporated between the TAB and the contact target as an interconnection and packaging member. 
     FIG. 13 is a schematic diagram showing a further modified structure of the second embodiment of the present invention in which a conductive polymer is incorporated between the TAB and the contact target as an interconnection and packaging member. 
     FIG. 14 is a schematic diagram showing a third embodiment of the present invention in which the packaging and interconnection is established by a double layer TAB (tape automated bonding) between a contact pad provided at an upper surface of the contact structure and a contact target on a probe card or package. 
     FIG. 15 is a schematic diagram showing a modified structure of the third embodiment of the present invention in which a straight double layer TAB is incorporated as an interconnection and packaging member to be connected to a pair of contact targets. 
     FIG. 16 is a schematic diagram showing a further modified structure of the third embodiment of the present invention in which a contact target is a connector to be connected with the double layer TAB. 
     FIG. 17 is a schematic diagram showing a further modified structure of the third embodiment of the present invention in which a contact target is a connector to be connected with the straight double layer TAB. 
     FIG. 18 is a schematic diagram showing a further modified structure of the third embodiment of the present invention in which a conductive bump is incorporated between the TAB and the contact target as an interconnection and packaging member. 
     FIG. 19 is a schematic diagram showing a further modified structure of the third embodiment of the present invention in which a pair of conductive bumps are incorporated between the double layer TAB and the contact targets as interconnection and packaging members. 
     FIG. 20 is a schematic diagram showing a further modified structure of the third embodiment of the present invention in which a conductive polymer is incorporated between the double layer TAB and the contact target as an interconnection and packaging member. 
     FIG. 21 is a schematic diagram showing a further modified structure of the third embodiment of the present invention in which a pair of conductive polymer are incorporated between the double layer TAB and the contact targets as interconnection and packaging members. 
     FIG. 22 is a schematic diagram showing a fourth embodiment of the present invention in which the packaging and interconnection is established by a triple layer TAB (tape automated bonding) between a contact pad provided at an upper surface of the contact structure and a contact target on a probe card or package. 
     FIG. 23 is a schematic diagram showing a modified structure of the fourth embodiment of the present invention in which a straight triple layer TAB is incorporated as an interconnection and packaging member to be connected to three contact targets. 
     FIG. 24 is a schematic diagram showing a further modified structure of the fourth embodiment of the present invention in which a contact target is a connector to be connected with e triple layer TAB. 
     FIG. 25 is a schematic diagram showing a further modified structure of the fourth embodiment of the present invention in which a contact target is a connector to be connected with the straight triple layer TAB. 
     FIG. 26 is a schematic diagram showing a further modified structure of the fourth embodiment of the present invention in which a conductive bump is incorporated between the TAB and the contact target as an interconnection and packaging member 
     FIG. 27 is a schematic diagram showing a further modified structure of the fourth embodiment of the present invention in which three conductive bumps are incorporated between the triple layer TAB and the contact targets as interconnection and packaging members. 
     FIG. 28 is a schematic diagram showing a further modified structure of the fourth embodiment of the present invention in which a conductive polymer is incorporated between the triple layer TAB and the contact target as an interconnection and packaging member. 
     FIG. 29 is a schematic diagram showing a further modified structure of the fourth embodiment of the present invention in which three conductive polymer are incorporated between the triple layer TAB and the contact targets as interconnection and packaging members. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     To establish a packaging and interconnection of a contact structure directly with a probe card or indirectly with a probe card through an IC package, examples of FIGS. 6A-6C show basic three types of electrical path extended from the contact structure to form such interconnections. FIG.  6 A shows an example in which such an electrical connection is established at the top of the substrate. FIG. 6B shows an example in which an electrical connection is established at the bottom of the substrate while FIG. 6C shows an example in which an electrical connection is formed at the edge of the substrate. Almost any types of existing IC package design or probe card design can accommodate at least one of the interconnect types of FIGS. 6A-6C. 
     Each of FIGS. 6A-6C include a contact interconnect trace  32  also designated by a which is to establish electrical connection with a probe card or any intermediate member to a probe card. The contact structure  30  has vertical portions b and d and a horizontal beam c and a tip portion e. The tip portion e of the contact structure  30  is preferably sharpened to achieve a scrubbing effect when pressed against contact targets  320  such as shown in FIG.  5 . The spring force of the horizontal beam c provides an appropriate contact force against the contact target  320 . An example of material of the contact structure  30  and the contact trace  32  includes nickel, aluminum, copper and other conductive materials. The inventors of this application have provided a detailed description of production process of the contact structure  30  and the contact interconnect trace  32  on the silicon substrate  20  in the above noted U.S. application Ser. No. 09/099,614 now abandoned. 
     In the present invention, the packaging and interconnection of a contact structure is directed to the type of structure having a contact trace at an upper surface thereof (top type contact trace) as shown in FIG.  6 A. Various embodiments of the present invention on the top type packaging and interconnection will be described with reference to the drawings. 
     FIGS. 7 and 8 show a first embodiment of the present invention wherein the top type contact trace is coupled to a lead frame provided, for example, of a probe card (not shown) or an IC package (not shown) through a bonding wire. In the first example of FIG. 7, a contact structure  30  formed on a contact substrate  20  is electrically connected to a contact trace  32  which is the top type contact trace noted above. The contact trace  32  has, at its end, a contact pad  33 , an upper surface of which is designed to establish an electrical connection with contact targets through various contact means such as a bonding wire  72 . The wire  72  is a thin (15-25 μm) wire made, for example, of gold or aluminum. 
     Typically, the contact substrate  20  is a silicon substrate although other types of dielectric substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. In the example of FIG. 7, the bonding wire  72  connects the contact pad  33  and a lead frame  45  of, for example, a probe card. The contact substrate  20  and the lead frame  45  are mounted on a support structure  52  through, for example, an adhesive (not shown). 
     Any wire bonding procedure can be used to establish the connecting by the bonding wire  72 . The wire  72  is first bonded to the contact pad  33  of the contact trace and spanned to the lead frame  45 . The wire  72  is bonded to the lead frame  45  and is clipped and the entire process is repeated at the next bonding pad. The wire bonding is done with either gold or aluminum wires. Both materials are highly conductive and ductile enough to withstand deformation during the bonding steps and still remaining strong and reliable. In the gold wire bonding, thermo-compression (TC) and thermosonic methods are typically used. In the aluminum wire bonding, ultrasonic and wedge bonding methods are typically used. 
     In the example of FIG. 8, the contact trace  32  is connected at its upper surface with a printed circuit board (PCB) interconnect pad  38  provided on a PCB substrate  62 . The PCB substrate  62  can be a probe card such as shown in FIG. 3 or an intermediate circuit component between the contact structure and the probe card. The PCB substrate is mounted on a support structure  52 . The contact substrate  20  and the support structure  52  are fixed with one another by, for example, an adhesive (not shown). Similarly, the PCB substrate and the support structure  52  are fixed with one another by an adhesive (not shown). 
     FIGS. 9-13 show a second embodiment of the present invention wherein the top type contact trace is coupled to a contact target through a single layer lead formed by a tape automated bonding (TAB) process. In the first example of FIG. 9, the contact structure  30  formed on a contact substrate  20  is electrically connected to the contact pad  33  via the contact trace  32 . The contact pad  33  is connected at its upper surface with a TAB lead  74  which is also connected to a printed circuit board (PCB) interconnect pad  38  provided on a PCB substrate  62   2 . 
     The contact substrate  20  is mounted on the PCB substrate  62   2  through an elastomer  42  and a support structure  52   2 . The contact substrate  20 , the elastomer  42 , the support structure  52   2  and the PCB substrate  62   2  are fixed with one another by, for example, an adhesive (not shown). In this example, the TAB lead  74  for connecting the contact pad  33  and the PCB pad  38  has a gull-wing shape where a gull-wing portion A is bonded to the PCB pad  38 . A support member  54  is provided on the support structure  52   2  to support the TAB lead  74 . 
     The TAB lead  74  has a gull-wing shape which is similar to the standard “gull-wing lead” used in a surface mount technology. Because of the down-ward bent of the gull-wing type TAB lead  74 , a sufficient vertical clearance is achieved at the left end of FIG. 9 over the contact portion between the PCB pad  38  and the lead  74 . The lead form of the TAB lead  74  (downward bent, gull-wing lead) may require special tooling to produce the same. Since a large number of interconnection between the contact trace and the PCB pad will be used in the application such as semiconductor testing, several hundred connections, such tooling may be standardized for a multiple of contact traces with given pitch. 
     The electrical connections between the contact pad  33  and the TAB lead  74  and between the TAB lead  74  and the PCB pad  38  will be established by various bonding technologies including thermosonic bonding, thermocompression bonding, and ultrasonic bonding technique. In another aspect, such electrical connections will be established through a surface mount technology (SMT) such as using a screen printable solder paste. A soldering process is carried out based on the reflow characteristics of the solder paste and other solder materials well known in the art. 
     The PCB substrate  62   2  itself may be a probe card such as shown in FIG. 3 or provided separately and mounted directly or indirectly on the probe card. In the former case, the PCB  62   2  may make direct contact with an interface of a test system such as an IC tester in a manner shown in FIG.  2 . In the latter case, the PCB substrate  62   2  is pinned or in use of a conductive polymer for establishing an electrical contact to the next level of a contact mechanism on the probe card. Such types of electrical connection between the PCB substrate  62   2  and the probe card through pins or conductive polymer would allow for field repairability. 
     The PCB substrate  62   2  may be a multiple layer structure which is capable of providing high bandwidth signals, distributed high frequency capacitance and integrated high frequency chip capacitors for power supply decoupling as well as high pin counts (number of I/O pins and associated signal paths). An example of material of the PCB  62   2  is standard high performance glass epoxy resin. Another example of material is ceramics which is expected to minimize mismatch in coefficient of temperature expansion (CTE) rates during high temperature application such as a burn-in test of semiconductor wafers and packaged IC devices. 
     The support structure  52   2  is to establish a physical strength of the packaging and interconnection of the contact structure. The support structure  52   2  is made of, for example, ceramic, molded plastic or metal. The elastomer  42  is to establish flexibility in the packaging and interconnection of the present invention to overcome a potential planarization mechanism. The elastomer  42  also functions to absorb a mismatch in temperature expansion rates between the contact substrate  20  and the PCB substrate  62   2 . 
     An example of overall length of the contact trace  32  and the TAB lead  74  is in the range from several ten micrometers to several hundred micrometers. Because of the short path length, the packaging interconnection of the present invention can be easily operable in a high frequency band such as several GHz or even higher. Moreover, because of a relatively small number of overall components to be assembled, the packaging and interconnection of the present invention can be fabricated with low cost and high reliability as well as high productivity. 
     FIG. 10 shows another example of the second embodiment of the present invention. A TAB lead  74   2  is straight and connects the contact pad  33  to the PCB pad  38  provided on a printed circuit board (PCB) substrate  62   3 . To match the vertical position of the PCB pad  38 , the PCB substrate  62   3  has a raised portion at the left end thereof. 
     The electrical connection between the TAB lead  74   2  and the PCB pad  38  will be established by a surface mount technology (SMT) such as using a screen printable solder paste as well as various other bonding technologies including thermosonic bonding, thermocompression bonding, and ultrasonic bonding technique. Because of the significantly small sizes of the components and signal path lengths involved in the contact structure  30 , contact trace  32 , and the TAB lead  74   2 , the example of FIG. 10 can operate at a very high frequency band, such as several GHz. Moreover, because of the small number and simple structure of components to be assembled, the interconnection and packaging of the present invention can be fabricated with low cost and high reliability as well as high productivity. 
     FIG. 11 shows a further modification of the second embodiment of the present invention wherein the top type contact trace  32  is coupled to a connector provided on a printed circuit board or other structure. In the example of FIG. 11, a contact pad  33  connected to the contact trace  32  is connected to a connector  46  via a single layer TAB lead  74   3 . The connector  46  is provided on a support structure  52   3 . Typically, the contact structure  30 , contact trace  32  and the contact pad  33  are formed on the contact substrate  20  through photolithography processes. The contact substrate  20  is a silicon substrate although other types of dielectric substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. 
     In this example, the TAB lead  74   3  has a shape similar to the gull-wing widely used in the surface mount technology and incorporated in the example of FIG.  9 . At about the center of FIG. 11, the contact substrate  20  is mounted on the support structure  52   3  through an elastomer  42 . The contact substrate  20 , the elastomer  42  and the support structure  52   3  are attached with one another by, for example, an adhesive (not shown). 
     The connector  46  may be mechanically fixed to the support structure  52   3  through an attachment mechanism (not shown). The end of the TAB lead  74   3  is inserted in a receptacle (not shown) of the connector  46 . As is well known in the art, such a receptacle has a spring mechanism to provide a sufficient contact force when receiving the end of the TAB lead  74   3  therein. Between the TAB lead  74   3  and the support structure  52   3 , there is provided a support member  54  to support the TAB lead  74   3  extending between the contact pad  33  and the connector  46 . Also well known in the art, an inner surface of such a receptacle is provided with conductive metal such as gold, silver, palladium or nickel. 
     The connector  46  may be integrated with straight or right angle pins, which may be connected to the receptacle noted above, for direct connection to a printed circuit board (PCB). A PCB to mount the connector  46  thereon can be either solid or flexible. As is known in the art, a flexible PCB is formed on a flexible base material and has flat cables therein. Alternatively, the connector  46  may be integrated with a coaxial cable assembly in which a receptacle is attached to an inner conductor of the coaxial cable for receiving the end of the TAB lead  74   3  therein. The connection between the connector  46  and the TAB lead  74   3  or the support structure  52   3  is not a permanent attachment method, allowing for field replacement and repairability of the contact portion. 
     Typically, the contact substrate  20  is a silicon substrate although other types of substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. The support structure  52   3  is to establish a physical strength of the packaging and interconnection of the contact structure. The support structure  52   3  is made of, for example, ceramic, molded plastic or metal. The elastomer  42  is to establish flexibility in the interconnection and packaging of the present invention to overcome a potential planarization mechanism. The elastomer  42  also functions to absorb a mismatch in temperature expansion rates between the contact substrate  20  and a PCB substrate to mount the connector  46  thereon. 
     An example of overall length of the contact trace  32  and the TAB lead  74   3  is in the range from several ten micrometers to several hundred micrometers. Because of the short path length, the interconnection and packaging of the present invention can be easily operable in a high frequency band such as several GHz or even higher. Moreover, because of the lower total number of components to be assembled, the packaging and interconnection of the present invention can be fabricated with low cost and high reliability as well as high productivity. The gull-wing shaped TAB lead  74   3  may require special tooling in the production process, which may be standardized for a multiple of contact traces with a given pitch. 
     FIG. 12 shows a further example of the second embodiment of the present invention wherein the top type contact trace is coupled to a pad provided on a printed circuit board through a conductive bump. In the example of FIG. 12, a contact structure  30 , a contact trace  32  and a contact tab  33  are formed on a contact substrate  20 . Typically, the contact substrate  20  is a silicon substrate although other types of dielectric substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. The contact trace  32  is connected to a PCB (print circuit board) pad  38  provided on a PCB substrate  62   2  through a conductive bump  56  via a TAB lead  74   4 . 
     In this example, the TAB lead  74   4  has a shape similar to that shown in the example of FIG.  11 . The contact substrate  20  is mounted on the PCB substrate  62   2  through a support structure  52   2  and an elastomer  42 . The contact substrate  20 , the elastomer  42 , the support structure  52   2 , and the PCB substrate  62   2  are attached with one another by, for example, an adhesive (not shown). Between the TAB lead  74   4  and the support structure  52   2 , there is provided a support member  54  to support the TAB lead  74   4  extending between the contact pad  33  and the PVB pad  38 . 
     By the application of the heat, the conductive bump  56  is reflowed onto the PCB pad  38  for attachment between the TAB lead  74   4  and the PCB pad  38 . An example of the conductive bump  56  is a solder bump used in a standard solder ball technology. Another example of the conductive bump  56  is a fluxless solder ball used in a plasma-assisted dry soldering technology. 
     Further examples of the conductive bump  56  are a conductive polymer bump and a compliant bump which involve the use of polymer in the bump. This helps in minimizing planarization problems or CTE (coefficient of temperature expansion) mismatches in the packaging and interconnection. There is no reflowing of metal, which prevents bridging between contact points. The conductive polymer bump is made of a screen printable conductive adhesive. The compliant bump is a polymer core bump with a metal coating. The polymer is typically plated with gold and is elastically compressible. Still further example of the conductive bump  56  is a bump used in a controlled collapse chip connection technology in which solder balls are formed by an evaporation process. 
     The PCB substrate  62   2  itself may be a probe card such as shown in FIG. 3 or provided separately and mounted directly or indirectly on the probe card. In the former case, the PCB substrate  62   2  may make direct contact with an interface of a test system such as an IC tester in the manner shown in FIG.  2 . In the latter case, the PCB substrate  62   2  is pinned or in use of a conductive polymer for establishing an electrical contact to the next level. Such types of electrical connection between the PCB substrate  62   2  and the probe card through pins or conductive polymer would allow for field repairability. 
     The PCB substrate  62   2  may be a multiple layer structure which is capable of providing high bandwidth signals, distributed high frequency capacitance and integrated high frequency chip capacitors for power supply decoupling as well as high pin counts (number of I/O pins and associated signal paths). An example of material of the PCB substrate  62   2  is standard high performance glass epoxy resin. Another example of the material is ceramics which is expected to minimize mismatch in coefficient of temperature expansion (CTE) rates during high temperature application such as a burn-in test of semiconductor wafers and packaged IC devices. 
     The support structure  52   2  is to establish a physical strength of the packaging and interconnection of the contact structure. The support structure  52   2  is made of, for example, ceramic, molded plastic or metal. The elastomer  42  is to establish flexibility in the packaging and interconnection of the present invention to overcome a potential planarization mechanism. The elastomer  42  also functions to absorb a mismatch in temperature expansion rates between the contact substrate  20  and the PCB substrate  62   2 . 
     An example of overall length of the contact trace  32  and the TAB lead  74   4  is in the range from several ten micrometers to several hundred micrometers. Because of the short path length, the interconnection and packaging of the present invention can be easily operable in a high frequency band such as several GHz or even higher. Moreover, because of the lower total number of components to be assembled, the packaging and interconnection of the present invention can be fabricated with low cost and high reliability as well as high productivity. 
     FIG. 13 shows a further example of the second embodiment of the present invention wherein the top type contact trace is coupled to a pad provided on a printed circuit board through a conductive polymer. In the example of FIG. 13, a contact structure  30 , a contact trace  32 , and a contact pad  33  are formed on a contact substrate  20 . The contact pad  33  is connected to a PCB (print circuit board) pad  38  provided on a PCB substrate  62   2  through a TAB lead  74   4  and a conductive polymer  66 . Typically, the contact substrate  20  is a silicon substrate although other types of dielectric substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. 
     In this example, the TAB lead  74   4  has a shape similar to that shown in the example of FIGS. 11 and 12. The contact substrate  20  is mounted on the PCB substrate  62   2  through a support structure  52   2  and an elastomer  42 . The contact substrate  20 , the elastomer  42 , the support structure  52   2 , and the PCB substrate  62   2  are attached with one another by, for example, an adhesive (not shown). 
     Most conductive polymers are designed to be conductive between the mating electrodes normally in vertical of angled directions and not conductive in the horizontal direction. An example of the conductive polymer  66  is a conductive elastomer which is filled with conductive wire that extends beyond the surface of the elastomer. 
     Various other examples of the conductive polymer  66  are possible such as an anisotropic conductive adhesive, anisotropic conductive film, anisotropic conductive paste, and anisotropic conductive particles. The anisotropic conductive adhesive is filled with conductive particles that do not touch each other. The conductive path is formed by pressing the adhesive between the two electrodes at a specific location. The anisotropic conductive film is a thin dielectric resin filled with conductive particles that do not touch each other. The conductive path is formed by pressing the film between the two electrodes at a specific location. 
     The anisotropic conductive paste is a screen printable paste which is filled with conductive particles that do not touch each other. The conductive path is formed by pressing the paste between the two electrodes at a specific location. The anisotropic conductive particle is a thin dielectric resin filled with conductive particles coated with a very thin layer of dielectric material to improve isolation. The conductive path is formed by pressing the particle with enough force to explode the dielectric coating on the particles, between the two electrodes at a specific location. 
     The PCB substrate  62   2  itself may be a probe card such as shown in FIG. 3 or provided separately and mounted directly or indirectly on the probe card. In the former case, the PCB substrate  62   2  may make direct contact with an interface of a test system such as an IC tester in the manner shown in FIG.  2 . In the latter case, the PCB substrate  62   2  is pinned or in use of a conductive polymer for establishing an electrical contact to the next level. Such types of electrical connection between the PCB substrate  62   2  and the probe card through pins or conductive polymer would allow for field repairability. 
     The PCB substrate  62   2  may be a multiple layer structure which is capable of providing high bandwidth signals, distributed high frequency capacitance and integrated high frequency chip capacitors for power supply decoupling as well as high pin counts (number of I/O pins and associated signal paths). An example of material of the PCB substrate  62   2  is standard high performance glass epoxy resin. Another example of material is ceramics which is expected to minimize mismatch in coefficient of temperature expansion (CTE) rates during high temperature application such as a burn-in test of semiconductor wafers and packaged IC devices. 
     The support structure  52   2  is to establish a physical strength of the packaging and interconnection of the contact structure. The support structure  52   2  is made of, for example, ceramic, molded plastic or metal. The elastomer  42  is to establish flexibility in the packaging and interconnection of the present invention to overcome a potential planarization mechanism. The elastomer  42  also functions to absorb a mismatch in temperature expansion rates between the contact substrate  20  and the PCB substrate  62   2 . 
     An example of length of the contact trace  32  is from several ten micrometers to several hundred micrometers. Because of the short path length, the packaging and interconnection of the present invention can be easily operable in a high frequency band such as several GHz or even higher. Moreover, because of the lower total number of components to be assembled, the interconnection and packaging of the present invention can be fabricated with low cost and high reliability as well as high productivity. 
     FIGS. 14-21 show a third embodiment of the present invention wherein the top type contact trace is coupled to a contact target through a double layer lead formed by a tape automated bonding (TAB) process. In the first example of FIG. 14, the contact structure  30  formed on a contact substrate  20  is electrically connected to the contact pad  33  via the contact trace  32 . The contact pad  33  is connected at its upper surface with a TAB lead  76  which is also connected to a printed circuit board (PCB) interconnect pad  38  provided on a PCB substrate  62   2 . 
     The contact substrate  20  is mounted on the PCB substrate  62   2  through an elastomer  42   2  and a support structure  52   4 . The contact substrate  20 , the elastomer  42   2 , the support structure  52   4  and the PCB substrate  62   2  are fixed with one another by, for example, an adhesive (not shown). In this example, the double layered TAB lead  76  for connecting the contact pad  33  and the PCB pad  38  has an upper lead A and a lower lead B. A support member  54   2  is provided between the upper lead and the lower lead of the TAB lead  76 . 
     The TAB lead  76  has a gull-wing shape which is similar to the standard “gull-wing lead” used in a surface mount technology. Because of the down-ward bent of the gull-wing type TAB lead  76 , a sufficient vertical clearance is achieved at the left end of FIG. 14 over the contact portion between the PCB pad  38  and the lead  76 . The lead form of the TAB lead  76  (downward bent, gull-wing lead) may require special tooling to produce the same. Since a large number of interconnection between the contact trace and the PCB pad will be used in the application such as semiconductor testing, several hundred connections, such tooling may be standardized for a multiple of contact traces with given pitch. 
     The structure of the TAB lead  76  having the tiered leads A and B establish a low resistance in a signal path because of two leads. This is useful in transmitting a large current such as in a ground line or a power line for testing a semiconductor device with high speed without deforming the waveforms of test signals. 
     The electrical connections between the contact pad  33  and the TAB lead  76  and between the TAB lead  76  and the PCB pad  38  will be established by various bonding technologies including thermosonic bonding, thermocompression bonding, and ultrasonic bonding technique. In another aspect, such electrical connections will be established through a surface mount technology (SMT) such as using a screen printable solder paste. A soldering process is carried out based on the reflow characteristics of the solder paste and other solder materials well known in the art. 
     The PCB substrate  62   2  itself may be a probe card such as shown in FIG. 3 or provided separately and mounted directly or indirectly on the probe card. In the former case, the PCB  62   2  may make direct contact with an interface of a test system such as an IC tester in a manner shown in FIG.  2 . In the latter case, the PCB substrate  62   2  is pinned or in use of a conductive polymer for establishing an electrical contact to the next level of a contact mechanism on the probe card. Such types of electrical connection between the PCB substrate  62   2  and the probe card through pins or conductive polymer would allow for field repairability. 
     The PCB substrate  62   2  may be a multiple layer structure which is capable of providing high bandwidth signals, distributed high frequency capacitance and integrated high frequency chip capacitors for power supply decoupling as well as high pin counts (number of I/O pins and associated signal paths). An example of material of the PCB  62   2  is standard high performance glass epoxy resin. Another example of material is ceramics which is expected to minimize mismatch in coefficient of temperature expansion (CTE) rates during high temperature application such as a burn-in test of semiconductor wafers and packaged IC devices. 
     The support structure  52   4  is to establish a physical strength of the packaging and interconnection of the contact structure. The support structure  52   4  is made of, for example, ceramic, molded plastic or metal. The elastomer  42   2  is to establish flexibility in the packaging and interconnection of the present invention to overcome a potential planarization mechanism. The elastomer  42   2  also functions to absorb a mismatch in temperature expansion rates between the contact substrate  20  and the PCB substrate  62   2 . 
     An example of overall length of the contact trace  32  and the TAB lead  76  is in the range from several ten micrometers to several hundred micrometers. Because of the short path length, the packaging interconnection of the present invention can be easily operable in a high frequency band such as several GHz or even higher. Moreover, because of a relatively small number of overall components to be assembled, the packaging and interconnection of the present invention can be fabricated with low cost and high reliability as well as high productivity. 
     FIG. 15 shows another example of the third embodiment of the present invention. In this example, a double layered TAB lead  76   2  having upper and lower leads A and B is provided to the contact pad  33  connected to the contact structure  30 . The upper lead A is provided in an upper and outer position of FIG. 15 than the lower lead B. The upper lead is connected to a PCB pad  38  and the lower lead B is connected to a PCB pad  39 . To accommodate the PCB pads  38  and  39  thereon, a PCB substrate  62   4  is arranged to have an edge having a larger thickness, i.e., a step, to mount the PCB pad  38 , and an inner portion adjacent to the edge portion having a smaller thickness to mount the PCB pad  39 . 
     The electrical connection between the TAB lead  76   2  and the PCB pads  38  and  39  will be established by a surface mount technology (SMT) such as using a screen printable solder paste as well as various other bonding technologies including thermosonic bonding, thermocompression bonding, and ultrasonic bonding technique. Because of the significantly small sizes of the components and signal path lengths involved in the contact structure  30 , contact trace  32 , and the TAB lead  76   2 , the example of FIG. 15 can operate at a very high frequency band, such as several GHz. Moreover, because of the small number and simple structure of components to be assembled, the interconnection and packaging of the present invention can be fabricated with low cost and high reliability as well as high productivity. 
     The structure of the TAB lead  76   2  having the double layered leads A and B establish a fan out in the vertical dimension. This is useful in distributing a signal or power to two or more paths. Another advantage of the fan out is to increase the number of contact pads, i.e., to decrease the effective pitch (distance) between the contact pads. 
     FIG. 16 shows a further modification of the third embodiment of the present invention wherein the top type contact trace  32  is coupled to a connector provided on a printed circuit board or other structure. In the example of FIG. 16, a contact pad  33  connected to the contact trace  32  is connected to a connector  46  via a double layer TAB lead  76   4 . The connector  46  is provided on a support structure  52   5 . Typically, the contact structure  30 , contact trace  32  and the contact pad  33  are formed on the contact substrate  20  through photolithography processes. The contact substrate  20  is a silicon substrate although other types of dielectric substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. 
     The connector  46  may be mechanically fixed to the support structure  52   5  through an attachment mechanism (not shown). The end of the TAB lead  76   4  is inserted in a receptacle (not shown) of the connector  46 . As is well known in the art, such a receptacle has a spring mechanism to provide a sufficient contact force when receiving the end of the TAB lead  76   4  therein. Between the upper lead A and the lower lead B of the double layer TAB lead  76   4 , there is provided a support member  54   2  to support the leads A and B of the TAB lead  76   4  extending between the contact pad  33  and the connector  46 . Also well known in the art, an inner surface of such receptacles are provided with conductive metal such as gold, silver, palladium or nickel. 
     The structure of the TAB lead  76   4  having the tiered leads A and B establish a low resistance in a signal path because of the two leads. This is useful in transmitting a large current such as in a ground line or a power line for testing a semiconductor device with high speed without deforming the waveforms of the test signals. 
     The connector  46  may be integrated with straight or right angle pins, which may be connected to the receptacle noted above, for direct connection to a printed circuit board (PCB). A PCB to mount the connector  46  thereon can be either solid or flexible. As is known in the art, a flexible PCB is formed on a flexible base material and has flat cables therein. Alternatively, the connector  46  may be integrated with a coaxial cable assembly in which a receptacle is attached to an inner conductor of the coaxial cable for receiving the ends of the TAB lead  76   4  therein. The connection between the connector  46  and the TAB lead  76   4  or the support structure  52   5  is not a permanent attachment method, allowing for field replacement and repairability of the contact portion. 
     Typically, the contact substrate  20  is a silicon substrate although other types of substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. The support structure  52   5  is to establish a physical strength of the packaging and interconnection of the contact structure. The support structure  52   5  is made of, for example, ceramic, molded plastic or metal. The elastomer  42   2  is to establish flexibility in the interconnection and packaging of the present invention to overcome a potential planarization mechanism. The elastomer  42   2  also functions to absorb a mismatch in temperature expansion rates between the contact substrate  20  and a PCB substrate to mount the connector  46  thereon. 
     FIG. 17 shows a further modification of the third embodiment of the present invention wherein the top type contact trace  32  is coupled to a connector provided on a printed circuit board or other structure. In the example of FIG. 17, a contact pad  33  connected to the contact trace  32  is connected to a connector  46   2  via a double layer TAB lead  76   6 . The double layer TAB  76   6  has an upper lead A and a lower lead B each of which is separated at the end. The connector  46   2  is provided on a support structure  52   5 . 
     The connector  46   2  may be mechanically fixed to the support structure  52   5  through an attachment mechanism (not shown). The ends of the leads A and B of the TAB lead  76   6  are inserted in receptacles (not shown) of the connector  46   2 . As is well known in the art, such a receptacle has a spring mechanism to provide a sufficient contact force when receiving the end of the TAB lead  76   6  therein. Between the upper lead A and the lower lead B of the double layer TAB lead  76   6 , there is provided a support member  54   4  to support the leads A and B. 
     The structure of the TAB lead  76   6  having the double layered leads A and B establish a fan out in the vertical dimension. This is useful in distributing a signal or power to two or more paths. Another advantage of the fan out is to increase the number of contact pads, i.e., to decrease the effective pitch (distance) between the contact pads. 
     FIG. 18 shows a further example of the third embodiment of the present invention wherein the top type contact trace is coupled to a pad provided on a printed circuit board through a conductive bump. In the example of FIG. 18, a contact structure  30 , a contact trace  32  and a contact tab  33  are formed on a contact substrate  20 . Typically, the contact substrate  20  is a silicon substrate although other types of dielectric substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. The contact trace  32  is connected to a PCB (print circuit board) pad  38  provided on a PCB substrate  62   2  through a conductive bump  56  via a double layer TAB lead  76   4 . 
     The contact substrate  20  is mounted on the PCB substrate  62   2  through a support structure  52   4  and an elastomer  42   2 . The contact substrate  20 , the elastomer  42   2 , the support structure  52   4 , and the PCB substrate  62   2  are attached with one another by, for example, an adhesive (not shown). Between the upper lead A and the lower lead B of the TAB lead  76   4 , there is provided with a support member  54   2  to support the upper and lower leads A and B. 
     By the application of the heat, the conductive bump  56  is reflowed onto the PCB pad  38  for attachment between the TAB lead  76   4  and the PCB pad  38 . An example of the conductive bump  56  is a solder bump used in a standard solder ball technology. Another example of the conductive bump  56  is a fluxless solder ball used in a plasma-assisted dry soldering technology. 
     Further examples of the conductive bump  56  are a conductive polymer bump and a compliant bump which involve the use of polymer in the bump. This helps in minimizing planarization problems or CTE (coefficient of temperature expansion) mismatches in the packaging and interconnection. There is no reflowing of metal, which prevents bridging between contact points. The conductive polymer bump is made of a screen printable conductive adhesive. The compliant bump is a polymer core bump with a metal coating. The polymer is typically plated with gold and is elastically compressible. Still further example of the conductive bump  56  is a bump used in a controlled collapse chip connection technology in which solder balls are formed by an evaporation process. 
     The structure of the TAB lead  76   4  having the tiered leads A and B establish a low resistance in a signal path because of the two leads. This is useful in transmitting a large current such as in a ground line or a power line for testing a semiconductor device with high speed without deforming the waveforms of the test signals. 
     FIG. 19 shows another example of the third embodiment of the present invention. In this example, a double layered TAB lead  76   2  having upper and lower leads A and B are provided to the contact pad  33  connected to the contact structure  30 . The upper lead A is provided in an upper and outer position than the lower lead B in FIG.  19 . The upper lead is connected to a PCB pad  38  via a conductive dump  56  and the lower lead B is connected to a PCB pad  39  via a conductive dump  57 . To accommodate the PCB pads  38  and  39  thereon, a PCB substrate  62   4  is arranged to have an edge having a larger thickness, i.e., a step, to mount the PCB pad  38 , and an inner portion adjacent to the edge portion having a smaller thickness to mount the PCB pad  39 . 
     By the application of the heat, the conductive bumps  56  and  57  are reflowed onto the PCB pads  38  and  39  for attachment between the TAB lead  76   2  and the PCB pads  38  and  39 . An example of the conductive bumps  56  and  57  is a solder bump used in a standard solder ball technology. Another example of the conductive bumps  56  and  57  is a fluxless solder ball used in a plasma-assisted dry soldering technology. 
     The structure of the TAB lead  76   2  having the double layered leads A and B establish a fan out in the vertical dimension. This is useful in distributing a signal or power to two or more paths. Another advantage of the fan out is to increase the number of contact pads, i.e., to decrease the effective pitch (distance) between the contact pads. 
     FIG. 20 shows a further example of the third embodiment of the present invention wherein the top type contact trace is coupled to a pad provided on a printed circuit board through a conductive polymer. In the example of FIG. 20, a contact structure  30 , a contact trace  32  and a contact tab  33  are formed on a contact substrate  20 . Typically, the contact substrate  20  is a silicon substrate although other types of dielectric substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. The contact trace  32  is connected to a PCB (print circuit board) pad  38  provided on a PCB substrate  62   2  through a conductive polymer  66  via a double layer TAB lead  76   4 . 
     The contact substrate  20  is mounted on the PCB substrate  62   2  through a support structure  52   4  and an elastomer  42   2 . The contact substrate  20 , the elastomer  42   2 , the support structure  52   4 , and the PCB substrate  62   2  are attached with one another by, for example, an adhesive (not shown). Between the upper lead A and the lower lead B of the TAB lead  76   4 , there is provided with a support member  54   2  to support the upper and lower leads A and B. 
     Most conductive polymers are designed to be conductive between the mating electrodes normally in vertical of angled directions and not conductive in the horizontal direction. An example of the conductive polymer  66  is a conductive elastomer which is filled with conductive wire that extends beyond the surface of the elastomer. 
     Various other examples of the conductive polymer  66  are possible such as an anisotropic conductive adhesive, anisotropic conductive film, anisotropic conductive paste, and anisotropic conductive particles. The anisotropic conductive adhesive is filled with conductive particles that do not touch each other. The conductive path is formed by pressing the adhesive between the two electrodes at a specific location. The anisotropic conductive film is a thin dielectric resin filled with conductive particles that do not touch each other. The conductive path is formed by pressing the film between the two electrodes at a specific location. 
     The anisotropic conductive paste is a screen printable paste which is filled with conductive particles that do not touch each other. The conductive path is formed by pressing the paste between the two electrodes at a specific location. The anisotropic conductive particle is a thin dielectric resin filled with conductive particles coated with a very thin layer of dielectric material to improve isolation. The conductive path is formed by pressing the particle with enough force to explode the dielectric coating on the particles, between the two electrodes at a specific location. 
     The structure of the TAB lead  76   4  having the tiered leads A and B establish a low resistance in a signal path because of the two leads. This is useful in transmitting a large current such as in a ground line or a power line for testing a semiconductor device with high speed without deforming the waveforms of the test signals. 
     FIG. 21 shows another example of the third embodiment of the present invention. In this example, a double layered TAB lead  76   2  having upper and lower leads A and B are provided to the contact pad  33  connected to the contact trace  32  and contact structure  30 . The upper lead A is provided in an upper and outer position than the lower lead B in FIG.  21 . The upper lead is connected to a PCB pad  38  via a conductive polymer  66  and the lower lead B is connected to a PCB pad  39  via a conductive polymer  67 . To accommodate the PCB pads  38  and  39  thereon, a PCB substrate  62   4  is arranged to have an edge having a larger thickness, i.e., a step, to mount the PCB pad  38 , and an inner portion adjacent to the edge portion having a smaller thickness to mount the PCB pad  39 . 
     The electrical connection between the TAB lead  76   2  and the PCB pads  38  and  39  will be established by a surface mount technology (SMT) such as using a screen printable solder paste as well as various other bonding technologies including thermosonic bonding, thermocompression bonding, and ultrasonic bonding technique. 
     The structure of the TAB lead  76   2  having the double layered leads A and B establish a fan out in the vertical dimension. This is useful in distributing a signal or power to two or more paths. Another advantage of the fan out is to increase the number of contact pads, i.e., to decrease the effective pitch (distance) between the contact pads. 
     FIGS. 22-29 show a fourth embodiment of the present invention wherein the top type contact trace is coupled to a contact target through a triple layer lead formed by a tape automated bonding (TAB) process. In the first example of FIG. 22, the contact structure  30  formed on a contact substrate  20  is electrically connected to the contact pad  33  via the contact trace  32 . The contact pad  33  is connected at its upper surface with a TAB lead  78  which is also connected to a printed circuit board (PCB) interconnect pad  38  provided on a PCB substrate  62   2 . 
     The contact substrate  20  is mounted on the PCB substrate  62   2  through an elastomer  42  and a support structure  52   6 . The contact substrate  20 , the elastomer  42 , the support structure  52   6  and the PCB substrate  62   2  are fixed with one another by, for example, an adhesive (not shown). In this example, the triple layered TAB lead  78  for connecting the contact pad  33  and the PCB pad  38  has an upper lead A, intermediate lead B and a lower lead C. A support member  59   2  is provided between the upper lead A and the intermediate lead B of the triple layered TAB lead  78 . A support member  59   2  is provided between the intermediate lead B and the lower lead C of the triple layered TAB lead  78 . 
     The TAB lead  78  as a whole has a gull-wing shape which is similar to the standard “gull-wing lead” used in a surface mount technology. Because of the down-ward bent of the gull-wing type TAB lead  78 , a sufficient vertical clearance is achieved at the left end of FIG. 22 over the contact portion between the PCB pad  38  and the TAB lead  78 . The lead form of the TAB lead  78  (downward bent, gull-wing lead) may require special tooling to produce the same. Since a large number of interconnection between the contact trace and the PCB pad will be used in the application such as semiconductor testing, several hundred connections, such tooling may be standardized for a multiple of contact traces with given pitch. 
     The structure of the TAB lead  78  having the tiered leads A, B and C establish a low resistance and a large current capacity in a signal path because of the three conductive leads. This is useful in transmitting a large current such as in a ground line or a power line for testing a semiconductor device with high speed without deforming the waveforms of test signals. 
     FIG. 23 shows another example of the fourth embodiment of the present invention. In this example, a triple layered TAB lead  78   2  having upper, intermediate and lower leads A, B and C is provided to the contact pad  33  connected to the contact trace  32  and contact structure  30 . The upper lead A is provided in an upper and outer position of FIG. 23 than the intermediate lead B. The intermediate lead B is provided in an upper and outer position of FIG. 23 than the lower lead C. The upper lead A is connected to a PCB pad  38 , the intermediate lead B is connected to a PCB pad  39 , and the lower lead C is connected to a PCB pad  40 . To accommodate the PCB pads  38 ,  39  and  40  thereon, a PCB substrate  62   6  is arranged to have steps to mount the PCB pads  38 ,  39  and  40  with different vertical positions. A support member  54   5  is provided between the upper lead A and the intermediate lead B and a support member  54   6  is provided between the intermediate lead B and the lower lead C. 
     The electrical connection between the TAB lead  78   2  and the PCB pads  38 ,  39  and  40  will be established by a surface mount technology (SMT) such as using a screen printable solder paste as well as various other bonding technologies including thermosonic bonding, thermocompression bonding, and ultrasonic bonding technique. Because of the significantly small sizes of the components and signal path lengths involved in the contact structure  30 , contact trace  32 , and the TAB lead  78   2 , the example of FIG. 23 can operate at a very high frequency band, such as several GHz. Moreover, because of the small number and simple structure of components to be assembled, the interconnection and packaging of the present invention can be fabricated with low cost and high reliability as well as high productivity. 
     The structure of the TAB lead  78   2  having the triple layered leads A, B and C establish a fan out in the vertical dimension. This is useful in distributing a signal or power to two or more paths. Another advantage of the fan out is to increase the number of contact pads, i.e., to decrease the effective pitch (distance) between the contact pads. 
     FIG. 24 shows a further modification of the fourth embodiment of the present invention wherein the top type contact trace  32  is coupled to a connector provided on a printed circuit board or other structure. In the example of FIG. 24, a contact pad  33  connected to the contact trace  32  is connected to a connector  46   3  via a triple layer TAB lead  78  which has the same shape as that shown in FIG.  22 . The connector  46   3  is provided on a support structure  52   5 . 
     The connector  46   3  may be mechanically fixed to the support structure  52   5  through an attachment mechanism (not shown). The end of the TAB lead  78  is inserted in a receptacle (not shown) of the connector  46   3 . As is well known in the art, such a receptacle has a spring mechanism to provide a sufficient contact force when receiving the end of the TAB lead  78  therein. Between the upper lead A and the intermediate lead B of the triple layer TAB lead  78 , there is provided a support member  59   1  to support the leads A and B. Between the intermediate lead B and the lower lead C of the double layer TAB lead  78 , there is provided a support member  59   2  to support the leads B and C. 
     The structure of the TAB lead  78  having the tiered leads A, B and C establish a low resistance and a large current capacity in a signal path because of the three conductive leads. This is useful in transmitting a large current such as in a ground line or a power line for testing a semiconductor device with high speed without deforming the waveforms of test signals. 
     FIG. 25 shows a further modification of the third embodiment of the present invention wherein the top type contact trace  32  is coupled to a connector provided on a printed circuit board or other structure. In the example of FIG. 25, a contact pad  33  connected to the contact trace  32  is connected to a connector  46   4  via a triple layer TAB lead  78   4 . The triple layer TAB  78   4  has an upper lead A, an intermediate lead B and a lower lead C each of which is separated at the end. The connector  46   4  is provided on a support structure  52   6 . 
     The connector  46   4  may be mechanically fixed to the support structure  52   6  through an attachment mechanism (not shown). The ends of the leads A, B and C of the TAB lead  78   4  are inserted in receptacles (not shown) of the connector  46   4 . As is well known in the art, such a receptacle has a spring mechanism to provide a sufficient contact force when receiving the end of the TAB lead  78   4  therein. A support member  59   3  is provided between the upper lead A and the intermediate lead B and a support member  59   4  is provided between the intermediate lead B and the lower lead C of the triple TAB lead  78   4 . 
     The structure of the TAB lead  78   4  having the triple layered leads A, B and C establish a fan out in the vertical dimension. This is useful in distributing a signal or power to two or more paths. Another advantage of the fan out is to increase the number of contact pads, i.e., to decrease the effective pitch (distance) between the contact pads. 
     FIGS. 26 shows a further example of the fourth embodiment of the present invention wherein the top type contact trace is coupled to a pad provided on a printed circuit board through a conductive bump. In the example of FIG. 26, a contact structure  30 , a contact trace  32  and a contact tab  33  are formed on a contact substrate  20 . Typically, the contact substrate  20  is a silicon substrate although other types of dielectric substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. The contact pad  33  is connected to a PCB (print circuit board) pad  38  provided on a PCB substrate  62   2  through a conductive bump  56  via a triple layer TAB lead  78 . 
     The contact substrate  20  is mounted on the PCB substrate  62   2  through a support structure  52   6  and an elastomer  42 . The contact substrate  20 , the elastomer  42 , the support structure  52   6 , and the PCB substrate  62   2  are attached with one another by, for example, an adhesive (not shown). Between the upper lead A and the intermediate lead B of the triple layer TAB lead  78 , there is provided a support member  59   1  to support the leads A and B. Between the intermediate lead B and the lower lead C of the triple layer TAB lead  78 , there is provided a support member  59   2  to support the leads B and C. 
     The structure of the TAB lead  78  having the tiered leads A, B and C establish a low resistance and a large current capacity in a signal path because of the three conductive leads. This is useful in transmitting a large current such as in a ground line or a power line for testing a semiconductor device with high speed without deforming the waveforms of test signals. 
     By the application of the heat, the conductive bump  56  is reflowed onto the PCB pad  38  for attachment between the TAB lead  78  and the PCB pad  38 . An example of the conductive bump  56  is a solder bump used in a standard solder ball technology. Another example of the conductive bump  56  is a fluxless solder ball used in a plasma-assisted dry soldering technology. 
     FIG. 27 shows another example of the fourth embodiment of the present invention. In this example, a triple layered TAB lead  78   2  having upper, intermediate and lower leads A, B and C is provided to the contact pad  33  connected to the contact structure  30 . The upper lead A is provided in an upper and outer position of FIG. 27 than the intermediate lead B. The intermediate lead B is provided in an upper and outer position than the lower lead C in FIG.  27 . The upper lead A is connected to a PCB pad  38  through a conductive bump  56 , the intermediate lead B is connected to a PCB pad  39  through a conductive bump  57 , and the lower lead C is connected to a PCB pad  40  through a conductive bump  58 . To accommodate the PCB pads  38 ,  39  and  40  thereon, a PCB substrate  62   6  is arranged to have steps to mount the PCB pads  38 ,  39  and  40  with different vertical positions. A support member  54   5  is provided between the upper lead A and the intermediate lead B and a support member  54   6  is provided between the intermediate lead B and the lower lead C. 
     By the application of the heat, the conductive bumps  56 ,  57  and  58  are reflowed onto the PCB pads  38 ,  39  and  40  for attachment between the TAB lead  78   2  and the PCB pads  38 ,  39  and  40 . An example of the conductive bumps  56 ,  57  and  58  is a solder bump used in a standard solder ball technology. Another example of the conductive bumps  56 ,  57  and  58  is a fluxless solder ball used in a plasma-assisted dry soldering technology. 
     The structure of the TAB lead  78   2  having the triple layered leads A, B and C establish a fan out in the vertical dimension. This is useful in distributing a signal or power to two or more paths. Another advantage of the fan out is to increase the number of contact pads, i.e., to decrease the effective pitch (distance) between the contact pads. 
     FIGS. 28 shows a further example of the fourth embodiment of the present invention wherein the top type contact trace is coupled to a pad provided on a printed circuit board through a conductive polymer. In the example of FIG. 28, a contact structure  30 , a contact trace  32  and a contact tab  33  are formed on a contact substrate  20 . Typically, the contact substrate  20  is a silicon substrate although other types of dielectric substrate, such as glass epoxy, polyimide, ceramic, and alumina substrates are also feasible. The contact pad  33  is connected to a PCB (print circuit board) pad  38  provided on a PCB substrate  62   2  through a conductive polymer  66  via a triple layer TAB lead  78 . 
     The contact substrate  20  is mounted on the PCB substrate  62   2  through a support structure  52   6  and an elastomer  42 . The contact substrate  20 , the elastomer  42 , the support structure  52   6 , and the PCB substrate  62   2  are attached with one another by, for example, an adhesive (not shown). Between the upper lead A and the intermediate lead B of the triple layer TAB lead  78 , there is provided a support member  59   1  to support the leads A and B. Between the intermediate lead B and the lower lead C of the triple layer TAB lead  78 , there is provided a support member  59   2  to support the leads B and C. 
     Most conductive polymers are designed to be conductive between the mating electrodes normally in vertical of angled directions and not conductive in the horizontal direction. An example of the conductive polymer  66  is a conductive elastomer which is filled with conductive wire that extends beyond the surface of the elastomer. 
     Various other examples of the conductive polymer  66  are possible such as an anisotropic conductive adhesive, anisotropic conductive film, anisotropic conductive paste, and anisotropic conductive particles. The anisotropic conductive adhesive is filled with conductive particles that do not touch each other. The conductive path is formed by pressing the adhesive between the two electrodes at a specific location. The anisotropic conductive film is a thin dielectric resin filled with conductive particles that do not touch each other. The conductive path is formed by pressing the film between the two electrodes at a specific location. 
     The anisotropic conductive paste is a screen printable paste which is filled with conductive particles that do not touch each other. The conductive path is formed by pressing the paste between the two electrodes at a specific location. The anisotropic conductive particle is a thin dielectric resin filled with conductive particles coated with a very thin layer of dielectric material to improve isolation. The conductive path is formed by pressing the particle with enough force to explode the dielectric coating on the particles, between the two electrodes at a specific location. 
     The structure of the TAB lead  78  having the tiered leads A, B and C establish a low resistance and a large current capacity in a signal path because of the three conductive leads. This is useful in transmitting a large current such as in a ground line or a power line for testing a semiconductor device with high speed without deforming the waveforms of test signals. 
     FIG. 29 shows another example of the fourth embodiment of the present invention. In this example, a triple layered TAB lead  78   2  having upper, intermediate and lower leads A, B and C is provided to the contact pad  33  connected to the contact trace  32  and contact structure  30 . The upper lead A is provided in an upper and outer position than the intermediate lead B in FIG.  29 . The intermediate lead B is provided in an upper and outer position of FIG. 29 than the lower lead C. The upper lead A is connected to a PCB pad  38  through a conductive polymer  66 , the intermediate lead B is connected to a PCB pad  39  through a conductive polymer  67 , and the lower lead C is connected to a PCB pad  40  through a conductive polymer  68 . To accommodate the PCB pads  38 ,  39  and  40  thereon, a PCB substrate  62   6  is arranged to have steps to mount the PCB pads  38 ,  39  and  40  with different vertical positions. A support member  545  is provided between the upper lead A and the intermediate lead B and a support member  546  is provided between the intermediate lead B and the lower lead C. 
     The structure of the TAB lead  78   2  having the triple layered leads A, B and C establish a fan out in the vertical dimension. This is useful in distributing a signal or power to two or more paths. Another advantage of the fan out is to increase the number of contact pads, i.e., to decrease the effective pitch (distance) between the contact pads. 
     According to the present invention, the packaging and interconnection has a very high frequency bandwidth to meet the test requirements in the next generation semiconductor technology. The packaging and interconnection is able to mount the contact structure on a probe card or equivalent thereof by electrically connecting therewith through the upper surface of the contact structure. Moreover, because of a relatively small number of overall components to be assembled, the interconnection and packaging of the present invention can be fabricated with low cost and high reliability as well as high productivity. 
     Although only a preferred embodiment is specifically illustrated and described herein, it will be appreciated that many modifications and variations of the present invention are possible in light of the above teachings and within the purview of the appended claims without departing the spirit and intended scope of the invention.