Abstract:
An LED circuit is disclosed. The circuit senses the average current flowing through the LED. The sensed signal is compensated and modulated. The modulated signal is then used to control the ON/OFF state of a switch that supplies power to the LED.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims priority to and the benefit of Chinese Patent Application No. 200910058905.3, filed Apr. 10, 2009, which is incorporated herein by reference in its entirety. 
       TECHNICAL FIELD 
       [0002]    The technology described in this patent document relates generally to integrated circuits, and more particularly, to LED circuits. 
       BACKGROUND 
       [0003]    LED is rapidly replacing incandescent bulbs, fluorescent lamps, and other types of light sources due to its high efficiency, small size, high reliability, and long lifetime.  FIG. 1  is a typical application of an LED used in a buck converter. As shown in  FIG. 1 , when a switch S 1  is turned on, a switch S 2  is turned off, an input V IN , an inductor L, the LED, and the switch S 1  form a current loop. The current flowing through the inductor L and the LED increases. When the switch S 1  is turned off, the switch S 2  is turned on, the inductor L, the LED, and the switch S 2  form a current loop. The current flowing through the inductor L and the LED decreases. The switch S 2  is usually replaced by a freewheeling diode in use. The switch S 1  is put in the low side as shown, so that no floating drive circuit is needed. 
         [0004]    The brightness of the LED is determined by the average current that flows. As a result, accurately controlling the average current of the LED is important. There are two current control methods which are adopted by conventional buck type LED circuits. Method  1  senses the current flowing through the low-side switch. This current sensing could be realized by the switch&#39;s own conductive resistance. Then the current is regulated by peak current mode control. This current control method is simple, with no external circuit or pin needed. In the peak current mode control, the peak value of the current is accurately controlled. However, because of the influence caused by the ripple, the error of the average current is large, which causes low precision. 
         [0005]    Method  2  adopts a current sense resistor coupled in series with the LED. The current flowing through the LED is detected by the current sense resistor. Then the current is regulated by the average current mode control. This current control method has high precision. However, the series coupled current sense resistor introduces additional power loss. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0006]      FIG. 1  illustrates a typical application of LED used in a buck type converter. 
           [0007]      FIG. 2  illustrates a circuit  100  which accurately control the average current of the LED in accordance with an embodiment of the present invention. 
           [0008]      FIG. 3  illustrates waveforms of the drive signal of a main switch, the current flowing through the main switch, and the current flowing through the LED of circuit  100  of  FIG. 2 . 
           [0009]      FIG. 4  illustrates the principle of a mid-current sense method. 
           [0010]      FIG. 5  illustrates a circuit  200  which realizes the mid-current sense method of  FIG. 4  in accordance with an embodiment of the present invention. 
           [0011]      FIG. 6  illustrates a pulse signal generating circuit  50 . 
           [0012]      FIG. 7  illustrates waveforms of signals {circle around ( 1 )}, {circle around ( 2 )}, {circle around ( 3 )}, and G Q1  generated by the pulse generating circuit  50  of  FIG. 6 . 
           [0013]      FIG. 8  illustrates waveforms of the current I LEA  flowing through the LED, the current I S0  flowing through the main switch current, the control signal of the first switch G Q1 , and the sense signal I sense  of circuit  100  of  FIG. 5 . 
           [0014]      FIG. 9  illustrates a sense unit  10  which realizes the full-wave sense. 
           [0015]      FIG. 10  illustrates waveforms of the drive signal V Dr , the current I S0  flowing through the main switch current, and the sense signal I sense  of the sense circuit  10  of  FIG. 9 . 
           [0016]      FIG. 11  illustrates a modulate unit  30  in accordance with an embodiment of the present invention. 
           [0017]      FIG. 12  illustrates a modulate unit  30  in accordance with another embodiment of the present invention. 
           [0018]      FIG. 13  illustrates waveforms of signals A, B, C, D, E, F, G, and the compensated signal V M  of  FIG. 12 . 
           [0019]      FIG. 14  illustrates a method  300  controlling the average current of the LED in accordance with yet another embodiment of the present invention. 
           [0020]      FIG. 15  illustrates a flowchart  400  of the mid-current sense in accordance with yet another embodiment of the present invention. 
           [0021]      FIG. 16  illustrates a method  500  controlling the average current of the LED in accordance with yet another embodiment of the present invention. 
           [0022]      FIG. 17  illustrates a flowchart  600  of the full-wave sense in accordance with yet another embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0023]    Referring to  FIG. 2 , a circuit  100  which accurately controls the average current of the LED in accordance with an embodiment of the present invention is shown. As shown in  FIG. 2 , circuit  100  comprises a typical buck converter comprised by an input port V IN , a main switch S 0 , a freewheeling diode D, an inductor L and a LED. That is, the LED is coupled in series with the inductor L, the series coupled LED and the inductor L are coupled in parallel with the freewheeling diode D which is coupled between the input port V IN  and ground via the main switch S 0 . Circuit  100  further comprises a sense unit  10 , a compensation unit  20 , a modulate unit  30  and a drive circuit  40 . The input terminal of the sense unit  10  is coupled to the high terminal of the main switch S 0 , the output terminal of the sense unit  10  is coupled to one input terminal of the compensation unit  20 . The other input terminal of the compensation unit  20  receives a reference signal I ref . The output terminal of the compensation unit  20  is coupled to the modulate unit  30 . The modulate unit  30  provides a modulated signal V M  which is delivered to the control terminal of the main switch S 0  via the drive circuit  40 , so as to control the ON/OFF of the main switch S 0 . 
         [0024]    In one embodiment, the compensation unit  20  includes an operational amplifier U 0  and a RC filter. The RC filter comprises a resistor R, a capacitor C 1 , and a capacitor C 2 . The inverting input terminal of the operational amplifier U 0  acts as one input terminal of the compensation unit  20 , which receives the sense signal I sense  provided by the sense unit  10 . The non-inverting input terminal of the operation amplifier U 0  acts as the other input terminal of the compensation unit  20  which receives the reference I ref . The resistor R and the capacitor C 1  are coupled in series between the output terminal of the operation amplifier U 0  and ground. The capacitor C 2  is coupled between the output terminal of the operation amplifier U 0  and ground. When the circuit  100  is in operation, the operation amplifier U 0  amplifies the difference between the sense signal I sense  and the reference signal I ref , and integrates the amplified signal into the capacitor C 2 . In other words, a compensated signal V C (t) provided by the operation amplifier U 0  represents the amplified signal. If the sense signal I sense  is higher than the reference signal I ref , the compensated signal V C (t) decreases; if the sense signal I sense  is lower than the reference signal I ref , the compensated signal V C (t) increases; if the sense signal I sense  is equal to the reference signal I ref , the compensated signal V C (t) is held. As a result, the compensation unit  20  regulates the signal at the inverting input terminal of the operation amplifier U 0  to follow the reference signal. 
         [0025]    When the main switch S 0  is turned on, the current flowing through the main switch S 0  is the current flowing through the LED. The sense unit  10  receives the voltage V S0  across the main switch S 0 , and provides the sense signal I sense  to the non-inverting input terminal of the operation amplifier U 0 . The voltage V S0  is the product of the current I S0  flowing through the main switch S 0  and its conduct resistance. The difference of the sense signal I sense  and the reference signal I ref  is amplified by the operation amplifier U 0 ; the amplified signal is filtered by the RC filter to get the compensated signal V C (t). Then the compensated signal V C (t) is modulated in the modulate unit  30 . The modulated signal V M  is used to drive the main switch S 0  via the drive circuit  40 . The operation of the sense unit  10  and the modulate unit  30  will be illustrated hereinafter. 
         [0026]    When the main switch S 0  is turned on, the current flowing through the main switch S 0  is the current flowing through the LED. So the average current I S0(avg)  of the main switch S 0  is equal to the average current I LED(avg)  of the LED during the ON period of the main switch S 0 , as shown in  FIG. 3 . As a result, the average current of the LED could be regulated by regulating the average current of the main switch S 0  during its ON period. 
         [0027]    Two current sense methods are disclosed as follows. 
         [0028]    Method  1  is defined as mid-current sense, whose principle is shown in  FIG. 4 . The current I S0  flowing through the main switch S 0  is the current I LED  flowing through the LED during the ON period of the main switch S 0 . For illustration purpose, the current at the mid time point of the main switch S 0 &#39;s ON time is referred to as mid-current I S0(mid) . As shown in  FIG. 4 , the mid-current I S0(mid)  is equal to the average current I S0(avg)  of the main switch during its ON period. Thus I S0(mid) =I S0(avg) =I LED(avg) . Accordingly, if the mid-current I S0(mid)  is sensed and held, the average current of the LED is sensed, which is further regulated by the compensation unit  20  and the modulate unit  30 . 
         [0029]    Referring to  FIG. 5 , a circuit  200  which realizes the mid-current sense method of  FIG. 4  is illustrated. In one embodiment, the sense unit  10  comprises a first switch Q 1  and a hold circuit U 1  coupled in series. The sense unit  10  delivers the sense signal I sense  to the compensation unit  20 , so as to insure that the sense signal I sense  follows the reference signal I ref . The control signal G Q1  of the first switch Q 1  is generated by a pulse signal generating circuit  50  shown in  FIG. 6 . The pulse signal generating circuit  50  comprises a first delay circuit T delay1  and a second delay circuit T delay2 , both of which receive the drive signal V Dr  provided by the drive circuit  40 . The first delay circuit T delay1  provides a first delay signal {circle around ( 1 )} to the first inverter U 2  to get a delay-invert signal {circle around ( 2 )}. The delay-invert signal {circle around ( 2 )} is delivered to one input terminal of the AND gate U 3 . The second delay circuit T delay2  provides a second delay signal {circle around ( 3 )} to the other input terminal of the AND gate U 3 . The output signal of the AND gate U 3  is the desired control signal G Q1  of the first switch Q 1  in the sense unit  10  of  FIG. 5 . The delay time of the first delay circuit T delayl  is 
         [0000]    
       
         
           
             
               
                 T 
                 ON 
               
               2 
             
             , 
           
         
       
     
         [0000]    and the second delay circuit T delay2  is 
         [0000]    
       
         
           
             
               
                 
                   T 
                   ON 
                 
                 2 
               
               - 
               
                 T 
                 1 
               
             
             , 
           
         
       
     
         [0000]    wherein T ON  is the ON time period of the main switch S 0  in one cycle, i.e., the duration of the high level of the drive signal V Dr . 
         [0030]      FIG. 7  illustrates waveforms of signals {circle around ( 1 )}, {circle around ( 2 )}, {circle around ( 3 )}, and G Q1  generated by the pulse generating circuit  50  of  FIG. 6 . As shown in  FIG. 7 , the control signal G Q1  is a pulse signal. In order to insure the error caused by the mid-current I S0(mid)  to be lower than a certain K, the pulse width of the T ON(mid)  should be lower than K 1/2 ×T ON , wherein K is a desired precision. In one embodiment, T 1  in the delay time of the second delay circuit T delay2  is a time constant, which is set for the system precision. 
         [0031]    Referring to  FIG. 8 , the waveforms of circuit  100  of  FIG. 5  is shown. As shown in  FIG. 8 , the sense signal I sense  varies with the current flowing through the LED, wherein the cycle of the sense signal I sense  starts from the mid time point of the main switch S 0 &#39;s ON time, ends at the mid time point of the main switch S 0 &#39;s next ON time. As illustrated hereinbefore, the average current of the LED is accurately sensed by the mid-current sense method. 
         [0032]    Method  2  is defined as full-wave sense. The corresponding circuit of the sense unit  10  is shown in  FIG. 9 . As shown in  FIG. 9 , the sense unit  10  comprises a second switch Q 2  which receives a voltage signal V S0  across the main switch S 0 ; a third switch Q 3  which receives the reference signal I ref . Because the voltage signal V S0  is the product of the current I S0  flowing through the main switch S 0  and its conduct resistance, the voltage signal V S0  represents the current I S0 . The second switch Q 2  is controlled by the drive signal V Dr  which also controls the ON/OFF of the main switch S 0 , i.e., the second switch Q 2  is synchronized with the main switch S 0 ; the third switch Q 3  is controlled by the inverted signal of the drive signal V Dr . That is, a first terminal of the second switch Q 2  is coupled to the high terminal of the main switch S 0 , the control terminal of the second switch Q 2  is coupled to the control terminal of the main switch S 0 ; a first terminal of the third switch Q 3  receives the reference signal I ref , the control terminal of the third switch Q 3  is coupled to the control terminal of the main switch S 0  via a second inverter U 4 . 
         [0033]    A second terminal of the second switch Q 2  is coupled to a first terminal of a first adder U 5 , a second terminal of the third switch Q 3  is coupled to a second input terminal of the first adder U 5 . The output signal of the first adder U 5  is the desired sense signal I sense . The operation of the sense unit  10  is illustrated in detail as follows. 
         [0034]    When the main switch S 0  is turned on, the second switch Q 2  is turned on as well, the third switch Q 3  is turned off. The second switch Q 2  delivers the current signal I S0  to the first adder U 5 , the third switch Q 3  disconnects the reference signal I ref  to the first adder U 5 . Accordingly, the sense signal I sense  is the current signal I S0 . When the main switch S 0  is turned off, the second switch Q 2  is turned off, the third switch Q 3  is turned on. As a result, the second switch Q 2  disconnects the current signal I S0  to the first adder U 5 , the third switch Q 3  delivers the reference signal I ref  to the first adder U 5 . Accordingly, the sense signal I sense  is the reference signal I ref . Waveforms of the drive signal V Dr , the current I S0  flowing through the main switch S 0 , and the sense signal I sense  are shown in  FIG. 10 . For the existence of the compensation circuit  20 , the sense signal I sense  follows the reference signal I ref . In addition, the sense signal I sense  is equal to the reference signal I ref  during the main switch S 0 &#39;s OFF time. This full-wave sense method insures the average current of the main switch S 0  to be equal to the reference signal during the ON period of the main switch S 0 , i.e., insures the average current of the LED to be equal to the reference signal. 
         [0035]    The average current I S0(avg)  could be accurately modulated via the modulator  30  based on the sense signal provided by the mid-current sense method and the full-wave sense method. Referring to  FIG. 11 , a modulate unit  30  in accordance with an embodiment of the present invention is illustrated. As shown in  FIG. 11 , the modulate unit  30  is a well-known PWM modulator. The modulate unit  30  comprises a comparator U 6 , a clock signal generator U 7 , a RS flip-flop U 8 . The inverting input terminal of the comparator U 6  receives the compensated signal V C (t), the non-inverting input terminal of the comparator U 6  receives a saw-tooth signal provided by the clock signal generator U 7 , the output terminal of the comparator U 6  is coupled to a reset terminal R of the RS flip-flop U 8 . The clock signal provided by the clock signal generator U 7  is delivered to a set terminal S of the RS flip-flop U 8 . The output signal Q of the RS flip-flop U 8  is the desired modulated signal V M . The modulated signal V M  is used to drive the main switch S 0  via the drive circuit  40 . 
         [0036]    On one hand, when the rising edge of the clock signal arrives, the RS flip-flop U 8  is reset, so the modulated signal V M  goes high, and the main switch S 0  is turned on via the drive circuit  40 . The current I S0  flowing through the main switch S 0  increases, i.e., the current I LED  flowing through the LED increases. As a result, the sense signal I sense  increases, which causes the compensated signal V C (t) to decrease. On the other hand, the saw-tooth signal slowly increases. When it increases to be higher than the compensated signal V C (t), the output of the comparator U 6  turns to high, which resets the RS flip-flop U 8 . Then the main switch S 0  is turned off via the drive circuit  40 . 
         [0037]    If the average current I LED(avg)  of the LED is higher than the reference signal I ref , the compensated signal V C (t) is relatively low. Accordingly, the saw-tooth signal touches the compensated signal V C (t) earlier, which resets the RS flip-flop U 8  earlier, causing the ON time of the main switch to be shorter. As a result, the average current I LED(avg)  of the LED decreases. If the average current I LED(avg)  of the LED is lower than the reference signal I ref , the compensated signal V C (t) is relatively high. Accordingly, the saw-tooth signal touches the compensated signal V C (t) later, which resets the RS flip-flop U 8  later, causing the ON time of the main switch to be longer. As a result, the average current I LED(avg)  of the LED increases. 
         [0038]    Through such regulation of the modulate unit  30 , the average current I LED(avg)  of the LED is accurately controlled. 
         [0039]    Referring to  FIG. 12 , a modulate unit  30  in accordance with another embodiment of the present invention is illustrated. In one embodiment, the modulate unit  30  is a constant on-time modulation circuit. The constant on-time modulation keeps ON time of a switch to be constant in each cycle, but varies the switch frequency. 
         [0040]    As shown in  FIG. 12 , the modulate unit  30  comprises a multiplier Ug whose coefficient is −1, i.e., the output of the multiplier U 9  is −V C (t), which is delivered to a first input terminal of a second adder U 10 . A second input terminal of the second adder U 10  receives a DC offset V DC . The DC offset V DC  is set to insure that the output signal (V DC -V C (t)) of the adder U 10  is above zero all the time. The signal (V DC -V C (t)) is sent to the inverting input terminal of the comparator U 11 , while the non-inverting input terminal of the comparator U 11  receives a saw-tooth signal V S (t). The saw-tooth signal V S (t) is generated by a saw-tooth signal generator which comprises a current source I 1 , a capacitor C 3 , and a fourth switch Q 4 . The output signal A of the comparator U 11  is sent to a first input terminal of an OR gate U 12 . A second input terminal of the OR gate U 12  is coupled to ground via a fifth switch Q 5 . The second input terminal of the OR gate U 12  is also coupled to its output terminal which is further coupled to an input terminal of a third delay circuit T delay3  and a first input terminal of an AND gate U 14 . The third delay circuit T delay3  provides an output signal C which is delivered to an inverter U 13 , to get an inverted signal D which is sent to a second input terminal of the AND gate U 14 . The output signal V M  of the AND gate U 14  is the desired modulated signal, which is sent to the drive circuit  40 . The modulated signal V M  is further sent to a fourth inverter U 15  to get a signal E, and is sent to a fourth delay circuit T delay4  to get a signal F. The signal E and the signal F are sent to an AND gate U 16  to get a AND signal G which is used to control the ON/OFF of the fourth switch Q 4  and the fifth switch Q 5 . 
         [0041]    When the saw-tooth signal V S (t) touches the level of the signal (V DC -V C (t)), the output signal A of the comparator U 11  goes high. The signal B goes high as well. Accordingly, the modulated signal V M  is determined by the signal D at the second input terminal of the AND gate U 14 . Because the effect of the third delay circuit T delay3 , the signal C goes high later than the signal B a time period of T d3 . The signal D is an inverted signal of the signal C. Thus from the time point the signal B goes high, to the time point the delay time period T d3  ends, the modulated signal V M  is high. That is, the modulated signal V M  retains high for a time period of T d3 . The constant on-time T ON  is determined by the delay time T d3  of the third delay circuit T delay3 . 
         [0042]    The delay time T d4  of the fourth delay circuit T delay4  is relatively short, which could be regarded as a short pulse time period. When the modulated signal V M  turns to low after the time period T d3 , the signal E turns to high. However, the signal F turns to high later than the signal E a time period of T d4 . As a result, the signal G is a short pulse. The fourth switch Q 4  and the fifth switch Q 5  are turned on during this short pulse time period. And the saw-tooth signal V S (t) is reset to zero, the output signal A of the comparator U 11  turns to low. In the meantime, signal B is pulled to ground. After the short pulse time period T d4 , the saw-tooth signal V S (t) increases from zero, and the signal B keeps low until the saw-tooth signal V S (t) touches the level of the signal (V DC -V C (t)) again. Then the signal A turns to high, a new cycle begins. 
         [0043]    If the average current I LED(avg)  is higher than the reference signal I ref , the compensated signal V C (t) decreases, which causes (V DC -V C (t)) to increase. Accordingly, the saw-tooth signal V S (t) touches the signal (V DC -V C (t)) later, and the low-level time of the signal A becomes longer, so as the signal B and the compensated signal V M . On the other hand, if the average current I LED(avg)  is lower than the reference signal I ref , the compensated signal V C (t) increases, which causes (V DC -V C (t)) to decrease. Accordingly, the saw-tooth signal V S (t) touches the signal (V DC -V C (t)) earlier, and the low-level time of the signal A becomes shorter, so as the signal B and the compensated signal V M . 
         [0044]    From the above illustration, the modulated signal V M  is the desired modulation signal whose high-level time period is constant while low-level time period is varied according to the average current I LED(avg)  of the LED. So the average current I LED(avg)  could be accurately controlled by such regulation. 
         [0045]      FIG. 13  illustrates waveforms of signals A, B, C, D, E, F, G, and the compensated signal V M  of  FIG. 12 . 
         [0046]    Referring to  FIG. 14 , a method  300  controlling the average current of the LED in accordance with yet another embodiment of the present invention is illustrated. The method  300  comprises the following steps: step  301 , sensing the current I LED  flowing through a main switch S 0  by mid-current sense to get a sense signal I sense ; step  302 , compensating the sense signal I sense  to get a compensated signal V C (t); step  303 , modulating the compensated signal V C (t) by constant on-time regulation to get a modulated signal V M ; step  304 , sending the modulated signal V M  to a drive circuit to get a drive signal V Dr  which is used to control the ON/OFF of the main switch S 0 . 
         [0047]    Referring to  FIG. 15 , a flowchart  400  of the mid-current sense is illustrated in accordance with yet another embodiment of the present invention. It comprises: step  401 , providing a mid-pulse signal G Q1  at the right mid time point of the main switch S 0 &#39;s ON time of each cycle; step  402 , sensing the current I S0  flowing through the main switch S 0  using the mid-pulse signal G Q1  to get a mid-current I S0(mid) ; step  403 , holding the mid-current I S0(mid)  to get the sense signal I sense . 
         [0048]    Referring to  FIG. 16 , a method  500  controlling the average current of the LED accordance with yet another embodiment of the present invention is illustrated. The method  500  comprises: step  501 , sensing the current flowing through a main switch S 0  by full-wave sense to get a sense signal I sense ; step  502 , compensating the sense signal I sense  to get a compensated signal V C (t); step  503 , modulating the compensated signal V C (t) to get a modulated signal V M ; step  504 , sending the modulated signal V M  to a drive circuit to get a drive signal which is used to control the ON/OFF of the main switch S 0 . 
         [0049]    Referring to  FIG. 17 , a flowchart  600  of the full-wave sense is illustrated in accordance with yet another embodiment of the present invention. It comprises: step  601 , receiving the current flowing through the main switch S 0  at a first adder U 5  when the main switch S 0  is turned on; step  602 , receiving a reference signal I ref  at the first adder U 5  when the main switch S 0  is turned off. The output signal provided by the first adder U 5  is the desired sense signal I sense . 
         [0050]    This written description uses examples to disclose the invention, including the best mode, and also to enable a person skilled in the art to make and use the invention. The patentable scope of the invention may include other examples that occur to those skilled in the art.