Abstract:
This disclosure relates generally to the field of wireless communication infrastructure, and more particularly to a method, apparatus and system for envelope tracking. The system for envelope tracking comprising: a transistor; an RF transistor; a driver; a switcher current source; and a subtracting network; wherein the system is configured such that when an envelope voltage is less than a predetermined voltage value, the RF transistor is configured for decreasing an amount of absorbed biasing current, and when the envelope voltage is greater than a predetermined voltage value, the RF transistor is configured for increasing an amount of absorbed biasing current. The goal of RF transistor sinking is to absorb the redundant biasing current generated by the envelope tracking supply modulator to eliminate distortions.

Description:
FIELD OF TECHNOLOGY 
       [0001]    This disclosure relates generally to the field of wireless communication infrastructure, and more particularly to a method, apparatus and system for envelope tracking. 
       BACKGROUND 
       [0002]    In the wireless communication infrastructure industry, one technique that is utilized to enhance radio power amplifier (PA) efficiency is envelope tracking (ET). Envelope Tracking is a known approach to RF power amplifier design in which the power supply voltage applied to the PA is constantly adjusted to ensure that the PA is operating at peak efficiency over output power range. 
         [0003]    Generally speaking, envelope tracking is high-efficiency architecture for power amplifiers. However, it is typically not used in commercial base transceiver station (BTS) power amplifiers because the necessary envelope modulator is difficult to implement. 
       SUMMARY 
       [0004]    In one embodiment of the present disclosure, an apparatus for envelope tracking is provided and includes a power transistor, an RF transistor, a driver, a switcher current source, and a subtracting network. 
         [0005]    In another embodiment of the present disclosure, a system for envelope tracking is provided and includes a transistor, an RF transistor, a driver, a switcher current source, and a subtracting network, wherein the system is configured such that when an envelope voltage is less than a predetermined voltage value, the RF transistor is configured to aid envelope tracking power supply for decreasing an amount of absorbed biasing current, and when the envelope voltage is greater than a predetermined voltage value, the RF transistor is configured to aid envelope tracking power supply for increasing an amount of absorbed biasing current. The goal of RF transistor sinking is to absorb the redundant biasing current generated by the envelope tracking supply modulator to eliminate distortions. 
         [0006]    In another embodiment of the present disclosure, a method for envelope tracking is provided and includes the steps of providing an envelope modulator apparatus, the apparatus including a transistor, an RF transistor, a driver, a switcher current source and a subtracting network; modulating, at the subtracting network, a gate of the RF transistor based on an envelope voltage; and sinking, at the RF transistor, redundant biasing current generated by the envelope modulator apparatus. 
     
    
     
       DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS 
         [0007]    To aid in the proper understanding of the present disclosure, reference should be made to the accompanying drawings, wherein: 
           [0008]      FIG. 1  is a circuit diagram showing an example prior art envelope modulator architecture; 
           [0009]      FIG. 2  is a circuit diagram of envelope modulator architecture in accordance with an embodiment of the present disclosure; 
           [0010]      FIG. 3  is a circuit implementation diagram of envelope modulator architecture in accordance with an embodiment of the present disclosure; 
           [0011]      FIG. 4  is a flow chart showing a method for envelope tracking in accordance with an embodiment of the present disclosure; and 
           [0012]      FIG. 5  is a graphical representation of an envelope tracking system utilizing the present disclosure. 
       
    
    
     DETAILED DESCRIPTION 
       [0013]    Referring first to  FIG. 1 , a conventional envelope tracking system  100  is illustrated. The system  100  includes a driver  102 , a first power transistor (T 1 )  104 , a second power transistor (T 2 )  106 , a switcher current source  108 , and a RF transistor  110 . In the system  100 , the driver  102 , first power transistor  104  and second power transistor  106  form a linear envelope amplifier, which provides the proper envelope voltage to the RF transistor  110  as power supply. The current to the system is primarily provided by the switcher current source  108 , which can be a BUCK DC-DC converter or lsw, although similar converters may be utilized, as recognized by those having ordinary skill of the art. However, the BUCK switcher does detail an exemplary application of the present invention. The reader should not construe any context specific examples given herein as limiting the present invention. The first power transistor  104  and the second power transistor  106  are configured for correcting the current to the system when needed by sourcing current and sinking current, respectively; more specifically, the first power transistor  104  can add or source current when needed, and the second power transistor can absorb or sink current when needed. 
         [0014]    In the system  100 , envelope voltage is received at the driver  102  and then sent on to a first transistor gate  112  and a second transistor gate  114 , respectively. The switcher current source  108  provides current to the system, as mentioned briefly above. When current through the RF transistor  110  is low (based on an earlier predetermination made in another part of the system and not discussed in detail herein), the envelope voltage at a T 1 -T 2 -I sw  junction  116  is also low. To address this low voltage/low current situation, the driver  102  acts to change the voltage at the first transistor gate  112  and the second transistor gate  114 , which in turn forces T 1   104  to provide more current to the RF transistor  110  and T 2   106  to sink or absorb less current. The net result is an increase to the current traveling through the RF transistor  110 , which renders a higher and more efficient envelope voltage received at the RF transistor. 
         [0015]    As clearly seen in the prior art system  100  of  FIG. 1 , three total transistors are utilized: T 1   104 , T 2   106  and the RF transistor  110 . While this system does in the end provide the proper envelope voltage to the RF transistor as power supply, the high number of system components can lead to reduced efficiency, a decreased bandwidth and a larger circuitry profile. 
         [0016]    Referring next to  FIG. 2 , an envelope tracking apparatus, system and method for envelope tracking in accordance with the present disclosure is provided. Turning first to  FIG. 2 , an envelope tracking apparatus  200  is provided and includes a transistor (T 1 )  202 , a RF transistor  204 , a driver  206 , a switcher current source  208 , and a subtracting network  210 . The current to the apparatus  200  is primarily provided by the switcher current source  208 , which can be a BUCK DC-DC converter switcher current source or lsw, although similar converters may be utilized, as recognized by those having ordinary skill of the art. However, the BUCK switcher does detail an exemplary application of the present invention. The reader should not construe any context specific examples given herein as limiting the present invention. The transistor  202  and the RF transistor  204  are configured for correcting the current to the apparatus  200  when needed; more specifically, the transistor  202  can add current when needed, and the RF transistor  204  can sink or absorb biasing current when needed. Both biasing current and current from a DC-to-RF energy conversion flow through the RF transistor  204 . In accordance with the present disclosure, the biasing or quiescent current of the RF transistor  204  is being acted upon (i.e., “sunk” or “absorbed”), which in turn effects the total current flowing through the RF transistor. 
         [0017]    The driver  206  is configured for receiving envelope voltage and comparing the envelope voltage to a predetermined voltage value that is predetermined elsewhere in the system and therefore not described in detail herein. As will be described in further detail below, based on whether the envelope voltage is greater than or less than the predetermined voltage value, the driver  206  can act to adjust voltage in the apparatus  200  to ensure that an appropriate envelope voltage is provided to the RF transistor  204 . 
         [0018]    The subtracting network  210  in the present disclosure can be a combination of a passive transformer  300  (further described with respect to  FIG. 3 ) and an active operational amplifier  400  (also further described with respect to  FIG. 3 ), although it is appreciated that other similar apparatuses may be possible. As seen in  FIG. 2 , the subtracting network  210  has three inputs, identified as “1”, “2” and “4”, and one output, identified as “3”. Although three inputs and one output are disclosed herein, it is recognized that fewer or more inputs/outputs may be utilized, and the present disclosure is not limited to the three inputs and one output disclosed in this application. 
         [0019]    As seen in  FIG. 2 , the apparatus  200  further includes a transistor gate  212  and an RF transistor gate  214 . When the envelope voltage at a T 1 -I sw  junction  216  is above the predetermined value, the driver  206  is configured to decrease the current through the transistor  202  (by acting on the transistor gate  212 ) and to increase the biasing current of the RF transistor  204  (by acting on the RF transistor gate  214 ). When the envelope voltage is below the predetermined value, the driver  206  is configured to increase the current through the transistor  202  (by acting on the transistor gate  212 ) and to decrease the biasing current of the RF transistor  204  (by acting on the RF transistor gate  214 ). Although the present apparatus  200  is described in the context of a base station application, it is appreciated that the apparatus  200 , system and method (both described in further detail below) can be utilized in handsets and other portable wireless devices. 
         [0020]    In other words, the apparatus  200  is configured such that when the envelope voltage exceeds the predetermined voltage value, the transistor  202  is configured for providing a decreased amount of current and the RF transistor  204  is configured for increasing the biasing current (i.e., sinking more of the biasing current). In contrast, when the envelope voltage is less than the predetermined voltage value, the transistor  202  is configured for providing an increased amount of current and the RF transistor  204  is configured for decreasing an amount of the biasing current (i.e., sinking less biasing current). 
         [0021]    In accordance with the above, therefore, a system for envelope tracking is provided and includes the transistor  202 , the RF transistor  204 , the driver  206 , the switcher current source  208 , and the subtracting network  210 . As described above, the system is configured such that when the envelope voltage is less than the predetermined voltage value, the RF transistor  204  is configured for decreasing an amount of absorbed biasing current, and when the envelope voltage is greater than the predetermined voltage value, the RF transistor  204  is configured for increasing an amount of absorbed biasing current. 
         [0022]    More specifically, when the voltage at the T 1 -I sw  junction  216  is low, the current through the RF transistor  204  is also low. As a result, the driver  206  acts to change the voltage at the transistor gate  212  and, via the subtracting network,  210 , the voltage at the RF transistor gate  214 . This forces the transistor  202  to provide more current and the RF transistor  204  to sink or absorb less biasing current, thus increasing the voltage at the T 1 -I sw  junction  216 . Similarly, when the voltage at the T 1 -I sw  junction  216  is high (i.e., the voltage exceeds the upper limit voltage value), the current through the RF transistor  204  is also high. Such a result would then force the driver  206  to change the voltage at the transistor gate  212  and, via the subtracting network  210 , the voltage at the RF transistor gate  214 , thereby forcing the transistor  202  to provide less current and the RF transistor  204  to sink or absorb more biasing current. This leads to an overall decreased amount of voltage at the T 1 -I sw  junction  216 . 
         [0023]    Turning now to  FIG. 3 , in both the apparatus  200  and the system described above, the subtracting network  210  can be the passive transformers  300 . The passive transformers  300 , as known in the art, are configured for either stepping voltage up or stepping voltage down via induction. Briefly, the transformers  300  work on the principle that energy can be efficiently transferred by magnetic induction from one winding to another winding by a varying magnetic field produced by alternating current (AC). An electrical voltage is induced when there is a relative motion between a wire and a magnetic field. The AC provides the motion required by changing direction which creates a collapsing and expanding magnetic field. 
         [0024]    When the passive transformers  300  are utilized in place of the subtracting network  210 , the system and apparatus  200  work in much the same manner as described above with respect to  FIG. 2 . However, when the passive transformers  300  are provided, they act to change the voltage at the RF transistor gate  214  through induction and subtracting node operation, as known in the art. In other words, when the voltage at the T 1 -I sw  junction  216  is low, the driver  206  acts to change the voltage at the transistor gate  212 , and via the passive transformers  300 , to change the voltage at the RF transistor gate  214 . Specifically, when the voltage at the T 1 -I sw  junction  216  is low, the passive transformer  300  is such that a primary winding (not shown) has more turns than a secondary winding (not shown), and the operational amplifier outputs a decreased control voltage, thereby resulting in a decreased voltage output at the RF transistor gate  214 . Accordingly, the current provided by the transistor  202  is increased and the amount of biasing current sunk or absorbed by the RF transistor  204  is decreased. 
         [0025]    Similarly, when the voltage at the T 1 -I sw  junction  216  is high, the driver  206  acts to change the voltage at the transistor gate  212 , and via the passive transformers  300 , to change the voltage at the RF transistor gate  214 . Specifically, when the voltage at the T 1 -I sw  junction  216  is high, the passive transformers  300  is such that the primary winding has more turns than the secondary winding, the operational amplifier output an increased control voltage, thereby resulting in an increased voltage output at the RF transistor gate  214 . Accordingly, the current provided by the transistor  202  is decreased and the amount of biasing current sunk or absorbed by the RF transistor  204  is increased. 
         [0026]    Referring still to  FIG. 3  and as briefly mentioned above, in the apparatus  200  and system of  FIG. 2 , the subtracting network can be a pair of transformers serving as a coupler to scale down the voltage sensed, and an active operational amplifier  400 . As known in the art, in an operational amplifier, the voltage entering into the amplifier positive input port subtracts the voltage entering into the negative input port. The difference or error voltage between input ports is amplified and output by the amplifier, and vice versa. As seen in  FIG. 3 , when the voltage at the T 1 -I sw  junction  216  is low, the driver  206  acts to change the voltage at the transistor gate  212 , and via the operational amplifier  400 , to change the voltage at the RF transistor gate  214 . Specifically, when the voltage at the T 1 -I sw  junction  216  is low, the operational amplifier  400  acts such that the transistor gate  212  voltage scaled down and the transistor  202  output voltage scaled down are the inputs in the operational amplifier, resulting in a subtracted difference or error voltage output, thereby leading to a decreased voltage output at the RF transistor gate  214 . Accordingly, the current provided by the transistor  202  is increased and the amount of biasing current sunk or absorbed by the RF transistor  204  is decreased. 
         [0027]    Similarly, when the voltage at the T 1 -I sw  junction  216  is high, the driver  206  acts to change the voltage at the transistor gate  212 , and via the inverter amplifier  400 , to change the voltage at the RF transistor gate  214 . Specifically, when the voltage at the T 1 -I sw  junction  216  is high, the operational amplifier  400  acts such that the transistor gate  212  voltage scaled down and the transistor  202  output voltage scaled down are the inputs in the operational amplifier, resulting in a subtracted difference or error voltage output, thereby leading to an increased voltage output at the RF transistor gate  214 . Accordingly, the current provided by the transistor  202  is decreased and the amount of biasing current sunk or absorbed by the RF transistor  204  is increased, resulting in an overall decreased current through the RF transistor  204 . 
         [0028]    Referring next to  FIG. 4 , an envelope tracking method  500  is provided. Specifically, the method  500  includes providing an envelope modulator apparatus, the apparatus including a power transistor, an RF transistor, a driver, a switcher current source and a subtracting network (block  502 ). Next, the driver receives an envelope voltage (block  504 ). Once the envelope voltage is received, the driver compares the received envelope voltage to a predetermined voltage (block  506 ), and determines whether the received voltage is greater than or less than the predetermined voltage (block  508 ). 
         [0029]    Based on this determination, the subtracting network modulates a gate of the RF transistor based on an envelope voltage (block  510 ). Similar to the apparatus  200  and the system described above, the modulation at the subtracting network can occur at the passive transformers  300  and the active operational amplifier  400  combination. 
         [0030]    Next, redundant biasing current is sunk at the RF transistor. More specifically, if the envelope voltage is less than the predetermined value, the method includes the steps of increasing a current at the transistor  202  (block  512 ) and decreasing the amount of biasing current absorbed at the RF transistor  204  (block  514 ). In contrast, if the envelope voltage is more than the predetermined value, the method includes the steps of decreasing the current at the transistor  202  (block  516 ) and increasing the amount of biasing current absorbed at the RF transistor (block  518 ). 
         [0031]    As described above, the present disclosure provides an apparatus, system and method for envelope tracking. The present apparatus  200  provides a transistor  202  and an RF transistor  204 , which is in contrast to conventional envelope tracking apparatus that generally have a first transistor, a second transistor and an RF transistor. The present apparatus, therefore, provides an envelope tracking apparatus, system and method with fewer components. In addition, the present disclosure provides improved integration capabilities, as the RF transistor is now part of the envelope tracking modulator apparatus, rather than a separate component. Further, the present disclosure provides the potential for a wider bandwidth performance because there is no longer a T 2  or second transistor, as generally found in the prior art. With the removal of T 2 , the total parasitic capacitance will decrease, which can lead to a wider bandwidth performance. The present disclosure also provides a reduced cost system compared to conventional envelope tracking systems, because the high cost component T 2  has been replaced with lower cost subtracting networks. Also, the present disclosure provides for a more efficient envelope tracking apparatus/system/method when compared with conventional systems. 
         [0032]    Referring now to  FIG. 5 , a simulation bench is performed on an RF power transistor, matched to 850 MHz, with stimulus as 4G LTE 16QAM FDD up link SC-FDMA signal with 5 MHz bandwidth, peak to average power ratio (PAPR) is −7 dB. The instantaneous power-added efficiency (PAE) and distribution of load signal power histogram is shown together for comparison. As seen in the  FIG. 5 , the blue invention instantaneous efficiency (utilizing the present disclosure) is higher than the prior art envelope tracking solution (shown in red). Key performance metric comparison summary is shown as below table. 
         [0000]    
       
         
               
               
               
               
             
               
               
               
               
               
             
           
               
                   
                   
               
               
                   
                 Output Power 
                 Average PAE 
                 EVM RMS 
               
               
                   
                 (dBm) 
                 (%) 
                 (%) 
               
               
                   
                   
               
             
             
               
                   
               
             
          
           
               
                   
                 Invention 
                 24.98 
                 29.57 
                 5.87 
               
               
                   
                 Prior Art 
                 24.95 
                 25.95 
                 2.85 
               
               
                   
                 Class-AB 
                 24.97 
                 19.88 
                 3.73 
               
               
                   
                   
               
             
          
         
       
     
         [0033]    Embodiments of the present disclosure may be implemented in software (executed by one or more processors), hardware (e.g., an application specific integrated circuit), or a combination of software and hardware. In an example embodiment, the software (e.g., application logic, an instruction set) is maintained on any one of various conventional non-transitory computer-readable media. In the context of this document, a “non-transitory computer-readable medium” may be any media or means that can contain, store, communicate, propagate or transport the instructions for use by or in connection with an instruction execution system, apparatus, or device, such as a computer. A non-transitory computer-readable medium may comprise a computer-readable storage medium (e.g., memory or other device) that may be any media or means that can contain or store the instructions for use by or in connection with an instruction execution system, apparatus, or device, such as a computer. 
         [0034]    If desired, the different functions discussed herein may be performed in a different order and/or concurrently with each other. Furthermore, if desired, one or more of the above-described functions may be optional or may be combined. 
         [0035]    Although various aspects of the disclosure are set out in the independent claims, other aspects of the disclosure comprise other combinations of features from the described embodiments and/or the dependent claims with the features of the independent claims, and not solely the combinations explicitly set out in the claims. 
         [0036]    It is also noted herein that while the above describes example embodiments of the disclosure, these descriptions should not be viewed in a limiting sense. Rather, there are several variations and modifications which may be made without departing from the scope of the present disclosure as defined in the appended claims. 
         [0037]    One having ordinary skill in the art will readily understand that the disclosure as discussed above may be practiced with steps in a different order, and/or with hardware elements in configurations which are different than those which are disclosed. Therefore, although the disclosure has been described based upon these preferred embodiments, it would be apparent to those of skill in the art that certain modifications, variations, and alternative constructions would be apparent, while remaining within the spirit and scope of the disclosure. In order to determine the metes and bounds of the disclosure, therefore, reference should be made to the appended claims. 
         [0038]    The following abbreviations that may be found in the specification and/or the drawing figures are defined as follows: 
         [0039]    AC=Alternating Current 
         [0040]    BTS=Base Transceiver Station 
         [0041]    ET=Envelope Tracking 
         [0042]    EVM=Error Vector Magnitude 
         [0043]    FDD=Frequency Division Dual 
         [0044]    LTE=Long Term Evolution 
         [0045]    PA=Power Amplifier 
         [0046]    PAE=Power Added Efficiency 
         [0047]    PAPR=Peak to Average Power Ratio 
         [0048]    RF=Radio Frequency 
         [0049]    RMS=Root Mean Squared 
         [0050]    SC-FDMA=Single-carrier Frequency-Division Multiple Access 
         [0051]    4G=Fourth Generation Wireless Communication