Abstract:
A method capable of systematically determining the specifications of antecedent process steps subsumed in stages that unfold and move towards a specified final product requirements window. To this end, the method employs a back propagating technique that is cognizant of the specified final product requirements window.

Description:
BACKGROUND OF THE INVENTION 
     This invention relates to a novel method for determining the specifications of antecedent process steps subsumed by a specified final product requirements window. 
     INTRODUCTION TO THE INVENTION 
     Our motivation and methodology for the present invention are informed by an illustrative situation which centers on manufacturing a planar CMOS capacitor. For this situation, a manufacturing process may include the steps of thermal oxidizing doped silicon, followed by an implanting step and a drive-in (annealing) step, and a final metallizing step. It is required that the finished product, the planar CMOS capacitor, have a capacitor threshold voltage within a specific range, and that its transconductance at a particular gate voltage be within a certain range; that is, that the finished product realize a specified final product requirements window. If possible, moreover, it is desired to select a solution which can permit the widest fluctuations in the incoming doped silicon wafers. 
     SUMMARY OF THE INVENTION 
     With respect to the aforementioned manufacturing process, we first note that it implicitly suggests to us a problem as to a determination of the ranges of the various times, temperatures, energies, and dosages, etc. (i.e., tolerances for all independent variables), for each step or stage of the manufacturing process, which aggregate steps can lead ultimately to the finished product having the specified final product requirements window. 
     We address this problem in the following way. First, we point out, by way of contrast and apposition, that the prior art is not cognizant of this problem, and accordingly, does not articulate a systematic method for determining an appropriate set of specifications for manufacturing processes based on product requirements. That is, to an extent the prior art may somehow intersect with the situation outlined above, it must inherently respond to it by recourse to unsatisfactory ad hoc or heuristic expedients. 
     We have now discovered a novel method that is capable of systematically determining the specifications of antecedent process steps subsumed in stages that unfold and move towards a specified final product requirements window. In this way, we advantageously solve our problem presented above, and fulfill an important need that is at best a default condition with respect to the prior art. 
     In particular, we assume that a manufacturing process may comprise a sequence of processes, each of which may be a simple or a compound process. Let the product resulting from these processes have a functionally acceptable performance window. A problem to be solved is the identification of the setpoints and tolerances of all process steps which can result in a product within its functional specifications window. This window may comprise one or more functional requirements which must be satisfied simultaneously. If multiple solutions exist, it is desired to select the one which is the least restrictive on a fabrication process. Since a complex manufacturing process may involve thousands of variables, it is also preferably required that as few as possible variables be analyzed at any one time. This requirement is a practical one, and its aim is to insure manageability and computability of complicated manufacturing processes. 
     The novel method, which solves this problem, comprises the steps of: 
     1) identifying a model product specification window for a finished product that is produced through an aggregate of antecedent individual process steps; 
     and 
     2) back-propagating through the model product specification window by way of antecedent specification windows, wherein an output of a local antecedent window becomes an input for a subsequent specification window, thereby enabling a finished product which meets a specified product requirements window. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     The invention is illustrated in the accompanying drawing, in which: 
     FIG. 1 shows an exemplary manufacturing process schedule generated in accordance with the method of the present invention; and 
     FIG. 2 shows an environment for machine realization of the method. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     The method of the present invention is summarized above, and the detailed description proceeds by unfolding in stages its various degrees of specificity and preferred embodiments. To this end, we now disclose seven steps preferably employed for realizing the method of the present invention. 
     Step 1 
     Partition the manufacturing process into a hierarchical cluster structure. This means that a process supplies to any subsequent process only those variables relevant to it. In this manner, process responses at one level become input variables at following levels. The result is a hierarchical structure in which a relative small number of variables are needed to describe any level. The final, top level, describes product in terms of input variables which are output (response) variables of lower levels. 
     Step 2 
     Obtain a conventional 2nd order Response Surface Mapping (RSM) at the product level, using the responses of the previous level as input variables. Use principal components decomposition (if needed) to insure orthogonality. This can be achieved via Design-Of-Experiments or by simply fitting a 2nd order multivariate polynomial to manufacturing data. Do this for all product responses (functional variables). 
     Step 3 
     Convert each of the product response surfaces to its corresponding hyperplane, as described in U.S. Pat. No. 5,155,677, entitled &#34;Manufacturing Process Optimization&#34; by J. M. Kurtzberg and M. Levanoni, issued Oct. 13, 1992 and incorporated by reference herein. Each of the resulting hyperplanes exists in its own coordinate system which depends on the eigenstructure of the original surface. 
     Step 4 
     Select, for each product response plane, the region of acceptability which corresponds to the hypertrapezoid bounded by the two product tolerance specifications and the positive coordinate axes. 
     Step 5 
     Set the response surface dependent variable y to its target value Y r . The response surface becomes a hyperplane in k-1 dimensions and every point on it satisfies the target value requirement, though only positive solutions correspond to the real world. Response surface is now&lt;λ|z&gt;=y T  -y O  =C 
     Step 6 
     Find vector |Z r  &gt; on the hyperplane (in the positive z-space), closest to process specifications. This is the desired process setpoints vector (in z-apace). 
     This vector is |z r  &gt;=|z s  &gt;+((C-&lt;λ|z s  &gt;)/&lt;λ|λ&gt;)|λ&gt; If |z r  &gt; contains negative components, they must be set to zero and removed, and the formula recalculated with the corresponding components of |z s  &gt; and |λ&gt; also removed. 
     Step 7 
     Convert back from z-space coordinates to the original x-space parameters. This is the desired result. This vector |x T  &gt;=| x O  &gt;+M|√z T  &gt;, represents process setpoints which yield the target value of the dependent variable (or closest to it) and, at the same time, are nearest to process design specifications. The signs of square-roots above, are chosen to match those belonging to the vector |W S  &gt;. 
     The aforementioned mechanism was tested on a simulated fabrication of a planar CMOS capacitor. Fabrication consisted of oxidation (2 parameters--time &amp; temperature) of an N-doped silicon wafer (1 parameter--doping concentration), and Implant step (2 parameters--dose &amp; energy), followed by an anneal step (2 parameters --time &amp; temperature) and metallization. The response parameter was threshold voltage of the capacitor. Implementation of the mechanism resulted in correct determination of all seven process setpoints in all tested cases, representing all possible outcomes. 
     Attention is now directed to FIG. 1 which shows an exemplary manufacturing &#34;backmap&#34; for preferred realization of the method of the present invention. 
     In particular, the backmap 10 comprises a set of process node steps (A through F) which include windows. Node step A is dedicated to the start of the process, which unfolds through a product production flow trajectory (solid line) to the node F of the finished final product. The dotted lines, in contrast, represent a backmapping trajectory. 
     With respect to backmap 10, we note that a set of inputs of a local window comprises at least one of a complete, a selectable, or a modifiable subset of the output set of its antecedent window. Further, a back-propagating step may comprise recursively traversing an antecedent specification window, wherein such traversing may be sequential or non-sequential. 
     Attention is finally directed to FIG. 2, which shows a block diagram illustrating an exemplary computer system 12 for machine realization of the present invention. In particular, by aid of FIG. 1, the method may be readily programmed (in say, C+) in memory for operation by the FIG. 2 CPU and ultimate display.