Abstract:
A DC-DC converter may comprise a plurality of voltage multiplying stages of the capacitive type, each multiplying stage comprising a plurality of selectively connectable boosting branches. In one embodiment, the DC-DC converter comprises an inductor connected between a supply line and a ground line through a switching transistor; a voltage multiplying circuit formed by a plurality of voltage multiplying stages of capacitive type, connected together in cascade and each having an input connected to an intermediate node between the inductor and the transistor, and an output supplying a potential equal to the potential of the intermediate node multiplied by a respective multiplication factor. Each voltage multiplying stage comprises a plurality of parallel, selectively connectable boosting branches. The number of the active boosting branches may be varied in response to the energy required by the loads.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    The present invention relates to a switching-type, inductive DC-DC converter with improved efficiency.  
           [0003]    2. Description of the Related Art  
           [0004]    As is known, switching-type, inductive DC-DC converters having a Boost or Buck-Boost circuit topology generate high voltages, of some hundreds of Volts, from relatively low input voltages, of only a few Volts, using inductive type components, the loading and unloading whereof are controlled by active components including control transistors switching on and off.  
           [0005]    For a more detailed discussion of switching-type, inductive DC-DC converters of a flyback or boost type, see for example J. G. Kassakian, M. F. Schlecht, G. C. Verghese “Principles of Power Electronics,” Addison Wesley.  
           [0006]    On this topic, FIG. 1 shows the basic circuit diagram of a switching-type, inductive DC-DC converter having a Boost type circuit topology.  
           [0007]    As illustrated in FIG. 1, the DC-DC converter, indicated as a whole at  1 , comprises an inductor  2 , a control transistor  4  of NMOS type, a diode  6  and a capacitor  8 .  
           [0008]    In particular, the inductor  2  has a first terminal connected to a supply line  10  at a supply voltage V A , and a second terminal connected to a drain terminal of the control transistor  4 , which has a source terminal connected to a ground line  12  at a ground voltage V GND , and a gate terminal receiving a control signal C.  
           [0009]    The second terminal of the inductor  2 , jointly with the drain terminal of the control transistor  4 , forms an intermediate node  14  set at an intermediate voltage V I , the value whereof is correlated to the inductance of the inductor  2  and to the current flowing in the inductor  2 .  
           [0010]    The diode  6  has an anode terminal connected to the intermediate node  14  and a cathode terminal connected to a first terminal of the capacitor  8 , the second terminal whereof is connected to the ground line  12 .  
           [0011]    The cathode terminal of the diode  6 , jointly with the first terminal of the capacitor  8 , forms an output node  16  of the DC-DC converter  1  and supplies an output voltage V H  higher than the supply voltage V A .  
           [0012]    In short, the control transistor  4  is switched on/off at a predetermined frequency, called switching frequency; when the control transistor  4  is on, a current flows between the supply line  10  and the ground line  12  through the inductor  2 , that stores an electric energy correlated to the on-interval of the control transistor  4 ; instead, when the control transistor  4  is off, a current flows between the inductor  2 , the diode  6  and the capacitor  8 , so the electric energy stored in the inductor  2  is transferred to the capacitor  8 , apart from any leaks.  
           [0013]    Moreover, before the control transistor  4  can switch off, there must be sufficient electric energy stored in the inductor  2  to load the equivalent stray capacitance “seen” by the intermediate node  14  to a value such as to bring the voltage V I  of the intermediate node  14 , and therefore the output voltage V H , to the desired value V O . In mathematical terms, this can be represented by the following inequality:  
                 1   2          C   P          V   0   2       ≤       1   2        L                   I   2               (   1   )                               
 
           [0014]    wherein I is the current flowing in the inductor  2  when the control transistor  4  is on, C P  is the equivalent stray capacitance “seen” by the intermediate node  14 , the first term of the inequality represents the electric energy necessary to load the equivalent stray capacitance C P  and the second term of the inequality represents the electric energy stored in the inductor  2 .  
           [0015]    As may be noted from the above inequality, in order to obtain output voltages V H  of some hundreds of Volts it is necessary to make a decidedly high electric current run in the inductor  2 , easily of some Amps, which consequently generates a series of problems, well known to the skilled person, the solution of which involves considerable difficulties at planning and circuit level.  
           [0016]    Besides the problems deriving from the high value of the currents involved, switching-type, inductive DC-DC converters of the type described above have the further drawback of being able to supply only one boosted voltage, so that, when numerous different boosted voltages are required, it is necessary to resort to many distinct inductors or to inductors with many windings, one for each boosted voltage that is needed, and this involves a considerable occupation of area.  
           [0017]    Similar problems can also be found in switching-type, inductive DC-DC converters having a circuit topology of the Buck-Boost type, which differ from Boost type ones essentially in that the positions of the inductor and of the control transistor are exchanged, that is the inductor is connected to the ground line while the control transistor is connected to the supply line.  
           [0018]    Another prior art switching-type, inductive DC-DC converter is shown in FIG. 2.  
           [0019]    The DC-DC converter, indicated as a whole with  20 , comprises an inductor  22 , a control transistor  24 , and a voltage multiplying or boosting circuit  25 .  
           [0020]    In particular, the inductor  22  has a first terminal connected to a supply line  30  at a supply voltage V A , and a second terminal connected to a drain terminal of the control transistor  24 , which has a source terminal connected to a ground line  32  at a ground voltage V GND , and a gate terminal receiving a control signal C.  
           [0021]    The second terminal of the inductor  22 , jointly with the drain terminal of the control transistor  24 , forms a first intermediate node  34  supplying an intermediate voltage V I , the value whereof is correlated to the inductance of the inductor  22  and to the current flowing in the inductor  22 .  
           [0022]    The voltage multiplying circuit  25  comprises three voltage multiplying stages of a capacitive type, cascade-connected and indicated respectively with  26 . 1 ,  26 . 2  and  26 . 3 .  
           [0023]    The voltage multiplying stages  26 . 1 - 26 . 3  have the same circuit structure and each comprise a boosting capacitor, indicated respectively  36 . 1 ,  36 . 2  and  36 . 3 ; a filtering capacitor indicated respectively  38 . 1 ,  38 . 2  and  38 . 3 ; and a first and a second diode, indicated  40 . 1 ,  40 . 2 ,  40 . 3  and, respectively,  42 . 1 ,  42 . 2 ,  42 . 3 .  
           [0024]    In particular, each boosting capacitor  36 . 1 - 36 . 3  has a first terminal connected to the intermediate node  34  and a second terminal connected to a second intermediate node, indicated respectively  44 . 1 ,  44 . 2 ,  44 . 3 , connected to an anode terminal of the corresponding first diode  40 . 1 - 40 . 3  and a cathode terminal of the corresponding second diode  42 . 1 - 42 . 3 .  
           [0025]    The cathode terminal of each corresponding first diode  40 . 1 - 40 . 3  is connected to a first terminal of the respective filtering capacitor  38 . 1 - 38 . 3  and forms, jointly with it, an output node of the DC-DC converter  1 , indicated respectively  46 . 1 ,  46 . 2 ,  46 . 3 , supplying an output voltage, respectively V H1 , V H2 , V H3 , and connected a to a respective load  50 . 1 ,  50 . 2 ,  50 . 3 .  
           [0026]    Moreover, the anode terminal of the second diode  42 . 1  of the first capacitive multiplying stage  26 . 1  is connected to the ground line  32 ; the anode terminal of the second diode  42 . 2  of the second capacitive multiplying stage  26 . 2  is connected to the output node  46 . 1  of the first capacitive multiplying stage  26 . 1 ; and the anode terminal of the second diode  42 . 3  of the third capacitive multiplying stage  26 . 3  is connected to the output node  46 . 2  of the second capacitive multiplying stage  26 . 2 .  
           [0027]    Lastly, the second terminal of the filtering capacitor  38 . 1  of the first capacitive multiplying stage  26 . 1  is connected to the ground line  32 ; the second terminal of the filtering capacitor  38 . 2  of the second capacitive multiplying stage  26 . 2  is connected either to the ground line  32  or to the output node  46 . 1  of the first capacitive multiplying stage  26 . 1 , as schematically represented in FIG. 2 with a dashed line; and the second terminal of the filtering capacitor  38 . 3  of the third capacitive multiplying stage  26 . 3  is connected either to the ground line  32  or to the output node  46 . 2  of the second capacitive multiplying stage  26 . 2 , as schematically represented in FIG. 2 with a dashed line.  
           [0028]    The second terminals of the filtering capacitor  38 . 2 ,  38 . 3  of the second and of the third capacitive multiplying stage  26 . 2 ,  26 . 3  are connected either to the ground line  32  or to the output node  46 . 1 ,  46 . 2  of the first and, respectively, of the second capacitive multiplying stage  26 . 2 ,  26 . 3  depending on the particular application for which the DC-DC converter  20  is intended, as will be better explained below.  
           [0029]    The operation of the DC-DC converter  20  is as follows.  
           [0030]    The control transistor  24  is switched on and off at a pre-determined switching frequency; when the control transistor  24  is on, an electric energy correlated to the on-time of the control transistor  24  is stored in the inductor  22 , while when the control transistor  24  is off, the electric energy stored in the inductor  22  is transferred to the filtering capacitors  38 . 1 - 38 . 3 , except for any leaks, causing an increase of the voltage at the terminals.  
           [0031]    In particular, since the anode terminals of the first diodes  42 . 2  and  42 . 3  of the second and the third capacitive multiplying stages  26 . 2 ,  26 . 3  are connected to the output node  46 . 1  of the first capacitive multiplying stage  26 . 1 , and, respectively, to the output node  46 . 2  of the second capacitive multiplying stage  26 . 2 , the voltage of the second intermediate node  44 . 2  depends not only on the intermediate voltage V I  of the first intermediate node  34  but also on the voltage of the second intermediate node  44 . 1 , just as the voltage of the third intermediate node  44 . 3  depends both on the intermediate voltage V I  of the first intermediate node  34  and on the voltages of the second intermediate nodes  44 . 1  and  44 . 2 .  
           [0032]    In the DC-DC converter  20 , therefore, the output voltage V H1  can reach at the most a value equal to the maximum value assumed by the intermediate voltage V I , the output voltage V H2  can reach a value equal to double the output voltage V H1 , and the output voltage V H3  can reach a value equal to three times the output voltage V H1 .  
           [0033]    For example, by loading the inductor  22  so that the intermediate voltage V I  has a value of 100 Volts, with the DC-DC converter  20  it is possible to obtain both an output voltage V H2  of 200 Volts and an output voltage V H3  of 300 Volts.  
           [0034]    In general, with  n  voltage multiplying stages cascade-connected as described above and equal to each other, the maximum output voltage, that is the voltage on the output node of the n-th capacitive multiplying stage, is equal to  n  times the maximum value of the intermediate voltage V I .  
           [0035]    While the output voltage remains the same (with respect to the DC-DC converters described previously with reference to FIG. 1), this allows the inequality (1) to be rewritten as follows:  
                 1     2        n   2              C   P          V   0   2       ≤       1   2        L                   I   2               (   2   )                               
 
           [0036]    which, if solved for the variable I, shows how the electric current necessary to load the stray capacity C P  associated with the first intermediate node  34  is reduced by a factor  n  with respect to that necessary in DC-DC converters without capacitive multipliers, with consequent significant reduction of the problems at planning and circuit level, initially described, deriving from the high value of the currents involved.  
           [0037]    Moreover, if the filtering capacitors  38 . 2  and  38 . 3  are connected to the ground line  32 , the voltage at their terminals is two times and, respectively, three times the intermediate voltage V I , while if they are connected to the output nodes  46 . 1  and, respectively,  46 . 2 , the voltage at their terminals is equal to the intermediate voltage V I . Thereby the connection of these filtering capacitors to the output nodes of the preceding voltage multiplying stage allows a reduction by a factor  n  in the maximum voltage of the filtering capacitors, therefore less expensive manufacturing technologies may be used by virtue of the lower bulk and lower insulation problems.  
           [0038]    The decision to connect the filtering capacitors to the ground line rather than to the output nodes of the preceding voltage multiplying stages in the cascade therefore depends on the application for which the DC-DC converter  20  is intended, in particular it depends on any limitations on the overall occupation of area on silicon on the DC-DC converter.  
           [0039]    Although widely used, the output voltages V H1 , V H2 , V H3  may vary in a rather significant way when the loads  50 . 1 ,  50 . 2 ,  50 . 3  connected to the output nodes  46 . 1 ,  46 . 2 ,  46 . 3  vary.  
         BRIEF SUMMARY OF THE INVENTION  
         [0040]    The present invention improves the performance obtainable with inductive DC-DC converters.  
           [0041]    An embodiment of the present invention comprises a switching-type inductive DC-DC converter in which the voltage multiplying means comprise a plurality of parallel, selectively connectable boosting branches. 
       
    
    
     BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS  
       [0042]    For a better understanding of the invention, a preferred embodiment is now described, purely as an example without limitation, with reference to the enclosed drawings, wherein:  
         [0043]    [0043]FIG. 1 shows a circuit diagram of a switching-type, inductive DC-DC converter of the prior art with Boost type circuit topology;  
         [0044]    [0044]FIG. 2 shows a circuit diagram of a different switching-type, inductive DC-DC converter of the prior art with Boost type circuit topology;  
         [0045]    [0045]FIG. 3 shows a circuit diagram of a switching-type, inductive DC-DC converter with Boost type circuit topology that is an embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0046]    [0046]FIG. 3 shows an inductive DC-DC converter  100  of the switching type, embodying the present invention. In greater detail, the inductive DC-DC converter  100  comprises an inductor  101 , a control transistor  102 , and a voltage multiplying or boosting circuit  103 .  
         [0047]    In particular, the inductor  101  has a first terminal connected to a supply line  104  at a supply voltage V A , and a second terminal connected to a drain terminal of the control transistor  102 , which has a source terminal connected to a ground line  105  at a ground voltage V GND , and a gate terminal receiving a control signal C.  
         [0048]    The second terminal of the inductor  101 , jointly with the drain terminal of the control transistor  102 , defines a first intermediate node  106  supplying an intermediate voltage V I  the value whereof is correlated to the inductance of the inductor  101  and to the current flowing in the inductor  101 .  
         [0049]    The voltage multiplying circuit  103  of the embodiment shown in FIG. 3 is formed by two voltage multiplying stages  107 . 1 ,  107 . 2  of capacitive type, cascade-connected. The voltage multiplying circuit  103  may comprise additional voltage multiplying stages of capacitive type (i.e.  107 . 3 ,  107 . 4 , . . .  107 .n) (not shown) that are cascade-connected.  
         [0050]    In the embodiment of FIG. 3, the voltage multiplying stages  107 . 1 ,  107 . 2  have the same circuit structure and each comprise a plurality of boosting branches (four of which are shown in FIG. 3 and indicated with  108 . 1 ,  108 . 2 ,  108 . 3 ,  108 . 4  and respectively with  109 . 1 ,  109 . 2 ,  109 . 3 ,  109 . 4 ) and a filtering capacitor  110 . 1 ,  110 . 2 .  
         [0051]    In particular, each boosting branch  108 . 1 - 108 . 4 ,  109 . 1 - 109 . 4 , comprises a boosting capacitor  111 . 1 ,  111 . 2 ,  111 . 3 ,  111 . 4  and respectively  112 . 1 ,  112 . 2 ,  112 . 3 ,  112 . 4 , a first diode  113 . 1 ,  113 . 2 ,  113 . 3 ,  113 . 4  and respectively  114 . 1 ,  114 . 2 ,  114 . 3 ,  114 . 4  and a second diode  115 . 1 ,  115 . 2 ,  115 . 3 ,  115 . 4  and respectively  116 . 1 ,  116 . 2 ,  116 . 3 ,  116 . 4 . In detail, each boosting capacitor  111 . 1 - 111 . 4 ,  112 . 1 - 112 . 4 , comprises a first terminal connected to the intermediate node  106  and a second terminal connected to a second intermediate node, indicated with  117 . 1 ,  117 . 2 ,  117 . 3 ,  117 . 4  and respectively  118 . 1 ,  118 . 2 ,  118 . 3 ,  118 . 4  connected to an anode terminal of the respective first diode  113 . 1 - 113 . 4  and respectively  114 . 1 - 114 . 4  and a cathode terminal of the respective second diode  115 . 1 - 115 . 4  and respectively  116 . 1 - 116 . 4 . Although FIG. 3 illustrates the use of four boosting branches in each multiplying stage, the multiplying stages may comprise fewer or more boosting branches (i.e.  108 . 1 ,  108 . 2 , . . .  108 .n) and each multiplying stage need not employ the same number of boosting branches.  
         [0052]    The cathode terminal of each first diode  113 . 1 - 113 . 4  and respectively  114 . 1 - 114 . 4  is connected to a first terminal of the respective filtering capacitor  110 . 1 ,  110 . 2  and forms, jointly with it, a corresponding output node of the DC-DC converter  1 , indicated  119 . 1  and respectively  119 . 2 , supplying an output voltage indicated respectively V H1  for the first voltage multiplying stage  107 . 1  and V H2  for the second voltage multiplying stage  107 . 2 . A load  120 . 1 ,  120 . 2  is connected to the output node  119 . 1 , respectively  119 . 2 .  
         [0053]    Moreover, the anode terminals of the second diodes  115 . 1 - 115 . 4  of the first capacitive multiplying stage  107 . 1  are connected to the ground line  105  through respective switches  121 . 1 ,  121 . 2 ,  121 . 3 ,  121 . 4  while the anode terminals of the second diodes  116 . 1 - 116 . 4  of the second capacitive multiplying stage  107 . 2  are connected to the output node  119 . 1  of the first capacitive multiplying stage  107 . 1  through respective switches  122 . 1 ,  122 . 2 ,  122 . 3 ,  122 . 4 .  
         [0054]    The switches  121 . 1 - 121 . 4  of the first capacitive multiplying stage  107 . 1  are controlled by respective closing signals S 1 , S 2 , S 3 , S 4  generated by a first control circuit  124 . 1  having an input terminal receiving the output voltage V H1  of the first capacitive multiplying stage  107 . 1 . Likewise the switches  122 . 1 - 122 . 4  of the second capacitive multiplying stage  107 . 2  are controlled by respective closing signals S 5 , S 6 , S 7 , S 8  generated by a second control circuit  124 . 2  having an input terminal receiving the output voltage V H2  of the second capacitive multiplying stage  107 . 2 .  
         [0055]    Lastly, the second terminal of the filtering capacitor  110 . 1  of the first capacitive multiplying stage  107 . 1  is connected to the ground line  105  while the second terminal of the filtering capacitor  110 . 2  of the second capacitive multiplying stage  107 . 2  is connected either to the ground line  105  or to the output node  119 . 1  of the first capacitive multiplying stage  107 . 1 , as schematically represented in FIG. 3 with a dashed line.  
         [0056]    In another embodiment, the switches  121 . 1 - 121 . 4  of the first capacitive multiplying stage  107 . 1  may be placed between the cathode terminals of the first diodes  113 . 1 - 113 . 4  and the output node  119 . 1  of the first capacitive multiplying stage itself, while the switches  122 . 1 - 122 . 4  of the second capacitive multiplying stage  107 . 2  may be placed between the cathode terminals of the second diodes  114 . 1 - 114 . 4  and the output node  119 . 2  of the second capacitive multiplying stage.  
         [0057]    The operation of the DC-DC converter  100  as embodied in FIG. 3 is similar to the operation of the DC-DC converter  20  in FIG. 2, so it will not be repeated. It will only be pointed out that in the DC-DC converter  100  the number of active boosting branches  108 . 1 - 108 . 4 ,  109 . 1 - 109 . 4  is determined according to the energy required by the loads  120 . 1 ,  120 . 2 .  
         [0058]    The energy available to the loads  120 . 1 ,  120 . 2  is a growing monotonic function both of the switching frequency and of the capacitance of the boosting capacitors  111 . 1 - 111 . 4 ,  112 . 1 - 112 . 4 . Thus, when the number of boosting capacitors  111 . 1 - 111 . 4 ,  112 . 1 - 112 . 4 , connected between the first intermediate node  106  and the second intermediate nodes  117 . 1 - 117 . 4 ,  118 . 1 - 118 . 4  is increased, the energy that can be transferred to the loads  120 . 1 ,  120 . 2  is also increased.  
         [0059]    The control circuits  124 . 1 ,  124 . 2  therefore sense the values of the output voltages V H1 , V H2  on the output nodes  119 . 1 ,  119 . 2  and, accordingly, generate the closing signals of the switches  121 . 1 - 121 . 4 ,  122 . 1 - 122 . 4 .  
         [0060]    For example, in the embodiment shown in FIG. 3 the capacitances associated with each boosting capacitor  111 . 1 - 111 . 4 ,  112 . 1 - 112 . 4  may be weighed in binary mode. In this way it is possible to transfer the energy required by each load  120 . 1 ,  120 . 2  with a minimum increase of 1/2 n  with n=4.  
         [0061]    Moreover, to obtain greater precision it is possible to have  n  boosting capacitors in the DC-DC converter  100 . Although FIG. 3 illustrates an embodiment of the present invention utilizing an inductive DC-DC converter of the boost type, the present invention may also be employed in DC-DC converters having a circuit topology of the Buck-Boost type.  
         [0062]    The advantages of a DC-DC converter circuit embodying the invention are clear from the above. In particular, it is stressed that it allows a considerable decrease of the loss of the energy transferred to the loads, considerably increasing efficiency with respect to the solutions of the prior art.  
         [0063]    From the foregoing it will be appreciated that, although specific embodiments of the invention have been described herein for purposes of illustration, various modifications may be made without deviating from the spirit and scope of the invention. Accordingly, the invention is not limited except as by the appended claims.