Abstract:
A method of making a conductive interconnect structure includes the steps of: electrodepositing a metal on a conductive surface ( 4 ) of a carrier ( 2 ) to form a first elongate conductive interconnect ( 12 ); and electrodepositing a dielectric material ( 14 ) on said conductive interconnect ( 12 ) while the conductive interconnect ( 12 ) is in contact with the conductive surface ( 4 ).

Description:
RELATED APPLICATIONS 
     The present application is based on, and claims priority from, United Kingdom Application Number 0722613.7, filed Nov. 19, 2007, the disclosure of which is hereby incorporated by reference herein in its entirety. 
     FIELD OF THE INVENTION 
     The present invention relates to conductive interconnects. 
     BACKGROUND TO THE INVENTION 
     Displays which are based on electro-optical effects such as LCDs, OLEDs, and electrophoretic displays are often addressed using an array of ‘active’ devices. These provide a non-linear disconnection between the matrixing of the information and the electric field or current at each pixel. Typically a thin film transistor (TFT) is used such that its gate is controlled in parallel with all other devices on a particular row, and its source is provided by a data driver connected to each column. The drain is connected to the pixel driving electrode and optionally a capacitor to provide an effective ‘sample and hold’ of the data voltage. When arranged as a large row and column matrix a full image display can be effected. In a matrix there is the additional complication that the source lines must cross the gate lines (or vice versa) either at the device, or independently. 
     International patent applications WO2005/008744 and WO2005/009095 describe a technique which is based on the electroforming of all of the metal contacts and connections to a TFT device and the formation by ‘overgrown’ electrodeposition of crossover features. The second layer dielectric, which forms either the gate layer dielectric or the crossover dielectric, is formed by photo- or laser-patterning of a suitable polymer material. 
     SUMMARY OF THE INVENTION 
     Aspects of the invention are specified in the independent claims. Preferred features are specified in the dependent claims. 
     The electrodeposited dielectric may form the gate dielectric of a semiconductor device, for example a TFT. In this case, a semiconductor will be formed between the metal structures. Alternatively it may serve as a crossover dielectric to separate electrical interconnects. In this case, the metal deposition will be continued to form a bridge between the metal structures. The metal structures and the bridge will form a single integrated second elongate conductive interconnect which is separate from the first interconnect. Thus, the bridge may be formed between the metal structures without any intervening seed layer or the need for any other intermediate layer such as a copper blanket. 
     After forming the semiconductor or the metal bridge, the structure may be laminated to a substrate and the carrier peeled off. 
     By electrodepositing the dielectric material on the first interconnect, the dielectric is self-aligned to the underlying conductor, with the shape and position of both the metal conductor and the overlying electrodeposited dielectric material determined by the trench defined by the original multilevel dielectric structure. This avoids problems with previous techniques such as photo- or laser patterning of a polymer material, which require a certain level of pattern re-alignment that may cause practical difficulties and cost when applied to large area polymer substrates because of dimensional instability. 
     The technique of electrodepositing the gate or crossover dielectric may produce a continuous film without pinhole or other defects which would effect a short between the gate and source/drain (in a TFT) or between conductor A and conductor B in a crossover, potentially increasing the manufacturing yield of the process. 
     Electrodeposited metal has a characteristic grain structure which can be measured. Moreover, as discussed in “Modern Electroplating” 4 th  Ed., Schlesinger &amp; Paunovic Eds Wiley 2000, electroplated films almost always contain various types of inclusions or impurities. Electrodeposited metals can therefore be differentiated, both structurally and by composition, from metals deposited by other techniques. Similarly, electrodeposited dielectric material is believed to be structurally and/or compositionally distinguishable from dielectric material deposited by other techniques. 
     The terms ‘electrodepositing’ and ‘electroplating’ are synonymous. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The invention will now be further described, by way of example only, with reference to the following drawings in which: 
         FIGS. 1   a  through  1   e  depict stages in the manufacture of a conductive interconnect in accordance with an embodiment of the present invention; 
         FIGS. 2   a  through  2   c  depict stages in the manufacture of a TFT from the interconnect of  FIG. 1 , in accordance with another embodiment of the invention; 
         FIGS. 3   a  through  3   c  show a crossover formed from the conductive interconnect of  FIG. 1 , in accordance with a further embodiment of the invention; and 
         FIG. 4  is a FIB-SEM picture of a crossover made in accordance with an embodiment of the invention. 
     
    
    
     DETAILED DESCRIPTION 
     Referring to  FIG. 1   a  a carrier  2 , for example a film of a plastics material, has a conductive surface  4 . A multilevel dielectric structure  6  is formed on the conductive surface  4 , for example by photolithography using a material such as SU8, or by UV micromoulding. The dielectric structure  6  includes a pair of upstanding walls  8  which define a trench  10  between them, and regions of dielectric material  7  outside the trench  10  and adjacent to the walls  8 . The base of the trench  10  comprises part of the conductive surface  4  between the walls  8 . If UV micromoulding is used to form the dielectric structure  6 , then the base of the trench  10  may be cleared of any residue by plasma, or UV ozone ashing to ensure that it is presents a conductive surface. 
     In  FIG. 1   b , the carrier is placed in a standard electroforming system, where the conductive layer  4  forms the cathode. A metal (typically nickel, gold, copper or a combination thereof is deposited to form a first conductive interconnect  12  in the trench  10 . 
     Following deposition of the first conductive interconnect  12  ( FIG. 1   c ), a polymer dielectric material  14  is electrodeposited onto the exposed metal surface of the first conductive interconnect  12 . e.g electrodeposited UV curable photoresist Eagle 2100 from Shipley, or thermally cured resin Lugalvan EDC from BASF. This is typically an emulsion of resin micelles which carry a charge and are electrophoretically deposited onto the metal surface, where they coalesce and form a thin continuous layer. This material is cured by UV exposure and/or thermal baking in accordance with manufacturer&#39;s instructions. 
     Referring now to  FIG. 1   d , the structure of  FIG. 1   c  is etched back, for example by oxygen plasma, UV-ozone or Excimer lamp. This removes the first, thin, level  7  of the multilevel dielectric structure  6 , which is much closer to the conductive surface  4  than are the tops of the walls  8 , and uncovers parts  16  of the conductive surface  4  adjacent to the outer faces of the walls  8 . There will be some removal of the electrodeposited dielectric  14 , but this can be pre-compensated by the electrodeposition of sufficient material. Preferably the electrodeposited dielectric  14  has a low etch rate compared to the material forming the initial multilevel dielectric structure  6 . 
     Electroplating of the exposed areas  16  is then carried out in an isotropic manner so that first and second electrodeposited metal structures  18 ,  19  are formed adjacent to the outer surfaces of the walls  8  and overlapping the tops of the walls  8  and the edges of the first conductive interconnect  12  to produce the conductive interconnect structure  28  shown in  FIG. 1   e . This structure  28  may be used to form a TFT or a crossover as described below. 
     Referring now to  FIG. 2 , steps in the manufacture of a TFT  30  are shown. The structure  28  has a channel  15  defined by the first and second electrodeposited metal structures  18 ,  19  and the electrodeposited dielectric  14 . A semiconductor material  20  is deposited and dried, cured and/or annealed in the channel  15  ( FIG. 2   a ) after which a plastic substrate  24  is laminated on the semiconductor  20  and metal structures  18 ,  19  using a conformal adhesive layer  22  ( FIG. 2   b ). Finally, the carrier  2  (with its conductive surface  4 ) is peeled off to leave the TFT  30  shown in  FIG. 2   c . In this example, the first metal structure  18  comprises the source electrode and the second metal structure  19  comprises the drain electrode, although this arrangement could of course be reversed. The first conductive interconnect  12  functions as the gate electrode. 
     To manufacture a crossover of conductive interconnects from the structure  28 , the isotropic electroplating is continued until the lateral growth of the metal forms a conductive bridge  17  over the electrodeposited dielectric  14  ( FIG. 3   a ). The conductive bridge  17 , the first metal structure  18  and the second metal structure  19  are formed as a single integrated metal track which forms the second elongate conductive interconnect  30 . The first  12  and second  30  conductive interconnects are electrically isolated from each other by the walls  8  and the electrodeposited dielectric material  14 . 
     The circuit of  FIG. 3   a  is then adhesively transferred onto a substrate  24  ( FIGS. 3   b ,  3   c ) using the same lamination and peel techniques as described for  FIGS. 2   b  and  2   c  to provide the crossover  32 . 
     No processing is required on the final substrate  24 , which may be made of a plastic material and susceptible to damage. 
     A specific example of a crossover of conductive interconnects is shown in FIB-SEM cross-section  FIG. 4 . In this case a nickel coated glass substrate was used as the conductive surface. A multilevel pattern of dielectric was formed by repeated photolithography of photocurable epoxy SU8 (MCC Corp). The substrate was connected as the cathode in a nickel sulphamate based electrolytic plating system, with a titanium anode electrode. Nickel was electro-deposited into the channel  10  to form the first elongate conductor  12  using suitable plating waveforms. The conductive surface was then immersed in a bath containing Shipley Eagle SP2100 electrodepositable photoresist and connected as the anode, a stainless steel cathode plate was introduced and approximately 3 μm of resist was deposited. The conductive substrate was removed, rinsed using water, dried and exposed to UV illumination (15 mW/cm 2  for 3 minutes). The conductive surface was then baked at 120° C. for 1 hour to cure the resin to form the dielectric layer  14 . The dielectric  7  was etched back to reveal the conductive surface by oxygen plasma ashing at 200 W for 5 minutes. The conductive surface was reintroduced to the nickel sulphamate plating system and reconnected as a cathode. Nickel was electrodeposited using suitable waveforms to form metal structures  18  and  19 , and continued to form the conductive bridge  17 . Isotropic plating was achieved by use of pulse plating waveforms without modification to the electrolyte chemistry. After electrodeposition the conductive surface was rinsed and dried and coated with an optically clear UV curable adhesive (NOA81—Norland Optical) and a final substrate of PET (ST506—Dupont Teijin Films) was laminated using a suitable rubber roller. The adhesive layer was cured by exposure to UV illumination (15 mW/cm 2  for 3 minutes) followed by thermal baking at 120° C. for 30 minutes. The conductive surface was then removed by peeling off the final structure  32  on the final substrate  24 . 
     Although the invention has been illustrated with reference to the manufacture of a single TFT or crossover, it will be understood that it is not limited to these embodiments. In particular, the techniques of the present invention are suitable for large area fabrication of TFT arrays or arrays including a plurality of crossovers of elongate conductive interconnects. 
     The articles ‘a’ and ‘an’ are used herein to denote ‘at least one’ unless the context otherwise requires.