Abstract:
A low noise current buffer circuit includes a first transistor, for receiving an input current, a second transistor, for draining a first current from a drain of the second transistor according to the input current received by the first transistor, a third transistor, for outputting first current, a fourth transistor, for outputting a second current to an output resistor, to generate an output voltage, and a feedback capacitor, for eliminating impacts of noise of a system voltage on the output voltage.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a low noise current buffer circuit and current voltage (I-V) converter, and more particularly, to a low noise current buffer circuit and current voltage converter capable of reducing impact of noise of a system voltage on an output voltage. 
     2. Description of the Prior Art 
     A current voltage converter, such as a bandgap reference circuit, utilizes a current source to output an input current to an output resistor to generate a required output voltage. In such a conventional structure, since the current source likely experiences interference from noise of a system voltage, the output voltage is affected and can not stay within a stable range. 
     Please refer to  FIG. 1A  and  FIG. 1B .  FIG. 1A  is a schematic diagram of a bandgap reference circuit  10  for generating a zero temperature coefficient (zero-TC) voltage in the prior art, and  FIG. 1B  is a schematic diagram of a bandgap reference circuit  12  for generating zero-TC current in the prior art. In the bandgap reference circuit  10 , a transistor  102 , which can be considered a current source, outputs an input current Iin to an output resistor Ro and a diode Q 1 , to generate a zero-TC output voltage Vout. Similarly, in the bandgap reference circuit  12 , a transistor  104 , which can be considered a current source as well, outputs an zero-TC input current Iin′ to an output resistor Ro′, to generate an output voltage Vout′. In such a situation, a system voltage VDD experiences interference from noise, and the input currents Iin, Iin′ experience interference as well, such that the output voltages Vout, Vout′ are affected, and thus can not stay within a stable range. 
     For example, when the system voltage VDD rises rapidly due to noise, the transistors  102 ,  104  output corresponding greater input currents Iin, Iin′, which increases the output voltages Vout, Vout′, such that the output voltages Vout, Vout′ are greater than the stable range. Thus, there is a need for improvement of the prior art. 
     SUMMARY OF THE INVENTION 
     It is therefore an objective of the present invention to provide a low noise current buffer circuit and current voltage converter. 
     The present invention discloses a low noise current buffer circuit for reducing impacts of noise of a system voltage on an output voltage in a current voltage converter. The low noise current buffer circuit includes a first current mirror, a second current mirror and a feedback capacitor. The first current mirror includes a first transistor, including a gate, a drain and a source, the gate coupled to the drain, and the drain receiving an input current, and a second transistor, including a gate, a drain and a source, the gate coupled to the gate of the first transistor, for draining a first current from the drain according to the input current received by the first transistor. The second current mirror includes a third transistor, including a gate, a drain and a source, the gate coupled to the drain, and the drain coupled to the drain of the second transistor, for outputting the first current, and a fourth transistor, including a gate, a drain and a source, the gate coupled to the gate of the third transistor, for outputting a second current to an output resistor according to the first current outputted by the third transistor, to generate the output voltage. The feedback capacitor includes a terminal coupled between the drain of the second transistor and the drain of the third transistor, and another terminal coupled between the drain of the fourth transistor and the output resistor, for forming a negative feedback loop, to eliminate the impacts of the noise of the system voltage on the output voltage. 
     The present invention further discloses a current voltage converter capable of reducing impacts of noise of a system voltage on an output voltage. The current-to-voltage converter includes a current source, for generating an input current, an output resistor, for generating an output voltage according to a second current, and a low noise current buffer circuit, coupled between the current source and the output resistor. The low noise current buffer circuit includes a first current mirror, a second current mirror and a feedback capacitor. The first current mirror includes a first transistor, including a gate, a drain and a source, the gate coupled to the drain, and the drain receiving an input current, and a second transistor, including a gate, a drain and a source, the gate coupled to the gate of the first transistor, for draining a first current from the drain according to the input current received by the first transistor. The second current mirror includes a third transistor, including a gate, a drain and a source, the gate coupled to the drain, and the drain coupled to the drain of the second transistor, for outputting the first current, and a fourth transistor, including a gate, a drain and a source, the gate coupled to the gate of the third transistor, for outputting the second current to the output resistor according to the first current outputted by the third transistor, to generate the output voltage, The feedback capacitor includes a terminal coupled between the drain of the second transistor and the drain of the third transistor, and another terminal coupled between the drain of the fourth transistor and the output resistor, for forming a negative feedback loop, to eliminate the impacts of the noise of the system voltage on the output voltage. 
     These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1A  is a schematic diagram of a bandgap reference circuit for generating a zero-TC voltage in the prior art. 
         FIG. 1B  is a schematic diagram of a bandgap reference circuit for generating zero-TC current in the prior art. 
         FIG. 2A  is a schematic diagram of a bandgap reference circuit for generating a zero-TC voltage according to an embodiment of the present invention. 
         FIG. 2B  is a schematic diagram of a bandgap reference circuit for generating zero-TC current according to an embodiment of the present invention. 
         FIG. 3  is a schematic diagram of circuit of the low noise current buffer circuit shown in  FIG. 2B . 
         FIG. 4  is another schematic diagram of circuit of the low noise current buffer circuit shown in  FIG. 2B . 
         FIG. 5A  is a schematic diagram of a small signal model of the low noise current buffer circuit shown in  FIG. 3 . 
         FIG. 5B  and  FIG. 5C  are schematic diagrams of noise of the small signal model shown in  FIG. 5A . 
         FIG. 6A  and  FIG. 6B  are schematic diagrams of an open loop transfer function of the low noise current buffer circuit shown in  FIG. 5A . 
     
    
    
     DETAILED DESCRIPTION 
     Please refer to  FIG. 2A  and  FIG. 2B ,  FIG. 2A  and  FIG. 2B  are schematic diagrams of bandgap reference circuits  20 ,  22  according to an embodiment of the present invention, respectively. The bandgap reference circuits  20 ,  22  are utilized for generating a zero temperature coefficient (zero-TC) voltage and current, respectively. Partial structures of the bandgap reference circuits  20 ,  22  are the same as those of the bandgap reference circuits  10 ,  12 , and thus elements with the same functions and structures are denoted by the same figures and symbols for simplicity. In short, a main difference between the bandgap reference circuit  22  and the bandgap reference circuit  12  is that a low noise current buffer circuit  214  is added between transistors  208 ,  210 ,  212 , which can be considered current sources, and the output resistor Ro′ of the bandgap reference circuit  22 . The low noise current buffer circuit  214  receives input currents Iin 1 ′, Iin 2 ′, Iin 3 ′, and outputs a current I 2  to the output resistor Ro′ after reducing impact of noise of the system voltage VDD through negative feedback, so as to generate an output voltage Vout′ unaffected by the noise of the system voltage VDD, such that the output voltage Vout′ can stay within a stable range. Similarly, differences between the bandgap reference circuit  20  and the bandgap reference circuit  10  can be referred from the above description. 
     Please refer to  FIG. 3 , which is a schematic diagram of circuitry of the low noise current buffer circuit  214  shown in  FIG. 2B . The low noise current buffer circuit  214  mainly includes transistors MNR 1 , MNR 2 , MNR 3 , MPR 1 , MN 1 , MN 2 , MN 3 , MP 1 , MP 2 , MP 3  and feedback capacitors C M1 , C M2 , and detailed structure and connection configuration are as shown in  FIG. 3 , where a gate of the transistor MNR 1  is coupled to a drain of the transistor MNR 1 , a gate of the transistor MN 1  is coupled to the gate of the transistor MNR 1 , a source of the transistor MN 2  is coupled between a drain of the transistor MN 1  and feedback capacitor C M1 , a source of the transistor MN 3  is coupled to a drain of the transistor MN 2 , a gate of the transistor MP 1  is coupled to a drain of the transistor MP 1 , the drain of the transistor MP 1  is coupled to a drain of the transistor MN 3 , a gate of the transistor MP 2  is coupled to the gate of the transistor MP 1 , a terminal of the feedback capacitor CM 1  is coupled between the drain of the transistor MN 1  and the drain of the transistor MN 2 , another terminal of the feedback capacitor CM 1  is coupled between a drain of the transistor MP 3  and output resistor Ro′, and the feedback capacitor CM 2  is coupled between a gate and the drain of the transistor MN 2 . The transistors MNR 1 , MNR 2 , MNR 3 , MN 1 , MN 2 , MN 3  are N-type metal oxide semiconductor (MOS) transistors, and the transistors MPR 1 , MP 1 , MP 2 , MP 3  are P-type MOS transistors. 
     In short, the transistors MNR 1 , MN 1  and the transistors MP 1 , MP 2  form current mirrors, respectively. The feedback capacitor CM 1  can form a negative feedback loop FB to eliminate the impact of the noise of the system voltage VDD on the output voltage Vout′. The transistors MN 2 , MN 3 , MP 3  form a cascade stage to reduce the channel-length-modulation and provide better current matching of the transistors MN 1 , MP 2 . The feedback capacitor CM 2  can perform Miller compensation to prevent the noise of the system voltage VDD from generating feed-forward noise to the output voltage Vout′ along a feed-forward path FFP 1  through the feedback capacitor CM 1 . The transistors MNR 2 , MNR 3 , MPR 1  correspond to the transistors MN 2 , MN 3 , MP 3  of the cascade stage, respectively. 
     In detail, the transistor MNR 1  receives the input current Iin 3 ′, such that the transistor MN 1  drains a current I 1  from the drain of the transistor MN 1  according to the input current Iin 3 ′. Since the transistor MP 1  and the transistor MN 1  are cascaded, a current of the transistor MN 1  is substantially the same with the current I 1 , such that the transistor MP 2  can output current I 2  to the output resistor Ro′ according to the current I 1  to generate the output voltage Vout′. The feedback capacitor CM 1  forms the negative feedback loop FB to eliminate the impact of the noise of the system voltage VDD on the output voltage Vout′, such that the output voltage Vout′ can stay within a stable range. For example, as shown in  FIG. 4 , assume that the low noise current buffer circuit  214  only includes the transistors MNR 1 , MN 1 , MP 1 , MP 2  and the feedback capacitor CM 1 . When the system voltage VDD rises rapidly due to noise, the transistor MP 2  outputs a greater current I 2 , which increases the output voltage Vout′. At this moment, a drain voltage V DN1  of the transistor MN 1  can rise due to a feedback path formed by the feedback capacitor CM 1 , i.e. a gate voltage V GP2  of the transistor MP 2  can rise, to reduce the current I 2  outputted by the transistor MP 2 , so as to achieve an effect of negative feedback. 
     However, if the low noise current buffer circuit  214  only includes the transistors MNR 1 , MN 1 , MP 1 , MP 2  and the feedback capacitor CM 1 , the noise of the system voltage VDD will generate feed-forward noise to the output voltage Vout′ along a feed-forward path FFP 2  through the feedback capacitor CM 1  as shown in  FIG. 4 . Therefore, the low noise current buffer circuit  214  can include the transistor MN 2 , MN 3  acting as the cascade stage to eliminate the feed-forward path FFP 2 . 
     Please continue to refer to  FIG. 3 . The transistor MN 2  prevents the noise of the system voltage VDD from generating feed-forward noise to the output voltage Vout′ along the feed-forward path FFP 2  through the feedback capacitor CM 1  as shown in  FIG. 4 . The feedback capacitor CM 2  performs Miller compensation to prevent the noise of the system voltage VDD from generating feed-forward noise to the output voltage Vout′ along the feed-forward path FFP 1  through the feedback capacitor CM 1 . The transistor MN 3  prevents the noise of the system voltage VDD from affecting operations of the feedback capacitor CM 2 . For example, when the system voltage VDD rises due to noise, a gate voltage V GN2  of the transistor MN 2  rises as well. Since the current I 1  of the transistor MN 2  is fixed, which can be considered a fixed current source, a source voltage V SN2  of the transistor MN 2  rises as well, which increases the output voltage Vout′ via the feedback capacitor CM 1 . At this moment, the feedback capacitor CM 2  performs Miller compensation to reduce the gate voltage V GN2  of the transistor MN 2 , so as to reduce the output voltage Vout′, such that the output voltage Vout′ stays within a stable range. Noticeably, if the noise of the system voltage VDD is high frequency noise, the noise of the system voltage VDD can generate feed-forward noise along a feed-forward path FFP 3  through the feedback capacitor CM 2  as shown in  FIG. 3 . However, the feed-forward noise along the feed-forward path FFP 3  is in phase with the negative feedback signal in the negative feedback loop FB formed by the feedback capacitor CM 1 . Therefore, the feed-forward noise can strengthen negative feedback, so as to facilitate eliminating the impact of the noise of the system voltage VDD on the output voltage Vout′, such that the output voltage Vout′ can stay within a stable range. 
     On the other hand, please refer to  FIG. 5A , which is a schematic diagram of a small signal model of the low noise current buffer circuit  214  shown in  FIG. 3 . Transformation from a schematic diagram of the circuit of the low noise current buffer circuit  214  shown in  FIG. 3  to the small signal model of the low noise current buffer circuit  214  shown in  FIG. 5A  is known by those skilled in the art, and is not narrated hereinafter. In  FIG. 5A , a dotted line of the negative feedback loop FB corresponds to the negative feedback loop FB shown in  FIG. 3 , and transconductors gm N1 , gm N2 , gm N3 , gm P2 , gm P3  correspond to the transistors MN 1 , MN 2 , MN 3 , MP 2 , MP 3 , respectively. Other resistors and capacitors correspond to parasitic resistors and parasitic capacitors. As can be seen from  FIG. 5A , after the feedback capacitor CM 1  forms the negative feedback loop FB, the transconductors gm N2 , gm N3 , gm P2 , gm P3  can act as a gain stage, and the transconductor gm P2  performs an inverting operation, so as to eliminate the impact of the noise of the system voltage VDD on the output voltage Vout′. 
     Please refer to  FIG. 5B  and  FIG. 5C , which are schematic diagrams of noise of the small signal model shown in  FIG. 5A . Dotted lines shown in  FIG. 5B  denote noise entering from the transconductors gm N1 , gm N2 , gm N3 , gm P2 , gm P3 . The transconductor gm P2  is directly connected to the system voltage VDD, such that the noise entering from the transconductor gm P2  is greater. The noise of the dotted line shown in  FIG. 5B  can be eliminated by the negative feedback loop FB shown in  FIG. 5A . On the other hand, the feed-forward paths FFP 1 , FFP 3  of the dotted lines shown in  FIG. 5C  correspond to the feed-forward paths FFP 1 , FFP 3  shown in  FIG. 3 , respectively. In other words, after entering from the gate of transistor MN 2 , the noise of the system voltage VDD generates feed-forward noise to the output voltage Vout′ along the feed-forward paths FFP 1 , FFP 3 . 
     In  FIG. 5C , since the transistor MN 2  is a source follower, a source voltage V SN2  of the transistor MN 2  is a division voltage of the gate voltage V GN2 , i.e. 
                 V     SN   ⁢           ⁢   2       =       r     oN   ⁢           ⁢   1           r     oN   ⁢           ⁢   1       +     1   /     gm     N   ⁢           ⁢   2               ,         
such that the noise of the system voltage VDD affects the output voltage Vout′ via the feed-forward path FFP 1 . At this moment, the feedback capacitor CM 2  performs Miller compensation to eliminate the impact of the noise of the system voltage VDD on the output voltage Vout&#39;. If the noise of the system voltage VDD is high frequency noise, the noise of the system voltage VDD generates feed-forward noise along the feed-forward path FFP 3  through the feedback capacitor CM 2 , but the feed-forward noise along the feed-forward path FFP 3  is in phase with the negative feedback signal in the negative feedback loop FB formed by the feedback capacitor CM 1 . Therefore, the feed-forward noise can strengthen negative feedback, so as to facilitate eliminating the impact of the noise of the system voltage VDD on the output voltage Vout′, such that the output voltage Vout′ can stay within a stable range.
 
     Furthermore, an open loop transfer function A open *f can be derived from the negative feedback loop FB shown in  FIG. 5A  to clarify characteristics of the negative feedback loop FB. A frequency response of forward transfer function A open  can denoted as follows: 
     
       
         
           
             
               A 
               open 
             
             ≅ 
             
               
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                       ⁢ 
                       
                           
                       
                       ⁢ 
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     And a frequency response of feedback transfer function f can be denoted as: 
     
       
         
           
             f 
             = 
             
               
                 
                   
                     
                       1 
                       
                         gm 
                         
                           N 
                           ⁢ 
                           
                               
                           
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     Then, the whole open loop transfer function A open *f can be derived as follows: 
     
       
         
           
             
               
                 A 
                 open 
               
               · 
               f 
             
             = 
             
               
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                               3 
                             
                           
                         
                       
                     
                     ) 
                   
                 
               
             
           
         
       
     
     In addition, in order to prevent the transistors MNR 1 , MN 1 , MP 1 , MP 2  forming the current mirrors from generating the currents I 1 , I 2  with too much variation due to process mismatch, sizes of the transistors MNR 1 , MN 1 , MP 1 , MP 2  are greater than those of the other transistors. Therefore, the feedback capacitor CM 1  in the negative feedback loop FB forms a dominant pole, and a parasitic capacitor C GR2  of the transistor MP 2  is greater than those of other transistors and thus forms a second pole. As a result, the open loop transfer function A open *f of the low noise current buffer circuit  214  is shown in  FIG. 6A  and  FIG. 6B . As can be seen from  FIG. 6A  and  FIG. 6B , the open loop transfer function A open *f has a zero when the frequency is 0, which means the negative feedback loop FB does not operate when frequency is 0, i.e. the feedback capacitor CM 1  is open. Therefore, the gain rises as frequency increases until the pole 1/Ro′C M1 , and stays the same after the pole 1/Ro′C M1 , and then starts falling after the second pole gm P1 /C GP2 , and poles can be derived by the same token. As can be seen from the above, a main operating frequency range of the negative feedback loop FB is 1/Ro′C M1  to gm P1 /C GP2 , and since a numerator Ro′C M1  of the open loop transfer function A open *f is cancelled by a denominator of the open loop transfer function A open *f within this range, the loop gain is gm P2 /gm P1 , which means the noise of the system voltage VDD is eliminated. As a result, by adjusting 1/Ro′C M1  and gm P1 /C GP2 , i.e. a resistance of the output resistor Ro′, a capacitance of the feedback capacitor CM 1  and a size of the transistor MP 1 , the present invention can adjust the main operating frequency range. Besides, by adjusting gm P2 /gm P1 , i.e. a ratio of a size of the transistor MP 2  to a size of the transistor MP 1 , the present invention can adjust the loop gain. 
     Noticeably, the spirit of the present invention is to utilize the low noise current buffer circuit  214  to receive the noisy input current of the current source, and then to output the current I 2  to the output resistor Ro′ after reducing the impact of the noise of the input current and system voltage VDD by negative feedback, so as to generate the output voltage Vout′ unaffected by the noise of the input current and system voltage VDD, such that the output voltage can stay within a stable range. Those skilled in the art should make modifications or alterations accordingly. For example, the present invention is not limited to being applied in a bandgap reference circuit, and can be applied in any current voltage converter utilizing a current source to generate an output voltage. Besides, the bandgap reference circuit  22  outputs the current I 2  to the output resistor Ro′ to generate the output voltage Vout′, but methods for generating an output voltage can be similar to that of the bandgap reference circuit  20 , which outputs the current I 2  to the output resistor Ro and the diode Q 1 , or other elements, and are not limited to these. In addition, the low noise current buffer circuit  214  can be as shown in  FIG. 4  and only include the transistors MNR 1 , MN 1 , MP 1 , MP 2  and the feedback capacitor CM 1  as well. However, the noise of the system voltage VDD will generate feed-forward noise to the output voltage Vout′ along the feed-forward path FFP 2  as shown in  FIG. 4 , and the low noise current buffer circuit  214  can not preferably eliminate the impact of the noise of the system voltage VDD on the output voltage Vout′ as shown in  FIG. 3 . 
     In the prior art, since a current source is likely to experience interference by noise of a system voltage, an output voltage is affected as well and thus can not stay within a stable range. In comparison, the present invention utilizes the low noise current buffer circuit  214  to receive the input current of the current source, and then to output a current I 2  to generate the output voltage unaffected by the noise of the input current and system voltage VDD, such that the output voltage can stay within a stable range. 
     Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.