Abstract:
A method for manufacturing a resonator is presented in the present application. The method includes providing a handle substrate, providing a host substrate, providing a quartz substrate comprising a first surface opposite a second surface, applying interposer film to the first surface of the quartz substrate, bonding the quartz substrate to the handle substrate wherein the interposer film is disposed between the quartz substrate and the handle substrate, thinning the second surface of the quartz substrate, removing a portion of the bonded quartz substrate to expose a portion of the interposer film, bonding the quartz substrate to the host substrate, and removing the handle substrate and the interposer film, thereby releasing the quartz substrate.

Description:
CROSS REFERENCE TO RELATED APPLICATION 
     This is a divisional application of U.S. patent application Ser. No. 12/034,852, filed on Feb. 21, 2008, which issued as U.S. Pat. No. 7,802,356 on Sep. 28, 2010, and which is incorporated herein as though set forth in full. 
     INCORPORATION BY REFERENCE 
     U.S. Pat. No. 7,237,315 to Kubena, et al. on Jul. 3, 2007, titled “Method for fabricating a resonator,” is hereby incorporated by reference in its entirety. 
    
    
     STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT 
     The present invention was made with support from the United States Government under Grant number DAAB07-02-C-P613 awarded by Defense Advanced Project Agency (DARPA). The United States Government has certain rights in the invention. 
    
    
     BACKGROUND 
     1. Field of the Invention 
     This disclosure is generally related to resonators and in particular a method to manufacture an ultra thin quartz resonator components. 
     2. Description of Related Art 
     The use of quartz substrates in a MEMS process provides for the fabrication of high Q thermally compensated resonators. For thickness shear mode resonators, the thickness of the substrate determines its resonant frequency. The thinner the quartz substrate, the higher the resonant frequency. Therefore, by varying the dimensions of the substrate over a broad range, the resonant frequency can be adjusted over a broad range. The Q of a resonator is a measure of the frequency selectivity of a resonator and is related to how well the energy of the oscillations are trapped. One factor that influences how well the energy of the oscillations is trapped is the smoothness or planarity of the surface. When thinning a quartz substrate it is desirable to maintain a smooth undamaged surface to ensure a high Q. However, present quartz fabrication techniques for oscillators or filters do not allow the resonators to be integrated on a chip with other electronics. This is a significant contributing factor to the size and cost of a device. Using separate on chip components also contributes significantly to the size and cost of a device. 
     Furthermore, present quartz thinning processes have not be able to thin substrates to a thickness on the order of 10 micrometers or less, because of the inability to monitor the thickness of the quartz substrate in real time with sub micron resolution. Another difficulty is the handling of the quartz substrate after it has been thinned. One reference which discusses thinning quartz substrates is Takahsi Abe, Masayoshi, “One-Chip Multichannel Quartz crystal microbalance (QCM) Fabricated By Deep RIE,” Sensors and Actuators, 2000, pp. 139 143. Having a quartz substrate with a thickness on the order of 10 microns or less can result in resonant frequencies greater than 100 MHz, which is desirable for high frequency applications. By combining several quartz based resonators having different resonant frequency, with a RF MEMS switch on the same chip, frequency hopping and filter reconfiguration can occur on the microsecond time scale. In frequency hopping and filter reconfiguration the desired frequency in a band of frequencies is selected by using the RF MEMS switch to activate the quartz resonator having a resonant frequency equal to the desired frequency. The spectral band for most radio frequency hopping and filter reconfiguration applications is 20 MHz to 3 GHz. The low frequency part of the band is extremely difficult to cover with conventional capacitive-based filters since capacitive-based filters are larger in size. Frequency hopping and filter reconfiguration applications would also benefit from temperature compensated, stable, high-Q (in the amount of about 10,000), small arrays of resonators which cover that spectral band. 
     MEMS devices which consist of silicon-based nanoresonators have been fabricated in an attempt to integrate nanoresonators or microresonators with other electronics. Nanoresonators and microresonators are resonators which have linear dimensions on the order of nanometers and micrometers, respectively. These silicon-based nanoresonators have shown resonant frequencies as high as 600 MHz, and Q&#39;s in the range of 1000-2000. However, the problem with silicon-based nanoresonators is that they have high electrical impedances and lower Q&#39;s. Two documents which discuss silicon-based nanoresonators are S. Evoy, A. Olkhovets, L. Sekaric, J. M. Parpia, H. G. Craighead, D. W. Carr, “Temperature-dependent Internal Friction in Silicon Nanoelectromechanical Systems,” Applied Physics Letters, Vol. 77, Number 15, and A. N. Cleland, M. L. Roukes, “Fabrication of High Frequency Nanometer Scale Mechanical Resonators From Bulk Si Crystals,” Applied Physics Letters, Oct. 28, 1996. 
     An alternative solution, is known which makes use of non-MEMS quartz resonators. Such resonators consist of shear strip individual resonators operating in ranges of about 10 MHz to about 1 GHz. These resonators are packaged as discrete devices and mounted as hybrids to other RF circuits. The problem with non-MEMS quartz resonators is that they are non-integrable, they have higher costs, and they are physically larger in size. 
     As a result, a new process for manufacturing a quartz-based nanoresonator is desired in order to solve all the aforementioned problems. 
     SUMMARY OF THE INVENTION 
     Embodiments of the present disclosure provide a system and method for making a resonator. 
     According to a first aspect, a method for manufacturing a resonator is disclosed, the method comprising: providing a handle substrate; providing a host substrate; providing a quartz substrate comprising a first surface opposite a second surface; applying an interposer film to the first surface of the quartz substrate; bonding the quartz substrate to the handle substrate wherein the interposer film is disposed between the quartz substrate and the handle substrate; thinning the second surface of the quartz substrate; removing a portion of the bonded quartz substrate to expose a portion of the interposer film; bonding the quartz substrate to the host substrate; and removing the handle substrate and the interposer film, thereby releasing the quartz substrate. 
     According to a second aspect, a method for manufacturing a resonator is disclosed, the method comprising: providing a handle substrate; providing a quartz substrate comprising a first surface opposite a second surface; applying an interposer film to the first surface of the quartz substrate; bonding the handle substrate to the interposer film; thinning the second surface of the quartz substrate; forming at least one metallized via in the quartz substrate; providing a base substrate; bonding the quartz substrate to the base substrate; and removing the handle substrate, thereby releasing the quartz substrate 
     Other systems, methods, features, and advantages of the present disclosure will be, or will become apparent, to one having ordinary skill in the art upon examination of the following drawings and detailed description. It is intended that all such additional systems, methods, features, and advantages included within this description, be within the scope of the present disclosure, and be protected by the accompanying claims. 
    
    
     
       DESCRIPTION OF THE DRAWING(S) 
       Many aspects of the disclosure can be better understood with reference to the following drawings. Components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating principles of the present disclosure. Moreover, in the drawing, like-referenced numerals designate corresponding parts throughout the several views. 
         FIG. 1  shows a quartz substrate, handle substrate and host substrate, to be used in accordance with the present application; 
         FIG. 2A  shows a side view of the quartz substrate with photoresist; 
         FIG. 2B  shows a top view of the quartz substrate with photoresist; 
         FIG. 3A  shows a side view of the first surface of the quartz substrate with first electrode, an interconnect trace and an interconnect pad; 
         FIG. 3B  shows a top view of the quartz substrate with first electrode, an interconnect trace and an interconnect pad; 
         FIG. 4  shows a side view of the quartz substrate with an interposer film; 
         FIG. 5  shows a side view of the quartz substrate with planarized interposer film; 
         FIG. 6  shows a side view of the planarized interposer film bonded to the handle substrate; 
         FIGS. 7-9  show the thinning of the quartz substrate while bonded to the handle substrate; 
         FIGS. 10 and 11  show two methods used to monitor the thickness of the quartz substrate while being thinned; 
         FIG. 12  shows a top view of the quartz substrate with a via; 
         FIG. 13  shows a top view of the second surface of the quartz substrate having a second electrode, interconnect trace and interconnect pads; 
         FIG. 14A  shows a side view wherein a portion of the quartz substrate has been removed; 
         FIG. 14B  shows a top view wherein a portion of the quartz substrate has been removed; 
         FIG. 15  shows a portion of the base substrate having been removed; 
         FIG. 16  shows a top view of the base substrate with probe pads; 
         FIG. 17  shows a side view of the bond between the probe pads of the base substrate and the interconnect pads on the second surface of the quartz substrate; and 
         FIG. 18A-18B  shows a side and top view of the bond between the probe pads of the base substrate and the interconnect pads on the second surface of the quartz substrate and release of handle wafer and removal of the interposer layer. 
     
    
    
     DETAILED DESCRIPTION 
     The present disclosure relates to a system and method for making a quartz layer for use in a quartz resonator. Specifically, the system and method may be used to make a quartz resonator, for example, for software programmable radios, chip-scale atomic clocks, X-band radars, chemical/biological warfare agent detection, and multi-band cellular phones. 
     A method of fabricating a quartz resonator according to the present disclosure will now be described with reference to  FIGS. 1-18 . A quartz layer/substrate  202  having a first surface  3  and a second surface  5 , a handle layer/substrate  204 , and a host layer/substrate  206  are provided as shown in  FIG. 1 . The handle substrate  204  may be comprised of a group III-V material, Si or SiGe. 
     The first surface  3  of the quartz substrate  202  is then patterned and metallized using, for example, a lift-off technique. In the lift-off technique, a thin layer of photoresist  7  is patterned on the first surface  3  of the quartz substrate  202 , as shown in side view  FIG. 2A  and top view  FIG. 2B . Using lithography, photoresist is removed in the regions where metallization is desired. The metal is then deposited on the photoresist  7  and in the regions where the photoresist  7  was removed. The photoresist is then removed leaving metal only in the desired regions on the first surface  3  of the quartz substrate  202  as shown in side view  FIG. 3A  and top view  FIG. 3B . During patterning and metallizing a first electrode  209  is deposited on the first surface  3  of the quartz substrate  202 . The first electrode  209  may be comprised of a combination of Al, Ti/Au or Cr/Au, deposited in that order on the quartz layer  202 . Additionally, an interconnect trace  205  and an interconnect pad  208  may also be formed on the quartz layer  202 . The interconnect trace  205  and the interconnect pad  208  may be comprised of the same material as the first electrodes  209  or may comprise, for example, Ti/Pt/Au or Cr/Pt/Au. The purpose of the first electrode  209 , the interconnect trace  205  and the interconnect pad  208  will be discussed later. The first electrode  209  may have a thickness of, for example, about 200 Å to about 1000 Å. The interconnect trace  205  and the interconnect pad  208  may have a thickness of, for example, about 1000 Å to about 5000 Å. In one exemplary embodiment, the first electrode  209  may be deposited on the quartz layer  202  either before or after deposition of the interconnect trace  205  and/or the interconnect pad  208 . 
     An interposer film  210  is deposited on the quartz layer  202  to cover the first electrode  209 , the interconnect trace  205  and the interconnect pad  208  as shown in side view  FIG. 4 . The interposer film  210  may be, for example, an amorphous silicon film, a polyimide material, a resist material or any other material that is bondable, able to be planarized and be removed during processing. To avoid non-planarity due to a presence of the first electrode  209 , the interconnect trace  205  and the interconnect pad  208 , the interposer film  210  may be planarized as shown in  FIG. 5 . Planarization of the interposer film  210  may be accomplished by a chemical-mechanical-planarization (CMP) process. 
     After planarization of the interposer film  210 , the handle layer  204  may be bonded to the interposer film  210  as shown in side view  FIG. 6 . For example, the bonding may be performed using an EV  501  Wafer Bonder, which is commercially available or other similar processes and devices. To wafer bond the handle layer  204  to the interposer film  210 , the handle layer  204  and the interposer film  210  are thoroughly cleaned in a megasonic cleaning system, which makes use of ultrasonic waves to remove particle contaminants. After the handle layer  204  and the interposer film  210  are cleaned, they are brought in contact with each other. The contact between the handle layer  204  and the interposer film  210  creates a bond due to the well known van der Waals force. The first electrodes  209 , the interconnect trace  205  and the interconnect pad  208  are now sandwiched between the handle layer  204  and the interposer film  210 . Other interposer layers such as resist, polymide, glue, etc. may also be used instead of interposer film  210  as long they can be removed at low temperatures. 
     After the bonding process, the quartz layer  202  undergoes a thinning process ( FIGS. 6-9 ). In order to thin the quartz layer  202 , the following method may be used. For exemplary purposes only, the quartz layer  202  has an initial thickness of about 500 micrometers as shown in side view  FIG. 6 . A first portion of the quartz layer  202  may be removed by thinning the quartz substrate from about 500 micrometers to about 50 micrometers as shown in side view  FIG. 7  using, for example, a mechanical lapping and polishing system or wafer grinding. Lapping and polishing systems are well known and commercially available from manufacturers such as Logitech. In a mechanical lapping and polishing system, a polishing head is spun at a high rate of speed. The lapping and polishing system also comprises a nozzle for dispensing slurry on the quartz layer  202 . While spinning, the polishing head contacts the quartz layer/substrate in the presence of the slurry, thereby evenly grinding away portions of the quartz layer/substrate  202 . The slurry may be comprised of chemicals such as aluminum oxide to remove quartz from the quartz substrate  202 . 
     Next, a second portion of about 1 micrometer of quartz is removed from the quartz substrate  202  as shown in side view  FIG. 8  to ensure a smooth surface. This may be done with the above described mechanical lapping and polishing system, except a softer chemical such as colloidal silica or cerium oxide is used in the slurry to remove quartz from the quartz substrate  202 . Alternatively, chemical-mechanical polishing (CMP) can be used to polish the quartz substrate  202  and remove damage. 
     Next, a third portion of the quartz substrate  202  may be removed to reduce the thickness of the quartz substrate  202  to less than 10 micrometers as shown in side view  FIG. 9  using, for example, reactive ion etching (RIE) with CF 4  or SF 6 gas  9  as shown in side view  FIGS. 10-11 . While being thinned in the RIE machine, the thickness of quartz substrate  202  may be simultaneously monitored using spectropic ellipsometry or reflectometry techniques as shown in side view  FIGS. 10-11 . In spectroscopic ellipsometry, shown in side view  FIG. 10 , a beam of white light  18  from a source  19  is shone onto the quartz substrate  202  at an angle of about 15° off horizontal. The white light has a known polarization. The reflected white light  20  off the quartz substrate  202  will have a different polarization which is directly related to the thickness of the quartz substrate  202 . A receiver  21  receives the reflected white light  20  and calculates the change in polarization. The change in polarization is directly proportional to the thickness of the quartz substrate  202 . In reflectometry, shown in  FIG. 11 , a laser source  22  shines light  23 , with a known wavelength, onto the second surface  5  of the quartz substrate  202  at an angle of 90° off horizontal as shown in side view  FIG. 11 . A first reflected beam  24  is reflected off the second surface  5  of the quartz substrate  202 . A portion of the incident light also penetrates through the quartz substrate  202 . This creates a second reflected beam  25  that is reflected off the first surface  3  back through the quartz substrate  202  and out the second surface  5 . The first reflected beam  24  and second reflected beam  25  are parallel to each other and are received by a receiver  26  which determines whether the first reflected beam  24  and the second reflected beam  25  add constructively or destructively. If the first and second reflected beams  24 ,  25  add constructively, the thickness of the quartz substrate is equal to 50% of the ratio of the incident light wavelength divided by the refractive index of quartz, or an integer multiple thereof, such as 100%, 150%, etc. The refractive index of quartz is typically about 1.46. If the first and second reflected beams  24 ,  25  add destructively, the thickness of the quartz substrate  202  is equal to 25% of the ratio of the incident light wavelength divided by the refractive index of quartz, or an odd integer multiple thereof, such as 75%, 125%, etc. 
     After using RIE to remove quartz from the quartz substrate  202 , the surface of the quartz substrate  202  may have imperfections that may need to be corrected. This can be done by using the mechanical lapping and polishing system described above with a chemical such as silica or cerium oxide, to remove about 0.01 to about 0.02 micrometers of quartz, followed up with a wet etch in ammonium bifluoride to remove about 0.005 micrometers of quartz from the quartz substrate  202  as shown in side view  FIG. 9 . This additional step will help ensure a polished, defect free quartz substrate  202 . 
     After the quartz substrate  202  is thinned, via  212  is etched and metallized through the quartz layer  202  as shown in top view  FIG. 12 . Doted lines in top view  FIG. 12  represent the first electrode  209 , the interconnect trace  205  and interconnect pad  208  that are disposed on the side  3  of the quartz substrate  202 . The via  212  may be created using lithography techniques well known in the art. The via  212  is etched and metallized above the interconnect  208  and is electrically connected with the interconnect pad  208 . 
     Once the via  212  is fabricated, the side  5  of the quartz substrate  202  is patterned and metallized using the lift-off technique to form at least one second electrode  215  as shown in the top view  FIG. 13 . The second electrode  215  may be comprised of a combination of Al, Ti/Au or Cr/Au, deposited in that order on the side  5  of the quartz substrate  202 . Additionally, an interconnect trace  206  and interconnect pads  214 A and  214 B may also be formed on the side  5  of the quartz layer  202 . The interconnect pad  214 A is electrically connected to the second electrode  215  through the trace  216  as shown in top view  FIG. 13 . The interconnect pad  214 B may be electrically connected to the interconnect pad  208  though the via  212  as shown in the side view  FIG. 14A . The interconnect trace  216  and interconnect pads  214 A and  214 B may be comprised of the same material as the second electrode  215  or may comprise, for example, Ti/Pt/Au or Cr/Pt/Au. 
     Once the electrode  215 , the interconnect trace  216  and the interconnect pads  214 A and  214 B have been deposited, a portion of the quartz substrate  202  is removed to expose a portion of the interposer film  210 , thereby creating a modified quartz substrate  202 A as shown in side view  FIG. 14A  and top view  FIG. 14B . Such portion may be removed using lithography and REI techniques well known in the art to divide the quartz substrate into individual devices and determine the desired dimensions of the quartz substrate  202 . 
     The first and second electrodes  209 ,  215  on the modified quartz substrate  202 A allow the resonant frequency of the quartz substrate  202 A to be adjusted. By ablating a portion of the first and second electrodes  209 ,  215 , the resonant frequency of the quartz substrate  202 A can be adjusted. The first and second electrodes  209 ,  215  can be ablated using known techniques such as ion beam milling or laser ablation. 
     As already mentioned above with reference to the detailed description of  FIG. 1 , a host substrate  206  is provided. The host substrate  206  may be comprised of a group III-V material or SiGe. Side view  FIG. 15  shows a modified host substrate  206 A, where a portion of the host substrate  206  shown in  FIG. 1  has been removed. The removal of a portion of the host substrate  206  may be done using lithography techniques well known in the art. At least two probe pads  220  may be deposited on the modified host substrate  206 A as shown in top view  FIG. 16 . The probe pads  220  may be deposited using the same lift off technique used to deposit the at least one first electrode  209  discussed previously. The probe pads  220  may be comprised of a gold/germanium alloy, nickel, and gold deposited in that order. 
     After the probe pads  220  have been deposited on the modified host substrate  206 A, the interconnect pads  214 A and  214 B of the modified quartz substrate  202 A are bonded with, for example, bond metal to the probe pads  220  along bonding line  218  as shown in side view  FIG. 17  using, for example, an Au—Au compression bonding scheme. In the Au—Au compression bonding scheme, the quartz substrate  202 A, the interconnect pads  214 A and  214 B, the probe pads  220 , and the modified base substrate  206 A are heated to a temperature greater than 300° C. in a vacuum having a pressure no greater than 10 −4  Torr. Then the interconnect pads  214 A and  214 B and probe pads  220  are pressed together, while depressurized, with a pressure of approximately 1 MPa. This will fuse the probe pads  220  and the interconnect pads  214 A and  214 B together as shown in side view  FIG. 17 . In one example, the bond metal may comprise, for example, Ti/In or Ti/Sn. 
     The above described bonded structure provides electrical access from one of the probe pads  220  to the electrode  215  through the interconnect pad  214 A and the interconnect trace  216 . The above described bonded structure also provides electrical access from the other probe pad  220  to the electrode  209  through the interconnect pad  214 B, the via  212 , the interconnect pad  208  and the interconnect trace  205 . After the interconnect pads  214 A and  214 B have been bonded to the probe pads  220 , the handle substrate  204  and film  210  may be removed from the remaining structure, using a combination of wet and dry etches so that a structure like the one shown in the side view  FIG. 18A  and top view  FIG. 18B  is obtained. 
     The purpose of the first and second electrodes  209 ,  215  is to receive an electrical signal from the probe pads  220  which can bias or drive the modified quartz substrate  202 A with an electric field. The electrical signal is preferably an AC signal. When the electrical signal is received by the first and second electrodes  209 ,  215  a strain signal is placed on the modified quartz substrate  202 A. When the frequency of this strain signal matches the mechanical resonant frequency of the modified quartz substrate  202 A, thereby causing the modified quartz substrate  202 A to oscillate at its resonant frequency, a large signal is produced on the electrodes  209 ,  215  by the well-known piezoelectric effect. 
     As used in this specification and appended claims, the singular forms “a,” “an,” and “the” include plural referents unless the specification clearly indicates otherwise. The term “plurality” includes two or more referents unless the specification dearly indicates otherwise. Further, unless described otherwise, all technical and scientific terms used herein have meanings commonly understood by a person having ordinary skill in the art to which the disclosure pertains. 
     As a person having ordinary skill in the art would appreciate, the elements or blocks of the methods described above could take place at the same time or in an order different from the described order. 
     The foregoing detailed description of exemplary and preferred embodiments is presented for purposes of illustration and disclosure in accordance with the requirements of the law. It is not intended to be exhaustive nor to limit the invention to the precise form(s) described, but only to enable others skilled in the art to understand how the invention may be suited for a particular use or implementation. The possibility of modifications and variations will be apparent to practitioners skilled in the art. No limitation is intended by the description of exemplary embodiments which may have included tolerances, feature dimensions, specific operating conditions, engineering specifications, or the like, and which may vary between implementations or with changes to the state of the art, and no limitation should be implied therefrom. Applicant has made this disclosure with respect to the current state of the art, but also contemplates advancements and that adaptations in the future may take into consideration of those advancements, namely in accordance with the then current state of the art. It is intended that the scope of the invention be defined by the Claims as written and equivalents as applicable. Reference to a claim element in the singular is not intended to mean “one and only one” unless explicitly so stated. Moreover, no element, component, nor method or process step in this disclosure is intended to be dedicated to the public regardless of whether the element, component, or step is explicitly recited in the claims. No claim element herein is to be construed under the provisions of 35 U.S.C. Sec. 112, sixth paragraph, unless the element is expressly recited using the phrase “means for . . . ” and no method or process step herein is to be construed under those provisions unless the step, or steps, are expressly recited using the phrase “step(s) for . . . ”