Abstract:
An encoding apparatus includes an input section which inputs image data, and a calculating section which calculated DCT coefficients of a predetermined frequency region on the basis of the image data. A decision unit judges a correlation of the image data on the basis of the DCT coefficients calculated by the calculating section, and a transforming section performs an orthogonal transformation to the image data in accordance with an output of the decision unit. An encoding section encodes the image data transformed by the transforming section. Also included is an encoding and decoding apparatus having an input section which inputs information data, and an orthogonal transforming section which performs an orthogonal transforation of the input information data. An encoding section encodes the transformation data transformed by the orthogonal transforming section, and a decoding section decodes the encoding data encoded by the encoding section by using the orthogonal transforming section.

Description:
This application is a continuation of application Ser. No. 08/217,280 filed Mar. 24, 1994, now abandoned. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an encoding/decoding apparatus which can accomplish a high efficient encoding of input information data. 
     2. Related Background Art 
     In association with the digitization of an image signal, a high efficient encoding technique is also important. 
     There is an orthogonal transformation encoding as effective means for high efficient encoding. According to the orthogonal transformation, an input time-sequential signal is transformed into an orthogonal component (for example, frequency component). 
     As specific examples of the orthogonal transformation, a Fourier transformation, a discrete cosine transformation (hereinafter, abbreviated to DCT), a Hadamard transformation, and the like are known. In particular, the DCT is considered as an orthogonal transformation suitable for image information. 
     An encoding method using the DCT will now be described. 
     FIG. 1 is a block diagram of a conventional encoding apparatus using the DCT. 
     In FIG. 1, a digital image signal which is input from an input section 1 is divided into blocks on a DCT unit basis by a block forming circuit 2. As a size of each of the divided blocks, a 2-dimensional DCT block of total 64 pixels comprising [(eight pixels in the horizontal direction)×(eight pixels in the vertical direction)] is frequently used. 
     The block-formed image signal is two-dimensionally DCT transformed by a DCT circuit 3 into a DCT component. 
     The transformed DCT component is quantized by a quantization circuit 4 and is variable length encoded by a variable length encoding circuit 5. The encoded data is converted to a data of a predetermined rate by a buffer memory 6 and is output therefrom. 
     In recent encoding apparatus using the DCT, an apparatus for efficiently encoding by using an inter-field correlation has been proposed. 
     Namely, when the inter-field correlation is weak (low), the intra-field DCT (a DCT process is executed in the block comprising 4×8 pixels) is executed (refer to FIG. 2B) (hereinafter, referred to as a field transforming mode) and, when the inter-field correlation is strong (high), the intra-frame DCT (a DCT process is executed in the block comprising 8×8 pixels) is executed (hereinafter, referred to as a frame transforming mode), thereby raising an encoding efficiency (refer to FIG. 2A). 
     A conventional selecting method of selecting a transforming mode will now be described hereinbelow. 
     Differential absolute values between the even field pixels of the block (8×8 pixels) which is read out from the block forming circuit 2 and the odd field pixels which are one field after the even field pixels are calculated, the intra-block total of those differential absolute values is calculated, and its total value is compared with a predetermined threshold value, thereby selecting the transforming mode in accordance with the result of the comparison (namely, a field correlation is detected). 
     In the above judgment, a selection regarding whether the signal can be concentrated into a lower frequency region is made by executing the transforming process the selected modes (frame/field). That is namely, in case of encoding, a selection regarding whether an amount of codes which are generated is smaller by executing the selected transforming process becomes a problem. 
     Therefore, a fairly large circuit is needed to accurately select the proper transforming mode. In addition, since it takes a predetermined processing time until the transforming mode is selected, an inconvenience occurs in case of a moving image which needs a real-time process. 
     In the conventional transforming mode selecting method as mentioned above, for instance, in the case where there is a correlation of every two lines in the data in the block, a large difference occurs when comparing FIGS. 3 and 4A. 
     Namely, when the transforming mode is selected by the conventional method as mentioned above, in FIG. 3, it is judged that the inter-field correlation is high, so that the frame transforming mode is selected. In FIG. 4A, it is judged that the inter-field correlation is low, so that the field transforming mode is selected. 
     When the DCT process is executed for the block data shown in FIG. 4A, the data in the block is rearranged as shown in FIG. 4B. The block data is divided into an even field pixel data block and an odd field pixel data block. The DCT process is executed for each block. In this case, therefore, as transformation coefficients of the even/odd field pixel data block, a coefficient also exists in the high frequency region, so that an inconvenience such that an encoding efficiency is contrarily deteriorated occurs. 
     SUMMARY OF THE INVENTION 
     Under such circumstances, it is an object of the present invention to provide an encoding apparatus which can accomplish a high efficient encoding even when any information data is input. 
     For this purpose, according to one preferred embodiment, there is provided an encoding apparatus having input means for inputting image data; calculating means for calculating DCT coefficients in a predetermined frequency region on the basis of the image data; decision means for deciding a correlation of the image on the basis of the DCT coefficients calculated by the calculating means; transforming means for performing an orthogonal transformation to the image data in accordance with an output of the decision means; and encoding means for encoding the image data transformed by the transforming means. 
     Another object of the invention is to provide an encoding and decoding apparatus which can accomplish high efficient encoding/decoding without enlarging a circuit scale even when any information data is input. 
     For this purpose, according to another preferred embodiment, there is provided an encoding/decoding apparatus having input means for inputting information data; orthogonal transforming means for performing an orthogonal transformation to the input information data; encoding means for encoding the transformation data transformed by the orthogonal transforming means; and decoding means for decoding the encoding data encoded by the encoding means by using the orthogonal transforming means. 
     Other objects and advantages of the invention will become apparent from the following detailed description taken in conjunction with the appended claims. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram of an encoding apparatus using a conventional DCT; 
     FIGS. 2A and 2B are diagrams for describing DCT blocks in case of dividing an even field pixel train and an odd field pixel train; 
     FIG. 3 is a diagram showing an example in which a frame transforming mode is selected by a conventional transforming mode selecting method; 
     FIGS. 4A and 4B are diagrams showing an example in which a field transforming mode is selected by the conventional transforming mode selecting method; 
     FIG. 5 is a block diagram of a digital VTR of a first embodiment according to the present invention; 
     FIG. 6 is a block diagram of a digital VTR of a second embodiment according to the invention; 
     FIG. 7 is a block diagram of a digital VTR of a third embodiment according to the invention; 
     FIG. 8 is a diagram showing (8×8) pixel block data; 
     FIG. 9 is a diagram showing DCT coefficients which are used in the judgment of a field correlation in the third embodiment; 
     FIGS. 10A and 10B are diagrams for explaining a method of reading out block data which was DCT transformed; 
     FIG. 11 is a block diagram of a digital VTR of the fourth embodiment according to the invention; and 
     FIG. 12 is a diagram showing DCT coefficients which are used in the judgment of a field correlation in the fourth embodiment. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     A digital VTR of the first embodiment according to the present invention will now be described hereinbelow with reference to the drawings. 
     FIG. 5 is a block diagram of the digital VTR of the first embodiment according to the invention. 
     In FIG. 5, reference numeral 10 denotes an input section to input a digital image signal; 11 a block forming circuit; 12 an orthogonal transform circuit for performing a DCT transformation; 13 a selection circuit; 14 an encoding circuit; 15 a recording circuit; 16 a recording head; 17 a magnetic tape; 18 a reproducing head; 19 a reproduction circuit; 20 a decoding circuit; 21 an (inverse) orthogonal transform circuit; 22 an output circuit; 23 an operation unit; 24, 25, and 26 change-over switches; and 27 an output section for outputting the decoded digital image signal. 
     The recording and reproducing processing operations of the digital VTR constructed as shown in FIG. 5 will now be described hereinbelow. 
     The processing operation upon recording will now be described. 
     By instructing the recording operation by the operation unit 23, each of the change-over switches 24, 25, and 26 is connected to the (a) side. 
     The digital image signal supplied to the block forming circuit 11 is processed to form blocks (8×8). 
     The block formation processed image data is input to the (inverse) orthogonal transform circuit 21 through the orthogonal transform circuit 12 and changeover switch 24. The orthogonal transform circuit 12 is an exclusive-use orthogonal transform circuit which is used only for the frame transformation, namely, for (8×8)-blocks. 
     The image data which was DCT transformed by the orthogonal transform circuit 12 is output to the selection circuit 13. 
     On the other hand, the (inverse) orthogonal transform circuit 21 can execute the field transformation (4×8×2) upon recording and can perform the field/frame inverse conversion upon reproduction. 
     The orthogonal transformation and the inverse orthogonal transformation are switched by the changeover switch 26. 
     The (inverse) orthogonal transform circuit 21 executes the DCT transformation by the field transformation (4×8×2) to the (8×8) block data which was output from the block forming circuit 11 and supplies the transformed image data to the selection circuit 13. 
     Upon recording, the image data which is output from the orthogonal transform circuit 12 and the (inverse) orthogonal transform circuit 21 is the data which was read out in accordance with the order of the numbers shown in FIGS. 10A and 10B. 
     The selection circuit 13 compares the frame transformation data from the orthogonal transform circuit 12 and the field transformation data from the (inverse) orthogonal transform circuit 21 and selects either one of the frame and field transforming modes. 
     As a selecting method in this instance, a check is made to see if a larger amount of data of which one of the transformation data is concentrated in a low frequency component, and the transformation data which is more concentrated is selected. 
     The selection circuit 13 provides to the recording circuit 15 a selection signal S10 to make it possible to discriminate which one of the frame and field transforming modes is selected. 
     The transformation data which is output from the selection circuit 13 is quantized and variable length encoded by the encoding circuit 4, thereby reducing a data amount. 
     An error correction code and the, selection signal S10, are added by the recording circuit 15 to the data which was encoded by the encoding circuit 14. The resultant data is subjected to a predetermined modulating process for recording. 
     The information data processed by the recording circuit 15 is recorded onto the magnetic tape 17 by the recording head 16. 
     The processing operation upon reproduction will now be described hereinbelow. 
     First, when the reproducing operation is instructed by the operation unit 23, each of the switches 24 to 26 is connected to the (b) side. 
     The information data recorded on the magnetic tape 17 is read out by the reproducing head 18 and is subjected to a demodulating process and an error correcting process by the reproduction circuit 19, thereby reproducing the recorded selection signal together with the image data. 
     The decoding circuit 20 decodes variable length encoding data. 
     The decoding data generated from the decoding circuit 20 is supplied to the (inverse) orthogonal transform circuit 21. 
     The (inverse) orthogonal transform circuit 21 executes an inverse orthogonal transformation (inverse DCT) of the frame or field transformation on the basis of the selection signal from the reproducing circuit 19. 
     The image data processed by the (inverse) orthogonal transforming circuit 11 is subjected to a concealment process or the like of error uncorrectable data by the output circuit 22, so that the reconstructed digital image signal is output from the output section 27. 
     As described above, by commonly using the orthogonal transform circuit on the reproducing side upon recording, the transforming mode (field/frame) such that a data amount upon encoding is certainly reduced without enlarging a circuit scale can be selected. Further, a high efficient encoding process can be performed at a high speed. 
     A digital VTR of the second embodiment according to the invention will now be described hereinbelow with reference to the drawings. 
     FIG. 6 is a block diagram of the digital VTR of the second embodiment according to the invention. In FIG. 6, the same or corresponding portions as those shown in FIG. 5 are designated by the same reference numerals and their descriptions are omitted here. 
     In FIG. 6, reference numeral 28 denotes an encoding circuit and 29 a selection circuit to select either one (namely, the data having a smaller amount of information) of the two encoding data encoded by the encoding circuits 14 and 28. 
     The recording and reproducing processes of the apparatus constructed as shown in FIG. 6 will now be described hereinbelow. Only the processing operations different from those in the first embodiment will now be described. 
     The image data which was frame transformed (8×8) by the orthogonal transform circuit 12 is encoded by the encoding circuit 14 and is output to the selection circuit 29. The image data which was field transformed (4×8×2) by the (inverse) orthogonal transform circuit 21 is encoded by the encoding circuit 24 and is output to the selection circuit 29. 
     The selection circuit 29 compares an amount of data which was encoded by the frame transformation and an amount of data which was encoded by the field transformation and selects the encoded data in which a data amount is smaller. The selection circuit 29 outputs the selected data. The subsequent processes are omitted because they are substantially the same as those in the first embodiment. 
     In the second embodiment as mentioned above, since either one of the frame transformation and the field transformation is selected on the basis of the amount of encoding data after completion of the encoding, a smaller amount of encoding data can be certainly selected. 
     A digital VTR of the third embodiment according to the present invention will now be described hereinbelow with reference to the drawings. 
     FIG. 7 is a block diagram of the digital VTR of the third embodiment according to the invention. 
     In FIG. 7, reference numeral 30 denotes an input section to input a digital image signal; 31 a block forming circuit to divide the input signal into (8×8)-blocks; 32 a DCT base weighting circuit; 33 an absolute value circuit; 34 an addition circuit; 35 a decision circuit; 36 a buffer memory; 37 an operation unit for switching the recording and reproducing processes; 38 and 41 change-over switches; 39 an (8×8) (inverse) DCT circuit to perform the frame transformation; 40 a (4×8×2) (inverse) DCT circuit to perform the field transformation; 42 a quantization circuit; 43 a variable length encoding circuit; 44 a buffer memory; 45 a recording circuit; 46 a recording head; 47 a magnetic tape; 48 a reproducing head; 49 a reproduction circuit; 50 a decoding circuit; 51 an inverse quantization circuit; 52 an output circuit; and 53 an output section to output digital image data which was decoded. 
     The recording and reproducing processing operations of the digital VTR constructed as shown in FIG. 7 will now be described hereinbelow. 
     The processing operation upon recording will be first described. 
     By instructing the recording operation by the operation unit 37, the change-over switch 41 is connected to the R side. The change-over switch 38 is switched by an instruction of the decision circuit 35. Further, the (8×8) (inverse) DCT circuit 39 and the (4×8×2) (inverse) DCT circuit 40 are switched to the DCT transforming (sampling data→frequency data) process. 
     The digital image signal supplied from the input section 30 is divided into the blocks each comprising (8×8) pixels by the block forming circuit 31. 
     The image data which was block formed by the block forming circuit 31 is supplied to the DCT base weighting circuit 32. A high frequency DCT base is weighted and added to the pixel data in the vertical direction in the block by the DCT base weighting circuit 32. 
     The absolute value of an output from the DCT base weighting circuit 32 is calculated by the absolute value circuit 33. 
     The addition circuit 34 adds the output data in every vertical direction from the absolute value circuit 33, so that the sum of all of the absolute values in the entire block is calculated. 
     The above calculating process will now be specifically described. 
     The seventh order DCT base as a highest degree in the case of the (8×8) DCT is given by: 
     
         cos [{(2k+1)×7π}/16] k=0 to 7 
    
     Therefore, the seventh order DCT base is (0.195, -0.556, 0.831, -0.981, 0.981, -0.831, 0.556, -0.195). 
     As shown in FIG. 8, now assuming that the pixel data of the block of (8×8) pixels is e0, e1, e2, . . . , e31, o0, o1, o2, . . . , o31, the above DCT base is weighted and added to the pixel data of e0, o0, e1, o1, e2, o2, e3, and o3 and the absolute value is calculated. Similar calculations are subsequently executed to the pixel data of e4, o4, e5, o5, e6, o6, e7, and o7. In a manner similar to the above, similar calculations are executed for all of the 64 pixel data in the block. The resultant absolute values are added by the addition circuit 34. 
     Namely, in the DCT base weighting circuit 32, absolute value circuit 33, and addition circuit 34, the following calculations are executed for each (8×8) block. ##EQU1## 
     By executing the above calculations, the total of the absolute values of the coefficients in the high frequency component in the vertical direction of the DCT coefficients of the (8×8)-block is calculated (hatched portions in FIG. 9). 
     Characteristics of the DCT coefficients will now be described. 
     Generally, an image has a high correlation between adjacent pixels. When the DCT process is executed on the image, only the DC coefficients (DC component) and the AC component (alternating current component) of the low frequency component have values. The AC coefficients of the high frequency component has values near 0. That is, when the correlation in the image is high, large values are concentrated in a partial small number of coefficients due to the DCT process. 
     Therefore, by executing the quantization, the coefficient values of the high frequency component becomes almost 0. It is sufficient to encode only the coefficients of a remaining partial low frequency component, so that the data can be efficiently compressed. 
     That is, when the correlation among the pixels is strong, the coefficients of the high frequency component have small values. When the correlation among the pixels is small, large values are generated as coefficients of the high frequency component. 
     By using the above DCT characteristics, when the DCT coefficient (value which is output from the addition circuit 34) of the high frequency component in the vertical direction has a value larger than a predetermined threshold value, the decision circuit 35 judges that the inter-field correlation is small, so that the change-over switch 38 is connected to the (b) side so as to execute the field transformation. When the DCT coefficient has a value smaller than the threshold value, it is judged that the inter-field correlation is small, so that the switch 38 is connected to the (a) side so as to execute the frame transformation. 
     When it is judged by the above decision method that the inter-field correlation is small, the switch 38 is connected to the (a) side by the decision circuit 35, so that the block image data stored in the buffer memory 36 is input to the (8×8) DCT circuit 39 for performing the frame transformation. 
     On the other hand, when it is judged that the inter-field correlation is large, the switch 38 is connected to the (b) side by the decision circuit 35. Thus, the block image data is sent to the (4×8×2) DCT circuit 40 to perform the field transformation. 
     A selection signal S20 indicating which one of the frame transformation and the field transformation was selected is supplied from the decision circuit 35 to the recording circuit 45. 
     The transformed block data is input to the quantization circuit 42 through the change-over switch 41 (R side) and is quantized. The quantized image data is encoded by the variable length encoding circuit 43 and is transformed into the data of a predetermined rate by the buffer memory 44 and is sent to the recording circuit 45. 
     The recording circuit 45 adds an error correction code, selection signal S20, and the like to the encoded data and executes a predetermined modulating process for recording. 
     The information data processed by the recording circuit 45 is recorded onto the magnetic tape 47 by the recording head 46. 
     The data which is output from the (8×8) DCT circuit 39 is the data which was read out in accordance with the order of the numbers shown in FIG. 10A. The data which is output from the (4×8×2) DCT circuit 40 is the data which was read out in accordance with the order of numbers shown in FIG. 10B. 
     The processing operation upon reproduction will now be described hereinbelow. 
     First, when the reproducing operation is instructed by the operation unit 37, the change-over switch 41 is connected to the P side. The switching operation of the switch 38 is controlled by the selection signal S20 from the reproduction circuit 49. Further, the (8×8) (inverse) DCT circuit 39 and the (4×8×2) (inverse) DCT circuit 40 are switched to the inverse DCT transforming (frequency data→sampling data) process. 
     The information data recorded on the magnetic tape 47 is read out by the reproducing head 48 and is subjected to the demodulating process and error correcting process by the reproduction circuit 49, thereby reproducing the recorded selection signal S20 together with the image data. 
     The decoding circuit 50 decodes the variable length encoding data. 
     The decoding data which was output from the decoding circuit 50 is inversely quantized by the inverse quantization circuit 51. 
     The inversely quantized data is input to the (8×8) (inverse) DCT circuit 39 or (4×8×2) (inverse) DCT circuit 40 through the change-over switch 38 and is subjected to a process which is different from the DCT transformation which was executed in the recording mode. The inversely DCT transformed image data is subjected to a concealment process or the like of the error uncorrectable data by the output circuit 22, so that the reconstructed digital image signal is output from the output section 27. 
     The switching operation of the switch 38 is controlled on the basis of the selection signal S20 which was output from the reproduction circuit 49. 
     A digital VTR of the fourth embodiment according to the invention will now be described hereinbelow with reference to the drawings. 
     FIG. 11 is a block diagram of the digital VTR of the fourth embodiment according to the invention. In FIG. 11, the same or corresponding portions as those shown in FIG. 7 are designated by the same reference numerals and their descriptions are omitted here. 
     In FIG. 11, reference numeral 54 denotes a decision circuit to decide a size of the field correlation. 
     The decision circuit 54 differs from the decision circuit 35 with respect to a point that the preset threshold value differs. 
     In the fourth embodiment, the connecting order of the absolute value circuit 33 and addition circuit 34 differs from that in the apparatus of the third embodiment. 
     Namely, the data which is input to the decision circuit 54 has the values of the DCT coefficients (hatched portions in FIG. 12) in the horizontal direction of the high frequency component in the vertical direction. By comparing those values with a preset threshold value, the size of inter-field correlation is judged. 
     The descriptions of the portions other than the above points are omitted here because they are substantially the same as those in the third embodiment. 
     The present invention can be embodies in other various forms without departing from the spirit and main feature of the invention. 
     For instance, in the description of each of the above embodiments, the block forming circuit has divided the input signal into blocks each comprising (6×8) pixels. However, the invention is not limited to such an example. The orthogonal transform circuit described in each of the above embodiments has switched the DCT process and the inverse DCT process by the control signal. However, it is also possible to use an orthogonal transform circuit which execute an inverse DCT process when the signal is input from the direction that is quite opposite to that upon encoding. 
     In other words, the foregoing description of the embodiments has been given for illustrative purposes only and is not to be construed as imposing any limitation in any respect. 
     The scope of the invention is, therefore, to be determined solely by the following claims and not limited by the text of the specification and alterations made within a scope equivalent to the scope of the claims fall within the true spirit and scope of the invention.