Abstract:
A circuit card assembly provides signal conditioning for signal discretes in control systems integrating a legacy, distributed processing architecture and a distributed I/O control system. Signal conditioning functions are determined, and the necessary physical circuits to perform the signal conditioning functions are incorporated into a circuit card. The Integrated Signal Conditioning Circuit Card Assembly is installed within the control system between legacy controllers and distributed I/O modules. The Integrated Signal Conditioning Circuit Card Assembly may leave any discrete signal unaltered or otherwise condition discretes with interrupt, interrupt on demand, over-ride, and monitor circuits. The centralized processor accesses and controls the conditioned discretes transmitted over a common hardware connection for use in system feedback and control.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS  
       [0001]     Not applicable.  
       STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT  
       [0002]     Not applicable.  
       BACKGROUND OF THE INVENTION  
       [0003]     1. Field of the Invention  
         [0004]     The present invention relates to devices, systems, and processes useful for signal conditioning.  
         [0005]     2. Brief Description of the Related Art  
         [0006]     Control systems automate our world. From assembly lines to home heating and cooling systems, sensors detect various conditions, and report those conditions with discrete signals to a controller. The controller is programmed to keep the system running by feeding back commands determined by the various signals it receives. The processor feeds command signals back to controllers to operate equipment that perform work. Input/Output (I/O) devices feed information between sensors and controllers. To send discrete signals back and forth through the system, signal conditioning must be performed.  
         [0007]     One problem found in control system design is integrating different discrete signal formats. Many different types of sensors may be used in a system. For example, a mail processing system may have optical character recognition scanners, and scales, along with other types of sensors, to sort mail. These sensors are manufactured by different companies, and have different discrete signal formats. Thus, the problem of integrating discrete signal formats is continuously present in control systems.  
         [0008]     Another problem in designing control systems is encountered when bridging the gap between existing, or legacy, technology, and current computer architecture. Particularly, control systems have moved towards a distributed architecture, where a single controller controls signal discretes (“discretes”) that are distributed along a common FieldBUS (Device-Level Network). Legacy systems typically have several central processing units (CPUs) controlling various subsystems and accessing discrete signals locally, with a custom format, rather than a common architecture. Increased performance of CPU&#39;s has enabled and driven the migration towards distributed I/O systems. If the legacy system cannot be interfaced with a distributed system, the user is faced with purchasing and testing a completely new automation system. This complete replacement is often too costly and time consuming to be feasible.  
         [0009]     Discrete signals must be conditioned when interfacing the legacy and distributed systems. If the signals are compatible, the discrete may be left alone. Otherwise, the discrete may need to be interrupted, redirected, or over-ridden. In current systems, conditioning legacy discretes has typically been approached in two ways. One approach has been to place a communications link between the legacy controller and the distributed system controller, and allow this new controller to make requests from the legacy system. This approach, however, does not give the distributed system real-time control. Another approach to conditioning legacy discretes has been to alter the existing hardware, effectively generating a new discrete signal format. This approach, however, again requires custom alteration to the existing system, requiring testing and equipment replacement.  
         [0010]     Various devices, systems and methods are known for conditioning signals in control systems. U.S. Pat. No. 6,392,557 to Kreuter, issued May 21, 2002, describes an output over-ride board  10  releasably mounted to a programmable logic controller  12  (PLC) that controls an output of the PLC  12 . The over-ride board is particularly used for over-riding the output signal from a PLC so that the PLC can be modified at the installation sight (col. 4, 11. 23-28.)  
         [0011]     U.S. Pat. No. 5,947,748 to Licht, et al., issued Sep. 7, 1999, for a connector to a PLC. The interface connector board  16  evenly distributes thermocouple wires providing input to the PLC. A plurality of dielectrically isolated interconnection points permits the user to custom design components used for signal conditioning (col. 3, 11. 5-30).  
         [0012]     Although prior systems, methods, and devices generally functioned well and provided advantages over prior systems, methods, and devices, they do not provide a simple, efficient, and cost-effective manner of conditioning legacy discrete signals interfaced with a distributed system architecture.  
       SUMMARY OF THE INVENTION  
       [0013]     A circuit card assembly provides signal conditioning for signal discretes in control systems integrating a legacy, distributed processing architecture and a distributed I/O control system. Signal conditioning functions are determined, and the necessary physical circuits to perform the signal conditioning functions are incorporated into a circuit card. The Integrated Signal Conditioning Circuit Card Assembly is installed within the control system between legacy controllers and distributed I/O modules. The Integrated Signal Conditioning Circuit Card Assembly may leave any discrete signal unaltered or otherwise condition discretes with interrupt, interrupt on demand, over-ride, and monitor circuits. The centralized processor accesses and controls the conditioned discretes transmitted over a common hardware connection for use in system feedback and control. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0014]     The invention of the present application will now be described in more detail with reference to preferred embodiments of the apparatus and method, given only by way of example, and with reference to the accompanying drawings, in which:  
         [0015]      FIG. 1  illustrates an exemplary physical environment having integrated legacy and distributed I/O systems in accordance with the present invention.  
         [0016]      FIG. 2  illustrates an exemplary control system schematic for processing discrete signals in accordance with the present invention.  
         [0017]      FIG. 3  illustrates a preferred embodiment of an integrated signal conditioning circuit card assembly interfacing a legacy and a distributed I/O system in accordance with the present invention. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0018]     Referring to the drawing figures, like reference numerals designate identical or corresponding elements throughout the several figures.  
         [0019]      FIG. 1  illustrates an exemplary physical environment having integrated legacy and distributed I/O systems in accordance with the present invention. Particularly,  FIG. 1  illustrates a portion of a flat mail sorting system. Flat mail  5  is placed on a conveyor belt  15  for processing. In the processing area  1 , various subsystems,  10 ,  12 ,  14  are utilized to read or detect different types of information about each flat  5 . Subsystem  10  determines the size of each flat  5 . Subsystem  12 , an optical character recognition (OCR) scanner, reads the zip code for each flat  5 . Subsystem  14 , a weighing system, determines the weight of each flat  5 . Subsystems  10 ,  12  and  14  have components, which are not otherwise illustrated in  FIG. 1 , and report their information to the Master CPU  20 . It will be appreciated by one of skill in the art that the subsystems and parallel subsystems which gather information used to process the flats  5  may be constructed in a variety of ways, and illustrate sources of various discrete signals.  
         [0020]     The Master CPU  20  is electrically connected to the various subsystems  10 ,  12 ,  14  and to the legacy controllers  22 ,  24 ,  26 . The Master CPU  20  runs the control system and has sufficient flash memory to store instructions when the system is powered down. When the system is powered up, the Master CPU  20  downloads high-level instructions to each legacy controller  22 ,  24 ,  26 . During system operation, subsystems  10 ,  12 ,  14  transmit data read for sorting flats  5  to the Master CPU  20 .  
         [0021]     Flats  5  are transferred from the processing area  1 , to the sorting area  3  via the mail transport mechanism  16 . In the sorting area, mail diverters  30   a,    30   b,    30   c,    32   a,    32   b,    32   c  can either transport the flats  5  downstream or divert the flats  5 , as illustrated by diverter  30   b,  for sortation. Swivels  40 ,  42  are connected to chutes  60 ,  62  that direct flats  5  into trays  50 ,  52  for eventual transfer onto take-away conveyor  17 .  
         [0022]     Diverters  30   a,    30   b,    30   c,    32   a,    32   b,    32   c,  re-position flats  5  as operated by legacy controllers  24 ,  26  when flats are in the sorting area  3 . As a flat  5  moves along the transport  16 , the information detected by the subsystems  10 ,  12  and  14  in the processing area  1 , are transmitted to various processors (further described below) that control the sorting system. For example, all flats  5  weighing less than 5 ounces and going to zip code 22314 may belong in tray  50 . The controller  24  for diverter  30   b  is signaled to operate diverter  30   b  to sort flat  5  off the transport  16 . At the same time, the controller  24  activates swivel  40  to open chute  60 , allowing the flat  5  to enter chute  60  and fall into its proper tray  50 . Each legacy controller  22 ,  24 , &amp;  26  is given high-level instructions regarding activities to take place in their sections from the Master CPU  20 . As different actions along the sorting or processing areas happen, control signals are received and sent between sensors and controllers to provide information about and operate the system.  
         [0023]     Referring to  FIG. 2 , an exemplary control system schematic for processing discrete signals in accordance with the present invention is illustrated. For clarity, legacy controllers  22 ,  24 ,  26  and the Master CPU  20  are illustrated with major subcomponents. Legacy I/O Cards  501 ,  502 ,  503  process discrete I/O signals. CPU&#39;s  601 ,  602 ,  603  contain other processing components, such as hardware, e.g., processors  611 ,  612 ,  613  and memory modules  621 ,  622 ,  623  and software (not shown) stored in memory modules  621 ,  622 ,  623  and executable by the processors  611 ,  612 ,  613 . The legacy controllers  22 ,  24 ,  26  receive their executable software and high-level instructions from the Master CPU  20 , through communications network  700 . Communications network  700  is preferably a fiber-optic or other modem high-speed communications network. The executable software operates a portion of the control system. Distributed CPU&#39;s  601 ,  602 ,  603  execute their software based on discrete signal information received from sensors  70 ,  71 ,  72 ,  73 ,  74 ,  75  sensing various conditions along the mail processing system. Likewise CPU&#39;s  601 ,  602 ,  603  drive output devices  80 ,  81 ,  82 ,  83 ,  84 ,  85  to cause physical changes in the mail processing system, such as the diverting of a particular flats mail piece into a particular tray. In the system of  FIG. 1 , the software operates the sorting area  3  and processing area  1  through legacy controllers  22 ,  24 ,  26 . Legacy I/O Cards  501 ,  502 ,  503  receive and/or energize discrete I/O signals coming from and going to the legacy system. The signal format, for each discrete, has been defined by the manufacturer of the sensor.  
         [0024]     The Legacy I/O Cards  501 ,  502 ,  503  are designed and manufactured according to the type of discrete signals to be processed. One of skill in the art determines the type of signal conditioning function needed to convert the discrete to the proper format for the distributed architecture. The Legacy I/O Cards  501 ,  502 ,  503  accept legacy input signals and transmit legacy output signals through pinned connectors and wires, as known by one of ordinary skill in the art. Preferably, the Legacy I/O Cards  501 ,  502 ,  503  operate on a direct current format. It will be appreciated that other formats may be accommodated. Preferably, from 5 to 30 volt direct current format, or less than 250 volts alternating current. By accepting and conditioning the legacy discretes having different signal formats, The Legacy I/O Cards  501 ,  502 ,  503 , provide an opportunity for the legacy controllers to operate compatibly with a new distributed I/O processing architecture. For example, where a legacy system sensor monitors the position of a mail diverter, and a controller in a modern distributed I/O tray handling system needs to read the same signal providing status of the diverter, one of ordinary skill would determine that a monitor circuit would be needed to interface the legacy signal to the modern distributed I/O tray handling system. Once the design determination is made, an Integrated Signal Conditioning Circuit Card Assembly may now be manufactured to accept and condition the discrete signal inputs.  
         [0025]     Referring to  FIG. 3 , a preferred embodiment of a signal conditioning circuit card assembly interfacing a legacy and a distributed I/O system in accordance with the present invention is illustrated. For example, the mail processing/sorting equipment of  FIG. 1  is integrated with a modern system which utilizes a distributed I/O architecture. A modern controller  5000 , in this case a single PC, controls a high number of I/O from a number of distributed I/O modules via a FieldBUS network, i.e., a device-level network. However, for clarity, the system is illustrated with a single I/O module. Modern Controller  5000  connects to a Modern Distributed I/O module  5002  via FieldBUS  5010 . A variety of discrete I/O signals, from legacy controller  24 , are routed through the Integrated Signal Conditioning Circuit Card Assembly  550 . Other legacy controllers along the mail processing or sorting areas are similarly integrated with the modern controller  5000 . Modern distributed I/O Module  5002  receives instructions from Modern Controller  5000  and transmits back sensor status through the FieldBUS  5010 . The Modern Distributed I/O Module is hardwired to the Integrated Signal Conditioning Circuit Card Assembly  550  via cable  5020 . It will be appreciated that the Integrated Signal Conditioning Circuit Card Assembly  550  can be integrated with the legacy discrete signals in a variety of ways. Preferably, the Integrated Signal Conditioning Circuit Card Assembly  550  is installed in a spare card chassis in the legacy controller  22 ,  24 ,  26 .  
         [0026]     Discrete signals  72 ,  73 ,  82 ,  83  originate from legacy controller  24  (as illustrated in  FIG. 2 ). The Integrated Signal Conditioning Circuit Card assembly  550 , which is hardwired into the legacy system, affects signal discretes as designed. As illustrated, signal  72 , is monitored by a monitor circuit  510 . Any data the signal previously provided the legacy controller  24  is now available to the Modern Controller  5000 . Signal  73  is interrupted when needed by an interrupt circuit  512 . The Modern Controller  5000  provides instructions for when data previously available to legacy controller  24  via Discrete Input Signal  73  may be interrupted. Signal  82  may be over-ridden by an over-ride circuit  514 . Modern Controller  5000  provides instructions for when action dictated by legacy controller  24  may be taken over. Signal  83  is allowed to pass through by a pass-through circuit  516 , and is unaffected by the Integrated Signal Conditioning Circuit Card Assembly  550 .  
         [0027]     In the exemplary mail sorting system illustrated in  FIG. 1 , the Modern controller  5000  and Modern Distributed I/O Module  5020  are part of an over-all modern control system that detects when a tray is full of flats, and exchanges the full tray for the next empty tray. In order to do so, the modern system must be able to monitor the state of mail diverters, interrupt legacy controllers&#39; ability to sort mail while a tray is exchanged, over-ride the tray take-away conveyor to remove the tray, and pass through the signal that energizes the transport while a tray is loaded. The Signal-Conditioning Circuit Card Assembly  550  has been manufactured to condition the discrete signals  72 ,  73 ,  82 ,  83  to fit into the distributed I/O architecture. As illustrated, one of ordinary skill in the art would determine that a monitor circuit  510 , an interrupt circuit  512 , an over-ride circuit  514 , and a pass-through circuit  516  are needed to condition these discretes  72 ,  73 ,  82 ,  83 . Particularly, when tray  50  is being moved, the monitor circuit  510  indicates that the diverter  30   b  is inactive. The override circuit  514  allows the modern control system to control the tray take away conveyor  17 . The pass-through circuit  516  allows the legacy controller  24  to maintain control of the mail transport  16  until a replacement tray has been loaded.  
         [0028]     It will be appreciated by one of ordinary skill in the art that signal-conditioning circuits are well-known, and a variety of circuit types and structures may be used to format signals within an Integrated Signal Conditioning Circuit Card Assembly without departing from the scope of the present invention. For example, monitor, interrupt, interrupt-on-demand, over-ride, and pass-through functions can be provided as constants or on-demand by altering the conditioning circuit structure. Further, though a specific number of discrete signals are illustrated in the exemplary embodiment, it will be appreciated by one of ordinary skill in the art that the Integrated Signal Conditioning Circuit Card Assembly of the present invention may be manufactured to accept as many discrete signals as can be contained on a circuit card. Preferably, the Integrated Signal Conditioning Circuit Card Assembly accepts between 1-32 discrete signals, and more preferably, 32 discrete signals. However, it will be appreciated by one of ordinary skill in art that circuit cards may be fabricated for conditioning more than 32 discretes. Conditioned signals are then available to the new control system for further processing and control. The legacy controller continues to provide feedback to the Master CPU through the communications network for system operation, not necessarily even aware of the discrete signal conditioning that has taken place.  
         [0029]     While the control system illustrates a single signal conditioning circuit card assembly associated with each legacy controller, it will be appreciated by one of ordinary skill in the art that multiple signal conditioning circuit card assemblies can be incorporated into each CPU to accommodate multiple signal formats. Likewise, multiple Integrated Signal Conditioning Circuit Card Assemblies may be used, throughout legacy control system architectures, in accordance with the present invention.  
         [0030]     While the present invention is described in the context of a mail sorting system, it will be appreciated by one of ordinary skill in the art that an Integrated Signal Conditioning Circuit Card Assembly in accordance with the present invention may be used in any type of control system environment.  
         [0031]     While the invention has been described in detail with reference to preferred embodiments thereof, it will be apparent to one skilled in the art that various changes can be made, and equivalents employed, without departing from the scope of the invention.