Abstract:
Embodiments of the invention provides a method, device, and system for programming an electromigration fuse (eFuse) using a radio frequency (RF) signal. A first aspect of the invention provides a method of testing circuitry on a semiconductor chip, the method comprising: receiving a radio frequency (RF) signal using at least one antenna on the semiconductor chip; powering circuitry on the semiconductor chip using the RF signal; activating a built-in self test (BIST) engine within the circuitry; determining whether a fault exists within the circuitry using the BIST; and programming an electromigration fuse (eFuse) to alter the circuitry in response to a fault being determined to exist.

Description:
TECHNICAL FIELD 
       [0001]    The present invention relates generally to integrated circuits and, more particularly, to the use of a radio frequency (RF) signal to supply power to a semiconductor chip and read and/or write its circuitry using an electromigration fuse (eFuse). 
       BACKGROUND OF THE INVENTION 
       [0002]    In integrated circuits, it may be desirable, after the circuit is manufactured, to permanently store information within it, or to form or alter its connections. Fuses or other devices may be used for this purpose. In some cases, a laser is used to open a link in the circuitry of a semiconductor device. However, the use of lasers in such circumstances requires precise, time-consuming alignment of the laser to avoid damaging neighboring circuitry and devices. 
         [0003]    Electromigration fuses (eFuses) provide a more recent, less destructive alternative to the use of lasers. In general terms, an eFuse comprises a cathode and an anode connected by a fuse link. The fuse link is comprised of a conductive material, such as a metal or metal silicide, e.g., titanium, tungsten, aluminum, copper, titanium silicide, nickel silicide, etc. A current is applied across the fuse link such that its conductive material electromigrates from one portion of the fuse link to another. The result is a great reduction in the conductivity of the eFuse and a correspondingly great increase in its resistance. Thus, the fuse is “blown” and the circuitry of the semiconductor device is altered or “programmed” (e.g., by disabling circuitry connected to the eFuse, invoking redundant or alternate circuitry of the device, permanently storing information in the eFuse, etc.). While eFuses enable less destructive alteration of a device&#39;s circuitry, programming an eFuse requires physical connection to the circuit to provide the necessary power, which is time-consuming, expensive, and limiting of the locations and circumstances in which such programming may be done. 
       SUMMARY OF THE INVENTION 
       [0004]    Embodiments of the invention provide a method, device, and system for programming an electromigration fuse (eFuse) using a radio frequency (RF) signal. 
         [0005]    A first aspect of the invention provides a method of testing circuitry on a semiconductor chip, the method comprising: receiving a radio frequency (RF) signal using at least one antenna on the semiconductor chip; powering circuitry on the semiconductor chip using the RF signal; activating a built-in self test (BIST) engine within the circuitry; determining whether a fault exists within the circuitry using the BIST; and programming an electromigration fuse (eFuse) to alter the circuitry in response to a fault being determined to exist. 
         [0006]    A method of programming circuitry on a semiconductor chip, the method comprising: receiving a radio frequency (RF) signal using at least one antenna on the semiconductor chip; powering circuitry on the semiconductor chip using the RF signal; and programming an electromigration fuse (eFuse) on the semiconductor chip. 
         [0007]    A third aspect of the invention provides a semiconductor chip comprising: a substrate; at least one radio frequency (RF) antenna coupled to the substrate; and circuitry coupled to the at least one antenna, the circuitry including at least one electromigration fuse (eFuse), wherein the eFuse is programmed by an RF signal received by the at least one RF antenna. 
         [0008]    A fourth aspect of the invention provides a system for programming an electromigration fuse (eFuse), the system comprising: an eFuse including: a cathode; an anode; and a conductive fuse link coupling the cathode and anode; a radio frequency (RF) transmitter for supplying an RF signal; and an RF antenna coupled to the eFuse for receiving the RF signal and supplying a current sufficient to induce electromigration in the conductive fuse link. 
         [0009]    The illustrative aspects of the present invention are designed to solve the problems herein described and other problems not discussed, which are discoverable by a skilled artisan. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]    These and other features of this invention will be more readily understood from the following detailed description of the various aspects of the invention taken in conjunction with the accompanying drawings that depict various embodiments of the invention, in which: 
           [0011]      FIG. 1  shows a cross-sectional side view of a portion of a semiconductor device having a programming circuit for programming an electromigration fuse (eFuse), according to an embodiment of the invention; 
           [0012]      FIG. 2  shows a top-down view of the eFuse of  FIG. 1 ; 
           [0013]      FIG. 3  shows a cross-sectional side view of a portion of a semiconductor device having a radio frequency (RF) antenna, according to an embodiment of the invention; 
           [0014]      FIG. 4  shows a top-down view of a semiconductor device having an eFuse and an RF antenna, according to an embodiment of the invention; 
           [0015]      FIG. 5  shows a schematic view of circuitry of a semiconductor device according to an embodiment of the invention; and 
           [0016]      FIG. 6  shows a flow diagram of a method according to an embodiment of the invention. 
       
    
    
       [0017]    It is noted that the drawings of the invention are not to scale. The drawings are intended to depict only typical aspects of the invention, and therefore should not be considered as limiting the scope of the invention. In the drawings, like numbering represents like elements between the drawings. 
       DETAILED DESCRIPTION OF THE INVENTION 
       [0018]    Referring now to  FIG. 1 , a cross-sectional side view is shown of a programming circuit  1000  according to one embodiment of the invention, the programming circuit  1000  comprising a semiconductor device  100  and an electromigration fuse (eFuse)  400 . Semiconductor device  100  may include a substrate  10  beneath a gate dielectric  20 , a nitride liner  30 , and insulating layers  40 ,  50 . Into these layers of semiconductor device  100  are formed field effect transistors (FETs)  200 ,  300 . 
         [0019]    Substrate  10  may include any of a number of materials, including, but not limited to silicon, germanium, silicon germanium, silicon carbide, and those consisting essentially of one or more III-V compound semiconductors having a composition defined by the formula Al X1 Ga X2 In X3 As Y1 P Y2 N Y3 Sb Y4 , where X1, X2, X3, Y1, Y2, Y3, and Y4 represent relative proportions, each greater than or equal to zero and X1+X2+X3+Y1+Y2+Y3+Y4=1 (1 being the total relative mole quantity). Other suitable substrates include II-VI compound semiconductors having a composition Zn A1 Cd A2 Se B1 Te B2 , where A1, A2, B1, and B2 are relative proportions, each greater than or equal to zero and A1+ A2+B1+B2=1 (1 being a total mole quantity). Furthermore, a portion or entire semiconductor substrate may be strained. 
         [0020]    Gate dielectric  20  is often silicon oxide (SiO 2 ), but may also include, but is not limited to, hafnium silicate (HfSi), hafnium oxide (HfO 2 ), zirconium silicate (ZrSiO x ), zirconium oxide (ZrO 2 ), silicon nitride (Si 3 N 4 ), silicon oxynitride (SiON), high-k material, or any combination of such materials. Nitride liner  30  is typically silicon nitride (Si 3 N 4 ). Insulating layers  40 ,  50  may also include silicon oxide (SiO 2 ), hafnium silicate (HfSi), hafnium oxide (HfO 2 ), zirconium silicate (ZrSiO x ), zirconium oxide (ZrO 2 ), silicon nitride (Si 3 N 4 ), silicon oxynitride (SiON), high-k material, or any combination of such materials. 
         [0021]    Each FET  200 ,  300  includes a source  210 ,  310 , a gate  220 ,  320 , and a drain  230 ,  330 , as well as n-type doped regions  240 ,  340  and  242 ,  342  beneath the sources  210 ,  310  and drains  230 ,  330 , respectively. Metal contacts  270 ,  370 ,  272 ,  372 ,  274 ,  374  above insulator  40  are connected to the sources  210 ,  310 , gates  220 ,  320 , and drains  230 ,  330  by a plurality of vias  260 ,  360 ,  262 ,  362 ,  264 ,  364 , respectively. N-type dopants may include, but are not limited to, phosphorous (P), arsenic (As), antimony (Sb), sulphur (S), selenium (Se), tin (Sn), silicon (Si), and carbon (C). 
         [0022]    eFuse  400  comprises an anode  410  and cathode  420  connected by a fuse link  430 , each composed of a metal or metal silicide. Anode  410  and cathode  420  are connected to metal contacts  272  and  372 , respectively, by metallized vias  280  and  380 . As described above, application of a current (supplied by FETs  200 ,  300 ) across fuse link  430  causes electromigration of its conductive material. In the case that a metal silicide is employed in eFuse  400 , the silicide may be formed using any now-known or later-developed technique. For example, a metal, such as titanium (Ti), nickel (Ni), cobalt (Co), etc., may be deposited on silicon and annealed, followed by removal of any unreacted metal. Such deposition may include any now known or later developed techniques appropriate for the material to be deposited, including, but not limited to, chemical vapor deposition (CVD), low-pressure CVD (LPCVD), plasma-enhanced CVD (PECVD), semi-atmosphere CVD (SACVD) and high density plasma CVD (HDPCVD), rapid thermal CVD (RTCVD), ultra-high vacuum CVD (UHVCVD), limited reaction processing CVD (LRPCVD), metalorganic CVD (MOCVD), sputtering deposition, ion beam deposition, electron beam deposition, laser assisted deposition, thermal oxidation, thermal nitridation, spin-on methods, physical vapor deposition (PVD), atomic layer deposition (ALD), chemical oxidation, molecular beam epitaxy (MBE), plating, and evaporation. 
         [0023]      FIG. 2  shows a top-down view of eFuse  400 . Anode  410  and cathode  420  each include a plurality of contacts  412 ,  414 ,  416 ,  418  and  422 ,  424 ,  426 ,  428 , respectively, to which circuitry of the device may be connected. 
         [0024]      FIG. 3  shows a cross-sectional side view of another portion of the semiconductor device  100 , in which a radio frequency (RF) antenna  600  is connected to a FET  500 . Specifically, RF antenna  600  is connected to the drain  530  of FET  500  by metallized via  580 . As shown in  FIG. 3 , RF antenna  600  is connected to a FET  500  other than those to which eFuse  400  ( FIG. 1 ) is connected and, as shown in  FIG. 4 , is separated from eFuse  400  on semiconductor device  100 . This may be desirable, for example, to protect signal integrity, but it is not essential. That is, RF antenna  600  and eFuse  400  may be located nearer each other on semiconductor device  100  than shown in  FIG. 4  and/or RF antenna  600  and eFuse  400  may be connected to the same FET (e.g., FET  300 ,  FIG. 1 ). 
         [0025]    In some embodiments of the invention, RF antenna  600  may be formed directly on semiconductor device  100  (i.e., its components may be connected to semiconductor device  100  to form RF antenna  600 ). In other embodiments of the invention, RF antenna  600  may be assembled separately and connected to semiconductor device  100 . This may include, for example, printing the components of RF antenna  600  onto a flexible member, which is then connected to semiconductor device  100 . 
         [0026]    Referring now to  FIG. 5 , a schematic of a semiconductor device  100  according to an illustrative embodiment of the invention is shown. Semiconductor device  100  includes an RF antenna  600 , a built-in self test (BIST) engine  700 , a plurality of eFuses  400 ,  402 ,  404 , and a plurality of circuits  710  (C 1 ),  720  (C 2 ),  730  (C 3 ). Upon receiving an RF signal  800  from an RF transmitter (not shown), the RF antenna  600  powers the circuitry of semiconductor device  100  and activates BIST engine  700 , which tests the circuits (C 1 , C 2 , C 3 ) to which it is connected, for faults. Upon determination of a fault, BIST engine  700  may program one or more eFuses  400 ,  402 ,  404  (i.e., “blow” the fuse by inducing electromigration in its fuse link), to invoke redundant circuitry, invoke alternate circuitry, and/or disable circuitry. For example, upon determining that a fault exists in circuit  710  (C 1 ), eFuse  400  may be programmed to disable circuit  710  (C 1 ) and invoke circuit  720  (C 2 ), which may provide redundant or alternate circuitry. 
         [0027]    In other cases, RF signal  800  may be employed directly to program circuitry. For example, RF signal  800  may be received by RF antenna  600  and used to power (i.e., provide a current to) eFuse  404 , thereby inducing electromigration in its fuse link, programming eFuse  404 , and disabling circuit  730  (C 3 ). This may be desirable, for example, to permanently store information within circuit  730  (C 3 ) or to disable a functionality provided by circuit  730  (C 3 ) and thereby disable a functionality of an apparatus in which semiconductor device  100  is contained. 
         [0028]    In some embodiments of the invention, a signal  902  including information describing a result of a fault determination, eFuse programming, or other relevant events may be transmitted from semiconductor device  100  to, for example, a chip reader  900 . 
         [0029]      FIG. 6  shows a flow diagram of a method according to an embodiment of the invention. At S 1 , an RF signal is received by an RF antenna on a semiconductor device. At S 2 , the RF signal is used to power the circuitry of the semiconductor device. At S 3 , powering the circuitry powered may optionally activate a BIST engine, which, at S 4 , is used to determine whether one or more faults exist within the circuitry. At S 5 , an eFuse is programmed by applying a current across its fuse link. 
         [0030]    As described above, programming the eFuse may be in response to determining that a fault exists within the circuitry (in the case that the BIST engine is employed) or may be carried out directly upon receiving the RF signal. Also as described above, programming the eFuse may include invoking redundant circuitry, invoking alternate circuitry, and/or disabling circuitry. In the case that the BIST engine is employed at S 3 , determining whether a fault exists at S 4  and programming an eFuse at S 5  may be iteratively looped until no faults are determined to exist in the circuitry of the semiconductor device. 
         [0031]    At S 6 , a result of the determining and/or the programming may optionally be outputted. For example, such a result may be transmitted to a chip reader. 
         [0032]    The foregoing description of various aspects of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed, and obviously, many modifications and variations are possible. Such modifications and variations that may be apparent to a person skilled in the art are intended to be included within the scope of the invention as defined by the accompanying claims.