Abstract:
A method of controlling a switching mode power converter enables zero voltage switching by forcing a voltage across the main switch to zero. This is accomplished by sensing when a current on the secondary side of the power converter drops to zero, or other threshold value, and then generating a negative current through the secondary winding in response. The negative secondary current results in a corresponding discharge current in the primary winding, which reduces the voltage across the main switch. The voltage across the main switch is monitored such that when the voltage reaches zero, or other threshold value, the main switch is turned ON. In this manner, the circuit functions as a bi-directional current circuit where a forward current delivers energy to a load and a reverse current provides control for reducing the voltage across the main switch to enable zero voltage switching.

Description:
FIELD OF THE INVENTION 
       [0001]    The present invention is generally directed to the field of power converters. More specifically, the present invention is directed to controlling the switching of a switching device used in a power converter to reduce switching loss. 
       BACKGROUND OF THE INVENTION 
       [0002]    There are several power converter topologies that have been developed over the years, which are intended to improve the power density and switching efficiency of power converters. An emerging focus of new converter topologies is to provide a means to reduce or eliminate converter switching losses, while increasing the switching frequencies. Lower loss and higher switching frequency means more efficient converters, which can reduce the size and weight of converter components. Additionally, with the introduction of high speed composite semiconductor switches, such as metal oxide semiconductor field effect transistor (MOSFET) switches operated by pulse width modulation (PWM), recent forward and flyback topologies are now capable of operation at greatly increased switching frequencies, such as, for example, up to 1.0 MHz. 
         [0003]    However, an increase in switching frequency can cause a corresponding increase in switching and component stress related losses, as well as increased electromagnetic interference (EMI), noise, and switching commutation problems, due to the rapid ON/OFF switching of the semiconductor switches at high voltage and/or high current levels. Moreover, modern electronic components are expected to perform multiple functions, in a small space, efficiently, and with few undesirable side effects. For instance, a modern voltage converter that provides for relatively high power density and high switching frequencies, should also include uncluttered circuit topologies, provide for isolation of the output or “load” voltage from the input or “source” voltage, and also provide for variable step-up or step-down voltage transformation. 
         [0004]      FIG. 1  illustrates a conventional flyback type voltage converter. The converter  10  includes a transistor T 1 , a controller  14 , a transformer  12 , a capacitor C 1 , and a diode D 1 . Input voltage to the circuit may be unregulated DC voltage derived from an AC supply after rectification and filtering. The transistor T 1  is a fast-switching device, such as a MOSFET, the switching of which is controlled by a fast dynamic controller  14  to maintain a desired output voltage Vout. The secondary winding voltage is rectified and filtered using the diode D 1  and the capacitor C 1 . The transformer  12  of the flyback converter functions differently than a typical transformer. Under load, the primary and secondary windings of a typical transformer conduct simultaneously. However, in the flyback converter, the primary and secondary windings of the transformer do not carry current simultaneously. In operation, when the transistor T 1  is turned ON, the primary winding of the transformer  12  is connected to the input supply voltage such that the input supply voltage appears across the primary winding, resulting in an increase of magnetic flux in the transformer  12  and the primary winding current rises linearly. However, with the transistor T 1  turned ON, the diode D 1  is reverse biased and there is no current through the secondary winding. Even though the secondary winding does not conduct current while the transistor T 1  is turned ON, the load, represented as resistor Rload, coupled to the capacitor C 1  receives uninterrupted current due to previously stored charge on the capacitor. 
         [0005]    When the transistor T 1  is turned OFF, the primary winding current path is broken and the voltage polarities across the primary and secondary windings reverse, making the diode D 1  forward biased. As such, the primary winding current is interrupted but the secondary winding begins conducting current thereby transferring energy from the magnetic field of the transformer to the output of the converter. This energy transfer includes charging the capacitor C 1  and delivery energy to the load. If the OFF period of the transistor T 1  is sufficiently long, the secondary current has sufficient time to decay to zero and the magnetic field energy stored in the transformer  12  is completely dissipated. 
         [0006]    The flyback topology has long been attractive because of its relative simplicity when compared with other topologies used in low power application. The flyback “transformer” serves the dual purpose of providing energy storage as well as converter isolation, theoretically minimizing the magnetic component count when compared with, for example, the forward converter. Increasing the switching frequency is an effective way of reducing the size and weight of the overall power supply. A drawback to use of the flyback is the relatively high voltage and current stress suffered by the switching components. Additionally, high turn-off voltage (caused by the parasitic oscillation between transformer leakage inductance and switch capacitance) seen by the primary switch traditionally requires the use of a resistor, capacitor, diode subcircuit, such as a snubber circuit. This parasitic oscillation is extremely rich in harmonics and pollutes the environment with EMI, and causes high switching losses from the switching components in the form of extra thermal dissipation. 
         [0007]    In an effort to reduce or eliminate the switching losses and reduce EMI noise the use of “resonant” or “soft” switching techniques has been increasingly employed in the art. The application of resonant switching techniques to conventional power converter topologies offers many advantages for high density, and high frequency, to reduce or eliminate switching stress and reduce EMI. However, the complexity required to provide control to the power switches, such as the transistor T 1  in  FIG. 1 , and the components associated with complex controls, create a limited use in commercial applications. 
         [0008]    Resonant switching techniques generally include an inductor-capacitor (LC) subcircuit in series with a semiconductor switch which, when turned ON, creates a resonating subcircuit within the converter. Further, timing the ON/OFF control cycles of the resonant switch to correspond with particular voltage and current conditions across respective converter components during the switching cycle allows for switching under low or zero voltage and/or low or zero current conditions. Zero voltage switching (ZVS) and/or zero current switching (ZCS) inherently reduces or eliminates many frequency related switching losses. 
         [0009]    The application of such resonant switching techniques to conventional power converter topologies offers many advantages for high density, high frequency converters, such as quasi sinusoidal current waveforms, reduced or eliminated switching stresses on the electrical components of the converter, reduced frequency dependent losses, and/or reduced EMI. However, energy losses incurred during control of zero voltage switching and/or zero current switching, and losses incurred during driving, and controlling the resonance means, are still problematic. 
         [0010]    In the flyback converter that is commonly used in small power products, such as a charger or adaptor power supply, the converter operates in a discontinuous mode, which means the current through the primary winding of the transformer is allowed to fall to zero. In one approach, this converter utilizes the resonance which occurs after the freewheeling current drops to zero to discharge the drain to source parasitic capacitance of the switching transistor. While the resonance voltage reaches a valley point, the transistor is turned ON to achieve low voltage turn on, and even zero voltage turn on at certain conditions. The valley voltage level achieved during resonance depends on the input voltage level and the reflected output voltage on the primary winding of the transformer. However, the lower the valley voltage level, the higher the voltage spike across the transistor when the transistor is switched OFF. As such, the valley voltage level is limited by the corresponding stress applied to the transistor when switched OFF. The stress to the transistor increases with increasing input voltage. 
         [0011]    In another approach, a capacitor is added across the freewheeling diode on the secondary side of the flyback converter. After freewheeling current drops to zero, the reverse voltage across the diode charges the capacitor. The charge current reflects to the primary side of the circuit and generates a discharge current applied to the transistor, which pulls down the drain to source voltage. The transistor drain to source voltage can be zero at turn on as long as the discharge current is high enough. However, the resonant current between the transformer and the added capacitor across the freewheeling diode increases the current stress on the secondary winding and leads to additional conductive dissipation. 
       SUMMARY OF THE INVENTION 
       [0012]    Embodiments of a switching mode power converter are directed to methods of control that enable zero, or near-zero, voltage switching by forcing a voltage across the main switch to zero, or near-zero. This is accomplished by sensing when a current on the secondary side of the power converter drops to zero, or other threshold value, and then generating a negative current through the secondary winding in response to this event. The negative secondary current results in a corresponding discharge current in the primary winding, which reduces the voltage across the main switch, such as by discharging a parasitic capacitance across a switching transistor. The voltage across the main switch is monitored such that when the voltage reaches zero, or other threshold value, the main switch is turned ON. In this manner, the circuit functions as a bi-directional current circuit where a forward current delivers energy to a load and a reverse current provides control for reducing the voltage across the main switch to enable zero voltage switching. 
         [0013]    In an aspect, a method of controlling a switching mode power converter is disclosed. The method includes configuring a switching mode power converter having a transformer, an output circuit coupled to a secondary winding of the transformer, and a switch coupled to a primary winding of the transformer. The method also includes determining a threshold condition in the output circuit for which the switch is to be switched ON. The method also includes enabling a negative secondary current through the secondary winding of the transformer in response to determining the threshold condition, wherein the negative secondary current generates a corresponding discharge current through the primary winding, further wherein the discharge current reduces a voltage across the switch. The method also includes determining when the voltage across the switch drops to a threshold value, and switching the switch ON once the voltage drops to the threshold value. 
         [0014]    In some embodiments, the switch is a transistor and the discharge current discharges a parasitic capacitance of the transistor, thereby reducing the voltage across the transistor. In some embodiments, the threshold value is substantially zero volts, thereby enabling zero voltage switching. In some embodiments, the method also includes sensing a value of a secondary current through the secondary winding of the transformer, wherein the threshold condition in the output circuit corresponds to the value of the secondary current changing from a positive value to zero. In some embodiments, enabling the negative secondary current includes generating a drive signal to enable the negative secondary current, wherein the drive signal includes a delay after the secondary current changes from the positive value to zero. In some embodiments, enabling the negative secondary current includes enabling an alternative current path from an output capacitor in the output circuit to the secondary winding. In some embodiments, the negative secondary current is generated as discharge from the output capacitor when the alternative current path is enabled. In some embodiments, enabling the alternative current path includes switching ON a second switch within the alternate current path. In some embodiments, the switching mode power converter is configured as one of a flyback-type power converter circuit, a forward-type power converter circuit, a push-pull-type power converter circuit, a half-bridge-type power converter circuit, and a full-bridge-type power converter circuit. 
         [0015]    In another aspect, another method of controlling a switching mode power converter is disclosed. The method includes configuring a switching mode power converter having a transformer, an output circuit coupled to a secondary winding of the transformer, and a switch coupled to a primary winding of the transformer, wherein the power converter circuit is configured to store energy in the primary winding while the switch is ON and a positive primary current flows through the primary winding, and to deliver the stored energy from the primary winding to the output circuit while the switch is OFF and a positive secondary current flows through the secondary winding. The method also includes sensing the secondary current to determine when the secondary current drops from positive to zero while the switch is OFF. The method also includes enabling a negative secondary current through the secondary winding upon determining that the secondary current drops from positive to zero, wherein the negative secondary current generates a corresponding negative primary current through the primary winding, further wherein the negative primary current reduces a voltage across the switch. The method also includes determining when the voltage across the switch drops to a threshold value, and switching the switch ON once the voltage drops to the threshold value. 
         [0016]    In some embodiments, the switch is a transistor and the negative primary current discharges a parasitic capacitance of the transistor, thereby reducing the voltage across the transistor. In some embodiments, the threshold value is substantially zero volts, thereby enabling zero voltage switching. In some embodiments, enabling the negative secondary current includes enabling an alternative current path from an output capacitor in the output circuit to the secondary winding. In some embodiments, the negative secondary current is generated as discharge from the output capacitor when the alternative current path is enabled. In some embodiments, enabling the alternative current path includes switching ON a second switch within the alternate current path. 
         [0017]    In some embodiments, the power converter circuit is configured as a flyback-type converter circuit. In some embodiments, enabling the negative secondary current includes generating a drive signal to enable the negative secondary current, wherein the drive signal includes a delay after the secondary current drops from the positive value to zero. In yet another aspect, a switching mode power converter is disclosed. The power converter includes a transformer having a primary winding coupled to an input supply voltage and a secondary winding, a switch coupled in series to the primary winding, a first controller coupled to the switch, wherein the first controller is configured to turn the switch ON and OFF, and an output circuit coupled to the secondary winding. The output circuit includes a second controller configured to determine a threshold condition in the output circuit for which the switch is to be switched ON. The second controller is further configured to enable a negative secondary current through the secondary winding of the transformer in response to determining the threshold condition. The negative secondary current generates a corresponding discharge current through the primary winding that reduces a voltage across the switch. The first controller is further configured to determine when the voltage across the switch drops to a threshold value, and to switch ON the switch once the voltage drops to the threshold value. 
         [0018]    In some embodiments, the switch is a transistor and the discharge current discharges a parasitic capacitance of the transistor, thereby reducing the voltage across the transistor. In some embodiments, the threshold value is substantially zero volts, thereby enabling zero voltage switching. In some embodiments, the output circuit also includes a sensing circuit coupled to the secondary winding and to the second controller, wherein the second controller is configured to determine a value of a secondary current through the secondary winding of the transformer according to data sensed by the sensing circuit, wherein the threshold condition in the output circuit corresponds to the value of the secondary current changing from a positive value to zero. In some embodiments, the sensing circuit is a voltage divider circuit. 
         [0019]    In some embodiments, the output circuit also includes a diode coupled in series to the secondary winding of the transformer and an output capacitor coupled in series to the diode, wherein the diode is configured to enable current flow from the secondary winding to the output capacitor when forward-biased. In some embodiments, the output circuit also includes a second switch coupled in parallel to the diode, further wherein the second controller is coupled to the second switch, the second controller is configured to turn the second switch ON and OFF. In some embodiments, the second controller is further configured to generate a drive signal for the second switch, wherein the drive signal includes a delay after the threshold condition in the output circuit is determined. In some embodiments, when the second switch is ON, an alternative current path is formed between the output capacitor and the secondary winding of the transformer, further wherein the negative secondary current flows from the output capacitor to the secondary winding via the alternative current path. In some embodiments, the negative secondary current is generated as discharge from the output capacitor when the alternative current path is formed. In some embodiments, the output circuit is configured as a bi-directional current flow circuit, wherein a first current flow direction corresponds to positive secondary current from the secondary winding to the output capacitor and to an output of the output circuit to deliver power, and a second current flow direction corresponds to negative secondary current from the output capacitor to the secondary winding to provide control for switching the switch coupled to the primary winding. In some embodiments, the second switch is a transistor. 
         [0020]    In some embodiments, the power converter also includes a sensing circuit coupled to the switch and to the first controller, wherein the first controller is configured to determine the voltage across the switch according to data sensed by the sensing circuit. In some embodiments, the power converter is configured as one of a flyback-type power converter circuit, a forward-type power converter circuit, a push-pull-type power converter circuit, a half-bridge-type power converter circuit, and a full-bridge-type power converter circuit. 
         [0021]    In still yet another aspect, another switching mode power converter is disclosed. The power converter includes a transformer, a first switch, a first controller, a diode, a second switch, a second controller, an output capacitor, and a sensing circuit. The transformer has a primary winding coupled to an input supply voltage and a secondary winding. The first switch is coupled in series to the primary winding. The first controller is coupled to the first switch, wherein the first controller is configured to turn the first switch ON and OFF. The diode is coupled in series to the secondary winding. The second switch is coupled in parallel to the diode. The second controller is coupled to the second switch, wherein the second controller is configured to turn the second switch ON and OFF. The output capacitor is coupled to the diode and to the second switch. The sensing circuit is coupled to the secondary winding and to the second controller. The second controller is configured to determine a threshold condition according to data sensed by the sensing circuit and to switch ON the second switch when the threshold condition is achieved thereby forming an alternative current path for a negative secondary current to flow from the output capacitor to the secondary winding. The negative secondary current generates a corresponding discharge current through the primary winding that reduces a voltage across the first switch. The first controller is further configured to determine when the voltage across the first switch drops to a threshold value, and to switch ON the first switch once the voltage drops to the threshold value. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0022]    Several example embodiments are described with reference to the drawings, wherein like components are provided with like reference numerals. The example embodiments are intended to illustrate, but not to limit, the invention. The drawings include the following figures: 
           [0023]      FIG. 1  illustrates a conventional flyback type voltage converter. 
           [0024]      FIG. 2  illustrates a power converter according to an embodiment. 
           [0025]      FIG. 3  illustrates exemplary voltage and current waveforms corresponding to operation of the power converter of  FIG. 2 . 
       
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
       [0026]    Embodiments of the present application are directed to a power converter. Those of ordinary skill in the art will realize that the following detailed description of the power converter is illustrative only and is not intended to be in any way limiting. Other embodiments of the power converter will readily suggest themselves to such skilled persons having the benefit of this disclosure. 
         [0027]    Reference will now be made in detail to implementations of the power converter as illustrated in the accompanying drawings. The same reference indicators will be used throughout the drawings and the following detailed description to refer to the same or like parts. In the interest of clarity, not all of the routine features of the implementations described herein are shown and described. It will, of course, be appreciated that in the development of any such actual implementation, numerous implementation-specific decisions must be made in order to achieve the developer&#39;s specific goals, such as compliance with application and business related constraints, and that these specific goals will vary from one implementation to another and from one developer to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking of engineering for those of ordinary skill in the art having the benefit of this disclosure. 
         [0028]      FIG. 2  illustrates a power converter according to an embodiment. The power converter  100  is configured to receive an unregulated DC voltage signal at an input node Vin and to provide a regulated output voltage Vout. Input voltage to the circuit may be unregulated DC voltage derived from an AC supply after rectification. The input voltage is typically filtered, such as via capacitor  102 . In some embodiments, the output voltage level is suitable for many low voltage appliances such as computer laptops, cell phones and other hand held devices. In an exemplary embodiment the output voltage Vout can be set within the range 5-40 VDC. Alternatively, the power converter  100  can provide the output voltage Vout that is less than 5 VDC or greater than 40 VDC. 
         [0029]    The power converter  100  is configured as a flyback converter. It is understood that the concepts described herein can be applied to alternatively configured switched mode converters including, but not limed to, a forward converter, a push-pull converter, a half-bridge converter, and a full-bridge converter. The power converter  100  includes a switch  106 , a controller  114 , a sense resistor  112 , and a transformer  104 . The switch  106  is coupled in series with a primary winding of the transformer  104  and the sense resistor  112 . The controller  114  is coupled to the switch  106  to turn the switch ON and OFF. 
         [0030]    The power converter  100  further includes output circuitry coupled to a secondary winding of the transformer  104 . The output circuitry includes a freewheeling rectifier diode  116 , a switch  118 , a controller  120 , and an output capacitor  126 . The switch  118  is coupled in parallel to the diode  116 . An anode of the diode  116  is coupled to a first terminal of the secondary winding. A cathode of the diode  116  is coupled to a first terminal of the output capacitor  126  and coupled to the output node Vout. The output capacitor  126  is coupled to the Vout node across an output load, represented by a resistor  128 . The controller  120  is coupled to the switch  118  to turn the switch ON and OFF. The output circuitry also includes a sensing circuit configured to measure a current, Isec, of the secondary winding. In the exemplary configuration of  FIG. 2 , the sensing circuit includes a resistive voltage divider including the resistors  122  and  124  coupled in parallel to the capacitor  126  to measure a voltage across the capacitor  126 . In an alternative configuration (not shown), the sensing circuit can include a resistive voltage divider coupled in parallel to the secondary winding. In general, the sensing circuit can be configured to use any conventional technique for determining the value of the secondary current Isec. 
         [0031]    The switch  106  and the switch  118  are each a suitable switching device. In an exemplary embodiment, the switch  106  and the auxiliary switch  118  are each a n-type metal-oxide-semiconductor field-effect transistor (MOSFET) device. Alternatively, any other semiconductor switching device known to a person of skill in the art can be substituted for the switch  106  and/or the switch  118 . Subsequent description is based on an n-channel MOSFET. The parasitic capacitance of the transistor  106  is represented as parasitic capacitor  110 , and the inherent body diode of the transistor  106  is represented as body diode  108 . 
         [0032]    The power converter  100  is configured for switched mode power delivery using zero voltage switching of the transistor  106 . In operation, when the transistor  106  is ON, the drain to source voltage Vds is essentially zero. In implementation, the value of the resistor  112  is very small so the voltage drop across the resistor is negligible. As such, zero voltage switching is automatically achieved when switching the transistor  106  from ON to OFF. However, when the transistor  106  is OFF, the parasitic capacitance of the transistor results in a non-zero drain to source voltage Vds. Before the transistor  106  is turned from OFF to ON, the drain to source voltage Vds is forced to zero, or near-zero. To force the drain to source voltage Vds to zero, the output circuit is configured to generate a negative secondary current Isec through the secondary winding of the transformer  104 . The negative secondary current Isec reflects to the primary side of the circuit and generates a negative primary current, or discharge current, Ipri applied to the transistor  106 . The discharge current pulls down the drain to source voltage Vds. The controller  114  is configured to turn ON the transistor  106  when the drain to source voltage Vds is zero, or other non-zero threshold value, thereby providing zero voltage switching. In some embodiments, the controller  114  senses a source voltage Vs, and determines according to the sensed source voltage Vs when the corresponding drain to source voltage Vds equals zero. It is understood that alternative configurations can be used to sense circuit conditions and determine when the drain to source voltage Vds equals zero. 
         [0033]      FIG. 3  illustrates exemplary voltage and current waveforms corresponding to operation of the power converter  100  of  FIG. 2 . A waveform  200  shows the gate voltage Vg of the transistor  106 . A waveform  202  shows the drain voltage Vd of the transistor  106 . A waveform  204  shows the primary current Ipri through the primary winding of the transformer  104 . A waveform  206  shows the drain to source voltage Vds of the transistor  106 . A waveform  208  shows the secondary current Isec through the secondary winding of the transformer  104 . 
         [0034]    As shown in waveform  200 , the transistor  106  is OFF when the gate voltage Vg is low, in this case zero volts, and the transistor  106  is ON when the gate voltage Vg is high, in this case 12 volts. At time t 1 , the gate voltage Vg goes high and the transistor  106  is turned ON. When the transistor  106  is ON, the drain voltage Vd is zero volts, as shown in waveform  202 . The value of the resistor  112  is very small and therefore the voltage drop across the resistor is negligible. The drain voltage Vd stays at zero volts until after the transistor  106  turns OFF. 
         [0035]    When the transistor  106  turns ON at time t 1 , the primary current Ipri ramps upward as shown in waveform  204 . Since the power converter  100  has a flyback configuration, the diode  116  is reverse-biased when the transistor  106  is ON. Due to the reverse-biased diode  116 , the secondary current Isec is zero, as shown in waveform  208 , while the transistor  106  is ON. While the transistor  106  remains ON, the primary winding of the transformer  104  stores energy due to the positive primary current Ipri. 
         [0036]    At time t 2 , the gate voltage Vg goes low and the transistor  106  is turned OFF. When the transistor  106  is turned OFF, the primary current Ipri goes to zero, and the drain voltage Vd and the drain to source voltage Vds go high. With the drain voltage Vd high, the diode  116  becomes forward-biased. The energy stored in the primary winding of the transformer  104  induces a positive secondary current Isec, which is delivered through the forward-biased diode  116  to the output node Vout. In this manner, energy is delivered to the load, and energy is also stored in the capacitor  126 . The value of the secondary current Isec decreases as the energy stored in the primary winding dissipates until the energy is completely dissipated and the secondary current Isec is zero, which corresponds to time t 3  in  FIG. 3 . 
         [0037]    In conventional flyback power converters, if the transistor remains OFF when the secondary current Isec reaches zero, such as at time t 3 , then the energy stored as parasitic capacitance in the transistor results in a resonant circuit formed by the primary winding and the equivalent parasitic capacitor of the transistor. In this resonant circuit, the drain voltage Vd oscillates up and down. The transistor is turned ON at one of the low points of the oscillating drain voltage Vd. 
         [0038]    In contrast, the power converter of the present application is configured to control the parasitic capacitance across the transistor  106  and drive the drain to source voltage Vds to zero, or near-zero, prior to turning ON the transistor. The sensing circuit and controller in the output circuit sense and determine when the secondary current Isec reaches zero. In the exemplary configuration of  FIG. 3 , the controller  120  is configured to sense and determine the secondary current Isec via the resistive voltage divider formed by resistors  122  and  124 . When the secondary current Isec reaches zero, at time t 3  in  FIG. 3 , the controller  120  turns ON transistor  118 . With the transistor  118  ON, an alternate current path is formed from the positively charged capacitor  126  to the secondary winding of the transformer  104 , thereby by-passing the forward-biased diode  116 . Without this alternative current path, any negative current due to the positively charged capacitor  126  is blocked by the forward-biased diode  116 . The alternative current path enables negative current to flow from the positively charged capacitor  126 , through the ON transistor  118 , and through the secondary winding. This negative current is shown in waveform  208  as negative secondary current Isec from time t 3  to time t 4 . The negative secondary current Isec reflects to the primary side of the circuit. When the negative secondary current Isec achieves a threshold value, at time t 4 , a negative primary current Ipri, or discharge current, is induced. The negative primary current Ipri discharges the parasitic capacitance of the transistor  106 , thereby driving down the drain to source voltage Vds. 
         [0039]    The controller  114  determines when the drain to source voltage Vds is pulled down to zero volts, which corresponds to time t 5  in  FIG. 3 . When the controller  114  determines that the drain to source voltage Vds is zero, or within an acceptable range of zero, the transistor  106  is turned ON, thereby achieving zero voltage switching. The discharge current level is easily programmed by adjusting a turn off delay of the transistor  118  after the secondary current Isec drops to zero. The longer the turn off delay, the higher the discharge current. The control scheme ensures sufficient discharge current is generated for discharging the parasitic capacitance and reducing the drain to source voltage Vds to zero. 
         [0040]    In this manner, the power converter is configured to drive the drain to source voltage Vds of the switching transistor to zero to achieve zero voltage switching. The power converter is not using the oscillations of a resonant circuit to time the transistor switching. The power converter is also not using a feedback signal to signal the controller  114  when to switch ON the transistor  106 . The power converter is configured as a bi-directional circuit. A positive secondary current Isec is delivered in a first direction through the secondary winding to deliver power, and a negative secondary current Isec is delivered in a second direction through the secondary winding to force zero voltage switching of the transistor  106 . This control scheme for enabling zero voltage switching does not introduce any extra voltage stress on the transistor  106 . 
         [0041]    In some embodiments, the controller  120  generates a drive signal for the transistor  118  with a delay after the secondary current Isec drops to zero. During the delay, the parasitic capacitance of the transistor  106  is resonating with the leakage inductance and therefore there is no impact to turning on the transistor  106  after the delay. With this delay, the power converter can operate in Discontinuous Current Mode (DCM) and fixed frequency switching. This delay makes skip cycle (burst mode) feasible for light loads in either DCM or Critical DCM. 
         [0042]    In an alternative configuration, a bi-directional switch is used in place of the diode  116  and the transistor  118 . A body diode of the bi-directional switch functions as the freewheeling diode  116 . Control of the bi-directional switch is the same as the transistor  118  to enable a negative secondary current Isec. 
         [0043]    The present application has been described in terms of specific embodiments incorporating details to facilitate the understanding of the principles of construction and operation of the power converter. Many of the components shown and described in the various figures can be interchanged to achieve the results necessary, and this description should be read to encompass such interchange as well. As such, references herein to specific embodiments and details thereof are not intended to limit the scope of the claims appended hereto. It will be apparent to those skilled in the art that modifications can be made to the embodiments chosen for illustration without departing from the spirit and scope of the application.