Abstract:
There is provided a regulator with soft-start using a current source. The regulator with soft-start may include: a power switch unit including first and second power switches connected between a power supply terminal and an output terminal; a load capacitor connected between the output terminal and a ground; a voltage detection unit detecting a voltage of the output terminal; a comparison unit comparing a detection voltage and a predetermined reference voltage, and outputting first and second switching signals; a current generating a predetermined constant current; a current control unit switching a connection between a control terminal of the first power switch and the current source unit according to the first switching, and switching a connection between the control terminal of the first power switch and the ground according to the second switching signal; and an error amplification unit amplifying an error voltage between the detection.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims the priority of Korean Patent Application No. 2008-0052012 filed on Jun. 3, 2008, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The present invention relates to regulators that are used in apparatuses requiring stable start-up, and more particularly, to a regulator with soft-start using a current source that can reduce noise and extend battery life by implementing soft-starting by using a current source to cause a predetermined amount of current to flow through a power switch at initial power up. 
         [0004]    2. Description of the Related Art 
         [0005]    In general, an external voltage of 3V is applied to IC devices. When an IC device has a core with a voltage of 1.8V, a voltage of 3V needs to be converted into a voltage of 1.8V by using a regulator. This regulator will be described with reference to  FIGS. 2 and 3 . 
         [0006]      FIG. 1  is a conceptual view illustrating a regulator according to the related art. 
         [0007]    A regulator, shown in  FIG. 1 , includes a power switch  10 , a load capacitor CL, and a discharge switch SW. The power switch  10  is connected to a power supply Vcc to supply a current I. The load capacitor CL is charged with charges by the current I from the power switch  10 , and outputs a predetermined voltage. The discharge switch SW is used to discharge the voltage charged in the load capacitor CL since an output voltage of the regulator needs to be a zero voltage in order to prevent a leakage current generated when the regulator is turned off. 
         [0008]    The operation of the regulator according to the related art will be described with reference to  FIGS. 1 and 2 . 
         [0009]      FIG. 2  is a view illustrating the operation of the regulator according to the related art. Referring to  FIGS. 1 and 2 , when the power switch  10  is turned on, a sudden surge of current is caused from the power supply Vcc to the load capacitor CL. Thus, a maximum current Imax flows at a predetermined time t 1 , and the largest amount of current is consumed. Here, the load capacitor CL is charged up to a predetermined voltage. 
         [0010]    Then, when the regulator, shown in  FIG. 1 , is reset, the power switch  10  is turned off, and at the same time, the discharge switch SW is turned on to discharge the voltage charged in the load capacitor CL. Then, when the power switch  10  is turned on, and the discharge switch SW is turned off, as described above, a sudden increase of current is caused from the power supply Vcc to the load capacitor CL. The maximum current Imax flows at the predetermined time t 1 , and the largest amount of current is consumed. At this time, the load capacitor CL is charged up to the predetermined voltage. 
         [0011]    However, in a case of the output voltage Vout that may be, for example, 1.8V, the load capacitor having a large capacitance value is used to remove ripple or noise as described above. When a voltage of 1.8V is output while the load capacitor is charged or discharged, a large amount of current is instantaneously consumed through the load capacitor at initial start-up. 
       SUMMARY OF THE INVENTION 
       [0012]    An aspect of the present invention provides a regulator with soft-start using a current source that can reduce noise and extend battery life by implementing soft-starting by using a current source to cause a predetermined amount of time to flow through a power switch at initial power up. 
         [0013]    According to an aspect of the present invention, there is provided a regulator including: a power switch unit including first and second power switches connected in series between a power supply terminal and an output terminal; a load capacitor connected between the output terminal and a ground, and charging a voltage by a current through the power switch unit; a voltage detection unit detecting a voltage of the output terminal; a comparison unit comparing a detection voltage of the voltage detection unit and a predetermined reference voltage, and outputting first and second switching signals having different phases according to a result of the comparison; a current source unit connected to the power terminal, and generating a predetermined constant current; a current control unit switching a connection between a control terminal of the first power switch and the current source unit according to the first switching signal of the comparison unit, and switching a connection between the control terminal of the first power switch and the ground according to the second switching signal of the comparison unit; and an error amplification unit amplifying an error voltage between the detection voltage of the voltage detection unit and the predetermined reference voltage. 
         [0014]    The first power switch may include a first P channel MOS transistor having a drain connected to the power supply terminal, a source connected to the second power switch, and a gate connected to a first connection node between the first and second current control switches, and the second power switch includes a second P channel MOS transistor having a drain connected to the source of the first power switch, a source connected to the output terminal, and a gate connected to an output terminal of the error amplification unit. 
         [0015]    The voltage detection unit may include a resistor circuit dividing the voltage of the output terminal, and detecting first and second detection voltages by the resistor circuit. 
         [0016]    The comparison unit may compare a first detection voltage of the voltage detection unit and the predetermined reference voltage, and generate a first switching signal having a switching-on level and a second switching signal having a switching-off level when the first detection voltage has a lower level than the predetermined reference voltage, or generate a first switching signal having a switching-off level and a second switching signal having a switching-on level when the first detection voltage has a higher level than the reference voltage. 
         [0017]    The current source unit may include: third and fourth P channel MOS transistors having drains connected to the power supply terminal and gates connected to each other; a first N channel MOS transistor having a drain connected to a source of the fourth P channel MOS transistor, and a gate connected to a source of the third P channel MOS transistor; a second N channel MOS transistor having a drain connected to the source of the third P channel MOS transistor, a gate connected to a source of the first N channel MOS transistor, and a source connected to the ground; and a variable resistor connected to the gate of the second N channel MOS transistor and the ground, and varying in resistance. 
         [0018]    The variable resistor may vary the soft-start duration by controlling the constant current of the current source unit. The current control unit may include: a first current control switch connected between the control terminal of the first power switch and the current source unit, and turned on or off according to the first switching signal of the comparison unit; and a second current control switch connected between the control terminal of the first power switch and the ground, and turned on or off according to the second switching signal of the comparison unit. 
         [0019]    The error amplification unit may include: a fifth P channel MOS transistor having a drain connected to the power supply terminal; a sixth P channel MOS transistor having a drain connected to the power supply terminal, and a gate and a source connected to a gate of the fifth P channel MOS transistor, a third N channel MOS transistor having a gate receiving the reference voltage, and a drain connected to a source of the fifth P channel MOS transistor; a fourth N channel MOS transistor having a gate receiving a second detection voltage of the voltage detection unit, a drain connected to the source of the sixth P channel MOS transistor, and a source connected to a source of the third N channel MOS transistor; and a current source connected between a second connection node between the sources of the third and fourth MOS transistors and the ground, wherein a third connection node between the source of the fifth P channel MOS transistor and the drain of the third N channel MOS transistor is connected to the gate of the second power switch. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0020]    The above and other aspects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which: 
           [0021]      FIG. 1  is a conceptual view illustrating a regulator according to the related art; 
           [0022]      FIG. 2  is a view illustrating the operation of the regulator according to the related art; 
           [0023]      FIG. 3  is a configuration view illustrating a regulator according to an exemplary embodiment of the invention; and 
           [0024]      FIG. 4  is an operating timing chart of the regulator according to the embodiment of the invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0025]    Exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. 
         [0026]    The invention may however be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Also, in the drawings, the same reference numerals are used throughout to designate the same components. 
         [0027]      FIG. 3  is a configuration view illustrating a regulator according to an exemplary embodiment of the invention. 
         [0028]    Referring to  FIG. 3 , a regulator according to an exemplary embodiment of the invention includes a power switch unit  100 , a load capacitor CL, a voltage detection unit  200 , a comparison unit  300 , a current source unit  400 , a current control unit  500 , and an error amplification unit  600 . The power switch unit  100  includes first and second power switches PM 11  and PM 12  that are connected in series between a power supply Vcc terminal and an output terminal OUT. The load capacitor CL is connected between the output terminal OUT and a ground, and charges a voltage by a current supplied by the power switch unit  100 . The voltage detection unit  200  detects a voltage of the output terminal OUT. The comparison unit  300  compares the voltage detected by the voltage detection unit  200  and a predetermined reference voltage, and outputs first and second switching signals SS 1  and SS 2  having different phases according to a result of the comparison. The current source unit  400  is connected to the power supply Vcc terminal, and generates a predetermined constant current. The current control unit  500  switches a connection between a control terminal of the first power switch PM 11  and the current source unit  400  according to the first switching signal SS 1  of the comparison unit  300 . Further, the current control unit  500  switches a connection between the control terminal of the first power switch PM 11  and the ground according to the second switching signal SS 2  of the comparison unit  300 . The error amplification unit  600  amplifies an error voltage between the detection voltage of the voltage detection unit  200  and the predetermined reference voltage, and outputs the amplified error voltage to the second power switch PM 12 . 
         [0029]    The first power switch PM 11  may be composed of a first P channel MOS transistor that has a drain connected to the power supply Vcc terminal, a source connected to the second power switch PM 12 , and a gate corresponding to the control terminal and connected to a first connection node NC 1  of the first and second current control switches SW 1  and SW 2 . 
         [0030]    The second power switch PM 12  may be composed of a second P channel MOS transistor that has a drain connected to the source of the first power switch PM 11 , a source connected to the output terminal OUT, and a gate connected to an output terminal of the error amplification unit  600 . 
         [0031]    The voltage detection unit  200  includes resistor circuits R 1 , R 2 , and R 3  that divide the voltage of the output terminal OUT, and detects first and second detection voltages V 1  and V 2  by using the resistor circuits R 1 , R 2 , and R 3 . 
         [0032]    The comparison unit  300  may compare the first detection voltage Vd 1  of the voltage detection unit  200  and the predetermined reference voltage Vref, and generate the first switching signal SS 1  having a switching-on level and the second switching signal SS 2  having a switching-off level when the first detection voltage Vd 1  has a lower level than the reference voltage Vref. 
         [0033]    Further, the comparison unit  300  may generate the first switching signal SS 1  having a switching-off level and the second switching signal SS 2  having a switching-on level when the level of the first detection voltage Vd 1  is higher than the level of the reference voltage Vref. 
         [0034]    The current source unit  400  may include third and fourth P channel MOS transistors PM 41  and PM 42 , a first N channel MOS transistor NM 41 , a second N channel MOS transistor NM 42 , and a variable resistor VR 1 . The third and fourth P channel MOS transistors PM 41  and PM 42  have drains connected to the power supply Vcc terminal and gates connected to each other. The first N channel MOS transistor NM 41  has a drain connected to a source of the fourth P channel MOS transistor PM 42 , and a gate connected to a source of the third P channel MOS transistor PM 42 . The second N channel MOS transistor NM 42  has a drain connected to the source of the third P channel MOS transistor PM 41 , a gate connected to a source of the first N channel MOS transistor NM 41 , and a source connected to the ground. The variable resistor VR 1  is connected between the gate of the second N channel MOS transistor NM 42  and the ground, and varies in resistance. The variable resistor VR 1  can vary the soft-start duration by controlling the constant current of the current source unit  400 . 
         [0035]    The current control unit  500  may include a first current control switch SW 1  and a second current control switch SW 2 . The first current control SW 1  is connected between the control terminal of the first power switch PM 11  and the current source unit  400 , and is turned on or off by the first switching signal SS 1  of the comparison unit  300 . The second current control switch SW 2  is connected between the control terminal of the first power switch PM 11  and the ground, and is turned on or off by the second switching signal SS 2  of the comparison unit  300 . 
         [0036]    The error amplification unit  600  includes a fifth P channel MOS transistor PM 61 , a sixth P channel MOS transistor PM 62 , a third N channel MOS transistor NM 61 , a fourth N channel MOS transistor NM 62 , and a current source IS. The fifth P channel MOS transistor PM 61  has a drain connected to the power supply Vcc terminal. The sixth P channel MOS transistor PM 62  has a drain connected to the power supply Vcc terminal, and a gate and a source connected to a gate of the fifth P channel MOS transistor PM 61 . The third N channel MOS transistor NM 61  has a gate receiving the reference voltage Vref, and a drain connected to a source of the fifth P channel MOS transistor PM 61 . The fourth N channel MOS transistor NM 62  has a gate receiving a second detection voltage Vd 2  of the voltage detection unit  200 , a drain connected to the source of the sixth P channel MOS transistor PM 62 , and a source connected to the source of the third N channel MOS transistor NM 61 . The current source IS is connected between the ground and a second connection node NC 2  between the sources of the third and fourth N channel MOS transistors NM 61  and NM 62 . Here, a third connection node NC 3  between the source of the fifth P channel MOS transistor PM 61  and the drain of the third N channel MOS transistor NM 61  may be connected to the gate of the second power switch PM 12 . 
         [0037]      FIG. 4  is an operating timing chart of the regulator according to the embodiment of the invention. In  FIG. 4 , reference character SS 1  refers to the first switching signal that is output from the comparison unit  300  to the first current control switch SW 1 , reference character SS 2  refers to the second switching signal that is output from the comparison unit  300  to the second current control switch SW 2 , and reference character I refers to a current flowing from the power switch unit  100  to the load capacitor CL. Reference character Vout refers to a voltage that is charged in the load capacitor CL to be output through the output terminal OUT. 
         [0038]    Hereinafter, the operation and effect of the invention will be described in detail with reference to the accompanying drawings. 
         [0039]    Referring to  FIGS. 3 and 4 , the regulator according to the embodiment of the invention will be described. In the regulator, shown in  FIG. 3 , the power switch unit  100  according to the embodiment of the invention includes the first and second power switches PM 11  and PM 12  that are connected in series between the power supply Vcc terminal and the output terminal OUT. The current I through the first and second power switches PM 11  and PM 12  flows through the load capacitor CL, so that the load capacitor CL is charged with the voltage. 
         [0040]    During this process, in the regulator according to the embodiment of the invention, a constant amount of current from the current source flows for a predetermined period of time at initial power up, thereby implementing soft-starting in which a level of the voltage charged in the load capacitor increases gradually. 
         [0041]    The voltage detection unit  200  according to the embodiment of the invention detects the voltage of the output terminal OUT, and supplies the detection voltage to the comparison unit  300  and the error amplification unit  600 . 
         [0042]    The comparison unit  300  compares the detection voltage of the voltage detection unit  200  and the predetermined reference voltage, and outputs the first and second switching signals SS 1  and SS 2  according to a result of the comparison. 
         [0043]    The current source unit  400  according to the embodiment of the invention is connected to the power supply Vcc terminal, and generates a predetermined constant current. 
         [0044]    The current control unit  500  according to the embodiment of the invention switches a connection between the control terminal of the first power switch PM 11  and the current source unit  400  according to the first switching signal SS 1  of the comparison unit  300 . Further, the current control unit  500  switches a connection between the control terminal of the first power switch PM 11  and the ground according to the second switching signal SS 2  of the comparison unit  300 . 
         [0045]    During this process, the error amplification unit  600  amplifies an error voltage between the detection voltage of the voltage detection unit  200  and the reference voltage, and outputs the amplified error voltage to the second power switch PM 12 . Therefore, the second power switch PM 12  is controlled by the error voltage of the error amplification unit  600 . 
         [0046]    Specifically, referring to  FIGS. 3 and 4 , the reference voltage Vref has a higher level than the detection voltage at initial power up. Therefore, as shown in  FIG. 4 , the comparison unit  300  according to the embodiment of the invention outputs the first switching signal SS 1  having a switching-on level and the second switching signal SS 2  having a switching-off level. 
         [0047]    The voltage detection unit  200  includes the resistor circuits R 1 , R 2 , and R 3  that divide the voltage of the output terminal OUT. The voltage detection unit  200  detects the first and second voltages Vd 1  and Vd 2  by using the resistor circuits R 1 , R 2 , and R 3 . In this case, since the reference voltage Vref has a higher level than the first detection voltage Vd 1  of the voltage detection unit  200 , the comparison unit  300  outputs the first switching signal SS 1  having a switching-on level and the second switching signal SS 2  having a switching-off level. 
         [0048]    Here, since the first power switch PM 11  composed of the first P channel MOS transistor is turned on, the current source unit  400  is connected to the first power switch PM 11 . The first power switch PM 11  and the current source unit  400  form a current mirror, so that the current flowing through the first power switch PM 11  becomes equal to the constant current generated by the current source unit  400 . 
         [0049]    Further, the second power switch PM 12  composed of the second P channel MOS transistor is turned off. Then, the control terminal of the first power switch PM 11  is separated from the ground, and connected to the current source unit  400 . 
         [0050]    After a soft-start period from the initial power up, when the first detection voltage Vd 1  has a higher level than the reference voltage Vref, as shown in  FIG. 4 , the comparison unit  300  outputs the first switching signal SS 1  having the switching-off level and the second switching signal SS 2  having the switching-on level. 
         [0051]    Here, since the first power switch PM 11  is turned off, the current source unit  400  and the first power switch PM 11  are separated from each other. Then, as the second power switch PM 12  is turned on, the control terminal of the first power switch PM 11  is connected to the ground. That is, the gate of the first P channel MOS transistor is connected to the ground. 
         [0052]    Here, the first power switch PM 11  is composed of the first P channel MOS transistor, and connected to the ground. As the first power switch PM 11  is completely turned on, the largest amount of current flows through the first power switch PM 11 . 
         [0053]    As shown in  FIG. 3 , the current source unit  400  includes the variable resistor VR 1  to control the amount of the generated current. 
         [0054]    Here, the amount of current generated in the current source unit  400  can be controlled by varying the resistance of the variable resistor VR 1 , and the soft-start period is determined according to the current amount. As a result, the soft-start period can be controlled by the variable resistor VR 1  of the current source unit  400 . 
         [0055]    The current control unit  500  may include the first current control switch SW 1  and the second current control switch SW 2 . The first current control switch SW 1  is connected between the control terminal of the first power switch PM 11  and the current source unit  400 , and is turned on or off by the first switching signal SS 1  of the comparison unit  300 . The second current control switch SW 2  is connected between the control terminal of the first power switch PM 11  and the ground, and is turned on or off by the second switching signal SS 2  of the comparison unit  300 . The control terminal of the first power switch PM 11  corresponds to the gate of the first P channel MOS transistor. 
         [0056]    As shown in  FIG. 3 , the fifth P channel MOS transistor PM 61  and the sixth P channel MOS transistor PM 62  of the error amplification unit  600  determine an amplification gain. Further, the error amplification unit  600  amplifies the error voltage between the reference voltage Vref and the second detection voltage Vd 2  of the voltage detection unit  200  by the third N channel MOS transistor NM 61  and the fourth N channel MOS transistor NM 62  that form a differential amplification structure. Then, the error amplification unit  600  outputs the amplified error voltage to the gate of the second power switch PM 12 , and controls the second power switch PM 12  by using the error voltage, such that the error amplification unit  600  controls the amount of current flowing through the power switch unit  100 . 
         [0057]    As shown in  FIGS. 3 and 4 , at the initial power up, the current source unit is connected to the first power switch according to the first switching signal SS 1  and the second switching signal SS 2  of the regulator. The first power switch and the current source unit form a current mirror, so that it is controlled that a constant current flows by using the first power switch at the initial power up. The first power switch is connected to the ground after the soft-start period from the initial power up, so that it is controlled that the maximum amount of time flows. 
         [0058]    As described above, in the related art, a battery is damaged since an excessive amount of current is drawn from the battery in order to charge the load capacitor CL when the regulator is turned on. However, according to the embodiment of the invention, the damage to the battery caused by an over voltage can be prevented by limiting a current to a current allowed to flow from the battery. 
         [0059]    As set forth above, according to the exemplary embodiment of the invention, soft-starting is implemented by using a current source to cause a predetermined amount of current to flow through a power switch at initial power up, such that excessive power consumption can be prevented at the initial power up, and soft-starting results in noise reduction and extension of battery life. 
         [0060]    While the present invention has been shown and described in connection with the exemplary embodiments, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the spirit and scope of the invention as defined by the appended claims.