Abstract:
A plug detection circuit. The detected circuit is disposed in an electronics device with an earphone jack, accepting plugs with a plurality of conductive rings. The detection circuit has a plurality of pins, wherein a first pin detects, and outputs a first logic potential, and a second pin detects the potentials at the conductive rings and outputs a second logic potential. The detection circuit determines the type of earphone connected to the earphone jack.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The present invention relates to a detection circuit, and more particularly, to a plug detection circuit detecting the type of earphone connected.  
         [0003]     2. Description of the Related Art  
         [0004]     Normally, earphones used with personal stereos are restricted to output only, but those used with cell phones can integrate microphone function. In both cases, the earphones can implement a three-wire structure. For use with a combination cell phone/PDA, however, three-wire structure is insufficient. Thus, combination cell phone/PDA units normally employ four-wire plugs. However, four-wire plugs have poor compatibility with other devices and higher cost.  
         [0005]     Therefore, there is a need for an earphone jack that can detect the type of earphone connected that enables use thereof, irrespective of type.  
       SUMMARY OF THE INVENTION  
       [0006]     An object of the present invention is to provide an earphone jack that can detect the type of earphone connected.  
         [0007]     According to the above mentioned object, the present invention provides a plug detection circuit for detecting the type of earphone connected. The earphone plug has plural conductive rings. In the present invention, plug detection circuit has at least one first pin and one second pin. The first pin detects whether an earphone is connected to the earphone jack, and outputs a first logic potential. The second pin detects the potential at the conductive ring of the earphone plug, and outputs a second logic potential. Plug detection circuit determines the type of earphone connected according to the first logic potential and the second logic potential. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0008]     The present invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:  
         [0009]      FIG. 1  is an equivalent diagram of a plug detection circuit with no earphone plug connected;  
         [0010]      FIG. 2  is an equivalent diagram of plug detection circuit with a typical earphone plug connected;  
         [0011]      FIG. 3  is an equivalent diagram of plug detection circuit with an earphone plug with microphone function connected; and  
         [0012]      FIG. 4  shows the relationship between the detection result, the first logic potential and the second logic potential. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0013]      FIG. 1  is an equivalent diagram of plug detection circuit according to the invention with no plug connected. As shown in  FIG. 1 , plug detection circuit of the present invention includes resistors R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , capacitors C 1  and C 2 , and a switch S 1 . The earphone jack has six pins  1 - 6 , wherein the grounding ring  10  is electrically coupled to pin  4 . The resistor R 1  is coupled between the voltage source Vcc and pin  1 . The resistor R 2  is coupled between pin  1  and the node GPIO 1 . The resistor R 3  is coupled between pin  3  and ground. In this case, the potential at the node GPIO 1  is defined as the first logic potential. Resistor R 4  is coupled between the voltage source Vcc and pin  2 . Resistor R 5  is coupled between pin  2  and the node P 1 . Capacitor C 2  is coupled between the node P 1  and ground. Resistor R 6  is coupled between the voltage source Vcc and the node GPIO 2 . The potential at the node GPIO 2  of the resistor R 6  and switch S 1  is defined as the second logic potential. Switch S 1  is coupled to the resistors R 5  and R 6  and ground. In this case, switch S 1  is a MOS transistor having a gate coupled to the resistor R 5  at node P 1 . Pin  5  and pin  6  are coupled together and pin  3  and pin  1  are coupled together when no plug is connected to the jack. At this time, the potential at node GPIO 1  is a divided-voltage produced by the resistors R 1  and R 3 . A low pass filter consists of the resistor R 2  and the capacitor C 1 . The potential at node GPIO 1  is regarded as low when the resistance of the resistor R 1  exceeds that of the resistor R 3 . The voltage source Vcc charges the capacitor C 2  through the resistors R 4  and R 5 . Finally, the potential at node P 1  is increased to voltage source Vcc to turn on switch S 1 , with the potential at node GPIO 2  also low.  
         [0014]      FIG. 2  is an equivalent diagram of plug detection circuit according to the invention with plug  20  of a typical earphone connected. Plug  20  of a typical earphone is a three-wire plug having a first conductive ring  11 , as shown in  FIG. 2 . When plug  20  of the typical earphone is connected to the earphone jack, the first conductive ring  11  of plug  20  is coupled to ground, pin  2  is coupled to pin  4  through the first conductive ring  11  of plug  20  and ground ring  10 . Thus, pin  2  is grounded, and potential at node P 1  grounded. Further, switch S 1  is turned off, and the potential at node GPIO 2  is high. In addition, pin  1  is separated from pin  3 , and pin  5  is separated from pin  6  by insertion of plug  20 . The voltage source Vcc charges capacitor C 2  through the resistor R 1  and R 2 . Finally, the capacitor C 2  is charged to the voltage source Vcc, and the potential at node GPIO 1  is high. Therefore, the potentials at nodes GPIO 1  and GPIO 2  of the detection circuit are both high only when plug  20  of a typical earphone is connected to the earphone jack.  
         [0015]      FIG. 3  is an equivalent diagram of plug detection circuit according to the invention with earphone plug  30  having microphone function connected. Plug  30  with microphone function and plug  20  of the typical earphone shown in  FIG. 2  is that plug  30  not only has a first conductive ring  11  but also a second conductive ring  12 . When plug  30  is connected to the earphone jack, the resistor R 4  is coupled to the second conductive ring  12 , the potential at node P 1  is a divided-voltage produced by the resistors R 4  and input impendence of the second conductive ring  12 . A low pass filter consists of the resistor R 5  and the capacitor C 2 , and the potential at node P 1  is regarded as high if the input impendence of the second conductive ring  12  exceeds the resistance of the resistor R 4 . In addition, pin  1  is separated from pin  3 , and pin  5 ′ is separated from pin  6  due to the insertion by plug  30 . At this time, the voltage source charges the capacitor C 1  through the resistor R 1  and R 2 . Finally, the potential across the capacitor is increased to the voltage source Vcc, and the potential at node GPIO 1  is high.  
         [0016]      FIG. 4  shows the relationship between the detection result, the first logic potential, and the second logic potential. As shown in  FIG. 4 , the potentials at nodes GPIO 1  and GPIO 2  are both low when no plug is connected to the earphone jack. The potentials at nodes GPIO 1  and GPIO 2  are both high when a plug of a typical earphone is connected to the earphone jack. In addition, the potentials at nodes GPIO 1  and GPIO 2  are high and low respectively when a plug of an earphone with microphone function is connected to the earphone jack.  
         [0017]     Therefore, the present invention can detect whether a plug connected is of a typical earphone or a compound earphone with microphone function, according to the potentials at the nodes GPIO 1  and GPIO 2 , and enable use of both types.  
         [0018]     Although the present invention has been described in its preferred embodiments, it is not intended to limit the invention to the precise embodiments disclosed herein. Those who are skilled in this technology can still make various alterations and modifications without departing from the scope and spirit of this invention. Therefore, the scope of the present invention shall be defined and protected by the following claims and their equivalents.