Abstract:
A device having a switch with a voltage applied across the switch. A current sensing circuit is connected to one terminal of the switch. The current sensing circuit receives power independently of the voltage applied across the switch. The power supply shares the other terminal of the switch with the current sensing circuit. The switch is adapted for opening and closing. When the switch closes, the current sensing circuit senses current through the switch and upon opening the switch the high voltage of the switch is blocked from the current sensing circuit. The sense current is caused to flow from the current sensing circuit to the other terminal when the switch is closed. The flow of the sense current produces a voltage which is compared differentially to another voltage referenced by the other terminal

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    The present invention benefits from U.S. application 60/992,589 filed 5 Dec. 2007 and is hereby incorporated by reference in its entirety. 
     
    
     TECHNICAL FIELD 
       [0002]    The present invention relates to current sensing in electronic circuitry and specifically to a device and method for current sensing in a switching power converter. 
       DESCRIPTION OF RELATED ART 
       [0003]    Reference is made to  FIG. 1  which illustrates the conventional current sensing circuit of US 2008/0246460. US 2008/0246460 illustrates a conventional current sensing circuit 202 coupled to switching field-effect-transistors (FET) high side FET 210, and low side FET 206 within a switching regulator. The current-sensing-circuitry 202 is configured to bypass a small sense current 208 from the conducting current 209 of the switching-FET according to a sense ratio. The conducting current for the switching regulator is controlled by a control signal. Current sensing circuit 202 includes a sensing FET 204 which is coupled in parallel with low-side FET 206. Control logic 306 provides control signals to low-side FET 206, high side FET 210 and current sensing FET 204. More specifically, the drains and gates of both sensing FET 204 and low-side FET 206 are tied together. Hence, the same control signal that controls low-side FET 206 also controls sensing FET 204. The source of low-side FET 206 is connected to the ground while the source of sensing FET 204 is used as the output node. Although the sources of the two FETs are not tied together, it is desirable that they have the same voltage. US 2008/0246460 describes a technique that sets the source voltage of sensing FET 204 to be the same as the source voltage of low-side FET 206 below. Sensing FET 204 conducts a sense current 208, which is a small fraction of a main switching regulator current 209 conducted by low-side FET 206. The ratio between main switching regulator current 209 and sense current 208 is proportionate to a predetermined large number, e.g. greater than 500. 
         [0004]    A characteristic of conventional current sensing circuit 202 is that sense current 208 is supplied by main current 209 of the switched power circuit. Similarly, another well established technique to sense current is to place a small sense resistor in series with the power train (for example on the ground rail) and measure the voltage drop across the sense resistor and thus estimate the current. The current sense resistor method draws current from the switched power circuit. 
         [0005]    Thus there is a need for and it would be advantageous to have a current sensing device and method which does not draw current from the switched power circuit. 
       BRIEF SUMMARY 
       [0006]    According to a feature of the present invention there is provided a device having a switch with a voltage applied across the switch. A current sensing circuit is connected to one terminal of the switch. The current sensing circuit receives power independently of the voltage applied across the switch. The power supply shares the other terminal of the switch with the current sensing circuit. The switch is adapted for opening and closing. When the switch closes, the current sensing circuit senses current through the switch and when said switch is open the high voltage of the switch is blocked from the current sensing circuit. The sense current is preferably caused to flow from the current sensing circuit to the other terminal when the switch is closed. The flow of the sense current produces a voltage which is compared differentially to another voltage referenced by the other terminal. The current sensing circuit may include an operational amplifier which outputs a voltage sense signal which is proportional to the current flowing through the switch. The current sensing circuit may include a switched power converter which includes the switch. The current sensing circuit senses the current while the voltage output of the switched power converter is switched to a common rail. The current sensing circuit draws power independently and not from the switched power converter. The switch is preferably a MOSFET, but may be one of many other switch types—such as, by way of example, insulated-gate bipolar transistor (IGBT), bipolar junction transistor (BJT) or other transitors or similar devices. The switched power converter may be a buck converter or a boost converter or a buck and boost converter. Additionally an inductor is connected to the terminal of the switch and the current sensing circuit senses current through the inductor and does not integrate voltage across the inductor. 
         [0007]    According to a feature of the present invention there is provided a method in a device including a switch. A voltage is applied across the switch. A current sensing circuit is connected to one terminal of the switch. The current sensing circuit receives power independently of the voltage. the power derived independently, shares the other terminal of the switch, with the current sensing circuit. The switch is adapted for opening and closing. Upon closing the switch, the current sensing circuit senses the current through the switch. Upon opening the switch, the high voltage of the switch is blocked from the current sensing circuit. 
         [0008]    According to a feature of the present invention there is provided a circuit for sensing current flowing through an inductor. The circuit includes: a cathode of a first diode connected to a first side of the inductor. A cathode of a second diode connected to a second side of the inductor. A first node connecting the anode of the first diode with the anode of the second diode. A first voltage divider with a first and second resistor connected between the first node and a power supply. The connection between the first and second resistor forms a second node. A second voltage divider is formed by a third and fourth resistor. A third diode is disposed between the power supply and a ground. The connection between the third and fourth resistor forms a third node. A capacitor is disposed between the ground and the third node. An operational amplifier with a non-inverting input is connected to the second node and an inverting input is connected to the third node. A fifth resistor is connected between the output of the amplifier and the third node. Power is supplied to the operational amplifier and significant current is not drawn from the inductor. 
         [0009]    The foregoing and/or other aspects will become apparent from the following detailed description when considered in conjunction with the accompanying figures. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]    The invention is herein described, by way of example only, with reference to the accompanying drawings, wherein: 
           [0011]      FIG. 1  is a conventional circuit for sensing the output current of a switching regulator. 
           [0012]      FIG. 1   a  is block diagram of high voltage switch connected to a current sensing circuit according to an embodiment of the present invention. 
           [0013]      FIG. 1   b  is a circuit diagram of the current sensing circuit with a single input according to an embodiment of the present invention. 
           [0014]      FIG. 1   c  illustrates a method according to a feature of the present invention. 
           [0015]      FIG. 2  is a block diagram of a buck and boost converter connected to a current sensing circuit in an embodiment of the present invention. 
           [0016]      FIG. 3  is a block diagram showing circuit details of the buck and boost converter according to an embodiment of the present invention. 
           [0017]      FIG. 3   a  is graph showing the variation of current in the inductor of a buck and boost circuit according to an embodiment of the present invention. 
           [0018]      FIG. 4  is circuit diagram of the current sensing circuit according to an embodiment of the present invention; and 
           [0019]      FIG. 5  illustrates a method according to a feature of the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0020]    Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout. The embodiments are described below to explain the present invention by referring to the figures. 
         [0021]    Reference is now made to  FIG. 1   a  which is block diagram of high voltage switch G X  connected to a current sensing circuit  26   a,  according to an embodiment of the present invention. High voltage switch G X  is connected across a high voltage V X  with respect to ground. A current sensing circuit  26   a  is connected to the high voltage side (VA) of switch G X . In an embodiment of the present invention, switch G X  is a MOSFET. Alternatively switch GX can, in different embodiments of the invention, be a silicon controlled rectifier (SCR), insulated gate bipolar junction transistor (IGBT), bipolar junction transistor (BJT), field effect transistor (FET), junction field effect transistor (JFET), switching diode, mechanically operated single pole double pole switch (SPDT), SPDT electrical relay, SPDT reed relay, SPDT solid state relay, insulated gate field effect transistor (IGFET), DIAC, and TRIAC. 
         [0022]    Some embodiments of the present invention are applicable for use in a “switched power converter. The terms “switched power converter” and “switching power converter” are used herein interchangeably and refers to a switching regulator as used for example in a switched-mode power supply (SMPS). While a linear regulator maintains the desired output voltage by dissipating excess power in a pass power transistor, the switched-mode power converter rapidly switches a power transistor between saturation (full on) and cutoff (completely off) with a variable duty cycle whose average is the desired output voltage. The resulting rectangular waveform is typically low-pass filtered with an inductor and capacitor. The “switched power converter” as used herein may perform any type of power conversion or inversion including: alternating current (AC) to direct current (DC) or rectifier operation: DC in to DC out: voltage converter, or current converter, or DC to DC converter; AC in to AC out: frequency changer, cycloconverter, and/or DC in, AC out: inverter. 
         [0023]    Reference is now also made to  FIG. 1   b  which is a circuit diagram of the current sensing circuit  26   a  with a single input (VA) according to an embodiment of the present invention. Current sensing circuit  26   a  has a power supply VCC  42  which is separate from the high voltage V X  across switch G X  as shown in  FIG. 1   a.  Amplifier  40  in an embodiment of the present invention is an operational amplifier (for example OPA2359, Texas Instruments, Dallas, Tex.). It may be noted that other methods for measuring the voltage, such as an Analog to Digital converter (ADC), may also be used. The use of an operational amplifier for this purpose is given here only by way of example. A DC supply V CC    42  and a ground  44  is connected to the power supply inputs of amplifier  40 . A voltage divider chain (VDC)  402  is connected between one end of supply V CC  and ground  44 . VDC  402  has a resistor RA 1  with one end connected to supply VCC  42  and the other end connected in series with resistor RB 1 . The other end of resistor RB 1  is connected in series to the anode of diode D 3 . The cathode of diode D 3  is connected to ground  44 . The point in VDC  402  where resistors RA 1  and RB 1  are connected is the non-inverting input to amplifier  40 . A capacitor C is connected in parallel across RB 1  and D 3  and performs function of decoupling the non-inverting input of amplifier  40  and protecting circuit  26   a  from high voltages on the ground rail. A second VDC  400  is connected between one end of supply V CC  and the connection across inductor  28  shown in  FIG. 3 . VDC  400  has a resistor RA 2  with one end connected to supply VCC  42  and the other end connected in series with resistor RB 2 . The other end of resistor RB 2  is connected in to the anode of diode D 1 . The point in VDC  400  connecting resistors RA 2  and RB 2  is attached to the inverting input of amplifier  40 . The cathode of D 1  is connected to the high voltage side of switch G X  as shown in  FIG. 1   a.  A feedback resistor RC is connected between the output of amplifier  40  (V SENSE ) and the inverting input of amplifier  40 . Resistor RC is used to set the gain of amplifier  40 . In an embodiment of the present invention, diodes D 1  and D 3  (for example diode MMSD4148, Fairchild Semiconductor, ME U.S.A.) have a typical maximum repetitive reverse voltage of 100 volts which correspond with the typical voltage values V X  found across MOSFET G X . Diodes D 1  and D 3  are also preferably matched diodes. 
         [0024]    Referring back to  FIG. 1   a  when MOSFET G X  is closed VA is brought low i.e. near in value to the zero volts of the ground connection of MOSFET G X . Current sensing circuit  26   a  senses the current I x  which flows through MOSFET G X . With voltage VA low, diode D 1  is forward biased and a measure of the current I X  flowing through MOSFET G X  is given by Eq. 1a when RA 1 =RA 2 =RA and RB 1 =RB 2 =RB: 
         [0000]    
       
         
           
             
               
                 
                   
                     V 
                     SENSE 
                   
                   = 
                   
                     [ 
                     
                       
                         ( 
                         
                           
                             
                               
                                 V 
                                 CC 
                               
                               · 
                               RB 
                             
                             + 
                             
                               
                                 VD 
                                 3 
                               
                               · 
                               RA 
                             
                           
                           
                             RA 
                             + 
                             RB 
                           
                         
                         ) 
                       
                       + 
                       
                         
                           RC 
                           RB 
                         
                          
                         
                           ( 
                           
                             
                               VD 
                               3 
                             
                             - 
                             
                               VD 
                               1 
                             
                             - 
                             VA 
                           
                           ) 
                         
                       
                     
                     ] 
                   
                 
               
               
                 
                   
                     Eq 
                     . 
                     
                         
                     
                      
                     1 
                   
                    
                   
                       
                   
                    
                   a 
                 
               
             
           
         
       
     
         [0000]    where VD 3  is the voltage of diode D 3 . Diode D 3  is used to match the voltage drop of D 1  so that the amplifier  40  won&#39;t reach it&#39;s saturation point when switch G X  is conducting. the current measurement will be accurate when MOSFET G X  is conducting. Diode D 1  in current sensing circuit  26   a  is in reverse bias when MOSFET G X  is off and protects current sensing circuit  26   a  from high voltage VA (typically 100 volts). 
         [0025]    Reference is now made to  FIG. 1   c  which illustrates a method according to a feature of the present invention. In decision box  600 , it is determined whether either switch GX is open or closed, if MOSFET G X  is open the voltage V X  is blocked by current sensing circuit  26   a  (step  604 ), if MOSFET G X  is closed the voltage V X  is sensed by current sensing circuit  26   a  (step  602 ) as V SENSE  proportional to the current I x  flows through MOSFET G X . 
         [0026]    Reference is now made to  FIG. 2  which illustrates schematically a buck boost converter  24  and current sensing circuit  26  according to an embodiment of the present invention. Buck and boost converter  24  has a buck circuit  20  which receives an input voltage V IN  to buck and boost converter  24 . The output voltage of buck circuit  20  VA is with respect to common rail  29 . An inductor  28  and common rail  29  connect the output of buck circuit  20  to the input of boost circuit  22 . The input voltage VB of boost circuit  22  is with respect to common rail  29 . The output of boost circuit  22  is the output voltage V OUT  of buck and boost converter  24 . Current sensing circuit  26  is connected across inductor  28  and V SENSE  is the output of current sensing circuit  26 . 
         [0027]    Reference is now made to  FIG. 3  which is a block diagram showing circuit details of buck and boost converter  24  according to an embodiment of the present invention. Buck and boost converter  24  has buck circuit  20  which receives the input voltage V IN  to buck and boost converter  24 . Buck circuit  20  has a low side buck MOSFET G A , shunt connected across the output of buck circuit  20  and a high side buck MOSFET G C , connected in series between the output and input of buck circuit  20 . A capacitor C 1  is shunt connected across the input of buck circuit  20 . The output voltage of buck circuit  20  VA is with respect to common rail  29 . Inductor  28  and common rail  29  connects the output of buck circuit  20  to the input of boost circuit  22 . Boost circuit  22  has a low side boost MOSFET G B , shunt connected across the input of boost circuit  22  and a high side boost MOSFET G D , connected in series between the output and input of boost circuit  22 . A capacitor C 2  is shunt connected across the output of boost circuit  22 . Current sensing circuit  26  is connected across inductor  28  and V SENSE  is the output of current sensing circuit  26 . 
         [0028]    Reference is now also made to  FIG. 3   a,  a graph showing the variation of current IL in inductor  28  according to an embodiment of the present invention. The working operation of buck and boost converter  24  is in two time phases T 1  and T 2 . Referring back to  FIG. 3 , in time phase T 2  buck and boost converter  24  operates with MOSFETS G A  off, G B  on, G D  off and G C  on. During phase T 1  the output voltage of buck circuit  20  VA is approximately the input voltage V IN  of buck and boost converter  24  and the input voltage of boost circuit  22  VB is brought low i.e. near in value to the zero volts of common rail  29 . In time phase T 1 , buck and boost converter  24  operates with MOSFETS G A  on, G B  off, G D  on and G C  off. During phase T 2  the output voltage of buck circuit  20  VA is brought low i.e. near in value to the zero volts of common rail  29  and the input voltage of boost circuit  22  VB is initially approximately equal to the output voltage V OUT  of buck and boost converter  24 . During phase T 1 , current sensing circuit  26  is sensing the current I S  which flows through MOSFET G A . 
         [0029]    Reference is now also made to  FIG. 4 . which is a circuit diagram of current sensing circuit  26  according to an embodiment of the present invention. Amplifier  40  in an embodiment of the present invention is an operational amplifier (for example OPA2359, Texas Instruments, Dallas, Tex.). It may be noted that other methods for measuring the voltage, such as an Analog to Digital converter (ADC), may also be used. The use of an Op-Amp for this purpose is given here only by way of example. A DC supply V CC    42  and a ground  44  is connected to the power supply inputs of amplifier  40 . A voltage divider chain (VDC)  402  is connected between one end of supply V CC  and ground  44 . VDC  402  has a resistor RA 1  with one end connected to supply VCC  42  and the other end connected in series with resistor RB 1 . The other end of resistor RB 1  is connected in series to the anode of diode D 3 . The cathode of diode D 3  is connected to ground  44 . The point in VDC  402  where resistors RA 1  and RB 1  are connected is the non-inverting input to amplifier  40 . A capacitor C is connected in parallel across RB 1  and D 3  and performs function of decoupling the non-inverting input of amplifier  40 . A second VDC  400  is connected between one end of supply V CC  and the connection across inductor  28  shown in  FIG. 3 . VDC  400  has a resistor RA 2  with one end connected to supply VCC  42  and the other end connected in series with resistor RB 2 . The other end of resistor RB 2  is connected in to the anodes of diodes D 1  and D 2 . The point in VDC  400  connecting resistors RA 2  and RB 2  is attached to the inverting input of amplifier  40 . The cathodes of D 1  and D 2  are connected across inductor  28  as shown in  FIG. 3 . A feedback resistor RC is connected between the output of amplifier  40  (V SENSE ) and the inverting input of amplifier  40 . Resistor RC is used to set the gain of amplifier  40 . In an embodiment of the present invention, diodes D 1 , D 2  and D 3  (for example diode MMSD4148, Fairchild Semiconductor, ME U.S.A.) have a typical maximum repetitive reverse voltage of 100 volts which correspond with typical voltages VA and VB found in buck and boost converter  24 . 
         [0030]    Referring back to  FIG. 3   a,  during phase T 1  the output voltage of buck circuit  20  VA is brought low i.e. near in value to the zero volts of common rail  29 , and the input voltage of boost circuit  22  VB is initially approximately equal to the output voltage V OUT  of buck and boost converter  24 . During phase T 1 , current sensing circuit  26  senses the current I S  which flows through MOSFET G A . Diode D 2  in current sensing circuit  26  is in reverse bias and protects current sensing circuit  26  from high voltage VB which is typically 100 volts. During phase T 1  with voltage VA low, diode D 1  is forward biased and a measure of the current I S  flowing through MOSFET G A  is given by Eq.1 when RA 1 =RA 2 =RA and RB 1 =RB 2 =RB: 
         [0000]    
       
         
           
             
               
                 
                   
                     V 
                     SENSE 
                   
                   = 
                   
                     [ 
                     
                       
                         ( 
                         
                           
                             
                               V 
                               CC 
                             
                              
                             RB 
                           
                           
                             RA 
                             + 
                             RB 
                           
                         
                         ) 
                       
                       + 
                       
                         VD 
                         3 
                       
                       - 
                       
                         
                           ( 
                           
                             
                               I 
                               S 
                             
                              
                             Rds 
                           
                           ) 
                         
                          
                         
                           RC 
                           RB 
                         
                       
                     
                     ] 
                   
                 
               
               
                 
                   Eq 
                   . 
                   
                       
                   
                    
                   1 
                 
               
             
           
         
       
     
         [0000]    where Rds is the resistance between drain and source of MOSFET G A  and VD 3  is the voltage of diode D 3 . Diode D 3  is used to match the voltage drop across D 1  so that the current measurement will be accurate when MOSFET G A  is conducting. During phase T 2 , current sensing circuit  26  is sensing the current I S  which flows through MOSFET G B . Diode D 1  in current sensing circuit  26  is in reverse bias and is protecting current sensing circuit  26  from high voltage VA which is typically 100 volts. During phase T 2  with voltage VB low, diode D 2  is forward biased and a measure of the current I S  flowing through MOSFET G B  is given by Eq.2 when RA 1 =RA 2 =RA and RB 1 =RB 2 =RB. 
         [0000]    
       
         
           
             
               
                 
                   
                     V 
                     SENSE 
                   
                   = 
                   
                     [ 
                     
                       
                         ( 
                         
                           
                             
                               V 
                               CC 
                             
                              
                             RB 
                           
                           
                             RA 
                             + 
                             RB 
                           
                         
                         ) 
                       
                       + 
                       
                         VD 
                         3 
                       
                       + 
                       
                         
                           ( 
                           
                             
                               I 
                               S 
                             
                              
                             Rds 
                           
                           ) 
                         
                          
                         
                           RC 
                           RB 
                         
                       
                     
                     ] 
                   
                 
               
               
                 
                   Eq 
                   . 
                   
                       
                   
                    
                   2 
                 
               
             
           
         
       
     
         [0000]    where Rds is the resistance between drain and source of MOSFET G B  and VD 3  is the voltage of diode D 3 . Diode D 3  is used to match the voltage drop across D 2  so that the current measurement will be accurate when MOSFET G B  is conducting. 
         [0031]    Reference is now made to  FIG. 5  which illustrates a method according to a feature of the present invention. In decision box  500 , it is determined whether either of high voltages VA or VB are low (i.e. switched to common rail  29 ) and if so, the voltage differential between VA and VB is sensed (step  502 ) as V SENSE  proportional to the current Is flowing through MOSFETS G A  or G B . 
         [0032]    The articles “a”, “an”, as used hereinafter are intended to mean and be equivalent to “one or more” or “at least one”, For instance, “a switch e” means “one or more switches” . . . . 
         [0033]    While the invention has been described with respect to a limited number of embodiments, it will be appreciated that many variations, modifications and other applications of the invention may be made.