Abstract:
Input signals from a signal input terminal are input to a logic circuit, and a control signal corresponding to states of the input signals is output. The control signal is supplied to an output circuit, a plurality of transistors are controlled, and a drive signal is output corresponding to states of the transistors. In the logic circuit, the logic is switched according to the polarity of the setting signal which is input to a logic setting terminal, and a control signal corresponding to the input signal is changed.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    The entire disclosure of Japanese Patent Application No. 2008-180772 including specification, claims, drawings, and abstract is incorporated herein by reference. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The present invention relates to a drive signal output circuit which outputs a drive signal to a load such as a motor and a multi-chip package including the drive signal output circuit. 
         [0004]    2. Description of the Related Art 
         [0005]    In the related art, an H bridge circuit is used in a drive circuit for a motor or the like. In the H bridge, two series connections each having a p-type transistor and an n-type transistor are placed between a power supply line and a ground line, and intermediate points of the series connections are set as a pair of outputs. 
         [0006]    In the H bridge, a load such as a coil is connected to the pair of outputs, and a direction of current to the load is controlled by ON and OFF states of a transistor. As the control signal of each transistor, a sine wave is used, or a simple H signal and a simple L signal are also used. In the latter case, three states are generated, one indicating a current to the load in the forward direction, one indicating a backward direction, and one indicating an OFF state. 
         [0007]    For example, in a case of a stepping motor, two coils are used, and two H bridges are used for driving the coils. A rotor position is determined based on the state of the current supplied to the two coils. Because of this, it is possible to rotate the rotor in the forward or backward direction by a desired amount by sequentially changing the state of the current supplied to the two coils in a particular order. 
         [0008]    Normally, a signal for driving the H bridge is supplied from outside. Therefore, a circuit which drives the transistor of the H bridge based on the signal supplied from the outside is required. The driving of the load such as the stepping motor, on the other hand, is not necessarily in one mode. It is not efficient to prepare a drive signal output circuit for each load and for each of various modes. 
       SUMMARY OF THE INVENTION 
       [0009]    According to various aspects of the present invention, logic of a logic circuit can be switched by a setting of a logic setting terminal. Because of this, one circuit can be used in a plurality of modes. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]    A preferred embodiment of the present invention will be described in detail by reference to the drawings, wherein: 
           [0011]      FIG. 1  is a diagram showing a structure of a drive signal output circuit; 
           [0012]      FIG. 2A  is a diagram showing a truth table (M=H) of a drive signal output circuit; 
           [0013]      FIG. 2B  is a diagram showing a truth table (M=L) of a drive signal output circuit; 
           [0014]      FIG. 3  is a diagram showing a truth table for driving a stepping motor; 
           [0015]      FIG. 4A  is a diagram showing current of the H bridge during a forward rotation; 
           [0016]      FIG. 4B  is a diagram showing current of the H bridge during a backward rotation; 
           [0017]      FIG. 5  is a diagram showing a coil current; 
           [0018]      FIG. 6  is a diagram showing a connection of a logic chip and a driver chip; and 
           [0019]      FIG. 7  is a diagram showing a setting of a logic setting pad. 
       
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0020]    A preferred embodiment of the present invention will now be described with reference to the drawings. 
         [0021]      FIG. 1  is a diagram showing a structure of a drive signal output circuit according to a preferred embodiment of the present invention. The drive signal output circuit is formed on a semiconductor chip, and receives input of two input signals IN 1  and IN 2  from input signal pads  10  and  12 , respectively. A logic setting pad  14  is also provided, to which a setting signal M of an H level or an L level is input. 
         [0022]    The input signals IN 1  and IN 2  and the setting signal M from the three pads  10 ,  12 , and  14  are input to inverters  16 ,  18 , and  20 , respectively, and inverted signals are generated. Six signals including the signals IN 1 , IN 2 , and M and the inverted signals of these signals are input to a logic circuit  22 . The logic circuit  22  comprises nine NAND gates  24 ˜ 40 . The signals M, IN 1 , and inverted IN 2  are input to the NAND gate  24 . The signals M, inverted IN 1 , and IN 2  are input to the NAND gate  26 . The signals M, IN 1 , and  1 N 2  are input to the NAND gate  28 . The signals inverted M, IN 1 , and inverted IN 2  are input to the NAND gate  30 . The signals inverted M, IN 1 , and IN 2  are input to the NAND gate  32 . An output of the NAND gate  24  and an output of the NAND gate  30  are input to the NAND gate  34 . An output of the NAND gate  26 , an output of the NAND gate  28 , and an output of the NAND gate  32  are input to the NAND gate  36 . The output of the NAND gate  26  and the output of the NAND gate  32  are input to the NAND gate  38 . The output of the NAND gate  24 , the output of the NAND gate  28 , and the output of the NAND gate  30  are input to the NAND gate  40 . 
         [0023]    Outputs of the NAND gates  34  and  38  are inverted by inverters  42  and  44 . These inverted outputs and the outputs of the NAND gates  34  and  40  are input, as four outputs of the logic circuit  22 , to an H bridge circuit  46  which is an output circuit. 
         [0024]    The H bridge circuit  46  comprises four transistors Q 1 ˜Q 4  placed between a power supply and ground. A p-channel transistor Q 1  has a source connected to the power supply and a drain connected to a drain of an n-channel transistor Q 2 . A source of the n-channel transistor Q 2  is connected to the ground. A p-channel transistor Q 3  has a source connected to the power supply and a drain connected to a drain of an n-channel transistor Q 4 . A source of the n-channel transistor Q 4  is connected to the ground. A connection point between the transistors Q 1  and Q 2  is connected to an output terminal OUT 1  and a connection point between the transistors Q 3  and Q 4  is connected to an output terminal OUT 2 . 
         [0025]    The output of the inverter  42  is supplied to a gate of the transistor Q 1 , the output of the NAND gate  36  is supplied to a gate of the transistor Q 2 , the output of the inverter  44  is supplied to a gate of the transistor Q 3 , and the output of the NAND gate  40  is supplied to a gate of the transistor Q 4 . 
         [0026]    A load is connected between the output terminals OUT 1  and OUT 2 . In the case of the above-described circuit, the states of OUT 1  and OUT 2  based on the states of the input signals IN 1  and IN 2  are as shown in  FIGS. 2A and 2B .  FIG. 2A  shows cases when the logic setting signal M is at the H level and  FIG. 2B  shows cases when the logic setting signal M is at the L level. In the case of  FIG. 2A  where the logic setting signal is at the H level as described, the levels to be supplied to the terminals of the load are of four types of OFF-OFF, L-H, H-L, and L-L. According to these, the current for the load may be switched OFF, the current for the load may be applied in the forward direction (or backward direction) or backward direction (or forward direction), and the terminals of the load may be short-circuited to ground. Therefore, in the case of a stepping motor, four states may be realized including a state where no current is supplied to the coil, a current of a forward direction or backward direction is supplied to the coil, and a state where the terminals of the coil are connected to ground and a brake is applied to the motor. 
         [0027]    In the case of  FIG. 2B  where the logic setting signal M is at the L level, the levels supplied to the terminals of the load are of four types including OFF-OFF, OFF-OFF, L-H and H-L. With such a configuration, the current for the load may be switched OFF, or the current for the load may be applied in the forward direction (or backward direction) or backward direction (forward direction). In the case of the stepping motor, three states may be realized including a state where no current is supplied to the coil, a state where a current of forward direction is supplied, and a state where a current of backward direction is supplied. 
         [0028]    In this manner, the states of the output terminals OUT 1  and OUT 2  with respect to the states of the input signals IN 1  and IN 2  can be switched with the logic setting signal M. 
         [0029]    In a stepping motor, because two coils, that is, an x-axis coil and a y-axis coil, are provided, another set of a circuitry similar to  FIG. 1  is provided.  FIG. 3  shows a truth table for this configuration. In  FIG. 3 , input signals for the other coil are represented by IN 3  and IN 4  and output signals of the other coil are represented by OUT 3  and OUT 4 . In this manner, the inputs IN 1  and IN 2  are in eight states, that is, H-L, H-L, H-L, L-L, L-H, L-H, L-H, and L-L, with the corresponding inputs IN 3  and IN 4  being L-H, L-L, H-L, H-L, H-L, and L-L. In other words, the states are shifted by 2 steps. Because  8  steps correspond to 360°, the shift corresponds to 90°. Therefore, the output signals OUT 3  and OUT 4  have the phases shifted by 90° from the output signals OUT 1  and OUT 2 , and currents having the phase shifted by 90° are supplied to the x-axis coil and the y-axis coil. 
         [0030]      FIG. 4A  shows a state of the current where the output signals OUT 1  and OUT 2  are H-L and  FIG. 4B  shows a state of current where the output signals OUT 3  and OUT 4  are H-L. When the eight states of  FIG. 3  correspond to rotor positions  1 ˜ 8 , the coil current driven with the output signals OUT 1  and OUT 2  is I 1  shown at the upper section of  FIG. 5  and the coil current driven with the output signals OUT 3  and OUT 4  is I 2  shown at the lower section of  FIG. 5 . As shown, the currents I 1  and I 2  have phases which differ by 90°. For example, when I 1  is set for the x-axis coil, I 2  is set for the y-axis coil, the outputs signals OUT 1 , OUT 2 , OUT 3 , OUT 4  are H-L and H-L with −45°, in the state  1 , the rotor is at −45°, in the state  2 , the rotor is at 0°, and so on, with the phase progressing by 45° for each subsequent position. Therefore, by sequentially changing the input signal as shown in  FIG. 3 , it is possible to advance the stepping motor by one step (45°). 
         [0031]    Although not shown in  FIGS. 3 and 4 , by setting all of the input signals IN 1 , IN 2 , IN 3 , and IN 4  to the H level, it is possible to switch the transistors Q 2  and Q 4  of the two H bridges ON, so that a brake may be applied. 
         [0032]      FIG. 6  shows an example configuration where a logic chip  60 , which is a semiconductor chip such as a microcomputer, and a driver chip  62 , which is a semiconductor chip of an analog circuit having the driving signal output circuit of the present embodiment, are placed on one board. A circuit for shake correction of a camera is preferably formed in such a multi-chip package where a driver chip and the logic chip (microcomputer) are mounted on one package. In  FIG. 6 , only the structure of transmission of the logic setting signal M is shown. In this manner, a pad of the logic chip  60  for outputting the logic setting signal M and a pad  50  on the board are connected by a wire bonding and the pad  50  and a pad  14  of the driver chip  62  for logic setting signal are connected by a wire bonding. 
         [0033]    With this structure, the logic of the logic circuit  22  in the drive signal output circuit of the present embodiment can be switched by the logic setting signal M from the logic chip  60 . That is, the logic in the driver chip can be easily switched by a signal from the logic chip such as a microcomputer. 
         [0034]      FIG. 7  shows another configuration. A driver chip  62  is provided on a board, a power supply pad  52  of the driver chip  62  is connected to a lead  54 , and a ground pad  56  is connected to a lead  58 . By connecting the pad  14  for logic setting to one of the leads  54  and  58 , it is possible to set the logic setting signal M to one of the H level and the L level. In particular, the pad  14  for logic setting is placed between the power supply pad  52  and the ground pad  56  and the leads  54  and  68  are also placed at positions corresponding to the power supply pad  52  and the ground pad  56 . The logic setting pad  14  is not connected to any structure other than the leads  54  and  58 . Therefore, even when the logic setting pad  14  is connected to one of the leads  54  and  58  by a wire boding, the wire is not tangled with other wires. 
         [0035]    In the present embodiment, the stepping motor is connected between the outputs OUT 1  and OUT 2 . As described, because the stepping motor comprises the x-axis coil and the y-axis coil, two H bridges are required. However, if the coil is a voice coil or the like, only one H bridge is required. Alternatively, it is also preferable to use n-type transistors for the transistors Q 1  and Q 3 . In this case, the inverters  42  and  44  in  FIG. 1  are not required, and the outputs of the NAND gates  34  and  38  are boosted with a charge pump or the like and supplied to the gates of the transistors Q 1  and Q 3 . By using n-type transistors for all transistors, it is possible to improve the current capability.