Abstract:
Methods, systems and apparatus for a liquid crystal display panel having a first substrate with a color filter, an over-coating and a common electrode. The second substrate includes an insulating layer surface facing the first substrate, a pixel electrode, a plurality of common and pixel domain guides formed on the common and the pixel electrodes, a plurality of electric shields on one of the common or pixel electrodes and a liquid crystal layer vertically aligned between the first and second substrates. The panel also includes a drive circuit for applying a voltage to generate an electric field to control liquid crystal molecule orientation corresponding to the plurality of domain guides and electric shields to form a multi-domain liquid crystal display panel device. The plural domain guides are either protrusions or slits formed in the common electrode and the pixel electrode to form the multi-domain vertical alignment liquid crystal device.

Description:
FIELD OF THE INVENTION 
       [0001]    This invention relates to transmissive multi-domain vertical alignment liquid crystal displays, and more specifically to apparatus, methods systems and devices for producing multi-domain vertical alignment liquid crystal displays with wide viewing angles and improved gamma curves at the oblique viewing angles for high performance liquid crystal display television applications. 
       BACKGROUND AND PRIOR ART 
       [0002]    For large-screen liquid crystal displays (LCDs), high contrast ratio, fast response time, wide viewing angle, and excellent color performance such as small color shift and good angular-dependent color uniformity all have to be satisfied simultaneously. The vertical alignment (VA) technology as one of the mainstream LCD TV technologies has been widely investigated and developed. The normally black VA LCDs exhibit an excellent contrast ratio at normal incident angle. The response time issue can be solved with the overdrive and undershoot approach describe in S. T. Wu, “Nematic liquid crystal modulator with response time less than 100 μs at room temperature”, Appl. Phys. Lett., Vol. 57, p. 986, (1990). 
         [0003]    To achieve a wide viewing angle, the formation of multi-domain vertical alignment (MVA) under the external electric fields is critically required. Currently, four-domain and eight-domain VA LC configurations are commonly practiced by the adoption of protrusions or slits on the device substrates. With the help of the optimized compensation films, the viewing angle of a typical MVA-LCD can reach above 100:1 at the ±80° viewing cone as described in Q. Hong et al., “Extraordinarily-high-contrast and wide-view liquid crystal displays”, Appl. Phys. Lett., vol. 86, p. 121107 (2005). Meanwhile, compared with the in-plane switching (IPS) mode, the color performance in the color shift and angular color uniformity of VA mode is a little inferior, which usually shows an evident gamut curve distortion at the large oblique viewing angles as described in H. C. Jin, et al., “Development of 100-in. TFT-LCDs for HDTV and public-information-display applications”, Journal of the SID, vol. 15, p. 277 (2007). 
         [0004]    Some methods have been proposed to improve the gamma curve of VA mode LCDs. From the panel driving point, the dynamic correction of LCD gamma curve approach has been described in U.S. Pat. No. 6,256,010 B1 issued to Y. C. Chen et al. in 2001 and U.S. Pat. No. 7,164,284 B2 issued to H. Pan et al. in 2007. On the contrary, its effectiveness in reducing the gamma curve at the oblique viewing angle is questionable. From the panel design point, a capacitive coupled (CC) method is disclosed in U.S. Pat. No. 7,158,201 B2 issued to by H. S. Kim et al in 2007, and a two-TFT approach is proposed to produce eight domains as published by S. S. Kim in SID&#39;05 Symposium Digest, p. 1842-1847, and by C. C. Liu et al in Int&#39;l Display Workshops, p. 625-626 (2006). Although the abovementioned methods can improve the corresponding angular-dependent gamma curves, they require complex electronic circuits. In addition, the manufacturing cost and device power consumption increase when two TFTs are used in a unit pixel. 
       SUMMARY OF THE INVENTION 
       [0005]    An objective of the invention is to provide methods, systems, apparatus and devices for a vertical alignment mode LCD with different pixel regions which show different threshold voltages in a transmissive mode. 
         [0006]    An objective of the invention is to provide methods, systems, apparatus and devices for a vertical alignment mode LCD with different pixel regions to form multi-domain liquid crystal distribution in a transmissive mode. 
         [0007]    An objective of the invention is to provide methods, systems, apparatus and devices for a vertical alignment mode transmissive LCD structure showing small angular-dependent gamma curve distortion. 
         [0008]    An objective of the invention is to provide methods, systems, apparatus and devices for a vertical alignment mode transmissive LCD structure showing wide viewing angles. 
         [0009]    An objective of the invention is to provide methods, systems, apparatus and devices for a method of manufacturing a multi-domain vertical alignment LCD panel with enhanced color performance with simple driving circuits and low power consumption. 
         [0010]    An objective of the invention is to provide methods, systems, apparatus and devices for a transmissive LCD with simple device structure and rubbing-free process for high yield mass production. 
         [0011]    The first embodiment provides a liquid crystal display panel comprising a first substrate having a color filter formed on the first substrate, an over-coating layer having a thickness formed over the color filter and a common electrode disposed over the over-coating layer. The second substrate having an insulating layer on an interior surface facing the first substrate, a pixel electrode formed over the insulating layer, a plurality of common and pixel domain guides formed on both the common electrode and the pixel electrode, a plurality of electric shields on one of the common electrodes or the pixel electrode to separate the corresponding one of the common electrode and pixel electrode into at least two different regions and a liquid crystal layer vertically aligned sandwiched between the first and second substrates. The display panel also includes a drive circuit connected with the common electrode and the pixel electrode for applying a voltage to the common electrode and the pixel electrode to generate an electric field between the first substrate and the second substrate to control a liquid crystal molecule orientation corresponding to a positioning of the plurality of domain guides and plurality of electric shields to form a multi-domain liquid crystal display panel. The plural domain guides is either a protrusion or a slit formed in the common electrode and the pixel electrode dividing the common electrode into at least two common electrodes and dividing the pixel electrode into two pixel electrodes to form the multi-domain liquid crystal configuration. 
         [0012]    In an embodiment, the plural domain guides includes a common domain guide in the common electrode and a pixel domain guide in the pixel electrode in each pixel region of the liquid crystal display panel, the common domain guide above and on one side of the pixel domain guide. In another embodiment, the common domain guide is located above and on one side of the pixel domain guide and the electric shield is located above and on an opposite side of the pixel domain guide dividing the common electrode into a first, second and third common electrode to form the multi-domain liquid crystal display panel having eight domains in each pixel region. In yet another embodiment, the common domain guide is located above and on one side of the pixel domain guide and the electric shield is located above and on an opposite side of the pixel domain guide dividing the common electrode into a first and a second common electrode to form the multi-domain liquid crystal display panel having six domains in each pixel region. In alternative embodiment, the common domain guide includes a first and a second common domain guide on opposite sides of the pixel domain guide dividing the common electrode into three common electrodes and a pixel electric shield located below one of the common domain guides covering the pixel domain guide and adjacent to the pixel electrode to form a single pixel electrode below one of the common guides to form the multi-domain liquid crystal display panel having eight domains in each pixel region. 
         [0013]    Further objects and advantages of this invention will be apparent from the following detailed descriptions of the presently preferred embodiments which are illustrated schematically in the accompanying drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE FIGURES 
         [0014]      FIG. 1   a  shows a plane view of a MVA LCD panel according to an embodiment of the present invention with the domain guiding protrusions. 
           [0015]      FIG. 1   b  shows a schematic cross-sectional view along line A-A′ in  FIG. 1   a.    
           [0016]      FIG. 2  shows the simulated LC director distribution of the MVA LCD shown in  FIGS. 1   a  and  1   b  when the applied voltage is approximately 6 V rms . 
           [0017]      FIG. 3  shows the voltage-dependent luminance curves of the MVA LCD shown in  FIGS. 1   a  and  1   b.    
           [0018]      FIG. 4  shows the typical gamma curves at different incident angles with a gamma correction factor γ=2.2 for the MVA LCD shown in  FIGS. 1   a  and  1   b.    
           [0019]      FIG. 5  shows the gamma curves of the conventional four-domain MVA LCD at different incident angles with a gamma correction factor γ=2.2. 
           [0020]      FIG. 6   a  shows a plane view of a MVA LCD panel with domain guiding slits according to another embodiment of the present invention. 
           [0021]      FIG. 6   b  shows a schematic cross-sectional view along line A-A′ in  FIG. 6   a.    
           [0022]      FIG. 7  shows the simulated LC director distribution of the MVA LCD panel shown in  FIGS. 6   a  and  6   b  when the applied voltage is 6 V rms . 
           [0023]      FIG. 8  shows the voltage-dependent luminance curves of the MVA LCD panel shown in  FIGS. 6   a  and  6   b.    
           [0024]      FIG. 9  shows the typical gamma curves at different incident angles with a gamma correction factor γ=2.2 for the MVA LCD panel shown in  FIGS. 6   a  and  6   b.    
           [0025]      FIG. 10   a  shows a plane view of a MVA LCD panel of another embodiment of the present invention. 
           [0026]      FIG. 10   b  shows a schematic cross-sectional view along line A-A′ in  FIG. 10   a.    
           [0027]      FIG. 11  shows the simulated LC director distribution of the MVA LCD panel shown in  FIGS. 10   a  and  10   b  when the applied voltage is 6 V rms . 
           [0028]      FIG. 12  shows the voltage-dependent luminance curves for the MVA LCD panel shown in  FIGS. 10   a  and  10   b.    
           [0029]      FIG. 13  shows the typical gamma curves at different incident angles with a gamma correction factor γ=2.2 in MVA LCD panel shown in  FIGS. 10   a  and  10   b.    
           [0030]      FIG. 14   a  shows a plane view of a MVA LCD panel of yet another embodiment of the present invention. 
           [0031]      FIG. 14   b  shows a schematic cross-sectional view along line A-A′ in  FIG. 14   a.    
           [0032]      FIG. 15  shows the simulated LC director distribution in the MVA LCD panel shown in  FIGS. 14A and 14   b  when the applied voltage is 6 V rms . 
           [0033]      FIG. 16  shows the voltage-dependent luminance curves of the MVA LCD panel shown in  FIG. 14   a  and  14   b.    
           [0034]      FIG. 17  shows the typical gamma curves at different incident angles with a gamma correction factor γ=2.2 in the MVA LCD panel shown in  FIGS. 14   a  and  14   b.    
           [0035]      FIG. 18   a  shows a plane view of a MVA LCD panel of another embodiment of the present invention. 
           [0036]      FIG. 18   b  shows a schematic cross-sectional view along line A-A′ in  FIG. 18   a.    
       
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0037]    Before explaining the disclosed embodiments of the present invention in detail it is to be understood that the invention is not limited in its application to the details of the particular arrangements shown since the invention is capable of other embodiments. Also, the terminology used herein is for the purpose of description and not of limitation. 
         [0038]    The following is a listing of reference numerals used throughout the specification and the Figures to identify elements of the present invention. 
         [0000]                                    100   MVA LCD panel       110   bottom substrate       112   thin film transistors       114   scan lines       116   data lines       122   transparent substrate       124   gate insulating layer       126   passivation layer       128   pixel electrodes       129   domain guiding layer       130   top substrate       132   transparent substrate       134   color filter       135   over-coating layer       136   common electrode       138   domain guiding layers       139   shielding layer       150   LC layer       161   main region       162   sub region       600   MVA LCD       610   bottom substrate       612   thin film transistor       614   scan lines       616   data lines       622   transparent substrate       624   gate insulating layer       626   passivation layer       628   pixel electrodes       629   guiding layer       630   top substrate       632   transparent substrate       634   color filter       635   over coating layer       636   common electrode       638   domain guiding layer       639   electric shielding       650   LC material       661   main region       662   sub region       663   sub region       1000   MVA LCD       1010   bottom substrate       1012   thin film transistors       1014   scan lines       1016   data lines       1022   transparent substrate       1024   gate insulating layer       1026   passivation layer       1028   pixel electrodes       1029   domain guiding layer       1030   top substrate       1032   transparent substrate       1034   color filter       1035   over coating       1036   common electrode       1037   domain guiding layer       1038   domain guiding layer       1039   electric shielding layer       1050   LC layer       1061   main region       1062   sub region       1400   MVA LCD       1410   bottom substrate       1412   thin film transistors       1414   scan lines       1416   data lines       1422   transparent substrate       1424   gate insulating layer       1426   passivation layer       1427   over coating       1428   pixel elements       1429   domain guiding layer       1430   top substrate                    
plurality of thin film transistors (TFTs)  112 , a plurality of scan lines  114 , a plurality of data lines  116 , a gate insulating layer  124 , a passivation layer  126 , and a plurality of pixel electrodes  128  fabricated on an inner surface of the transparent substrate  122 . Each TFT  112  is deposited inside one of the unit pixel region and is connected to the corresponding scan lines  114  and data lines  116  as shown in  FIG. 1   a . The gate insulating layer  124  shown in  FIG. 1   b  is formed to cover the scan lines  114 , and the passivation layer  126  is formed to cover the data lines  116  over the transparent substrate  122  which can be a transparent glass.
 
         [0039]    Both gate insulating layer  124  and passivation layer  126  may be an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ), which is prepared by plasma enhanced chemical vapor deposition (PECVD) or similar sputtering methods. Each pixel electrode  128  is electrically connected to a corresponding TFT  112 . The transparent pixel electrode  128  is usually made of an electrically conductive material with high optical transparency, such as indium tin oxide (ITO), indium zinc oxide (IZO) or zinc oxide (ZnO). Each pixel electrode  128  has a plurality of domain guiding layer  129 , which can be LC alignment protrusions formed by depositing an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ), or LC alignment slits formed by the opening patterns through the etching of transparent pixel electrode  128 . 
         [0040]    The top substrate  130  includes of a transparent substrate  132 , a color filter  134 , an over-coating layer  135 , a plurality of common electrode  136 , a plurality of domain guiding layer  138 , and a plurality of electric shielding layer  139 . The over-coating layer  135  is disposed beneath the transparent substrate  132  to cover the color filter  134 . The material of the over-coating layer  135  can be an acrylic resin, polyamide, ployimide, or novolac epoxy resin. The over-coating layer  135  is patterned by a process employing photolithography and plurality of thin film transistors (TFTs)  112 , a plurality of scan lines  114 , a plurality of data lines  116 , a gate insulating layer  124 , a passivation layer  126 , and a plurality of pixel electrodes  128  fabricated on an inner surface of the transparent substrate  122 . Each TFT  112  is deposited inside one of the unit pixel region and is connected to the corresponding scan lines  114  and data lines  116  as shown in  FIG. 1   a . The gate insulating layer  124  shown in  FIG. 1   b  is formed to cover the scan lines  114 , and the passivation layer  126  is formed to cover the data lines  116  over the transparent substrate  122  which can be a transparent glass. 
         [0041]    Both gate insulating layer  124  and passivation layer  126  may be an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ), which is prepared by plasma enhanced chemical vapor deposition (PECVD) or similar sputtering methods. Each pixel electrode  128  is electrically connected to a corresponding TFT  112 . The transparent pixel electrode  128  is usually made of an electrically conductive material with high optical transparency, such as indium tin oxide (ITO), indium zinc oxide (IZO) or zinc oxide (ZnO). Each pixel electrode  128  has a plurality of domain guiding layer  129 , which can be LC alignment protrusions formed by depositing an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ), or LC alignment slits formed by the opening patterns through the etching of transparent pixel electrode  128 . 
         [0042]    The top substrate  130  includes of a transparent substrate  132 , a color filter  134 , an over-coating layer  135 , a plurality of common electrode  136 , a plurality of domain guiding layer  138 , and a plurality of electric shielding layer  139 . The over-coating layer  135  is disposed beneath the transparent substrate  132  to cover the color filter  134 . The material of the over-coating layer  135  can be an acrylic resin, polyamide, ployimide, or novolac epoxy resin. The over-coating layer  135  is patterned by a process employing photolithography and etching to form a plurality of partially etched regions, where part of the un-etched regions (not shown) can be thick enough to function as the cell spacer in order to simplify the manufacturing process and lowering the manufacturing cost. 
         [0043]    Each common electrode  136  is deposited over the over-coating layer  135 . The transparent common electrode  136  is usually made of an electrically conductive material with high optical transparency, such as indium tin oxide, indium zinc oxide or zinc oxide. An electric shielding layer  139  is deposited to fill the partially etched regions on the over-coating layer  135  and the common electrode  136 . The electric shielding layer  139  could be an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ), which is prepared by plasma enhanced chemical vapor deposition (PECVD) or other similar sputtering methods commonly known in the art. Each common electrode  136  has a plurality of domain guiding layer  138 , which can be LC alignment protrusions formed by the deposition of organic materials such as a-Si:C:O and a-Si:O:F, or inorganic materials such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ), or the LC alignment slits formed by the opening patterns through the etching of transparent common electrode  136 . 
         [0044]    A liquid crystal layer  150  is vertically aligned in-between the bottom substrate  110  and the top substrate  130 . When the TFT  112  is switched to the ON-state, an electric filed is generated between the bottom substrate  110  and top substrate  130 . As a result, the LC molecules in LC layer  150  are tilted into various directions with the aid of the domain guiding layers  129 ,  138 , and the electric shielding layer  139  to form a multi-domain LC configuration. 
         [0045]    Due to the screening effect from the electric shielding layer  139 , the electric filed strength is weaker in the region nearest to the electric shielding layer  139  than the other regions. Therefore, the existence of the electric shielding layer  139  divides a unit pixel  100  into at least two different regions such as a main region  161  and a sub region  162 , which typically show two different threshold voltages. The sub region  162  with the electric shielding layer  139  usually has a higher threshold voltage resulting in a lower luminance under different gray levels. Thus, the angular-dependent gamma curves of the MVA LCD panel are improved from the combined luminance effect of the two different regions  161  and  162  under various gray levels. The area ratio between the main region  161  and the sub region  162  are chosen from a range of approximately 10:1 to approximately 1:10, while the area ratio between the electric shielding layer  139  and the corresponding liquid crystal display panel  100  is typically larger than 1:1000. 
         [0046]    For a typical MVA LCD using zigzag shaped electrodes, there are usually four LC domains formed when driven by the TFT array in a unit pixel. Using the configuration of the present invention, more than four LC domains are formed using only one TFT due to the introduction of sub region  162  which has a threshold voltage that is different from the threshold voltage of the main region  161 . As a result, the viewing angle of the MVA LCD panel is widened. 
         [0047]    During the simulation, a repeated unit pixel size of an MVA LCD structure with 100 μm×450 μm, and the protrusion-type pixel domain guiding layers  129  and common domain guiding layers  138  having zigzag shapes with widths of approximately w=12 μm and protrusion heights of approximately h p =1.2 μm was used. The gap between the neighboring domain guiding layers on the projection plane was approximately g=35 μm. The electric shielding layer  139  is made of silicon nitride which is flat and has a width of approximately w e =12 μm and a height of approximately h=1.2 μm with a dielectric constant of 7.0. The area ratio between the main region  161  and the sub region  162  was selected to be approximately 2:1 and the cell gap between the top and bottom substrates was approximately 4 μm. A Merck negative Δε LC mixture MLC-6608 (birefringence Δn=0.083 at λ=550 nm, dielectric anisotropy Δε=−4.2 and rotational viscosity γ 1 =0.186 Pa·s) was used as the liquid crystal material  150  which was vertically aligned with the substrates in the initial state. The LC materials azimuthal angle in this example is approximately 0 and the pretilt angle is approximately 90°. 
         [0048]      FIG. 2  shows the simulated LC director distribution of for the configuration shown in  FIGS. 1   a  and  1   b  when the applied voltage is approximately 6 V rms  between the common electrodes  136  and pixel electrodes  128 . The distribution shown is the plane view cut from the center of the pixel unit along the Z-axis direction. As shown, the LC directors are reoriented perpendicular to the electric field direction due to the fringing field and the longitural electric field between the bottom substrate  110  and the top substrate  130 . With the aid of the pixel and common domain guiding protrusion layers  129  and  138 , respectively, a typical four-domain structure is formed in the main region  161 . In the sub region  162 , the tilted electric shielding layer  139  helps form an additional two domains. Therefore, a total of six LC domains are formed in the whole pixel unit  100  with the application of an external electric field from the TFT  112 . This six-domain MVA LCD enhances the viewing angle of the panel provided that suitable compensation films are employed as described in S. T. Wu and D. K. Yang, Reflective Liquid Crystal Displays (Wiley, New York, 2001); Chap. 12. 
         [0049]      FIG. 3  shows the voltage-dependent luminance curves throughout the entire pixel unit  100 , the main region  161  and the sub region  162 , respectively. In this example, the incident white light source is from a conventional cold cathode fluorescent lamp (CCFL) backlight passing through the RGB color filters before entering the MVA LCD panel which is sandwiched between two crossed linear polarizers. The threshold voltage of the main region  161  is approximately 2.25 V rms  while the sub region is approximately 2.40 V rms . The electric shielding layer  139  causes the threshold voltage to increase a small amount resulting in the sub region  162  having a lower luminance than the main region  161  under the same gray level defined by the entire pixel  100 . 
         [0050]    To quantitatively characterize the off-axis image quality, an off-axis image distortion index, D(θ, φ), is defined as 
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         [0051]    Here, ΔB i,j  is the brightness difference between gray-i and gray-j, and &lt; &gt; denotes the average for all cases of arbitrary gray levels. D(θ, φ) is within the range from approximately 0 to approximately 1. A smaller D(θ, φ) implies to a smaller image distortion as represented from the angular-dependent gamma curves, i.e. a better off-axis image quality. 
         [0052]      FIG. 4  is a graphical plot of the typical gamma curves of the pixel unit  100  at different incident angles with a gamma correction factor of approximately γ=2.2. Here, the azimuthal angle is set at approximately 0°, and an 8-bit gray scale with 256 gray levels is evaluated. At (θ, φ)=(60°, 0°) viewing direction, its D value is 0.2994. 
         [0053]      FIG. 5  further plots the gamma curves of the main region  161  at different incident angles with a gamma correction factor γ=2.2 as a typical conventional four-domain MVA LCD example. At (θ, φ)=(60°, 0°) viewing direction, the corresponding D value is approximately 0.3510. Summarily, the configuration according to the present invention shows a 14.7% improvement over the conventional MVA LCD, which shows that the configuration has a better off-axis image quality. 
         [0054]    An alternative MVA LCD panel configuration shown in  FIG. 6   a  and  FIG. 6   b , where  FIG. 6   a  shows a plane view of the MVA LCD panel and  FIG. 6   b  is the schematic cross-sectional view along line A-A′ in  FIG. 6A . Although the main elements in the configuration shown in  FIGS. 1   a  and  1   b  are also used in this alternative configuration, new reference numerals are used. The primary difference between the two configurations is the use of pixel and common guiding slits in this alternative configuration. 
         [0055]    Like the configuration shown in  FIGS. 1   a  and  1   b , the alternative configuration shown in  FIGS. 6   a  and  6   b , the MVA LCD includes a bottom substrate  610 , a top substrate  630  and a liquid crystal layer  650  sandwiched therebetween. As shown in  FIG. 6   b , the bottom substrate  610  includes of a transparent substrate  622 , a plurality of TFT  612 , a plurality of scan lines  614 , a plurality of data lines  616 , a gate insulating layer  624 , a passivation layer  626 , and a plurality of pixel electrodes  628 . 
         [0056]    Each TFT  612  is deposited inside one of the unit pixel region  600  and is connected to the corresponding scan lines  614  and data lines  616  as shown in  FIG. 6   a . As in the previous example, the gate insulating layer  624  is formed to cover the scan lines  614 , and the passivation layer  626  is formed to cover the date lines  616  over the transparent substrate  622 . Both the gate insulating layer  624  and passivation layer  626  could be an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ) which is prepared by plasma enhanced chemical vapor deposition or other similar sputtering methods. Each pixel electrode  628  is electrically connected to a corresponding TFT  612 . The transparent pixel electrode  628  is usually made of an electrically conductive material with high optical transparency, such as indium tin oxide (ITO), indium zinc oxide (IZO) or zinc oxide (ZnO). Unlike the configuration shown in  FIG. 1   b , each pixel electrode  628  has a plurality of domain guiding layers  629 , which are the LC alignment slits formed by etching of transparent pixel electrode  628  to produce domain guiding layer slits  629  in the pixel electrode  628 . 
         [0057]    The top substrate  630  includes a transparent substrate  632 , a color filter  634 , an over-coating layer  635 , a plurality of common electrode  636 , a plurality of domain guiding layer  638 , and a plurality of electric shielding layers  639 . The over-coating layers  635  are disposed beneath the transparent substrate  632  to cover the color filtering layer  634 . The material of the over-coating layer  635  can be an acrylic resin, polyamide, ployimide, or novolac epoxy resin. The over-coating layer  635  is patterned by a process employing photolithography and etching to form a plurality of partially etched regions, whose thickness is typically larger than 0.1 μm. Part of the un-etched regions (not shown) is thick enough to work as the cell spacer in order to simplify the manufacturing process and lower the manufacturing cost. 
         [0058]    As previously described, each common electrode  636  is deposited over the over-coating layer  635 . The transparent common electrode  636  is usually made of an electrically conductive material with high optical transparency, such as indium tin oxide (ITO), indium zinc oxide (IZO) or zinc oxide (ZnO). The electric shielding layers  639  are deposited to fill the partially etched regions on the over-coating layer  635  and the common electrode  636 . The electric shielding layer  639  could be an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ), which is prepared by plasma enhanced chemical vapor deposition or other similar sputtering methods commonly known in the art. Unlike the configuration shown in  FIG. 1   b , each common electrode  636  has a plurality of domain guiding layer  638 , which are the LC alignment slits formed by the opening patterns through the etching of transparent common electrode  636 . 
         [0059]    During simulation, a repeated unit pixel size of the MVA LCD structure with 100 μm×600 μm, and the slit-type domain guiding layers  629  and  638  having zigzag shapes with width of approximately w=12 μm and a gap between the neighboring domain guiding layers on the projection plane of approximately g=35 μm. In this example, the electric shielding layer  639  is made of SiN, which is flat and has width of approximately w e =12 μm and height of approximately h=1.2 μm at the dielectric constant of 7.0. The two tilted electric shielding layers  639  resided regions are sub region  662  and sub region  663  as shown in  FIG. 6   a . The area ratio between the main region  661  and the sub regions  662  and  663  was selected to be approximately 1:1. The cell gap between the top and bottom substrates is approximately 4 μm. In this example, as Merck negative Δε LC mixture MLC-6608 (birefringence Δn=0.083 at λ=550 n, dielectric anisotropy Δε=−4.2 and rotational viscosity γ 1 =0.186 Pa·s) is aligned vertical to the substrates in the initial state. Its azimuthal angle is approximately 0° and pretilt angle is approximately 90°. 
         [0060]      FIG. 7  shows the simulated LC director distribution of this embodiment when the applied voltage is approximately 6 V rms  between the common electrodes  636  and pixel electrodes  628 . The distribution shown is the plane view cut from the center of the pixel unit along the Z-axis direction. As shown, the LC directors are reoriented perpendicular to the electric field direction due to the fringing field and the longitudinal electric field between the bottom substrate  610  and the top substrate  630 . With the aid of the pixel and common electrode domain guiding slit layers  629  and  638 , respectively, a typical four-domain structure is formed in the main region  661 . In the sub regions  662  and  663 , the electric shielding layers  639  help to form additional four domains. Therefore, a total of eight LC domains are formed in the whole pixel  600  under the application of an external electric field from the TFT  612 . This eight-domain MVA LCD can enhance the viewing angle of the panel provided that a set of optimized phase compensation films are employed. 
         [0061]      FIG. 8  shows the voltage-dependent luminance curves through the entire pixel  600 , the main region  661  and the sub regions  662  and  663 , respectively. The incident white light source in this example is from a conventional cold cathode fluorescent lamp (CCFL) backlight, passing through the RGB color filters before entering the MVA LCD panel which is sandwiched between two crossed linear polarizers (not shown). The threshold voltage of the main region  661  is approximately 2.25 V rms  and the sub region is approximately 2.32 V rms . The increased threshold voltage is because the electric shielding layers  639  screen a portion of the electric field. Therefore, the sub regions  662  and  663  have a lower luminance than the main region  661  under the same gray level defined by the entire pixel  600 . 
         [0062]      FIG. 9  is a plot of the typical gamma curves of the whole pixel  600  at different incident angles with a gamma correction factor γ=2.2 in this example. As shown, the azimuthal angle is set at 0° and an 8-bit grayscale with 256 gray levels is evaluated. As calculated from Eq. 1, its D value is 0.2771 at the (θ, φ)=(60°, 0°) viewing direction. 
         [0063]    In comparison, the typical conventional four-domain MVA LCD has a D value of 0.3510. This configuration of the present invention shows a 21% improvement over the conventional MVA LCD, which indicates an improved off-axis image quality. 
         [0064]    An alternative MVA LCD panel configuration is shown in  FIG. 10   a  and  FIG. 10   b , where  FIG. 10   a  shows a plane view of the MVA LCD panel and  FIG. 10   b  is the schematic cross-sectional view along line A-A′ in  FIG. 10   a . Although the main elements in the configuration shown in  FIGS. 1   a  and  1   b  and  6   a  and  6   b  are also used in this alternative configuration, new reference numerals are assigned for this example. Like the example shown in  FIGS. 6   a  and  6   b , the configuration shown in  FIGS. 10   a  and  10   b  include pixel and common electrode domain guiding slits  1029  and  1038 , respectively. The primary difference is the use of pixel and common guiding slits in this alternative configuration. 
         [0065]    Like the configuration shown in  FIGS. 1   a  and  1   b , in the alternative configuration shown in  FIGS. 10   a  and  10   b  the MVA LCD panel  1000  includes a bottom substrate  1010 , a top substrate  1030  and a liquid crystal layer  1050  sandwiched therebetween. The bottom substrate  1010  includes a transparent substrate  1022 , a plurality of TFT  1012 , a plurality of scan lines  1014 , a plurality of data lines  1016 , a gate insulating layer  1024 , a passivation layer  1026 , and a plurality of pixel electrodes  1028  as shown in  FIG. 10   b . Each TFT  1012  is deposited inside one of the unit pixel region  1000  and is connected to the corresponding scan lines  1014  and data lines  1016  as shown in  FIG. 10   a . The gate insulating layer  1024  is formed to cover the scan lines  1014 , and the passivation layer  1026  is formed to cover the data lines  1016  over the transparent substrate  1022  which can be made of a transparent glass. Both the gate insulating layer  1024  and passivation layer  1026  may be an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ) which is prepared by plasma enhanced chemical vapor deposition or other similar sputtering methods commonly known in the art. 
         [0066]    As previously described, each pixel electrode  1028  is electrically connected to a corresponding TFT  1012  and the transparent pixel electrode  1028  is usually made of an electrically conductive material with high optical transparency, such as indium tin oxide (ITO), indium zinc oxide (IZO) or zinc oxide (ZnO). Each pixel electrode  1028  has a plurality of domain guiding layer  1029 , which are the LC alignment slits formed by the opening patterns through the etching of transparent pixel electrode  1028 . 
         [0067]    The top substrate  1030  includes of a transparent substrate  1032 , a color filter  1034 , a plurality of over-coating layer  1035 , a plurality of common electrode  1036 , a plurality of domain guiding layer  1037 , a plurality of domain guiding layer  1038 , and a plurality of electric shielding layer  1039 . The over-coating layer  1035  is disposed beneath the transparent substrate  1032  to cover the color filtering layer  1034 . The material of the over-coating layer  1035  can be an acrylic resin, polyamide, ployimide, or novolac epoxy resin. The over-coating layer  1035  is patterned by a process employing photolithography and etching to form a plurality of partially etched regions, whose thickness is typically larger than 0.1 μm. The un-etched region is the main region  1061  and the etched region is the sub region  1062 . 
         [0068]    Each common electrode  1036  is deposited over the over-coating layer  1035  and the etched sub region  1062 . The transparent common electrode  1036  is usually made of an electrically conductive material with high optical transparency, such as indium tin oxide (ITO), indium zinc oxide (IZO) or zinc oxide (ZnO). The electric shielding layers  1039  are deposited to fill the etched sub region  1062  on the common electrode  1036 . The electric shielding layer  1039  may be comprised of an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ), which is prepared by plasma enhanced chemical vapor deposition or other similar sputtering methods commonly know in the art. As shown in  FIG. 10   b , each common electrode  1036  has a plurality of domain guiding layer  1038  in main region  1061  and a plurality of domain guiding layer  1037  in sub region  1062 , which are the LC alignment slits formed by the opening patterns through the etching of transparent common electrode  1036 . 
         [0069]    During simulation, the repeated unit pixel size of the MVA LCD structure was set at approximately 100 μm×450 μm and the domain guiding layers  1029  and  1038  are the zigzag shaped ones with width of approximately w=12 μm. The gap between the neighboring domain guiding layers on the projection plane is approximately g=35 μm. The electric shielding layer  1039  is flat with a height of approximately h=1.2 μm and a dielectric constant of 3.5. The electric shielding layer  1039  covers the sub region  1062  and the domain guiding layer  1037  has a width of approximately w e =12 μm in sub region  1062 . The area ratio between the main region  1061  and the sub region  1062  is selected at approximately 2:1. The cell gap between the top and bottom substrates is approximately 4 μm. In this example, a Merck negative Δε LC mixture MLC-6608 (birefringence Δn=0.083 at λ=550 nm, dielectric anisotropy Δε=−4.2 and rotational viscosity γ 1 =0.186 Pa·s) is aligned vertical to the top and bottom substrates in the initial state. Its azimuthal angle is approximately 0° and pretilt angle is approximately 90°. 
         [0070]      FIG. 11  shows the simulated LC director distribution of this embodiment when an external voltage V=6 V rms  is applied between the common electrodes  1036  and pixel electrodes  1028 . The distribution shown is the plane view cut from the center of the pixel unit along the Z-axis direction. As shown, the LC directors are reoriented perpendicular to the electric field direction due to the fringing field and the longitudinal electric field between the bottom substrate  1010  and the top substrate  1030 . With the aid of the domain guiding slit layers  1029  and  1038 , a typical four domain structure is formed in the main region  1061 . In the sub region  1062 , the tilted domain guiding slit layer  1037  and the electric shielding layer  1039  forms an additional two domains. Therefore, a total of six domains are formed in the whole pixel  1000  under the application of an external electric field from the TFT  1012 . This six-domain MVA LCD would enhance the viewing angle of the display panel. 
         [0071]      FIG. 12  shows the voltage-dependent luminance curves through the whole pixel  1000 , the main region  1061  and the sub region  1062 , respectively. The incident white light source is from a conventional cold cathode fluorescent lamp (CCFL) backlight, passing through the RGB color filters before entering the MVA LCD panel with the crossed linear polarizers. The threshold voltage of the main region  1061  is 2.25 V rms  while the sub region is 3.00 V rms . The electric shielding layers  1039  effectively screen a part of the electric field so that the corresponding threshold voltage increases. Therefore, the sub region  1062  has a lower luminance than the main region  1061  under the same gray level defined by the whole pixel  1000 . 
         [0072]      FIG. 13  is a plot of the typical gamma curves of the whole pixel  1000  at different incident angles with a gamma correction factor γ=2.2 in the present embodiment. Here, the azimuthal angle is 0° and an 8-bit grayscale with 256 gray levels was evaluated. As calculated from Eq. 1, its D value is 0.2866 at the (θ, φ)=(60°, 0°) viewing direction. By contrast, the conventional four-domain MVA LCD has a D value of 0.3510. The configuration in this example exhibits an 18.4% improvement over the conventional MVA LCD, indicating that the proposed embedment has a better off-axis image quality. 
         [0073]    An alternative MVA LCD panel configuration is shown in  FIG. 14   a  and  FIG. 14   b , where  FIG. 14   a  shows a plane view of the MVA LCD panel and  FIG. 14   b  is the schematic cross-sectional view along line A-A′ in  FIG. 14   a . Although the main elements in the configuration shown in  FIGS. 1   a  and  1   b ,  6   a  and  6   b  and  10   a  and  10   b  are also used in this alternative configuration, new reference numerals are assigned for this example. Like the example shown in  FIGS. 10   a  and  10   b , this configuration includes pixel and common electrode domain guiding slits  1429  and  1438 , respectively. 
         [0074]    As shown in  FIGS. 14   a  and  14   b , the MVA LCD panel includes a bottom substrate  1410 , a top substrate  1430  and a liquid crystal layer  1450 . The bottom substrate  1410  has a transparent substrate  1422 , a plurality of TFT  1412 , a plurality of scan lines  1414 , a plurality of data lines  1416 , a gate insulating layer  1424 , a passivation layer  1426 , a plurality of over-coating layer  1427 , a plurality of pixel electrodes  1428 , a plurality of domain guiding layer  1429   a  and  1429   b , and a plurality of electric shielding layer  1421  fabricated on an interior surface of the transparent substrate  1422  adjacent to the LC layer  1450 . 
         [0075]    Each TFT  1412  is deposited inside one of the unit pixel region  1400  and is connected to the corresponding scan lines  1414  and data lines  1416  as shown in  FIG. 14   a . The gate insulating layer  1424  is formed to cover the scan lines  1414 , and the passivation layer  1426  is formed to cover the data lines  1416  over the transparent substrate  1422  as shown in  FIG. 14   b . Both the gate insulating layer  1424  and passivation layer  1426  may be an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ) prepared by plasma enhanced chemical vapor deposition or other similar sputtering methods commonly known in the art. 
         [0076]    Unlike the previous examples, the over-coating layer  1427  is disposed above the passivation layer  1426  on the bottom substrate. The material of the over-coating layer  1427  could be an acrylic resin, polyamide, ployimide, or novolac epoxy resin. The over-coating layer  1427  is patterned by a photolithographic and etching process to form a plurality of partially etched regions, whose thickness is typically larger than 0.1 μm. The un-etched region is specifically the main region  1461  and the etched region is specifically the sub region  1462 . Each pixel electrode  1428  is deposited over the over-coating layer  1427  and the etched sub region  1462 . The transparent pixel electrode  1428  is usually made of an electrically conductive material with high optical transparency, such as indium tin oxide (ITO), indium zinc oxide (IZO) or zinc oxide (ZnO). 
         [0077]    Each pixel electrode  1428  has a plurality of domain guiding layer  1429   a  in the main region  1461  and a plurality of domain guiding layer  1429   b  in the sub region  1462 , which are the LC alignment slits formed by the opening patterns through the etching of transparent pixel electrode  1428 . The electric shielding layers  1421  are deposited to fill the etched sub region  1462  on the pixel electrode  1428 . The electric shielding layer  1421  may be comprised of organic materials such as a-Si:C:O and a-Si:O:F, or inorganic materials such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ), which is prepared by plasma enhanced chemical vapor deposition or other similar sputtering methods. 
         [0078]    The top substrate  1430  includes a transparent substrate  1432 , a color filter  1434 , a plurality of common electrode  1436 , and a plurality of domain guiding layer  1438 . Each common electrode  1436  has a plurality of domain guiding layer  1438 , which are the LC alignment slits formed by the opening patterns through the etching of transparent common electrode  1436 . 
         [0079]    In this example, a repeated unit pixel size of the MVA LCD structure with approximately 100 μm×600 μm, and the slit-type domain guiding layers  1429   a ,  1429   b  and  1438  have zigzag shapes with width of approximately w=12 μm was selected. The gap between the neighboring domain guiding layers on the projection plane is approximately g=35 μm. The flat electric shielding layers  1421  is has a height of approximately h=1.2 μm at the dielectric constant of 3.5. The area ratio between the main region  1461  and the sub region  1462  is selected to be 1:1. The cell gap between the top and bottom substrates is approximately 4 μm and a Merck negative Δε LC mixture MLC-6608 (birefringence Δn=0.083 at λ=550 nm, dielectric anisotropy Δε=−4.2 and rotational viscosity γ 1 =0.186 Pa·s) is aligned vertical to the substrates in the initial state. Its azimuthal angle is 0° and pretilt angle is 90°. 
         [0080]      FIG. 15  shows the simulated LC director distribution of this embodiment when the applied voltage is approximately 6 V rms  between the common electrodes  1436  and pixel electrodes  1428 . The distribution is the plane view cut from the center of the pixel unit along the Z-axis direction. The LC directors are reoriented perpendicular to the electric field direction due to the fringing field and the longitudinal electric field between the bottom substrate  1410  and the top substrate  1430 . With the aid of the domain guiding slit layers  1429   a ,  1429   b  and  1438 , a typical four-domain structure is formed in both the main region  1461  and the sub region  1462 . Due to the electric field screening effect from the electric shielding layer  1421 , these two four domain structures in the main region  1461  and sub region  1462  are different. Therefore, a total of eight domains are formed in the whole pixel  1400  under the application of an external electric field from the TFT  1412 . This eight-domain MVA LCD would provide a wider viewing angle. 
         [0081]      FIG. 16  shows the voltage-dependent luminance curves through the entire pixel  1400 , the main region  1461  and the sub region  1462 , respectively. The incident white light source is from a conventional cold cathode fluorescent lamp backlight, passing through the RGB color filters before entering the MVA LCD panel which is sandwiched between two crossed linear polarizers. The threshold voltage of the main region  1461  is 2.25 V rms  while the sub region  1462  is 2.80 V rms . Due to the existence of the electric shielding layers  1421 , the threshold voltage in the sub region is increased noticeably. Therefore, the sub region  1462  has a lower luminance than the main region  1461  under the same gray level defined by the whole pixel  1400 . 
         [0082]      FIG. 17  depicts the typical gamma curves of the whole pixel  1400  at different incident angles with a gamma correction factor γ=2.2 in the embodiment 4. Here, the azimuthal angle is set at 0° and an 8-bit grayscale with 256 gray levels is evaluated. As calculated from Eq. 1, its D value is 0.2369 at the (θ, φ)=(60°, 0°) viewing direction. In contrast, the conventional four-domain MVA LCD has a D value of 0.3510. The embodiment 4 shows 32.5% improvement over the conventional MVA LCD, which indicates that the proposed embedment has a better off-axis image quality. 
         [0083]    An alternative MVA LCD panel configuration is shown in  FIG. 18   a  and  FIG. 18   b , where  FIG. 18   a  shows a plane view of the MVA LCD panel and  FIG. 18   b  is the schematic cross-sectional view along line A-A′ in  FIG. 18   a . Although the main elements in the configuration shown in  FIGS. 1   a  and  1   b  and  6   a  and  6   b  are also used in this alternative configuration, new reference numerals are assigned for this example. Like the example shown in  FIGS. 6   a  and  6   b , the configuration shown in  FIGS. 18   a  and  18   b  include pixel and common electrode domain guiding slits  1829  and  1838 , respectively. The primary difference is the use of pixel and common guiding slits in this alternative configuration. 
         [0084]    Like the configuration shown in  FIGS. 1   a  and  1   b , in the alternative configuration shown in  FIGS. 18   a  and  18   b  the MVA LCD panel  1000  includes a bottom substrate  1810 , a top substrate  1830  and a liquid crystal layer  1850  sandwiched therebetween. The bottom substrate  1810  includes a transparent substrate  1822 , a plurality of TFT  1812 , a plurality of scan lines  1814 , a plurality of data lines  1816 , a gate insulating layer  1824 , a passivation layer  1826 , and a plurality of pixel electrodes  1828  as shown in  FIG. 18   b . Each TFT  1812  is deposited inside one of the unit pixel region  1800  and is connected to the corresponding scan lines  1814  and data lines  1816  as shown in  FIG. 18   a . The gate insulating layer  1824  is formed to cover the scan lines  1814 , and the passivation layer  1826  is formed to cover the data lines  1816  over the transparent substrate  1822  which can be made of a transparent glass. Both the gate insulating layer  1824  and passivation layer  1826  may be an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ), which is prepared by plasma enhanced chemical vapor deposition or other similar sputtering methods commonly known in the art. 
         [0085]    As previously described, each pixel electrode  1828  is electrically connected to a corresponding TFT  1812  and the transparent pixel electrode  1828  is usually made of an electrically conductive material with high optical transparency, such as indium tin oxide (ITO), indium zinc oxide (IZO) or zinc oxide (ZnO). Each pixel electrode  1828  has a plurality of domain guiding layer  1829 , which are the LC alignment slits formed by the opening patterns through the etching of transparent pixel electrode  1828 . 
         [0086]    The top substrate  1830  includes of a transparent substrate  1832 , a plurality of over-coating layer  1835 , a plurality of common electrode  1836 , a plurality of domain guiding layer  1837 , a plurality of domain guiding layer  1838 , and a plurality of electric shielding layer  1839 . The over-coating layer  1035  is disposed beneath the transparent substrate  1032  to cover the color filter  1034 . The material of the over-coating layer  1835  can be an acrylic resin, polyamide, ployimide, or novolac epoxy resin. The over-coating layer  1835  is patterned by a process employing photolithography and etching to form a plurality of partially etched regions, whose thickness is typically larger than 0.1 μm. The un-etched region is the main region  1861  and the etched region is the sub region  182 . 
         [0087]    Each common electrode  1836  is deposited over the over-coating layer  1835  and the etched sub region  1862 . The transparent common electrode  1836  is usually made of an electrically conductive material with high optical transparency, such as indium tin oxide (ITO), indium zinc oxide (IZO) or zinc oxide (ZnO). The electric shielding layers  1839  are deposited to fill the etched sub region  1862  on the common electrode  1836 . The electric shielding layer  1839  may be comprised of an organic material such as a-Si:C:O and a-Si:O:F, or an inorganic material such as silicon nitride (SiN x ) and silicon oxide (SiO 2 ) which is prepared by plasma enhanced chemical vapor deposition or other similar sputtering methods commonly know in the art. As shown in  FIG. 18   b , each common electrode  1836  has a plurality of domain guiding layer  1838  in main region  1861  and a plurality of domain guiding layer  1837  in sub region  1862 , which are the LC alignment slits formed by the opening patterns through the etching of transparent common electrode  1836 . 
         [0088]    During simulation, the repeated unit pixel size of the MVA LCD structure was set at approximately 100 μm×450 μm and the domain guiding layers  1829  and  1838  are the zigzag shaped ones with width of approximately w=12 μm. The gap between the neighboring domain guiding layers on the projection plane is approximately g=35 μm. The electric shielding layer  1839  is flat and made of SiN x  with a height of approximately h=1.2 μm. The electric shielding layer  1839  covers the sub region  1862  and the domain guiding layer  1837  has a width of approximately w e =12 μm in sub region  1862 . The area ratio between the main region  1061  and the sub region  1062  is selected at approximately 2:1. The cell gap between the top and bottom substrates is approximately 4 μm. In this example, a Merck negative Δε LC mixture MLC-6608 (birefringence Δn=0.083 at λ=550 nm, dielectric anisotropy Δε=−4.2 and rotational viscosity γ 1 =0.186 Pa·s) is aligned vertical to the top and bottom substrates in the initial state. Its azimuthal angle is approximately 0° and pretilt angle is approximately 90°. 
         [0089]    While the common and pixel domain guides have been shown as common and pixel domain slits, alternative configures such as domain guide protrusions or a combination thereof may be substituted. 
         [0090]    While the invention has been described, disclosed, illustrated and shown in various terms of certain embodiments or modifications which it has presumed in practice, the scope of the invention is not intended to be, nor should it be deemed to be, limited thereby and such other modifications or embodiments as may be suggested by the teachings herein are particularly reserved especially as they fall within the breadth and scope of the claims here appended.