Abstract:
Provided are circuits and methods for driving the synchronous rectifier (SR) of a power converter. A non-linear voltage sense compensator is applied across the drain and source of the SR, and a sense signal is provided to the SR driver sense input, such that false triggering of the SR is effectively eliminated. In addition, the voltage sense compensator ensures that the SR is turned on as soon as its current starts to flow and is turned off when its current falls to zero. The embodiments described herein may be incorporated into new VR designs, or they may be used to improve the SR driving characteristics of commercially available voltage sensing SR drivers.

Description:
RELATED APPLICATION 
       [0001]    This application claims the benefit of the filing date of U.S. Provisional Patent Application No. 61/381,681, filed on 10 Sep. 2010, the contents of which are incorporated herein by reference in their entirety. 
     
    
     FIELD OF THE INVENTION 
       [0002]    This invention relates to circuits and methods for improving the efficiency of a driver for a synchronous rectifier of a power converter. 
       BACKGROUND 
       [0003]    As demand for low voltage, high output current power converters with high efficiency increases, the LLC resonant converter with synchronous rectifier (SR) is a promising solution. A challenge in the design of such converters is the need to precisely synchronize the driving signal of the SR with the current through the rectifier. 
         [0004]    Due to the phase shift introduced by the resonant components, the secondary side currents of the LLC resonant converter are not exactly in phase with the switching of the primary side MOSFETs [3, 4]. To generate an accurate driving signal for the secondary side SR, current-based methods [5-7] and voltage based methods [1, 3, 4] have been suggested. 
         [0005]    Current based methods detect current through the SR to generate the gate drive signal [5, 8]. Drawbacks of this approach include the large size of the current-sensing transformer (CT), the extra conduction loss of the winding, and the undesired delay that causes duty cycle loss of the SR and therefore more conduction loss [4, 5, 7]. To avoid such problems, primary current sensing with magnetizing current cancellation was proposed in [5] and [7]. Efficiency of the circuit may be improved because of the relatively smaller primary current of the transformer through the CT. However, the CT and the matching circuits of the transformer magnetizing current make the implementation complex. Matching of the magnetizing current with the inductor or the transformer is also difficult. 
         [0006]    Voltage based methods are preferred due to their overall simplicity, lower cost, and efficient operation. Voltage based methods detect the voltage across the drain to the source (v DS ) of the SR to generate the driving signal. Driving chips have been developed based on this method to simplify the SR driving. However, due to the small R ds     —     on  of the MOSFET, the voltage range of the detecting threshold is at the millivolt level. Thus even very minor ringing caused by the parasitic parameters of the SR device and the overall circuit may result in a false gate driving signal which causes undesired circulating energy loss. Moreover, the sensed v DS  of the MOSFET is actually the sum of the R ds     —     on  voltage drop and the package&#39;s inductive voltage drop. The sensed v DS  external to the SR does not accurately represent the Vds seen by the actual SR semiconductor device buried within the package of the SR. A nanoHenry (nH) inductance introduced by a printed circuit board (PCB) trace may cause a considerable duty cycle loss [4]. Therefore, the SR will be on for a much shorter time than required, resulting in extra conduction loss. 
         [0007]    The conventional DC resistance of the inductor (DCR) current sensing method is widely used to sense and emulate the current of in voltage regulators (VRs) [9-11]. The advantages of this method are that it utilizes the parasitic DCRs of the inductors and is intrinsically lossless [12-14]. In [4], it was attempted to use DCR current sensing to compensate for the duty cycle loss caused by the trace inductance of the MOSFET package (i.e., the parasitic inductance of the conductors in the package). However, because of the large number of switches used in the matching circuit, the compensator was extremely complicated and difficult to implement. In addition, active switches degrade the reliability of the power circuit, and false-triggering caused by parasitic ringing was not solved. 
       SUMMARY 
       [0008]    Described herein are circuits and methods for improving characteristics (e.g., efficiency) of driving the synchronous rectifier (SR) of a power converter, based on a v DS  sensing scheme. The embodiments described herein may be incorporated into new VR designs, or they may be used to improve the SR driving characteristics of commercially available voltage sensing SR drivers. 
         [0009]    As described herein, by applying a voltage sense compensator across the drain and source of the SR, an improved sense signal is provided to the SR driver sense input, and false triggering of the SR may be effectively eliminated. In addition, the voltage sense compensator also ensures that the SR MOSFET will be turned on as soon as its current starts to flow and is turned off when its current falls to zero. 
         [0010]    In one embodiment the voltage sense compensator includes a diode or other non-linear device, a resistor, and a capacitor. The resistor and capacitor serve two purposes. One is to filter out ringing caused by leakage inductance of the transformer and the output capacitor of the SR MOSFET. The other purpose is to compensate for the time delay caused by the trace inductance inside the SR MOSFET package and the R Ds     —     on  of the SR MOSFET. The diode is used to quickly discharge the voltage across the capacitor when the SR MOSFET is off so that the SR can be turned on as soon as its current starts to flow. Embodiments may include only passive components, making them reliable and easy to implement. Other embodiments may include active components. 
         [0011]    Described herein is a method for improving a driving signal of a driver for a synchronous rectifier (SR) of a power converter, comprising: connecting a non-linear compensation circuit in parallel with the SR; sensing a voltage of the non-linear compensation circuit; and outputting the sensed voltage to the SR driver; wherein the SR driver generates a driving signal for the SR based on the sensed voltage. The driving signal for the SR may substantially prevent false-triggering of the SR. The method may include selecting parameters of the resistor and the capacitor to match a trace inductance L trace  and R DS     —     on  of the SR. The method may include at least partially integrating the non-linear compensation circuit with the SR driver. 
         [0012]    The non-linear circuit may compensate voltage across the SR. The non-linear compensation circuit may be a passive circuit. In one embodiment the non-linear compensation circuit may comprise: a capacitor having a first terminal connected to a first terminal of the SR; and a combination of a diode and a resistor connected in parallel at first and second nodes, the first node connected in series with a second terminal of the capacitor and the second node connected to a second terminal of the SR. 
         [0013]    The SR may be a device selected from a MOSFET, a MESFET, and a JFET. In one embodiment, the SR is a MOSFET. The resonant converter may be a LLC resonant converter, a series resonant converter, or a flyback converter. The SR driver may be a conventional SR driver. 
         [0014]    Also described herein is a circuit for use with a synchronous rectifier (SR) driver of a power converter, comprising: a non-linear compensation circuit connected across the SR; wherein a voltage of the non-linear compensation circuit is outputted to the SR driver and used by the SR driver to generate a driving signal for the SR. The non-linear compensation circuit may be passive. 
         [0015]    In one embodiment the non-linear compensation circuit comprises: a capacitor having a first terminal connected to a first terminal of the SR; and a combination of a diode and a resistor connected in parallel at first and second nodes, the first node connected in series with a second terminal of the capacitor and the second node connected to a second terminal of the SR. The SR may be a device selected from a MOSFET, a MESFET, and a JFET. In one embodiment the SR is a MOSFET. 
         [0016]    Parameters of the resistor and the capacitor may be selected to match a trace inductance L trace  and R DS     —     on  of the SR. The driving signal for the SR may substantially prevent false-triggering of the SR. 
         [0017]    The resonant converter may be a LLC resonant converter, a series resonant converter, or a flyback converter. The SR driver may be a conventional SR driver. The non-linear compensation circuit may be at least partially integrated with the SR driver. 
         [0018]    Also described herein is a synchronous rectifier (SR) for a resonant converter, comprising: a switch; and a non-linear compensation circuit including a capacitor having a first terminal connected to a first terminal of the switch; and a combination of a diode and a resistor connected in parallel at first and second nodes, the first node connected in series with a second terminal of the capacitor and the second node connected to a second terminal of the switch. The synchronous rectifier may also include a SR driver, wherein a voltage of the non-linear compensation circuit is used by the SR driver to generate a SR driving signal. The SR driver may be a conventional SR driver. The switch may be a device selected from a MOSFET, a MESFET, and a JFET. In one embodiment, the switch is a MOSFET. 
     
    
     
       DESCRIPTION OF THE DRAWINGS 
         [0019]    For a more complete understanding of the invention, and to show how it may be carried into effect, embodiments are described herein with reference to the accompanying drawings, wherein: 
           [0020]      FIG. 1  is a diagram of a MOSFET showing its body diode and intrinsic drain to source capacitance; 
           [0021]      FIG. 2(   a ) is a block diagram of a conventional SR driver circuit; 
           [0022]      FIG. 2(   b ) is a circuit diagram of an example of a conventional half-bridge LLC resonant converter with SRs; 
           [0023]      FIGS. 2(   c ) and  2 ( d ) show key waveforms of the LLC converter of  FIG. 2(   b ) operated under full load and light load conditions, respectively; 
           [0024]      FIG. 3(   a ) is a circuit diagram showing v DS  sensing with a RC filter; 
           [0025]      FIG. 3(   b ) shows an equivalent circuit of the circuit of  FIG. 3(   a ) during body diode conduction; 
           [0026]      FIG. 3(   c ) shows key waveforms of the circuit of  FIG. 3(   a ); 
           [0027]      FIG. 4  shows the equivalent circuit of an SR MOSFET when it is on; 
           [0028]      FIG. 5(   a ) is a block diagram showing connection of a non-linear compensation circuit as described herein between the SR MOSFET and the SR driving circuit; 
           [0029]      FIG. 5(   b ) is a circuit diagram of a half-bridge LLC resonant converter with SRs and non-linear compensation circuit according to one embodiment, wherein the transformer leakage inductance and the MOSFET body diodes and intrinsic drain to source capacitances are shown; 
           [0030]      FIG. 5(   c ) is a circuit diagram of a half-bridge LLC resonant converter with SRs and non-linear compensation circuit according to another embodiment, wherein the transformer leakage inductance and the MOSFET body diodes and intrinsic drain to source capacitances are not shown; 
           [0031]      FIG. 5(   d ) is a circuit diagram of a series resonant converter with SRs and non-linear compensation circuit according to another embodiment, wherein the MOSFET body diodes and intrinsic drain to source capacitances are not shown; 
           [0032]      FIG. 5(   e ) is a circuit diagram of a flyback converter with SR and non-linear compensation circuit according to another embodiment, wherein the MOSFET body diodes and intrinsic drain to source capacitances are not shown; 
           [0033]      FIG. 6(   a ) is a schematic diagram of a non-linear compensation corresponding one embodiment, shown for the case when the SR is turned on; 
           [0034]      FIG. 6(   b ) is an equivalent circuit of the embodiment of the non-linear compensation circuit shown in  FIG. 6(   a ) where the on resistor of the SR MOSFET (R DS     —     on ) and trace inductance associated with SR MSOFET (L trace ) are shown; 
           [0035]      FIGS. 7(   a ) and  7 ( b ) show a voltage matching method for the embodiment of  FIG. 5(   b ).  FIG. 7(   a ) shows key waveforms of the SR, and  FIG. 7(   b ) is a vector diagram of voltage matching; 
           [0036]      FIGS. 8(   a ) to  8 ( c ) show key operation modes of the embodiment of  FIG. 6 ; 
           [0037]      FIGS. 9(   a ) and  9 ( b ) show key waveforms of the embodiment of  FIG. 6  under full and light load conditions, respectively; 
           [0038]      FIGS. 10(   a ) to  10 ( d ) show simplified diagrams of various embodiments in which the non-linear compensation circuit is implemented separately from the SR driving circuit ( FIG. 10(   a )), partially included with the SR driving circuit ( FIGS. 10(   b ) and  10 ( c )), and fully included with the SR driving circuit ( FIG. 10(   d )); 
           [0039]      FIG. 11  shows results of a simulation of an embodiment corresponding to  FIG. 5(   b ). Shown are v DS , i Ls  and the current through the non-linear compensation circuit; 
           [0040]      FIG. 12  shows results of experimental measurement of an embodiment corresponding to  FIG. 5(   b ) under full load; 
           [0041]      FIG. 13  shows results of experimental measurement of an embodiment corresponding to  FIG. 5(   b ) under light load; and 
           [0042]      FIG. 14  is a plot comparing efficiency of simulated embodiments with and without a non-linear compensation circuit. 
       
    
    
     DETAILED DESCRIPTION OF EMBODIMENTS 
       [0043]    A challenge in the design of resonant converters is the need to precisely synchronize the driving signal of the SR with the current through the rectifier. To generate an accurate driving signal for the secondary side SR, accurate current or voltage sensing is required. However, a problem in designing such converters is that the resonance of the circuit prevents highly accurate voltage sensing. The non-linear compensation circuits and methods described herein overcome this problem. 
         [0044]      FIG. 1  is an equivalent circuit of a typical MOSFET showing its body diode and intrinsic drain to source capacitance C oss . Although embodiments are described herein primarily with respect to MOSFETs as SRs, it will be appreciated that other switching devices may be used, such as, for example, MESFETs and JFETs. 
         [0045]      FIG. 2(   a ) is a block diagram of a conventional SR driver circuit, wherein the driving circuit is connected directly across the drain and source of the SR MOSFET.  FIG. 2(   b ) is a circuit diagram of a conventional half-bridge LLC resonant converter with SRs. MOSFETs Q H , Q L , Q S1 , and Q S2  are shown with their body diodes and intrinsic output (drain-source) capacitances. C oss1 /and C oss2  are the output capacitances of the SRs Q S1  and Q S2 . L LKP  is the primary side leakage inductance of the transformer. L LKS1  and L LKS2  are the secondary leakage inductances.  FIGS. 2(   c ) and  2 ( d ) show key waveforms of the LLC converter when operated in full load and light load conditions, respectively. The primary side driving signals cannot be applied to the SRs because of nonlinear characteristics. To drive the SRs, the v DS  of the SRs may be used to approximate acceptable drive signals. 
         [0046]    As shown in  FIGS. 2(   c ) and  2 ( d ), there is a small interval when both of the SR MOSFETs turn off (t 4 ˜t 6  in  FIG. 2(   c ) and t 4 ˜t 7  in  FIG. 2(   d )). When the SRs turn off, L LKP , L LKS1  and L LKS2  resonate with the output capacitance (C oss ) of the SRs. The voltage v DS2  has high frequency spikes when Q S1 /turns off. If the voltage spikes reach the SRs turn on threshold, the SRs will be false-triggered. This results in an energy reversal from the output capacitor to the input source, and may result in breakdown of the power circuit. 
         [0047]    As used herein, the term “false triggering” refers to turning on or turning off a switch (e.g., a MOSFET) at an inappropriate or non-ideal time. Such unwanted switching of the SR may waste energy and may be potentially destructive to the converter. 
         [0048]    One solution to prevent false-triggering at turn-on of the SRs is to add an RC filter to absorb the voltage spikes of v DS . The filter may be used as a substitute for v DS , and sensed by the driving IC to generate the gate signal. Such a circuit is shown in  FIG. 3(   a ). The equivalent circuit when the SR MOSFET diode is on is shown in  FIG. 3(   b ) and key waveforms are shown in  FIG. 3(   c ). 
         [0049]    Due to the high frequency of the voltage spikes, the time constant of the RC filter should be very small, but should be selected a little larger than the period of the parasitic ringing. For example, a time constant of about 100 ns may eliminate false-triggering of the MOSFET. However, the driving signal of the SR may have an unacceptably long lag time at turn on of the SR MOSFET and a long lead time at turn off of the SR MOSFET, which will cause considerable conduction loss of the SR body diode. The reason for the delay at turn on of the SR MOSFET is that the capacitor in the RC filter sustains a high positive voltage before the body diode conducts, and then discharges slowly to the turn-on threshold (less than 0V) through resistor R filter . When the body diode of the SR starts to conduct, the detected v filter1  is larger than the output voltage V out  at t 1 . During t 1 ˜t 2 , the body diode of Q S1  is forward biased and clamps the v DS1  to the forward voltage of the body diode −V Fb . Corresponding to the time constant of the RC filter, V filter  starts to decrease to the turn on threshold slowly. 
         [0050]    As to the lead time at turn off, the impedance of C oss  is much larger than the R Ds     —     on  and can be neglected; therefore, only the trace inductance of the SR package should be taken into account. The current through the SR can be treated as part of a sinusoid waveform, and the frequency of the sinusoid waveform is equal to the series resonant frequency of the resonant tank. Because of the trace inductance, the voltage v DS  leads the current i SR . If v DS  is detected directly to generate the driving signal of SR, the duty cycle loss is inevitable. 
         [0051]      FIG. 4  shows the equivalent circuit of the SR MOSFET when it is on. L trace  is the trace inductance inside the SR MOSFET package and R Ds     —     on  is the on resistance of the SR MOSFET. The measured voltage at the MOSFET terminal is the sum of voltage across L trace  and across R DS     —     on , 
         [0000]      V SD   =V   RDS     —     on   −V   Ltrace   =i   SR   *R   DS     —     on    
         [0000]    The SR current i SR  is approximately a sinusoidal waveform. When the SR current decreases towards zero, the trace inductance will induce a negative voltage to prevent the SR current from falling. The actual polarity is shown in  FIG. 4 . 
         [0052]    In order to reduce the size of the power supply, the switching frequency of the converter should be increased. When frequency increases, the negative voltage also increases and therefore, the actual current at which V SD  equals zero will increase. Thus, if V SD  is used to determine the turn off time of the SR MOSFET, the body diode of the SR MOSFET will be conducting and extra loss will be introduced. The higher the switching frequency is, the higher the body diode current will be and therefore, the higher the body diode conduction loss will become. If the switching frequency is reduced, then the body diode current will be reduced. 
         [0053]    As described herein, the turn-on delay problem may be solved by adding a non-linear compensation circuit. The purpose of the non-linear compensation circuit is to provide a more accurate switch timing signal to the SR driver circuit. The SR driver circuit operates on the principle that measuring V DS  from the SR MOSFET directly provides adequate switch timing However, this is not the case. Measurements of V DS  made externally to the packaged MOSFET device deviate from the ideal case due to stray elements in the MOSFET package, as well as in other elements, that degrade the accuracy of the externally sensed V DS . Examples of such elements include L trace , R DS     —     on , and the drain to source capacitance. Use of such externally sensed V DS  causes the SR driver circuit to generate a SR switch timing signal that switches the MOSFET at non-optimal timing (also referred to herein as false triggering). 
         [0054]    The non-linear compensation circuit is referred to herein as “non-linear” because it includes a component that has a non-linear current-voltage characteristic. Such a component has a semiconductor junction (e.g., a diode or a transistor). The non-linear compensation circuit is asymmetrical in that it provides for different compensation mechanisms for the “on switch event” and for the “off switch event”. During MOSFET turn on, the non-linear compensation circuit compensates the effect of resonant ringing between the leakage inductance of the transformer winding and the output capacitance of the MOSFET at the drain, which causes an oscillatory signal which can falsely trigger the on switch event. During MOSFET turn off, the non-linear compensation circuit compensates for the delay caused by the trace inductance L trace  inside the MOSFET package and the on resistor R Ds     —     on  of the MOSFET. 
         [0055]    As shown in the block diagram of  FIG. 5(   a ), such a non-linear compensation circuit may be connected between the SR device and the SR driving circuit. For example,  FIG. 5(   b ) shows a circuit diagram of an embodiment wherein the non-linear compensation circuit is applied to the SRs of a half-bridge LLC resonant converter, where components common to the circuit of  FIG. 2(   b ) have the same label. Generally, the non-linear compensation circuit may be applied to other power circuits wherein a synchronous rectifier is turned on and/or turned off using a voltage sensing technique, wherein voltage across the rectifier is sensed. For example, the non-linear compensation circuit may be applied to other power converters, such as, but not limited to, a series resonant converter and a flyback converter, as shown in the embodiments of  FIGS. 5(   d ) and  5 ( e ), respectively. In addition, the non-linear compensation circuit may be applied to power converters used in applications including, for example, motor controllers, fluorescent lamp ballasts, etc. The embodiments shown in  FIGS. 5(   b ),  5 ( d ), and  5 ( e ) are suitable for low side SR drivers. It will be appreciated that these embodiments can easily be implemented for high side SR drivers by appropriate connection of transformer secondary side and SR MOSFET. See, for example,  FIG. 5(   c ) which shows the embodiment of  FIG. 5(   b ) configured as a high side driver. 
         [0056]    The circuit operation will be described in detail with reference to the embodiment of  FIG. 5(   b ). In  FIG. 5(   b ), v f1 /and v f2  are sensed by the SR driving circuit as substitutes for V D1  and v D2 . The non-linear compensation circuit, as shown in the embodiment of  FIG. 6(   a ), includes an anti-parallel diode D filter  to discharge the RC filter capacitor quickly. In other embodiments the diode may be replaced with a device that effectively operates like a diode. For example, the diode may be replaced with switch such as a FET or a bipolar transistor, provided that a suitable timing signal is used to control the switch so as to discharge the capacitor at the appropriate time. The equivalent circuit of this embodiment is shown in  FIG. 6(   b ), which also shows the body diode, drain to source capacitance C oss , R DS     —     on , and L trace , of the SR MOSFET. The forward voltage of D filter  (V FD ) is selected to be a little larger than that of the body diode of the SR (V Fb ). In some embodiments two or more diodes may be connected in series if this condition cannot be met by a single diode. 
         [0057]    The value of R filter  and C filter  should selected so that the noise caused by the leakage inductance of the transformer and the output capacitor of the SR MOSFET can be removed. A commonly used method is to select the R filter  and C filter  value so that the following relation is satisfied: 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       R 
                       filter 
                     
                      
                     
                       C 
                       filter 
                     
                   
                   &gt; 
                   
                     2 
                      
                     
                       π 
                       · 
                       
                         
                           
                             
                               ( 
                               
                                 
                                   
                                     L 
                                     LKP 
                                   
                                   
                                     N 
                                     2 
                                   
                                 
                                 + 
                                 
                                   
                                     L 
                                     LKS 
                                   
                                   2 
                                 
                               
                               ) 
                             
                             · 
                             2 
                           
                            
                           
                             C 
                             oss 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   1 
                   ) 
                 
               
             
           
         
       
     
         [0058]    To compensate the lead time at the switch off of the SR, methods known in the art may be employed. For example, a DCR current sensing method may be applied. Parameters of the non-linear compensation circuit should be selected to match the trace inductance L trace  R Ds     —     on  of the SR. For example, as shown in  FIGS. 7(   a ) and  7 ( b ), the parameters of the filter may be chosen to emulate the lead angle θ lead  so that the voltage across the C filter  substantially corresponds to V RDS     —     on . The parameters of the filter may be defined as 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       R 
                       filter 
                     
                      
                     
                       C 
                       filter 
                     
                   
                   = 
                   
                     
                       L 
                       trace 
                     
                     
                       R 
                       
                         DS 
                          
                         _ 
                          
                         on 
                       
                     
                   
                 
               
               
                 
                   ( 
                   2 
                   ) 
                 
               
             
           
         
       
     
         [0059]    Equivalent circuit diagrams of the non-linear compensation circuit embodiment of  FIG. 5(   a ) in various operation modes are shown in  FIGS. 8(   a ) to  8 ( c ). Key waveforms under full and light load conditions are illustrated in  FIGS. 9(   a ) and  9 ( b ), respectively. In these figures it is assumed that Q H  is OFF and Q L  is ON before t 0 . Operation of the circuit may be described as follows, with reference to  FIGS. 9(   a ) and ( b ): 
         [0060]    1. Before t 0 , all of the SRs are turned off. There is only the magnetizing current discharging the resonant capacitor. At t 0 , the primary MOSFET Q L  turns off. The voltage across the SR decreases quickly, and reaches the forward voltage drop V Fb  of the SR body diode at t 1 . At the same time, C filter  is discharged through D filter  until the voltage across C filter  equals V FD −V Fb , wherein V FD  is the forward voltage drop of D filter . 
         [0061]    2. At t 1 , due to C oss  of the SR, the voltage v DS  has high frequency ringing (as explained above). The peak voltage of the ringing is limited by the forward voltage drop V Fb  of the SR body diode. Meanwhile, R filter  and C filter  together operate like a RC filter and filter out the high frequency ringing. 
         [0062]    3. Before t 2 , the body diode of Q S1 /is forward biased and clamps v DS  to −V Fb . At t 2 , the voltage across C filter  v filter  reaches the turn on threshold of the driving IC and the driving signal is generated. During t 2 ˜t 4 , R filter  and C filter  together operate like a traditional DCR current sensing circuit to emulate the current through the SR. At t 4 , the voltage v filter  reaches the turn off threshold of the driving chip. The SR is turned off. 
         [0063]    There are two conditions for the non-linear compensation circuit to emulate the current through the SR. One is that the parameters of R filter  and C filter  are selected to match the trace inductance L trace  and R DS     —     on  of the SR, as shown in equation (2). The other is that the initial voltage v filter  is zero volts. Due to the design parameters of R filter  and C filter  as well as the small value between V FD −V Fb  and the turn on threshold, both of these conditions may be met. In addition, the false-triggering immunity of the non-linear compensation circuit is retained. Consequently, reliability of the SR circuit is improved and conduction loss is significantly reduced. 
         [0064]    It will be appreciated that a non-linear compensation circuit as described herein may be implemented separately from the SR driving circuit, or partially or fully combined with the SR driving circuit. For example,  FIGS. 10(   a ) to  10 ( d ) show simplified diagrams of various embodiments in which the non-linear compensation circuit is implemented separately from the SR driving circuit ( FIG. 10(   a )), partially combined with the SR driving circuit ( FIGS. 10(   b ) and  10 ( c )), and fully combined with the SR driving circuit ( FIG. 10(   d )). The SR driving circuit, either alone or partially or fully implemented with the non-linear compensation circuit, may be fabricated using discrete components or using any suitable integrated circuit (IC) technology. 
         [0065]    Embodiments are further described by way of the following non-limiting example. 
       Example 
     Simulation and Experimental Results 
       [0066]    An embodiment of a half bridge LLC resonant converter with SRs and non-linear compensation circuit, based on the circuit shown in  FIG. 5(   b ), was built and tested, and a simulation was also conducted using simulation software (Saber version 4.0, Synopsys, Inc., Mountain View, Calif.). In the simulation and the experimental embodiment, the converter was 400V/12V, 600W, and the parameters were as listed in Table 1. 
         [0000]    
       
         
               
             
               
               
               
               
             
           
               
                 TABLE 1 
               
               
                   
               
               
                 CIRCUIT PARAMETERS 
               
               
                   
               
             
             
               
                   
               
             
          
           
               
                 L m  (μH) 
                 98.7 
                 C S  (nF) 
                 40 
               
               
                 L LKP  (μH) 
                 6.8 
                 R filter  (kΩ) 
                 3.9 
               
               
                 L LKS  (nH) 
                 9 
                 C filter  (pF) 
                 100 
               
               
                 D filter    
                 1N4148 
                   
                   
               
               
                 SR driving 
                 IR1168 
                 Q H , Q L   
                 IPB50R299 
               
               
                 Turns ratio 
                 20:1:1 
                 Q S1 , Q S2   
                 SIR158DP 
               
               
                   
               
             
          
         
       
     
         [0067]      FIG. 11  shows the simulation results for v DS , the current of the resonant tank, and the current through the non-linear compensation circuit. It is observed that the extra loss of the non-linear compensation circuit is very small. A short delay at the switch on and a lead time at the switch off are provided to prevent an energy reversal from the output capacitor to the source. Because of the small turn on and turn off currents of the SR, the conduction loss of the body diode may be neglected. 
         [0068]      FIGS. 12 and 13  show waveforms of the experimental embodiment at full load and light load conditions, respectively. These results show that the embodiment operates properly at any load condition. 
         [0069]      FIG. 14  compares the measured efficiency of the experimental embodiment with and without the non-linear compensation circuit under different load conditions. It can be seen that as the load current increases, the efficiency improvement resulting from the non-linear compensation circuit becomes more significant. 
         [0070]    All cited publications are incorporated herein by reference in their entirety. 
       EQUIVALENTS 
       [0071]    Those skilled in the art will recognize or be able to ascertain equivalents to the embodiments described herein. Such equivalents are considered to be encompassed by the invention and are covered by the appended claims. 
       REFERENCES 
       [0000]    
       
         [1] A. Lokhandwala, M. Salato, and M. Soldano, “Dual SmartRectifier and DirectFET Chipset Overcomes Package Source Inductance Effects and Provides Accurate Sensing for Synchronous Rectification in DC-DC Resonant Converters,” in  Proc. IEEE Appl. Power Electron. Conf.,  2007, pp. 1559-1562. 
         [3] B. Wang, X. Xin, S. Wu, et al., “Analysis and Implementation of LLC Burst Mode for Light Load Efficiency Improvement,” in  Proc. IEEE Appl. Power Electron. Conf.,  2009, pp. 58-64. 
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