Abstract:
Provided is a high frequency switch wherein first switch circuits, each of which includes a first PIN diode, are connected in parallel to one or more first λ/4 signal transmitting paths which transmit transmitting signals, and second switch circuits, each of which includes a second PIN diode, are connected in parallel to one or more second λ/4 signal transmitting paths which transmit receiving signals to a receiving terminal. A first control voltage is applied to the cathode of the first PIN diode, and a second control voltage is applied to the cathode of the second PIN diode. Furthermore, a biasing circuit which applies a constant bias voltage is connected to each anode of the first PIN diode and the second PIN diode.

Description:
TECHNICAL FIELD  
       [0001]    The present invention relates to a high frequency switch for switching between high frequency signals, and more particularly to a high frequency switch suitable for use as an antenna switch connected to an antenna, e.g., a TDD (Time Division Duplex) switch or the like. 
       BACKGROUND ART  
       [0002]    Conventional high frequency switches such as antenna switches include a microwave switch disclosed in Japanese Patent No. 2532122 and a transmission and reception switching device disclosed in Japanese Patent No. 2830319, for example. 
         [0003]    The microwave switch disclosed in Japanese Patent No. 2532122 has PIN diodes inserted in series and parallel in a signal line. Forward currents are passed through the PIN diodes to turn them on, and the PIN diodes are reversely biased to turn them off, thereby switching between high frequency signals. 
         [0004]    The transmission and reception switching device disclosed in Japanese Patent No. 2830319 employs a circuit scheme wherein a switch is constructed of transmission lines and PIN diodes or the like which are connected in series to the transmission lines, the transmission lines and the PIN diodes being connected parallel to a signal transmission line. 
       SUMMARY OF INVENTION  
       [0005]    There are two types of transmission and reception switching schemes (a first transmission and reception switching scheme and a second transmission and reception switching scheme) using high frequency switches, as described below. 
         [0006]    According to the first transmission and reception switching scheme, as shown in  FIG. 18 , a transmission amplifier  108  and an isolator  111  are connected to a transmission signal line  106  between a transceiver  100  and a transmission and reception antenna  102  (or via a bandpass filter  104 ), and a reception amplifier  112  is connected to a reception signal line  110  between the transceiver  100  and the transmission and reception antenna  102  (or via the bandpass filter  104 ). A high frequency switch  114  is connected to the junction between the transmission signal line  106  and the reception signal line  110 . 
         [0007]    According to the second transmission and reception switching scheme, as shown in  FIG. 19 , a transmission amplifier  108  is connected to a transmission signal line  106 , and a reception amplifier  112  and a high frequency switch  114  are connected to a reception signal line  110 . A circulator  116  is connected to the junction between the transmission signal line  106  and the reception signal line  110 . 
         [0008]    In the above high frequency switches, for example, a PIN diode is used for a switching element. Since the anodes or cathodes of the PIN diodes are all grounded in direct current, it is necessary to use both of a positive power supply and a negative power supply for switching operation. 
         [0009]    Therefore, if a positive power supply is used for a circuit system in the above-mentioned transmission and reception switching scheme, it is necessary to newly prepare a negative power supply. Conversely, if a negative power supply is used for a circuit system in the above-mentioned transmission and reception switching scheme, it is necessary to newly prepare a positive power supply. Then, the number of parts used becomes large, and the entire circuit configuration thereof becomes structurally complex. 
         [0010]    The circuit disclosed in Japanese Patent No. 2830319 does not require a dual power supply (both the positive and negative power supplies). The circuit, however, is not reversely biased when the diodes are turned off. Accordingly, it is not possible to achieve sufficient switching characteristics since the diodes are used while the junction capacitance of the diodes is large. Further, since transistors and inverters are necessary as well as a control circuit, the number of parts used becomes large. 
         [0011]    The present invention has been made in view of the above problems. It is an object of the present invention to provide a high frequency switch which requires only a single power supply (either a positive power supply or a negative power supply) in place of both of a positive power supply and a negative power supply, and which can be used while the diodes are reversely biased and the junction capacitance thereof is small, and which can avoid the increase in the number of parts used and the structural complexity of circuit configuration, and which can avoid the decrease in switching speed. 
         [0012]    According to the present invention, a high frequency switch includes a first switch circuit connected parallel to at least one first signal transmission line for transmitting a transmission signal from a transmission terminal, the first switch circuit having at least one first PIN diode, and a second switch circuit connected parallel to at least one second signal transmission line for transmitting a reception signal to a reception terminal, the second switch circuit having at least one second PIN diode, wherein in the first switch circuit, a first transmission line is connected in series to a circuit including the at least one first PIN diode while an anode of the first PIN diode is connected to the first transmission line, in the second switch circuit, a second transmission line is connected in series to a circuit including the at least one second PIN diode while an anode of the second PIN diode is connected to the second transmission line, cathodes of the PIN diodes are grounded at high frequencies, ends of resonant elements or resonant lines are connected to the cathodes of the PIN diodes, and other ends thereof are free ends, a first control terminal is electrically connected to one of the anode and the cathode of the first PIN diode, a first control voltage being supplied to the first control terminal, a second control terminal is electrically connected to one of the anode and the cathode of the second PIN diode, a second control voltage being supplied to the second control terminal, and a bias applying means is provided for applying a constant bias voltage to other of the cathodes and the anodes of the PIN diodes. 
         [0013]    With the above arrangement, the high frequency switch requires only a single power supply (either a positive power supply or a negative power supply) in place of both of a positive power supply and a negative power supply, can be used while the PIN diodes are reversely biased and the junction capacitance thereof is small, can avoid the increase in the number of parts used and the complexity of circuit configuration, and can avoid the decrease in switching speed. 
         [0014]    Meanwhile, instead of one end of a resonant element (or a resonant line) having the other free end, it is conceivable that a capacitor Cx may be connected between the cathode of each of the PIN diodes and GND, as shown in  FIG. 20  illustrating a reference example. Due to Q factor or a parasitic capacitance of the capacitor Cx, a sufficiently-low impedance cannot be achieved, so that it is difficult to ground the cathode at high frequencies. 
         [0015]    In the present invention, to the cathode of each of the PIN diodes, one end of the resonant element (or the resonant line) is connected, and the other end thereof is a free end. By this impedance changing function, a sufficiently-low impedance can be achieved, so that it is possible to ground the cathode at high frequencies. 
         [0016]    In the present invention, the first switch circuit may be turned on and the second switch circuit is turned off when 0 V&lt;Vc 1 &lt;Vcc&lt;Vc 2  or 0 V&gt;Vc 2 &gt;Vcc&gt;Vc 1 , and the first switch circuit is turned off and the second switch circuit is turned on when 0 V&lt;Vc 2 &lt;Vcc&lt;Vc 1  or 0 V&gt;Vc 1 &gt;Vcc&gt;Vc 2 , where Vc 1  represents the first control voltage, Vc 2  represents the second control voltage, and Vcc represents the bias voltage. 
         [0017]    Similarly, the first switch circuit may be turned on and the second switch circuit is turned off when 0 V&lt;Vc 2 &lt;Vcc&lt;Vc 1  or 0 V&gt;Vc 1 &gt;Vcc&gt;Vc 2 , and the first switch circuit is turned off and the second switch circuit is turned on when 0 V&lt;Vc 1 &lt;Vcc&lt;Vc 2  or 0 V&gt;Vc 2 &gt;Vcc&gt;Vc 1 , where Vc 1  represents the first control voltage, Vc 2  represents the second control voltage, and Vcc represents the bias voltage. 
         [0018]    In the present invention, fo represents a central frequency of an operating frequency band, and λ represents a wavelength corresponding to the central frequency fo, in the first switch circuit, the first transmission line and a parallel resonant circuit including the at least one first PIN diode are connected in series to the first signal transmission line, in the second switch circuit, the second transmission line and a parallel resonant circuit including the at least one second PIN diode are connected in series to the second signal transmission line, constants of the parallel resonant circuits may be set to equalize resonant frequencies at time the PIN diodes are turned off with the central frequency fo. 
         [0019]    In the present invention, the high frequency switch may further comprise a directional coupler having the first signal transmission line as a component thereof, for detecting at least a reflected wave of the transmission signal. 
         [0020]    In the present invention, a resistor for forming a reception terminating resistance may be connected parallel to the second PIN diode of the second switch circuit which is connected parallel to the second signal transmission line that is connected at least to the reception terminal. 
         [0021]    Further, an electrical length of each of the above-mentioned first and second signal transmission lines is not limited, and the signal transmission line may have a length such as a 3λ/4 signal transmission line and a λ/4 signal transmission line. It is, however, preferable to use a λ/4 signal transmission line in view of the reduction in size or the like. 
         [0022]    Further, an electrical length of each of the above-mentioned first and second transmission lines is not limited, and the transmission line may have a length such as a 3λ/4 transmission line or a λ/4 transmission line. It is, however, preferable to use a λ/4 transmission line in view of the reduction in size or the like. 
         [0023]    Further, an electrical length of each of the above-mentioned resonant elements or resonant lines is not limited, and the resonant element or resonant line may have a length such as a 3λ/4 resonant element (or a 3λ/4 resonant line) or a λ/4 resonant element (or a λ/4 resonant line). It is, however, preferable to use a λ/4 resonant element (or a λ/4 resonant line) in view of the reduction in size or the like. 
         [0024]    As described above, the high frequency switch according to the present invention requires only a single power supply (either a positive power supply or a negative power supply) in place of both of a positive power supply and a negative power supply, can be used while the PIN diodes are reversely biased and the junction capacitance thereof is small, can avoid the increase in the number of parts used and the complexity of circuit configuration, and can avoid the decrease in switching speed. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0025]      FIG. 1  is a circuit diagram showing a configuration of a first antenna switch; 
           [0026]      FIG. 2A  is a diagram showing an equivalent circuit of a first switch circuit of the first antenna switch when a first PIN diode is turned on, and  FIG. 2B  is a diagram showing an equivalent circuit of the first switch circuit when the first PIN diode is turned off; 
           [0027]      FIG. 3A  is a diagram showing an equivalent circuit of the first switch circuit in the vicinity of a central frequency when the first PIN diode is turned on, and  FIG. 3B  is a diagram showing an equivalent circuit of the first switch circuit in the vicinity of a central frequency when the first PIN diode is turned off; 
           [0028]      FIG. 4  is a diagram illustrative of the relationship between input and output impedances of a transmission line; 
           [0029]      FIG. 5  is a diagram showing an equivalent circuit of the first antenna switch when the first switch circuit is turned on and a second switch circuit is turned off; 
           [0030]      FIG. 6  is a diagram showing an equivalent circuit of the first antenna switch when the first switch circuit is turned off and the second switch circuit is turned on; 
           [0031]      FIG. 7  is a circuit diagram showing a configuration of an antenna switch according to a first modified example; 
           [0032]      FIG. 8  is a circuit diagram showing a configuration of an antenna switch according to a second modified example; 
           [0033]      FIG. 9  is a diagram showing the manner in which a directional coupler operates; 
           [0034]      FIG. 10  is a circuit diagram showing a configuration of an antenna switch according to a third modified example; 
           [0035]      FIG. 11  is a circuit diagram showing a configuration of an antenna switch according to a fourth modified example; 
           [0036]      FIG. 12  is a circuit diagram showing a configuration of an antenna switch according to a fifth modified example; 
           [0037]      FIG. 13A  is a diagram showing an equivalent circuit of a second switch circuit of the antenna switch according to the fifth modified example when a second PIN diode is turned on, and  FIG. 13B  is a diagram showing an equivalent circuit of the second switch circuit when the second PIN diode is turned off; 
           [0038]      FIG. 14  is a diagram showing an equivalent circuit of the antenna switch according to the fifth modified example when the first switch circuit is turned on and the second switch circuit is turned off; 
           [0039]      FIG. 15  is a circuit diagram showing a configuration of an antenna switch according to a sixth modified example; 
           [0040]      FIG. 16  is a diagram showing an equivalent circuit of the antenna switch according to the sixth modified example when a first switch circuit is turned off and a second switch circuit is turned on; 
           [0041]      FIG. 17  is a circuit diagram showing a configuration of a second antenna switch; 
           [0042]      FIG. 18  is a diagram illustrative of a first transmission and reception scheme using a high frequency switch; 
           [0043]      FIG. 19  is a diagram illustrative of a second transmission and reception scheme using a high frequency switch; and 
           [0044]      FIG. 20  is a diagram illustrative of an antenna switch according to a reference example. 
       
    
    
     DESCRIPTION OF EMBODIMENTS 
       [0045]    Embodiments wherein a high frequency switch according to the present invention is applied, for example, to an antenna switch will be described below with reference to  FIGS. 1 through 17 . It is assumed that λ represents a wavelength corresponding to the central frequency of an operating frequency band of the switch, and refers to a wavelength in transmission lines described below. 
         [0046]    As shown in  FIG. 1 , an antenna switch according to a first embodiment (hereinafter referred to as a first antenna switch  10 A) comprises two first λ/4 signal transmission lines  16   a  connected between an antenna connection terminal  12  and a transmission terminal  14 , two second λ/4 signal transmission lines  16   b  connected between the antenna connection terminal  12  and a reception terminal  18 , first switch circuits  20   a  connected parallel to the respective first λ/4 signal transmission lines  16   a,  and second switch circuits  20   b  connected parallel to the respective second λ/4 signal transmission lines  16   b.    
         [0047]    Capacitors Ca through Cc are connected respectively between the transmission terminal  14  and the first λ/4 signal transmission line  16   a  adjacent to the transmission terminal  14 , between the reception terminal  18  and the second λ/4 signal transmission line  16   b  adjacent to the reception terminal  18 , between a junction between the first λ/4 signal transmission line  16   a  and the second λ/4 signal transmission line  16   b  which are adjacent to each other and the antenna connection terminal  12 . The capacitors Ca through Cc are capacitors for blocking currents for turning on and off PIN diodes, to be described later, or direct currents supplied via a bias terminal  32 , to be described later, and operate as a short circuit at high frequencies. 
         [0048]    In the first switch circuit  20   a,  a first λ/4 transmission line  22   a  is connected in series to a circuit including a first PIN diode D 1  while an anode of the first PIN diode D 1  is connected to the first λ/4 transmission line  22   a.    
         [0049]    The circuit including the first PIN diode D 1  comprises a series-connected circuit of an eleventh inductor L 11  and an eleventh capacitor C 11  which are connected between the anode and a cathode of the first PIN diode D 1 . In the circuit, the eleventh inductor L 11  is connected to the anode and the eleventh capacitor C 11  is connected to the cathode. The eleventh capacitor C 11  operates as a capacitor for blocking direct currents supplied via the bias terminal  32 , to be described later. Further, a series-connected circuit of a twelfth inductor L 12  and a twelfth capacitor C 12  is connected between the cathode of the first PIN diode D 1  and GND (ground). A first control terminal  24   a  is connected to a junction between the twelfth inductor L 12  and the twelfth capacitor C 12 . 
         [0050]    To the cathode of the first PIN diode D 1 , one end of a λ/4 resonant element  26  (or λ/4 resonant line) is connected, and the other end thereof is a free end (infinite resistance). Therefore, the cathode side of the first PIN diode D 1  is grounded at high frequencies. Thus, a combined circuit made up of the first PIN diode D 1  and the series-connected circuit of the eleventh inductor L 11  and the eleventh capacitor C 11  configures a first parallel resonant circuit  28   a.  The twelfth capacitor C 12  operates as a capacitor for blocking currents for turning on and off the first PIN diode D 1 , and the twelfth inductor L 12  operates as a choke coil. 
         [0051]    In the second switch circuit  20   b,  a second λ/4 transmission line  22   b  is connected in series to a circuit including a second PIN diode D 2  while an anode of the second PIN diode D 2  is connected to the second λ/4 transmission line  22   b.    
         [0052]    The circuit including the second PIN diode D 2  comprises a series-connected circuit of a twenty-first inductor L 21  and a twenty-first capacitor C 21  which are connected between the anode and a cathode of the second PIN diode D 2 . In the circuit, the twenty-first inductor L 21  is connected to the anode and the twenty-first capacitor C 21  is connected to the cathode. The twenty-first capacitor C 21  operates as a capacitor for blocking direct currents supplied via the bias terminal  32 , to be described later. Further, a series-connected circuit of a twenty-second inductor L 22  and a twenty-second capacitor C 22  is connected between the cathode of the second PIN diode D 2  and GND (ground). A second control terminal  24   b  is connected to a junction between the twenty-second inductor L 22  and the twenty-second capacitor C 22 . 
         [0053]    To the cathode of the second PIN diode D 2 , one end of a λ/4 resonant element  26  (or λ/4 resonant line) is connected, and the other end thereof is a free end (infinite resistance). Therefore, the cathode side of the second PIN diode D 2  is grounded at high frequencies. Thus, a combined circuit made up of the second PIN diode D 2  and the series-connected circuit of the twenty-first inductor L 21  and the twenty-first capacitor C 21  configures a second parallel resonant circuit  28   b.  The twenty-second capacitor C 22  operates as a capacitor for blocking currents for turning on and off the second PIN diode D 2 , and the twenty-second inductor L 22  operates as a choke coil. 
         [0054]    In the first antenna switch  10 A, a bias circuit  30  is connected to one of the two second switch circuits  20   b,  which is close to the antenna connection terminal  12 . 
         [0055]    The bias circuit  30  is a circuit for applying the constant bias voltage Vcc to the anodes of the first PIN diodes D 1  of the first switch circuits  20   a  and the anodes of the second PIN diodes D 2  of the second switch circuits  20   b.  In this embodiment, the bias circuit  30  comprises a series-connected circuit of a third inductor L 3  and a third capacitor C 3  which are connected between a junction between the twenty-first inductor L 21  and the twenty-first capacitor C 21  of the second switch circuit  20   b  and GND (ground), and the bias terminal  32  connected to a junction between the third inductor L 3  and the third capacitor C 3 . The third capacitor C 3  operates as a capacitor for blocking direct currents supplied via the bias terminal  32 . The third inductor L 3  functions as a choke coil for supplying the direct currents that are supplied to the bias terminal  32  to the respective anodes of the first PIN diodes D 1  and the respective anodes of the second PIN diodes D 2 . Accordingly, by applying the constant bias voltage Vcc to the bias terminal  32 , the constant bias voltage Vcc is applied to the respective anodes of the first PIN diodes D 1  and the respective anodes of the second PIN diodes D 2 . 
         [0056]    The first control voltage Vc 1  is applied to the first control terminals  24   a,  and the second control voltage Vc 2  is applied to the second control terminals  24   b.    
         [0057]    Accordingly, the first switch circuits  20   a  are turned on and the second switch circuits  20   b  are turned off when the bias voltage Vcc, the first control voltage Vc 1 , and the second control voltage Vc 2  have a magnitude relationship of: 
         [0000]      0 V&lt;Vc1&lt;Vcc&lt;Vc2 or 0 V&gt;Vc2&gt;Vcc&gt;Vc1 
         [0058]    Conversely, the first switch circuits  20   a  are turned off and the second switch circuits  20   b  are turned on when the bias voltage Vcc, the first control voltage Vc 1 , and the second control voltage Vc 2  have a magnitude relationship of: 
         [0000]      0 V&lt;Vc2&lt;Vcc&lt;Vc1 or 0 V&gt;Vc1&gt;Vcc&gt;Vc2 
         [0059]    In the following description, when the relationship of 0 V&lt;Vc 1 &lt;Vcc or 0 V&gt;Vcc&gt;Vc 1  is established as to the first control voltage Vc 1 , the first control voltage Vc 1  is called as a first forward voltage. Also, when the relationship of 0 V&lt;Vc 2 &lt;Vcc or 0 V&gt;Vcc&gt;Vc 2  is established as to the second control voltage Vc 2 , the second control voltage Vc 2  is called as a second forward voltage. Similarly, when the relationship of 0 V&lt;Vcc&lt;Vc 1  or 0 V&gt;Vc 1 &gt;Vcc is established as to the first control voltage Vc 1 , the first control voltage Vc 1  is called as a first reverse voltage. Also, when the relationship of 0 V&lt;Vcc&lt;Vc 2  or 0 V&gt;Vc 2 &gt;Vcc is established as to the second control voltage Vc 2 , the second control voltage Vc 2  is called as a second reverse voltage. 
         [0060]    Next, circuit operation of the first antenna switch  10 A will be described below with reference to  FIGS. 2A through 7 . 
         [0061]    The first switch circuit  20   a  will primarily be described below. First, when the bias voltage Vcc is applied to the bias terminal  32 , the bias voltage Vcc is applied to the anodes of the first PIN diodes D 1  and the anodes of the second PIN diodes D 2 . 
         [0062]    In this state, when the first forward voltage of the first control voltage Vc 1  is applied to the first control terminal  24   a,  the first PIN diode D 1  is turned on. At this time, the first switch circuit  20   a  is represented by an equivalent circuit shown in  FIG. 2A . Specifically, a circuit comprising an inductance La and an ON resistance Ro of the first PIN diode D 1  which are connected parallel to each other is connected in series between the first λ/4 transmission line  22   a  and GND. 
         [0063]    Conversely, when the first reverse voltage of the first control voltage Vc 1  is applied to the first control terminal  24   a,  the first PIN diode D 1  is turned off. At this time, the first switch circuit  20   a  is represented by an equivalent circuit shown in  FIG. 2B . Specifically, a parallel resonant circuit comprising an inductance La, a parasitic capacitance Cf due to the depletion layer of the first PIN diode D 1 , and a parallel resistance Rf of the first PIN diode D 1  which are connected parallel to each other is connected in series between the first λ/4 transmission line  22   a  and GND. 
         [0064]    In the first antenna switch  10 A, the inductance La has a value established such that the central frequency fo of the first antenna switch  10 A and the resonant frequency of the parallel resonant circuit that is made up of the parasitic capacitance Cf, the parallel resistance Rf, and the inductance La are in agreement with each other. 
         [0065]    The ON resistance Ro is generally of about 1 ohm or less. Since the ON resistance Ro can be expressed as Ro&lt;&lt;2πfoLa, the first switch circuit  20   a  can be represented by an equivalent circuit shown in  FIG. 3A  in the vicinity of the central frequency fo when the first PIN diode D 1  is turned on, and can be represented by an equivalent circuit shown in  FIG. 3B  in the vicinity of the central frequency fo when the first PIN diode D 1  is turned off. 
         [0066]    It is assumed that, as shown in  FIG. 4 , a transmission line z=L is terminated by the load of an impedance Z(L). 
         [0067]    If the transmission line has a characteristic impedance Zo, a travelling wave is represented by Ae −γz , and a reflected wave is represented by Be −γz  (γ indicates a propagation constant), then a voltage V(z) and a current I(z) at a reference point z are expressed by the following equations: 
         [0000]        V ( z )= Ae   −γz   +Be   γz    
         [0000]        I ( z )=( A/Zo ) e   −γz −( B/Zo ) e   γz  
 
         [0068]    Therefore, the impedance Z(L) at z=L is expressed by the following equation: 
         [0000]    
       
         
           
             
               
                 
                   
                     Z 
                      
                     
                       ( 
                       L 
                       ) 
                     
                   
                   = 
                   
                     
                       V 
                        
                       
                         ( 
                         L 
                         ) 
                       
                     
                     / 
                     
                       I 
                        
                       
                         ( 
                         L 
                         ) 
                       
                     
                   
                 
               
             
             
               
                 
                   = 
                   
                     Zo 
                      
                     
                       { 
                       
                         
                           ( 
                           
                             
                               A 
                                
                               
                                   
                               
                                
                               
                                  
                                 
                                   
                                     - 
                                     γ 
                                   
                                    
                                   
                                       
                                   
                                    
                                   L 
                                 
                               
                             
                             + 
                             
                               B 
                                
                               
                                   
                               
                                
                               
                                  
                                 
                                   γ 
                                    
                                   
                                       
                                   
                                    
                                   L 
                                 
                               
                             
                           
                           ) 
                         
                         / 
                         
                           ( 
                           
                             
                               A 
                                
                               
                                   
                               
                                
                               
                                  
                                 
                                   
                                     - 
                                     γ 
                                   
                                    
                                   
                                       
                                   
                                    
                                   L 
                                 
                               
                             
                             - 
                             
                               B 
                                
                               
                                   
                               
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                                   γ 
                                    
                                   
                                       
                                   
                                    
                                   L 
                                 
                               
                             
                           
                           ) 
                         
                       
                       } 
                     
                   
                 
               
             
           
         
       
     
         [0069]    A reflection coefficient Γ(L) has a relationship expressed by the following equation (a): 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       
                         
                           Γ 
                            
                           
                             ( 
                             L 
                             ) 
                           
                         
                         = 
                         
                           
                             ( 
                             
                               B 
                                
                               
                                   
                               
                                
                               
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                                   γ 
                                    
                                   
                                       
                                   
                                    
                                   L 
                                 
                               
                             
                             ) 
                           
                           / 
                           
                             ( 
                             
                               A 
                                
                               
                                   
                               
                                
                               
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                                     γ 
                                   
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                                    
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                         = 
                         
                           
                             ( 
                             
                               B 
                               / 
                               A 
                             
                             ) 
                           
                            
                           
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                               2 
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                               γ 
                                
                               
                                   
                               
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                         = 
                         
                           
                             { 
                             
                               
                                 Z 
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                                   ) 
                                 
                               
                               - 
                               Zo 
                             
                             } 
                           
                           / 
                           
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                                 Z 
                                  
                                 
                                   ( 
                                   L 
                                   ) 
                                 
                               
                               + 
                               Zo 
                             
                             } 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   a 
                   ) 
                 
               
             
           
         
       
     
         [0070]    An impedance Z(0) of the load as seen at z=0 is expressed by the following equation (b): 
         [0000]        Z (0)= Zo {( A+B )/( A−B )}  (b)
 
         [0071]    From the equation (a), 
         [0000]        B/A=[{Z ( L )− Zo}/{Z ( L )+ Zo}]e   −2γL  
 
         [0072]    By substituting this equation into the equation (b), the following equation (c) is obtained: 
         [0000]        Z (0)/ Zo={Z ( L )+ Zo  tan  hγL}/{Zo+Z ( L )tan  hγL}   (c)
 
         [0073]    where γ=α+jβ (α represents an attenuation constant and β a phase constant expressed by β=2π/λ). 
         [0074]    Since α=0 and γ=jβ for a lossless line, the equation (c) can be modified into the following equation (d): 
         [0000]        Z (0)/ Zo={Z ( L )+ jZo  tan β L}/{Zo+jZ ( L )tan β L}(d)  
 
         [0075]    By substituting L=λ/4 into the equation (d), the following equation (e) is obtained: 
         [0000]        Z (0)/ Zo=Zo/Z ( L ) 
         [0000]        Z (0)= Zo   2   /Z ( L )   (e)
 
         [0076]    Inasmuch as Z(L) is a low resistance of about 1 ohm or less when the first PIN diode D 1  is turned on, the impedance (in this case, Z(0)) of the first λ/4 transmission line  22   a  on the signal line side is of a large value, and the signal line is ideally in an open state, as can be understood from the equation (e). Conversely, inasmuch as Z(L) is a high resistance of about 10 k ohms or more when the first PIN diode D 1  is turned off, the impedance (in this case, Z(0)) of the first λ/4 transmission line  22   a  on the signal line side is of a small value, and the signal line is ideally in a short-circuited state, as can be understood from the equation (e). 
         [0077]    Therefore, when the first forward voltage of the first control voltage Vc 1  is applied to the first control terminals  24   a,  turning on the first PIN diodes D 1 , and the second reverse voltage of the second control voltage Vc 2  is applied to the second control terminals  24   b,  turning off the second PIN diodes D 2 , the first antenna switch  10 A is represented by an equivalent circuit shown in  FIG. 5  wherein only the transmission terminal  14  is connected to the antenna connection terminal  12  at high frequencies. A transmission signal Sa supplied to the transmission terminal  14  is thus transmitted via the antenna connection terminal  12 . In other words, a first signal line  34   a  from the transmission terminal  14  to the antenna connection terminal  12  serves as a signal transmission side, and a second signal line  34   b  from the reception terminal  18  to the antenna connection terminal  12  serves as a signal cutoff side. 
         [0078]    Conversely, when the first reverse voltage of the first control voltage Vc 1  is applied to the first control terminals  24   a,  turning off the first PIN diodes D 1 , and when the second forward voltage of the second control voltage Vc 2  is applied to the second control terminals  24   b,  turning on the second PIN diodes D 2 , the first antenna switch  10 A is represented by an equivalent circuit shown in  FIG. 6  wherein only the reception terminal  18  is connected to the antenna connection terminal  12  at high frequencies. A reception signal Sb received by the antenna is thus supplied to the antenna connection terminal  12  and output from the reception terminal  18 . In other words, the first signal line  34   a  from the transmission terminal  14  to the antenna connection terminal  12  serves as a signal cutoff side, and the second signal line  34   b  from the reception terminal  18  to the antenna connection terminal  12  serves as a signal transmission side. 
         [0079]    If the first parallel resonant circuit  28   a  is dispensed with and only the first PIN diode D 1  is connected, then the first switch circuit  20   a  is not represented by the equivalent circuit shown in  FIG. 3B  in the vicinity of the central frequency fo when the first PIN diode D 1  is turned off, but the parasitic capacitance Cf remains, as shown in  FIG. 2B , shifting the resonant frequency into a low frequency range. As a result, the phase characteristic of the first λ/4 transmission line  22   a  suffers an error, thereby causing a loss. 
         [0080]    With the first antenna switch  10 A, each of the constants of the eleventh inductors L 11  of the first parallel resonant circuits  28   a  is adjusted to equalize the resonant frequencies of the first parallel resonant circuits  28   a  at the time the first PIN diodes D 1  are turned off with the central frequency fo of the first antenna switch  10 A. Similarly, each of the constants of the twenty-first inductors L 21  of the second parallel resonant circuits  28   b  is adjusted to equalize the resonant frequencies of the second parallel resonant circuits  28   b  at the time the second PIN diodes D 2  are turned off with the central frequency fo of the first antenna switch  10 A. 
         [0081]    Since the ON resistance Ro of the PIN diode is expressed as Ro&lt;&lt;2πfoLa, only the ON resistance Ro is connected to GND of the first λ/4 transmission line  22   a  when the first PIN diode D 1  is turned on, and only the parallel resistance Rf is connected to GND of the first λ/4 transmission line  22   a  when the first PIN diode D 1  is turned off, for example, as shown in  FIGS. 3A and 3B . Consequently, the resonant frequencies of the first λ/4 transmission line  22   a  at the time the first PIN diode D 1  is turned on and off do not deviate from each other. 
         [0082]    With the first antenna switch  10 A, therefore, the phase characteristics of the first λ/4 transmission line  22   a  and the second λ/4 transmission line  22   b  do not suffer an error, and the passband at the time the switch circuits are turned on and the isolation band at the time the switch circuits are turned off are held in conformity with each other. In other words, the first antenna switch  10 A is capable of appropriately minimizing the insertion loss caused when the switch circuits are turned on and maximizing the isolation provided when the switch circuits are turned off in a band that is used by the antenna switch. As a result, the loss of a transmission signal caused in the switch circuits is reduced, and an appropriate amount of attenuation at the time the switch circuits are turned off is secured. 
         [0083]    Further, in the first antenna switch  10 A, since all of the bias voltage Vcc, the first control voltage Vc 1 , and the second control voltage Vc 2  can be set to positive voltages or negative voltages, it is not necessary to use both of a positive power supply and a negative power supply. Thus, a single power supply (positive power supply or negative power supply) is sufficient. When the first PIN diodes D 1  and the second PIN diodes D 2  are reversely biased, the junction capacitance can be small. Further, it is possible to avoid the increase in the number of parts used in the first antenna switch  10 A, and the structural complexity of the circuit configuration thereof. 
         [0084]    Further, in the first antenna switch  10 A, to the cathode of each of the first PIN diodes D 1  and the second PIN diodes D 2 , one end of each of the λ/4 resonant elements  26  (or λ/4 resonant lines) is connected, and the other end thereof is a free end (infinite resistance). Accordingly, the following advantages can be obtained. 
         [0085]    For example, instead of the λ/4 resonant element  26  (or λ/4 resonant line), it is conceivable that a capacitor Cx may be connected between the cathode of each of the first PIN diodes D 1  and the second PIN diodes D 2  and GND (ground), as shown in  FIG. 20  illustrating an antenna switch  200  according to a comparative example. Due to Q factor or a parasitic capacitance of the capacitor Cx, a sufficiently-low impedance cannot be achieved, so that it is difficult to ground the cathode of each of the first PIN diodes D 1  and the second PIN diodes D 2  at high frequencies. 
         [0086]    In the first antenna switch  10 A, to the cathode of each of the first PIN diodes D 1  and the second PIN diodes D 2 , one end of each of the λ/4 resonant elements  26  (or λ/4 resonant lines) is connected, and the other end thereof is a free end. By this impedance changing function, a sufficiently-low impedance can be achieved, so that it is possible to ground the cathode of each of the first PIN diodes D 1  and the second PIN diodes D 2  at high frequencies. 
         [0087]    In the above embodiment, the first parallel resonant circuit  28   a  is provided in the first switch circuit  20   a,  and the second parallel resonant circuit  28   b  is provided in the second switch circuit  20   b.  Alternatively, the first parallel resonant circuit  28   a  and the second parallel resonant circuit  28   b  may be dispensed with. Then, the cathodes of the first PIN diodes D 1  may be connected to the respective first control terminals  24   a,  and the cathodes of the second PIN diodes D 2  may be connected to the respective second control terminals  24   b.  Then, it is possible to simplify circuit configuration. 
         [0088]    Next, several antenna switches according to various modified examples of the first antenna switch  10 A will be described below with reference to  FIGS. 7 to 16 . 
         [0089]    As shown in  FIG. 7 , an antenna switch  10 Aa according to a first modified example is of a configuration substantially similar to the first antenna switch  10 A described above, but is different in a configuration as follows. In each of first switch circuits  20   a,  a plurality of parallel first PIN diodes D 1  are connected, and in each of second switch circuits  20   b,  a plurality of parallel second PIN diodes D 2  are connected. 
         [0090]    In this case, also, each of the constants of the eleventh inductors L 11  of the first parallel resonant circuits  28   a  is adjusted to equalize the resonant frequencies of the first parallel resonant circuits  28   a  at the time the first PIN diodes D 1  are turned off with the central frequency of the antenna switch  10 Aa. 
         [0091]    Similarly, each of the constants of the twenty-first inductors L 21  of the second parallel resonant circuits  28   b  is adjusted to equalize the resonant frequencies of the second parallel resonant circuits  28   b  at the time the second PIN diodes D 2  are turned off with the central frequency of the antenna switch  10 Aa. 
         [0092]    When the first switch circuit  20   a  is turned on, i.e., when all the first PIN diodes D 1  are turned on, the resistance between the first λ/4 transmission line  22   a  and GND is represented by a resistance which is lower than one ON resistance. As can be understood from the equation (e) above, the impedance at the end on the first signal line  34   a  side of the first λ/4 transmission line  22   a  is an impedance higher than with one ON resistance. The switch circuits thus approach an ideal open state. 
         [0093]    Conversely, when the first switch circuit  20   a  is turned off, i.e., when all the first PIN diodes D 1  are turned off, only parallel resistances, which are high, are connected between the first λ/4 transmission line  22   a  and GND. As can be understood from the equation (e) above, the impedance at the end on the first signal line  34   a  side of the first λ/4 transmission line  22   a  is a low impedance depending on the high resistance. In other words, the insertion loss of the switch circuits upon signal transmission can further be reduced. 
         [0094]    Next, an antenna switch  10 Ab according to a second modified example will be described below with reference to  FIGS. 8 and 9 . 
         [0095]    The antenna switch  10 Ab as shown in  FIG. 8  is of a configuration substantially similar to the first antenna switch  10 A described above, but is different in that the antenna switch  10 Ab comprises a directional coupler  36  having a first λ/4 signal transmission line  16   a  as a component thereof. The directional coupler  36  detects a reflected wave of a transmission signal. 
         [0096]    The directional coupler  36  comprises the above-mentioned first λ/4 signal transmission line  16   a,  a λ/4 line  38  disposed so as to face the first λ/4 signal transmission line  16   a,  a reflected wave output terminal  40  connected to one end of the λ/4 line  38 , and a terminating resistor  42  connected to the other end of the λ/4 line  38 . Another end of the terminating resistor  42  is grounded. 
         [0097]    The principles of operation of the directional coupler  36  will be described below with reference to  FIG. 9 . First, a first end φ1 to a fourth end φ4 of the directional coupler  36  will be defined as follows. The first end φ1 refers to an end of the first λ/4 signal transmission line  16   a  on the side of the transmission terminal  14 , the second end φ2 refers to an end of the first λ/4 signal transmission line  16   a  on the side of the antenna connection terminal  12 , the third end φ3 refers to an end of the λ/4 line  38  on the side of the transmission terminal  14 , and the fourth end φ4 refers to an end of the λ/4 line  38  on the side of the antenna connection terminal  12 . 
         [0098]    When a travelling wave electric power Pa by a transmission signal from the transmission terminal  14  is applied to the first end φ1 of the directional coupler  36 , a travelling wave is produced at the second end φ2, and also an electric wave (signal) is produced at the third end φ3, having an electric power dPa in proportion to the travelling wave electric power Pa. The wave is reflected at an antenna, and a reflected wave electric power Pb is applied to the second end φ2 of the directional coupler  36 . Then, a reflected wave is produced at the first end φ1, and also an electric wave (signal) is produced at the fourth end φ4, having an electric power dPb in proportion to the reflected wave electric power Pb. In other words, a signal in proportion to the reflected wave electric power Pb is output from the reflected wave output terminal  40  that is connected to the fourth end φ4 of the directional coupler  36 . Accordingly, the reflected wave can be detected. 
         [0099]    Thus, when an output transmission signal is reflected at an antenna, a signal in proportion to a reflected wave can be read out at the reflected wave output terminal  40  of the directional coupler  36 , so that the reflected wave can be detected. In this case, it is only necessary that the λ/4 line  38  is disposed so as to face the first λ/4 signal transmission line  16   a.  Therefore, a reflected wave of a transmission signal can be detected without increasing the number of parts used. 
         [0100]    Thus, since the antenna switch  10 Ab according to the second modified example can detect a reflected wave of a transmission signal even with a single antenna switch, it is possible to enhance the reduction in the number of parts used for a transmission system or a transceiving system with a reflected wave detection function, and the reduction in size thereof. Also, it is further possible to enhance the reduction in a production cost and in a transmission loss. 
         [0101]    Next, as shown in  FIG. 10 , an antenna switch  10 Ac according to a third modified example is of a configuration substantially similar to the antenna switch  10 Ab according to the second modified example described above, but is different in a configuration of a directional coupler  36  as follows: 
         [0102]    The directional coupler  36  comprises the first λ/4 signal transmission line  16   a,  and the λ/4 line  38  disposed so as to face the first λ/4 signal transmission line  16   a.  The third end φ3 (an end of the λ/4 line  38  on the side of the transmission terminal  14 ) is connected to a travelling wave output terminal  44 , and the fourth end φ4 (an end of the λ/4 line  38  on the side of the antenna connection terminal  12 ) is connected to the reflected wave output terminal  40 . 
         [0103]    Thus, a signal in proportion to the travelling wave electric power Pa (see  FIG. 9 ) is output from the travelling wave output terminal  44  connected to the third end φ3 of the directional coupler  36 . Also, a signal in proportion to the reflected wave electric power Pb is output from the reflected wave output terminal  40  connected to the fourth end φ4 of the directional coupler  36 . Therefore, a reflected wave and a travelling wave of a transmission signal can be detected. 
         [0104]    As shown in  FIG. 11 , an antenna switch  10 Ad according to a fourth modified example is of a configuration substantially similar to the antenna switch  10 Ab according to the second modified example described above, but is different therefrom as follows: 
         [0105]    A first directional coupler  36   a  and a second directional coupler  36   b  are included. The first directional coupler  36   a  has the first λ/4 signal transmission line  16   a,  which is for example close to the antenna connection terminal  12 , as a component thereof, for detecting a reflected wave of a transmission signal. The second directional coupler  36   b  has the first λ/4 signal transmission line  16   a,  which is close to the transmission terminal  14 , as a component thereof, for detecting a travelling wave of a transmission signal. 
         [0106]    The first directional coupler  36   a  comprises the above-mentioned first λ/4 signal transmission line  16   a,  a first λ/4 line  38   a  disposed so as to face the first λ/4 signal transmission line  16   a,  a reflected wave output terminal  40  connected to one end (fourth end φ4) of the first λ/4 line  38   a,  and a first terminating resistor  42   a  connected to the other end (third end φ3) of the first λ/4 line  38 . 
         [0107]    The second directional coupler  36   b  comprises the above-mentioned first λ/4 signal transmission line  16   a,  a second λ/4 line  38   b  disposed so as to face the first λ/4 signal transmission line  16   a,  a travelling wave output terminal  44  connected to one end (third end φ3) of the second λ/4 line  38   b,  and a second terminating resistor  42   b  connected to the other end (fourth end φ4) of the second λ/4 line  38   b.  Other ends of the first terminating resistor  42   a  and the second terminating resistor  42   b  are grounded. 
         [0108]    In this case, a signal in proportion to the travelling wave electric power Pa (see  FIG. 9 ) is output from the travelling wave output terminal  44  connected to the third end φ3 of the second directional coupler  36   b.  Also, a signal in proportion to the reflected wave electric power Pb is output from the reflected wave output terminal  40  connected to the fourth end φ4 of the first directional coupler  36   a.  Therefore, a reflected wave and a travelling wave of a transmission signal can be detected. 
         [0109]    Further, even if the characteristics of a monitor circuit (reflected wave detection circuit) connected to the reflected wave output terminal  40  and the characteristics of a monitor circuit (travelling wave detection circuit) connected to the travelling wave output terminal  44  are different from each other, each of the output characteristics of the first directional coupler  36   a  and the second directional coupler  36   b  can be set independently to be in accordance with the characteristics of each of the monitor circuits. Therefore, the directional couplers can be designed more freely. 
         [0110]    An antenna switch  10 Ae according to a fifth modified example will be described below with reference to  FIG. 12 . 
         [0111]    As shown in  FIG. 12 , the antenna switch  10 Ae is of a configuration substantially similar to the first antenna switch  10 A described above, but is different therefrom in that a resistor Rr for forming a reception terminating resistance is connected parallel to the twenty-first inductor L 21  of the second switch circuit  20   b  which is adjacent to the reception terminal  18 . 
         [0112]    Operation of the second switch circuit  20   b  will primarily be described below. In the second switch circuit  20   b,  when the second forward voltage of the first control voltage Vc 2  is applied to the second control terminal  24   b,  the second PIN diode D 2  is turned on. At this time, the second switch circuit  20   b  is represented by an equivalent circuit shown in  FIG. 13A . Specifically, a circuit comprising an inductance La, an ON resistance Ro of the second PIN diode D 2 , and the resistor Rr for forming a reception terminating resistance which are connected parallel to each other is connected in series between the second λ/4 transmission line  22   b  and GND. 
         [0113]    Conversely, when the second reverse voltage of the second control voltage Vc 2  is applied to the second control terminal  24   b,  the second PIN diode D 2  is turned off. At this time, the second switch circuit  20   b  is represented by an equivalent circuit shown in  FIG. 13B . Specifically, a parallel resonant circuit comprising an inductance La, a parasitic capacitance Cf due to the depletion layer of the second PIN diode D 2 , a parallel resistance Rf of the fourth PIN diode D 2 , and the resistor Rr for forming a reception terminating resistance which are connected parallel to each other is connected in series between the second λ/4 transmission line  22   b  and GND. 
         [0114]    In this case, also, the inductance La also has a value established such that the central frequency fo of the antenna switch  10 Ae and the resonant frequency of the parallel resonant circuit that is made up of the parasitic capacitance Cf, the parallel resistance Rf, and the inductance La are in agreement with each other. 
         [0115]    As described above, the second switch circuit  20   b  is of a configuration including the parallel-connected resistor Rr for forming a reception terminating resistance. Since the ON resistance Ro and the resistor Rr have a magnitude relationship of Ro&lt;&lt;Rr, the resistor Rr does not affect the operation of the second switch circuit  20   b  when the second PIN diode D 2  is turned on. Since the parallel resistance Rf and the resistor Rr have a magnitude relationship of Rf&gt;&gt;Rr, the impedance on the signal line side is determined by the resistor Rr. 
         [0116]    Specifically, if the characteristic impedance of the second λ/4 transmission line  22   b  is of 50 ohms and the resistor Rr for forming a reception terminating resistance is of 50 ohms, then the combined resistance (Rf//Rr) of the parallel resistance Rf (e.g., 10 k ohms) and the resistor Rr is of 49.751 ohms. The impedance of the second λ/4 transmission line  22   b  on the signal line side is terminated with 50×50/49.751=50.250 ohms according to the equation (e) (the terminating resistance is of 50.250 ohms). Actually, the value of the resistor Rr is determined so that the terminating resistance is of 50 ohms, for example. 
         [0117]    When the second PIN diode D 2  is turned on, if the ON resistance Ro=1 ohm, then since the combined resistance (Ro//Rr) of the ON resistance Ro and the resistor Rr is of 0.9804 ohm, the impedance of the second λ/4 transmission line  22   b  on the signal line side is of 50×50/0.9804=2550 ohms according to the equation (e). 
         [0118]    Therefore, when the first forward voltage of the first control voltage Vc 1  is applied to the first control terminals  24   a,  turning on the first PIN diodes D 1 , and the second reverse voltage of the second control voltage Vc 2  is applied to the second control terminals  24   b,  turning off the second PIN diodes D 2 , the antenna switch  10 Ae is represented by an equivalent circuit shown in  FIG. 14  wherein only the transmission terminal  14  is connected to the antenna connection terminal  12  at high frequencies, and a terminating resistor Re of 50 ohms, for example, is connected to the reception terminal  18 . A transmission signal Sa supplied to the transmission terminal  14  is thus transmitted via the antenna connection terminal  12 . In other words, the first signal line  34   a  from the transmission terminal  14  to the antenna connection terminal  12  serves as a signal transmission side, and the second signal line  34   b  from the reception terminal  18  to the antenna connection terminal  12  serves as a signal cutoff side. 
         [0119]    If the resistor Rr for forming a reception terminating resistance were not present, then the impedance of the second λ/4 transmission line  22   b  on the signal line side would be of a small value, and the signal line is ideally in a short-circuited state, as described above. In other words, since the impedance on the receiver side when the switch is turned off is of 0 ohm, resulting in total reflection, the reception amplifier connected to the reception terminal  18  may become unstable in operation. 
         [0120]    Inasmuch as the antenna switch  10 Ae according to the fifth modified example includes a resistor Rr for forming a reception terminating resistance is connected parallel to the twenty-first inductor L 21  of the second switch circuit  20   b  which is adjacent to the reception terminal  18 , as mentioned above, the impedance on the receiver side when the switch is turned off is of the value of the terminating resistor Re, e.g., 50 ohms, thereby allowing the antenna switch  10 Ae to achieve impedance matching with other circuits. Therefore, the reception amplifier connected to the reception terminal  18  is rendered stable in operation. 
         [0121]    Conversely, when the first reverse voltage of the first control voltage Vc 1  is applied to the first control terminals  24   a,  turning off the first PIN diodes D 1 , and the second forward voltage of the second control voltage Vc 2  is applied to the second control terminals  24   b,  turning on the second PIN diodes D 2 , the antenna switch  10 Ae is represented by the equivalent circuit shown in  FIG. 6  wherein only the reception terminal  18  is connected to the antenna connection terminal  12  at high frequencies, and a reception signal Sb received by the antenna is thus supplied to the antenna connection terminal  12  and output from the reception terminal  18 . In other words, the first signal line  34   a  from the transmission terminal  14  to the antenna connection terminal  12  serves as a signal cutoff side, and the second signal line  34   b  from the reception terminal  18  to the antenna connection terminal  12  serves as a signal transmission side. Therefore, the resistor Rr does not affect reception of the signal. 
         [0122]    Next, as shown in  FIG. 15 , an antenna switch  10 Af according to a sixth modified example is of a configuration which is substantially similar to the antenna switch  10 Ae according to the fifth modified example described above, but is different therefrom in that a resistor Rt for forming a transmission terminating resistance is connected parallel to the eleventh inductor L 11  of the first switch circuit  20   a  which is adjacent to the transmission terminal  14 . 
         [0123]    Therefore, when the first forward voltage of the first control voltage Vc 1  is applied to the first control terminals  24   a,  turning on the first PIN diodes D 1 , and the second reverse voltage of the second control voltage Vc 2  is applied to the second control terminals  24   b,  turning off the second PIN diodes D 2 , the antenna switch  10 Af is represented by the equivalent circuit shown in  FIG. 14  wherein only the transmission terminal  14  is connected to the antenna connection terminal  12  at high frequencies, and a terminating resistor Re of 50 ohms, for example, is connected to the reception terminal  18 . In this case, the impedance on the receiver side when the switch is turned off is of the value of the terminating resistor Re, e.g., 50 ohms, thereby allowing the antenna switch  10 Af to achieve impedance matching with other circuits. Therefore, the reception amplifier connected to the reception terminal  18  is rendered stable in operation. 
         [0124]    Conversely, when the first reverse voltage of the first control voltage Vc 1  is applied to the first control terminals  24   a,  turning off the first PIN diodes D 1 , and the second forward voltage of the second control voltage Vc 2  is applied to the second control terminals  24   b,  turning on the second PIN diodes D 2 , the antenna switch  10 Af is represented by an equivalent circuit shown in  FIG. 16  wherein only the reception terminal  18  is connected to the antenna connection terminal  12  at high frequencies, and a terminating resistor Re of, for example, 50 ohms is connected to the transmission terminal  14 . In this case, the impedance on the transmitter side when the switch is turned off is of the value of the terminating resistor Re, e.g., 50 ohms, thereby allowing the antenna switch  10 Af to achieve impedance matching with other circuits. 
         [0125]    An antenna switch according to a second embodiment (hereinafter referred to as a second antenna switch  10 B) will be described below with reference to  FIG. 17 . 
         [0126]    As shown in  FIG. 17 , the second antenna switch  10 B is of a configuration substantially similar to the first antenna switch  10 A described above, but is different in that the bias voltage Vcc is applied to the cathodes of the first PIN diodes D 1  and the cathodes of the second PIN diodes D 2 . 
         [0127]    The second antenna switch  10 B comprises capacitors Ca through Cd are connected respectively between the transmission terminal  14  and the first λ/4 signal transmission line  16   a  adjacent to the transmission terminal  14 , between the antenna connection terminal  12  and the first λ/4 signal transmission line  16   a  adjacent to the antenna connection terminal  12 , between the antenna connection terminal  12  and the second λ/4 signal transmission line  16   b  adjacent to the antenna connection terminal  12 , and between the reception terminal  18  and the second λ/4 signal transmission line  16   b  adjacent to the reception terminal  18 . The capacitors Ca through Cd are capacitors for blocking currents for turning on and off PIN diodes to be described later, or blocking direct currents supplied via the bias terminal  32  and operate as a short circuit at high frequencies. 
         [0128]    In the two first switch circuits  20   a,  the first switch circuit  20   a  that is close to the antenna connection terminal  12  is connected to a first control circuit  46   a.  In the two second switch circuits  20   b,  the second switch circuit  20   b  that is close to the antenna connection terminal  12  is connected to a second control circuit  46   b.    
         [0129]    The first control circuit  46   a  is a circuit for applying the first control voltage Vc 1  to the respective anodes of the first PIN diodes D 1  of the first switch circuits  20   a.  In this embodiment, the first control circuit  46   a  comprises a series-connected circuit of a forty-first inductor L 41  and a forty-first capacitor C 41  which are connected between a junction between the eleventh inductor L 11  and the eleventh capacitor C 11  of the first switch circuit  20   a  and GND (ground), and the first control terminal  24   a  connected to a junction between the forty-first inductor L 41  and the forty-first capacitor C 41 . The forty-first capacitor C 41  operates as a capacitor for blocking direct currents supplied via the first control terminal  24   a.  The forty-first inductor L 41  operates as a choke coil for supplying the direct currents that are supplied to the first control terminal  24   a  to the respective anodes of the first PIN diodes D 1 . Accordingly, by applying the first control voltage Vc 1  to the first control terminal  24   a,  the first control voltage Vc 1  is applied to the respective anodes of the first PIN diodes D 1 . 
         [0130]    To the cathode of the first PIN diode D 1 , one end of a λ/4 resonant element  26  (or λ/4 resonant line) is connected, and the other end thereof is a free end (infinite resistance). By this impedance changing function, the cathode side of each of the first PIN diodes D 1  is grounded at high frequencies. Thus, a combined circuit made up of the first PIN diode D 1  and the series-connected circuit of the eleventh inductor L 11  and the eleventh capacitor C 11  configures a first parallel resonant circuit  18   a.    
         [0131]    Similarly, the second control circuit  46   b  is a circuit for applying the second control voltage Vc 2  to the respective anodes of the second PIN diodes D 2  of the second switch circuits  20   b.  In this embodiment, the second control circuit  46   b  comprises a series-connected circuit of a forty-second inductor L 42  and a forty-second capacitor C 42  which are connected between a junction between the twenty-first inductor L 21  and the twenty-first capacitor C 21  of the second switch circuit  20   b  and GND (ground), and the second control terminal  24   b  connected to a junction between the forty-second inductor L 42  and the forty-second capacitor C 42 . The forty-second capacitor C 42  operates as a capacitor for blocking direct currents supplied via the second control terminal  24   b.  The forty-second inductor L 42  operates as a choke coil for supplying the direct currents that are supplied to the second control terminal  24   b  to the respective anodes of the second PIN diodes D 2 . Accordingly, by applying the second control voltage Vc 2  to the second control terminal  24   b,  the second control voltage Vc 2  is applied to the respective anodes of the second PIN diodes D 2 . 
         [0132]    To the cathode of each of the second PIN diodes D 2 , one end of a λ/4 resonant element  26  (or λ/4 resonant line) is connected, and the other end thereof is a free end (infinite resistance). Thus, the cathode side of each of the second PIN diodes D 2  is grounded at high frequencies. Therefore, a combined circuit made up of the second PIN diode D 2  and the series-connected circuit of the twenty-first inductor L 21  and the twenty-first capacitor C 21  configures a second parallel resonant circuit  18   b.    
         [0133]    A terminal connected to the junction between the twelfth inductor L 12  and the twelfth capacitor C 12  of each of the first switch circuits  20   a  is the bias terminal  32 , and also a terminal connected to the junction between the twenty-second inductor L 22  and the twenty-second capacitor C 22  of each of the second switch circuits  20   b  is the bias terminal  32 . When the bias voltage Vcc is applied to each of the bias terminals  32 , the bias voltage Vcc is applied to the respective cathodes of the first PIN diodes D 1  and the second PIN diodes D 2 . 
         [0134]    In the second antenna switch  10 B, the bias voltage Vcc is applied to the respective cathodes of the first PIN diodes D 1  and the second PIN diodes D 2 , the first control voltage Vc 1  is applied to the respective anodes of the first PIN diodes D 1 , and the second control voltage Vc 2  is applied to the respective anodes of the second PIN diodes D 2 . Accordingly, the first switch circuits  20   a  are turned on and the second switch circuits  20   b  are turned off when the bias voltage Vcc, the first control voltage Vc 1 , and the second control voltage Vc 2  have a magnitude relationship of: 
         [0000]      0 V&lt;Vc2&lt;Vcc&lt;Vc1 or 0 V&gt;Vc1&gt;Vcc&gt;Vc2 
         [0135]    Conversely, the first switch circuits  20   a  are turned off and the second switch circuits  20   b  are turned on when the bias voltage Vcc, the first control voltage Vc 1 , and the second control voltage Vc 2  have a magnitude relationship of: 
         [0000]      0 V&lt;Vc1&lt;Vcc&lt;Vc2 or 0 V&gt;Vc2&gt;Vcc&gt;Vc1 
         [0136]    In other words, when the relationship of 0 V&lt;Vcc&lt;Vc 1  or 0 V&gt;Vc 1 &gt;Vcc is established as to the first control voltage Vc 1 , the first control voltage Vc 1  is called as a first forward voltage. Also, when the relationship of 0 V&lt;Vcc&lt;Vc 2  or 0 V&gt;Vc 2 &gt;Vcc is established as to the second control voltage Vc 2 , the second control voltage Vc 2  is called as a second forward voltage. Similarly, when the relationship of 0 V&lt;Vc 1 &lt;Vcc or 0 V&gt;Vcc&gt;Vc 1  is established as to the first control voltage Vc 1 , the first control voltage Vc 1  is called as a first reverse voltage. Also, when the relationship of 0 V&lt;Vc 2 &lt;Vcc or 0 V&gt;Vcc&gt;Vc 2  is established as to the second control voltage Vc 2 , the second control voltage Vc 2  is called as a second reverse voltage. 
         [0137]    As with the first antenna switch  10 A, the second antenna switch  10 B is also capable of appropriately minimizing the insertion loss caused when the switch circuits are turned on and maximizing the isolation provided when the switch circuits are turned off in a band that is used by the antenna switch. As a result, the loss of a transmission signal caused in the switch circuits is reduced, and an appropriate amount of attenuation at the time the switch circuits are turned off is secured. 
         [0138]    Further, in the second antenna switch  10 B, since all of the bias voltage Vcc, the first control voltage Vc 1 , and the second control voltage Vc 2  can be set to positive voltages or negative voltages, it is not necessary to use both of a positive power supply and a negative power supply. Thus, a single power supply (positive power supply or negative power supply) is sufficient. When the PIN diodes are reversely biased, the junction capacitance can be small. Further, it is possible to avoid the increase in the number of parts used in the second antenna switch  10 B, and the structural complexity of the circuit configuration thereof. Also, the switching speed is not reduced. 
         [0139]    Further, it is also possible for the second antenna switch  10 B to employ similar configurations of the antenna switches  10 Aa to  10 Af according to the first to sixth modified examples. 
         [0140]    In the embodiments as described above, though the first and second λ/4 signal transmission lines  16   a,    16   b  are used, which are advantageous particularly to reduction in size for various signal transmission lines, 3λ/4 signal transmission lines etc. may be used instead. Also, though the embodiments described above use the first and second λ/4 transmission lines  22   a,    22   b  are used, which are advantageous particularly to reduction in size for various transmission lines, 3λ/4 signal lines etc. may be used instead. Further, though the λ/4 resonant elements  26  (or λ/4 resonant lines) are used, which are advantageous particularly to reduction in size for various resonant elements or resonant lines, 3λ/4 resonant elements (or 3λ/4 resonant lines) etc. may be used instead. 
         [0141]    The high frequency switch according to the present invention is not limited to the above embodiments, but may adopt various configurations without departing from the scope of the invention.