Abstract:
A device for detecting ionizing radiation results in charges forming in a sensor covered with a plurality of electrodes that are each connected to an electronic circuit adapted to deliver, to a processing module, a first signal indicating when charge has been collected by the electrode connected to said circuit. Each central circuit is adapted, when a central electrode has collected charge, to determine a possible detection overlap with one of the adjacent electrodes; to determine a priority detection overlap with an adjacent priority circuit; to transmit or receive to/from the adjacent priority circuit a request to participate in a detection overlap and to receive or transmit from/to the adjacent priority circuit an indication of availability; and to transmit said first signal except in the case where an availability indication has been transmitted to the adjacent priority circuit.

Description:
BACKGROUND 
       [0001]    The present invention relates to an ionizing radiation detection method and to a device using a semiconductor detector. 
       STATE OF THE ART 
       [0002]    In an ionizing radiation detection device using a detector made of a semiconductor material, photons cause the forming of charges in the semiconductor material, which are collected by electrodes, distributed on a surface of the detector. Each electrode is connected to a read circuit, which generally outputs at least two signals based on the charges collected by the electrode: a binary signal which is representative of the detection of a photon and an analog signal representative of the energy level of the detected photon. The signals are transmitted to a computer which may, based on the number of detected photons and on their energy levels, determine certain properties of the object or of the living organism crossed by the ionizing radiation. 
         [0003]    In certain cases, the charges created by a photon may distribute between two adjacent electrodes. Such a phenomenon is called charge sharing. Each read circuit connected to one of these electrodes then indicates that it has detected a photon and provides an energy level according to the quantity of charges collected by the associated electrode. It is thus necessary to provide correction means to avoid counting too high a number of photons and to assign a proper energy level to each detected photon. Correction methods are generally implemented by the computer, which analyzes the signals output by the read circuits. 
         [0004]    It would however be desirable for the correction steps to be directly carried out at the level of the read circuits. 
       SUMMARY 
       [0005]    An object of an embodiment of the present invention is to provide a detection method and device overcoming all or part of the disadvantages of prior art. 
         [0006]    Another object of an embodiment of the present invention is to provide an ionizing radiation detection method and device using a detector made of a semiconductor material where the correction of the detection of charge sharing phenomena is directly performed at the level of the read circuits. 
         [0007]    Another object of an embodiment of the present invention is for the read circuits to be identical electronic circuits. 
         [0008]    Another object of an embodiment of the present invention is not to disturb the operation of the read circuits even if many charge sharing phenomena occur simultaneously. 
         [0009]    To achieve this, an embodiment provides a device for detecting an ionizing radiation comprising a sensor wherein the ionizing radiation causes the forming of charges, the sensor being covered with a plurality of electrodes, each connected to an electronic circuit capable of supplying a processing unit with a first signal indicating that charges are being collected by the electrode connected to said electronic circuit; 
         [0010]    wherein at least one electrode, called central electrode, is surrounded with at least two electrodes, called adjacent electrodes, the circuit connected to the central electrode, called central circuit, being capable of exchanging signals with each of the circuits connected to the adjacent electrodes, called adjacent circuits; 
         [0011]    wherein each central or adjacent circuit is capable of respectively sending to the adjacent or central circuit a second detection signal when charges are being respectively collected on the central electrode or an adjacent electrode; 
         [0012]    wherein each central or adjacent circuit is capable of respectively sending to the adjacent or central circuit a request to participate in a detection overlap and respectively receiving from the adjacent or central circuit an availability indication; 
         [0013]    wherein each central circuit comprises an analysis and control device, capable of, when the central electrode has collected charges:
       (a) determining, within a time range, a possible detection overlap between the central electrode and at least one of the adjacent electrodes based on the detection signals;   (b) in the case of a detection overlap, determining a first priority detection overlap with an adjacent circuit, called priority circuit, for which the second detection signals of the priority adjacent circuit and of the central circuit have the highest probability of corresponding to a same received photon;   (c) transmitting to or receiving from the priority adjacent circuit a request to participate in a detection overlap and receiving from or transmitting to the priority adjacent circuit an availability indication; and   (d) transmitting said first signal to the processing unit except in the case where a detection overlap has been determined within said time range and where an availability indication has been sent to the priority adjacent circuit.       
 
         [0018]    According to an embodiment, the analysis and control device of each central circuit is capable, in the case of the determination of at least two detection overlaps, of determining the priority adjacent circuit from among the adjacent circuits having taken part in the detection overlaps. 
         [0019]    According to an embodiment, each circuit is capable of transmitting to the processing unit a third signal representative of the energy of the ionizing radiation having caused the forming of the charges collected by the electrode connected to said circuit, the analysis and control device of each central circuit being capable of supplying the processing unit, if said priority adjacent circuit accepts the participation request, with the third signal from the central circuit increased by the third signal from the priority adjacent circuit. 
         [0020]    According to an embodiment, the analysis and control device of each central circuit is capable of transmitting to the priority adjacent circuit the third signal from the central circuit when an availability indication has been sent to the priority adjacent circuit. 
         [0021]    According to an embodiment, at least certain central electrodes are each surrounded with at least four adjacent electrodes. 
         [0022]    According to an embodiment, each electronic circuit is capable of providing a fourth analog signal which transits through an extremum when charges are being collected by the electrode connected to said electronic circuit, the second signal being different from the first signal and being a binary signal which switches state when the fourth signal is greater, in absolute value, than a threshold. 
         [0023]    According to an embodiment, each electronic circuit is capable of outputting the first signal, which has a leading edge subsequent to the trailing edge of the second signal. 
         [0024]    According to an embodiment, the analysis and control device of each central circuit is capable of determining the priority adjacent circuit, which is that of the adjacent circuits connected to adjacent electrodes having collected charges in said time range which outputs the second signal having its leading edge most closely following the leading edge of the second signal output by the central circuit. 
         [0025]    According to an embodiment, each electronic circuit is capable of outputting a fifth binary signal of constant duration, different from the first signal and from the second signal, indicating that charges are being collected by the electrode connected to said electronic circuit, each central circuit being capable of transmitting, to each adjacent circuit, the fifth signal output by the central circuit and of receiving, from each adjacent circuit, the fifth signal output by each adjacent circuit. 
         [0026]    According to an embodiment, the central circuit is capable of determining whether the logical product of the fifth signal output by the central circuit and of the fifth signal output by each adjacent circuit changes value. 
         [0027]    According to an embodiment, each electronic circuit is capable of outputting the fifth signal having its leading edge overlapping the leading edge of the second signal. 
         [0028]    According to an embodiment, the electronic circuits are identical. 
         [0029]    According to an embodiment, the analysis and control device of each central circuit is capable, when the central electrode has collected charges, of determining at least two priority adjacent circuits. 
         [0030]    According to an embodiment, the ionizing radiation causes the forming of charges in a sensor, the sensor being covered with a plurality of electrodes, each connected to an electronic circuit capable of supplying a processing unit with a first signal indicating that charges are being collected by the electrode connected to said electronic circuit, each central circuit comprising an analysis and control device; 
         [0031]    wherein at least one electrode, called central electrode, is surrounded with at least two electrodes, called adjacent electrodes, the circuit connected to the central electrode, called central circuit, being capable of exchanging signals with each of the circuits connected to the adjacent electrodes, called adjacent circuits; 
         [0032]    wherein each central or adjacent circuit is capable of respectively sending to the adjacent or central circuit a second detection signal when charges are respectively collected on the central electrode or an adjacent electrode; 
         [0033]    wherein each central or adjacent circuit is capable of respectively sending to the adjacent or central circuit a request to participate to a detection overlap and respectively receiving from the adjacent or central circuit an availability indication; 
         [0034]    the method comprising, for the analysis and control circuit of each central circuit, when the central electrode has collected charges, the steps of:
       (a) determining, within a time range, a possible detection overlap between the central electrode and at least one of the adjacent electrodes based on the detection signals;   (b) in the case of a detection overlap, determining a first priority detection overlap with an adjacent circuit, called priority circuit, for which the second detection signals of the priority adjacent circuit and of the central circuit have the highest probability of corresponding to a same received photon;   (c) transmitting to or receiving from the priority adjacent circuit a request for taking part in a detection overlap and receiving from or transmitting to the priority adjacent circuit an availability indication; and   (d) transmitting said first signal to the processing unit except in the case where a detection overlap has been determined within said time range and where an availability indication has been sent to the priority adjacent circuit.       
 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0039]    The foregoing and other features and advantages will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings, among which: 
           [0040]    (a)  FIG. 1  partially and schematically shows an example of an ionizing radiation detection device; 
           [0041]    (b)  FIG. 2  schematically shows a portion of a read circuit of the device shown in  FIG. 1 ; 
           [0042]    (c)  FIG. 3  is a timing diagram of signals output by the read circuit of  FIG. 2 ; 
           [0043]    (d)  FIG. 4  schematically shows an embodiment of an ionizing radiation detection device according to the invention; 
           [0044]    (e)  FIG. 5  partially and schematically shows an example of layout of the correction circuits of the device of  FIG. 4 ; 
           [0045]    (f)  FIG. 6  shows, in the form of a block diagram, an embodiment of a correction method according to the invention; 
           [0046]    (g)  FIG. 7  schematically shows an embodiment of a portion of the correction circuit of  FIG. 4 ; 
           [0047]    (h)  FIG. 8  illustrates an example of connection between the correction circuits of two adjacent read circuits; 
           [0048]    (i)  FIG. 9  shows an example of timing diagrams of signals output by a correction circuit on detection of a photon; 
           [0049]    (j)  FIG. 10  shows examples of timing diagrams illustrating an embodiment of a method for determining whether a photon detection overlap is occurring; 
           [0050]    (k)  FIGS. 11 and 12  show examples of timing diagrams of signals output by two adjacent pixel correction circuits during a detection overlap; and 
           [0051]    (l)  FIG. 13  illustrates the signals transmitted and received by an embodiment of the correction circuit. 
           [0052]    For clarity, the same elements have been designated with the same reference numerals in the different drawings. 
       
    
    
     DETAILED DESCRIPTION 
       [0053]    In the following description, binary signal means a signal capable of having two stable states, a first state called low state or ‘0’ and a second called high state or ‘1’. Further, unless otherwise mentioned, a signal is called active when it is at state ‘1’ and inactive when it is at state ‘0’. 
         [0054]      FIG. 1  shows an example of a device  10  for detecting an ionizing radiation  14 , emitted by an ionizing radiation source  16  and having crossed an object or living organism  18 . Device  10  comprises an ionizing radiation sensor  20  made of a semiconductor material, electronic read circuits  22  capable of outputting signals representative of the detection of photons by sensor  20 , and a processing unit  24  receiving the signals output by read circuits  22 . Only two read circuits are shown in  FIG. 1 . 
         [0055]    An example of application of an ionizing radiation detection device is the non-destructive control of materials, the search for hazardous or illegal substances, for example, in luggage. Another application may be medicine and the observation of living organisms. Such ionizing radiation detection devices allow an imaging of the objects or living organisms to be controlled. 
         [0056]    Sensor  20  comprises a wafer  26  of a semiconductor material, preferably single-crystal, of generally parallel epi-pedal shape having two main surfaces  28 ,  30 , generally opposite and parallel. In imaging applications, semiconductor material wafer  26  generally has a thickness in the range from a few hundred micrometers to a few millimeters, or even a few centimeters, and a surface area of a few square centimeters or even of a few tens of square centimeters. 
         [0057]    The semiconductor material may be cadmium zinc telluride (CdZnTe), cadmium telluride (CdTe), mercury iodide (HgI 2 ), gallium arsenide (GaAs), silicon (Si). Ionizing radiation  14  may comprise alpha, beta, X, gamma rays, or even neutrons. Although neutrons do not directly form an ionizing radiation, they induce ionizing radiations by the particles created during their interaction with matter. 
         [0058]    Surface  28  is covered with one or a plurality of electrodes  32  called cathodes and the other surface  30  is covered with one or a plurality of electrodes  34  called anodes. Each electrode  34  is connected to one of read circuits  22 . In operation, ionizing radiations  14  of sufficient energy interact with the semiconductor material to create electron/hole pairs.  FIG. 1  schematically shows by a dotted circle  35  an example of interaction and by a dotted line  36  the travel of electrons all the way to an electrode  34 . Electrodes  32 ,  34  are used to bias wafer  26  to allow the migration of electrons and holes towards electrodes  32 ,  34 . In most previously-mentioned usual semiconductor materials, the potential applied to the anodes, for example, the ground potential, is greater than the potential applied to the cathodes, for example, a negative potential. The electrons are then collected by anodes  34 , which is why the latter are connected to read circuits  22 . Cathodes  32  generally have a role limited to the biasing of wafer  26  and a single cathode may be used, as shown in  FIG. 1 . 
         [0059]    A plurality of anodes  34  having, for example, the shape of pads insulated from one another and arranged in an array, in rows and columns, are generally used. When a bias voltage is applied between cathode  32  and anodes  34 , an electric field appears in the semiconductor material. This electric field drives holes towards cathode  32  and electrons towards anodes  34 . Each anode  34  cooperates with a volume V of semiconductor material opposite thereto, and which is shown by a hatched area in  FIG. 1 . Each volume V corresponds to a pixel of detection device  10 . 
         [0060]    During an interaction of the semiconductor material with an incident ionizing radiation  14 , the electron-type charges generated in volume V of semiconductor material opposite an anode  34  are collected by this anode. These charges collected by an anode induce an electric current pulse. Read circuit  22  comprises a charge preamplifier  37  supplying a signal Amp to a shaping circuit  38  which supplies signals H 1  and Max 1  to processing unit  24 . 
         [0061]      FIG. 2  shows an embodiment of shaping circuit  38  and  FIG. 3  shows timing diagrams illustrating examples of the variation of the signal received and of the signals output by shaping circuit  38 . Times A 0 , A 1 , and A 2  are successive times. 
         [0062]    Shaping circuit  38  receives analog signal Amp output by charge preamplifier  37 . Signal Amp is obtained from the current pulse during the charge collection by electrode  34  connected to read circuit  22 . When charges are being collected by electrode  34 , this causes a variation of signal Amp, which generally comprises a growth phase  40 , the transition through a maximum value  42  at time A 1 , and a decrease phase  44 . 
         [0063]    Shaping circuit  38  comprises an event detection unit  45  (Event Detection) which receives signal Amp and which outputs signal H 1 . Signal H 1  is a binary signal which is in a first state, for example, ‘0’, as long as signal Amp is lower than a threshold and is in a second state, for example, ‘1’, when signal Amp is greater than the threshold. In the example illustrated in  FIG. 3 , binary signal H 1  switches from ‘0’ to ‘1’ at time A 0  and from ‘1’ to ‘0’ at time A 2 . 
         [0064]    Shaping circuit  38  further comprises a maximum detection unit  46  (Max Detection) which receives signal Amp and which outputs an analog signal Max 1 . Analog signal Max 1  follows signal Amp in growth phase  40  and keeps the maximum value of signal Amp after time A 1 . This maximum value is representative of the energy of the ionizing radiation deposited in volume V of semiconductor material opposite anode  34 . 
         [0065]    During the use of ionizing radiation detection device  10  for imaging, an image of object or living organism  18  placed between ionizing radiation source  16  and detection device  10  is desired to be obtained. Ionizing radiation  14  which crosses object or living organism  18  is attenuated at the time when it reaches sensor  20 . The intensity of ionizing radiation  14  which reaches sensor  20  depends on the chemical composition and on the density of the crossed object or living organism  18 . Processing unit  24  may, based on signals H 1  and Max 1 , output an image of the transmission contrast of object or living organism  18 , which enables to acquire information relative to the internal structure of object or living organism  18 . 
         [0066]    To form images of the observed object or living organism  18  with a correct quality, it is necessary to have a large number of pixels and thus a large number of electrodes  34  which are each connected to a read circuit  22 . Now, electrodes  34  appear to collect spurious signals which should be rejected if the desired quality is desired to be obtained. 
         [0067]    Spurious signals may occur in the case of a charge sharing which occurs when the charges formed due to the interaction of a photon with the semiconductor material are collected by two electrodes  34  associated with two neighboring pixels.  FIG. 1  schematically shows by a dotted circle  47  an example of interaction causing a charge sharing and by dotted lines  48  the travel of electrons all the way to two adjacent electrodes  34 . 
         [0068]    Processing unit  24  can, based on an analysis of signals H 1  and Max 1  output by each read circuit  22 , determine whether charge sharing has occurred and, if so, correct the number and the energy level of the detected photons. Indeed, when charges are almost simultaneously detected by two read circuits connected to adjacent pixels, which is called detection overlap hereafter, this mostly corresponds to cases with a single photon having interacted with the semiconductor material, and having caused the forming of electrons collected by two adjacent electrodes. However, this imposes for processing unit  24  to precisely date all event signals H 1  output by read circuits  22  in order to determine whether event signals H 1  output by read circuits  22  of adjacent pixels are simultaneous. When the number of pixels is high, such a dating operation may be difficult to perform at a low cost in real time. 
         [0069]    It would thus be desirable to be able to perform the correction while taking into account charge sharing directly at the level of read circuits  22  associated with the pixels. Processing unit  24  then no longer has to perform the correction operation to take into account charge sharing. Advantageously, processing unit  24  may no longer have to date all the signals which are transmitted thereto by the read circuits. 
         [0070]      FIG. 4  shows an embodiment according to the invention of an ionizing radiation detection device  50 . Device  50  comprises all the elements of device  10  shown in  FIG. 1 . However, read circuit  22  associated with each pixel V further comprises a correction circuit  52  which receives signals H 1  and Max 1  output by shaping circuit  38  and which supplies signals Mx 1  and Hech to processing unit  24 . Signal Hech is a binary signal which is, for example, set to ‘1’ to indicate the detection of an ionizing radiation by the correction circuit. Signal Hech may be set to ‘1’ for a constant time period. Signal Mx 1  is an analog signal representative of the energy of the photon detected by the pixel connected to the correction circuit. Further, each correction circuit  52  associated with a given pixel may exchange signals with correction circuits  52  associated with pixels adjacent to the given pixel. Correction circuit  52  may further receive and output other signals. 
         [0071]      FIG. 5  illustrates an example of connection between correction circuits  52 . As an example, in the case where electrodes  34  are distributed in an array, in rows and columns, correction circuits  52  may be arranged similarly.  FIG. 5  schematically shows an array of nine correction circuits  52  arranged in three rows and three columns. Of course, in practice, the number of rows and of columns is high. As an example, the correction circuit connected to a central electrode surrounded with eight electrodes may exchange signals with the correction circuits connected to the electrodes respectively located to the north, to the south, to the east, and to the west of the central electrode (double arrow  54 ). Each correction circuit  52  further receives signals from shaping circuit  38  (arrow  55 ) and supplies processing circuit  24  with signals (arrow  56 ). In the following description, the correction circuit connected to the central electrode is called central correction circuit and the correction circuits connected to electrodes located to the north, to the south, to the east, and to the west of the central electrode are called adjacent correction circuits. 
         [0072]    Preferably, correction circuits  52  are identical electronic circuits. To achieve this, correction circuits  52  connected to electrodes  34  at the border of the electrode array however receive signals (arrows  57 ) set to an inactive state. 
         [0073]    In the following description, for clarity, for at least certain signals received and transmitted by the central correction circuit, index k capable of being equal to N, S, E or O is added when the signal is exchanged with the adjacent correction circuit connected to electrode  34  respectively located to the north, to the south, to the east, and to the west of the central electrode. 
         [0074]    According to an embodiment of the invention, central correction circuit  52  receives at least signals H k  and Mx k  from each adjacent correction circuit  52  and supplies signals H 1   k  and Mid to each adjacent correction circuit  52 . Signal H 1   k  is identical to signal H 1  received by the central correction circuit. Signal H k  is identical to signal H 1  received by each adjacent correction circuit. Signal Mid is an analog signal which at least partly follows signal Max 1 . 
         [0075]      FIG. 6  illustrates in the form of a block diagram an embodiment of a correction method implemented by central correction circuit  52 . 
         [0076]    At step  100 , central correction circuit  52  detects an ionizing radiation. This for example corresponds to the reception of a signal H 1  transiting through state ‘1’. The method carries on at step  102 . 
         [0077]    At step  102 , central correction circuit  52  determines whether an ionizing radiation has been detected in substantially overlapping fashion by one of the adjacent correction circuits by detecting, in particular, whether one of signals H k  switches state. According to an embodiment of the invention, the central correction circuit considers that a detection overlap with an adjacent correction circuit is occurring if signal H k  switches state within a given time interval before or after the state switching of signal H 1  received by the central correction circuit. 
         [0078]    According to an embodiment of the invention, the central correction circuit takes into account a single detection overlap, called priority detection overlap. If a single detection overlap occurs, this detection overlap is the priority detection overlap. If two or three detection overlaps with adjacent correction circuits occur, the central correction circuit selects the priority detection overlap and ignores the other detection overlaps. 
         [0079]    If there is no detection overlap at step  102 , the method caries on at  104 . If a detection overlap occurs between two adjacent pixels, the method carries on at step  106 . 
         [0080]    At step  104 , the central correction circuit sets signal Hech to ‘1’ to indicate the detection of an ionizing radiation by the central pixel. As an example, the rising edge of signal Hech occurs after the falling edge of signal H 1 . Signal Mx 1  supplied to processing unit  24  while signal Hech is at state ‘1’ is an analog signal having a substantially constant value and corresponding to the maximum value of signal Max 1 . The method carries on at step  100 . 
         [0081]    At step  106 , it is determined which of the two pixels taking part in the priority overlap detection should be assigned the ionizing radiation detection, that is, which of the two correction circuits, between the central correction circuit and the adjacent correction circuit, will transmit signals Hech and Mx 1  to processing unit  24 . If it is determined that the ionizing radiation detection is assigned to the central pixel, the method carries on at step  108 . If it is determined that the ionizing radiation detection is assigned to the adjacent pixel, the method carries on at step  110 . According to an embodiment of the invention, the ionizing radiation detection is assigned to the correction circuit for which signal H 1  switches first to state ‘1’. 
         [0082]    At step  108 , the central correction circuit sends a request to the adjacent correction circuit participating in the priority detection overlap to obtain the value representative of the energy of the photon detected by the adjacent correction circuit. If the request is accepted, the adjacent correction circuit transmits this energy value via signal Mx k . Further, the correction circuit sets signal Hech to ‘1’ to indicate the detection of an ionizing radiation by the central pixel. As an example, the rising edge of signal Hech occurs after the falling edge which occurs last between that of signal H k  and of signal H 1  received by the central correction circuit. 
         [0083]    If the request has been accepted, signal Mx 1  supplied by central correction circuit  52  to processing unit  24  while signal Hech is at state ‘1’ is an analog signal having a substantially constant value and corresponding to the sum of the maximum values of signals Max 1  received by the central and adjacent correction circuits. If the request has been rejected, signal Mx 1  supplied by the central correction circuit to processing unit  24  while signal Hech is at state ‘1’ is an analog signal having a substantially constant value and corresponding to the sum of the maximum value of signals Max 1  received by the central correction circuit only. The method carries on at step  100 . 
         [0084]    At step  110 , the central correction circuit transmits to the adjacent correction circuit participating in the priority detection overlap, via signal Mid, a value representative of the energy of the photon that it has detected. Further, the central correction circuit maintains signal Hech at ‘0’. Processing unit  24  thus considers that there has been no ionizing radiation detection by the central pixel. The method carries on at step  100 . 
         [0085]    According to the embodiment previously described in relation with  FIG. 6 , the signals representative of energy levels Max 1 , Mx 1 , Mid, and Mx k  are analog signals. According to another embodiment, the signals exchanged between the correction circuits and representative of energy levels may be digital signals. According to an example, analog signal Amp output by charge preamplifier  37  is converted into a digital signal AmpNUM and all signals Max 1 , Mx 1 , Mid, and Mx k  representative of energy levels are obtained from signal AmpNUM. According to another example, analog signals Max 1 , Mx 1 , Mid, and Mx k  or some of them may be determined from signal Amp and be converted into digital signals when they have to be exchanged between correction circuits. 
         [0086]    According to the embodiment previously described in relation with  FIG. 6 , the central correction circuit only takes into account a single priority detection overlap among all detection overlaps. According to another embodiment, at step  102 , the central correction circuit may take into account a plurality of detection overlaps, or even all the detection overlaps, called priority detection overlaps, among all the detection overlaps. In this case, at step  106 , it may be determined which of the pixels taking part in the priority detection overlaps should be assigned the ionizing radiation detection, that is, which of the correction circuits, between the central correction circuit and the adjacent correction circuits participating in the priority detection overlaps, will transmit signals Hech and Mx 1  to processing unit  24 . If it is determined that the ionizing radiation detection is assigned to the central pixel, the central correction circuit may send, at step  108 , a request to each adjacent correction circuit taking part in the priority detection overlaps to obtain the value representative of the energy of the photon detected by this adjacent correction circuit. Each adjacent correction circuit accepting the request can transmit this energy value via signal Mx k . If it is determined that the ionizing radiation detection is assigned to one of the adjacent pixels, the central correction circuit may transmit, at step  110 , to the adjacent correction circuit to which the ionizing radiation detection is assigned, a value representative of the energy of the photon that it has detected and the central correction circuit maintains signal Hech at ‘0’. 
         [0087]    According to an embodiment of the invention, the central correction circuit further receives a signal Gn k  from each adjacent correction circuit and supplies each adjacent correction circuit with a signal Gn 1 . Signals Gn k  and Gn 1  are reference potentials or local grounds. 
         [0088]    The fact for the setting to ‘1’ of signal Hech to be performed by a single circuit, the central correction circuit or the adjacent correction circuit, in the case of a overlap of charge detection by two contiguous electrodes, enables to improve the taking into account of detection overlaps by processing unit  24 . Further, the fact that the circuit setting to ‘1’ signal Hech also outputs a signal Mx 1  representative of the sum of the energies detected by two contiguous electrodes enables to still further improve the taking into account of detection overlaps by processing unit  24 . 
         [0089]      FIG. 7  shows an embodiment of a portion of correction circuit  52  corresponding to a circuit  112  outputting signals Mx 1  and Mid capable of being used to carry out steps  104 ,  108 , or  110  of the embodiment of the correction method previously described in relation with  FIG. 6 . 
         [0090]    Circuit  112  comprises a terminal TER 1  receiving signal Max 1 . A switch SW 1  is provided between input terminal TER 1  and a terminal TER 2  outputting signal Mx 1 . A capacitor C 1  is arranged between terminal TER 1  and a terminal TER 3  outputting signal Mid. A switch SW 2  is arranged between terminal TER 3  and a terminal TER 4  outputting signal Gn 1 . The capacitance of capacitor C 1  is for example in the order of 1 pF. 
         [0091]    Switches SW 3   N , SW 3   S , SW 3   E , SW 3   O  connect terminal TER 2  respectively to terminals TER 3   N , TER 3   S , TER 3   E , and TER 3   O , which respectively receive signals Mx N , Mx S , Mx E , and Mx O . Switches SW 4   N , SW 4   S , SW 4   E , SW 4   O  connect terminal TER 3  respectively to terminals TER 4   N , TER 4   S , TER 4   E , and TER 4   O , which respectively receive signals Gn N , Gn S , Gn E , and Gn O . 
         [0092]    Each terminal TER 3   k , where k is equal to N, S, E or O, of the central correction circuit is permanently connected to terminal TER 3  of the considered adjacent correction circuit and terminal TER 3  of the central correction circuit is permanently connected to terminals TER 3   N , TER 3   S , TER 3   E , and TER 3   O  of the adjacent correction circuits. Each terminal TER 4   k , k being equal to N, S, E or O, of the central correction circuit is permanently connected to terminal TER 4  of the considered adjacent correction circuit, and terminal TER 4  of the central correction circuit is permanently connected to terminals TER 4   N , TER 4   S , TER 4   E , and TER 4   O  of the adjacent correction circuits. 
         [0093]    In operation, when switches SW 1  and SW 2  are on, voltage Max 1  is applied across capacitor C 1  and signal Mx 1  follows signal Max 1 . When switch SW 1  is off, signal Max 1  is sampled and the sampled voltage is maintained across capacitor C 1 . When the sampling is performed at the maximum value of voltage Max 1 , the voltage across capacitor C 1  is representative of the energy of the photon detected by the central correction circuit. 
         [0094]      FIG. 8  illustrates two examples of configurations of the switches of circuit  112  capable of being used at previously-described steps  108  and  110  when the central correction circuit and the adjacent correction circuit located East thereof participate in the detection overlap. Symbol ‘is added to the references of the elements of the correction circuit located on the east side to tell them from the central correction circuit. 
         [0095]    So that the central correction circuit can output a signal Mx 1  equal to the sum of the voltages across capacitors C 1  and C 1 ′ (full line), switch SW 3   E ′ is turned on and switch SW 4   E ′ is turned on, the other switches remaining off. So that the adjacent correction circuit located on the east side of the central correction circuit can output a signal Mx 1 ′ equal to the sum of the voltages across capacitors C 1  and C 1 ′ (dotted line), switch SW 3   0  is turned on and switch SW 4   E  is turned on, the other switches remaining off. 
         [0096]    According to an embodiment of the invention, the central correction circuit further receives a signal M k  from each adjacent correction circuit and supplies each adjacent correction circuit with a signal M 1   k . Signals M k  and M 1   k  are binary signals. 
         [0097]      FIG. 9  shows timing diagrams of signals H 1   k  (or H 1 ), Hech, M 1   k , Max 1 , and Mx 1  output by the central correction circuit in the absence of overlap, where k is equal to N, S, E, or O. Times B 0  to B 5  are successive times. 
         [0098]    Signal H 1   k  is a binary signal which starts on its leading edge at time B 0  and ends on its trailing edge at time B 3 . In the example shown in  FIG. 9 , the leading edge of signal H 1   k  is a rising edge and the trailing edge of signal H 1   k  is a falling edge. 
         [0099]    Correction circuit  52  supplies each adjacent correction circuit with a signal M 1   k , where k may be equal to N, S, E, or O. Signal M 1   k  is a binary signal having its leading edge occurring at time B 1  which immediately follows time B 0 . In the following description, it is considered that the leading edge of signal M 1   k  substantially overlaps the leading edge of signal H 1   k . Signal M 1   k  ends at on its trailing edge at time B 2 . The period between times B 0  and B 2  is constant, for example, in the order of 8 ns. 
         [0100]    Signal Max 1  is shown in  FIG. 9  in sinusoidal form to better tell the different phases from one another. Switch SW 1  is turned on at time B 0  and turned off at time B 3 . Signal Mx 1  thus follows signal Max 1  between times B 0  and B 3  and is then maintained at the value of Max 1  sampled at time B 3 . 
         [0101]    Signal Hech is a binary signal which starts on its leading edge at time B 4  and ends on its trailing edge at time B 5 . In the absence of overlap, the leading edge of signal Hech may immediately follow the falling edge of signal H 1   k . In this case, times B 3  and B 4  are almost confounded. 
         [0102]      FIG. 10  illustrates in further detail an embodiment of steps  102  and  106  of the embodiment of the correction method previously described in relation with  FIG. 6 . 
         [0103]    Times C 0  to C 8  are successive times. The lower portion of  FIG. 10  shows signals H 1   k  and M 1   k , k being equal to N, S, E, or O, supplied by the central correction circuit to the adjacent correction circuits and the upper portion of  FIG. 10  shows signals H k  and M k  supplied by one of the adjacent correction circuits to the central correction circuit. To determine whether a detection overlap has occurred, the central correction circuit determines the product of signals M 1   k  and M k  shown in the central portion of  FIG. 10 .  FIG. 10  illustrates three cases. 
         [0104]    The first case (times C 0  to C 2 ) corresponds to a detection overlap, the ionizing radiation detection first occurring in the central pixel. The leading edges of signals H 1   k  and M 1   k  occur at time C 0 . The leading edges of signals H k  and M k  occur at time C 1  preceding time C 2  of the trailing edge of signal M 1   k . The central correction circuit determines that a detection overlap is occurring based on the fact that the product between signals M k  and M 1   k  is not zero between times C 1  and C 2 . The central correction circuit determines that the ionizing radiation detection occurs first in the central pixel from the fact that the rising edge of signal M 1   k  occurs before the rising edge of signal M k . 
         [0105]    The second case (times C 3  to C 5 ) corresponds to the presence of a detection overlap, the ionizing radiation detection first occurring in the adjacent pixel. The leading edges of signals H k  and M k  occur at time C 3 . The leading edges of signals H 1   k  and M 1   k  occur at time C 4  preceding time C 5  of the trailing edge of signal M k . The central correction circuit determines that a detection overlap is occurring based on the fact that the product between signals M k  and M 1   k  is not zero between times C 4  and C 5 . The central correction circuit determines that the ionizing radiation detection occurs first in the adjacent pixel from the fact that the rising edge of signal H k  occurs before the rising edge of signal H 1   k . 
         [0106]    The third case (times C 6  to C 8 ) corresponds to no detection overlap. The leading edges of signals H k  and M k  occur at time C 6 . The trailing edges of signal M k  occur at time C 7  preceding time C 8  of the leading edges of signals H 1   k  and M 1   k . The central correction circuit determines that a detection overlap is not occurring based on the fact that the product between signals M k  and M 1   k  is zero. 
         [0107]    According to an embodiment of the invention, the central correction circuit takes into account a single detection overlap, called priority detection overlap. According to an embodiment of the invention, if two or more than two detection overlaps occur, among which at least one for which signal H k  switches from state ‘1’ after the switching to state ‘1’ of signal H 1 , the priority detection overlap is the detection overlap with the adjacent correction circuit for which signal H k  switches first to state ‘1’ after the switching to state ‘1’ of signal H 1 . According to an embodiment of the invention, if, for all detection overlaps, signal H k  switches to state ‘1’ before the switching to state ‘1’ of signal H 1 , the priority detection overlap is the detection overlap with the adjacent correction circuit for which signal H k  switches first to state ‘1’ before the switching to state ‘1’ of signal H 1 . 
         [0108]      FIGS. 11 and 12  illustrate a more detailed embodiment of steps  102 ,  106 , and  108  of the method previously described in relation with  FIG. 6 , each correction circuit  52  comprising circuit  112  previously described in relation with  FIGS. 7 and 8 . 
         [0109]      FIGS. 11 and 12  each show, in their upper portion, timing diagrams of signals received and output by the central correction circuit and, in their lower portion, timing diagrams of signals received and output by an adjacent correction circuit in the case of a detection overlap. Signal Max 1 ′ corresponds to signal Max 1  received by the adjacent correction circuit and signal Mx 1 ′ corresponds to signal Mx 1  output by the adjacent correction circuit. Times D 0  to D 7  and times E 0  to E 7  are successive times. 
         [0110]      FIG. 11  illustrates an example of detection overlaps (assumed to hold the priority) where the trailing edge of signal H k  precedes the trailing edge of signal H 1   k . 
         [0111]    The leading edges of signals H 1   k  and M 1   k  occur at time D 0 . The leading edges of signals H k  and M k  occur at time D 1  preceding time D 2  of the trailing edge of signal M 1   k . The central correction circuit thus determines that a detection overlap is occurring based on the fact that the product between signals M k  and M 1   k  is not zero between times D 1  and D 2 . Further, the central correction circuit determines that the ionizing radiation detection occurs first in the central pixel from the fact that the rising edge of signal M 1   k  occurs before the rising edge of signal M k . Time D 3  corresponds to the trailing edge of signal M k  and time D 4  corresponds to the trailing edge of signal H k . Switch SW 1  of the adjacent correction circuit is turned on at time D 1  and turned off at time D 4 . After time D 4 , signal Mx 1 ′ is substantially constant and corresponds to the value of signal Max 1 ′ sampled at time D 4 . At time D 5 , the trailing edge of signal H 1   k  occurs. Switch SW 1  of the central correction circuit is turned on at time D 0  and turned off at time D 5 . 
         [0112]    After time D 5 , signals H 1   k  and H k  being at the low level, central correction circuit sets signal Hech to the high state at time D 6  immediately after the trailing edge of signal H 1   k . The trailing edge of signal Hech occurs at time D 7 . Switches SW 3   k  and SW 4   k  of the adjacent correction circuit are on between times D 6  and D 7 . Between times D 6  and D 7 , signal Mx 1  corresponds to the value of signal Max 1  sampled at time D 5  increased by signal Mx 1 ′, which corresponds to the value of signal Max 1 ′ sampled at time D 4 . The adjacent correction circuit outputs no signal Hech so that only the detection of an ionizing radiation by the central correction circuit is taken into account by central processing unit  24 . 
         [0113]      FIG. 12  illustrates an example of a detection overlap (assumed to hold the priority) where the trailing edge of signal H 1   k  precedes the trailing edge of signal H k . The signals vary in the same way between times E 0  and E 3  as between times D 0  and D 3 . At time E 4 , the trailing edge of signal H 1   k  occurs. Switch SW 1  of the central correction circuit is turned on at time E 0  and turned off at time E 4 . At time E 5 , the trailing edge of signal H k  occurs. Switch SW 1  of the adjacent correction circuit is turned on at time E 1  and turned off at time E 5 . After time E 5 , signal Mx 1 ′ is substantially constant and corresponds to the value of signal Max 1 ′ sampled at time E 5 . 
         [0114]    After time E 5 , signals H 1   k  and H k  being at the low level, central correction circuit sets signal Hech to the high state at time E 6  immediately after the trailing edge of signal H k . The trailing edge of signal Hech occurs at time E 7 . Switches SW 3   k  and SW 4   k  of the adjacent correction circuit are on between times E 6  and E 7 . Between times E 6  and E 7 , signal Mx 1  corresponds to the value of signal Max 1  sampled at time E 4  increased by signal Mx 1 ′, which corresponds to the value of signal Max 1 ′ sampled at time E 5 . The adjacent correction circuit outputs no signal Hech so that only the detection of an ionizing radiation by the central correction circuit is taken into account by central processing unit  24 . 
         [0115]      FIG. 13  schematically shows the signals received and output according to an embodiment of correction circuit  52  where the correction circuit further receives a signal Cnc from processing unit  24  and signals Pc k  and Af k  from each adjacent correction circuit and supplies each adjacent correction circuit with signals Cc k  and A 2   k . 
         [0116]    Signal Cnc is a binary signal which corresponds to a control bit of each correction circuit  52 . As an example, when signal Cnc is in the high state, a correction method is implemented to take into account charge sharing phenomena according to one of the previously-described embodiments of the invention. As an example, when signal Cnc is in the low state, no correction method is implemented to take into account charge sharing phenomena. 
         [0117]    Signals Af k , Pc k , A 2   k , and Cc k  are used to implement a communication protocol between the central correction circuit and the adjacent correction circuits at steps  102 ,  106 ,  108 , and  110  previously described in relation with  FIG. 6 . 
         [0118]    When, at steps  102  and  106 , the central correction circuit determines that a priority detection overlap has occurred with one of the adjacent circuits, for example, the adjacent circuit located on the east side, and that the central correction circuit is the first one to have detected the ionizing radiation, it sets signal Cc E  to ‘1’, the other signals Cc N , Cc S , and Cc O  being maintained at ‘0’. The setting to ‘1’ of signal Cc E  may be performed at the falling edge of signal M 1   E . If available, the adjacent correction circuit located on the east side sets signal Pc E  to ‘1’, for example, at the trailing edge of signal M E . The adjacent correction circuit located on the east side then turns off switches SW 3   E  and SW 4   E  and the central correction circuit waits for the last trailing edge between the trailing edge of signal M E  and of signal H E  to set signal Hech to ‘1’ and add signals Mx 1  and Mx E  (step  108 ). If it is not available, the adjacent correction circuit located on the east side maintains signal Pc E  at ‘0’ and maintains switches SW 3   E  and SW 4   E  off. Everything occurs as if there was no detection overlap (step  104 ) and the central correction circuit then sets signal Hech to ‘1’ after the trailing edge of signal H 1   E  and H E . There thus is no addition of signals Mx 1  and Mx E  while signal Hech is at ‘1’. The adjacent correction circuit may be unavailable if it already takes part in a priority detection overlap with another correction circuit. 
         [0119]    One of the adjacent correction circuits, for example, the adjacent correction circuit located to the east, may determine that a priority detection overlap has occurred with the central correction circuit and that the adjacent correction circuit is the first one to have detected the ionizing radiation. The adjacent correction circuit can then transmit to the central correction circuit a request to recover signal Mx 1  of the central correction circuit. The adjacent correction circuit, for example, located on the east side, then sets signal Af E  to ‘1’, the other signals Af N , Af 5 , and Af O  being maintained at ‘0’. The setting to ‘1’ of signal Af E  may be performed at the falling edge of signal M E . If, at steps  102  and  106 , the central correction circuit has also determined that a detection overlap has occurred with the adjacent circuit on the east side, the central correction circuit sets signal A 2   E  to ‘1’, for example, at the trailing edge of signal M 1   E . The central correction circuit then turns on switches SW 3   E  and SW 4   E  so that the adjacent correction circuit on the east side can read the voltage across capacitor C 1  of the central correction circuit via signal Mid. If the central correction circuit is not available, the central correction circuit maintains signal A 2   E  at ‘0’ and maintains switches SW 3   E  and SW 4   E  off. The central correction circuit may be unavailable if it already takes part in a priority detection overlap with another correction circuit. 
         [0120]    Specific embodiments of the present invention have been described. Various alterations and modifications will occur to those skilled in the art. In particular, although embodiments have been described where each central correction circuit exchanges signals with four other adjacent correction circuits (except for the correction circuits associated with electrodes at the edges of the electrode array), it should be clear that each central correction circuit may be connected to a larger or smaller number of adjacent correction circuits. As an example, in relation with  FIG. 5 , the central correction circuit may be connected to eight adjacent correction circuits associated with the electrodes located to the north, to the south, to the east, to the west, to the north-east, to the north-west, to the south-east, and to the south-west of the central electrode.