Abstract:
A method of providing the servo pattern for detecting fine defects in the servo burst signals of a hard disk drive (HDD) comprises the steps of writing a preamble portion for providing a servo sync signal in reading servo data together with a gap to inform of a servo sector, writing a servo address mark (SAM) for notifying the start of the servo to provide a sync signal to read the following gray code, writing the gray code for providing the identification data ID of a track, and writing a burst signal portion consisting of multiple repetition of the position error signal required for even or odd numbered track data and track following.

Description:
CLAIM OF PRIORITY 
     This application makes claims all benefits accruing under 35 U.S.C. §119 from an application for METHOD OF WRITING THE SERVO PATTERN FOR DETECTING FINE DEFECTS IN THE SERVO BUST SIGNALS OF A HARD DISK DRIVE AND DRIVE CIRCUIT THEREFOR earlier filed in the Korean Industrial Property Office on Dec. 30, 1995 and there duly assigned Ser. No. 64238/1995. 
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention concerns a hard disk drive (HDD), and more particularly a method of writing the servo pattern for detecting fine defects in the servo burst signals and a drive circuit therefor. 
     2. Description of the Related Art 
     HDDs are widely used as auxiliary memory devices of computer systems because they provide means for accessing a large amount of data at high speed. In addition, many efforts have been made to increase the data storage capacity of an HDD in order to meet the needs in the informational age, i.e., to increase the number of the tracks per inch (TPI) of the platters (disks). High TPI density involves problems relating to servo control because the narrowed gap between the tracks reduces the off-track margins of the position error signals (PES) by which the heads follow the tracks. The servo pattern of a conventional HDD is described with reference to FIG. 1 illustrating the conventional format of the servo sector. 
     The servo sector consists of a preamble portion, servo address mark (SAM) portion, gray code portion, portion of the burst signals A, B, C, D, and timing margin portion PAD. The preamble provides a servo sync signal for reading the servo data together with a gap to indicate of the servo sector. The SAM indicates the start of the servo providing a sync signal to read the following gray code. The gray code  10 ,  11 ,  12 ,  13  provides the identification data ID of each track. The track data is changed by one bit when the heads move through the gray codes, written by half track in the servo writer. The burst signals A, B, C, D provide the position error signals PES required to follow the tracks. In the embedded sector servo mechanism, the burst signals C, D are usually employed for positioning the heads on-track, the burst signal A for distinguishing the even numbered tracks, and the burst signal B for distinguishing the odd numbered tracks. The PAD provides a timing margin required after reading the servo data. 
     Referring to FIG. 2 illustrating the on-track timing diagrams of the burst signals A, B, C, D read from the disk prepared with a servo sector format as shown in FIG. 3, reference symbol  2   a  indicates the servo sector of a certain track, signal BS the burst signals A, B, C, D read by a head and amplified, signal SE a sample &amp; hold enable signal, signal FBS the full wave rectified burst signals A, B, C, D obtained through an automatic gain control (AGC) circuit, and signals SA to SD the burst signals A, B, C, D applied to sample &amp; hold circuits. Signal RS is a reset signal to discharge the burst signals A, B, C, D applied to the sample &amp; hold circuits. Among these signals SA to SD, SA has the highest level and SB the lowest level while SC and SD have the same level which is midway between SA and SB. The charged level of each of the signals SA to SD corresponds to the area of the eight half waves of the corresponding signal. The signals SA to SD are maintained at the charged levels until the reset signal RS is enabled. 
     In such burst signal detection of sample &amp; hold, the charged levels using the sampled burst signals vary with the pulse number and area of the burst signals. Namely, a disk having a high track density burst to have a high storage capacity has defects of various sizes, which, if they exist in the portion of the burst signals A, B, C, D after the servo writing, considerably affect the position error signals PES. The conventional HDD may not detect the fine defects existing in the burst signals by employing the sampled signals except that the defects are large enough to influence the levels of the sampled signals, thereby resulting in errors in the servo control. 
     SUMMARY OF THE INVENTION 
     It is an object of the present invention to provide an improved servo control mechanism by writing the servo pattern so as to detect fine defects in the servo burst signals of an HDD. 
     According to the present invention, a method of providing the servo pattern for detecting fine defects in the servo burst signals of a hard disk drive (HDD) comprises the steps of: 
     writing a preamble portion which includes a servo sync signal for reading servo data together with a gap to indicate of a servo sector; 
     writing a servo address mark (SAM) indicating the start of the servo to provide a sync signal to read the following gray code; 
     writing the gray code for providing the identification data ID of a track; and 
     writing a burst signal portion consisting of multiple repetitions of the position error signal required for even or odd numbered track data and track following. 
     The present invention will now be described more specifically with reference to the drawings attached only by way of example. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     A more complete appreciation of the invention, and many of the attendant advantages thereof, will be readily apparent as the same becomes better understood by reference to the following detailed description when considered in conjunction with the accompanying drawings in which like reference symbols indicate the same or similar components, wherein: 
     FIG. 1 is a schematic diagram illustrating the format of the servo sector of an HDD; 
     FIG. 2 is a timing diagram illustrating the operations according to FIG. 1; 
     FIG. 3 is a schematic diagram illustrating a format of the servo sector of an HDD according to the present invention; 
     FIG. 4 is a diagram illustrating a drive circuit for detecting fine defects in the servo burst signals according to the present invention; and 
     FIG. 5 is a timing diagram illustrating the operations according to FIG.  3 . 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring to FIG. 3, the burst signals A, B, C, D are recorded four times in order to detect the fine defects existing in the burst signals. The portions of preamble, gray codes  10 - 13 , burst signals A, B, C, D, and timing margin PAD have the same spaces as those in FIG.  1 . 
     Describing the drive circuit for detecting fine defects in the servo burst signals with reference to FIG. 4, a disk  2  is rotated by a spindle motor  34  so as to store the data transferred from a host in the form of magnetic energy. Heads  4  are mounted on arms perpendicularly extending from an actuator  6  to read data from the disk  2  or write data transferred from the host onto the disk  2 . An AGC  8  mounted in a read/write channel part controls gain of the burst signals BS read by the head  4  under the control of an AGC adjustment circuit  10 . A full-wave rectifier  12  is provided to rectify the full waves of the burst signals BS amplified by the AGC  8 . The full-wave rectified burst signals FBS of the full-wave rectifier  12  are applied to respective sample &amp; hold circuits  14 ,  16 ,  18  and  20  in response to a sample &amp; hold enable signal SE. The sample &amp; hold circuits  14 ,  16 ,  18 ,  20  maintain the charged levels of the burst signals A, B, C, D until they are reset by a reset signal RS. 
     A multiplexer (MUX)  22  multiplexes the sampled signals SA, SB, SC, SD obtained from the sample &amp; hold circuits  14 ,  16 ,  18 ,  20  via the terminals A, B, C, D and provides a multiplexed output to an A/D converter  24  according to a MUX control signal CS. The A/D converter  24  converts the sampled and multiplexed signals SA-SD delivered from the MUX  22  into digital signals applied to a register circuit  26 , which also delivers the digitally converted and multiplexed signals SA, SB, SC, SD to an adder circuit  28  according to the output signal of a status and shifter  30 . Then, the adder circuit  28  adds the sampled and multiplexed signals SA, SB, SC, SD and transfers the adder output to a CPU  32 . The register circuit  26  and adder circuit  28  respectively consist of four registers and four adders. The status and shifter  30  transfers the output of the adder circuit  28  to the CPU  32  according to a sampling enable signal SE. The CPU  32  generates track following data based on the output of the adder circuit  28  which performs adding operations on the charged levels of the sampled signals SA, SB, SC, SD, and employs that data to control the spindle motor  34  and/or VCM  36 . 
     Referring to FIG. 5 burst illustrating the operational timing of the burst signals BS and sampled signals SA, SB, SC, SD read from the disk  2 , the burst signals BS are read by the head  4  are preamplified and applied to the AGC  8 . The burst signals BS consist of different portions A, B, C, D repeated four times according to the present invention (illustrated as repeated twice in FIG.  5 ). The length of the burst signals SA, SB, SC, SD is set to be at the maximum four pulses. Reference symbol FBS represents the burst signals full-wave rectified by the full-wave rectifier  12  as shown in FIG. 4, and SE the sample &amp; hold enable signal applied to the sample &amp; hold circuits  14 ,  16 ,  18 ,  20  providing window regions to sample the burst signals A, B, C, D. Reference symbols SA, SB, SC, SD represent the signals sampled from the full-wave rectified burst signal FBS and applied to the sample &amp; hold circuits  14 ,  16 ,  18 ,  20 , respectively. The sampled signals SA, SB, SC, SD are charged by the areas of the full-wave rectified pulses of the respective burst signals A, B, C, D in response to the sample &amp; hold enable signal SE and are discharged by the reset signal RS. Hereinafter will be described the operation of the drive circuit for detecting fine defects existing the burst signals with reference to FIGS. 3 to  5 . 
     In servo control, the head  4  reads data from the disk having the servo sector format as shown in FIG.  3 . The data is applied to the AGC  8  which amplifies it to at a given level to generate the adjusted burst signals BS transferred to the full-wave rectifier  12 . The burst signals BS are transformed by the full-wave rectifier  12  into the full-wave rectified burst signals FBS applied to the sample &amp; hold circuits  14  to  20 , which are respectively charged with the full-wave rectified burst signals FBS according to the sampling enable signal SE. Namely, in the first interval A 0  of the sampling enable signal SE, the sample &amp; hold circuit  14  is charged with a value corresponding to the area of two half waves of the burst signal A in the full-wave rectified burst signal FBS. In this way, the remaining three sample &amp; hold circuits  16 ,  18 ,  20  are sequentially charged with the respective values corresponding to the burst signals B, C, D. Then, the sampled signals SA, SB, SC, SD corresponding to the areas of the respective pulses of the full-wave rectified burst signals FBS are transferred to the MUX  22 , which in turn transfers the sampled signals SA, SB, SC, SD to the A/D converter  24  according to the control signal CS. The sampled signals SA, SB, SC, SD are digitally converted by the A/D converter  24  and loaded in the respective registers A, B, C, D, and are then transferred to the adder circuit  28  by the status and shifter  30  upon enabling the reset signal RS. The adders A, B, C, D add the charged levels of the respective sampled signals SA, SB, SC, SD delivered by the register circuit  26 , so that the CPU  32  receives the charged level values A 0 , A 1 , B 0 , B 1 , C 0 , C 1 , D 0 , D 1  of the sampled signals SA, SB, SC, SD and the added values A 0 +A 1 , B 0 +B 1 , C 0 +C 1 , D 0 +D 1  through a bus to detect the fine defects in the burst signals. 
     Thus, the present invention provides means for detecting the fine defects existing in the servo burst signals, so that the servo control is effective to secure a reliable HDD with high speed and large storage capacity. In the present embodiment, the servo pattern is provided with the burst signals A, B, C, D repeated twice to detect the fine defects, but the burst signals may be repeated more than twice without any particular modification. 
     Although the present invention has been described with reference to specific embodiments, it will be also noted that various modifications may be made without departing the gist of the present invention.