Abstract:
A transmitter circuit in a wireless power transmission system has a tank circuit, having an inductor and a capacitor, the inductor being couplable to the inductor of a receiver circuit. An oscillator generates an oscillation frequency signal for driving the tank circuit. A first digital-to-analog converter (DAC) provides a first control signal to control the oscillating frequency of the oscillator. A frequency shift keying (FSK) circuit changes a digital signal input to the digital-to-analog converter for shifting the oscillation frequency utilized to drive the tank circuit, the FSK signal transmitting data or commands to the receiver circuit. A method of transmitting FSK signals in a wireless power transmission system is also disclosed.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is related to U.S. Application Number (TI-73620); U.S. Application Number (TI-74614); and U.S. Application Number (TI-74615) all filed on even date, which are incorporated herein by reference in their entirety for all purposes 
       FIELD 
       [0002]    The invention relates to a circuit and method for driving a tank circuit in a wireless power transmission system, and more specifically, to a circuit and method for also generating FSK signals. 
       BACKGROUND 
       [0003]    The explosion of small portable electronic devices such as cell phones has led to the desire to be able to recharge the device without the necessity of attaching a cord to the device. A solution that accomplishes this task is known as “wireless power”. The term “wireless power” as utilized herein refers to the transmission of electrical energy from a power source to an electrical load without interconnecting wires. A common form for wireless power transmission utilizes two electromagnetically coupled coils to form a transformer through which power is transferred from the primary side to the receiving side. The transmitter may take the form of a pad having a coil embedded therein. The receiver may be built into a cellular telephone, for example, with the receiving side coil built into the back thereof. Although there is no direct contact between the transmitting and receiving coils, the close proximity of the coils, and the judicious use of shielding, allows for efficient transfer of energy from the transmitting side to the receiving side to operate a load, which may be a rechargeable battery being recharged by the system, for example. 
         [0004]      FIG. 1  shows a block diagram of a prior art wireless power transmission system, generally as  100 . The system comprises a transmitter side  102  and a receiver side  122 . The transmitter side  102  comprises a circuit  104  for rectifying an AC input into a DC voltage which is fed into a power stage  106  for generating a high frequency signal. The high-frequency signal is coupled across a transformer  120  to the receiver side  122 . The power stage  106  is controlled by controller  108  which could be combined into a single integrated circuit with the power stage  106 . The receiver side  122  comprises a rectifier circuit  124  to output a DC voltage and a voltage conditioning circuit  126  which is operated by the receiver controller  128  to supply power to a load  130 , which may be a rechargeable battery being recharged by the system, for example. 
         [0005]    As shown in  FIG. 1 , power flows from left to right from the transmitter to the receiver and communications flows from right to left from the receiver to the transmitter. The communication signals may be command signals to adjust the power level from the transmitter or other parameters, for example. The communication signals may be generated by coupling a resistor or capacitor across the receiving coil to generate signals which can be recognized by the controller on the transmitting side. The low-level signals are noisy because of the noise generated by the power transmission portion of the system. 
         [0006]    The circuits discussed above generally relate to one-way communication between the receiver and the transmitter. Two-way circuits are also known in the art. However, there is a desire for a more robust solution to two-way communications which is simpler in circuit configuration. 
       SUMMARY 
       [0007]    It is a general object to provide a circuit to drive a tank circuit of a transmitter for a wireless power transmission system so that it can also generate FSK signals for transmitting data or commands to a receiver. 
         [0008]    In an aspect in a wireless power transmission system, a transmitter circuit comprises a tank circuit having an inductor and a capacitor, the inductor being couplable to the inductor of a receiver circuit. An oscillator generates an oscillation frequency signal for driving the tank circuit. A first digital-to-analog converter (DAC) provides a first control signal to control the oscillating frequency of the oscillator. A frequency shift keying (FSK) circuit changes a digital signal input to the digital-to-analog converter for shifting the oscillation frequency utilized to drive the tank circuit, the FSK signal transmitting data or commands to the receiver circuit. 
         [0009]    Another aspect of the invention includes a transmitter circuit for a wireless power transmission system, comprising a digitally-controlled oscillator generating an oscillation frequency signal for driving a tank circuit, the digitally-controlled oscillator being able to be digitally-programmed to change the oscillation frequency to transmit frequency shift keying (FSK) signals to a receiver circuit that are electromagnetically coupled to the tank circuit. A control circuit generates digital commands to control the digitally-controlled oscillator to transmit the FSK signals. 
         [0010]    A further aspect includes a method of transmitting a frequency shift keying (FSK) signal from a transmitter circuit to an electromagnetically coupled receiver circuit in a wireless power transmission system, comprising electromagnetically coupling a tank circuit in the transmitter circuit with a tank circuit in a receiver circuit. Generating an oscillation frequency signal for the transmitter circuit tank circuit for transmitting power to the receiver circuit. Changing a digital value input to a digital-to-analog converter (DAC) for controlling the oscillation frequency by frequency shift keying the oscillation frequency of the transmitter tank circuit to transmit data or commands to the receiver circuit. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0011]    Further aspects of the invention will appear from the appending claims and from the following detailed description given with reference to the appending drawings. 
           [0012]      FIG. 1  is a diagram of a wireless power system according to the prior art; 
           [0013]      FIG. 2  is a block diagram of a system for driving a tank circuit in a wireless power transmission system constructed according to the principles of the present disclosure; 
           [0014]      FIG. 3  is a schematic block diagram of the oscillator for the system of  FIG. 1 ; 
           [0015]      FIG. 4  shows the waveforms at node VR 1  of  FIG. 2 ; 
           [0016]      FIG. 5  shows the waveforms at node VR 2  of  FIG. 2 ; 
           [0017]      FIG. 6  shows the signals PW 1  and S 1 ; 
           [0018]      FIG. 7  shows the signals PW 2  and S 2 ; 
           [0019]      FIGS. 8 and 9  show adjusting the duty cycle of the signals PWM  1  and PWM  2 . 
       
    
    
     DETAILED DESCRIPTION 
       [0020]    In one-way communications in a wireless power transmission system, the signal sent from the receiver to the transmitter may be amplitude modulated. The data present in this datastream can be recovered according to known circuits or can utilize the circuits shown in co-pending applications (TI-74614, TI-74615, and TI-73620) filed on even date which are incorporated herein by reference in their entirety for all purposes. The data received from the data stream is then processed by a microcontroller (or microprocessor) which is then utilized to adjust the frequency of the tank circuit. The tank circuit may have, for example, a resonance of about 100 kHz. By varying the frequency of the signal utilized to excite the tank circuit between 110 and 210 kHz, the amount of power supplied to the load (the receiver) can be varied. 
         [0021]    In the discussion below, the data has already been extracted from the data stream and processed by a microcontroller to yield a 4-bit control word to adjust the frequency of the excitation signal that drives the tank circuit. The tank circuit may be driven, for example, by two half-bridge driver circuits, as is known in the art. The microcontroller generates a 3-bit control signal and a control clock, the functions of which are shown in Table 1 below: 
         [0000]    
       
         
               
               
               
               
               
             
           
               
                   
               
               
                 MODE 
                 PWM_CRTL 
                 DNUP 
                 CLKIN 
                 Effect 
               
               
                   
               
             
             
               
                 0 
                 0 
                 1 
                 @rising edge 
                 Decrease Freq 
               
               
                   
                   
                   
                   
                 (Increase power) 
               
               
                 0 
                 0 
                 0 
                 @rising edge 
                 Increase Freq, 
               
               
                   
                   
                   
                   
                 (Reduce power) 
               
               
                 0 
                 0 
                 0 
                 @rising edge 
                 Decrease Duty Cycle 
               
               
                   
                   
                   
                   
                 (Reduce power) 
               
               
                 0 
                 0 
                 1 
                 @rising edge 
                 Increase Duty Cycle 
               
               
                   
                   
                   
                   
                 (Increase power) 
               
               
                   
               
             
          
         
       
     
         [0022]    The MODE signal controls whether or not the frequency would be changed, (either increased or decreased), or whether the duty cycle of the signal used to excite the tank circuit would be increased or decreased. The PWM CTRL controls whether the microcontroller will generate a frequency used to excite the tank circuit or, as shown, the internal oscillator circuit, shown in  FIG. 2  and discussed below. The DNUP signal controls whether the frequency will be increased or decreased; or the duty cycle increased or decreased. The signal CLKIN is the input clock in which changes are made on the rising edge of the clock. The rising edge of the clock will increase or decrease the frequency by one step, for example. The step can be the frequency range divided by the number of bits in a counter that controls a DAC, for example. 
         [0023]      FIG. 2  shows an oscillator circuit for generating the frequency used to excite the tank circuit (not shown), generally as  200 . In  FIG. 2 , the three input signals and the clock are input into two up/down counters through logic gates. Thus, the inverted MODE signal is input to AND gate  202 , the output of which is connected to the up count input to 8-bit up/down counter  210 . This inverted MODE signal is also applied to AND gate  204 , and the non-inverted MODE signal is applied to AND gates  206  and  208 . The output of AND gate  204  is connected to the down count input to 8-bit up/down counter  210 . The output of AND gate  206  is connected to the input of 6-bit up/down counter  212  and the output of AND gate  208  is connected to the down input of that counter. The inverted PWMCNTL signal is coupled to AND gates  202 ,  204 ,  206  and  208 . The inverted DNUP signal is also connected to the AND gates  202 , and  208  and the non-inverted DNUP signal is connected to the input of AND gates  204 ,  206 . The CLK signal is connected to the clock inputs of the two counters. The output of 8-bit up/down counter  210  is coupled to the digital-to-analog converter (DAC)  214  and generates an analog signal which is used to control the frequency of oscillator  218  between, for example, 100 kHz and 210 kHz. The output of 6-bit up/down counter  212  is coupled to DAC  216  which generates an analog signal which controls the duty cycle of the pulses from the oscillator  218 . The Q 1  and Q 2  outputs of the oscillator are connected to Driver  1  and Driver  2  to drive the half-bridges discussed above. Also shown in  FIG. 2 , the signal PWMCNTL can cause the output to be multiplexed to signals generated directly by the microcontroller. The output CLKOUT of oscillator  218  is fed back to the microcontroller for comparing the output of the oscillator to the desired output 
         [0024]    In operation, the microcontroller generates the signals shown in Table 1 which causes the 8-bit up/down counter to either increase or decrease by one step at the rising edge of the clock. This signal is applied to DAC  214  to the frequency input of oscillator  218  which changes the frequency at which the oscillator will work by one step. Similarly, the signals can be used to instruct the 6-bit up/down counter  212  to increase or decrease by one count, which is output through DAC  216  to control the duty cycle of the oscillator signals generated. 
         [0025]    An oscillator circuit suitable for use at the oscillator  218  is shown in  FIG. 3 , generally as  300 . The oscillator  300  is a dual ramp oscillator utilizing a constant current source Icharge which generates the ramp signals utilizing capacitors  306  and  308 . The charge from Icharge will flow through either switch  302  or switch  304  to charge capacitor  306  or capacitor  308  which are coupled between the switches and ground. Switch  310  discharges capacitor  306  to ground and switch  312  discharges capacitor  308  to ground. Switches  304  and  310  are operated by the signal S 1  generated by the differential output circuit  320  and the switches  302  and  312  are operated by the signal S 2  also generated by the differential output circuit  320 . The node VR 1  is connected to a non-inverting input of comparator  316 . Thus, the voltage across capacitor  308 , is compared to a reference by the comparator  316 . Similarly, the node VR 2  is coupled to a non-inverting input of comparator  316  so the voltage across capacitor  306  is compared to a reference by the comparator  316 . The reference voltage V_freq_ref is generated by the 8-bit DAC  314  which is coupled to the inverting input of comparator  316  and provides the reference voltage against which voltages VR 1  and VR 2  are compared. 
         [0026]    The voltages V_Freq+ and V_Freq− are the positive and negative reference voltages, respectively, for the 8-bit DAC  314 . Referring now to  FIGS. 4 and 5 , the voltages VR 1  and the VR 2  are shown as sawtooth waves, 180° out of phase with each other, which are switched when the voltage across the capacitor  308  at VR 1  reaches V_freq_ref and when the voltage across capacitor  306  reaches V_freq_ref. Thus, the frequency of the oscillator can be changed by varying the reference voltage V_freq_ref. The reference voltage is generated by the 8-bit DAC and the frequency is changed by the signal DNUP when both of the signals MODE and PWM CTRL are zero, see Table 1. 
         [0027]    The node VR 1  is coupled to the inverting input of the comparator  324  and the node VR 2  is connected to the non-inverting input of comparator  326 . The non-inverting input to comparator  324  and inverting input of comparator  326  of both coupled to the signal V_pw_ref which is output from the 6-bit DAC  322 . The output of comparator  324  passes through AND gate  328 , the other input of which is coupled to the signal S 1 . The output of comparator  326  passes through AND gate  330 , the other input of which is coupled to the signal S 2 . The output of AND gate  328  is the signal PWM 1  which drives the first half-bridge circuit which drives the tank circuit and the output of AND gate  330  is the signal PWM 2  which drives the second half-bridge to drive the tank circuit. 
         [0028]    The output of comparator  316  clocks flip-flop  318  in which the Q not output is coupled to the data input. This causes the flip-flop  318  to alternately change states. The output of flip-flop  318  is coupled to differential output circuit  320  which generates the signals S 1  and S 2 , which are 180° out of phase with respect to each other. The signals, in turn, are used to drive the switches  302 ,  304 ,  306 , and  308  as well as provide the second inputs to AND gates  328  and  330 .  FIGS. 6 and 7  show the signals S 1  and S 2  as well as the signals PW 1  and PW 2 , which are the outputs of comparators  324 ,  326 , respectively. 
         [0029]    Referring now to  FIGS. 4 and 5  and  FIGS. 8 and 9 , we see that there is a second reference V_pw_ref which is output from the 6-bit DAC  322  and used to change the duty cycle of the signals PWM  1  and PWM  2  which are used to drive the half-bridge circuits which excite the tank circuit. As can be seen in  FIGS. 8 and 9 , the duty cycle is changed by changing the timing of the trailing edge of the drive pulses, so the pulse always remains 180° out of phase. The power delivered to the load (receiver) is controlled by varying the frequency used to excite the tank circuit. If the tank circuit has a resonant frequency of 100 kHz, for example, then utilizing a frequency of 110 to 210 kHz allows power to be transmitted to the receiver and various power levels. The further the frequency used to excite the tank circuit is away from the resonant frequency, the less power that will be transmitted. However, if the circuit reaches the 210 kHz frequency and still too much power is being transmitted to the receiver, the transmitter circuit then goes into a second mode in which the duty cycle of the drive signal is reduced. For example, the duty cycle can be reduced from substantially 50% to as little as substantially 10% in order to reduce power to the receiver. 
         [0030]    The data stream signal from the receiver can be amplitude modulated, as described more fully in commonly owned co-pending applications (TI-74614 and TI-74615), filed on even date and incorporated herein by reference in their entirety for all purposes. Accordingly, if a transmission of data from the transmitter to the receiver is to be provided, another form of modulation is needed. One type of modulation that can be used is frequency shift keying (FSK). The present invention allows for generating data signals utilizing FSK by utilizing the same circuit that is used to excite the tank circuit. Thus, the need for additional circuitry and expense is avoided. The changing of frequency of the tank circuit is then transmitted electromagnetically from the transmitter coil to the receiver coil, which can then be decoded. 
         [0031]    The generation of FSK signals is accomplished by changing the setting of the 8-bit up/down counter  214  in discrete steps to generate, for example, one of eight possible frequency settings. The most significant bit of a 3-bit code output from the microcontroller (not shown) determines whether or not the frequency is to be increased or decreased, so that two bits of data can be sent with a single frequency change. The frequency change can be implemented by changing the DAC code for a fixed number of steps. For example, the number of steps could be −2, −3, −6, or −12 if the DNUP signal is a digital one, or +2, +3, +6 or +12, or if the DNUP signal is a digital zero. The frequency of the steps can correspond to the range of frequencies output from the oscillator divided by the number of bits in the counter used to control the frequency, for example. Data transmission and adjusting the power transmitted are not performed at the same time in order to avoid conflicts. 
         [0032]    Although the invention has been described in detail, it should be understood that various changes, substitutions and alterations can be made thereto without departing from the spirit and scope of the invention as defined by the appended claims.