Abstract:
A water and flame barrier button assembly is incorporated into an electrical enclosure such as a GFCI housing to provide water and flame resistant set and reset buttons. The buttons are contained within flexible sealing frames that allow one end of the buttons to extend through the top portion of the GFCI housing while the opposite end of the button is exposed within the base portion of the sealing frame. The base portion of the sealing frame attaches to the interior of the housing with the exposed button end positioned inward of the sealing frame base. The base of the sealing frame contacts the GFCI circuit board while providing a rebound force to return either the set or reset button exposed end from a position depressed and in contact with the circuit board to a position not in contact with the circuit board and returning inward of the sealing frame base.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    The present application is related to, claims the earliest available effective filing date(s) from (e.g., claims earliest available priority dates for other than provisional patent applications, claims benefits under 35 USC §119(e) for provisional patent applications), and incorporates by reference in its entirety all subject matter of the following listed application(s) (the “Related Applications”) to the extent such subject matter is not inconsistent herewith; the present application also claims the earliest available effective filing date(s) from, and also incorporates by reference in its entirety all subject matter of any and all parent, grandparent, great-grandparent, etc. applications of the Related Application(s) to the extent such subject matter is not inconsistent herewith: 
         [0002]    U.S. provisional patent application 62/231,260, entitled “Button Assembly Providing a Water and Flame Barrier for Electronic Devices”, naming Victor V. Aromin as an inventor, filed 29 Jun. 2015. 
     
    
     1. FIELD OF USE 
       [0003]    The present invention relates generally to electrical safety devices, and more particularly to a water and flame barrier button assembly that can be incorporated in any electrical device enclosure such as a Ground Fault Circuit Interrupter (GFCI) described herein. 
       2. DESCRIPTION OF PRIOR ART (BACKGROUND) 
       [0004]    Conventional electrical appliances typically receive alternating current (AC) power from a power supply, such as an electrical outlet, through a pair of conducting lines. The pair of conducting lines, often referred to as the line and neutral conductors, enable the electrical appliance, or load, to receive the current necessary to operate. 
         [0005]    The connection of an electrical appliance to a power supply by a pair of conducting lines creates a number of potentially dangerous conditions. In particular, there exists the risk of ground fault and grounded neutral conditions in the conducting lines. A ground fault condition occurs when there is an imbalance between the currents flowing in the line and neutral conductors. A grounded neutral condition occurs when the neutral conductor is grounded at the load. Both ground fault and grounded neutral conditions are extremely dangerous and can result in serious injury. 
         [0006]    Ground fault circuit interrupters are well known in the art and are commonly used to protect against ground fault and grounded neutral conditions. In general, GFCI devices sense the presence of ground fault and grounded neutral conditions in the conducting lines, and in response thereto, open at least one of the conducting lines between the power supply and the load to eliminate the dangerous condition. 
         [0007]    GFCI devices can be greatly damaged by short circuits in the internal circuitry. Hence the enclosure of the GFCI Printed Circuit Board (PCB) and related components provides important sealing and shielding functions to protect the internal circuit and prevent dust, moisture or external elements from directly reaching the interior. Furthermore, the use of flame retardant materials promotes the containment of electrical fires within the GFCI enclosure. This also improves the adaptability of the GPCI to varying operational environments. Waterproof, dust-proof, and flame containment have become important design issues. In general, to provide waterproofing is more difficult since water is a fluid and can infiltrate through very small gaps and slits. Once waterproofing is achieved, the problem of fending off other external materials may also be resolved. 
         [0008]    GFCI circuits are well known in the art. In U.S. Pat No. 5,177,657, to M. Baer et al, there is disclosed a ground fault interrupter circuit which interrupts the flow of current to a pair of lines extending between a source of power and a load. The ground fault interrupter circuit includes a circuit breaker comprising a normally open switch located in one or both of the lines, a relay circuit for selectively closing, the normally open switch, an electronic latch circuit operable in first and second bi-stable states and a fault sensing circuit for sensing the presence of a fault condition in at least one of the lines. The electronic latch circuit causes the relay circuit to close the normally open switch and maintain the normally open switch in its closed position when the electronic latch circuit is in the first bi-stable state. The electronic latch circuit also causes the relay circuit to permit the normally open switch to return to its normally open condition when the latch circuit is in its second bi-stable state. A fault sensing circuit senses the presence of a fault condition in at least one of the lines and causes the electronic latch to latch in its second state upon detection of the fault condition. 
         [0009]    In U.S. Pat. No. 5,418,678 to T. M. McDonald, there is disclosed an improved ground fault circuit interrupter (GFCI) device which requires manual setting following initial connection to an AC power source or termination of a power source interruption. The improved GFCI device utilizes a controlled switching device which is responsive to a load power signal for allowing the relay contact sets of the GFCI device to be closed only when power is being made available at the output or load terminals. The controlled switching device preferably comprises an opto-isolator or other type of switching device which provides isolation between the GFCI input and output terminals when the relay contact sets are open. The improved GFCI device may be incorporated into portable units, such as plug-in or line cord units, for use with unprotected AC receptacles. 
         [0010]    In U.S. Pat. No. 4,816,957 to L. F. Irwin there is disclosed an adapter unit comprising a moisture resistant housing, within which is carried an improved, self testing ground line fault interrupter device. The improved device is electrically interconnected with a connector carried externally of the adapter housing so that the unit can be plugged directly into a standard duplex outlet of an existing circuit. The apparatus includes circuitry that automatically tests the operability of the device when it is plugged into a duplex outlet without the need for manual manipulation of test buttons or other overt action by the user. 
         [0011]    In U.S. Pat. No. 4,578,732 to C. W. Draper et al. there is disclosed a wall socket type ground fault circuit interrupter having a pair of sockets, a reset button and a test button that are accessible from the front of the interrupter. The interrupter has latched snap-acting contacts and a novel latching relay structure for releasably maintaining the snap-acting contacts in a circuit making position. The snap-acting contacts permit all of the components including the monitoring torpids and the power supply to be respectively located and connected at the load side of the snap-acting contacts so that all of the circuits of the interrupter are de-energized when the contacts snap to a circuit opening position. The snap-acting contact mechanism and relay are provided with structures which provide the interrupter with a trip-free mode of contact actuation and accordingly a tease-proof snap-acting contact operation. 
         [0012]    A drawback of the GFCI devices of the type described above is that the GFCI button assemblies do not prevent water from seeping into the housings or contain electrical fires within the housing. 
       BRIEF SUMMARY 
       [0013]    The foregoing and other problems are overcome, and other advantages are realized, in accordance with the presently preferred embodiments of these teachings. In accordance with one embodiment of the invention a water and flame barrier button assembly is incorporated into a universal GFCI housing to provide water and flame resistant set and reset buttons. The buttons are contained within flexible sealing frames that allow one end of the buttons to extend through the top portion of the GFCI housing while the opposite end of the button is exposed within the base portion of the sealing frame. The base portion of the sealing frame attaches to the interior of the housing with the exposed button end positioned inward of the sealing frame base. The base of the sealing frame contacts the GFCI PCB while providing a rebound force to return either the set or reset button exposed end from a position depressed and in contact with the PCB to a position not in contact with the PCB and returning inward of the sealing frame base. It is understood that the button assembly of the present invention may be utilized in other electrical enclosures and the GFCI implementation described herein should be considered illustrative and not limiting. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0014]    The subject matter which is regarded as the invention is particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The foregoing and other objects, features, and advantages of the invention are apparent from the following detailed description taken in conjunction with the accompanying drawings in which: 
           [0015]      FIG. 1  is a perspective view of an embodiment of a ground fault circuit interrupter (GFCI) employing the water and flame barrier button assembly of the subject invention; 
           [0016]      FIG. 2  is a perspective view of the GFCI device of  FIG. 1  with the top and bottom housings separated and illustrating the button arrangement; 
           [0017]      FIG. 3  illustrates the button arrangement interior to the top housing with one button in exploded view and the second button fitted into the housing; 
           [0018]      FIG. 4  is a cross section of the fitted button of  FIG. 3  taken along line  4 - 4 ; 
           [0019]      FIG. 5  is a front perspective view of the exploded button of  FIG. 3 ; 
           [0020]      FIG. 6  is a side view of the button cap of  FIG. 5 ; 
           [0021]      FIG. 7  is a top view of the button cap of  FIG. 6 ; 
           [0022]      FIG. 8  is a cross section of the button cap taken along line  8 - 8  of  FIG. 7 ; 
           [0023]      FIG. 9  is a bottom perspective view of the button sealing frame; 
           [0024]      FIG. 10  is a bottom view of the button sealing frame; 
           [0025]      FIG. 11  is a cross section of the button sealing frame taken along lines  11 - 11  of  FIG. 10 ; 
           [0026]      FIG. 12-22  are schematic circuit diagrams of the GFCI circuits utilized in the GFCI device of the present invention; 
           [0027]      FIG. 23  is a schematic circuit diagram of an example Interrupter Chip U 1 . 
       
    
    
     DETAILED DESCRIPTION 
       [0028]    Referring now to the drawings and more particularly to  FIG. 1 , there is shown a around fault circuit interrupter (hereinafter GFCI) constructed according to the teachings of the present invention, the GFCI being represented generally by reference numeral  10 , and incorporating the water and flame barrier button assembly of the subject invention. 
         [0029]    As will be discussed in detail below, GFCI  10  is automatically set to protect a load from ground fault conditions upon the initial plugging in of the load to a power source. GFCI  10  is also automatically set to protect the load from ground fault conditions once power is restored to the power source after a loss of power. Furthermore, once GFCI  10  protects the load from a ground fault condition, GFCI  10  can be manually reset to protect against further ground fault conditions. 
         [0030]    As illustrated in  FIG. 2 , the GFCI device of the present invention includes a power source input  12 , load input  14 , a GFCI printed circuit board (PCB)  16 , and a housing having a top cover  18 A and a bottom cover  18 B. As illustrated in  FIG. 3 , top cover  18 A includes an interior portion  20  including a button receiving section  22 . The button receiving section includes an outward protecting rim  22 A defining a through hole  22 B having an interior lip portion  22 C. The through hole  22 B functions to receive the button assembly  24  therein such that button cap  26  is accessible through top cover  18 A as illustrated in  FIG. 1 . 
         [0031]    Button assembly  24  is shown in  FIG. 3  fitted to the interior portion  20  with cross section  4 - 4  illustrated in  FIG. 4 . As illustrated in  FIG. 5 , button cover  26  is made is made of a fire resistant polycarbonate such as Bayer 6485 (f1) while Button assembly  24  is made of a flexible silicone rubber with button  30  being made of a conductive carbon. Assembly  24  includes a base section  28  having first and second opposing sidewalls  28 A and  28 B. First sidewall  28 A includes a top surface  28 AB with a button  30  disposed radially inward of the first sidewall top surface  28 AB and projecting outward from top  24 A. 
         [0032]    As illustrated in  FIGS. 9 and 11 , button  30  further extends into the bottom  24 B of assembly  24 . The base portion  32  of assembly  24  extends beyond button  30 . When button  30  is depressed assembly  24  flexes and moves button  30  to a point planer with base portion  32 , and when button  30  is released the rebound three of the flexible material returns the button to a point interior to the button assembly  24 .  FIG. 9  illustrates the button assembly  24  button  30  position prior to being depressed. 
         [0033]    As illustrated in  FIGS. 5,6 and 8 , button cap  26  is separable from assembly  24  and includes a cap portion  26  having an interior opening  26 B 3  that encases button  30  therein. The button  30  includes a top extension  26 A projecting outward from a lip portion  26 B, and has a top and bottom surface  26 B 1  and  26 B 2 . 
         [0034]    The button assembly  24  and cap portion  26  are fitted into top cover  18 A as illustrated in  FIG. 3  and  FIG. 4 . Button cap  26  extends into through hole  22 B to a point where button lip portion  26 B top surface  26 B 1  contacts interior lip  22 C. Button  30  of assembly  24  is received within interior opening  26 B 3  to a point where bottom surface  26 B 2  contacts first sidewall top surface  26 AB. At that point first and second sidewalls of assembly  24  receive outward projecting rim  22 A to a point where rim  22 A contacts base section  28  of button assembly  24 . At that point, button  26 , and button assembly  24  are integrated into top cover  18 A. 
         [0035]    As illustrated in  FIG. 2 , when top cover  18 A and bottom cover  18 B are assembled together as in  FIG. 1 , base  32  of button assembly  24  contacts GFCI PCB  16  over contact points  16 A and  16 B. When depressed button  30  contacts PCB board  16  contact points  16 A and  16 B to activate the GFCI as described below. 
         [0036]    It is understood that the following GFCI circuits may be utilized in the present invention as implemented in GFCI circuit card  16  and combined with the water and flame proof button assembly of the present invention. 
         [0037]    GFCI  11  includes a circuit breaker  13 , a relay circuit  15 , a power supply circuit  17 , a booster circuit  19 , a fault detection circuit  21 , a bi-stable electronic latch circuit  23 , a filter circuit  25  and a test circuit  27 . Circuit breaker  13  includes a pair of single-pole, double-throw switches SW 1  and SW 2  which are located in the line and neutral conductive lines, respectively, between a power source and a load. Circuit breaker  13  acts to selectively open and close the pair of conductive lines. Switches SW 1  and SW 2  can be positioned in either of two connective positions. 
         [0038]    In the first connective position, which is illustrated in  FIG. 12 , switches SW 1  and SW 2  are positioned such that the power source is not connected to the load but is connected to booster circuit  19 . In the second connective position, which is the opposite position illustrated in  FIG. 12 , switches SW 1  and SW 2  are positioned such that the power source is connected to the load but not to booster circuit  19 . In both positions, the power source is connected to power supply  17 . 
         [0039]    Relay circuit  15  acts to selectively position switches SW 1  and SW 2  in either its first connective position or its second connective position. Relay circuit  15  comprises a solenoid SOL 1 , a transistor Q 1 , a load resistor R 3 , a pair of voltage divider resistors R 4  and R 5 , and noise suppression capacitor C 5 . 
         [0040]    Solenoid SOL 1  is ganged to the circuit breaker contacts of switches SW 1  and SW 2  and is responsible for selectively controlling the connective position of switches SW 1  and SW 2 . Before power is applied to GFCI  11 , solenoid SOL 1  positions switches SW 1  and SW 2  in their first connective position. After power is applied to GFCI  11 , switches SW 1  and SW 2  will remain in their first connective position. When solenoid SOL 1  is energized, solenoid SOL 1  positions switches SW 1  and SW 2  in their second connective position. It should be noted that the particular construction of solenoid SOL 1  is unique for conventional GFCI devices. In particular, SOL 1  is significantly small in size and requires less power than most solenoids used in prior art GFCI devices. Specifically, solenoid SOL 1  has a coil resistance of substantially 2400 ohms. 
         [0041]    As a result of the unique construction of solenoid SOL 1 , line voltage (approximately 120 volts) must be directly supplied to solenoid SOL 1  in order to initially energize solenoid SOL 1  from its de-energized state. But more importantly, once energized, a constant voltage of only approximately 28 volts is required to be supplied to solenoid SOL 1  in order to keep it in its energized state. 
         [0042]    As will be discussed in detail below, booster circuit  19  is responsible for providing the line voltage to initially energize solenoid SOL 1  from its de-energized state and power supply circuit  17  is responsible fir supplying the constant voltage of approximately 28 volts to maintain solenoid SOL 1  in its energized state. The reduction in the voltage required to maintain solenoid SOL 1  in its energized state (approximately 92 volts) significantly reduces the power drain of SOL 1  in circuit  11  and also reduces heat build-up which could cause solenoid SOL 1  to burn out. 
         [0043]    Transistor Q 1  is may be any suitable transistor such as, for example, an MPSA42 transistor sold by Motorola Corporation and acts to control the current supplied to energize solenoid SOL 1 . When transistor Q 1  is off, current cannot flow through solenoid SOL 1 . On the other hand, when transistor Q 1  is on, current can flow through solenoid SOL 1 . Load resistor R 3  has a value of 4.7 K ohms and acts to control a rectifier to be described in detail below) in latch circuit  23 . Voltage divider resistors R 4  and P 5  each have a value of 22 K ohms and together act to provide the necessary base current to enable transistor Q 1  to turn on. Noise suppression capacitor C 5  has a value of 0.1 uF and acts to filter out noise in GFCI  11 . 
         [0044]    Power supply circuit  17  acts to provide power for GFCI circuit  11 . Power supply circuit  17  comprises a metal oxide varistor MOV 1 , a silicon rectifier D 1 , a voltage dropping resistor R 8 , a filter capacitor C 7 , a bleeder resistor R 7 , a silicon rectifier D 2  and a silicon rectifier D 4 . Varistor MOV 1  has a value of 150 volts and acts to protect against a voltage surge from the AC power source. Silicon rectifier D 1  may be any suitable device such as an IN4005 and acts to convert the AC current in the line from the power source into a DC current. Voltage dropping resistor R 8  has a value of 5.1 K ohms and acts to limit the constant input voltage supplied to solenoid SOL 1  for the reasons noted above. Specifically, resistor R 8  drops the line voltage in the line to approximately 28 volts before it is directly supplied to solenoid SOL 1 . 
         [0045]    Filter capacitor C 7  has a value of 22 uF and acts to filter the constant voltage supplied to solenoid SOL 1 . Bleeder resistor R 7  has a value of 100 K ohms and acts to bleed the charge of capacitor C 7  when the load is unplugged from the power source. Silicon rectifier D 2  may be any suitable device such as a IN4005 and acts to prevent the DC voltage surge provided by booster circuit  19  (which will be discussed in detail below) from entering into in other parts of GFCI  11 . Silicon rectifier D 4  is preferably an IN4005 and acts as a voltage regulator for solenoid SOL 1  and also acts to speed up the charge in filter circuit  25  for quick filtering. 
         [0046]    Booster circuit  19  acts to provide a temporary voltage sufficient to initially energize solenoid SOL 1  from its de-energized state. Booster circuit  19  comprises a silicon rectifier D 3  and a surge limit resistor R 9 . Rectifier D 3  is preferably an IN4005 and acts to convert the AC power in the line of the power source to DC power. When switch SW 1  is in its first position and upon the application of power to GECI  11 , rectifier D 3  provides an instant DC voltage to solenoid SOL 1  causing solenoid SOL 1  to energize which, in turn, causes solenoid SOL 1  to move switches SW 1  and SW 2  to their second connective position. When switches SW 1  and SW 2  are moved to their second connective position, booster circuit  19  is disconnected from the power source. Resistor R 9  has a value of 47 ohms and acts to protect rectifier D 3  and capacitor C 7  from over-currents. 
         [0047]    Fault detection circuit  21  acts to detect both ground fault and grounded neutral conditions in the conductive lines when switches SW 1  and SW 2  are in their second connective position. Fault detection circuit  21  comprises a sense transformer T 1 , a grounded neutral transformer T 2 , a coupling capacitor C 1 , a pair of noise suppression capacitors C 2  and C 8 , a feedback resistor R 2  and a ground taint interrupter chip U 1 . Transformer T 1  may be any suitable transformer such as, for example, C-5029-01-00 transformer sold by Magnetic Metals; and, transformer T 2  may be any suitable transformer such as, for example, F-30060-01 transformer sold by Magnetic Metals. Sense transformer T 1  senses the current differential between the line and neutral conductive lines, and upon the presence of a ground fault condition, transformer T 1  induces an associated output from its secondary windings. Grounded neutral transformer T 2  acts in conjunction with transformer T 1  to sense the presence of grounded neutral conditions and, in turn, induce an associated output. Coupling capacitor C 1  has a value of 47 uF and acts to couple the AC signal from the secondary winding of transformer T 1  to chip U 1 . 
         [0048]    Noise suppression capacitor C 2  has a value of 4700 pF and noise suppression capacitor C 8  has a value of 1000 pF. Together capacitors C 2  and C 8  act to prevent fault detection circuit  21  from operating in response to line disturbances such as electrical noise and lower level faults. Tuning capacitor C 3  has a value of 0.033 uF and feedback resistor has a value of 909 K ohms. Together capacitor C 3  and resistor R 2  act to set the minimum fault current at which fault detection circuit  21  provides an output signal to latch circuit  23 . Interrupter chip U 1  may be any suitable interrupter chip such as, for example, RV4145 low power ground fault interrupter circuit sold by Raytheon Corporation. Chip U 1  serves to amplify the fault signal generated by transformer T 1  and provide an output pulse on pin  5  to activate latch circuit  23 . 
         [0049]    Latch circuit  23  acts to take the electrical signal produced by fault detection circuit  21  upon the detection of a ground fault or grounded neutral condition and, in turn, de-energize solenoid SOL 1 . Latch circuit  23  comprises a silicon controlled rectifier SCR 1  operable in either a conductive or a non-conductive state, a noise suppression capacitor C 4  and a reset switch SW 4 . Rectifier SCR 1  may be any suitable rectifier such as, for example, an EC103A rectifier sold by Teccor Corporation and acts to selectively turn on and off transistor Q 1  in relay circuit  15 . Noise suppression capacitor C 4  has a value of 2.2 uF and acts in preventing rectifier SCR 1 , when in its nonconductive state, from firing as a result of electrical noise in circuit  11 . Reset switch SW 4  acts when depressed to remove holding current from the anode of rectifier SCR 1 , causing rectifier SCRI to turn off when it is in its conductive state. 
         [0050]    Filter circuit  25  acts to smooth out the varying DC voltage provided from the power supply and provide a filtered DC voltage to the power input of chip U 1 . Filter circuit  25  includes a voltage dropping resistor R 6  which preferably has a value of 18 K ohms and acts to regulate the appropriate voltage supplied to chip U 1 . Filter circuit  25  also includes a DC filter capacitor C 6  which preferably has a value of 3.3 uF and acts to filter the ripple of the voltage supplied to chip U 1 . 
         [0051]    Test circuit  27  provides a means of testing whether circuit  11  is functioning properly. Test circuit  27  comprises a current limiting resistor R 1  having a value of 15 K ohms and a test switch SW 3  of conventional -push-in type design. When SW 3  is depressed to energize test circuit  27 , resistor R 1  provides a simulated fault current to transformer T 1  which is similar to a ground fault condition. 
         [0052]    In use, GFCI  11  functions in the following manner. Prior to initial connection, switches SW 1  and SW 2  are normally in their first connective position as shown in  FIG. 1 . Upon initial connection of GFCI  11  at one end to the load and at the other end to the power source, line voltage of approximately 120 volts is applied to solenoid SOL 1  through booster circuit  19  and energizes solenoid SOL 1 . Once solenoid SOL 1  is energized, solenoid SOL 1  causes switches SW 1  and SW 2  to move into their second connective position (opposite the position shown in  FIG. 1 ), thereby eliminating the supply of power into solenoid SOL 1  from booster circuit  19 . However, since a constant 28 volts is supplied to solenoid SOL 1  from power supply circuit  17 , solenoid SOL 1  is maintained in its energized state. 
         [0053]    With solenoid SOL 1  maintained in its energized state, rectifier SCR 1  is in a non-conductive state and transistor Q 1  is on, which enables current to pass to solenoid SOL 1 . Upon the detection of a ground fault or grounded neutral condition, fault detection circuit  21  sends a current to rectifier SCR 1  causing rectifier SCR 1  to be in a conductive state which, in turn, turns off transistor Q 1 . With transistor Q 1  off, current does not pass to solenoid SOL 1  and therefore solenoid SOL 1  becomes de-energized. Once de-energized, solenoid SOL 1  causes switches SW 1  and SW 2  to return to its first connective position, thereby cutting off power from the power source to the load. 
         [0054]    Once the fault condition is removed, circuit  11  can be reset by manually depressing switch SW 4 . Depression of switch SW 4  causes current to pass through reset switch SW 4  instead of rectifier SCR 1 , which turns off rectifier SCR 1 . This, in turn, turns transistor Q 1  back on which enables solenoid SOL 1  to become re-energized. With the load plugged into the power source, if there is a loss of power at the power source, solenoid SOL 1  will become de-energized, moving switches SW 1  and SW 2  back to their first connective position. When power is subsequently restored, solenoid SOL 1  will become re-energized again, which causes switches SW 1  and SW 2  to move to their second position. 
         [0055]      FIG. 13  shows another ground fault circuit interrupter (GFCI) constructed according to the teachings of the present invention, the GFCI being represented generally by reference numeral  31 . GFCI  31  is automatically set to protect a load from ground fault conditions upon the initial plugging in of the load to a power source. GFCI  31  is also automatically set to protect the load from ground fault conditions once power is restored to the power source after a loss of power. Furthermore, one GFCI  31  protects the load from a ground fault condition, GFCI  31  can be manually reset to protect against further ground fault conditions. 
         [0056]    GFCI  31  is similar in construction to GFCI  11 , with the exception being the connection of the reset switch SW 4  and the connection of bleeder resistor R 7 . In latch circuit  23  of GFCI  11 , reset switch SW 4  is connected in parallel with rectifier SCR 1  across its anode to its cathode. To the contrary, in latch circuit  33  of GFCI  31 , reset switch SW 4  is connected in series with rectifier SCR 1 , one end of switch SW 4  being connected to the anode of rectifier SCR 1  and the other end being connected to switch SW 2 . In GFCI  11 , bleeder resistor R 7  is connected to the positive terminal of filter capacitor C 7  and switch SW 2 . To the contrary, in GFCI  31 , bleeder resistor R 7  is connected to the positive terminal of filter capacitor C 7  and the neutral conductive line. 
         [0057]    In use, GFCI  31  functions in a similar manner to GFCI  11 . In both GFCI  11  and GFCI S  31 , if a ground fault condition is detected by the fault detection circuit, silicon controlled rectifier SCR 1  turns on, which turns off transistor Q 1  which, in turn, de-energizes solenoid SOL 1 . However, if the ground fault condition remains in the pair of conductive lines and continues to be detected by fault detection circuit  21 , GFCI  11  and GFCI  31  function differently. Specifically, if reset switch SW 4  in GFCI  11  is depressed while in this condition, rectifier SCR 1  will be turned off for so long as switch SW 4  is depressed. This causes transistor Q 1  to temporarily turn on which, in turn, energizes solenoid SOL 1  while the around fault condition still exits in the pair of conductive lines. This results in a potentially dangerous situation for the user. 
         [0058]    To the contrary, if reset switch SW 4  in GFCI  31  is depressed while in this condition, rectifier SCR 1  will remain turned on for as long as the condition remains, regardless of whether switch SW 4  is depressed. This prevents solenoid SOL 1  from ever becoming re-energized while the ground fault condition remains in the conductive lines, thereby eliminating the potentially dangerous situation. 
         [0059]      FIG. 14  shows another Ground fault circuit interrupter (GFCI) constructed according to the teachings of the present invention, the GFCI being represented generally by reference numeral  41 . GFCI  41  is automatically set to protect a load from ground fault conditions upon the initial plugging in of the load to a power source. GFCI  41  is also automatically set to protect the load from ground fault conditions once power is restored to the power source after a loss of power. Furthermore, once GFCI  41  protects the load from a ground fault condition, GFCI  41  can be manually reset to protect against further around fault conditions. GFCI  41  includes a circuit breaker  33 , a relay circuit  35 , a power supply circuit  17 , a booster circuit  19 , a fault detection circuit  21 , a latch circuit  23 , a filter circuit  25  and a test circuit  27 . GFCI  41  differs from GFCI  11  only in the type of one switch used in the circuit breaker and in the value of the capacitor in the relay circuit. 
         [0060]    Specifically, in GFCI  41 , circuit breaker  33  includes a single-pole, double-throw switch SW 1  and a normally open single-pole, single-throw switch SW 21 . When switch SW 21  is open, as illustrated in  FIG. 14 , the neutral conductive line from the power source is not connected to the load. Whereas, when switch SW 21  is closed, the neutral conductive line from the power source is connected to the load. To the contrary, in circuit breaker  13  in GFCI  11  both switches SW 1  and SW 2  are single-pole, single-throw switches. Additionally, noise suppression capacitor C 15  in relay circuit  35  of GFCI  41  has a value of 1 uF whereas capacitor C 5  in relay circuit  19  has a value of 0.1 uF. 
         [0061]      FIG. 15  shows another ground fault circuit interrupter (GFCI) constructed according to the teachings of the present invention, the GFCI being represented generally by reference numeral  51 . As will be discussed in detail below, GFCI  51  requires manual depression of a reset switch in order to protect a load from ground fault conditions upon the initial plugging in of the load to a power source. GFCI  51  also requires manual depression of a reset switch in order to protect the load from ground fault conditions once power is restored to the power source after a loss of power. Furthermore, once GFCI  51  protects the load from a ground fault condition, GFCI  51  requires a manual reset to protect against further ground fault conditions. 
         [0062]    GFCI  51  comprises a circuit breaker  53 , a relay circuit  55 , a power supply circuit  57 , a booster circuit  59 , a fault detection circuit  61 , a filter circuit  63  and a test circuit  65 . Fault detection circuit  61 , filter circuit  63  and test circuit  65  are identical in construction and function to fault detection circuit  21  filter circuit  25  and test circuit  27 , respectively. 
         [0063]    Circuit breaker  53  differs from circuit breaker  13  only in that switch SW 32  of circuit breaker  53  is a normally open single-pole, single-throw switch whereas switch SW 2  in GFCI  11  is a single-pole, double-throw switch. Switch SW 32  is positionable in either of two positions, namely, a first position in which it is open, as illustrated in  FIG. 4 , such that the AC power from the power source is disconnected to the load and a second position in which it is closed, such that the AC power from the power source is connected to the load. Relay circuit  55  resembles a hybrid of relay circuit  15  and latch circuit  23  of GFCI  11 . Specifically, relay circuit  55  comprises a solenoid SOL 31 , a transistor Q 31 , a silicon controlled rectifier SCR 31 , a load resistor R 33 , a bias resistor R 34  and a noise suppression capacitor C 34 . 
         [0064]    Solenoid SOL 31  is identical in construction and function to solenoid SOL 1 . Transistor Q 31  may be any suitable device such as a 2N2222 transistor and acts to control the current supplied to rectifier SCR 31 . Rectifier  31  may be any suitable device such as a EC 103 D rectifier manufactured by Teccor and acts in controlling whether current is supplied to solenoid SOL 31 . Load resistor R 33  is preferably 39 K ohms and acts to provide collector voltage to transistor Q 31 . Bias resistor R 34  is preferably 10 K ohms and acts, in association with resistor R 3 , to bias gate current to rectifier SCR 31 . Noise suppression capacitor C 34  is preferably 2.2 uF and acts to prevent transistor Q 31  from conducting as a result of electrical noise in the circuit. 
         [0065]    Power supply circuit  57  is identical to power supply circuit  17  with the exception being that circuit  57  does not include the bleeder resistor R 7  present in circuit  17 . Booster circuit  59  is identical to booster circuit  19  with the sole exception being that in circuit  51 , reset switch SW 4  is located in booster circuit  59 , whereas in circuit  11  reset switch SW 4  is located in latch circuit  23 . The relocation of reset switch SW 4  in booster circuit  59  enables circuit  51  to function as a manually operable GFCI device, as will be described in detail below. 
         [0066]    In use, GFCI  51  functions in the following manner. Prior to initial connection, switches SW 1  and SW 32  are normally in their first connective position as shown in  FIG. 1 . Upon initial connection of GFCI  51  at one end to the load and at the other end to the power source, switches SW 1  and SW 32  remain in their first position. With switches SW 1  and SW 32  in their first position, as shown in  FIG. 4 , switch SW 1  is connected to terminal A in switch SW 4  through line  66 . When reset switch SW 4  is depressed, line voltage passes through booster circuit  59  into solenoid SOL 31 , the line voltage of approximately 120 volts energizing the solenoid. Once solenoid SOL 31  is energized, solenoid SOL 31  causes switches SW 31  and SW 32  to move into their second connective position (opposite the position shown in  FIG. 4 ), thereby eliminating the supply of power into solenoid SOL 31  from booster circuit  59 . However, since line voltage is converted into 28 volts by power supply circuit  57  and is constantly supplied to solenoid SOL 31 , solenoid SOL 31  is maintained in its energized state. 
         [0067]    With solenoid SOL 31  maintained in its energized state, rectifier SCR 31  is in a conductive state and transistor Q 31  is off, which enables current to pass to solenoid SOL 31 . Upon the detection of a ground fault or grounded neutral condition, fault detection circuit  61  sends current to transistor Q 31  which turns transistor Q 31  on and, in turn, turns off rectifier SCR 31 . With rectifier SCR 31  off, current does not pass into solenoid SOL 31 , causing solenoid SOL 31  to become de-energized. Once de-energized, solenoid SOL 31  causes switches SW 1  and SW 32  to return to their first position, thereby cutting off the supply of power from the power source to the load. Once the fault condition is removed, circuit  51  can be reset by depressing, reset switch SW 34  and the cycle repeats. 
         [0068]      FIG. 16  shows another ground fault circuit interrupter (GFCI) constructed according to the teachings of the present invention, the GPCI being represented generally by reference numeral  71 . GFCI  71  is automatically set to protect a load from ground fault conditions upon the initial plugging in of the load to a power source. GFCI  71  is also automatically set to protect the load from ground fault conditions once power is restored to the power source after a loss of power. Furthermore, once GFCI  71  protects the load from a ground fault condition, GFCI  71  can be manually reset to protect against further ground fault conditions. 
         [0069]    GFCI  71  is similar in construction to GFCI  11 . GFCI  71  comprises a circuit breaker  73 , a relay circuit  75 , a power supply circuit  77 , a booster circuit  79 , a fault detection circuit  81 , a filter circuit  83  and a test circuit  85 . GFCI  71  additionally includes a trip indicating circuit  87 . Circuit breaker  73 , fault detection circuit  81 , filter circuit  83  and test circuit  85  are identical in construction and function to circuit breaker  13 , fault detection circuit  21 , filter circuit  25  and test circuit  27 , respectively. Relay circuit  75  resembles a hybrid, of relay circuit  15  and latch circuit  23  of GFCI  11 . Specifically, relay circuit  75  comprises a solenoid SOL 41 , a first transistor Q 41 , a second transistor Q 42 , a reset switch SW 44 , a load resistor R 45 , a feedback resistor R 44 , an input resistor R 43  and a noise suppression capacitor C 44 . 
         [0070]    Solenoid SOL 41  is identical in construction and function to solenoid SOL 1 . First transistor Q 41  may be any suitable device such as an MPSA42 transistor and acts to control the current supplied to second transistor Q 42 . Second transistor Q 42  may be any suitable device such as a MPSA42 transistor and acts to control the current supplied to solenoid SOL 41 . Reset switch SW 44  is a normally closed, pull-open type switch which connects solenoid SOL 41  to second transistor Q 42 . Load resistor R 45  is preferably 100 K ohms and acts to provide the required collector voltage for first transistor Q 41 . Feedback resistor R 44  is preferably 68 K ohms and acts to provide base current to first transistor Q 41 . Input resistor R 43  is preferably 2 K ohms and acts, in association with resistor R 44 , to bias the gate current to first transistor Q 41 . Noise suppression capacitor C 44  is preferably 2.2 uF and acts to prevent first transistor Q 41  from conducting as a result of electrical noise in the circuit. 
         [0071]    Power supply circuit  77  is identical to power supply circuit  17  with the exception being that circuit  77  does not include the bleeder resistor R 7  or the rectifier D 4  present in circuit  17 . Trip indicating circuit  87  provides a means of visual indication that the GFCI has tripped in response to a ground fault or grounded neutral condition. Trip indicating circuit  87  includes a silicon rectifier D 44 , a light emitting diode LED 41  and a current limiting resistor R 48 . Rectifier D 44  may be any suitable device such as an IN4004 rectifier and acts to convert the AC power of the line to DC power for diode LED 41 . Diode LED 41  provides visual indication by means of a light that circuit  71  has tripped. 
         [0072]    Resistor R 48  is preferably 47 K ohms and acts to limit the current which passes to diode LED 41 . In use, GFCI  71  functions in the following manner. Prior to connection, switches SW 1  and SW 2  are in their first connective position as shown in  FIG. 16 . Upon initial connection of GFCI  71  at one end to the load and at the other end to the power source, line voltage is supplied into booster circuit  79 , which, in turn passes through resistor R 9  and rectifier D 3  into solenoid SOL 41 , the line voltage of approximately 120 volts energizing the solenoid. Once solenoid SOL 4 I is energized, solenoid SOL 41  causes switches SW 1  and SW 2  to move into their second connective position (opposite the position shown in  FIG. 5 ), thereby eliminating the supply of power into solenoid SOL 41  from booster circuit  79 . However, since line voltage is converted into 28 volts by power supply circuit  77  and is constantly supplied to solenoid SOL 41 , solenoid SOL 41  is maintained in its energized state. 
         [0073]    With solenoid SOL 41  maintained in its energized state, first transistor Q 41  is off and second transistor Q 42  is on, thereby enabling current to pass into solenoid SOL 41  to keep it in its energized state. Upon the detection of a ground fault or grounded neutral condition, fault detection circuit  81  sends a current to first transistor Q 41  turning it on which, in turn, turns off second transistor Q 42 . With second transistor Q 42  off, current does not pass through solenoid SOL 41 , causing solenoid SOL 41  to become de-energized. Once de-energized, solenoid SOL 41  causes switches SW 1  and SW 2  to return to their first connective position, thereby cutting off power from the power source to the load. 
         [0074]    With switches SW  1  and SW 2  in their first connective position, line voltage passes into trip indicating circuit  87  which, in turn, causes light emitting diode LED 41  to light up, thereby indicating that circuit  71  has been tripped. Once the fault condition is removed, circuit  71  can be reset by pulling open reset switch SW 44 . Opening of switch SW 44  turns off first transistor Q 1 , which enables solenoid SOL 1  to become re-energized and the cycle repeats. 
         [0075]      FIG. 17  shows another ground fault circuit interrupter (GFCI) constructed according to the teachings of the present invention, the GFCI being represented generally by reference numeral  91 . As will be discussed in detail below, GFCI  91  requires manual depression of a reset switch in order to protect a load from ground limit conditions upon the initial plugging in of the load to a power source. GFCI  91  also requires manual depression of a reset switch in order to protect the load from ground fault conditions once power is restored to the power source after a loss of power. Furthermore, once GFCI  91  protects the load from a ground fault condition, GFCI  91  requires a manual reset to protect against further ground fault conditions. 
         [0076]    GFCI  91  is similar in construction to GFCI  11 . GFCI  91  includes a circuit breaker  93 , a relay circuit  95 , a power supply circuit  97 , a fault detection circuit  99 , a bi-stable electronic latch circuit  101 , a filter circuit  103  and a test circuit  105 . Fault detection circuit  99 , latch circuit  101  and test circuit  105  are identical in construction and function to fault detection circuit  21 , latch circuit  23  and test circuit  27 , respectively. 
         [0077]    Circuit breaker  93  differs from circuit breaker  13  in that switches SW 51  and SW 52  in circuit breaker  93  are both normally open, single-pole, single-throw switches rather than the single-pole, double-throw switches SW 1  and SW 2  found in circuit breaker  13 . Switches SW 51  and SW 52  are positionable in either of two positions; a first position in which switches SW 5 I and SW 52  are open, as illustrated in  FIG. 17 , such that the AC power from the power source is disconnected to the load, and a second position in which switches SW 51  and SW 52  are both closed, such that the AC power from the power source is connected to the load. 
         [0078]    Relay circuit  95  is identical to relay circuit  15  except with regard to the values of the solenoid, the load resistor and the noise suppression capacitor. In particular, solenoid SOL 51  has a coil resistance of 800 ohms, load resistor R 53  has a value of 10 K ohms and noise suppression capacitor C 55  has a value of 1 uF. Due to the increase in size in solenoid SOL 51 , solenoid SOL 51  requires line voltage to both initially energize solenoid SOL 51  and maintain solenoid SOL 51  in its energized state. 
         [0079]    Power supply circuit  97  comprises a metal oxide varistor MOV 1 , four silicon rectifiers D 1 , D 2 , D 3  and D 4 , a voltage dropping resistor R 57  and a storage capacitor C 57 . Rectifiers D 1 -D 4  together form a conventional diode rectifier bridge to convert the AC power from the line into DC power. Voltage dropping resistor R 57  has a value of preferably 5.1 K ohms and acts to limit the input voltage to solenoid SOL 51  in order to prevent solenoid SOL 51  from closing the circuit breaker contacts from their normally open position. Storage capacitor C 57  has a value of preferably 22 uF and acts to charge to full line potential when transistor Q 1  turns off, as will be described in detail below. 
         [0080]    Filter circuit  103  is identical to filter  25  except in regards to the value of the voltage dropping resistor. Specifically, resistor R 56  preferably has a value of 24 K ohms. In use, GFCI  91  functions in the following manner. Prior to connection, switches SW 51  and SW 52  are in their first connective position as shown in  FIG. 17 . Upon initial connection of GFCI  91  at one end to the load and at the other end to the power source, the voltage applied to solenoid SOL 51  by power supply  97  through resistor R 57 , approximately 40 volts, is not enough voltage to energize solenoid SOL 51 . Once reset switch SW 4  is depressed without being released, transistor Q 1  turns off. With transistor Q 1  turned off, current can not pass to solenoid SOL 51  through resistor R 57 . This, in turn, causes capacitor C 57  to instantaneously charge up to full line voltage. 
         [0081]    Upon the release of the depression of switch SW 4 , transistor Q 1  turns back on and starts to conduct which, in turn, causes capacitor C 57  to dump its charged up line voltage of 120 volts into solenoid SOL 51 . This causes solenoid SOL 51  to become energized which causes switches SW 51  and SW 52  to be moved into their second position (opposite the position shown in  FIG. 17 ), thereby connecting the power source to the load. 
         [0082]    Upon the detection of a ground fault or grounded neutral condition, fault detection circuit  99  sends a current to rectifier SCR 1  which, in turn, turns off transistor Q 1 . With transistor Q 1  off, current does not pass through solenoid SOL 51  and solenoid SOL 51  becomes de-energized. Once dc-energized, solenoid SOL  51  causes switches SW 51  and SW 52  to be returned to their first positions, thereby cutting off power from the power source to the load. Once the fault condition is removed, circuit  91  can be reset by depressing, switch SW 4  and the cycle repeats. 
         [0083]      FIG. 18  shows another ground fault circuit interrupter (GFCI) constructed according to the teachings of the present invention, the GFCI being represented generally by reference numeral  111 . GFCI  111  is automatically set to protect a load from ground fault conditions upon the initial plugging in of the load to a power source. GFCI  111  is also automatically set to protect the load from ground fault conditions once power is restored to the power source after a loss of power. Furthermore, once GFCI  111  protects the load from a ground fault condition, GFCI  111  can be manually reset to protect against further ground fault conditions. 
         [0084]    GPCI  111  is similar in construction to GFCI  91 . GFCI  111  comprises a circuit breaker  113 , a relay circuit  115 , a power supply circuit  117 , a fault detection circuit  119 , a latch circuit  121 , a filter circuit  123  and a test circuit  125 . GFCI  111  additionally includes a trip indicating circuit  127 . Fault detection circuit  119 , latch circuit  121 , filter circuit  123  and test circuit  125  are identical in construction and function to fault detection circuit  99 , latch circuit  101 , filter circuit  103  and test circuit  105 , respectively. 
         [0085]    Circuit breaker  113  differs from circuit breaker  93  in that switches SW 61  and SW 62  of circuit breaker  113  are not single-pole, single-throw switches as in circuit breaker  93  but rather are both single-pole, double-throw switches positionable in either of two positions, namely a first position, as illustrated in  FIG. 18 , in which the AC power from the power source is disconnected to the load and instead is connected to trip indicating circuit  127 , and a second position, opposite the position illustrated in  FIG. 18 , in which the AC power from the power source is connected to the load. 
         [0086]    Relay circuit  115  is identical to relay circuit  95  with the exception of the value of the load resistor. Specifically, load resistor R 63  preferably has a value of 4.7 K ohms. Power supply circuit  117  is identical to power supply circuit  97  with the exception being that circuit  117  does not include the voltage dropping resistor R 57  and the storage capacitor C 57  found in circuit  97 . 
         [0087]    Trip indicating circuit  127  provides a means of visual indication that the GFCI has tripped in response to a ground fault or grounded neutral condition. Trip indicating circuit  127  includes a silicon rectifier D 65 , a flashing light emitting diode LED 61  and a current limiting resistor R 67 . Rectifier D 65  may be any suitable device such as an IN4004 rectifier and acts to convert the AC power of the line to DC power for diode LED 61 . Diode LED 61  provides a flashing visual indication by means of a light that circuit  111  has tripped. Resistor R 67  is preferably 33 K ohms and acts to limit the current which passes to diode LED 61 . 
         [0088]    In use, GFCI  111  functions in the following manner. Prior to connection, switches SW 61  and SW 62  are in their first connective position as shown in  FIG. 18 . Upon initial connection of GFCI  111  at one end to the load and at the other end to the power source, line voltage from the power source is disconnected from the load and rectifier SCR 1  is turned off since no base current is applied to rectifier SCR 1  from chip U 1 . At the same time, base current is applied to transistor Q 1  from power supply  117  through resistors R 63 , R 56  and R 4 , turning transistor Q 1  on. Also, at the same time, 120 volts DC from power supply circuit  117  is supplied into solenoid SOI 51  causing solenoid SOIL 51  to become energized and moving switches SW 61  and SW 62  into their second position (opposite the position shown in  FIG. 18 ), thereby enabling power to be supplied into the load. 
         [0089]    With solenoid SOL 51  in its energized state and transistor Q 1  on, solenoid SOL 51  is kept in its energized state by 120 volts DC from power supply  117 . Upon the detection of a ground fault or grounded neutral condition, fault detection circuit  119  sends a base current to rectifier SCR 1  from pin  5  in chip U 1  which turns on rectifier SCR 1  and which, in turn, turns off transistor Q 1 . With transistor Q 1  off, current does not pass through solenoid SOL 51 , causing solenoid SOL 51  to become de-energized. Once de-energized, solenoid SOL 51  causes switches SW 61  and SW 62  to return to their first connective position, thereby cutting off power from the power source to the load. 
         [0090]    With switches SW 61  and SW 62  in their first connective position, line voltage passes into trip indicating circuit  127  which in turn, causes light emitting diode LED 61  to light up and flash, thereby indicating that circuit  111  has been tripped. Once the fault condition is removed, circuit  111  can be reset by depressing reset switch SW 4 . Depression of switch SW 4  turns off rectifier SCR 1 , which allows transistor Q 1  to be turned on enabling solenoid SOL 51  to become re-energized. 
         [0091]      FIG. 19  shows another ground fault circuit interrupter (GFCI) constructed according to the teachings of the present invention, the GFCI being represented generally by reference numeral  131 . GFCI  131  is similar to GFCI  111  except for the trip indicating circuit. In particular, instead of the trip indicating circuit containing an LED as in GFCI  111 , trip indicating circuit  132  in GFCI  131  includes a piezo buzzer  133  for providing an audio signal indicating a fault rather than a visual signal. 
         [0092]      FIG. 20  shows another ground fault circuit interrupter (GFCI) constructed according to the teachings of the present invention, the GFCI being represented generally by reference numeral  141 . GFCI  141  is automatically set to protect a load from ground fault conditions upon the initial plugging in of the load to a power source. GFCI  141  is also automatically set to protect the load from ground fault conditions once power is restored to the power source after a loss of power. Furthermore, once GFCI  141  protects the load from a ground fault condition, GFCI  141  can be manually reset to protect against further ground fault conditions. 
         [0093]    GFCI  141  is similar in construction to GFCI  11 , with the exception being the connection of a trip indicating circuit  21 A to fault detection circuit  21 , the removal of noise suppression capacitor C 2  from fault detection circuit  21 , and a power supply circuit  17 A that requires fewer components. In use, GFCI  141  functions in a similar manner to GFCI  11 . In both GFCI  11  and GFCI  141 , if a ground fault condition is detected by the fault detection circuit, silicon controlled rectifier SCR 1  turns on, which turns off transistor Q 1  which, in turn, de-energizes solenoid SOL 1 . However, trip indicating circuit  21 A provides a visual means of indication that the GFCI has tripped in response to a ground fault or ground neutral condition. Trip indicating circuit  21 A includes a silicon rectifier D 21 , a light emitting diode LED 21 , and a current limiting resistor R 10 . Rectifier D 21  may be any suitable device such as an IN4148 rectifier and acts to convert the AC power of the line to DC power for diode LED 21 . Diode LED 21  provides visual indication by means of a light that circuit  141  has tripped. Resistor R 10  is preferably 15K-47 K ohms and acts to limit the current which passes to diode LED 21 . 
         [0094]      FIG. 21  shows another ground fault circuit interrupter (GFCI) constructed according to the teachings of the present invention, the GFCI being represented generally by reference numeral  151 . GFCI  151  is automatically set to protect a load from ground fault conditions upon the initial plugging, in of the load to a power source. GFCI  151  is also automatically set to protect the load from ground fault conditions once power is restored to the power source after a loss of power. Furthermore, once GFCI  151  protects the load from a ground fault condition, GFCI  151  can be manually reset to protect against further ground fault conditions. GFCI  151  is similar in construction to GFCI  141 , with the exception being the addition of an RC Pulse Circuit  24 . In use, GFCI  151  operates in the following manner. Prior to initial connection, switches SW 1  and SW 2  are normally in their first connective position as shown in  FIG. 21 . Upon initial connection of GFCI  151  at one end to the load and at the other end to the power source (Power-up), line voltage of approximately 120 volts is applied to solenoid SOL 1  through booster circuit  19  and energizes solenoid SOL 1 . Once solenoid SOL 1  is energized, solenoid SOL 1  causes switches SW 1  and SW 2  to move into their second connective position (opposite the position shown in  FIG. 21 ), thereby eliminating the supply of power into solenoid SOL 1  from booster circuit  19 . Without RC Pulse Circuit  24 , a constant 28 volts is supplied to solenoid SOL 1  from power supply circuit  17 , and solenoid SOL 1  is maintained in its energized state. 
         [0095]    However, RC Pulse Circuit  24  initially pulses on SCR 1  (upon Power-up), causing rectifier SCR 1  to be in a conductive state, which, in turn turns off transistor Q 1  which inhibits current from flowing through Solenoid SOL 1 . Therefore, upon connection of GFCI  151  at one end to the load and at the other end to the power source the GFCI would remain in their first connective position as shown in  FIG. 21 . The GFCI  151  would then require a manual reset through switch SW 4  to move switches SW 1  and SW 2  into their second connective state enabling current to pass to solenoid SOL 1 . 
         [0096]    Upon the detection of a ground fault or grounded neutral condition, fault detection circuit  21  sends a current to rectifier SCR 1  causing rectifier SCR 1  to be in a conductive state which, in turn, turns off transistor Q 1 . With transistor Q 1  off, current does not pass to solenoid SOL 1  and therefore solenoid SOL 1  becomes de-energized. Once de-energized, solenoid SOL 1  causes switches SW 1  and SW 2  to return to its first connective position, thereby cutting off power from the power source to the load. RC Pulse Circuit  24  includes capacitor C 9  preferably between 0.1 and 22 uf and resistor R 13  preferably between 900 K ohms and 2 megaohms. After manual reset of SW 4 , the RC Pulse circuit maintains a voltage on PIN  5  of U 1 . Upon the detection of a ground fault or grounded neutral condition, fault detection circuit  21  sends a base current to rectifier SCR 1  from pin  5  in chip U 1  which turns on rectifier SCR 1  and which, in turn, turns off transistor Q 1 . The added voltage on PIN  5  due to the RC Circuit acts to trigger SCR 1  quicker since the gate voltage on SCR 1  would already be part of the way to its shutoff value. 
         [0097]      FIG. 22  shows another ground fault circuit interrupter (GFCI) constructed according to the teachings of the present invention, the GFCI being represented generally by reference numeral  161 . GFCI  161  is automatically set to protect a load from ground fault conditions upon the initial plugging in of the load to a power source. GFCI  161  is also automatically set to protect the load from ground fault conditions once power is restored to the power source after a loss of power. Furthermore, once GFCI  161  protects the load from a ground fault condition, GFCI  161  can be manually reset to protect against further ground fault conditions. 
         [0098]    GFCI  161  is similar in construction to GFCI  151 , with the exception being the addition of a passive ferrite bead F 1  for RF Suppression. Ferrite bead F 1  helps to prevent unwanted RF noise from being coupled into pin  1  of U 1 , and also the inverting input of the Op Amp internal to U 1  (see  FIG. 23 ). RF noise presented to the inverting input of Op Amp (pin  1  of U 1 ) may be amplified sufficiently to trigger one of the comparator amplifiers shown in  FIG. 23 , thereby outputting an unwanted SCR trigger signal on pin  5 . It will be appreciated that any suitable passive electric component may be used to suppress unwanted frequency noise. It is further understood that ferrite bead F 1  could be added to any other embodiments 1-21 previously disclosed. 
         [0099]    It should be understood that the foregoing description is only illustrative of the invention. Thus, various alternatives and modifications can be devised by those skilled in the art without departing from the invention. Accordingly, the present invention is intended to embrace all such alternatives, modifications and variances that fall within the scope of the appended claims.