Abstract:
A current supply is coupled to a light source. The current supply is further coupled to a controller. The controller is configured to provide a stochastic control signal to the current supply, wherein the stochastic control signal controls a light intensity output of the light source.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is a continuation of U.S. patent application Ser. No. 13/403,242, filed Feb. 23, 2012, now U.S. Pat. No. 8,476,846, issued Jul. 2, 2013, which is a continuation of U.S. patent application Ser. No. 11/598,981, filed Nov. 13, 2006, now U.S. Pat. No. 8,129,924, issued Mar. 6, 2012, all of which are incorporated by reference herein their entirety. 
    
    
     TECHNICAL FIELD 
     Embodiments of the present invention relate to the field of optical transducer control and, in particular, to the use of stochastic modulation waveforms for intensity control of light-emitting diodes. 
     BACKGROUND 
     Light-emitting diode (LED) technology has advanced to the point where LEDs can be used as energy efficient replacements for conventional incandescent and/or fluorescent light sources. One application where LEDs have been employed is in ambient lighting systems using white and/or color (e.g., red, green and blue) LEDs. Like incandescent and fluorescent light sources, the average intensity of an LED&#39;s output is controlled by the average current through the device. Unlike incandescent and fluorescent light sources, however, LEDs can be switched on and off almost instantaneously. As a result, their intensity can be controlled by switching circuits that switch the device current between two current states to achieve a desired average current corresponding to a desired intensity. This approach can also be used to control the relative intensities of red, green and blue (RGB) LED sources (or any other set of primary colors) in ambient lighting systems that mix primary colors in different ratios to achieve a desired color. 
     One approach to LED switching is described in U.S. Pat. Nos. 6,016,038 and 6,150,774 of Meuller et al. These patents describe the control of different LEDs with square waves of uniform frequency but independent duty cycles, where the square wave frequency is uniform and the different duty cycles represent variations in the width of the square wave pulses. The Meuller patents describe this as pulse width modulation (PWM). This type of control signal has high spectral content at the uniform frequency and its odd harmonics, which can cause electromagnetic interference (EMI) to sensitive devices, components, circuits and systems nearby. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  illustrates one embodiment of a stochastic signal density modulator for dimming control of an optical transducer; 
         FIG. 2  illustrates two waveforms corresponding to two different stochastic signal densities in one embodiment; 
         FIG. 3  illustrates the spectral signature of one embodiment of stochastic signal density modulation; 
         FIG. 4  illustrates the spectral signature of another embodiment of stochastic signal density modulation; and 
         FIG. 5  illustrates an electronic system for stochastic signal density modulation of optical transducers in one embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     Described herein are methods and apparatus for controlling optical transducers using stochastic signal density modulation. The following description sets forth numerous specific details such as examples of specific systems, components, methods and so forth, in order to provide a good understanding of several embodiments of the present invention. It will be apparent to one skilled in the art, however, that at least some embodiments of the present invention may be practiced without these specific details. In other instances, well-known components or methods are not described in detail or are presented in simple block diagram format in order to avoid unnecessarily obscuring the present invention. Thus, the specific details set forth are merely exemplary. Particular implementations may vary from these exemplary details and still be contemplated to be within the spirit and scope of the present invention. 
     In one embodiment, a method for controlling an optical transducer includes providing a controllable current to a light-emitting diode and stochastically controlling the current to select a light intensity output from the light-emitting diode. In one embodiment, an apparatus for controlling an optical transducer includes a controllable current supply coupled to a light-emitting diode and a controller coupled to the controllable current supply, where the controller is configured to provide a stochastic control signal to the controllable current supply and where the stochastic control signal has a selected stochastic signal density to control the output intensity of the light-emitting diode. 
       FIG. 1  is a block diagram  100  illustrating stochastic signal density modulation of an LED in one embodiment.  FIG. 1  includes a stochastic signal density modulator (SSDM)  101  that is coupled to a controllable current supply  102  and drives an LED  103 . The SSDM  101  includes an n-bit stochastic state machine  105 , coupled to a first input of an n-bit comparator  104 . SSDM  101  also includes an n-bit signal density register  106 , coupled to a second input of n-bit comparator  104 . Signal density register  106  may be any type of programmable register or latch as is known in the art. 
     In one embodiment, stochastic state machine  105  is clocked by clock signal f CLOCK  on line  107  and generates an n-bit pseudorandom binary number between 0 and 2 n −1 on each clock cycle. The signal density register  106  is loaded with an n-bit binary value on input line  108  between 0 and 2 n −1 corresponding to a signal density between 0 and 100% as described below. The signal density value in signal density register  106  is compared in comparator  104  with the output of stochastic state machine  105 . When the output value of stochastic state machine  105  is greater than the value in the signal density register  106 , the output of comparator  104  is in a first state (e.g., high). When the output value of stochastic state machine  105  is at or below the value in the signal density register, the output of the comparator  104  is in a second state (e.g., low). The output values of stochastic state machine  105  forms a stationary pseudorandom process with a uniform probability distribution over the binary number space from 0 to 2 n −1. Therefore, if the value in the signal density register  106  is m (where 0&lt;m&lt;2 n −1), the output of stochastic state machine  105  will be below m for m/(2 n −1) percent of the time and above m for 1−m/(2 n −1) percent of the time. As a result, the output  109  of comparator  104  will be in the first state for m/(2 n −1) percent of the time and in the second state for 1−m/(2 n −1) percent of the time, but with a pseudorandom distribution. 
     Therefore, the output  109  of comparator  104  is a pseudorandom modulation (PRM) which drives the controllable current supply  102 . When the PRM is in the first state, the controllable current supply  102  is on and the current through LED  103  is I. When the PRM is in the second state, the controllable current supply  102  is off and the current through LED  103  is zero (it will be appreciated that in other embodiments, current supply  102  may switch between two non-zero current states). 
       FIG. 2  is an oscillograph  200  illustrating the current through LED  103  in one embodiment for two different values of signal density. The upper trace  211  illustrates the LED current for a signal density of 50% and the lower trace  212  illustrates the LED current for a signal density of 14%. It can be seen that in this embodiment the waveforms are non-periodic in the measurement interval and do not have a uniform frequency. As a result, their respective spectra will be distributed and have no discrete spectral lines.  FIG. 3  illustrates the modulation spectrum  300  corresponding to a 50% signal density for n=8 and f CLOCK =1 MHz.  FIG. 4  illustrates the modulation spectrum  400  corresponding to a 14% signal density for n=8 and f CLOCK =1 MHz. It can be seen that both spectra  300  and  400  contain no sharp spectral lines, that the peak response of these spectrum  300  is approximately 30 dB below the peak of the corresponding PWM spectrum ( FIG. 3 ), and that the frequency centroid of spectrum  300  is an order of magnitude greater than the corresponding PWM spectrum. The absence of spectral peaks and the increase in frequency (which allows for more effective filtering) reduces EMI content relative to uniform frequency modulation/ 
     Stochastic state machine  105  may be embodied in a variety of ways. In one embodiment, stochastic state machine  105  may be a stochastic counter such as a pseudorandom number. In certain embodiments, a pseudorandom number generator may be implemented, for example, as an n-bit linear feedback shift register as is known in the art. In other embodiments, n separate n-bit linear feedback shift registers may be used in parallel to generate pseudorandom numbers. In other embodiments, stochastic state machine  105  may be a processing device having memory to hold data and instructions for the processing device to generate pseudorandom numbers. 
     In other embodiments, stochastic state machine  105  may be a true random number generator based on a random process such as thermionic emission of electrons or radioactive decay of alpha or beta particles. 
     In  FIG. 1 , the anode of LED  103  is coupled to a positive voltage supply V DD  and the cathode of LED  103  is coupled to current supply  102 , which is in turn coupled to ground, such that current supply  102  sinks current from LED  103 . In other embodiments, the relative positions of current supply  102  and LED may be reversed such that the cathode of LED  103  is coupled to ground and the current supply  102  is coupled to the positive voltage supply, so that current supply  102  sources current to LED  103 . In yet other embodiments, the positive voltage supply may be replaced with a ground connection and the ground connection may be replaced with a negative voltage supply. 
       FIG. 5  illustrates a block diagram of one embodiment of an electronic system  500  in which embodiments of the present invention may be implemented. Electronic system  500  includes processing device  210  and may include one or more arrays of LEDs. In one embodiment, electronic system  500  includes an array of RGB LEDs including red LED  103 R, green LED  103 G and blue LED  103 B and their corresponding controllable current supplies  102 R,  102 G and  102 B. Electronic system  500  may also include a host processor  250  and an embedded controller  260 . The processing device  210  may include analog and/or digital general purpose input/output (“GPIO”) ports  207 . GPIO ports  207  may be programmable. GPIO ports  207  may be coupled to a Programmable Interconnect and Logic (“PIL”), which acts as an interconnect between GPIO ports  207  and a digital block array of the processing device  210  (not illustrated). The digital block array may be configured to implement a variety of digital logic circuits (e.g., DAC, UARTs, timers, etc.) using, in one embodiment, configurable user modules (“UMs”). The digital block array may be coupled to a system bus (not illustrated). Processing device  210  may also include memory, such as random access memory (RAM)  205  and program memory  204 . RAM  205  may be static RAM (SRAM), dynamic RAM (DRAM) or any other type of random access memory. Program memory  204  may be any type of non-volatile storage, such as flash memory for example, which may be used to store firmware (e.g., control algorithms executable by processing core  202  to implement operations described herein). Processing device  210  may also include a memory controller unit (MCU)  203  coupled to memory and the processing core  202 . 
     The processing device  210  may also include an analog block array (not illustrated). The analog block array is also coupled to the system bus. The analog block array also may be configured to implement a variety of analog circuits (e.g., ADC, analog filters, etc.) using, in one embodiment, configurable UMs. The analog block array may also be coupled to the GPIO  207 . 
     As illustrated in  FIG. 5 , processing device  210  may be configured to control color mixing. Processing device  210  may include multiple stochastic signal density modulators (SSDM)  101  as described above, which are connected to current supplies  102 R,  102 G and  102 B for the control of LEDs  103 R,  103 G and  103 B, which may be red, green and blue LEDs, respectively. Alternatively, LEDs  103 R,  103 G and  103 B may be combinations of other primary, secondary and/or complementary colors. 
     Processing device  210  may include internal oscillator/clocks  206  and communication block  208 . The oscillator/clocks block  206  provides clock signals to one or more of the components of processing device  210 . Communication block  208  may be used to communicate with an external component, such as host processor  250 , via host interface (I/F) line  251 . Alternatively, processing device  210  may also be coupled to embedded controller  260  to communicate with the external components, such as host  250 . Interfacing to the host  250  can be achieved through various methods. In one exemplary embodiment, interfacing with the host  250  may be done using a standard PS/2 interface to connect to an embedded controller  260 , which in turn sends data to the host  250  via low pin count (LPC) interface. In another exemplary embodiment, interfacing may be done using a universal serial bus (USB) interface directly coupled to the host  250  via host interface line  251 . Alternatively, the processing device  210  may communicate to external components, such as the host  250  using industry standard interfaces, such as USB, PS/2, inter-integrated circuit (I2C) bus, or system packet interfaces (SPI). The host  250  and/or embedded controller  260  may be coupled to the processing device  210  with a ribbon or flex cable from an assembly, which houses the sensing device and processing device. 
     In other words, the processing device  210  may operate to communicate data (e.g., commands or signals to control the absolute and/or relative intensities of LEDs  103 R,  103 G and  103 B)) using hardware, software, and/or firmware, and the data may be communicated directly to the processing device of the host  250 , such as a host processor, or alternatively, may be communicated to the host  250  via drivers of the host  250 , such as OS drivers, or other non-OS drivers. It should also be noted that the host  250  may directly communicate with the processing device  210  via host interface  251 . 
     Processing device  210  may reside on a common carrier substrate such as, for example, an integrated circuit (IC) die substrate, a multi-chip module substrate, or the like. Alternatively, the components of processing device  210  may be one or more separate integrated circuits and/or discrete components. In one exemplary embodiment, processing device  210  may be a Programmable System on a Chip (PSoC™) processing device, manufactured by Cypress Semiconductor Corporation, San Jose, Calif. Alternatively, processing device  210  may be one or more other processing devices known by those of ordinary skill in the art, such as a microprocessor or central processing unit, a controller, special-purpose processor, digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or the like. In an alternative embodiment, for example, the processing device may be a network processor having multiple processors including a core unit and multiple microengines. Additionally, the processing device may include any combination of general-purpose processing device(s) and special-purpose processing device(s). 
     SSDM  101  may be integrated into the IC of the processing device  210 , or alternatively, in a separate IC. Alternatively, descriptions of SSDM  101  may be generated and compiled for incorporation into other integrated circuits. For example, behavioral level code describing SSDM  101 , or portions thereof, may be generated using a hardware descriptive language, such as VHDL or Verilog, and stored to a machine-accessible medium (e.g., CD-ROM, hard disk, floppy disk, etc.). Furthermore, the behavioral level code can be compiled into register transfer level (“RTL”) code, a netlist, or even a circuit layout and stored to a machine-accessible medium. The behavioral level code, the RTL code, the netlist, and the circuit layout all represent various levels of abstraction to describe SSDM  101 . 
     It should be noted that the components of electronic system  500  may include all the components described above. Alternatively, electronic system  500  may include only some of the components described above. 
     While embodiments of the invention have been described in terms of operations with or on binary numbers, such description is only for ease of discussion. It will be appreciated that embodiments of the invention may be implemented using other types of numerical representations such as decimal, octal, hexadecimal, BCD or other numerical representation as is known in the art. 
     Embodiments of the present invention, described herein, include various operations. These operations may be performed by hardware components, software, firmware, or a combination thereof. Any of the signals provided over various buses described herein may be time multiplexed with other signals and provided over one or more common buses. Additionally, the interconnection between circuit components or blocks may be shown as buses or as single signal lines. Each of the buses may alternatively be one or more single signal lines and each of the single signal lines may alternatively be buses. 
     Certain embodiments may be implemented as a computer program product that may include instructions stored on a machine-readable medium. These instructions may be used to program a general-purpose or special-purpose processor to perform the described operations. A machine-readable medium includes any mechanism for storing or transmitting information in a form (e.g., software, processing application) readable by a machine (e.g., a computer). The machine-readable medium may include, but is not limited to, magnetic storage medium (e.g., floppy diskette); optical storage medium (e.g., CD-ROM); magneto-optical storage medium; read-only memory (ROM); random-access memory (RAM); erasable programmable memory (e.g., EPROM and EEPROM); flash memory; electrical, optical, acoustical, or other form of propagated signal (e.g., carrier waves, infrared signals, digital signals, etc.); or another type of medium suitable for storing electronic instructions. 
     Additionally, some embodiments may be practiced in distributed computing environments where the machine-readable medium is stored on and/or executed by more than one computer system. In addition, the information transferred between computer systems may either be pulled or pushed across the communication medium connecting the computer systems. 
     Although the operations of the method(s) herein are shown and described in a particular order, the order of the operations of each method may be altered so that certain operations may be performed in an inverse order or so that certain operation may be performed, at least in part, concurrently with other operations. In another embodiment, instructions or sub-operations of distinct operations may be in an intermittent and/or alternating manner. 
     In the foregoing specification, the invention has been described with reference to specific exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended claims. The specification and drawings are, accordingly, to be regarded in an illustrative sense rather than a restrictive sense.