Abstract:
A steering current generator for a phase interpolator has a multiplicity of fine phase adjustment current sources, each of which is switchable to direct its current to one or other of two summing nodes. The current of each of those two summing nodes is supplemented by respective fixed always-on current sources. The steering current generator has four current outputs and a switching matrix is provided to switch the current from the summing nodes to first and second selected ones of those outputs. The switching matrix is also connected to switch bleed currents to the other two of the current outputs.

Description:
BACKGROUND OF THE INVENTION 
   This invention relates to interpolation and more particularly to an interpolator structure suitable for fabrication as part of an integrated circuit. The invention relates more particularly still to the generation of steering currents required to move the operating point of the interpolator are around the phase circle. 
   SUMMARY OF THE INVENTION 
   The present invention provides a steering current generator as defined in the appended claims. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     There will now be described an example of the invention, with reference to the accompanying drawings, of which: 
       FIG. 1  is a circuit diagram of a phase interpolator. 
       FIG. 2  is a steering current generator according to the invention. 
       FIG. 3  is diagram plotting the outputs of the current generator. 
   

   DETAILED DESCRIPTION 
   A schematic of the structure of an interpolator is shown in  FIG. 1 . For more details of the operation and function of such a circuit the reader is referred to the applicant&#39;s co-pending application filed on even date under the designation TI-38552, U.S. application Ser. No. 11/150,902, which is incorporated herein by reference. 
   It will be observed that the interpolator has a four stage structure and that each stage is biased by a current mirror, such as current mirror  11 . The presence of the current mirror enables the stage to be controlled by a steering currents I 0 , I 1 , I 2 , I 3  and the generation of such a steering current will now be considered in more detail. 
   A steering current generator  20  is shown in  FIG. 2 . The required resultant current is generated by summing a number of currents generated and controlled within the circuit. Sub-circuit  21  may for example be controlled by differential inputs PS and PSZ to sum current into the summing node of switching circuit stages B 0  and B 1  respectively (i.e. stages  23  and  26 ). In an exemplary embodiment of the current steering control arrangement, there are  31  instances of circuit block  21 , receiving  31  separate single bit inputs such that each of the transistors within the instances of the circuit maybe individually controlled to supply current to either stage B 0 , B 1  in accordance with the single bit inputs. Note that since the PS&lt;i&gt; is the inverse of PSZ&lt;i&gt; the total current provided to the stages B 0  and B 1  is a constant, namely 31 times lb. 
   Referring now to  FIG. 3 , assume that the interpolator is operating at operating point  31 , equivalent to a PS input of 0; i.e. 31 bits each with a value of 0. The operating point may be stepped by gradually increasing the number of bits set and eventually the operating point reaches  32 , where all 31 bits have the logic value of 1. 
   Thus far, the operating point of the interpolator has been restricted to a first quadrant of operation  30 . The operating quadrant is defined by a two bit code (QS), which in the first quadrant  30  has the value 00. In that quadrant the control signals QS cause the current summed from the circuit blocks  21  to form currents I B0  and I B1 . Those currents also comprise an additional unit of lb. provided by a current source  28 ,  29  respective to each of the stages  23  and  26 . These currents I B0  and I B1  are mirrored into the interpolator of  FIG. 1  as mentioned above. 
   In the circuit implementation ( FIG. 2 ) the QS inputs, also control further the stages of the circuit, such as stages  22  and  27  (stages B 2  and B 3 ) and are input to one of two coupled transistors in each stage, such as input  24 . 
   In quadrant 00 stages B 2  and B 3  do not receive any current from the circuit blocks  21  but only units of ½ lb. from respective current sources, which currents respectively form currents I B2  and I B3 , which are mirrored into other stages of the interpolator. 
   Stages B 2  and B 0  are cross coupled together, and stages B 1  and B 3  likewise. Each of the stages are fed from a different leg of the single bit driven circuits,  21 . (B 2  and B 0  from one leg and B 1  and B 3  from the other.) Moving the operating point to the first point of the second quadrant  35  is achieved by altering the QS Code from the value 00 to the value 01. This switches the current from circuit blocks  21  from contributing to I B0  to contributing to I B2 , and I B0  becomes ½ lb. It is not necessary to alter the individual bit codes applied to the circuit blocks  21 . 
   The operating point may then be stepped through the second quadrant,  35  by stepwise reduction of the number of set bits applied to the circuits  21 , eventually reaching operating point  34 , which corresponds to the all zeros input condition. 
   In  FIG. 3 , the operating point of the current generator is illustrated by the current summation of (I B0 -I B2 ) as the x-axis and (I B1 -I B3 ) as the y-axis. In the circuit of  FIG. 1 , however, of course, I B0  I B1 , I B2 , I B3  control the four stages individually and respectively, but the angular position of the spots in the diagram about the origin nonetheless also represent the phase of the signal output by the interpolator. 
   A number of advantages of the circuit has thus far described will be apparent. 
   Firstly, the circuit is fully differential. 
   The quadrant selection code is intrinsically, Gray-coded, it and since the single bit values for operating points, which our neighbours across the reference phase boundaries such as points  32  and  33  are the same, by virtue of the Gray-code only a single bit change in the entire circuit is required to cross the reference phase boundary, for example from the first sector quadrant  30  the second quadrant  35 . It will be appreciated that the entire phase wheel, may be transitioned by changing a single bit at a time. 
   It will be noted that the bleed current applied to stage  22  is in magnitude of one half different to that applied to circuit portion  23 . In this way, when the circuit switches quadrants, a full step value is achieved by switching from for example −½ lb. to +½ lb. By virtue of this arrangement the output of the interpolator is never derived from a single reference phase. This has the important consequence that the current in any of the stages is never reduced to zero. 
   In particular embodiments, it may be found that other bleed current combinations are advantageous for example, 7½ for circuit  22  and  8  for circuit  23 . 
   Note also that the architecture of the interpolator of  FIG. 1  allows other numbers of reference phases and respective circuit stages therefor, from a minimum of three. Versions of the steering current generator comprise two summing nodes and sector switches that direct the currents from the circuit blocks  21  to the two active circuit stages of the circuit of  FIG. 1 . (“Sector” has been used since there may be a number of “quadrants” unequal to four.) Bleed currents (e.g. ½ lb.) are switched to the remaining circuit stages. 
   While the invention has been shown and described with reference to preferred embodiments thereof, it is well understood by those skilled in the art that various changes and modifications can be made in the invention without departing from the spirit and scope of the invention as defined by the appended claims.