Abstract:
A method of driving an output terminal to a voltage, in which an input signal is received, an appropriate output voltage and output voltage range are determined based on the input signal, an output driver is configured to a first mode and the output driver drives the output terminal to a voltage within the voltage range, the output driver is configured to a second mode and the output driver drives the output terminal to a voltage approximately equal to the appropriate output voltage.

Description:
RELATED APPLICATIONS 
       [0001]    This application is a continuation of U.S. patent application Ser. No. 11/843,216, filed Aug. 22, 2007, which claims the priority benefit of U.S. Provisional Patent Application No. 60/912,577, filed Apr. 18, 2007, each of which is incorporated herein by reference. 
     
    
     TECHNICAL FIELD 
       [0002]    The present disclosure relates generally to integrated circuits, and more particularly to a method and apparatus to drive non-resistive loads. 
       BACKGROUND 
       [0003]    A conventional load driver circuit may include an operational amplifier (Op-Amp) and a Metal-Oxide-Semiconductor (MOS) power transistor. The MOS power transistor defines a current path from its drain to its source upon receiving an appropriate drive signal at its gate. The gate of the MOS power transistor may be connected to an output of the Op-Amp that includes an inverting input and a non-inverting input. The inverting input of the Op-Amp may be connected to the source of the MOS power transistor via a feedback path. A load may be connected to the source or the drain of the MOS power transistor. 
         [0004]    This conventional load driver circuit works well for driving resistive loads. However, there are several limitations when using this circuit to drive non-resistive loads, including capacitive loads, e.g., a liquid crystal display (LCD) panel, and inductive loads. For example, the conventional load driver circuit may become less stable when driving a non-resistive load, which in turn makes it difficult to drive rail-to-rail voltages to an output of the conventional load driver circuit. Additionally, the conventional load driver circuit may be less resilient to load variations. Any load variation may cause the circuit to become less stable. One solution may be to include capacitors in the feedback path of the conventional load driver circuit. But this solution increases the number of components in the conventional load driver circuit, thus increasing cost. 
       DESCRIPTION OF EXAMPLE EMBODIMENTS 
     Overview 
       [0005]    A device includes a voltage generator to generate an input voltage; a first circuit to drive a voltage associated with a load to a threshold voltage level; and a second circuit to adjust the voltage associated with the load to approximate the input voltage, and to stabilize the voltage associated with the load. The device further includes a control logic having a control signal generator to generate signals to select between the first circuit and the second circuit. 
         [0006]    A method includes providing an input voltage; driving a voltage associated with a load to a threshold level during a high-drive mode; adjusting the voltage associated with the load to approximate the input voltage during a low-drive mode; and stabilizing the voltage associated with the load during the low-drive mode. The method further includes generating control signals to select between a high-drive mode and a low-drive mode. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]    The foregoing and other objects, advantages and features will become more readily apparent by reference to the following detailed description in conjunction with the accompanying drawings. 
           [0008]      FIG. 1  is a schematic block diagram illustrating an example non-resistive load driver according to embodiments of the invention. 
           [0009]      FIG. 2  is a diagram illustrating an example operation of the non-resistive load driver of  FIG. 1  for an example load voltage waveform. 
           [0010]      FIG. 3  is a schematic block diagram illustrating an example high-drive circuit of the non-resistive load driver of  FIG. 1 . 
       
    
    
     DETAILED DESCRIPTION 
       [0011]      FIG. 1  is a schematic block diagram illustrating an example non-resistive load driver  100  according to embodiments of the invention. It should be recognized that  FIG. 1  may include other elements, which are not illustrated in order to simplify the figures and which are not necessary to understand the example system disclosed below. The non-resistive load driver circuit  100  described and illustrated herein may be implemented in hardware, firmware, software, or any suitable combination thereof. 
         [0012]    Referring to  FIG. 1 , the non-resistive load driver  100  may include a high-drive circuit  300  and a low-drive circuit  350  to drive rail-to-rail voltages at an output of the non-resistive load driver  100 . The high-drive circuit  300  may actively drive the load  38  to a threshold voltage level, while the low-drive circuit  350  may modify the output voltage of the non-resistive load driver  100  (i.e., voltage level associated with the load  38 ) to approximate an input voltage Vin, as well as maintain a stable output voltage for the non-resistive load driver  100 . Vin represents an input voltage to the non-resistive load driver  100 . The input voltage Vin may be generated from a voltage generator  37 . The control logic  30  includes a control signal generator  32  to generate appropriate control signals, to select either the high-drive circuit  300  or the low-drive circuit  350  to drive the load  38 . The control logic  30  may also control the amount of time that each circuit  300  and  350  operates. The amount of time that each circuit  300  and  350  operates may be programmable for a dynamic switching between the circuits  300  and  350  or fixed depending on the load  38 . In some embodiments, the non-resistive load driver  100  may drive capacitive loads, such as a liquid crystal display (LCD) panel. 
         [0013]    In some embodiments, the non-resistive load driver  100  may operate in a high-drive mode and a low-drive mode to drive rail-to-rail voltages at an output of the non-resistive load driver  100 . During the high-drive mode, the high-drive circuit  300  may be selected to actively drive the load  38  to a threshold voltage level. The threshold voltage level may offset the input voltage Vin by a small amount, and its value may be programmable or fixed. Subsequently, the non-resistive load driver  100  may switch to a low-drive mode in which the low-drive circuit  350  is activated. During the low-drive mode, the low-drive circuit  350  may modify the output voltage of the non-resistive load driver  100 , i.e., voltage level associated with the load  38 , to approximate the input voltage Vin. In addition, during the low-drive mode, the low-drive circuit  350  may stabilize the output voltage of the non-resistive load driver  100  to maintain a steady state. The low-drive circuit  350  consumes less current than the high-drive circuit  300 , thereby reducing power consumption. 
         [0014]    When driving an LCD panel, the non-resistive load driver  100  may cease to drive the LCD panel, or switch to a no-drive mode, after the output voltage of the non-resistive load driver  100  reaches a steady state. In this no-drive mode, both the high-drive circuit  300  and the low-drive circuit  350  may be turned off, further reducing power consumption. When driving non-capacitive loads, such as inductive loads, the low-drive circuit  350  may remain turned on to maintain an appropriate voltage at the output of the non-resistive load driver  100 . 
         [0015]    The control logic  30  may provide appropriate control signals to the non-resistive load driver  100  to indicate which mode of operation, e.g., the high-drive mode, the low-drive mode, or the no-drive mode, may be used for driving a non-resistive load. The timing associated with each of these modes may be programmable for a dynamic switching between the modes or fixed depending on the load  38 . In some embodiments, the non-resistive load driver  100  may be implemented using two or more discrete drivers, such as a high-drive circuit  300  and a low-drive circuit  350 , while in other embodiments, the non-resistive load driver  100  may be implemented using a single driver with two or more operational modes controllable by a bias current. 
         [0016]    In some embodiments, the low-drive circuit  350  may include a chopper-stabilized amplifier that switches between an input and an output of the non-resistive load driver  100  to cancel out any offset voltages. A chopping frequency associated with the chopper-stabilized amplifier may be programmable when using the chopper-stabilized amplifier to drive non-resistive loads. 
         [0017]    The above-described non-resistive load driver  100  includes a high-drive circuit  300  and a low-drive circuit  350  that allows for rail-to-rail output voltage drive capability while maintaining stability, when driving non-resistive loads. The non-resistive load driver  100  does not require additional capacitors to keep the circuit stable, thereby consuming less chip space. These external capacitors are typically required by the conventional load driver circuits to support large transient current flows. Additionally, the non-resistive load driver  100  consumes less power when driving non-resistive loads. 
         [0018]      FIG. 2  is a diagram illustrating an example operation of the non-resistive load driver  100  of  FIG. 1  for an example load voltage waveform  200 . Referring to  FIG. 2 , the load voltage waveform  200  may represent instantaneous voltages associated with the load  38  as a function of time. Vin represents an input voltage to the non-resistive load driver  100 . The input voltage Vin may be generated from the voltage generator  37  of  FIG. 1 . An offset voltage ΔV may be a relatively small voltage compared to the input voltage Vin. A voltage window (Vin−ΔV, Vin+ΔV) may be a voltage range to drive the output of the non-resistive load driver  100 . 
         [0019]    The non-resistive load driver  100  may operate in a high-drive mode such that the high-drive circuit  300  is selected to drive a load voltage to a value within the voltage window (Vin−ΔV, Vin+ΔV). The load voltage may offset the input voltage Vin by a small amount ΔV. Subsequently, the non-resistive load driver  100  may switch to a low-drive mode. In one embodiment, the high-drive circuit may automatically turn off itself after charging to a certain threshold level, while the low-drive mode may be automatically and dynamically turned on/off to stabilize the output voltage. During the low-drive mode, the low-drive circuit  350  is selected to modify the load voltage to approximate the input voltage Vin, such as by canceling any offset voltages associated with the load voltage. In addition, the low-drive circuit  350  may also stabilize the load voltage to maintain a steady state. The low-drive circuit  350  consumes less current than the high-drive circuit  300 , thus reducing power consumption. When driving capacitive loads, the non-resistive load driver  100  may switch to a no-drive mode after the load voltage reaches a steady state. During the no-drive mode, both the high-drive circuit  300  and the low-drive circuit  350  may be turned off, further reducing power consumption. 
         [0020]      FIG. 3  is a schematic block diagram illustrating an example high-drive circuit  300  of the non-resistive load driver  100  of  FIG. 1 . Referring to  FIG. 3 , the example high-drive circuit  300  may include comparators  52  and  54 , switches  56  and  58 , current sources  60  and  62 , to drive a load  64 . Comparators  52  and  54  compare multiple voltages or currents and switch their respective output to indicate which voltage or current is larger. The output of comparators  52  and  54  controls switches  56  and  58 , respectively. In some embodiments, the switch  56  may be a p-channel metal-oxide-semiconductor field-effect transistor (MOSFET) PMOS, whereas the switch  58  may be an NMOS. In other embodiments, the switches  56  and  58  may be any other device capable of performing the functions described herein. 
         [0021]    Vin represents an input voltage to the high-drive circuit  300 . The input voltage Vin may be generated from the voltage generator  37  of  FIG. 1 . An offset voltage ΔV may be a relatively small voltage compared to the input voltage Vin. A voltage window (Vin−ΔV, Vin+ΔV) may be a voltage range to drive the output of the high-drive circuit  300 . A load voltage Vload may represent instantaneous voltages associated with the load  64  as a function of time. 
         [0022]    The comparator  52  compares the value of the input voltage minus the offset voltage or Vin−ΔV with the load voltage Vload. In some embodiments, the comparator  52  outputs a “1” when Vin−ΔV is less than the load voltage Vload, thus directing the switch  56  to be turned off. Otherwise, the comparator  52  outputs a “0” when Vin−ΔV is greater than the load voltage Vload, thus directing the switch  56  to be turned on. 
         [0023]    The Comparator  54  compares the value of the input voltage plus the offset voltage or Vin+ΔV with the load voltage Vload. When the load voltage Vload is less than Vin+ΔV, the switch  58  is turned off. Otherwise, when the load voltage Vload is greater than Vin+ΔV, the switch  58  is turned on. 
         [0024]    When the switch  56  is on and the switch  58  is off, a large bias current may flow from the current source  60  to the load  64  to charge the load  64  until the load voltage Vload reaches a value within the window (Vin−ΔV, Vin+ΔV). Once the load voltage Vload is charged to a value within the window (Vin−ΔV, Vin+ΔV), both switches  56  and  58  may be off. When both switches  56  and  58  are off, the high-drive circuit  300  may be turned off to cease to drive the load  64 . The low-drive circuit  350  may then be activated to modify or adjust the load voltage Vload to approximate the input voltage Vin and to stabilize the load voltage Vload. 
         [0025]    On the other hand, when the switch  56  is off and the switch  58  is on, a large bias current may flow from the load  64  to the current source  62  to discharge the load  64  until the load voltage Vload reaches a value within the window (Vin−ΔV, Vin+ΔV). Once the load voltage Vload is discharged to a value within the window (Vin−ΔV, Vin+ΔV), both switches  56  and  58  may be off. When both switches  56  and  58  are off, the high-drive circuit  300  may be turned off to cease to drive the load  64 . The low-drive circuit  350  may then be activated to modify or adjust the load voltage Vload to approximate the input voltage Vin and to stabilize the load voltage Vload. 
         [0026]    Embodiments of the invention_relate to a method and apparatus to drive non-resistive loads. The non-resistive load driver may include two or more drivers, such as a high-drive circuit  300  and a low-drive circuit  350 , to drive rail-to-rail output voltages and to maintain a stable condition. The high-drive circuit may drive the output voltage to a threshold level, whereas the low-drive circuit may modify the output voltage to approximate an input voltage of the non-resistive load driver, and maintain a steady state output voltage. The low-drive circuit consumes less current than the high-drive circuit. The non-resistive load driver consumes less power and use less chip space. 
         [0027]    Further modifications and alternative embodiments of this invention will be apparent to those skilled in the art in view of this description. For example, the non-resistive load driver  100  may be implemented using a single driver with multiple modes, such as a low-drive mode and a high-drive mode, by changing a bias current of the non-resistive load driver  100  between a high current mode and a low current mode. Accordingly, this description is to be construed as illustrative only and is for the purpose of teaching those skilled in the art the manner of carrying out the invention. Various changes may be made in the shape, size and arrangement and types of components or devices. For example, equivalent elements or materials may be substituted for those illustrated and described herein, and certain features of the invention may be utilized independently of the use of other features, all as would be apparent to one skilled in the art after having the benefit of this description of the invention. Alternative embodiments are contemplated and are within the spirit and scope of the following claims.