Abstract:
There is provided a backlight unit including a backlight configured to generate light, and a backlight driving circuit configured to drive the backlight in a dimming mode on a basis of a dimming signal, the backlight driving circuit including a first comparator configured to detect a frequency of the dimming signal and to compare the frequency of the dimming signal with a reference frequency to determine a compared result, and a driver configured to selectively drive the backlight, based on the compared result, in an analog dimming mode in which a driving current of the backlight is controlled, or a mixed dimming mode by mixing the analog dimming mode and a digital dimming mode in which an on state and an off state of the backlight is controlled.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
       [0001]    This U.S. non-provisional patent application claims priority to and the benefit of Korean Patent Application No. 10-2015-0144898, filed on Oct. 16, 2015, the content of which is hereby incorporated by reference in its entirety. 
       BACKGROUND 
       [0002]    1. Field 
         [0003]    Aspects of the present disclosure relate to a backlight unit, a method of driving the backlight unit, and a display device including the backlight unit. 
         [0004]    2. Description of the Related Art 
         [0005]    In general, a liquid crystal display device includes a display panel on which pixels are arranged, a gate driver applying gate signals to the pixels, a data driver applying data voltages to the pixels, and a backlight unit applying a light to the display panel. 
         [0006]    The pixels receive the data voltages in response to the gate signals and are operated in response to the data voltages. The pixels operated by the data voltages control a transmittance of the light provided from the backlight unit to display an image. 
         [0007]    The backlight unit is operated in a dimming mode. The dimming mode is used to control an amount of the light from the backlight unit in consideration of brightness of the image, and thus power consumption in the backlight unit is reduced. 
         [0008]    The dimming mode is classified into an analog dimming mode and a digital dimming mode. The digital dimming mode is performed by a pulse width modulation (PWM) method. The analog dimming mode controls an amount of electrical current applied to a light source while the light source of the backlight unit is in a full-on state, and thus brightness of the backlight unit is controlled. The digital dimming mode controls an ON/OFF of the light source to control the brightness of the backlight unit. 
       SUMMARY 
       [0009]    Aspects of embodiments of the present disclosure are directed toward a backlight unit capable of improving display quality. 
         [0010]    Aspects of embodiments of the present disclosure are directed toward a method of driving the backlight unit. 
         [0011]    Aspects of embodiments of the present disclosure are directed toward a display device having the backlight unit. 
         [0012]    According to some embodiments of the inventive concept, there is provided a backlight unit including: a backlight configured to generate light; and a backlight driving circuit configured to drive the backlight in a dimming mode on a basis of a dimming signal, the backlight driving circuit including: a first comparator configured to detect a frequency of the dimming signal and to compare the frequency of the dimming signal with a reference frequency to determine a compared result; and a driver configured to selectively drive the backlight, based on the compared result, in an analog dimming mode in which a driving current of the backlight is controlled, or a mixed dimming mode by mixing the analog dimming mode and a digital dimming mode in which an on state and an off state of the backlight is controlled. 
         [0013]    In an embodiment, the dimming signal is a pulse width modulation signal. 
         [0014]    In an embodiment, the reference frequency is about 1 KHz. 
         [0015]    In an embodiment, the driver is configured to drive the backlight in the analog dimming mode when the frequency of the dimming signal is less than the reference frequency, and to drive the backlight in the mixed dimming mode when the frequency of the dimming signal is equal to or greater than the reference frequency. 
         [0016]    In an embodiment, the driver is configured to selectively drive the backlight in the analog dimming mode or the digital dimming mode in accordance with a duty cycle of the dimming signal when the frequency of the dimming signal is equal to or greater than the reference frequency. 
         [0017]    In an embodiment, the driver is configured to drive the backlight in the analog dimming mode when the duty cycle of the dimming signal is equal to or greater than a reference duty cycle, and to drive the backlight in the digital dimming mode when the duty cycle of the dimming signal is less than the reference duty cycle. 
         [0018]    In an embodiment, the reference duty cycle is about 25%. 
         [0019]    In an embodiment, the first comparator includes: a frequency detector configured to detect the frequency of the dimming signal; and a frequency comparator configured to compare the frequency of the dimming signal with the reference frequency to output the compared result. 
         [0020]    In an embodiment, the frequency comparator is configured to output a first control signal when the frequency of the dimming signal is less than the reference frequency, and to output a second control signal when the frequency of the dimming signal is equal to or greater than the reference frequency. 
         [0021]    In an embodiment, the driver includes: a duty cycle detector configured to detect a duty cycle of the dimming signal in response to the second control signal; a duty cycle comparator configured to compare the duty cycle of the dimming signal with a reference duty cycle, to output a third control signal when the duty cycle of the dimming signal is equal to or greater than the reference duty cycle, and to output a fourth control signal when the duty cycle of the dimming signal is less than the reference duty cycle; a first driver configured to drive the backlight in the analog dimming mode on a basis of the dimming signal in response to the first and third control signals; and a second driver configured to drive the backlight in the digital dimming mode on the basis of the dimming signal in response to the fourth control signal. 
         [0022]    In an embodiment, the frequency comparator includes a first memory configured to store a value of the reference frequency, and the duty cycle comparator includes a second memory configured to store a value of the reference duty cycle. 
         [0023]    According to some embodiments of the inventive concept, there is provided a method of driving a backlight unit, the method including: detecting a frequency of a dimming signal; comparing the frequency of the dimming signal with a reference frequency to determine a compared result; and selectively driving a backlight, based on the compared result, in an analog dimming mode in which a driving current of the backlight is controlled, or a mixed dimming mode by mixing the analog dimming mode and a digital dimming mode in which an on state and an off state of the backlight are controlled. 
         [0024]    In an embodiment, the reference frequency is about 1 KHz. 
         [0025]    In an embodiment, the driving of the backlight includes: driving the backlight in the analog dimming mode on a basis of the dimming signal when the frequency of the dimming signal is less than the reference frequency; and driving the backlight in the mixed dimming mode on the basis of the dimming signal when the frequency of the dimming signal is equal to or greater than the reference frequency. 
         [0026]    In an embodiment, the driving of the backlight in the mixed dimming mode includes: detecting a duty cycle of the dimming signal; comparing the duty cycle of the dimming signal with a reference duty cycle; and driving the backlight in the analog dimming mode or the digital dimming mode according to a result of the comparison of the duty cycle of the dimming signal and the reference duty cycle. 
         [0027]    In an embodiment, the reference duty cycle is about 25%. 
         [0028]    In an embodiment, the driving of the backlight in the analog dimming mode or the digital dimming mode includes: driving the backlight in the analog dimming mode on the basis of the dimming signal when the duty cycle of the dimming signal is equal to or greater than the reference duty cycle; and driving the backlight in the digital dimming mode on the basis of the dimming signal when the duty cycle is less than the reference duty cycle. 
         [0029]    According to some embodiments of the inventive concept, there is provided a display device including: a display panel; a backlight configured to provide light to the display panel; a first comparator configured to detect a frequency of a dimming signal and to compare the frequency of the dimming signal with a reference frequency to determine a compared result; and a driver configured to selectively drive the backlight in a dimming mode on a basis of the dimming signal, wherein the driver is configured to drive the backlight, based on the compared result, in an analog dimming mode in which a driving current of the backlight is controlled or a mixed dimming mode by mixing the analog dimming mode and a digital dimming mode in which on and off of the backlight are controlled. 
         [0030]    In an embodiment, the first comparator includes: a frequency detector configured to detect the frequency of the dimming signal; and a frequency comparator configured to compare the frequency of the dimming signal with the reference frequency, to output a first control signal when the frequency of the dimming signal is less than the reference frequency, and to output a second control signal when the frequency of the dimming signal is equal to or greater than the reference frequency. 
         [0031]    In an embodiment, the driver includes: a duty cycle detector configured to detect a duty cycle of the dimming signal in response to the second control signal; a duty cycle comparator configured to compare the duty cycle of the dimming signal with a reference duty cycle, to output a third control signal when the duty cycle of the dimming signal is equal to or greater than the reference duty cycle, and to output a fourth control signal when the duty cycle of the dimming signal is less than the reference duty cycle; a first driver configured to drive the backlight in the analog dimming mode on the basis of the dimming signal in response to the first and third control signals; and a second driver configured to drive the backlight in the digital dimming mode on the basis of the dimming signal in response to the fourth control signal. 
         [0032]    According to one or more embodiments, the display device drives the backlight in the analog dimming mode or the mixed dimming mode according to the frequency of the dimming signal, and thus the waterfall phenomenon is prevented from occurring or is reduced. Thus, the display quality of the display device is improved. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0033]    The above and other aspects of the present disclosure will become readily apparent by reference to the following detailed description when considered in conjunction with the accompanying drawings, wherein: 
           [0034]      FIG. 1  is a block diagram showing a display device according to an exemplary embodiment of the present disclosure; 
           [0035]      FIG. 2  is an equivalent circuit diagram showing a pixel shown in  FIG. 1 ; 
           [0036]      FIG. 3  is a block diagram showing a connection relation between a backlight driver and a backlight shown in  FIG. 1 ; 
           [0037]      FIG. 4  is a block diagram showing a backlight controller shown in  FIG. 3 ; 
           [0038]      FIG. 5  is a timing diagram showing a dimming signal applied to the backlight controller and a driving current flowing through light source strings; 
           [0039]      FIGS. 6A-6B  are views illustrating a waterfall phenomenon; and 
           [0040]      FIG. 7  is a flow diagram showing a method of driving a backlight unit according to an exemplary embodiment of the present disclosure. 
       
    
    
     DETAILED DESCRIPTION 
       [0041]    Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein. 
         [0042]    Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. 
         [0043]      FIG. 1  is a block diagram showing a display device  100  according to an exemplary embodiment of the present disclosure. 
         [0044]    Referring to  FIG. 1 , the display device  100  includes a display panel  110 , a timing controller  120 , a gate driver  130 , a data driver  140 , and a backlight unit BLU. 
         [0045]    The display panel  110  may be, but is not limited to, a liquid crystal display panel including two substrates and a liquid crystal layer disposed between the two substrates. The display panel  110  includes a plurality of gate lines GL 1  to GLm, a plurality of data lines DL 1  to DLn, and a plurality of pixels PX 11  to PXmn. Each of “m” and “n” is a natural number. 
         [0046]    The gate lines GL 1  to GLm extend in a first direction DR 1  and are connected to the gate driver  130 . The data lines DL 1  to DLn extend in a second direction DR 2  crossing (e.g., orthogonal to) the first direction DR 1  and are connected to the data driver  140 . 
         [0047]    The pixels PX 11  to PXmn are arranged in crossing areas defined by the crossing of the gate lines GL 1  to GLm and the data lines DL 1  to DLn. Accordingly, the pixels PX 11  to PXmn are arranged in a matrix form. The pixels PX 11  to PXmn are connected to the gate lines GL 1  to GLm and the data lines DL 1  to DLn. 
         [0048]    The pixels PX 11  to PXmn display a red, green, or blue color, but they should not be limited thereto or thereby. That is, the pixels PX 11  to PXmn may further display various suitable colors, for example, a white color, a yellow color, a cyan color, a magenta color, and/or the like. 
         [0049]    The timing controller  120  is mounted on a printed circuit board in an integrated circuit chip form and connected to the gate driver  130  and the data driver  140 . The timing controller  120  receives image signals RGB and control signals CS from an external source, for example, a system board. 
         [0050]    The timing controller  120  converts a data format of the image signals RGB to a data format appropriate to an interface between the data driver  140  and the timing controller  120 . The timing controller  120  applies image data DATA having the converted data format to the data driver  140 . 
         [0051]    The image signals RGB include red image signals, green image signals, and blue image signals. In the case where the pixels PX 11  to PXmn include red pixels displaying the red color, green pixels displaying the green color, and blue pixels displaying the blue color, the timing controller  120  converts the data format of the red, green, and blue image signals and applies the red, green, and blue image signals to the data driver  140 . 
         [0052]    In the case where the pixels PX 11  to PXmn further include white pixels displaying the white color, the timing controller  120  generates the red, green, blue, and white image signals using the red, green, and blue image signals. The timing controller  120  converts the data format of the red, green, blue, and white image signals and applies the red, green, blue, and white image signals to the data driver  140 . 
         [0053]    The control signals CS include a vertical synchronization signal as a frame distinction signal, a horizontal synchronization signal as a row distinction signal, and a data enable signal maintained at a high level during a period, in which data are output, to indicate a data input period. 
         [0054]    The timing controller  120  generates a gate control signal GCS and a data control signal DCS in response to the control signals CS. The gate control signal GCS is used to control an operation timing of the gate driver  130 . The data control signal DCS is used to control an operation timing of the data driver  140 . 
         [0055]    The gate control signal GCS includes a scan start signal indicating the start of scanning, at least one clock signal controlling an output period of a gate-on voltage, and an output enable signal defining a duration of the gate-on voltage. 
         [0056]    The data control signal DCS includes a horizontal start signal informing the start of data transmission of the image data DATA to the data driver  140 , a load signal instructing to apply data voltages to the data lines DLI to DLn, and a polarity control signal determining a polarity of the data voltages with respect to a common voltage. 
         [0057]    The timing controller  120  analyzes the image signals RGB and generates a backlight control signal BCS to control a brightness of the backlight unit BLU. The backlight control signal BCS is a control signal to drive the backlight unit BU in a dimming mode. 
         [0058]    For instance, in the case where the image signals RGB are provided to display a dark image, the timing controller  120  generates the backlight control signal BCS to decrease a brightness of a light L generated by the backlight unit BLU. In the case where the image signals RGB are provided to display a bright image, the timing controller  120  generates the backlight control signal BCS to increase the brightness of the light L generated by the backlight unit BLU. 
         [0059]    The timing controller  120  applies the gate control signal GCS to the gate driver  130  and applies the data control signal DCS to the data driver  140 . The timing controller  120  applies the backlight control signal BCS to the backlight unit BLU. 
         [0060]    The gate driver  130  generates the gate signals in response to the gate control signal GCS and sequentially outputs the gate signals. The gate signals are applied to the pixels PX 11  to PXmn through the gate lines. 
         [0061]    The data driver  140  generates the data voltages in analog form (to correspond to the image data DATA) in response to the data control signal DCS and outputs the data voltages. The data voltages are applied to the pixels PX 11  to PXmn through the data lines DL 1  to DLn. 
         [0062]    The gate driver  130  and the data driver  140  are provided as driving chips, mounted on a flexible printed circuit board, and connected to the display panel  110  in a tape carrier package (TCP). 
         [0063]    However, the gate driver  130  and the data driver  140  should not be limited to the above-mentioned structure. That is, the gate driver  130  and the data driver  140  may be provided as driving chips and mounted on the display panel  110  in a chip-on-glass (COG) manner. In addition, the gate driver  130  may be substantially concurrently (e.g., simultaneously) formed with transistors of the pixels PX 11  to PXmn and mounted on the display panel  110  in an ASG (amorphous silicon TFT gate driver circuit) form or an OSG (oxide silicon TFT gate driver circuit) form. 
         [0064]    The backlight unit BLU includes a backlight driver (e.g., a backlight driving circuit)  150  receiving the backlight control signal BCS and a backlight  160  driven by the control of the backlight driver  150 . The backlight driver  150  drives the backlight  160  in the dimming mode in response to the backlight control signal BCS, such that the backlight  160  generates the light L having a set or predetermined brightness. The backlight control signal BCS includes a dimming signal as a pulse width modulation signal. 
         [0065]    The backlight driver  150  drives the backlight  160  in the analog dimming mode or a mixed dimming mode obtained by mixing the analog dimming mode and the digital dimming (or PWM dimming) mode according to a frequency of the dimming signal. In the case where the backlight  160  is driven in the mixed dimming mode, the backlight driver  150  drives the backlight  160  in the analog dimming mode or the digital dimming mode. 
         [0066]    The backlight  160  includes light emitting diodes or a cold cathode fluorescent lamp as its light source emitting the light L. The backlight  160  is disposed at a rear side of the display panel  110 , and the light L generated by the backlight  160  is provided to the display panel  110 . 
         [0067]    The display panel  110  displays the image using the light L provided from the backlight  160 . The pixels PX 11  to PXmn receive the data voltages through the data lines DL 1  to DLn in response to the gate signals provided through the gate lines GL 1  to GLm. 
         [0068]    The pixels PX 11  to PXmn display grayscale levels corresponding to the data voltages, and thus the image is displayed. The pixels PX 11  to PXmn operated by the data voltages control a transmittance of the light provided from the backlight  160  to display the image. 
         [0069]      FIG. 2  is an equivalent circuit diagram showing one pixel shown in  FIG. 1 . 
         [0070]    For the convenience of illustration,  FIG. 2  shows a pixel PX connected to a gate line GLi and a data line DLj. The other pixels of the display panel  110  have the same or substantially the same structure and function as those of the pixel PX shown in  FIG. 2 . 
         [0071]    Referring to  FIG. 2 , the display panel  110  includes a first substrate  111 , a second substrate  112  facing the first substrate  111 , and a liquid crystal layer LC disposed between the first substrate  111  and the second substrate  112 . 
         [0072]    The pixel PX includes a transistor TR connected to the gate line GLi and the data line DLj, a liquid crystal capacitor Clc connected to the transistor TR, and a storage capacitor Cst connected to the liquid crystal capacitor Clc in parallel. The storage capacitor Cst may be omitted. 
         [0073]    The transistor TR is disposed on the first substrate  111 . The transistor TR includes a gate electrode connected to the gate line GLi, a source electrode connected to the data line DLj, and a drain electrode connected to the liquid crystal capacitor Clc and the storage capacitor Cst. 
         [0074]    The liquid crystal capacitor Clc includes a pixel electrode PE disposed on the first substrate  111 , a common electrode CE disposed on the second substrate  112 , and the liquid crystal layer LC disposed between the pixel electrode PE and the common electrode CE. The liquid crystal layer LC serves as a dielectric layer (e.g., substance). The pixel electrode PE is connected to the transistor TR. 
         [0075]    As shown in  FIG. 2 , the pixel electrode PE has a non-slit structure, but it should not be limited thereto or thereby. That is, the pixel electrode PE may have a slit structure including a trunk portion having a cross shape and a plurality of branch portions extending from the trunk portion in a radial form. 
         [0076]    The common electrode CE is disposed on an entire surface of the second substrate  112 , but it should be limited thereto or thereby. That is, the common electrode CE may be disposed on the first substrate  111 . In this case, at least one of the pixel electrode PE and the common electrode CE may have at least one slit. 
         [0077]    The storage capacitor Cst includes the pixel electrode PE, a storage electrode branched from the storage line, and an insulating layer disposed between the pixel electrode PE and the storage electrode. The storage line is disposed on the first substrate  111  and formed on the same layer as the gate lines GL 1  to GLm. The storage electrode is partially overlapped with the pixel electrode PE. 
         [0078]    The pixel PX includes a color filter CF displaying one of red, green, and blue colors. As an example, the color filter CF is disposed on the second substrate  112  as shown in  FIG. 2 ; however, the color filter CF may be disposed on the first substrate  111  according to other embodiments. 
         [0079]    The transistor TR is turned on in response to the gate signal applied thereto through the gate line GLi. The data voltage provided through the data line DLj is applied to the pixel electrode PE of the liquid crystal capacitor Clc through the turned-on transistor TR. The common electrode CE is supplied (e.g., is applied) with the common voltage. 
         [0080]    Due to a difference in voltage level between the data voltage and the common voltage, an electric field is generated between the pixel electrode PE and the common electrode CE. Liquid crystal molecules of the liquid crystal layer LC are driven by the electric field generated between the pixel electrode PE and the common electrode CE. The transmittance of the light provided from the backlight  160  is controlled by the liquid crystal molecules driven by the electric field, and thus the image is displayed. 
         [0081]    The storage line receives a storage voltage having a constant voltage level, but it should not be limited thereto or thereby. For example, the storage line may receive the common voltage. The storage capacitor Cst compensates for the voltage charged in the liquid crystal capacitor Clc. 
         [0082]      FIG. 3  is a block diagram showing a connection relation between the backlight driver  150  and the backlight  160  shown in  FIG. 1 . 
         [0083]    Referring to  FIG. 3 , the backlight driver  150  includes a backlight controller  151  and a boosting circuit  152 . The backlight  160  includes a plurality of light source strings (e.g., a plurality of light source lines) S 1  to Sk connected to each other in parallel. In the present exemplary embodiment, k is a natural number equal to or greater than 2. Each of the light source strings S 1  to Sk includes a plurality of light sources LS connected to each other in series. Each light source LS may be, but is not limited to, a light emitting diode (LED). 
         [0084]    An output terminal of the boosting circuit  152  is commonly connected to input terminals of the light source strings S 1  to Sk. The boosting circuit  152  may include a DC/DC converter. The boosting circuit  152  receives an input voltage Vin and boosts the input voltage Vin to output a driving voltage Vout. 
         [0085]    The driving voltage Vout output from the boosting circuit  152  is applied to the light source strings S 1  to Sk to drive the light source strings S 1  to Sk. In some examples, the driving voltage Vout has a voltage level from about 20 volts to about 35 volts. 
         [0086]    The boosting circuit  152  includes a coil L, a diode D, a capacitor C, and a transistor T. The coil L includes a first terminal applied with the input voltage Vin and a second terminal connected to an anode terminal of the diode D. 
         [0087]    A control terminal of the transistor T is connected to the backlight controller  151  to receive a switching signal SW. An input terminal of the transistor T is connected to the second terminal of the coil L and an output terminal of the transistor T is connected to a ground terminal. A cathode terminal of the diode D and a first terminal of the capacitor C are connected to an output terminal of the boosting circuit  152 , from which the driving voltage Vout is output, and a second terminal of the capacitor C is connected to the ground terminal. 
         [0088]    The transistor T is turned on or off in response to the switching signal SW and the coil L boosts the input voltage Vin in accordance with the on/off operation of the transistor T. The boosting circuit  152  controls a voltage level of the driving voltage Vout in response to the switching signal SW. For instance, the voltage level of the driving voltage Vout output from the boosting circuit  152  may be changed depending on a duty cycle of the switching signal SW. 
         [0089]    When the duty cycle of the switching signal SW is decreased, the voltage level of the driving voltage Vout output from the boosting circuit  152  is decreased. When the duty cycle of the switching signal SW is increased, the voltage level of the driving voltage Vout output from the boosting circuit  152  is increased. 
         [0090]    The backlight controller  151  is connected to the output terminal of the light source strings S 1  to Sk to receive a current value from each of the light source strings S 1  to Sk. The backlight controller  151  controls the duty cycle of the switching signal SW on the basis of the current value of each of the light source strings S 1  to Sk, which is fedback thereto. 
         [0091]    The backlight controller  151  compares the feedback current value (e.g., the sum total of the currents from the light source strings S 1  to Sk fed back to the backlight controller  151 ) with a reference value. When the feedback current value is greater than the reference value, the backlight controller  151  decreases the duty cycle of the switching signal SW. When the feedback current value is less than the reference value, the backlight controller  151  increases the duty cycle of the switching signal SW. 
         [0092]    As described above, because the duty cycle of the switching signal SW is controlled, the voltage level of the driving voltage Vout output from the boosting circuit  152  is controlled according to the level of the feedback voltage. As a result, the backlight  160  outputs the light at a constant brightness. 
         [0093]    The backlight controller  151  receives a dimming signal DIM of the backlight control signal BCS. The dimming signal DIM may be, but is not limited to, the pulse width modulation (PWM) signal to control the brightness of each of the light source strings S 1  to Sk. The backlight controller  151  controls the brightness of the light source strings S 1  to Sk of the backlight  160  in response to the dimming signal DIM. 
         [0094]    The backlight controller  151  detects a frequency of the dimming signal DIM and compares the detected frequency of the dimming signal DIM with a reference frequency. According to the compared result, the backlight controller  151  drives the backlight  160  in the analog dimming mode or the mixed dimming mode. 
         [0095]    For instance, in the case where the frequency of the dimming signal DIM is less than the reference frequency, the backlight controller  151  drives the backlight  160  in the analog dimming mode. In the case where the frequency of the dimming signal DIM is equal to or greater than the reference frequency, the backlight controller  151  drives the backlight  160  in the mixed dimming mode. 
         [0096]    In the case where the backlight controller  151  drives the backlight  160  in the mixed dimming mode, the backlight controller  151  detects the duty cycle of the dimming signal DIM and compares the detected duty cycle of the dimming signal DIM with a reference duty cycle. According to the comparison result, the backlight controller  151  drives the backlight  160  in the analog dimming mode or the digital dimming mode. 
         [0097]    For instance, in the case where the duty cycle of the dimming signal DIM is equal to or greater than a reference duty cycle, the backlight controller  151  drives the backlight  160  in the analog dimming mode. In the case where the duty cycle of the dimming signal DIM is less than the reference duty cycle, the backlight controller  151  drives the backlight  160  in the digital dimming mode. 
         [0098]      FIG. 4  is a block diagram showing the backlight controller  151  shown in  FIG. 3 , and  FIG. 5  is a timing diagram showing the dimming signal applied to the backlight controller  151  and a driving current flowing through the light source strings S 1 -Sk. The driving current may represent the sum total of the currents passing through the light source strings S 1 -Sk. 
         [0099]    The backlight controller  151  shown in  FIG. 4  drives the backlight  160  in the dimming mode. For the convenience of illustration, the pulse width modulation signal PWM is shown as the dimming signal DIM in  FIG. 5 , and the driving current of the backlight  160  is shown as an LED current. 
         [0100]    Referring to  FIGS. 4 and 5 , the backlight controller  151  includes a comparator COM that detects the frequency DF of the dimming signal DIM and compares the frequency DF with the reference frequency RF and a driver DRV that drives the backlight  160  according to the compared result. 
         [0101]    In the case where the frequency DF of the dimming signal DIM is less than the reference frequency RF, the driver DRV drives the backlight  160  in the analog dimming mode. In the case where the frequency DF of the dimming signal DIM is equal to or greater than the reference frequency RF, the driver DRV drives the backlight  160  in the mixed dimming mode. 
         [0102]    In the mixed dimming mode, in the case where the duty cycle (e.g., duty ratio) DRT of the dimming signal DIM is equal to or greater than the reference duty cycle (e.g., the reference duty ratio) RD, the driver DRV drives the backlight  160  in the analog dimming mode, and in the case where the duty cycle DRT of the dimming signal DIM is less than the reference duty cycle RD, the driver DRV drives the backlight  160  in the digital dimming mode. 
         [0103]    The comparator COM includes a frequency detector  1511  and a frequency comparator  1512 . The driver DRV includes a duty cycle detector (e.g., a duty ratio detector)  1513 , a duty cycle comparator (e.g., a duty ratio comparator)  1514 , a first driver  1515 , and a second driver  1516 . 
         [0104]    The frequency detector  1511  receives the dimming signal DIM of the backlight control signal BCS and detects the frequency of the dimming signal DIM. The frequency detector  1511  applies the detected frequency DF of the dimming signal DIM to the frequency comparator  1512 . 
         [0105]    The frequency comparator  1512  compares the frequency DF of the dimming signal DIM provided from the frequency detector  1511  with the reference frequency RF. As an example, the reference frequency DF may be set to about 1 KHz. The frequency comparator  1512  includes a first memory M 1  in which a value of the reference frequency RF is stored. 
         [0106]    The frequency comparator  1512  outputs control signals different from each other according to the compared result of the frequency DF of the dimming signal DIM and the reference frequency RF. For instance, in the case where the frequency DF of the dimming signal DIM is less than the reference frequency RF, the frequency comparator  1512  outputs a first control signal CS 1 . In the case where the frequency DF of the dimming signal DIM is equal to or greater than the reference frequency RF, the frequency comparator  1512  outputs a second control signal CS 2 . 
         [0107]    The frequency comparator  1512  applies the first control signal CS 1  to the first driver  1515  and applies a second control signal CS 2  to the duty cycle detector  1513 . 
         [0108]    The first driver  1515  receives the dimming signal DIM and drives the backlight  160  in the analog dimming mode in response to the first control signal CS 1  provided from the frequency comparator  1512 . For instance, the first driver  1515  is activated in response to the first control signal CS 1  and the activated first driver  1515  drives the backlight  160  in the analog dimming mode on the basis of the dimming signal DIM applied thereto. 
         [0109]    As shown in  FIG. 5 , in the case where the frequency DF of the dimming signal DIM is less than the reference frequency RF, the light source strings S 1  to Sk of the backlight  160  are in a full-on state and the amount of the current applied to the light source strings S 1  to Sk of the backlight  160  is controlled. Therefore, the brightness of the backlight  160  is controlled. 
         [0110]    The analog dimming mode is a method that the amount of the current applied to the light source strings S 1  to Sk is controlled depending on the duty cycle of the pulse width modulation signal PWM corresponding to the dimming signal DIM. The duty cycle indicates the ratio of the high period (or on period) to one cycle of the pulse width modulation signal PWM. For instance, when the duty cycle is about 30%, a current corresponding to about 30% of a maximum current Imax is applied to the light source strings S 1  to Sk as a driving current (LED current). 
         [0111]    Accordingly, in the case where the frequency DF of the dimming signal DIM is less than the reference frequency RF, the backlight controller  151  drives the backlight  160  in the analog dimming mode to control the brightness of the backlight  160 . 
         [0112]    The duty cycle detector  1513  receives the dimming signal DIM and detects the duty cycle DTR of the dimming signal DIM in response to the second control signal CS 2  provided from the frequency comparator  1512 . The duty cycle detector  1513  applies the detected duty cycle DTR of the dimming signal DIM to the duty cycle comparator  1514 . 
         [0113]    The duty cycle comparator  1514  compares the duty cycle DTR of the dimming signal DIM provided from the duty cycle detector  1513  with the reference duty cycle RD. As an example, the reference duty cycle RD may be set to about 25% of the cycle of the dimming signal DIM. The duty cycle comparator  1514  includes a second memory M 2  in which the reference duty cycle RD is stored. 
         [0114]    The duty cycle comparator  1514  outputs the control signals different from each other according to the compared result of the duty cycle DTR of the dimming signal DIM and the reference duty cycle RD. For instance, in the case where the duty cycle DTR of the dimming signal DIM is equal to or greater than the reference duty cycle RD, the duty cycle comparator  1514  outputs a third control signal CS 3 . In the case where the duty cycle DTR of the dimming signal DIM is less than the reference duty cycle RD, the duty cycle comparator  1514  outputs a fourth control signal CS 4 . 
         [0115]    The duty cycle comparator  1514  applies the third control signal CS 3  to the first driver  1515  and applies the fourth control signal CS 4  to the second driver  1516 . 
         [0116]    The first driver  1515  receives the dimming signal DIM and drives the backlight  160  in the analog dimming mode in response to the third control signal CS 3  provided from the duty cycle comparator  1514 . The operation in which the first driver  1515  controls the backlight  160  in response to the third control signal CS 3  is substantially the same as the operation in which the first driver  1515  controls the backlight  160  in response to the first control signal CS 1 . 
         [0117]    As shown in  FIG. 5 , in the case where the frequency DF of the dimming signal DIM is equal to or greater than the reference frequency RF and the duty cycle DTR of the dimming signal DIM is equal to or greater than the reference duty cycle RD, the light source strings S 1  to Sk are maintained in the full-on state and the amount of the current applied to the light source strings S 1  to Sk is controlled, thereby controlling the brightness of the backlight  160 . 
         [0118]    The second driver  1516  receives the dimming signal DIM and drives the backlight  160  in the digital dimming mode in response to the fourth control signal CS 4  provided from the duty cycle comparator  1514 . For instance, the second driver  1516  is activated in response to the fourth control signal CS 4  and the activated second driver  1516  drives the backlight  160  in the digital dimming mode on the basis of the dimming signal DIM applied thereto. 
         [0119]    As shown in  FIG. 5 , in the case where the frequency DF of the dimming signal DIM is equal to or greater than the reference frequency RF, and the duty cycle DTR of the dimming signal DIM is less than the reference duty cycle RD, the on/off operation of the light source strings S 1  to Sk of the backlight  160  is controlled, and thus the brightness of the backlight  160  is controlled. 
         [0120]    The digital dimming mode is a method in which the light source strings S 1  to Sk are turned on during the high level period of the pulse width modulation signal PWM corresponding to the dimming signal DIM. For instance, in the case where the duty cycle is about 30%, the light source strings S 1  to Sk are turned on during a period corresponding to about 30% of the one cycle of the dimming signal DIM. 
         [0121]    Therefore, in the case where the frequency DF of the dimming signal DIM is equal to or greater than the reference frequency RF, the backlight controller  151  drives the backlight  160  in the mixed dimming mode to control the brightness of the backlight  160 . 
         [0122]    In the case where the brightness of the backlight  160  linearly increases in proportion to the duty cycle DTR of the dimming signal DIM, the brightness of the backlight  160  may be precisely controlled. In the case where the duty cycle DTR of the dimming signal DIM is low in the analog dimming mode, the brightness of the backlight  160  is not linearly increased. Thus, the analog dimming mode has a disadvantage in that the brightness is difficult to control at a low grayscale level in the analog dimming mode. 
         [0123]    For instance, in the case where the duty cycle DTR of the dimming signal DIM is less than the reference duty cycle RD in the analog dimming mode, the brightness of the backlight  160  may not be linearly increased in proportion to the duty cycle DTR of the dimming signal DIM. In the case where the duty cycle DTR of the dimming signal DIM is equal to or greater than the reference duty cycle RD in the analog dimming mode, the brightness of the backlight  160  may be linearly increased in proportion to the duty cycle DTR of the dimming signal DIM. 
         [0124]    In the digital dimming mode, the brightness of the backlight  160  is linearly increased in proportion to the duty cycle DTR of the dimming signal DIM. Accordingly, the digital dimming mode may precisely control the brightness of the backlight  160 . 
         [0125]    In the present exemplary embodiment, in the case where the frequency DF of the dimming signal DIM is equal to or greater than the reference frequency RF and the duty cycle DTR of the dimming signal DIM is less than the reference duty cycle RF, the backlight  160  is driven in the digital dimming mode, and thus the brightness of the backlight  160  is precisely controlled. 
         [0126]    In the case where the backlight  160  is driven in the digital dimming mode, a waterfall phenomenon may occur. Although the backlight  160  is driven in the digital dimming mode, the waterfall phenomenon may not be perceived in the case where the dimming signal DIM has a high frequency equal to or greater than the reference frequency RF. However, in the case where the backlight  160  is driven in the digital dimming mode and the dimming signal DIM has a low frequency less than the reference frequency RF, the waterfall phenomenon may be perceived. The waterfall phenomenon will be described in further detail below. 
         [0127]      FIGS. 6A and 6B  are views illustrating a waterfall phenomenon. 
         [0128]    Hereinafter, a display panel  210  and a comparison backlight  260  shown in  FIGS. 6A and 6B  are respectively referred to as a comparison display panel  210  and a comparison backlight  260 . 
         [0129]    Referring to  FIGS. 6A and 6B , the comparison backlight  260  may be driven in the dimming mode without taking the frequency of the dimming signal into consideration. 
         [0130]    An operation frequency of the comparison display panel  210  may be defined as a frame frequency FRM and may be about 60 Hz. In the case where the frame frequency FRM is about 60 Hz, the image signals are applied to the comparison display panel  210  at sixty times per second. 
         [0131]    In the case where the frequency DF of the dimming signal is about 120 Hz and the comparison backlight  260  is driven in the digital dimming mode, the comparison backlight  260  is turned on 120 times per second. Therefore, in the case where the comparison display panel  210  displays the image once, the comparison backlight  260  is turned two times. 
         [0132]    As shown in  FIG. 6A , in the case where pixels PX arranged in a first area A 1  corresponding to a half of the comparison display panel  210  are charged with the data voltages, the comparison backlight  260  is turned on and provides the comparison display panel  210  with the light. 
         [0133]    As shown in  FIG. 6B , in the case where pixels PX arranged in a second area A 2  corresponding to the other half of the comparison display panel  210  are charged with the data voltages, the comparison backlight  260  is turned on again and provides the comparison display panel  210  with the light. In this case, a difference in brightness between the first and second areas A 1  and A 2  occurs and a boundary line BL between the first and second areas Al and A 2  may be perceived. 
         [0134]    In the above-mentioned description, the operation of the comparison display panel  210  has been described in the case where the frame frequency FRM is two times greater than the frequency DF of the dimming signal, but the frequency DF of the dimming signal may be suitably varied. In the case where the frequency DF of the dimming signal is varied, the number of the boundary lines BL and the position of the boundary line BL become different every frame, and as a result, the waterfall phenomenon in which the boundary line BL moves up and down may occur. 
         [0135]    In the present exemplary embodiment, in the case where the frequency DF of the dimming signal DIM is less than the reference frequency RF, the backlight  160  is driven in the analog dimming mode. Because the light source strings S 1  to Sk of the backlight  160  are maintained in the full-on state during the analog dimming mode, the waterfall phenomenon does not occurs. 
         [0136]    Consequently, because the backlight unit BLU and the display device  100  including the backlight unit BLU drive the backlight  160  in the analog dimming mode or the mixed dimming mode in accordance with the frequency DF of the dimming signal DIM, the waterfall phenomenon may be prevented from occurring. Thus, the display quality of the display device  100  may be improved. 
         [0137]      FIG. 7  is a flow diagram showing a method of driving the backlight unit BLU according to an exemplary embodiment of the present disclosure. 
         [0138]    Referring to  FIG. 7 , the frequency DF of the dimming signal DIM is detected (S 110 ) to drive the backlight  160  in the dimming mode. Then, the detected frequency DF of the dimming signal DIM is compared with the reference frequency RF (S 120 ). For instance, it is checked whether the frequency DF of the dimming signal DIM is less than the reference frequency RF in the operation S 120 . 
         [0139]    In the case where the frequency DF of the dimming signal DIM is less than the reference frequency RF, the backlight  160  is driven in the analog dimming mode (S 130 ). In the case where the frequency DF of the dimming signal DIM is equal to or greater than the reference frequency RF, the duty cycle DTR of the dimming signal DIM is detected (S 140 ). 
         [0140]    The detected duty cycle DTR of the dimming signal DIM is compared with the reference duty cycle RD (S 150 ). For instance, it is checked whether the duty cycle DTR of the dimming signal DIM is equal to or greater than the reference duty cycle RD in the operation S 150 . 
         [0141]    In the case where the duty cycle DTR of the dimming signal DIM is equal to or greater than the reference duty cycle RD, the backlight  160  is driven in the analog dimming mode (S 130 ). In the case where the duty cycle DTR of the dimming signal DIM is less than the reference duty cycle RD, the backlight  160  is driven in the digital dimming mode. Accordingly, when the frequency DF of the dimming signal DIM is equal to or greater than the reference frequency RF, the backlight  160  is driven in the mixed dimming mode. 
         [0142]    The light generated by the backlight  160  is provided to the display panel  110  and the display panel  110  displays the image using the light provided from the backlight  160 . 
         [0143]    By applying the driving method of the backlight unit BLU according to the present exemplary embodiment, the backlight  160  is driven in the analog dimming mode or the mixed dimming mode according to the frequency DF of the dimming signal DIM, and thus the waterfall is prevented from occurring, or is reduced. Therefore, the display quality of the display panel  110  may be improved. 
         [0144]    It will be understood that, although the terms “first”, “second”, “third”, etc., may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section, without departing from the spirit and scope of the inventive concept. 
         [0145]    In addition, it will also be understood that when a layer is referred to as being “between” two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. 
         [0146]    The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting of the inventive concept. As used herein, the singular forms “a” and “an” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “include,” “including,” “comprises,” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of,” when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list. Further, the use of “may” when describing embodiments of the inventive concept refers to “one or more embodiments of the inventive concept.” Also, the term “exemplary” is intended to refer to an example or illustration. 
         [0147]    As used herein, the term “substantially,” “about,” and similar terms are used as terms of approximation and not as terms of degree, and are intended to account for the inherent variations in measured or calculated values that would be recognized by those of ordinary skill in the art. 
         [0148]    As used herein, the terms “use,” “using,” and “used” may be considered synonymous with the terms “utilize,” “utilizing,” and “utilized,” respectively. 
         [0149]    The display device and/or any other relevant devices or components, such as the timing controller, the gate driver, the data driver, and the backlight driver, according to embodiments of the present invention described herein may be implemented utilizing any suitable hardware, firmware (e.g. an application-specific integrated circuit), software, or a suitable combination of software, firmware, and hardware. For example, the various components of the display device may be formed on one integrated circuit (IC) chip or on separate IC chips. Further, the various components of the display device may be implemented on a flexible printed circuit film, a tape carrier package (TCP), a printed circuit board (PCB), or formed on a same substrate. Further, the various components of the display device may be a process or thread, running on one or more processors, in one or more computing devices, executing computer program instructions and interacting with other system components for performing the various functionalities described herein. The computer program instructions are stored in a memory which may be implemented in a computing device using a standard memory device, such as, for example, a random access memory (RAM). The computer program instructions may also be stored in other non-transitory computer readable media such as, for example, a CD-ROM, flash drive, or the like. Also, a person of skill in the art should recognize that the functionality of various computing devices may be combined or integrated into a single computing device, or the functionality of a particular computing device may be distributed across one or more other computing devices without departing from the scope of the exemplary embodiments of the present invention. 
         [0150]    Although the exemplary embodiments of the present invention have been described, it is understood that the present invention should not be limited to these exemplary embodiments but various suitable changes and modifications can be made by one ordinary skilled in the art within the spirit and scope of the present invention as defined by the appended claims and equivalents thereof.