Abstract:
A method of forming a barrier on both the sidewalls and bottom of a via and the resulting device are provided. Embodiments include forming a metal line in a substrate; forming a Si-based insulating layer over the metal line and the substrate; forming a via in the Si-based insulating layer down to the metal line; forming a dual-layer Mn/MnN on sidewalls and a bottom surface of the via; and filling the via with metal.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application is a Divisional of U.S. application Ser. No. 14/059,498, filed Oct. 22, 2013, the content of which is incorporated herein by reference in its entirety. 
    
    
     TECHNICAL FIELD 
     The present disclosure relates to semiconductor interconnection. The present disclosure is particularly applicable to formation of diffusion barriers in the semiconductor interconnection. 
     BACKGROUND 
     Copper is a well-known material for wiring of microelectronic devices. Diffusion barriers prevent diffusion of copper, oxygen (O 2 ), and water (H 2 O), for example, into silica surfaces of the microelectronic devices. In a recent industry trend, Manganese silicate (MnSiO x ) is a newly introduced self-forming barrier (SFB) to replace conventional diffusion barriers. 
     A known approach of SFB involves a self-forming barrier process by chemical vapor deposition (CVD) of manganese (Mn), wherein the Mn diffuses into a silicon-based (Si-based) insulating layer to form a MnSiO x  barrier on the sidewalls of a via, as illustrated in  FIGS. 1A through 1F . In particular, a metal line  101 , e.g., of copper, is formed in a substrate  103 . Next, a capping layer  121 , e.g., silicon nitride (SiN), is formed on the substrate  103 , as depicted in  FIG. 1B . Then, a Si-based insulating layer  123  is formed on the capping layer  121 . Adverting to  FIG. 1C , a via is formed in the Si-based insulating layer  123  down to the metal line  101 . Thereafter, a Mn layer  141  is formed on the sidewalls of the Si-based insulating layer  123  and metal line  101  using CVD, as illustrated in  FIG. 1D . Adverting to  FIG. 1E , as a result of a sufficiently high deposition temperature or thermal annealing, the Mn barrier  141  reacts with the Si-based insulating layer  123  to form a MnSiO x  barrier  143  on the sidewalls of the via. However, the Mn layer  141  on the bottom of the via does not similarly react with the metal line  101 . Thereafter, the via is filled with a metal  161 , e.g., copper, as illustrated in  FIG. 1F . The absence of a MnSiO x  barrier on the bottom of the via causes a degradation of device reliability due, for example, to elecromigration. 
     A need therefore exists for methodology enabling formation of a self-forming barrier that protects both the sidewalls and bottom of a via against unwanted diffusion and/or electromigration, and the resulting device. 
     SUMMARY 
     An aspect of the present disclosure is a method of forming a dual-layer of Mn/MnN on the sidewalls and bottom of a via in situ by an ALD process. 
     Another aspect of the present disclosure is a device including a dual-layer of Mn/MnN formed on the sidewalls and bottom of a via. 
     Additional aspects and other features of the present disclosure will be set forth in the description which follows and in part will be apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the present disclosure. The advantages of the present disclosure may be realized and obtained as particularly pointed out in the appended claims. 
     According to the present disclosure, some technical effects may be achieved in part by a method including: forming a metal line in a substrate; forming a Si-based insulating layer over the metal line and the substrate; forming a via in the Si-based insulating layer down to the metal line; forming a dual-layer of Mn/MnN on sidewalls and a bottom surface of the via; and filling the via with metal. 
     Aspects of the present disclosure include forming the dual-layer in situ by an ALD process in an ALD chamber or by a chemical vapor deposition (CVD) process in a CVD chamber. Other aspects include forming the dual-layer by depositing Mn in the ALD chamber; and adding nitrogen-containing (N-containing) gas to the chamber during the ALD process. Further aspects include using N-containing gases such as nitrogen gas (N 2 ) or ammonia (NH 3 ). Another aspect includes forming the dual-layer at a temperature of 200° C. to 450° C. Other aspects include forming the dual-layer at a pressure of 0.1 Torr to 10 Torr. Further aspects include forming the Si-based dielectric layer of silicon oxide (SiO 2 ) or an ultra-low-k (ULK) dielectric material. Additional aspects include the Mn layer reacting with the SiO 2  or ULK dielectric material at the sidewalls of the via to form MnSiO x  to a thickness of 3 Å to 30 Å, and forming the MnN layer to a thickness of 3 Å to 30 Å on the MnSiO x  and on the Mn layer on the bottom surface of the via. Other aspects include performing a thermal anneal, wherein the Mn reacts with the Si-based insulating layer at the sidewalls to form the MnSiO x  barrier layer. Further aspects include forming a capping layer over the metal line and substrate prior to forming the Si-based dielectric, and forming the via through the capping layer. 
     Another aspect of the present disclosure is a device including: a metal line in a substrate; a Si-based insulating layer on the substrate and the metal line; a via formed through the Si-based insulating layer down to the metal line; a Mn layer formed on the metal line at a bottom surface of the via; a MnSiO x  layer formed on sidewalls of the via; and a MnN layer formed on the MnSiO x  and Mn layers; and a metal filling the via. Aspects of the device include the MnSiO x  layer being formed to a thickness of 3 Å to 30 Å. Other aspects include the MnN layer being formed to a thickness of 3 Å to 30 Å. Further aspects include the Si-based dielectric being formed of SiO 2  or a ULK dielectric material. Further aspects include a capping layer formed on the substrate under the Si-based dielectric. Another aspect includes the capping layer being formed of silicon nitride (SiN), metal cap, cobalt (Co), or cobalt/tungsten/aluminum (CoWAl). Other aspects include the metal filling the via being formed of copper. 
     Another aspect of the present disclosure is a method including: forming a metal line in a substrate; forming a Si-based insulating layer over the metal line and the substrate; forming a via in the Si-based insulating layer down to the metal line; depositing Mn on sidewalls and a bottom surface of the via by ALD in an ALD chamber or by a chemical vapor deposition (CVD) process in a CVD chamber; adding a N-containing gas to the ALD chamber during the ALD deposition to form a MnN layer to a thickness of 3 Å to 30 Å on the sidewalls and bottom surface of the via; and performing a thermal anneal, wherein the Mn reacts with the Si-based insulating layer at the sidewalls of the via to form a MnSiO x  barrier layer to a thickness of 3 Å to 30 Å. Other aspects include using N-containing gases such as N 2  or NH 3 . Further aspects include forming the Si-based insulating layer of SiO 2  or an ULK dielectric material. 
     Additional aspects and technical effects of the present disclosure will become readily apparent to those skilled in the art from the following detailed description wherein embodiments of the present disclosure are described simply by way of illustration of the best mode contemplated to carry out the present disclosure. As will be realized, the present disclosure is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the present disclosure. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawing and in which like reference numerals refer to similar elements and in which: 
         FIGS. 1A through 1F  schematically illustrate sequential steps of a background method of a self-forming barrier process using CVD of Mn; and 
         FIGS. 2 through 8  schematically illustrate sequential steps of a method of forming a dual-layer barrier of Mn/MnN in situ by an ALD process in an ALD chamber or by a CVD process in a CVD chamber, in accordance with an exemplary embodiment. 
     
    
    
     DETAILED DESCRIPTION 
     In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of exemplary embodiments. It should be apparent, however, that exemplary embodiments may be practiced without these specific details or with an equivalent arrangement. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring exemplary embodiments. In addition, unless otherwise indicated, all numbers expressing quantities, ratios, and numerical properties of ingredients, reaction conditions, and so forth used in the specification and claims are to be understood as being modified in all instances by the term “about.” 
     The present disclosure addresses and solves the current problem of device reliability degradation, e.g., electromigration, attendant upon current self-forming barrier processes, e.g., CVD of Mn, wherein a MnSiO x  barrier ultimately forms on sidewalls of a via, but does not form in the bottom of the via. By forming a dual layer of Mn/MnN in the via, a barrier is formed on all surfaces of the via, including the bottom surface. 
     Methodology in accordance with embodiments of the present disclosure includes forming a metal line in a substrate. A Si-based insulating layer is formed over the metal line and the substrate. A via is formed in the Si-based insulating layer down to the metal line. A dual-layer of Mn/MnN is formed on sidewalls and a bottom surface of the via. The via is filled with metal. 
     Still other aspects, features, and technical effects will be readily apparent to those skilled in this art from the following detailed description, wherein preferred embodiments are shown and described, simply by way of illustration of the best mode contemplated. The disclosure is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive. 
       FIGS. 2 through 8  schematically illustrate sequential steps of a method of forming a dual-layer barrier of Mn/MnN in situ by an ALD process in an ALD chamber or by a CVD process, according to an exemplary embodiment. Adverting to  FIG. 2 , similar to the background processes discussed with respect to  FIGS. 1A through 1F , a metal line  201 , e.g., copper, is formed in a substrate  203 . Next, a capping layer  301  of SiN, metal cap, Co, or CoWAl is formed on the metal line  201  and substrate  203 , and then a Si-based insulating layer  303 , e.g., SiO 2  or a ULK dielectric material, is formed on top of the capping layer  301 , as illustrated in  FIG. 3 . Adverting to  FIG. 4 , a via is formed in the Si-based insulating layer  303  down to the metal line  201 . 
     Next, a dual-layer of Mn/MnN is in the via formed by an ALD process in an ALD chamber (not shown for illustrative convenience) or by a CVD process in a CVD chamber (also not shown for illustrative convenience). The Mn layer  501  is first deposited by ALD, for example, on the sidewalls of the via (on the Si-based insulating layer  303 ) and on the bottom surface of the via (on the metal line  201 ), as depicted in  FIG. 5 . The Mn is deposited at a temperature of 200° C. to 450° C. and at a pressure of 0.1 Torr to 10 Torr. Consequently, the Mn layer  501  reacts with the SiO 2  or ULK dielectric material  205  at the sidewalls of the via to form a 3 Å to 30 Å layer of MnSiO x    601 , as depicted in  FIG. 6 . Alternatively, the Mn reacts with the sidewalls of the via during a later anneal to form the MnSiO x  layer  601 . 
     Adverting to  FIG. 7 , the MnN layer  701  is then deposited in situ on the MnSiO x  layer  601  and Mn layer  501  to a thickness of 3 Å to 30 Å. In particular, the MnN layer  701  is formed by adding an adequate amount of N-containing gas, e.g., N 2  or ammonia (NH 3 ), while continuing the ALD deposition of Mn. Last, the via is filled with a metal  801 , e.g., copper, as illustrated in  FIG. 8 . 
     The embodiments of the present disclosure can achieve several technical effects including improved device reliability, i.e., reducing electromigration, and a more robust barrier against diffusion of Cu and oxygen in a via. Embodiments of the present disclosure enjoy utility in various industrial applications as, for example, microprocessors, smart phones, mobile phones, cellular handsets, set-top boxes, DVD recorders and players, automotive navigation, printers and peripherals, networking and telecom equipment, gaming systems, and digital cameras. The present disclosure therefore enjoys industrial applicability in any of various types of integrated circuits including copper interconnect structures. 
     In the preceding description, the present disclosure is described with reference to specifically exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the present disclosure, as set forth in the claims. The specification and drawings are, accordingly, to be regarded as illustrative and not as restrictive. It is understood that the present disclosure is capable of using various other combinations and embodiments and is capable of any changes or modifications within the scope of the inventive concept as expressed herein.