Abstract:
A semiconductor package including a dam and a method for fabricating the same are provided. The semiconductor package comprises a package substrate, a semiconductor chip attached to the substrate, a TIM formed on the semiconductor chip, a dam that substantially surrounds the TIM, and a lid placed over the TIM to contact a surface thereof. Thus, a TIM can be prevented from flowing down from the original position at high temperatures. Therefore, the performance of the semiconductor package does not deteriorate even at high temperatures.

Description:
This application is a divisional of U.S. patent application Ser. No. 10/271,094 filed on Oct. 10, 2002, now abandoned, which is herein incorporated by reference in it&#39;s entirety. 

   BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention relates to a semiconductor package and a method for fabricating the same, and more particularly, to a semiconductor package including a thermal interface material (TIM) and a method for fabricating the same. 
   2. Description of the Related Art 
   It is essential for semiconductor packages for microprocessors and power semiconductor modules to transfer the heat generated during their operation sufficiently to the outside to prevent the degradation of the semiconductor chips. 
   For this purpose, a thermal interface material (TIM) is typically installed between a semiconductor chip and a lid or between a lid and a heat sink in a semiconductor package. A phase change material (PCM), which is one of the TIM, has excellent heat conductivity and interfacial adhesive strength. The PCM, however, has a defect in that it changes into a liquid state at a high temperature, e.g., above 60° C. That is, the PCM melts and does not function as the TIM at a high temperature, thereby deteriorating the performance of semiconductor packages. 
     FIG. 1  is a cross-sectional view of the structure of a TIM of a conventional semiconductor package. Referring to  FIG. 1 , a semiconductor chip  20  is attached to a substrate  10  via bumps  30 , and a TIM  40 , which is a PCM, is formed on the semiconductor chip  20 . Then, a lid  50  is attached to the substrate  10  via a sealant  60 , thus encapsulating the semiconductor chip  20 . The TIM  40  transmits heat generated from the semiconductor chip  20  to the lid  50 , and vice versa because it maintains a solid shape below a predetermined temperature. However, at high temperatures, the TIM  40  is liquefied and then flows away from the original position of the TIM  40 . Thus, the TIM  40  loses its inherent functions such as heat conductivity and interfacial adhesive strength. 
     FIG. 2  includes plan views for explaining changes in the shape of the TIM  40  when a temperature cycling test is performed on a conventional semiconductor package. Referring to  FIG. 2 , the temperature cycling test is one of many reliability tests that test how much a semiconductor package deteriorates due to heat by repeatedly placing the semiconductor packages at −55° C. and 125° C. for a predetermined time, respectively. 
     FIG. 2  includes, on the left side, a plan view of a semiconductor package prior to performing the temperature cycling test thereon, taken by an ultra-sonograph. Here, it should be noted that there is no change in the shape of the TIM  40  disposed between the semiconductor chip  20  and the lid  50 . 
   On the center of  FIG. 2  is shown a plan view of the semiconductor package on which the temperature cycling test (during which the semiconductor packages are placed at −55° C. and 125° C. for a predetermined time) was performed about 164 times. At this time, about 30% of the TIM  40  is liquefied and flows away. 
   On the right is shown a plan view of each of the semiconductor packages on which the temperature cycling test (during which the semiconductor packages are placed at −55° C. and 125° C. for a predetermined time) was performed about 773 times. At this time, only about 40% of the TIM  40  remains. 
   SUMMARY OF THE INVENTION 
   According to one embodiment of the present invention, a semiconductor package includes a substrate, a semiconductor chip attached to the substrate via bumps, a TIM attached to the top of the semiconductor chip, a dam that contacts the TIM and prevents the TIM from flowing down the semiconductor chip at high temperatures, and a lid that contacts the top of the TIM and being attached to the substrate and seals up the semiconductor chip and the dam. 
   According to another embodiment, a semiconductor package includes a substrate; a semiconductor chip attached to the substrate via bumps; a TIM attached to the top of the semiconductor chip, a lid that contacts the top of the TIM and attached to the substrate via a sealant, seals up the semiconductor chip and dam, and has square-shaped grooves at its bottom; and a dam being formed along the outline of the grooves of the lid and being in contact with the TIM. 
   According to yet another embodiment of the present invention, a method for fabricating a semiconductor package includes preparing a substrate; attaching a semiconductor chip to the substrate; forming a dam on the resultant structure having the semiconductor chip so as to prevent a TIM from being melting and flowing down the semiconductor chip; forming the TIM on the semiconductor chip; and attaching a lid to the substrate so that the TIM and the dam are in contact with the bottom of the lid. Here, forming the TIM may be performed prior to forming the dam. 
   According to still another embodiment of the present invention, a method for fabricating a semiconductor package, includes preparing a substrate a substrate; attaching a semiconductor chip including bumps to the substrate; attaching a lid to the substrate, wherein the lid has a supporter and injection holes to which a liquid metal that are required to form a dam and a TIM is injected; injecting a liquid material that is required to form the dam to the injection holes of the lid; and injecting a liquid material that is required to form the TIM to the injection holes. 
   Here, a liquid material that is required to form the TIM may be injected to the injection holes before injecting a liquid material that is required to form the dam to the injection holes of the lid. 
   To achieve yet another aspect of the present invention, a method for fabricating a semiconductor package, includes: preparing a substrate having a land at its bottom and bump connectors at its top as a frame; attaching a semiconductor chip including bumps to the substrate; forming a TIM on the semiconductor chip; processing a lid to have square-shaped grooves at its bottom such that portions of the TIM and semiconductor chip are inserted into the grooves; inserting a dam into the groove; attaching the lid having the grooves and dam to the substrate via a sealant such that the TIM is in contact with the surface of the grooves of the lid so as to prevent the TIM from melting and flowing down the semiconductor chip. 
   According to the present invention, the dam of the semiconductor package is capable of preventing a TIM, which is formed between a semiconductor chip and a lid, from melting and flowing down the semiconductor chip at high temperature. Therefore, the performance of the semiconductor package does not deteriorate at high temperature. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The above objectives and advantages of the present invention will become more apparent by describing in detail preferred embodiments thereof with reference to the attached drawings in which: 
       FIG. 1  is a cross-sectional view for explaining the structure of thermal interface material (TIM) of a conventional semiconductor package; 
       FIG. 2  are plan views for explaining changes in the shape of a TIM  40  when a temperature cycling test is performed on a conventional semiconductor package; 
       FIG. 3  is a cross-sectional view of a semiconductor package having a dam according to a first embodiment of the present invention; 
       FIG. 4  is a cross-sectional view of a semiconductor package having a dam according to a second embodiment of the present invention; 
       FIG. 5  is a cross-sectional view of a semiconductor package having a dam according to a third embodiment of the present invention; 
       FIG. 6  is a cross-sectional view of a semiconductor package having a dam according to a fourth embodiment of the present invention; 
       FIG. 7  is a cross-sectional view of a semiconductor package having a dam according to a fifth embodiment of the present invention; 
       FIG. 8  is a cross-sectional view of a semiconductor package having a dam according to a sixth embodiment of the present invention; 
       FIG. 9  is a cross-sectional view of a semiconductor package having a dam according to a seventh embodiment of the present invention; 
       FIG. 10  is a cross-sectional view of a semiconductor package having a dam according to an eighth embodiment of the present invention; 
       FIG. 11  is a cross-sectional view of a semiconductor package having a dam according to a ninth embodiment of the present invention; and 
       FIG. 12  is plan views for explaining the effects of a semiconductor package having a dam according to the present invention. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   The present invention now will be described more fully with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention, however, may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, the embodiments are provided so that its disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art. In the present invention, a semiconductor package is not limited to a specific semiconductor package such as a land grid array (LGA) illustrated in the drawings. Rather, it can be any other semiconductor packages, in which the principles of the present invention can be applied. Also, a material such as thermosetting epoxy, which has unchangeable properties and shape below about 125° C., is used as a dam in the embodiments of the present invention as described herein, but the thermosetting epoxy can be replaced with any material which has excellent heat conductivity and the properties that do not change at a high temperature. The same reference numerals in different drawings represent the same or like elements, and thus, their description will be omitted for brevity. 
   First Embodiment 
     FIG. 3  is a cross-sectional view of a semiconductor package having a darn  106 A according to a first embodiment of the present invention. In detail, the semiconductor package of  FIG. 1  includes a substrate  100 ; a semiconductor chip  102  attached to the semiconductor package  100  via a conductive bump such as a solder bump  110 ; a thermal interface material (TIM)  104  attached to the semiconductor chip  102 ; the dam  106 A installed to be in contact with the TIM  104  so as to prevent the TIM  104  from flowing down if it becomes liquefied due to heat; and a lid  108 A in contact with the top of the TIM  104  and encapsulating the semiconductor chip  102  and the dam  106 A. The lid  108 A is attached to the substrate  100  via a sealant  112 . In the first embodiment, the dam  106 A is formed on the substrate  100 , in contact with the sides of the TIM  104  and the semiconductor chip  102 , and a portion of the bottom of the lid  108 A. The dam  106 A, thus, substantially entirely surrounds the rectangle-shaped semiconductor chip  102  and TIM  104 . 
   The substrate  100 , similar to a ball grid array (BGA) package substrate, has bumps connection (not shown) to which the solder bump  110  of the semiconductor chip  102  can be attached on its top, and a land portion rack connection (not shown) to which a connector, installed in a printed circuit board (PCB), can be connected at its bottom. The substrate  100  is preferably one for a LGA. 
   Preferably, a bonding pad on the semiconductor chip  102  includes the solder bump  110 . The TIM  104  may be a phase change material (PCM). 
   The dam  106 A prevents the TIM  104 , which is a PCM, from melting and flowing down between the lid  108 A and the semiconductor chip  102 . A thermosetting epoxy that does not liquefied below about 125° C. is used for the dam  106 A according to an embodiment of the present invention. However, any other material that has excellent heat conductivity and is not liquefied at about 125° C. or the like can be used as the dam  106 A. 
   The lid  108 A is preferably formed of metal, for example, an alloy of copper and nickel, and is attached to the substrate  100  by the sealant  112  so as to protect the semiconductor chip  102 . The lid can be formed of any other suitable materials for application of the present invention. 
   Second Embodiment 
     FIG. 4  is a cross-sectional view of a semiconductor package including dam  106 A according to a second embodiment. Referring to  FIG. 4 , the bottom of a lid  108 B is processed to have irregularities, e.g., square, triangle or hemispherical-shaped irregularities, at its bottom. Due to the irregularities, an area where the lid  108 B and the TIM  104  are in contact with each other can be increased. Thus, the semiconductor package effectively discharges heat, generated by the operation of the semiconductor chip  102 , to the outside via the TIM  104  and the lid  108 B. Further, the TIM  104  and the lid  108 B can be more firmly bonded with each other through the irregularities. In addition, the same effect can be obtained by forming irregularities on the back side of the semiconductor chip  102 , opposite the active surface of the chip on which the solder bumps  110  are placed. 
   Third Embodiment 
     FIG. 5  is a cross-sectional view of a semiconductor package having a dam  106 B according to a third embodiment. Referring to  FIG. 5 , the dam  106 B is formed on a semiconductor chip  102  to prevent a TIM  104  from melting and flowing down. In contrast, the dams  106 A in  FIGS. 3 and 4  are in contact with the sides of the TIM  104  and the semiconductor chip  102 . Also, the bottom of a lid  108 C is processed to have a comparatively hemispherical-type irregularity. However, the irregularity may be omitted on the bottom of the lid  108 C. 
   Fourth Embodiment 
     FIG. 6  is a cross-sectional view of a semiconductor package including a dam  106 B according to a fourth embodiment. The fourth embodiment is a modified from the semiconductor package ( FIG. 5 ) according to the third embodiment in which the dam  106 B are formed on the semiconductor chip  102 . In the fourth embodiment, the bottom of a lid  108 D having the substantially hemispherical-type irregularity is additionally processed to have triangle-type irregularities, as shown in FIG.  6 . Because the lid  108 D has both the hemispherical-shaped and triangle-shaped irregularities, heat generated from the semiconductor chip  102  can be more effectively discharged and the TIM  104  can be more firmly attached to the lid  108 B. 
   Fifth Embodiment 
     FIG. 7  is a cross-sectional view of a semiconductor package including a dam  106 C according to a fifth embodiment of the present invention. The semiconductor package of  FIG. 7  is a modified from the semiconductor package according to the third embedment shown in FIG.  5 . In the fifth embodiment, a TIM  104  can be also effectively sealed by the dam  106 C, among others, with the dam  106 C and a lid  108 E having irregularities modified from the irregularities of the lid  108 C of FIG.  5 . Further, the height of the dam  106 C is higher than that of the TIM  104 , thus forming gaps in the dam  106 C. The gaps prevent the TIM  104  from flowing down from the semiconductor chip  102  at high temperatures. Once the dam  106 C is formed higher than the TIM  104 , it may not matter whether hemispherical-shaped irregularities of the lid  108 E are entirely filled with the dam  106 C or not. 
   Sixth Embodiment 
     FIG. 8  is a cross-sectional view of a semiconductor package including a dam  108 A according to a sixth embodiment of the present invention. The semiconductor package of  FIG. 8  is modified from the semiconductor package of  FIG. 3  according to the first embodiment. Referring to  FIG. 8 , a lid  108 A further includes a supporter  114  that supports the dam  106 A by enveloping the sides of the dam  106 A. The supporter  114  may be bonded with a substrate  100  by a sealant  112  if necessary. 
   Hereinafter, a method for fabricating semiconductor packages including a dam according to the first through sixth embodiments will now be described. First, a substrate having a land at its bottom and bump connectors at its top is prepared. Then, a semiconductor chip is attached to the substrate by connecting bumps of the semiconductor chip to the bump connectors. Thereafter, a dam is formed on the resultant structure. Next, a TIM is formed on the resultant structure having the dam, and then, a lid is attached to the resultant having the TIM via a sealant. The lid may be processed to have irregularities or have a supporter at its sides. 
   In the above method, the dam is formed after the TIM is formed. However, the TIM may be formed prior to forming the dam. 
   Seventh Embodiment 
     FIG. 9  is a cross-sectional view of a semiconductor package including a dam  106 D according to a seventh embodiment of the present invention. The semiconductor package is modified from the semiconductor package of  FIG. 8  according to the sixth embodiment, and further includes injection holes  116  in a lid  108 F, through which materials required for forming the dam  106 D and a TIM  104  are injected. 
   A method for fabricating the semiconductor package including the dam  106 D will now be described. First, a substrate  100  is prepared and a semiconductor chip  102  is attached to the substrate  100  by connecting bumps of the semiconductor chip  102  to solder bumps  110  of the substrate  100 . Then, the lid  108 E that has the injection holes  116  and is supported by a supporter  114  is bonded with the substrate  100  via a sealant  112  to seal up the semiconductor chip  102 . Next, a liquid material for forming the dam  106 D is injected through edge injection holes  116  of the lid  108 F and then a liquid PCM is injected through center injection holes  116  of the lid  108 F to form the TIM  104 . The shape of the dam  106 D and the TIM  104  may be modified in various ways depending on applications. 
   Eighth Embodiment 
     FIG. 10  is a cross-sectional view of a semiconductor package including a dam  106 A according to an eighth embodiment of the present invention. The semiconductor package of  FIG. 10  is a modified from the semiconductor package of  FIG. 9  according to the seventh embodiment, but a manufacturing process is substantially the same as that of the seventh embodiment, except that a TIM  104  is formed, and then, the dam  106 A is formed. 
   Ninth Embodiment 
     FIG. 11  is a cross-sectional view of a semiconductor package including a dam  106 E according to a ninth embodiment of the present invention. The semiconductor package of  FIG. 11  includes a substrate  100  having a land at its bottom and bump connectors at its top; a semiconductor chip  102  attached to the substrate via solder bumps  110 ; a TIM  104  attached to the semiconductor chip  102 ; a lid  108 G that is in contact with the top of the TIM  104 , attached to the substrate  100  via a sealant  112 , sealing up the semiconductor chip  102  and a dam  106 E. The lid  108 G has a recess at its bottom. The dam  106 E is formed along the periphery of the recess and is in contact with the TIM  104 . It is possible to more firmly seal up the TIM  104  if the dam  106 E is formed of an elastomer. 
   In order to fabricate the semiconductor package of  FIG. 11 , the substrate  100  is prepared and the semiconductor chip  102  having solder bumps  110  is attached to the substrate  100 . Next, a TIM  104  is formed on the semiconductor chip  102 . Then, the bottom of the lid  108 G is processed to have a square-shaped recess. Due to the recess, portions of the TIM  104  and the semiconductor chip  102  can be inserted into the lid  108 G. Then, the dam  106 E, which is formed of an elastomer, is inserted into the groove of the lid  108 G. Lastly, the lid  108 G is attached to the substrate  100  via a sealant  112  so as to seal up the semiconductor chip  102 . The dam  106 E according to the ninth embodiment can be manufactured more simply than the dam A through D according to the first through eighth embodiments. 
     FIG. 12  is plan views for explaining the effects of the semiconductor package including a dam according to embodiments of the present invention. In  FIG. 12 , the illustration on the left is a plan view of a semiconductor package on which a temperature cycling test has not yet performed, taken by an ultra-sonograph. The illustration on the right is a plan view of a semiconductor package on which a temperature cycling test was performed 530 times, taken by an ultra-sonograph. Referring to  FIG. 12 , it should be noted that a dam  106 A are formed to encompass a TIM  104 , and thus, the TIM  104  is still placed between the semiconductor chip  102  and the lid  108 A at high temperatures even after the temperature cycling test. Here, the dam  106 A is formed of a thermosetting epoxy. 
   As described above, a semiconductor package according to the present invention employs a dam to solve the problem of conventional semiconductor packages that a TIM melts and flows down a semiconductor chip at high temperatures, thus deteriorating the heat conductivity of the semiconductor package.