Abstract:
There is provided a power supply unit supplying a standby power by sharing a switch of a main converter. The power supply unit includes: a main converter, and a standby converter. The main converter controls a current flowing in a primary side winding of a main transformer and supplies a main power through a secondary side winding of the main transformer. The standby converter controls a current flowing in a primary side winding of a standby transformer and supplies a standby power through a secondary side winding of the standby transformer, and a portion of a plurality of switches of the main converter is included in switches of the standby converter.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims the priority of Korean Patent Application No. 10-2010-0134705 filed on Dec. 24, 2010, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The present invention relates to a power supply unit, and more particularly, to a power supply unit having improved efficiency in a standby mode for maintaining a ready state before an electronic product is normally operated. 
         [0004]    2. Description of the Related Art 
         [0005]    Generally, a power supply unit of an electronic product includes a separate independent auxiliary converter in order to provide a standby power, in addition to a main converter for providing a main power. The power supply unit of the electronic product, having the above-mentioned structure supplies the main power to the electronic product through the main converter during an operation (hereinafter, referred to as a ‘normal mode’) of the electronic product, and supplies the standby power to the electronic product through the above separate standby converter during a standby mode (indicating a mode for maintaining a ready state before the electronic product is normally operated). 
         [0006]    As the auxiliary converter for supplying the standby power, a flyback converter has mainly been used in recent years. While the flyback converter has been widely used due to the simple structure thereof, it may cause the efficiency of the entire power system to be lowered due to high voltage stress applied to switches and hard switching (indicating switching performed in a state in which the level of voltage between the switches or the level of current flowing in the switches is not zero). 
       SUMMARY OF THE INVENTION 
       [0007]    An object of the present invention provides a power supply unit having improved efficiency. 
         [0008]    According to an aspect of the present invention, there is provided a power supply unit including: a main converter including a primary side circuit including a plurality of switches connected to a primary side winding of a main transformer and a power supply input terminal to control a current flowing in the primary side winding of the main transformer and a secondary side circuit supplying a main power through a secondary side winding magnetically coupled to the primary side winding of the main transformer; and a standby converter including a primary side circuit including a plurality of switches connected to a primary side winding of a standby transformer and the power supply input terminal to control a current flowing in the primary side winding of the standby transformer and a secondary side circuit supplying a standby power through a secondary side winding magnetically coupled to the primary side winding of the standby transformer, wherein a portion of the plurality of switches of the main converter is included in the switches of the standby converter. 
         [0009]    The plurality of switches of the main converter may include a first switch and a second switch connected in series and a third switch and a fourth switch connected in series, both terminals of the first switch and the second switch being connected in parallel with the power supply input terminal, and both terminals of the third switch and the fourth switch being connected in parallel with the power supply input terminal, and the primary side winding of the main transformer is connected between a first node, which is a connection point between the first switch and the second switch, and a second node, which is a connection point between the third switch and the fourth switch. 
         [0010]    The standby converter may include the third switch and the fourth switch connected in parallel with the power supply input terminal; and an additional module including a clamping diode and a fifth switch connected in series, the clamping diode and the fifth switch being connected in parallel with the power supply input terminal, and the primary side winding of the standby transformer is connected between a third node, which is a connection point between the clamping diode and the fifth switch, and the second node. 
         [0011]    The secondary side circuit of the standby converter may include: a diode having an anode connected to the secondary side winding of the standby converter; and a capacitor having one terminal of a cathode of the diode and the other terminal connected to a ground. 
         [0012]    The secondary side circuit of the main converter may include: a line switching module including a sixth switch and a seventh switch each having one terminal connected to both terminals of the secondary side winding of the main transformer and the other terminal connected to each other; and an LC filter module connected in parallel with a center tap of the secondary side winding of the main transformer and the other terminals of the sixth and seventh switches. 
         [0013]    Each of the first to seventh switches may include a body diode and a parasitic capacitor connected in parallel therewith, and each of the third to fifth switches may be turned on after the body diode is turned on. 
         [0014]    The first and third switches or the second and fourth switches forming a closed loop together with the main transformer may be simultaneously turned on/off in a standby mode. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0015]    The above and other aspects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which: 
           [0016]      FIG. 1  is a concept diagram describing sharing of switches according to an exemplary embodiment of the present invention; 
           [0017]      FIG. 2  is a configuration diagram of a power supply unit according to an exemplary embodiment of the present invention; 
           [0018]      FIG. 3  is a waveform diagram showing waveforms of main components of a power converter according to an exemplary embodiment of the present invention in the case of a standby mode; and 
           [0019]      FIGS. 4 through 8  are diagrams showing elements activated in mode  1  to mode  5  of a power supply unit according to an exemplary embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0020]    Hereinafter, exemplary embodiments will be described in detail with reference to the accompanying drawings so that they can be easily practiced by those skilled in the art to which the present invention pertains. However, in describing the exemplary embodiments of the present invention, detailed descriptions of well-known functions or constructions are omitted so as not to obscure the description of the present invention with unnecessary detail. In addition, like reference numerals denote parts performing similar functions and actions throughout the drawings. 
         [0021]      FIG. 1  is a concept diagram illustrating the sharing of switches according to an exemplary embodiment of the present invention. A power supply unit according to an exemplary embodiment of the present invention is configured to include a phase shift full bridge (PSFB) converter as a main converter for supplying a main power and a two-switch flyback converter as a standby converter for supplying a standby power. Only primary side circuits A and B of the respective converters are shown in  FIG. 1 . A transformer is used for both of the main converter and the standby converter. Hereinafter, a circuit including a primary side winding of the transformer will be referred to as a primary side circuit, and a circuit including a secondary side winding of the transformer will be referred to as a secondary side circuit. 
         [0022]    As shown in  FIG. 1 , the primary side circuit A of the main converter has a bridge structure formed by four switches Q 1  to Q 4 , and the primary side circuit B of the standby converter has a bridge structure formed by two switches Q 5  and Q B  and two diodes D A  and D B . According to an exemplary embodiment of the present invention, two switches Q 3  and Q 4  on the right side of the primary side circuit A of the main converter may be shared with the primary side circuit B of the standby converter. More specifically, the switch Q 3  is substituted for the switch Q B  of the primary side circuit B of the standby converter, and the switch Q 4  is substituted for the diode D B  of the primary side circuit B of the standby converter. 
         [0023]    The power supply unit having the above structure will be described in detail with reference to  FIG. 2 . 
         [0024]    Referring to  FIG. 2 , a primary side circuit  100   a  of a main converter  100   a  and  100   b  may include a switching module Q 1  to Q 4  in which both terminals of the first switch Q 1  and the second switch Q 2  connected in series are connected in parallel with a power supply input terminal and both terminals of the third switch Q 3  and the fourth switch Q 4  connected in series are connected in parallel with the power supply input terminal, and a primary side winding  101   a  of a main transformer  101   a  and  101   b  connected between a first node N 1 , which is a connection point between the first switch Q 1  and the second switch Q 2 , and a second node N 2 , which is a connection point between the third switch Q 3  and the fourth switch Q 4 . 
         [0025]    A secondary side circuit  100   b  of the main converter  100   a  and  100   b  includes a secondary side winding  101   b  magnetically coupled to the primary side winding  101   a  of the main transformer  101   a  and  101   b , a line switching module including a sixth switch Q 6  and a seventh switch Q 7  connected to both terminals of the secondary side winding  101   b  to control a current flowing in an LC filter module L 01  and C 01 , behind them, and the LC filter module L 01  and C 01  connected between a center of the secondary side winding  101   b  and one terminal of the secondary side winding  101   b , and supplies a main power V o1  powered from the primary side circuit  100   a  to a load R o1 . 
         [0026]    Meanwhile, a primary side circuit  110   a  of a standby converter  110   a  and  110   b  may include an additional module connected in parallel with both terminals of the third switch Q 3  and the fourth switch Q 4  connected in series and including a clamping diode DA and the fifth switch Q 5  connected in series, and a primary side winding  111   a  of a standby transformer  111   a  and  111   b  connected between a third node N 3 , which is a connection point between the clamping diode D A  and the fifth switch Q 5 , and the second node N 2 . 
         [0027]    Finally, a secondary side circuit  110   b  of the standby converter  110   a  and  110   b  may include a secondary side winding  111   b  magnetically coupled to the primary side winding  111   a  of the standby transformer  111   a  and  111   b , a diode Do 2  having an anode connected to one terminal of the secondary side winding  111   b , and a capacitor C 02  having one terminal connected to a cathode of the diode D 02  and the other terminal connected to a ground. In addition, in each of the first switch Q 1  to the seventh switch Q 7 , a parasitic capacitor C and a body diode D are connected in parallel with each other. 
         [0028]      FIG. 3  is a waveform diagram showing waveforms of main components of a power converter according to an exemplary embodiment of the present invention in a standby mode; and  FIGS. 4 through 8  are diagrams showing elements activated in mode  1  to mode  5  of a power supply unit according to an exemplary embodiment of the present invention. 
         [0029]    Meanwhile, in describing an operation for each mode, it is assumed that the main transformer  101   a  and  101   b , is an ideal transformer, which includes a magnetizing inductor L m1  and a leakage inductor L k1 , and the standby transformer  111   a  and  111   b , is also an ideal transformer including a magnetizing inductor L m2  and a leakage inductor L k2 . Meanwhile, it is assumed that a turn ratio of the primary side and the secondary side is N (N=Np/Ns). Here, Np refers to the number of the primary side windings of the main transformer  101   a  and  101   b  and the standby transformer  111   a  and  111   b , and Ns refers to the number of the secondary side windings of the main transformer  101   a  and  101   b  and the standby transformer  111   a  and  111   b . In addition, it is assumed that an input power Vs and a standby power V o2  are constant, the respective switches Q 3  to Q 5  are ideal with the exception of the parasitic capacitor C and the body diode D, and other diodes D A  and D 02  are also ideal. 
         [0030]    Hereinafter, referring to  FIGS. 3 through 8 , an operational principle of a power supply unit will be described in detail for each mode thereof in the case of a standby mode. Meanwhile, although not specifically shown in the drawings, the first switch Q 1  is turned on/off simultaneously with the third switch Q 3 , and the second switch Q 2  is turned on/off simultaneously with the fourth switch Q 4 . Two switches Q 1  and Q 3  or Q 2  and Q 4  forming a closed loop together with the primary side winding  101   a  of the main transformer  101   a  and  101   b  may be simultaneously turned on/off to short circuit the primary side winding  101   a , thereby preventing the main power V o1  from being outputted. 
         [0031]    (A) Mode  1  (t 0 ˜t 1 ): Build-Up Period 
         [0032]    Referring to  FIGS. 3 and 4 , as a gate signal of the fifth switch Q 5  becomes high (H) the mode  1  begins. At t 0 , (assuming that the body diode of the Q 5  is turned on, prior to the mode  1 ) the fifth switch Q 5  is turned on through zero voltage switching. Since the third switch Q 3  and the fifth switch Q 5  are in a turned on state, a voltage V pri  at the primary side winding  111   a  of the standby transformer  111   a  and  111   b  is clamped to the input power Vs. Therefore, a primary side current i Lk2  linearly increases, and energy is stored in the magnetizing inductance L m2  of the standby transformer  111   a  and  111   b . As the fifth switch Q 5  is turned off, the mode  1  ends. A magnetizing current i Lm2  may be simply represented by the following Equation 1. 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       i 
                       
                         Lm 
                          
                         
                             
                         
                          
                         2 
                       
                     
                      
                     
                       ( 
                       t 
                       ) 
                     
                   
                   = 
                   
                     
                       
                         i 
                         
                           Lm 
                            
                           
                               
                           
                            
                           2 
                         
                       
                        
                       
                         ( 
                         
                           t 
                           0 
                         
                         ) 
                       
                     
                     + 
                     
                       
                         Vs 
                         
                           
                             L 
                             
                               m 
                                
                               
                                   
                               
                                
                               2 
                             
                           
                           + 
                           
                             L 
                             
                               k 
                                
                               
                                   
                               
                                
                               2 
                             
                           
                         
                       
                        
                       
                         ( 
                         
                           t 
                           - 
                           
                             t 
                             0 
                           
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   [ 
                   
                     Equation 
                      
                     
                         
                     
                      
                     1 
                   
                   ] 
                 
               
             
           
         
       
     
         [0033]    (B) Mode  2  (t 1 ˜t 2 ): Freewheeling Period 
         [0034]    The mode  2  is a freewheeling period. Referring to  FIGS. 3 and 5 , since the fifth switch Q 5  is turned off at t 1 , the voltage V pri  at the primary side winding  111   a  of the standby transformer  111   a  and  111   b  decreases to 0, and a voltage V Q5  applied to the parasitic capacitor C of the fifth switch Q 5  increases up to the input power Vs. In addition, the primary side current i Lk2  flowing in the primary side winding  111   a  of the standby transformer  111   a  and  111   b  is freewheeled to the clamping diode D A  and the third switch Q 3 . The primary side current i Lk2  is constantly maintained. As the fifth switch Q 3  is turned off, the mode  2  ends. 
         [0035]    In the mode  2 , the magnetizing current i Lm2  may be given by the following Equation 2. 
         [0000]        i   Lm2 ( t )= i   Lm2 ( t   1 )  [Equation 2]
 
         [0036]    (C) Mode  3  (t 2 ˜t 3 ): Powering Period 
         [0037]    The mode  3  is a powering period. Referring to  FIGS. 3 and 6 , as the third switch Q 3  is turned off at t 2 , the mode  3  starts. The energy stored in the mode  1  is transferred to the secondary side circuit  110   b . At the same time, the magnetizing current i Lm2  decreases to the level of 0. As the magnetizing current i Lm2  decreases to the level of 0, the mode  3  ends. 
         [0038]    The magnetizing current i Lm2  may be determined by the following Equation 3. 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       i 
                       
                         Lm 
                          
                         
                             
                         
                          
                         2 
                       
                     
                      
                     
                       ( 
                       t 
                       ) 
                     
                   
                   = 
                   
                     
                       
                         i 
                         
                           Lm 
                            
                           
                               
                           
                            
                           2 
                         
                       
                        
                       
                         ( 
                         
                           t 
                           2 
                         
                         ) 
                       
                     
                     + 
                     
                       
                         
                           NV 
                           
                             o 
                              
                             
                                 
                             
                              
                             2 
                           
                         
                         
                           L 
                           
                             m 
                              
                             
                                 
                             
                              
                             2 
                           
                         
                       
                        
                       
                         ( 
                         
                           t 
                           - 
                           
                             t 
                             2 
                           
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   [ 
                   
                     Equation 
                      
                     
                         
                     
                      
                     3 
                   
                   ] 
                 
               
             
           
         
       
     
         [0039]    (D) Mode  4  (t 3 ˜t 4 ): Resonant Period 
         [0040]    The mode  4  is a resonant period. Referring to  FIGS. 3 and 7 , the magnetizing current i Lm2  is 0 at t 3 . The magnetizing inductance Lm 2  and the leakage inductance L k2  resonate with the parasitic capacitor C of the fifth switch Q 5 , and the magnetizing current i Lm2  is reduced to the level of minus (−) during the period of mode  4 . Here, the magnetizing current i Lm2  discharges the parasitic capacitor of the fifth switch Q 5  through a channel of the fourth switch Q 4  in a turned on state. As a result, the body diode D of the fifth switch Q 5  is turned on, and the zero voltage switching of the fifth switch Q 5  may be ensured. 
         [0041]    The magnetizing current i Lm2  may be given by the following Equation 4. 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       i 
                       
                         Lm 
                          
                         
                             
                         
                          
                         2 
                       
                     
                      
                     
                       ( 
                       t 
                       ) 
                     
                   
                   = 
                   
                     
                       - 
                       
                         
                           
                             V 
                             
                               Q 
                                
                               
                                   
                               
                                
                               5 
                             
                           
                            
                           
                             ( 
                             
                               t 
                               3 
                             
                             ) 
                           
                         
                         Zr 
                       
                     
                      
                     
                       sin 
                        
                       
                         ( 
                         
                           
                             ω 
                             r 
                           
                            
                           t 
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   [ 
                   
                     Equation 
                      
                     
                         
                     
                      
                     4 
                   
                   ] 
                 
               
             
           
         
       
     
         [0042]    Where, 
         [0000]    
       
         
           
             
               
                 ω 
                 r 
               
               = 
               
                 1 
                 
                   ( 
                   
                     
                       
                         ( 
                         
                           
                             L 
                             
                               m 
                                
                               
                                   
                               
                                
                               2 
                             
                           
                           + 
                           
                             L 
                             
                               k 
                                
                               
                                   
                               
                                
                               2 
                             
                           
                         
                         ) 
                       
                        
                       Coss 
                     
                   
                 
               
             
             , 
             
               Zr 
               = 
               
                 
                   
                     
                       
                         L 
                         
                           m 
                            
                           
                               
                           
                            
                           2 
                         
                       
                       + 
                       
                         L 
                         
                           k 
                            
                           
                               
                           
                            
                           2 
                         
                       
                     
                     Coss 
                   
                 
                 . 
               
             
           
         
       
     
         [0043]    Meanwhile, Z r  indicates resonant impedance, ω r  indicates a resonant frequency, and Coss indicates a parasitic capacitance C. 
         [0044]    (E) Mode  5  (t 4 ˜t 5 ) 
         [0045]    Referring to  FIGS. 3 and 8 , the body diode D of the fifth switch Q 5  is turned on, and the primary side current i Lk2  flowing in the primary side winding  111   a  of the standby transformer  111   a  and  111   b  flows in the body diode D of the fifth switch Q 5  and the fourth switch Q 4 . Since the direction of the primary side current i Lk2  is still (−), the fifth switch Q 5  may be turned on the zero voltage switching in the following mode. 
         [0046]    As set forth above, according to the exemplary embodiments of the present invention, a portion Q 3  and Q 4  of the switches of the main converter  100   a  and  100   b  may be shared with the standby converter  110   a  and  110   b , whereby the standby power may be supplied and the efficiency of the power supply unit may be improved through the zero voltage switching. 
         [0047]    The exemplary embodiments of the present invention have been described with reference to the accompanying drawings. Herein, specific terms have been used, but are just used for the purpose of describing the present invention and are not used for qualifying the meaning or limiting the scope of the present invention, which is disclosed in the appended claims. Therefore, it will be appreciated to those skilled in the art that various modifications are made and other equivalent embodiments are available. Accordingly, the actual technical protection scope of the present invention must be determined by the spirit of the appended claims.