Abstract:
Apparatus and method for cross-fading moving image signals include structure and steps for temporarily storing moving image signals in a memory for a predetermined period of time. Moving image signals read out from the memory and newly-input moving image signals are continuously combined for an operation time equal to or greater than the predetermined period of time. Thus, it is possible to obtain combined signals such that the moving image signals overlap each other in a relatively simple arrangement without using a special magnetic head.

Description:
This application is a continuation of Application Ser. No. 08/361,045, filed Dec. 21, 1994, now abandoned. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an image signal processing apparatus and, more particularly, to an image signal processing apparatus having the function of combining a plurality of images. 
     2. Description of the Related Art 
     An explanation will be given below of a camera-integrated video cassette recorder (camcorder) as an example of an apparatus for handling image signals, particularly, moving image signals. 
     This type of camcorder has an overlapping (cross fade) function such that when a scene of a reproduced image is changed, the previous scene disappears gradually and at the same time the following scene appears gradually. 
     However, in the conventional apparatus of this type, the frame just before the recording is stopped is captured as a plurality of still image signals in the memory from among a series of moving image signals which are recorded just before, and the still image signals are combined with the newly input (photographed) moving image signals. Thus, overlapping (cross fade), wipe or other functions are realized, but a smooth overlapping which is characteristic of a moving image is not realized. 
     Also, a method is conceivable whereby the newly input (photographed) moving image signals are combined with the reproduced moving image signals while the moving image signals which have been recorded are reproduced, and the combined moving image signals are overwritten. In such a case, it is necessary to provide both a recording head and a reproducing head separately, and thus the apparatus is enlarged, which is objectionable. 
     SUMMARY OF THE INVENTION 
     In view of the above-described circumstances, it is an object of the present invention to provide an image signal processing apparatus and method capable of combining, by a simple arrangement, moving images which are input at different times. 
     To achieve the above-described object, according to one aspect of the present invention, there is provided an image signal processing apparatus, comprising: input means for inputting moving image signals; storing means for storing moving image signals input from the input means for a predetermined period of time; and combining means for combining the moving image signals read out from the storing means with the moving image signals which are input from the input means, wherein the combining means is capable of operating continuously for an operation period at least equal to or greater than the predetermined period of time. 
     According to another aspect of the present invention, a method of processing image signals includes the steps of (i) inputting moving image signals; (ii) temporarily storing the input moving image signals for a predetermined period of time; and (iii) continuously combining the stored moving image signals with newly input moving image signals for an operation period equal to or greater than said predetermined period of time. 
     The above and further objects, aspects and novel features of the invention will be more fully appreciated from the following detailed description when read in connection with the accompanying drawings. It is to be expressly understood, however, that the drawings are for the purpose of illustration only and are not intended to limit the invention. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram illustrating the schematic construction of a camcorder in accordance with one embodiment of the present invention; 
     FIG. 2 is a block diagram illustrating the construction of a compression circuit within a compression and expansion circuit of FIG. 1; 
     FIG. 3 is a block diagram illustrating the construction of an expansion circuit within the compression and expansion circuit of FIG. 1; 
     FIGS.  4 ( a ) to  4 ( f ) are diagrams illustrating changes of the operating mode of the camcorder of FIG. 1, and the signals of the timings thereof; 
     FIG. 5 is an illustration of recording tracks on the tape recorded by the camcorder of FIG. 1; 
     FIG. 6 is a flowchart illustrating the operation of the camcorder of FIG. 1; 
     FIG. 7 is a block diagram illustrating the schematic construction of a camcorder in accordance with another embodiment of the present invention; 
     FIGS. 8 and 9 are flowcharts illustrating the operation of the camcorder of FIG. 1; 
     FIG. 10 is a block diagram illustrating the schematic construction of a camcorder in accordance with still another embodiment of the present invention; and 
     FIG. 11 is a waveform chart illustrating the operation of each embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Preferred embodiments of the present invention will be explained below in detail with reference to the accompanying drawings. 
     FIG. 1 is a block diagram illustrating the schematic construction of a recording and reproducing apparatus, such as a camcorder, in accordance with one embodiment of the present invention. 
     In the recording and reproducing apparatus, a video image formed by a lens  1  is photoelectrically converted by a CCD  2  (which is an imaging element) and formed into moving image signals, converted into digital signals by an analog/digital (A/D) conversion circuit  3 , and separated into a luminance signal Y and a color signal C by a camera process circuit  4 . The CCD  2  has a γ correction circuit, a knee correction circuit, and the like contained therein. 
     The luminance signal Y and the color signal C from the camera process circuit  4  are output to a compression and expansion circuit  5  and a first multiplication circuit  6 . 
     The moving image signals which are input to the compression and expansion circuit  5  are compressed therein by a compression circuit  5   a  (FIG. 2) and stored in a memory  8 . 
     FIG. 2 is a block diagram illustrating the schematic construction of the compression circuit  5   a . The correlation of the moving image signals input from the camera process circuit  4  is decreased by a known ADCT (Adaptive Discrete Cosine Transform) orthogonal transform method, such as DCT transform or Hadamard transform, by means of an information extracting circuit  5   a - 1 . The signals are quantized by a quantization circuit  5   a - 2 , assigned with binary codes by a code assigning circuit  5   a - 3 , and stored in the memory  8  under the control of a CPU  7 . 
     A memory control circuit  16  (FIG. 1) controls the memory  8  in such a way that the up-to-data image data is always sequentially stored. When the amount of stored data in the memory  8  is counted, and when CPU  7  detects that the amount of stored data has reached a preset amount of data, the oldest data of the stored image data is overwritten with new data in turn by a first-in first-out operation. 
     In this embodiment, the overlapping time T is set at five seconds, and the amount of stored data which is set initially in the memory control circuit  16  by the CPU  7  is set at an amount of data for three seconds. The memory  8  enters a write mode by the first-in first-out operation when this apparatus is in the normal recording mode or in the E/E mode (the camera is operated, and the recorder section of the VCR is not in the recording mode). In the E/E mode, the luminance signal Y and the color signal C output from D/A converters  12  and  13 , which will be described later, are output from output terminals  31  and  32 . 
     The compressed moving image signals stored in the memory  8  are expanded by an expansion circuit  5   b  (FIG. 3) of the compression and expansion circuit  5 , multiplied by a coefficient (1−α) (0≦α≦1) supplied from the CPU  7  in a second multiplication circuit  9 , and output to addition circuits  10  and  11 . 
     FIG. 3 is a block diagram illustrating the schematic construction of the expansion circuit  5   b . The compressed data read out from the memory  8  is decoded by a decoding circuit  5   b - 1 , inverse quantized by an inverse quantization circuit  5   b - 2 , decoded to the original moving image signals by a decoding operation of inverse orthogonal transform, such as IADCT, performed by an information decoding circuit  5   b - 3 , and output to the second multiplication circuit  9 . 
     Regarding the moving image signals input to the first multiplication circuit  6  (FIG.  1 ), the luminance signal Y is multiplied by a coefficient [α] (0≦α≦1) (supplied from the CPU  7 ) in a circuit  6   a , and the color signal C is multiplied by a coefficient a (0≦α≦1) (also supplied from the CPU  7 ) in a circuit  6   b , and output to the addition circuits  10  and  11 , respectively. 
     The luminance signal Y and the color signal C input to the second multiplication circuit  9  are multiplied by a coefficient (1−α) (0≦1−α≦1) (supplied from the CPU  7 ) in a circuit  9   a  and a circuit  9   b , respectively, and output to the addition circuits  10  and  11 , respectively. Regarding the moving image signals output from the first multiplication circuit  6  and the second multiplication circuit  9 , the luminance signals Y are added by the addition circuit  10 , and the color signals C are added by the addition circuit  11 . They are then converted into analog signals by the D/A conversion circuits  12  and  13 , respectively, and then recorded on a recording medium, such as magnetic tape, by a magnetic head H in a recorder  14 . 
     In the overlapping operation, the values of the coefficient α of the first multiplication circuit  6  and the coefficient (1−α) of the second multiplication circuit  9  are controlled and synchronized by the CPU  7 . During the normal recording, the coefficient α is set at “1”, and the coefficient (1−α) is set at “0”. 
     For a method of increasing the coefficient α and a method of decreasing the coefficient (1−α) in the overlapping operation, any method of increasing the coefficient a and any method of decreasing the coefficient (1−α) relative to the overlapping elapsed time may be used, such as the straight line method depicted in FIG.  11 . 
     Reference numeral  15  (FIG. 1) denotes a record trigger switch for inputting a trigger command. The CPU  7 , in response to a trigger command input from the record trigger switch  15 , stops the recording operation of the recorder  14 , holds the stored contents of the memory  8  at that time, and changes the set value of the memory control circuit  16  to cause the data stored in memory  8  to increase from an amount of data for three seconds to an amount of data for five seconds, corresponding to the overlapping time. Next, the memory  8  stores data for two seconds in addition to the held data in response to the change in the set value of the memory control circuit  16 . As a result, compressed data corresponding to the overlapping time is stored as moving image signals in the memory  8 . At this time, the recorder  14  causes a tape movement mechanism TT to rewind tape in order to adjust the recording position on the magnetic tape. 
     At the next trigger command input, the memory  8  starts reading out moving image signals. That is, the moving image signals read out from the memory  8  are expanded by the compression and expansion circuit  5 , multiplied by a coefficient (1−α) in the second multiplication circuit  9 , added to the moving image signals output from the camera process circuit  4  (which signals are multiplied by a coefficient α in the first multiplication circuit  6 ) by means of addition circuits  10  and  11 , and output as overlapping moving image signals to the recorder  14 . 
     FIGS.  4 ( a ) to  4 ( f ) are timing charts of the operation of the above-described apparatus. FIG.  4 ( a ) is an illustration of the operating mode of this apparatus; FIG.  4 ( b ) is an illustration of a trigger command input from the record trigger switch  15 ; FIG.  4 ( c ) is an illustration of an output signal level of the camera process circuit  4 ; FIGS.  4 ( d ) and  4 ( e ) are illustrations of output signal levels of the second multiplication circuit  9  and the first multiplication circuit  6 , respectively; and FIG.  4 ( f ) is an illustration of an output signal level from the D/A conversion circuits  12  and  13  to the recorder  14 . 
     During recording by this apparatus, the operating mode is initially in the pause mode as shown in the left end portion of FIG.  4 ( a ). 
     Next, when a trigger command is received by the record trigger switch  15  at time ts shown in FIG.  4 ( b ), this apparatus enters a normal recording mode, and the recorder  14  starts recording moving image signals. At the same time, the output from the camera process circuit  4  is compressed by the compression and expansion circuit  5  and stored in the memory  8 . 
     In this embodiment, as described above, the overlapping time T is set at five seconds, and the amount of stored data which is set initially in the memory control circuit  16  by the CPU  7  is set at an amount of data for three seconds. The memory  8  is controlled by the memory control circuit  16  in order to always store up-to-date compressed moving image signals for three seconds by the first-in first-out operation. 
     Next, when a trigger command is issued at time t 1  in FIG.  4 ( b ), this apparatus stops the recording operation of the recorder  14  and enters a mode in which the magnetic tape is rewound, and after the magnetic tape is rewound for three seconds, the apparatus enters a pause mode. 
     On the other hand, the memory  8  stops writing the moving image signals at time t 1  and holds the moving image signals serving as compressed data for three seconds from time t 0  to t 1  shown in FIG.  4 ( c ). At this time, the amount of set data of the memory control circuit  16  for three seconds is changed to image data for five seconds by the CPU  7 . The memory  8  writes the moving image signals for two additional seconds from time t 1  to t 2  to be added to the moving image signals for three seconds which were previously stored. Therefore, the moving image signals for five seconds from time t 0  to t 2  are stored in the memory  8 , and the stored moving image signals are used for overlapping recording from time t 3 . During the two seconds from t 1  to t 2 , it is necessary that the camera be directed to a desired subject. 
     The rewinding of the magnetic tape is performed to avoid the following: if the same scene is recorded successively, the reproduced image is very awkward since the moving image signals from t 0  to t 1  used for overlapping have already been recorded on the magnetic tape. 
     FIG. 5 is an illustration of the state of recording tracks formed on the magnetic tape by the rotary magnetic head H inside the recorder  14 . Each track is successively formed newly in a direction opposite to the movement of the tape indicated by the arrow X in FIG.  5 . Signals are newly recorded in the direction of the rotation of the head indicated by the arrow Y in each track. 
     The position of the magnetic head at time t 0  in FIG.  4 ( a ) is set at the record start position A (the lowest portion of a track r 1 ) in FIG.  5 . The recorder  14  begins to record the moving image signals onto the magnetic tape from time ts at which the normal recording starts, and moving image signals are recorded on the magnetic tape continuously until the normal recording by the magnetic head terminates at time t 1 . 
     When the magnetic head comes to a recording termination position B (the highest portion of the track rn) on the track rn at time t 1 , the magnetic tape is rewound for three seconds so that the magnetic head is returned to the position A of the track r 1 . Therefore, when the overlapping recording is started at time t 3 , the moving image signals recorded from the record start position A of the track r 1  to the record termination position B of the track rn are recorded as an image overlapping the video image photographed by the camera from time t 3  on the magnetic tape. 
     Next, when a trigger command is received at time t 3  (see FIG.  4 ), this apparatus enters an overlapping recording mode in which the image data stored in the memory  8  is read out for five seconds by the time t 4 , expanded by the compression and expansion circuit  5 , and added to the moving image signals from the camera process circuit  4  which have been multiplied by the coefficient (1−α) in the second multiplication circuit  9  (as shown in FIG.  4 ( d )) and multiplied by the coefficient α by the first multiplication circuit  6  (as shown in FIG.  4 ( e ))) by means of the addition circuits  10  and  11 . The added signals are then formed into an overlapping video image shown in FIG.  4 ( f ), and converted into analog signals by the D/A converters  12  and  13 , after which the signals are recorded by the recorder  14 . Control signals m 1  and m 2  supplied to the first multiplication circuit  6  and the second multiplication circuit  9  before and after times t 3  and t 4  are as shown in FIG.  11 . 
     When all the image data stored in the memory  8  has been completely read out at time t 4  and the overlapping recording is terminated, as shown in FIG.  4 ( a ), the normal recording and writing of image data for three seconds in the recorder  14  is started. That is, at the same time as the moving image signals are begun to be written in the memory  8 , the set value of the memory control circuit  16  is reset at the amount of data for three seconds by the CPU  7 , and the up-to-date image data for three seconds is always stored and held in the memory  8  by the first-in first-out operation under the control of the memory control circuit  16 . 
     FIG. 6 is a flowchart illustrating the flow of the above-described control operation of the CPU  7 . 
     In the figure, during recording, the apparatus is initially placed in the pause mode (step S 1 ). In step S 2 , a check is made to determine if a trigger input has been received. If there has been a trigger input, the process proceeds to step S 3  where the normal recording is started and at the same time the image data is begun to be written in the memory  8 . Thus, the up-to-date image data for three seconds is always held during the recording of the previous scene. 
     Next, a check is made in step S 4  to determine if there has been a trigger input. If there has not been a trigger input, the process returns to step S 3 , and if there has been a trigger input, the process proceeds to step S 5  where this apparatus has been set in the overlapping mode. If the apparatus is not in the overlapping mode in step S 5 , the process returns to step S 1 , and if the apparatus is in the overlapping mode, the process proceeds to step S 6  where additional image data for two seconds is stored in the memory  8  in such a manner as to be added to the image data for three seconds. On the other hand, if there has been a trigger input in step S 4 , the writing of the image data is stopped at that time, and the tape for three seconds is rewound (step S 7 ), after which the apparatus is placed in the pause state (step S 8 ). 
     Next, in step S 9 , a check is made again to determine if there has been a trigger input. If it is determined that a trigger input has been received, the process proceeds to step S 10  where the overlapping recording is initiated. When the overlapping recording for five seconds is terminated, the process returns to step S 3 . During the overlapping recording, the output signals from the first multiplication circuit  6  and the second multiplication circuit  9  vary as indicated by the solid lines m 1  and m 2  of FIG.  11 . 
     Next, a second embodiment of the present invention will be explained in detail with reference to FIGS. 7 to  9 . 
     FIG. 7 is a block diagram illustrating the schematic construction of a recording and reproducing apparatus in accordance with the second embodiment of the present invention. The components in FIG. 7 which are the same as those in FIG. 1 are given the same reference numerals, and an explanation thereof is omitted. 
     The recording and reproducing apparatus, in addition to the components of the recording and reproducing apparatus of the first embodiment, has a write trigger switch  17  and a read trigger switch  18  provided therein. The write trigger switch  17  instructs the writing of the moving image signals in the memory  8 , and the read trigger switch  18  instructs the reading of the moving image signals from the memory  8 . 
     More specifically, when the CPU  7  detects that the write trigger switch  17  is depressed, the memory  8  initiates writing of the moving image signals compressed by the compression and expansion circuit  5  under the control of the memory control circuit  16  regardless of the operating mode of this apparatus from the time the switch  17  is depressed. When the amount of written data reaches the amount of data corresponding to the overlapping time T, then the writing operation is terminated so that the stored contents are held. The moving image signals held in the memory  8  as a result of the write trigger switch  17  being depressed are held until the read trigger switch  18  is depressed. 
     When the CPU  7  detects that the read trigger switch  18  has been depressed, reading out of the moving image signals stored and held in the memory  8  at that time is initiated regardless of the operating mode of this apparatus. Thus, the moving image signals from the CCD  2  are gradually replaced with the moving image signals read out from the memory  8 , and the switched overlapping image is sent out to the recorder  14 . That is, when the moving image signals have been stored and held in the memory  8  in accordance with an instruction from the write trigger switch  17 , the CPU  7  initiates reading out of the moving image signals from the memory  8  and at the same time sets the coefficient α to be supplied to the first multiplication circuit  6  at “1” and the coefficient (1−α) to be supplied to the second multiplication circuit  9  at “0”. Thereafter, the coefficient α is gradually decreased from “1” to “0” and the coefficient (1−α) is gradually increased from “0” to “1” over the overlapping time T, and thus the overlapping image is sent out to the recorder  14 . 
     Therefore, in a case in which the moving image signals have been stored and held in the memory  8  by actuating the write trigger switch  17 , upon the read trigger switch  18  being depressed when the operating mode is the normal recording mode or the E/E mode, the reading out of the memory  8  is initiated from when the read trigger switch  18  is depressed, and overlapping image signals which overlap the moving image signals from the CCD  2  are sent out to the recorder  14 . 
     When the memory  8  is in the writing mode, that is, when the contents of the memory  8  are not held by actuation of the write trigger switch  17 , the writing in the memory  8  is stopped when the read trigger switch  18  is depressed. The moving image data (compressed data) for the duration from when the read trigger switch  18  was depressed back to the time corresponding to the storage capacity of the memory  8  is stored in the memory  8 . At the same time, the reading of the memory  8  is initiated, and overlapping image signals which overlap the moving image signals from the CCD  2  are sent out to the recorder  14 . The reproduced luminance signal Y and the reproduced color signal C of the recorder  14  are digitized by A/D converters  32  and  33 , respectively. The digitized signals (* 1 , * 2 ), with the luminance signal Y and the color signal C which are output from the camera process circuit  4 , are output from selecting circuits  34  and  35 . 
     FIGS. 8 and 9 are flowcharts illustrating the control procedure in accordance with the second embodiment of the present invention. 
     In step S 61 , a check is made of the operating mode of this apparatus. When the apparatus is in the recording (REC) mode or the E/E mode, the process proceeds to step S 62  where the moving image signals are begun to be written in the memory  8  on the basis of the first-in first-out operation. 
     Next, the process proceeds to step S 63  where a check is made to determine if there has been a trigger input. If no trigger input has been received, the process returns to step S 61 , and if there has been a trigger input, a check is made to determine which trigger switch of the trigger switches  15 ,  17  and  18  of FIG. 5 has been depressed (step S 64 ). 
     When the record trigger switch  15  has been depressed, this apparatus enters the pause mode, and the recorder  14  temporarily stops recording (step S 65 ). At the same time, the writing of the compressed data on the basis of the first-in first-out operation in the memory  8  is stopped so that the storage contents at that time are held (step S 66 ), and the process proceeds to step S 67 . 
     When the write trigger switch  34  is depressed in step S 64 , the process proceeds to step S 72  where the memory  8  is reset, and the writing of the moving image signals is newly initiated. When the writing of the moving image signals up to the memory capacity corresponding to the overlapping time T is terminated, the writing is stopped, and the memory contents of the memory  8  at that time are held (step S 73 ), and the process proceeds to step S 67 . 
     In step S 67 , a check is made again to determine if the trigger switches  15 ,  17  and  18  have been depressed. When the write trigger switch  17  has been depressed, the process returns to step S 72 , and when the read trigger switch  18  has been depressed, the process proceeds to step S 71 , which will be described later. 
     On the other hand, when the record trigger switch  15  as been depressed, the recorder  14  initiates the recording operation (step S 68 ), further, the reading out of the moving image signals held in the memory  8  is initiated (step S 69 ), the value of the coefficient α to be supplied to the first multiplication circuit  6  is set at “0” and the value of the coefficient (1−α) to be supplied to the second multiplication circuit  9  is set at “1” (step S 81 ). Next, over the overlapping time T during which the overlapping recording is terminated, the value of the coefficient α is gradually increased to “1”, and the value of the coefficient (1−α) is gradually decreased to “0” (step S 82 ). Upon the termination of the overlapping recording, the reading out of the moving image signals from the memory  8  is stopped (step S 83 ). 
     When the overlapping recording of the moving image signals from the CCD  2  and the moving image signals from the memory  8  is terminated in the above-described way, the process returns to step S 61 . 
     When the read trigger switch  18  is depressed in step S 64  or S 67 , the process proceeds to step S 71  where the writing of the moving image signals in the memory  8  is stopped, and the memory contents of the memory  8  at that time are held. Then, the reading out of the moving image signals held is initiated (step S 69 ), the above-described operation of step  81  and the subsequent operations are performed, and the process returns to step S 61 . 
     If the apparatus is in the reproduction mode in step  61 , the moving image signals are read out from the magnetic tape by the recorder  14  of this apparatus. The signals are input to the compression and expansion circuit  5  via the A/D converters  32  and  33 , and the selecting circuits  34  and  35 . Then, in the next step S 74 , a check is made to determine if there has been a trigger input. If it is determined in step  75  that the record trigger switch  15  has been depressed, the process returns to step S 65 . 
     If it is determined in step S 75  that the record trigger switch  15  has been depressed, the process proceeds to step S 76  where the reproduced moving image signals are begun to be newly written. When the writing of the moving image signals up to the storage capacity corresponding to the overlapping time is terminated, the writing is terminated, and the storage contents of the memory  8  at that time are held (step S 77 ), and the process returns to step S 74 . If it is determined in step S 75  that the read trigger switch  18  has been depressed, the process proceeds to step S 78  where the memory mode is checked. 
     That is, if the moving image signals have not been stored in the memory  8 , the process proceeds to step S 77  where the moving image signals for the storage capacity are stored, and the process returns to step S 74 . 
     If it is determined in step S 78  that the writing and storage of the moving image signals for the storage capacity have already been completed, the reading out of the moving held image signals is initiated in step S 79 . The value of the coefficient α to be supplied to the first multiplication circuit  6  is set at “0”, and the value of the coefficient (1−α) to be supplied to the second multiplication circuit  9  is set at “1” (step S 84 ). Next, over the overlapping time T until all the image data stored in the memory  8  have been completely read out, the value of the coefficient α is gradually increased to “1”, and the value of the coefficient (1−α) is gradually decreased to “0” (step S 85 ). Upon the termination of the overlapping time T, the reading out of the moving image signals from the memory  8  is stopped (step S 86 ). If it is determined in step S 78  that the reading out of the moving image signals from the memory  8  has already been initiated, the operations from step S 84  to step S 86  are performed in the same way as described above. 
     Next, a third embodiment of the present invention will be explained with reference to FIG.  10 . 
     FIG. 10 is a block diagram illustrating the schematic construction of a recording and reproducing apparatus in accordance with a third embodiment of the present invention. The components in FIG. 10 which are the same as those in FIG. 1 or  7  are given the same reference numerals, and an explanation thereof is omitted. 
     This apparatus, in addition to the components of the recording and reproducing apparatus of the first or second embodiment, has an external input terminal  19  and a selecting switch  20  provided therein. 
     The external input terminal  19  is a terminal for inputting moving image signals from external devices. When the selecting switch  20  has selected the terminal for inputting signals from the external input terminal  19 , the moving image signals input from the terminal  19  are output to the A/D converter  3  via the selecting switch  20 . 
     Also, when the selecting switch  20  has selected the terminal for inputting signals from the CCD  2 , the moving image signals from the CCD  2  are output to the A/D converter  3  via the selecting switch  20 . 
     Next, a description will be given of the operation of the recording and reproducing apparatus in accordance with the third embodiment of the present invention in a case in which the selecting switch  20  has selected the terminal for inputting signals from the external input terminal  19 . 
     When the CPU  7  detects that the write trigger switch  17  has been depressed, the memory  8  initiates writing the moving image signals which are input from the external input terminal  19  via the selecting switch  20  and which are compressed by the compression and expansion circuit  5  regardless of the operating mode of this apparatus from the time the write trigger switch  17  has been depressed under the control of the memory control circuit  16 . When the amount of written data reaches the amount of data corresponding to the overlapping time T, the writing operation terminates at that time, and the storage contents are held. As a result of the write trigger switch  17  being depressed, the moving image signals held in the memory  8  are held until the read trigger switch  18  is depressed. 
     When the CPU  7  detects that the read trigger switch  18  has been depressed, the moving image signals stored in the memory  8  at that time are begun to be read out regardless of the operating mode of this apparatus. The moving image signals input from the external input terminal  19  via the selecting switch  20  are gradually replaced with the moving image signals read out from the memory  8 , and the switched overlapping image is sent out to the recorder  14 . That is, when the moving image signals have been stored in the memory  8  in accordance with an instruction from the write trigger switch  17 , the CPU  7  initiates reading of the moving image signals from the memory  8 , and at the same time sets the coefficient α to be supplied to the first multiplication circuit  6  at “1” and the coefficient (1−α) to be supplied to the second multiplication circuit  9  at “0”. Thereafter, the coefficient α is gradually decreased from “1” to “0” and the coefficient (1−α) is gradually increased from “0” to “1” over the overlapping time T, and thus the overlapping image is sent out to the recorder  14 . 
     Therefore, in a case in which the moving image signals have been stored and held in the memory  8  by actuating the write trigger switch  17 , upon the read trigger switch  18  being depressed when the operating mode is the normal recording mode or the E/E mode, the reading out of the memory  8  is initiated from when the read trigger switch  18  is depressed, and overlapping image signals which overlap the moving image signals input from the external input terminal  19  via the selecting switch  20  are sent out to the recorder  14 . 
     When the memory  8  is in the writing mode, that is, when the contents of the memory  8  are not held by the write trigger switch  17 , the writing in the memory  8  is stopped when the read trigger switch  18  is depressed. The moving image data (compressed data) for the duration from when the read trigger switch  18  was depressed back to the time corresponding to the storage capacity of the memory  8  is stored in the memory  8 . At the same time, the reading of the memory  8  is initiated, and overlapping image signals which overlap the moving image signals which are input from the external input terminal  19  via the selecting switch  20  are sent out to the recorder  14 . 
     The operation of this apparatus when the selecting switch  20  has selected the terminal for inputting signals from the CCD  2  is the same as that of the second embodiment. 
     According to each embodiment of the present invention, as described above, since the moving image data corresponding to at least a part of the overlapping time is always stored in storing means, the time required to direct the camera to a subject after the operating mode shifts from the recording state to the pause state is shortened, and thus ease of operation is improved. 
     It is possible to store and hold arbitrary moving image data at an arbitrary time in accordance with an instruction from the writing instruction means, and it is possible to initiate the reading out of the moving image data from the storing means at an arbitrary time in accordance with an instruction from the reading instruction means and to perform overlapping recording. Thus, it is possible to increase scene change variations in comparison with the conventional example. 
     Many different embodiments of the present invention may be constructed without departing from the spirit and scope of the present invention. It should be understood that the present invention is not limited to the specific embodiments described in this specification. To the contrary, the present invention is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the claims. The following claims are to be accorded the broadest interpretation, so as to encompass all such modifications, equivalent structures and functions.