Abstract:
The present disclosure relates to a telecommunications device. The telecommunications device includes an electrical balance duplexer connected to an output node of a transmission path, an input node of a receive path, an antenna, and a tunable impedance. The electrical balance duplexer is configured to isolate the transmission path from the receive path by tuning the tunable impedance. The telecommunications device also includes a tuning circuit for tuning the tunable impedance. The tuning circuit includes amplitude detectors for measuring voltage amplitudes, phase detectors for measuring voltage phase differences, an impedance sensor for measuring an input impedance of the electrical balance duplexer, and a processing unit operatively connected to the detectors, the impedance sensor, and the tunable impedance. The processing unit is configured to calculate an optimized impedance value. The processing unit is also configured to tune the tunable impedance towards the optimized impedance value.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    The present application is a non-provisional patent application claiming priority to European Patent Application No. EP 15202762.9, filed Dec. 24, 2015, the contents of which are hereby incorporated by reference. 
       FIELD OF THE DISCLOSURE 
       [0002]    The present disclosure relates to a telecommunications device comprising an electrical balance duplexer and a tuning circuit for tuning a tunable impedance of the electrical balance duplexer. The present disclosure also relates to a method for tuning the tunable impedance of the telecommunications device. 
       BACKGROUND 
       [0003]    An electrical balance duplexer (EBD) is a tunable RF frontend concept that addresses some of the key challenges of 4G and 5G mobile systems. The basic principle of the EBD is shown in  FIG. 1 . Duplexer isolation is achieved when the signals in paths  1  and  2  cancel and prevent the signal TX from appearing at the RX port. This cancellation is achieved by balancing the antenna port&#39;s impedance Z ANT  with a tunable on-chip impedance Z BAL , hence the name “electrical balance”. 
         [0004]    Wireless devices now support an increasing number of 4G FDD bands, and a tunable integrated solution like this could potentially replace several fixed-frequency filters and switches. The EBD is also attractive for 5G in-band full-duplex (FD) communication systems. Whereas a filtering-based duplexer cannot isolate the TX and RX ports for the special case where f TX =f RX , the EBD&#39;s signal cancellation approach still works. 
         [0005]    However, the entire EBD concept depends on the capability to tune Z BAL  into balance with Z ANT . This needs to happen not just at a single frequency, but across the entire bandwidth of both the TX and RX channels. Additionally, the impedance characteristic of the antenna will vary significantly over time due to interaction with the user and environment. Therefore, it is necessary to provide the EBD with a system for matching of the tunable impedance Z BAL  to the antenna port&#39;s impedance Z ANT . 
         [0006]    A solution for tuning the tunable impedance is shown in  FIG. 2 . Here, a hybrid transformer of the EBD is represented as a 4-port circuit element. In clockwise order starting from the left side, the ports of the EBD are connected to the antenna, the low-noise amplifier (LNA, not shown) of the RX-chain, Z BAL  and the power amplifier (PA, not shown) of the TX-chain. A tuner is provided on the antenna side for reducing antenna impedance variations present under environmental disturbances near the antenna near-field. With reduced variations, it is more feasible to tune the balance network to track the remaining variation and optimize the balance condition while simultaneously optimizing the PA efficiency. 
         [0007]    Hybrid couplers connected to V X+  and V X− , are subsequently connected to amplitude and phase difference detectors that can measure the waves moving back and forth between the hybrid transformer and the load port (e.g. RX, BAL, PA, and ANT). In this way, it is possible to measure all transfer functions from any port to any other port. Such transfer functions can be captured in so-called S-parameters. The following generic 4-port matrix would define the transfer characteristics according to the waves that such a hybrid coupler-based sensing system can observe: 
         [0000]    
       
         
           
             
               
                 [ 
                 
                   
                     
                       
                         b 
                         1 
                       
                     
                   
                   
                     
                       
                         b 
                         2 
                       
                     
                   
                   
                     
                       
                         b 
                         3 
                       
                     
                   
                   
                     
                       
                         b 
                         4 
                       
                     
                   
                 
                 ] 
               
               = 
               
                 
                   [ 
                   
                     
                       
                         
                           S 
                           11 
                         
                       
                       
                         
                           S 
                           12 
                         
                       
                       
                         
                           S 
                           13 
                         
                       
                       
                         
                           S 
                           14 
                         
                       
                     
                     
                       
                         
                           S 
                           21 
                         
                       
                       
                         
                           S 
                           22 
                         
                       
                       
                         
                           S 
                           23 
                         
                       
                       
                         
                           S 
                           24 
                         
                       
                     
                     
                       
                         
                           S 
                           31 
                         
                       
                       
                         
                           S 
                           23 
                         
                       
                       
                         
                           S 
                           33 
                         
                       
                       
                         
                           S 
                           34 
                         
                       
                     
                     
                       
                         
                           S 
                           41 
                         
                       
                       
                         
                           S 
                           24 
                         
                       
                       
                         
                           S 
                           34 
                         
                       
                       
                         
                           S 
                           44 
                         
                       
                     
                   
                   ] 
                 
                  
                 
                   [ 
                   
                     
                       
                         
                           a 
                           1 
                         
                       
                     
                     
                       
                         
                           a 
                           2 
                         
                       
                     
                     
                       
                         
                           a 
                           3 
                         
                       
                     
                     
                       
                         
                           a 
                           4 
                         
                       
                     
                   
                   ] 
                 
               
             
             , 
           
         
       
     
         [0000]    where a i  and b i . are the waves as defined by S-parameter theory for all ports, and port 1 is the ANT port, port 2 the PA/TX port, port 3 is the Z BAL  port, and port 4 is the LNA/RX port. 
         [0008]    A strategy is to observe all scattering parameters (S-parameters), and calculate from all those parameters the reflection required at the BAL port that will provide electrical balance, from which the BAL impedance needed for electrical balance can also be derived. For any given time instant, under the assumption that the antenna remains constant during a sufficiently long period in time for the algorithm to run, the waves are used to derive S-parameters, giving direct system-state information that can concurrently be used to calculate the optimized Z BAL  that enables signal cancellation of a signal generated in the PA/TX. 
         [0009]    This solution has the disadvantage that it is complex in design, and thus expensive to implement. Furthermore, the couplers have the disadvantage of being large components which are lossy when integrated on typical silicon technologies. This solution also does not allow for real-time balancing of the electrical balance duplexer, as it requires reducing antenna impedance variations before calculation of all the S-parameters requires tuning of both the antenna&#39;s port impedance and the tunable impedance. 
         [0010]    Another solution for balancing an electrical balance duplexer is shown in WO 2013/063506 A2. This solution is also complex in design and requires the tuning of an antenna impedance and a tunable impedance. 
       SUMMARY 
       [0011]    It is an aim of the present disclosure to provide embodiments for impedance balancing in a telecommunications device having an electrical balance duplexer. 
         [0012]    This aim is achieved according to the present disclosure with a telecommunications device showing the technical characteristics of the characterizing part of the first claim. 
         [0013]    Therefore, the present disclosure provides a telecommunications device comprising an electrical balance duplexer and a tuning circuit. The electrical balance duplexer is connected to an output node of a transmission path, to an input node of a receive path, to an antenna and to a tunable impedance. The electrical balance duplexer is configured to isolate the transmission path from the receive path by tuning the tunable impedance. The tuning circuit is provided for tuning the tunable impedance. The tuning circuit comprises amplitude detectors for measuring a voltage amplitude at each of the connections between the electrical balance duplexer on the one hand and the transmission path, the receive path and the tunable impedance on the other hand. The tuning circuit comprises phase detectors for measuring a voltage phase difference between any two of the connections between the electrical balance duplexer on the one hand and the transmission path, the receive path and the tunable impedance on the other hand. Hence, the tuning circuit comprises a phase detector for measuring a voltage phase difference between on the one hand the connection between the electrical balance duplexer and the transmission path and on the other hand the connection between the electrical balance duplexer and the tunable impedance, another phase detector for measuring a voltage phase difference between on the one hand the connection between the electrical balance duplexer and the transmission path and on the other hand the connection between the electrical balance duplexer and the receive path, and yet another measuring a voltage phase difference between on the one hand the connection between the electrical balance duplexer and the receive path and on the other hand the connection between the electrical balance duplexer and the tunable impedance. The tuning circuit comprises an impedance sensor for measuring the input impedance of the electrical balance duplexer at the connection between the electrical balance duplexer and the tunable impedance. The tuning circuit comprises a processing unit operatively connected to the detectors and to the tunable impedance. The processing unit is configured for calculating an optimized impedance value from the voltage amplitudes, the voltage phase differences and the impedance measured by the detectors. The processing unit is configured for tuning the tunable impedance towards the optimized impedance value. 
         [0014]    In an example embodiment, the output of these detectors is sufficient to derive an approximation of the complete system of the electrical balance duplexer, and thus is sufficient to calculate an optimized impedance value for the tunable impedance, or at least a good first estimate for the optimized impedance value. This can allow the design of the tuning circuit to be greatly simplified, which can make the telecommunications device according to the present disclosure less expensive and more energy efficient and as such provide comparatively better RF performance. 
         [0015]    The limited amount of data for the calculation of the optimized impedance value also permits the optimized impedance value of the tunable impedance to be calculated quickly, thereby enabling real-time tuning of the tunable impedance and thus balancing of the electrical balance duplexer. This also permits an inexpensive processing unit to be used for calculating the optimized impedance value, thereby further reducing the costs and energy consumption of the telecommunications device according to the present disclosure. 
         [0016]    It is understood that the amplitude detectors, the phase detectors and the impedance detector may be implemented in different ways. They may for example be implemented as independent sensing circuits or elements which directly provide the amplitude, phase difference and impedance information to the processing unit. They may however, as another example, also be implemented by means of independent voltage detectors at each of the connections between the electrical balance duplexer on the one hand and the transmission path, the receive path and the tunable impedance on the other hand. Then, the processing unit may be provided for calculating the amplitude, phase difference and impedance information from the voltages detected by the voltage detectors. 
         [0017]    In an embodiment of the telecommunications device according to the present disclosure the processing unit is configured for calculating the optimized impedance value from at least four scattering parameters between any two of the transmission path, the receive path and the tunable impedance. In some embodiments, the processing unit is configured for calculating the optimized impedance value from four scattering parameters, between any two of the transmission path, the receive path and the tunable impedance. The scattering parameters are calculated from the voltage amplitudes, the voltage phase differences and the impedance measured by the detectors. 
         [0018]    In an example embodiment, a limited or reduced set of scattering parameters (S-parameters) can serve as an approximation of the complete S-parameter system of equations and thus be sufficient to calculate an optimized impedance value for the tunable impedance, or at least a good first estimate for the optimized impedance value. Furthermore, in some embodiments, this limited set of S-parameters may be approximated using amplitude and phase information from the detectors of the tuning circuit according to the present disclosure. This can allow the design of the tuning circuit to be greatly simplified, which can make the telecommunications device according to the present disclosure less expensive and more energy efficient and as such provide comparatively better RF performance. 
         [0019]    Reducing the number of scattering parameters that are used for calculating an optimized impedance value increases the speed with which the optimized impedance value can be calculated, and thus improves upon the ability of the communications device to perform real-time tuning of the tunable impedance and thus balancing of the electrical balance duplexer. 
         [0020]    In an embodiment of the telecommunications device according to the present disclosure the processing unit is configured for iteratively calculating the optimized impedance value and tuning the tunable impedance towards the optimized impedance value. 
         [0021]    In an example embodiment, any difference between the first calculation of the optimized impedance value and a true optimized impedance value, caused by any approximations made in the equations for calculating the optimized impedance value, may be reduced quickly by iteratively repeating the tuning of the tunable impedance based on the amplitude and phase data obtained by the same detectors. In this way, the use of additional components for further improving the tuning of the tunable impedance to the optimized impedance value, can be avoided. 
         [0022]    Because of the simplification in the calculation of the optimized impedance value, these iterative calculations are performed quickly, such that the further tuning of the tunable impedance and thereby balancing of the electrical balance duplexer may still be performed in real-time. 
         [0023]    In some embodiments, the tuning of the tunable impedance is repeated until the scattering parameter from the transmission path to the receive path, which is an indicator for isolation of the transmission path from the receive path and may be calculated from the amplitude and phase data from the amplitude and phase detectors at the transmission path and the receive path, is below a predetermined threshold value. 
         [0024]    In an embodiment of the telecommunications device according to the present disclosure, at least one of the detectors is implemented by means of a root mean square (rms) voltage detector. 
         [0025]    Implementing the detectors of the telecommunications device according to an embodiment of the present disclosure by means of rms voltage detectors, instead of more bulky and/or lossy components, can permit a further simplifying of the design of the communications device. 
         [0026]    In an embodiment of the telecommunications device according to the present disclosure, the impedance detector is implemented by means of the amplitude detector at the connection between the electrical balance duplexer and the tunable impedance, for example in combination with voltage phase detecting means for detecting the voltage phase at the connection, a power source for providing a reference current, and optionally additional phase detecting means for detecting the phase of the reference current. 
         [0027]    In an example embodiment, the impedance detector of the tuning circuit may be implemented by means of a power source providing a reference current and the amplitude detector at the connection between the electrical balance duplexer and the tunable impedance in combination with phase detecting means for detecting the voltage phase at the connection, and optionally also phase detecting means for detecting a phase of the reference current. If the tunable impedance is then temporarily disconnected, then the input impedance of the electrical balance duplexer at the connection between the electrical balance duplexer and the tunable impedance is easily calculated from the reference current and the measured amplitude and phase data. The use of the same detector can allow further simplifying the design of the circuit. 
         [0028]    The present disclosure further provides a method for tuning a tunable impedance of a telecommunications device comprising an electrical balance duplexer. The electrical balance duplexer of the telecommunications device is connected to an output node of a transmission path, to an input node of a receive path, to an antenna and to the tunable impedance. The electrical balance duplexer is configured to isolate the transmission path from the receive path by tuning the tunable impedance. The method comprises the step of measuring a voltage amplitude at each of the connections between the electrical balance duplexer on the one hand and the transmission path, the receive path and the tunable impedance on the other hand. The method comprises the step of measuring a voltage phase difference between any two of the connections between the electrical balance duplexer on the one hand and the transmission path, the receive path and the tunable impedance on the other hand. The method comprises the step of measuring an input impedance of the electrical balance duplexer at the connection between the electrical balance duplexer and the tunable impedance. The method comprises the step of calculating an optimized impedance value from the measured voltage amplitudes, voltage phase differences and impedance. The method comprises the step of tuning the tunable impedance towards the optimized impedance value. 
         [0029]    For the discussion of the method according to the present disclosure there is referred to the discussion of the telecommunications device according to the present disclosure. 
         [0030]    In an embodiment of the method according to the present disclosure the optimized impedance value is calculated from at least four scattering parameters between any two of the transmission path, the receive path and the tunable impedance. The scattering parameters are calculated from the measured voltage amplitudes, voltage phase differences and impedance. 
         [0031]    In an embodiment of the method according to the present disclosure the steps of the method are iteratively repeated until a scattering parameter from the transmission path to the receive path is below a predetermined threshold value. 
         [0032]    The scattering parameter is calculated from the measured voltage amplitudes at the connection between the electrical duplexer on the one hand and the transmission path and the receive path on the other hand, and from the measured voltage phase difference between the connections between the electrical duplexer on the one hand and the transmission path and the receive path on the other hand. 
         [0033]    In an embodiment of the method according to the present disclosure the method is provided for tuning the tunable impedance of the telecommunications device according to an embodiment of the present disclosure. 
     
    
     
       BRIEF DESCRIPTION OF THE FIGURES 
         [0034]    The disclosure will be further elucidated by means of the following description and the appended figures. 
           [0035]      FIG. 1  shows an electrical balance duplexer. 
           [0036]      FIG. 2  shows a prior art tuning circuit for tuning the tunable impedance of an electrical balance duplexer of the state of the art. 
           [0037]      FIG. 3  shows an electrical balance duplexer assumed as a 3-port network. 
           [0038]      FIG. 4  shows a schematic representation of the electronics communication device, according to example embodiments. 
           [0039]      FIG. 5  shows a schematic representation of the tuning circuit of the electronic communication device, according to example embodiments. 
           [0040]      FIG. 6  shows an impedance detector of the electronics communication device, according to example embodiments. 
           [0041]      FIG. 7  shows an example implementation of an amplitude detector of the electronics communication device, according to example embodiments. 
           [0042]      FIG. 8  shows an example implementation of a phase detector of the electronics communication device, according to example embodiments. 
       
    
    
     DETAILED DESCRIPTION 
       [0043]    The present disclosure will be described with respect to particular embodiments and with reference to certain drawings but the disclosure is not limited thereto but only by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not necessarily correspond to actual reductions to practice of the disclosure. 
         [0044]    Furthermore, the terms first, second, third and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a sequential or chronological order. The terms are interchangeable under appropriate circumstances and the embodiments of the disclosure can operate in other sequences than described or illustrated herein. 
         [0045]    Moreover, the terms top, bottom, over, under and the like in the description and the claims are used for descriptive purposes and not necessarily for describing relative positions. The terms so used are interchangeable under appropriate circumstances and the embodiments of the disclosure described herein can operate in other orientations than described or illustrated herein. 
         [0046]    The term “comprising”, used in the claims, should not be interpreted as being restricted to the means listed thereafter; it does not exclude other elements or steps. It should be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, or groups thereof. Thus, the scope of the expression “a device comprising means A and B” should not be limited to devices consisting only of components A and B. It means that with respect to the present disclosure, the only relevant components of the device are A and B. 
         [0047]      FIG. 3  shows the electrical balance duplexer  1  when assuming that it is a 3-port network with the antenna  4  included in the S-parameter representation of the electrical balance duplexer  1 . The reason for the inclusion of the antenna  4  is that we assume the antenna  4  to be an unknown impedance that also varies over time. In that case, the S-parameters describing all the transfer paths throughout the 3-port network are given as: 
         [0000]    
       
         
           
             
               
                 [ 
                 
                   
                     
                       
                         b 
                         1 
                       
                     
                   
                   
                     
                       
                         b 
                         2 
                       
                     
                   
                   
                     
                       
                         b 
                         3 
                       
                     
                   
                 
                 ] 
               
               = 
               
                 
                   [ 
                   
                     
                       
                         
                           S 
                           11 
                         
                       
                       
                         
                           S 
                           12 
                         
                       
                       
                         
                           S 
                           13 
                         
                       
                     
                     
                       
                         
                           S 
                           21 
                         
                       
                       
                         
                           S 
                           22 
                         
                       
                       
                         
                           S 
                           23 
                         
                       
                     
                     
                       
                         
                           S 
                           31 
                         
                       
                       
                         
                           S 
                           32 
                         
                       
                       
                         
                           S 
                           33 
                         
                       
                     
                   
                   ] 
                 
                  
                 
                   [ 
                   
                     
                       
                         
                           a 
                           1 
                         
                       
                     
                     
                       
                         
                           a 
                           2 
                         
                       
                     
                     
                       
                         
                           a 
                           3 
                         
                       
                     
                   
                   ] 
                 
               
             
             , 
           
         
       
     
         [0000]    where the first port (PA/TX port) is the connection to the transmission path  2 , the second port is the connection to the tunable impedance  5  (balance network Z bal ), and the third port (LNA/RX port) is the connection to the receive path  3 . 
         [0048]    The disclosure provides a tuning circuit  6  with a sensing method that derives the equations in order to calculate Z bal  in real-time and provide automated tuning, using minimal hardware, for any antenna condition. 
         [0049]    As also already mentioned, considering the problem in a 3-port fashion helps to simplify the problem, and allows the use of less hardware.  FIG. 4  shows the same 3-port network with a tuning circuit  6 , of which more detail is shown in  FIG. 5 , connected to the three ports (in a schematic sense), and provides a closed-loop that tunes Z bal  to achieve isolation. The embodiment assumes a test signal is available from the transmitter TX, and that an optimized Z bal  exists for any signal frequency at which the transmitter TX is active. 
         [0050]    In the case where all 9 S-parameters (the full matrix) would be known, it would be possible to calculate the associated Z bal  for achieving isolation in the duplexer  1  in a single step. However, we solve the problem of finding Z bal  in an iterative manner, with practically implementable (cheap, low-power, low-area, etc.) sensors on as little nodes as possible. 
         [0051]    In particular, the algorithm uses the sensed information using detectors or sensors  7 ,  8 ,  9  at just the TX, RX and BAL ports, thus respectively the connections between the electrical balance duplexer  1  on the one hand and the transmission path  2 , the receive path  3  and the tunable impedance  5  on the other hand, to solve the following equations derived from the S-parameter matrix to arrive at Z bal , using only S 13 , S 12 , S 23  and S 22  (4 out of 9 parameters): 
         [0000]    
       
         
           
             
               
                 S 
                 13 
               
               + 
               
                 
                   
                     Γ 
                     2 
                   
                    
                   
                     S 
                     12 
                   
                    
                   
                     S 
                     23 
                   
                 
                 
                   1 
                   + 
                   
                     
                       S 
                       22 
                     
                      
                     
                       Γ 
                       2 
                     
                   
                 
               
             
             = 
             
               
                 0 
                 ⇒ 
                 
                   Γ 
                   2 
                 
               
               = 
               
                 
                   
                     
                       - 
                       
                         S 
                         13 
                       
                     
                     
                       
                         
                           S 
                           12 
                         
                          
                         
                           S 
                           23 
                         
                       
                       + 
                       
                         
                           S 
                           13 
                         
                          
                         
                           S 
                           22 
                         
                       
                     
                   
                   ⇒ 
                   
                     Γ 
                     2 
                   
                 
                 = 
                 
                   
                     
                       
                         
                           Z 
                           bal 
                         
                         - 
                         
                           Z 
                           0 
                         
                       
                       
                         
                           Z 
                           bal 
                         
                         + 
                         
                           Z 
                           0 
                         
                       
                     
                     ⇔ 
                     
                       Z 
                       bal 
                     
                   
                   = 
                   
                     
                       Z 
                       0 
                     
                      
                     
                       
                         1 
                         + 
                         
                           Γ 
                           2 
                         
                       
                       
                         1 
                         - 
                         
                           Γ 
                           2 
                         
                       
                     
                   
                 
               
             
           
         
       
     
         [0000]    where S ij  is the S-parameter that describes the transfer from port i to j, and Γ i  describes the so-called reflection coefficient, which is calculated from a limited amount of S-parameters (not all 9 are used). This directly limits the associated hardware to solve the equation. 
         [0052]    Note that, although a first approximation of Z bal  may already be calculated from the 4 S-parameters in a first calculation based on a single measurement from the detectors  7 ,  8 ,  9 , the calculated Z bal  may still not be optimized due to a number of assumptions on, for example, what the input and load impedances are on all ports. The provided equations are thus not always able to give a fully accurate answer for Z bal  in a single calculation based on the detected information. Therefore, the algorithm is further optimized by iterating a number of times to improve upon possible differences or deviations caused by the assumptions in the equations. 
         [0053]    In an example practical embodiment, amplitude sensors  7  can be used to observe amplitude or magnitude information at all nodes, and phase detectors  8  could be used to observe the phase information. Then, from that information, the set of 4 S-parameters can be derived, with simpler hardware. 
         [0054]    In that case, the following equations may be solved first, before finally solving the equation for Z bal  (as shown above). 
         [0000]    
       
         
           
             
               S 
               12 
             
             = 
             
               
                 
                   
                      
                     
                       ( 
                       
                         Z 
                         1 
                       
                       ) 
                     
                   
                 
                 
                   
                      
                     
                       ( 
                       
                         Z 
                         2 
                       
                       ) 
                     
                   
                 
               
                
               
                 1 
                 2 
               
                
               
                 ( 
                 
                   1 
                   + 
                   
                     
                       Z 
                       2 
                       * 
                     
                     
                       Z 
                       bal 
                     
                   
                 
                 ) 
               
                
               
                 
                    
                   
                     V 
                     2 
                   
                    
                 
                 
                    
                   
                     V 
                     1 
                   
                    
                 
               
                
               
                 e 
                 
                   
                     ( 
                     
                       
                         ϕ 
                         2 
                       
                       - 
                       
                         ϕ 
                         1 
                       
                     
                     ) 
                   
                    
                   j 
                 
               
             
           
         
       
       
         
           
             
               S 
               13 
             
             = 
             
               
                 
                   
                      
                     
                       ( 
                       
                         Z 
                         1 
                       
                       ) 
                     
                   
                 
                 
                   
                      
                     
                       ( 
                       
                         Z 
                         3 
                       
                       ) 
                     
                   
                 
               
                
               
                 
                    
                   
                     V 
                     3 
                   
                    
                 
                 
                    
                   
                     V 
                     1 
                   
                    
                 
               
                
               
                 e 
                 
                   
                     ( 
                     
                       
                         ϕ 
                         3 
                       
                       - 
                       
                         ϕ 
                         1 
                       
                     
                     ) 
                   
                    
                   j 
                 
               
             
           
         
       
       
         
           
             
               S 
               32 
             
             = 
             
               
                 
                   
                      
                     
                       ( 
                       
                         Z 
                         3 
                       
                       ) 
                     
                   
                 
                 
                   
                      
                     
                       ( 
                       
                         Z 
                         2 
                       
                       ) 
                     
                   
                 
               
                
               
                 1 
                 2 
               
                
               
                 ( 
                 
                   1 
                   - 
                   
                     
                       Z 
                       2 
                     
                     
                       Z 
                       bal 
                     
                   
                 
                 ) 
               
                
               
                 
                    
                   
                     V 
                     2 
                   
                    
                 
                 
                    
                   
                     V 
                     3 
                   
                    
                 
               
                
               
                 e 
                 
                   
                     ( 
                     
                       
                         ϕ 
                         2 
                       
                       - 
                       
                         ϕ 
                         3 
                       
                     
                     ) 
                   
                    
                   j 
                 
               
             
           
         
       
       
         
           
             
               S 
               22 
             
             = 
             
               
                 
                   Z 
                   2 
                 
                 - 
                 
                   Z 
                   bal 
                   * 
                 
               
               
                 
                   Z 
                   2 
                 
                 + 
                 
                   Z 
                   bal 
                 
               
             
           
         
       
     
         [0055]    Where j is the imaginary number operator, Z i  is the impedance looking into the electrical balance duplexer, in this case a hybrid transformer, at port i, |V i | is the voltage amplitude detected at port i,          (Z i ) is the real part of impedance Z i  and φ i  is the phase of the voltage at port i. Note that S 22  relates to Z 2  and Z 2 *, which is the input impedance of the electrical balance duplexer  1  at the connection between the electrical balance duplexer  1  and the tunable impedance  5 , and thus the impedance seen when looking into the hybrid transformer  5  from the balance network port. 
         [0056]    To arrive at these equations, it is assumed that the antenna impedance negligibly influences Z 2 . It is also assumed that the tunable impedance Z bal  is known or can be measured. It is also assumed that the impedance of the transmission path  2  is matched to the impedance of the electrical balance duplexer  1  at the connection between both, and that the impedance of the receive path  3  is matched to the impedance of the electrical balance duplexer  1  at the connection between both. Thus, the PA and LNA are matched to their respective ports. For example, if PA output impedance=25Ω, then Z 1 =25Ω. And if LNA input impedance=100Ω, then Z 3 =100Ω. It is also assumed that the network is reciprocal network. i.e. S ij =S ji . It is also assumed that the S-parameters between ports (e.g. S ij  between port i and j) are simplified to be the transfer function of the output over the input signal. For example, S 31 =b 3 /a 1 . 
         [0057]    From these equations, it becomes clear that a necessary condition is that the impedance Z 2  should be known. With Z 2  being the input impedance looking into the electrical balance duplexer  1  at the BAL-port interface, i.e. the connection between the electrical balance duplexer  1  and the tunable impedance  5 . 
         [0058]      FIG. 5  shows block level diagram of a tuning circuit of an electronic communication device according to an embodiment of the present disclosure. In this embodiment, analog voltages and phases at the ports of the EBD are measured by means of amplitude detectors  7 , phase detectors  8  and an impedance detector  9  partially implemented by means of an amplitude detector  9  as shown in  FIG. 6 . The measured data is digitized by means of analog-to-digital converters ADC, and forwarded to the processing unit  10  where it is used for tuning the tunable impedance  5  according to an embodiment of the method of the present disclosure. 
         [0059]      FIG. 6  shows an example impedance detector or sensor  9  that could be used to sense both Z 2  as well as provide a calibration engine for Z bal  (a-priori to live operation), using a three-way switch and two voltage sensors (connected to terminals V 2  and V 2 ′). V ref  is an RF voltage that could be derived from the transmitter, and operation for this test could be performed at low-power, i.e. tapped from prior to the PA. 
         [0060]    For each port, an amplitude (RMS) detector  7  (magnitude sensor) would be required. An implementation of one such magnitude sensor which could be used in the example diode-connected FET device shown in  FIG. 7 . Between two ports, a phase detector  8 , such as for example shown in  FIG. 8 , could be used to measure the voltage phase difference φ i −φ j . It should however be clear that shown amplitude detectors  7  and phase detectors  8  are only example implementations, and different types of suitable detectors may be used. 
         [0061]    Various mathematical assumptions and simplifications can be applied for the implementation of an algorithm that can arrive at a value for Z bal  for any antenna impedance Z ant  within 1.5:1 VSWR even when the detectors/sensors  7 ,  8 ,  9  exhibit up to 20% voltage error, 10 degrees phase error, and 20% error in Z 2 . This is true even for a hybrid transformer  1  that is not symmetric, i.e. Z BAL ≠Z ANT . For example, typical hybrid transformer implementations use skewing to favor TX over RX loss, and have capacitive coupling which means that single-ended EBDs ( FIG. 1 ) can have asymmetric values (by nature). 
         [0062]    The algorithm, in pseudocode, operates as follows: 
         [0000]                                                                          1:   put Z bal (0) = 50 Ω       2:   evaluate Γ 2 (0)               3:             evaluate                     Z   c          (   0   )         =       Z   0            1   -       Γ   2          (   0   )           1   -       Γ   2          (   0   )                                 4:   put Z bal (1) = Z c (0)       5:   i = 1            6:   while S 13  &lt; Threshold do               Ex.: Threshold = −50 dB            7:    evaluate Γ 2 (i)       8:    evaluate Z c (i)       9:    Corr = 50 Ω − Z c (i)            10:    put Z bal (i + 1) = Z bal (i) − K * Corr               K = attenuation factor       11:   i++                    
In optimization, Z 0 , the Threshold factor and attenuation factor K are found such that the algorithm finds Z bal  in as low as possible iterations.
 
         [0063]    The method according to a further embodiment of the present disclosure thus comprises the steps of: setting the tunable impedance  5  to a predetermined initial value, e.g. 50Ω, calculating a reflection coefficient Γ 2  at the side of the electrical balance duplexer  1  connected to the tunable impedance  5  from values measured by the detectors  7 ,  8 ,  9  of the tuning circuit  6 , calculating a first estimate of the optimized impedance value from the predetermined initial value of the tunable impedance  5  and the calculated reflection coefficient Γ 2 , and setting the tunable impedance  5  to the first estimate of the optimized impedance value. 
         [0064]    In some embodiments, the method further comprises the steps of: recalculating the reflection coefficient Γ 2 , calculating an intermediate value of the optimized impedance value from the previous estimate of the optimized impedance value and the recalculated reflection coefficient Γ 2 , calculating a correction term Corr by subtracting the calculated intermediate value from the predetermined initial value, calculating a further estimate of the optimized impedance value by subtracting the correction term Corr from the predetermined initial value, optionally after multiplying the correction term with an attenuation factor K, and setting the tunable impedance to the further estimate of the optimized impedance value. In some embodiments, these steps are iteratively repeated until the value of the scattering parameter S 13  from transmission path  2  to the receive path  3 , which scattering parameter S 13  is calculated from measurements of the detectors  7 ,  8 ,  9  at the connections between the electrical balance duplexer  1  on the one hand and the transmission path  2  and the receive path  3  on the other hand, is smaller than a predetermined threshold value, below which threshold value the transmission path  2  is substantially isolated from the receive path  3 .