Abstract:
The present invention constitutes a differential amplifier system (50) including a main differential amplifier (60) and a compensating differential amplifier (90) which are coupled together in a complementary manner to provide a composite output signal. 
     The amplifiers are of similar construction but have different circuit component values. Each of the amplifiers is of the differential type and includes emitter-coupled transistors (62) and (64) or (92) and (94), a feedback resistor (66) or (96) connected between the emitter leads (78) and (80) or (108) and (110) of these transistors and a pair of constant-current sources (68) and (70) or (98) and (100) separately connected to different ones of the emitter leads of the transistors. The circuit values of the constant-current sources and feedback resistors in the two amplifiers are different and are adjusted to allow the output of the compensating amplifier to cancel primary nonlinearities in the output of the main amplifier. The gain of the overall amplifier system is thereby maintained more nearly constant over a greater signal range and the composite output of the system is more linear over a wider range of input signals.

Description:
TECHNICAL FIELD 
     The present invention relates to differential amplifiers and, more particularly, to differential amplifiers having emitter feedback resistors and including circuit components for compensating for non-linearities in the gain functions of the amplifiers. 
     BACKGROUND OF THE INVENTION 
     Differential amplifiers are commonly employed as key components in many integrated circuits. However, the usefulness of differential amplifiers in many instrumentation type applications is often limited by non-linearities in their gain characteristics. These non-linearities also limit the dynamic range of input signal voltage magnitudes over which the amplifiers can be employed. 
     The linear dynamic range of a differential amplifier can be extended through the use of &#34;emitter-degeneration&#34; as shown in FIG. 1. In accordance with this approach, the amplifier is provided with a pair of constant-current sources separately connected to the emitters of the transistors of the amplifier and further an &#34;emitter feedback&#34; resistor is connected between the emitters of these transistors. This type of circuitry reduces non-linearities in the gain of a differential amplifier but only to a limited extent. 
     To more fully resolve the problem and linearize the gain of a differential amplifier, circuit designers sometimes employ the &#34;cascomp&#34; circuit shown in FIG. 2. The voltage between the emitters of the cascode transistors Q 3  and Q 4  is nominally equal to the net base-to-emitter voltages of the primary differential transistors Q 1  and Q 2 , which voltages vary non-linearly with the output signal and thereby cause the overall non-linearity of the amplifier. A compensating amplifier A cmp  produces an amplified non-linear signal which is added to the output of the differential amplifier. The gain of the amplifier A cmp  is adjusted so that its output should cancel the non-linear components of the output of the differential amplifier. Unfortunately, the cascomp circuit is effective only at relatively low frequencies well below the bandwidths of most differential amplifiers because among other things, the accuracy of the base-to-emitter voltage analog (i.e., the base-to-emitter voltages of Q 3  and Q 4 ) by which the actual nonlinearity is sensed decreases with increasing frequency. 
     It is, therefore, an object of the present invention to provide a differential amplifier having gain characteristics of improved linearity over a wider frequency range. 
     It is another object of the present invention to provide a differential emitter feedback amplifier system which allows accurate compensation for non-linearities in the gain of a differential amplifier. 
     It is a further object of the present invention to provide a differential amplifier system whose components can be readily implemented as integrated circuits. 
     SUMMARY OF THE INVENTION 
     The present invention constitutes a differential amplifier system including a main amplifier and a compensating amplifier which are coupled together in a complementary manner to provide a composite output signal. The amplifiers are of similar construction but have different circuit component values. Each of the amplifiers is of the differential type and includes two emitter-coupled transistors, a feedback resistor connected between the emitter leads to these transistors, and a pair of constant-current sources separately connected to different ones of the emitter leads to the transistors. However, the constant-current sources of the main amplifier provide substantially more current than that of the constant-current sources of the compensating amplifier, and the feedback resistor of the compensating amplifier is of substantially greater value than that of the feedback resistor of the main amplifier. 
     The amplifiers are constructed and arranged so that first and second input signals which define a differential input voltage are separately applied to the base leads of respective first and second transistors in each amplifier. The amplifiers are coupled together so that the collector lead of the first transistor in the main amplifier is connected to the collector lead of the second transistor in the compensating amplifier and collector lead of the second transistor in the main amplifier is connected to the collector lead of the first transistor in the compensating amplifier. 
     The main and compensating amplifiers when coupled together as described form an amplifier system which provides a composite output signal reflecting the gain characteristics of both amplifiers. The compensating amplifier effectively cancels many of the non-linearities in the gain provided by the main amplifier. Therefore, the overall gain of the amplifier system exhibits increased linearity and less distortion over a wider range of input signal voltages. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram of a basic prior art emitter feedback differential amplifier of the type used in the present invention. 
     FIG. 2 is a circuit diagram of a prior art cascomp emitter feedback differential amplifier which employs certain circuitry adapted for compensating for gain non-linearities. 
     FIG. 3 is a circuit diagram of a wideband linearized emitter feedback differential amplifier system of the present invention. 
     FIG. 4 is a graph providing an illustration of the performance of the amplifier system of the present invention in comparison with an uncompensated amplifier. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring now to FIG. 1, a conventional balanced differential amplifier 10 with emitter feedback provided through resistor 16 is shown. The amplifier 10 includes two emitter-coupled bipolar transistors 12 and 14 of the NPN type which are as identical as possible in construction, an emitter feedback resistor 16 connected between the emitter leads 18 and 20 of the respective transistors 12 and 14, and two constant-current sources 22 and 24 which are of equal current value and are separately connected to the respective emitters 18 and 20. A differential input voltage is provided by an input signal source 26 which separately supplies two input voltage signals V b1  and V b2  which define a differential input voltage to the respective base leads 28 and 30 of the transistors 12 and 14. The amplifier 10 generates two output current signals i c1  and i c2  on the respective collector leads 32 and 34 of the transistors 12 and 14. The output signals i c1  and i c2  from the respective transistors 12 and 14 define a differential output signal which may be considered to represent a difference between either the currents i c1  and i c2  or voltages V c1  and V c2  as provided by the action of load resistors of equal value, such as the resistors 36 and 38 connected to the respective collector leads 32 and 34. 
     The operation of the amplifier 10 may be described in accordance with the mathematical expression as developed below: ##EQU1## 
     Unfortunately, no simple expression can be derived from this equation for the output X in terms of the input W. However, coefficients having closed form algebraic expressions can be derived for the differentials of equation 6. The expressions for the first three derivatives of X with respect to W can be calculated to be: ##EQU2## It should be noted that due to the symmetry of the amplifier circuits involved all the even order differentials are equal to zero. In view of the above, it is possible to obtain approximate design equations for the circuit by expressing the gain of the amplifier (dx/dw) as a Maclaurin series about zero. 
     
         A=A.sub.0 +A.sub.2 W.sup.2 /2!+A.sub.4 W.sup.4 /4!+. . .   (10). 
    
     Equation 10 provides a useful expression for the gain of an amplifier such as the amplifier 10. It should be noted that due to the symmetry of the amplifier circuit all of the odd order terms are zero. The coefficients A 0 , A 2 , A 4 , etc. correspond to the coefficients of the next higher order differentials dx/dw, d 3  x/dw 3 , d 5  x/dw 5 , etc. as derived from equation 8. 
     Referring now to FIG. 3, the amplifier system 50 of the present invention is shown. The system 50 includes a main amplifier 60 and a compensating amplifier 90. 
     The main amplifier 60 is of similar construction to that of the amplifier 10. The main amplifier 60 includes two emitter-coupled bipolar transistors 62 and 64 of the NPN type which are as identical as possible in construction, am emitter feedback resistor 66, and two constant-current sources 68 and 70 of equal supply value. An input signal source 72 provides to the amplifier 60 a differential input voltage V in  defined by two input voltage signals V i1  and V i2 . The signals V i1  and V i2  are applied to the respective base leads 74 and 76 of the transistors 62 and 64. The resistor 66 has a resistance value of 220 ohms. The constant-current sources 68 and 70 are separately connected to the respective emitter leads 78 and 80 of the transistors 62 and 64. The constant-current sources 68 and 70 each provide a 1.0 mA current I em . A differential output signal is defined by two output current signals i m1  and i m2 , which are provided on the collector leads 82 and 84 of the respective transistors 62 and 64. 
     The compensating amplifier 90 is also of similar construction to that of the amplifier 10. The compensating amplifier 90 includes two emitter-coupled bipolar transistors 92 and 94 of the NPN type which are as identical as possible in construction, an emitter feedback resistor 96, and two constant-current sources 98 and 100 of equal current supply value. The input signals V i1  and V i2  from the input source 72 are applied to the respective base leads 104 and 106 of the transistors 92 and 94. The resistors 96 is connected between the emitter leads 108 and 110 of the respective transistors 92 and 94. The resistor 96 has a resistance value of 1050 ohms. The constant-current sources 98 and 100 are separately connected to the respective emitter leads 108 and 110 of the transistors 92 and 94. The constant-current sources 98 and 100 each provide a 0.1 mA current I ec . A differential output signal is defined by two output current signals i c1  and i c2 , which are provided on the respective collector leads 112 and 114 of the transistors 92 and 94. 
     The compensating amplifier 90 also includes two input resistors 116 and 118. The resistor 116 is connected between the signal source 72 and the base leads 104 of the transistor 92. The resistor 118 is connected between the signal source 72 and the base lead 106 of the transistor 94. The resistors 116 and 118 both have resistance values of 500 ohms and are furnished to increase the base resistance values of the transistors 92 and 94. The resistors 116 and 118 help correct for differences in the products of the base resistances and emitter-to-emitter capacitances of the two amplifiers 60 and 90, which differences can adversely affect the linearity of the system 50 at higher frequencies. 
     The collector lead 82 of the first transistor of the main amplifier 60 and the collector lead 114 of the second transistor 94 of the compensating amplifier 90 are both connected to the output conductor 120. The collector lead 84 from the second transistor 64 of the main amplifier and the collector lead 112 from the first transistor 92 of the compensating amplifier 90 are both connected to the output conductor 122. The output current signals i m1  and i c2  are combined at the conductor 120. The output current signals i m2  and i c1  are combined at the conductor 122. The final composite differential output signals i 01  and i 02  on conductors 120 and 122 equal i m1  +i c2  and i m2  +i c1 , respectively. 
     Since the value of the gain setting resistor R em  is substantially less than the value of the resistor R ec , the gain (or transconductance) of the main amplifier 60 is much greater than the gain (or transconductance) of the compensating amplifier 90, and the signals i m1  and i m2  strongly predominate in the final composite output from the system 50. However, since the value of the compensating feedback factor F c  is suitably less than the main feedback factor F m , the gain of the compensating amplifier 90 therefore decreases from its zero signal value much more rapidly than does the gain of the main amplifier 60. The values of the feedback resistors and current sources are selected so that the gains (or transconductances) of the main amplifier 60 and compensating amplifier 90 decrease approximately equal for the same input signal changes. 
     However, the final output signals i 01  and i 02  are combinations of signals from different transistors (transistors 62 and 94 and transistors 64 and 92) in different amplifiers (60 and 90) which receive different input signals (V i1  or V i2 ) of opposite polarity. The zero signal gain of the composite system 50 is less than the gain of the main amplifier 60 due to subtraction of the gain of the compensating amplifier. However, more importantly, the changes in gain (or transconductance) contributed by the two amplifiers approximately cancel, thereby resulting in greatly improved linearity over a wider dynamic input signal range. 
     The performance of the composite system 50 can be analyzed through the use of Maclaurin series for the gains of the main amplifier 60 and compensating amplifier 90. In accordance with equations 11 and 12 below, the gains of the main amplifier 60 and compensating amplifier 90, respectively, may be represented in the form of Maclaurin series: 
     Main Amplifier 60 
     
         A.sub.m =A.sub.m0 +A.sub.m2 W.sup.2 /2!+A.sub.m4 W.sup.4 /4!+. . . (11) 
    
     Compensating Amplifier 90 
     
         A.sub.c =A.sub.c0 +A.sub.c2 W.sup.2 /2!+A.sub.c4 W.sup.4 /4!+. . . (12) 
    
     The gain of the composite amplifier system 50 may, therefore, be represented by the Taylor series: 
     
         A.sub.m -A.sub.c =(A.sub.m0 -A.sub.c0)+(A.sub.m2 -A.sub.c2)W.sup.2 /2!+(A.sub.m4 -A.sub.c4)W/4!+. . .                        (13). 
    
     The zero signal gain equals A m0  -A c0 , with all other terms disappearing as W=0. 
     The fourth and higher order terms in equation 13 are much smaller than the second order terms. Therefore, maximum linearity with respect to gain may be approached when the coefficient of the second order term is set equal to zero and A m2  equals A c2 . The coefficients A m2  and A c2  correspond to the coefficient of the third order differential given by equation 9. After considerable algebraic manipulation it can be shown that A m2  will equal A c2  when: 
     
         I.sub.ec /I.sub.em =[(F.sub.c +2)/(F.sub.m +2)]            (14). 
    
     where: 
     F c  =R c  I ec  /V q  (Compensating feedback factor) 
     F m  =R m  I em  /V q  (Main feedback factor). 
     The second order terms from the equations 13 and 14 cancel and the rate of change in the gain or transconductance of the systems 50 with changes in input voltage from zero is thereby minimized. However, the higher order terms only partly cancel so that the gain increases from its zero signal value predominately as the fourth power of the differential input voltage. The fourth power of the input voltage initially increases much more slowly than does the second power, and the remaining non-linearities are consequently less than the non-linearities characteristic of an uncompensated amplifier and remain reduced over a much larger portion of the total signal range. 
     Nevertheless, non-linearities attributable to the fourther order term in equation (13) become significant toward the limits of the linear input signal range and toward these points the compensating amplifier 90 overcompensates for changes in the gain of the main amplifier 60. Therefore, the performance of the composite system 50 may be yet further improved by marginally increasing the feedback factor F c  of the compensating amplifier by slightly increasing the currents of the constant-current sources 98 and 100 or the value of the resistor 96 from the respective currents or values computed in accordance with equation 14. A more linear overall response with less distortion may thereby be provided over the entire signal range. 
     Referring now to FIG. 4, illustrative performance results are graphically shown for an amplifier system in accordance with the present invention with the component values of the system 50 of FIG. 3. The results shown in FIG. 4 were obtained by means of SPICE computer program simulations. The curve 1 corresponds to a transfer curve for the amplifier system 50 with the output current plotted versus differential input voltage. For the curve 1 each vertical division on the graph represents a 0.25 mA change in collector current. The curve 2 corresponds to the transconductance or gain of the amplifier system 50 with the transconductance plotted versus differential input voltage. With respect to curve 2 each vertical division on the graph represents a 0.1 mS change in the transconductance. For the amplifier system 50 the magnitude of the zero input signal value transconductance was 2.70 mS as represented on the graph in this case by the level of line A. The curve 3 is presented for purposes of comparison and corresponds to the transconductance or gain of an uncompensated amplifier such as the amplifier 60 with a feedback factor of 10. With respect to curve 3 each vertical division on the graph represents a 0.1 mS change in transconductance. For the uncompensated amplifier the magnitude of the zero input signal value transconductance was 3.16 mS as also represented on the graph in this case by the level of line A. As FIG. 4 demonstrates, the transconductance or gain of the amplifier system 50 remains more uniformly constant over a wider input signal range. 
     Table I below shows the effect of frequency on the harmonic distortion of the amplifier system 50 in comparison with an uncompensated amplifier such as amplifier 60 having the same gain and power consumption. The data was obtained by means of computer simulations. 
     
                       TABLE I______________________________________   Total Harmonic Distortion (%)Frequency Uncompensated Compensated                              Ratio______________________________________100 MHz   0.15          0.014       0.093400 MHz   0.15          0.013       0.087 1 GHz    0.15          0.015      0.10 2 GHz    0.14          0.039      0.28 4 GHz    0.12          0.062      0.52______________________________________ 
    
     At low frequencies there is approximately a tenfold improvement in harmonic distortion compared to an uncompensated amplifier. Furthermore, although the improvement degrades with increasing frequency, it still extends over a wide frequency range including higher frequencies of several Gigahertz. 
     As may be apparent from the preceding description, certain changes may be made in the above constructions without departing from the scope of the invention. Therefore, the embodiments described herein and shown in the drawings are intended to be illustrative in nature and are not meant to be interpreted as limiting the following claims.