Abstract:
A magnetic data storage and retrieval system includes a magnetoresistive head, a resistor, a preamplifier circuit, a voltage measurement circuit, and a resistance calculation circuit. The preamplifier circuit is operably coupled to the magnetoresistive head and the resistor, and applies a first current to the magnetoresistive head and a second current to the resistor. The voltage measurement circuit measures a first voltage across the magnetoresistive head and a second voltage across the resistor. The resistance calculation circuit calculates a resistance of the magnetoresistive head based upon the first and second voltages.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates generally to the field of magnetic data storage and retrieval systems. In particular, the present invention relates to a magnetic data storage and retrieval system having improved magnetoresistive head resistance measurement accuracy. 
     In magnetic data storage and retrieval systems, a magnetoresistive (MR) head utilizes MR elements to sense the selective magnetization of tracks on a magnetic data storage medium. A typical MR element is formed from an alloy of materials so as to have an electrical resistance which varies in the presence of a magnetic field. By passing a bias current through the MR element, the selective magnetization of a corresponding track can be determined in relation to variations in voltage detected across the MR element. 
     The sensitivity of an MR head depends on many factors. One of the most significant factors is the bias current provided to the MR head. The ability to read a signal from a magnetic medium is, in part, a function of the amount of bias current supplied to the MR head. Signal sensitivity can be increased by increasing the amount of bias current supplied to the MR head. Therefore, increased bias current will generally produce an improved signal-to-noise ratio and will therefore result in lower error rates. 
     However, excessive bias current can significantly shorten the useful life span of the MR head. It is important to ensure that the maximum power dissipation capability of the MR head is not exceeded. Because the MR element operates as a highly sensitive resistance, the power dissipated by the MR element will be proportional to the resistance of the MR element multiplied by the square of the bias current. Accordingly, there is an upper limit on the magnitude of the bias current that can be applied to any given MR head, and the application of too large a bias current, even momentarily, can stress the MR head and adversely affect its operational reliability over time. 
     Thus, in order to optimize the performance of the MR head, the maximum bias current that can be safely applied to the MR head must be determined. The accuracy in determining this optimal bias current depends directly on the accuracy in measuring the resistance of the MR head; the greater the accuracy of the MR head resistance measurement, the greater the accuracy that can be achieved in determining the optimal bias current. In this way, accurate measurement of the MR head resistance is crucial for optimal MR head performance. 
     Accordingly, there is a need for a magnetic data storage and retrieval system that measures the resistance of the MR head with greater accuracy in order to optimize the bias current to the MR head. 
     BRIEF SUMMARY OF THE INVENTION 
     The present invention is a magnetic data storage and retrieval system. A preamplifier circuit is operably coupled to a magnetoresistive head and a resistor, and applies a first current to the magnetoresistive head and a second current to the resistor. A voltage measurement circuit measures a first voltage across the magnetoresistive head and a second voltage across the resistor. A resistance calculation circuit calculates a resistance of the magnetoresistive head based upon the first and second voltages. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 shows a block diagram of a prior art MR head resistance measurement system. 
     FIG. 2 shows a block diagram of an MR head resistance measurement system incorporating the present invention. 
    
    
     DETAILED DESCRIPTION 
     Magnetic data storage and retrieval systems typically utilize an MR head resistance measurement system located on the MR head chip to measure the resistance of the MR head whenever it is required to optimize a bias current to the MR head. This measurement can be done any time before the magnetic data storage and retrieval system performs a read function or a write function. 
     FIG. 1 shows a block diagram of a prior art MR head resistance measurement system  10 . Prior art MR head resistance measurement system  10  measures the resistance of MR head  11 , which is represented in FIG. 1 as a resistor R MRH . Prior art MR head resistance measurement system  10  includes a preamplifier  12 , a buffer stage  14 , an analog-to-digital converter  16 , and head nodes H 1  and H 2 . 
     Preamplifier  12  has first and second output nodes connected respectively to head nodes H 1  and H 2 . MR head  11  is connected between head nodes H 1  and H 2 . Preamplifier  12  applies a bias current I bias  to MR head  11  from head node H 1  to H 2 . 
     Buffer stage  14  has first and second input nodes, and an output node. The first and second input nodes of buffer stage  14  are connected respectively to head nodes H 1  and H 2 . Buffer stage  14  measures a voltage V MRH  across MR head  11  between its first and second input nodes. Buffer stage  14  then multiplies voltage V MRH  by a scale factor A (in this example A=5) and provides the resulting scaled voltage signal at its output node. Buffer stage  14  also electrically isolates preamplifier  12  from noise generated by analog-to-digital converter  16 . 
     Analog-to-digital converter  16  has an input node connected to the output node of buffer stage  14 . Analog-to-digital converter  16  converts the scaled voltage signal from buffer stage  14  to digital form, and then calculates the resistance R MRH  of MR head  11  according to the following equation: 
     
       
         
           R 
           MRH 
           =V 
           MRH 
           *A/I 
           bias 
         
       
     
     Prior art MR head resistance measurement system  10  typically experiences a measurement error of about 10-15%. Because the MR head resistance measurements are made in an operating environment where MR head  11  is used, prior art MR head resistance measurement system  10  is affected by circuit parameter variations such as temperature. The accuracy of the MR head resistance measurement depends on the accuracy of analog-to-digital converter  16 , buffer stage  14 , and bias current I bias  in this operating environment. A common method of reducing the measurement error of prior art MR head resistance measurement system  10  is to increase the accuracy of analog-to-digital converter  16 . This is accomplished by increasing the complexity, or the number of bits, of analog-to-digital converter  16 . Increasing the number of bits, however, significantly increases the die area, power consumption, and cost of analog-to-digital converter  16 . As a result, it has not been previously possible to achieve a measurement error of less than 1% while satisfying the die area restraints and cost restraints required by today&#39;s magnetic data storage and retrieval systems. 
     FIG. 2 shows a block diagram of an MR head resistance measurement system  20  incorporating the present invention. MR head resistance measurement system  20  measures the resistance of MR head  21 , which is represented in FIG. 2 as a resistor R MRH . MR head resistance measurement system  20  includes a preamplifier  22 , a buffer stage  24 , an analog-to-digital converter  26 , an external reference resistor R ref , switches S 1  and S 2 , head nodes H 1  and H 2 , resistor nodes R 1  and R 2 , and a fixed potential GND. 
     Preamplifier  22  has first, second, and third output nodes, wherein the first and second output nodes are used to provide a bias current I bias  and the third output node is used to provide a reference current I ref . The first and second output nodes are connected respectively to head nodes H 1  and H 2 , and the third output node is connected to resistor node R 1 . MR head  21  is connected between head nodes H 1  and H 2 , and resistor R ref  is connected between resistor nodes R 1  and R 2 , with resistor node R 2  connected to fixed potential GND. Preamplifier  22  applies bias current I bias  to MR head  21  from head node H 1  to H 2 , and applies reference current I ref  to resistor R ref  from resistor node R 1  to R 2 . Reference current I ref  is typically much smaller than bias current I bias  to minimize power consumption. In addition, the value of resistor R ref  is typically much greater than the resistance R MRH  of MR head  21  such that the ratio R ref /R MRH  is approximately equal to the ratio I bias /I ref . This creates voltages of the same order across resistor R ref  and MR head  21 . 
     Buffer stage  24  has first and second input nodes, and an output node. The first and second input nodes of buffer stage  24  are connected respectively to switches S 1  and S 2 . During a calibration mode, switches S 1  and S 2  selectively connect the first and second input nodes of buffer stage  24  to first and second resistor nodes R 1  and R 2 , respectively. At this time, buffer stage  24  measures a voltage V ref  across resistor R ref . Buffer stage  24  then multiplies voltage V ref  by a scale factor A (in this example A=5) and provides the resulting scaled voltage signal at its output. During a measurement mode, switches S 1  and S 2  selectively connect the first and second input nodes of buffer stage  24  to first and second head nodes H 1  and H 2 , respectively. At this time, buffer stage  24  measures a voltage V MRH  across MR head  21 . Buffer stage  24  then multiplies voltage V MRH  by scale factor A and provides the resulting scaled voltage signal at its output node. Buffer stage  24  also electrically isolates preamplifier  22  from noise generated by analog-to-digital converter  26 . 
     Analog-to-digital converter  26  has an input node connected to the output node of buffer stage  24 . Analog-to-digital converter  26  converts the scaled voltage signals from buffer stage  24  to digital form, and stores the digital voltage signals in memory. Analog-to-digital converter  26  then calculates the resistance R MRH  of MR head  21  according to the following equation:          R   MRH     =         V   MRH       V   ref       *       R   ref     K                              
     where K is a constant equal to the ratio I bias /I ref . 
     MR head resistance measurement system  20  typically experiences a measurement error of less than 1%. The measured resistance R MRH(meas)  of MR head  21  is expressed as:          R     MRH        (   meas   )         =         V     MRH        (   meas   )           V     ref        (   meas   )           *       R   ref     K                              
     where V MRH(meas)  is the measured voltage across MR head  21  and V ref(meas)  is the measured voltage across resistor R ref . Measured voltages V MRH(meas)  and V ref(meas)  can be expressed as:                V     MRH        (   meas   )         =       V   MRH          (     1   +     E   1       )                     V     ref        (   meas   )         =       V   ref          (     1   +     E   2       )                                    
     where V MRH  is the actual voltage across MR head  21 , E 1  is the voltage measurement error associated with MR head  21 , V ref  is the actual voltage across resistor R ref , and E 2  is the voltage measurement error associated with resistor R ref . From this the measured resistance R MRH(meas)  of MR head  21  can now be expressed as:          R     MRH        (   meas   )         =           V   MRH          (     1   +     E   1       )           V   ref          (     1   +     E   2       )         *       R   ref     K                              
     Because both measurement error E 1  and E 2  are measured by the same instrument and because voltages V MRH  and V ref  are of the same order, any difference between measurement error E 1  and E 2  is negligible and the measurement errors cancel each other. As a result, the above expression can be reduced to:          R     MRH        (   meas   )         =         V   MRH       V   ref       *       R   ref     K                              
     This shows that the accuracy of measured resistance R MRH(meas)  does not depend on the accuracy of measured voltages V MRH(meas)  and V ref(meas) . Instead, the accuracy of measured resistance R MRH(meas)  depends only on the accuracy of resistor R ref . 
     Therefore, if the value of resistor R ref  has an error (or tolerance) of less than 1%, then MR head resistance measurement system  20  will experience a measurement error of less than 1%. 
     Thus, the present invention provides a magnetic data storage and retrieval system that measures the resistance of the MR head with greater accuracy in order to optimize the bias current to the MR head. 
     Although the present invention has been described with reference to preferred embodiments, workers skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the invention.