Abstract:
Disclosed is a controller for driving current of a semiconductor device having an over-driving function, the controller comprising: a load means supplied with an internal voltage; a plurality of switching means, each of which has a first terminal connected to an external voltage and a second terminal connected to the load means, wherein at least one of the plurality of switching means is selectively turned on/off according to an voltage level of the external voltage.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the invention  
         [0002]     The present invention relates to a controller for driving current of a semiconductor device, and more particularly to a controller for driving current of a semiconductor device which can provide a constant amount of current to a memory device although the voltage level of an external voltage applied from an exterior changes.  
         [0003]     2. Description of the Prior Art  
         [0004]     Semiconductor devices show a tendency of having high integration and using lower power. In order to achieve the high integration of the semiconductor device, the size of internal elements contained in the semiconductor device becomes smaller and smaller. In addition, in order to achieve the low power, the semiconductor device drops an external voltage to a predetermined voltage level by using an internal voltage generation device contained therein, and uses the dropped voltage as a power supply voltage for internal elements. Since the internal elements are driven by such a power supply voltage having a low voltage level, power consumption of the semiconductor device decreases, but the operational speed of the internal elements decrease, thereby deteriorating the driving capability of the semiconductor device.  
         [0005]     Also, according to the high integration of the semiconductor device, many internal elements simultaneously operate at one time, so that the driving capabilities of the internal elements are deteriorated when the power supply voltage used for the operations of the internal elements have a low voltage level. In order to prevent the driving capabilities of the internal elements from being deteriorated due to such a low voltage level of the power supply voltage, over-driving for the internal elements of the semiconductor device is performed. That is, when the voltage level of a power supply voltage applied to the internal elements of the semiconductor device is lower than a predetermined voltage level, an external voltage having a higher voltage level than that of the power supply voltage is applied to the internal elements in order to drive the internal elements..  
         [0006]     For example, in a read operation of a semiconductor device, when a plurality of sense amplifiers operate at the same time in order to sense data stored in a memory cell, the sense amplifiers consumes a large amount of power in a moment due to the simultaneous operations of the multiple sense amplifiers. When these multiple sense amplifiers operate with a power supply voltage having a low voltage level, the driving capabilities of the multiple sense amplifiers are deteriorated and the voltage level of the power supply voltage is momentarily deteriorated. Also, in an initial read operation of the semiconductor device, when a plurality of sense amplifiers operate at the same time with a power supply voltage having a lower voltage level than a predetermined level, the multiple sense amplifiers cannot normally operate due to the power supply voltage having the lower voltage level than the predetermined level.  
         [0007]     In order to solve such a problem, the sense amplifier of the semiconductor device is over-driven when the semiconductor device performs a read operation. That is, when the voltage level of the power supply voltage is lower than a predetermined voltage level, an external voltage having a higher voltage level than the power supply voltage -applied to the multiple sense amplifiers. In other words, as shown in  FIG. 1 , the conventional semiconductor device supplies a power supply voltage Vcore and an external voltage Vdd, which have different voltage levels, to a sense amplification section  110  including a plurality of sense amplifiers  111 ,  112  and.  113 . Herein, the external voltage Vdd is a voltage provided from the outside of the semiconductor device, and the power supply voltage Vcore is an internal voltage obtained by dropping the external voltage Vdd to a predetermined voltage level by means of an internal voltage generation device contained in the semiconductor device. In  FIG. 1 , a first and a second control signal ‘sap’ and ‘san’ are signals for operating the sense amplifiers  111 ,  112  and  113  sensing and amplifying data stored in a memory cell when the semiconductor device performs a read operation. A third control signal ‘ovd’ is a signal for applying the external voltage Vdd to the sense amplifiers  111 ,  112  and  113  in order to improve the driving capabilities of the sense amplifiers  111 ,  112  and  113 , when the sense amplifiers  111 ,  112  and  113  operate at the same time. That is, the third control signal ‘ovd’ is a signal for over-driving the sense amplifiers  111 ,  112  and  113 .  
         [0008]     In other words, when a plurality of sense amplifiers  111 ,  112  and  113  operate at the same time in order to sense and amplify data stored in a memory cell, the first and second control signals ‘sap’ and ‘san’ for operating the sense amplifiers  111 ,  112  and  113  are applied to a first and a second transmission means  121  and  122 . The first control signal ‘sap’ enables the first transmission means  121  to provide the power supply voltage Vcore to each of the sense amplifiers  111 ,  112  and  113  of the sense amplification section  110 , and the second control signal ‘san’ enables the second transmission means  122  to connect each of the sense amplifiers  111 ,  112  and  113  of the sense amplification section  110  to a ground node. Therefore, each of the sense amplifiers  111 ,  112  and  113  senses and amplifies data stored in the memory cell by the power supply voltage Vcore. In addition, when the third control signal ‘ovd’ is applied to a third transmission means  123 , the third transmission means  123  provides the external voltage Vdd to each of the sense amplifiers  111 ,  112  and  113  of the sense amplification section  110 .  
         [0009]     As described above, in a read operation of the semiconductor device, when a plurality of sense amplifiers  111 ,  112  and  113  operate at the same time in order to sense and amplify data stored in a memory cell, the power supply voltage Vcore and the external voltage Vdd are supplied to each of the sense amplifiers  111 ,  112  and  113  of the sense amplification section  110  by the first and the third transmission means  121  and  123 . As a result, the driving capabilities of the sense amplifiers  111 ,  112  and  113  are improved, so that the read operation of the semiconductor device is efficiently performed.  
         [0010]     However, when the voltage level of the external voltage Vdd provided to the sense amplifiers  111 ,  112  and  113  through the third transmission means  123  is higher than a voltage level required for the efficient operation of the sense amplifiers  111 ,  112  and  113 , the amount of current ‘i 1 ’ flowing through a node connecting the first and third transmission means  121  and  123  and the sense amplifiers  111 ,  112  and  113  rapidly increases. The increase of the current ‘i 1 ’ cause a noise to cause a malfunction of the sense amplifiers  111 ,  112  and  113 , so that the semiconductor device may malfunction. Also, when the voltage level of the external voltage Vdd is lower than the voltage level required for the efficient operation of the sense amplifiers  111 ,  112  and  113 , the amount of current ‘i 1 ’ flowing through the node connecting the first and third transmission means  121  and  123  and the sense amplifiers  111 ,  112  and  113  decreases, thereby deteriorating the driving capabilities of the sense amplifiers  111 ,  112  and  113 . Accordingly, a read operation of the semiconductor device may not be performed smoothly.  
         [0011]     As described above, according to the conventional semiconductor device, the amount of current ‘i 1 ’ applied to the sense amplifiers  111 ,  112  and  113 , which operate with the external voltage Vdd and the power supply voltage Vcore provided thereto, changes depending on the change of the voltage level of the external voltage Vdd. Therefore, the sense amplifiers  111 ,  112  and  113  may malfunction due to the changing current ‘i 1 ’. That is, the amount of current ‘i 1 ’, which is provided to a load means of the semiconductor device operating with the external voltage Vdd, changes depending on the change of the voltage level of the external voltage Vdd, thereby causing a malfunction of the semiconductor device.  
       SUMMARY OF THE INVENTION  
       [0012]     Accordingly, the present invention has been made to solve the above-mentioned problems occurring in the prior art, and an object of the present invention is to provide a controller for driving current of a semiconductor device which can provide a constant amount of current to a load means although the voltage level of an external voltage changes, thereby preventing a malfunction of the semiconductor device.  
         [0013]     In accordance with a first aspect of the present invention in order to accomplish the above objects, there is provided a controller for driving current of a semiconductor device having an over-driving function, the controller comprising: a variable resistance section for receiving an external voltage applied to the semiconductor device and providing current to a load means contained in the semiconductor device.  
         [0014]     Herein, the variable resistance section comprises a plurality of resistance means connected in parallel with each other between a node for the external voltage and an input node of the load means.  
         [0015]     Preferably, the controller according to the first aspect of the present invention further comprises a detection section for detecting a voltage level of the external voltage to output a control signal, wherein a resistance value of the variable resistance section changes depending on the control signal. Herein, as the voltage level of the external voltage decreases, the resistance value of the variable resistance section controlled by the control signal also decreases. Herein, each of the plurality of resistance means includes a transistor, which is selectively turned on/off by the control signal. In addition, a first terminal of the transistor is connected to the external voltage and a second terminal of the transistor is connected to the load means.  
         [0016]     In accordance with a second aspect of the present invention in order to accomplish the above objects, there is provided a controller for driving current of a semiconductor device having an over-driving function, the controller comprising: a load means supplied with an internal voltage; a plurality of switching means, each of which has a first terminal connected to an external voltage and a second terminal connected to the load means, wherein at least one of the plurality of switching means is selectively turned on/off according to an voltage level of the external voltage.  
         [0017]     Herein, the number of turned-on switching means from among the plurality of switching means increases as the voltage level of the external voltage becomes lower.  
         [0018]     Preferably, the controller according to the second aspect of the present invention further comprises a detection means for detecting the voltage level of the external voltage to output a plurality of control signals, wherein turn on/off of the plurality of switching means is determined according to the plurality of control signals outputted from the detection means.  
         [0019]     Herein, the semiconductor device includes a memory device and the load means includes a sense amplifier contained in the memory device. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0020]     The above and other objects, features and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:  
         [0021]      FIG. 1  is a circuit diagram illustrating the conventional controller for driving current of a semiconductor device;  
         [0022]      FIG. 2  is a block diagram illustrating a controller for driving current of a semiconductor device according to an embodiment of the present invention;  
         [0023]      FIG. 3  is a circuit diagram illustrating a controller for driving current of a semiconductor device according to an embodiment of the present invention;  
         [0024]      FIG. 4  is a circuit diagram illustrating the detection section of the controller for driving current of a semiconductor device according to an embodiment of the present invention; and  
         [0025]      FIG. 5  is graphs showing waveform for explaining the operation of the detection section shown in  FIG. 4 . 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0026]     Hereinafter, a preferred embodiment of the present invention will be described with reference to the accompanying drawings. In the following description and drawings, the same reference numerals are used to designate the same or similar components, and so repetition of the description on the same or similar components will be omitted.  
         [0027]      FIG. 2  is a block diagram illustrating a controller for driving current of a semiconductor device according to the present invention.  
         [0028]     The controller for driving current of a semiconductor device according to the present invention includes a detection section  210  and a driving section  220 . The detection section  210  detects the voltage level of an external voltage Vdd to output a control signal ‘en’. The driving section  220  is supplied with the external voltage Vdd and an internal voltage Vcore and provides a constant amount of current ‘i 2 ’ to a load means  230  by the control signal ‘en’.  
         [0029]     The detection section  210  detects the voltage level of the external voltage Vdd provided from an exterior in order to operate the semiconductor device, and applies the control signal ‘en’ to the driving section  220  according to the voltage level of the external voltage Vdd. The driving section  220  is supplied with the external voltage Vdd and the internal voltage Vcore, which is obtained by dropping the external voltage Vdd to a predetermined voltage level through an internal voltage generation device contained in the semiconductor device in order to be used as a power supply voltage Vcore for internal elements. The driving section  220  applies the constant amount of current ‘i 2 ’ to the load means  230  of the semiconductor device by the control signal ‘en’ received from the detection section  210 . Herein, the load means  230  represents internal elements of the semiconductor device which operate by the external voltage Vdd and the internal voltage Vcore. The driving capability of the load means  230  is deteriorated when the voltage level of the internal voltage Vcore is lower than a predetermined voltage level. In order to prevent the driving capability of the load means  230  from being deteriorated, over-driving for the load means  230  is performed. That is, the external voltage Vdd having a higher voltage level than that of the internal voltage Vcore is supplied to the load means  230  through the driving section  220 , thereby preventing the driving capability of the load means  230  from being deteriorated.  
         [0030]     The controller for driving current of the semiconductor device as described above detects the voltage level of the external voltage Vdd through the detection section  210  when the voltage level of the external voltage Vdd provided to the semiconductor device changes. The detection section  210 , which has detected a changing voltage level of the external voltage Vdd, outputs an control signal ‘en’ which has a distinct value depending on the voltage level of the external voltage Vdd. The driving section  220  receives the control signal ‘en’ which has a value determined depending on the voltage level of the external voltage Vdd, and always applies the constant amount of current ‘i 2 ’ to the load means  230  of the semiconductor device in response to the control signal en’.  
         [0031]     Hereinafter, a controller for driving current of a semiconductor device according to an embodiment of the present invention will be described.  
         [0032]      FIG. 3  is a circuit diagram illustrating a controller for driving current of a semiconductor device applied to a sense amplifier of the semiconductor device according to an embodiment of the present invention.  
         [0033]     The semiconductor device containing the controller for driving current according to an embodiment of the present invention includes a detection section  310 , a driving section  320  and a sense amplification section  330 . The detection section  310  detects the voltage level of an external voltage Vdd, and outputs a first, a second and a third control signal ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ according to the detected voltage level. The driving section  320  is supplied with the external voltage Vdd and an internal voltage Vcore, and receives the control signal ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ outputted from the detection section  310  and a fourth and a fifth control signal ‘sap’ and ‘/ovd’. The driving section  320  generates and applies the constant amount of current ‘i 2 ’ to the sense amplification section  330 . The sense amplification section  330  is a load means of the semiconductor device, and operates by a sixth control signal ‘san’ and the current ‘i 2 ’ supplied from the driving section  320 . That is, the sense amplification section  330  senses data stored in a memory cell of the semiconductor device by using the sixth control signal ‘san’ and the current ‘i 2 ’.  
         [0034]     Herein, the external voltage Vdd is a voltage supplied from the outside of the semiconductor device, and the internal voltage Vcore is a power supply voltage which is obtained by dropping the external voltage Vdd to a predetermined voltage level through an internal voltage generation device contained in the semiconductor device. Also, the fourth and sixth control signals ‘sap’ and ‘san’ are signals for operating the sense amplification section  330  to sense data stored in the memory cell when the semiconductor device performs a read operation. The fifth control signal ‘/ovd’ is a signal for ordering the external voltage Vdd to be applied to the sense amplification section  330  in order to improve the driving capability of the sense amplification section  330 , when the initial operation of the sense amplification section  330  is performed. That is, the fifth control signal ‘/ovd’ is a signal for over-driving the sense amplification section  330  in order to prevent the driving capability of the sense amplification section  330  from being deteriorated when the voltage level of the internal voltage Vcore is lower than a predetermined voltage level.  
         [0035]     The detection section  310  detects the voltage level of the external voltage Vdd and outputs the first, second and third control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’. The detection section  310  will now be described in detail with reference to  FIG. 4 .  
         [0036]      FIG. 4  is a circuit diagram illustrating the detection section  210  of the controller for driving current of a semiconductor device according to an embodiment of the present invention, that is, a circuit diagram illustrating the detection section  310  shown in  FIG. 3 .  
         [0037]     The detection section  310  includes a divider  410 , a first, a second and a third detector  420 ,  430 ,  440 . The divider  410  includes a plurality of resistor elements R 1 , R 2 , R 3  and R 4  which are connected in series between a node for an external voltage Vdd and a ground node. The divider  410  divides a received external voltage Vdd into multiple voltage levels according to resistance ratios among the resistor elements R 1 , R 2 , R 3  and R 4 . Each common node between the resistor elements R 1 , R 2 , R 3  and R 4  is connected a distinct output node of the divider  410 , so that the divider  410  outputs the voltages of the common nodes. That is, the divider  410  outputs the voltages of the common nodes as a first, a second and a third reference voltage Vref 1 , Vref 2  and Vref 3 , respectively.  
         [0038]     The first, second and third detectors  420 ,  430 ,  440  include sensors  421 ,  431  and  441  and comparators  422 ,  432  and  442 , respectively. The first detector  420  senses the voltage level of an external voltage Vdd by means of the sensor  421 . The sensor  421  changes the level of the sensed external voltage Vdd, and applies an output voltage V 1  to the comparator  422 . The comparator  422  compares the voltage levels between the output voltage V 1  of the sensor  421  and the first reference voltage Vref 1  received from the divider  410 , and outputs a first control signal ‘en 1 ’. The first control signal ‘en 1 ’ outputted from the comparator  422  is applied to the driving section  320 .  
         [0039]     The sensor  421  includes a resistor element R 5  and a diode-type transistor T 1  which are connected in series between a reception node for the external voltage Vdd and a ground node. The output voltage V 1  of the sensor  421  is a voltage of the common node of the resistor element R 5  and the diode-type transistor T 1 , and has a level equal to that of a threshold voltage Vth of the diode-type transistor T 1 . The comparator  422  includes PMOS transistors P 1  and P 2 , NMOS transistors N 1 , N 2  and N 3 , and an inverter IN 1 , which are connected in a current mirror fashion between a node for the external voltage Vdd and a ground node. The comparator  422  is enabled when the external voltage Vdd is applied to the NMOS transistor N 3  connected to the ground node. The comparator  422  enabled as described above compares the voltage levels between the first reference voltage Vref 1  and the output voltage V 1  of the sensor  421 , which has a level (Vth) equal to that of the threshold voltage Vth, and outputs the first control signal ‘en 1 ’.  
         [0040]     The second detector  430  senses the voltage level of an external voltage Vdd by means of the sensor  431 . The sensor  431  changes the level of the sensed external voltage Vdd and applies an output voltage V 2  to the comparator  432 . The comparator  432  compares the voltage levels between the output voltage V 2  of the sensor  431  and the second reference voltage Vref 2  received from the divider  410 , and outputs a second control signal ‘en 2 ’. The second control signal ‘en 2 ’ outputted from the comparator  432  is applied to the driving section  320 .  
         [0041]     The sensor  431  includes a resistor element R 6  and two diode-type transistors T 2  and T 3 , which are connected in series between a reception node for the external voltage Vdd and a ground node. The output voltage V 2  of the sensor  431  is a voltage of the common node of the resistor element R 6  and the diode-type transistor T 2 , and has a voltage level (2 Vth) two times higher than that of each threshold voltage Vth of the diode-type transistors T 2  and T 3 . The comparator  432  includes PMOS transistors P 3  and P 4 , NMOS transistors N 4 , N 5  and N 6 , and an inverter IN 2 , which are connected in a current mirror fashion between a node for the external voltage Vdd and a ground node. The comparator  432  is enabled when the external voltage Vdd is applied to the NMOS transistor N 6  connected to the ground node. The comparator  432  enabled as described above compares the voltage levels between the second reference voltage Vref 2  and the output voltage V 2  of the sensor  431 , which has a voltage level (2 Vth) two times higher than that of each threshold voltage Vth of the diode-type transistors T 2  and T 3 , and outputs the -second control signal ‘en 2 ’.  
         [0042]     The third detector  440  senses the voltage level of an external voltage Vdd by means of the sensor  441 . The sensor  441  changes the level of the sensed external voltage Vdd and applies an output voltage V 3  to the comparator  442 . The comparator  442  compares the voltage levels between the output voltage V 3  of the sensor  441  and the third reference voltage Vref 3  received from the divider  410 , and outputs a third control signal ‘en 3 ’. The third control signal ‘en 3 ’ outputted from the comparator  442  is applied to the driving section  320 .  
         [0043]     The sensor  441  includes a resistor element R 7  and three diode-type transistors T 4 , T 5  and T 6 , which are connected in series between a reception node for the external voltage Vdd and a ground node. The output voltage V 3  of the sensor  441  is a voltage of the common node of the resistor element R 7  and the diode-type transistor T 4 , and has a voltage level 3 Vth two times higher than that of each threshold voltage Vth of the diode-type transistors T 4 , T 5  and T 6 . The comparator  442  includes PMOS transistors P 5  and P 6 , NMOS transistors N 7 , N 8  and N 9 , and an inverter IN 3 , which are connected in a current mirror fashion between a node for the external voltage Vdd and a ground node. The comparator  442  is enabled when the external voltage Vdd is applied to the NMOS transistor N 9  connected to the ground node. The comparator  442  enabled as described above compares the voltage levels between the third reference voltage Vref 3  and the output voltage V 3  of the sensor  441 , which has a level (3 Vth) three times higher than that of each threshold voltage Vth of the diode-type transistors T 4 , T 5  and T 6 , and outputs the third control signal ‘en 3 ’.  
         [0044]     The driving section  320  includes control means  321 ,  322  and  323  and transmission means  324 ,  325 ,  326  and  327 . The control means  321 ,  322  and  323  receives the fifth control signal ‘/ovd’, and also receives the first, the second and the third control signal ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ from the detection section  310 , respectively. The output signals of the control means  321 ,  322  and  323  are applied to the transmission means  324 ,  325  and  326  in order to enable the transmission means  324 ,  325  and  326 , respectively. The transmission means  324 ,  325  and  326  are connected in parallel with each other between a node for the external voltage Vdd and an input node of the sense amplification section  330 . Also, the other transmission means  327  is connected between a node for the internal voltage Vcore and the input node of the sense amplification section  330 . That is, the transmission means  324 ,  325 ,  326  and  327  are connected in parallel to input node of the sense amplification section  330 , respectively. The transmission means  324 ,  325  and  326  connected to the node for the external voltage Vdd is enabled by output signals of the control means  321 ,  322  and  323 , respectively, and the transmission means  327  connected to the node for the internal voltage Vcore is enabled by the fourth control signal ‘sap’.  
         [0045]     Such transmission means  324 ,  325 ,  326  and  327  include transistors M 1 , M 2 , M 3  and M 4 , respectively, and signals for enabling the transmission means  324 ,  325 ,  326  and  327  are applied to gate terminals of the transistors M 1 , M 2 , M 3  and M 4 , respectively. Each of the tr transistors M 1 , M 2 , M 3  and M 4  is enabled to perform a resistor function. That is, when each of the transmission means  324 ,  325 ,  326  and  327  is enabled, each of the transistors M 1 , M 2 , M 3  and M 4  contained in the transmission means  324 ,  325 ,  326  and  327  functions as an active resistor. When the transistors M 1 , M 2 , M 3  and M 4  have an equal size, the resistance values of the transistors are equal to each other. As a result, the transmission means  324 ,  325  and  326  connected to the external voltage Vdd generate current by the external voltage Vdd and the resistance values of the transistors M 1 , M 2  and M 3 . Also, the transmission means  327  connected to the internal voltage Vcore generates current by the resistance value of the transistor M 4  and the internal voltage Vcore.  
         [0046]     Herein, since the transmission means  327  connected to the internal voltage Vcore is enabled by the fourth control signal ‘sap’, the transmission means  327  is always enabled in a read operation of the semiconductor device. Therefore, the transmission means  327  generates a constant amount of current at all times by the internal voltage Vcore and the resistance value of the transistor M 4 . The transmission means  324 ,  325  and  326  connected to the node for the external voltage Vdd are enabled by output signals of the control means  321 ,  322  and  323 , that is, by the control signals ‘en 1 ’, ‘en 2 ’, and ‘en 3 ’ applied from the detection section  310 , respectively. Therefore, the transmission means  324 ,  325  and  326  are individually enabled depending on the voltage level of the external voltage Vdd, thereby changing the number of transistors connected to the external voltage Vdd from among the transistors M 1 , M 2 , M 3  and M 4 . Such change of the number of connected transistors causes the change of the resistance value of the transmission means  324 ,  325  and  326 , so that the resistor value of the transmission means  324 ,  325  and  326  changes depending on the voltage level of the external voltage Vdd. That is, when the voltage level of the external voltage Vdd changes, the resistance value caused by the transmission means  324 ,  325  and  326  connected to the node of the external voltage Vdd changes depending on the changed voltage level of the external voltage Vdd, so that the amount of current generated by the external voltage Vdd and the resistance value is always kept uniform.  
         [0047]     The constant amount of current ‘i 2 ’ generated from the transmission means  324 ,  325 ,  326  and  327  is supplied to the sense amplification section  330  through a single node.  
         [0048]     The sense amplification section  330  includes a plurality of sense amplifiers  331 ,  332  and  333  and a transmission means  334 . The sense amplifiers  331 ,  332  and  333  sense and amplify data stored in the memory cell of the semiconductor device when the read operation of the semiconductor device is performed. The transmission means  334  is enabled by the sixth control signal ‘san’ when the read operation of the semiconductor device is performed. When the transmission means  334  is enabled, the transmission means  334  connects the sense amplifiers  331 ,  332  and  333  to a ground node, thereby enabling the sense amplifiers  331 ,  332  and  333 .  
         [0049]     Hereinafter, the operation of the controller for driving current of a semiconductor device according to an embodiment of the present invention will be described in relation to various voltage levels of the external voltage Vdd in a read operation of the semiconductor device.  
         [0050]      FIG. 5  is graphs showing waveform for explaining the operation of the detection section  310  based on the voltage level of the external voltage Vdd.  
         [0051]     When the semiconductor device performs an initial read operation, the higher the voltage level of the external voltage Vdd is, the higher the voltage levels of the first, second and third reference voltages Vref 1 , Vref 2  and Vref 3  (which is outputs voltages of the divider  410  contained in the detection section  310 ) are. The first detector  420  outputs the first control signal ‘en 1 ’ having a voltage level equal to that of an external voltage Vdd when the voltage level of the external voltage Vdd is equal to or lower than 2.0 V. The second detector  430  outputs the second control signal ‘en 2 ’ having a voltage level equal to that of an external voltage Vdd when the voltage level of the external voltage Vdd is equal to or lower than 2.5 V. Also, the third detector  440  outputs the third control signal ‘en 3 ’ having a voltage level equal to that of an external voltage Vdd when the voltage level of the external voltage Vdd is equal to or lower than 3.0 V. Herein, the maximum output voltages V 1 , V 2  and V 3  of the sensors  421 ,  431  and  441  contained in the detectors  420 ,  430  and  440  have voltage levels one-time (Vth) two-times (2 Vth) and three-times (3 Vth) higher respectively than each threshold voltage (Vth) of the diode-type transistors T 1 , T 2 , T 3 , T 4 , T 5  and T 6 .  
         [0052]     When the detection section  310  operates based on the voltage level of the external voltage Vdd as described above, the driving section  320  receives the output signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ of the detection section  310  and the fourth and fifth control signals ‘sap’ and ‘/ovd’. That is, the driving section  320  receives the first, second and third control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ from the detection section  310  and receives the fourth and fifth control signals ‘sap’ and ‘/ovd’.  
         [0053]     Herein, when the voltage level of an external voltage Vdd is equal to or lower than 2.0 V, all of the first, second and third control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ outputted from the detection section  310  have a voltage level equal to that of the external voltage Vdd. These first, second and third control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ are applied to the control means  321 ,  322  and  323  of the driving section  320 , respectively. The control means  321 ,  322  and  323  receive the fifth control signal ‘/ovd’ in addition to the control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’, and apply their output signals to the transmission means  324 ,  325  and  326 , respectively. Accordingly, all of the transmission means  324 ,  325  and  326  connected to the nodes for the external voltage Vdd are enabled, and the transmission means  327  connected to the internal voltage Vcore is enabled by the fourth control signal ‘sap’. As a result, all the transistors M 1 , M 2 , M 3  and M 4  contained in the transmission means  324 ,  325 ,  326  and  327  of the driving section  320  function as resistors, thereby providing the constant amount of current ‘i 2 ’ to the sense amplification section  330  according to the active values of the transistors M 1 , M 2 , M 3  and M 4 , the external voltage Vdd and the internal voltage Vcore. Herein, when the transistors M 1 , M 2 , M 3  and M 4  have an equal value, their resistance values are equal. As a result, the transmission means  324 ,  325  and  326  connected to the nodes for the external voltage Vdd generate current of equal magnitude.  
         [0054]     When the voltage level of an external voltage Vdd is from 2.0 V to 2.5 V, only the second and third control signals en 2 ′ and ‘en 3 ’ from among the first, second and third control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ outputted from the detection section  310  have a voltage level equal to that of the external voltage Vdd. These first, second and third control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ are applied to the control means  321 ,  322  and  323  of the driving section  320 , respectively. The control means  321 ,  322  and  323  receive the fifth control signal ‘/ovd’ in addition to the control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’, and apply their output signals to the transmission means  324 ,  325  and  326 , respectively. Accordingly, only two transmission means  325  and  326  are enabled from among the transmission means  324 ,  325  and  326  connected to the nodes for the external voltage Vdd, and the transmission means  327  connected to the internal voltage Vcore is enabled by the fourth control signal ‘sap’. As a result, from among the transistors M 1 , M 2 , M 3  and M 4  contained in the transmission means  324 ,  325 ,  326  and  327  of the driving section  320 , only the transistors M 2 , M 3  and M 4  contained in three transmission means  325 ,  326  and  327  function as resistors.  
         [0055]     By the resistance values of the transistors M 2 , M 3  and M 4  functioning as active resistors as described above, the external voltage Vdd and the internal voltage Vcore, the constant amount of current ‘i 2 ’ is provided to the sense amplification section  330 . In other words, current generated by the internal voltage Vcore and the resistance values of the transistor M 4  has the same value as that of the previous case in which the voltage level of the external voltage Vdd is equal to or lower than 2.0 V. Also, current generated by the external voltage Vdd and the resistance values of the two transistors M 2  and M 3  has the same value as that of the previous case in which the voltage level of the external voltage Vdd is equal to or lower than 2.0 V. When the voltage level of the external voltage Vdd increases, the number of transistors functioning as an active resistor decreases from three (M 2 , M 3  and M 4 ) to two (M 3  and M 4 ) Accordingly, although the voltage level of the external voltage Vdd changes, current generated by the external voltage Vdd and the resistance values of active resistors is kept uniform.  
         [0056]     When the voltage level of an external voltage Vdd is equal to or higher than 3.0 V, all of the first, second and third control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ outputted from the detection section  310  have low levels. These first, second and third control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’ are applied to the control means  321 ,  322  and  323  of the driving section  320 , respectively. The control means  321 ,  322  and  323  receive the fifth control signal ‘/ovd’ in addition to the control signals ‘en 1 ’, ‘en 2 ’ and ‘en 3 ’, and apply their output signals to the transmission means  324 ,  325  and  326 , respectively. Accordingly, all of the transmission means  324 ,  325  and  326  connected to the nodes for the external voltage Vdd are disenabled, and the transmission means  327  connected to the internal voltage Vcore is enabled by the fourth control signal ‘sap’. As a result, from among the transistors M 1 , M 2 , M 3  and M 4  contained in the transmission means  324 ,  325 ,  326  and  327  of the driving section  320 , only the transistor M 4  connected to the node for the internal voltage Vcore functions as a resistor. By the resistance value of the transistor M 4  functioning as an active resistor as described above and the internal voltage Vcore, the constant amount of current ‘i 2 ’ is provided to the sense amplification section  330 . That is, in a read operation of the semiconductor device, when the external voltage Vdd has a voltage level equal to or higher than a predetermined voltage level, the sense amplification section  330  is supplied with only the internal voltage Vcore, so that the sense amplification section  330  can efficiently sense and amplify data stored in the memory cell by using the internal voltage Vcore.  
         [0057]     According to the controller for driving current of the semiconductor device in accordance with the present invention, the detection section  310  detects the voltage level of the external voltage Vdd to output control signals ‘en’, and the magnitude of resistance of the driving section  220  to which the external voltage Vdd is applied is determined by the control signals ‘en’. Therefore, the driving section  220  can provide the constant amount of current ‘i 2 ’ to the load means  230  of the semiconductor device although the voltage level of the external voltage Vdd changes.  
         [0058]     As described above, according to the controller of the present invention, the voltage level of an external voltage applied to the semiconductor device is detected to generate a control signal. Also, a constant amount of current is provided to the load means of the semiconductor device by the generated control signal, so that it is possible to provide the constant amount of current to the load means although the voltage level of the external voltage changes. As a result, a malfunction of the semiconductor device can be prevented.  
         [0059]     Although a preferred embodiment of the present invention has been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.