Abstract:
Speed control of an induction motor is effected in digital fashion through use of a computer but without complex processing, and with a computer that need not be large in scale. This is accomplished by processing at least a speed command signal, actual speed signal and torque signal in analog fashion, enabling simplification of an induction motor speed control digital processing section which performs all other control operations in a digital manner. In a speed control network having a closed loop, a frequency-to-voltage converter, adder-subtractor, proportional integrator, polarity determining circuit absolute value circuit and voltage-to-frequency converter are constructed of circuitry operable on the basis of analog values, with all other circuits being constructed of circuitry operable on the basis of digital values.

Description:
FIELD OF THE INVENTION 
     This invention relates to an induction motor control system and, more particularly, to an induction motor control system for controlling an induction motor in digital fashion. 
     BACKGROUND OF THE INVENTION 
     Typical methods of induction motor control include V/F control for controlling the voltage-frequency ratio of the induction motor, and slip-frequency control for controlling the current and slip frequency of the induction motor. In both of these methods the control loop is composed of a circuit, such as a analog or digital circuit, which is capable of performing only a single function. It is therefore difficult to modify the system design and to execute a complicated control operation, and the system cost is high. 
     In recent years, inexpensive, multiple-function high-speed microcomputers have become readily available for use in controlling induction motors in digital fashion. Such digital control is advantageous in that it reduces system cost and makes it easier to execute complicated control operations and to modify the design. Nevertheless, the conventional digital control systems call for an expensive AD converter, a microcomputer having a large number of bits, and numerous, comparatively time-consuming multiplication process steps, in order to control the induction motor in a highly precise manner. The reason is as follows. 
     In slip-frequency control, the steps include deriving a difference, known as the slip speed, between a commanded speed and the actual motor speed, applying an error voltage, indicative of this difference, to a proportional integrating circuit for processing, and then controlling the induction motor in a predetermined manner using the output of the proportional integrating circuit. With the conventional systems, such slip-frequency control is performed digitally by subjecting an analog speed command voltage and an analog motor speed signal to an AD conversion to obtain the corresponding digital values, finding the difference between these two digital values by means of a digital operation, and then subjecting the resulting difference value to a proportional integration operation. If we assume that eight bits are necessary to express the difference value accurately, then at least 16 bits would be required to express the speed command and the actual motor speed since both of these quantities are much larger than the difference value. In other words, to express the difference value (slip speed) accurately, the conventional method calls for a large number of bits to express the commanded speed and motor speed, as well as for a highly accurate AD converter for converting the commanded speed and actual motor speed voltages into digital signals. Furthermore, the proportional integration operation which must be performed can be expressed as follows: 
     
         T=K.sub.1 (.sub.C -V)+K.sub.2 Σ(V.sub.c -V)          (1) 
    
     
         Σ(V.sub.c -V)=Σ(V.sub.c -V)+(V.sub.c -V)       (2) 
    
     where the commanded speed is V c , the actual motor speed is V, and the proportion constants are K 1 , K 2 . The foregoing operation cannot be executed at high speed with the processing capability of a microcomputer. 
     SUMMARY OF THE INVENTION 
     Accordingly, an object of the present invention is to provide a novel control system in which the control loop of an induction motor is simply constructed, but in which the advantages of digital control are preserved. 
     Another object of the present invention is to provide an induction motor control system which preserves the advantages of digital control but without requiring a costly AD converter, which permits the use of a microcomputer that need have a resolution of only eight bits, and which will not lower the processing capability of the microcomputer. 
     These and other objects and features of the present invention will be apparent from the following description taken in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram illustrating a preferred embodiment of the present invention; 
     FIG. 2 is an illustrative view useful in describing the data stored in a memory included in the block diagram of FIG. 1; 
     FIG. 3 is a waveform diagram useful in describing pulse width modulation; and 
     FIG. 4 is a block diagram of a three-phase induction motor drive circuit. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     Referring first to FIG. 1, numeral 11 denotes a three-phase induction motor. A pulse generator 12 is provided for generating first and second pulse trains P 1 , P 2 , displaced in phase from each other by π/2, each pulse train having a frequency f v  which is proportional to the rotational speed of the induction motor 11. The pulse trains P 1 , P 2  are applied to a quadrupling circuit 13 which differentiates the pulse trains to generate and to deliver on lines l 1 , l 2  pulse trains P n , P r  each having a frequency 4.f v , namely a frequency four times that of f v . The pulse train P n  is generated during forward rotation of the induction motor, and the pulse train P r  during reverse rotation of the induction motor. The quadrupling circuit 13 produces also a rotational direction signal RDS upon determining which of the pulse trains P 1 , P 2  leads in phase. A frequency-to-voltage (F/V) converter 14 receives whichever of the pulse trains P n , P r  is being generated and produces a voltage which is proportional to the frequency thereof, namely a voltage indicative of actual speed TSA, which is proportional to the rotational speed of the induction motor 11. An adder/subtractor 15 receives the actual speed signal TSA, as well as a speed command signal VCMD, and is adapted to produce an error signal ER indicative of the difference between VCMD and TSA, the signal ER representing the motor slip. The error signal ER is applied to a proportional integrating circuit 16 which subjects the signal to the operation expressed by Eqs. (1) and (2), thereby to produce an error signal ER&#39;. A polarity determining circuit 17 determines the polarity of the error signal ER&#39;. The error signal ER&#39; is applied also to an absolute value circuit 18 which takes the absolute value of the signal and delivers it to a voltage-to-frequency (V/F) converter 19 for producing a pulse train P e  whose frequency is proportional to the magnitude of ER&#39;. It should be noted that the F/V converter 14, adder/subtractor 15, proportional integrating circuit 16, polarity discriminating circuit 17 and absolute value circuit 18 constitute analog circuitry. 
     The pulse train P e  is applied to a programmable interval timer (PIT) 20. PIT 20 counts up the pulses in the pulse train P e  and is reset whenever its content is read by a processing unit which will be described later. The numerical value N e  held in the PIT 20 corresponds to a torque T. More specifically, a torque T can be represented as follows: ##EQU1## When s is small, T may be expressed thus: ##EQU2## The torque T therefore is proportional to the slip s or, in other words, is approximately proportional to the error ER. In Eq. (3), r 2  and x 2  represent the secondary resistance and the secondary reactance, respectively, of the induction motor, and E 2  represents the secondary voltage. 
     A PIT 21 is adapted to count up whichever of the pulse trains P n  or P r  is being generated by the quadrupling circuit 13, the pulse train arriving through an exclusive-OR gate EOR, and is reset whenever its content is read by the aforementioned processing unit. The content N v  of PIT 21 is a value corresponding to the motor speed. 
     Numeral 22 denotes a microprocessor which includes the aforementioned processing unit, indicated at numeral 22a, a control program memory 22b, and a data memory 22c for storing a variety of characteristics and data. Specifically, the data memory 22c digitally stores, as function tables, the characteristics illustrated in FIG. 2, namely a torque vs. amplitude characteristic (T-I characteristic), a torque vs. phase difference characteristic (T-φ characteristic), a rotational speed vs. slip characteristic (V-S characteristic), and a rotational angle vs. sinusoidal value characteristic (sine pattern). As for the T-φ characteristic, the phase difference may be expressed as follows: ##EQU3## where r 2  is the resistance of the secondary winding, x 2  is the reactance of the secondary winding when the induction motor is at rest, and s is the slip. When s is small, the characteristic is as shown in FIG. 2. In the T-I characteristic, the primary current I 1  is expressed: ##EQU4## where I o  is the excitation current, I 1  &#39; is the primary load current, α is the turn ratio, β is the phase ratio, and E 2  is the secondary induced electromotive force. When s is small, the characteristic is as shown in FIG. 2. As for the V-S characteristic or slip pattern, the slip s is constant for a motor speed less than a base speed BS, and is inversely proportional to the motor speed for values greater than the base speed BS. 
     The control program memory 22b stores a control program which instructs the processing unit 22a to execute such operations as reading the torque T, speed V and a rotational angle θ described below, and controlling the slip frequency on the basis of T, V and θ, and on the basis of the function tables, etc. 
     A programmable interval time (PIT) 23 also receives the pulse train P e  from the V/F converter 19 and is operable to frequency-divide the pulse train P e . The PITs 21, 23, and processing unit 22a operate in the following manner. The processing unit 22a reads the content (motor speed) of PIT 21 at a fixed period and, using the V-S characteristic (slip pattern), derives a numerical value which corresponds to the motor speed, and which is preset in PIT 23. If we let the capacity of PIT 23 be M, and let the preset value be m, then PIT 23 will deliver a single slip pulse P s  each time the V/F converter generates (M-m)-number of pulses P e . Thus, PIT 23 divides the pulse train P e  by (M-m) to produce a slip pulse train P s . This adjusts the frequency of the slip pulse train P s  to the rate at which the pulses P n  or P r  are generated, the frequency of these pulses being proportional to the rotational speed of the motor. 
     Programmable interval timers are denoted also at numerals 24, 25. PITs 24, 25 cannot count reversibly, that is, they can count in only one direction. PIT 24 counts up the forward rotation pulse train P n  generated during forward rotation of the motor 11, as well as the slip pulse train P s . PIT 25 counts up the reverse rotation pulse train P r  generated during reverse rotation of the motor 11, as well as the slip pulse train P s . Assume that 256 of the pulses P n  or P r  are generated for one revolution of the motor 11, and assume that the capacity of the PITs 24, 25 is 256. Then, substracting the content θ B  of PIT 25 from the content θ A  of the PIT 24 will give a value θ (equal to θ A  -θ B ) indicative of the present angular position, or orientation, which takes into account the load angle due to slip. G 1  and G 2  designate AND gates, NOT a NOT gate, and OR 1 , OR 2  denotes OR gates. When the error ER&#39; is positive (indicated by a logical &#34;1&#34; level for the polarity signal PL from polarity determining circuit 17), AND gate G 1  opens to deliver the slip pulse train P s  solely to PIT 24. When the error ER&#39; is negative (polarity signal PL at logical &#34;0&#34;), AND gate G 2  opens to deliver the slip pulse train P s  solely to the PIT 25. Digital-to-analog (DA) converters are shown at numerals 26 through 29. The input to DA 26 is the primary current amplitude (a digital value) based on the T-I chracteristic, and its output is an analog signal i. The respective inputs to the DA converters 27, 28, 29 are three-phase sine waves (digital values) computed by the processing unit 22a, namely the sine waves: ##EQU5## as well as the primary current amplitude signal i from DA converter 26. The DA converters 27 through 29 convert the sine waves, in the form of digital values, into three-phase sine waves i u , i v , i w  which are analog signals of a predetermined amplitude. 
     The analog sine wave signals i u , i v , i w  are applied to an induction motor drive circuit 30. An oscillator 31 generates a sawtooth signal STS which is also applied to the induction motor drive circuit 30, the period of the sawtooth signal STS being the same as that of the signals I, I U , I V , I W  as they enter the respective DA converters 26 through 29. L denotes a current feedback line. 
     The induction motor drive circuit 30 has the construction shown in FIG. 4. It comprises a pulse width modulator PWM which includes comparators COM U , COM V , COM W , NOT gates NOT 1  through NOT 3  and drivers DV 1  through DV 6 , an inverter INV which includes six power transistors Q 1  through Q 6 , and six diodes D 1  through D 6 , and a three-phase full-wave rectifier FRF. Each of the comparators COM U , COM V , COM W  is adapted to compare the amplitude of the sawtooth signal STS with the amplitude of the respective three-phase AC signal i u , i v , i w , and to deliver logical &#34;1&#34; when the amplitude of the AC signal input is larger than the sawtooth signal, or logical &#34;0&#34; when the amplitude of the sawtooth signal is larger. Regarding the signal input i u , it will be seen that the output of comparator COM U  is a current command i uc  having the shape shown in FIG. 3. The other comparators will produce similar outputs i vc , i wc  which are not shown in FIG. 3. In other words, the comparators COM U , COM W , COM V  produce three-phase current commands i uc , i vc , i wc  pulse-width modulated in accordance with the amplitudes of i u , i v , i w . The NOT gates NOT 1  through NOT 3  and drivers DV 1  through DV 6  cooperate to convert the current commands i uc , i vc , i wc  into drive signals SQ 1  through SQ 6  for switching on and off the transistors Q 1  through Q 6  that constitute the inverter INV. 
     The operator of the present invention will now be described in detail. 
     Referring to FIG. 1, when an analog speed command VCMD is issued by speed command means (not shown), the induction motor 11 attempts to rotate forwardly or reversely in accordance with the value of the command. As the motor 11 rotates, the pulse generator 12 generates the first and second pulse trains P 1 , P 2  which are displaced in phase by π/2 from each other and which are proportional in frequency to the rotational speed of the motor 11. The quadrupling circuit 13, upon determining which of the pulse trains P 1 , P 2  leads the other, sends the rotational direction signal RDS out on bus line BSL, sends the forward rotation pulse train P n  out on line l 1  during forward rotation of the induction motor, and sends the reverse rotation pulse train P r  out on line l 2  during reverse rotation of the induction motor. Assume that the induction motor is rotating in the forward direction. The forward rotation pulse train P n  will then be applied to F/V converter 14 and to programmable interval timers 21, 24 where the pulses are counted up. 
     The F/V converter 14 produces an actual speed signal TSA of a voltage which is proportional to the induction motor speed. This signal is applied to the adder/subtractor circuit 15 which produces the error signal ER between the actual speed TSA and the commanded speed VCMD which arrives from the speed command means. The error signal ER is an analog quantity. The signal ER is proportionally integrated by the proportional integrating circuit 16 for conversion into the error signal ER&#39; which is then applied to the polarity determining circuit 17 and to the absolute value circuit 18. The polarity determining circuit 17 senses the polarity of the error signal ER&#39; and delivers the polarity signal PL on bus line BSL. The absolute value circuit 18, mean while the absolute value of signal ER&#39; and delivers this value to the V/F converter 19 which is adapted to produce the pulse train P e  of a frequency proportional to the absolute value of ER&#39;. Pulse train P e  is counted up by the programmable interval timer (PIT) 20, the counted value N e  being a numerical value which corresponds to the torque T mentioned above. The processing unit 22a reads this value periodically, that is, at predetermined fixed intervals. 
     The counted value N v  in PIT 21 corresponds to the rotational speed of the induction motor 11 and is read periodically in the same manner as the content (torque T) of PIT 20 by means of the processing unit 22a, PIT 21 being reset whenever its content is read. Whenever the processing unit 22a reads the content (rotational speed) of PIT 21, it responds to the control program to obtain, from the function table of the V-S characteristic (slip pattern), the value m which corresponds to the rotational speed, the processing unit presetting this value in the PIT 23. The PIT 23 receives also the pulse train P e  from V/F converter 19 and divides the pulse train by (M-m) as described above, thereby converting it into the pulse train P s  indicative of motor slip. Since the polarity signal PL is a &#34;1&#34; the slip pulse train P s  passes through AND gate G 1  and OR gate OR 1  to be counted up by the PIT 24. It should be noted that PIT 24 counts the forward rotation pulses P n   as well, as the slip pulses P s , so that its content θ A  represents the total forward rotation angle of the motor. Similarly, the content θ B  of programmable interval timer 25 represents the total reverse rotation angle of the motor. Processing unit 22a reads θ A , θ B  at fixed periods and performs the operation θ=θ A  -θ B  each time it does so. The quantity θ is the present angular position of the motor. 
     When the foregoing has been accomplished, the processing unit 22a, under the control of the control program, obtains the three-phase sine waves I U , I V , I W  expressed by Eqs. (6), (7), (8), as well as the primary current amplitude I, using the T-φ characteristic, T-I characteristic and sine pattern stored in the data memory 22c as well as the computed rotation angle θ and the torque T. The processing unit 22a delivers these values I U , I V , I W  and I to the DA converters 26, 27, 28, 29, respectively, the DA converters thereby producing the three-phase analog sine waves i u , i v , i w  of a predetermined amplitude. These sine waves are applied to the induction motor drive circuit 30 which employs them to drive the induction motor 11. Repeating the foregoing operation brings the rotational speed TSA of the induction motor 11 into agreement with the commanded speed. 
     The present invention as described above offers the full advantages of a digital control system and, at the same time, uses an analog method to generate the error signal ER and to perform the proportional integration operation, so that high resolution can be achieved with a microcomputer having only a small number of bits. In addition, this feature of the invention lightens the load of the processing unit. 
     As many apparently widely different embodiments of the present invention can be made without departing from the spirit and scope thereof, it is tobe understood that the invention is not limited to the specific embodiments thereof except as defined in the appended claims.