Abstract:
A bi-directional buffer is provided. The buffer includes a driver, a receiver, and a circuitry configured to select a driving mode in response to detecting a first condition and to select a receiving mode in response to detecting a second condition. The driving mode has a first impedance and the receiving mode has a second impedance. The second impedance is partially contributed from the driver.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
   This application is a continuation application of pending U.S. patent application Ser. No. 11/529,893, filed on Sep. 29, 2006 and entitled “HIGH SPEED IO BUFFER”. 

   BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   This invention relates generally to communication systems. More particularly, this invention is related to transceivers in communication systems. 
   2. Description of the Prior Art 
   For a high-speed IO buffer, there are I-V curve (or impedance) characteristic requirements for both a driving mode and a receiving mode.  FIG. 1  shows a conventional IO buffer  100 . The IO buffer  100  includes a driver  102  and a receiver  104 . A control unit  112  is used to assert or negate transistor Q 1 , Q 2 , Q 3 , and Q 4  in response to the Data and OE signals. 
   In the driving mode, OE (data output enable) is asserted. Transistors Q 3  and Q 4  are off. When a logic state 1 (Data) is to be outputted though node  106 , transistor Q 1  is on and transistor Q 2  is turned off to pull high the node  106 . When a logic state 0 (Data) is to be outputted through node  106 , transistor Q 1  is turned off and Q 2  is turned on to pull low the node  106 . In the receiving mode, OE (data output enable) is negated. Both transistors Q 1  and Q 2  are off and transistors Q 3  and Q 4  are turned on. 
     FIG. 2A  shows an I-V diagram of transistor Q 2  for a driving mode.  FIG. 2B  shows an I-V diagram of transistor Q 1  for a driving mode. There may be different requirements for different applications. For example, in a driving mode for a specific application, the I-V curve  202  of transistor Q 2  is required to be designed between a maximum curve  205  and a minimum curve  206 . Similarly, the I-V curve  204  of transistor Q 1  is required to be designed between a maximum curve  207  and a minimum curve  208 . 
     FIG. 2C  shows an I-V diagram of transistor Q 3  for a receiving mode.  FIG. 2D  shows an I-V diagram of transistor Q 4  for a receiving mode. For the receiving mode, the impedance of the receiver  104  is required to match that of the transmission line  114  coupled to node  106 . The I-V curve  211  of transistor Q 3  is required to be linear and between a maximum curve  210  and minimum curve  212 . The I-V curve  214  of transistor Q 4  is required to be linear and between a maximum curve  214  and minimum curve  216 . 
   Because the driving mode and the receiving mode have different requirements, they are conventionally designed separately in an IO buffer. The area is thus larger and the IO buffer is less flexible for different applications where different impedance and linearity (constant impedance) requirements are needed. Therefore, there is a need for a new IO buffer that can reduce area and increase flexibility. 
   SUMMARY OF THE INVENTION 
   To solve the aforementioned problem, this invention provides an IO buffer for driving and receiving operations. The driver and the receiver in the IO buffer share their impedance in both the driving mode and the receiving mode. Because the circuitries in both the driver and the receiver are efficiently used and shared, the area of the IO buffer is decreased compared with prior arts. 
   One preferred embodiment according to this invention is a bi-directional buffer. The bi-directional buffer includes a driver, a receiver, and a circuitry configured to select a driving mode in response to detecting a first condition and to select a receiving mode in response to detecting a second condition. The driving mode has a first impedance and the receiving mode has a second impedance. The second impedance is partially contributed from the driver. 
   The advantage and spirit of the invention may be understood by the following recitations together with the appended drawings. 

   
     BRIEF DESCRIPTION OF THE APPENDED DRAWINGS 
       FIG. 1  shows a conventional IO buffer. 
       FIG. 2A  and  FIG. 2B  respectively show an I-V diagram of transistors Q 1  and Q 2  for a driving mode. 
       FIG. 2C  and  FIG. 2D  respectively show an I-V diagram of transistors Q 3  and Q 4  for a receiving mode. 
       FIG. 3  shows an IO buffer according to one embodiment of this invention. 
       FIG. 4  and  FIG. 5  show examples for the driving mode. 
       FIG. 6 ,  FIG. 7 , and  FIG. 8  show examples for the receiving mode. 
       FIGS. 9A and 9B  show examples of switches and resistive elements. 
       FIG. 10  shows an example of applying different types of configurations in the IO buffer  300 . 
   

   DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 3  shows an IO buffer according to one embodiment of this invention. The IO buffer  300  includes a driver and a receiver. The driver includes base portions  304 P,  304 N and programmable portions  306 P,  306 N. The base portion  304 P includes a plurality of switch elements (S TX     —     b     —     P     —     1 , S TX     —     b     —     P     —     2 , . . . , S TX     —     b     —     P     —     n ) and resistive elements (R TX     —     b     —     P     —     1 , R TX     —     b     —     P     —     2 , . . . , R TX     —     b     —     P     —     n ). The base portion  304 N includes a plurality of switch elements (S TX     —     b     —     N     —     1 , S TX     —     b     —     N     —     2 , . . . , S TX     —     b     —     N     —     n ) and resistive elements (R TX     —     b     —     N     —     1 , R TX     —     b     —     N     —     2 , . . . , R TX     —     b     —     N     —     n ). The switch elements can be MOS transistors and the resistive elements can be resistors. However, other components that can serve as switches and resistive elements can be used. The programmable portion  306 P includes a plurality of switch elements (S TX     —     p     —     P     —     1 , S TX     —     p     —     P     —     2 , . . . , S TX     —     p     —     P     —     m ) and resistive elements (R TX     —     p     —     P     —     1 , R TX     —     p     —     P     —     2 , . . . , R TX     —     p     —     P     —     m ). The programmable portion  306 N includes a plurality of switch elements (S TX     —     p     —     N     —     1 , S TX     —     p     —     N     —     2 , . . . , S TX     —     p     —     N     —     m ) and resistive elements (R TX     —     p     —     N     —     1 , R TX     —     p     —     N     —     2 , . . . , R TX     —     p     —     N     —     m ). 
   Similarly, the receiver includes base portions  310 P,  310 N and programmable portions  312 P,  312 N. The base portion  310 P includes a plurality of switch elements (S RX     —     b     —     P     —     1 , S RX     —     b     —     P     —     2 , . . . , S RX     —     b     —     P     —     n ) and resistive elements (R RX     —     b     —     P     —     1 , R RX     —     b     —     P     —     2 , . . . , R RX     —     b     —     P     —     n ). The base portion  310 N includes a plurality of switch elements (S RX     —     b     —     N     —     1 , S RX     —     b     —     N     —     2 , . . . , S RX     —     b     —     N     —     n ) and resistive elements (R RX     —     b     —     N     —     1 , R RX     —     b     —     N     —     2 , . . . , R RX     —     b     —     N     —     n ). The switch elements can be MOS transistors and the resistive elements can be resistors. However, other components that can serve as switches and resistive elements can be used. The programmable portion  312 P includes a plurality of switch elements (S RX     —     p     —     P     —     1 , S RX     —     p     —     P     —     2 , . . . , S RX     —     p     —     P     —     m ) and resistive elements (R RX     —     p     —     P     —     1 , R RX     —     p     —     P     —     2 , . . . , R RX     —     p     —     P     —     m ). The programmable portion  312 N includes a plurality of switch elements (S RX     —     p     —     N     —     1 , S RX     —     p     —     N     —     2 , . . . , S RX     —     p     —     N     —     m ) and resistive elements (R RX     —     p     —     N     —     1 , R RX     —     p     —     N     —     2 , . . . , R RX     —     p     —     N     —     m ). 
   Taking branch A as an example, the branch A comprises S TX     —     b     —     P     —     1 , R TX     —     b     —     P     —     1 , R TX     —     b     —     N     —     1 , and S TX     —     b     —     N     —     1  connected serially from VDD to GND. The control unit  302  controls the operation of S TX     —     b     —     P     —     1  and S TX     —     b     —     N     —     1  and determines the equivalent impedance of the branch A. If S TX     —     b     —     P     —     1  is turned on and S TX     —     b     —     N     —     1  is turned off, the equivalent impedance of the branch A would be (R (S TX     —     b     —     P     —     1 )+R TX     —     b     —     P     —     1 ), where R (S TX     —     b     —     P     —     1 ) denotes the equivalent impedance of S TX     —     b     —     P     —     1  when S TX     —     b     —     P     —     1  is turned on. If S TX     —     b     —     P     —     1  is turned off and S TX     —     b     —     N     —     1  is turned on, the equivalent impedance of the branch A would be (R (S TX     —     b     —     N     —     1 )+R TX     —     b     —     N     —     1 ), where R (S TX     —     b     —     N     —     1 ) denotes the equivalent impedance of S TX     —     b     —     N     —     1  when S TX     —     b     —     N     —     1  is turned on. If both S TX     —     b     —     P     —     1  and S TX     —     b     —     N     —     1  are turned on, the equivalent impedance of the branch A would be (R (S TX     —     b     —     P     —     1 )+R TX     —     b     —     P     —     1 )∥(R (S TX     —     b     —     N     —     1 )+R TX     —     b     —     N     —     1 ). The operations of other branches are similar. 
   Table 1 illustrates the control of the IO buffer  300  in different modes according to one embodiment of this invention. In the driving mode (Tx mode) for driving H, Data and OE are at a logic 1 state (H). All switches in the base portion  304 P are turned on (en) and all switches in the base portion  304 N are turned off (dis). The switches in the programmable portion  306 P are programmable. That is, a designer can select any suitable combination of switches of  306 P to be turned on. Switches in the programmable portion  306 N are all turned off because there is no need to pull low the output signal. Switches in the base portion  310 P are all turned on to help to pull high the output signal. Switches in the base portion  310 N are all turned off because they are not needed. Switches in the programmable portion  312 P are programmable. Switches in the programmable portion  312 N are turned off because they are not needed. In this case, the resulting impedance is R 304P ∥R 306P&lt;programmable&gt; ∥R 310P ∥R 312P&lt;programmable&gt; . 
   In the driving mode (Tx mode) for driving L, when Data is at a logic 0 (L) state and OE is at a logic 1 state (H), switches in the base portion  304 P are turned off and those in the base portion  304 N are turned on to pull low the output signal. Switches in the programmable portion  306 N are programmable and those in the programmable portion  306 P are turned off. Switches in the base portion  310 P are turned off and those in the base portion  310 N are turned on. Switches in the programmable portion  312 P are turned off and those in the programmable portion  312 N are programmable. In this case, the resulting impedance is R 304N ∥R 306N&lt;programmable&gt; ∥R 310N ∥R 312N&lt;programmable&gt; . 
   In the receiving mode (Rx mode) with termination enabled, when Data is at a “don&#39;t care” (X) state, OE is at a logic 0 state (L) and TE (termination enable) is at a logic 1 state (H), switches in the base portion  304 P and  304 N are turned off. Switches in the programmable portion  306 P and  306 N are programmable. Switches in the base portion  310 P and  310 N are turned on. Switches in the programmable portion  312 P and  312 N are programmable. In this case, the resulting impedance is R 306P&lt;programmable&gt; ∥R 306N&lt;programmable&gt; ∥R 310P ∥R 310N ∥R 312P&lt;programmable&gt; ∥R 312N&lt;programmable&gt; . 
   It is noted that the driver and the receiver share their impedance in both the driving mode and the receiving mode. That is, in the driving mode, in addition to the base portions ( 304 P,  304 N) and the programmable portions ( 306 P,  306 N) of the driver, the base and programmable portions ( 310 P,  310 N,  312 P, and  312 N) of the receiver are also utilized to form a suitable impedance character. In the receiving mode when termination is enabled (TE=H), in addition to the base portion ( 310 P,  310 N) and the programmable portion ( 312 P,  312 N) of the receiver (terminator), the programmable portions ( 306 P and  306 N) of the driver are utilized to form a suitable impedance character. Because the circuitries in both the driver and the receiver are efficiently used and shared, the area of the IO buffer  300  is decreased. 
   In a High Z mode, Data is at a “don&#39;t care (X)” state, OE is at a logic 0 state (L) and TE is at a logic 0 state (H). In this case, all portions ( 304 P,  304 N,  306 P,  306 N,  310 P,  310 N,  312 P,  312 N) are disabled (turned off). The output of the IO buffer is at a high impedance state (High Z). 
   It is also noted that because the driver and the receiver have similar structure (a switch serially connected to a resistive element), they can be easily shared without affecting the impedance characteristic. Conventional driver structure does not include a resistive element connecting to a switch, so it is difficult to share circuit. In other words, conventional drivers are different from receivers in structure, so they cannot be easily shared at the receiving mode when constant impedance (linearity in I-V curve) is required. Sharing circuits between different structures in the receiving mode may seriously affect the constant impedance characteristic (linearity of an I-V curve). Another advantage of the structure (a switch serially connected to a resistive element) is that it can result in a linear I-V curve (Id versus Vds). That is, a constant impedance is formed regardless of Vds and Id if a MOS is used as the switch. The constant impedance can avoid transmission line impedance mismatch effects. 
     FIG. 4  shows an example for the driving mode. In this case, Data is at a logic 1 state (H) and OE is at a logic 1 state (H). A logic 1 state (H) is to be outputted at node  314 . The control unit  302  controls the base portions  304 P,  304 N, the programmable portions  306 P,  306 N, the base portions  310 P,  310 N, and the programmable portions  312 P,  312 N. The switches in the base portions  304 P,  310 P, and the programmable portions  306 P,  312 P are all turned on to pull high the node  314 . The switches in the base portions  304 N,  310 N, and the programmable portions  306 N,  312 N are all turned off. It is noted that in this case the base portion  310 P and programmable portion  312 P of the receiver contribute to the impedance characteristic and the driving capability of the IO buffer  300 . By sharing the base portion  310 P and programmable portion  312 P, the area needed for the base portion  304 P and programmable portion  306 P is reduced. 
     FIG. 5  shows another example for the driving mode. In this case, Data is at a logic 0 state (L) and OE is at a logic 1 state (H). A logic 0 state (L) is to be outputted at node  314 . The control unit  302  controls the base portions  304 P,  304 N, the programmable portions  306 P,  306 N, the base portions  310 P,  310 N, and the programmable portions  312 P,  312 N. The switches in the base portions  304 N,  310 N, and the programmable portions  306 N,  312 N are all turned on to pull low the node  314 . The switches in the base portions  304 P,  310 P, and the programmable portions  306 P,  312 P are all turned off. It is noted that in this case the base portion  310 N and programmable portion  312 N of the receiver contribute to the impedance characteristic and the driving capability of the IO buffer  300 . By sharing the base portion  310 N and programmable portion  312 N, the area needed for the base portion  304 N and programmable portion  306 N is reduced. 
     FIG. 6  shows an example for the receiving mode. In this case, OE is at a logic 0 state (L). A logic state (H or L) is to be inputted from node  314 . The control unit  302  controls the base portions  304 P,  304 N, the programmable portions  306 P,  306 N, the base portions  310 P,  310 N, and the programmable portions  312 P,  312 N. The switches in the base portions  310 P,  310 N, and the programmable portions  312 P,  312 N are all turned on. The switches in the base portions  304 P,  304 N are all turned off. The switches in the programmable portions  306 P,  306 N are partially turned on (the shaded area). However, in other embodiments, portions  312 P,  312 N need not be all turned on because they are programmable. The portions  304 P and  304 N need not be turned off because they can be selected to be turned on if required. The portions  310 P and  310 N need not be turned on because they can be selected to be turned off if required. It is noted that in this case the programmable portions  306 P and  306 N of the driver contribute to the impedance characteristic of the IO buffer  300  in the receiving mode. By sharing the shaded programmable portions  306 P and  306 N, the area needed for the programmable portions  312 P and  312 N is reduced. 
     FIG. 7  shows another example for the receiving mode. In this case, OE is at a logic 0 state (L). A logic state (H or L) is to be inputted from node  314 . The control unit  302  controls the base portions  304 P,  304 N, the programmable portions  306 P,  306 N, the base portions  310 P,  310 N, and the programmable portions  312 P,  312 N. The switches in the base portions  310 P,  310 N, and the programmable portions  312 P,  312 N are all turned on. The switches in the base portions  304 P,  304 N are all turned off. The switches in the programmable portions  306 P,  306 N are partially turned on (the shaded area). However, in other embodiments, portions  312 P,  312 N need not be all turned on because they are programmable. The portions  304 P and  304 N need not be turned off because they can be selected to be turned on if required. The portions  310 P and  310 N need not be turned on because they can be selected to be turned off if required. It is noted that in this case the programmable portions  306 P and  306 N of the driver contribute to the impedance characteristic of the IO buffer  300  in the receiving mode. By sharing the shaded programmable portions  306 P and  306 N, the area needed for the programmable portions  312 P and  312 N is reduced. 
     FIG. 8  shows still another embodiment of the IO buffer  300  in a receiving mode. The portion  304 P is selected to be turned on and the portion  304 N is turned off. Part of the portion  306 N is selected to be turned and the portion  306 P is turned off. The portions  310 P and  310 N are selected to be turned on and part of the portions  312 P and  312 N are turned on. As long as impedance sharing can be achieved, any combination of these portions is acceptable. 
     FIGS. 9A and 9B  show examples of switches and resistive elements. Both configuration (1) (single MOS transistor) and configuration (2) (double MOS transistors) can be used as switches and resistive elements mentioned in  FIG. 3 . However, the same configuration of switches and resistive elements is recommended to be used in portions with similar function. For example, the base portion  304 P and the programmable portion  306 P had better use the same configuration of switches and resistive elements. The base portion  304 N and the programmable portion  306 N had better use the same configuration of switches and resistive elements. The base portion  310 P and programmable portion  312 P had better use the same configuration of switches and resistive elements. The base portion  310 N and the programmable portion  312 N had better use the same configuration of switches and resistive elements. 
   However, different types of configurations of pull-up or pull-down resistors can be selected in different portions if their combination will not affect the impedance sharing function.  FIG. 10  shows an example of applying different types of configurations in the IO buffer  300 . No resistive element is used in the portion  304 P and only MOS switches are used. In the receiving mode for example, the portions  306 P,  306 N,  310 P,  310 N,  312 P, and  312 N are programmable to achieve the impedance sharing function. The portions  304 P and  304 N are not used in the receiving mode because they don&#39;t have resistive elements. Therefore, the impedance of the portions  304 P and  304 N are not shared in the receiving mode. 
   With the example and explanations above, the features and spirits of the invention will be hopefully well described. Those skilled in the art will readily observe that numerous modifications and alterations of the device may be made while retaining the teaching of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims. 
   
     
       
             
             
             
             
             
             
             
             
             
             
             
             
           
             
             
             
             
             
             
             
             
             
             
             
             
           
         
             
                 
               TABLE 1 
             
             
                 
                 
             
             
                 
               Data 
               OE 
               TE 
               304P 
               304N 
               306P 
               306N 
               310P 
               310N 
               312P 
               312N 
             
             
                 
                 
             
           
           
             
                 
             
           
        
         
             
               TX mode 
               H 
               H 
               x 
               En 
               Dis 
               Pro 
               Dis 
               En 
               Dis 
               Pro 
               Dis 
             
             
                 
               L 
               H 
               x 
               Dis 
               En 
               Dis 
               Pro 
               Dis 
               En 
               Dis 
               Pro 
             
             
               RX mode 
               x 
               L 
               H 
               Dis 
               Dis 
               Pro 
               Pro 
               En 
               En 
               Pro 
               Pro 
             
             
               High-Z mode 
               x 
               L 
               L 
               Dis 
               Dis 
               Dis 
               Dis 
               Dis 
               Dis 
               Dis 
               Dis