Abstract:
A package combining a MEMS substrate, a CMOS substrate and another MEMS substrate in one package that is vertically stacked is disclosed. The package comprises a sensor chip further comprising a first MEMS substrate and a CMOS substrate with a first surface and a second surface and where the first MEMS substrate is attached to the first surface of the CMOS substrate. The package further includes a second MEMS substrate with a first surface and a second surface, where the first surface of the second MEMS substrate is attached to the second surface of the CMOS substrate and the second surface of the second MEMS substrate is attached to a packaging substrate. The first MEMS substrate, the CMOS substrate, the second MEMS substrate and the packaging substrate are provided with electrical inter-connects.

Description:
FIELD OF THE INVENTION 
       [0001]    The present invention relates generally to micro-electro-mechanical systems (MEMS) devices, and more particularly to the package containing MEMS substrate integrated with a CMOS substrate. 
       BACKGROUND OF THE INVENTION 
       [0002]    As more and more applications reside on MEMS it will be useful to have two different MEMS for different MEMS processes connected to a CMOS to provide electronic circuits. This is particularly useful where the two different MEMS processes may require different environments to function efficiently. For example, pressure sensors, chemical sensors, sound sensors and the like may need access to the ambient environment; as opposed to accelerometers and gyroscopes, which need hermetically sealed chambers since they require specific pressure for optimal performance. Combining a MEMS, a CMOS and another MEMS in one package that is vertically stacked results in a smaller package with reduced requirements for board area or “real estate.” 
         [0003]    Controlling stress in the MEMS is another issue that needs to be addressed. Stress/strain in the substrate on which a sensor is mounted or integrated causes the performance of the sensor to change. 
         [0004]    Accordingly, it is desired to have a device that addresses the requirements of two different MEMS for different MEMS processes in a single package as well as stress isolation. The present invention addresses such a need. 
       SUMMARY 
       [0005]    A package combining a MEMS substrate, a CMOS substrate and another MEMS substrate in one package that is vertically stacked is disclosed. The package comprises a sensor chip further comprising a first MEMS substrate, a CMOS substrate, and a second MEMS substrate. The CMOS substrate has a first surface and a second surface, where the first MEMS substrate is attached to the first surface of the CMOS substrate. The second MEMS substrate has a first surface and a second surface, where the first surface of the second MEMS substrate is attached to the second surface of the CMOS substrate and the second surface of the second MEMS substrate is attached to a packaging substrate. The first MEMS substrate, the CMOS substrate, the second MEMS substrate and the packaging substrate are connected with electrical interconnects. 
         [0006]    In another embodiment, a MEMS-CMOS package is disclosed. The package comprises a CMOS substrate and a MEMS substrate. The CMOS substrate has a first surface and a second surface, where the first surface of the CMOS substrate is mechanically connected to a packaging substrate and the second surface of the CMOS substrate is mechanically connected to the MEMS substrate. The MEMS substrate, the CMOS substrate and the packaging substrate are provided with electrical interconnects. The CMOS substrate further comprises at least one recess on the side attached to the packaging substrate. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]      FIG. 1  illustrates a MEMS-CMOS package showing a stress-relieving recess according to an embodiment. 
           [0008]      FIG. 2  illustrates a MEMS-CMOS-MEMS package with a MEMS interposer between a CMOS substrate and a packaging substrate in accordance with an embodiment. 
           [0009]      FIG. 3 a    illustrates a second MEMS-CMOS-MEMS package in accordance with an embodiment. 
           [0010]      FIG. 3 b    illustrates a top view of the second MEMS-CMOS-MEMS package in accordance with an embodiment. 
           [0011]      FIG. 4 a    illustrates a third MEMS-CMOS-MEMS package in accordance with an embodiment. 
           [0012]      FIG. 4 b    illustrates a top view of the third MEMS-CMOS-MEMS package in accordance with the third embodiment. 
           [0013]      FIG. 5 a    illustrates a fourth MEMS-CMOS-MEMS package in accordance with an embodiment. 
           [0014]      FIG. 5 b    illustrates a fifth MEMS-CMOS-MEMS package in accordance with an embodiment. 
           [0015]      FIG. 6  illustrates a sixth MEMS-CMOS-MEMS package in accordance with an embodiment. 
           [0016]      FIG. 7  illustrates a seventh MEMS-CMOS-MEMS package in accordance with an embodiment. 
           [0017]      FIG. 8  illustrates a ninth MEMS-CMOS package  800  with a recesses  862  etched into the packaging substrate for stress-relieving purposes in accordance with an embodiment. 
       
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
       [0018]    The present invention relates generally to micro-electro-mechanical systems (MEMS) devices, and more particularly to a package containing one or more MEMS substrates integrated with a CMOS substrate. 
         [0019]    The following description is presented to enable one of ordinary skill in the art to make and use the invention and is provided in the context of a patent application and its requirements. Various modifications to the described embodiments and the generic principles and features described herein will be readily apparent to those skilled in the art. Thus, the present invention is not intended to be limited to the embodiments shown but is to be accorded the widest scope consistent with the principles and features described herein. 
         [0020]    In the described embodiments Micro-Electro-Mechanical Systems (MEMS) refers to a class of structures or devices fabricated using semiconductor-like processes and exhibiting mechanical characteristics such as the ability to move or deform. MEMS often, but not always, interact with electrical signals. MEMS devices include but are not limited to gyroscopes, accelerometers, magnetometers, pressure sensors, microphones, and radio-frequency components. 
         [0021]    A MEMS substrate may be a MEMS wafer or a MEMS die. Silicon wafers containing MEMS structures are referred to as MEMS wafers. Similarly, a CMOS substrate may be a CMOS wafer or a CMOS die. It should be understood that the CMOS substrate may comprise complementary metal-oxide semiconductor circuits or other types of circuits. 
         [0022]    In the described embodiments, ‘MEMS device’ may refer to a semiconductor device implemented as a micro-electro-mechanical system. ‘MEMS structure’ may refer to any feature that may be part of a larger MEMS device. ‘Engineered silicon-on-insulator (ESOI) substrate’ may refer to a SOI substrate with cavities beneath the silicon device layer or substrate. ‘Handle substrate’ typically refers to a thicker substrate used as a carrier for the thinner silicon device substrate in a silicon-on-insulator substrate. ‘Handle substrate’ can be a handle wafer or a handle die and may also be referred to as a MEMS cover. 
         [0023]    In the described embodiments, ‘cavity’ may refer to an opening or recess in a substrate wafer, and ‘enclosure’ may refer to a fully enclosed space. ‘Bond chamber’ may be an enclosure in a piece of bonding equipment where the wafer bonding process takes place. The atmosphere in the bond chamber determines the atmosphere sealed in the bonded wafers. 
         [0024]    As more and more applications reside on MEMS it will be useful to have different MEMS devices for different MEMS processes connected to a single CMOS to provide electronic circuits. This is particularly useful where the different MEMS devices may require different environments to function efficiently. For example, pressure sensors, chemical sensors, acoustic sensors and the like may need access to the ambient environment, as opposed to accelerometers and gyroscopes that need hermetically sealed chambers since they require specific pressures and clean environments for optimal performance. Providing the ability to combine a MEMS substrate, a CMOS substrate and another MEMS substrate in one package that is vertically stacked results in a smaller package with reduced requirements for the commodity of space or “real estate.” 
         [0025]    In an embodiment, a MEMS substrate and a CMOS substrate can be electrically connected to each other and to a packaging substrate using some combination of wire bonds, through-silicon vias, solder bonding, or eutectic bonding. (For eutectic bonding, refer to U.S. Pat. No. 7,104,129 “Vertically Integrated MEMS Structure with Electronics in a Hermetically Sealed Cavity”). Additionally, if the MEMS substrate requires an electrical contact to the back side, it can be achieved with an additional wire bond, internal contacts, or a wedge cut. In an embodiment, bond wires and bond pads provide the electrical connections from either substrate to the packaging substrate. A last layer of metal deposited in the conventional CMOS metallization process is a metal layer suitable for use as a bond metal. In another embodiment, the electrical connections can be formed using through-silicon vias in CMOS as well as in MEMS substrate. 
         [0026]    In an embodiment, a first MEMS substrate is mechanically connected to a CMOS die. The CMOS substrate is in turn mechanically connected to one side of a second MEMS substrate and a packaging substrate (package) is mechanically connected to the other side of the second MEMS substrate. Mechanical connections between the first MEMS substrate, CMOS substrate and second MEMS substrate can be provided by Si to SiO 2  fusion bonding, Si to Si fusion bonding, eutectic bonding, solder bonding or a low-stress adhesive material. The bond between a packaging substrate (package) and the second MEMS substrate can be hermetic, or it can be non-hermetic. The second MEMS substrate can be bonded to the packaging substrate using a low-stress adhesive material, such as die attach film (DAF), or Room-Temperature Vulcanizing (RTV) silicone elastomer which is commonly used for a pressure sensor. The packaging substrate may be a multi-layer packaging substrate such as a Land Grid Array (LGA). 
         [0027]    In an embodiment, a bonded device substrate would comprise a CMOS substrate with a conductive layer such as an aluminum or copper top metallization layer, eutectically bonded to first and second MEMS substrates on either side of the CMOS substrate. An additional conductive layer on the back side of the CMOS substrate allows for electrical connections between the CMOS substrate and the second MEMS substrate. At least one of the MEMS substrate may comprise a handle substrate with etched cavities coated by a thin silicon oxide layer and fusion bonded to a silicon device layer. The device layer may be patterned so as to define the desired moveable or stationary structure. 
         [0028]    In an embodiment, the conductive layer may comprise any electrically conductive metal or semiconductor. An opening is etched in the back of the CMOS substrate, stopping on one of the CMOS metallization layers. The CMOS metallization layer may be any one of the existing CMOS metallization layers. The sidewalls of the opening are then electrically passivated by depositing an insulating film (ex. silicon oxide, silicon nitride, polymer). Typically the insulating film will also be deposited on the bottom surface of the opening, covering the previously exposed CMOS metallization layer. The CMOS metallization layer is then once again exposed by an etching or saw dicing process such that the insulating film on the sidewalls of the opening is not removed. This etching or saw dicing process may expose the surface, edges, or both of the CMOS metallization layer. A conductive interconnection layer (typically a metal layer composed of Aluminum or Copper) is deposited onto the back surface of the CMOS substrate and into the passivated openings so as to create electrical contact to the CMOS metallization layer. The interconnection layer is then patterned so as to create individual isolated contacts. A polymer stress-relief layer can optionally be deposited on top of the interconnection layer to reduce stress on the silicon substrate caused by board-level assembly. The stress-relief layer is patterned so as to create vias to the interconnection layer. Then a conductive redistribution layer is deposited and patterned on top of the stress-relief layer. Finally, solder balls are defined on top of the redistribution layer to facilitate soldering the packaged substrate to a printed circuit board. Alternatively, one of the MEMS substrates can function as a stress-isolating platform (interposer) for the CMOS substrate and the first MEMS substrate. The sensitivity of MEMS to package stress is a matter of increasing concern, as packages become smaller and performance requirements more stringent. 
         [0029]    In one embodiment, the interposer has cavities etched into the surface contacting the packaging substrate, in order to reduce the contact area and stress transmitted from the packaging substrate. In another embodiment, the interposer has cavities etched into the surface contacting the CMOS substrate, in order to reduce the contact area and stress transmitted to the CMOS substrate. 
         [0030]    In yet another embodiment, a moving structure is formed in the interposer, and the CMOS is attached only to this moving structure. The moving structure can be a paddle, connected to the rest of the interposer at a single point, or a gimbal, connected to the rest of the interposer at two points. 
         [0031]      FIG. 1  illustrates a MEMS-CMOS package  100  with recesses  122  and  122 ′ etched into the CMOS substrate for stress-relieving purposes in accordance with an embodiment. The MEMS-CMOS package  100  contains a MEMS substrate  110  mechanically connected to a CMOS substrate  120 , where electrical connections between the CMOS substrate  120  and packaging substrate  160  are provided by wire bonds  190  and bond pads (not shown). Also shown are the recesses  122  and  122 ′ in the CMOS substrate  120  to provide stress isolation where CMOS pivots about two contact points. 
         [0032]      FIG. 2  illustrates a MEMS-CMOS-MEMS package  200  with a MEMS interposer  230  for stress relieving purpose in accordance with an embodiment. The MEMS-CMOS-MEMS package  200  contains a MEMS substrate  210  mechanically connected to a CMOS substrate  220  which in turn is mechanically connected to another MEMS substrate, a MEMS interposer  230 . The electrical connections are provided using a combination of wire bonds  290 , bond pads, Through-Silicon Vias (TSVs), solder bonding, or eutectic bonding. The MEMS interposer  230  has recesses  232  and  232 ′ between CMOS  220  and packaging substrate  260 . The MEMS interposer  230  functions as a stress-isolating platform (interposer) for the CMOS  220  and the first MEMS  210 . The MEMS interposer  230  can be a blank substrate providing stress relief or it can be patterned inactive silicon substrate. The MEMS interposer  230  in this embodiment has cavities or recesses  232  and  232 ′ etched into the surface contacting the CMOS substrate  220 , in order to reduce the contact area and stress transmitted to the CMOS substrate  220 . In another embodiment, the interposer  230  may have cavities or recesses  232  and  232 ′ etched into the surface contacting the packaging substrate  260 , in order to reduce the contact area and stress transmitted from the packaging substrate  260 . In another embodiment, the MEMS interposer  230  may contain CMOS circuits. 
         [0033]      FIG. 3 a    illustrates a second MEMS-CMOS-MEMS package in accordance with an embodiment. In this embodiment, a second MEMS die or interposer MEMS II  330  comprises a moving structure  336  and a handle die  334 . The CMOS die  320  is mechanically connected only to this moving structure  336  on one side and to another MEMS die, MEMS I  310  on the other side. The electrical connections are provided using a combination of wire bonds, TSVs, solder bonding, or eutectic bonding. The moving structure  336  as shown in this embodiment is a paddle, connected to the handle die  334  at a single point. 
         [0034]      FIG. 3 b    illustrates a top view of the third MEMS-CMOS package with a MEMS die between CMOS and packaging substrate in accordance with an embodiment. In this embodiment, MEMS II  330  comprises a moving structure  336  and a handle die  334 . The CMOS die  320  (not shown) is attached to this moving structure  336  on one side and to another MEMS die, MEMS I  310  on the other side, for example with an adhesive. The moving structure  336  as shown in this embodiment is a paddle, connected to the handle substrate  334  at a single point. 
         [0035]      FIG. 4 a    illustrates a fourth MEMS-CMOS-MEMS package in accordance with an embodiment. In this embodiment, a second MEMS die or interposer, MEMS II  430  comprises a moving structure  436  and a handle die  434 . The CMOS die  420  is mechanically connected only to this moving structure  436  on one side and to another MEMS die, MEMS I  410  on the other side. The electrical connections are provided using a combination of wire bonds, TSVs, solder bonding, or eutectic bonding. The moving structure  436  in this embodiment is a gimbal, connected to the handle die  434  at two points. 
         [0036]      FIG. 4 b    illustrates a top view of the fourth MEMS-CMOS package with a MEMS die between CMOS and packaging substrate in accordance with an embodiment. In this embodiment, MEMS II  430  comprises a moving structure  436  and a handle die  434 . The CMOS die  420  (not shown) is attached to this moving structure  436  on one side and to another MEMS die, MEMS I  410  on the other side, for example with an adhesive. The moving structure  436  in this embodiment is a gimbal, connected to the handle substrate  434  at two points A and A′. 
         [0037]      FIG. 5 a    illustrates a fifth MEMS-CMOS-MEMS package in accordance with an embodiment. The MEMS I  510 , CMOS  520  and MEMS II  530  are electrically connected to each other and to the packaging substrate  560 . In this embodiment as shown, the electrical connections are formed using through-silicon vias  528  in CMOS  520  and  538  in MEMS II  530 . In another embodiment, the electrical connections are formed using a combination of MEMS TSVs, CMOS TSVs and solder bonding or eutectic bonding. The last layer of metal deposited in the conventional CMOS metallization process is suitable for use as a bond metal. The MEMS I and MEMS II may each contain MEMS sensors, including but not limited to accelerometers, gyroscopes, etc. The cavity  532 , on the side of the MEMS II  530  facing the CMOS  520 ′, which may contain MEMS sensors, also provides stress isolation between the MEMS II  530  and the CMOS  520 . 
         [0038]      FIG. 5 b    illustrates a sixth MEMS-CMOS-MEMS package in accordance with an embodiment. In this embodiment, the MEMS  510 ′ and  530 ′ and CMOS  520 ′ are electrically connected to each other and to the packaging substrate  560 ′. The MEMS I and MEMS II may each contain MEMS sensors, including but not limited to accelerometers, gyroscopes, etc. In this embodiment as shown, the electrical connections are formed using a combination of wire bonds  590 ′ and bond pads (not shown), solder bonding, or eutectic bonding. In an alternate embodiment, a combination of wire bonds, TSVs, solder bonding or eutectic bonding may be used. The last layer of metal deposited in the conventional CMOS metallization process is suitable for use as a bond metal. The cavity  532 ′, on the side of the MEMS II  530 ′ facing the CMOS  520 ′, which may contain MEMS sensors, also provides stress isolation between the MEMS II  530 ′ and the CMOS  520 ′. 
         [0039]      FIG. 6  illustrates a seventh MEMS-CMOS-MEMS package in accordance with an embodiment. MEMS I  610 , CMOS  620  and MEMS II  630  are electrically connected to each other and to the packaging substrate. In this embodiment as shown, the electrical connections are formed using TSVs  628  in CMOS  620 , TSVs  638  in MEMS II  630 , and electrical connection  648 . In an alternate embodiment, the electrical connection may be formed using a combination of solder bonding, eutectic bonding, or wire bonds. The second MEMS, MEMS II  630 , functions as a stress-isolating platform (interposer) for the CMOS  620  and the first MEMS, MEMS I  610 . The stress-isolating platform, MEMS II  630  is patterned so as to create vias  638  to provide electrical contact with the CMOS substrate. The interposer or MEMS II  630  has cavities  633  etched into the surface contacting the packaging substrate  660 , in order to reduce the contact area and stress transmitted from the packaging substrate  660 . In addition, the cavity  632 , on the side of the MEMS II  630  facing the CMOS  620 , which may contain MEMS sensors, also provides stress isolation between the MEMS II  630  and the CMOS  620 . 
         [0040]      FIG. 7  illustrates an eighth MEMS-CMOS-MEMS package in accordance with an embodiment using flip-chip technology. The MEMS I substrate  710  comprises a handle substrate or a MEMS cover  713  with etched cavities  715  connected to a silicon device layer  711 . The MEMS substrate  710  and the CMOS  720  are connected to each other. The MEMS-CMOS assembly thus formed is in turn connected to another MEMS, MEMS II  730  on a package  760 , for example, a printed circuit board (PCB), via solder bonds  761 . The solder balls  761  may, for example, be supported by underfill  762 . The electrical connections between MEMS I  710 , CMOS  720  and MEMS II  730  are formed using TSVs  728  in CMOS  720  as well as TSVs  738  in MEMS II  730 . 
         [0041]      FIG. 8  illustrates a ninth MEMS-CMOS package  800  with a recesses  862  etched into the packaging substrate for stress-relieving purposes in accordance with an embodiment. The MEMS-CMOS package  800  contains a MEMS substrate  810  mechanically connected to a CMOS substrate  120 , where electrical connections between the CMOS substrate  820  and packaging substrate  860  are provided by wire bonds  890  and bond pads (not shown). Also shown is the recesses  862  in the CMOS substrate  820  to provide stress isolation where the CMOS pivots about two contact points. 
         [0042]    Although the present invention has been described in accordance with the embodiments shown, one of ordinary skill in the art will readily recognize that there could be variations to the embodiments and those variations would be within the spirit and scope of the present invention. Accordingly, many modifications may be made by one of ordinary skill in the art without departing from the spirit and scope of the present invention.