Abstract:
A semiconductor device includes a code generator configured to generate a supplementary code with a value changing in response to a variation of an impedance code, a main driver configured to receive an output data and drive the received output data to a data output pad, wherein a driving force of the main driver is controlled according to the impedance code, and an auxiliary driver configured to receive the output data and drive the received output data to the data output pad, wherein a driving force of the auxiliary driver is controlled according to the supplementary code.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    The present application claims priority of Korean Patent Application No. 10-2011-0097531, filed on Sep. 27, 2011, which is incorporated herein by reference in its entirety. 
       BACKGROUND 
       [0002]    1. Field 
         [0003]    Exemplary embodiments of the present invention relate to a semiconductor designing technology, and more particularly, to a semiconductor device including a data output circuit that supports a pre-emphasis operation. 
         [0004]    2. Description of the Related Art 
         [0005]      FIG. 1  is a block diagram illustrating a conventional data output circuit. 
         [0006]    Referring to  FIG. 1 , the conventional data output circuit includes a pull-up pre-main driver  110 , a pull-up main driver  120 , a pull-down pre-main driver  130 , and a pull-down main driver  140 . 
         [0007]    The pull-up pre-main driver  110  and the pull-down pre-main driver  130  invert and drive an output data OUT_DATA and output a pull-up driving data PU_PMDATA and a pull-down driving data PD_PMDATA. 
         [0008]    The pull-up main driver  120  drives a data output pad DQ with an external power source voltage VDD in a period where the pull-up driving data PU_PMDATA is in a logic low level. 
         [0009]    The pull-down main driver  140  drives the data output pad DQ with an external ground voltage VSS in a period where the pull-down driving data PD_PMDATA is in a logic high level. 
         [0010]    As described above, since the conventional data output circuit performs the operation of driving the data output pad DQ with the external power source voltage VDD or the external ground voltage VSS according to the logic level of the applied output data OUT_DATA, the actual voltage level of the data output pad DQ may vary significantly. 
       SUMMARY 
       [0011]    An embodiment of the present invention is directed to a semiconductor device including a data output circuit that supports a pre-emphasis operation that may vary the operation dividing force in response to a variation in process, voltage and temperature (PVT). 
         [0012]    In accordance with an embodiment of the present invention, a semiconductor device includes: a code generator configured to generate a supplementary code with a value changing in response to a variation of an impedance code; a main driver configured to receive an output data and drive the received output data to a data output pad, wherein a driving force of the main driver is controlled according to the impedance code; and an auxiliary driver configured to receive the output data and drive the received output data to the data output pad, wherein a driving force of the auxiliary driver is controlled according to the supplementary code. 
         [0013]    In accordance with another embodiment of the present invention, a semiconductor device includes: a code generator configured to generate a pull-up supplementary code and a pull-down supplementary code, wherein the pull-up supplementary code and the pull-down supplementary code change in response to a variation of a pull-up impedance code and a variation of a pull-down impedance code, respectively; a pull-up driver configured to receive an output data and pull-up drive a data output pad by using a plurality of main pull-up drivers and a plurality of auxiliary pull-up drivers; and a pull-down driver configured to receive the output data and pull-down drive the data output pad by using a plurality of main pull-down drivers and a plurality of auxiliary pull-down drivers, wherein the main pull-up drivers are controlled to be turned on/off in response to the pull-up impedance code and the auxiliary pull-up drivers are controlled to be turned on/off in response to the pull-up supplementary code, and the main pull-down drivers are controlled to be turned on/off in response to the pull-down impedance code, and the auxiliary pull-down drivers are controlled to be turned on/off in response to the pull-down supplementary code. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0014]      FIG. 1  is a block diagram illustrating a conventional data output circuit in support of a pre-emphasis operation. 
           [0015]      FIG. 2  is a block diagram illustrating a data output circuit in support of a pre-emphasis operation in accordance with a first embodiment of the present invention. 
           [0016]      FIG. 3  is a block diagram illustrating a data output circuit in support of a pre-emphasis operation in accordance with a second embodiment of the present invention. 
           [0017]      FIGS. 4A and 4B  are circuit diagrams illustrating a code generator in detail among the constituent elements of the data output circuit in support of a pre-emphasis operation shown in  FIG. 3  in accordance with the second embodiment of the present invention. 
           [0018]      FIGS. 5A and 5B  are circuit diagrams illustrating a plurality of auxiliary drivers in detail among the constituent elements of the data output circuit in support of a pre-emphasis operation shown in  FIG. 3  in accordance with the second embodiment of the present invention. 
           [0019]      FIGS. 6A and 6B  are a graph and a table describing the operation of the code generator among the constituent elements of the data output circuit in support of a pre-emphasis operation shown in  FIG. 3  in accordance with the second embodiment of the present invention. 
           [0020]      FIGS. 7A and 7B  are circuit diagrams illustrating a pull-up driving control signal generator and a pull-down driving control signal generator among the constituent elements of the data output circuit in support of a pre-emphasis operation shown in  FIG. 3  in accordance with the second embodiment of the present invention. 
           [0021]      FIGS. 8A to 8D  are timing diagrams describing the operation of the data output circuit in support of a pre-emphasis operation shown in  FIG. 3  in accordance with the second embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0022]    Exemplary embodiments of the present invention will be described below in more detail with reference to the accompanying drawings. The present invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. Throughout the disclosure, like reference numerals refer to like parts throughout the various figures and embodiments of the present invention. 
       First Embodiment 
       [0023]      FIG. 2  is a block diagram illustrating a data output circuit in support of a pre-emphasis operation in accordance with a first embodiment of the present invention. 
         [0024]    Referring to  FIG. 2 , the data output circuit in support of a pre-emphasis operation in accordance with the first embodiment of the present invention includes a main driver  210 , an auxiliary driver  220 , a driving control signal generator  230 , and a code generator  240 . 
         [0025]    The main driver  210  receives an output data DATA and drives the output data DATA (P-DATA and N-DATA) to a data output pad DQ. Here, the driving force is controlled in response to an impedance code DR_CODE&lt; 0 : 2 &gt;. 
         [0026]    The impedance code DR_CODE&lt; 0 : 2 &gt; is generated in a calibration circuit disposed around a ZQ pad. For this reason, the value is controlled according to a change in process, voltage and temperature (PVT). 
         [0027]    For example, when the level of an external power source voltage VDD is increased, the value of the impedance code DR_CODE&lt; 0 : 2 &gt; may be controlled to be decreased. In this case, the main driver  210  operates in such a manner that the driving force is decreased in response to the increasing level of the external power source voltage VDD. As a result, the output data DATA may be driven to the data output pad DQ at a uniform driving force regardless of the change in the level of the external power source voltage VDD. 
         [0028]    The code generator  240  generates a pre-emphasis/supplementary code EM_CODE&lt; 0 : 1 &gt; whose value is controlled according to the variation of the impedance code DR_CODE&lt; 0 : 2 &gt;. 
         [0029]    Here, as described above, since the value of the impedance code DR_CODE&lt; 0 : 2 &gt; is controlled according to a change in the process, voltage and temperature (PVT), the pre-emphasis code EM_CODE&lt; 0 : 1 &gt;, too, whose value is controlled according to the variation of the impedance code DR_CODE&lt; 0 : 2 &gt; may have its value controlled according to the change in the process, voltage and temperature (PVT) as well. 
         [0030]    Of course, the way the values of the impedance code DR_CODE&lt; 0 : 2 &gt; and the pre-emphasis code EM_CODE&lt; 0 : 1 &gt; vary and the variation ranges of the impedance code DR_CODE&lt; 0 : 2 &gt; and the pre-emphasis code EM_CODE&lt; 0 : 1 &gt; may be set differently. For example, a method of decreasing or increasing the value of the pre-emphasis code EM_CODE&lt; 0 : 1 &gt; may be adopted in response to the increasing value of the impedance code DR_CODE&lt; 0 : 2 &gt;. Also, the pre-emphasis code EM_CODE&lt; 0 : 1 &gt; may be made to have a variation range that is 1/2 or 1/3 as wide as the variation range of the value of the impedance code DR_CODE&lt;0:2&gt;. 
         [0031]    The auxiliary driver  220  receives the output data DATA and drives the output data DATA to the data output pad DQ. Here, the driving force is controlled in response to the pre-emphasis code EM_CODE&lt; 0 : 1 &gt;. 
         [0032]    The value of the pre-emphasis code EM_CODE&lt; 0 : 1 &gt;, as described above, is controlled according to a change in the process, voltage and temperature (PVT). Thus, the driving force of the auxiliary driver  220  may be controlled according to the change in the process, voltage and temperature (PVT). 
         [0033]    For example, when the value of the impedance code DR_CODE&lt; 0 : 2 &gt; is controlled to be decreased according to the increasing level of the external power source voltage VDD, the value of the pre-emphasis code EM_CODE&lt; 0 : 1 &gt; may also be controlled to be decreased. In this case, the auxiliary driver  220  operates to have a decreasing driving force according to an increasing level of the external power source voltage VDD to reduce the strength of a pre-emphasis operation, or the auxiliary driver  220  operates to have an increasing driving force according to a decreasing level of the external power source voltage VDD to increase the strength of a pre-emphasis operation. 
         [0034]    The driving control signal generator  230  generates a driving control signal PE_DATA that is enabled for a time period in response to the logic level of the output data DATA transitioning from a logic high level to a logic low level or from a logic low level to a logic high level, and controls the operation of the auxiliary driver  220 . Here, since the logic level of the enabled driving control signal PE_DATA is decided based on the logic level of the output data DATA, the operation of the auxiliary driver  220  performed in a period where the driving control signal PE_DATA is enabled in response to an operation of driving the output data DATA to the data output pad DQ. 
         [0035]    The driving control signal generator  230  is used to drive the auxiliary driver  220 , which performs a pre-emphasis operation. In other words, the period where the auxiliary driver  220  performs the pre-emphasis operation includes a period where a time period passes from a timing point when the applied output data DATA transitions from a logic high level to a logic low level and a period where a time period passes from a timing point when the applied output data DATA transitions from a logic low level to a logic high level. A period where the auxiliary driver  220  has to operate is set based on the driving control signal PE_DATA generated in the driving control signal generator  230 . 
         [0036]    To sum up, the auxiliary driver  220  drives the output data DATA to the data output pad DQ with a driving force which is defined by the pre-emphasis code EM_CODE&lt; 0 : 1 &gt; for a time period which is defined by the driving control signal PE_DATA. 
         [0037]    As described above, since the main driver  210 , too, is driving the output data DATA to the data output pad DQ, the auxiliary driver  220  performs a driving operation for a pre-emphasis operation along with the driving control signal generator  230 . Of course, since the driving force of the auxiliary driver  220  varies according to the pre-emphasis code EM_CODE&lt; 0 : 1 &gt;, the driving force of the auxiliary driver  220  may vary according to a change in the process, voltage and temperature (PVT). 
       Second Embodiment 
       [0038]      FIG. 3  is a block diagram illustrating a data output circuit in support of a pre-emphasis operation in accordance with a second embodiment of the present invention. 
         [0039]    Referring to  FIG. 3 , the data output circuit in support of a pre-emphasis operation in accordance with the second embodiment of the present invention includes a pull-up driver  310 , a pull-down driver  320 , a pull-up driving control signal generator  330 , a pull-down driving control signal generator  340 , and a code generator  360 . 
         [0040]    The pull-up driver  310  receives an output data P_DATA and drives the output data P_DATA to a data output pad DQ by using a plurality of main pull-up drivers  311 ,  312  and  313  and a plurality of auxiliary pull-up drivers  314  and  315 . 
         [0041]    Here, the main pull-up drivers  311 ,  312  and  313  are controlled to be turned on/off in response to pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt;, and the auxiliary pull-up drivers  314  and  315  are controlled to be turned on/off in response to pull-up pre-emphasis/supplementary codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt;1&gt;. 
         [0042]    The pull-down driver  321 - 323  receives an output data N_DATA and pull-down drives the output data N_DATA to the data output pad DQ, wherein the output pad DQ is pull-down driven by using a plurality of main pull-down drivers  321 ,  322  and  323  and a plurality of auxiliary pull-down drivers  324  and  325 . 
         [0043]    Here, the main pull-down drivers  321 ,  322  and  323  are controlled to be turned on/off in response to pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt;, and the auxiliary pull-down drivers  324  and  325  are controlled to be turned on/off in response to pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt;. 
         [0044]    The pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; that are used to turn on/off the operation of the main pull-up drivers  311 ,  312  and  313  among the constituent elements of the pull-up driver  310  and the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; that are used to turn on/off the operation of the main pull-down drivers  321 ,  322  and  323  among the constituent elements of the pull-down driver  320  are generated in a calibration circuit disposed around the ZQ pad. Therefore, the values of the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; and the values of the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; are controlled based on the change in the process, voltage and temperature (PVT). 
         [0045]    The main pull-up drivers  311 ,  312  and  313  may include first to third main pull-up drivers  311 ,  312  and  313  whose operations are respectively controlled according to the values of first to third bits PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; of the pull-up impedance codes. The auxiliary pull-up drivers  314  and  315  include first and second auxiliary pull-up drivers  314  and  315  whose operations are respectively controlled according to the values of the first and second bits EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; of the pull-up pre-emphasis codes. The main pull-down drivers  321 ,  322  and  323  include first to third main pull-down drivers  321 ,  322  and  323  whose operations are respectively controlled according to first to third bits NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; of the pull-down impedance codes. The auxiliary pull-down drivers  324  and  325  include first and second auxiliary pull-down drivers  324  and  325  whose operations are respectively controlled according to first and second bits EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; of the pull-down pre-emphasis codes. 
         [0046]    Here, the driving force relationship among the first to third main pull-up drivers  311 ,  312  and  313 , the first to third main pull-down drivers  321 ,  322  and  323 , the first and second auxiliary pull-up drivers  314  and  315 , and the first and second auxiliary pull-down drivers  324  and  325  may be divided into the following two cases. 
         [0047]    A first case is that the driving force of the first main pull-up driver  311  is greater than the driving force of the second main pull-up driver  312 , and the driving force of the second main pull-up driver  312  is greater than the driving force of the third main pull-up driver  313 . The driving force of the first main pull-down driver  321  is greater than the driving force of the second main pull-down driver  322 , and the driving force of the second main pull-down driver  322  is greater than the driving force of the third main pull-down driver  323 . Also, the driving force of the first auxiliary pull-up driver  314  is greater than the driving force of the second auxiliary pull-up driver  315 , and the driving force of the first main pull-up driver  311  is N times as great as the driving force of the first auxiliary pull-up driver  314 , where N is an integer greater than 2. The driving force of the first auxiliary pull-down driver  324  is greater than the driving force of the second auxiliary pull-down driver  325 , and the driving force of the first main pull-down driver  321  is N times as great as the driving force of the first auxiliary pull-down driver  324 , where N is an integer greater than 2. 
         [0048]    The second case is that the first to third main pull-up drivers  311 ,  312  and  313  have the same driving force together, and the first to third main pull-down drivers  321 ,  322  and  323  have the same driving force together. Here, the first and second auxiliary pull-up drivers  314  and  315  have the same driving force, but the driving forces of the first to third main pull-up drivers  311 ,  312  and  313  are each N times as great as the driving forces of each of the first and second auxiliary pull-up drivers  314  and  315 , where N is an integer greater than 2. Likewise, the first and second auxiliary pull-down drivers  324  and  325  have the same driving forces, but the driving forces of the first to third main pull-down drivers  321 ,  322  and  323  are each N times as great as the driving forces of each of the first and second auxiliary pull-down drivers  324  and  325 , where N is an integer greater than 2. 
         [0049]    Meanwhile, the code generator  360  generates a pull-up pre-emphasis code EM_PCODE&lt; 0 : 1 &gt; and a pull-down pre-emphasis code EM_NCODE&lt; 0 : 1 &gt; whose values are controlled according to the variation of the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; and the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt;. 
         [0050]    More specifically, the code generator  360  includes a pull-up pre-emphasis code generation unit  362  and a pull-down pre-emphasis code generation unit  364 . The pull-up pre-emphasis code generation unit  362  varies the values of the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; by applying a different variation range according to the variation of the values of the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt;. The pull-down pre-emphasis code generation unit  364  varies the values of the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; by applying a different variation range according to the variation of the values of the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt;. 
         [0051]    For example, the pull-up pre-emphasis code generation unit  362  operates in such a manner that the number of enabled bits among the first and second bits EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; of the pull-up pre-emphasis codes is increased according to the decreasing number of enabled bits among the first to third bits PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; of the pull-up impedance codes. Therefore, the variation range of the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; and the variation range of the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; are different. 
         [0052]    Likewise, the pull-down pre-emphasis code generation unit  364  operates in such a manner that the number of enabled bits among the first and second bits EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; of the pull-down pre-emphasis codes is increased according to the decreasing number of enabled bits among the first to third bits NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; of the pull-down impedance codes. Therefore, the variation range of the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; and the variation range of the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; are different. 
         [0053]    Referring to  FIG. 4A  illustrating a detailed circuit structure of the pull-up pre-emphasis code generation unit  362 , although the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; are generated in response to the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt;, the variation ranges are different from each other. 
         [0054]    More specifically, referring to  FIG. 4A , the pull-up pre-emphasis code generation unit  362  includes first and second inverters INV 1  and INV 2  for respectively inverting the first and second bits PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; of the pull-up impedance codes; a first NAND gate NAND 1  and a third inverter INV 3  that perform an AND operation on the output signal of the first inverter INV 1  and the output signal of the second inverter INV 2 ; a fourth inverter INV 4  for inverting the third bit PCODE&lt; 2 &gt; of the pull-up impedance codes; a first NOR gate NOR&lt; 1 &gt; for performing a NOR operation on the output signal of the third inverter INV 3  and the output signal of the fourth inverter INV 4  and outputting the second bit EM_PCODE&lt; 1 &gt; of the pull-up pre-emphasis codes; and a second NOR gate NOR 2  and a fifth inverter INV 5  for performing an OR operation on the second and third bits PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; of the pull-up impedance codes and outputting the first bit EM_PCODE&lt; 0 &gt; of the pull-up pre-emphasis codes. 
         [0055]    Referring to  FIG. 4B  illustrating a detailed circuit structure of the pull-down pre-emphasis code generation unit  364 , although the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; are generated in response to the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt;, the variation ranges are different from each other. 
         [0056]    More specifically, referring to  FIG. 4B , the pull-down pre-emphasis code generation unit  364  includes sixth and seventh inverters INV 6  and INV 7  for respectively inverting the first and second bits NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; of the pull-down impedance codes; a second NAND gate NAND 2  and an eighth inverter INV 8  that perform an AND operation on the output signal of the sixth inverter INV 6  and the output signal of the seventh inverter INV 7 ; a ninth inverter INV 9  for inverting the third bit NCODE&lt; 2 &gt; of the pull-down impedance codes; a third NOR gate NOR&lt; 3 &gt; for performing a NOR operation on the output signal of the eighth inverter INV 8  and the output signal of the ninth inverter INV 9  and outputting the second bit EM_NCODE&lt; 1 &gt; of the pull-down pre-emphasis codes; and a fourth NOR gate NOR 4  and a tenth inverter INV 10  for performing an OR operation on the second and third bits NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; of the pull-down impedance codes and outputting the first bit EM_NCODE&lt; 0 &gt; of the pull-down pre-emphasis codes. 
         [0057]    As described above, since the values of the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; and the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; are controlled according to a change in the process, voltage and temperature (PVT), the values of the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; and the values of the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; are controlled according to the change in the process, voltage and temperature (PVT) as well. 
         [0058]    Referring to  FIG. 5A , the main pull-up drivers  311 ,  312  and  313  and the auxiliary pull-up drivers  314  and  315  include PMOS transistors individually and it may be seen from this that the main pull-up drivers  311 ,  312  and  313  and the auxiliary pull-up drivers  314  and  315  are constituent elements for deciding whether to pull-up drive the external power source voltage VDD to the data output pad DQ or not.  FIG. 5B  shows that the main pull-down drivers  321 ,  322  and  323  and the auxiliary pull-down drivers  324  and  325  include NMOS transistors individually and it may be seen from this that the main pull-down drivers  321 ,  322  and  323  and the auxiliary pull-down drivers  324  and  325  are constituent elements for deciding whether to pull-down drive the external ground voltage VSS to the data output pad DQ or not. Therefore, when there is a change in the process, voltage and temperature (PVT), the values of the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; and the values of the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; vary in opposite to each other. 
         [0059]    In other words, the main pull-up drivers  311 ,  312  and  313  and the auxiliary pull-up drivers  314  and  315  that include the PMOS transistors have the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; of ‘000’ and the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; of ‘00’. The main pull-up drivers  311 ,  312  and  313  and the auxiliary pull-up drivers  314  and  315  are all enabled when the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; and the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; have the smallest value, and thus the main pull-up drivers  311 ,  312  and  313  and the auxiliary pull-up drivers  314  and  315  come to have the maximal driving force. When the main pull-up drivers  311 ,  312  and  313  and the auxiliary pull-up drivers  314  and  315  that include the PMOS transistors have the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; of ‘111’ and the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; of ‘11’, the main pull-up drivers  311 ,  312  and  313  and the auxiliary pull-up drivers  314  and  315  are all disabled when the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; and the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; have the greatest value, and thus the main pull-up drivers  311 ,  312  and  313  and the auxiliary pull-up drivers  314  and  315  come to have the minimal driving force. 
         [0060]    However, the main pull-down drivers  321 ,  322  and  323  and the auxiliary pull-down drivers  324  and  325  that include NMOS transistors have the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; of ‘000’ and the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; of ‘00’. The main pull-down drivers  321 ,  322  and  323  and the auxiliary pull-down drivers  324  and  325  are all disabled when the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; and the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; have the smallest value, and thus the main pull-down drivers  321 ,  322  and  323  and the auxiliary pull-down drivers  324  and  325  come to have the minimal driving force. When main pull-down drivers  321 ,  322  and  323  and the auxiliary pull-down drivers  324  and  325  that include the NMOS transistors have the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; of ‘111’ and the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; of ‘11’, the main pull-down drivers  321 ,  322  and  323  and the auxiliary pull-down drivers  324  and  325  are all enabled when the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; and the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; have the greatest value, and thus the main pull-down drivers  321 ,  322  and  323  and the auxiliary pull-down drivers  324  and  325  come to have the maximal driving force. 
         [0061]    Therefore, the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; and the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; may be controlled to have their values increasing according to an increasing level of the external power source voltage VDD, and to have their values decreasing according to a decreasing level of the external power source voltage VDD. However, the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; and the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; may be controlled to have their values decreasing according to an increasing level of the external power source voltage VDD, and to have their values increasing according to a decreasing level of the external power source voltage VDD. 
         [0062]    In this case, the main pull-up drivers  311 ,  312  and  313  and the main pull-down drivers  321 ,  322  and  323  have their driving forces decreasing according to the increasing level of the external power source voltage VDD, and have their driving forces increasing according to the decreasing level of the external power source voltage VDD. Therefore, the output data P_DATA and N_DATA to the data output pad DQ may be driven with a uniform driving force regardless of a change in the level of the external power source voltage VDD. 
         [0063]    Also, the auxiliary pull-up drivers  314  and  315  and the auxiliary pull-down drivers  324  and  325  apply a relatively small pre-emphasis operation driving force according to the increasing level of the external power source voltage VDD, and the auxiliary pull-up drivers  314  and  315  and the auxiliary pull-down drivers  324  and  325  apply a relatively great pre-emphasis operation driving force according to the decreasing level of the external power source voltage VDD. In this way, the output data P_DATA and N_DATA are driven to the data output pad DQ at a uniform slew rate, regardless of a change in the level of the external power source voltage VDD. 
         [0064]    The relationships among the variation of the values of the above-described pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt;, the variation of the values of the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt;, and the variation of the level of the external power source voltage VDD may be summarized as shown in  FIG. 6A . 
         [0065]    Similarly, the relationships among the variation of the values of the above-described pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt;, the variation of the values of the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt;, and the variation of the level of the external power source voltage VDD may be summarized as shown in  FIG. 6B . 
         [0066]    The pull-up driving control signal generator  330  generates a pull-up driving control signal PPE_DATA that is enabled for a time period in response to the transition of the logic level of the output data P_DATA from a logic high level to a logic low level to control the operation of the auxiliary pull-up drivers  314  and  315 . Here, since the auxiliary pull-up drivers  314  and  315  include PMOS transistors, the pull-up driving control signal PPE_DATA maintains a logic low level during a time that is set from the timing point when the logic level of the output data P_DATA transitions from a logic high level to a logic low level. 
         [0067]    The pull-down driving control signal generator  340  generates a pull-down driving control signal NPE_DATA that is enabled for a time period in response to the transition of the logic level of the output data N_DATA from a logic low level to a logic high level to control the operation of the auxiliary pull-down drivers  324  and  325 . Here, since the auxiliary pull-down drivers  324  and  325  include NMOS transistors, the pull-down driving control signal NPE_DATA maintains a logic high level during a time that is set from the timing point when the logic level of the output data N_DATA transitions from a logic low level to a logic high level. 
         [0068]      FIG. 7A  shows the detailed circuit structure of the above-described pull-up driving control signal generator  330 , and  FIG. 7B  shows the detailed circuit structure of the above-described pull-down driving control signal generator  340 . 
         [0069]    The pull-up driving control signal generator  330  and the pull-down driving control signal generator  340  provide control signals to the auxiliary pull-up drivers  314  and  315  and the auxiliary pull-down drivers  324  and  325  that perform a pre-emphasis operation. Here, the period where the auxiliary pull-up drivers  314  and  315  operate is the period where a time period passes from a timing point when the logic level of the output data P_DATA transitions from the logic high level to the logic low level, and the period where the auxiliary pull-down drivers  324  and  325  operate is the period where a time period passes from a timing point when the logic level of the output data N_DATA transitions from the logic low level to the logic high level. Therefore, the periods where the auxiliary pull-up drivers  314  and  315  and the auxiliary pull-down drivers  324  and  325  operate are decided based on the pull-up driving control signal PPE_DATA and the pull-down driving control signal NPE_DATA that are generated in the pull-up driving control signal generator  330  and the pull-down driving control signal generator  340 , respectively. 
         [0070]    Thus, the auxiliary pull-up drivers  314  and  315  and the auxiliary pull-down drivers  324  and  325  drive the output data P_DATA and N_DATA to the data output pad DQ with a driving force defined by the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; and the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt; during a time period defined by the pull-up driving control signal PPE_DATA and the pull-down driving control signal NPE_DATA. 
         [0071]    Here, as described above, while the main pull-up drivers  311 ,  312  and  313  and the main pull-down drivers  321 ,  322  and  323  drive the output data P_DATA and N_DATA to the data output pad DQ, the auxiliary pull-up drivers  314  and  315  and the auxiliary pull-down drivers  324  and  325  perform a driving operation for a pre-emphasis operation along with the pull-up driving control signal generator  330  and the pull-down driving control signal generator  340 . Here, since the driving forces of the auxiliary pull-up drivers  314  and  315  and the auxiliary pull-down drivers  324  and  325  vary according to the pull-up pre-emphasis codes EM_PCODE&lt; 0 &gt; and EM_PCODE&lt; 1 &gt; and the pull-down pre-emphasis codes EM_NCODE&lt; 0 &gt; and EM_NCODE&lt; 1 &gt;, the driving forces of the auxiliary pull-up drivers  314  and  315  and the auxiliary pull-down drivers  324  and  325  may vary according to a change in the process, voltage and temperature (PVT). 
         [0072]      FIGS. 8A to 8D  are timing diagrams describing the operation of the data output circuit in support of a pre-emphasis operation shown in  FIG. 3  in accordance with the second embodiment of the present invention. 
         [0073]    First,  FIG. 8A  shows an ideal operation of a data output circuit that does not perform a pre-emphasis operation. 
         [0074]      FIG. 8A  shows a case where the main pull-up drivers  311 ,  312  and  313  and the main pull-down drivers  321 ,  322  and  323  operate in response to the output data P_DATA and N_DATA, and the main pull-up drivers  311 ,  312  and  313  include PMOS transistors. Since the main pull-down drivers  321 ,  322  and  323  include NMOS transistors, the output data P_DATA and N_DATA are inverted and driven to the data output pad DQ. 
         [0075]      FIG. 8B  shows the slew rate of a data driven to the data output pad DQ varies as the level of the external power source voltage VDD varies in a data output circuit that does not perform a pre-emphasis operation. 
         [0076]    In other words, as the level of the external power source voltage VDD becomes higher, the slew rate of a data driven to the data output pad DQ becomes small, and as the level of the external power source voltage VDD becomes lower, the slew rate of a data driven to the data output pad DQ becomes great. 
         [0077]      FIG. 8C  shows an ideal operation of a data output circuit performing a pre-emphasis operation. 
         [0078]    In other words,  FIG. 8C  shows a case where all of the main pull-up drivers  311 ,  312  and  313 , the auxiliary pull-up drivers  314  and  315 , the main pull-down drivers  321 ,  322  and  323 , and the auxiliary pull-down drivers  324  and  325  operate in response to the output data P_DATA and N_DATA. Since the main pull-up drivers  311 ,  312  and  313  and the auxiliary pull-up drivers  314  and  315  include PMOS transistors, and the main pull-down drivers  321 ,  322  and  323  and the auxiliary pull-down drivers  324  and  325  include NMOS transistors, the output data P_DATA and N_DATA are inverted and driven to the data output pad DQ. 
         [0079]    Also, since a pre-emphasis operation is performed in a period where the pull-up driving control signal PPE_DATA is enabled to a logic low level and a period where the pull-down driving control signal NPE_DATA is enabled to a logic high level, it may be seen that the data driven to the data output pad DQ is driven with a higher driving force when the data driven to the data output pad DQ transitions from a logic high level to a logic low level and when the data driven to the data output pad DQ transitions from a logic low level to a logic high level. 
         [0080]      FIG. 8D  shows that a data output circuit performing a pre-emphasis operation may maintain the slew rate of the data driven to the data output pad DQ although the level of the external power source voltage VDD is changed. 
         [0081]    In other words, when the level of the external power source voltage VDD is high, the strength of the driving force based on the pre-emphasis operation is reduced, and when the level of the external power source voltage VDD is low, the strength of the driving force based on the pre-emphasis operation is increased. As a result, the slew rate of the data driven to the data output pad DQ is maintained at a uniform level, regardless of the change in the level of the external power source voltage VDD. 
         [0082]    According to an embodiment of the present invention described above, the pre-emphasis driving force of a data output circuit in support of a pre-emphasis operation is controlled according to a change in the process, voltage and temperature (PVT) by using a pre-emphasis code whose value varies according to the variation of the value of an impedance code and performing the pre-emphasis operation. 
         [0083]    Therefore, output data may be driven at a uniform slew rate regardless of the change in the process, voltage and temperature (PVT). 
         [0084]    According to an embodiment of the present invention, a data output circuit in support of a pre-emphasis operation may control a pre-emphasis driving force according to a change in process, voltage and temperature (PVT) by using a pre-emphasis code whose value varies according to a change in an impedance code value and performing a pre-emphasis operation. 
         [0085]    Therefore, the data output circuit may drive an output data while maintaining a uniform slew rate regardless of a change in the process, voltage and temperature (PVT). 
         [0086]    While the present invention has been described with respect to the specific embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims. 
         [0087]    For example, the above-description of the pull-up impedance codes PCODE&lt; 0 &gt;, PCODE&lt; 1 &gt; and PCODE&lt; 2 &gt; and the pull-down impedance codes NCODE&lt; 0 &gt;, NCODE&lt; 1 &gt; and NCODE&lt; 2 &gt; is exemplary only, where the number of the impedance code and the pre-emphasis code may be modified according to different design needs. 
         [0088]    Also, the position and the kind of the logic gates and transistors exemplified in the above-described embodiment are realized differently according to the polarity of an input signal.