Abstract:
An apparatus and method for detecting fault conditions in an input AC power signal. A three phase supervisory circuit is used to detect the fault conditions and comprises first, second and third sensing circuits for detecting a voltage level for respective phases of the AC power signal. The three phase supervisory circuit compares the voltage levels to a threshold value. A delay circuit delays operation of the sensing circuits for a predetermined period of time. An activation circuit for receiving indication signals from the sensing and delay circuits is also used. The indication signals are indicative of whether the predetermined period of time has elapsed and the three voltage levels of the three phases have met the threshold value.

Description:
FIELD OF THE INVENTION  
         [0001]    The present invention relates to a method and apparatus for monitoring a three phase power signal for a change in operating conditions. More particularly, the invention relates to a three phase supervisory circuit for detecting phase reversal, phase loss, open neutral and undesirable changes in phase voltage level.  
         BACKGROUND OF THE INVENTION  
         [0002]    Three-phase inductive motors, as well as many other three-phase loads, are often inoperable or susceptible to damage due to power supply faults such as power loss, phase loss, and phase reversal. More specifically, a momentary power loss allows a motor to decelerate which increases the degree of slip between the rotor and the alternating current passing through the stator. Upon restoration of power, the rotor tries to quickly recover its original slip relationship with the current. In the rotor&#39;s attempt to do so, high torques are developed which can damage the rotor shaft or other components associated with it.  
           [0003]    With a phase loss condition, current is supplied to the motor through only two of the three supply lines. When this happens, the motor tries to compensate for the inactive phase by conducting additional current through the stator windings which are connected to the remaining two active phases. As a result of the additional current, the active windings can overheat to a potentially destructive high temperature.  
           [0004]    In reaction to a phase reversal, often referred to as reverse phase rotation, the motor rotates in a direction opposite to its normal rotation. This is often caused by improperly matching the motor leads to the power supply. Depending on the specific application, reverse rotation can make a critical motor driven oil pump inoperative or unscrew an impeller from a threaded drive shaft, either of which can cause extensive damage.  
           [0005]    Although a wide variety of fault detectors for use in three-phase circuits are presently available, these detectors typically detect only one type of fault. Moreover, in many applications, their timely response to faults is inadequate. Some detectors respond too slowly to critical faults such as a momentary power loss, where damage can quickly occur if the detector does not interrupt the power supply before power is restored. Other detectors respond too quickly to less critical faults where a slower response is desirable to reduce the effects of false readings due to electrical noise, for example. Still other detectors often include many electrical components which not only increase the cost of the detector but are often unnecessary.  
           [0006]    Therefore, a need exists for a detector that responds to more than one input voltage fault. In addition, the detector should be able to operate within a reasonable time upon detection of the input voltage fault.  
         SUMMARY OF THE INVENTION  
         [0007]    The above and other objectives are substantially achieved by an apparatus and method employing a three phase supervisory circuit for monitoring an AC input signal and outputing an AC signal if the AC input signal meets the required conditions.  
           [0008]    The three phase supervisory circuit comprises first, second and third sensing circuits for detecting a voltage level for respective phases of the AC power signal. The three phase supervisory circuit compares the voltage levels to a threshold value. A delay circuit delays operation of the sensing circuits for a predetermined period of time. An activation circuit for receiving indication signals from the sensing and delay circuits is also used. The indication signals are indicative of whether the predetermined period of time has elapsed and the three voltage levels of the three phases have met the threshold value. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0009]    The details of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which:  
         [0010]    [0010]FIG. 1 is a schematic diagram of a three phase supervisory circuit constructed in accordance with an embodiment of the present invention; and  
         [0011]    [0011]FIG. 2 is a schematic diagram of a three phase supervisory circuit constructed in accordance with another embodiment of the present invention; and  
         [0012]    [0012]FIG. 3 is a flow chart of a method of monitoring an AC input signal via a three phase circuit in accordance with an embodiment of the present invention.  
         [0013]    To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0014]    [0014]FIG. 1 depicts a three phase supervisory circuit  100  in accordance with an embodiment of the present invention and the following sub-circuits: a power supply circuit  102 , a first sensing circuit  104   1 , a second sensing circuit  104   2 , a third sensing circuit  104   3 , a delay circuit  106 , and an activation circuit  108 . Each one of the sub-circuits will now be discussed in detail with reference to the overall operation of the three phase supervisory circuit  100 .  
         [0015]    With continued reference to FIG. 1, the power supply circuit  102  comprises a transformer  110 , a first bridge rectifier  112   1 , resistors R 1 , R 2 , and R 3 , capacitors C 1 , C 2 , C 3  and C 4 , diode D 1 , a first transistor Q 1 , and a voltage regulator  116 . In a preferred embodiment of the present invention, the power supply circuit  102  accepts an AC input voltage via line one (L 1 ) and neutral (N) terminals and provides 24 volts DC to the other sub-circuits. To provide a consistent 24 volt output, transformer  110  is preferably a 240 volt half-voltage transformer and operates at half-voltage. The transformer  110  provides essentially one-half the voltage on the primary and the other half of the voltage on the secondary coils of the transformer  110 . This allows for robustness of the three phase supervisory circuit  100 . For example, a high voltage input (e.g. 208) volts can be applied to the input of the primary coil of the transformer  110  without burning out the transformer  110  or other components of the power supply circuit  102 .  
         [0016]    The transistor Q 1  and diode D 1  in the power supply circuit  102  preferably serve as a pre-regulator and insures that the voltage across the capacitor C 1  and voltage regulator  116  is within accepted parameters. The diode D 1  is preferably a zener diode and is preferably limited to 36 volts. The 36 volts is received by the voltage regulator  116  which is preferably an adjustable voltage regulator. Adjustable voltage regulator  116  adjusts the voltage received from the transistor Q 1  and reduces it to a preferably constant 24 volt output or very close to it. Adjustable voltage regulator  116  allows for a consistent output voltage even when the input voltage varies. Transformer  110 , diode D 1  and transistor Q 1  serve to limit the value of the AC input voltage to a value that the voltage regulator  116  can accept so that the likelihood of voltage regulator  116  burning out due to a high input voltage is reduced.  
         [0017]    The three phase supervisory circuit  100  will now be described with reference to the sensing circuits  104   1 ,  104   2  and  104   3 . In a preferred embodiment of the invention, each of the sensing circuits comprises substantially identical electrical components and operates in a similar manner. The arrangement of their components will be discussed separately, but the operation of the sensing circuits  104   1 ,  104   2  and  104   3  will be discussed jointly with respect to first sensing circuit  104   1 .  
         [0018]    First sensing circuit  104   1  monitors the first phase of the input power signal. The first sensing circuit  104   1  comprises input terminals for receiving an input power source. The input terminals are designated as line one (L 1 ) and neutral (N). A metal oxide varistor MOV 1   1 , a resistor R 4   1 , a resistor R 5   1 , a capacitor C 5   1  and a diode bridge DB 2   1  are operable as a first portion of a voltage divider circuit for first sensing circuit  104   1 .  
         [0019]    Resistors R 4   1 , R 5   1 , capacitor C 5   1  and diode bridge DB 2   1  are connected in series. Resistors R 4   1  and R 5   1  operate as surge protectors. Capacitor C 5   1  preferably has an impedance of 60 Hz and is part of the resistance network. The metal oxide varistor MOV 1   1  provides the first sensing circuit  104   1  with protection against electrical spikes contained in the input signal. The bridge rectifier circuit DB 2   1  provides a 12 volt output at node one based on an input voltage of 120 volts at terminals L 1  and N. At node one, a capacitor C 6   1 , resistor R 6   1  and diode D 2   1  are connected in parallel and terminate at a node two and comprise a second portion of a voltage divide circuit for first sensing circuit  104   1 .  
         [0020]    First sensing circuit  104   1  also comprises a comparator circuit. The comparator circuit comprises comparator COMP 1   1  and comparator COMP 2   1 . Each comparator COMP 1   1  and COMP 2   1  has a positive input terminal, a negative input terminal and an output terminal. The negative terminal of comparator COMP 1   1  and the positive terminal of comparator COMP 2   1  are connected together at node two. The positive and output terminals of comparator COMP 1   1  are connected to resistor R 7   1 , R 8   1  and R 10   1 . The negative and output terminals of comparator COMP 2   1  are connected to resistor R 8   1 , resistor R 9   1  and resistor R 10   1 . A diode D 3   1  is disposed at the outputs of the comparators COMP 1   1  and COMP 2   1 .  
         [0021]    Second sensing circuit  104   2  monitors the second phase of the input power signal. The second sensing circuit  104   1  comprises input terminals for receiving an input power source. The input terminals are designated as line two (L 2 ) and neutral (N). A metal oxide varistor MOV 1   2 , a resistor R 4   2 , a resistor R 5   2 , a capacitor C 5   2  and a diode bridge DB 2   2  are operable as a first portion of a voltage divider circuit for second sensing circuit  104   2 .  
         [0022]    Resistors R 4   2 , R 5   2 , capacitor C 5   2  and diode bridge DB 2   2  are connected in series. Resistors R 4   2  and R 5   2  operate as surge protectors. Capacitor C 5   2  preferably has an impedance of 60 Hz and is part of the resistance network. The metal oxide varistor MOV 1   2  provides the second sensing circuit  104   2  with protection against electrical spikes contained in the input signal. The bridge rectifier circuit DB 2   2  provides a 12 volt output at node three based on an input voltage of 120 volts at terminals L 2  and N. At node three, a capacitor C 6   2 , resistor R 6   2  and diode D 2   2  are connected in parallel and terminate at a node four and comprise a second portion of a voltage divide circuit for second sensing circuit  104   2 .  
         [0023]    Second sensing circuit  104   2  also comprises a comparator circuit. The comparator circuit comprises comparator COMP 1   2  and comparator COMP 2   2 . Each comparator COMP 1   2  and COMP 2   2  has a positive input terminal, a negative input terminal and an output terminal. The negative terminal of comparator COMP 1   2  and the positive terminal of comparator COMP 2   2  are connected together at node four. The positive and output terminals of comparator COMP 1   2  are connected to resistor R 7   2 , R 8   2  and R 10   2 . The negative and output terminals of comparator COMP 2   2  are connected to resistor R 8   2 , resistor R 9   2  and resistor R 10   2 . A diode D 3   2  is disposed at the outputs of the comparators COMP 1   2  and COMP 2   2 .  
         [0024]    Third sensing circuit  104   3  monitors a third phase of the input power signal. The third sensing circuit  104   3  comprises input terminals for receiving an input power source. The input terminals are designated as line three (L 3 ) and neutral (N). A metal oxide varistor MOV 1   3 , a resistor R 4   3 , a resistor R 5   3 , a capacitor C 5   3  and a diode bridge DB 2   3  are operable as a first portion of a voltage divider circuit for third sensing circuit  104   3 .  
         [0025]    Resistors R 4   3 , R 5   3 , capacitor C 5   3  and diode bridge DB 2   3  are connected in series. Resistors R 4   3  and R 5   3  operate as surge protectors. Capacitor C 5   3  preferably has an impedance of 60 Hz and is part of the resistance network. The metal oxide varistor MOV 1   3  provides the third sensing circuit  104   3  with protection against electrical spikes contained in the input signal. The bridge rectifier circuit DB 2   3  provides a 12 volt output at node five based on an input voltage of 120 volts at terminals L 3  and N. At node five, a capacitor C 6   3 , resistor R 6   3  and diode D 2   3  are connected in parallel and terminate at a node six and comprise a second portion of a voltage divide circuit for third sensing circuit  104   3 .  
         [0026]    Third sensing circuit  104   3  also comprises a comparator circuit. The comparator circuit comprises comparator COMP 1   3  and comparator COMP 2   3 . Each comparator COMP 1   3  and COMP 2   3  has a positive input terminal, a negative input terminal and an output terminal. The negative terminal of comparator COMP 1   3  and the positive terminal of comparator COMP 2   3  are connected together at node six. The positive and output terminals of comparator COMP 1   3  are connected to resistor R 7   3 , R 8   3 , and R 10   3 . The negative and output terminals of comparator COMP 2   3  are connected to resistor R 8   3 , resistor R 9   3  and resistor R 10   3 . A diode D 3   3  is disposed at the outputs of the comparators COMP 1   3  and COMP 2   3 .  
         [0027]    The operation of sensing circuits  104   1 ,  104   2  and  104   3  will now be discussed. The sensing circuits  104   1 ,  104   2  and  104   3  each monitor a phase of an input AC signal. The voltage level of the AC input signal is also monitored. In a preferred embodiment of the invention, the AC input signal is 120 volts. If the AC input signal is wired correctly, that is, each line is wired to a neutral and not to other lines, the input voltage is 120 volts. If the AC input voltage is wired incorrectly, the input voltage can be much greater than 120 volts. However, the sensing circuits  104   1 ,  104   2  and  104   3  can detect this difference in voltage and react to the abnormal condition in a manner described below with respect to the activation circuit  108 .  
         [0028]    For each sensing circuit  104 , the corresponding diode bridge DB 2  converts the AC input signal into a 12 volt DC signal if the AC input voltage is 120 volts. If the diode bridge DB 2  outputs a different value, then it indicates that the input value was not 120 volts. Diode D 2 , which is preferably a zener diode, limits the DC voltage going to the comparators COMP 1  and COMP 2  to preferably 20 volts. Any voltage higher than 20 volts DC causes the diode D 2  to limit the voltage to no more than 20 volts which protects the comparators COMP 1  and COMP 2 . For example, if there is a miswire condition and lines N and L 2  are reversed, the voltage across diode D 2  can be as high as 36 volts.  
         [0029]    The comparators COMP 1  and COMP 2  compare the voltage from diode DB 2  to about a 12 volt reference voltage. If the voltage from the diode DB 2  is not about 12 volts, then the comparators COMP 1  and COMP 2  send a negative indication signal to the activation circuit  108  which indicates that the correct voltage level was not received. If the correct voltage level was received, then a positive indication would be sent by the comparators COMP 1  and COMP 2  to the activation circuit  108 .  
         [0030]    For the three sensing circuits  104   1 ,  104   2  and  104   3 , diodes D 3   1 , D 3   2  and D 3   3  are each connected to resistor R 18 . The three sensing circuits  104   1 ,  104   2  and  104   3  operate as inputs to logic AND gates. In other words, all three sensing circuits preferably must have the proper voltage levels before the activation circuit  108  can receive a positive indication.  
         [0031]    The three phase circuit  100  will now be described with reference to delay circuit  106 . Delay circuit  106  comprises a comparator COMP 3  having a negative terminal, a positive terminal and an output terminal. The negative terminal of comparator COMP 3  is connected to resistor R 11  and resistor R 12  and receives 24 volts DC from power supply circuit  102 . The positive terminal of comparator COMP 3  is connected to resistor R 13 , resistor R 14  and capacitor C 7  and receives 24 volts DC from the power supply circuit  102 . The output of comparator COMP 3  is connected to a diode D 4  which is in turn connected to resistor R 18 .  
         [0032]    Delay circuit  106  preferably provides an approximately one to two second delay when three phase supervisory circuit  100  is first powered up. The one to two second delay allows the capacitors in the three phase supervisory circuit  100  to stabilize. Once the delay period is over, diode D 4  sends a positive indication signal to the activation circuit  108 .  
         [0033]    The activation circuit  108  includes a comparator COMP 4  having a negative terminal, a positive terminal and an output. The negative and output terminals of comparator COMP 4  are connected to resistor R 15 , resistor R 16 , and resistor R 17 . The negative terminal of comparator COMP 4  is connected to resistor R 18 . A transistor Q 2  is also connected to the output terminal of comparator COMP 4 . A relay coil K 1 , diode D 5 , relay  118  and metal oxide varistor MOV 2  are also connected to transistor Q 2 . The metal oxide varistor MOV 2  is in turn connected to a contactor coil (not shown).  
         [0034]    The activation circuit  108  receives indication signals from the sensing circuits  104   1 ,  104   2  and  104   3  and from the delay circuit  106 . If the phase and voltage levels are correct for the AC input signal, then each of the sensing circuits  104   1 ,  104   2  and  104   3  provide a positive indication to the activation circuit  108 . Delay circuit  106  also provides a positive indication signal once the delay period is over. Specifically, comparator COMP 4  receives positive indication signals from the sensing circuits  104   1 ,  104   2  and  104   3  and delay circuit  106 , and generates an output to activate the transistor Q 2 , which in turn activates the relay coil K 1 . This results in relay  118  closing and the contactor coil being powered. The metal oxide varistor MOV 2  protects the three phase supervisory circuit  100  from kickbacks such as large electrical spikes when the contactor coil is powered and not powered.  
         [0035]    In accordance with an embodiment of the invention, the contactor coil can serve as an extension cord and be connected to a plurality of ground fault circuit interrupter (GFCI) receptacles. The plurality of GFCI devices would then be protected from miswiring, phase imbalances and improper input voltage levels that exceed the normal operating range of the GFCI receptacles.  
         [0036]    In another embodiment of the invention, the three phase supervisory circuit  100  is used as a tester by a technician to check the electrical wiring of a facility to determine the correct wiring arrangement. If the electrical wiring is wrong or the AC voltage of the wiring is incorrect, the three phase supervisory circuit will not provide an output signal.  
         [0037]    Turning to FIG. 2, an alternative embodiment for the three phase supervisory circuit  100  is depicted. Specifically, FIG. 2 depicts a programmable processor  200  suitable for use in the three phase supervisory circuit  100 . The programmable processor  200  comprises a microprocessor  202 , as well as memory  204  for storing programs for various timing functions. The microprocessor  202  cooperates with conventional support circuitry  206  such as power supplies, clock circuits and the like, as well as circuits that assist in executing the phase and voltage monitoring and the miswiring detection functions of the present invention. A user interface device  210  such as a keypad is provided to enter selected time out periods.  
         [0038]    The programmable processor  200  also comprises input/output circuitry  208  that forms an interface between the microprocessor  202 , power supply circuit  102 , first sensing circuit  104   1 , second sensing circuit  104   2 , third sensing circuit  104   3 , delay circuit  106 , and activation circuit  108 .  
         [0039]    Although the programmable processor  200  is depicted as a general purpose computer that is programmed to perform the decision making functions of first sensing circuit  104   1 , second sensing circuit  104   2 , third sensing circuit  104   3 , delay circuit  106  and activation circuit  108  in accordance with the present invention, the invention can be implemented in hardware, in software, or a combination of hardware and software. As such, the monitoring and detecting functions described above with respect to the various figures are intended to be broadly interpreted as being equivalently performed by software, hardware, or a combination thereof.  
         [0040]    The present invention will now be discussed with reference to FIG. 3. Specifically, FIG. 3 is a flow chart of a method of monitoring a three phase circuit in accordance with an embodiment of the present invention. The method begins at step  302  where the line voltages are checked for the following conditions: detection of an open neutral in any of the AC line inputs, an open in phase one, phase two or phase three, over-voltage conditions on input phase voltages (e.g. voltages greater than  138  VAC), under-voltage on input phase voltages (e.g. voltages less than  102  VAC), a line one-to-neutral reverse wiring condition, a line two-to-neutral reverse wiring condition, a line three-to-neutral reverse wiring condition, a miswiring condition where lines one, two or three are wired together in combinations of two or three.  
         [0041]    At step  304 , a determination is made as to whether any of the above conditions or combinations of the above mentioned error conditions are detected. If the determination is positive, the method  300  proceeds to step  306  where the sensing circuits  104   1 ,  104   2  and  104   3  provide a negative indication signal to activation circuit  108 .  
         [0042]    However, if the determination is negative, which indicates nothing was found wrong with input voltages or wiring, the method  300  proceeds to step  308  where the sensing circuits  104   1 ,  104   2  and  104   3  provide a positive indication signal to activation circuit  108 .  
         [0043]    At step  310 , the delay circuit provides an indication signal to the activation circuit  108  indicating that the delay period has expired and the capacitors in the three phase activation circuit  100  has stabilized.  
         [0044]    At step  312 , the activation circuit  108  provides an activation signal which opens relay  118 , allowing 120 volts to be outputted from three phase supervisory circuit  100 . The relay  118  can be connected to a contactor coil in an embodiment of the present invention.  
         [0045]    Those skilled in the art can now appreciate from the foregoing description that the broad teachings of the present invention can be implemented in a variety of forms. Therefore, while this invention can be described in connection with particular examples thereof, the true scope of the invention should not be so limited since other modifications will become apparent to the skilled practitioner upon a study of the drawings, specification and the following claims.