Abstract:
A measurement and correction method provides for a complete full correction of a true-mode system using only the single ended error matrix developed for 4 port correction of single ended measurements. The degree of misalignment of the balanced sources may be determined from these measurements.

Description:
BACKGROUND 
       [0001]    Vector network analysis relies on linear behavior from the device-under-test (DUT). However, some active devices must be stimulated in a unique manner to avoid nonlinear operation. To illustrate, a differential amplifier may exhibit distortion when driven with a single-ended signal. It is necessary to drive the inputs with real-time signals that present the proper amplitude and phase relationships. These drive signals must be presented at the input ports (+ and −) of the DUT, with the same amplitude and 180 degrees of phase difference, as a differential signal. For in-circuit applications, a balun (balanced to unbalanced transformer) is often used. It is positioned in close proximity of the device to avoid introducing any phase offset due to connections between the device and the balun. In application, it is difficult to control the interconnections to maintain the desired balance. 
       SUMMARY 
       [0002]    A measurement and correction method provides for a complete full correction of a true-mode system using only the single ended error matrix developed for 4 port correction of single ended measurements. The degree of misalignment of the balanced sources may be determined from these measurements. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0003]      FIG. 1  illustrates a process flowchart for the measurement and correction method. 
           [0004]      FIG. 2  illustrates a process flowchart for steps  12  and  14  shown in  FIG. 1 . 
           [0005]      FIG. 3  illustrates a functional block diagram for the process shown in  FIG. 2 . 
           [0006]      FIGS. 4A-C  illustrates embodiments used for phase-controlled sources with programmable phase differences. 
           [0007]      FIG. 5  illustrates the error box model. 
       
    
    
     DETAILED DESCRIPTION  
       [0008]      FIG. 1  illustrates a process flowchart for the measurement and correction method. 
         [0009]    Steps  10  and  12  are typical of any measurement technique. In step  10 , a 4 port network analyzer is initialized to produce single-ended and true mode balanced drives for the desired frequency range, number of points, and other desired stimuli. In step  12 , a single ended full 4 port S-parameter calibration using any technique is performed. 
         [0010]    Steps  14 - 22  depend upon the number of available measurement receivers in the system. Ideally, there is a one to one mapping of measurement receiver to power waves such that all the waves from each drive condition would be simultaneously measured. However, when the reference channel that measures Reference  1 -Reference  4  is shared, it is not possible to measure the ratio of these waves at the same time. In most VNA systems, the phase of the measurement receiver may be arbitrary, e.g. from measurement to measurement the phase of any a or b will change. The phase of the ratios of a&#39;s to b&#39;s will not change. These steps may be repeated for each source setting. In another embodiment, a second measurement is made after one of the reference sources is phase shifted, typically by 90 degrees. Then, power waves may be determined that are attributed to each source 
         [0011]    In step  14 , the stimulus type is changed to a true-mode drive. These modes include a true-mode differential at the input, true-mode common at the input, true-mode differential at the output, and true-mode common at the output. In step  16 , for each of the drive states selected, the ratio of the single ended wave responses is measured such that the b/a ratio for every b and each of the drive port a&#39;s is recorded. The number of data acquisition steps depends upon the total number of simultaneous measurement receivers available. These measurements are made with correction off. In step  18 , from each of the drive states, for the matrix equation [b]=[S][a], where b and a are the single ended waves applied at the DUT, [S] is the uncorrected S-parameter matrix. In step  20 , the S parameter is found by solving the equation [S]=[b][a] −1 . This generalized single ended matrix takes into account all the waves present, including mode-crosstalk signal which are present because the true-mode drive is not ideal. In step  22 , the standard single ended 4 port error correction arrays are modified to change the load match to the appropriate source match term according to the drive port. The tracking terms are modified accordingly. 
         [0012]    In step  24 , the 4-port error correction matrix is applied using the modified correction arrays to the [S] matrix to find the corrected S parameters. This represents the error-corrected single ended S-parameters measured under true-mode drive conditions. 
         [0013]    In step  26 , the standard mixed mode math is applied to compute the differential and common mode S-parameters from the corrected single ended S-parameters. 
         [0014]      FIG. 2  illustrates a process flow chart for steps  12  and  14  shown in  FIG. 1 . 
         [0015]    In step  32 , a 2 port S-parameter calibration is performed. The standard 2 port VNA error model may be represented by an error box model as shown in  FIG. 5 . The power wave labels are a 0 -a 3  and b 0 -b 3 . D 1  and D 2  represent the directivity terms for ports  1  and  2 . M 1  and M 2  represent the source match terms for ports  1  and  2 . R 1  and R 2  represent the reflection tracking terms for ports  1  and  2 . F 1  and F 2  are variables where F 1 /F 2  is constant. G 1  and G 2  represent switch match terms. G 2  is used to generate a 3  during forward (port  1  to port  2 ) measurements, and G 1  is used to generate a 0  during reverse (port  2  to port  1 ) measurements. This step may be omitted when a 4-port calibration has been performed as the 2-port error terms may be derived from the 4-port error terms. 
         [0016]    In step  34 , the differential input signal is measured. Phase(a 1 /a 2 ) is the phase difference between the signals incident on ports  1  and  3 . This value should be 180 degrees for a true differential signal. Mag(a 1 /a 2 ) is the magnitude ratio of the signals incident on ports  1  and  2 . This value should be unity for a properly balanced differential signal. 
         [0017]    In step  36 , the source offset is adjusted in phase and magnitude. The amplitude of one or both of the sources is adjusted such that Mag(a 1 /a 2 ) is unity while the phase of one or both of the sources is adjusted to 0 degrees for a common mode signal or 180 degrees for a differential mode signal. 
         [0018]    In operation, it may be necessary to iteratively adjust the magnitude and phase as the parameters are coupled. In addition, if the automatic level control (ALC) is operating in either source, then one source may pull the other resulting in amplitude changes. As this complicates amplitude adjustments, the ALC may be turned off before measuring. 
         [0019]      FIG. 3  illustrates a block diagram for the process shown in  FIG. 2 . The vector network analyzer interface to a device under test (DUT) at the phase and amplitude measurement plane, port  1  and port  2 . The VNA includes two reference sources that have been phase controlled. The output of each source is measured using reflectometers that are positioned proximate to the measurement plane. 
         [0020]    The two separate RF sources are synthesized and phase controlled together. The RF sources are set to frequencies that satisfy the equation (N/M)*RF 2 , where N and M are integers. This ensures that the relative phase between the sources can be defined, measure, and set. While the embodiment discloses two separate sources, one can easily extend the concept to synthesize and phase lock multiple sources. In this example, N/M=1 as the two frequencies are the same. 
         [0021]      FIGS. 4A-C  illustrates embodiments used for phase-controlled sources with programmable phase differences. 
         [0022]      FIG. 4A  illustrates Fractional-N Phase Offset. The Fractional-N phase controlled loops are locked to a common reference. Each phase controlled loop includes a phase detector receiving the common reference signal and an output of a fractional N controller. An oscillator receives the output of the phase detector. The output of the oscillator is the RF signal. The Fractional-N controller receives as an input the RF signal. One of the Fractional-N controller further receives an output of a fractional N phase accumulator that performs the phase offseting. 
         [0023]      FIG. 4B  illustrates a Direct Digital Synthesizer phase offset. Similar to  FIG. 4A , the synthesizers are locked to a common reference source. The output of each synthesizer is a reference signal. One of the synthesizers further receives an output of a fractional N phase accumulator that performs phase offsetting. 
         [0024]      FIG. 4C  illustrates RF loop Voltage phase offset. RF 1  is any RF source. A phase detector receives the output of a first RF source RF 1  and an output of a second RF source RF 2 . The output DC voltage of the phase detector represents the phase shift of RF 2  relative to RF 1 . Vphase is a variable DC voltage typically provided by a digital-to-analog converter.