Abstract:
Improved methods and systems are provided for detecting surge bleed valve faults and analyzing the performance of surge bleed valves in gas turbines. The method includes monitoring the rates of rotation of an engine fan and an engine gas generator in a gas turbine engine. While so doing, a valve status change signal is transmitted to a surge bleed valve in the gas turbine engine. The difference between the two monitored rates of rotation is determined. A surge bleed valve fault signal is generated if the difference between the two monitored rates of rotation does not change by at least a predetermined amount immediately following transmission of the valve status change signal to the surge bleed valve.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    This invention relates to monitoring gas turbine engines and, more particularly, to the monitoring and the operation of a surge bleed valve in a gas turbine engine and detecting a fault in the operation of such surge bleed valve.  
           [0002]    Gas turbine engines, such as those used on jet engine powered aircraft, employ surge bleed valves for preventing compressor surge by bleeding or by-passing some of the airflow around one of the compressors. Unfortunately, such surge bleed valves sometimes fail to operate properly. For example, a surge bleed valve may stay open and fail to close after being instructed to close. This reduces the operating efficiency of the gas turbine engine.  
           [0003]    A previously proposed method for detecting the failure of a surge bleed valve to open or close is to attach a position sensing switch to the surge bleed valve for providing a signal as to whether the valve is open or closed. There are, however, disadvantages to this approach. For one thing, the position sensing switch itself may malfunction and give a false indication of the surge bleed valve condition. Furthermore, the use of a position sensing switch complicates the construction of the surge bleed valve and increases its manufacturing cost.  
           [0004]    As may be seen from the foregoing discussion, there is a need for a method of surge bleed valve fault detection which does not require the use of a position sensing switch.  
         SUMMARY OF THE INVENTION  
         [0005]    In one aspect of the present invention, a method of detecting surge bleed valve faults in a gas turbine engine comprises monitoring an engine operating parameter in the gas turbine engine; transmitting a valve status change signal to a surge bleed valve in the gas turbine engine; and setting a valve operation check signal to a fault indicating state if the monitored engine operating parameter does not change by at least a predetermined amount immediately following transmission of the valve status change signal to the surge bleed valve.  
           [0006]    These and other features, aspects and advantages of the present invention will become better understood with reference to the following drawings, description and claims. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0007]    [0007]FIG. 1 is a schematic diagram showing representative logic for producing an engine slow signal used in accordance with the present invention;  
         [0008]    [0008]FIG. 2 is a schematic diagram showing representative logic for producing a variance signal used in accordance with the present invention;  
         [0009]    [0009]FIG. 3 is a schematic diagram showing representative timing functions which may be used in accordance with the present invention;  
         [0010]    [0010]FIG. 4 is a schematic diagram showing representative logic for producing valve open and valve closed indicator flags which may be used in accordance with the present invention; and  
         [0011]    [0011]FIG. 5 is a schematic diagram showing representative counters which may be used to evaluate the performance of a surge bleed valve in accordance with the present invention.  
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0012]    A gas turbine engine is usually equipped with one or more surge bleed valves to optimize the performance of the engine. The functionality of a surge bleed valve is sometimes monitored by means of a hardware position sensing switch mounted on the surge bleed valve. In other cases, such functionality is simply not monitored. The present invention provides the desired monitoring without the use of hardware switches by monitoring engine operating parameters which are affected by the opening and closing of the surge bleed valves.  
         [0013]    When a surge bleed valve closes, the effects on the operation of a typical two-spool jet engine are:  
         [0014]    (1) there is a sudden increase in the rotary speed of the engine fan or low pressure compressor: and  
         [0015]    (2) there is a sudden decrease in the rotary speed of the engine gas generator or high pressure compressor.  
         [0016]    When a surge bleed valve opens, the effects on the operation of a typical two-spool jet engine are just the opposite, namely:  
         [0017]    (1) there is a sudden decrease in the rotary speed of the engine fan or low pressure compressor; and  
         [0018]    (2) there is a sudden increase in the rotary speed of the engine gas generator or high pressure compressor.  
         [0019]    Based on the foregoing analysis, the engine operating parameters of fan speed and gas generator speed can be used to monitor the operation of surge bleed valves. The opening or closing of a surge bleed valve will cause a large spike in a variance value calculated from these engine operating parameters. In order to distinguish the difference between normal engine acceleration or deceleration and surge bleed valve opening or closing, and to prevent false indications, the results of the monitoring procedure will be recognized as valid only if the gas turbine engine is in steady state, slow acceleration, or slow deceleration operation and the status command to the surge bleed valve stays true (e.g., close) or false (e.g., open) for at least a predetermined time interval (e.g., one second) before the command changes.  
         [0020]    For purposes of illustration, the invention will be explained for the case of a turbofan jet engine. A suitable example is the AS900 turbofan engine manufactured by Honeywell International, Inc.  
         [0021]    The surge bleed valve performance analysis procedure described herein makes use of two engine operating characteristics and three command signals as inputs to a novel surge bleed valve fault detection logic. The two engine operating signals are a fan speed signal (n 1 ) derived from a suitable fan speed transducer or sensor and a gas generator speed signal (n 2 ) derived from a suitable gas generator speed transducer or sensor. The three command signals are a set point signal for calculating a derivative of gas generator speed, a command signal for controlling the open or closed status of the surge bleed valve, and a flag signal to indicate that the engine is lit and running.  
         [0022]    In an illustrative example, it is assumed that the surge bleed valve is a solenoid operated valve which is spring loaded to the open condition. The valve is closed by electrically energizing the solenoid. In this case, the valve should be closed when the valve command signal is true (solenoid energized) and should be open when the valve command signal is false (solenoid not energized). The valve status should change from open to closed when the command signal changes from false to true and, conversely, should change from closed to open when the command signal changes from true to false.  
         [0023]    The testing of the status of the surge bleed valve will be considered to be a valid test only when the following two conditions are met:  
         [0024]    (1) the gas turbine engine is in a steady state, slow acceleration, or slow deceleration operating condition (herein defined as an “engine slow” condition); and  
         [0025]    (2) the valve command signal stays true or false for at least a predetermined time interval (e.g., one second) before it changes status. When the surge bleed valve is commanded to change its status and condition (2) is met, a timer is started such as a 400 millisecond timer. When the surge bleed valve is commanded to close and, if within the 400 milliseconds of this example, condition (1) is met and the variance calculated is greater than or equal to a predetermined threshold, a proper closure flag signal (fl_sbvacls) is set to true to indicate that the surge bleed valve has closed properly. When the surge bleed valve is commanded to open and, if within the 400 milliseconds, condition (1) is met and the variance calculated is greater than or equal to a predetermined threshold, a proper opening flag signal (fl_sbvaopn) is set to true to indicate that the surge bleed valve has opened properly.  
         [0026]    When the 400 millisecond timer expires and if condition (1) is met, the following items are updated:  
         [0027]    (a) a “condition proper” counter is incremented to indicate how many times the condition has been proper for a valid surge bleed valve fault detection;  
         [0028]    (b) if either of the proper closure or proper opening flags is true, a current valve okay flag is set to true to indicate that the surge bleed valve currently does not have a fault and a “number of okay counts” counter is incremented to indicate how many times proper surge bleed valve movement has been detected; and  
         [0029]    (c) if both the proper closure flag and the proper opening flag are false, the current valve okay flag is set to false to indicate that the surge bleed valve is currently faulted.  
         [0030]    Referring to FIG. 1, there is shown a representative embodiment of logic for producing the “engine slow” signal (fl_eng_slow) which, when true, indicates that condition (1) set forth above is met. (Note: “fl” denotes “flag”.) If the engine slow signal is true, the engine is operating in a steady state, slow acceleration, or slow deceleration manner and, thus, is not experiencing any rapid acceleration or rapid deceleration. The engine operating parameter supplied to the FIG. 1 logic is a signal n 2 dot which represents the derivative of the gas generator speed signal n 2 . This n 2 dot signal is fed to a first-order filtered derivative calculation unit  10  which generates a filtered derivative output signal n 2 dot_ 4 sbv. The relationship between the filter unit output and input signals is defined by the Laplace transform expression  1 /(TauS+1), where Tau is a time constant and S is a complex operator. The time constant Tau of filter unit  10  is set by a constant value C.NDOT 4 SBV_TAU. In practice, this time constant value may range from about 0.025 to 0.4 seconds, with a default value of 0.1 seconds.  
         [0031]    The output of filter unit  10  is supplied to the lower input of a comparator  11  and the upper input of a comparator  12 . A variable accellim_ 4 sbv is supplied to the upper input of comparator  11  and sets the acceleration limit for the “engine slow” signal. In practice, this acceleration limit may range from about 1.0 to 10.0 percent per second. A variable decellim_ 4 sbv is supplied to the lower input of comparator  12  and sets the deceleration limit for the “engine slow” signal. In practice, this deceleration limit may range from about minus 1.0 to minus 10.0 percent per second.  
         [0032]    The outputs of comparator  11  and comparator  12  are supplied to the two inputs of an AND logic element  13 . The output of AND logic  13  will be true when the outputs of both of comparators  11  and  12  are true. This true signal at the output of AND logic  13  constitutes the “engine slow” signal. It occurs when the output of filter unit  10  is less than or equal to the acceptable acceleration limit and is greater than or equal to the acceptable deceleration limit. This “engine slow” signal indicates that the gas turbine engine is not experiencing either rapid acceleration or rapid deceleration.  
         [0033]    Referring to FIG. 2, there is shown a representative embodiment of logic for producing a variance signal that may be used in the present invention. The primary inputs to the FIG. 2 logic are a pair of signals n 1 pctcor and n 2 pctcor which are derived from a pair of engine operating parameters. The input signal n 1 pctcor is a corrected version of the n 1  speed signal produced by the engine fan speed transducer, expressed as a percentage of maximum speed. The other input signal n 2 pctcor is a corrected version of the n 2  speed signal produced by the engine gas generator speed transducer, expressed as a percentage of maximum speed. These two input signals are supplied to a subtractor  14  to produce a difference signal n 1 mn 2 cor (n 1  minus n 2  corrected). This difference signal is supplied to a first-order filtered derivative calculation unit  15  which produces a filtered derivative signal n 1 mn 2 d corresponding to the first derivative with respect to time of the input difference signal n 1 mn 2 cor. The time constant Tau of derivative calculation unit  15  is set by a constant value C.N 1 MN 2 _TAU which is supplied to the Tau control input of unit  15 . In practice, this Tau constant may range from about 0.025 to 0.4 seconds, with a default to 0.1 seconds. The reset value input RstVal of unit  15  is provided with a reset value of zero. At reset time, the Res(D) input of unit  15  is supplied with a system reset signal sysreset which resets unit  15  to this reset value of zero. This occurs when the fault detection logic is powered up. The Hold control input of unit  15 , when fed with a true input signal (a value of one), causes unit  15  to hold constant the output signal of unit  15 .  
         [0034]    The derivative signal n 1 mn 2 d output by unit  15  is supplied by way of a power amplifier  17  to the signal input of a further first-order filtered derivative calculation unit  18  to produce a second derivative output signal n 1 mn 2 d_pwf. The time constant Tau of the derivative calculator  18  is set to a constant value of C.NlMN 2 D_PWTAU, which may range from about 0.025 to 0.4 seconds, with a default to 0.1 seconds.  
         [0035]    The derivative signal n 1 mn 2 d from unit  15  is also fed to another first-order filtered derivative calculator  19  having a time constant set by a constant value C.N 1 MN 2 D_TAU (such as a default to 0.1 seconds, and a range from about 0.025 to 0.4 seconds). The output of derivative calculator  19  is fed to a power amplifier  20  to generate a second derivative output signal n 1 mn 2 d_fpw.  
         [0036]    The output from power amplifier  20  is subtracted from the output from derivative calculator  18  by a subtractor  21  to produce the desired variance signal, designated as n 1 mn 2 dvar. This variance signal n 1 mn 2 dvar is used to determine whether the surge bleed valve has closed or opened properly.  
         [0037]    Referring to FIG. 3, there is shown representative logic for various timing functions that may be used in the present description. The surge bleed valve command or control signal is designated as sbva_sol. A true level for this signal indicates that the surge bleed valve has been commanded to close. A false level indicates that it has been commanded to open. A close valve command timer  24  is started when the sbva_sol valve command signal is set to true. The timing interval for timer  24  is set to C.SBVACLS_TMR seconds (such as a range from about 0.1 to 5.0 seconds, with a default to 0.4 seconds). If the sbva_sol command signal is still true after the predetermined C.SBVACLS_TMR time interval, the output signal fl_sbva_cls_ss of close valve command timer  24  is set to true. (Note: “ss” denotes “steady state”.) This indicates that the valve close command signal is in a desired steady state condition.  
         [0038]    The valve command signal sbva_sol is also supplied by way of a signal inverter circuit  25  to an open valve command timer  26 . When the sbva_sol valve command signal is set to false (valve open command), the input of timer  26  goes true and timer  26  is started. The timing interval for timer  26  is set at a predetermined C.SBVAOPN_TMR seconds (such as a range from 0.1 to 5.0 seconds, with a default to 0.4 seconds). If the sbva_sol command signal is still false after the predetermined C.SBVAOPN_TMR time interval, the output signal fl_sbva_opn_ss of open valve command timer  26  is set to true. This indicates that the valve open command signal is in a desired steady state condition.  
         [0039]    The steady state valve close command and the steady state valve open command signals from timers  24  and  26  are supplied to an OR logic circuit  30 . The valve command signal sbva_sol is supplied to the upper input of a comparator  31 . Elements  32  and  33  are one control period signal delay elements for their input signals, with “IC:0” indicating that the initial condition for delay elements  32  and  33  is zero. The delay provided by elements  32  and  33  may be, for example, 20 milliseconds. OR circuit  30  and delay element  32  produce an output signal fl_sbva_ss which, when true, indicates that the valve command signal (either close or open) is in a desired steady state condition.  
         [0040]    Comparator  31  produces an output signal fl_sbva_chg which is true when its two input signals are not equal. Otherwise, the output of comparator  31  is set to false. The not equal condition occurs when the valve command signal sbva_sol changes from true to false or vice versa. Thus, the output signal fl_sbva_chg from comparator  31  is set to true for a time period corresponding to the delay of delay element  33  each time the valve command signal changes from open to close or vice versa.  
         [0041]    The steady state signal from delay element  32  and the actual change signal from comparator  31  are supplied to the two inputs of an AND logic circuit  34  to produce a steady state valve command change signal fl_sbva_sschg at the output of AND circuit  34 . The output of AND  34  is true only if both inputs are true. A true level output from AND  34  indicates that the surge bleed valve has been commanded to change from a desired steady state condition. Hence, the valve status change is acceptable for analysis purposes.  
         [0042]    The steady state signal from delay element  32  is also supplied by way of a signal inverter circuit  35  to a further AND circuit  36 . The valve command change signal from comparator  31  is also supplied to the second input of AND circuit  36 . Because of the inverting action of inverter  35 , the upper input of AND  36  is true when neither of the valve command signals has passed its steady state test. Thus, the output signal fl_sbva_nsschg from AND circuit  36  is set to true to indicate that the valve change command is not made from a steady state condition and, hence, is not acceptable for analysis purposes.  
         [0043]    The steady state valve change signal fl_sbva_sschg from AND circuit  34  is supplied to the set input S of a latch circuit  40 . When the S input of latch  40  is true and a reset input R(D) is false, latch  40  sets its output Q to true. When the reset input R(D) is true, the output Q is set to false regardless of the status of the S input. When the steady state change signal fl_sbva_sschg is true, the latch  40  output signal fl_sbva_ck will be set to true. This indicates that a valve check process has started. When both the engine slow signal fl_eng_slow from the FIG. 1 logic and the fl_sbva_ck valve check signal from latch  40  are true, an AND circuit  41  will produce an output signal fl_sbva_slowck. When true, this signal indicates that the gas turbine engine is not experiencing rapid acceleration or deceleration and that a valve check process has started.  
         [0044]    A timer  42  is started when its upper input is set to true. This occurs when latch  40  sets the valve check signal fl_sbva_ck to true, such signal being supplied by way of a signal delay element  43  to the upper input of timer  42 . If its upper input is true for more than C.SBVADLY seconds (such as a range from about 0.1 to 1.0 seconds, with a default to 0.38 seconds), timer  42  will set its output (fl_sbva_ck_end) to true. When either this output signal or the not steady state change signal fl_sbva_nsschg from AND circuit  36  is true, the output of OR circuit  44  will reset latch  40  to the “no check” (output false) condition.  
         [0045]    Referring now to FIG. 4, there is shown a representative embodiment of logic for producing proper valve open and proper valve closed signals that may be used in the present invention. The variance signal n 1 mn 2 dvar from the logic shown in FIG. 2 is supplied to the upper input of a comparator  50 . If this variance signal is greater than or equal to a predetermined close threshold C.SBVACLS, the output of comparator  50  is placed in a true condition. In practice, this close threshold C.SBVACLS is set at a fixed value that may be in a range from about 0.05 to 0.4, with a default to 0.15.  
         [0046]    If all the inputs to an AND circuit  51  are true, then a proper valve closure indicating latch  52  is set to a true state. This occurs if the variance signal is equal to or greater than the close threshold, the slow check signal fl_sbva_slowck from FIG. 3 is true, and the valve command signal sbva_sol is true (true=close). In this case, the output Q of latch  52  is at a true level, making the latch output signal fl_sbvacls true. This indicates that a proper surge bleed valve closure has been detected.  
         [0047]    Latch  52  and, hence, its output signal fl_sbvacls will be reset to false via signal inverter circuit  53  and AND circuit  54  every time the surge bleed valve is commanded to open (sbva_sol=false). The output of AND circuit  54  will be true for only one control cycle.  
         [0048]    The variance signal n 1 mn 2 dvar from the logic shown in FIG. 2 is also supplied to the upper input of a comparator  60 . If this variance signal is greater than or equal to a predetermined open threshold C.SBVAOPN, the output of comparator  60  is placed in a true condition. In practice, this open threshold C.SBVAOPN is set at a fixed value in a range from about 0.05 to 0.4, with a default to 0.15.  
         [0049]    If all the inputs to an AND circuit  61  are true, then a proper valve open indicating latch  62  is set to a true state. This occurs if the variance signal is equal to or greater than the open threshold, the slow check signal fl_sbva_slowck from FIG. 3 is true and the valve command signal sbva sol is false (false=open). Signal inverter circuit  63  converts this false sbva_sol value to true. In this case, the output Q of latch  62  is at a true level, making the latch output signal fl_sbvaopn true. This indicates that a proper surge bleed valve opening has been detected.  
         [0050]    Latch  62  and, hence, its output signal fl_sbvaopn will be reset to false via AND circuit  64  every time the surge bleed valve is commanded to close (sbva_sol)=true). The output of AND circuit  64  will be true for only one control cycle.  
         [0051]    Referring now to FIG. 5, there are shown representative counters which may be used to count various ones of the above-described signals, such counts being useful for evaluating the performance of the surge bleed valves in the gas turbine engine. A first such counter  70  is comprised of an adder circuit  71  and a one control period signal delay element  72 . Every time the surge bleed valve command sbva_sol changes from true to false or vice versa, the fl_sbva_chg signal from FIG. 3 goes true for a brief interval. This true pulse increments counter  70  by one count. As a result, the count value cnts_sbva_all output by counter  70  indicates how many times the surge bleed valve has been commanded to change its status.  
         [0052]    A second counter  73  is comprised of an adder circuit  74  and a one control period signal delay element  75 . Every time both the fl_sbva_ck_end signal from FIG. 3 is true and the fl_eng_slow engine slow signal from FIG. 1 is true, AND circuit  76  operates to increment counter  73  by one count. As a result, the count value cnts_sbva_slow output by counter  73  indicates how many times conditions have been proper for a reliable surge bleed valve fault detection.  
         [0053]    A third counter  77  is comprised of an adder circuit  78  and a one control period signal delay element  79 . Whenever either the proper closure detection signal fl_sbvacls from FIG. 4 or the proper opening detection signal fl_sbvaopn from FIG. 4 is true, an OR circuit  80  will enable a first input of an AND circuit  81 .  
         [0054]    When the count signal fl_sbva_tocnt is supplied to the second counter  73 , it is also supplied to the second input of AND circuit  81  to enable this second input. When both of the AND circuit  81  inputs are enabled (true), AND circuit  81  operates to increment counter  77  by one count. As a result, the count value cnts_sbva_ok output by counter  77  will indicate how many times a proper opening or closing of the surge bleed valve has been detected.  
         [0055]    When the fl_sbva_wk signal at the output of AND circuit  81  increments counter  77 , such signal is also supplied by way of an OR circuit  84  to set a current status indicating latch  85  to a true state (latch output Q true) to indicate that the surge bleed valve does not currently have a fault. Current status latch  85  is reset to a false state by an AND circuit  86  when the counter  73  is incremented by the fl_sbva_tocnt signal and the proper open or close signal fl_sbva_oporcd from OR circuit  80  is not true, the not function being provided by an inverter circuit  87 . The false state of latch  85  (Q output false) indicates that the surge bleed valve currently has a fault.  
         [0056]    A comparison of the number of reliable valve status change signals provided by counter  73  with the number of okay operations of the surge bleed valve provided by counter  77  provides valuable information for evaluating the performance of the surge bleed valve.  
         [0057]    It should be understood, of course, that the foregoing relates to preferred embodiments of the invention and that modifications may be made without departing from the spirit and scope of the invention as set forth in the following claims.