Abstract:
A method of forming an opening in a wafer layer. At least two patterned photoresist layers are formed on a wafer layer. Using different photoresist layers, many openings are defined. The wafer layer is then etched to form the opening. Each photoresist layer has a parallel linear pattern such as parallel strips or an array of rectangular blocks. The photoresist layers are superposed in a way that spaces between the patterns for each photoresist layers overlapped with each other for form openings that expose the underlying wafer layers. The wafer layer exposed in the openings is then etched to form contact/via holes without rounded corners while the rounded profiles has been cancelled by the superposition of the photoresist layers.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    The invention relates in general to a photolithography and etching process of a semiconductor fabrication process. More particularly, this invention relates to a method of forming an opening in a wafer layer.  
           [0003]    2. Description of the Related Art  
           [0004]    As the dimension of a semiconductor device becomes smaller and smaller, techniques such as phase shift mask (PSM) or optical proximity correction (OPC) mask has to be used to improve the transferred pattern from a photomask during the exposure process. However, when the pattern dimension is smaller than a half of the wavelength of the light source, the diffraction effect becomes significant. Especially for the photoresist layer patterns of contact hole/via hole, the profile cannot be effective improved using the phase shift mask.  
           [0005]    On the other hand, as some fine correction of the photomask pattern is required for optical proximity effect, the fabrication of the photomask is tedious. When the pitch of the pattern is too small, there is no space for forming the assistant feature on the photomask. As a result, the photoresist layer pattern may be formed with a rounded profile. The resultant opening in the wafer layer is thus very likely to be rounded. The exact shape, cross sectional area and resistance of the contact hole/via hole are difficult to control.  
         SUMMARY OF THE INVENTION  
         [0006]    A method of forming an opening in a wafer layer. At least two patterned photoresist layers are formed on a wafer layer. Using different photoresist layers, many openings are defined. The wafer layer is then etched to form the opening. Each photoresist layer has a parallel linear pattern such as parallel strips or an array of rectangular blocks. The photoresist layers are superposed in a way that spaces between the patterns for each photoresist layers overlapped with each other for form openings that expose the underlying wafer layers. The wafer layer exposed in the openings is then etched to form contact/via holes without rounded corners while the rounded profiles has been cancelled by the superposition of the photoresist layers.  
           [0007]    Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0008]    [0008]FIGS. 1A to FIG. 1C shows a first embodiment of the invention, wherein FIG. 1C is a cross sectional view along the cutting line I-I′ of FIG. 1B; and  
         [0009]    [0009]FIG. 2A to FIG. 2C shows a second embodiment of the invention, wherein FIG. 2C is a cross sectional view along the cutting line II-II′ of FIG. 2B. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0010]    First Embodiment  
         [0011]    [0011]FIG. 1A to FIG. 1C shows a first embodiment of the invention. In the first embodiment, a method of forming an opening in an insulation layer using two patterned photoresist layers is illustrated.  
         [0012]    In FIG. 1A, a substrate  100  is provided. An insulation layer  110  is formed on the substrate  100 . The substrate includes a substrate for fabricating a dynamic random access memory (DRAM) thereon. For example, a metal oxide semiconductor (MOS) used as a memory is formed on the substrate  100  and requires a conductive line for electrical connection. A first photolithography and etching step is performed to form a patterned photoresist layer  120  with parallel strips spaced from each other with a pitch/size. In this embodiment, a negative photoresist layer is used. A KrF excimer laser generating a light source with wavelength of about 248 nm is used as the exposure machine, for example. The process for forming this patterned negative photoresist layer  120  includes the follow steps. A negative photoresist layer is coated on the insulation layer  110 . Using the exposure light source and a photomask, the negative photoresist layer is exposed. A post exposure bake (PEB) step is performed, followed by a development.  
         [0013]    In FIG. 1B, another patterned photoresist layer  130  in a form of a plurality of parallel strips spaced from each with a pitch/size is formed on the patterned photoresist layer  120 . In this embodiment, a positive photoresist layer is selected for forming the patterned photoresist layer  130 . As shown in FIG. 1B, as the parallel of the photoresist layers  120  and  130  are perpendicular to each other, openings  140  are defined penetrating through both the photoresist layers  120  and  130 . That is, the openings  140  are defined by the overlapping spaces between the parallel strips of the first and the second photoresist layers. Again, a KrF excimer laser with a wavelength of about  248  nm is used as the exposure light source. Assuming that the width of each of the parallel strips of the photoresist layer  130  “b” is 0.1 micron, and the pitch between these parallel strips “a” is 0.2 micron along the Y direction, the width of each opening  140  is 0.1 micron (about ½ of the wavelength). The steps for forming the patterned photoresist layer  130  are similar to those for forming the patterned photoresist layer  120 . In addition, as the patterned photoresist layer  120  is formed by cross-linking polymer, it is not affected by the exposure and development steps of the patterned photoresist layer  130 .  
         [0014]    In FIG. 1C, a cross sectional view along the cutting line I-I′ in FIG. 1B is shown. Using the patterned photoresist layers  120  and  130  as a mask, the insulation layer  110  is etched to form the contact holes/via holes  150 .  
         [0015]    In this embodiment, using two photoresist layer steps, two photoresist layers with parallel strip pattern perpendicular to each other are formed. Since these two photoresist layers are formed with precise patterns as expected, the patterned of openings transferred thereby thus is correct and precise without a rounded profile.  
         [0016]    In addition, the openings are defined by forming two photoresist layers in two photolithography and etching steps. When the aspect ratio of the openings in the photoresist layers is not equal to 1, or the pitch and width is not the same, the exposure conditions of each photolithography etching steps can be adjusted to obtain an opening with a precise critical dimension (CD). The pattern of each photoresist layers can also be adjusted to obtain a precise critical dimension.  
         [0017]    Second Embodiment  
         [0018]    [0018]FIG. 2A to FIG. 2C shows a second embodiment of the invention. In the second embodiment, a method of forming an opening in an insulation layer using two patterned photoresist layers is illustrated.  
         [0019]    In FIG. 2A, a substrate  200  is provided. An insulation layer  210  is formed on the substrate  200 . The substrate includes a substrate for fabricating a dynamic random access memory (DRAM) thereon. For example, a metal oxide semiconductor (MOS) used as a memory is formed on the substrate  200  and requires a conductive line for electrical connection. A first photolithography and etching step is performed to form a photoresist layer  120  with a pattern of an array of blocks, for example, rectangular blocks. In this embodiment, a negative photoresist layer is used. Due to the diffraction of the exposure light, the corners of each block is rounded. A KrF excimer laser generating a light source with wavelength of about 248 nm is used as the exposure machine, for example. Along the Y direction, the pitch of the pattern “a” is about 0.3 micron, while the width of each block “b” is about 0.2 micron. The process for forming this patterned negative photoresist layer  220  includes the follow steps. A negative photoresist layer is coated on the insulation layer  210 . A soft bake step is performed to reduce the solvent amount in the negative photoresist layer. Using the exposure light source and a photomask, the negative photoresist layer is exposed. A post exposure bake (PEB) step is performed, followed by a development.  
         [0020]    In FIG. 2B, another photoresist layer  230  with a pattern of an array of blocks, preferably, the rectangular blocks, is formed on the photoresist layer  220 . In this embodimetn, the photoresist layer  230  is selected from a positive photoresist material. The array of blocks of the photoresist layer  230  is staggered with the array of blocks of the photoresist layer  220 , so that openings  240  are defined penetrating through the photoresist layers  220  and  230 . Again, due to the diffraction effect of the exposure light, rounded patterned is resulted for the photoresist layer  230 .  
         [0021]    Assuming that the length and pitch in X direction are the same as the width and pitch in Y direction for both the photoresist layers  220  and  230 , and each block of the photoresist layer  230  overlying the center four neighboring blocks of the photoresist layer  220 , openings  240  are formed without rounded comers as shown in FIG. 1B. This is because that the width of the blocks is larger than the pitch, and the openings  240  defined by the pitches of the superposing photoresist layers  220 ,  230  have width and length smaller than the blocks. The rounded comers of the photoreist layers  220  and  230  overlap with each other can are thus eliminated with each other.  
         [0022]    [0022]FIG. 2C shows a cross sectional view of the openings  240  along the cutting line II-II′ of FIG. 2B. Using the photoresist layers  220  and  230 , the insulation layer  210  is etched to form the contact hole/via holes  250 . As the openings  240  are defined by the straight lines of the sides of four staggering neighboring blocks of the photoresist layers  220  and  230 , the openings  240  are thus formed with rectangular shapes without rounded comers.  
         [0023]    In this embodiment, two photoresist layers with patterns of blocks are formed. Though the blocks are formed with rounded corners. These corners are eliminated with each other by superposing the photoresist layers in a staggered way. As a result, a contact/via hole with a rectangular pattern and without rounded corner. The shape, cross sectional area and resistance can thus be precisely controlled.  
         [0024]    The application can be applied to formation of trench capacitor of a dynamic random access memory since the bottom electrode of the trench capacitor is formed by forming an insulation layer first, followed by forming an opening in the insulation opening. A bottom electrode plate is further formed in the opening. This is very similar to the formation of a contact/via hole.  
         [0025]    Other embodiments of the invention will appear to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples to be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.