Abstract:
A temperature sensor with a plurality of temperature sense points based on a bandgap reference circuit providing negative temperature coefficient reference voltages and a positive temperature coefficient reference voltage. All negative temperature coefficient reference voltages have the same slope and the same spacing from each other. The intercept points between the negative temperature coefficient reference voltages and the positive temperature coefficient reference voltage determine the temperature sense points. Efficient calibration of the spacing of the temperature sense points is provided by a tap on a programmable resistor in the positive temperature coefficient reference circuit. Efficient calibration of the absolute temperature is provided by second programmable resistors in a circuit driven by two current sources. The calibration of one temperature point equally applies to all other second programmable resistors.

Description:
RELATED PATENT APPLICATION 
   ET04-010, LOW VOLTAGE BANDGAP REFERENCE (BGR) CIRCUIT, title filing date: Feb. 11, 2005, Ser. No. 11/056,796, assigned to a common assignee. 
   BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The invention relates to temperature-stabilized sub-1-V bandgap reference voltage circuits, and more particularly to a circuit using a low supply voltage with a plurality of temperature sensors. Programmable adjustable resistors are employed to calibrate the slope (span) and the absolute temperature. 
   2. Description of the Related Art 
   Temperature sensors with high precision based on bandgap reference (BGR) circuits which operate in the sub-1-V bandgap reference region using a low voltage power supply are necessary in many applications. Particularly desirable are circuits with multiple temperature sensors where the temperature sensors track each other very closely without requiring complex and extensive circuits placing undue demands on expensive chip real estate and where the programming expense for tracking of the alignment of the temperature sensors is kept to a minimal. The front end of such a circuit demands a low voltage reference. However, it is difficult to approach a stable operation in conventional bandgap reference (BGR) circuits when the supply voltage is under 1.5 V. 
   Such a circuit is known from the above referenced Related Patent Application, which is expressly referenced herewith. In particular, this circuit produces positive and negative reference voltages based on the area ratio of 1:M of two diode type devices or diode-connected transistors and the ratio of two resistive means. Secondly, these two reference voltages are driving a summing circuit, each using current sources and resistive means to generate a current which is dependent on the ratio of the positive reference voltage and a resistive means, and the ratio of the negative reference voltage and another resistive means. These currents are then summed using a final resistive means which produces the fractional temperature-independent sub-bandgap reference voltage. The magnitude of the fractional, temperature independent sub-bandgap reference voltage is determined by selecting a specific value for that final resistive means. 
   A review U.S. Patents and U.S. Patent Applications relating to temperature sensors and/or calibration of temperature sensors has yielded: 
   U.S. Patent Application Publication 2004/0227651 (Furuichi) discloses an A/D-conversion circuit, a temperature-sensor circuit, and an integrated circuit, and a method of adjusting the temperature sensor circuit. The invention comprises a reference voltage generation circuit, a fuse circuit (the adjustment circuit), a current generation circuit, a current/voltage conversion circuit and the aforementioned A/D-conversion circuit. The latter further comprises a voltage generation circuit, other digital circuits and the digital output. The proposed array of analog and digital circuits converts an analog signal into digital data where the conversion voltage is not sensitive to noise. This is a complex and expensive circuit using a lot of chip real estate, but does not provide programmable calibration.
 
U.S. Pat. No. 6,828,847 (Marinca) describes a bandgap reference circuit for producing a stable temperature corrected voltage reference suitable for CMOS fabrication. The circuit produces a voltage reference which is entirely temperature stable over a reasonable temperature range by correcting the temperature curvature of the CTAT base-emitter voltage. However the circuit is not capable of providing multiple temperature outputs with programmable calibration.
 
U.S. Pat. No. 6,824,307 (Vail et al.) teaches the use of a capacitor in series with a circuit element as temperature sensor and a controller, where the circuit element has a resistance that varies with temperature, such as a thermistor. The controller is for charging/discharging the capacitor through the circuit element, measuring the charging/discharging time to a predetermined threshold and determining a temperature based upon the charging/discharging time. This circuit is essentially an RC circuit which may also include a calibration resistor for higher accuracy.
 
U.S. Pat. No. 6,377,110 (Cooper) presents a temperature sensing circuit which employs a silicon diode to provide a highly linear temperature dependent voltage, along with subsequent signal processing stages, either mixed-mode or digital, that collectively implement, through two-point calibration, independent adjustment of slope and output offsets. This circuit provides calibration but no programming capability for multiple temperature point outputs.
 
   It should be noted that none of the above-cited examples of the related art satisfies the requirement of multiple temperature sensors combined with easy and efficient programming for close tracking and with a low demand on valuable chip real estate. The invention described hereafter answers these requirements. 
   SUMMARY OF THE INVENTION 
   It is an object of at least one embodiment of the present invention to provide a circuit and a method for a precise temperature sensor with fast programmable calibration. 
   It is another object of the present invention to provide a plurality of temperature sensors with selectable spacing between temperature points with simple calibration. 
   It is yet another object of the present invention to provide programmable resistive means to adjust the absolute magnitude of the temperature sensors. 
   It is still another object of the present invention to calibrate the slope of the temperature window between simulation and hardware. 
   It is a further object of the present invention is to calibrate the absolute temperature between simulation and hardware with a single measurement and a single programming adjustment. 
   These and many other objects have been achieved by providing a bandgap reference circuit with first and second reference voltages (VBE 1  and VPos 1 ) with a negative and a positive temperature coefficient, respectively. The two reference voltages each drive a current source with reference resistors Rn and Rp, respectively. A plurality of temperature sensing circuit (depending on the number of temperature points desired) are couple to the current sources. Part of each the temperature sensor circuit is a summing circuit which sums the two current sources and where the summing node is temperature independent based on the selection of resistors Rn and Rp. Coupled between this summing node and a reference potential is a programmable resistor Rb which enables fast calibration of the absolute temperature of the temperature points. This is done by measuring the hardware temperature of a single absolute temperature point and then to adjust it via programming to match the simulation value. The same programming value is then used to program the adjustment value for all the other temperature sensors. Another resistor Re coupled between the programmable resistor and the summing node determines the spacing between the temperature points. When this resistor Re increases uniformly for each of the temperature sensor circuits then the spacing of the temperature points is also uniform. Another resistor Rc coupled between the summing point and the current source with resistor Rn determines the actual negative temperature coefficient slope of voltages VN 0  to VN 3 . A tap in the programmable resistor R 2 , which generates VPos 1 , provides a second reference voltage VPos 2  also with a positive temperature coefficient. The intercept points between VN 0  to VN 3  and VPos 2  determine the spacing of the temperature points T 0  to T 3 . The spacing of the temperature points T 0  to T 3  is further determined by the slope of reference voltage VPos 2  which is adjustable by the programmable resistor R 2 . VPos 2  and VN 0  to VN 3  serve as inputs to amplifiers which generate the temperature sense points VT 0  to VT 3 . The calibration of the slope of the temperature window proceeds in the following manner: check the spacing between temperature points (preferably the two points farthest apart, e.g. T 0  and T 3 ) by comparing the hardware and simulation results and adjust then the slope of VPos 2  via the tap on programmable resistor R 2 . 
   These and many other objects and advantages of the present invention will be readily apparent to one skilled in the art to which the invention pertains from a perusal of the claims, the appended drawings, and the following detailed description of the preferred embodiments. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIGS. 1   a–c  are circuit diagrams of the preferred embodiment of the present invention. 
       FIG. 2  is a graph of the positive and the four negative temperature coefficient voltage nodes of the circuits of  FIGS. 1   a–c , where the intersections mark the temperature points. 
       FIG. 3  is a graph of a simulation of a positive and seven negative temperature coefficient voltage nodes, where the intersections mark the temperature points. 
       FIG. 4  is a block diagram of the method of the present invention. 
     Use of the same reference number in different figures indicates like elements. 
   

   DESCRIPTION OF THE PREFERRED EMBODIMENT 
   Circuits  100  of  FIG. 1   a ,  200  of  FIG. 1   b , and  300  of  FIG. 1   c  comprise the preferred embodiment of a precise temperature sensor with smart calibration. 
     FIG. 100  is a bandgap reference circuit identical to the referenced Related Patent Application with the exception that resistor R 2  is a programmable resistor which can be programmed by the different pass-gates as indicated. The common output node of these pass-gates is Pos 2  and provides a voltage VPos 2 . When programmed, the resistance seen between node Pos 2  and VSS is designated as R 2 ′. Former node POS is relabeled Pos 1  and provides voltage VPos 1 . 
   Circuit  200  is similar to the summing circuit of the Related Patent Application, including the connections to circuit  100 , but has been expanded to provide means for e.g. four temperature sensors  210 ,  211 ,  212 , and  213 , and the single current mirror driven by each by the outputs of op-amps OA 2 , OA 3  was increased to four each. Resistor Rn (at node N) and resistor Rp (at node P) provide the same function (choosing the appropriate ratio of Rn/Rp secures a temperature independent voltage VB 0 , VB 1 , VB 2 , and VB 3 ) as described in the Related Patent Application. For ease of identification, current mirrors driven by op-amp OA 2  and OA 3  will be called left and right current mirrors, respectively, without identifying these current mirrors individually. The four temperature sensors are similar in structure with only small variations to provide different temperature sense points. Typically each temperature sensor is a serial string of resistor Rc and a programmable resistor Rb coupled between a left current mirror and a reference potential VSS. The node between resistor Rc and the left current mirror is labeled N 0 , N 1 , N 2 , and N 3 , and delivers output voltages VN 0 , VN 1 , VN 2 , and VN 3 , for temperature sensors  210 ,  211 ,  212 , and  213 , respectively. The other end of each resistor Rc is coupled to a right current mirror and is labeled node B 0 , B 1 , B 2 , and B 3 , having voltages labeled VB 0 , VB 1 , VB 2 , and VB 3 , respectively. Temperature sensors  211 ,  212 , and  213  have resistors  1 Re,  2 Re, and  3 Re coupled between nodes B 1 , B 2 , and B 3  and the respective resistor Rb. Note that temperature sensor  210  is without such a resistor Re. The uniform step-wise increase of Re defines the spacing between the temperature points; this will become more apparent upon studying the set of equations below. The voltage drop from the left current mirror to VSS for all four temperature sensors comprises three distinct components: 
   The constant voltage drop, via current from left current mirror only, across Rc, 
   The constant, but adjustable (programmable) voltage drop, via currents from left and right current mirrors, across Rb and 
   The voltage drop, via currents from left and right current mirrors, across the stepwise varied resistive component Re which goes from zero, to  1 Re,  2 Re, and  3 Re for temperature sensors  210 ,  211 ,  212 , and  213 , respectively. 
   While the invention has been shown as changing Re monotonically, where the increase is on an integer basis, it is understood that this is by way of example only and does not reflect on the scope and intent of the invention and that any change to Re, fractional or otherwise, is also possible. 
   Circuit  300  comprises amplifiers A 0 , A 1 , A 2 , and A 3 , their minus(−) inputs coupled to nodes N 0 , N 1 , N 2 , and N 3 , respectively, while their positive (+) inputs are coupled to node Pos 2 . When the voltage VPos 2  at the + input becomes more positive than the voltage at the respective—input then the respective output VT 0 , VT 1  VT 2 , or VT 3  goes positive. 
   It is obvious to those skilled in the art that the description of four temperature sensor outputs is by way of example only and that the number of sensor outputs may be both more or less without limiting the intent of the present invention. 
   From inspection of circuits  100 ,  200 , and  300  we can generate the equations for voltages VN 0  to VN 3 , and VB 0  to VB 3 : 
   
     
       
         
           
             
               
                 
                   VN 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   0 
                 
                 = 
                   
                 ⁢ 
                 
                   
                     [ 
                     
                       
                         VBE 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         1 
                         * 
                         
                           ( 
                           
                             1 
                             / 
                             Rn 
                           
                           ) 
                         
                       
                       + 
                       
                         VPos 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         1 
                         * 
                         
                           ( 
                           
                             1 
                             / 
                             Rp 
                           
                           ) 
                         
                       
                     
                     ] 
                   
                   * 
                 
               
             
           
           
             
               
                   
                 ⁢ 
                 
                   Rb 
                   + 
                   
                     VBE 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     1 
                     * 
                     
                       ( 
                       
                         Rc 
                         / 
                         Rn 
                       
                       ) 
                     
                   
                 
               
             
           
           
             
               
                 = 
                   
                 ⁢ 
                 
                   
                     VB 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     0 
                   
                   + 
                   
                     VBE 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     1 
                     * 
                     
                       ( 
                       
                         Rc 
                         / 
                         Rn 
                       
                       ) 
                     
                   
                 
               
             
           
         
       
     
     
       
         
           
             
               
                 
                   VN 
                   ⁢ 
                   
                       
                   
                   ⁢ 
                   1 
                 
                 = 
                   
                 ⁢ 
                 
                   
                     [ 
                     
                       
                         VBE 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         1 
                         * 
                         
                           ( 
                           
                             1 
                             / 
                             Rn 
                           
                           ) 
                         
                       
                       + 
                       
                         VPos 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         1 
                         * 
                         
                           ( 
                           
                             1 
                             / 
                             Rp 
                           
                           ) 
                         
                       
                     
                     ] 
                   
                   * 
                 
               
             
           
           
             
               
                   
                 ⁢ 
                 
                   
                     ( 
                     
                       Rb 
                       + 
                       
                         1 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         Re 
                       
                     
                     ) 
                   
                   + 
                   
                     VBE 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     1 
                     * 
                     
                       ( 
                       
                         Rc 
                         / 
                         Rn 
                       
                       ) 
                     
                   
                 
               
             
           
           
             
               
                 = 
                   
                 ⁢ 
                 
                   
                     VB 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     1 
                   
                   + 
                   
                     VBE 
                     ⁢ 
                     
                         
                     
                     ⁢ 
                     1 
                     * 
                     
                       ( 
                       
                         Rc 
                         / 
                         Rn 
                       
                       ) 
                     
                   
                 
               
             
           
         
       
     
   
                   VN   ⁢           ⁢   2     =       ⁢       [       VBE   ⁢           ⁢   1   *     (     1   /   Rn     )       +     VPos   ⁢           ⁢   1   *     (     1   /   Rp     )         ]     *                     ⁢       (     Rb   +     2   ⁢           ⁢   Re       )     +     VBE   ⁢           ⁢   1   *     (     Rc   /   Rn     )                     =       ⁢       VB   ⁢           ⁢   2     +     VBE   ⁢           ⁢   1   *     (     Rc   /   Rn     )                                   VN   ⁢           ⁢   3     =       ⁢       [       VBE   ⁢           ⁢   1   *     (     1   /   Rn     )       +     VPos   ⁢           ⁢   1   *     (     1   /   Rp     )         ]     *                     ⁢       (     Rb   +     3   ⁢           ⁢   Re       )     +     VBE   ⁢           ⁢   1   *     (     Rc   /   Rn     )                     =       ⁢       VB   ⁢           ⁢   3     +     VBE   ⁢           ⁢   1   *     (     Rc   /   Rn     )                     
where
   VBE 1˜−1.5  mV/K      VT˜+ 0.087  mV/K    
We can choose the appropriate ratio of Rn/Rp to get a temperature independent VB 0 , VB 1 , VB 2 , and VB 3 .
 
From inspection of the above equation for VN 0 , we can see that VB 0  is defined as:
   VB 0=[ VBE 1*(1 /Rn )+ VPos 1*(1 /RP )]* Rb    
It follows that
   VB 3− VB 2= VB 2− VB 1= VB 1− VB 0=[ VBE 1* (1 /Rn )+ VPos 1*(1 /Rp )]* Re =constant at any temperature 
   Therefore, the slopes of VN 0 , VN 1 , VN 2 , and VN 3  are all the same, as illustrated in Graph I of  FIG. 2 , Curves VN 0 , VN 1 , VN 2 , and VN 3 . The intercept point of aforementioned Curves with Curve VPos 2  defines the temperature points T 0 , T 1 , T 2 , and T 3  on the X axis of Graph I. It is obvious from inspection of Graph I that a change in the slope of VPos 2  changes the intercept points and therefore the spacing of the aforementioned temperature points along the X axis. 
   Graph II of  FIG. 2 , which like Graph I is a graph of temperature in ° C. on the X axis versus voltage on the Y axis, illustrates with Curves VT 0 , VT 1 , VT 2 , and VT 3  the output VT 0 , VT 1 , VT 2 , and VT 3  of amplifiers A 0 , A 1 , A 2 , and A 3  at temperature points T 0 , T 1 , T 2 , and T 3  on the X axis. 
   The graph of  FIG. 3  is the result of computer simulation of circuits  100 ,  200  and  300 , where the number of temperature sensor outputs was increased to seven. Consequently there are seven output voltages VN 0  to VN 6 , producing seven intercept point with VPos 2 , and seven temperature points with outputs VT 0  to VT 6 . The X axis displays the temperature in ° C., the Y axis displays the output voltage in millivolts. The simulation demonstrates the linearity of the temperature sensors due to the design consideration given to circuits  100  and  200 . The graph of  FIG. 3  shows that outputs VN 0  to VN 6  all range between 200 and 500 mV. 
   Because VB 3 −VB 2 =VB 2 −VB 1 =VB 1 −VB 0 , T 3 −T 2 =T 2 −T 1 =T 1 −T 0  there is before the programming of resistors R 2  and Rb, a two-step test for the adjustment of the hardware temperature sensors. 
   Step 1: Calibration of Slope of the Temperature Window Between Simulation and Hardware. 
   
       
       
         
           Test the temperature window between T 3  and T 0  in the hardware, (i.e., the temperature window between the VT 0  and the VT 3  transition) 
           If the measured window is larger than that predicted by the simulation, one can program resistor R 2 ′ to increase the slope of VPos 2  to fit the simulation value. 
           If the measured window is smaller than that predicted by the simulation, one can program the R 2 ′ to decrease the slope of VPos 2  to fit the simulation value.
 
Step 2: Adjust the Absolute Temperature Between Simulation and Hardware.
 
           Select T 3  (or one of the other points) and measure its absolute value in the hardware, (the temperature of the VT 3  transition). 
           One can program Rb to adjust the temperature sensor T 3  to match the simulated T 3  value. While one could adjust all the temperature sensors T 0 , T 1 , and T 2 , this is not necessary because when one gets the difference of the measured T 3  and the simulated T 3 , one can then predict the differences of the other values (T 2 , T 1 , and T 0 ), because T 3 −T 2 =T 2 −T 1 =T 1 −T 0  from the above discussion, or because the slopes of VN 0 , VN 1 , VN 2 , and VN 3  are all the same and T 3 −T 0  is calibrated between hardware and simulation. 
           Therefore one does not need to calibrate all of the temperature sensors one by one, and one can save much testing and adjusting time. 
         
       
     
  
   When the accuracy of the temperature sensor is very important, then calibration on a die-by-die basis is required. 
   Referring to  FIG. 4 , we now describe the method of providing a temperature sensor with programmable calibration:
     Block  1  provides first and second reference voltages with negative and positive temperature coefficients, respectively, where the second reference voltage is generated across a first programmable resistor and which when programmed provides a third reference voltage;   Block  2  provides amplifying circuits to generate first and second currents proportional to the first and the second reference voltage;   Block  3  connects a plurality of serially coupled first resistors and second programmable resistors between the source of the first current and a reference voltage;   Block  4  sums the first and the second current by coupling the source of the second current to the junction of the first resistor and the second programmable resistor;   Block  5  generates a temperature sense point at the intercept of the third reference voltage with the voltage generated across each of the combinations of first resistors and second programmable resistors.   

   While the invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the invention.