Abstract:
According to one aspect of the invention a method of constructing an electronic assembly is provided. The electronic assembly is constructed from a semiconductor package including a package substrate and a semiconductor chip mounted to the package substrate, a thermally conductive member, and a substance including indium. The method comprises securing the thermally conductive member and the semiconductor package in a selected orientation relative to one another with the thermally conductive member on a side of the semiconductor chip opposing the package substrate and with the substance located between the semiconductor chip and at least a portion of the thermally conductive member. The substance is thermally coupled to the semiconductor chip on one side and thermally coupled to the portion of the thermally conductive member on an opposing side.

Description:
The present patent application is a Divisional of prior application Ser. No. 09/394,860, filed Sep. 13, 1999, now U.S. Pat. No. 6,461,891 entitled A METHOD OF CONSTRUCTING AN ELECTRONIC ASSEMBLY HAVING AN INDIUM THERMAL COUPLE AND AN ELECTRONIC ASSEMBLY HAVING AN INDIUM THERMAL COUPLE. 

   BACKGROUND OF THE INVENTION 
   1). Field of the Invention 
   This invention relates to a method of constructing an electronic assembly and to an electronic assembly which may be made according to the method of the invention. 
   2). Discussion of Related Art 
   Integrated circuits are formed on semiconductor wafers. The wafers are then sawed into semiconductor chips. Each semiconductor chip is then mounted to a package substrate. An integrated circuit within the semiconductor chip can be powered up and data signals can be sent to and received from the integrated circuit via the package substrate. 
   When the integrated circuit is powered up, heat is generated on the semiconductor chip which could cause destruction of the integrated circuit if the heat is not transferred away. A thermally conductive plate is often located next to the semiconductor chip. A thermally conductive grease may be located between the semiconductor chip and the thermally conductive plate. The thermally conductive grease contacts the semiconductor chip and the thermally conductive plate on opposing sides and acts as a thermal couple between the semiconductor chip and the thermally conductive plate. Heat can then be transferred from the semiconductor chip through the grease to the thermally conductive plate, from where heat can be transferred to a heat sink or other device and be convected into the ambient. 
   The use of a grease as a thermal couple is often unsuitable for high power applications. A thermally conductive grease does not transfer a sufficient amount of heat when a large amount of heat is generated on a semiconductor chip. One reason why a thermally conductive grease is not a good conductor of heat is because there are no metals in a thermally conductive grease. Metals, on the other hand, are usually also electrically conductive. The use of a metal as a thermal couple is therefore usually avoided because an electrically conductive metal may cause shorting between components of the semiconductor chip or the package substrate. 
   SUMMARY OF THE INVENTION 
   According to one aspect of the invention a method of constructing an electronic assembly is provided. The electronic assembly is constructed from a semiconductor package including a package substrate and a semiconductor chip mounted to the package substrate, a thermally conductive member, and a substance including indium. The method comprises securing the thermally conductive member and the semiconductor package in a selected orientation relative to one another with the thermally conductive member on a side of the semiconductor chip opposing the package substrate and with the substance located between the semiconductor chip and at least a portion of the thermally conductive member. The substance is thermally coupled to the semiconductor chip on one side and thermally coupled to the portion of the thermally conductive member on an opposing side. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention is further described by way of example with reference to the accompanying drawings wherein: 
       FIG. 1  is a sectioned side view of a lid which is used in constructing an electronic assembly according to an embodiment of the invention; 
       FIG. 2  is a sectioned side view of the lid after a first sheet of a first alloy is inserted into a recess of the lid; 
       FIG. 3  is a sectioned side view after the first sheet is heated to cause melting of the first alloy; 
       FIG. 4  is a sectioned side view of the lid after the first alloy is solidified; 
       FIG. 5  is a sectioned side view of the lid, further showing a second sheet that is located within the recess; 
       FIG. 6  is a sectioned side view illustrating how the combination of  FIG. 5  is heated and how voids in the first alloy are massaged out; 
       FIG. 7  is a sectioned side view of the lid, the first alloy, and the first sheet after being cooled; 
       FIG. 8  is a sectioned side view of components of an electronic assembly including the lid, the first alloy, the second sheet, and further including a semiconductor package having a package substrate and a semiconductor chip, and further including a third sheet of a second alloy; 
       FIG. 9  is a sectioned side view of the components of  FIG. 8  after the second sheet is located on the third sheet; 
       FIG. 10  is a sectioned side view of the components of  FIG. 9  after the first alloy, the second sheet, and the third sheet are heated to cause melting thereof into a mixture; and 
       FIG. 11  is a sectioned side view of the components of  FIG. 10  after cool down and solidification of the mixture. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 1  to  FIG. 11  of the accompanying drawings illustrate a method of constructing an electronic assembly. An indium containing alloy is located within a recess within a lid. The indium containing alloy is then heated which causes undesirable voids to form therein due to reaction between the alloy and the material of the lid. The voids are massaged out by heating the alloy and directing a jet of air onto the alloy. A sheet of indium, having a higher melting temperature than the alloy, is used to prevent splattering of the alloy when the jet of air impinges thereon. The cap and the alloy are then assembled together with a semiconductor package in an electronic assembly. The alloy, primarily because of the use of indium, has good thermal conductivity. The alloy is an electric insulator which ensures that components of the semiconductor package are electrically isolated from one another. The alloy does not break through into the material of a package substrate of the semiconductor package. The alloy also has a relatively low melting temperature which makes it possible to melt the alloy without causing destruction of an integrated circuit in a semiconductor chip of the semiconductor package. Regardless thereof that the alloy causes voids when being heated, the voids are massaged away from a heat conducting portion of the alloy. 
     FIG. 1  of the accompanying drawings illustrates a thermally conductive lid  10  which is used in constructing an electronic assembly according to the invention. The lid  10  may be made of a material such as copper having good thermal conductivity. The lid  10  includes a central portion  12  and four sidewalls  14 . A recess  16  is defined above the central portion  12  within the sidewalls  14 . 
   The lid  10  is cleaned and then, as shown in  FIG. 2 , a first sheet  18  of a first alloy is inserted into the recess  16 . The first sheet  18  is sized to fit between the sidewalls  14  and almost fills the recess  16 . The first alloy preferably includes mass ratios of 44.7% bismuth, 22.6% lead, 19.1% indium, 8.3% tin, and 5.3% cadmium. A sheet of an alloy of this kind can be obtained from Indium Corporation of America in Utica, N.Y. The choice and characteristics of such an alloy will, be evident from the description that follows. 
   The lid  10  and the first sheet  18  are then heated to above the melting temperature of about 115° C. of the first alloy to cause melting of the first alloy  18  as shown in FIG.  3 . The indium in the first alloy  18  reacts with the copper of the lid  10  to cause bubbles or voids  20  within the first alloy  18 . Voids within the first alloy  18  are undesirable for heat conduction purposes. The number of voids  20  are however much fewer than when pure indium is used instead of the alloy  18 . 
   The first alloy  18  is then allowed to cool to cause solidification thereof as shown in FIG.  4 . The voids  20  are then trapped within the solidified first alloy  18 . 
   As shown in  FIG. 5 , a second sheet  22  is then located on top of the second alloy  18 . The second sheet  22  is typically about 2 mm thick and is preferably made of pure indium. The second sheet  22  is located up to a rim  24  of the lid  10 . 
   As shown in  FIG. 6 , infrared radiation  26  is then used to heat the lid  10  from below. Heat is transferred from the lid  10  to the first alloy  18 . The combination of the lid  10 , the first alloy, and the second sheet  22  is heated to a temperature which is above the melting temperature of 115° C. of the first alloy  18 . The substantially pure indium of the second sheet  22  has a melting point of about 135° C. The combination of the cap  10 , the first alloy  18 , and the second sheet  22  is heated to a temperature which is below the 135° C. melting point of the second sheet  22 . The first alloy  18  is thereby melted but the second sheet  22  remains solid. The lower melting point of the first alloy  18 , when compared to the substantially pure indium of the second sheet  22 , is primarily due to the inclusion of the lead within the first alloy  18 . The lead is preferably present between 0.5% and 30% by mass. 
   A nozzle  28  is used to direct a jet of air  30  onto a central portion of the second sheet  22 . The jet of air  30  impinges at substantially right angles onto the second sheet  22  and spreads from a central portion of the second sheet  22  outwardly. Because of deflection of the jet of air  30 , a force is created on the second sheet  22  from where the force transferred to the first alloy  18 . The force created by the air massages the voids  20  outwardly away from a central portion  32  of the first alloy  18 . Most of the voids  20  escape from between an interface between the rim  24  and an edge of the second sheet  22 . Some voids  20  may still remain in outer portions of the first alloy  18 . The central portion  32  of the first alloy  18  is however substantially or completely free of voids. The first alloy  18  is then allowed to cool to cause solidification thereof as shown in FIG.  7 . Some voids  20  may be located in outer regions of the solidified first alloy  18 . The second sheet  22  is located on the solidified second alloy  18 . 
     FIG. 8  illustrates the cap  10 , including the first alloy  18  and the second sheet  22  which is inverted, and a semiconductor package  34  which is also used for constructing an electronic assembly according to an embodiment of the invention. The semiconductor package includes a package substrate  38  and a semiconductor chip  40 . 
   The package substrate  38  is at least partially made of an dielectric material. The dielectric material may for example be a resin such as bismateinite triazine resin which forms a surface thereof. An array of solder balls in the form of a ball grid array  42  is located on a lower surface of the package substrate  38 . 
   The semiconductor chip  40  is typically made of a semiconductor material such as silicon and has an integrated circuit (not shown) formed therein. An array of solder bumps  44  are formed on an upper surface of the semiconductor chip  40  containing the integrated circuit and the semiconductor chip  40  is then flipped as shown in  FIG. 8  so that the solder bumps  44  are at the bottom according to a process commonly referred to as “controlled collapse chip connect” (C4). The semiconductor chip  40  is located on an upper surface of the package substrate  38  with the solder bumps  44  located between the package substrate  38  and the semiconductor chip  40 . The semiconductor package  34  is then heated and allowed to cool, thereby causing attachment of the other bumps  44  to the package substrate  38 . 
   A third sheet  50  of a second alloy is located over the semiconductor chip  40 . The composition of the second alloy of the third sheet  50  may be the same as the composition of the first alloy  18 . 
   As shown in  FIG. 9 , a lower surface the second sheet  22  is then brought into contact with an upper surface of the third sheet  50  so that the combination of the second sheet  22 , the first alloy  18 , and the lid  10  rests on the third sheet  50 . 
   The combination shown in  FIG. 9  is then heated to a temperature above 135° C. The first and second alloys  18  and  50  and the second sheet  26  melt at a temperature above 135° C. The combination shown in  FIG. 9  is never heated to a temperature above 150° C., so as to avoid destruction of an integrated circuit in the semiconductor chip  40 . When the first and second alloys  18  and  50  and the second sheet  22  melt, the lid  10  drops onto the package substrate  38  is shown in FIG.  10 . The melted material of the third sheet  50  acts as a wetting layer to ensure proper thermal coupling onto an upper surface of the semiconductor chip  40 . A melted mixture  52  of the first and second alloys  18  and  50  and the indium of the second sheet  26  fill an entire area between the semiconductor chip  40  and the central portion  12  of the lid  10 . The melted mixture  52  is therefore in contact with an upper surface of the semiconductor chip  40  and a lower surface of the central portion  12  of the lid  10 . 
   Because of the choice of the materials of the melted mixture  52 , the mixture  52  does not break into the dielectric material of the package substrate  38  as may happen if another metal is used instead of the mixture  52 . 
   The combination as shown in  FIG. 10  is then allowed to cool to cause solidification of the mixture  52  as shown in FIG.  11 . An epoxy bead  54  is then located within a filleted interface between the lid  10  and the package substrate  38 . The epoxy bead  52  secures the lid  10  to the package substrate  38 , thereby finalizing construction of an electronic assembly  60 . 
   The mixture  52  provides an efficient thermal coupling between the semiconductor chip  40  and the lid  10 , primarily because of the use of a metal in the form of indium in the mixture  52 . The indium in the mixture  52  is preferably at least 1% by mass to provide an efficient thermal couple, although a higher percentage such as at least 10% is a much better thermal conductor. The mixture, including the indium, is an electric insulator, so that components of the semiconductor package  34 , for example the solder bumps  44  or electric traces on the package substrate  38 , are electrically isolated from one another even if the mixture  52  contacts these components. It should be noted that a central portion  32 , through which heat is conducted from the semiconductor chip  40  to the lid  10 , is substantially free of voids, as such ensuring that there is an efficient heat conduction path between the semiconductor chip  40  and the lid  10 . 
   While certain exemplary embodiments have been described and shown in the accompanying drawings, it is to be understood that such embodiments are merely illustrative and not restrictive of the current invention, and that this invention is not restricted to the specific constructions and arrangements shown and described since modifications may occur to those ordinarily skilled in the art.