Abstract:
The present invention discloses a wafer level image sensor packaging structure and a manufacturing method of the same. The manufacturing method includes the following steps: providing a silicon wafer, dicing the silicon wafer, providing a plurality of transparent lids, fabricating a plurality of semi-finished products, performing a packaging process, mounting solder balls, and cutting an encapsulant between the semi-finished products. The manufacturing method of the invention has the advantage of being straightforward, uncomplicated, and cost-saving. Thus, the wafer level image sensor package structure is lightweight, thin, and compact. To prevent the image sensor chip from cracking on impact during handling, the encapsulant will be arranged on the lateral sides of the semi-finished products during the packaging process.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to wafer level image sensor packaging structures and manufacturing methods of the same, and more particularly, to a wafer level image sensor packaging structure and a manufacturing method of the same applicable to batch fabrication of the image sensor packaging structure. 
         [0003]    2. Description of Related Art 
         [0004]    In recent years, digital imaging electronic products are becoming more popular. Camera cell phones, digital cameras, and digital video recorders have evolved into such a generation that they have become indispensable to every person. Given the increasing demand for imaging electronic products, it is easy to conceive the rapid speed at which the image sensor market expands. 
         [0005]    Among the conventional methods for packaging image sensors are two predominant ones, namely Chip On Board (COB) and Chip Scale Package (CSP). In COB, an image sensing chip is adhesively attached to a substrate, and then the image sensing chip is electrically connected to the substrate by means of metal wires. As a result, the image sensor packaging structure is of a relatively large size and a considerable height when packaged. In addition, during the COB packaging period, the image sensor packaging structure is susceptible to dust intrusion or moisture permeation and thus likely to have a low conforming rate. Hence, COB has a high demand for a cleanroom that must be highly clean. As a result, COB incurs high process costs. 
         [0006]    CSP is qualified as package scale with its length no greater than 1.2 times and its area no greater than 1.44 times that of the bare die by visual inspection. Hence, compared to COB, a packaging structure combining chip scale package with chip level package can leave out substrates and metal wires thereof, so as to cut the cost of packages and go with the trend of compact size electronic products nowadays. 
         [0007]    However, conventional wafer level image sensor packaging structures have a drawback, that is, the image sensing chip is thin and thus likely to crack, which is particularly the case where, upon completion of a packaging process, all the lateral sides of the image sensing chip are exposed and thus more likely to be hit during a back-end process for assembling an image sensor, thereby resulting in a decrease of the product conforming rate. 
       SUMMARY OF THE INVENTION 
       [0008]    The present invention relates to a wafer level image sensor packaging structure and a manufacturing method wherein a through-silicon vias (TSV) wafer is used as a silicon wafer. Hence, compared with a conventional COB process, the wafer level image sensor packaging structure and the manufacturing method of the present invention dispense with materials, such as metal wires and substrates, cut packaging costs, and streamline a process in its entirety. 
         [0009]    The present invention relates to a wafer level image sensor packaging structure and a manufacturing method whereby an encapsulant covers the lateral sides of the packaging structure and thereby prevents light leakage from the sides of the wafer level image sensor packaging structure. The encapsulant also extend to encapsulate an image sensing chip to thereby reinforce the wafer level image sensor packaging structure and prevent the image sensing chip from cracking which might otherwise arise from excessive thinness of the image sensing chip. 
         [0010]    The present invention relates to a wafer level image sensor packaging structure and a manufacturing method whereby, before a packaging process, image sensing chips are screened for being in conformity with quality requirements, and transparent lids are arranged correspondingly above high-grade image sensing chips, so as to reduce a waste of materials and increase the conforming rate. 
         [0011]    In order to achieve the above and other objectives, the present invention provides a wafer level image sensor packaging structure manufacturing method, comprising the steps of: providing a silicon wafer comprising a plurality of image sensing chips, the image sensing chips each comprising an image sensing region and a plurality of soldering pads; dicing the silicon wafer such that the silicon wafer is divided into the image sensing chips; providing a plurality of transparent lids by cutting at least one transparent panel; fabricating a plurality of semi-finished products each having the transparent lid disposed above the image sensing region of the image sensing chip, wherein a air cavity is formed between the transparent lid and the image sensing region; performing a packaging process by filling an encapsulant between the semi-finished products such that the encapsulant only covers the lateral sides of each of the semi-finished products; mounting solder balls on the soldering pads; and cutting the encapsulant between the semi-finished products. 
         [0012]    In order to achieve the above and other objectives, the present invention further provides a wafer level image sensor packaging structure, comprising a semi-finished product, a plurality of solder balls, and an encapsulant. The semi-finished product comprises: an image sensing chip comprising an image sensing region and a plurality of soldering pads, wherein the image sensing region and the soldering pads are disposed on opposing surfaces of the image sensing chip; and a transparent lid being disposed above the image sensing region of the image sensing chip and corresponding in position thereto, wherein a air cavity is formed between the transparent lid and the image sensing region. The plurality of solder balls are mounted on the soldering pads, respectively. The encapsulant is disposed along a periphery of the semi-finished products. 
         [0013]    Implementation of the present invention at least involves the following inventive steps: 
         [0014]    1. Compared with a conventional COB process, the process of the manufacturing method of the present invention is simplified and effective in dispensing with materials and reducing the height of the package structure. Thus, a wafer level image sensor package structure thus fabricated is lightweight, thin, and compact, and incurs less fabrication costs. 
         [0015]    2. An encapsulant which is disposed along the periphery of the packaging structure not only prevents light leakage from the sides of the wafer level image sensor packaging structure but also protects the image sensing chip properly by preventing the image sensing chip from cracking due to excessive thinness thereof, thereby enhancing the reliability of the packaging structure. 
         [0016]    3. High-grade image sensing chips are selected for a subsequent packaging process, so as to increase the conforming rate and avoid a waste of materials. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0017]    A detailed description of further features and advantages of the present invention is given below so that a person skilled in the art can understand and implement the technical contents of the present invention and readily comprehend the objectives, features, and advantages thereof by reviewing the disclosure of the present specification and the appended claims in conjunction with the accompanying drawings, in which: 
           [0018]      FIG. 1A  through  FIG. 2B  are schematic views of a wafer level image sensor packaging structure according to an embodiment of the present invention; 
           [0019]      FIG. 3  is a schematic perspective view of a transparent lid with a supporting frame thereon according to an embodiment of the present invention; 
           [0020]      FIG. 4  is a flow chart of a wafer level image sensor packaging structure manufacturing method according to an embodiment of the present invention; 
           [0021]      FIG. 5  is a schematic view of a silicon wafer having image sensing chips according to an embodiment of the present invention; 
           [0022]      FIG. 6  is a schematic view of a transparent panel according to an embodiment of the present invention; 
           [0023]      FIG. 7  is a schematic perspective view of a transparent lid with a gridded frame thereon according to an embodiment of the present invention; 
           [0024]      FIG. 8A  is a schematic top view of a silicon wafer having transparent lids according to an embodiment of the present invention; 
           [0025]      FIG. 8B  is a schematic view of a transparent lid correspondingly attached to an image sensing chip according to an embodiment of the present invention; 
           [0026]      FIG. 8C  is a schematic view of another transparent lid correspondingly attached to an image sensing chip according to an embodiment of the present invention; 
           [0027]      FIG. 9  is a flow chart of a method of a dispensing-based packaging process according to an embodiment of the present invention; 
           [0028]      FIG. 10A  is a schematic top view of a first carrier with semi-finished products thereon according to an embodiment of the present invention; 
           [0029]      FIG. 10B  is a schematic cross-sectional view of the first carrier with semi-finished products thereon according to an embodiment of the present invention; 
           [0030]      FIG. 11A  is a schematic top view of the first carrier and a dam thereon according to an embodiment of the present invention; 
           [0031]      FIG. 11B  is a schematic cross-sectional view of the first carrier and a dam thereon according to an embodiment of the present invention; 
           [0032]      FIG. 12  is a schematic cross-sectional view of a structure fabricated by a dispensing-based packaging process according to an embodiment of the present invention; 
           [0033]      FIG. 13  is a flow chart of a method of the molding-based packaging process according to an embodiment of the present invention; 
           [0034]      FIG. 14  is a schematic exploded view of the semi-finished products disposed in a die set according to an embodiment of the present invention; 
           [0035]      FIG. 15  is a schematic cross-sectional view of other semi-finished products disposed in the die set according to an embodiment of the present invention; 
           [0036]      FIG. 16  is a schematic cross-sectional view of yet other semi-finished products disposed in the die set according to an embodiment of the present invention; 
           [0037]      FIG. 17A  is a schematic view of a structure after die opening shown in  FIG. 15  according to an embodiment of the present invention; 
           [0038]      FIG. 17B  is a schematic view of the structure after die opening shown in  FIG. 16  according to an embodiment of the present invention; 
           [0039]      FIG. 18A  is a schematic top view of solder ball-mounted semi-finished products according to an embodiment of the present invention; 
           [0040]      FIG. 18B  is a schematic cross-sectional view of the solder ball-mounted semi-finished products showed in  FIG. 18A  according to an embodiment of the present invention; 
           [0041]      FIG. 19A  is a schematic top view of the wafer level image sensor packaging structure according to an embodiment of the present invention; 
           [0042]      FIG. 19B  is a schematic cross-sectional view of the wafer level image sensor packaging structure according to an embodiment of the present invention; and 
           [0043]      FIG. 20A  and  FIG. 20B  are schematic views of the wafer level image sensor packaging structure according to an embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0044]    Referring to  FIG. 1A  through  FIG. 2B , there are shown schematic views of a wafer level image sensor packaging structure according to an embodiment of the present invention. Referring to  FIG. 3 , there is shown a schematic perspective view of a transparent lid  120  with a supporting frame  122  thereon according to an embodiment of the present invention. 
         [0045]    Referring to  FIG. 4 , there is shown a flow chart of a wafer level image sensor packaging structure manufacturing method according to an embodiment of the present invention. Referring to  FIG. 5 , there is shown a schematic view of a silicon wafer  101  having image sensing chips  110  according to an embodiment of the present invention. Referring to  FIG. 6 , there is shown a schematic view of a transparent panel  123  according to an embodiment of the present invention. Referring to  FIG. 7 , there is shown a schematic perspective view of a transparent lid  120  with a gridded frame thereon according to an embodiment of the present invention. 
         [0046]    Referring to  FIG. 8A , there is shown a schematic top view of the silicon wafer  101  having the transparent lid  120  according to an embodiment of the present invention. Referring to  FIG. 8B , there is shown a schematic view of the transparent lid  120  corresponding in position to and attached to the image sensing chip  110  according to an embodiment of the present invention. Referring to  FIG. 8C , there is shown a schematic view of another transparent lid  120  corresponding in position to and attached to the image sensing chip  110  according to an embodiment of the present invention. 
         [0047]    Referring to  FIG. 1A ,  FIG. 1B ,  FIG. 2A , and  FIG. 2B , in this embodiment, a wafer level image sensor packaging structure comprises a plurality of semi-finished products  100 , a plurality of solder balls  200 , and an encapsulant  300 . The semi-finished products  100  comprise the image sensing chip  110  and the transparent lid  120 . 
         [0048]    The image sensing chip  110  comprises an image sensing region  111  and a plurality of soldering pads  112 . The image sensing region  111  and the soldering pads  112  are on the upper surface and the lower surface of the image sensing chip  110 , respectively, and thus the image sensing region  111  and the soldering pads  112  face opposite directions. A plurality of photosensitive elements  113  is disposed at the image sensing region  111  to fully occupy the area thereof. The photosensitive elements  113  disposed at the image sensing region  111  are arranged in an array and configured to sense light. Also, the image sensing chip  110  has vias therein. A plurality of conductive channels  115  is disposed in the vias, respectively. The conductive channels  115  are circuit structures that penetrate the image sensing chip  110 . The circuit structures extend to the lower surface of the image sensing chip  110  through a re-distribution layer. 
         [0049]    Furthermore, a plurality of conductive contacts  114  is disposed on the upper surface of the image sensing chip  110  in a manner to surround the image sensing region  111  by lining up along the boundary thereof, and is electrically connected to the photosensitive elements  113  and the conductive channels  115 . Hence, it is through the conductive contacts  114  that the photosensitive elements  113  are electrically connected to the conductive channels  115  and then electrically connected to the soldering pads  112 , respectively. 
         [0050]    The solder balls  200  are mounted on the soldering pads  112 . The solder balls  200  are arranged in the form of a ball grid array (BGA). The solder balls  200  are not only electrically connected to the soldering pads  112  but also electrically connected to the conductive channels  115  of the image sensing chip  110  through the soldering pads  112 . Hence, the solder balls  200  function as an electrical connection interface between the wafer level image sensor packaging structure and an external device (not shown). 
         [0051]    The transparent lid  120  is correspondingly disposed above the image sensing region  111  of the image sensing chip  110 . Referring to  FIG. 8B  too, the transparent lid  120  is aligned with and attached to the outer side of the image sensing region  111 , such that a air cavity  121  is formed between the transparent lid  120  and the image sensing region  111 . As shown in  FIG. 3 , the transparent lid  120  is further provided with the supporting frame  122  thereon, and the supporting frame  122  is disposed along the periphery of the transparent lid  120 , so as for an opening to be formed at the center of the transparent lid  120 . As shown in  FIG. 8C , the transparent lid  120  with the supporting frame  122  thereon is adhesively attached to the image sensing chip  110  by the supporting frame  122  in a manner that the supporting frame  122  surrounds the image sensing region  111 . 
         [0052]    The encapsulant  300  is disposed along the periphery of the semi-finished products  100 ; in other words, the encapsulant  300  encloses the semi-finished products  100 . Hence, the encapsulant  300  prevents the image sensing chip  110  from cracking which might otherwise arise from excessive thinness of the image sensing chip  110 . The encapsulant  300  comes in different forms, such as a mold compound or a liquid compound, depending on a packaging process. 
         [0053]    The liquid compound is fit for use in a dispensing-based packaging process, and the encapsulant  300  thus formed tapers slightly (as shown in  FIG. 1A  and  FIG. 1B ). The mold compound is fit for use in a molding-based packaging process, and the encapsulant  300  thus formed does not taper (as shown in  FIG. 2A  and  FIG. 2B ). Also, the encapsulant  300  can be plastics of a low transmittance (such as black plastics) for preventing light leakage from the sides which might otherwise take place during a process of fabricating the wafer level image sensor packaging structure. 
         [0054]    Referring to  FIG. 4 , there is shown a flow chart of a wafer level image sensor packaging structure manufacturing method according to an embodiment of the present invention. As shown in the drawing, the wafer level image sensor packaging structure manufacturing method comprises the steps of: providing a silicon wafer (S 100 ); dicing the silicon wafer (S 200 ); providing a plurality of transparent lids (S 300 ); fabricating a plurality of semi-finished products (S 400 ); performing a packaging process (S 500 ); mounting a plurality of solder balls (S 600 ); and cutting an encapsulant (S 700 ). 
         [0055]    The step of providing a silicon wafer (S 100 ) is described hereunder. As shown in  FIG. 5 , the silicon wafer  101  is a through-silicon vias (TSV) wafer, and the silicon wafer  101  comprises a plurality of image sensing chips  110 . As shown in  FIG. 1A , the image sensing chips  110  each comprise one said image sensing region  111  and a plurality of the soldering pads  112 . The image sensing region  111  and the soldering pads  112  are defined and disposed on opposing sides of the image sensing chips  110 , respectively; in other words, the image sensing region  111  is defined on the upper surface of the image sensing chips  110 , and the soldering pads  112  are disposed on the lower surface of the image sensing chips  110 . 
         [0056]    The step of dicing the silicon wafer (S 200 ) is described hereunder. The silicon wafer  101  is diced such that the silicon wafer  101  is divided into a plurality of said image sensing chips  110 . 
         [0057]    The step of providing a plurality of transparent lids (S 300 ) is described hereunder. As shown in  FIG. 6 , the transparent lids  120  are forming by cutting at least one transparent panel  123 . The transparent panel  123  is supported by a carrying film  124 , and is circumscribed by a frame  125  disposed on the carrying film  124 . The frame  125  is conducive to positioning the transparent panel  123  while the transparent panel  123  is being cut during a fabrication process and to transporting the transparent panel  123  during a fabrication process. 
         [0058]    Referring to  FIG. 7 , a gridded frame  126  is formed on the transparent panel  123 . The gridded frame  126  is marked with an imaginary cutting line in advance. The transparent panel  123  and the gridded frame  126  thereon are cut along the cutting line to be divided into the transparent lids  120  and a plurality of said supporting frames  122  thereon, respectively. In other words, the gridded frame  126  on the transparent panel  123  is turned into the supporting frames  122  on the transparent lids  120 , by cutting the transparent panel  123  and the gridded frame  126  along the cutting line. The gridded frame  126  is fabricated by screen printing, transfer molding, or injection molding. The gridded frame  126  is made of an epoxy. 
         [0059]    The step of fabricating a plurality of semi-finished products (S 400 ) is described hereunder. As shown in  FIG. 8A , the semi-finished products  100  each comprise one said image sensing chip  110  and one said transparent lid  120 . The transparent lid  120  is correspondingly disposed above the image sensing region  111  of the image sensing chip  110 . As shown in  FIG. 8B , the assembly process flow of the semi-finished products  100  comprises the steps of: coating an adhesive  302  along the periphery of the image sensing region  111 ; aligning the transparent lid  120  with the adhesive  302  and adhesively attaching the transparent lid  120  to the adhesive  302 ; and baking or UV-radiation curing the adhesive  302 , so as for the transparent lid  120  to be adhesively attached to and fixed to the image sensing chip  110  and for a air cavity  121  (shown in  FIG. 1A ) to be formed between the transparent lid  120  and the image sensing region  111 . Referring to  FIG. 8C , the transparent lid  120  with the supporting frame  122  thereon is adhesively attached to the adhesive  302  by the supporting frame  122 , such that the supporting frame  122  adheres to the image sensing chip  110  and surrounds the image sensing region  111 . 
         [0060]    In addition, before the assembly of the semi-finished products  100  begins, the image sensing chips  110  are screened for being in conformity with quality requirements, and then only high-grade ones of image sensing chips  110  are assembled, so as to increase the conforming rate of the wafer level image sensor packaging structure. 
         [0061]    The step of performing a packaging process (S 500 ) is described hereunder. The encapsulant  300  is filled between the semi-finished products  100 , and the encapsulant  300  only covers the lateral sides of each of the semi-finished products  100 . The process flow of the packaging process is hereunder illustrated with two types of packaging processes, namely a molding-based packaging process and a dispensing-based packaging process. 
         [0062]    Referring to  FIG. 9 , there is shown a flow chart of a method of a dispensing-based packaging process according to an embodiment of the present invention. Referring to  FIG. 10A , there is shown a schematic top view of a first carrier  400  with the semi-finished products  100  thereon according to an embodiment of the present invention. Referring to  FIG. 10B , there is shown a schematic cross-sectional view of the first carrier  400  with the semi-finished products  100  thereon according to an embodiment of the present invention. Referring to  FIG. 11A , there is shown a schematic top view of the first carrier  400  and a dam  440  thereon according to an embodiment of the present invention. Referring to  FIG. 11B , there is shown a schematic cross-sectional view of the first carrier  400  and a dam  440  thereon according to an embodiment of the present invention. Referring to  FIG. 12 , there is shown a schematic cross-sectional view of a structure fabricated by a dispensing-based packaging process according to an embodiment of the present invention. 
         [0063]    Referring to  FIG. 9 , the dispensing-based packaging process comprises the steps of: providing a first carrier (S 511 ); disposing a dam (S 512 ); introducing an encapsulant (S 513 ); and performing baking and curing (S 514 ). 
         [0064]    The step of providing a first carrier (S 511 ) is described hereunder. As shown in  FIG. 10A  and  FIG. 10B , step (S 511 ) entails disposing the semi-finished products  100  on the first carrier  400 , wherein the first carrier  400  comprises a first film  410  and a first frame  420 . The first film  410  has a first adhesive side  411 . The first film  410  is attached to one side of the first frame  420 , such that the first adhesive side  411  is exposed from inside the first frame  420  and forms a first carrying region. The semi-finished products  100  are arranged in an array within the first carrying region. The soldering pads  112  of the semi-finished products  100  rest on the first adhesive side  411 . 
         [0065]    The step of disposing a dam (S 512 ) is described hereunder. As shown in  FIG. 11A  and  FIG. 11B , the dam  440  is disposed on the first carrier  400  by forming a circular structure along the periphery of the first carrier  400  to enclose the semi-finished products  100 , such that the semi-finished products  100  are bounded by the dam  440 . Furthermore, the dam  440  can be made of an epoxy, and the height of the dam  440  has to be equal to or less than the total height of the semi-finished products  100 . 
         [0066]    The step of introducing an encapsulant (S 513 ) is described hereunder. As shown in  FIG. 12 , the encapsulant  300  is a liquid compound and thus can fill whatever space bounded by the dam  440  and between the semi-finished products  100 . The height of the dam  440  ensures that the encapsulant  300  can reach the lateral sides of the semi-finished products  100  to cover the lateral sides of the semi-finished products  100 , and ensures that surfaces of the semi-finished products  100  (that is, surfaces of the transparent lids  120 ) can be exposed. Also, the bottom sides (i.e., soldering pad-disposed sides) of the semi-finished products  100  are temporarily adhered to the first adhesive side  411 , and thus the encapsulant  300  does not cover the soldering pad-disposed sides of the semi-finished products  100 . 
         [0067]    The step of performing baking and curing (S 514 ) is described hereunder. A baking and curing process is performed on the encapsulant  300  to cure and shape the encapsulant  300  and finalize the molding process. 
         [0068]    Referring to  FIG. 13 , there is shown a flow chart of a method of the molding-based packaging process according to an embodiment of the present invention. Referring to  FIG. 14 , there is shown a schematic exploded view of the semi-finished products  100  disposed in a die set  500  according to an embodiment of the present invention. Referring to  FIG. 15 , there is shown a schematic cross-sectional view of other semi-finished products  100  disposed in the die set  500  according to an embodiment of the present invention. Referring to  FIG. 16 , there is shown a schematic cross-sectional view of yet other semi-finished products  100  disposed in the die set  500  according to an embodiment of the present invention. 
         [0069]    Referring to  FIG. 17A , there is shown a schematic view of a structure after die opening shown in  FIG. 15  according to an embodiment of the present invention. Referring to  FIG. 17B , there is shown a schematic view of the structure after die opening shown in  FIG. 16  according to an embodiment of the present invention. Referring to  FIG. 18A , there is shown a schematic top view of semi-finished products  100  having solder balls  200  mounted thereon according to an embodiment of the present invention. Referring to  FIG. 18B , there is shown a schematic cross-sectional view of the solder ball-mounted semi-finished products  100  showed in  FIG. 18A  according to an embodiment of the present invention. 
         [0070]    Referring to  FIG. 13 , the molding-based packaging process comprises the steps of: providing a first carrier (S 521 ); providing a die set (S 522 ); disposing inside a die set the first carrier having the semi-finished products thereon (S 523 ); introducing the encapsulant into the die set (S 524 ); performing pressure-holding and heating (S 525 ); and performing a post-baking process (S 526 ). 
         [0071]    The step of providing a first carrier (S 521 ) is described hereunder. Referring to  FIG. 10A  and  FIG. 10B  too, the semi-finished products  100  are arranged in an array within the first carrying region of the first carrier  400  and spaced apart from each other by a preset distance, and the semi-finished products  100  are temporarily adhered to the first adhesive side  411  by the soldering pad-disposed sides of the semi-finished products  100 . 
         [0072]    The step of providing a die set (S 522 ) is described hereunder. Referring to  FIG. 14 , the die set  500  comprises an upper half and a lower half, that is, a first die  510  and a second die  520 , respectively. Also, as shown in  FIG. 15 , the first die  510  can further comprise a vacuum adsorption buffer layer  511 . The vacuum adsorption buffer layer  511  is disposed on the inner surface of the first die  510 , wherein the inner surface of the first die  510  is a plane. Once the semi-finished products  100  are placed inside the die set  500  and the vacuum adsorption buffer layer  511  is subjected to vacuum adsorption, the vacuum adsorption buffer layer  511  will directly exert pressure upon the surfaces of the transparent lids  120  of the semi-finished products  100  and thereby prevent the surfaces of the transparent lids  120  from being contaminated due to the overflow of the encapsulant  300  fed in. 
         [0073]    The step of disposing inside the die set the first carrier having the semi-finished products thereon (S 523 ) is described hereunder. As shown in  FIG. 14 , the first carrier  400  with the semi-finished products  100  thereon is placed between the first die  510  and the second die  520  of the die set  500 . The first die  510  abuts tightly against the surfaces of the transparent lids  120  of the semi-finished products  100  due to vacuum adsorption. The second die  520  abuts against one side of the first carrier  400 . A mold cavity is formed between the die set  500  and the semi-finished products  100 . 
         [0074]    Referring to  FIG. 15 , in an embodiment where the vacuum adsorption buffer layer  511  is disposed on the inner surface of the first die  510 , the vacuum adsorption buffer layer  511  can be tightly attached to the transparent lids  120  of the semi-finished products  100  due to vacuum adsorption, and thus the transparent lids  120  are not susceptible to contamination which might otherwise result from the overflow of the encapsulant  300  fed in. 
         [0075]    Referring to  FIG. 16 , a plurality of flanges  512  is disposed on the first die  510  of the die set  500 . The flanges  512  correspond in position to the semi-finished products  100 , respectively, and abut against the transparent lids  120  on the semi-finished products  100 . Each of the flanges  512  is of a smaller cross-sectional area than the area of an adjacent one of the transparent lids  120 ; hence, each of the flanges  512  of the first die  510  abuts against a portion of the adjacent one of the transparent lids  120 . 
         [0076]    The step of introducing the encapsulant into the die set (S 524 ) is described hereunder. As shown in  FIG. 15  and  FIG. 16 , the step of introducing the encapsulant into the die set entails introducing the encapsulant  300  into a mold cavity formed between the die set  500  and the semi-finished products  100 . The encapsulant  300  is a mold compound. Once the mold cavity is filled with the encapsulant  300 , the encapsulant  300  can cover the lateral sides of the semi-finished products  100 . However, depending on the die set  500  in use, it is feasible to take any of the two options as follows: the encapsulant  300  does not cover the transparent lids  120  (as shown in  FIG. 15 ); or the encapsulant  300  covers the lateral sides of the semi-finished products  100  and the periphery of the transparent lids  120 , but the encapsulant  300  does not conceal the image sensing region  111  in principle (as shown in  FIG. 16 ). 
         [0077]    The step of performing pressure-holding and heating (S 525 ) entails holding the pressure inside the die set  500 , so as for the encapsulant  300  to transform and take shape. 
         [0078]    The step of performing a post-baking process (S 526 ) is described hereunder. As shown in  FIG. 17A  and  FIG. 17B , after the encapsulant  300  has transformed and taken shape, die opening takes place, and then the encapsulant  300  is cured by the post-baking process to thereby finalize the molding process. Referring to  FIG. 17A , there is shown is a schematic view of the semi-finished products  100  of the wafer level image sensor packaging structure fabricated upon completion of the die opening of the die set  500  shown in  FIG. 15  and upon completion of the ensuing post-baking process. Referring to  FIG. 17B , there is shown a schematic view of the die set  500  after die opening shown in  FIG. 16  according to an embodiment of the present invention. 
         [0079]    The step of mounting the solder balls (S 600 ) is described hereunder. Before mounting the solder balls  200 , it is necessary to remove from the first carrier  400  the semi-finished products  100  that have completely undergone the molding process, put the semi-finished products  100  on a second carrier  600  upside down, and expose the soldering pad-disposed sides of the semi-finished products  100 . Referring to  FIG. 18A  and  FIG. 18B , the second carrier  600  comprises a second film  610  and a second frame  620 . The second film  610  has a second adhesive side  611 . The second film  610  is attached to one side of the second frame  620 , such that the second adhesive side  611  is exposed from inside the second frame  620  and forms a second carrying region. The transparent lids  120  of the semi-finished products  100  are adhesively attached to the second adhesive side  611 . 
         [0080]    Referring to  FIG. 18A  and  FIG. 18B , the step of mounting solder balls entails mounting the solder balls  200  on the soldering pads  112 , and the solder balls  200  disposed on the soldering pads  112  are arranged in the form of a ball grid array (BGA). 
         [0081]    Referring to  FIG. 19A , there is shown a schematic top view of the wafer level image sensor packaging structure according to an embodiment of the present invention. Referring to  FIG. 19B , there is shown a schematic cross-sectional view of the wafer level image sensor packaging structure according to an embodiment of the present invention. Referring to  FIG. 20A  and  FIG. 20B , there are shown schematic views of the wafer level image sensor packaging structure according to an embodiment of the present invention. 
         [0082]    The step of cutting the encapsulant (S 700 ) is described hereunder. As shown in  FIG. 19A  and  FIG. 19B , the step of cutting the encapsulant  300  entails cutting the encapsulant  300  between the semi-finished products  100  along a cutting line  301 , so as to obtain a plurality of wafer level image sensor packaging structures. 
         [0083]    Referring to  FIG. 1A  and  FIG. 1B , there are shown schematic views of the wafer level image sensor packaging structure obtained by the dispensing-based packaging process according to an embodiment of the present invention. Furthermore, the transparent lid  120  shown in  FIG. 1A  does not have the supporting frame  122  thereon, but the transparent lid  120  shown in  FIG. 1B  has the supporting frame  122  thereon. Referring to  FIG. 2A ,  FIG. 2B ,  FIG. 20A , and  FIG. 20B , there are shown schematic views of the wafer level image sensor packaging structure obtained by the molding-based packaging process. As shown in  FIG. 2A  and  FIG. 2B , the wafer level image sensor packaging structure is fabricated by means of the die set  500  not having a plurality of flanges  512 , and thus the encapsulant  300  disposed at ends of the packaging structure has a flat surface and does not cover the transparent lid  120 . As shown in  FIG. 20A  and  FIG. 20B , the plurality of flanges  512  are disposed on the first die  510  of the die set  500  of the wafer level image sensor packaging structure, and thus the encapsulant  300  covers the lateral sides of the wafer level image sensor packaging structure and the periphery of the transparent lid  120 . 
         [0084]    The aforesaid six aspects of implementation of the wafer level image sensor packaging structure have a characteristic in common, that is, the encapsulant  300  always extends to cover the image sensing chips  110 , such that the image sensing chips  110  are free of cracking which might otherwise occur as a result of excessive thinness of the image sensing chips  110 . Accordingly, the encapsulant  300  reinforces the wafer level image sensor packaging structure of the present invention. 
         [0085]    The foregoing embodiments are provided to illustrate and disclose the technical features of the present invention so as to enable persons skilled in the art to understand the disclosure of the present invention and implement the present invention accordingly, and are not intended to be restrictive of the scope of the present invention. Hence, all equivalent modifications and variations made to the foregoing embodiments without departing from the spirit embodied in the disclosure of the present invention should fall within the scope of the present invention as set forth in the appended claims.