Abstract:
A technique for reducing the number of silicon (Si) nano-crystals available to attach or otherwise deposit upon semiconductor device surfaces. More particularly, embodiments of the invention make a wafer substantially free of Si nano-crystals resulting from a wet etch of oxide layer portions, while not impairing semiconductor device dimensions or electrical characteristics.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS  
       [0001]     This application is a divisional of U.S. patent application Ser. No. 10/397,924 filed on Mar. 25, 2003. 
     
    
     FIELD  
       [0002]     Embodiments of the invention relate to semiconductor manufacturing. More particularly, embodiments of the invention relate to the removal of etching residue, such as silicon particles (Si nano-crystals), from a wafer that has been wet etched during processing.  
       BACKGROUND  
       [0003]     Creation of semiconductor devices, such as optical, or micro-electronic machines (“MEM”), devices typically require a wet etch operation in order to remove various layers from the wafer. Unfortunately, wet etches can result in a residue of etched material being left on the wafer after the wafer is removed from the wet etch bath. One type of residue that may be produced during a wet etch is silicon residue from an etched oxide layer, which may take the form of Si nano-crystals. These Si nano-crystals can adversely affect the etched device structure by clinging to the wafer upon the removal of the wafer from the etch bath, thereby altering the intended device feature dimensions.  
         [0004]      FIG. 1  illustrates a cross-section of a wafer that has been exposed to a prior art wet etch operation in which Si nano-crystals are produced that can later adhere to the surface of the wafer. In the prior art example of  FIG. 1 , device gate stacks, consisting of a polysilicon gate  101 , oxide layer in which Si nano-crystals are embedded  105 , and a Si substrate  110 , are formed by wet etching the oxide layer, which contains Si nano-crystals. The wet etch operation releases the Si nano-crystals, which can adhere to the wafer after the wafer is removed from the etch bath, resulting in undesirable device characteristics and low die-per-wafer yield. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0005]     Embodiments of the invention are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements and in which:  
         [0006]      FIG. 1  is a prior art wet etch operation.  
         [0007]      FIG. 2  illustrates a semiconductor processing operation according to one embodiment of the invention in which residue released from a wet etch is dissolved before being able to deposit or attach to the wafer.  
         [0008]      FIG. 3  is a flow diagram illustrating a number of processing operations that may be used according to one embodiment of the invention. 
     
    
     DETAILED DESCRIPTION  
       [0009]     Embodiments of the invention described herein relate to complementary metal-oxide-semiconductor (“CMOS”) processing. More particularly, embodiments of the invention relate to the reduction of silicon (“Si”) particles released during a wet etch of an oxide layer of a CMOS device, while not impairing semiconductor device dimensions or electrical characteristics.  
         [0010]     Reduction in Si particles, such as Si nano-crystals, released during a wet etch of materials, such as unwanted portions of an oxide layer, can be achieved by including in the wet etch bath solution an oxidant, such as HNO 3  (nitric acid) or H 2 O 2  (hydrogen peroxide), aqueous solutions of HNO 3 , O 3  (ozone), O 2 , H 2 O 2 , or organic peroxide. Particularly, oxidants introduced into a wet etch bath can combine with Si nano-crystals in order to form silicon dioxide (SiO 2 ), which is soluble in the wet etch bath and therefore helps prevent Si nano-crystals from being deposited or adhering to device features, such as the oxide, gate polysilicon, or the substrate exposed by the etch. The wafer can then be removed from the wet etch substantially free of Si nano-particles on important device feature surfaces.  
         [0011]      FIG. 2  illustrates a wafer on which a wet etch is performed according to one embodiment of the invention. The oxide  201  contains Si nano-crystals  203  that are released  205  into the wet etch bath during the etch of the oxide. The introduction of an oxidant  210 , such as HNO 3  or H 2 O 2 , aqueous solutions of HNO 3 , O 3 , O 2 , H 2 O 2 , or organic peroxide, however, can help reduce the number of Si nano-crystals in the wet etch bath that may attach or otherwise deposit on important device feature surfaces after the wafer is removed from the wet etch bath. In the embodiment illustrated in  FIG. 2 , the combination of the oxidant and the Si nano-crystals yields silicon dioxide (SiO 2 )  213 , which is soluble in the wet etch bath, thereby making the wafer  215  substantially free of Si nano-crystals.  
         [0012]     Embodiments of the invention can be incorporated into various semiconductor process operations, including those involved in wet etching of portions of an oxide layer, as illustrated in  FIG. 2 . Other embodiments of the invention may be used in other semiconductor process operations, such as wet etching of other semiconductor device materials. Furthermore, other embodiments may use varying oxidants, etching agents, or combinations thereof.  
         [0013]      FIG. 3  is a flow diagram illustrating a number of semiconductor process operations in which one embodiment of the invention may be used. Portions of the oxide layer are removed from the wafer through a wet etch process at operation  301 , in which the wet etch bath contains oxidants to combine with any Si nano-crystals released as a result of the etch. Once the Si nano-crystals are released into the wet etch bath, the oxidants combine with the Si nano-crystals at operation  305  to produce a compound, SiO 2 , which is soluble in the wet etch bath. After the wafer is removed from the wet etch bath at operation  310 , the exposed silicon substrate, polysilicon gate structure, and other device material surfaces are substantially free of Si nano-crystals that may change the electrical characteristics and/or dimensions of the semiconductor device.  
         [0014]     Although the invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications of the illustrative embodiments, as well as other embodiments, which are apparent to persons skilled in the art to which the invention pertains are deemed to lie within the spirit and scope of the invention.