Abstract:
Disclosed is a CMOS image sensor including a gate electrode of a finger type transfer transistor for controlling the saturation state of a floating diffusion region according to the luminance level (i.e. low luminance or high luminance). The CMOS image sensor includes first and second photodiode regions for generating electrons in response to incident light, and a transfer transistor positioned between the first and second photodiodes for receiving the generated electrons transferred from the first and/or second photodiode.

Description:
RELATED APPLICATION(S) 
       [0001]    This application claims the benefit under 35 U.S.C. §119(e) of Korean Patent Application No. 10-2005-0133165, filed Dec. 29, 2005, which is incorporated herein by reference in its entirety. 
       FIELD OF THE INVENTION 
       [0002]    The present invention relates to a CMOS image sensor, and more particularly, to a CMOS image sensor for controlling the saturation state of a floating diffusion region according to the degree of luminance. 
       BACKGROUND OF THE INVENTION 
       [0003]    In general, an image sensor is a semiconductor device for converting optical images into electric signals and is mainly classified as a charge coupled device (CCD) image sensor or a CMOS image sensor. 
         [0004]    However, a CCD has a complicated driving manner, high power consumption, and requires a multi-step photo process, which makes the manufacturing process thereof complicated. 
         [0005]    For this reason, a CMOS image sensor has recently been spotlighted as the next-generation image sensor capable of overcoming the defects of the charge coupled device. 
         [0006]    A CMOS image sensor is a device employing a switching mode to sequentially detect an output of photodiodes by providing MOS transistors corresponding to each unit pixel in conjunction with peripheral devices, such as a control circuit and a signal processing circuit. 
         [0007]    That is, a CMOS image sensor with a photodiode and a MOS transistor within each pixel sequentially detects the electric signals of each unit pixel in a switching scheme to realize an image. 
         [0008]    Since a CMOS image sensor is manufactured by utilizing CMOS technology, it has the advantage of relatively low power consumption. In addition, since a smaller number of photolithography steps is required, the manufacturing process of a CMOS image sensor can be simplified. 
         [0009]    Further, since a control circuit, a signal processing circuit, an analog/digital converting circuit, and the like can be integrated on a single CMOS image sensor chip, the CMOS image sensor can minimize the size of a product. 
         [0010]    Accordingly, a CMOS image sensor is widely used in various applications including digital still cameras, and digital video cameras. 
         [0011]    CMOS image sensors are classified as a 3T type CMOS image sensor, a 4T type CMOS image sensor, or a 5T type CMOS image sensor according to the number of transistors formed in each unit pixel. The 3T type CMOS image sensor includes one photodiode and three transistors, and the 4T type CMOS image sensor includes one photodiode and four transistors. 
         [0012]      FIG. 1  is an equivalent circuit diagram of a conventional 4T type CMOS image sensor, and  FIG. 2  is a layout illustrating a unit pixel of the 4T type CMOS image sensor. 
         [0013]    As illustrated in  FIGS. 1 and 2 , the unit pixel of the CMOS image sensor includes a photodiode  10  and four transistors. In particular, the unit pixel includes a photodiode  10  for receiving light and generating electrons formed at the wide region of the active area; a transfer transistor  20  for transferring electrons collected at the photodiode (PD)  10  to a floating diffusion (FD) region; a reset transistor  30  for setting electric potential at the floating diffusion (FD) region to a desired value and for exhausting electric potential to reset the floating diffusion (FD) region; a source follow transistor  40  functioning as a source follow buffer amplifier; and a select transistor  50  functioning as a switch for addressing. 
         [0014]    Furthermore, as shown in  FIG. 1 , a load transistor  60  is formed at an output terminal (Vout) of each unit pixel  100  to read an output signal. 
         [0015]    Referring to  FIG. 1 , Tx is a gate voltage applied to the transfer transistor  20 , Rx is a gate voltage applied to the reset transistor  30 , Dx is a gate voltage applied to the source follow transistor  40 , and Sx is a gate voltage applied to the select transistor  50 . 
         [0016]      FIG. 3  is a cross-sectional view of the CMOS image sensor taken along the line II-II′ illustrated in  FIG. 2 . 
         [0017]    Referring to  FIG. 3 , the CMOS image sensor includes an isolation layer  62  formed at an isolation region of a semiconductor substrate  61  on which the active area and the isolation region are defined; a gate electrode  64  formed on a predetermined area of the active area of the semiconductor substrate  61  isolated by the isolation layer  62  with a gate insulating layer  63  formed therebetween; a photodiode region  65  formed in an upper portion of the semiconductor substrate  61  at one side of the gate electrode  64 ; a floating diffusion region  66  formed in an upper portion of the semiconductor substrate  61  at the other side of the gate electrode  64 ; and an insulating layer sidewall  67  formed at both sides of the gate electrode  64 . 
         [0018]      FIG. 4  illustrates the operation of the transfer transistor shown in  FIG. 3 . 
         [0019]    Referring to  FIG. 4 , the amount of responsive light may be determined by means of the capacitance of the photodiode (PD) region  65  and the capacitance of the floating diffusion (PD) region  66 . 
         [0020]    When the amount of an incident light through the photodiode (PD) region  65  is large enough, the floating diffusion (FD) region  66  can saturate and no more reaction proceeds. When the amount of the incident light is too small, the amount of the generated electrons (e) is too small and a sufficient reaction does not occur. 
       BRIEF SUMMARY 
       [0021]    An embodiment of the present invention can provide a CMOS image sensor utilizing a transfer transistor incorporating a finger type gate electrode. 
         [0022]    According to embodiments of the CMOS image sensor of the present invention, a floating diffusion region can be formed between photodiode regions to prevent the saturation of the floating diffusion region and to improve the reliability of the operation. 
         [0023]    Accordingly, there is provided a CMOS image sensor comprising first and second photodiode regions for generating electrons in response to incident light and a transfer transistor for receiving the generated electrons transferred from the first and/or second photodiode. In addition, the transfer transistor can be positioned between the first and second photodiodes. 
         [0024]    In the preferred embodiment of the present invention, the transfer transistor can be a finger type transistor. 
         [0025]    According to the preferred embodiment of the present invention, the transfer transistor can be a finger type transistor having a first gate electrode and a second gate electrode. 
         [0026]    In a further preferred embodiment, a floating diffusion region can be provided between the first electrode and the second gate electrode. 
         [0027]    In addition, the first gate electrode can be adjacent to the first photodiode and the second gate electrode can be adjacent to the second photodiode in the preferred embodiment of the present invention. 
         [0028]    The channel length of the first gate electrode and the channel length of the second gate electrode can be different lengths in a preferred embodiment of the present invention. 
         [0029]    According to embodiments of the present invention, a high voltage can be applied to the first and second gate electrodes to turn on the first and second gate electrodes when a low luminance is applied, and a low voltage can be applied to the first and second gate electrodes to turn on the first gate electrode and to turn off the second gate electrode when a high luminance is applied. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0030]      FIG. 1  is an equivalent circuit diagram of the conventional 4T type CMOS image sensor; 
           [0031]      FIG. 2  is a layout diagram illustrating a unit pixel of the conventional 4T type CMOS image sensor; 
           [0032]      FIG. 3  is a cross-sectional view of the CMOS image sensor taken along the line II-II′ of  FIG. 2 ; 
           [0033]      FIG. 4  illustrates the operation of a transfer transistor for the conventional CMOS image sensor; 
           [0034]      FIG. 5  is a layout of a unit pixel of a 4T type CMOS image sensor according to an embodiment of the present invention; 
           [0035]      FIG. 6  is a cross-sectional view taken along the line VI-VI′ of  FIG. 5  according to an embodiment of the present invention; 
           [0036]      FIGS. 7A-7D  are cross-sectional views for illustrating the method of manufacturing the CMOS image sensor according to an embodiment of the present invention; and 
           [0037]      FIGS. 8A and 8B  illustrate the operation of the transfer transistor of the CMOS image sensor according to an embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0038]    Hereinafter, the CMOS image sensor according to preferred embodiments of the present invention and the method of manufacturing the same will be described in detail referring to the attached drawings. 
         [0039]      FIG. 5  is a layout for illustrating the unit pixel of a 4T type CMOS image sensor according to an embodiment of the present invention, and  FIG. 6  is a cross-sectional view taken along the line VI-VI′ of  FIG. 5 . 
         [0040]    In  FIGS. 5 and 6 , the drawings illustrate the structure of the transfer transistor of the finger type suggested in an embodiment of the present invention. 
         [0041]    As illustrated in the drawings, an isolation layer  102  for defining an active area and an isolation region can be formed on a semiconductor substrate  101 . 
         [0042]    On the active area of the semiconductor substrate  101 , first and second gate electrodes  104   a  and  104   b  can be formed on a gate insulating layer  103 . That is, a finger type gate electrode can be formed. 
         [0043]    The region of semiconductor substrate  101  between the first and second gate electrodes  104   a  and  104   b  can correspond to a floating diffusion region  109 . 
         [0044]    The regions of semiconductor substrate  101  at the left and right sides of the first and second gate electrodes  104   a  and  104   b  can correspond to photodiode regions  106   a  and  106   b.    
         [0045]    Referring to  FIG. 6 , an insulating layer sidewall  107  can be formed at both sides of the first and the second gate electrode  104   a  and  104   b.    
         [0046]    In a specific embodiment, the channel length of the first and second gate electrodes  104   a  and  104   b  can be formed to be different from each other. 
         [0047]    As illustrated in  FIG. 5 , one terminal portion of the first and second gate electrodes  104   a  and  104   b  can be electrically connected to form a finger type structure. 
         [0048]      FIGS. 7A-7D  are cross-sectional views for illustrating the method of manufacturing the CMOS image sensor according to an embodiment of the present invention. Particularly, a method of manufacturing a transfer transistor of a finger type is illustrated in these drawings. 
         [0049]    Referring to  FIG. 7A , an isolation layer  102  can be formed to isolate devices on a semiconductor substrate  101 . 
         [0050]    Then, a gate insulating layer  103  and a conductive layer (for example, a high concentration poly-silicon layer) can be successively deposited on the whole surface of the semiconductor substrate  101  including the isolation layer  102 . 
         [0051]    Here, the gate insulating layer  103  can be formed by a thermal oxidation process or a CVD method. 
         [0052]    After that, the conductive layer and the gate insulating layer  103  can be selectively removed to form a gate electrode for each transistor. 
         [0053]    The gate electrode of the transfer transistor can be formed as a finger type. In particular, first and second gate electrodes  104   a  and  104   b  can be formed with a constant interval in between the finger sections while crossing an active region of the semiconductor substrate  101  as illustrated in  FIG. 7A . In a preferred embodiment, the fingers  104   a  and  104   b  can be formed with different channel lengths. 
         [0054]    In a specific embodiment, the channel length of the second gate electrode  104   b  can be twice as long as the channel length of the first gate electrode  104   a.    
         [0055]    According to an embodiment of the present invention, the applied voltage onto the first and second gate electrodes  104   a  and  104   b  can be different from each other. In a specific embodiment, the transfer transistor can be selectively turned on by applying a high voltage when the light is weak and applying a low voltage when the light is strong. 
         [0056]    In addition, output signals can be amplified respectively to different gain according to the applied voltage to the transfer transistor. 
         [0057]    One terminal of the first and second gate electrodes  104   a  and  104   b  can be electrically connected and can have a finger type structure as illustrated in  FIG. 5 . 
         [0058]    Referring to  FIG. 7B , a first photoresist pattern  105  can be formed by coating a photoresist on the whole surface of the semiconductor substrate  101 , including the first and second gate electrodes  104   a  and  104   b , and then performing an exposing process and a developing process to cover the semiconductor substrate  101  between the first gate electrode  104   a  and the second gate electrode  104   b.    
         [0059]    First and second photodiode regions  106   a  and  106   b  can be formed by implanting low concentration n-type impurity ions into the exposed active area of the semiconductor substrate  101  using the first photoresist pattern  105  as a mask. 
         [0060]    Here, the first and second photodiode regions  106   a  and  106   b  can be formed outside of the first and second gate electrodes  104   a  and  104   b , other than the region between the first and second gate electrodes  104   a  and  104   b.    
         [0061]    Referring to  FIG. 7C , the first photoresist pattern  105  can be completely removed and an insulating layer can be formed on the whole surface of the semiconductor substrate  101 . 
         [0062]    In a specific embodiment, the insulating layer can be formed as a single layer or an integrated layer of a nitride layer and a TEOS oxide layer. 
         [0063]    Subsequently, an anisotropic etching (RIE) can be performed to form an insulating layer sidewall  107  at both sides of the first and second gate electrodes  104   a  and  104   b.    
         [0064]    Next, a second photoresist pattern  108  can be formed by coating a photoresist on the whole surface of the semiconductor substrate  101  including the insulating layer sidewalls  107 , and then performing an exposing and developing process to expose the source/drain region of each transistor. 
         [0065]    A source/drain impurity region can be formed by implanting high concentration n+ type impurity ions into the exposed source/drain region using the second photoresist pattern  108  as a mask. 
         [0066]    At this time a floating diffusion region  109 , which is a drain impurity region of the transfer transistor, can be formed at the active area between the first gate electrode  104   a  and the second gate electrode  104   b.    
         [0067]    That is, the floating diffusion region  109  can be formed between the first and second photodiode regions  106   a  and  106   b  according to an embodiment of the present invention. 
         [0068]    Referring to  FIG. 7D , the second photoresist pattern  108  can be removed. Then, an annealing process can be performed to diffuse various impurity ions implanted into the semiconductor substrate  101 . 
         [0069]      FIGS. 5A and 8B  illustrate the operation of the transfer transistor constituting the CMOS image sensor according to embodiments of the present invention. 
         [0070]    The CMOS image sensor described in  FIGS. 5A and 5B  can incorporate first and second gate electrodes  104   a  and  104   b  formed on a semiconductor substrate and separated by a predetermined interval. The first and second gate electrodes  104   a  and  104   b  of a transfer transistor can be finger type. A floating diffusion region (FD)  109  can be formed at an upper portion of the semiconductor substrate  101  between the first and second gate electrodes  104   a  and  104   b.    
         [0071]    In addition, first and second photodiode regions  106   a  and  106   b  can be formed at both sides of the floating diffusion region  109 . 
         [0072]    Accordingly, the gate electrode of the transfer transistor in the CMOS image sensor of an embodiment of the present invention can be formed as a finger type and the photodiode region can be divided into two photodiode regions. A floating diffusion region can be formed between the divided photodiode regions to improve the reaction at a low luminance and at a high luminance. 
         [0073]    Referring to  FIG. 5A , both the first and second gate electrodes  104   a  and  104   b  can be turned on by applying a high voltage at a low luminance. Therefore, the floating diffusion region (FD)  109  can receive all the electrons generated at the first and second photodiode regions  106   a  and  106   b.    
         [0074]    Referring to  FIG. 8B , only the first gate electrode  104   a  is turned on by applying a low voltage at the high luminance when a sufficient light is applied. Therefore, the floating diffusion region (FD)  109  only receives the electrons generated at the first photodiode region  106   a  to generate corresponding electric signals. 
         [0075]    That is, under a low luminance, both the first and second photodiode regions  106   a  and  106   b  can be utilized to improve the sensitivity in an embodiment of the present invention. In addition, under a high luminance of a large amount of light, only the first photodiode region  106   a  may be utilized. Accordingly, the saturation phenomenon of the floating diffusion region can be prevented. 
         [0076]    As described in detail above, the CMOS image sensor and the method of manufacturing the same according to embodiments of the present invention can provide the following characteristics. 
         [0077]    First, the gate electrode of the transfer transistor can be formed as a finger type and the photodiode region can be divided into two photodiode regions. Between the divided photodiode regions, a floating diffusion region can be formed to improve the reaction at a low luminance and at a high luminance. 
         [0078]    Second, since the saturation level at the floating diffusion region can be heightened, the operation at a large amount of light is possible, and the operation range improves. 
         [0079]    Although a preferred embodiment of the present invention has been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.