Abstract:
The invention relates to a method and a through-vapor mask for depositing layers in a structured manner by means of a specially designed coating mask which has structures that accurately fit into complementary alignment structures of the microsystem wafer to be coated in a structured manner such that the mask and the wafer can be accurately aligned relative to one another. Very precisely defined portions on the microsystem wafer are coated through holes in the coating mask, e.g. by mans of sputtering, CVD, or to evaporation processes.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    The application is a U.S. National Stage Application of International Application of PCT/EP2008/057579 filed Jun. 16, 2008, which claims the benefit of German Patent Application No. 10 2007 027 435.3 filed Jun. 14, 2007, the disclosures of which are herein incorporated by reference in their entirety. 
     
    
     FIELD OF THE DISCLOSURE 
       [0002]    The invention relates to structured layer deposition on processed wafers used in microsystem technology. A suitable method and a suitable device are being proposed. 
       BACKGROUND OF THE DISCLOSURE 
       [0003]    When processing wafers for producing microstructure systems on suitable substrate wafers, e.g. semiconductor wafers, e.g. provided in the form of silicon wafers, which is abbreviated herein as wafer processing by microsystem technology, it is very often required that the semiconductor wafers or chip structures are partially provided with layers, this means in a structured manner during or at the end of the production of complex micro-electromechanical structures. Thus, the typical multilayer technology which is based on full-surface deposition of the layer and its subsequent photochemical structuring typically cannot be used efficiently. Either certain portions of the wafers/chips must not be coated at all, since this coating would e.g. render micromechanical structures unusable, or a photochemical structuring is not possible due to a pronounced surface profile and/or presence of layers, which cannot be etched or the complexity is too great. 
         [0004]    Coating masks have been known for a long time, which comprise openings for the material to be deposited. Such masks e.g. made from metal are problematic insofar as misalignments occur when surfaces are highly profiled, and the structures to be deposited are thus not precisely defined. This way, disadvantages with respect to quality, yield and density of packaging are created. The poor adjustability of such hard masks also has a detrimental effect for the microstructures. 
       SUMMARY OF THE DISCLOSURE 
       [0005]    It is the object of the invention to provide a method and a device for structured layer deposition on processed microsystem technology wafers which overcome said disadvantages of the prior art and which improve the quality of the process. 
         [0006]    In one aspect, the object is accomplished by a method with the subsequent steps: providing two or plural mechanical alignment structures at the microsystem wafer, providing a through-vapor mask with two or more mechanical mask alignment structures, which are configured with respect to their shape and position to mechanically to engage two or more mechanical alignment structures at the microsystem wafer. Furthermore, two or more mechanical alignment structures of the microsystem wafer are brought into contact with the two or more mechanical mask alignment structures of the through-vapor mask, and material is selectively applied to the microsystem wafer through openings, which are provided in the through-vapor mask. Eventually, the through-vapor mask is lifted off after material has been applied selectively. 
         [0007]    Thus, the invention provides a method which is based on using a particular coating mask as a through-vapor mask and, in particular, an alignment system for the coating mask and the microsystem technology wafer, which increases the alignment precision and the exact definition of the structured layers to be deposited. Thus, a structure is provided in the method according to the invention, which is designated as mechanical in the sense that the connection of the alignment structures on the mask and on the wafer is implemented through them mechanically engaging one another, so that a mechanical fixation or locking is implemented with respect to relative rotation and relative lateral movement. The alignment structures on the wafer and on the mask are thus configured as complementary structures, e.g. by protrusions and recesses complementary thereto (in corresponding numbers). 
         [0008]    After the desired material has been deposited through the openings of the through-vapor mask, it can be lifted off again and can be used for selectively coating another wafer. 
         [0009]    In advantageous embodiments, the alignment structures provide a self-adjusting action, in that suitable fixation, locking or contact surfaces of the mask alignment structures and surfaces complementary thereto are provided on/in the wafer, which alignment structures facilitate a relative sliding movement until the desired lateral relative position is achieved. This can be implemented through a conical configuration of the respective recess and through a complementary conical protrusion. 
         [0010]    The method according to the invention can be used with many types of material deposition or coating, e.g. CVD, PVD, etc. 
         [0011]    Furthermore, the method can also be integrated efficiently into the entire production process for generating microsystem structures on wafers, since the alignment structures can be produced at the wafers together with the component structures. 
         [0012]    In another aspect of the present invention, a through-vapor mask is provided, which can be used multiple times for selective material deposition on microsystem wafers. 
         [0013]    Multiple uses are advantageous. Several wafers have alignment structures, which fit those alignment structures that are disposed at the mask. 
         [0014]    The thickness of the mask is preferably less than 1 mm. As a disc, it can be made of a composite of several materials. 
         [0015]    Several advantageous embodiments of the mask and of the method recited supra can be derived from the additional claims and also from the subsequent description. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0016]    The invention will now be described in more detail with reference to exemplary embodiments and schematic drawing figures, wherein: 
           [0017]      FIG. 1  schematically illustrates a sectional view of an assembly made of a microsystem technology wafer  2  and a coating mask  1  as a through-vapor mask in a pre-adjusted position, wherein the through-vapor mask is not applied yet. Various types of alignment structures  4   a,    4   b  or  5   a,    5   b  are illustrated; 
           [0018]      FIG. 2  schematically illustrates a cross sectional view of the microsystem technology wafer  2  with a coating mask  1  applied during a vapor deposition process; 
           [0019]      FIG. 3  schematically illustrates a cross sectional view of the microsystem technology wafer with elements  8 ,  8 ′ of the coated structure, wherein the mask  1  is removed; and 
           [0020]      FIG. 4   a, b  illustrate details of two types of complementary alignment structures  4   a ,  4   b  or  5   a,    5   b  of  FIG. 1 , which are not jointly illustrated in one depiction, but in two separate depictions as two particular embodiments. This applies accordingly for the structures  5 ′ and  4 ′ at the left edge of  FIG. 1 , which can be configured accordingly. 
       
    
    
     DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS 
       [0021]      FIG. 1  illustrates a schematic cross sectional view of an assembly with a coating mask  1 , which is also designated as through-vapor mask  1 , for selectively coating one, and in is advantageous embodiments, several microsystem technology wafers  2  which comprise sensitive structures  3   a  in a portion  3 , which is not to be coated. These structures shall not be coated. 
         [0022]    In the illustrated embodiment, the coating mask  1  comprises at least two mechanically is acting alignment structures  4 ,  4 ′, which are also designated as mask alignment structures and configured precisely fitting into the alignment structures  5 ,  5 ′ on the microsystem technology wafer  2 . The alignment structures  4  and  5  or  4 ′ and  5 ′ are complementary to one another in the sense that they can mechanically engage one another, thus facilitating a fixation of the relative position at least with reference to a rotation of the wafer  2  relative to the mask  1 . 
         [0023]    Thus, in the illustrated embodiment, alignment structures  4  and  5  are disposed with a matching geometry, i.e. with a complementary or inverse structure and position, respectively recessed in the wafer  2  as a recess  5   a  and respectively protruding at the through-vapor mask  1  as a protrusion  4   a,  so that they are configured to nest well into one another, and thus can bring the wafer  2  and the mask  1  into a very precisely defined position relative to one another in order to secure them against relative movement or rotation. 
         [0024]    In other embodiments, the mask  1  comprises the alignment structures  4  in the form of a recess  4   b,  and the alignment structures  5  have a protrusion  5   b  (dashed lines in  FIG. 1 ). 
         [0025]    In other embodiments, both alignment structures  4  and  5  can respectively have protrusions and recesses, however, so that they are complementary with one another. One of the structures  4  can have a rise and another structure  4  can have a recess, so that the respective alignment structures  5  on the wafer have a recess or a protrusion. Protrusions and recesses in the form of a “fine structure” can also be provided within an alignment structure. 
         [0026]    The same applies for the structures  5 ′ and  4 ′ on the other side of the sensitive microstructure  3   a.    
         [0027]    In one embodiment, the coating mask  1  and also the microsystem technology wafer  2  are made of silicon, so that identical structuring techniques, e.g. etching or similar can be used to form the alignment structures  4  and  5  and  4 ′ and  5 ′. 
         [0028]    In other embodiments, the mask  1  and the wafer  2  can be made from different materials, so that desired properties can be implemented in particular with respect to the materials of the mask  1 . This can occur with respect to reuse, with respect to the compatibility with process conditions during material deposition, with respect to cleaning the mask  1  or similar. The mask  1  can e.g. be made of one or several base layers or materials and a final layer is provided with a suitable thickness so that, on the one hand, the target dimensions are maintained and, on the other hand, the desired surface properties are achieved. For example, a layer in the range of several 10 nm made of SiN, SiC, SiO, etc. can be deposited in order to adjust the surface properties. 
         [0029]    In one embodiment, however, a self-aligning effect of the alignment structures  4  and  5  is accomplished, in that the alignment structures  4  have slanted flanks  4   c  and the alignment structures  5  have complementary slanted flanks  5   c,  which facilitate an exact fitting of the coating mask  1  and of the wafer  2 , so that a positioning precision in the micrometer range is achieved. The slanted flank yields a cone or a truncated cone in the sense of conicity for an alignment structure  4  and opposite conicity for the other alignment structure  5 . The conicity can cover a section; the alignment elements preferably have a truncated cone shape with a flat end. 
         [0030]    However, also any other mechanically exactly fitting combination of alignment elements is suitable. 
         [0031]      FIG. 2  illustrates the coating mask  1  and the microsystem technology wafer  2  when they are joined, wherein the joining is performed manually or through contact pieces, e.g. through a wafer bond-aligner. Then the layer deposition  6  is performed through the openings  7 ,  7 ′ in the coating mask  1 , which define the portions to be coated, so that the coated portions are created after the coating mask is lifted off. 
         [0032]      FIG. 3  illustrates the wafer  2  after depositing the material through the process  6 , which can include CVD, PVD, and template printing or similar. During processing in the process  6  and the disc handling linked therewith, typically the mechanical fit of the alignment markers  4  and  5  is sufficient for automatic handling in the coating systems. Optionally, however, the wafer  2  and the mask  1  can be additionally secured relative to one another through clamping. 
         [0033]      FIGS. 4   a  and  4   b  are detail enlargements of two types of complementary alignment structures  4   a,    4   b  or  5   a,    5   b  of  FIG. 1 , wherein they are depicted here in two separate depictions as two particular embodiments. This applies for the structures  5 ′ and  4 ′ at the left edge of  FIG. 1 , which can be configured accordingly. 
         [0034]    The alignment element  4   a  is a protrusion at the mask, which is configured with inclined flanks configured for aligning insertion into the recess  5   a  with flanks  5   c,  which are accordingly inclined. The alignment element  5   b  is a protrusion configured with inclined flanks  5   c ′ at the microsystem technology wafer  2 , configured for aligning insertion into the recess  4   b  with accordingly inclined flanks  4   c′.    
         [0035]    The method is suitable for various coating processes, like metalizing through sputtering and evaporating, but also for the deposition of the dielectric layers in CVD processes and even for template print, wherein the coating mask  1  serves as a template in this case. For practical reasons, thus with respect to wafer handling, the structuring, the stability, etc., the thickness of the coating mask  1  (through vapor mask) is configured in a suitable manner. A thickness of a few 100 micrometers is suitable for many situations when manufacturing microstructures. Thus, a thickness in the range of 100 μm up to 900 μm can be used or substantially the same thickness can be used as for the wafer  2 . 
         [0036]    When creating the actual component structures, thus the structure  3 , a plurality of process techniques is being used, e.g. layer deposition, lithography, etching and similar, wherein at least some of these processes can also be used to generate the alignment structures  5 ,  5 ′ in the wafer  2 . For example, the structures  5 ,  5 ′ can be formed as recesses  5   a  during an etching process, in which also other recesses for the actual components (structures  3 ) are being formed, wherein a suitable lithography mask can provide the desired lateral dimensions. In other cases suitable process steps are inserted over the course of the production, in order to produce the structures  5  in the desired geometry without creating any disadvantageous interference into the entire process. 
         [0037]    In a particular embodiment, a selective coating  8  of the structured microsystem technology wafer  2  is performed, wherein the coating is performed through the openings  7  in a multiuse coating mask applied to the wafer  2 . The mask  1  covers portions  3  of the microsystem technology wafer  2  which are not to be coated, wherein mechanical alignment structures  4  and  5  are disposed on the microsystem technology wafer  2  and on the coating layer  1  in exactly the same position and with identical distances from one another. The alignment structures on the coating mask  1  are protrusions and those on the microsystem technology wafer  2  are recesses or vice versa. 
         [0038]    When applying the coating mask  1 , a self-alignment of the coating mask  1  relative to the microsystem technology wafer  2  is performed. 
         [0039]    After the coating process of the layer or of the layer portion  8 , the coating mask  1  is lifted off. The mask  1  can be reused for the next coating process employing the same method.