Abstract:
A cable bypass assembly is disclosed for use in providing a high frequency transmission line that connect a chip package on a circuit board to connector spaced apart from the chip package. The bypass cable assembly has a structure that allows for low loss between the chip package and the connector. Multiple cables can be used to provide a number of differentially coupled channels.

Description:
REFERENCE TO RELATED APPLICATIONS 
       [0001]    This Application is a continuation of U.S. application Ser. No. 15/641,777, filed Jul. 5, 2017, which is a continuation of U.S. application Ser. No. 15/433,749, filed Feb. 15, 2017, which in turn is a continuation of U.S. application Ser. No. 15/290,638, filed Oct. 11, 2016, now U.S. Pat. No. 9,608,348, which in turn is a continuation of U.S. application Ser. No. 15/162,264, filed May 23, 2016, now U.S. Pat. No. 9,490,558, which in turn is a continuation of U.S. application Ser. No. 14/973,095 filed Dec. 17, 2015, now U.S. Pat. No. 9,362,678, which is a continuation of U.S. application Ser. No. 14/829,319, filed Aug. 18, 2015, now U.S. Pat. No. 9,257,794, which is a continuation of and claims priority to U.S. application Ser. No. 14/486,838, filed Sep. 15, 2014, now U.S. Pat. No. 9,142,921, which is a Continuation-In-Part Application of and claims priority to U.S. application Ser. No. 13/779,027, filed on Feb. 27, 2013, now U.S. Pat. No. 8,845,364, all of which are incorporated herein by reference in their entirety. 
     
    
     BACKGROUND OF THE PRESENT DISCLOSURE 
       [0002]    The Present Disclosure relates, generally, to cable interconnection systems, and, more particularly, to bypass cable interconnection systems for transmitting high speed signals at low losses from chips or processors to backplanes. 
         [0003]    Conventional cable interconnection systems are found in electronic devices such as routers, servers and the like, and are used to form signal transmission lines between a primary chip member mounted on a printed circuit board of the device, such as an ASIC, and a connector mounted to the circuit board. The transmission line typically takes the form of a plurality of conductive traces that are etched, or otherwise formed, on or as part of the printed circuit board. These traces extend between the chip member and a connector that provides a connection between one or more external plug connectors and the chip member. Circuit boards are usually formed from a material known as FR-4, which is inexpensive. However, FR-4 is known to promote losses in high speed signal transmission lines, and these losses make it undesirable to utilize FR-4 material for high speed applications of about 10 Gbps and greater. This drop off begins at 6 GBps and increases as the data rate increases. 
         [0004]    Custom materials for circuit boards are available that reduce such losses, but the prices of these materials severely increase the cost of the circuit board and, consequently, the electronic devices in which they are used. Additionally, when traces are used to form the signal transmission line, the overall length of the transmission line typically may well exceed 10 inches in length. These long lengths require that the signals traveling through the transmission line be amplified and repeated, thereby increasing the cost of the circuit board, and complicating the design inasmuch as additional board space is needed to accommodate these amplifiers and repeaters. In addition, the routing of the traces of such a transmission line in the FR-4 material may require multiple turns. These turns and the transitions that occur at terminations affect the integrity of the signals transmitted thereby. It then becomes difficult to route transmission line traces in a manner to achieve a consistent impedance and a low signal loss therethough. 
         [0005]    It therefore becomes difficult to adequately design signal transmission lines in circuit boards, or backplanes, to meet the crosstalk and loss requirements needed for high speed applications. It is desirable to use economical board materials such as FR4, but the performance of FR4 falls off dramatically as the data rate approaches 10 Gbps, driving designers to use more expensive board materials and increasing the overall cost of the device in which the circuit board is used. Accordingly, the Present Disclosure is therefore directed to a high speed, bypass cable assembly that defines a transmission line for transmitting high speed signals, at 10 GBps and greater which removes the transmission line from the body of the circuit board or backplane, and which has low loss characteristics. 
       SUMMARY OF THE PRESENT DISCLOSURE 
       [0006]    Accordingly, there is provided an improved high speed bypass cable assembly that defines a signal transmission line useful for high speed applications at 10 GBps or above and with low loss characteristics. 
         [0007]    In accordance with an embodiment described in the Present Disclosure, an electrical cable assembly can be used to define a high speed transmission line extending between an electronic component, such as a chip, or chip set, and a predetermined location on a backplane. Inasmuch as the chip is typically located a long length from the aforesaid location, the cable assembly acts a signal transmission line that that avoids, or bypasses, the landscape of the circuit board construction and which provides an independent signal path line that has a consistent geometry and structure that resists signal loss and maintains its impedance at a consistent level without great discontinuity. 
         [0008]    In accordance with the Present Disclosure, the cable may include one or more cables which contain dedicated signal transmission lines in the form of pairs of wires that are enclosed within an outer, insulative covering and which are known in the art as “twin-ax” wires. The spacing and orientation of the wires that make up each such twin-ax pair can be easily controlled in a manner such that the cable assembly provides a transmission line separate and apart from the circuit board, and which extends between a chip or chip set and a connector location on the circuit board. Preferably, a backplane style connector is provided, such as a pin header or the like, which defines a transition that does not inhibit the signal transmission. The cable twin-ax wires are terminated directly to the termination tails of a mating connector so that crosstalk and other deleterious factors are kept to a minimum at the connector location. 
         [0009]    The signal wires of the bypass cable are terminated to terminal tails of the connector which are arranged in a like spacing so as to emulate the ordered geometry of the cable. The cable connector includes connector wafers that include ground terminals that encompass the signal terminals so that the ground shield(s) of the cable may be terminated to the connector and define a surrounding conductive enclosure to provide both shielding and reduction of cross talk. The termination of the wires of the bypass cable assembly is done in such a manner that to the extent possible, the geometry of the signal and ground conductors in the bypass cable is maintained through the termination of the cable to the board connector. 
         [0010]    The cable wires are preferably terminated to blade-style terminals in each connector wafer, which mate with opposing blade portions of corresponding terminals of a pin header. The pin header penetrates through the intervening circuit board and the pins of the header likewise mate with like cable connectors on the other side of the circuit board. In this manner, multiple bypass cable assemblies may be used as signal transmission paths. This structure eliminates the need for through-hole or compliant pin connectors as well as avoids the need for long and possibly complex routing paths in the circuit board. As such, a designer may use inexpensive FR4 material for the circuit board construction, but still obtain high speed performance without degrading losses. 
         [0011]    The signal conductors of the twin-ax cables are terminated to corresponding signal terminal tail portions of their respective corresponding connector wafers. The grounding shield of each twin-ax pair of wires is terminated to two corresponding ground terminal tail portions which flank the pair of signal terminals. In this manner, each pair of signal terminals is flanked by two ground terminals therewithin. The connector wafers have a structure that permits them to support the terminals thereof in a G-S-S-G pattern within each wafer. Pairs of wafers are mated together to form a cable connector and, when mated together, the signal terminals of one wafer are flanked by ground terminals of an adjacent wafer. In this manner, the cable twin-ax wires are transitioned reliably to connector terminals in a fashion suitable for engaging a backplane connector, while shielding the cable wire signal pairs so that any impedance discontinuities are reduced. 
         [0012]    In one embodiment, grounding cradles are provided for each twin-ax wire pair so that the grounding shield for each twin-ax wire may be terminated to the two corresponding grounding terminals that flank the pair of the interior signal terminals. In this manner, the geometry and spacing of the cable signal wires is maintained to the extent possible through the connector termination area. The connector terminals are configured to minimize the impedance discontinuity occurring through the connector so that designed impedance tolerances may be maintained through the connector system. 
         [0013]    In another embodiment, a grounding member is provided that holds the twin-ax wires in position for attachment to the conductors of a corresponding opposing backplane, or wafer connector. The grounding member includes a ground strip, or bar, that extends transversely to the wafer connector conductors. The grounding member preferably includes one or more cable clamps which extend out therefrom in a manner so as to provide a clamping nest that receives one of the twin-ax wires therein. The cable clamps include contact arms that are wrapped around the outer shielding of the twin-ax cable wires and which may be crimped therearound, or otherwise attached to the twin-ax outer shielding to ensure reliable electrical contact therebetween. 
         [0014]    The ground strip preferably extends transversely to the twin-ax wires and the conductors of the wafer connectors. The ground strip is structured to support the cables in a predetermined spacing and this configuration may include depressions, or shoulders formed in the strip to provide a baseline, or datum for properly locating the twin-ax wire conductors. The free ends of the ground conductors may be offset in a selected plane beneath the centerlines of the twin-ax wire conductors. In this manner, the signal conductors of the twin-ax wires will be at or very close to the level of the wafer connector signal conductor mating surfaces. The ground strip is preferably welded to the wafer connector ground conductors, although other suitable manners of attachment in the art may be used. 
         [0015]    The cable clamps may be crimped to the outer shielding members of each twin-ax cable and the cable clamps, the ground strip, free ends of the twin-ax cables and free ends of the connector terminals are disposed in a termination area of the wafer connector. This area is overmolded with a dielectric material that forms a solid mass that is joined to the connector frame. The ground strip commons the outer shielding members of the twin-ax wires together, as well as the ground terminals of the connector to provide a reliable ground path. 
         [0016]    These and other objects, features and advantages of the Present Disclosure will be clearly understood through a consideration of the following detailed description. 
     
    
     
       BRIEF DESCRIPTION OF THE FIGURES 
         [0017]    The organization and manner of the structure and operation of the Present Disclosure, together with further objects and advantages thereof, may best be understood by reference to the following Detailed Description, taken in connection with the accompanying Figures, wherein like reference numerals identify like elements, and in which: 
           [0018]      FIG. 1  is a plan view of a typical backplane system with a chipset being interconnected to a series of backplane connectors; 
           [0019]      FIG. 2  is a plan view of a backplane system utilizing bypass cable assemblies constructed in accordance with the Present Disclosure; 
           [0020]      FIG. 2A  is a perspective sectional view of a multi-wire cable used in conjunction with cable bypass assemblies of the Present Disclosure; 
           [0021]      FIG. 3  is a perspective view, partially exploded, of a pin header utilized in the backplane system of  FIG. 2 , with a cable connector engaged therewith and a mating backplane connector disengaged and spaced apart therefrom; 
           [0022]      FIG. 4  is an enlarged view of the backplane cable connector of  FIG. 2 ; 
           [0023]      FIG. 5  is a perspective view of a backplane connector and a cable connector of the Present Disclosure; 
           [0024]      FIG. 6  is the same view as  FIG. 5 , but with the two connectors mated together; 
           [0025]      FIG. 7  is an exploded view of the cable connector of  FIG. 5 , with the two frame members separated from each other and with the overmolding removed to illustrate the cable wire termination area of the connector; 
           [0026]      FIG. 7A  is an enlarged detail view of the rightmost connector frame member of  FIG. 7 , illustrating the alignment of the connector terminal tails and the arrangement of the cable wire signal conductor free ends; 
           [0027]      FIG. 7B  is an enlarged detail view of the leftmost connector frame member of  FIG. 7 , illustrating the use of a ground shield cradle that permits termination of the cable wire grounding shield to two ground terminal tail portions flanking a pair of signal terminal tail portions of the connector; 
           [0028]      FIG. 7C  is the same view as  FIG. 7 , but with the commoning members in place on the leftmost connector frame member; 
           [0029]      FIG. 7D  is the same view as  FIG. 7 , but with the connector frame members joined together; 
           [0030]      FIG. 8  is the same view as  FIG. 7 , but with the termination area of the connector frame members filled in with a plastic or other suitable material; 
           [0031]      FIG. 8A  is the same view as  FIG. 7 , but with the connector fame members joined together, the commoning members inserted and with the termination areas overmolded; 
           [0032]      FIG. 9  is a perspective view of the two connector frame members of  FIG. 7 , brought together as a single connector and with the top portion thereof removed to illustrate the engagement of the commoning member with the two types of ground terminals and illustrating how the terminals are spaced apart from each other within the connector; 
           [0033]      FIG. 9A  is a top plan view of the single connector of  FIG. 9 ; 
           [0034]      FIG. 10  is a perspective view of the two terminal sets utilized in the connector of  FIG. 8A , with the connector frame member removed for clarity; 
           [0035]      FIG. 10A  is a top plan view of the terminal sets of  FIG. 10 ; 
           [0036]      FIG. 10B  is a side elevational view of the terminal sets of  FIG. 8A ; 
           [0037]      FIG. 10C  is a side elevational view of the leftmost terminal set of  FIG. 10 ; 
           [0038]      FIG. 10D  is the same view as  FIG. 10 , but with the rightmost terminal set removed for clarity; 
           [0039]      FIG. 11  is a partial sectional view of the rightmost connector frame member of  FIG. 7C , taken along the level of the terminal tail and mating blade portions thereof, with the termination area filled with an overmolding material; 
           [0040]      FIG. 12  is a partial sectional view of the rightmost connector frame member of  FIG. 7C , taken from the far side thereof and taken along the level of the terminal body portions; 
           [0041]      FIG. 13  is a view illustrating, in detail, area “A” of  FIG. 3 , which illustrates an angled cable connector constructed in accordance with the principles of the Present Disclosure mated with a backplane connector of the pin header style; 
           [0042]      FIG. 14  is a perspective view of a circuit board utilizing another embodiment of a bypass cable assembly constructed in accordance with the principles of the present disclosure and suitable for interconnecting together two backplanes connectors mounted on the circuit board; 
           [0043]      FIG. 15  is a perspective view of a circuit board utilizing a third embodiment of a bypass cable assembly constructed in accordance with the present disclosure and suitable for interconnecting circuits of the circuit board to a backplane connector; 
           [0044]      FIG. 16  is a perspective view of a stack of connector wafers to which cables are connected as in the cable assemblies of  FIGS. 14 and 15 ; 
           [0045]      FIG. 16A  is the same view as  FIG. 16 , but illustrating only a pair of wafer connector halves; 
           [0046]      FIG. 16B  is the same view as  FIG. 16A , but with the wafer connector halves separated; 
           [0047]      FIG. 16C  is the same view as  FIG. 16B , but with the overmold removed for clarity and illustrating another ground member which is also used to position the twin-ax wires for termination; 
           [0048]      FIG. 16D  is an end view of the wafer connector of  FIG. 16A , taken along lines D-D thereof; 
           [0049]      FIG. 17  is an elevational view of the near side of the rightmost wafer connector half of  FIG. 16C ; 
           [0050]      FIG. 17A  is an exploded view of the wafer connector half of  FIG. 17 ; 
           [0051]      FIG. 18  is an elevational view of the far side of the rightmost wafer connector half of  FIG. 16C ; 
           [0052]      FIG. 18A  is a perspective view, taken from the other side of the wafer connector of  FIG. 16C ; 
           [0053]      FIG. 18B  is an exploded view of the nearmost wafer connector half of  FIG. 18A ; 
           [0054]      FIG. 19A  is a top plan view of the grounding member of the connector assembly of  FIGS. 16C and 18A ; 
           [0055]      FIG. 19B  is an end elevational view taken along lines B-B of  FIG. 19A ; 
           [0056]      FIG. 19C  is an elevational view of the other end of the grounding member of  FIG. 19A , taken along lines C-C thereof; and 
           [0057]      FIG. 19D  is a side elevational view of the grounding member of  FIG. 19A . 
       
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0058]    While the Present Disclosure may be susceptible to embodiment in different forms, there is shown in the Figures, and will be described herein in detail, specific embodiments, with the understanding that the Present Disclosure is to be considered an exemplification of the principles of the Present Disclosure, and is not intended to limit the Present Disclosure to that as illustrated. 
         [0059]    As such, references to a feature or aspect are intended to describe a feature or aspect of an example of the Present Disclosure, not to imply that every embodiment thereof must have the described feature or aspect. Furthermore, it should be noted that the description illustrates a number of features. While certain features have been combined together to illustrate potential system designs, those features may also be used in other combinations not expressly disclosed. Thus, the depicted combinations are not intended to be limiting, unless otherwise noted. 
         [0060]    In the embodiments illustrated in the Figures, representations of directions such as up, down, left, right, front and rear, used for explaining the structure and movement of the various elements of the Present Disclosure, are not absolute, but relative. These representations are appropriate when the elements are in the position shown in the Figures. If the description of the position of the elements changes, however, these representations are to be changed accordingly. 
         [0061]      FIG. 1  is a plan view of a conventional circuit board, or backplane assembly  49  that has a primary circuit board  50  that is connected to another, secondary circuit board  52  by way of an intervening circuit board, or backplane  54 . The primary circuit board  50  has an array of electronic components disposed on it, including a chip set  56  that may include a base processor  58  or the like as well as a plurality of ancillary chips or processors  60 . The chips  58 ,  60  may take the form of a PHY Chip, or any other surface-mounted, physical layer device, known in the art, from which a high speed signal is generated, such as an ASIC or the like. The primary circuit board  50  is provided with a plurality of circuit paths that are arranged in various layers of the board and which are formed from conductive traces  61 . These conductive traces  61  sometimes follow long and torturous paths as they traverse the circuit board  50  from the chipset  56  to another location of the circuit board  50 , such as a termination area near the edge of the circuit board  50  where a series of connectors  62  are mounted. The connectors  62  mate with corresponding mating connectors  63 , mounted on the backplane  54  and these connectors  63  may commonly be of the pin header style, having an insulative body  66  and a plurality of conductive pins, or blades  67 , that extend outward therefrom and which are contacted by opposing terminals of the connectors  62 . The pins  67  of the connector  63  extend through the intervening circuit board  54  where they may mate with other connectors  65  disposed on the opposite side and on the secondary circuit board  52 . 
         [0062]    The board connectors  62 ,  65  typically utilize compliant mounting pins (not shown) for connecting to the circuit boards  50 ,  52 . With compliant mounting pins, not only does the circuit board  50 ,  52  need to have mounting holes drilled into it and plated vias formed therein, but the risk exists that the plated vias may retain stub portions that act as unterminated transmission lines which can degrade the transmitted signals and contribute impedance discontinuities and crosstalk. In order to eliminate stubs and their deleterious effects on high speed signal transmission, vias need to be back-drilled, but this modification to the circuit board adds cost to the overall system. Long conductive traces  61  in circuit board material, such as FR4, become lossy at high speeds, which adds another negative aspect to high speed signal transmission on low cost circuit boards. High data speeds are those beginning at about 5 Ghz and extending to between about 10 and about 15 Ghz as well as speeds in excess thereof. There are ways to compensate for these losses such as utilizing chip clock data recovery systems, amplifiers or repeaters, but the use of these systems/components adds complexity and cost to the system. 
         [0063]    In order to eliminate the inherent losses that occur in FR4 and other inexpensive, similar circuit board materials, we have developed a bypass cable system in which we utilize multi-wire cables for high speed, differential signal transmission. The cable wires can, in some instances, provide signal transmission lines from the chip/chip set to a connector location. In other instances, the cable wires may provide signal transmission lines between components on the circuit board, such as chips, processors, relays, amplifiers and the like, and even between nodes formed on or in the circuit board where different traces meet, and other connectors, such as backplane connectors. 
         [0064]    These cables take the transmission line off of the circuit boards  50 ,  52  and utilize wires, primarily wires of the twin-ax construction to route a transmission line from the chipset to another location on the circuit board  50 ,  52 . In this application, the cable terminus is a backplane-style connector  62 ,  65 . As shown best schematically in  FIG. 2 , a series of bypass cable assemblies  66 , each including a plurality of twin-ax wires  69 , are provided and they are connected at one end thereof to the chips  58 ,  60  and to backplane connectors  62 ,  65  at their opposite ends. These connectors  62 ,  65  mate with the pin header connectors  63  on the intervening circuit board  54  and provide a passage through that circuit board  54  between the primary and secondary circuit boards  50 ,  52 . 
         [0065]    The bypass cable assemblies  66  include a flexible circuit member, shown in the Figures as a multiple wire cable  68 . The cable  68 , as shown in  FIG. 2A , may include an outer covering that contains a plurality of signal transmission wires  69 , each of which contains two signal conductors  70   a ,  70   b  that are arranged in a spaced-apart fashion that is enclosed by an insulative portion  71 . The insulative portion  71  of each such twin-ax wire  69  typically includes a conductive outer shield  72  that encloses the insulative portion  71  and its signal conductors  70   a - b . The multiple cable wires  69  may be enclosed as a group by an outer insulative covering, which is shown in phantom in the Figures, or it may include only a plurality of the twin-ax wires. The signal conductors  70   a - b , as is known in the art, are separated by a predetermined spacing and are used to transmit differential signals, i.e., signals of the same magnitude, but different polarity, such as +0.5 v and −0.5 v. The structure of the twin-ax wires lends itself to uniformity throughout its length so that a consistent impedance profile is attained for the entire length of the wires  69 , or cables  68 . The cable assemblies  66  of this Present Disclosure may include as few as one or two twin-ax wires, or they may include greater numbers as shown in the Figures. 
         [0066]      FIGS. 5-12  depict one embodiment of a cable assembly and cable connector of the Present Disclosure, particularly suitable for mating the cable connector to a backplane style connector. It can be seen that the cable wires  69  are terminated to the cable connectors  62 , and the cable connectors  62  are preferably formed from two halves, in the form of connector wafers  80 , two of which are mated together in a suitable manner to form a connector. The wafers  80  are configured to mate in pairs with an opposing connector  63 , such as the pin header  81  illustrated in  FIG. 3 , or a right angle connector  89  also be formed from two wafers  89   a - b  that support a plurality of conductive signal and ground terminals  89   c . The terminals  89   c  terminate in mating ends that may take the form of cantilevered beams (not shown) that are held within an exterior shroud  89   d , which contains a plurality of passages  89   e . Each passage  89   e  is configured to receive one of the mating portions  90 ,  93  of the signal terminals  86   a - b  and the ground terminals  87   a - b  as shown in  FIGS. 5-6 . Such a connector arrangement shown in these Figures will be suitable for mating circuits on a primary circuit board  50  to those on a secondary circuit board  52 .  FIGS. 3-4  illustrate a connector arrangement that is suitable for use for connecting circuits through an intervening circuit board  54 . 
         [0067]    The cable connector  62  of  FIG. 5  may be used to mate with a right angle connector  89  as shown in  FIG. 5  or may be used, with some modification, to mate directly with the pin header connector  81  of  FIGS. 3-4 . Turning to  FIG. 7 , each wafer  80  can be seen to have a frame member  84 , preferably molded from an insulative material that provides a skeletal frame that supports both the cable wires  69  and the terminals of the cable connector  62 . Each connector wafer  80  is preferably provided with distinct signal terminals  86  and ground terminals  87  that are arranged in a row upon the connector wafer  80 . The signal terminals  86  in each row are themselves arranged in pairs of terminals  86   a - b  which are respectively connected to the cable wire signal conductors  70   a - b . In order to maintain appropriate signal isolation and to further mirror the geometry of the cable wires  68 , the pairs of signal terminals  86   a ,  86   b  are preferably flanked by one or more of the ground terminals  87 , within each row of each connector wafer  80 . The frame member  84 , as illustrated, also may have a plurality of openings  97  formed therein that expose portions of the signal and ground terminals  86   a - b  &amp;  87   a - b  to air for coupling between terminals of connected wafers  80  and for impedance control purposes. These openings  97  are elongated and extend vertically along the interior faces of the connector wafers  80  ( FIG. 8 ), and are separated into discrete openings by portions of the frame  84  along the exterior faces of the connector wafers  80 . They provide an intervening space filled with an air dielectric between terminals within a connector wafer pair as well as between adjacent connector wafer pairs. 
         [0068]    The arrangement of the terminals of the wafers  80  is similar to that maintained in the cable wires  69 . The signal terminals  86   a - b  are set at a desired spacing and each such pair of signal terminals, as noted above, has a ground terminal  87  flanking it. To the extent possible, it is preferred that the spacing between adjacent signal terminals  86   a - b  is equal to about the same spacing as occurs between the signal conductors  70   a - b  of the cable wires  69  and no greater than about two to about two and one-half times such spacing. That is, if the spacing between the signal conductors  70   a - b  is L, then the spacing between the pairs of the connector signal terminals  86   a,b  (shown vertically in the Figures) should be chosen from the range of about L to about 2.5 L This is to provide tail portions that may accommodate the signal conductors of each wire  69  in the spacing L found in the wire. Turning to  FIG. 10C , it can be seen that each signal terminal  86   a,b  has a mating portion  90 , a tail portion  91  and a body portion  92  that interconnects the two portions  90 ,  91  together. Likewise, each ground terminal includes a mating portion  93 , a tail portion  94  and a body portion  95  interconnecting the mating and tail portions  93 ,  94  together. 
         [0069]    The terminals within each connector wafer  80  are arranged, as illustrated, in a pattern of G-S-S-G-S-S-G-S-S-G, where “S” refers to a signal terminal  86   a ,  86   b  and “G” refers to a ground terminal  87   a ,  87   b . This is a pattern shown in the Figures for a wafer  80  that accommodates three pairs of twin-ax wires in a single row. This pattern will be consistent among wafers  80  with a greater or lesser number of twin-ax wire pairs. In order to achieve better signal isolation, each pair of signal terminals  86   a ,  86   b  are separated from adjacent signal terminal pairs other by intervening ground terminals  87   a ,  87   b . Within the vertical rows of each connector wafer  80 , the ground terminals  87   a - b  are arranged to flank each pair of signal terminals  86   a - b . The ground terminals  87   a - b  also are arranged transversely to oppose a pair of signal terminals  86   a - b  in an adjacent connector wafer  80 . ( FIG. 7C .) 
         [0070]    The ground terminals  87   a ,  87   b  of each wafer  80  may be of two distinct types. The first such ground terminal  87   a , is found at the end of an array, shown at the top of the terminal row of  FIG. 10C  and may be referred to herein as “outer” or “exterior” ground terminal as it are disposed in the connector wafer  80  at the end(s) of a vertical terminal row. These terminals  87   a  alternate being located at the top and bottom of the terminal arrays in adjacent connector wafers  80  as the terminal rows are offset from each other as between adjacent connector wafers. The second type of ground terminal  87   b  is found between pairs of signal terminals, and not at the ends of the terminal arrays, and hence are referred to herein as “inner” or “interior” ground terminals  87   b.    
         [0071]    In this regard, the difference between the two ground terminals  87   a ,  87   b  is that the “inner” ground terminals  87   b  have wider tail, body and mating portions. Specifically, it is preferred that the body portions of the inner ground terminals  87   b  be wider than the body portions of the outer ground terminals  87   a  and substantially wider (or larger) than the body portions  92  of the corresponding pair of signal terminals  86   a - b  which the inner ground terminals  87   b  oppose, i.e., those in a signal terminal pair in an adjacent wafer. The terminals in the rows of each connector wafer  80  differ among connector wafers so that when two connector wafers are assembled together as in  FIG. 5 , the wide ground terminals  87   b  in one connector wafer row of terminals flank, or oppose, a pair of signal terminals  86   a - b . This structure provides good signal isolation of the signal terminals in each signal terminal pair. If one were to view a stack of connector wafers from their collective mating end, one would readily see this isolation. This reduces crosstalk between the signal terminals of one pair and other signal terminal pairs. 
         [0072]    The second ground terminals  87   b  preferably include openings, or windows  98 ,  99  disposed in their body portions  95  that serve to facilitate the anchoring of the terminals to the connector frame body portion  85   b . The openings  98 ,  99  permit the flow of plastic through and around the ground terminals  87   a - b  during the insert molding of the connectors. Similarly, a plurality of notches  100 ,  102  are provided in the edges of the signal terminal body portions  92  and the body portions  95  of ground terminals opposing them. These notches  100 ,  102  are arranged in pairs so that they cooperatively form openings between adjacent terminals  86   a ,  86   b  that are larger than the terminal spacing. These openings  100 ,  102  similar to the openings  98 ,  99 , permit the flow of plastic during insert molding around and through the terminals so that the outer ground terminals  87   b  and signal terminals  86   a,b  are anchored in place within the connector wafer  80 . The openings  98 ,  99  and notches  100 ,  102  are aligned with each other vertically as shown in  FIG. 10C . 
         [0073]    In order to provide additional signal isolation, the wafers  80  may further includes one or more commoning members  104  ( FIGS. 7-9 ) that take the form or bars, or combs  105 , with each such member having an elongated backbone portions  106  and a plurality of tines, or contact arms,  107  that extend outwardly therefrom at an angle thereto. The combs  105  are received within channels  110  that are formed in the wafers  80 , and preferably along a vertical extent thereof. The tines  107  are received in passages  112  that extend transversely through the connector wafers so that they may contact the ground terminals  87   a - b . As shown in  FIG. 10D , the tines  107  extend through the two mated connector wafers  80  and contact both of the ground terminals on the left and right sides of the pair of connector wafers  80 , which further increases the isolation of the signal terminals  86   a - b  ( FIG. 9 ). 
         [0074]    In furtherance of maintaining the geometry of the cable wires  68 , the outer insulation  71  and grounding shield  72  covering each twin-ax wire  69  are cut off and peeled back, to expose free ends  114  of the signal conductors  70   a - b . These conductor free ends  114  are attached to the flat surfaces of the signal terminal tail portions  91 . The grounding shield  72  of each twin-ax wire  69  is connected to the ground terminals  87   a - b  by means of a grounding cradle  120 . The cradle  120  has what may be considered a cup, or nest, portion,  121  that is formed in a configuration generally complementary to the exterior configuration of the cable wire  69 , and it is provided with a pair of contact arms  122   a - b  which extend outwardly and which are configured for contacting opposing, associated ground terminal tail portions  94  of the connector wafers  80 . 
         [0075]    The two contact arms  122   a - b  are formed along the outer edges of the cup portion  121  so that contact surfaces  124  formed on the contact arms  122   a - b  are preferably aligned with each other along a common plane so that they will easily engage opposing surfaces of the ground terminal tail portions for attachment by welding or the like. The grounding cradles  120  may also be formed as a ganged unit, where a certain number of cradles  120  are provided and they are all interconnected along the contact arms  122   a - b  thereof. The cup portions  121  are generally U-shaped and the U is aligned with the pair of signal terminal tail portions so that the signal terminal tail portions would be contained within the U if the cup portion  121  were extended or vice-versa. In this manner, the geometry of the twin-ax wires is substantially maintained through the termination of the cable wires  69  with minimal disruption leading to lessened impedance discontinuities. Thus, the high speed signals of the chip set  56  are removed from passage directly on the circuit boards  50 ,  52 , and the use of vias for the board connectors is eliminated. This not only leads to a reduction in cost of formation and manufacture of the circuit board, but also provides substantially complete shielding at the connection with the cable connector without any excessive impedance discontinuity. 
         [0076]    As shown in  FIG. 10A , the spacing between the connector wafer terminal tail portions of adjacent connector wafers is first at a predetermined spacing, then the spacing lessens where the terminal body portions are held in the connector frame and then the spacing increases at the terminal mating portions to a spacing that is greater than the predetermined spacing. The reduction in spacing along the terminal body portions takes into account the effect of the wider body portions of the ground terminals  87   b  and thus the spacing between the connector wafers in a pair of connector wafers varies in order to lessen any impedance discontinuities that arise. FIG.  10 B illustrates how the wider ground terminal  87   b  in one vertical array are vertically offset from the other ground terminal  87   a  in the other, adjacent terminal array. This offset arrangement can also be determined from the order of the terminal-receiving passages  89   e  of the opposing mating connector  89  of  FIG. 5 . The connector wafer termination area  85   c  is preferably overmolded with a plastic  116  so as to cover the welds or solder used to attach the cable wire free ends  114  to their respective terminal tail portions and seal the termination area. Additional windows  117  may be formed in this overmolded portion to provide an air-filled passage between the signal terminal tail portions and the wire conductors  70   a - b  of each cable wire pair. 
         [0077]    The connector wafers  80  discussed above may also be used in a manner as illustrated in  FIGS. 3-4 , where the terminal mating portions extend through the body of a backplane connector such as the pin header shown and into a channel defined between two sidewalls on the other side of an intervening circuit board  54 . An opposing, mating right angle connector  89  similar to that shown in  FIG. 5  is provided to fit into the space between the connector sidewalls  82  in order to effect a connection at a right angle to the intervening circuit board  54 . In this embodiment, the terminal mating portions  90 ,  93  may take the form of flat mating blades or pins. The cable wires  69  associated with some of the connector wafers are in line with the terminal mating portions, but there may be instances where it is desired to have the cable wires  69  attached to the connector wafers in an angled fashion. 
         [0078]    A pair of such right angle connector wafers  130  are shown as part of the group of connector wafers illustrated in  FIGS. 3-4 . The use of a right angle exit point from the connector wafer frees up some space at the rear ends of the group of connector wafers.  FIG. 13  illustrates a partial sectional view of such a connector wafer  130 . The terminals of the connector are formed with bends  132  in them so that the signal terminal tail portions  91  and ground terminal tail portions  94  are aligned with the entry point of the twin-ax wires  69  into the connector wafer frame  84 . Ground cradles such as those described above are used to make contact with the outer conductive shielding  72  of the wires and utilize contact arms to attach to the ground terminal tail portions  94 . In such an arrangement, the ground cradles are better being used in a ganged fashion. 
         [0079]      FIG. 14  illustrates the use of a cable bypass assembly  200  to provide a point-to-point connection on a circuit board  202  for high speed and high frequency signal transmission. In this embodiment, a plurality of twin-ax wires  204  enclosed in a cable  206  are directly connected to two fixed interconnects in the form of wafer connectors  208  mounted to the circuit board  202  in order to bypass the lossy material of the circuit board  202 . The twin-ax wires  204  each contain a pair of signal conductors  205  that extend lengthwise through each wire  204  and which are surrounded by a dielectric material  207 . Each wire  204  is typically also surrounded by an outer ground shield, in the form of a conductive foil wrapping or the like. The cable wires  204  may be drainless, or as best illustrated in  FIG. 18 , they may contain an additional drain wire  240 . Although two connectors  208  are shown at the ends of the cable assembly  200 , the ends of the cable  206  may be terminated to other components such as those mentioned above, including chips  201  and the like as well as designated termination areas  203  on the circuit board  202  as illustrated in  FIG. 15 . As illustrated in  FIG. 14 , the cable assembly  200  may be used to provide a transmission line between two chips  201  by way of connections to the circuit board  202 . 
         [0080]      FIG. 16  illustrates a plurality of wafer connectors  208  which are grouped together in a stack. Each wafer connector  208  has an insulative frame, or housing  210 , that supports, as best illustrated in  FIG. 17A , a plurality of conductive terminals  212 . The terminals  212  are shown as two distinct types of first and second terminals  214 ,  216 , with the first, or “signal”, terminals  214  being designated and structured for the transmission of data signals, and the second, or “ground” terminals  216  being designated and structured to provide grounds for the signal terminals  214 . As seen in  FIG. 17A  and other of the Figures, there is at least one ground terminal  216  that flanks a pair of signal terminals  214 , and preferably, at least one ground terminal  216  is interposed between adjacent pairs of signal terminals  214 . In some applications, ground terminals  216  will flank each pair of the signal terminals  214  in each connector  208 , and in other applications, all pairs will be flanked with the exception of an end pair, as is shown in  FIG. 17A . The wafer connector frame  210  supports the terminals  212  in a fashion such that the opposing free ends of the terminals are arrayed along two distinct sides  218 ,  219  of the frame  210 . The sides  218  of the wafer connectors  218  are mating sides to which the cable wires  204  are terminated, while the side  219  are mounting sides that mate with the circuit board  202 . The sides are illustrated in this embodiment as disposed adjacent to each other, but they can be also oriented at opposite ends of the connectors  208 . 
         [0081]    In this embodiment, the one free ends of the terminals along the mounting sides  219  of the connectors  208  are formed as compliant pins  220 , and they define mounting ends  222  of the terminals  212 . These compliant pins  220  are received within vias located in the circuit board  202  (not shown). The other terminal free ends are structured as tail ends  224  with flat contact surfaces  225  that engage the free ends  213  of the signal conductors  205  of the twin-ax wires  204 . The tail ends  224  of the first (signal) terminals  214  are contacted by the free ends  213  of the twin-ax wire signal conductors  205 . 
         [0082]    As illustrated in  FIGS. 16C-19D , a single ground member  228  is preferably provided for each connector  208  and the ground member preferably serves multiple functions. First, it supports and conductively engages the outer shields  209  of the twin-ax wires  204 . Secondly, it preferably interconnects the tail ends of the ground terminals  216  together (along with the corresponding wire outer shields  209 ) to form a continuous and low impedance ground path within the termination areas of the wafer connectors  208 . This particular ground member  228  differs the prior embodiments in that it is continuous in configuration. The ground member  228  includes a body portion  229  that is shown as an elongated, planar ground strip. It extends at an angle, preferably transversely to the tails of all of the wafer connector terminals  212 . As shown in the Figures, especially  FIG. 19C , the ground member  228  has a configuration that is best described as two interconnected L-shape segments. The L-shaped segments may be considered as being stacked on top of each other and cooperatively they define a ground path that partially surrounds each pair of signal (first) terminals  216 . It can be seen from  FIG. 18 , that the ground member  228  runs alongside and thereby surrounds three sides of the one pair of signal terminals, and runs alongside two sides of the other pair of signal terminals. In both instances, the L-shaped segments run along one lengthwise side of each signal terminal pair and along one widthwise side of each signal terminal pair, namely the free ends  213  of the first terminals  216 . 
         [0083]    One or more grounding nests, or cradles  230 , are provided as part of the ground members  228  and these are spaced apart from the body portion  229  and connected thereto as illustrated. The nests  230  preferably have a plurality of elongated contact arms  231  that extend generally parallel to the body portion  229  and which are configured to permit them to be folded over the wires  204  during assembly such as by way of a crimping process to make electrical contact with the outer shielding member  209  of the twin-ax wires  204 . The ground member  228  may further include contact legs, or tabs  232 , that extend away from it at an angle, shown as extending perpendicularly in the Figures. The contact tabs  232  make contact with the tails of the ground terminals  216  of the wafer connector  208 . These tabs  232  are connected to the ground terminal tails in a suitable manner, such as by welding, soldering, clamping or the like, with welding being the most useful manner of attachment. 
         [0084]    The contact arms  231  of the ground member nests  230  are folded over onto the outer shielding members  209  of the corresponding twin-ax wires  204 . The nests  230  are further preferably positioned with respect to the ground member  228  to position the signal conductor free ends  213  of the twin-ax wires  204  in a desired termination position where they contact the flat contact surfaces  225  of signal terminal tail ends  224 , or very close thereto so as to require minimal bending of the signal conductors  205  into desired contact. These conductor free ends  213  may have flat portions formed thereon as shown in  FIG. 17A  for attachment to the first terminals  214 . Consequently, the grounding strip contact tabs  232  may be formed with an offset such that the free ends  233  of the contact tabs  232  extended away from the ground member body portion  229 . Preferably, the contact tab free ends  233  lie in a plane spaced apart and generally parallel to a second plane in which the ground member body portion  229  extends. The contact tab free ends  233  further lie in a plane that is spaced apart from a plane defined by pairs of the first terminals  214 . In this manner, the outer surfaces of the signal conductors  205  are aligned with the ground terminal contact surfaces  225  to preferably lay as flat as possible thereon. The free ends  213  of the cable wires  204  are also maintained within the termination areas  235  defined in the connectors  208 , which is later covered by a dielectric material  236  by way of overmolding or the like. Although the offset is shown in the Figures as part of the contact tabs  233 , it will be understood that it may be formed as part of the second (ground) terminals  216 . In similar instances the tails of the second terminals may be structured so as to contact the ground member  228  in a plane different than the plane that is occupied by most of the second terminals  216 . The cable wire free ends  213  are also positioned between and within the boundaries of the wafer connector bodies to ensure the wafer connectors  208  all have a uniform, or other desired thickness. 
         [0085]    While a preferred embodiment of the Present Disclosure is shown and described, it is envisioned that those skilled in the art may devise various modifications without departing from the spirit and scope of the foregoing Description and the appended Claims.