Abstract:
An antenna circuit tunable to a determined resonance frequency, includes an antenna coil and adjustable components. The antenna circuit includes a filter having at least one point to tap an electric voltage the amplitude of which forms a pertinent indication for the tuning of the antenna circuit. To tune the antenna circuit, the adjustable components of the antenna circuit are adjusted so that the electric voltage has a determined amplitude.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
   This application is a continuation of International Application No. PCT/FR2003/003295, filed Nov. 5, 2003, which was published in the English language on May 7, 2004, under International Publication No. WO2004/045074 A1, and the disclosure of which is incorporated herein by reference. 

   BACKGROUND OF THE INVENTION 
   The present invention relates to inductive antenna circuits, particularly for contactless integrated circuit readers, and more particularly, to an antenna circuit tunable to a determined resonance frequency, comprising an antenna coil and adjustable components. The present invention further relates to a method for tuning such an antenna circuit. 
     FIG. 1  schematically represents a contactless integrated circuit reader RD equipped with an antenna circuit  10  of the aforementioned type. The antenna circuit  10  comprises a coil L and adjustable components, such as two adjustable capacitors C 1 , C 2 . The antenna circuit receives an alternating current (AC) excitation signal S e  of frequency F 0  supplied by the reader RD, and sends an AC magnetic field FLD. This magnetic field enables the reader RD to communicate by inductive coupling with contactless integrated circuits CIC 1 , CIC 2  . . . CICn which are each equipped with a respective antenna coil L 1 , L 2  , . . . Ln. The integrated circuits CIC 1 –CICn are, for example, contactless smart card integrated circuits, contactless electronic tag integrated circuits, contactless badge integrated circuits, and the like. 
   The adjustable capacitors C 1 , C 2  enable the resonance frequency of the antenna circuit to be tuned to the frequency F 0  of the excitation signal, which is for example 13.56 Mega Hertz (MHz) according to the International Standards Organization (ISO) standards ISO 15693 and ISO 14443. The tuning of the antenna circuit to the frequency F 0  enables an optimal communication distance to be obtained between the reader and the contactless integrated circuits. 
   Although this tuning is generally performed at the time of commissioning the antenna circuit, the latter is then subjected to variations in humidity and temperature that can substantially affect its resonance frequency. The presence of metal objects in the proximity of the antenna circuit further influences the resonance frequency. The antenna circuit must therefore be tuned again on site to take its conditions of use into account. It must then be tuned at regular intervals if the reader RD is to have an optimal communication distance. 
   The tuning of the antenna circuit can be performed manually but this solution requires the intervention of qualified staff. Furthermore, a manual tuning can prove difficult in certain conditions of use. As an example, a contactless badge reader dedicated to controlling access in high altitude transport facilities (e.g., chair lifts, cable cars, etc.) will be considered. Due to the poor weather conditions and the very low temperatures, it is difficult to adjust the components of the antenna circuit bare-handed, using a screwdriver. 
   In this case, an electrically tunable antenna circuit is provided comprising embedded equipment that automatically tunes the antenna circuit (“autotuning”), once a day for example. 
     FIG. 2  represents an electrically tunable antenna circuit  20 , comprising electrically adjustable capacitors C 1 , C 2  for that purpose. The capacitor C 1  comprises a capacitor C 1   0  in parallel with a plurality of switchable capacitors C 1   i . The capacitor C 2  comprises a capacitor C 2   0  in parallel with a plurality of switchable capacitors C 2   j . Each capacitor C 1   i , C 2   j , respectively, is switchable by an electric relay RL i , RL j , respectively, arranged in series with the capacitor. The relays RL i  are driven by signals S i  and the relays RL j  are driven by signals S j . Thus, the combination of signals S i  determines the value of the capacitor C 1  and the combination of signals S j  determines the value of the capacitor C 2 . 
     FIG. 3  represents curves of phase φ and of impedance Z of the antenna circuit  20  when it receives an excitation signal Se oscillating at the frequency F 0 , such as 13.56 MHz for example. 
   The tuning of the antenna circuit  20  to the frequency F 0  theoretically involves finding a pair of determined values of the impedance Z and of the phase φ, generally Z=50Ω and φ=0°. 
   However, a piece of equipment for measuring the phase Φ and the impedance Z is generally too costly and cumbersome to form an embedded piece of equipment. 
   Thus, as shown in  FIG. 4 , the embedded equipment performing the automatic tuning of the antenna circuit generally includes a simple voltage standing wave ratio (VSWR) meter TMR arranged between the antenna circuit  20  and the reader RD, and a tuning device TC 1  supplying the signals S i , S j  for controlling the relays of the antenna circuit. The VSWR meter TMR measures the voltage standing wave ratio and the device TC 1  tunes the antenna circuit so that the voltage standing wave ratio is minimal at the frequency F 0 . 
   This tuning method is simple and inexpensive, but the precision of it is mediocre. Indeed, the voltage standing wave ratio provides an indication which, although it is pertinent, can be considered in the light of experience acquired, to be insufficient in itself to achieve reliable and precise tuning. Furthermore, an adjustment of the antenna circuit based on the voltage standing wave ratio is long and difficult to find. Many combinations of the signals Si, Sj must be tested before finding the combination taken to be optimal. 
   Thus, it is desirable to provide a method for tuning an antenna circuit that is more precise than the classical method described above. It is also desirable to provide a tuning method that is precise and that can be implemented by embedded equipment that is simple and affordable to produce. It is also desirable to provide an antenna circuit that is simple to tune. 
   BRIEF SUMMARY OF THE INVENTION 
   Briefly stated, the present invention comprises an antenna circuit including an integral filter or a phase shifter at the terminals of which a voltage appears the amplitude of which provides a pertinent indication capable of being used to tune the antenna circuit with precision, when the amplitude of the excitation signal is known. If the amplitude of the excitation signal is not known, the present invention provides for measuring two voltages at the terminals of the filter and for tuning the antenna circuit so that these two voltages have a determined amplitude ratio and a determined phase difference. 
   The present invention also comprises an antenna circuit tunable to a determined resonance frequency. The antenna circuit includes an antenna coil and adjustable components, as well as a filter that is an integral part of the antenna circuit. The filter has at least one electric voltage tap point to tap an electric voltage the amplitude of which forms a pertinent indication for tuning the antenna circuit. 
   According to one embodiment, the filter is arranged at the input of the antenna circuit. 
   According to one embodiment, the filter has a structure in Π. 
   According to one embodiment, the filter is an inductor-capacitor (LC) element. 
   According to one embodiment, the filter includes a series inductor and two capacitors in parallel. 
   According to one embodiment, the antenna circuit includes an embedded measuring circuit connected to the filter at least at the at least one electric voltage tap point. 
   According to one embodiment, the filter has two electric voltage tap points to two electric voltages the amplitude ratio of which forms a pertinent indication for tuning the antenna circuit. 
   According to one embodiment, the antenna circuit includes an embedded measuring circuit connected to the two points for tapping the two electric voltages. 
   According to one embodiment, the measuring circuit includes amplitude measuring circuitry that supplies two signals proportional to the amplitude of the electric voltages. 
   According to one embodiment, the measuring circuit includes phase difference measuring circuitry that measures the phase difference between the two electric voltages. 
   According to one embodiment, the phase difference measuring circuitry supplies a signal that is proportional to the phase difference between the two electric voltages. 
   According to one embodiment, the phase difference measuring circuitry includes a logic gate receiving input signals resulting from the two electric voltages and an output that supplies a signal proportional to the duty cycle ratio of a signal supplied by the logic gate. 
   According to one embodiment, the antenna circuit includes an embedded tuning device configured to adjust the adjustable components of the antenna circuit so that the two electric voltages have a determined amplitude ratio. 
   According to one embodiment, the tuning device is configured to adjust the adjustable components of the antenna circuit so that the two electric voltages have the same amplitude. 
   According to one embodiment, the embedded tuning device is configured to adjust the adjustable components of the antenna circuit so that the two electric voltages also have a determined phase difference. 
   According to one embodiment, the tuning device is configured adjust the adjustable components of the antenna circuit so that the two electric voltages have a phase difference of about 90°. 
   According to one embodiment, the tuning device includes a microprocessor receiving a first signal representative of the amplitude of one of the two electric voltages, a second signal representative of the amplitude of the other electric voltage, and a third signal representative of the phase difference between the two electric voltages. The microprocessor supplies to the antenna circuit signals for controlling the adjustable components. 
   According to one embodiment, during the tuning of the antenna circuit by the tuning device, the antenna circuit receives an excitation signal supplied by a contactless integrated circuit reader. 
   According to one embodiment, the adjustable components include electrically switchable capacitors. 
   According to one embodiment, the antenna circuit comprises adjustable components each comprising a capacitor, a diode connected to the cathode of the capacitor, and a switch transistor for applying or not applying a bias voltage to the anode of the diode, so that the capacitor is active or inactive in the antenna circuit. 
   The present invention also comprises a contactless integrated circuit reader, comprising an antenna circuit according to the present invention. 
   The present invention also comprises a method for tuning to a determined resonance frequency an antenna circuit comprising an antenna coil and adjustable components. The method includes incorporating a filter into the antenna circuit so that the filter is an integral part of the antenna circuit; applying an excitation signal to the antenna circuit; tapping at least a first electric voltage at a terminal of the filter; and adjusting the adjustable components of the antenna circuit so that the first electric voltage has a determined amplitude. 

   
     BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS 
     The foregoing summary, as well as the following detailed description of the invention, will be better understood when read in conjunction with the appended drawings. For the purpose of illustrating the invention, there are shown in the drawings embodiments which are presently preferred. It should be understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown. 
     In the drawings: 
       FIG. 1  is a schematic diagram of a conventional contactless reader equipped with a tunable antenna circuit; 
       FIG. 2  is a schematic diagram of a conventional tunable antenna circuit comprising electrically adjustable components; 
       FIG. 3  is a graph showing phase and impedance curves of the antenna circuit of  FIG. 2 ; 
       FIG. 4  is a schematic block diagram of a conventional antenna circuit having an automatic tuning device; 
       FIG. 5  is a schematic diagram of a contactless reader comprising an antenna circuit according to the present invention and an automatic tuning device according to the present invention; 
       FIG. 6  is a detailed electrical schematic diagram of the measuring circuit represented in block form in  FIG. 5 ; 
       FIG. 7  is a detailed electrical schematic diagram of another measuring circuit represented in block form in  FIG. 5 ; 
       FIGS. 8A to 8D  are timing diagrams of electric signals showing the operation of the measuring circuit in  FIG. 7 ; 
       FIG. 9  is a detailed electrical schematic diagram of an adjustable component according to the present invention; and 
       FIGS. 10A and 10B  are graphs showing the operation of the adjustable component in  FIG. 9 . 
   

   DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 5  represents a contactless integrated circuit reader RD comprising an antenna circuit  30  according to the present invention and an embedded tuning device TC 2 . The antenna circuit  30  and the tuning device TC 2  can be produced on the same medium, such as on a same printed circuit board for example. They thus form a global antenna circuit integrating means for automatically tuning the actual antenna circuit. 
   The antenna circuit  30  according to the present invention comprises an antenna circuit  20  and a filter FP. The antenna circuit  20  is an electrically tunable antenna circuit comprising electrically adjustable components. Its structure is for example that of the antenna circuit described above in relation with  FIG. 2 . The antenna circuit  20  is here represented tuned, in the form of a non-reactive resistor Ra of 50Ω. 
   The filter FP is connected to the input of the antenna circuit  20  and is an integral part of the antenna circuit  30 . The input of the filter FP forms the input of the antenna circuit  30 . An excitation signal Se is applied to the antenna circuit  30 , i.e., to the input of the filter FP, and is transmitted to the antenna circuit  20  via the filter FP. 
   For more clarity, the antenna circuit  20  will hereinafter be called “sub-antenna circuit”, so as to distinguish it from the antenna circuit  30 . 
   The filter FP is here a filter in Π comprising a series inductor LF and two capacitors CF 1 , CF 2 . Generally speaking, “capacitor X” (X being CF 1  or CF 2  for example) designates a capacitor having a capacitance which is equal to X or a group of capacitors in series and/or in parallel forming a resulting capacitance of value X. 
   The excitation signal Se is here supplied by a contactless integrated circuit reader RD, comprising an alternating current (AC) signal generator GEN having an internal series resistor Ri of about 50Ω. 
   It is assumed here that the antenna circuit according to the present invention is intended for readers of various origins the electrical characteristics of which are not constant, and it is therefore considered here that the nominal amplitude of the excitation signal Se is not known. The nominal amplitude is the amplitude of the signal Se when the generator GEN is linked to a standard load, generally about 50Ω. 
   In these conditions, the tuning device TC 2  is linked to the filter FP at two points P 1 , P 2  for tapping two voltages V 1 , V 2 , located at the input of the filter FP (i.e., the input of the antenna circuit  30 ) and at the output of the filter FP (i.e., the input of the sub-antenna circuit  20 ). The point P 1  is therefore located here on a terminal of the inductor LF and on the anode of the capacitor CF 1  and the point P 2  is located on the other terminal of the inductor LF and on the anode of the capacitor CF 2 . 
   According to the present invention, the capacitors CF 1 , CF 2  and the inductor LF are determined when the antenna circuit  30  is designed, in the following manner:
         1) the sub-antenna circuit  20  is tuned to the desired resonance frequency, such as 13.56 MHz for example, and thus has a determined input impedance Z and a determined phase φ, generally 50Ω and 0°,   2) the filter FP is combined with the sub-antenna circuit  20  to form the antenna circuit  30  according to the present invention, and the values of CF 1 , CF 2 , LF are then determined by theoretical calculation and/or by experiments. The values of CF 1 , CF 2 , LF are such that the antenna circuit  30  always has, seen from its input, an impedance Z of 50Ω and a phase φ of 0° despite the presence of the filter.       

   According to the studies carried out by the applicant, the values of CF 1 , CF 2 , LF for a frequency of F 0  of 13.56 MHz are for example:
 
CF1=CF2=220 pF
 
LF=560 nH
 
   The filter FP is thus a low-pass filter having a cut-off frequency greater than the targeted tuning frequency F 0 , here 13.56 MHz. 
   After determining CF 1 , CF 2 , LF, the amplitude ratio and the phase difference between the voltages V 1  and V 2  are measured at the input and at the output of the filter FP, again at the targeted frequency F 0 . With a filter in Π, it can be seen that the amplitude of V 1  is equal to the amplitude of V 2  and that the phase difference between these two voltages is about 90°. 
   Once the values CF 1 , CF 2 , LF have been found, as well as the amplitude ratios and the phase difference between V 1  and V 2 , the filter FP can be industrially manufactured, preferably with quality components, and can be integrated into all of the antenna circuits  30  according to the present invention that are marketed and which comprise sub-antenna circuits  20  of same structure. 
   When the antenna circuit  30  is not tuned to the targeted frequency, here 13.56 MHz, at the terminals of the filter FP, voltages V 1  and V 2  are found which have different amplitudes and a phase difference that is not equal to 90°. In this case, the tuning of the antenna circuit  30  can be obtained simply, by adjusting the components of the sub-antenna circuit  20  so that the amplitude of V 1  becomes equal to the amplitude of V 2  and so that the phase difference between these two voltages becomes equal to 90°. Once the tuning to the frequency F 0  obtained, the filter FP behaves like a wire having an output voltage V 2  equal to the input voltage V 1  and an output phase in quadrature with the input phase (±90°). 
   The precision of the tuning that can be obtained is greater than the precision that can be obtained with a simple voltage standing wave ratio (VSWR) meter. 
   The tuning of the antenna circuit  30  is here performed at regular intervals by the embedded device TC 2 . This device mainly comprises a measuring circuit MC and a microprocessor MP equipped with a program memory MEM. 
   The circuit MC comprises two rectifier circuits MC 1 , MC 2  and a phase difference measuring circuit MC 3 . The circuit MC 1  receives the voltage V 1  at input and supplies a direct current (DC) signal V 1 rms representative of the amplitude of the voltage V 1 . The circuit MC 2  receives the voltage V 2  at input and supplies a dc signal V 2 rms representative of the amplitude of the voltage V 2 . The circuit MC 3  receives the voltages V 1  and V 2  at input and a DC signal Vp representative of the phase difference between the voltages V 1  and V 2 . The signals V 1 rms, V 2 rms and Vp are applied to the microprocessor MP through an analog-digital converter ADC, which supplies the signals S i , S j  described above, performing the control of the adjustable components of the sub-antenna circuit  20 . 
     FIG. 6  represents an example of an embodiment of the circuit MC 1  or MC 2 . The voltage V 1  or V 2  is applied, through a decoupling capacitor Cd, to the cathode of a reverse biased diode D 1  having its anode connected to the ground, as well as to the anode of a forward biased diode D 2 . The cathode of the diode D 2  is linked to the anode of a capacitor C 1  the cathode of which is connected to the ground, and to a voltage-divider bridge here comprising two resistors R 1 , R 2 . The output of the divider bridge R 1 , R 2  forms the output of the circuit MC 1  or MC 2  and supplies the voltage V 1 rms or V 2 rms. 
     FIG. 7  shows an example of an embodiment of the circuit MC 3 . The voltage V 1  is applied to a first input of an “exclusive or” (XOR) logic gate through a decoupling capacitor Cd 1  and a series resistor R 3 . The voltage V 2  is applied to a second input of the gate XOR through a decoupling capacitor Cd 2  and a series resistor R 4 . Furthermore, the first input of the XOR gate is DC voltage biased by being connected to the middle point of a voltage divider bridge comprising two resistors R 5 , R 6  in series, the resistor R 5  receiving a voltage Vcc and the resistor R 6  being connected to the ground. Similarly, the second input of the XOR gate is DC voltage biased by being connected to the middle point of a voltage-divider bridge comprising two resistors R 7 , R 8  in series, the resistor R 7  receiving the voltage Vcc and the resistor R 8  being connected to the ground. The XOR gate is powered by the voltage Vcc and its output supplies a signal Vx. The signal Vx is applied to a low-pass filter comprising for example a series resistor R 9  and a capacitor C 2  the cathode of which is connected to the ground. The output of the low-pass filter supplies the signal Vp. 
     FIGS. 8A to 8D , respectively, represent the shape of the signals V 1 , V 2 , Vx and Vp when the voltages V 1  and V 2  are phase-shifted by 90°. The voltages V 1 , V 2  as applied to the DC voltage biased inputs of the XOR gate form logic signals. Thus, the low value of the voltages V 1 , V 2  (negative half-wave) represents the logic “0” and the high value (positive half-wave) represents the logic “1” (Vcc). As the signals V 1 , V 2  are in quadrature, the output signal Vx is a logic signal of frequency double that of V 1 , V 2  having a duty cycle of 0.5. In these conditions, the signal Vp is equal to 0.5 Vcc. The signal Vp is equal to 0 when the signals V 1 , V 2  are in opposite phase and is equal to Vcc when these signals are in phase. 
   Thus, the search by the microprocessor MP for a phase difference of 90° between V 1  and V 2  here corresponds to the search for a value of Vp equal to 0.5 Vcc, i.e. half of the full-scale digital value Vpmax that can be supplied by the converter ADC. 
   In summary, the tuning of the antenna circuit by the microprocessor MP here involves searching for the right combination of signals Si, Sj such that
 
V1rms=V2rms
 
Vp=0,5 Vpmax
 
   To simplify the work of the microprocessor MP and to reduce the time required to search for the right combination of signals Si, Sj, it is advantageous to load a correlation map into the memory MEM enabling the microprocessor to rapidly find the combination searched for using the values V 1 rms, V 2 rms, Vp supplied by the measuring circuit MC. 
   The time interval between two sequences of tuning the resonance frequency of the antenna circuit  30  can be predetermined and under the control of the microprocessor MP. The tuning sequences can also be under the control of the reader RD which sends the microprocessor MP a retiming signal when a tuning sequence must be performed. This retiming signal can be implicit and consist, for example, in a temporary interruption of the excitation signal Se. In this case, the microprocessor MP is programmed to start a new tuning sequence when the excitation signal reappears. 
   As indicated above, the sub-antenna circuit  20  can be produced in accordance with  FIG. 2 , i.e., by using relays RL i , RL j  to produce the electrically switchable components, generally switchable capacitors C 1   i,  C 2   j.    
   However, relays are costly and cumbersome devices which can generate spurious switching activity and spurious resistance in the antenna circuit, capable of causing an attenuation of the antenna signal and/or a shift of the resonance frequency in time. 
   According to one optional but advantageous aspect of the present invention, the switchable capacitors CA 1   i,  CA 2   j  of the antenna circuit  30  are produced by means of static switches such as bipolar transistors or metal oxide semiconductor (MOS) transistors, and a blocking diode. 
     FIG. 9  represents a switchable component C 1   i,  C 2   j  produced according to this principle. The component comprises a capacitor C the cathode of which is linked to the ground through a diode DA 1  instead of being linked to the ground through an electric relay. When the antenna circuit  30  receives the excitation signal Se, the anode of the capacitor C receives an AC voltage Vac. 
   The anode voltage of the diode DA 1  is controlled by a static switch SW, such as a MOS or bipolar transistor, driven by one of the signals Si or Sj supplied by the microprocessor MP. At one terminal, the switch SW receives a DC voltage V+ and its other terminal is linked to the anode of the diode DA 1 , through a diode DA 2 . The voltage V+ is thus supplied by the switch SW when the latter is in the “ON” state, and is applied to the anode of the diode DA 1  via the diode DA 2 . This second diode DA 2  is arranged in the forward direction relative to the voltage V+ and in the reverse direction relative to the voltage Vac, which prevents the latter from reaching the switch SW. 
   It should be noted that any other low-pass component can be provided in place of the diode DA 2 . Thus, for example, the use of an inductor to bias and turn on the diode DA 1  may be preferred to using the diode DA 2 . 
   When the switch transistor SW is in the OFF state, the capacitor C charges and its cathode has a negative voltage. The diode DA 1  turns off since the half-waves of the voltage Vac copied on its anode are below the conduction threshold of the diode DA 1 , as shown in  FIG. 10A . 
   When the switch SW is in the ON state, the bias voltage V+ causes the voltage of the anode of the diode DA 1  to rise again. The diode DA 1  turns on since the half-waves of the voltage Vac copied at its anode via the capacitor C are above the conduction threshold of the diode DA 1 , as shown in  FIG. 10B . 
   Thus, the switchable capacitor C 1   i,  C 2   j  according to the present invention is active in the antenna circuit when the switch SW is in the ON state, and is inactive in the antenna circuit when the switch SW is in the OFF state. As the switch SW is controlled by one of the signals Si or Sj, the switchable capacitor CA 1   i,  CA 2   j  is equivalent to a capacitor switched by means of a relay, but without the disadvantages of a relay. 
   It will be understood by those skilled in the art that various alternative embodiments and applications of the present invention are possible. 
   Thus, the method according to the present invention may comprise only a measurement of one of the voltages V 1 , V 2  without a phase measurement if the nominal amplitude Vnom of the excitation signal Se is known. It will be assumed here as an example that the excitation signal has a nominal amplitude Vnom of 30V with a load of 50Ω. While the antenna circuit is not tuned the voltage V 1  at the input of the antenna circuit or the voltage V 2  at the output of the filter is not equal to 30V (V 1 =8V and V 2 =40V for example). When the antenna circuit is tuned, V 1 =V 2 =30V since the filter behaves like a 50Ω wire. 
   Furthermore, the method according to the present invention can be implemented with other types of filter, low-pass, high-pass, band-pass, in Π, in T, etc. preferably having cut-off frequencies that are above or below the targeted tuning frequency F 0 , which must therefore preferably be within the bandwidth of the filter. 
   Moreover, the term “filter” is in no way restrictive in the context of the present invention and can designate any type of element, such as a tuned phase-shifter for example, having a determined impedance and a determined phase at the targeted tuning frequency. This element integrated into an antenna circuit according to the present invention is preferably an LC element without any resistive element that might attenuate the antenna signal, although resistive elements of low value can however by provided for various other reasons. 
   Depending on the LC element used as a “filter” within the meaning of the present invention, voltages V 1 , V 2  can be obtained that have different amplitudes and a phase difference that is different by 90° at the targeted tuning frequency. The amplitude ratio and the phase difference of the voltages V 1 , V 2  are then used as reference values for the tuning of the filter according to the present invention. However, the advantage of a filter in Π of LC-type is that it provides a phase difference of 90° that can be detected by means of a simple XOR gate, as described above. 
   Furthermore, although providing an embedded device TC 2  automatically performing the tuning of the antenna circuit  30  was proposed above, the method of the present invention can also be implemented manually on an antenna circuit comprising manually adjustable components. However it is implemented, the method of the present invention offers the advantage of enabling an antenna circuit to be tuned with precision without requiring complex measuring means like impedance and phase analysers. 
   It will be appreciated by those skilled in the art that changes could be made to the embodiments described above without departing from the broad inventive concept thereof. It is understood, therefore, that this invention is not limited to the particular embodiments disclosed, but it is intended to cover modifications within the spirit and scope of the present invention as defined by the appended claims.