Abstract:
An Al 3 Ti film having a large amount of dissolved Si is deposited on a semiconductor substrate to form a laminate with an Al wiring film, and heat treatment is performed at a temperature of at least 400° C., to thereby absorb excessive Si into the Al 3 Ti film and to so prevent the occurrence of Si nodules. By depositing Al film at a temperature of at least 400° C. at the time of depositing the Al wiring film on the Al 3 Ti film, excessive Si is caused to be absorbed in the Al 3 Ti film. Further, at the time of depositing a Ti film on the semiconductor substrate and depositing the Al wiring film, the Al film is deposited at a temperature of at least 400° C., there is reaction between the Ti film within the laminate, causing an Al 3 Ti film to be produced, and excessive Si is absorbed in the Al 3 Ti film produced.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS  
       [0001]     This is a divisional application of application Ser. No. 09/754,264, filed Jan. 5, 2001, which is hereby incorporated by reference in its entirety for all purposes. 
     
    
     BACKGROUND OF THE INVENTION  
       [0002]     1. Field of the Invention  
         [0003]     The present invention relates to a semiconductor element manufacturing method and to the construction of an element manufactured using the method, and particularly to a deposition method for a thin film used as wiring and a laminated construction for a thin film deposited using this method.  
         [0004]     2. Description of the Related Art  
         [0005]     In the case of forming an element on a conventional semiconductor substrate, a wiring thin film deposition method as shown in  FIGS. 1-3  is carried out. First of all, an insulating film  2  (for example, SiO 2  BPSG) is deposited on a semiconductor substrate  1  typically of a material such as silicon, and a barrier layer  3  (for example, Ti, TiN or a laminate of the two) is deposited. Next, an Al film is deposited with the semiconductor substrate heated to 150-400° C., by a sputtering method using an Al—Si—Cu target having Si added to 0.05-1.0% which is at least the solution limit of Al.  
         [0006]     Here, Si is added to improve EM (electromigration) resistance. Also, the reason for heating the semiconductor substrate at the time of Al deposition is to increase the size of the Al grains (crystal grain) to increase EM resistance, and to improve step coverage. Next, an antireflection membrane (ARM)  5  that is, for example, Ti, TiN or a laminate of the two, is deposited, preferably by performing a photolithography process. After that, wiring is patterned using a well known photolithography method or etching method.  
         [0007]     However, with the Al thin film sputter deposited using an Al—Si—Cu target having Si added to at least the solution limit of Al as described above, there are the following problems. Specifically, at the time of depositing the Al film, deposited Si particles  6  are dissolved in Al due to the high heating temperature of the deposition, and in a process of cooling the wafer gradually after deposition from the deposition temperature there is a nucleus of remaining Si that could not be dissolved. Recrystallization growth of the temporarily dissolved Si starts, as a result of which an enormous Si deposit  7  is formed (refer to  FIG. 4 ( 1 )-( 3 ). This Si deposit  7  deposited in the Al film is not removed by etching gas in the Cl 2  family that is normally used at the time of etching the Al film in a subsequent step, and as a result remains as an Si residue. As shown in  FIG. 5 , this Si residue  8  unfortunately acts as a mask at the time of etching the Al underneath the residue. Because of this, pattern defects arise, and if the size of the Si residue becomes larger than an interval between wires in the wiring pattern this will cause shorting between wires.  
       SUMMARY OF THE INVENTION  
       [0008]     An object of the present invention is to solve the problem of Si nodules that occurs when depositing an Al wiring film with a sputter method using an Al—Si—Cu target, and to provide a more stable deposition method for a wiring thin film that prevents Si nodules occurring.  
         [0009]     With the present invention, in order to achieve the above object, there is a wiring thin film deposition method comprising the steps of depositing a Ti film on a semiconductor substrate, and depositing an Al—Si—Cu film on the Ti film at a temperature of at least 400° C. According to this method, it is possible to achieve the above described object because an Al 3  film is formed between layers of the Ti film and the Al—Si—Cu film and excess Si is absorbed.  
         [0010]     There is also provided a wiring thin film deposition method including the steps of depositing a Ti film on a semiconductor substrate, depositing an Al—Si—Cu film on the Ti film, and annealing the semiconductor substrate at a temperature of at least 400° C. The basic concept of this method is absorption of Si by an Al 3 Ti film.  
         [0011]     There is also provided a wiring thin film deposition method comprising the steps of depositing a Ti film on a semiconductor substrate, depositing an Al 3 Ti film on the Ti film, and depositing an Al—Si—Cu film on the Al 3 Ti film at a temperature of at least 400° C., and the basic concept of this method is as described above.  
         [0012]     There is also provided a wiring thin film deposition method comprising the steps of depositing a Ti film on a semiconductor substrate, depositing an Al 3 Ti film on the Ti film, depositing an Al—Si—Cu film on the Al 3 Ti film, and annealing the semiconductor substrate at a temperature of at least 400° C., and the basic concept of this method is as described above.  
         [0013]     Still further, there is provided a wiring thin film deposition method comprising the steps of depositing a Ti film on a semiconductor substrate, depositing an Al—Si—Cu film on the Ti film, depositing an Al 3 Ti film on the Al—Si—Cu film, and annealing the semiconductor substrate at a temperature of at least 400° C., and the basic concept of this method is also as described above. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0014]      FIG. 1  is a first cross sectional drawing showing a process of the related art.  
         [0015]      FIG. 2  is a second cross sectional drawing showing a process of the related art.  
         [0016]      FIG. 3  is a third cross sectional drawing showing a process of the related art.  
         [0017]      FIGS. 4-1  through  4 - 3  show the mechanism of the related art process.  
         [0018]      FIG. 5  shows the disadvantages of the related art.  
         [0019]      FIG. 6  is a first cross sectional drawing showing a process of a first embodiment of the present invention.  
         [0020]      FIG. 7  is a second cross sectional drawing showing a process of the first embodiment of the present invention.  
         [0021]      FIG. 8  is a third cross sectional drawing showing a process of the first embodiment of the present invention.  
         [0022]      FIG. 9  is a first cross sectional drawing showing a process of a second embodiment of the present invention.  
         [0023]      FIG. 10  is a second cross sectional drawing showing a process of the second embodiment of the present invention.  
         [0024]      FIG. 11  is a first cross sectional drawing showing a process of a third embodiment of the present invention.  
         [0025]      FIG. 12  is a second cross sectional drawing showing a process of the third embodiment of the present invention.  
         [0026]      FIG. 13  is a third cross sectional drawing showing a process of the third embodiment of the present invention.  
         [0027]      FIG. 14  is a first cross sectional drawing showing a process of a fourth embodiment of the present invention.  
         [0028]      FIG. 15  is a second cross sectional drawing showing a process of the fourth embodiment of the present invention.  
         [0029]      FIG. 16  is a first cross sectional drawing showing a process of a fifth embodiment of the present invention.  
         [0030]      FIG. 17  is a second cross sectional drawing showing a process of the fifth embodiment of the present invention.  
         [0031]      FIG. 18  is a first cross sectional drawing showing a process of a sixth embodiment of the present invention.  
         [0032]      FIG. 19  is a second cross sectional drawing showing a process of the sixth embodiment of the present invention.  
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
     First Embodiment  
       [0033]     A first embodiment of the present invention will now be described in detail using  FIG. 6  to  FIG. 8 . First of all, an insulating film  21  (for example SiO 2 , BPSG) is deposited on a semiconductor substrate  20 . Next, a Ti film  22 , for example, is deposited to a thickness of 50 nm, as a barrier layer. An Al film  24  is then deposited to a thickness of 400-800 nm by a sputter method using an Al-1.0% Si-0.5% Cu target. The temperature when this Al film is deposited is at least 400° C.  
         [0034]     In this way, if the Al film is deposited under high temperature conditions, reaction between the Al and Ti is promoted to form an Al 3 Ti alloy layer  24 . It is confirmed that the Al 3 Ti contacting this Al surface absorbs Si within the Al. For example, the extent of Si dissolved in the Al 3 Ti at 450° C. is about 15 weight %, which is extremely high.  
         [0035]     Accordingly, with this embodiment, diffusion of Si into the Al 3 Ti is promoted and the amount of Si in the Al is reduced, so that there is no Si deposit due to recrystallization. Since this Al 3 Ti alloy layer  24  is formed, the temperature of the semiconductor substrate at the time of deposition of the Al film is at least 400° C., and the Al film is deposited. After that, a TiN film, for example, is deposited to a thickness of 50 nm, as an antireflection film, and then patterning is performed using a well known method.  
         [0036]     As described above, according to the present invention, in the case where the barrier layer is Ti, by depositing an Al film with a high wafer temperature of at least 400° C., reaction between Al and Ti is promoted, and an Al 3 Ti alloy layer is formed. The Al 3 Ti contacting the Al surface absorbs Si in the Al film due to the high temperature processing at the time of depositing the Al film. Accordingly, the amount of Si on the Al film is reduced, and it is possible to suppress re-crystallization of Si during a process of cooling the wafer gradually from the film formation temperature. In this way, it is possible to prevent the formation of an enormous Si deposit, and by preventing pattern defects at the time of Al etching that would normally be caused by such an Si deposit it is possible to prevent short circuits between wires.  
       Second Embodiment  
       [0037]     A second embodiment of the present invention will now be described using  FIG. 9  and  FIG. 10 . First of all, an insulating film  31  (for example SiO 2 , BPSG) is deposited on a semiconductor substrate  30 . Next, a Ti single layer film  32 , for example, is deposited to a thickness of 50 nm, as a barrier layer. An Al film  33  is then deposited to a thickness of 400-800 nm by a sputter method using an Al-1.0% Si-0.5% Cu target. Then, a TiN film is deposited to a thickness of 50 nm, as a barrier layer. The deposition conditions for each of the films can be the same as in the related art.  
         [0038]     Once deposition of the above films is completed, the semiconductor substrate is annealed at a high temperature of at least 400° C. As a result of this annealing process reaction between the Al and Ti is promoted, and an Al 3 Ti alloy layer is formed. It was confirmed that Al 3 Ti coming to contact with this Al surface absorbed Si within the Al, as described above. Accordingly, with this embodiment diffusion of Si into the Al 3 Ti is promoted and the amount of Si in the Al is reduced, making it possible to prevent any Si deposit due to recrystallization.  
         [0039]     As described above, according to the second embodiment, after deposition of an anti-reflection film has been completed in the case of a Ti barrier layer, reaction between Al and Ti is promoted, by performing annealing processing at least 400° C., and an Al 3 Ti alloy layer is formed. Since the temperature of the Al 3 Ti alloy layer  35  coming to contact with this Al surface is high at the time of annealing, Si in the Al is absorbed. As a result, the amount of Si in the Al is reduced, and it is possible to suppress recrystallization growth of Si in a step of cooling the semiconductor substrate from the film deposition temperature. In doing this, it is possible to prevent formation of an enormous Si deposit, and by preventing pattern defects at the time of Al etching caused by the Si deposit it is possible to prevent shorts between wires.  
       Third Embodiment  
       [0040]     A third embodiment of the present invention will now be described using  FIG. 11 ,  FIG. 12  and  FIG. 13 . First of all, an insulating film  41  (for example SiO 2 , BPSG) is deposited on a semiconductor substrate  40 . Next, a Ti film  42  is deposited to a thickness of 50 nm, as a barrier layer. The film formation conditions up to the barrier layer can be the same as in the related art. With this embodiment, before deposition of Al, an Al 3 Ti film  43  is previously deposited to a thickness of 10-20 nm by a sputter method using an Al 3 Ti target. An Al film  44  is then deposited to a thickness of 400-800 nm at a deposition temperature of at least 400° C. by a sputter method using an Al-1.0% Si-0.5% Cu target. The reason for making the deposition temperature of the Al film at least 400° C. is to promote absorption of Si into the Al 3 Ti. After that, a TiN film is deposited to a thickness of 50 nm as an ant-reflection film.  
         [0041]     As described above, according to the third embodiment, by previously depositing the Al 3 Ti film before Al deposition using an Al 3 Ti target, and then depositing the Al film at a high temperature of at least 400° C., the Al 3 Ti film coming into contact with the Al absorbs Si in the Al at the time of film formation, which reduces the amount of Si in the Al, and it is possible to suppress Si recrystallization growth in a step of cooling the wafer from the film formation temperature. In this way, it is possible to prevent formation of an enormous Si deposit, and by preventing pattern defects that would be caused by the Si deposit at the time of Al etching it is possible to prevent shorts between wires.  
       Fourth Embodiment  
       [0042]     A fourth embodiment of the present invention will now be described using  FIG. 14  and  FIG. 15 . First of all, an insulating film  51  (for example SiO 2 , BPSG) is deposited on a semiconductor substrate  50 . Next, a Ti film  52  is deposited to a thickness of 50 nm, as a barrier layer. The film formation conditions up to the barrier layer can be the same as in the related art. With this embodiment, before deposition of Al, an Al 3 Ti film  53  is previously deposited to a thickness of 10-20 nm by a sputter method using an Al 3 Ti target. An Al film  54  is then deposited to a thickness of 400-800 nm by a sputter method using an Al-1.0% Si-0.5% Cu target. After that, a TiN film  55  is deposited to a thickness of 50 nm as an anti-reflection film. After deposition of the above films has been completed, the semiconductor substrate is annealed at a high temperature of at least 400° C. in order to promote absorption of Si into the Al 3 Ti film.  
         [0043]     In this way, according to the fourth embodiment, the Al 3 Ti film is deposited before Al deposition using an Al 3 Ti target, and after depositing the antireflection film annealing is carried out at a high temperature of at least 400° C. in order to promote absorption of Si into the Al 3 Ti film. As a result of this annealing, the Al 3 Ti film coming into contact with the Al absorbs Si in the Al film, which reduces the amount of Si in the Al, and it is possible to suppress Si recrystallization growth in a step of cooling the wafer from the film formation temperature. In this way, it is possible to prevent formation of an enormous Si deposit, and by preventing pattern defects that would be caused by the Si deposit at the time of Al etching it is possible to prevent shorts between wires.  
       Fifth Embodiment  
       [0044]     A fifth embodiment of the present invention will now be described using  FIG. 16  and  FIG. 17 . First of all, an insulating film  61  (for example SiO 2 , BPSG) is deposited on a semiconductor substrate  60 . Then, a Ti film  62  is deposited as a barrier layer. Next, an Al film  63  is deposited on the barrier layer  62  by a sputter method using Al-0.8% Si-0.3% Cu target. The film formation condtions up to the Al film can be the same as in the related art. With this embodiment, after deposition of Al, an Al 3 Ti film  64  is deposited to a thickness of 10-20 nm by a sputter method using an Al 3 Ti target. After that a TiN anti-reflection film is deposited to a thickness of approximately 50 nm in the same way as in the related art After deposition of the antireflection film has been completed, annealing is carried out at a high temperature of at least 400° C. in order to promote absorption of Si into the Al 3 Ti film.  
         [0045]     As described above, according to the fifth embodiment, by depositing the Al 3 Ti film  64  by a sputter method using an Al 3 Ti target after Al film formation, and carrying out annealing at a high temperature of at least 400° C. in order to promote absorption of Si into the Al 3 Ti after deposition of the antireflection film, the Al 3 Ti film coming into contact with the Al is made to absorb Si in the Al film, which reduces the amount of Si in the Al, and it is possible to suppress Si recrystallization growth in a step of cooling the wafer from the film formation temperature. In this way, it is possible to prevent formation of an enormous Si deposit, and by preventing pattern defects that would be caused by the Si deposit at the time of Al etching it is possible to prevent shorts between wires.  
       Sixth Embodiment  
       [0046]     A sixth embodiment of the present invention will now be described using  FIG. 18  and  FIG. 19 . First of all, an insulating film  71  (for example SiO 2 , BPSG) is deposited on a semiconductor substrate. Next, a Ti film  72  is deposited to a thickness of 50 nm, as a barrier layer. An Al film  73  is deposited on the Ti film by a sputter method using an Al-0.8% Si-0.3% Cu target. The film formation conditions up to the Al film can be the same as in the related art. With this embodiment, after deposition of Al, an Al 3 Ti film  74  is deposited to a thickness of 10-20 nm by a sputter method using an Al 3 Ti target. Deposition at this time is performed at a high temperature of at least 400° C. After that a TiN ant-reflection film  75  is deposited to a thickness of about 50 nm in the same way as in the related art.  
         [0047]     As described above, according to the sixth embodiment, the Al 3 Ti film  74  is deposited at a temperature of at least 400° C. by a sputter method using an Al 3 Ti target, after Al film formation. By carrying out the Al 3 Ti deposition at the high temperature of at least 400° C. in order to promote absorption of Si into the Al 3 Ti, the Al 3 Ti film coming into contact with the Al is made to absorb Si in the Al film, which reduces the amount of Si in the Al, and it is possible to suppress Si recrystallization growth in a step of cooling the wafer from the film formation temperature. In this way, it is possible to prevent formation of an enormous Si deposit, and by preventing pattern defects that would be caused by the Si deposit at the time of Al etching it is possible to prevent shorts between wires.