Abstract:
A capacitive dynamic quantity sensor whose size is small and whose reliability and mass productivity are high is provided. In order to realize signal transmission from a lower electrode to an upper electrode, silicon columns which are electrically isolated from one another but not mechanically isolated from one another are formed to connect both electrodes.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The present invention relates to a capacitive dynamic quantity sensor for detecting angular velocity or acceleration of an automobile or the like and a semiconductor device for converting an image of an object into a video signal.  
         [0003]     2. Description of the Related Art  
         [0004]      FIG. 18  shows a conventional capacitive dynamic quantity sensor. A capacitive dynamic quantity sensor for acceleration  507  includes a lower glass plate  501 , a silicon plate  502 , and an upper glass plate  503 , which are laminated. The silicon plate  502  has a weight  521  which is displaced due to acceleration applied thereto and a column  522  which is necessary to reduce a size of the sensor and electrically connects a capacitance detection electrode  511  provided on the lower glass plate  501  with an electrode  535  provided outside the upper glass plate  503 . The upper glass plate  503  has an electrode  531  for detecting displacement of the weight  521  due to the acceleration as a change in capacitance. The lower glass plate  501  has the electrode  511  for detecting displacement of the weight  521  due to the acceleration as a change in capacitance. The column  522  located in the silicon plate  502  is formed by laser processing or etching and generally separated from the weight (For example, see, Masayoshi Esashi, “Micromachining and micromachine”, The Institute of Electrical Engineers of Japan, Volume 114-A, Number 7/8, 1994) However, when the column is formed, it is necessary to separate the column from other members by etching or the like after it is temporarily fixed to a glass substrate by anode bonding or the like. Consequently, a surface of the electrode patterned on the glass plate is also subjected to an unintended etching process and the like, with the result that problems occur with respect to the improvements of mass productivity and reliability.  
         [0005]     Even in the case where the column is not fixed to the glass plate or the like by anode bonding, when the column is mechanically separated from other members, a main body portion and the column cannot be electrically connected with each other. When devices are formed on both surfaces of the glass plate, an electrical signal cannot be led from a device formed on one surface. Thus, a structure capable of leading electrical signals from the devices formed on both surfaces is required for mounting, thereby increasing a manufacturing cost.  
       SUMMARY OF THE INVENTION  
       [0006]     The present invention has been made in view of the circumstances described above. Hereinafter, description will be made of: means for improving mass productivity and reliability of a capacitive dynamic quantity sensor, to thereby reduce a size of the entire sensor; and means for allowing an electrical signal to be led from a device formed on one surface when devices are formed on both surfaces of a semiconductor substrate, to thereby reduce sizes of the devices and their manufacturing costs.  
         [0007]     According to the present invention, in order to solve the above-mentioned problems, there is provided a sensor having the following construction.  
         [0008]     That is, a column is formed in a semiconductor so that an electrode on a first insulator is electrically connected with an electrode on a second insulator, and an upper portion of the column is electrically isolated without mechanical separation.  
         [0009]     In addition, the first impurity contained in the semiconductor in which the column is formed is an N-type and the second impurity formed in the part of the upper portion of the column is a P-type.  
         [0010]     Further, each column is composed of an upper conductive portion, an intermediate insulating portion, and a lower conductive portion, the upper conductive portion and the lower conductive portion includes a first slit and a second slit, respectively, which are formed for mechanical separation, and the intermediate insulating portion is electrically isolated without mechanical separation.  
         [0011]     In addition, in a semiconductor electrical circuit part, including: a first insulator having an electrode pattern formed thereon; and a substrate that includes a first semiconductor having an image pickup element formed therein, a second semiconductor having an electrical circuit element formed therein, and an insulator sandwiched between the first semiconductor and the second semiconductor, the first insulator and the substrate being laminated, the semiconductor electrical part performing image processing based on a signal from the image pickup element and a signal from the electrical circuit element, a column is formed in each of the first semiconductor and the second semiconductor so that an electrode of the first semiconductor is electrically connected with an electrode of the second semiconductor, the column is composed of an upper conductive portion, an intermediate insulating portion, and a lower conductive portion, and a lower portion of the column is electrically isolated without mechanical separation.  
         [0012]     In addition, in a semiconductor electrical circuit part, including: a substrate that includes a first semiconductor having a first electrical circuit element formed therein, a second semiconductor having a second electrical circuit element formed therein, and an insulator sandwiched between the first semiconductor and the second semiconductor, the semiconductor electrical circuit part operating based on a signal from the first electrical circuit element and a signal from the second electrical circuit element, a column is formed in each of the first semiconductor and the second semiconductor so that an electrode of the first semiconductor is electrically connected with an electrode of the second semiconductor, the column is composed of an upper conductive portion, an intermediate insulating portion, and a lower conductive portion, and an upper portion of the column is electrically isolated without mechanical separation.  
         [0013]     According to the present invention, the capacitive dynamic quantity sensor has a structure in which the silicon columns for transferring signals from the respective electrodes are electrically isolated from one another without the mechanical separation of the upper portion of each of the columns, the intermediate portion thereof, or both of the upper portion and the intermediate portion. Accordingly, it is unnecessary to perform etching for column separation after anode bonding. Thus, for example, an unintended etching process to a lower electrode pattern is unnecessary, with the result that a size of the sensor can be reduced without reductions in reliability and mass productivity.  
         [0014]     According to the present invention, the semiconductor electrical circuit part has a structure in which the silicon columns for transferring signals from the respective electrodes are electrically isolated from one another without the mechanical separation of the lower and intermediate portions of each of the columns. Accordingly, it is unnecessary to perform etching for column separation after anode bonding. Thus, for example, an unintended etching process to the electrode pattern on the insulator is unnecessary, with the result that a reduction in area of the semiconductor electrical circuit part and simplification of mounting thereof can be realized without reductions in reliability and mass productivity.  
         [0015]     According to the present invention, the semiconductor electrical circuit part has a structure in which the silicon columns for transferring signals from the respective electrodes are electrically isolated from one another without the mechanical separation of the upper and intermediate portions of each of the columns. None of the columns is mechanically separated from other members. Accordingly, when an electrical circuit is formed on each of surfaces of a semiconductor device, all electrical signals can be led from one side thereof. As a result, a reduction in area of a semiconductor chip and simplification of mounting thereof can be realized without reductions in reliability and mass productivity. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0016]     In the accompanying drawings:  
         [0017]      FIG. 1  is a side sectional view showing a capacitive dynamic quantity sensor according to Embodiment 1 of the present invention;  
         [0018]      FIG. 2  is a side sectional view showing a lower glass plate in the sensor shown in  FIG. 1 ;  
         [0019]      FIG. 3  is a side sectional view showing an upper glass plate in the sensor shown in  FIG. 1 ;  
         [0020]      FIG. 4A  is a plan view showing a silicon plate in the sensor shown in  FIG. 1  and  FIG. 4B  is a side sectional view showing the silicon plate in the sensor shown in  FIG. 1 ;  
         [0021]      FIG. 5 a  side view showing a silicon column in the sensor shown in  FIG. 1 ;  
         [0022]      FIG. 6  is a side sectional view showing a capacitive dynamic quantity sensor according to Embodiment 2 of the present invention;  
         [0023]      FIG. 7A  is a plan view showing a silicon plate in the sensor shown in  FIG. 6  and  FIG. 7B  is a side sectional view showing the silicon plate in the sensor shown in  FIG. 6 ;  
         [0024]      FIG. 8 a  side view showing a silicon column in the sensor shown in  FIG. 6 ;  
         [0025]      FIG. 9  is a side sectional view showing a capacitive dynamic quantity sensor according to Embodiment 3 of the present invention;  
         [0026]      FIG. 10A  is a plan view showing a silicon plate in the sensor shown in  FIG. 9  and  FIG. 10B  is a side sectional view showing the silicon plate in the sensor shown in  FIG. 9 ;  
         [0027]      FIG. 11 a  side view showing a silicon column in the sensor shown in  FIG. 9 ;  
         [0028]      FIG. 12A  is a plan view showing a silicon plate in a capacitive dynamic quantity sensor according to Embodiment 4 of the present invention and  FIG. 12B  is a side sectional view showing the silicon plate in the capacitive dynamic quantity sensor according to Embodiment 4 of the present invention;  
         [0029]      FIG. 13 a  side view showing a silicon column in the sensor shown in  FIG. 12 ;  
         [0030]      FIG. 14  is a side sectional view showing a semiconductor circuit part according to Embodiment 5 of the present invention;  
         [0031]      FIG. 15  is a side view showing a silicon column in the semiconductor circuit part shown in  FIG. 14 ;  
         [0032]      FIG. 16  is a side sectional view showing a semiconductor circuit part according to Embodiment 6 of the present invention;  
         [0033]      FIG. 17  is a side view showing a silicon column in the semiconductor circuit part shown in  FIG. 16 ; and  
         [0034]      FIG. 18  is a side view showing a conventional capacitive dynamic quantity sensor. 
     
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS  
       [0035]     A basic structure according to Best Mode 1 of the present invention will be described. A capacitive dynamic quantity sensor is composed of a lower glass plate also serving as a substrate thereof, a silicon plate, and an upper glass plate. The silicon plate has a weight displaced due to a dynamic quantity and silicon columns, each of which is used for electrically connecting an electrode located on the lower glass plate with an electrode located outside the upper glass plate. An insulating layer having a hole is located in the upper portion of each of the silicon columns and a conductive film is located thereon to avoid an electrical signal from leaking to another column, so that electrical conduction can be made between upper and lower portions of each of the silicon columns.  
         [0036]     Next, a basic structure according to Best Mode 2 of the present invention will be described. The basic structure is substantially identical to that in Best Mode 1 and thus only a different point will be described. In Best Mode 2 of the present invention, a part of the upper portion of the silicon column is doped with an impurity different from an impurity with which the silicon plate is doped to produce a depletion layer therein. As a result, an electrical signal is prevented from leaking to another column, so that the electrical conduction can be made between the upper and lower portions of the silicon column.  
         [0037]     Next, a basic structure according to Best Mode 3 of the present invention will be described. The basic structure is substantially identical to that in Best Mode 1 and thus only a different point will be described. In Best Mode 3 of the present invention, a slit is formed in a part of the upper portion of the silicon column. As a result, an electrical signal is prevented from leaking to another column, so that the electrical conduction can be made between the upper and lower portions of the silicon column.  
         [0038]     According to a basic manufacturing method, first, the silicon plate is prepared and vertically processed from the lower side by dry etching to form the weight and the silicon columns. Next, a process for making electrical isolation among the upper sides of the columns and a process for forming the upper side of the weight are performed. Then, the lower glass plate is prepared and the silicon plate is bonded thereto. After that, the upper glass plate is bonded to the silicon plate.  
         [0039]     A basic structure according to Best Mode 4 of the present invention will be described. A semiconductor electrical circuit part includes an insulator made of glass, an upper semiconductor in which an image pickup element is located, a lower semiconductor in which an electrical circuit is located, an insulator located to be sandwiched between the upper semiconductor and the lower semiconductor, and a silicon column for electrically connecting an electrode located on the upper semiconductor with an electrode located on the lower semiconductor. An insulating layer having a hole is located in the lower portion of the silicon column and a conductive film is located thereon to avoid an electrical signal from leaking to the second semiconductor, so that electrical conduction can be made between upper and lower portions of the silicon column.  
         [0040]     According to a basic manufacturing method, first, the silicon plate is prepared and vertically processed from the upper side by dry etching to form an image pickup element portion and the silicon column, thereby producing the image pickup element and a circuit. After that, a process for making electrical isolation on the lower side of the column and a process for producing a circuit element in the lower semiconductor are performed. Then, the upper glass plate is prepared and the silicon plate is bonded thereto.  
         [0041]     A basic structure according to Best Mode 5 of the present invention will be described. A semiconductor electrical circuit part includes an upper semiconductor in which an electrical circuit is located, a lower semiconductor in which an electrical circuit is located, an insulator located to be sandwiched between the upper semiconductor and the lower semiconductor, and a silicon column for electrically connecting an electrode located on the upper semiconductor with an electrode located on the lower semiconductor. An insulating layer having a holed portion is located in the upper portion of the silicon column and a conductive film is located thereon to avoid an electrical signal from leaking to the first semiconductor, so that electrical conduction can be made between the upper and lower portions of the silicon column.  
         [0042]     According to a basic manufacturing method, first, the silicon plate is prepared and vertically processed from the lower side by dry etching to form an electrical circuit portion and the silicon column, thereby producing the circuit element in the lower semiconductor. After that, a process for making electrical isolation on the upper side of the column and a process for producing a circuit element in the upper semiconductor are performed. Then, the semiconductor electrical circuit part is mounted on an insulator substrate, in which an electrode pattern to be connected with the lower portion of the silicon column and the electrode of the lower semiconductor is provided, by using solder bumps or the like.  
       Embodiment 1  
       [0043]     Hereinafter, a capacitive dynamic quantity sensor according to Embodiment 1 of the present invention will be described with reference to FIGS.  1  to  5 .  FIG. 1  is a side sectional view showing a capacitive dynamic quantity sensor  7   a  according to this embodiment.  
         [0044]     The capacitive dynamic quantity sensor  7   a  has a structure in which a lower glass plate  1 , a silicon plate  2   a , and an upper glass plate  3  are laminated. The lower glass plate  1  has capacitance detection electrodes  11 . The silicon plate  2   a  has a weight  21  which is displaced due to acceleration applied thereto and silicon columns  221  for connecting the lower electrodes (capacitance detection electrodes)  11  with upper electrodes  34 . The upper glass plate  3  has capacitance detection electrodes  31 .  
         [0045]      FIG. 2  is a perspective side view showing the lower glass plate  1 . The lower glass plate  1  is made of mainly SiO 2  and has a thermal expansion coefficient equal to that of the silicon plate  2   a . A thickness of the lower glass plate  1  is about 100 μm or more.  
         [0046]     The capacitance detection electrodes  11 , each of which have a thickness of about 1 μm or less and are made of Al or the like, are formed on a bonding surface with the silicon plate  2   a  by sputtering or the like. The electrodes  11  are connected with external electrodes  14  through through-holes  12   a  and led from a rear surface of the lower glass plate  1  to an upper surface thereof through through-holes  12   b  to be connected with lower portions  22   b  of the silicon columns  221 .  
         [0047]      FIG. 3 a  side sectional view showing the upper glass plate  3 . As in the case of the lower glass plate  1 , the upper glass plate  3  is made of mainly SiO 2  and has a thermal expansion coefficient equal to that of the silicon plate  2   a . A thickness of the upper glass plate  3  is about 100 μm or more.  
         [0048]     The capacitance detection electrodes  31 , each of which have a thickness of about 1 μm or less and are made of Al or the like, are located at a position recessed from a bonding surface with the silicon plate  2   a  by several 1 μm. The capacitance detection electrodes  31  are formed by sputtering using Al and connected with the N-type silicon layers (upper electrodes)  34  bonded to an external surface of the upper glass plate  3  through through-holes  32   a . Electrodes  33   a  for leading a potential of each of the silicon columns  221  formed in the silicon plate  2   a  and electrodes  33   c  (not shown) for leading a potential of the weight  21  formed in the silicon plate  2   a  are provided on the bonding surface with the silicon plate  2   a . The electrodes  33   a  are connected with the N-type silicon layers  34  bonded to the external surface of the upper glass plate  3  through through-holes  32   b . The electrodes  33   c  are connected with the N-type silicon layer  34  through through-holes  32   d  (not shown). Al layers are formed as electrode pads  35  on external surfaces of the N-type silicon layers  34  by sputtering. This sensor is mounted on an external substrate through the electrode pads  35  made of Al by wire bonding or the like.  
         [0049]      FIG. 4A  is a plan view showing the silicon plate  2   a  and  FIG. 4B  is a side sectional view showing the silicon plate  2   a  along a line C-C′ in  FIG. 4A . In order to form the weight  21  and process the silicon column  221 , a SOI substrate including an insulating layer  28  in the silicon plate is used as the silicon plate  2   a . The weight  21  displaced due to acceleration applied from the outside is formed near a central portion of the silicon plate  2   a  by etching.  
         [0050]     As described above, the SOI substrate is used as the silicon plate  2   a . The insulating layer  28  is formed in an intermediate portion of the weight  21  to insulate upper and lower silicon layers  21   a  and  21   b  from each other therethrough. In order to provide the same potential for the upper and lower silicon layers of the weight  21 , a stepped recess is formed so as to reach the lower silicon layer  21   b  through the insulating layer  28 . An electrode  26   a  made of Al is formed in the stepped recess by sputtering to electrically connect the silicon layers  21   a  and  21   b  with each other.  
         [0051]     The weight  21  is electrically connected with the external terminal (electrode pad)  35  through the electrode  33   c  of the upper glass plate  3  by an electrode  26   b , so that external control is possible.  
         [0052]     During the etching process for forming the weight  21 , the lower portions  22   b  of the silicon columns are etched. Consequently, the lower portions  22   b  of the silicon-columns are electrically and mechanically separated from one another. As shown in  FIG. 5 , an insulator  22   c  and a conductor  22   d  are located in an upper portion  22   a  of each of the silicon columns by etching a part of the upper portion  22   a  in advance. As a result, the upper portions of the respective columns can be electrically isolated from one another without mechanical separation. In addition, it is possible to make the electrical conduction between the electrodes formed in the upper and lower glass plates through the respective silicon columns  221 .  
         [0053]     Other constituent elements of the silicon plate  2   a  are beam portions  23  for supporting the weight  21  and portions for anode-bonding the lower glass plate  1  to the upper glass plate  3 .  
         [0054]     With respect to a basic method of manufacturing the capacitive dynamic quantity (acceleration) sensor  7   a , the lower glass plate  1  and the silicon plate  2   a  are positioned to an arbitrary position and then bonded to each other. Anode bonding is used in which a voltage of about 400 V is applied between the lower glass plate  1  and the silicon plate  2   a  at an atmospheric temperature of about 300° C.  
         [0055]     After that, the upper glass plate  3  and the silicon plate  2   a  boned to the lower glass plate  1  are positioned to an arbitrary position and then anode bonding is performed to manufacture the sensor.  
       Embodiment 2  
       [0056]     In Embodiment 2, a depletion layer is formed using different impurities to isolate the respective columns from one another at upper portions thereof. Hereinafter, the same references are provided for the same portions as those in Embodiment 1 and thus the description thereof is omitted. Points different from Embodiment 1 will be mainly described with reference to FIGS.  6  to  8 .  
         [0057]      FIG. 6  is a side sectional view showing a capacitive dynamic quantity sensor  7   b  according to Embodiment 2 of the present invention.  
         [0058]     The capacitive dynamic quantity sensor  7   b  has a structure in which the lower glass plate  1 , a silicon plate  2   b , and the upper glass plate  3  are laminated. The lower glass plate  1  has the capacitance detection electrodes  11 . The silicon plate  2   b  has the weight  21  which is displaced due to acceleration applied thereto and silicon columns  222  for connecting the lower electrodes (capacitance detection electrodes)  11  with the upper electrodes  34 . The upper glass plate  3  has the capacitance detection electrodes  31 .  
         [0059]     The capacitance detection electrodes  31 , each of which have a thickness of about 1 μm or less and are made of Al or the like, are located at the position recessed from the bonding surface of the upper glass plate  3  with the silicon plate  2   a  by several Wm. The capacitance detection electrodes  31  are formed by sputtering using Al and connected with the N-type silicon layers (upper electrodes)  34  bonded to the external surface of the upper glass plate  3  through the through-holes  32   a . The electrodes  33   a  for leading a potential of each of the silicon columns  222  formed in the silicon plate  2   b , electrodes  33   b  (not shown) for leading a potential of a different impurity layer  29  formed in a part of the upper portion  22   a  of each of the columns  222 , and the electrodes  33   c  (not shown) for leading a potential of the weight  21  formed in the silicon plate  2   b  are provided on the bonding surface with the silicon plate  2   b . The electrodes  33   a  are connected with the N-type silicon layer  34  bonded to the external surface of the upper glass plate  3  through a through-hole  32   b . The electrode  33   b  are connected with the N-type silicon layer  34  through a through-hole  32   c  (not shown). The electrodes  33   c  are connected with the N-type silicon layer  34  through the through-hole  32   d  (not shown). Al layers are formed as the electrode pads  35  on external surfaces of the N-type silicon layers  34  by sputtering. This sensor is mounted on an external substrate through the electrode pads  35  made of Al by wire bonding or the like.  
         [0060]     As shown in  FIG. 8 , the different type (N-type) of impurity layer  29  is formed in a part of the upper portion  22   a  of the silicon column  222 . Since a potential of the different type (N-type) of impurity layer  29  is set to a voltage equal to or larger than a maximum applicable voltage value to this sensor through an electrode  26   c , reverse bias is constantly applied to a semiconductor PN junction of the silicon column  222 , with the result that electrical isolation of the respective columns  222  can thus be electrically isolated from one another without mechanical separation. In addition, in order to provide the same potential for the upper and lower portions of each of the silicon columns  222 , a stepped recess is formed so as to reach the lower silicon layer  22   b  through the insulating layer  28 . An electrode  22   d  made of Al is formed in the stepped recess by sputtering to electrically connect the silicon layers (upper and lower portions)  22   a  and  22   b  with each other. A lower glass electrode and an upper glass electrode can, therefore, be electrically connected with each other through the silicon column  222 .  
         [0061]     A SOI substrate having an upper Si layer  24  doped with an N-type impurity and a lower Si layer  27  doped with the N-type impurity can be used as the silicon plate  2   b . Here, assume that a P-type impurity serving as a different type of impurity is used for a part of the upper portion  22   a  of the silicon column  222  and a potential of the part including the P-type impurity is set to a voltage equal to or smaller than a minimum applicable voltage value to this sensor through the electrode  26   c . In such a case, reverse bias is constantly applied to a hetero-semiconductor junction of the silicon column, with the result that the electrical isolation using the depletion layer  29   a  is realized. Thus, the upper portions  22   a  of the respective columns  222  can be electrically isolated from one another without mechanical separation, thereby obtaining the same effect.  
       Embodiment 3  
       [0062]     In Embodiment 3, a slit is formed in each of the upper portions of the columns to isolate the columns from one another. Hereinafter, the same references are provided for the same portions as those in Embodiment 2 and thus the description thereof is omitted. Points different from Embodiment 2 will be mainly described with reference to FIGS.  9  to  11 .  
         [0063]      FIG. 9  is a side sectional view showing a capacitive dynamic quantity sensor  7   c  according to Embodiment 3 of the present invention.  
         [0064]     The capacitive dynamic quantity sensor  7   c  has a structure in which the lower glass plate  1 , a silicon plate  2   c , and the upper glass plate  3  are laminated. The lower glass plate  1  has the capacitance detection electrodes  11 . The silicon plate  2   c  has the weight  21  which is displaced due to acceleration applied thereto and silicon columns  223  for connecting the lower electrodes (capacitance detection electrodes)  11  with the upper electrodes  34 . The upper glass plate  3  has the capacitance detection electrodes  31 .  
         [0065]     In this embodiment, etching is performed so as to provide slits  22   e , each of which is used to separate the upper portion  22   a  of a column from that of another column. Consequently, the respective columns can be electrically isolated from one another without mechanical separation of the insulating layer  28  formed in the intermediate portion of each of the columns. In addition, the electrical conduction can be made between the electrodes formed in the upper and lower glass plates through each of the silicon columns.  
         [0066]     As shown in  FIG. 11 , in view of the mechanical strength of the semiconductor substrate, etching is performed so as to shift the position of the slit  22   e  of the upper portion of the column from the position of a slit  22   f  of the lower portion  22   b  of the column. It is possible to improve the mechanical strengths of the silicon columns  223  and the silicon plate  2   c.    
       Embodiment 4  
       [0067]     In Embodiment 4, in order to isolate the columns from one another, a slit is formed in each of the upper portions of the columns so as to surround the upper portion of a corresponding column on all four sides and a slit is formed in each of the lower portions of the columns so as to surround the lower portion of a corresponding column on all four sides. Hereinafter, the same references are provided for the same portions as those in Embodiment 3 and thus the description thereof is omitted. Points different from Embodiment 3 will be mainly described with reference to  FIGS. 12A and 12B .  
         [0068]      FIG. 12   b  is a side sectional view showing a silicon plate  2   d  of a capacitive dynamic quantity sensor according to Embodiment 4 of the present invention.  
         [0069]     In this Embodiment, a slit  22   g  formed in each of the upper portions of the columns is located so as to surround the upper portion of a corresponding column on all four sides and a slit  22   h  formed in each of the lower portions of the columns is located so as to surround the lower portion of a corresponding column on all four sides. Accordingly, it is not limited to locate the silicon columns  223  at the corners of the sensor. The column can be formed at an arbitrary position which is within a region on which slit processing can be performed.  FIG. 13  shows a state in which an insulator  22   i  is embedded in the slit  22   g  located in the upper portion of the column. When the insulator  22   i  is used, the mechanical strength can be improved while isolation with other columns is maintained.  
       Embodiment 5  
       [0070]     Hereinafter, a semiconductor electrical circuit part according to Embodiment 5 of the present invention will be described with reference to  FIGS. 14 and 15 .  
         [0071]      FIG. 14  is a side sectional view showing a semiconductor electrical circuit part  601  according to this embodiment.  
         [0072]     The semiconductor electrical circuit part  601  has a structure in which a glass substrate  630 , an upper semiconductor substrate  621 , a lower semiconductor substrate  623 , and an insulator  628  are laminated. Electrodes  635  are located in the glass substrate  630 . The upper semiconductor substrate  621  includes an image pickup element  62   a . The lower semiconductor substrate  623  includes a circuit that processes a signal from the image pickup element  62   a . The insulator  628  is sandwiched between the upper semiconductor substrate  621  and the lower semiconductor substrate  623 . A silicon column  622  ( 662   a  or  662   b ) for transferring a signal outputted from the upper semiconductor substrate  621  to the lower semiconductor substrate  623  is located in each of the upper semiconductor substrate  621  and the lower semiconductor substrate  623 .  
         [0073]      FIG. 15  is an enlarged view showing an electrical connection portion of the silicon columns.  
         [0074]     An electrode  635  is located on the insulator (glass)  630  and electrically connects an electrode of the image pickup element with the silicon column.  
         [0075]     The upper semiconductor substrate  621  is made of Si and has a thickness of about 10 μm or more. The image pickup element and the silicon column  622   b  for electrical signal transfer with the lower semiconductor substrate  623  are provided in the upper semiconductor substrate  621 . A slit  622   f  is formed between the image pickup element and the silicon column of the upper semiconductor substrate to mechanically and electrically isolate them from each other.  
         [0076]     The lower semiconductor substrate  623  is mainly made of Si as in the upper semiconductor substrate and has a thickness of about 100 μm or more, A signal processing IC  62   b  and the silicon column  622   a  for electrical signal transfer with the lower semiconductor substrate are provided in the upper semiconductor substrate  623 .  
         [0077]     An electrode  622   d  made of an Al film is provided in the lower column and the lower semiconductor substrate. The electrical connection between the lower column and the lower semiconductor substrate is realized through the Al film. The semiconductor electrical circuit part is mounted on an external substrate through an electrode pad  635   c  by wire bonding, surface mounting, or the like.  
         [0078]     As also described earlier, a so-called SOI substrate in which an insulating layer  628  is located between the upper semiconductor substrate  621  and the lower semiconductor substrate  623  is used, thereby insulating the upper semiconductor substrate  621  and the lower semiconductor substrate  623  from each other.  
         [0079]     In order to make the electrical connection between the upper silicon column  622   a  and the lower silicon column  622   b , a stepped recess is formed at  622   a  so as to reach the upper silicon column  622   b  through the insulating layer  628 . An insulating layer  622   c  is formed in the stepped recess. Then, an electrode  622   d  made of Al is formed on the insulating layer  622   c  by sputtering to electrically connect the silicon columns  622   a  and  622   b  with each other. Thus, a potential of the upper silicon column  622   a  can be transferred as a circuit signal to the lower semiconductor substrate.  
         [0080]     When the upper silicon column  622   b  is etched, the upper silicon column  622   b  is electrically and mechanically separated from other members. Consequently, it is possible to make electrical isolation without mechanical separation of the upper portions of the respective columns. In addition, it is possible to make the electrical conduction between the electrodes formed in the upper and lower semiconductor substrates through the respective silicon columns  622   a  and  622   b . As a result, an electrical signal can be transferred between the image pickup element  62   a  and the signal processing IC  62   b.    
       Embodiment 6  
       [0081]     Hereinafter, a semiconductor electrical circuit part according to Embodiment 6 of the present invention will be described with reference to  FIGS. 16 and 17 .  
         [0082]      FIG. 16  is a side sectional view showing a semiconductor electrical circuit part  701  according to this embodiment.  
         [0083]     The semiconductor electrical circuit part  701  has a structure in which an upper semiconductor substrate  723  having a circuit  72   a , a lower semiconductor substrate  721 , and an insulator  728  are laminated. The lower semiconductor substrate  721  includes a circuit  72   b  that operates in response to a signal from the circuit  72   a . The insulator  728  is sandwiched between the upper semiconductor substrate  723  and the lower semiconductor substrate  721 . Silicon columns  772   a  and  722   b  for transferring a signal outputted from the upper semiconductor substrate  723  to the lower semiconductor substrate  721  are located in the upper semiconductor substrate  723  and the lower semiconductor substrate  721 , respectively. The semiconductor substrates are mounted on an insulator substrate  740  in which a circuit pattern necessary to incorporate the semiconductor substrates in the sensor is formed in advance.  
         [0084]      FIG. 17  is an enlarged view showing an electrical connection portion of the silicon columns.  
         [0085]     An electrode  735  is located on the substrate  740  and electrically connects an electrode of the lower semiconductor substrate  721  (circuit  72   b ) with the silicon column  722   b.    
         [0086]     The upper semiconductor substrate  723  is made of Si and has a thickness of about 10 μm or more. The circuit (element)  72   a  and the silicon column  722   a  for electrical signal transfer with the lower semiconductor substrate  721  are provided in the upper semiconductor substrate  723 .  
         [0087]     As in the upper semiconductor substrate  723 , the lower semiconductor substrate  721  is made of mainly Si and has a thickness of about 100 μm or more. A slit  722   f  is formed between the circuit (element)  72   b  and the silicon column  722   b  to mechanically and electrically isolate them from each other.  
         [0088]     An electrode  722   d  made of an Al film is provided in the upper column  772   a  and the upper semiconductor substrate  723 . The electrical connection between the upper column  772   a  and the upper semiconductor substrate  723  is realized through the Al film. The semiconductor electrical circuit part  701  is mounted on an external substrate through an electrode pad  735   c  by wire bonding, surface mounting, or the like.  
         [0089]     As also described earlier, a so-called SOI substrate in which the insulating layer  728  is located between the upper semiconductor substrate  723  and the lower semiconductor substrate  721  is used, thereby insulating the upper semiconductor substrate  723  and the lower semiconductor substrate  721  from each other.  
         [0090]     In order to make the electrical connection between the upper silicon column  722   a  and the lower silicon column  722   b , a stepped recess is formed so as to reach the lower silicon column  722   b  through the insulating layer  728 . An insulating layer  722   c  is formed in the stepped recess. Then, an electrode  722   d  made of Al is formed on the insulating layer  722   c  by sputtering to electrically connect the silicon columns  722   a  and  722   b  with each other. Thus, a potential of the lower silicon column  722   b  can be transferred as a circuit signal to the upper circuit element  72   a.    
         [0091]     When the lower silicon column  722   b  is etched, the lower silicon column  722   b  is electrically and mechanically separated from other members. Consequently, it is possible to make electrical isolation without mechanical separation of the upper portions of the respective columns. In addition, it is possible to make the electrical conduction between the electrodes formed in the upper and lower semiconductor substrates through the respective silicon columns  722   a  and  722   b . As a result, an electrical signal can be transferred between the circuit elements  72   a  and  72   b.