Abstract:
A method and apparatus is disclosed for encoding and decoding an input signal representative of video or audio information. A form of the method includes the following steps: processing the input signal to produce a sequence of vectors representative of the input signal; implementing a lattice vector quantization procedure on individual vectors of the sequence to identify a lattice point of a lattice that is closest to the individual vector and to obtain an index value representative of a labelling of the identified lattice point, the lattice vector quantization procedure including a multi-level allocation of groups of reserved indices, and selection of the index value for the individual vector within a group of reserved indices. The index signals representative of the index values are stored and/or transmitted, and then recovered for decoding. The decoding is operative to obtain a recovered sequence of vectors, and the sequence of vectors can be processed to produce an output signal.

Description:
The present invention was made with Government support, and the Government has certain rights in the invention. 
    
    
     FIELD OF THE INVENTION 
     This is a continuation-in-part of U.S. patent application Ser. No., 08/733,849 filed Oct. 18, 1996, for &#34;A Lattice Vector Transform Coding Method For Image And Video Compression&#34;, which, in turn, claims priority from U.S. provisional application Ser. No. 60/005,710, filed Oct. 20, 1995. 
    
    
     This invention relates, in one of its forms, to an apparatus and method for encoding and decoding image-representative or sound representative signals using lattice vector quantization. In another form of the invention, improved lattice encoding and decoding is used in implementing analog transmission of digital data streams, such as in modem communication. 
     BACKGROUND OF THE INVENTION 
     Image-representative signals can be digitized, encoded, and subsequently decoded in a manner which substantially reduces the number of bits necessary to represent a decoded reconstructed image without undue or noticeable degradation in the reconstructed image. Image coding is an essential part of many applications such as digital television transmission, video conferencing, facsimile, image database, etc. The simplest technique for this purpose is pulse code modulation (PCM). A PCM system encodes individual pixels of an image in a memory-less way, i.e., it does not use any correlation information between pixels. An improvement over the PCM technique can be made by taking advantage of the correlations between pixels. Predictive coding is one of the techniques based on this principle. It quantizes the difference between a pixel and a prediction of the pixel from its neighbor pixels. Transform coding is another type of technique based on the same principle. In transform coding, a block of data samples is transformed from the image domain to the transform domain using an orthogonal transform, such as the discrete cosine transform (DCT). Two properties of the transform domain coefficients are used. One is that the transform domain coefficients have fewer correlations than the original data samples so that they can be coded individually. The other property is that the energy is packed into a few lower order coefficients so that many higher order coefficients can be either coded with very few bits or discarded. 
     All of these techniques perform coding on scalars, either in the image domain or in the transform domain. As Shannon&#39;s rate-distortion theory indicates, better performance can be achieved by coding vectors instead of scalars. Many vector quantization (VQ) techniques have been developed. As is known in the art, vector quantization is a technique of coding whereby multidimensional vectors are typically represented by a limited number of code words (the collection of code words sometimes being referred to as a &#34;code book&#34;). If, say, there are only 64 words in the code book, they can be distinguished using only 6 bits. In an example of a particular application, these code words may be used to represent, for instance, 2×2×12 vectors (48 bits). For a given vector to be quantized, the vector quantization technique selects the code word in the code book that is closest (that is, for example, the least different, based on a least squares computation). In the decoding process, the vector represented by the selected code word is used for reconstruction of the original image. For further description vector quantization, reference can be made, for example, to Linde et al., An Algorithm for Vector Quantizer Design, IEEE Transactions on Communications, Vol. Com-28, No. 1, Jan. 1980. Vector quantization had been used on DCT coefficients, but with limitations, since VQ performance is enhanced by the presence of correlation among the components being quantized, and there is inherently low correlation between DCT coefficients. In the U.S. Pat. No. 5,436,985 of Weiping Li, VQ is performed on DCT coefficients using a technique that takes full advantage of attributes of both DCT and VQ. 
     K-dimensional vector quantization (VQ) is a mapping of a K-dimensional vector x to one of N code-vectors {c(0), c(1), . . . C(N-1)}. It involves encoding and decoding. VQ encoding is a mapping of x to an integer index i: 
     
         i=E(x) 
    
     VQ decoding is a mapping of the index i to a code-vector c(i): 
     
         c(i)=D(i) 
    
     Compression is achieved because transmission or storage of the index i only requires log 2  (N) bits which are much less than the number of bits needed for transmission or storage of this K-dimensional vector x. For a code book without an efficient structure, the VQ encoding mapping of an input vector x to an index i has to be carried out using a look-up table that stores all the code-vectors in a particular order. VQ encoding involves a search of this table to find a code-vector that is closest to the input vector under a distortion measure. The position of this closest code-vector in the table is the index i. In lattice VQ, code-vectors are lattice points in a K-dimensional space. The encoding mapping in lattice VQ does not use a look-up table. The index i can be calculated. For any given input vector x, the encoding process involves two calculations. The first calculation is to find the closest lattice point to the input vector. The second calculation is to find the index of the closest lattice point. The efficiency of labeling lattice points is measured by how many bits are needed to represent the indices of the lattice points within a finite boundary. If log 2  (N) bits are sufficient for representing the indexes of N lattice points within the finite boundary, the labeling method is 100% efficient. Some relatively simple lattices, such as a cubic lattice, can be efficiently labelled using known techniques. However, certain more complex lattices, which are desirable for their excellent densities, pose serious problems of labelling efficiency. 
     It is among the objects of the present invention to devise a technique and apparatus which is responsive to the limitations of prior lattice vector quantization techniques and which improves labelling efficiency in such techniques. 
     Digital data streams can be converted to analog form for transmission over certain transmission media, as is done in a modem type of communication. It has previously been recognized that judicious selection of the set of waveforms used for analog communication can improve noise immunity by having optimum separation between waveforms that facilitates distinguishing between the waveforms in the presence of noise. It has also been recognized that a lattice based encoding and decoding technique can be used to advantage in this type of communication technique. 
     It is also among the objects of the present invention to improve on lattice based encoding and decoding in the analog communication of digital data streams. 
     SUMMARY OF THE INVENTION 
     In accordance with an embodiment of the invention, there is disclosed a method for encoding and decoding an input signal representative of video or audio information. A form of the method includes encoding that comprises the following steps: processing the input signal to produce a sequence of vectors representative of the input signal; implementing a lattice vector quantization procedure on individual vectors of the sequence to identify a lattice point of a lattice that is closest to the individual vector and to obtain an index value representative of a labelling of the identified lattice point, the lattice vector quantization procedure including a multi-level allocation of groups of reserved indices, and selection of said index value for the individual vector within a group of reserved indices. The index signals representative of said index values are stored and then recovered for decoding (or, for example, transmitted before decoding). The decoding is operative to obtain a recovered sequence of vectors, and the sequence of vectors can be processed to produce an output signal. 
     In a disclosed embodiment, the vectors are multidimensional and the lattice vector quantization also includes dividing the individual vector into subvectors of its odd and even components, selecting respective index components for the even and odd components, and combining the even and odd index components to obtain the index. In this embodiment, the lattice vector quantization also includes folding the odd subvector component into a vector space having only positive components, processing the folded vector, providing a further group of reserved indices based on the folded vector, and determining the odd index value component from said further group of indices. 
     In another form of the invention the improved lattice based vector encoding and decoding technique hereof is used to advantage in the analog communication of a digital data stream. 
     Further features and advantages of the invention will become more readily apparent from the following detailed description when taken in conjunction with the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram of an apparatus which can be used in practicing an embodiment of the invention. 
     FIG. 2 is a flow diagram of a routine that can be utilized to program the encoder processor in accordance with an embodiment of the invention. 
     FIG. 3 is a flow diagram of a routine that can be utilized to program the decoder processor in accordance with an embodiment of the invention. 
     FIG. 4 is a flow diagram which together with the subsidiary flow diagrams of FIGS. 5-7, can be utilized to implement the routine for vector lattice point labelling in the encoder to obtain an index signal, in accordance with an embodiment of the invention. 
     FIGS. 5-7 are subsidiary flow diagrams to FIG. 4. 
     FIG. 8 is a flow diagram which, together with subsidiary flow diagrams of FIGS. 9-12, can be utilized to implement the routine for vector recovery in the decoder, in accordance with an embodiment of the invention. 
     FIGS. 9-12 are subsidiary flow diagrams to FIG. 8. 
     FIGS. 13A, 13B, 13C, and 13D show waveforms that are useful in understanding an application of the invention. 
     FIG. 14 is a simplified diagram of lattice points in a two dimensional space, that is also useful in understanding an application of the invention. 
     FIG. 15 is a block diagram of an apparatus which can be used in practicing a further embodiment of the invention. 
     FIG. 16 is a flow diagram of a routine that can be utilized to program the encoder processor of the FIG. 15 embodiment. 
     FIG. 17 is a flow diagram of a routine that can utilized to program the decoder processor of the FIG. 15 embodiment. 
    
    
     DETAILED DESCRIPTION 
     Referring to FIG. 1, there is shown a block diagram of an apparatus in accordance with an embodiment of the invention for encoding and decoding an image 100. A scanner or a video camera 102 produces an array of pixel-representative signals that are coupled to an analog-to-digital converter 103, which is, in turn, coupled to the processor 110 of an encoder 105. When programmed in the manner to be described, the processor 110 and its associated circuits can be used to implement an embodiment of the invention and to practice an embodiment of the method of the invention. The processor 110 may be any suitable processor, for example an electronic digital processor or microprocessor. It will be understood that any general purpose or special purpose processor, or other machine or circuitry that can perform the functions described herein, electronically, optically, or by other means, can be utilized. The processor 110, which for purposes of the particular described embodiments hereof can be considered as the processor or CPU of a general purpose electronic digital computer, such as a Model UltraSparc-1 sold by Sun Microsystems, Inc., will typically include memories 123, clock and timing circuitry 121, input/output functions 118 and monitor 125, which may all be of conventional types. In the present embodiment, frame buffers 130, and discrete cosine transform (DCT) chips 133, which may all be of commercially available types, are also coupled with the processor 110. 
     With the processor appropriately programmed, as described hereinbelow, an encoded output signal 101 is produced which is a compressed version of the input signal 90 and requires less bandwidth and/or less memory for storage. In the illustration of FIG. 1, the encoded signal 101 is shown as being coupled to a transmitter 135 for transmission over a communications medium (e.g. air, cable, fiber optical link, microwave link, etc.) 50 to a receiver 162. The encoded signal is also illustrated as being coupled to a storage medium 138, which may alternatively be associated with or part of the processor subsystem 110, and which has an output that can be decoded using the decoder to be described. 
     Coupled with the receiver 162 is a decoder 155 that includes a similar processor 160 and associated peripherals and circuits of similar type to those described in the encoder. These include input/output circuitry 164, memories 168, clock and timing circuitry 173, and a monitor 176 that can display a decoded image 100&#39;. Also provided are inverse discrete cosine transform (IDCT) chips 195, frame buffers 185, and a demultiplexer 190, which may all be of commercially available types. 
     In an exemplary embodiment hereof vector quantization (VQ) is performed on vectors that can, for instance, be obtained using a technique disclosed in the above-referenced U.S. Pat. No. 5,436,985 of Weiping Li. Reference can be made to that Patent for further description. Briefly, the image is subsampled to obtain several subsampled versions of the image, and transformed (using discrete cosine transform) to the transform domain. Vectors are then produced from the DCT coefficients. The vectors can optionally be thresholded and/or otherwise reduced, and vector quantizing is then implemented, for example by using a known code book technique. The vector quantization of the present invention can be performed on the described types of vectors or on any other suitable vectors. 
     FIG. 2 is a flow diagram of a routine for controlling the processor 110 of encoder 105 to perform encoding in accordance with an embodiment of the invention. It will be understood that some or all of the functions described in terms of programming processor 110 may alternatively be implemented in hardware and specifically designed for speed and/or efficiency of processing. In FIG. 2, the block 220 represents the processing of the received image-representative signals and vector formation, for example in the manner just described. The reduced sequence of vectors can then be scaled, as represented by the block 230. In the present invention, the illustrated vector quantization technique uses a lattice type of vector transform coding, and the basics of lattice techniques are described in the Appendix I, appended hereto, and also in the citations at the end of Appendix I. Examples of the types lattices that can be used in embodiments of the present invention are the so-called &#34;Construction A&#34; lattice E 8  or the &#34;Construction B&#34; lattice Λ 16 . Reference can be made, for example to pages 5 and 6 of the Appendix for further description of these known lattices. The E 8  lattice is given by 
     
         E.sub.8 =(8,4,4)+2Z.sup.8 
    
     where the definition of the notation (8,4,4) is set forth at page 6 of Appendix I, and where it is understood that the 8 means that the code words are 8 dimensional, the first 4 means that there are 2 4  =16 codewords, and the second 4 indicates a minimum Hamming distance of 4. The notation Z 8  represents an eight dimensional cubic lattice, and the notation 2Z 8  represents the even points thereof. In an illustrated embodiment hereof the lattice has a pyramid boundary. 
     Referring again to FIG. 2, the block 240 represents the determination, for a given scaled vector, of the closest lattice point. This can be implemented in known fashion, for example by using the routine described by G. D. Forney in &#34;Coset Codes--Part II&#34;, IEEE Transactions On Information Theory, September, 1988. The block 250 is then entered, this block representing the routine to label the previously determined lattice point to produce an index designated IND, and this technique involves improvements in accordance with an embodiment of the invention. The routine therefor is described in conjunction with the flow diagram of FIG. 4, and the subsidiary flow diagrams referred to 
     FIG. 3 is a flow diagram of a routine for programming the processor 160 of decoder 155 to implement decoding in accordance with an embodiment of the invention. Again, some or all functions may, if desired, be advantageously implemented in hardware for advantages in speed and/or efficiency. The block 330 represents the decoding of the index IND to recover the lattice point, which is representative of the original vector at the encoder end, and this routine, which includes features in accordance with an embodiment of the invention, is described in conjunction with the flow diagram of FIG. 8 and the subsidiary flow diagrams referenced therein. After vectors are recovered, they can be scaled (block 340) and processed (block 350) to produce image-representative signals and, ultimately, the recovered images in known fashion and as described, for example, in the above-referenced U.S. Pat. No. 5,436,985. 
     Referring, now, to the flow diagram of FIG. 4, there is shown the routine for implementing the labelling of the lattice points for the selected vectors, as represented generally by the block 250 of FIG. 2. Throughout this disclosure, reference can also be made to the descriptions and equations set forth in Appendix I, for further detail. The block 405 represents the inputting of the determined closest vector, which is represented as y, and also represents the initializing of the index IND at zero. The block 410 represents the determination of the codeword that corresponds to the lattice point of the vector y, and also the lattice point in terms of the Z lattice, which is designated as vector x. The routine for implementing these determinations is set forth in conjunction with the flow diagram of FIG. 5, to which reference will now be made. 
     In FIG. 5, the block 510 represents the inputting of the vector y, and the block 515 represents the initializing of a dimension index to 1. Determination is then made (decision block 520) as to whether vector component y i  (the first dimension for the first traversal through the loop) is even. If so, the block 525 is entered and, if not, the block 530 is entered. As seen from these blocks, if y i  is even, the corresponding codeword bit must be 0 and, if not, it must be 1. In either case, the appropriate Z lattice vector component (x i ) is divided by 2 (to transform back to a Z lattice from the 2Z lattice point). Determination is then made (decision block 540) as to whether the last dimension (n) as been reached. If not, i is incremented (block 550), the block 520 is re-entered, and the loop 555 continues until all dimensions have been processed. The result is the output codeword vector c and the output Z lattice position vector x (block 570), which are output (block 580). 
     Referring again to FIG. 4, determination is next made (decision block 415) as to whether the determined codeword c, is 0. If so, the block 420 is entered, and the routine of Fischer&#39;s method (for a Z lattice) can be applied using the vector x, and the label computed thereby can be output as index IND. Fischer&#39;s method is described, for example, in T. R. Fischer, &#34;A Pyramid Vector Quantizer&#34;, IEEE Transactions On Information Theory, Volume IT-32, July, 1986. If the inquiry of block 415 is answered in the negative, the block 430 is entered, this block representing the employment of a look-up table to order the codewords c as order(c). Next, the highest index number associated with the lower order code words (that is, lower than the determined code word c) is computed (block 440), with the result being accumulated to index IND. This can be implemented using the relationship set forth in Appendix I at a(1) at page 27 thereof. 
     Continuing with the description of the routine of FIG. 4, the block 450 represents the dividing of the vector y (taking account of c) into odd and even subvector components. These subcomponents are respectively designated y 0  and y 1 . Next, the block 460 represents applying Fischer&#39;s method to the vector y 0  to obtain an index I(y 0 ), since the even component has its basis in a Z lattice. Then, as represented by block 470, an index I(y 1 ) is determined for the subvector component y 1 . The routine for this determination is illustrated in conjunction with the flow diagram of FIG. 6. 
     Referring now to the flow diagram of FIG. 6, the block 610 represents the inputting of the subvector component y 1 . The subvector component y 1  is then mapped to a vector designated y 1 , in accordance with the relationship set forth at page 20, equation 30 of Appendix I. It is seen that this involves folding the odd subvector component into a vector space having only positive components. The block 630 represents the determination of the index I P  (y 1 ) for the subvector y 1 . This determination can be performed using the routine described in conjunction with the flow diagram of FIG. 7 which will be treated momentarily. This subvector component y 1  is then mapped to a binary vector b, and b is converted to an index I B  (Y 1 ) in binary coded decimal form, using the relationships at step (a)(2) at page 22 of Appendix I (block 640). Next, as represented by the block 650, the index I(y 1 ) of subvector component y 1  can be determined in accordance with the relationship at step (a)(3) at page 22 of Appendix I. The index of y 1  can then be output (block 660). 
     Reference can now be made to the routine represented by the flow diagram of FIG. 7 for the operation represented by the block 630 of FIG. 6. In FIG. 7, the vector y 1  is input (block 720) and then the index i (dimension) is initialized at 1, and the index k (norm) is initialized at m, and the index l (which keeps track of the dimension, starting at the highest dimension) is initialized at n, and an index I P  (a labelling index) is initialized at 0. In the subsequent loop 765, the index I P  is accumulated in accordance with the equation set forth in step (a)l at page 17 of Appendix I (block 745). The index k is decremented to reflect the new norm (as each dimension is processed), and the index l is decremented as the index i is incremented (block 750). When the norm index k reaches 0 (decision blocks 760) the index I P  can be output to the block 640, as represented by the block 770. 
     Referring again to FIG. 4, now that the indices for the subvector components y 0  and y 1  have been determined, the block 475 is entered, this block representing the accumulating of index IND in accordance with the relationships set forth at step (3) and step (4) at page 27 of Appendix I. The index IND can then be output (block 480), and the next vector can then be processed. 
     Referring now to FIG. 8, there is shown a flow diagram of a routine for implementing the decoding of the index IND in accordance with and embodiment of the invention. The received index IND is input (block 810), and the vector to be reconstructed, designated y is initialized at 0 and an accumulator acc is also initialized at 0 (block 815). Determination is then made (decision block 820) as to whether index IND is less than the number of indices that were allocated for the situation when the codeword is 0. If so, the determined binary codeword c is set to 0 (block 830). The reconstructed Z lattice vector, x, is then determined from the index IND (block 835), using an inverse Fischer&#39;s method. The reconstructed vector y can then be determined as 2x+c (which is just 2xfor this case where c is 0). The block 850 represents the determination of the reconstructed binary vector c (for the case where c is not 0), this routine being described in further detail in the flow diagram of FIG. 9. Then, as represented by the block 855, the reconstructed subvector component y 0  and the reconstructed subvector component y 1  are successively determined (blocks 855 and 860), using the routines of the flow diagrams of FIGS. 10 and 11, respectively.  In the routine of FIG. 11, the inverse Fischer&#39;s method is modified to take account of the folding technique previously described, and the modified inverse Fischer&#39;s method is described in the flow diagram of FIG. 12.! The block 870 is then entered, this block representing the determination of each reconstructed dimension y i  from either the reconstructed even subvector component (if c i  is 0) or from the reconstructed odd subvector component otherwise. The reconstructed vector y can then be read out (block 880). 
     In the routine of FIG. 9, the loop 920 is used to determine the group allocation of the index and the Hamming weight (block 930). The order of the reconstructed codeword can then be determined (loop 940), and c can be obtained from a look-up table (block 950). 
     In the flow diagram of FIG. 10, the routine works backward from the index group sizes to get the norms. The variable m is the norm for the sum of the even and odd parts of the vector. The loop 1020 identifies the norms of y 0  and y 1 . The loop 1040 identifies the reconstructed index of y 0  . The inverse Fischer&#39;s method can then be used to obtain the reconstructed even subvector component (block 1060). 
     In FIG. 11, the loop 1120 performs the inverse of the previously described vector folding technique. To obtain the index of y a modified inverse Fischer technique can then be used (FIG. 12) to obtain the vector y from the index I(y) (block 1130). The index I B  (Y) is then obtained and converted to binary vector b (blocks 1140 and 1150), and then the reconstructed odd subvector component is determined in accordance with the relationships of block 1160. 
     In the modified inverse Fischer technique of FIG. 12, the loop 1220 take account of the form of the folded vector, and the folded vector dimensional components y i  are determined (blocks 1230 and 1240) and are output (block 1250). 
     FIGS. 13 and 14 illustrate a simplified example that is useful in understanding how a digital signal can be encoded, in known manner, into analog form, such as for modem communication, with this example using only 2 bit binary words as an input signal, and four different phases of a sinusoidal waveform. In this simplified example there are four possible two bit binary words; namely, (0,0), (0,1), (1,0), and (1,1). The four waveforms for this simplified example are shown in FIGS. 13A, 13B, 13C and 13D. It is seen that the waveform phases are 45°, 135°, 225°, and 315°, and, in this simplified example, the amplitude of each waveform is unity. As seen in FIG. 14, this situation can be represented as the four indicated lattice points (1, 2, 3 and 4), one in each quadrant in the two dimensional space, where the dimensions are projections of the amplitude to the sin and cos components based on phase angle for this example (and where amplitude is unity for this example). It is seen that a one-to-one mapping can be established between the four possible two bit words to the four possible waveforms (i.e., four lattice points). For a more practical situation of, say, 32 bit words, and as is known in the art, one can use, for example, a sequence of 16 such waveforms to represent the 32 bit word, and the lattice points can be considered as being in a 32 dimensional space. 
     The efficient labelling of the lattice with indices is used in this embodiment (where the input signal is a digital signal, which is encoded to an analog signal, transmitted, received, and decoded back to a digital signal) in an opposite way to that of the previously described embodiment (where the input is an analog signal, which is encoded to a digital signal, transmitted, received, and decoded back to an analog signal), so the routines for labelling the lattice point with an index, and then subsequently determining a lattice point from the index, are reversed. Specifically, in this case, at the encoder, one starts with an index and determines the lattice point (that is, the coordinates of a vector defined by the lattice point) from the index. The lattice point is then transmitted (in this example, by transmitting the corresponding sequence of waveforms, as described), and then, at the decoder, the lattice point labeling procedure is used to recover the index which, in turn, represents the original digital word. An input digital bit stream can be handled as a sequence of N-bit digital words. 
     FIG. 15 is a block diagram of a type of system in which an embodiment of the invention can be used in a situation where, for example, an input digital signal, such as a binary bit stream (representative of any type of data, non-limiting examples being data from a document scanner, computer files, and text) is to be converted to analog form for transmission, received, and then converted back to digital form (in this case, the binary bit stream). The illustrative system of FIG. 15 again has a processor subsystem at the transmitter end and at the receiver end, and these have the same reference numerals (105 and 155, respectively) as in FIG. 1. Each processor subsystem can include the appropriate peripherals (not shown in FIG. 15) as first illustrated in FIG. 1, as well as input/output blocks 118 and 164, respectively. 
     In the system of FIG. 15, the processor subsystem 105 receives a digital input (which can be, for example, a sequence of binary words, such as 32 bit binary words). Each word is considered to be an index, and the lattice point for that index is determined, in accordance with the improvement of an embodiment of the invention, using the routine of FIG. 8. As described in conjunction with the simplified diagrams of FIGS. 13-14, and as is known in the art, the lattice point can then be translated into an appropriate analog signal. This can be done, for example, using a multiplexer 1510 that receives the waveforms having different phases and/or amplitudes, and selecting as an output the appropriate sequence of waveforms in accordance with the selected lattice point and timed by clock signals under control of the processor subsystem. The resultant analog signal is transmitted by a transmitter 1515 (again, over any suitable link) and received by receiver 1555. At the receiver end, the individual waveforms are detected using detector 1565, under control of timing from processor subsystem 115, and then analog-to-digital converted (block 1570) to produce, in digital form, the lattice point (that is, the coordinates of the vector at the lattice point) that was represented by the received analog signal. This signal is processed by the processor subsystem 115, using the routine described in conjunction with FIG. 4, to determine the index of the lattice point, the index, in this example, being a 32 bit binary word of an output data stream that is a representation of the original input data stream. 
     Referring to FIG. 16, there is shown a flow diagram for controlling the processor subsystem 105 at the transmitter end in FIG. 15. The block 1610 represents partitioning of the input bit stream into N bits, to be used as an index. In the example hereof, the indices are 32 bit binary words. The lattice point corresponding to the index is then determined. This is implemented, in the present embodiment, using a feature of the invention by employing the routine first described hereinabove in conjunction with the flow diagram of FIG. 8, as represented by the block 1620 of FIG. 16. The determined lattice point is then output to multiplexer 1510 of FIG. 15, as represented by the block 1630. If the end of the bit stream has not been reached (decision block 1650), the block 1610 is re-entered, and the loop 1660 continues as the bit stream is processed for encoding. 
     Referring to FIG. 17 there is shown a flow diagram of the routine for the processor subsystem of the decoder of the FIG. 15 embodiment. The lattice point (that is, the vector coordinates thereof) are input from the analog-to-digital converter 1570, represented by the block 1710. The index for the lattice point is then determined, in accordance with a feature of this embodiment of the invention, using the routine described in conjunction with the flow diagram of FIG. 4, as represented by the block 1720. The index is then output as the data stream (bit stream 1590 of FIG. 15), as represented by the block 1740. If the last lattice point of a received sequence has not yet been processed (decision block 1750), the block 1710 is re-entered, and the loop 1760 continues the processing to the end of the bit stream. 
     The invention has been described in terms of a particular illustrative embodiment, but variations within the spirit and scope of the invention will occur to those skilled in the art. For example, it will be understood that similar technique and apparatus can be applied for Construction B lattices, as described at pages 31-40 of Appendix I. Also, while the illustrative example hereof was in terms of a pyramid type of boundary, the techniques hereof are applicable to other boundaries, such as a spherical boundary (see also page 41 of Appendix I). ##SPC1##