Abstract:
In order to allow to make compact a distributed amplifier by dispensing with any choke coil and reduce its cost, the distributed amplifier is configured such that it comprises an input side transmission line, an output side transmission line, and plural amplifier circuits connected to the input side transmission line and the output side transmission line, wherein push-pull amplifier circuits are employed as the amplifier circuits.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS  
       [0001]     This application is based on and hereby claims priority to Japanese Application No. 2005-168452 filed on Jun. 8, 2005, 2005 in Japan, the contents of which are hereby incorporated by reference.  
       BACKGROUND OF THE INVENTION  
       [0002]     (1) Field of the Invention  
         [0003]     The present invention relates to a distributed amplifier suitable for use in a high frequency circuit for a GHz band provided for super high-speed optical communication or high-speed radio communication.  
         [0004]     (2) Description of Related Art  
         [0005]     Recently, the rapid spread of the Internet has led to an increased demand for a wide band communication system capable of transmitting and receiving a large amount of data at a high-speed. In order to realize such a communication system, there is a demand for a wide band amplifier having a high frequency band exceeding 10 GHz at the transmitting section front end and the receiving section front end.  
         [0006]     On the other hand, a distributed amplifier is used in the field of optical communication and high frequency radio communication as a circuit component suitable for a wide band since its band is determined by the input capacity of a transistor as well as the inductance component of a transmission line.  
         [0007]     Based upon the technical investigation of the prior arts, the following Japanese Examined Patent Application Publication HEI 7-24372 and Japanese Examined Patent Application Publication HEI 6-80984 have been resultantly found.  
       SUMMARY OF THE INVENTION  
       [0008]     The configuration of a conventional distributed amplifier is such that, as shown in  FIG. 8  for example, plural amplifier circuits  102  (here, field-effect transistors; FETs) are connected in parallel between an input side transmission line  100  and an output side transmission line  101 . In  FIG. 8 , symbol  103  denotes blocks showing inductance components of the transmission lines  100  and  101 . Further, a unit cell  104  is configured such that it includes the input side transmission line  100  including one FET  102  and two inductance components (L/2) and the output side transmission line  101  including two inductance components (L/2).  
         [0009]     Then, one end of the input side transmission line  100  is connected to an input terminal IN and the other end is grounded via a terminal resistor  105 . On the other hand, one end of the output side transmission line  101  is connected to an output terminal OUT via a bias circuit  106  and the other end is grounded via a terminal circuit  107 .  
         [0010]     Here, the bias circuit  106  comprises a capacitor  106 A and a choke coil  106 B and has a configuration in which one end of the capacitor  106 A and one end of the choke coil  106 B are connected. Then, the other end of the capacitor  106 A is connected to the output terminal OUT and the other end of the choke coil  106 B is connected to a bias voltage power source (a bias voltage Vdd).  
         [0011]     The configuration of the terminal circuit  107  is such that a terminal resistor  107 A and a capacitor  107 B are connected in series.  
         [0012]     As described above, the conventional distributed amplifier has a problem in that the choke coil  106 B has large occupation area since the bias circuit  106  comprising the choke coil  106 B is provided on the output terminal OUT side of the output side transmission line  101  in order to operate the circuit. There is also another problem in that the mounting cost is increased since there is a need for the expensive choke coil  106 B having an inductance of mH class.  
         [0013]     The present invention has been devised in view of these problems and an object thereof is to provide a distributed amplifier capable of being made compact (miniaturization) by dispensing with any choke coil and of reducing the cost.  
         [0014]     In accordance with one aspect of the present invention, a distributed amplifier comprising an input side transmission line, an output side transmission line, and plural amplifier circuits connected to the input side transmission line and the output side transmission line, wherein the amplifier circuits are push-pull amplifier circuits.  
         [0015]     Therefore, according to the distributed amplifier of the present invention, there is an advantage that a choke coil can be dispensed with to make the amplifier compact and that the cost can be reduced. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0016]      FIG. 1  is a schematic diagram showing a configuration of a distributed amplifier according to a first embodiment of the present invention.  
         [0017]      FIG. 2  is a diagram for explaining the effects of the distributed amplifier according to the first embodiment of the present invention.  
         [0018]      FIG. 3  is a diagram for explaining the effects of the distributed amplifier according to the first embodiment of the present invention.  
         [0019]      FIG. 4  is a diagram for explaining the effects of the distributed amplifier according to the first embodiment of the present invention.  
         [0020]      FIG. 5  is a schematic diagram showing a configuration of a distributed amplifier according to a second embodiment of the present invention.  
         [0021]      FIG. 6  is a schematic diagram showing a configuration of a distributed amplifier according to a third embodiment of the present invention.  
         [0022]      FIG. 7  is a schematic diagram showing a configuration of a distributed amplifier according to a fourth embodiment of the present invention.  
         [0023]      FIG. 8  is a schematic diagram showing a configuration of a conventional distributed amplifier. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0024]     A distributed amplifier according to embodiments of the present invention is explained below with reference to drawings.  
       First Embodiment  
       [0025]     First, a distributed amplifier according to a first embodiment of the present invention is explained below with reference to  FIG. 1  to  FIG. 4 .  
         [0026]     A distributed amplifier according to the present embodiment is configured such that, as shown in  FIG. 1 , for example, an input side transmission line  1 , an output side transmission line  2 , and plural amplifier circuits  3  connected to the input side transmission line  1  and the output side transmission line  2 , all being connected in parallel.  
         [0027]     In  FIG. 1 , symbol  4  denotes blocks showing the inductance components of the transmission lines. Further, a unit cell  5  is configured such that it includes the input side transmission line  1  including one of the amplifier circuits  3  and two inductance components (L/2)  4  and the output side transmission line  2  including the two inductance components (L/2)  4 . Accordingly, the present distributed amplifier is configured such that plural unit cells are connected.  
         [0028]     In the present embodiment, each of the plural amplifier circuits  3  is a push-pull amplifier circuit.  
         [0029]     Here, each of the plural push-pull amplifier circuits  3  is a complementary push-pull amplifier circuit comprising an n-channel type transistor (a push side transistor)  3 A and a p-channel type transistor (a pull side transistor)  3 B. In other words, the push-pull amplifier circuit is a complementary push-pull amplifier circuit comprising two transistors of different types (transistors in which channels of different conduction types are formed).  
         [0030]     The n-channel type transistor  3 A is an n-channel type MOS field-effect transistor (FET) (nMOSFET) and the p-channel type transistor  3 B is a p-channel type MOS field-effect transistor (FET) (pMOSFET). Here, the transistor is a MOS type FET, however, it may be another FET such as a junction type FET or a MIS (Metal Insulator Semiconductor) type FET.  
         [0031]     In the present embodiment, there are provided a push side input transmission line  1 A for inputting a signal to the n-channel type transistor  3 A and a pull side input transmission line  1 B for inputting a signal to the p-channel type transistor  3 B as the input side transmission line  1 . In other words, in the present embodiment, since there are provided the two transistors, that is, the n-channel type transistor  3 A and the p-channel type transistor  3 B, the two input side transmission lines  1 A and  1 B are provided for inputting signals to the transistors  3 A and  3 B, respectively.  
         [0032]     Then, one end of each of the input side transmission lines  1 A and  1 B is connected to the input terminal IN via a divider (for example, a resistance type divider; Lange coupler etc.)  6 . In other words, the divider  6  is provided on the input sides of the push side input transmission line  1 A and the pull side input transmission line  1 B and the input signals to be inputted via the input terminal IN are divided to the push side and the pull side such that in-phase input signals (in-phase signals) are inputted to the push side n-channel type transistor  3 A and the pull side p-channel type transistor  3 B (single phase type distributed amplifier).  
         [0033]     The other end of each of the input side transmission lines  1 A and  1 B is grounded via a terminal resistor  7 . It is possible to freely set the resistance of the terminal resistor  7 . Here, the terminal resistor  7  is provided in the input side transmission lines  1 A and  1 B, respectively, but the configuration is not limited to this and it is possible to integrate the two input side transmission lines  1 A and  1 B into one transmission line and to integrate the terminal resistors  7  into one resistor by providing the terminal resistor  7  in the integrated transmission line. However, in the case of a push-pull configuration comprising the n-channel type transistor  3 A and the p-channel type transistor  3 B, since there is a need to prevent variations in the parameters (for example, input capacity) of the respective transistors  3 A and  3 B from occurring, it is preferable to provide a terminal resistor in the two input side transmission lines  1 A and  1 B, respectively.  
         [0034]     On the other hand, in the present embodiment, one output side transmission line is provided between the n-channel type transistor  3 A and the p-channel type transistor  3 B as the output side transmission line  2  (single end distributed amplifier). In other words, in the present embodiment, a signal amplified by the n-channel type transistor  3 A and a signal amplified by the p-channel type transistor  3 B are combined and outputted via the common output side transmission line  2 .  
         [0035]     Here, one end of the output side transmission line  2  is connected to the output terminal OUT and the other end is grounded via a terminal circuit  8 . Here, the terminal circuit  8  is configured such that a terminal resistor  8 A and a capacitor  8 B for preventing a direct current from flowing to the terminal resistor  8 A are connected in series.  
         [0036]     More specifically, in the present embodiment, the input side transmission line is connected to the gates of the pMOSFET  3 B and the nMOSFET  3 A, respectively. In other words, the pull side input transmission line  1 B is connected to the gate of the pMOSFET  3 B and the push side input transmission line  1 A is connected to the gate of the nMOSFET  3 A. Here, each of the input side transmission lines  1 A and  1 B is connected to the input terminal IN via the divider  6  such that in-phase signals are inputted to the gates of the pMOSFET  3 B and nMOSFET  3 A (gate in-phase input).  
         [0037]     Further, the output side transmission line  2  is connected to the source of the pMOSFET  3 B and to the drain of the nMOSFET  3 A. In other words, the source of the pMOSFET  3 B and the drain of the nMOSFET  3 A are connected together and to their connection point, the output side transmission line  2  is connected.  
         [0038]     Furthermore, to the drain of the pMOSFET  3 B, a constant-voltage power source capable of supplying a constant power source voltage Vdd is connected. On the other hand, the source of the nMOSFET  3 A is grounded.  
         [0039]     The present distributed amplifier is configured as described above, therefore, it operates as follows.  
         [0040]     When input signals are inputted from the input terminal IN, the input signals are divided by the divider  6  to the two input side transmission lines  1  (the push side input transmission line  1 A and the pull side input transmission line  1 B), respectively.  
         [0041]     Next, the respective in-phase signals divided by the divider  6  propagate on the respective input side transmission lines  1 A and  1 B and part of them is inputted to the plural amplifier circuits  3 , respectively. Here, one of the input signals propagates on the push side input transmission line  1 A and part of it is applied to the gates of the plural nMOSFETs  3 A, respectively. On the other hand, the other input signal propagates on the pull side input transmission line  1 B and part of it is applied to the gates of the plural pMOSFETs  3 B, respectively.  
         [0042]     In the present embodiment, since the amplifier circuit has a complementary push-pull configuration comprising the n-channel type transistor (nMOSFET)  3 A and the p-channel type transistor (pMOSFET)  3 B (that is, the unit cell  5  is configured in such a manner as to include the pMOSFET  3 B and the nMOSFET  3 A), only the half waves on the upper side or the lower side of the input signal are amplified in the respective transistors  3 A and  3 B, and these are combined and taken out from between the pMOSFET  3 B and the nMOSFET  3 A as output signals. In this case, the power source voltage Vdd is supplied only to the drain of the pMOSFET  3 B.  
         [0043]     In this manner, the respective signals amplified by the respective amplifier circuits  3  propagate on the output side transmission line  2 . Here, since the length of each path from the input terminal IN to the output terminal OUT is the same, the respective amplified signals being amplified by the respective amplifier circuits  3  and having propagated on the output side transmission line  2  are mutually in-phase at the output terminal OUT, combined and amplified, and output from the output terminal OUT as output signals.  
         [0044]     Therefore, according to the distributed amplifier in the present embodiment, the choke coil for supplying a bias voltage required by the conventional distributed amplifier can be dispensed with and an advantage is obtained that it can be made compact and cost can be reduced. As a result, since the reduced occupied area of the distributed amplifier can be achieved, it becomes possible to realize very compact integrated circuit (IC) and module.  
         [0045]     On the other hand, since each of the amplifier circuits has a push-pull configuration and the signals dealt with by the respective transistors  3 A and  3 B are either positive or negative, it is possible to increase the output that has been restricted in a conventional distributed amplifier due to the problem associated with the withstand voltage. As a result, as is apparent from the calculation results of the input/output power characteristics (Pin-Pout characteristics) shown in  FIG. 2 , a higher output is achieved and excellent linearity can be obtained. Further, as is apparent from the calculation results of the frequency characteristics of gain shown in  FIG. 3 , excellent gain flatness can be obtained in a wide band. And, as is apparent from the calculation results of the output waveform in  FIG. 4 , clipping can be alleviated and switching distortion can be eliminated by setting, for example, a bias etc. Furthermore, power consumption can be reduced compared to the conventional distributed amplifier.  
       Second Embodiment  
       [0046]     Next, a distributed amplifier according to a second embodiment of the present invention is explained below with reference to  FIG. 5 .  
         [0047]     The distributed amplifier according to the present embodiment differs from the one in the above-mentioned first embodiment in that the input side transmission line  1  is one line. In other words, the present distributed amplifier is different in that, as shown in  FIG. 5 , a common input side transmission line connected to both the n-channel type transistor  3 A and the p-channel type transistor  3 B is provided as the input side transmission line  1 . Accordingly, the divider  6  provided in the above-mentioned first embodiment is not provided. In  FIG. 5 , the same symbols are attached to the same components as those in the above-mentioned first embodiment (refer to  FIG. 1 ).  
         [0048]     More specifically, the present distributed amplifier has a push-pull configuration in which the amplifier circuit  3  comprises the two transistors of different types (transistors in which channels of different conduction types are formed), that is, the n-channel type transistor (push side transistor)  3 A and the p-channel type transistor (pull side transistor)  3 B as is the case with the above-mentioned first embodiment. However, as shown in  FIG. 5 , one input side transmission line  1  is provided, which is connected to the respective transistors  3 A and  3 B, and thus in-phase input signals are inputted to the respective transistors  3 A and  3 B (single phase type distributed amplifier).  
         [0049]     More concretely, in the present embodiment, the common input side transmission line  1  is connected to the gates of the pMOSFET  3 B and the nMOSFET  3 A such that in-phase signals are inputted to the gates of the pMOSFET  3 B and the nMOSFET  3 A (gate in-phase input).  
         [0050]     Other configurations and operations are the same as those in the above-mentioned embodiment, therefore, the explanation will be omitted here.  
         [0051]     Therefore, according to the distributed amplifier in the present embodiment, as in the above-mentioned first embodiment, the choke coil for supplying a bias voltage required by the conventional distributed amplifier can be dispensed with and an advantage is obtained that it can be made compact and cost can be reduced. As a result, since the reduced occupied area of the distributed amplifier can be achieved, it becomes possible to realize very compact integrated circuit (IC) and module.  
         [0052]     On the other hand, since each of the amplifier circuits has a push-pull configuration and the signals dealt with by the respective transistors  3 A and  3 B are either positive or negative, it is possible to increase the output that has been restricted in a conventional distributed amplifier due to the problem associated with the withstand voltage. As a result, a higher output is achieved and excellent linearity can be obtained (refer to  FIG. 2 ). Further, excellent gain flatness can be obtained in a wide band (refer to  FIG. 3 ). And, clipping can be alleviated and switching distortion can be eliminated by setting, for example, a bias etc (refer to  FIG. 4 ). Furthermore, power consumption can be reduced compared to the conventional distributed amplifier.  
       Third Embodiment  
       [0053]     Next, a distributed amplifier according to a third embodiment of the present invention is explained below with reference to  FIG. 6 .  
         [0054]     The distributed amplifier according to the present embodiment differs from that in the above-mentioned first embodiment in the configuration of the amplifier circuit.  
         [0055]     In other words, as shown in  FIG. 6 , in the present distributed amplifier, each of the plural push-pull amplifier circuits  3  is configured as a complementary push-pull amplifier circuit comprising an npn bipolar transistor (push side transistor)  3   a  and a pnp bipolar transistor (pull side transistor)  3   b.  That is, the amplifier circuit  3  is a complementary push-pull amplifier circuit comprising two transistors of different types. Here, the base, source, and drain of the field-effect transistor in the above-mentioned first embodiment correspond to the base, emitter, and collector of the bipolar transistor, respectively. In  FIG. 6 , the same symbols are attached to the same components as those in the above-mentioned first embodiment (refer to  FIG. 1 ).  
         [0056]     Since other configurations and operations are the same as those in the above-mentioned first embodiment, no explanation will be given here.  
         [0057]     Therefore, according to the distributed amplifier in the present embodiment, as in the above-mentioned first embodiment, the choke coil for supplying a bias voltage required by the conventional distributed amplifier can be dispensed with and an advantage is obtained that it can be made compact and cost can be reduced. As a result, since the reduced occupied area of the distributed amplifier can be achieved, it becomes possible to realize very compact integrated circuit (IC) and module.  
         [0058]     On the other hand, since each of the amplifier circuits has a push-pull configuration and the signals dealt with by the respective transistors  3   a  and  3   b  are either positive or negative, it is possible to increase the output that has been restricted in a conventional distributed amplifier due to the problem associated with or the withstand voltage. As a result, a higher output is achieved and excellent linearity can be obtained (refer to  FIG. 2 ). Further, excellent gain flatness can be obtained in a wide band (refer to  FIG. 3 ). And, clipping can be alleviated and switching distortion can be eliminated by setting, for example, a bias etc (refer to  FIG. 4 ). Furthermore, power consumption can be reduced compared to the conventional distributed amplifier.  
       Fourth Embodiment  
       [0059]     Next, a distributed amplifier according to a fourth embodiment of the present invention is explained below with reference to  FIG. 7 .  
         [0060]     The distributed amplifier according to the present embodiment differs from that in the above-mentioned second embodiment in the configuration of the amplifier circuit.  
         [0061]     In other words, as shown in  FIG. 7 , in the present distributed amplifier, each of the plural push-pull amplifier circuits  3  is configured as a complementary push-pull amplifier circuit comprising an npn bipolar transistor (push side transistor)  3   a  and a pnp bipolar transistor (pull side transistor)  3   b.  That is, the push-pull amplifier circuit  3  is a complementary push-pull amplifier circuit comprising two transistors of different types. Here, the base, source, and drain of the field-effect transistor in the above-mentioned second embodiment correspond to the base, emitter, and collector of the bipolar transistor, respectively. In  FIG. 7 , the same symbols are attached to the same components as those in the above-mentioned second embodiment (refer to  FIG. 5 ).  
         [0062]     Since other configurations and operations are the same as those in the above-mentioned second embodiment, no explanation will be given here.  
         [0063]     Therefore, according to the distributed amplifier in the present embodiment, as in the above-mentioned second embodiment, the choke coil for supplying a bias voltage required by the conventional distributed amplifier is no longer necessary and an advantage is obtained that reduction both in size and in cost can be realized. As a result, since the area occupied by the distributed amplifier can be reduced, it becomes possible to realize very compact integrated circuit (IC) and module.  
         [0064]     On the other hand, since each of the amplifier circuits  3  has a push-pull configuration and the signals dealt with by the respective transistor  3   a  and  3   b  are all either positive or negative, it is possible to increase the output that has been restricted in the conventional distributed amplifier because of the problem of withstand voltage. As a result, a higher output becomes possible and excellent linearity can be obtained (refer to  FIG. 2 ). Further, excellent gain flatness can be obtained in a wide band (refer to  FIG. 3 ). And, clipping can be alleviated and switching distortion can be eliminated by setting, for example, a bias etc. (refer to  FIG. 4 ). Furthermore, power consumption can be reduced compared to the conventional distributed amplifier.  
         [0000]     [Others]  
         [0065]     In each of the above-mentioned embodiments, the push-pull amplifier circuit is configured as a complementary push-pull amplifier circuit comprising two transistors of different types (transistors in which channels of different conduction types are formed), however, the configuration is not limited to this.  
         [0066]     For example, it may be possible to configure a push-pull amplifier circuit such that it comprises two n-channel type transistors [two transistors of the same type (transistors in which channels of the same conduction type are formed)] as a push side transistor and a pull side transistor. As an n-channel type transistor, it is only necessary to use a FET such as a MOS field-effect transistor (MOSFET), a junction FET, or a MIS (Metal Insulator Semiconductor) FET.  
         [0067]     In this case, it is necessary to provide a phase inversion circuit for inverting the phase of a signal to be inputted to one of the n-channel type transistors with respect to the phase of a signal to be inputted to the other n-channel type transistor. As a phase inversion circuit, it is only necessary to provide, for example, a line (a phase delay circuit) for delaying the phase of an input signal on the line through which an input signal is inputted to one of the n-channel type transistors.  
         [0068]     Here, two n-channel type transistors are used as a push-side transistor and a pull-side transistor, however, the configuration is not limited to this and two p-channel transistors [two transistors of the same type (transistors in which channels of the same conduction type are formed)] may be used. Further, two npn bipolar transistors (two transistors of the same type) may be used as a push-side transistor and a pull-side transistor or two pnp bipolar transistors (two transistors of the same type) may be used.  
         [0069]     In each of the above-mentioned embodiments and their modification examples, a push-pull circuit comprising a field-effect transistor or a bipolar transistor (semiconductor amplifier element) is used, however, the configuration is not limited to this and, for example, an amplifier element having a different structure or made of a different material may be used or a push-pull circuit having a different configuration may be used.  
         [0070]     The present invention is not limited by each of the above-mentioned embodiments and various modifications can be made without departing from the concept of the present invention.