Abstract:
A system and method prevent corrosive elements (or at least the oxidizing agent) from making contact with metal connections at the interface between two layers of a stacked IC device. When layers are positioned in proximity to each other, a cavity is formed at the boundary of the planar surfaces of the layers. This cavity is bounded by a peripheral seal between the layers. In one embodiment, a vacuum is created within the cavity thereby reducing the corrosive atmosphere within the cavity. In another embodiment, the cavity is filled with an inert gas, such as argon. Once the cavity has oxidizing elements reduced, the peripheral seal can be encapsulated to prevent seepage of contaminants into the cavity.

Description:
TECHNICAL FIELD 
       [0001]    This disclosure relates to integrated circuits (ICs) and more specifically to multi-layered ICs and even more specifically to systems and methods for controlling corrosion between layers. 
       BACKGROUND 
       [0002]    In IC technology there is a need to stack chips (dies) together to form multi-layered (3-D) IC devices. One method to form a 3-D device is to bring two (or more) layers together and then encapsulate the layers into a single structure. Electrical conductors and/or contacts on the surfaces of the respective layers serve to carry electrical signals between circuits on the different layers. These conductors/contacts are very small, on the order of microns in diameter, and when exposed to a corrosive atmosphere will corrode relatively quickly. Corrosion then interferes with the signal processing capability of the 3D devices. 
         [0003]    The corrosion results from a small gap created between the two dies when they are brought together. Corrosive material, such as water and oxygen can be trapped within these gaps. This trapped corrosive material then interacts with the metallic conductors/contacts resulting in reliability problems. 
         [0004]    One solution is to fill the “gap” with filler material. Because the gap size is not constant, the amount at filler is not constant. Thus, it is difficult to completely fill the gap. On the other hand, using too much filler will increase the size of the resultant 3-D device, thereby changing the form factor. 
         [0005]    Another solution is to eliminate the gap or make it very small. To accomplish this, the surfaces of the respective dies would have to be extremely planar, thereby adding to the cost of the device, as well as to the cost of handling the dies. 
         [0006]    An additional problem is that gases trapped between the layers expand during temperature increases or external pressure decreases. The expanded gases exert separation pressure on the bonded tier. 
       BRIEF SUMMARY 
       [0007]    The present disclosure is directed to systems and methods for preventing corrosive elements (e.g., oxidizing agents) from contacting metal connections at the interface between two layers of a stacked IC device. When layers are positioned in proximity to each other, a cavity is formed at the boundary of the planar surfaces of the layers. This cavity is bounded by a peripheral seal between the layers. In one embodiment, a vacuum is created within the cavity, thereby eliminating or reducing the corrosive atmosphere within the cavity. In another embodiment, the cavity is filled with a non-oxidizing gas, such as argon. Once the cavity is free of oxidizing elements, the peripheral seal can be encapsulated to prevent seepage of contaminants into the cavity and to prevent corrosion of the seal itself. 
         [0008]    The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and specific embodiments disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims. The novel features which are believed to be characteristic of the invention, both as to its organization and method of operation, together with further objects and advantages, will be better understood from the following description when considered in connection with the accompanying figures. It is to be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only and is not intended as a definition of the limits of the present invention. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0009]    For a more complete understanding of the present invention, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which: 
           [0010]      FIGS. 1A through 1C  show examples of a multi-layered IC devices and exemplary processes for manufacturing the multi-layered IC devices in accordance with embodiments of the invention; 
           [0011]      FIG. 2  shows one alternate stacked IC device, according to embodiments of the invention; 
           [0012]      FIG. 3  shows one embodiment of die to wafer stacking, according to embodiments of the invention; 
           [0013]      FIG. 4  shows one alternative embodiment in which multi-layered IC devices are bonded in an environmentally controlled chamber, according to embodiments of the invention; and 
           [0014]      FIG. 5  shows one embodiment of a method for controlling corrosion between layers of a multi-layered IC device, according to embodiments of the invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0015]    Turning now to  FIG. 1A , there is shown stacked IC device  10  which comprises top die  11  and bottom die  12 . Top die  11  has active layer  101  and substrate layer  102 . Bottom die  12  has active layer  103  and substrate layer  104 .  FIG. 1A  shows the top die and bottom die positioned prior to being brought together for bonding purposes. In this embodiment, substrate layer  102  will be bonded to active layer  103  and thus this is a “back-to-face” bonding arrangement. As will be discussed, any arrangement of “face-to-face,” “back-to-back,” “face-to-back,” or “back-to-face” combinations can use the concepts discussed herein to form tiered semi-conductor components. 
         [0016]      FIG. 1A-1C  depict a two layered stacked IC device, however a stacked IC device may comprise more layers. Substrate layer  102  contains connections (elements)  112  which serve to connect components  111  (or terminals) on layer  101  to active components  115  (or terminals) on layer  103 . These connections are made using connector path  112  which then mates with pad  114  on a planar surface of layer  103 , when the planar surfaces of layers  102  and  103  are brought together. Around the periphery of top die  11  and bottom die  12  there are formed elements  110  and  113 , respectively, which will come together to form a seal (as will be seen) when the layers are mated. In the embodiment shown, seal portions  110  and  113  are metal, but may comprise other materials. 
         [0017]      FIG. 1B  shows dies  11  and  12  coming together, and forming one or more gaps  120  within the area bounded by the peripheral mated elements  110 / 113 . Elements  110 / 113  come together to form a seal around the periphery. Note that now an electrical connection exists from component  111  to component  115  using connector elements  112  and  114 . 
         [0018]    Once the elements are properly aligned, a new atmosphere can be selectively created in an environmentally controlled chamber such that the new atmosphere is different from the atmosphere that would normally be formed if atmospheric intervention is not undertaken, e.g., ambient atmosphere. For example, a normal atmosphere could contain water, other vapors, and/or other gases that could cause corrosion which in turn would cause interference with the proper operation of the IC device. 
         [0019]    In such an example, the selectively created non-corrosive environment created within the environmentally controlled chamber may be created, by way of example, using a pump (not shown) to reduce the atmospheric pressure in the environmentally controlled chamber and/or to substantially replace the atmosphere within the environmentally controlled chamber with an inert gas or non-oxygen gas, as will be discussed. The created atmosphere is designed to drive out the oxygen, water, and/or other oxidizing agents thereby reducing corrosion. Once the proper environment is created, the dies are compressed together and bonded, preferably at a temperature in air greater than 150 degrees Centigrade so that the proper environment exists in the gap  120 . 
         [0020]    Note that the low pressure can be created by using one or more pumps. These pumps may also be used to inject a desired environment, such as argon or nitrogen into the environmentally controlled chamber, instead of or in addition to reducing the pressure. The low pressure could be as low as desired even to the point of substantially creating a vacuum. 
         [0021]    Also note that in some situations it might be desirable to create more than one gap between the layers and to create different environments with respect to different gaps. The gaps may be created by placing mated elements  110 / 113  around the portions that are desired to be separate gaps. Thus, a low pressure could be created with respect to some gaps and a different environment created in other gaps within the same stacked IC device. These different environments can be between the same layers and/or between different layers. 
         [0022]      FIG. 1C  shows the addition of protective layer  140  outside of seal  110 / 113 . This protective layer can be added, for example, by plasma enhanced chemical vapor deposition (PCVD) to help prevent the environment inside the sealed cavity from having contact with corrosive elements, such as water or oxygen, found in the normal environment. Layer  140  could be an insulated layer, such as silicon nitrite or silicon oxide. The film  140  can be deposited all around the exterior of the stacked IC device, if desired, rather than solely on the seal ring  110 / 113 , as shown in  FIG. 1C . A function of this layer  140  is to form a barrier between the seal ring  110 / 113  and its external environment. Protective layer  140  is created because it is unlikely that metal seal  110 / 113  could be tight enough around the total perimeter to form a perfect impervious bond without some leakage. Moreover, if the seal  110 / 113  is formed of metal, the seal  110 / 113  could corrode. 
         [0023]      FIG. 2  shows one alternate stacked IC device arrangement  20  having dies  21  and  22  and in which the “faces”  202 ,  203  of at least two of the layers are bonded in a “face-to-face” relationship. This is in contrast to the “back-to-face” bonding shown in  FIGS. 1A through 1C . In  FIG. 2 , stacked IC device  20  has layer to layer electrical contacts  212 ,  213  with vias  210  (if necessary) to provide connectivity to external components. Note that the metallic peripheral seal ring between the layers is, in this embodiment, made up by portions  214  and  215 . Of course, any combination and any number of layers can be used. 
         [0024]    The concepts discussed herein can be accomplished with die to die stacking, die to wafer stacking and, in some situations, wafer to wafer stacking.  FIG. 3  shows die to wafer stacking in which die  30 - 1  is mated to die  31 - 1  which is still part of wafer  300 . Dies  30 - 1  and  31 - 1  may have different sizes. This can be repeated sequentially or in parallel with any number of other dies (not shown) bonded to any of dies  31 - 1  to  31 -N-positioned on wafer  300 . Encapsulation (not shown in  FIG. 3 ) can then occur with respect to one die pair, or with respect to all die pairs, to provide the protective outer seal. Dies  31 - 1  to  31 -N can then be separated from wafer  300  to form individual stacked IC devices. 
         [0025]      FIG. 4  shows one alternative embodiment in which a multi-layered IC device is bonded in an environmentally controlled chamber. As shown, die  40  is positioned in conjunction with die  41  to form stacked IC device  400  within chamber  401 . Dies  40  and  41  are properly aligned and then environment control  402  creates the proper environment using rings  42  and  43  to form the seal around the periphery between the layers. This environment, for example, can be low pressure (including a vacuum if desired) or the environment can be a gas, such as nitrogen or argon or any other substance, or combination of substances that prevent or reduce corrosive, or other undesired effects, within the cavity between the mated layers. Argon 
         [0026]    Stacked IC device  400  is preferably heated to a temperature of  130 C to  400 C so that when the stacked IC device  400  cools, the gap between the tiers is under lower than atmospheric pressure. While heated, compression thermal bonding can then be used to bond dies  40  and  41 . Once the layers are bonded, the protective film (not shown) can be deposited over the entire stacked IC device  400 , or if desired, only around the inter-layer seal ring  42 / 43 . Note that the reduced pressure within the cavity, resulting from heating the layers before bonding, acts to facilitate holding the layers together. Moreover, if the temperature rises, the pressure within the cavity (cavities) will not be sufficient to push the layers apart. 
         [0027]      FIG. 5  shows one embodiment  50  of a method for controlling corrosion between layers of a multi-layered IC device. Block  501  controls the positioning of one or more dies in relation to a second die (or wafer). When block  502  determines that the positioning is complete, such that the peripheral seal (for example,  214 / 215   FIG. 2 ) is established, block  503  establishes a controlled environment between the dies in any one of a number of ways, such as discussed above, or otherwise. 
         [0028]    Blocks  503  and  504  repeat until block  504  determines the proper environment has been established, in which case block  505  bonds the dies together. If desired, block  506  adds the protective barrier outside the established seal as discussed above. 
         [0029]    Although blocks  501  and  502  are shown before blocks  503  and  504 , it is envisioned that blocks  503  and  504  could occur prior to blocks  501  and  502 . It should be appreciated that while the seal is shown around the periphery, the seal can be around only certain elements and more than one sealed area can be formed between two layers. 
         [0030]    Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.