Abstract:
Disclosed is a radio frequency signal receiving device, which includes a low-noise amplifier (LNA) and a mixer. The LNA includes a first inductor and a second inductor. The mixer has a first differential pair and a second differential pair, common ends of the first differential pair and the second differential pair are respectively coupled to the first differential output end and the second differential output end. The first inductor and the second inductor are serially connected between the first differential output end and the second differential output end of the LNA, so as to reduce power consumption and reach suitable frequency response. The first inductor and the second inductor generate a resonance effect with parasitic capacitance on the mixer, so as to effectively reduce flicker noises, and improve a working benefit of the radio frequency signal receiving device.

Description:
BACKGROUND OF THE PRESENT INVENTION 
     1. Field of Invention 
     The present invention relates to a radio frequency signal receiving device. 
     2. Description of Related Arts 
     In the field of wired communications and wireless communications, so-called broadband communication technologies are proposed in succession, for example, digital video broadcasting-handheld (DVB-H) (470-890 MHz) and cognitive radio (0.1-10 GHz). A low-noise amplifier (LNA) is configured in a first level circuit of a receiving device, so that characteristics of the LNA may directly affect entire performance of the receiving device. Therefore, in consideration of the broadband performance, designers may face more challenges, which include how to design an LNA with broadband input matching, gain bandwidth, and low power consumption. 
     A mixer is a second level circuit of the receiving device. In design of the mixer, the designers need to consider the power consumption of the mixer, and the area of the circuit, and further need to consider flicker noises generated during the combination action of the LNA and the mixer. 
     SUMMARY OF THE PRESENT INVENTION 
     An object of the present invention is to provide a radio frequency signal receiving device, so as to solve the problems of the prior art. 
     In order to accomplish the above and other related objects, the radio frequency signal receiving device provided in the present invention comprises an LNA and a mixer. The LNA has a single input end, a first differential output end, and a second differential output end. The single input end receives a radio frequency input signal. The LNA comprises: a first inductor, serially connected between the first differential output end and an operating voltage receiving end; and a second inductor, serially connected between the second differential output end and the operating voltage receiving end. The mixer is coupled to the first differential output end and the second differential output end of the LNA, and has a first differential pair and a second differential pair. Common ends of the first differential pair and the second differential pair are respectively coupled to the first differential output end and the second differential output end, and the first differential pair and the second differential pair commonly receive a differential signal group. 
     In an embodiment of the present invention, the LNA comprises an inverting amplifier circuit and a single-end to dual-end amplifier circuit. An input end of the inverting amplifier circuit is coupled to the single input end. The single-end to dual-end amplifier circuit is coupled to an output end of the inverting amplifier circuit, and coupled to the first differential output end and the second differential output end. 
     In an embodiment of the present invention, the inverting amplifier circuit comprises: a first transistor, a second transistor, and a first capacitor. The first transistor has a first end, a second end, and a control end. The first end is coupled to the operating voltage receiving end, and the second end is coupled to the output end of the inverting amplifier circuit. The second transistor has a first end, a second end, and a control end. The control end is coupled to the control end of the first transistor, the first end of the second transistor is coupled to the second end of the first transistor, and the second end of the second transistor is coupled to a grounding voltage end. The first capacitor is serially connected between the single input end and the control ends of the first transistor and the second transistor. 
     In an embodiment of the present invention, the first inductor and the second inductor are disposed in the single-end to dual-end amplifier circuit, and the single-end to dual-end amplifier circuit further comprises: a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a second capacitor. The third transistor has a first end, a second end, and a control end. The control end is coupled to a constant voltage end, and the first end is coupled to the first differential output end. The fourth transistor has a first end, a second end, and a control end. The control end is coupled to the second end of the third transistor, and the first end of the fourth transistor is coupled to the second differential output end. The fifth transistor has a first end, a second end, and a control end. The control end is coupled to the output end of the inverting amplifier circuit, and the first end of the fifth transistor is coupled to the second end of the third transistor. The sixth transistor has a first end, a second end, and a control end. The control end is coupled to the constant voltage end, the first end of the sixth transistor is coupled to the second end of the fourth transistor, and the second end of the sixth transistor is coupled to the grounding voltage end. The second capacitor is coupled between a coupling end point of the third transistor and the fifth transistor and the control end of the fourth transistor. 
     In an embodiment of the present invention, the single-end to dual-end amplifier circuit further comprises a third capacitor, serially connected between the control end of the third transistor and the grounding voltage end, or serially connected between the control end of the third transistor and the operating voltage receiving end. 
     In an embodiment of the present invention, the single-end to dual-end amplifier circuit further comprises a fourth capacitor, serially connected between a coupling end point of the fourth transistor and the sixth transistor and the grounding voltage end, or serially connected between a coupling end point of the fourth transistor and the sixth transistor and the operating voltage receiving end. 
     In an embodiment of the present invention, the first differential pair of the mixer comprises a first differential transistor and a second differential transistor. The first differential transistor has a first end, a second end, and a control end. The control end receives a first signal of the differential signal group, the first end of the first differential transistor is coupled to the first differential output end, and the second end of the first differential transistor is coupled to the first mixing output end. The second differential transistor has a first end, a second end, and a control end. The control end receives a second signal of the differential signal group, the first end of the second differential transistor is coupled to the first differential output end, and the second end of the second differential transistor is coupled to the second mixing output end. The second differential pair of the mixer comprises: a third differential transistor and a fourth differential transistor. The third differential transistor has a first end, a second end, and a control end. The control end receives the second signal of the differential signal group, the first end of the third differential transistor is coupled to the second differential output end, and the second end of the third differential transistor is coupled to the first mixing output end. The fourth differential transistor has a first end, a second end, and a control end. The control end receives the first signal of the differential signal group, the first end of the fourth differential transistor is coupled to the second differential output end, and the second end of the fourth differential transistor is coupled to the second mixing output end. 
     In an embodiment of the present invention, the mixer further comprises a first load and a second load. The first load is coupled between the first mixing output end and a grounding voltage end; and the second load is coupled between the second mixing output end and the grounding voltage end. 
     In an embodiment of the present invention, the first load comprises a fifth capacitor and a first resistor. The fifth capacitor is coupled between the first mixing output end and the grounding voltage end; and a first resistor is coupled to the fifth capacitor in parallel. 
     In an embodiment of the present invention, the second load comprises a sixth capacitor and a second resistor. The sixth capacitor is coupled between the second mixing output end and the grounding voltage end; and the second resistor is coupled to the sixth capacitor in parallel. 
     As described above, in the radio frequency signal receiving device according to the present invention, the first inductor and the second inductor are serially connected between the first differential output end and the second differential output end of the LNA, so as to reduce power consumption and reach suitable frequency response. The first inductor and the second inductor generate a resonance effect with parasitic capacitance on the mixer, so as to effectively reduce flicker noises, and improve a working benefit of the radio frequency signal receiving device. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a circuit diagram of a radio frequency signal receiving device according to an embodiment of the present invention. 
         FIG. 2  is a circuit diagram of a radio frequency signal receiving device according to another embodiment of the present invention. 
     
    
    
     LIST OF REFERENCE NUMERALS 
     
         
         
           
               100 ,  200  Radio frequency signal receiving device 
               110  LNA 
               120  Inverting amplifier circuit 
               130  Single-end to dual-end amplifier circuit 
               140  Mixer 
               150  First differential pair 
               155  First load 
               160  Second differential pair 
               165  Second load 
             C 1  First capacitor 
             C 2  Second capacitor 
             C 3  Third capacitor 
             C 4  Fourth capacitor 
             C 5  Fifth capacitor 
             C 6  Sixth capacitor 
             DM 1  First differential transistor 
             DM 2  Second differential transistor 
             DM 3  Third differential transistor 
             DM 4  Fourth differential transistor 
             INVout Output end of inverting amplifier circuit 
             LNAout_n First differential output end 
             LNAout_p Second differential output end 
             LOP First signal of differential signal group 
             LON Second signal of differential signal group 
             L 1  First inductor 
             L 2  Second inductor 
             M 1  First transistor 
             M 2  Second transistor 
             M 3  Third transistor 
             M 4  Fourth transistor 
             M 5  Fifth transistor 
             M 6  Sixth transistor 
             Output_n First mixing output end 
             Output_p Second mixing output end 
             RFin Radio frequency input signal 
             R 1  First resistor 
             R 2  Second resistor 
             T 1  Single input end 
             Vconst Constant voltage end 
             VDD Operating voltage receiving end 
             VSS Grounding voltage end 
           
         
       
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Examples of embodiments are described in the accompanying drawings with reference to the embodiments of the present invention in detail. In addition, in possible positions, components/members with the same numerals are used in the drawings and embodiments to represent the same or similar parts. 
       FIG. 1  is a circuit diagram of a radio frequency signal receiving device according to an embodiment of the present invention. Referring to  FIG. 1 , the radio frequency signal receiving device  100  includes an LNA  110  and a mixer  140 . The LNA  110  has a single input end T 1 , a first differential output end LNAout_n, and a second differential output end LNAout_p. Further, the LNA  110  has the single input end T 1  for receiving a radio frequency input signal RFin, and the LNA  110  includes a first inductor L 1  and a second inductor L 2 . The first inductor L 1  is serially connected between the first differential output end LNAout_n and an operating voltage receiving end VDD. The second inductor L 2  is serially connected between the second differential output end LNAout_p and the operating voltage receiving end VDD. The mixer  140  is coupled to the first differential output end LNAout_n and the second differential output end LNAout_p of the LNA  110 . The mixer  140  has a first differential pair  150  and a second differential pair  160 . Common ends of the first differential pair  150  and the second differential pair  160  are respectively coupled to the first differential output end LNAout_n and the second differential output end LNAout_p. The first differential pair  150  and the second differential pair  160  commonly receive a differential signal group, in which the differential signal group includes a first signal LOP and a second signal LON. 
     More clearly, the LNA  110  includes an inverting amplifier circuit  120  and a single-end to dual-end amplifier circuit  130 . An input end of the inverting amplifier circuit  120  is coupled to the single input end T 1 . The single-end to dual-end amplifier circuit  130  is coupled to an output end INVout of the inverting amplifier circuit  120 , and is coupled to the first differential output end LNAout_n and the second differential output end LNAout_p. 
     Further, the inverting amplifier circuit  120  includes a first transistor M 1 , a second transistor M 2 , and a first capacitor C 1 . The first transistor M 1  and the second transistor M 2  respectively have a first end, a second end, and a control end. The first end of the first transistor M 1  is coupled to the operating voltage receiving end VDD. The second end of the first transistor M 1  is coupled to the output end INVout of the inverting amplifier circuit  120 . The control end of the second transistor M 2  is coupled to the control end of the first transistor M 1 . The first end of the second transistor M 2  is coupled to the second end of the first transistor M 1 . The second end of the second transistor M 2  is coupled to a grounding voltage end VSS. The first capacitor C 1  is serially connected between the single input end T 1 , and the control ends of the first transistor M 1  and the second transistor M 2 , in which the capacitor C 1  may filter a direct current (DC) component of the radio frequency input signal RFin. 
     In this embodiment, the first inductor L 1  and the second inductor L 2  are disposed in the single-end to dual-end amplifier circuit  130 . The single-end to dual-end amplifier circuit  130  further includes a third transistor M 3 , a fourth transistor M 4 , a fifth transistor M 5 , a sixth transistor M 6 , and a second capacitor C 2 . The third to the sixth transistors M 3 -M 6  respectively have a first end, a second end, and a control end. The control end of the third transistor M 3  is coupled to a constant voltage end Vconst. It should be noted that a voltage supplied by the constant voltage end Vconst is not a zero voltage (grounding voltage). The first end of the third transistor M 3  is coupled to the first differential output end LNAout_n. The control end of the fourth transistor M 4  is coupled to the second end of the third transistor M 3 . The first end of the fourth transistor M 4  is coupled to the second differential output end LNAout_p. The control end of the fifth transistor M 5  is coupled to the output end INVout of the inverting amplifier circuit  120 . The first end of the fifth transistor M 5  is coupled to the second end of the third transistor M 3 . The control end of the sixth transistor M 6  is coupled to the constant voltage end Vconst. The first end of the sixth transistor M 6  is coupled to the second end of the fourth transistor M 4 . The second end of the sixth transistor M 6  is coupled to the grounding voltage end VSS. The second capacitor C 2  is coupled between a coupling end point of the third transistor M 3  and the fifth transistor M 5  and the control end of the fourth transistor M 4 . 
     In addition, the single-end to dual-end amplifier circuit  130  further includes a third capacitor C 3  and a fourth capacitor C 4 . The third capacitor C 3  is serially connected between the control end of the third transistor M 3  and the grounding voltage end VSS, or the third capacitor C 3  is serially connected between the control end of the third transistor M 3  and the operating voltage receiving end VDD; and the fourth capacitor C 4  is serially connected between a coupling end point of the fourth transistor M 4  and the sixth transistor M 6  and the constant voltage end VSS, or the fourth capacitor C 4  is serially connected between the coupling end point of the fourth transistor M 4  and the sixth transistor M 6  and the operating voltage receiving end VDD. 
     Here, a detailed circuit of the mixer  140  is described. The first differential pair  150  of the mixer  140  includes a first differential transistor DM 1  and a second differential transistor DM 2 . The first differential transistor DM 1  and the second differential transistor DM 2  respectively have a first end, a second end, and a control end. The control end of the first differential transistor DM 1  receives the first signal LOP of the differential signal group. The first end of the first differential transistor DM 1  is coupled to the first differential output end LNAout_n. The second end of the first differential transistor DM 1  is coupled to the first mixing output end Output_n. The control end of the second differential transistor DM 2  receives the second signal LON of the differential signal group. The first end of the second differential transistor DM 2  is coupled to the first differential output end LNAout_n. The second end of the second differential transistor DM 2  is coupled to the second mixing output end Output_p, in which the first signal LOP and the second signal LON are differential signals for each other. In this embodiment, the first signal LOP and the second signal LON are signals with complementary phases. 
     The second differential pair  160  of the mixer  140  includes a third differential transistor DM 3  and a fourth differential transistor DM 4 . The third differential transistor DM 3  and the fourth differential transistor DM 4  respectively have a first end, a second end, and a control end. The control end of the third differential transistor DM 3  receives the second signal LON of the differential signal group. The first end of the third differential transistor DM 3  is coupled to the second differential output end LNAout_p. The second end of the third differential transistor DM 3  is coupled to the first mixing output end Output_n. The control end of the fourth differential transistor DM 4  receives the first signal LOP of the differential signal group. The first end of the fourth differential transistor DM 4  is coupled to the second differential output end LNAout_p. The second end of the fourth differential transistor DM 4  is coupled to the second mixing output end Output_p. 
     In this embodiment, the mixer  140  further includes a first load  155  and a second load  165 . The first load  155  is coupled between the first mixing output end Output_n and the grounding voltage end VSS. The second load  165  is coupled between the second mixing output end Output_p and the grounding voltage end VSS. 
       FIG. 2  is a circuit diagram of a radio frequency signal receiving device according to another embodiment of the present invention. Referring to  FIG. 2 , architecture of the radio frequency signal receiving device  200  is basically the same as the radio frequency signal receiving device  100 , except that the first load  155  may include a fifth capacitor C 5  and a first resistor R 1 , and the second load  165  includes a sixth capacitor C 6  and a second resistor R 2 . The fifth capacitor C 5  is coupled between the first mixing output end Output_n and the grounding voltage end VSS, and the first resistor R 1  is in parallel with the fifth capacitor C 5 . Similarly, the sixth capacitor C 6  is coupled between the second mixing output end Output_p and the grounding voltage end VSS, and the second resistor R 2  is in parallel with the sixth capacitor C 6 . 
     It should be noted that in the embodiment of the present invention, the first inductor L  1  is coupled to the common end of the first differential pair  150  through the first differential output end LNAout_n, and the second inductor L 2  is coupled to the common end of the second differential pair  160  through the second differential output end LNAout_p. That is to say, the LNA  110  and the mixer  140  are connected through a so-called DC coupled manner, in this manner, a capacitor component is not required between the LNA  110  and the mixer  140 . Further, through parasitic capacitance between the LNA  110  and the mixer  140 , and with a resonance action between the first inductor L 1  and the second inductor L 2 , flicker noises may be effectively reduced, and performance of the radio frequency signal receiving device may be improved. 
     In addition, the mixer  140  of the embodiment of the present invention is constructed by using a Gilbert-cell mixer circuit architecture, which has lower power consumption and high linearity. The mixer  140  may provide basic gain to compress the noise. 
     To sum up, in the present invention, the LNA is connected to the mixer in the DC coupling manner. Through resonance of the inductor on the LNA and the parasitic capacitance on the mixer, the flicker noises may be effectively reduced. In the present invention, an entity capacitor is not required to be disposed between the LNA and the mixer, so as to effectively reduce the area of the circuit. In the present invention, a voltage to current converter is not required to be configured in the mixer, so as to effectively reduce limit of the linearity and the power consumption. 
     The above description of the detailed embodiments are only to illustrate the preferred implementation according to the present invention, and it is not to limit the scope of the present invention, Accordingly, all modifications and variations completed by those with ordinary skill in the art should fall within the scope of the present invention defined by the appended claims.