Abstract:
An improved Monolithic Microwave Integrated Circuit DC-to-DC voltage converter fabricated in GaAs MESFET technology is introduced. The converter comprises a differential oscillator having crossed-coupled symmetrical inductors that ensure low-noise operation. The converter further comprises a highly-efficient synchronous rectifier and a start-up enable circuit.

Description:
FIELD OF THE INVENTION  
       [0001]     The present invention relates to DC-to-DC voltage conversion, and, more particularly, to a high-efficiency, low-noise DC-to-DC negative voltage converter that may be produced on a monolithic microwave integrated circuit (“MMIC”).  
       BACKGROUND OF THE INVENTION  
       [0002]     The past two decades have been characterized by the growth in popularity of hand-held communication devices operating at microwave frequencies. Typically, these devices are powered by a battery that provides only a positive DC voltage at a single voltage level. Since various circuit components require different voltage levels to function properly, DC-to-DC voltage converters are necessary for these devices.  
         [0003]     Presently, the technology of choice for hand-held communication devices is monolithic microwave integration. The best performance is obtained using Depletion-type Metal-Semiconductor Field Effect Transistors (“D-MESFETs”) on a Gallium-Arsenide (“GaAs”) substrate. The high current density and high breakdown voltage of a D-MESFET, coupled with the high electron mobility and high peak velocity of GaAs, translates into high-frequency operation ideal for communication circuits. A D-MESFET operates most efficiently with its source grounded, a positive voltage V DD  applied to its drain, and a negative bias voltage—V G  applied to its gate, as shown in  FIG. 1 . Further, a D-MESFET may be disabled or powered down—e.g., to save power and extend battery life—by making the magnitude of the negative bias voltage—V G  relatively large.  
         [0004]     Accordingly, DC/DC voltage converter circuits operable from a battery have been developed to provide such negative bias voltages. One such known D-MESFET/GaAs-based DC/DC converter is shown in  FIG. 2 . Converter  200  comprises: (1) differential oscillator  210 , which produces an AC voltage; and (2) rectifier  220 , which rectifies the produced AC voltage to a negative DC voltage V SS .  
         [0005]     Differential oscillator  210  comprises symmetric inductors L 1  and L 2 , capacitors C 1  and C 2 , and MESFET transistors M 1  and M 2 , connected in the well-known transistor astable multivibrator configuration. That is, the gate of transistor M 1  is coupled to the drain of M 2  through the capacitor C 1 , and, conversely, the gate of transistor M 2  is coupled to the drain of transistor M 1  through capacitor C 2 . The drains of transistors M 1  and M 2  are coupled to the supply voltage V GEN  through inductors L 1  and L 2 , respectively.  
         [0006]     Briefly, differential oscillator  210  operates by alternately switching transistors M 1  and M 2  “on” and “off”; the switching action occurs as a result of the interconnections between transistors M 1  and M 2  through capacitors C 1  and C 2 . Further detail on the operation of differential oscillator  210  is provided below. General background material about transistor astable multivibrators can be found in PAUL M. CHIRLIAN, A NALYSIS AND  D ESIGN OF  I NTEGRATED  E LECTRONIC  C IRCUITS  958-960 (2d ed. 1987).  
         [0007]     Rectifier  210  comprises diodes D 1  and D 2 , which are coupled to the gates of transistors M 1  and M 2 , respectively. Diodes D 1  and D 2 , in combination with the parasitic diodes that exist between the gate and source of each of transistors M 1  and M 2 , act as negative peak detectors that output the desired negative DC output voltage V SS . Capacitor C H  serves to stabilize voltage V SS .  
         [0008]     Although the above-described DC-to-DC converter is well-suited for use in certain applications, the present inventor has discovered a number of shortcomings in its design. First, symmetric inductors L 1  and L 2 , which are traditionally manufactured on the MMIC as single-plane, spiral-wound inductors, require a relatively large amount of die space on the integrated circuit. Second, the voltage drop across diodes D 1  and D 2  reduces the magnitude of the negative DC output voltage V SS  and thereby reduces the efficiency of the DC/DC voltage conversion. Third, it is possible for a positive voltage to build up across the load while converter  200  is powered off. Because diodes D 1  and D 2  are forward-biased under these circumstances, the positive voltage (minus the diode voltage drop) is transferred to the gates of transistors M 1  and M 2 , and may force transistors M 1  and M 2  into saturation. When converter  200  is subsequently powered on by the application of supply voltage V GEN , strong drain-source currents may be established in transistors M 1  and M 2 , and, as a result, oscillator  210  can fail to begin oscillating.  
       OBJECT OF THE INVENTION  
       [0009]     In light of the above-identified shortcomings of the prior art DC/DC voltage converter described above, one object of the invention is to provide a DC/DC converter having improved power efficiency and start-up reliability and requiring a reduced die area. Additional objects, advantages and novel features of the invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art or may be learned by practice of the invention.  
       SUMMARY OF THE INVENTION  
       [0010]     An improved MMIC DC-to-DC converter in accordance with the invention comprises a differential oscillator, a synchronous rectifier, and, preferably, a start-up circuit. The oscillator comprises first and second transistors capable of being coupled to a voltage supply through respective first and second inductors. These inductors are preferably cross-coupled, in order to increase the effective inductance of each inductor and thereby permit the use of smaller-valued inductors that may be manufactured in a smaller die area. The cross-coupling is preferably achieved by forming the first and second inductors as symmetrical, interleaved spiral inductors that are nearly identical in inductance value, so that a highly-balanced circuit results. In such a balanced circuit, the even-frequency components of the oscillator cancel out in the output voltage V SS , and the noise produced by the oscillator is thereby reduced.  
         [0011]     In order to improve the efficiency of the converter, the rectifier is preferably a synchronous rectifier comprising two MESFET transistors that operate synchronously with the oscillator to rectify each negative swing of the voltages presented by the oscillator. The transistors have a very small voltage drop across their drain-source junctions, and the efficiency of the conversion thereby is increased in comparison with the diode-based rectifier used in the prior art converter described above.  
         [0012]     The start-up problem referred to above is addressed by the addition of a start-up circuit at the output of the converter. In a preferred embodiment, the start-up circuit comprises a Schottky diode connected in parallel with the load. The voltage across the load is thereby prevented from increasing beyond the threshold voltage of the diode, and, in turn, the voltage at the gates of the first and second transistors of the oscillator is limited to a value that permits the successful start-up of the oscillator. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0013]     For a more complete understanding of the present invention reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:  
         [0014]      FIG. 1  illustrates a schematic circuit diagram of a D-MESFET;  
         [0015]      FIG. 2  shows a prior art MMIC DC-to-DC negative voltage converter;  
         [0016]      FIG. 3  illustrates an MMIC DC-to-DC negative voltage converter embodying the present invention; and  
         [0017]      FIG. 4  is an elevation view of the cross-coupled symmetrical inductors L 1  and L 2 . 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0018]     With reference to  FIG. 3 , a microwave DC-to-DC negative voltage converter  300  in accordance with the present invention comprises differential oscillator  310 , rectifier  320 , and startup circuit  330 . Differential oscillator  310 , like the prior art differential oscillator  210  described above, comprises inductors L 1  and L 2 , transistors M 1  and M 2 , and capacitors C 1  and C 2 , which are connected in the well-known transistor astable multivibrator configuration. In the present invention, however, inductors L 1  and L 2  are cross-coupled, interleaved spiral conductors of the type described in U.S. Pat. No. 5,892,425 to Kuhn et al. and shown in  FIG. 4 . The spiral conductors are arranged in the same plane on the substrate and connected to voltage supply V GEN  and transistors M 1  and M 2  in such a way that inductors L 1  and L 2  are mirror images of each other. This configuration allows nearly perfect symmetry of the two inductors, which enables such a highly-balanced circuit operation that even-order harmonic noise components produced by differential oscillator  310  cancel out. In addition, because of the cross-coupling, the effective inductance of each inductor is increased, and inductors L 1  and L 2  can have smaller values than those used in prior art voltage converters.  
         [0019]     Further as shown in  FIG. 3 , rectifier  320  is preferably a synchronous-type rectifier comprising rectifying transistors M 3  and M 4  and capacitors C 3 , C 4  and C H . Synchronous rectifiers generally are described, e.g., in U.S. Pat. Nos. 6,048,792, 5,787,336, and Re. 36,571. In accordance with the present invention, rectifier  320  is connected to differential oscillator  310  as follows: (1) the gate of rectifying transistor M 3  is coupled to the gate of transistor M 2  through DC blocking capacitor C 3 ; (2) the gate of rectifying transistor M 4  is coupled to the gate of transistor M 1  through DC blocking capacitor C 4 ; (3) the drain of rectifying transistor M 3  is coupled to the gate of transistor M 1 ; and (4) the drain of transistor M 4  is coupled to the gate of transistor M 2 . In addition, the sources of transistors M 3  and M 4  are connected together at output node  340 , from which capacitor C H  is connected to ground.  
         [0020]     Rectifier  320  operates in conjunction with differential oscillator  310  in the following fashion. When supply voltage V GEN  is initially applied, current begins to flow from voltage supply V GEN  through the two branches of differential oscillator  310 —one branch formed by inductor L 1  and transistor M 1  and a second branch formed by inductor L 2  and transistor M 2 . Because inductors L 1  and L 2  are preferably quite small, the voltages at the drain of transistors M 1  and M 2  (V DS1  and V DS2 , respectively) rise rapidly from ground potential toward voltage V GEN . These rapidly-increasing voltages pass through capacitors C 1  and C 2 , thus also increasing the voltages at the gates of transistors M 1  and M 2  (V GS1  and V GS2 ). Transistors M 1  and M 2  correspondingly become more conductive (from drain-to-source). Their drain-source voltages (V DS1  and V DS2 ) correspondingly decrease, and, because the gate of each one is connected to the drain of the other via a capacitor (viz., capacitors C 1  and C 2 ), gate voltages V GS1  and V GS2  correspondingly decrease. Thus, for a brief instant of time, the circuit reaches a tenuous initial equilibrium operating point.  
         [0021]     But this equilibrium is easily disturbed by, e.g., initial voltages or other electrical noise. The current through one branch inevitably becomes larger than that in the other branch, and the circuit begins to oscillate. For example, assume that the current through inductor L 1  and transistor M 1  increases relative to that through inductor L 2  and transistor M 2 , thereby decreasing the voltage at the drain of transistor M 1  (V DS1 ). The negative fluctuation in voltage V DS1  in turn passes through (and negatively charges) capacitor C 2 , thereby lowering (and, indeed, forcing negative) the gate-source voltage of transistor M 2  (V GS2 ). As transistor M 2  becomes correspondingly less conductive, the voltage at the drain of transistor M 2  (V DS2 ) increases. This positive fluctuation in voltage V DS2  likewise passes (and positively charges) capacitor C 1  and increases voltage V GS1 . In turn, the current through inductor L 1  and transistor M 1  increases still further. This positive cycle continues until transistor M 1  is saturated and transistor M 2  is pinched-off.  
         [0022]     Meanwhile, the fluctuations in the voltages at the gates of transistors M 1  and M 2  (V GS1  and V GS2 ) also pass through capacitors C 3  and C 4  to the gates of rectifying transistors M 3  and M 4 . Thus, the voltage at the gate of transistor M 3  (V GS3 ) becomes negative, pinching-off transistor M 3 , while the voltage at the gate of transistor M 4  (V GS4 ) becomes positive, saturating transistor M 4 . Because voltage V GS2  is negative, a negative current is caused to flow from ground through the load resistance R L  (and also through capacitor CH) and via transistor M 4  to the gate of transistor M 2 . This current positively charges capacitor C 2 , raising voltage V GS2  until transistor M 2  is no longer pinched-off.  
         [0023]     At this point, the oscillator “flips,” and the sequence described above is reversed. As transistor M 2  begins to conduct, and as its drain-source voltage (V DS2 ) decreases, the decrease in voltage V DS2  passes through capacitor C 1 , thereby reducing the gate voltage of transistor M 1  (V GS1 ). As before, as transistor M 1  becomes correspondingly less conductive, the voltage at the drain of transistor M 1  (V DS1 ) increases. This positive fluctuation in voltage V DS1  likewise passes (and further positively charges) capacitor C 2  and further increases voltage V GS2 . In turn, the current through inductor L 2  and transistor M 2  increases still further, until transistor M 2  is saturated and transistor M 1  is pinched-off by a negative gate-source voltage. The voltage at the gate of rectifying transistor M 3  (V GS3 ) becomes positive, causing transistor M 3  to conduct, while that at the gate of rectifying transistor M 4  (V GS4 ) becomes negative, pinching it off. Finally, negative current flows through load R L  and via transistor M 3  to the gate of transistor M 1 , raising voltage V GS1  until the oscillator flips once more, and the cycle repeats.  
         [0024]     The frequency of oscillation of differential oscillator  310  is governed by the values of inductors L 1  and L 2  and capacitors C 1  and C 2 , as well as the parasitic gate-source and drain-source capacitances of transistors M 1  and M 2 . For sufficiently small values, the frequency of oscillation can be extremely high; the oscillator has successfully been tested at about 4 GHz. The present invention is thus well-suited to applications, such as radio-frequency (“RF”) transmission, in which such high frequencies of operation are needed in order to minimize noise within the RF communication bands.  
         [0025]     Those of skill in the art will recognize that the voltage generated by converter  300  can be varied by varying the size of inductors L 1  and L 2 , since they serve as “boost” inductors in the present invention. The currents flowing through inductors L 1  and L 2  lag the pinch-off of transistors M 1  and M 2 —i.e., currents continue to flow through inductors L 1  and L 2  after their respective transistors cease to conduct. This continued current flow causes voltages V DS1  and V DS2  to be boosted above V GEN  by a factor of two or more. For example, if voltage V GEN  is three volts, voltages V DS1  and V DS2  will swing from zero volts up to about six volts, or even higher.  
         [0026]     Those of skill in the art will also recognize that the preferred embodiment of converter  300  described above, wherein rectifier  320  is a synchronous rectifier, is significantly more efficient than prior art converters, since the voltage drop across rectifying transistors M 3  and M 4  is extremely small, especially in comparison with that of the diode-based rectifier of the prior art converter shown in  FIG. 2 .  
         [0027]     In a preferred embodiment, transistors M 1  and M 2  are MESFETs, which have a parasitic diode from the gate of each transistor to its source. The two parasitic diodes serve two functions. First, they provide over-voltage protection on the gates. Second, they establish an upper limit to voltages V GS1  and V GS2  of one diode drop (or 0.7 volts, for a GaAs-D-MESFET), which serves as a boundary condition for voltages V GS1  and V GS2 . For example, if voltages V DS1  and V DS2  swing from six volts to zero volts (i.e., six volts AC, peak-to-peak), voltages V GS1  and V GS2  will go from about 0.7 volts down to about −5.3 volts. If such voltages are then rectified by rectifier  320 , the output voltage V SS  may be as low as, e.g., 4.5 volts.  
         [0028]     In another preferred embodiment, a start-up circuit  330  is added to prevent any positive voltage from building up across the load resistance R L . Without this circuit, a large positive voltage can build up and place transistors M 1  and M 2  into saturation. The inventor has found that, under such a circumstance, oscillator  310  will fail to start oscillating. Start-up circuit  330  may comprise diode D 3 , as shown in  FIG. 3 , or any other voltage-limiting component or circuit. Although start-up circuit  330  has here been described in connection with converter  300 , it will be recognized that it may also be applied to other converters, such as prior art converter  200 .  
         [0029]     It will also be recognized that the present invention is not limited to use with MESFETs, but rather may be implemented via other types of transistors, including but not limited to JFETs, MOSFETs, BJTs, HBTs, and PHEMTs.  
         [0030]     It is further understood that the embodiments described herein are merely illustrative and are not intended to limit the scope of the invention. One skilled in the art may make various changes, rearrangements and modifications to the illustrative embodiments described above without substantially departing from the principles of the invention, which is limited only in accordance with the claims. Accordingly, all such deviations and departures should be interpreted to be the spirit and scope of the following claims.