Abstract:
A system and method for suppressing spurious signal leakage in a mobile terminal antenna interface without degrading switch linearity or system insertion loss is disclosed. The antenna interface includes an antenna port, a receive port, a transmit port, and a plurality of switch modes, that may include a receive mode, a transmit mode, and a special isolation mode. To suppress spurious signal leakage from high band transmit and receive ports, a switching mechanism is employed to isolate the receive port from the antenna port in high band transmit mode, and to isolate the transmit port from the antenna port in high band receive mode. A special isolation mode allows simultaneous isolation of the high band transmit and receive ports from the antenna port in low band transmit and receive modes. DC current control circuitry is optionally employed to reduce current drain in transmit and special isolation modes, extending battery life.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    Several acronyms are used throughout the text and are presented in TABLE 1 below for ease of reference.  
                           TABLE 1                                   ACRONYM   DEFINITION                           AMPS   Advanced Mobile Phone Service           ANT   Antenna           ASIC   Application-Specific Integrated Circuit           BJT   Bipolar Junction Transistor           DAMPS   Digital Advanced Mobile Phone Service               (see TDMA)           EDGE   Enhanced Data-rates for GSM/Global Evolution           FCC   Federal Communications Commission           FET   Field-Effect Transistor           GAIT   GSM ANSI-136 Interoperability Team           GPRS   General Packet Radio Service           GSM   Global System for Mobile communications           HB   High Band           LB   Low Band           LNA   Low Noise Amplifier           LO   Local Oscillator           PHEMT   Pseudomorphic High Electron Mobility Transistor           PIN   P-type-Insulator-N-type           RF   Radio Frequency           RX   Receive           SPDT   Single-Pole Double-Throw           TDMA   Time Division/Domain Multiple Access               (see DAMPS)           T/R   Transmit/Receive Switch           TX   Transmit           VCO   Voltage-Controlled Oscillator                      
 
           [0002]    GAIT (GSM ANSI-136 Interoperability Team) is a telecommunications industry working group whose mission is to develop standards to facilitate mobile terminal (i.e. cell phone) roaming among different mobile network technologies. GAIT mobile terminals are dual-band, tri-mode devices that allow users to roam on different network technologies using the same mobile terminal. GAIT mobile terminals can operate in AMPS, TDMA/DAMPS and GSM/GPRS modes in the 850 MHz band, and in TDMA/DAMPS or GSM/GPRS modes in the 1900 MHz band. DAMPS and TDMA refer to the same air interface standard.  
           [0003]    The FCC promulgates standards with respect to spurious output signals emitted from mobile terminals. Spurious signal leakage is a form of radio frequency (RF) interference that occurs when signals other than the desired signal escape through a mobile terminal antenna port. The FCC standards ensure that unacceptable levels of RF interference are not emitted from a mobile terminal. As antenna interface switching within a mobile terminal becomes more complex (i.e. includes a greater number of ports), suppression of spurious output signals becomes increasingly difficult.  
           [0004]    TDMA/DAMPS based prior art typically addressed spurious signal leakage problems by selectively placing a FET based switching system in a state that will suppress the spurious signal amplitude. Given a system with an RX to ANT isolation issue, the prior art solution would set the switch in a TX to ANT mode. This action isolates the RX and ANT ports but effectively closes the TX to ANT path. Simultaneous TX to ANT and RX to ANT isolation, however, was not achieved. In addition to isolation issues, linearity is also a concern. TDMA/DAMPS based prior art methods are unsatisfactory in a superheterodyne receiver-based GAIT mobile terminal, because the GSM TX mode has significantly higher harmonic suppression requirements than does TDMA/DAMPS, and thus requires superior switch linearity. Yet, present FET based switch systems do not have the required linearity margin.  
           [0005]    What is needed is a system and method of suppressing spurious output signals without the usual system insertion loss or linearity issues.  
         SUMMARY  
         [0006]    The present invention is a system and method of suppressing spurious output signals in a mobile terminal, without significantly degrading switch linearity or system insertion loss in the mobile terminal within the mobile terminal, there is an antenna interface that includes an antenna port, a receive port, a transmit port. The present invention further includes a plurality of switch modes such as a receive mode, a transmit mode, and a special isolation mode. To suppress spurious signal leakage from the high band transmit port and receive port, a switching mechanism is employed to isolate the receive port from the antenna port while the mobile terminal is in high band transmit mode. The switching mechanism is similarly used to isolate the transmit port from the antenna port while the mobile terminal is in high band receive mode. A special isolation mode allows simultaneous isolation of the high band transmit and receive ports from the antenna port while the mobile terminal is in low band transmit and receive modes. As an additional feature, DC current control circuitry can be optionally employed to reduce the current drain while the mobile terminal is in transmit and/or special isolation modes, thereby extending battery life.  
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0007]    [0007]FIG. 1 illustrates a prior art GSM PIN diode single-pole double-throw T/R switch.  
         [0008]    [0008]FIG. 2 illustrates PIN diode switch circuitry with special isolation mode circuitry and DC current control circuitry used for suppressing spurious signal leakage in a mobile terminal.  
         [0009]    [0009]FIG. 3 illustrates PIN diode switch circuitry with special isolation mode circuitry and DC current control circuitry used for suppressing spurious signal leakage and reducing current drain in a mobile terminal.  
         [0010]    [0010]FIG. 4 illustrates a block diagram of PIN diode switch circuitry with special isolation mode circuitry and optional DC current control circuitry used for suppressing spurious signal leakage and reducing current drain in a mobile terminal.  
         [0011]    [0011]FIG. 5 illustrates a block diagram of hybrid PIN diode and FET switch circuitry with special isolation mode circuitry and optional DC current control circuitry used for suppressing spurious signal leakage and reducing current drain in a mobile terminal.  
         [0012]    [0012]FIG. 6 illustrates hybrid PIN diode and FET switch circuitry with special isolation mode circuitry, DC current control circuitry, and a shunt transistor array, used for suppressing spurious signal leakage and reducing current drain in a mobile terminal.  
         [0013]    [0013]FIG. 7 illustrates one embodiment of a shunt transistor array.  
         [0014]    [0014]FIG. 8 illustrates PIN diode switch circuitry with alternate special isolation mode circuitry used for suppressing spurious signal leakage in a mobile terminal. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0015]    In a typical TDMA/DAMPS dual band antenna interface system within a mobile terminal, the high band switch is a FET or PHEMT device, while the low band section is a duplexer. A typical TDMA/DAMPS receiver architecture includes a superheterodyne receiver and a low band (LB) voltage controlled lo oscillator (VCO)/high band (HB) local oscillator doubler. With such an architecture, low band operation (850 MHz) may allow spurious high band (1900 MHz) local oscillator (LO) signals to escape or “leak” via the antenna interface high band transmit (TX) and/or receive (RX) ports. The most likely spurious signal leakage path during low band operation leads from the high band RX port to the antenna port.  
         [0016]    While operating in low band mode, the TDMA/DAMPS prior art solution was to place the high band switch in the transmit mode, effectively isolating the high band RX to ANT path and attenuating any conducted spurious output signals from the high band RX port. However, this solution presents two problems. First, any spurious signals at the TX port will transfer to the antenna port, making circuit board layout critical. This problem exists when the prior art solution is applied to any TDMA/DAMPS receiver architecture (superheterodyne receiver and a low band VCO/high band local oscillator doubler).  
         [0017]    The second problem is specific to GAIT mobile terminals (i.e. TDMA/DAMPS and GSM combined into a single mobile terminal). GSM terminals can not use FET or PHEMT devices for the high band switch, because GSM has more stringent transmitter harmonic suppression requirements than TDMA/DAMPS. Therefore, GSM switches utilize a PIN diode based antenna interface. PIN diodes exhibit superior linearity in comparison to FET or PHEMT switch types, which is important for controlling TX harmonic levels. Thus, the TDMA/DAMPS prior art solution is not feasible in a GAIT mobile terminal. Further, PIN diodes require 8-10 mA of DC current in transmit mode. Throwing the high band switch into TX mode during low band operation significantly reduces the low band mode battery life of the mobile terminal.  
         [0018]    The present invention overcomes prior art deficiencies and facilitates the integration of a TDMA/DAMPS receiver architecture into a modified GSM antenna interface. Prior art GSM type architectures typically do not use a LB VCO/HB doubler, and thus do not have the problem of the 850 MHz signal leakage from the high band RX path. Since a GAIT terminal must operate in a GSM mode as well as a TDMA/DAMPS mode, combining the GSM PIN diode antenna interface with a TDMA/DAMPS type receiver is an economical solution. However, this results in the spurious signal emissions discussed above.  
         [0019]    The FCC limits spurious emission levels in the 1900 MHz band to a signal amplitude of −57 dBm at the antenna. If the worst case antenna interface to high band LNA input port insertion loss is 2 dB, the spurious signal at the high band LNA input must be no higher than −55 dBm. If the maximum low band VCO input level is +1 dBm, the total low band VCO input to high band LNA input isolation requirement is 56 dB, which is difficult to achieve with present ASIC technology and will worsen as ASIC die sizes decrease. When operating a mobile terminal at approximately 2 GHz, 40 dB of ASIC isolation is typical. The ASIC isolation is limited by substrate leakage and finite circuit to circuit isolation. Thus, the antenna interface must provide at least 16dB of isolation help to achieve the 56 dB LNA input isolation goal.  
         [0020]    A typical prior art GSM PIN diode SPDT (single-pole double-throw) switch used for suppressing spurious signal leakage is shown in FIG. 1. When V control    102  is low, the PIN diode switch circuitry is in receive mode. The PIN diodes D 1   104  and D 2   106  are off; therefore zero DC bias current flows through the PIN diode switch. In the off state, the PIN diode equivalent model is a high value resistance in parallel with a shunt capacitance. Capacitor C 1   108 , transmission line TRL- 1   110 , capacitor C 3   112 , inductor L 1   114 , and D 1   104  appear as a high-impedance circuit at the network junction of C 4   116 , L 1   114 , and TRL- 2   118 . This allows signals to travel from the ANT  120  port to the RX port  122  with minimum attenuation, while maintaining a high level of TX port  124  to ANT port  122  isolation help, on the order of 20-25 dB.  
         [0021]    When V control    102  is high, the PIN diode switch circuitry is in transmit mode. The PIN diodes D 1   104  and D 2   106  are on, and approximately 8 mA of current is required to satisfy the GSM mode linearity requirements. In this state, the PIN diode equivalent model appears as an inductance in series with a low value resistance. Thus, the network junction of TRL- 2   118 , C 5   126 , and D 2   106  is a short. Since the TRL- 2  transmission line  118  is a quarter wavelength at the frequency of operation, the path from TRL- 2   118  to ground appears to be a very high impedance from the TX perspective. This allows signals to travel from the TX port  124  to the ANT port  120  with minimum attenuation, while maintaining high ANT port  120  to RX port  122  isolation help (20-25 dB).  
         [0022]    Thus, the prior art GSM/PIN diode switch solution may be used to isolate the high band RX to ANT path and attenuate the spurious output signals in a GAIT mobile terminal. However, board layout is critical with this solution, as any spurious signals at the TX port will still transfer to the antenna port. The problem is that first-generation GAIT mobile terminals will look like a marriage of two separate architectures (GSM and TDMA/DAMPS), making board layout very dense and increasing the probability of multiple leakage paths. Another problem is the increased DC current necessitated by the use of PIN diodes, which significantly reduces low band battery life.  
         [0023]    The present invention addresses both of these problems in GAIT mobile terminals. The present invention comprises three main circuit elements: PIN diode switch circuitry  202 , isolation block circuitry  204 , and DC current control block circuitry  206 .  
         [0024]    [0024]FIG. 2 illustrates one embodiment of the present invention. The PIN diode switch circuitry  202  comprises the following elements: capacitors C 1   208 , C 2   210 , C 3   212 , C 4   214 , and C 5   216 , inductor L 1   218 , resistor R 1   220 , transmission lines TRL- 1   222  and TRL- 2   224 , and PIN diodes D 1   226  and D 2   228 . The isolation block circuitry  204  comprises the following elements: transistor Q 1   230 , resistor R 2   232 , inductor L 2   234 , and capacitors C 6   236  and C 7   238 . The DC current control block circuitry  206  comprises the following elements: transistor Q 2   240 , resistors R 3   242 , R 4   244 , and R 5   246 , and capacitors C 8   248  and C 9   250 . An operation mode truth table for FIG. 2 is listed below.  
                                                       SWITCH MODE   V control 1   V control 2                           Receive (RX)   0   1           Transmit (TX)   1   1           Special Isolation   0   0                      
 
         [0025]    When the mobile terminal is in receive mode, V control   1   252 , which controls the states of PIN diodes D 1   226  and D 2   228  and transistor Q 2   240 , is low and V control   2   254 , which controls the states of PIN diode D 2   228  and transistor Q 1   230 , is high. Both PIN diodes D 1   226  and D 2   228  are off. Capacitor C 1   208 , transmission line TRL- 1   222 , capacitor C 3   212 , inductor L 1   218 , and D 1   226  appear as a high-impedance circuit at the network junction of C 4   214 , L 1   218 , and TRL- 2   224 . This allows signals to travel from the ANT port  256  to the RX port  258  with minimum attenuation, while maintaining high TX port  260  to ANT port  256  isolation help (20-25 dB). In this mode, a DC bias condition does not exist. Transistor Q 1   230  is an enhancement mode “p” channel FET. When the gate-source voltage for Q 1   230  is greater than or equal to 0 V dc  (i.e. when V control   2   254  is high), Q 1   230  is off, allowing only miniscule amounts of leakage current to flow. Transistor Q 2   240  is also off. The DC current return path is through D 2   228  and R 5   246 . As the D 2   228  leakage current increases, the RX path insertion loss similarly increases. Because the base leakage current in a bipolar transistor device (BJT) is relatively high in comparison to a FET, a BJT is not suitable for Q 1   230 .  
         [0026]    When the mobile terminal is in transmit mode, V control   1   252  is high and V control   2   254  is high. Both PIN diodes D 1   226  and D 2   228  are on. Since the TRL- 2  transmission line  224  is a quarter wavelength at the frequency of operation, the path from TRL- 2   224  to ground (through D 2   228 ) appears to be a very high impedance from the TX perspective. This allows signals to travel from the TX port  260  to the ANT port  256  with minimum attenuation, while maintaining high ANT port  256  to RX port  258  isolation help (20-25 dB). Transistor Q 2   240  is an enhancement mode “n” channel FET. When the gate-source voltage for Q 2   240  is greater than or equal to 0 V dc  (i.e. when V control   1   252  is high), the device is on, while Q 1   230  is off. This allows the DC current return path to pass through R 1   220 , TRL- 1   222 , D 1   226 , TRL- 2   224 , D 2   228 , R 4   244 , and Q 2   240 . Since R 4   244  is parallel to R 5   246  when Q 2   240  is on, and R 4 &lt;&lt;R 5 , R 4   244  sets the TX mode DC current requirement. The isolation block circuitry  204  is also important in TX mode, because if the Q 1   230  leakage current is high, the bias current through D 1   226  may be split between Q 1   230  (through L 2   234 ) and D 2   228 . This would result in a low D 2  is  228  bias current condition, causing higher TX path loss, increased levels of TX harmonics, and reduced ANT port  256  to RX port  258  isolation help in TX mode. This is another reason why a FET device (as opposed to a bipolar device) is required for Q 1   230 .  
         [0027]    When the mobile terminal is in special isolation mode, V control   1   252  is low and V control   2  is low  254 . Thus, Q 1   230  is on and Q 2   240  is off. Also, PIN diode D 1   226  is off and D 2   228  is on. Current flows from the DC source  262  through Q 1   230 , L 2   234 , D 2   228 , and returns to ground through R 5   246 . Thus, R 5   246  sets the special isolation mode DC current requirement. The DC current in special isolation mode is typically 2 mA, which is significantly below the 8-10 mA TX mode current requirement in GSM applications. Also, both TX port  260  to ANT port  256  and RX port  258  to ANT port  256  isolation is simultaneously optimized in special isolation mode.  
         [0028]    An alternative embodiment is illustrated in FIG. 3, and is comprised of PIN diode switch circuitry  302 , isolation block circuitry  304 , and DC current control block circuitry  306 . The PIN diode switch circuitry  302  comprises the following elements: capacitors C 1   308 , C 2   310 , C 3   312 , C 4   314 , and C 5   316 , inductor L 1   318 , resistor R 1   320 , transmission lines TRL- 1   322  and TRL- 2   324 , and PIN diodes D 1   326  and D 2   328 . The isolation block circuitry  304  comprises the following elements: transistor Q 1   330 , resistor R 2   332 , inductor L 2   334 , and capacitors C 6   336  and C 7   338 . The DC current control block circuitry  306  comprises the following elements: transistors Q 2   340  and Q 3   342 , resistors R 3   344 , R 4   346 , R 5   348 , R 6   350 , and R 7   352 , and capacitors C 8   354 , and C 9   356 . An operation mode truth table for FIG. 3 is listed below.  
                                                                       DC Current           SWITCH MODE   V control 1   V control 2   Control Input                           Receive (RX)   0   1   0           Transmit (TX)   1   1   0 for low current;                       1 for high current           Special Isolation   0   0   0                      
 
         [0029]    When the mobile terminal is in receive mode, V control   1   358  is low and V control   2   360  is high. Both PIN diodes D 1   326  and D 2   328  are off. Capacitor C 1   308 , TRL- 1   322 , C 3   312 , L 1   318 , and D 1   326  appear as a high-impedance circuit at the network junction of C 4   314 , L 1   318 , and TRL- 2   324 . This allows signals to travel from the ANT port  362  to the RX port  364  with minimum attenuation, while maintaining high TX port  366  to ANT port  362  isolation help (20-25 dB). In receive mode, a DC bias condition does not exist.  
         [0030]    When the mobile terminal is in transmit mode, V control   1   358  is high and V Control   2   360  is high. Both PIN diodes D 1   326  and D 2   328  are on. Since the TRL- 2  transmission line  324  is a quarter wavelength at the frequency of operation, the path from TRL- 2   324  to ground appears to be a very high impedance from the TX perspective. This allows signals to travel from the TX port  366  to the ANT port  362  with minimum attenuation, while maintaining high ANT port  362  to RX port  364  isolation help (20-25 dB). DC current flows through TRL- 2   324  and D 2   326 , and returns to ground through the current control block circuitry  306 . The DC current control input  368  allows multiple transmit mode DC current states. A “low” at DC current control input  368  will bias the D 1  PIN diode  326  in a low current TX mode. This selection trades off linearity for lower DC current. The DC current is typically lowered to 5 mA, which is significantly below the 8-10 mA transmit mode current requirement in GSM applications. Likewise, a “high” at the DC current control input  368  will bias the D 1  PIN diode  326  in a high current mode. The linearity will improve at the expense of increased DC current.  
         [0031]    When the mobile terminal is in special isolation mode, V control   1   358  is low and V control   2   360  is low. PIN diode D 1   326  is off and D 2   328  is on. Current flows from the DC source  370  through the isolation block circuitry  304  and D 2   328 , and returns to ground through the DC current control block circuitry  306 . The DC current control input  368  is “low” in this mode to lower the DC current and extend battery life. Also, both TX port  366  to ANT port  362  and RX port  364  to ANT port  362  isolation is simultaneously optimized in special isolation mode.  
         [0032]    Another alternative embodiment is illustrated in FIG. 4, and is comprised of a PIN diode switch circuitry  402 , isolation block circuitry  404 , and DC current control block circuitry  406 . The PIN diode switch circuitry  402  comprises the following elements: capacitors C 1   408 , C 2   410 , and C 3   412 , transmission line TRL- 2   414 , and PIN diodes S 1   416  and S 2   418 . The isolation block circuitry  404  comprises any combination of network elements that function to isolate the RX port from the TX port and the ANT port in special isolation mode. The DC current control block circuitry  406  comprises any combination of network elements that function to select the DC current in transmit mode and limit the DC current in special isolation mode. An operation mode truth table for FIG. 4 is listed below.  
                                                                       DC Current           SWITCH MODE   V control 1   V control 2   Control Input                           Receive (RX)   0   1   0           Transmit (TX)   1   1   0 for low current;                       1 for high current           Special Isolation   0   0   0                      
 
         [0033]    When the mobile terminal is in receive mode, V control   1   420  is low and V control   2   422  is high. Both PIN diodes S 1   416  and S 2   418  are off. This allows signals to travel from the ANT port  424  to the RX port  426  with minimum attenuation, while maintaining high TX port  428  to ANT port  424  isolation help (20-25 dB). A DC bias condition does not exist in receive mode.  
         [0034]    When the mobile terminal is in transmit mode, V control   1   420  is high and V control   2   422  is high. Both PIN diodes S 1   416  and S 2   418  are on. Since the TRL- 2  transmission line  414  is a quarter wavelength at the frequency of operation, the path from TRL- 2   414  to ground (through S 2   418  and the current control block  406 ) appears to be a very high impedance from the TX perspective. This allows signals to travel from the TX port  428  to the ANT port  424  with minimum attenuation, while maintaining high ANT port  424  to RX port  426  isolation help (20-25 dB). DC current flows through TRL- 2   414  and S 2   418 , and returns to ground through the current control block circuitry  406 . The DC current control input  430  allows multiple transmit mode DC current states. A “low” at DC current control input  430  will bias the S 1  PIN diode  416  in a low current mode. This selection trades off linearity for lower DC current. The DC current is typically lowered to 5 mA, which is significantly below the 8-10 mA transmit mode current requirement in GSM applications. Likewise, a “high” at the DC current control input  430  will bias the S 1  PIN diode  416  in a high current mode. The linearity will improve at the expense of increased DC current. Note that the DC current control block circuitry  406  is optional in this embodiment; it may be deleted entirely if current savings are not desired.  
         [0035]    When the mobile terminal is in special isolation mode, V control   1   420  is low and V control   2   422  is low. PIN diode S 1   416  is off and S 2   418  is on. Current flows from the DC source  432  through the isolation block circuitry  404  and S 2   418 , and returns to ground through the (optional) DC current control block circuitry  406 . The DC current control input  430  is “low” in this mode to lower the DC current and extend battery life. Also, both TX port  428  to ANT port  424  and RX port  426  to ANT port  424  isolation is simultaneously optimized in special isolation mode.  
         [0036]    Another embodiment of the invention is illustrated in FIG. 5, and is comprised of SPDT switch circuitry  502 , isolation block circuitry  504 , and optional DC current control block circuitry  506 . This embodiment combines the prior art PIN diode solution with traditional transistor based switching to form a “hybrid” solution. The SPDT switch circuitry  502  comprises the following elements: capacitors C 1   508 , C 2   510 , C 3   512 , and C 4   514 , transmission line TRL- 2   516 , PIN diode S 1   518 , and FET S 2   520 . The isolation block circuitry  504  comprises any combination of network elements that function to isolate the RX port from the TX port and the ANT port in special isolation mode. The DC current control block circuitry  506  comprises any combination of network elements that function to set the DC current in transmit mode. An operation mode truth table for FIG. 5 is listed below.  
                                                                       DC Current           SWITCH MODE   V control 1   V control 2   Control Input                           Receive (RX)   0   1   0           Transmit (TX)   1   1   0 for low current;                       1 for high current           Special Isolation   0   0   0                      
 
         [0037]    When the mobile terminal is in receive mode, V control   1   522  is low and V control   2   524  is high. Both S 1   518  and S 2   520  are off. This allows signals to travel from the ANT port  526  to the RX port  528  with minimum attenuation, while maintaining high TX port  530  to ANT port  526  isolation help (20-25 dB). A DC bias condition does not exist in receive mode.  
         [0038]    When the mobile terminal is in transmit mode, V control   1   522  is high and V control   2   524  is high. Both S 1   518  and S 2   520  are on. Since the TRL- 2  transmission line  516  is a quarter wavelength at the frequency of operation, the path from TRL- 2   516  to ground (through S 2   520 ) appears to be a very high impedance from the TX perspective. This allows signals to travel from the TX port  530  to the ANT port  526  with minimum attenuation, while maintaining high ANT port  526  to RX port  528  isolation help (20-25 dB). DC current flows through S 1   518 , and returns to ground through the current control block circuitry  506 . The DC current control input  532  allows multiple transmit mode DC current states. A “low” at DC current control input  532  will bias the S 1  PIN diode  518  in a low current mode. This selection trades off linearity for lower DC current. The DC current is typically lowered to 5 mA, which is significantly below the 8-10 mA transmit mode current requirement in GSM applications. Likewise, a “high” at the DC current control input  532  will bias the S 1  PIN diode  518  in a high current mode. The linearity will improve at the expense of increased DC current. Note that the DC current control block  506  is optional in this embodiment; it may be deleted entirely if current savings are not desired.  
         [0039]    When the mobile terminal is in special isolation mode, V control   1   522  is low and V control   2   524  is low. PIN diode S 1   518  is off and FET S 2   520  is on. Current flows from the DC source  534  through the isolation  504  and returns to ground through S 2   520 . Also, both TX port  530  to ANT port  526  and RX port  528  to ANT port  526  isolation is simultaneously optimized.  
         [0040]    An alternative embodiment of the “hybrid” solution is illustrated in FIG. 6. This embodiment is comprised of SPDT switch circuitry  602 , isolation block circuitry  604 , DC current control block circuitry  606 , and a shunt transistor array  608 , which varies the impedance to ground. The SPDT switch circuitry comprises the following elements: capacitors C 1   610 , C 2   612 , C 3   614 , C 4   616 , C 5   618 , and C 10   620 , resistor R 1   622 , inductor L 1   624 , transmission lines TRL- 1   626  and TRL- 2   628 , PIN diode D 1   630 , and the shunt transistor array  608 . FIG. 7 illustrates a possible shunt transistor array. Transistor Q 10 ,  702  resistor R 10   704 , and the “parasitic comp” network  706  define the shunt switching core. Resistor R 20   708 , capacitor C 10   710 , and inductor L 10   712  are a high RF impedance DC power source.  
         [0041]    With respect to FIG. 6, the isolation block circuitry  604  comprises the following elements: transistor Q 1   632 , inductor L 2   634 , resistor R 2   636 , and capacitors C 6   638  and C 7   640 . The DC current control block circuitry  606  comprises the following elements: transistor Q 2   642 , resistors R 3   644 , R 4   646 , and R 5   648 , capacitors C 8   650  and C 9   652 , and inductor L 3   654 . An operation mode truth table for FIG. 6 is listed below.  
                                                                       DC Current           SWITCH MODE   V control 1   V control 2   Control Input                           Receive (RX)   0   1   0           Transmit (TX)   1   1   0 for low current;                       1 for high current           Special Isolation   0   0   0                      
 
         [0042]    When the mobile terminal is in receive mode, V control   1   656  is low and V control   2   658  is high. PIN diode D 1   630  is off. The shunt transistor array  608  is also “off.” In this state, the “parasitic comp network” maximizes the shunt transistor array “off” state impedance. This high impedance allows signals to travel from the ANT port  660  to the RX  662  port with minimum attenuation, while maintaining high TX port  664  to ANT port  660  isolation (20-25 dB). The “off” state impedance maximization is achieved via parallel resonance. In receive mode, a DC bias condition does not exist.  
         [0043]    When the mobile terminal is in transmit mode, V control   1   656  is high and V control   2   658  is high. Both PIN diode D 1   630  and the shunt transistor array  608  are “on.” In the “on” state, the shunt switching core can be paralleled for lower resistance (multiple devices in parallel), which improves the isolation performance. Since the TRL- 2  transmission line  628  is a quarter wavelength at the frequency of operation, the path from TRL- 2   628  to ground (through the shunt transistor array  608 ) appears to be a very high impedance from the TX perspective. This allows signals to travel from the TX port  664  to the ANT port  660  with minimum attenuation, while maintaining high ANT port  660  to RX port  662  isolation help (20-25 dB). DC current returns to ground through R 1   622 , TRL- 1   626 , D 1   630 , L 3   654 , R 4   646 , and Q 2   642 . The DC current control input  667  allows multiple transmit mode DC current states. A “low” at DC current control input  667  will bias the D 1   630  PIN diode in a low current mode. This selection trades off linearity for lower DC current. The DC current is typically lowered to 5 mA, which is significantly below the 8-10 mA transmit mode current requirement in GSM applications. Likewise, a “high” at the DC current control input  667  will bias the D 1  PIN diode  630  in a high current mode. The linearity will improve at the expense of increased DC current.  
         [0044]    When the mobile terminal is in special isolation mode, V control   1   656  is low and V control   2   658  is low. PIN diode D 1   630  is off and the shunt transistor array  608  is “on.” In the “on” state, the shunt switching core is paralleled for low resistance to improve isolation. Current flows from the DC source  668  through the isolation block circuitry  604  and returns to ground through the shunt transistor array  608 . Also, both TX port  664  to ANT port  660  and RX port  662  to ANT port  660  isolation is simultaneously optimized.  
         [0045]    Still another embodiment, with alternate isolation mode circuitry, is illustrated in FIG. 8. This embodiment is comprised of PIN diode switch circuitry  802 , an isolation block circuitry  804 , and DC current control block circuitry  806 . The PIN diode switch circuitry  802  comprises the following elements: capacitors C 1   808 , C 2   810 , C 3   812 , C 4   814 , C 5   816 , and C 7   818 , inductor L 1   820 , resistor R 1   822 , transmission lines TRL- 1   824  and TRL- 2   826 , and PIN diodes D 1   828  and D 2   830 . The isolation block circuitry  804  comprises the following elements: resistor R 2   832 , inductor L 2   834 , and capacitor C 6   836 . The DC current control block  806  comprises the following element: inductor L 3   838 . An operation mode truth table for FIG. 8 is listed below.  
                                                       SWITCH MODE   V control 1   V control 2                           Receive (RX)   0   0           Transmit (TX)   1   1           Special Isolation   0   1                      
 
         [0046]    When the mobile terminal is in receive mode, V control   1   840  is low and V control   2   842  is low. A DC bias condition does not exist. Both PIN diodes D 1   828  and D 2   830  are off. Capacitor C 1   808 , TRL- 1   824 , C 3   812 , L 1   820 , and D 1   828  appear as a high-impedance circuit at the network junction of C 4   814 , L 1   820 , and TRL- 2   826 . This allows signals to travel from the ANT port  844  to the RX port  846  with minimum attenuation, while maintaining high TX port  848  to ANT port  844  isolation help (20-25 dB).  
         [0047]    When the mobile terminal is in transmit mode, V control   1   840  is high and V control   2   842  is high. Both PIN diodes D 1   828  and D 2   830  are on. Since the TRL- 2  transmission line  826  is a quarter wavelength at the frequency of operation, the path from TRL- 2   826  to ground (through D 2   830 ) appears to be a very high impedance from the TX perspective. This allows signals to travel from the TX port  848  to the ANT port  844  with minimum attenuation, while maintaining high ANT port  844  to RX port  846  isolation help (20-25 dB). The TX port  848  to ANT port  844  transmission path is essentially a pi network. The series element is D 1   828 , and the shunt elements (on each side of D 1   828 ) are TRL- 1   824  and TRL- 2   826  in parallel with L 3   838 . The D 1   828  DC current return path is through L 3   838 . The D 2   830  DC current return path is through ground. It is important to note that a low leakage current source is required to drive V control   2   842 . A low leakage current source is required to both minimize RX mode ANT port  844  to RX port  846  insertion loss and maximize the TX Port  848  to ANT port  844  linearity.  
         [0048]    When the mobile terminal is in special isolation mode, V control   1   840  is low and V control   2   842  is high. PIN diode D 1   828  is off and D 2   830  is on. Current flows though R 2   832  and L 2   834 , and returns to ground through D 2   830 . Thus, both TX port  848  to ANT port  844  and RX port  846  to ANT port  844  isolation is simultaneously optimized.  
         [0049]    The foregoing description and embodiments may be applied generically to any terminal that uses a superheterodyne receiver and a LB VCO/HB LO doubler source. Thus, the present invention is not necessarily limited to GAIT mobile terminals. It should be understood that the principles of the present invention may be applied to any cellular or wireless system utilizing other air interfaces, such as TDMA. It should be further understood that the principles of the present invention may be utilized in hybrid systems that are a combination of one or more of the above air interfaces.  
         [0050]    In addition, the circuit elements described herein are not limited to a particular method of circuit board mounting. The present invention may be implemented by mounting the circuit elements on a bare printed circuit board, or may be implemented as a module on any suitable substrate material. Substrate materials may include any electromechanical support substance for an integrated circuit.  
         [0051]    While the present invention is described herein in the context of a mobile terminal, the term “mobile terminal” may include a cellular radiotelephone with or without a multi-line display; a Personal Communications System (PCS) terminal that may combine a cellular telephone with data processing, facsimile and data communications capabilities; a Personal Digital Assistant (PDA) that can include a radiotelephone, pager, Internet/intranet access, Web browser, organizer, calendar and/or a global positioning system (GPS) receiver; and a conventional laptop and/or palmtop receiver or other computer system that includes a display for GUI. Mobile terminals may also be referred to as “pervasive computing” devices.  
         [0052]    Further, specific embodiments of the present invention are disclosed herein. One of ordinary skill in the art will readily recognize that the invention may have other applications in other environments. In fact, many embodiments and implementations are possible. The following claims are in no way intended to limit the scope of the present invention to the specific embodiments described above. In addition, any recitation of “means for” is intended to evoke a means-plus-function reading of an element and a claim, whereas, any elements that do not specifically use the recitation “means for” are not intended to be read as means-plus-function elements, even if the claim otherwise includes the word “means”.