Abstract:
The present invention is a fire detection system. A timer sets an observation time. This may be accomplished by a first counter or shift register receiving a predetermined number of oscillator pulses. A second counter or shift register counts an alarm pulse produced by an AND circuit from the oscillator and the output of a fire detector. If the observation time expires before the second counter or shift register reaches its full count, the second counter or shift register is reset. If the second counter or shift register reaches its full count prior to the expiration of the observation time, the fire alarm is activated. Using this method, the system distinguishes a false alarm from the fire detector from the actual start of a fire.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention is a fire detection system that distinguishes a false alarm from a real alarm by requiring a predetermined number of alarm signals from the fire sensor during an observation period. 
     2. Prior Art 
     A fire warning system is disclosed in U.S. Pat. No. 3,842,409, in which the output of a fire sensor is converted into successive pulses activating a shift register to supply an output. It uses a capacitor independently repeating its charging and discharging cycle to supply the input to the data terminal of the shift register. After the output of the fire sensor blocks the line for discharging the capacitor, the voltage across the capacitor continues unchanged at the data terminal. The shift register shifts this signal supply to supply its output by receiving clock pulses. However, it does not distinguish the start of a fire from causes other than a fire, even if the fire sensor sends a continuous output signal. 
     SUMMARY OF THE INVENTION 
     An object of the present invention is to provide a fire detection system that can distinguish the output of a fire sensor due to the start of a fire from causes other than a fire, by way of a means for limiting and repeating a detection observation time and a means for counting pulses obtained from a fire sensor. 
     Another object of the present invention is to provide a fire detection system using a counting means such as a counter or a shift register for controlling the detection observation time and also another counting means such as a counter or a shift register for counting pulses obtained from the fire sensor. 
     Still another object of the present invention is to provide a fire detection system using a common oscillator to activate both the counting means for controlling the detection observation time and the means for counting pulses obtained from the fire sensor, in which the pulse counting means counts such detection pulses as supplied from an AND gate receiving the clock pulse from the oscillator and also the output supplied from the sensor so as to distinguish the output due to the start of a fire from causes other than a fire in accordance with a predetermined relation between the number N1 of pulses equivalent to the detection observation time and another number N2 of the above detection pulses given to the counting means. 
     It is important, in the field, to distinguish any output supplied from the fire sensor due to the actual start of a fire from that due to causes other than a fire, because most phenomena accompanying the start of a fire are similar to that brought about by causes other than a fire, such as smoke produced by a fire or from the smoking of cigarettes, water molecules produced by a fire or from boiling water, heat from a fire or the ordinary use of heaters or heating apparatus and so on. According to a statistical analysis shown in FIG. 9, such an important distinction may be made by using the length of the detection observation time with a set of pulses in a suitable number to be counted within the predetermined detection observation time. For instance, case I shows a fire sensor supplying an output by virtue of high frequency electro-magnetic interference; another similar output was measured when induction of alternating current occurred near the sensor. Case II shows the output obtained when a strong air current struck the sensor from a window or an air-conditioning duct. A further case III shows the output due to suspensions in air near the sensor caused when a room was dusted to keep clear or when many persons smoked cigarettes. The last case IV shows the output of an actual fire. When a sampling pulse &#34;a&#34; converts the measurement output of the sensor into detection pulses, such detection pulses are obtained in smaller numbers than the number caused by a fire because the causes other than fire exist for a short time relative to the duration of a fire; or do not produce permanent physical change thereof. Thus, if the counting of such detection pulses is limited to a predetermined detection observation time, the output of the fire sensor due to a fire may be distinguished from causes other than a fire. 
    
    
     BRIEF EXPLANATION OF DRAWINGS 
     FIG. 1 is a block diagram of a fire detection system according to the present invention, 
     FIGS. 2 and 3 are time charts for distinguishing causes other than a fire from a fire, 
     FIG. 4a is another block diagram according to the present invention, 
     FIGS. 5 and 6a are time charts for distinguishing causes other than a fire from a fire; 
     FIG. 7 is a latch circuit used in the circuit of the FIG. 4a, 
     FIG. 8 is a truth table relating to the latch circuit of the FIG. 7, 
     FIG. 4b is a circuit of the block diagram shown in the FIG. 4a, 
     FIG. 4c is a circuit of another embodiment according to the present invention, 
     FIG. 6b is a time chart of the system shown in the FIG. 4c, and 
     FIG. 9 shows a statistic pattern relating to between the detection pulse and kind of cause supplying the detection pulse. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring to FIG. 1, a detector 1 supplies an electrical output therefrom when the value of a physical variable reaches a predetermined level for issuing a fire alarm, for instance, a predetermined level of smoke or other combustion substances produced from a fire. The measuring means is an ionization chamber sensor, a photo-electrical sensor, a gas detector or the like in the prior art. An oscillator 2 supplies therefrom pulses &#34;a&#34; as in FIGS. 2, 3, 5, 6a, 6b  and 9. An AND gate 3 receives the pulse &#34;a&#34; from the oscillator 2 and also the output from the detector 1 responding to its predetermined value of physical variable and supplies therefrom a detection output &#34;b&#34; when the both inputs are present. This detection output &#34;b&#34; which has the same characteristics of the pulse &#34;a&#34; enters an N-coded counter 4 (which requires N pulses to supply its output), and triggers a mono-multivibrator 5. This mono-multivibrator 5, which acts to set the observation cycle for repeating the counting action at the N-coded counter 4, sends a continuous output &#34;c&#34; during the observing cycle as shown in FIGS. 2 and 3, thereby to reset the N-coded counter 4 every time the observing cycle ends. The function of the mono-multivibrator 5 thus limits and maintains the time T of the detection observation within which the detector 1 must supply the detection pulses &#34;b&#34; through the AND gate 3 in response to the predetermined value of physical variable in order to issue a fire alarm. 
     The detection observation time T is, for instance, from 5 sec. to 30 sec. according to a statistical result, when pulse &#34;a&#34; has a pulse interval of from 1 sec. to 10 sec. The start of a fire or cause other than a fire is reliably distinguished by using the data of the desirable number of the detection pulses &#34;b&#34; and the detection observation time T. For example, suppose the pulse interval of the pulse &#34;a&#34; is 2 sec., and that four pulses are required to supply an output from the N-coded counter 4. The detection observation time T is subsequently about 7 sec. so as to reset the N-coded counter 4 after the latter sends out an output &#34;d,&#34; if four successive pulses are counted. When the N-coded counter 4 counts three successive pulses after receiving the first pulse, the output &#34;d&#34; is supplied therefrom after 6 sec. of the counting time elapses from the first pulse. The mono-multivibrator 5 stops supplying the continuous output &#34;c&#34; to the N-coded counter 4 later about 1 sec. after the output &#34;d&#34; has been supplied from the N-coded counter 4, so that the output &#34;d&#34; is shaped as a pulse as shown in FIG. 3. The output &#34;d&#34; thus pulse-shaped activates a switching circuit 8 to issue a fire alarm. The condition for issuing the fire alarm in this example is a count four successive pulses &#34;b&#34; having the pulse interval of 2 sec. within the 7 sec. of the detection observation time T(FIG. 3). 
     A reset pulse generator 6 is used to generate a reset pulse of a H(= 1) level when the power supply is turned on. This circuit comprises an input terminal +B, a capacitor C and a resistor R. This reset pulse is lead to an OR gate 7 whose output connects with the N-coded counter 4 to reset the same. The output &#34;c&#34; of the mono-multivibrator 5 is also lead to the OR gate 7. 
     In event the number of successive pulses &#34;b&#34; which are supplied from the AND gate 3 within the detection observation time T is smaller than the predetermined number, the N-coded counter 4 does not produce an output and is thereafter reset to recover its starting state by the end of the output &#34;c&#34; of the mono-multivibrator 5. Thus, any cause which may make the fire sensor output a detection pulse or pulses is satisfactorily distinguished from an actual fire because the former produces a number of pulses that are always smaller than the predetermined number for signaling a fire (FIG. 2). 
     In the event that detector 1 supplies successive pulses &#34;b&#34; in response to the value of its measured physical variable being above its predetermined level for any reason, the N-coded counter 4 produces the output &#34;d&#34; because the inputting pulses enter the N-coded counter 4 in the required number within the detection observation time T given by the mono-vibrator 5. This is reliably distinguished as a fire according to the predetermined number of successive pulses &#34;b.&#34; The output &#34;d&#34; thus produced is shaped as a pulse as shown by &#34;d&#34; of FIG. 3 when the voltage supply &#34;c&#34; of the mono-multivibrator 5 resets the N-coded counter 4 soon after the time T elapses. The switching circuit 8 produces its output &#34;e&#34; to issue a fire alarm as the output &#34;d&#34; applies thereto. 
     A fire detection system shown in the FIG. 4a uses an N+1-coded counter 11 in place of the mono-multivibrator 5, for the purpose of providing the detection observation time T. An AND gate 10 receives the pulse &#34;a&#34; of the oscillator 2 and also an output &#34;c&#39;&#34; of a latch circuit 9. Another pulse &#34;d&#39;&#34; similar to the pulse &#34;a&#34; is supplied from the AND gate 10 to the N+1-coded counter 11, so that the counting repeats correctly at the N+1-coded counter 11. This latch circuit 9 becomes conductive by the input of the first pulse of the successive pulses &#34;b&#34; from the AND gate 3, while this first pulse enters to the N-coded counter 4 at the same time. Accordingly, the detection observation time T at this system is to start when a first detection pulse &#34;b&#34; enters to the latch circuit 9 so as to end when the latch circuit 9 is reset by a reset output generated from the N+1-coded counter 11 in response to receiving the number N+1 clock pulses. 
     When the N-coded counter 4 receives the detection pulses &#34;b&#34; in the predetermined number within the detection observation time T, an output &#34;g&#34; thereof applies to the switching circuit 8, thereby supplying an output &#34;h&#34; therefrom for operating a fire warning apparatus associated with this switching circuit. The reset pulse &#34;e&#39;&#34; which is supplied from the N+1-coded counter 11 is converted into a delayed pulse &#34;f&#34; through a delay circuit 12, and then the delayed pulse &#34;f&#34; resets the N+1-coded counter 11, the N-coded counter 4 and also the latch circuit 9. Delay circuit 12 produces delayed output &#34;f&#34; long enough to reset both counters 11 and 4 and also the latch circuit 9. 
     Since the detector 1 produces pulses &#34;b&#34; in a smaller number than the predetermined number N due to any cause other than a fire, the N-coded counter 4 does not supply its output &#34;g&#34; in FIG. 5. The continuing and increasing physical changes caused by a fire cause the detector 1 to produce pulses &#34;b&#34; in a number greater than or equal to the predetermined number N, and the N-coded counter 4 supplies an output &#34;g&#34; thereby to issue a fire alarm (FIG. 6a). A real distinction between a fire and a cause other than a fire is reliably carried out at the fire detection system by requiring pulse &#34;b&#34; to be repeated through the time T before enabling the alarm. 
     The latch circuit 9 and its operable condition are shown in FIGS. 7 and 8. This circuit has a set terminal SET or S, a reset terminal RESET or R and a pair of output terminals Q and Q. A truth table of the FIG. 8 shows its operable condition such that inputs of H=1 at S and L=0 at R generates H=1 at Q; inputs of L=0 at S and H=1 at R generates L=0 at Q. For the case of inputs L=0 at S and L=0 at R, Q and Q are not forced to assume any particular state but rather remain unchanged. The output terminal Q is not used in this system. 
     If reset pulse generator 6 is modified to interchange the positions of the capacitor C and the resistor R, a reset pulse is produced as an L(=0) level. The use of a H level or an L level may be selected corresponding to characteristics of the counter used there. 
     In FIG. 4b, showing a circuit designed from the block diagram circuit of FIG. 4a, the switching circuit 8 comprises a relay line 16 having a relay 14 and a thyristor 15, and also a trigger line 18 having a transistor 17 for triggering th thyristor 15. The N-coded counter 4 connects at the output end Q3 with the trigger line 18. Between the output end Q4 of the N+1-coded counter 11 and the reset terminal RST of the N-coded counter 4 is the delay circuit 12 comprising a pair of inverters 21 and 22 including a resistor 19 and a capacitor 20 therebetween. 
     When the fire detection system is used to observe a special area that produces no heat, for instance, a safe room and so on, it is preferable to make the difference between the pulse numbers required by the respective N or N+1-coded counter greater. As an example, 10 clock pulses &#34;a&#34; of very short pulse interval could be alloted to the N+1-coded counter 11 to limit the detection observation time T; and three pulses could be alloted to the N-coded counter 4 to supply the output &#34;g&#34; for issuing a fire alarm. Thus by counting three pulses during the detection observation time, the detection pulses &#34;b&#34; which are supplied from the AND gate 3 could be successive or non-successive. After the N-coded counter 4 counts three pulses within the above time T, the output &#34;g&#34; may be supplied therefrom to issue a fire alarm. Since the physical variables change continually during the initial stage of a fire, a successive or non-successive detection of pulses &#34;b&#34; is used to distinguish the start of a fire from a cause other than a fire in such a special area in the manner of whether three pulses are counted within the above time T. This system is generally useful to detect the initial stage of a fire. 
     In FIG. 4c, a circuit uses a first shift register 11&#39; for controlling the detection observation time T and also a second shift register 4&#39; for counting the detection pulses in the predetermined number. An ionization chamber smoke sensor 1&#39; is used as a smoke detection apparatus, which comprises an outer ionization chamber 1a and an inner ionization chamber 1b (or a single ionization chamber type sensor may be used). This sensor 1&#39; is usually energized with d.c. power not alternating power. 
     A field effect transistor FET whose gate is connected to the intermediate electrode 1c of the sensor 1&#39; acts as an AND circuit 3&#39; in place of the usual AND gate element 3. As the output of an ionization chamber or a photo-electric transistor used as a photo-electric fire sensor is usually very weak, and must be amplified with a very high gain, any electric noise which is caused by induction of alternating current or high frequency electromagnetic interference is concurrently amplified, so that a false alarm is likely to issue responding to such an amplified noise. But the AND gate circuit 3&#39; using the field effect transistor FET is very useful in removing the affect of any electric noise. The clock pulse &#34;a&#34; of the oscillator 2 enters at the FET and also the first shift register 11&#39;. When the voltage appearing at the gate of the FET indicating a predetermined value of the physical variable at the ionization chamber coincides with the clock pulse &#34;a,&#34; this FET supplies the detection pulse or pulses &#34;b&#39;.&#34; 
     This detection pulse or pulses &#34;b&#39;&#34; enters the clock terminal CL2 of the second shift register 4&#39; through a wave-form shaping circuit 3a (comprising a pair of inverters), and also enters at the data terminal D1 of the first shift register 11&#39;. On the other hand, the clock pulse &#34;a&#34; is successively entered into the clock terminal CL1 of the first shift register 11&#39; through an auxiliary delay circuit 11&#39;a which has a pair of inverters including a resistor and a capacitor therebetween. 
     The detection observation time T begins when the first detection pulse &#34;b&#39;&#34; which is supplied from the AND gate 3&#39; enters the data terminal D1 of the first shift register 11&#39;. This observation time predetermined number N1 of T is controlled by the clock pulses which the first shift register 11&#39; requires to enable its output. The detection pulse or pulses &#34;b&#39;&#34; which may be supplied from the AND gate 3&#39; within the detection observation time T will enter the clock terminal CL2 of the second shift register 4&#39;, so that the data shifts to the next position. This data to the second shift register 4&#39; is always applied to the data terminal D2 from an output V DD  &#39; of the second constant voltage circuit 23. 
     The second shift register 4&#39; supplies its output &#34;g&#39;&#34; from the output end Q N2  when it receives the number N2 or more detection pulses &#34;b&#39;&#34; within the period of the clock pulse number N1 for repeating the detection observation cycle. If the shift register 4&#39; does not input detection pulses in the predetermined number N2, this register is reset by an output supplied from the output end Q N1  of the first shift register 11&#39; after the detection observation time T elaspes. That is, after a delay circuit 12&#39; which has an OR gate 12a and an inverter 12b including a resistor and a capacitor therebetween delays the output &#34;e&#34;&#34; of the output end Q N1  to produce a reset pulse &#34;f&#39;,&#34; this reset pulse &#34;f&#39;&#34; enters at the reset terminal RST2 and clears the shift register 4&#39;. 
     When the second shift register 4&#39; receives detection pulses &#34;b&#39;&#34; in the predetermined number N2, the output &#34;g&#39;&#34; thereof is supplied which not only enters a transistor 17 but turns on the OR gate 12a of the delay circuit 12&#39; so as to reset itself after the delay of delay circuit 12&#39;. This delay circuit 12&#39; is especially effective to reset both the first and second shift registers 11&#39; and 4&#39; due to the delay time. On the other hand, the transistor 17 after receiving the output &#34;g&#39;&#34; through the line 18 triggers the thyristor 15, thereby to activate a relay 14. 
     This circuit uses the second constant voltage circuit 23 comprising a transistor 23a, zener diode 23b and a capacitor 23c, thereby to produce the power source V DD  &#39; suitable for the C-MOS used herein. This voltage V DD  &#39; is lower than the voltage V DD  of the primary power source, so that the switching action of the respective C-MOS may be made faster. Power wiring to all the C-MOS elements is not shown. 
     FIG. 6b shows a time chart relating to the circuit of FIG. 4c; it provides that, for instance, the clock pulse &#34;a&#34; of the oscillator 2 has a 300 micro sec. pulse length and also a 5 sec. pulse interval. In event A, a fire arises and continuously causes physical changes especially represented by smoke soon thereafter, the AND gate 3&#39; supplies successively the detection pulses &#34;b&#39;&#34; in the predetermined number N2 (successive three detection pulses in the chart), as the detector 1 continuously measures the physical variable above the predetermined level suitable for issuing a fire alarm. On the other hand, as the clock pulses &#34;a&#34; are made the delayed pulses &#34;c&#34;&#34;, with the delay time (80 micro sec.) relative to the detection pulses &#34;b&#39;&#34;, are produced by virtue of the auxiliary delay circuit 11&#39;a. The detection pulses &#34;b&#39;&#34; not only enter the data terminal D1 of the first shift register 11&#39;, but enter the clock terminal CL2 of the second shift register 4&#39;, so that the data at the data terminal D2 is successively shifted to supply an output &#34;g&#39;&#34; from the output end Q N2  thereof. On the other hand, the delayed pulses &#34;c&#34;&#34; causes the output &#34;e&#34;&#34; from the output end Q N1   of the first shift register 11&#39;, and then this output &#34;e&#34;&#34; is converted into the delayed output &#34;f&#39;&#34; with the delay time (500 micro sec.), so that the output &#34;g&#39;&#34; of the second shift register 4&#39; and also the output &#34;e&#34;&#34; of the first shift register 11&#39; are reset by the delayed output f&#39;.&#34; The length of the output &#34;g&#39;&#34; is same as the delay time (500 micro sec.). The pulse output &#34;g&#39;&#34; having 500 micro sec. length subsequently triggers the thyristor 15 after amplification by the transistor 17. The input time of 100 micro sec. which is usually required to trigger the thyristor is reliably satisfied with the pulse length of 500 micro sec. 
     In event B, suspension in the air casually increases but decreases soon thereafter, for instance, due to the dusting of a room or the smoking of a cigarette. Such causes are not due to a fire, the AND gate 3&#39; does not supply the detection pulse &#34;b&#39;&#34; reaching the predetermined number N2 (two pulses being less than the three pulses fixed here), so that the second shift register 4&#39; supplies no output &#34;g&#39;.&#34; On the other hand, the clock pulses &#34;c&#34;&#34; delayed relative to the detection pulses &#34;b&#39;&#34; (with a delay time of 80 micro sec.) enter the first shift register 11&#39;, thereby enable the output &#34;e&#34;&#34; therefrom after the detection observation time T (10 sec.) elapses, and this output is converted into the delayed output &#34;f&#39;&#34; (the delayed time of 500 micro sec.), so that the delayed output &#34;f&#39;&#34; stops subsequently the output &#34;e&#34;&#34; and at the same time clears the second shift register 4&#39;. Accordingly, the thyristor 15 remains in a non-conductive stage, and a fire alarm is not issued.