Abstract:
At least two communications cards are utilized to communicate with at least two Ethernet ports, each having unique MAC and IP addresses, and at least two different protocols. At least two central processing units (CPUs) are coupled to the at least two communications cards through a manageable Ethernet switch. One of the at least two CPUs is a primary (main) CPU and is capable of communicating using a limited number of native Ethernet protocols. Another one or more of the at least two CPUs is dedicated to performing conversion of additional, more complicated protocols to be sent to the primary CPU in at least one of its native Ethernet protocols. This off-loads the primary CPU from having to handle these additional, complicated protocols, thereby reducing the amount of protocol software/firmware required to be integrated with the primary CPU with a subsequent savings in boot-up time and background software overhead.

Description:
RELATED PATENT APPLICATION 
     This application claims priority to commonly owned U.S. Provisional Patent Application Ser. No. 61/387,116; filed Sep. 28, 2010; entitled “Dual-Port Ethernet Traffic Management for Protocol Conversion,” by Daniel Rian Kletti; and is hereby incorporated by reference herein for all purposes. 
    
    
     TECHNICAL FIELD 
     The present invention relates generally to Ethernet traffic management, and more particularly, to Ethernet traffic management and protocol conversions. 
     BACKGROUND 
     Existing products process all Ethernet protocols with a single central processing unit (CPU). When additional protocol support is required, new software/firmware must be added to the operating system of the CPU. This added software/firmware for new protocols increases the boot-up time required by the CPU software/firmware and increases the overhead computational loading of the CPU, to the detriment of running applications programs. 
     SUMMARY 
     Therefore, what is needed is a way to easily add support for new Ethernet protocols without increasing a main processor&#39;s (CPU) program software/firmware overhead, and/or decrease message handling and computational efficiencies. According to the teachings of this disclosure, at least two communications cards are utilized to communicate with at least two Ethernet ports, each having unique MAC and IP addresses, and at least two different protocols. At least two central processing units (CPUs) are coupled to the at least two communications cards through a manageable Ethernet switch. One of the at least two CPUs is a primary (main) CPU and is capable of communicating using a limited number of native Ethernet protocols. Another one or more of the at least two CPUs is dedicated to performing conversion of additional, more complicated protocols to be sent to the primary CPU in at least one of its native Ethernet protocols. This off-loads the primary CPU from having to handle these additional, complicated protocols, thereby reducing the amount of protocol software/firmware required to be integrated with the primary CPU with a subsequent savings in boot-up time and background software overhead. 
     According to a specific example embodiment of this disclosure, an apparatus with Ethernet traffic management for protocol conversion comprises: a primary central processing unit (CPU) having first and second Ethernet interfaces; a protocol translation CPU having a third and a fourth Ethernet interface; first and second Ethernet communications interfaces; a manageable Ethernet switch having first and second ports coupled to the first and the second Ethernet interfaces of the primary CPU, respectively, third and fourth ports coupled to the third and fourth Ethernet interfaces of the protocol translation CPU, respectively, and fifth and sixth ports coupled to the first and second Ethernet communications interfaces, respectively; wherein Ethernet traffic having a protocol recognized by the primary CPU is routed between the first or second Ethernet communications interfaces and the first or second Ethernet interfaces of the primary CPU by the manageable Ethernet switch, and Ethernet traffic not having a protocol recognized by the primary CPU is routed between the first or second Ethernet communications interfaces and the protocol translation CPU by the manageable Ethernet switch, whereby the protocol translation CPU converts the Ethernet traffic having the unrecognized protocol to Ethernet traffic having the recognized protocol and then sending the recognized protocol converted Ethernet traffic to the primary CPU. 
     According to another specific example embodiment of this disclosure, an apparatus with Ethernet traffic management for protocol conversion comprises: a primary central processing unit (CPU) having first and second Ethernet interfaces; a protocol translation CPU having third and fourth Ethernet interfaces; first and second Ethernet communications interfaces; an analog switch having first and second positions, wherein a common of the analog switch is coupled to the first Ethernet communications interface; a manageable Ethernet switch having a first port coupled to the first Ethernet interface of the primary CPU, a second port coupled to the second Ethernet interface of the primary CPU, third and fourth ports coupled to the third and fourth Ethernet interfaces of the protocol translation CPU, respectively, a sixth port coupled to the second Ethernet communications interface, a fifth port coupled to the first position of the analog switch, and a seventh port coupled to the second position of the analog switch; wherein Ethernet traffic having a protocol recognized by the primary CPU is routed between the second Ethernet communications interface and the first Ethernet interface of the primary CPU by the manageable Ethernet switch when the analog switch is the first position, Ethernet traffic not having a protocol recognized by the primary CPU is routed between the second Ethernet communications interface and the protocol translation CPU by the manageable Ethernet switch, whereby the protocol translation CPU converts the Ethernet traffic having the unrecognized protocol to Ethernet traffic having the recognized protocol and then sending the recognized protocol converted Ethernet traffic to the primary CPU over the first Ethernet interface; and the first Ethernet communications interface is coupled to the fifth port of the manageable Ethernet switch when the analog switch is in the first position and to the seventh port of the manageable Ethernet switch when the analog switch is in the second position. 
     According to yet another specific example embodiment of this disclosure, a method for Ethernet traffic management and protocol conversion comprises the steps of: coupling first and second Ethernet communications interfaces to a manageable Ethernet switch; determining with the manageable Ethernet switch whether Ethernet traffic from the first or the second Ethernet communications interfaces has a protocol recognized by a primary CPU; routing the Ethernet traffic having the protocol recognized by the primary CPU to the primary CPU with the manageable Ethernet switch; routing the Ethernet traffic not having the protocol recognized by the primary CPU to a protocol translation CPU for translating the unrecognized protocol to the protocol recognized by the primary CPU with the manageable Ethernet switch; and routing translated Ethernet traffic from the protocol translation CPU to the primary CPU with the manageable Ethernet switch. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       For a more complete understanding of the present invention and the advantages thereof, reference is now made to the following description, in conjunction with the accompanying drawings briefly described as follows. 
         FIG. 1  illustrates a schematic block diagram of a single primary central processing unit (CPU) having two Ethernet interfaces coupled through a manageable Ethernet switch to two communications cards for interfacing with two Ethernet ports; 
         FIG. 2  illustrates a schematic block diagram of a primary central processing unit (CPU) having two Ethernet interfaces and a protocol translation CPU coupled through a manageable Ethernet switch to two communications cards for interfacing with two Ethernet ports; 
         FIG. 3  illustrates a schematic block diagram of a primary central processing unit (CPU) having two Ethernet interfaces and a protocol translation CPU coupled through a manageable Ethernet switch to two communications cards for interfacing with two Ethernet ports, according to a specific example embodiment of this disclosure; 
         FIG. 4  illustrates a schematic block diagram of a primary central processing unit (CPU) having two Ethernet interfaces and a protocol translation CPU coupled through a manageable Ethernet switch to two communications cards for interfacing with two Ethernet ports and an analog switch, according to another specific example embodiment of this disclosure; 
         FIG. 5  illustrates a schematic block diagram of a primary central processing unit (CPU), a protocol translation CPU, a manageable Ethernet switch, and Ethernet and serial analog switches coupled to two Ethernet and two serial communications interface connectors adapted for coupling to a variety of Ethernet and serial interfaces, according to yet another specific example embodiment of this disclosure; and 
         FIG. 6  illustrates schematic block diagrams of various types of Ethernet and serial interfaces compatible with the two Ethernet and two serial communications interface connectors shown in  FIG. 5 , according to the specific example embodiments of this disclosure. 
     
    
    
     While the present disclosure is susceptible to various modifications and alternative forms, specific example embodiments thereof have been shown in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific example embodiments is not intended to limit the disclosure to the particular forms disclosed herein, but on the contrary, this disclosure is to cover all modifications and equivalents as defined by the appended claims. 
     DETAILED DESCRIPTION 
     Referring now to the drawings, details of example embodiments of the present invention are schematically illustrated. Like elements in the drawings will be represented by like numbers, and similar elements will be represented by like numbers with a different lower case letter suffix. 
     Referring to  FIG. 1 , depicted is a schematic block diagram of a single primary central processing unit (CPU) having two Ethernet interfaces coupled through a manageable Ethernet switch to two communications cards for interfacing with two Ethernet ports. The Ethernet interface may be, for example but is not limited to, a media independent interface (MIT), a 4-wire interface, a reduced media independent interface (RMII), a gigabit media independent interface (GMII), etc. All Ethernet traffic on ports  102  and  104  passes through the respective communications cards  106  and  108 , through the manageable Ethernet switch  110  having virtual local area network (VLAN) capabilities and port forwarding support, and then to the primary CPU  112  over Ethernet interfaces MII-1 and MII-2 buses. The primary CPU  112  is the only processor and it must handle all types of protocols coming over the MII-1 and MII-2 buses from the Ethernet ports  102  and  104 . This configuration requires a lot of software overhead and processing power for the one primary CPU  112  to handle all types of Ethernet communications while running applications programs. Each of the communications cards  106  and  108  may have its own unique media access controller (MAC) address and Internet protocol (IP) address. 
     Referring to  FIG. 2 , depicted is a schematic block diagram of a primary central processing unit (CPU) having two Ethernet interfaces, and a protocol translation CPU coupled through a manageable Ethernet switch to two communications cards for interfacing with two Ethernet ports. Traffic (data) from either one or both of the communications cards  106  and  108  can go either to the primary CPU  112  or to the protocol translation CPU  214 , however, the primary CPU  112  is limited to accepting data from the communications cards  106  and  108  at only one MAC/IP address of the MII-1 bus. The protocol translation CPU  214  can communicate with the primary CPU  112  over the MII-2 bus using a different MAC/IP address. 
     The manageable Ethernet switch  210  may be programmed to allow traffic having a standard protocol recognized by the primary CPU  112  to go directly to the primary CPU  112 , and traffic having protocols not recognized by the primary CPU  112  to go directly to the protocol translation CPU  214 . The manageable Ethernet switch  210  may also be programmed to have virtual local area networks (VLANs) so that the traffic having protocols translated through the protocol translation CPU  214  may be directed over the MII-1 bus to the primary CPU  112 , and/or directly through the manageable Ethernet switch  210  over the MII-2 bus. Thus, the primary CPU  112  can communicate over the MII-1 bus, using its native protocols to either one of the communications cards  106  and  108 , but at only one IP and/or MAC address. The non-native protocol traffic (data) must first go through and be translated by the protocol translation CPU  214  before being recognized by the primary CPU  112  over the MII-2 bus. If the protocol translation CPU  214  is not installed or is inactive, the primary CPU  112  can communicate using only one communications channel over the MII-1 bus to the communications cards  106  and  108 . 
     Referring to  FIG. 3 , depicted is a schematic block diagram of a primary central processing unit (CPU) having two Ethernet interfaces and a protocol translation CPU coupled through a manageable Ethernet switch to two communications cards for interfacing with two Ethernet ports, according to a specific example embodiment of this disclosure. Traffic (data) from either one or both of the communications cards  106  and  108  can go either to the primary CPU  112  or to the protocol translation CPU  214 . The manageable Ethernet switch  210  may be programmed to allow traffic having a standard protocol recognized by the primary CPU  112  to go directly to the primary CPU  112 , and traffic having protocols not recognized by the primary CPU  112  to go directly to the protocol translation CPU  214 . The manageable Ethernet switch  310  may also be programmed to have virtual local area networks (VLANs) so that the traffic having protocols translated through the protocol translation CPU  214  may be redirected over the MII-1 or MII-2 buses to the primary CPU  112 . When traffic having a native protocol is received, this traffic can pass through the manageable Ethernet switch  310  over either one or both of the MII-1 and MII-2 buses directly to the primary CPU  112 . The non-native protocol traffic (data) must first go through and be translated by the protocol translation CPU  214  before being recognized by the primary CPU  112  over either of the MII-1 and MII-2 buses. If the protocol translation CPU  214  is not installed or is inactive, the primary CPU  112  can communicate over both of the MII-1 and MII-2 buses and the communications cards  106  and  108  may have unique MAC and IP addresses. With the protocol translation CPU  214  active, traffic (data) can go to either the primary CPU  112  and/or the protocol translation CPU  214 , and the communications cards  106  and  108  may have unique MAC and IP addresses. 
     Referring to  FIG. 4 , depicted is a schematic block diagram of a primary central processing unit (CPU) having two Ethernet interfaces and a protocol translation CPU coupled through a manageable Ethernet switch to two communications cards for interfacing with two Ethernet ports and an analog switch, according to another specific example embodiment of this disclosure. Traffic (data) from the communication card  106  can go directly to the primary CPU  112  over the MII-1 bus, or to the protocol translation CPU  414 . Traffic (data) from the communication card  108  can go directly to the primary CPU  112  over the MII-1 bus, or to the protocol translation CPU  414  when analog switch  416  is in position “a.” Traffic (data) from the communication card  108  can only go to the primary CPU  112  over the MII-2 bus when analog switch  416  is in position “b.” This is helpful in providing for the low latency requirements of IEC61850 GOOSE (hereinafter “GOOSE”) messaging when used and the protocol translation CPU  414  is active. 
     The manageable Ethernet switch  410  may be programmed to allow traffic having a standard protocol recognized by the primary CPU  112  to go directly to the primary CPU  112  over the MII-1 bus, and traffic having protocols not recognized by the primary CPU  112  to go directly to the protocol translation CPU  414 . The 5-port manageable Ethernet switch  410  may also be programmed to have virtual local area networks (VLANs) so that the traffic having protocols translated through the protocol translation CPU  414  may be redirected over the MII-1 bus to the primary CPU  112 . When traffic having a native protocol is received, this traffic may pass through the manageable Ethernet switch  410  over the MII-1 bus directly to the primary CPU  112 . The non-native protocol traffic (data) must first go through and be translated by the protocol translation CPU  414  before being recognized by the primary CPU  112  over the MII-1 bus. If the protocol translation CPU  414  is not installed or is inactive, the primary CPU  112  can communicate over both of the MII-1 and MII-2 buses and the communications cards  106  and  108  may have unique MAC and IP addresses when the switch is in position “b.” With the protocol translation CPU  414  active, traffic (data) can go to either the primary CPU  112  and/or the protocol translation CPU  414 , and the communications cards  106  and  108  may have unique MAC and IP addresses. 
     Both MII-1 and MII-2 buses are used for communications with the communications cards  106  and  108  when the protocol translation CPU  414  is not installed. Thus, there are two separate MAC addresses and therefore two separate IP addresses for use with the two communications cards  106  and  108 . However only one MII-1 interface is used by the primary CPU  112  when the protocol translation CPU  414  is installed, but all traffic from both of the communications cards  106  and  108  may be routed first to the protocol translation CPU  414 . The protocol translation CPU  414  controls the 5-port manageable Ethernet switch  410  via e.g., SPI, and can block access from the communications cards  106  and  108  to MII-1 bus and primary CPU  112 . If GOOSE messaging is used, then the analog switch  416  can be toggled to route the GOOSE message on the communications card  108  directly back over the MII-2 bus to the primary CPU  112 . The analog switch  416  may be controlled by the protocol translation CPU  414  via a general purpose input-out (GPIO) control interface, as can be the 5-port manageable Ethernet switch  410 . 
     Referring to  FIG. 5 , depicted is a schematic block diagram of a primary central processing unit (CPU), a protocol translation CPU, a manageable Ethernet switch, and Ethernet and serial analog switches coupled to two Ethernet and two serial communications interface connectors adapted for coupling to a variety of Ethernet and serial interfaces, according to yet another specific example embodiment of this disclosure. Traffic (data) from the Ethernet communication connector  522   a  can go directly to the primary CPU  112  over the MII-1 bus, or to the protocol translation CPU  514 . Traffic (data) from the Ethernet communication connector  522   b  can go directly to the primary CPU  112  over the MII-1 bus, or to the protocol translation CPU  514  when analog switch  416  is in position “a.” Traffic (data) from the Ethernet communication connector  522   a  can only go to the primary CPU  112  over the MII-2 bus when analog switch  416  is in position “b.” This is useful when GOOSE messaging is used and the protocol translation CPU  514  is active. 
     The manageable Ethernet switch  410  may be programmed to allow traffic having a standard protocol recognized by the primary CPU  112  to go directly to the primary CPU  112  over the MII-1 bus, and traffic having protocols not recognized by the primary CPU  112  to go directly to the protocol translation CPU  514 . The 5-port manageable Ethernet switch  410  may also be programmed to have virtual local area networks (VLANs) so that the traffic having protocols translated through the protocol translation CPU  514  may be redirected over the MII-1 bus to the primary CPU  112 . When traffic having a native protocol is received, this traffic may pass through the manageable Ethernet switch  410  over the MII-1 bus directly to the primary CPU  112 . The non-native protocol traffic (data) must first go through and be translated by the protocol translation CPU  514  before being recognized by the primary CPU  112  over the MII-1 bus. If the protocol translation CPU  514  is not installed or is inactive, the primary CPU  112  can communicate over the MII-1 and MII-2 buses to the Ethernet communication connector  522   a  and the Ethernet communication connector  522   b , respectively, and may have unique MAC and IP addresses when the switch is in position “b.” With the protocol translation CPU  514  active, traffic (data) can go to either the primary CPU  112  and/or the protocol translation CPU  514 , and the Ethernet communication connector  522   a  and the Ethernet communication connector  522   b  each may have unique MAC and IP addresses. 
     Both MII-1 and MII-2 buses are used for communications with the Ethernet communication connector  522   a  and the Ethernet communication connector  522   b  when the protocol translation CPU  414  is not installed. Thus, there are two separate MAC addresses and therefore two separate IP addresses for use with the Ethernet communication connector  522   a  and the Ethernet communication connector  522   b . However only one MII-1 interface is used by the primary CPU  112  when the protocol translation CPU  514  is installed, but all traffic from both of the Ethernet communication connector  522   a  and the Ethernet communication connector  522   b  may be routed first to the protocol translation CPU  514 . The protocol translation CPU  514  may control the 5-port manageable Ethernet switch  410  via e.g., SPI, GPIO, etc., and can block access from the Ethernet communication connector  522   a  and the Ethernet communication connector  522   b  to MII-1 bus and primary CPU  112 . If GOOSE messaging is used, then the analog switch  416  can be toggled to route the GOOSE message on the Ethernet communication connector  522   a  directly back over the MII-2 bus to the primary CPU  112 . The analog switch  416  may be controlled by the protocol translation CPU  514  and/or the primary CPU  112  via a SPI, or general purpose input-out (GPIO) control interface, as can the 5-port manageable Ethernet switch  410 . 
     Serial interfaces of the primary CPU  112  and the protocol translation CPU  514  may be independently switched between the serial communications connectors  524   a  and  524   b  with serial switches  518  and  520 . When switch  518  is in position “a” the serial communications connector  524   a  is coupled to the protocol translation CPU  514 , and when in position “b” the serial communications connector  524   a  is coupled to the primary CPU  112 . Likewise, when switch  520  is in position “a” the serial communications connector  524   b  is coupled to the protocol translation CPU  514 , and when in position “b” the serial communications connector  524   b  is coupled to the primary CPU  112 . 
     Referring to  FIG. 6 , depicted are schematic block diagrams of various types of Ethernet and serial interfaces compatible with the two Ethernet and two serial communications interface connectors shown in  FIG. 5 , according to the specific example embodiments of this disclosure. Various types of Ethernet and serial interfaces may be used with the primary CPU  112  and the protocol translation CPU  514  by using desired Ethernet and serial interfaces that have compatible Ethernet communications connectors  622  and serial communications connectors  624  adapted to mate with the Ethernet communications connectors  522  and the serial communications connectors  524 , respectively, shown in  FIG. 5 . 
     A copper wire Ethernet interface  630  may be coupled to the Ethernet communications connector  622   a  or  622   b , and an RJ45 Ethernet connector  632 . This interface allows direct wire connection to a wired local area network (LAN) or Internet modem, e.g., cable, DSL, etc. A glass fiber (fiber optic) Ethernet interface  634  may be coupled to the Ethernet communications connector  622   a  or  622   b , and a fiber optic Ethernet transceiver having either a MT-RJ MM or LC SM connector  636  for coupling to a glass fiber communications cable (not shown). A glass fiber (fiber optic) Ethernet interface  638  may be coupled to the Ethernet communications connector  622   a  or  622   b , and a fiber optic Ethernet transceiver having either a ST MM or SC MM connector  640  for coupling to a glass fiber communications cable (not shown). 
     An RS-232 serial communications interface  642  may be coupled to the serial communications connector  624   a  or  624   b , and a DB-9 connector  644 . An RS-485 serial communications interface  646  may be coupled to the serial communications connector  624   a  or  624   b , and a compatible RS-485 connector  648 . A serial fiber communications interface  650  may be coupled to the serial communications connector  624   a  or  624   b , and a compatible serial fiber connector  652 . It is contemplated and within the scope of this disclosure other communications interfaces may also be effectively used with the invention disclosed herein. One having ordinary skill in digital communications and the benefit of this disclosure would readily understand how to apply these other communications interfaces. 
     It is contemplated and within the scope of this disclosure that more than two communications cards may be used as well as providing more ports on the manageable Ethernet switch  410  for the additional communications cards used in combination with a manageable Ethernet switch, a primary CPU and a protocol translation CPU. 
     Although specific example embodiments of the invention have been described above in detail, the description is merely for purposes of illustration. It should be appreciated, therefore, that many aspects of the invention were described above by way of example only and are not intended as required or essential elements of the invention unless explicitly stated otherwise. Various modifications of, and equivalent steps corresponding to, the disclosed aspects of the exemplary embodiments, in addition to those described above, can be made by a person of ordinary skill in the art, having the benefit of this disclosure, without departing from the spirit and scope of the invention defined in the following claims, the scope of which is to be accorded the broadest interpretation so as to encompass such modifications and equivalent structures.