Abstract:
Computer system information prompting a reconfiguration of a target device that is part of the system is received, and in response to the information, the target device is reconfigured using configuration data for the target device that has been stored in non-volatile memory of a second self-configuring device that is part of the system.

Description:
TECHNICAL FIELD 
     This invention relates to configuring devices in a computer system. 
     BACKGROUND 
     Special purpose integrated circuit chips, for example, typically cannot perform their normal functions until they are configured, which is usually done when the computer system is powered up or reset. Configuration information is usually stored on the device itself in non-volatile memory. For so-called programmable logic devices (PLD&#39;s) and field programmable gate arrays (FPGA&#39;s), the configuration information may be stored in a non-volatile memory located off the device. By changing the configuration information, the functions of the PLD&#39;s and FPGA&#39;s may be changed. 
     In some computer systems, the chips that need to be configured are part of a chipset and a local channel is provided to enable communication between the chips in a way that does not directly use and is not disruptive of the operation of the main system bus. The local channel can be called a local bus. 
     Typically the chips within the computer system must be customized to particular tasks, that is, configured to function as desired. One expensive way to configure a chip is to alter the chip hardware during construction, using, for example, bond pads or pin straps. 
     In another approach, the configuration is done based on data sent to the chip (for example, a PLD or an FPGA) on the system bus, e.g., during a reset cycle. This approach has the advantage that the chip may be customized to a particular application without hardwiring. In so-called “self-configuring” chips, the configuration instructions are kept in the chip&#39;s own non-volatile memory or non-volatile storage (NVS). Non-volatile storage is able to retain data in the absence of main power. There are many kinds of non-volatile memory, such as read-only memory (ROM), programmable read-only memory (PROM) and erasable programmable read-only memory (EPROM). Some types of battery-backed random-access memory (RAM) also may be considered to be non-volatile. 
     If a chip is not self-configuring, it receives its configuration instructions over a communications channel or bus from an external source. Configuration activity occurring on the bus may be referred to as the “configuration bus cycle.” 
     SUMMARY 
     In general, in one aspect, the invention features storing configuration data for a target device in non-volatile memory of a second self-configuring device. The target device and the second self-configuring device are a part of a computer system. The invention further features receiving computer system information prompting a reconfiguration of the target device, and in response to the information, reconfiguring the target device using the configuration data. 
    
    
     The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims. 
     DESCRIPTION OF DRAWINGS 
     FIG. 1 is a block diagram of an implementation of the invention. 
     FIG. 2 is a flowchart showing steps in various implementations of the invention. 
     FIG. 3 is flowchart showing steps in various implementations of the invention. 
     FIG. 4 is a flowchart showing steps in various implementations of the invention. 
     FIG. 5 a block diagram of an implementation of the invention. 
    
    
     Like reference symbols in the, various drawings indicate like elements. 
     DETAILED DESCRIPTION 
     Some implementations of the invention include groups of chips in a chipset, where at least one chip in the chipset has some form of non-volatile storage. In response to a reset signal, the chip with NVS configures itself and also supplies the configuration data to configure other chips in the chipset using a configuration bus cycle. The self-configuring chip may configure multiple chips in a chipset directly. The self-configuring chip may also configure another chip, which in turn may provide configuration data to another chip in the chipset. The configuration data are provided on a local bus, making the configuration process invisible to the system and the user. 
     In one implementation, shown in FIG. 1, integrated circuit chips  12 ,  18 ,  20 ,  22  form part of a chipset  10 . One chip  12  in the chipset has non-volatile storage  14 , making it an NVS device. The NVS device  12  includes within its non-volatile memory  14  information or instructions  15  for configuring the NVS device  12  and-other non-NVS devices  18 ,  20 ,  22  in the chipset  10 . The information or instructions  15  within non-volatile memory  14  include configuration data for the chipset  10 . 
     After receiving a reset signal  17  from the computer system (not shown), the NVS device  12  places configuration data on a local bus  16  connecting the NVS device  12  with the non-NVS devices  18 ,  20 ,  22  in the chipset  10 . The NVS device  12  may also place configuration data on local bus  16  in response to requests for configuration data  19  placed upon the bus by the non-NVS devices  18 ,  20 ,  22 . Configuration data may be sent by the NVS device  12  on local bus  16  directly to each non-NVS device  18 ,  20 ,  22  in turn. Or, configuration data may be sent by the NVS device  12  on local bus  16  to one of the non-NVS devices  18 , which may in turn pass along configuration data to other non-NVS devices  20 ,  22  on a bus  24 . Bus  24  may be the same communication channel as bus  16 . 
     FIG. 2 shows a flowchart for a configuration bus cycle  30 . The cycle begins when a reset signal is sent ( 32 ), e.g., in response to a system power-up or as commanded by a user (many of my comments, such as the ones in this sentence, are stylistic). In response to the reset signal, the NVS device uses the configuration data stored within its non-volatile memory to self-configure  34 . The NVS device then places configuration data stored within its non-volatile memory on the bus  36 , and a non-NVS device uses this data for configuration  38 . Configuration of all devices is completed before the end of the reset cycle  40 . 
     FIG. 3 shows a flowchart for another kind of configuration bus cycle  50 . Steps  52  and  54  are like steps  32  and  34  of FIG.  2 . Unlike FIG. 2, in response to the reset signal, here it is the non-NVS device that places ( 56 ) a request for configuration data on the bus. The NVS device responds by placing the configuration data on the bus ( 58 ), which the non-NVS device uses-for configuration ( 60 ). Configuration of all devices is completed before the end of the reset cycle ( 62 ). 
     In another kind of configuration bus cycle, shown in FIG. 4, steps  72  and  74  are again like steps  32  and  34  of FIG.  2 . Step  76  is also like step  36  of FIG.  2 . In the implementation of FIG. 4, however, the first non-NVS device uses the data for configuration  78 . Then, the first non-NVS device places configuration data on the bus  80 . A second non-NVS device uses this data for configuration  82 . Configuration of all devices is completed before the end of the reset cycle  84 . 
     FIG. 5 shows the invention implemented within a computer system  90 . The system has central processor  92 , which is served by memory  94 . A communication channel or main system bus  96  connects the processor to other devices  98 ,  106  in the system. One of the devices  98  is an NVS device with non-volatile memory  100 , like chip  12  with non-volatile memory  14  in FIG.  1 . NVS device  98  is connected to non-NVS device  104  by a local bus  102 , like non-NVS device  18  is connected to NVS device  12  by a local bus  16  in FIG.  1 . Communication along local bus  102  is non-system-level communication. After receiving a reset signal  97  from the processor  92 , the NVS device  98  places configuration data on a local bus  102 . FIG. 5 also shows a non-NVS device  106  receiving the reset signal  97  from the system bus  96 . The non-NVS device  106  may request configuration information from a device  110  with non-volatile storage  112 . The devices  106  and  110  communicate on a local bus  108 . 
     Other embodiments are within the scope of the following claims.