Abstract:
The present disclosure provides systems and methods for configuring and constructing a single photo detector or array of photo detectors with all fabrications circuitry on a single side of the device. Both the anode and the cathode contacts of the diode are placed on a single side, while a layer of laser treated semiconductor is placed on the opposite side for enhanced cost-effectiveness, photon detection, and fill factor.

Description:
RELATED APPLICATIONS 
       [0001]    The present application claims the benefit of U.S. non-provisional application Ser. No. 12/399,827 filed on Mar. 6, 2009, which claims the benefit of U.S. provisional application No. 61/034,313 filed on Mar. 6, 2008 and both of which are hereby incorporated by reference in their entirety. 
     
    
     TECHNICAL FIELD 
       [0002]    The present disclosure relates to enhanced absorption semiconductor diode structures and imagers. In particular, the present disclosure relates to laser-treated semiconductor diodes with single side electrical contact fabrication on silicon material. 
       BACKGROUND 
       [0003]    Conventional silicon wafers require a substantial absorption depth for photons having wavelengths longer than approximately 500 nm. For example, conventional silicon wafers having standard wafer depth (less than approximately 750 μm) cannot absorb photons having wavelengths in excess of 1050 nm. 
         [0004]    As such, designing pixels using conventional silicon requires a deep collection element for photons that have a wavelength greater than approximately 500 nm. If photons incident upon a surface of the wafer and traveling into its depth are absorbed in a region deeper than the effective field of these pixel elements, the absorbed photons can generate photoelectrons that wander (diffuse) to adjacent pixels causing cross talk and lower resolution. In photodetector arrays, and in applications using the same, this can result in a blurring effect and a loss of accuracy in spatially-dependent applications such as imaging equipment. Such wandering photoelectrons in field-free regions also have a high probability of recombining before pixel collection resulting in lower sensitivity and efficiency. 
         [0005]    CMOS imaging circuit can be characterized by a “device fill factor,” corresponding to the fraction of the overall chip area being effectively devoted to the pixel array, and a “pixel fill factor,” corresponding to the effective area of a light sensitive photodiode relative to the area of the pixel that may be used to determine the amount of silicon that is photoactive. The device fill factor in conventional devices is less than unity (1.0) because, as described above, a notable portion of the device beneath the pixel array area cannot be used for processing. 
         [0006]    Moreover, the pixel fill factor in conventional devices is typically substantially less than about 1.0 because, for example, bussing and addressing circuits are fabricated around the base substrate layers of a pixel. As such, the bussing and addressing circuits limit the amount of space available for photodetection circuitry. Such bussing and addressing circuitry also limit the acceptance cone angle for electrons directed towards an imaging array. 
         [0007]    Imagers can be front side illumination (FSI) or back side illumination (BSI). There are advantages and disadvantages to both architectures. In a typical FSI imager, incident light enters the semiconductor by first passing by a transistor and metal circuitry. The light, however, scatters off of the transistors and circuitry prior to entering the light sensing portion of the imager, thus causing optical loss and noise. A lens can be disposed on the topside of a FSI pixel to direct and focus the incident light to the light sensing active region of the device, thus partially evading the circuitry. BSI allows for smaller pixel architecture and a high fill factor for the imager, by allowing the transistors and circuitry to be located on the opposite of the where the incident light enters the device. This increase in fill factor and reduction in light scatter increases efficiency. 
       SUMMARY 
       [0008]    The present disclosure provides radiation-absorbing semiconductor devices and associated methods of making and using such devices. In one aspect, for example, a photosensing device including a bulk semiconductor material having a first side and a second side is provided. The first side includes a first region that may be doped with a first dopant or alternatively, the first region can include a laser treated region that is formed within the first region. The laser treated region can be formed within the first region such that charge carriers are collected on the second side of the bulk semiconductor material. The laser treat region can be formed in the first region by a pulsed laser while simultaneously being doped with a first dopant. In some aspects, the laser treated region may be an enhanced absorption region. The enhanced absorption region maybe devoid of laser processing, however, the region may show improved absorption response. The photosensing device may further include a second region formed on the second side of the bulk semiconductor material and doped with a second dopant. Alternatively, multiple regions maybe formed and doped on the second side of the bulk semiconductor material. It is contemplated herein that a third region doped with a third dopant may be formed on the second side of the bulk semiconductor material. Ohmic contacts may further be included in the device. A first ohmic contact may be disposed on said second side and in contact with the second region such that the second region is electrically coupled with the laser treated portion thereby forming a diode. A second ohmic contact can be disposed on the second side and in electrical communication with the laser treated portion via the bulk semiconductor material. In addition, the laser treated portion can be disposed near a depletion region, wherein the depletion region is formed by the bulk semiconductor material and the second region. The electrical communication between the second ohmic contact and the laser treated region can be induced by an electrical field created within the bulk semiconductor material. Implementations of the device may include one or more of the following features. The device may include a passivation layer disposed on said first side, the second side, or both. The passivation layer may be selected from the group consisting of oxides, nitrides, metals and semiconductors. In some implementations, the bulk semiconductor material and the laser treated portion are doped with a p-type dopant. In other implementations, the bulk semiconductor material and the laser treated portion may be doped with an n-type dopant. In instances where the device has a third dopant region, the third dopant may be opposite in polarity of the second dopant. 
         [0009]    The device may be operated at a bias of less than about 50V. In other implementations, the device may be operated at a bias of about 0V. The bulk semiconductor material may have a thickness of less than about 500 μm. In other implementations, the bulk semiconductor material has a thickness of less than about 50 μm. The laser treated portion may extend into the bulk semiconductor material to a depth of less than about 2 μm. In some implementations, the device may be disposed such that the first side is opposite of incident radiation such that radiation penetrates the second side prior to contacting the laser treated region. 
         [0010]    An array of photosensing devices is also contemplated herein. The array may include a plurality of photosensing devices as described above. The plurality of photosensing devices may have a fill factor greater than about 90%. In addition the first sides of the plurality of photosensing devices are disposed to form a substantially planar top surface exposed to incident radiation. The top surface may have enhanced absorption regions, wherein the enhanced absorptions regions have a surface area that this greater than about 80% of the total top surface area. 
         [0011]    In general, in another embodiment, a photosensing device may be provided. The photosensing device includes a bulk semiconductor material with a first and a second side, a laser treated region doped with a first dopant and disposed on the first side of the bulk semiconductor material, a first ohmic contact disposed on the second side of the bulk semiconductor material and in contact with a region doped with a second dopant, the region being electrically coupled with the laser treated region forming a diode, and a second ohmic contact disposed on the second side of the bulk semiconductor material in electrical communication with the laser treated region via the bulk semiconductor material. 
         [0012]    Implementations of the device may include one or more of the following features. The device may include a feature wherein the bulk semiconductor material is comprised of silicon. The device may exhibit a quantum efficiency greater than 80% for light wavelengths longer than 900 nanometers and the device has a material thickness less than 500 microns. In other implementations, the device may exhibit a quantum efficiency greater than 80% for light wavelengths longer than 900 nanometers and the device has a material thickness less than 100 microns. In yet other implementations, the device may exhibit a quantum efficiency greater than 80% for light wavelengths longer than 900 nanometers and the device has a material thickness less than 50 microns. The device may exhibit an absorptance greater than 80% for light wavelengths longer than 800 nanometers and has a material thickness less than 100 microns. The device may further be disposed such that light radiation is directly incident on the laser treated region on the first side of the bulk semiconductor material. 
         [0013]    In yet another aspect, a method of making a photosensing device includes the steps of providing a bulk semiconductor material; lasing the bulk semiconductor material; annealing at least a portion of the bulk semiconductor material and depositing a metal material on the bulk semiconductor material on the opposite side from the lased side. Alternatively, the method can provide steps that include providing a bulk semiconductor material; depositing a metal material on the bulk semiconductor material; lasing a side of the bulk semiconductor material that is devoid of the metal material; and annealing at least a portion of the bulk semiconductor material. 
         [0014]    In some embodiments, some or all of the traditional fabrication steps are completed before the laser processing step, allowing the laser step to become the final or a late step in the process. By making the laser step the final or a late step in the process, it would be unnecessary to insert partially processed material into a fabrication house, thereby increasing the amount of potential fabrication houses available to produce laser treated semiconductor diodes. 
         [0015]    In some embodiments, vertically stacking the laser treated semiconductor above a silicon integrated circuit in a back side illumination architecture provides a greater fill factor, in some embodiments almost or at 100% fill factor, and enables the laser processing step to be the final step or a late step since all or substantially all electrical contacts are located on the front side of the device and no or little additional back-side structure is required. 
         [0016]    Various aspects of the present disclosure may provide one or more of the following advantages. The present disclosure may be applied to photodiodes, phototransistors, CCDs, and photovoltaic solar cells including thin film solar cells. In some embodiments, the single sided front side contacts in a back side illuminated architecture allows a black silicon surface on the back side of the device to be easily passivated. Passivation may reduce surface recombination of charge carriers. A non-compromised blue response and enhanced infrared response may be provided. A laser treated surface (i.e. enhanced absorption region) that is not fully depleted may be provided and hence dark current can be reduced. Improved gain and quantum efficiency may be provided. A smaller RC constant may be provided and hence a faster response time may be achieved. A longer effective absorption length for light may be provided due to the textured laser treated surface. Backside surface recombination may be minimized and hence external quantum efficiency increased through the addition of another doped implant region at the laser treated surface region. These and other advantages will be more fully understood after a review of the following figures, detailed description, and claims. 
         [0017]    Other uses for the methods and apparatus given herein can be developed by those skilled in the art upon comprehending the present disclosure. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0018]      FIG. 1  illustrates a cross sectional area of an exemplary embodiment of a laser treated semiconductor diode with front-side metal contact pads; 
           [0019]      FIG. 2  illustrates a front view of a laser treated semiconductor diode with front-side metal contact pads; 
           [0020]      FIG. 3  illustrates an exemplary array of laser treated semiconductor diodes with front-side metal contact pads; 
           [0021]      FIG. 4  illustrates a cross sectional area of an exemplary embodiment of a laser treated semiconductor diode with front-side metal contact pads including an exemplary circuit diagram approximation of the diode in operation; and 
           [0022]      FIG. 5  illustrates an exemplary diagram of the field lines in a cross sectional area during operation of a laser treated semiconductor diode with front side metal contact pads. 
           [0023]      FIG. 6  illustrates an exemplary array of laser treated semiconductor diodes. 
       
    
    
     DETAILED DESCRIPTION 
       [0024]    In most of the disclosed embodiments, the photosensing diode contains a textured surface that is a laser-treated or processed region. The laser-treated region can improve the photo sensitivity of the device, enabling it to detect light having wavelengths from 200 nm-30 μm. This technology was developed and patented by Eric Mazur and James Carey, which can be found in U.S. Pat. Nos. 7,390,689; 7,057,256; 7,354,792; 7,442,629 which are incorporated by reference in their entirety. This technology has been coined the term of “Black Silicon.” 
         [0025]    In general, multiple steps are needed for combination designs (i.e. include electrical contacts on both sides of the substrate) which require additional lithography steps following the laser step to place contacts on the top-side. The top side is generally the side of a photo-responsive semiconductor device that is exposed to a source of light or electromagnetic radiation of interest, for example in a sensor or detector device. Thus, it is also called the “front side.” The additional lithography following the laser step limits the number of fabrication houses that can produce laser treated semiconductor diodes, because many fabrication houses do not allow re-entry of partially processed material. In many cases, the company that performs the lithography is a different company than the company that performs the laser step and the steps are performed at separate locations. The feature of placing both the anode and cathode contacts on a single side opposite a laser treated surface alleviates the above mentioned manufacturing concerns. The configuration presented in the disclosure below permits performing a laser treatment step with associated annealing step prior to the lithography steps. In other embodiments, the ability may be provided to fully fabricate a device (i.e. perform lithography step) on bulk material leaving the laser treatment step for the end. 
         [0026]    In addition, fill factor is an important parameter in area array image detector performance. Combination designs by their very nature require that contacts be placed on the top or front side of the detector, taking up space that could be used by the laser treated semiconductor layer for photon detection thereby reducing fill factor. In some embodiments, a device may be provided with a fill factor of greater than 90%. 
         [0027]      FIG. 1  illustrates a cross sectional area of an exemplary embodiment of a laser treated semiconductor diode  100  with front-side metal contact pads  110  and  112 . In the exemplary embodiment, the laser treated semiconductor diode  100  is an N-type diode, though persons skilled in the art will recognize that the diode  100  may be with other types (such as P-type, Schottky diodes, etc.). The exemplary laser treated semiconductor diode  100  has a back  102  and a front  104  side. The exemplary laser treated semiconductor diode  100  is arranged and disposed for back side illumination wherein the radiation is directly incident on the back side  102 . In some embodiments the exemplary laser treated semiconductor diode  100  may be arranged and disposed for front side illumination wherein the radiation is directly incident on the front side  104 . The exemplary laser treated semiconductor diode  100  contains a bulk layer of silicon  106  between the back  102  and the front  104  sides. In one embodiment, the bulk layer of silicon  106  may be less than 500 μm in thickness. In another embodiment, the bulk layer of silicon  106  may be less than 100 μm in thickness. In yet another embodiment the bulk layer of silicon  106  may be less than 50 μm in thickness. The bulk layer  106  may be doped with N-type doping, depending on the doping of the laser treated layer  108 . In the exemplary embodiment, the back  102  side is covered by a laser treated semiconductor layer  108  and connected to the bulk layer  106 . The laser treated semiconductor layer  108  may, in some embodiments, extend into the bulk semiconductor material to a depth of less than about 2 μm. The laser treated semiconductor layer  108  is photo active and has an increased sensitivity as compared to an undoped, untreated layer. In some embodiments, the laser treated semiconductor layer  108  may be referred to as an enhanced absorption region. In some embodiments, the laser treated semiconductor layer  108  may not cover the entire back  102  side of the semiconductor diode  100 . In the instance where the laser treated semiconductor layer  108  does not cover the entire back  102  side, there may be a non-enhanced absorption region. In some embodiments, the enhanced absorption region may have an area that is greater than 80% of the back  102  side of the semiconductor diode  100 . In another embodiment, the laser treated semiconductor layer  108  may be disposed on the front side  104  of the device. In some embodiments, the laser treated semiconductor diode  100  may include a passivation layer disposed on top of the laser treated semiconductor layer  108 . In other embodiments, a passivation layer may be disposed on the front side  104  of the device. The passivation layer may be formed from oxides, nitrides, metals, or semiconductors. The front  104  side may be connected to aluminum cathode  110  and anode  112  contacts and may be covered by a thin layer of SiO2 TEOS  114 . In some embodiments, the with front-side metal contact pads  110  and  112 , may be constructed from appropriate metal materials that can withstand annealing temperatures of at least 450 degrees C. In other embodiments, the metal contact pads  110  and  112  may be placed on the back side  102 . The front  104  side may also be doped using N-Type dopants  116  under the cathode contact  110  and P-type dopants  118  under the anode contact  112 . In some embodiments, the N-Type dopant may be sulfur. In other embodiments, there may additional types of dopant regions on the front  104  side of the laser treated semiconductor diode  100 . In embodiments where there are more than one type of dopant regions on the front  104  side of the laser treated semiconductor diode  100 , at least two of the dopant regions may be opposite in polarity to each other. In the present embodiment of  FIG. 1 , the laser treated semiconductor layer  108  on the back  102  side acts as a cathode, while the front  104  side P-type doped section  118  acts as an anode. Additionally, an embodiment is contemplated wherein the laser treated semiconductor diode  100  is devoid of ohmic contacts  110  and  112 . In some embodiments, the exemplary laser treated semiconductor diode  100  may exhibit a quantum efficiency of greater than 80% for radiation wavelengths longer than 900 nanometers. The quantum efficiency of greater than 80% for radiation wavelengths longer than 900 nanometers may be achieved in some embodiments where the laser treated semiconductor diode  100 , has a material thickness less than 100 microns. In other embodiments, the quantum efficiency of greater than 80% for radiation wavelengths longer than 900 nanometers may be achieved where the laser treated semiconductor diode  100  has a material thickness less than 50 microns. In addition, the exemplary laser treated semiconductor diode  100  may exhibit an absorptance greater than 80% for light wavelengths longer than 800 nanometers where the laser treated semiconductor diode  100  has a material thickness less than 100 microns. 
         [0028]      FIG. 2  illustrates a front view of a laser treated semiconductor diode  100  with front-side metal contact pads  110  and  112 . In the exemplary embodiment, aluminum contacts  110  and  112  are coupled to the back side  104 . The outer contact  110  is coupled to the N-type doping area of the back side  102  and acts as a cathode contact point for the diode  100 . The inner contact  112  is connected to the P-type doping area of the front  104  side and acts as an anode contact point for the diode  100 . Each of the bounded regions (e.g.,  112 ) in an array of such regions can act as a discrete pixel. For example, the regions  112  can each represent a pixel providing a color-sensing element in a color imager or a magnitude-sensing element in a monochromatic or gray-scale imager. In the exemplary embodiment, the anode contact  112  is electrically isolated from the cathode contact  110 . A diode using a front side contact configuration allows for single sided fabrication, reducing cost and reducing complexity of manufacture. Also, a diode using a front side contact configuration may be substantially fully fabricated before the laser step process is performed on the back side. Fabrication before the laser step removes the need to re-enter the material into the foundry after the laser step, eliminating the contamination risk typically associated with the re-entry of partially processed material and increasing the number of available fabrication partners. Also, a diode using a front side contact configuration may be laser processed and annealed prior to electrical contact fabrication, thus eliminating the risk of the annealing process affecting the electrical contacts. 
         [0029]      FIG. 3  illustrates an exemplary array of laser treated semiconductor diodes with front-side metal contact pads. In the exemplary embodiment, the cathode contacts  110  are all electrically connected and form a common-cathode configuration. In the exemplary embodiment, the cathode and anode connections are arranged in a grid pattern where the cathode contact  110  is configured in a square grid pattern and the anode contacts  112   a  and  112   b  are configured as individual square contacts within the cathode grid pattern  110 . An array using the above configuration may be vertically bonded to readout circuitry and create a fully functional imager. 
         [0030]      FIG. 4  illustrates a cross sectional area of an exemplary embodiment of a laser treated semiconductor diode with front-side metal contact pads including an exemplary circuit diagram approximation of the diode in operation. During operation, the cathode contact  110  may be positively biased in relation to the anode contact  112 . The bias voltage (“V-bias”) can be about 1 to 10 volts in some embodiments. In some embodiments the bias voltage can be less than about 5 volts. In other embodiments the bias voltage can be 0 volts. In some embodiments, the required bias voltage is substantially less than that in corresponding conventional devices. When the cathode is sufficiently positively biased, it will create an electric field that extends through the bulk layer  106  to the laser treated semiconductor layer  108  on the back  102  side, attracting the mobile electrons and depleting the laser treated semiconductor layer  108 . The anode contact  112  may be held negative with respect to the cathode contact  110  and the laser treated semiconductor layer  108 . During operation, the bulk layer  106  may be modeled as a series resistance  402  between the cathode contact  110  and the laser treated semiconductor layer  108 . While the electric field generated between the anode and the cathode by their P-N junction  404  has a small relative volume, the field generated by the P-N junction  406  between the laser treated semiconductor layer  108  and the anode contact  112  has a larger, or even significantly larger volume. Therefore, electron hole/pairs generated by photon absorption at or near the laser treated semiconductor layer  108  are separated in this field. The electrons travel to the cathode contact  110  through the laser treated semiconductor layer  108 , while the holes travel to the anode contact  112  through the field established by the P-N junction  406  between the laser treated semiconductor layer  108  and the anode contact  112 . 
         [0031]    While the exemplary diode shown was a P-N junction type diode, many other diode types may be implemented as discussed above, including Schottky diodes and P-type implementations. The p-type implementation may be implemented by reversing the dopant type throughout the diode and reversing the bias applied to the diode during use. The P-type implementation will function similarly to the N-type implementation except that the electron and hole flow paths will reverse direction. 
         [0032]      FIG. 5  illustrates an exemplary diagram of the field lines  119 , in a cross sectional area during operation of a laser treated semiconductor diode with front-side metal contact pads. Each field line represents a contour of equal voltage, or representing lines of equipotential. A tighter spacing of field lines indicates a stronger electromagnetic field. In semiconductors, a depletion region is often described as an area within the semiconductor in which mobile charge carriers have diffused away, or have been forced away by an electric field. Thus, the electric field lines  119  may form depletion regions near the laser treated semiconductor layer  108  sufficient for charge carriers from the laser treated semiconductor layer  108  to be swept away from the laser treated semiconductor layer  108  to collect at the contact  112 . 
         [0033]      FIG. 6  illustrates an exemplary array of laser treated semiconductor diodes  600  which collectively form an imager. The back sides of the laser treated semiconductor diodes are disposed to form a planar top surface of the array  600  which is to be exposed to incident radiation. The laser treated semiconductor diodes are photosensing devices which have a fill factor of greater than about 90%. The imaging array includes a laser treated portion  602 , a non-laser treated portion  604 , and trench isolation  606 . The laser treated portion  602  may also be referred to as an enhanced absorbing region. The non-laser treated portion  604  of the semiconductor material may still be an active absorbing region, but it is not considered an enhanced absorbing region. The trench isolation  606  helps prevent electrical current leakage and electrical and/or optical crosstalk between adjacent semiconductor diodes in the imaging array. In some embodiments the enhanced absorption region  602  may have an area that is greater than 70% of the total imaging area which includes the enhanced absorption region  602  as well as the non-enhanced absorbing region  604 , but not the trench isolation area  606 . In other embodiments, the enhanced absorption region  602  may have an area that is greater than 80% of the total imaging area. In yet other embodiments, the enhanced absorption region  602  may have an area that is greater than 90% of the total imaging area.