Abstract:
A wireless communication system receiver compensates a received signal containing an IQ gain imbalance prior to performing frequency correction. The IQ gain imbalance in the signal is estimated after frequency correction, providing an IQ gain imbalance estimate for subsequent IQ gain imbalance compensation. The IQ gain imbalance estimation includes formulating a plurality of hypotheses of phase error between I and Q signal components, and taking as the actual phase error the hypothesis that yields the maximum power ratio between I and Q signal components. The maximum power ratio is differentiated with respect to the IQ imbalance estimate. The IQ gain imbalance estimate is updated as a function of its prior value(s), the maximum power ratio, and the derivative of the maximum power ratio.

Description:
[0001]    This application claims priority to provisional patent application Ser. No. 60/953,491, filed Aug. 2, 2007, and incorporated herein by reference in its entirety. 
     
    
     FIELD OF THE INVENTION 
       [0002]    The present invention relates generally to wireless communications, and in particular to suppressing IQ gain imbalance in the presence of unknown IQ phase shift. 
       BACKGROUND 
       [0003]    Cellular wireless communication systems are well known in the art and widely deployed. The High Speed Packet Access (HSPA) Evolution track of Wideband CDMA (WCDMA) will provide dramatically increased data rates by combining multiple-antenna techniques and higher-order modulation. For example, in the downlink, 2×2 multiple-input, multiple-output (MIMO) transmission and 64-QAM modulation will be used, allowing up to triple the data rates achievable with current, single-antenna transmission and 16-QAM. It is expected that these peak data rates will be achievable in “good conditions,” where the propagation channel-induced interference and interference from other external sources is low. Instead, the receiver front-end impairments are expected to become the limiting factors. Such impairments are particularly troublesome since their impact cannot be removed by means of power allocation or interference coordination. When the desired Signal to Interference Ratio (SIR) at the antenna is made high, the RF impairments will become the dominant disturbance and cause error floors and/or throughput ceilings. Some typical such impairments are IQ imbalance, phase noise, DC leakage, quantization and thermal noise, etc. 
         [0004]    In order to take advantage of the MIMO and Higher Order Mode (HOM) features, it has been estimated that the overall receiver front-end output Signal to Noise Ratio (SNR) must be several dB higher, compared to that required for single-stream 16-QAM. Improving the quality of the RF circuitry in order to increase the output SNR increases the cost of the hardware considerably. This increase may be avoided or limited if the subsequent baseband processing stage could handle a lower-quality input signal, e.g. by performing additional operations to remove the impairment components. 
         [0005]    In a typical cost-efficient RF circuit design, one important front-end impairment is the IQ imbalance. The IQ imbalance can originate at several points in the receiver, such as the local oscillator (LO) (at both the transmitter and the receiver); the variable-gain amplifier (VGA) chain; the analog to digital converter (ADC); and also due to variations in the cut-off frequency in the I and Q selectivity filters, giving rise to undesired signal images. The different IQ imbalance contributions accumulate coherently and hence may comprise one of the most dominant RF impairments. The impact of the IQ imbalance can be reduced to an acceptable level by utilizing an RF design with sufficient quality. However, a lower-quality but more cost-efficient RF front end may be used if the IQ imbalance image component could be removed or significantly reduced by baseband processing. Copending U.S. patent application Ser. No. 11/832,695, filed Aug. 2, 2007, titled “IQ Imbalance Image Suppression,” assigned to the assignee of the present application, describes baseband IQ imbalance suppression, and is incorporated herein by reference in its entirety. 
         [0006]    In many applications, a wireless communication system receiver has a frequency error, or mismatch, relative to the transmitted carrier frequency. The frequency error is tracked and corrected using Automatic Frequency Controller (AFC) technology, which is well known in the art. However, if the frequency correction is performed after the introduction of IQ imbalance, which is typically the case for correcting the residual frequency error (e.g., up to 100 Hz, which is typically corrected digitally), prior art IQ imbalance compensation techniques, such as those described in the above-referenced application, do not yield sufficient IQ imbalance suppression. 
       SUMMARY 
       [0007]    According to one or more embodiments disclosed and claimed herein, a wireless communication system receiver IQ imbalance compensates a received signal containing an IQ gain imbalance prior to performing frequency correction. The IQ gain imbalance in the signal is estimated after frequency correction, providing an IQ gain imbalance estimate for subsequent IQ gain imbalance compensation. The IQ gain imbalance estimation includes formulating a plurality of hypotheses of phase error between I and Q signal components, and taking as the actual phase error the hypothesis that yields the maximum power ratio between I and Q signal components. 
         [0008]    One embodiment relates to a method of compensating for IQ gain imbalance in a received wireless communication signal, the received signal including in-phase (I) and quadrature (Q) signal components. A wireless communication signal having a gain imbalance and an unknown phase error between I and Q components and a frequency error between transmitter and receiver carrier frequencies is received. Gain compensation is performed on at least one of the I and Q signal components using the most recently computed IQ gain imbalance estimate. After the gain compensation, frequency correction is performed on the signal. After the frequency correction, the IQ gain imbalance estimate is updated. The updated IQ gain imbalance estimate is used to perform gain compensation on a successively received portion of the signal. 
         [0009]    Another embodiment relates to a method of successively estimating the IQ gain imbalance in a received signal by a wireless communication system receiver, following frequency correction of the signal. A plurality of hypotheses of a phase error between I and Q components of the received signal is formulated. The power ratio between I and Q components is estimated for each phase hypothesis. The maximum power ratio over all phase hypotheses is determined. The maximum power ratio is differentiated with respect to the IQ gain imbalance. A new IQ gain imbalance estimate is then generated based on a prior IQ gain imbalance estimate, the maximum power ratio, and the derivative of the maximum power ratio. 
         [0010]    Yet another embodiment relates to a wireless communication system receiver. The receiver includes memory operative to store an IQ gain imbalance estimate. The receiver also includes a first frequency correction unit receiving a communication signal, and operative to correct the signal for a known frequency error and to output a frequency-corrected signal. The receiver further includes a phase hypothesis unit receiving the frequency-corrected signal, and operative to formulate a plurality of hypotheses of a phase error between I and Q components of the frequency-corrected signal, and further operative to output a corresponding plurality of hypothesized signals, each assuming one of the plurality of phase hypotheses. The receiver also includes a controller operative to access the memory and receiving the plurality of hypothesized signals, the controller further operative to determine the maximum power ratio between I and Q components over all phase hypotheses, differentiate the maximum power ratio with respect to an IQ gain imbalance estimate, and generate and output an updated IQ gain imbalance estimate as a function of a prior IQ gain imbalance estimate, the maximum power ratio, and the derivative of the maximum power ratio. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0011]      FIG. 1  is a functional block diagram of a receiver depicting sources of IQ imbalance. 
           [0012]      FIG. 2  is a functional block diagram of a receiver performing IQ gain imbalance estimation after frequency correction. 
           [0013]      FIG. 3  is a functional block diagram of a receiver performing IQ gain imbalance estimation after frequency correction, where the previous frequency correction is eliminated for imbalance estimation purposes. 
           [0014]      FIG. 4  is a flow diagram of a method of calculating an IQ gain imbalance estimate for a frequency-corrected signal. 
       
    
    
     DETAILED DESCRIPTION 
       [0015]      FIG. 1  depicts an RF receiver  10  demonstrating several sources of IQ imbalance. The transmitted signal x t , received at the antenna  12 , may be modeled as r t e φ     t    or r t  Cos(ωt+φ t ) where the term φ t  represents an error in the transmitter LO which contributes to IQ imbalance. The received signal is front-end processed by the band-pass filter and low noise amplifier  14 , and In-phase (I) and Quadrature (Q) signal components are separated by multiplying by phase-offset periodic signals from the receiver LO at multipliers  16 ,  18 . A phase imbalance in the LO signals, represented by the δ term in Sin(ωt+δ) also contributes to IQ imbalance. Further IQ imbalance may be contributed by cut-off frequency variations in the I and Q low-pass filters  20 ,  22 , and still further IQ imbalance may arise from a gain imbalance γ in the I and Q VGAs  24 ,  26 . As depicted in  FIG. 1 , the complex output signal y t  may be expressed in terms of its In-phase and Quadrature components, I t +jQ t . Note that this signal includes the collective IQ imbalance from the sources discussed above. 
         [0016]    Using the notation defined above, the image rejection ratio (IRR)—a performance measure traditionally used to characterize the impact of IQ imbalance—is calculated as 
         [0000]    
       
         
           
             
               
                 
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         [0017]    Due to the linear nature of the IQ imbalance mechanism, the contributions of the transmitter and the various receiver stages, as depicted in  FIG. 1 , may be lumped together into a single term and treated jointly. IQ imbalances add as amplitudes, i.e., two IQ imbalance sources with 30 dB image rejection each give rise to a total (worst case, if the imbalances have same direction) 24 dB image rejection. In a typical RF architecture, the phase imbalance δ is smaller (yielding IRR&lt;−30 dB) than the gain imbalance γ (worst case IRR˜24 dB). Thus, it is most important to estimate and compensate for the gain imbalance γ. 
         [0018]    Also, in a practical receiver  10 , the LO carrier frequency often is not perfectly matched to the transmitted carrier frequency. Accordingly, a small frequency error Δ∫ (typically &lt;100 Hz) is introduced, as depicted in  FIG. 1 . Since Δ∫ is known, the received signal can be frequency corrected, or derotated, prior to the gain estimate, to remove the phase drift over time. However, the exact absolute phase cannot be determined and removed. 
         [0019]      FIG. 2  depicts a functional block diagram of the receiver  10 . The Gain Compensation Unit  30  performs IQ gain imbalance compensation—in the embodiment depicted, on the Q component of the received signal—prior to frequency correction of the signal in the Frequency Correction Unit  32 . The IQ gain imbalance estimation is performed after the frequency compensation, in an IQ Gain Imbalance Estimation Unit  37  comprising a Phase Hypothesis Unit  38  and Controller  40  accessing memory  42 . The reason for this order of operation is that, in a typical User Equipment (UE) receiver, the gain compensation and frequency correction are performed in (typically analog) RF circuits of the UE and the estimation is performed in (typically digital) baseband processing circuits. These circuits may be implemented in separate integrated circuit components, as depicted by the dashed line in  FIG. 2 . 
         [0020]    The frequency error Δ∫ is estimated in an Automated Frequency Controller Unit  34 , based on channel estimates H i  provided by a channel estimation unit  36  receiving the received communication signal, and is provided to the Frequency Correction Unit  32 . Assuming a small frequency error, the impact of Δ∫ can be approximated as a certain constant phase rotation φ over a small set of samples. The phase φ is typically not known in the IQ Gain Imbalance Estimation Unit  37 . According to one or more embodiments of the present invention, a number of phase hypotheses φ i  are formulated in the Phase Hypothesis Unit  38 , and signals assuming each of the hypothetical phase errors φ i  are analyzed in the Controller  40 . Mathematically, if the received signal after frequency error correction is y t  then 
         [0000]        z   t   i   =e   −jφ   ,y   t   ,i= 1, . . . , m    (2) 
         [0000]    where z t   i  is the signal assuming phase hypothesis φ i . In the case of a known phase φ i , an IQ gain imbalance estimate may be derived by estimating the power ratio of I and Q signal components over a number of chip samples (corresponding to, e.g., ½ to 2 slots). The IQ gain imbalance is then proportional to the square root of the power ratio. 
         [0021]    If the phase φ is not known, the power ratio Q i  is estimated for each phase hypothesis, and the ratios are compared to determine the phase hypothesis yielding the maximum ratio M n . That is, 
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         [0000]    where the index n is related to the power estimate at the n th  measurement time. 
         [0022]    The derivative of maximum power ratio M n  with respect to the IQ gain imbalance is then estimated as 
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         [0000]    and the IQ gain imbalance estimate is updated using the maximum power ratio M n  and its derivative: 
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         [0000]    These calculations are performed in the Controller  40 . The prior values of the IQ gain imbalance estimate γ n-1 ,γ n-2 , etc. and the maximum power ratio M n-1  may be stored in the memory  42 , which may comprise part of the Controller  40 , as depicted in  FIG. 2 , or may be externally accessed by the Controller  40 . Note that the equations above provide a specific example of one embodiment of IQ gain imbalance estimation following frequency correction. However, the present invention is not limited to this embodiment. In general, the IQ gain imbalance estimate may be calculated in numerous ways, as a function of γ n-k ,k=1,2, . . . and the values of 
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         [0023]      FIG. 3  depicts an embodiment that is advantageous when the frequency error is large relative to the time over which samples are taken for determining the power ratio. In this case, the frequency error could be assumed to be approximated with a constant phase. This will be the case, for example, when taking more than one slot data, and having a frequency error larger than 200 Hz. In this case the residual frequency error is too large to track the proper phase of the imbalance correction. Accordingly, in this case the frequency correction performed in the RF stage at block  32  is removed at block  44 . This yields a signal x t  with constant phase error but no rotation: 
         [0000]      x t =y t e jΔ∫t .   (7) 
         [0000]    To determine the correct phase for IQ gain imbalance estimation, phase error hypotheses are formulated as described above, yielding 
         [0000]        z   t   i   =e   −jφ     t     x   t   ,i= 1, . . . , m    (8) 
         [0000]    where z t   i  is the signal assuming phase hypothesis φ i . 
         [0024]    The flow diagram of  FIG. 4  depicts a method  50  of compensating a received communication signal for IQ gain imbalance, according to one or more embodiments of the present invention. Those of skill in the art will recognize that the method  50  is an iterative one, and is continuously performed. However, for the purpose of explication, the method may be said to “begin” when a newly received signal is compensated for IQ gain imbalance, based on the most recent IQ gain imbalance estimate (block  52 ). The signal is then frequency corrected for a known frequency error, such as Δ∫ computed by an AFC unit  34  (block  54 ). 
         [0025]    Following frequency correction, the IQ gain imbalance is estimated. Since the phase error between I and Q signal components is unknown, a plurality of phase hypotheses are formulated (block  56 ). The power ratio between the I and Q signal components is derived (block  58 ) for each phase hypothesis (block  60 ). The maximum power ratio over all phase hypotheses is then determined (block  62 ), and its derivative with respect to the IQ gain imbalance estimate is calculated (block  64 ). The IQ gain imbalance estimate is then updated as a function of its prior value, the maximum power ratio, and the derivative of the maximum power ratio (block  68 ). The updated IQ gain imbalance estimate is then used to compensate the received signal for IQ gain imbalance (block  52 ) prior to frequency correction (block  54 ), and the method repeats. 
         [0026]    Those of skill in the art will understand that  FIGS. 2 and 3  depict functional units, each of which implements a particular function. These units may be implemented in various embodiments as electronic circuits, software modules executing on a stored-program processor or digital signal processor (DSP), or firmware comprising various blends of circuits and software. Furthermore, the electrical circuits may be integrated or discrete, and the implementation of functionality into circuits or software may not follow the functional divisions depicted in the figures. The memory  42  accessed by the controller  40  may comprise one or more registers or latches, RAM (DRAM, SRAM, SDRAM, or the like), flash memory, EEPROM, or any other read/write memory technology known in the art. The memory  42  may reside within the controller  40  as depicted, or it may alternatively reside external to the controller  40 , with access across a memory bus, as well known in the art. 
         [0027]    The present invention may, of course, be carried out in other ways than those specifically set forth herein without departing from essential characteristics of the invention. The present embodiments are to be considered in all respects as illustrative and not restrictive, and all changes coming within the meaning and equivalency range of the appended claims are intended to be embraced therein.