Abstract:
A printed circuit board which is thin and incorporates a large-capacitance capacitor function and a manufacturing method thereof. In one embodiment, the printed circuit board manufacturing method includes forming inner layer conductor circuits on a core substrate; forming a recess part on the core substrate; housing, in a recess part, a planar capacitor device that is not resin molded and has electrodes on the surfaces on a shared side; interposing the same between insulator resin and conductor metal foil to heat pressurize the same for forming a multi-layer plate; forming via holes for electrically connecting an outer layer conductor circuit to the electrodes of the capacitor device; forming a conductor layer on them; and forming the outer layer conductor circuits on the surfaces of the multi-layer plate.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The present invention relates to a printed circuit board and a manufacturing method thereof. More specifically, the present invention relates to a multi-layer printed circuit board incorporating a capacitor function and a manufacturing method thereof.  
         [0003]     2. Description of Related Art  
         [0004]     With the higher performance of electronic equipment, the number of parts mounted on a printed circuit board is being increased. Due to the miniaturization of electronic equipment, the size of the printed circuit board is required to be further reduced. The area on which the parts can be mounted is being made smaller.  
         [0005]     With reduction of the parts in size, the density of surface mounting is becoming higher due to microfabrication of the conductor pattern of the printed circuit board.  
         [0006]     The increased number of leads of mounted parts, smaller pitch, increased wiring resistance with a higher multi-layer printed circuit board due to a growing number of mounted parts and finer lines, signal delay due to cross talk noise, heat generation, and malfunction of the equipment with these become problems.  
         [0007]     To solve these problems, the wiring length of parts need to be reduced. Specifically, there are proposed a method of burying the parts into a printed circuit board as well as of mounting the parts on the surface of the printed circuit board, and a method of incorporating a function equal to that of the parts into a printed circuit board using a high dielectric sheet material having a high dielectric constant and a paste material. Such techniques disclosed in Japanese Published Unexamined Patent Application Nos. 2002-100875 and Hei 6(1994)-69663 are known.  
         [0008]     According to the above related art, the formation of a recess part on the printed circuit board to incorporate a smaller chip part therein to is proposed. At present, the printed circuit board is required to be thinner. Although the chip part is being made smaller, its thickness cannot be sufficiently small, obstructing making the printed circuit board thinner.  
         [0009]     The smaller chip reduces the capacitance of a capacitor. It is difficult to respond to a request to make the capacitance larger.  
       SUMMARY OF THE INVENTION  
       [0010]     The present invention solves the foregoing problems and provides a printed circuit board which is thin and incorporates a large-capacitance capacitor function and a manufacturing method thereof.  
         [0011]     According to the present invention, a capacitor not resin molded is buried into a recess part formed on a core substrate. A large-capacitance capacitor can be incorporated into a thin printed circuit board.  
         [0012]     According to the present invention, a printed circuit board manufacturing method includes the steps of: forming inner layer conductor circuits on a core substrate; forming a recess part on the core substrate; housing, in the recess part, a capacitor device not resin molded; forming insulator layers and conductor layers on the core substrate housing the capacitor device to form a multi-layer plate; forming via holes for electrically connecting an outer conductor layer and electrodes of the capacitor device to form a conductor layer thereon; and forming the outer layer conductor circuits on the surfaces of the multi-layer plate.  
         [0013]     According to a preferred embodiment, the capacitor device has a planar shape, and anode and cathode electrodes are formed on the surfaces on the shared side.  
         [0014]     The size of the recess part is adjusted to be slightly larger than that of the capacitor not resin molded to obtain high part positioning accuracy. The resin for fixing parts do not need to be filled in the recess part, thereby reducing the number of processes.  
         [0015]     Preferably, in the printed circuit board, an unmolded and unpackaged capacitor device having a thickness of 300 μm or less is used as a capacitor part to be buried. The unpackaged capacitor device is thinner than the molded chip part. In the case of burying a chip part having the same capacitance, the printed circuit board can be thinner. The printed circuit board having the same thickness can incorporate a large-capacitance capacitor.  
         [0016]     Preferably, in the printed circuit board, the capacitor device to be buried in which the electrode portions are subject to copper plating or fixed copper foil having a thickness of 10 to 30 μm and surface roughness is optimized for bonding to the resin is used. The thickness of the electrode portions is 10 to 30 μm. When using a laser for forming via holes for connecting the electrodes to the conductor pattern of an upper layer, the via holes can be formed without damaging the electrodes. The surface roughness of the electrodes is optimized for bonding to the resin. No processes for increasing the bonding to the resin are necessary. The general printed circuit board manufacturing process can be performed from laser beam machining to plating.  
         [0017]     Preferably, the electrodes of the buried capacitor device are connected to the conductor pattern of the upper layer by the via holes. When the conductor pattern of the upper layer is an outer layer of the printed circuit board, the surfaces of the via holes filled by electrolytic copper plating or conductive paste are flat. Since their surfaces are flat, no voids are caused in solder used for connection to the parts mounted on the surface of the printed circuit board, enabling high-reliability connection.  
         [0018]     According to of the present invention, a capacitor device has a dielectric layer formed on at least one side of a planar metal substrate, an anode electrode formed on the dielectric layer, and a cathode electrode formed via a conductive film on the dielectric layer, wherein the anode electrode and the cathode electrode have a planar structure facing toward the shared side, and resin molding is not given. The capacitor device which is relatively simple in structure and which is preferable for thinning can be easily housed in the recess part of the core substrate to achieve thinning of the multi-layer plate.  
         [0019]     According to the present invention, it is possible to obtain a thinner printed circuit board by burying a planar capacitor device not resin molded into a recess part formed on a core substrate. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0020]      FIG. 1  is a cross-sectional view showing the structure of a printed circuit board according to an embodiment of the present invention;  
         [0021]      FIG. 2  is a cross-sectional view showing the structure of a capacitor device according to an embodiment;  
         [0022]      FIG. 3  is a diagram showing a printed circuit board manufacturing process according to an embodiment;  
         [0023]      FIG. 4  is a diagram showing a printed circuit board manufacturing process according to an embodiment;  
         [0024]      FIG. 5  is a diagram showing a printed circuit board manufacturing process according to an embodiment;  
         [0025]      FIG. 6  is a diagram showing a printed circuit board manufacturing process according to an embodiment;  
         [0026]      FIG. 7  is a diagram showing a printed circuit board manufacturing process according to an embodiment;  
         [0027]      FIG. 8  is a diagram showing a printed circuit board manufacturing process according to an embodiment;  
         [0028]      FIG. 9  is a diagram showing a printed circuit board manufacturing process according to an embodiment; and  
         [0029]      FIG. 10  is a cross-sectional view showing the structure of a capacitor device according to another embodiment. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0030]     The structure of a printed circuit board according to an embodiment of the present invention will be described below with reference to the drawings.  FIG. 1  shows the cross section of a printed circuit board.  
         [0031]     A printed circuit board has an unpackaged capacitor device  20 , a core substrate  30  housing the capacitor device, and buildup layers  40 A and  40 B. The core substrate  30  has a recess part  31  housing the unpackaged capacitor device  20  and plural conductor layers  32 A,  32 B,  32 C, and  32 D on the surfaces and inside thereof. The buildup layer  40 A is formed with via holes  41 A and a conductor circuit  42 . The conductor circuit  32 A on the surface of the core layer, the unpackaged capacitor device  20 , and a conductor circuit  42 A of the buildup layer are connected by via holes  41 A. The buildup layer  40 B is formed with via holes  41 B and a conductor circuit  42 B. The conductor circuit  32 D on the surface of the core layer is connected to the conductor circuit  42 B of the buildup layer.  
         [0032]     According to this embodiment, the buildup layers  40 A and  40 B are each formed of one layer. They can also be formed of plural buildup layers.  
         [0033]     As shown in  FIG. 2 , the capacitor device  20  is a planar capacitor not resin molded and has anode electrodes (first electrodes)  21 L and  21 R formed over a metal substrate  23  via a dielectric layer  24  and a cathode electrode (a second electrode)  22  formed over the dielectric layer  24  via a conductive polymer film  25 .  
         [0034]     The metal substrate  23  is a metal substrate of aluminum, tantalum, and niobium. The dielectric oxide film layer  24  of valve action metal is formed on the surface of the substrate  23 . The anode electrodes  21 L and  21 R, the conductive polymer film  25 , and the cathode electrode  22  are formed successively on the oxide film layer  24 . The cathode electrode  22  is formed of a graphite layer, a silver paste layer, and a copper metal plate, or of two layers of a graphite layer and a metal plating layer. Alternatively, it may be formed of a metal plating layer without a graphite layer.  
         [0035]     The first electrodes  21  and the second electrode  22  are each formed of a copper metal having a thickness of 10 to 30 μm in which surface roughness is optimized for bonding to the resin. Laser beam machining for forming the via holes  41 A on the first electrodes  21  and the second electrode  22 , as shown in  FIG. 1 , is easy. Its connectability is higher. The bonding properties to the buildup layer  40 A are increased.  
         [0036]     The first electrodes  21  and the second electrode  22  are electrodes having a planar structure. As shown in  FIG. 1 , the via holes  41 A can be easily formed to the electrodes  21  and  22 .  
         [0037]     In the capacitor device  20  shown in  FIG. 2 , the first electrodes  21  and the second electrodes  22  are formed on both sides (upper and lower surfaces) of the planar base metal  23 . Only the upper side is connected to the via holes  41 A. As shown in  FIG. 10 , the electrodes  21  and  22  may be formed on one side of the capacitor device.  
         [0038]     According to the embodiment shown in  FIG. 1 , the via holes are connected to the first electrodes  21 L and  21 R. The via holes may be connected to either one of them when no high frequency characteristic is required.  
         [0039]     As shown in  FIG. 1 , the via holes  41 A of the buildup layer  40 A are filled by electrolytic copper plating and conductive paste so that their surfaces are flat. No voids are caused in solder used for connection of the surface-mounted parts. The reliability of the connection of the surface-mounted parts to the printed circuit board is higher.  
         [0040]     Referring to FIGS.  3  to  9 , a printed circuit board manufacturing method according to this embodiment will be described. The drawings show the respective process states.  
         [0041]     In  FIG. 3 , a printed circuit board (referred to as the core substrate  30 ) as a core layer is formed. Any material of the core layer used for the printed circuit board may be used.  
         [0042]     In  FIG. 4 , the conductor circuits  32 A and  32 D are formed on the surfaces of the core layer  30 . A conductor  33  is formed in a recessing reference plane measuring part in the nearly center of the recessed part for the surface recessed for housing the unpackaged capacitor device. This enables processing of the recess part with high accuracy. According to this embodiment, the conductor circuits are formed by the subtractive method. They may also be formed by other known methods.  
         [0043]     In  FIG. 5 , after making reference plane measurement of the recessing in the conductor  33 , counter boring is performed corresponding to the thickness and size of the unpackaged capacitor device. As indicated by the dotted line of  FIG. 5 , the recess part  31  housing the capacitor device having a outer dimension of the capacitor device of +200 μm or less and a depth of +50 μm or less is formed on the core layer  30 .  
         [0044]     In  FIG. 6 , after arranging the capacitor device  20  in the recess part  31 , sheet-like interlayer insulator resin  43  and copper foil  44  are stacked on both sides of the core layer. The interlayer insulator resin  43  softened by press heating is filled in the recess part  31  by vacuum pressurization. The surface of the stacked printed circuit board is flattened. According to this embodiment, although the interlayer insulator resin  43  without any metal layers is stacked, resin copper foil can be also used.  
         [0045]     In  FIG. 7 , a CO2 laser is used to hole the via holes  41 A having a diameter of 0.08 to 0.15 mm reaching the first electrodes  21 L and  21 R and the second electrode  22  of the capacitor device  20  and the conductor circuits  32 A and  32 D of the surfaces of the core layer in the buildup layers  40 A and  40 B. A drill is used to hole a through hole  45  having a diameter of 0.15 to 1.0 for the through hole in the core substrate  30  and the buildup layers  40 A and  40 B.  
         [0046]     In  FIG. 8 , desmearing is performed to remove any laser beam machined residue on the first electrodes  21 L and  21 R and the second electrode  22  of the capacitor device  20  and the conductor circuits  32 A and  32 D on the surfaces of the core layer exposed by the CO2 laser beam machining. Electroless copper plating and electric copper plating are performed to form a copper film  50  having a thickness of 20 to 30 μm.  
         [0047]     According to this embodiment, a plating solution for via filling is used for electric copper plating to flatten the surfaces of the via holes by electric copper plating. Resin filling is performed after the electric plating to flatten the surfaces of the via holes. In this case, the filled resin is exposed on the via holes. When performing soldered connection, the electric copper plating needs to be performed again after the resin filling.  
         [0048]     In  FIG. 9 , a photosensitive dry film resist is laminated on the surface of the multi-layer plate to place a photo mask for exposure. Then development and etching are performed to form the outer layer conductor circuits  42 A and  42 B for removing any conductor such as copper foil of the unnecessary portion.  
         [0049]     As described above, a printed circuit board incorporating a capacitor function can be fabricated. It is possible to prevent the increased number of leads of mounted parts, an IC with a small pitch, fine patterning due to a growing number of parts, increased wiring resistance with a higher multi-layer printed circuit board, and signal delay due to cross talk noise, heat generation, malfunction, and lack in the surface-mounted area. The surfaces of the via holes connected to the surface of the printed circuit board are flat. Therefore high-reliability connection to the surface-mounted parts is enabled.  
         [0050]     The unmolded and unpackaged capacitor device having a thickness of 300 μm or less is used as the capacitor part to be buried, so the printed circuit board can be thinner. The large-capacitance capacitor can be incorporated, allowing the number of parts to be reduced.  
         [0051]     The electrode portions of the unpackaged capacitor device to be buried are subject to copper plating having a thickness of 10 to 30 μm in which surface roughness is optimized for bonding to the resin. The difference in thickness between the anode portion and the cathode portion is 50 μm or less. The via hole formation is easy and stable. Accordingly high-reliability connection is enabled, and the contact of the unpackaged capacitor device to be buried to the insulator resin is high.