Abstract:
A multi-band focal plane array architecture operative to detect multiple spectral image. The multi-band focal plane array architecture has an integrated readout circuit, a plurality of first detectors integrated in the readout circuit and a plurality of second detectors deposited on the readout circuit. Preferably, the first detectors are operative to detect visible signals and the second detectors are operative to detect infrared signals. The first and second detectors are arranged in a checkerboard pattern, in alternate rows or columns, or at least partially overlapped with each other to realize simultaneous detection in two different wavelength bands. The architecture may also have an additional integrated readout circuit flip-chip bonded to the integrated readout circuit. By forming a plurality of third detectors on the additional integrated readout circuit, a tri-band focal plane array may be realized. In one embodiment, a dual-band focal plane array architecture by forming two arrays of detectors on two individual integrated readout circuit and flip-chip bonding these two readout circuits.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     Not Applicable 
     STATEMENT RE: FEDERALLY SPONSORED RESEARCH/DEVELOPMENT 
     Not Applicable 
     BACKGROUND 
     The present invention relates in generally to a focal plane array, and more particularly, to a multi-band focal plane array (FPA) architecture. 
     The military has multiple needs for day and night surveillance and reconnaissance. The ultimate goal of an optical imaging sensor is to achieve a high probability of detection of a target while simultaneously maintaining an acceptably low false alarm rate. As a target has a spectral reflectivity or emissivity that varies from the background or from clutter, it is often desirable to detect light from the target in two or more wavebands. Thereby, the target can be detected using the response in the two or three wavebands compared to the response of the focal plane array to the background or clutter in these wavebands. It is also desirable for performing target discrimination in one focal plane array instead of using separate focal plane arrays at elevated temperature. 
     Research has thus been intensely performed to realize a single focal plane array operative to detect a target over multiple spectral ranges. Currently, simultaneous multi-band detection for a single focal plane array is still limited within the infrared range, that is, many of the currently available detectors are only operative to perform simultaneous detection at long-wavelength infrared (LWIR), medium-wavelength infrared (MWIR), and short-wavelength infrared (SWIR) bands. In addition, many of these detectors are only operable while being cryogenically cooled. 
     BRIEF SUMMARY 
     A multi-band focal plane array architecture is provided to detect light in two or three wavebands simultaneously. The wavebands include visible wavelength band and short and medium infrared wavelength bands. The architecture may include a single integrated readout circuit and a focal plane array that includes visible detectors and infrared detectors arranged in checkerboard pattern or in alternate rows or columns. Alternatively, two integrated readout circuits each carry at least one array of detectors are flip-chip bonded to each other to provide multi-band detection and/or improved resolution in detection at a specific band. Preferably, the focal plane array architecture as disclosed uses silicon and IV-VI based photon detectors which are capable of operating at temperatures that do not require cryogenic cooling. 
     The focal plane array architecture as provided includes an M×N array of detector elements each having a substrate with a built-in readout circuit, at least one first detector integrated in the substrate at a first side thereof, and a second detector deposited on the first side of the substrate. The first detector includes a visible detector such as a CMOS detector or a CCD detector, while the second detector includes an IR detector operative to detect short or medium wavelength infrared light. When the first detector and the second detector are arranged side by side on the substrate, light at the visible range and the IR range incident on the substrate at the first side thereof, though being detected simultaneously, are not coincident. When the first detector and the second detector are vertically aligned with each other, light at the visible range and the IR range incident on the substrate at a second side opposite to the first side are expected to penetrate through the substrate and incident on the first detector. As the visible detector is transmissive to the IR wavelength range, the light will transmit through the visible detector and incident on the IR detector. Thereby, the visible light and the IR wavelength are coincident to the first and second detectors. In one embodiment, each of the detector elements may includes more than one visible detector to enhance the resolution of the detection in the visible wavelength range. 
     In the embodiment comprising two integrated readout circuits flip-chip bonded to each other, at least one array of detectors may be deposited on or integrated in each integrated readout circuit. When each of the integrated readout circuits comprises exactly one array of detectors operative to detect light at two different wavelength bands, a dual-band focal plane array is provided. The array of detectors can also be selected to detect the same wavelength bands of light with an improved resolution. In one embodiment, when one of the integrated readout circuits incorporates more than one array of detectors, detection at three different wavebands can be achieved. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       These and other features and advantages of the various embodiments disclosed herein will be better understood with respect to the following description and drawings, in which like numbers refer to like parts throughout, and in which: 
         FIG. 1  shows a first embodiment of a multi-band uncooled focal plane array architecture; 
         FIG. 2  shows a modification of the multi-band uncooled focal plane array architecture as shown in  FIG. 1 ; 
         FIG. 3  shows a second embodiment of a multi-band uncooled focal plane array architecture; 
         FIG. 4  shows a modification of the multi-band uncooled focal plane array architecture as shown in  FIG. 3 ; 
         FIG. 5  shows a hybrid dual band array architecture; 
         FIG. 6  shows a cross-sectional view of a first example of the hybrid duel band array architecture as shown in  FIG. 5 . 
         FIG. 7  shows a perspective view of a tri-band focal plane array architecture; 
         FIG. 8  shows a cross sectional view of a first example of the tri-band focal plane array architecture as shown in  FIG. 7 ; and 
         FIG. 9  shows a cross sectional view of a second example of the tri-band focal plane array architecture as shown in  FIG. 7 . 
     
    
    
     DETAILED DESCRIPTION 
       FIG. 1  shows a perspective view of dual-band focal plane array architecture in the form of a silicon-based readout integrated circuit (Si ROIC)  10  partitioned into an M×N array of Si-based readout elements  100 , where M and N can be any positive integer. Each of the Si-based readout elements  100  further includes a silicon substrate  101  in which a readout integrated circuit and interconnection are formed (not shown), a visible detector  102 , an IR detector  104 , and a metal bus  106  for buffering an IR signal generated by the IR detector  104 . As silicon is transmissive past 1.1 microns up to about 9 microns and operative to absorb light below 1.1 microns; while such light properties of silicon are not or are only slightly affected doping in the predefined wavebands, the visible detector  102  can be integrated in the form of Si CMOS detector in substrate  101  and fabricated by using any p-n junction available in the CMOS process. Depending on the desired waveband, the IR detector  104  may be made of lead sulfide (PbS) to absorb short-wave infrared (SWIR) light up to 3.0 microns or lead selenide (PbSe) to absorb medium-wave infrared light (MWIR) up to 5.0 microns or lead telluride to absorb medium wavelength light up to about 4.5 microns. The IR detector  104  is preferably deposited on silicon substrate  101 . The metal bus  106  is preferably in the form of a metal line formed on the silicon substrate  101  to serve as a common bias to all detectors on the focal plane array. Alternatively, bias can be supplied to each detector individually. Preferably, both the visible detector  102  and the IR detector  104  are operable at temperature higher than the cryogenic temperature. Therefore, a cryogenic system is not required to not only simplify the architecture, but also lower the cost of the architecture. Thus designed, both the visible wavelength band and the IR wavelength band of signals can be detected simultaneously. However, as the visible detector  102  and the IR detector  104  are arranged side by side on the substrate  101 , the visible wavelength band and the IR wavelength band of signals are not coincident. Further, as each of the readout elements  100  comprises the same numbers of visible detector  102  and IR detector  104 , the resolution for both visible and IR bands of light is the same. 
       FIG. 2  illustrates a modification of the multi-band focal plane array architecture as shown in  FIG. 1 . As shown, the modified focal plane array architecture includes a Si-based readout integrated circuit  10  partitioned into an N×M array of Si-based detector elements  100 . Each of the Si-based detector elements  100  includes a silicon substrate  101 , a readout integrated circuit formed in the substrate  101 , a plurality of visible detectors  102  integrated in the substrate  101 , and an IR detector  104  deposited on the substrate  101  and surrounded by the visible detector  102 . This design provides higher resolution of visible range than IR range to take advantages of the smaller diffraction limited blur in the visible range. Similar to the first embodiment, the visible detectors  104  may be in the form of silicon CMOS integrated in the corresponding readout element  100  by using p-n junction in any available CMOS process. Again, as buffers are required for both the visible and IR signals generated by the visible  102  and IR detectors  104 , it is relatively difficult to read out both with a CCD channel. 
     The multi-band focal plane array architectures as shown in  FIGS. 1 and 2  are operative to detect a light in the range of visible and IR wavelengths incident on the surface of the substrate on which the visible and IR detectors  102  and  104  are formed.  FIGS. 4 and 3  provide transmissive types of multi-waveband focal plane array architectures. As shown in  FIG. 3 , the IR detector  104  is deposited over the visible detector  102  integrated in the silicon substrate  101 . As the silicon-based visible detector  102  is transmissive to the waveband to be detected by the IR detector  104 , the radiation or light in visible and IR wavebands are coincident. As the light is incident from the rear surface of the readout integrated circuit  10 , metallization on the rear surface is required to prevent incident light from interacting with the readout circuits formed in the silicon substrate  101 . Openings in this back metallization will allow light to penetrate through the silicon substrate  101  such that it is incident only on the visible and IR detectors  102  and  104 . The metallization  102 A can be referred to the cross sectional view as shown in  FIG. 9 . The architecture as shown in  FIG. 3  includes the same number of the visible detectors  102  and IR detectors  104 , such that the visible resolution is substantially the same as the IR resolution.  FIG. 4  shows a modification of the multi-band focal plane array architecture as shown in  FIG. 3 . As shown, each of the readout elements  100  includes more visible detectors  102  than IR detector  104 , such that the visible resolution is higher than the IR resolution. In addition, the IR detector  104  is deposited over at least one of the visible detectors  102 , such that detection of visible light and IR light are coincident, but with different resolution. 
       FIG. 5  provides an embodiment of a multi-waveband focal plane array architecture having a flip-chip bonded or hybridized structure. As shown, the architecture includes two face-to-face readout integrated circuits  10 A and  10 B. The readout integrated circuits  10 A and  10 B are partitioned into an array of readout elements  100 A and  100 B, respectively. Each readout element  100 A includes a substrate  101 A, a lead salt detector  104 A formed on the substrate  101 A, and a metallization  106 A connecting the lead salt detector  104 A to the ROIC unit cell  100 B via metallization  108 B. Referring to the cross sectional view as shown in  FIG. 6 , to allow back illumination, that is, to allow light to penetrate through the substrate  101 A and incident on the lead salt detector  104 A, the substrate  101 A is thin and transparent. The lead salt detector  104 A includes a PbS detector or a PbTe detector operative to absorb and respond to medium wavelength IR light or short wavelength IR light. A passivation layer  110 A is formed on the thin transparent substrate  101 A and the lead salt detector  104  and other devices are formed on the passivation layer  110 A. Each of the readout elements  100 B includes a substrate of readout circuit  101 B, a lead salt detector  104 B such as a PbTe or PbSe detector for detecting medium wavelength IR light. Preferably, a passivation layer  110 B is formed on the substrate  101 B, and the lead salt detector  104 B formed on the passivation layer  110 B and is electrically connected to the readout circuit embedded in the substrate  101 B through a connecting pad  106 B and an interconnect bump  108 B extending through the passivation layer  110 B. The readout integrated circuit  100 A also includes at least one connecting pad  106 A connected to a conductive bump  16  such as an indium bump, so as to establish connection between the readout integrated circuits  10 A and  10 B. The architecture as shown in  FIGS. 5 and 6  is operative to detect coincident short-medium (below 4.5 microns) or short wavelength IR light incident on the lead salt detector  104 A and medium wavelength IR light extending through the readout integrated circuit  10 A. Therefore, the backfill material  116  introduced between the readout integrated circuits  10 A and  10 B is preferably transparent to at least the medium wavelength IR light. 
       FIGS. 7 and 8  depict a tri-band focal plane array architecture. In this embodiment, each of the readout integrated elements  100 A comprises at least one visible detector  102 A in the form of a silicon CMOS or a CCD embedded in or formed in the thin transparent substrate  101 A. When the visible detector  102 A is in the form of CCD as shown in  FIG. 8 , charge packets  118 A are formed and translated through the substrate of  10 A using clocked gate structures, and the CCD is only connected to the readout integrated circuit  10 B at a periphery thereof. The visible detector  102 A is at least partially overlapped with the IR detector  104 A deposited on the passivation layer  110 A, while the IR detector  104 A of the readout integrated circuit  10 A is aligned over the IR detector  104 B of the read integrated circuit  10 B, such that three bands of light, including visible light, short wavelength IR light and medium wavelength IR light can be coincidentally detected when the IR detectors  104 A and  104 B are made of different materials. In this embodiment, the passivation layer  110 A is a non-conductive material with a thickness sufficiently thick to isolate the IR detector  104 A from the CCD. The alignment between the visible detector  102 A, the IR detectors  104 A and  104 B is only required when the coincident characteristic is required. 
       FIG. 9  shows the architecture similar to that as shown in  FIG. 8  except from the visible detector  102 A. In this embodiment, the visible detectors  102 A are in the form of CMOS integrated in the readout integrated circuit  10 A, and the IR detectors  104 A and  104 B are deposited on the passivation layers  110 A and  110 B formed over the substrates  101 A and  101 B of the readout integrated circuits  10 A and  10 B, respectively. The CMOS visible detectors  102 A can use any p-n junction available in the CMOS process. The readout integrated circuits  10 A and  10 B are packaged in a flip-chip format as shown in  FIG. 9 . The space between the readout integrated circuits  10 A and  10 B is filled with a backfill material  116 , and conductive bumps  114  such as indium bumps are formed to extend through the backfill material  116 , so as to connect the readout circuits  10 A and  10 B. The CMOS visible detectors  102 A are interconnected with each other and/or with an internal readout circuit of the readout integrated circuit  10 A by column and row busses and interconnections such as the well junction connection leads  118 A. The active circuits of the CMOS visible detectors  102 A cannot be illuminated, such that backside metal  120 A blocks light from reaching these circuits, but with openings delineating the active areas of the visible detectors  102 A and the IR detectors  104 A and  104 B. The embodiments as shown in  FIG. 7  to  FIG. 9  provide a focal plane array architecture operative to simultaneously detect signals at three different bands, including the visible band, slow-wavelength IR band and medium-wavelength IR band. Preferably, the pixels of the visible detectors  102 A are formed to correspond to the pixels of the IR pixels such that the openings in the metal blocks  120  define the optically active areas coincide with the underlying visible and IR detectors  102 A,  104 A and  104 B. 
     In the focal plane array architectures as shown in  FIGS. 8 and 9 , lead sulfide (PbS) or lead telluride (PbTe) can be used to form the IR detectors active in the short- or short-medium-wavelength IR ranges, while lead telluride or lead selenide (PbSe) can be used to form the IR detector active in the medium-wavelength IR range. When the IR detectors  104 A and  104 B are made of the same materials, the focal plane array architectures as shown provide dual-band detection instead of tri-band detection. However, as two IR focal plane arrays are provided, the absorption of the IR band is increased, the sensitivity increased. Consequently, the noise is reduced by summation to get an effective root square increase in signal-to-noise (S/N) ratio. 
     The above description is given by way of example, and not limitation. Given the above disclosure, one skilled in the art could devise variations that are within the scope and spirit of the invention disclosed herein, including various ways of arranging the holes in the cladding region. Further, the various features of the embodiments disclosed herein can be used alone, or in varying combinations with each other and are not intended to be limited to the specific combination described herein. Thus, the scope of the claims is not to be limited by the illustrated embodiments.