Abstract:
The present invention relates to a low dropout regulator, and more particularly to a low dropout regulator without load capacitor and ESR (equivalent series resistance) designed in response to the discharge curve of a Li-ion battery, includes an input terminal, a reference circuit, a power transfer element, a level regulating device, a regulating circuit, and a first N-type MOSFET. The regulating circuit detects a load change at an output terminal, amplifies the load change, and couples it to the level regulating device. The level regulating device receives and boosts a received signal and transmits the received signal to the power transfer element, so as to achieve the effect of controlling the power of a power supply.

Description:
FIELD OF THE INVENTION 
       [0001]    The present invention relates to a low dropout regulator (LDO), and more particularly to a low dropout regulator without load capacitor and ESR (equivalent series resistance) designed in response to the discharge curve of a Li-ion battery. 
       BACKGROUND OF THE INVENTION 
       [0002]    When a Li-ion battery is used as a power supply, the voltage of the battery end will drop from 4.2V to 3.3V during the discharging process. Therefore, a voltage regulator is needed to regulate the battery voltage to a stable voltage for supplying to an electronic product. Hence, a low dropout regulator is most suitable for this purpose under the premise of reducing volume. 
         [0003]    However, conventional low dropout regulators, such as that disclosed in Taiwan Patent No. 200534070, often require external load capacitors to stabilize and boost transient response. Therefore, it has become a critical issue of developing a low dropout regulator that does not require external passive elements or requires only very few number of passive elements. For example, the following articles all discuss similar low dropout regulators:
   [1] IEEE Trans. on Circuits and Systems I: Regular Papers, Vol. 55, No. 5, pp. 61392-1401, June 2008;   [2] IEEE J. of Solid-State Circuits, Vol. 38, No. 10, pp. 1691-1702, October 2003; and   [3] IEEE J. of Solid-State Circuits, Vol. 40, No. 4, pp. 933-940, April 2005.   
 
         [0007]    However, all of the low dropout regulators proposed in the above articles may not be applied to a power supply with a relatively large input range. 
         [0008]    It is therefore tried by the inventors to develop a low dropout regulator that is designed to use a Li-ion battery as a power supply input, and to provide a stable voltage source given different load changes without any external load capacitor when working under different voltage inputs. 
         [0009]    The present invention may effectively reduce the chip manufacturing cost and be integrated on a chip easily. The present invention is an improved no-load-capacitor low dropout regulator. A preferred embodiment of the low dropout regulator according to the present invention has been implemented in a typical CMOS process. 
       SUMMARY OF THE INVENTION 
       [0010]    In view of the aforementioned problems of the prior art, the primary object of the present invention is to provide a low dropout regulator that receives an input power from a Li-ion battery or a rechargeable battery, and provides a stable voltage output given different loads. 
         [0011]    According to the object of the present invention, the low dropout regulator is provided, comprising a reference circuit, a power transfer element, a regulating circuit, and a lever regulating device. The reference circuit provides a comparing voltage and bias voltage sources to the regulating circuit and the level regulating device. The power transfer element provides different output power during switching between different loads. The regulating circuit detects a voltage change at the output terminal due to a load change, amplifies the voltage change, and transmits the amplified voltage change to the level regulating device; the regulating circuit also utilizes common gate amplification to add a compensating capacitor to achieve phase compensation so as to maintain the stability of the circuit. The level regulating device boosts the received signal based on the amplified voltage change and transmits the boosted signal to the power transfer element. 
         [0012]    The reference circuit comprises a biasing circuit, a voltage level circuit, and a transconductance amplifier. The biasing circuit provides other circuits with a working voltage that is not subject to temperature or system voltage variations. The voltage level circuit provides a voltage level for comparison. The transconductance amplifier receives and feeds back a voltage signal from the voltage level circuit. 
         [0013]    With the above arrangements, the low dropout regulator of the present invention attains the following advantages: 
         [0014]    (1) The low dropout regulator may be applicable to an input power from a Li-ion battery, and provides stable output power given different load changes without any external load capacitor. 
         [0015]    (2) The low dropout regulator is a circuit system not subject to variations in temperature and load voltage. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0016]    The structure and the technical means adopted by the present invention to achieve the above and other objects can be best understood by referring to the following detailed description of the preferred embodiments and the accompanying drawings, wherein 
           [0017]      FIG. 1  is a block diagram of an electronic device with a low dropout regulator according to the present invention; 
           [0018]      FIG. 2  is a circuit diagram of a low dropout regulator according to a preferred embodiment of the present invention; 
           [0019]      FIG. 3  is a circuit diagram of a reference circuit for the low dropout regulator of the present invention; 
           [0020]      FIG. 4A  shows an analog waveform obtained in an AC analysis of the low dropout regulator of the present invention when the load is 50 mA; 
           [0021]      FIG. 4B  shows an analog waveform obtained in an AC analysis of the low dropout regulator of the present invention when the load is 50 μA; 
           [0022]      FIG. 5A  shows an analog waveform obtained in a voltage transient analysis of the low dropout regulator of the present invention; and 
           [0023]      FIG. 5B  shows an analog waveform obtained in a current transient analysis of the low dropout regulator of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0024]    Referring to  FIG. 1 , a block diagram of an electronic device  1  with a low dropout regulator according to the present invention is illustrated. As shown in the figure, the electronic device  1  includes a power supply  110 , a low dropout regulator  120 , and a load  130 . Preferably, the power supply  110  is a Li-ion battery or a rechargeable battery providing a voltage source between 4.2˜3.3V. An unstable input power form the power supply  110  is converted into a stable output power by the low dropout regulator  120  in responsive to changes at the load  130 . The load  130  may be any circuit that requires a stable voltage source. 
         [0025]    Please refer to  FIG. 2 . A circuit diagram of a low dropout regulator according to a preferred embodiment of the present invention is illustrated. As shown in the figure, the low dropout regulator comprises a reference circuit  200 , a power transfer element  300 , a regulating circuit  400 , a level regulating device  500 , a first N-type metal-oxide-semiconductor field effect transistor (MOSFET) MN 203 , an input terminal  600 , and an output terminal  700 . Two bias voltages, Va and Vb, generated by the reference circuit  200  are sent to the level regulating device  500  and the transistor MN 203 , respectively. A comparing bias voltage V ctrl  also generated by the reference circuit  200  is output to the regulating circuit  400 . Preferably, the power transfer element  300  is a first P-type MOSFET MP 201  to achieve the effect of controlling the power of the output power to the output terminal  700 . Furthermore, due to the Miller effect, two poles are generated at the gate with a voltage V gate  and the drain of the first P-type MOSFET MP 201 . The source, the gate, and the drain of the first P-type MOSFET MP 201  are coupled to the input terminal  600 , the level regulating device  500 , and the regulating circuit  400 , respectively. 
         [0026]    Through an effect of common-gate amplification of a second P-type MOSFET MP 202 , the regulating circuit  400  amplifies a signal change of the output terminal  700  at the source of the second P-type MOSFET MP 202  and couples the amplified signal change to the drain with a voltage V gf . A compensating capacitor C 201  is connected between the source and the drain of the second P-type MOSFET MP 202  in the regulating circuit  400  to produce a dominant pole and a zero. Furthermore, the gate of the second P-type MOSFET MP 202  is coupled to the reference circuit  200  to receive the comparing bias voltage V ctrl ; the source of the second P-type MOSFET MP 202  is coupled to the output terminal  700  and the power transfer element  300 ; and the drain of the second P-type MOSFET MP 202  is coupled to the level regulating device  500  and the drain of the first N-type MOSFET MN 203  to transmit the drain voltage V gf  to the level regulating device  500 . 
         [0027]    The drain voltage V gf  is received and boosted by the level regulating device  500  for transmitting the boosted drain voltage V gf  to the power transfer element  300 . The level regulating device  500  comprises a third P-type MOSFET MP 204 , a fourth P-type MOSFET MP 205 , and a fifth P-type MOSFET MP 206 . The source, gate and drain of the third P-type MOSFET MP 204  are coupled to the input terminal  600 , the bias voltage Va, and a source of the fourth MOSFET MP 205 , respectively. The gate of the fourth P-type MOSFET MP 205  is coupled to the drain of the fourth P-type MOSFET MP 205  and the source of the fifth P-type MOSFET MP 206 . The gate and the drain of the fifth P-type MOSFET MP 206  are coupled to the V gf , and the drain being grounded, respectively. 
         [0028]    Please refer to  FIG. 3 . A circuit diagram of the reference circuit of the low dropout regulator according to the present invention is illustrated. As shown in the figure, the reference circuit  200  comprises a biasing circuit  310 , a voltage level circuit  320 , and a transconductance amplifier  330 . The first bias voltage Va and the second bias voltage Vb generated by the biasing circuit  310  are output to other circuits. A comparing voltage V ref  also generated by the biasing circuit  310  is output to the transconductance amplifier  330 . The voltage level circuit  320  uses a first resistor R 303 , a second resistor R 304 , and a third resistor R 305  to divide the voltage and outputs a voltage V f  to the transconductance amplifier  330 , and receives an output voltage V g  of the transconductance amplifier  330 , so as to output the comparing voltage V ctrl  to the regulating circuit  400 . The voltage level circuit  320  further comprises a first level P-type MOSFET MP 314 , a second level P-type MOSFET MP 315 , and a first level N-type MOSFET MN 316 . The second lever P-type MOSFET MP 315  with a common gate formation is serially connected between the first level P-type MOSFET MP 314  and the first level N-type MOSFET MN 316 . The comparing bias voltage V ctrl  is output from the gate of the second lever P-type MOSFET MP 315  to the regulating circuit  400 . The transconductance amplifier  330  may be any amplifier with an amplification function to amplify the comparing voltage V ref  and the voltage V f  to output the voltage V g . 
         [0029]      FIGS. 4A and 4B  show analog waveforms obtained in AC (alternating current) analysis of the low dropout regulator of the present invention when the load currents are 50 mA and 50 μA with a 4.2 V voltage source, respectively. When the load current is 50 mA, the loop gain and the phase margin of the low dropout regulator of the present invention are 83.5 dB and 74.3° respectively, as shown in  FIG. 4A . When the load current is 50 μA, the loop gain and the phase margin are 62.9 dB and 61.7°, as shown in  FIG. 4B . This indicates that the phase is always within 180° to ensure that the system circuit will operate stably without oscillating during switching between a light or a heavy load according to the  FIGS. 4A and 4B . 
         [0030]      FIGS. 5A and 5B  show analog waveforms obtained in voltage transient analysis and current transient analysis, respectively, of the low dropout regulator of the present invention. That is, the analog waveforms shown in  FIGS. 5A and 5B  are waveform at V out  output and waveform at corresponding load current switching, respectively, when the voltage source is 4.2 V. In  FIG. 5B , the load current is switched periodically from 50 μA to 50 mA with a 1 μs period. The output voltage V out  has a minimum voltage of 2.9154 V and a maximum voltage of 3.1197 V with an average voltage of 3.0163 V. 
         [0031]    To show the excellence of the present invention, the illustrated preferred embodiment of the low dropout regulator according to the present invention is implemented in a 0.18 μm 1P6M CMOS process. The following Table 1 compares the present invention with several prior arts. 
         [0000]    
       
         
               
             
               
               
               
               
               
               
             
               
               
               
               
               
               
             
           
               
                 TABLE 1 
               
             
             
               
                   
               
               
                 Comparison of Specifications 
               
             
          
           
               
                   
                 Load 
                 Input 
                   
                   
                   
               
               
                   
                 Capacitor 
                 Voltage 
                   
                 Line 
                 Load 
               
               
                   
                 (CL) 
                 (V in ) 
                 Gain 
                 Regulation 
                 Regulation 
               
               
                   
                   
               
             
          
           
               
                 [3] 
                 0.6 nF 
                     1.2 V 
                 N/A 
                 N/A 
                 N/A 
               
               
                 [1] 
                 None 
                 1.2~1.5 V 
                 58   
                   18 mV/V 
                 280 nV/mA 
               
               
                 Present 
                 None 
                 3.3~4.5 V 
                 62.9 
                 0.145 mV/V 
                 280 nV/mA 
               
               
                 invention 
               
               
                   
               
             
          
         
       
     
         [0032]    As can be seen from Table 1, with the present invention, it is not necessary to have any external load capacitor (CL), and the input voltage (V in ) may have an enlarged range. Furthermore, the gain, the line regulation and the load regulation of the present invention are also improved. 
         [0033]    The present invention may be applied to a no-load-capacitor linear voltage regulator connected to a Li-ion battery as a power supply. The present invention has been described with some preferred embodiments thereof and it is understood that many changes and modifications in the described embodiments can be carried out without departing from the scope and the spirit of the invention that is intended to be limited only by the appended claims.