Abstract:
Disclosed is an amplifier with which output signal distortion can be reduced, and deterioration in power efficiency can be reduced. The amplifier is provided with a power supply voltage control unit ( 11 ) that generates a voltage control signal from a simple envelope of an input signal in order to control a variable voltage power supply ( 12 ). The power supply voltage control unit ( 11 ) is composed of: a slope comparison processing unit ( 112 ) that calculates the slope required to generate a voltage control signal; a total delay time calculation unit ( 113 ) that calculates the sum of the delay times between the dots produced by the slope comparison process; and a voltage control signal generation unit ( 114 ) that generates a voltage control signal in such a manner that the waveform formed by the voltage control signal, which controls the variable voltage power supply ( 12 ), constitutes a waveform that reflects the selected slope or the sum of the slew rate and delay time. The voltage control signal is output to the variable voltage power supply ( 12 ) after being adjusted to match the timing at which the input signal is amplified by an amplifier unit ( 14 ).

Description:
TECHNICAL FIELD 
       [0001]    The present invention relates to an amplifier that amplifies the power of an input signal, and more particularly, to an amplifier that performs a source voltage control of a supply power source at a power amplifier stage of a signal. 
       BACKGROUND ART 
       [0002]    Conventionally, techniques of using a voltage-variable power source as a power source of an amplifier so as to reduce the noise superimposed on an output signal and to improve the power efficiency of the power source by changing a source voltage value supplied to a power amplifier stage to follow an input signal to an amplifier have been known. 
         [0003]    By changing the source voltage supplied to the power amplifier stage to follow the input signal level, the source voltage of the power amplifier stage can be lowered to a voltage value of an amplitude to such an extent that an amplified signal is not distorted, when an input signal has small power. Accordingly, it is possible to reduce noise superimposed on an output signal of the amplifier and thus to improve the power efficiency of a power source. 
         [0004]    In the case of an amplifier for a vehicle, since the installation space of the amplifier or the battery capacity is limited, a decrease in size and weight and a decrease in power consumption are desirable. When the power efficiency of the amplifier increases, it is possible to reduce the size or the number of components such as a heat sink necessary for heat radiation of ineffective power and it is also possible to suppress the power consumption of the amplifier. Accordingly, high power efficiency in an amplifier for a vehicle provides great merits. 
         [0005]    Conventionally, a voltage-variable power source in which a voltage source supplies a first drive voltage component following the amplified absolute value of an input reference was disclosed (for example, see PTL 1). 
         [0006]    A power amplifier is disclosed in which a digital buffer stores a copy of an input signal indicating a predetermined time interval and an envelope profiler analyzes the buffered interval of the input signal and determines a supply signal profile suitable for the amplifier during the predetermined time interval (for example, see PTL 2). 
       CITATION LIST 
     Patent Literature 
       [0000]    
       
         [PTL 1] JP-T-2007-508731 
         [PTL 2] JP-T-2007-511187 
       
     
       SUMMARY OF INVENTION 
     Technical Problem 
       [0009]    However, the conventional amplifiers have the following problems. 
         [0010]    That is, in the technique described in PTL 1, the source voltage is controlled using a value obtained by adding a fixed headroom to a value which is obtained by multiplying the absolute value of an input signal by a constant. However, when the fixed headroom is set to be low in advance and the input signal varies rapidly, the source voltage of the power amplifier stage does not follow the variation of the input signal and causes distortion of an output signal of the power amplifier stage. In addition, when the fixed headroom is set to be high on the assumption of a rapid variation of the input signal, there is a problem in that the power efficiency of the power source degrades. 
         [0011]    As described in PTL 2, a supply voltage signal may be created on the basis of a fixed slew rate of the voltage-variable power source to control the source voltage of the power amplifier stage. In this case, when the slew rate of the voltage-variable power source varies with a variation in load current and the slew rate of the voltage-variable power source is changed to a low value, there is a problem in that the output voltage of the voltage-variable power source does not respond to the supply voltage signal and distortion is caused in the output signal of the power amplifier stage. 
         [0012]    Therefore, the invention is made to solve the above-mentioned problems and a first object thereof is to provide an amplifier which can control a source voltage to follow an input signal, in which it is not necessary to consider the above-mentioned fixed headroom and it is possible to reduce distortion of an output signal and to reduce a degradation in power efficiency by enabling a control corresponding to the variation of a slew rate of a voltage-variable power source compared to conventional amplifiers. 
         [0013]    Alternatively, the invention is made to solve the above-mentioned problems and a second object thereof is to provide an amplifier which can control a source voltage to follow an input signal, in which it is possible to reduce a degradation in power efficiency by changing the headroom added to the source voltage to follow the input signal. 
       Solution to Problem 
       [0014]    To achieve the first object of the invention, there is provided an amplifier amplifying an input audio signal input to the amplifier and outputting an audio, including: a signal delay processing unit that outputs the input audio signal with a predetermined time delay; an amplifier unit that amplifies the signal output from the signal delay processing unit; a voltage-variable power source that supplies power to the amplifier unit; an envelope creating unit that creates an envelope of the input audio signal from the input audio signal; and a source voltage control unit that outputs a source voltage control signal to the voltage-variable power source on the basis of the envelope created by the envelope creating unit and controls an output voltage of the voltage-variable power source, wherein the source voltage control unit stores a slew rate of the voltage-variable power source, performs a source voltage control signal creating process of setting the slope of the source voltage control signal to the smaller of the slope of the envelope and the slew rate of the voltage-variable power source and creating the source voltage control signal when the slope of the envelope is positive, and outputs the source voltage control signal to the voltage-variable power source. 
         [0015]    Alternatively, to achieve the second object of the invention, there is provided an amplifier amplifying an input audio signal input to the amplifier and outputting an audio, including: a signal delay processing unit that outputs the input audio signal with a predetermined time delay; an amplifier unit that amplifies the signal output from the signal delay processing unit; a voltage-variable power source that supplies power to the amplifier unit; an envelope creating unit that creates an envelope of the input audio signal from the input audio signal; and a source voltage control unit that outputs a source voltage control signal to the voltage-variable power source on the basis of the envelope created by the envelope creating unit and controls an output voltage of the voltage-variable power source, wherein the source voltage control unit sets headroom on the basis of a signal level of the envelope, creates the source voltage control signal by adding the set headroom to the signal level of the envelope, and outputs the created source voltage control signal to the voltage-variable power source. 
       Advantageous Effects of Invention 
       [0016]    According to the invention, since it is not necessary to consider fixed headroom to be provided for a source voltage supplied to a power amplifier stage from a voltage-variable power source and it is possible to control the source voltage satisfactorily following an input signal even when the slew rate of the voltage-variable power source varies due to a load current variation or the like, it is possible to provide an amplifier which can reduce noise superimposed on an output signal, reduce distortion of the output signal compared to conventional amplifiers, and enhance power efficiency. 
         [0017]    Alternatively, according to the invention, since an audio signal output from the amplifier is not distorted in spite of a rapid increase in amplitude of an input audio signal from the vicinity of 0 and the headroom added to the source voltage can be reduced compared to conventional amplifiers as the amplitude of the input audio signal increases, it is possible to provide an amplifier which can reduce noise superimposed on an output signal and enhance power efficiency. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0018]      FIG. 1  is a block diagram illustrating a signal-following power amplifier according to a first embodiment of the invention. 
           [0019]      FIG. 2  is a flowchart of a signal delay processing unit  13  according to the first embodiment of the invention. 
           [0020]      FIG. 3  is a flowchart of a simple envelope creating unit  10  according to the first embodiment of the invention. 
           [0021]      FIG. 4  is a diagram illustrating an example of a simple envelope according to the first embodiment of the invention. 
           [0022]      FIG. 5  is a flowchart of a slope comparison processing unit  112  according to the first embodiment of the invention. 
           [0023]      FIG. 6  is a diagram illustrating an example of an inter-dot slope and an inter-dot delay time in the simple envelope according to the first embodiment of the invention. 
           [0024]      FIG. 7  is a flowchart of a total delay time calculating unit  113  according to the first embodiment of the invention. 
           [0025]      FIG. 8  is a flowchart of a voltage control signal creating unit  114  according to the first embodiment of the invention. 
           [0026]      FIG. 9  is a diagram illustrating an example of a voltage control signal according to the first embodiment of the invention. 
           [0027]      FIG. 10  is a block diagram illustrating a signal-following power amplifier according to a second embodiment of the invention. 
           [0028]      FIG. 11  is a flowchart of a headroom calculating unit  212  according to the second embodiment of the invention. 
           [0029]      FIG. 12  is a flowchart of a voltage control signal creating unit  213  according to the second embodiment of the invention. 
           [0030]      FIG. 13  is a diagram illustrating an example of a voltage control signal according to the second embodiment of the invention. 
       
    
    
     DESCRIPTION OF EMBODIMENTS 
     First Embodiment 
       [0031]    Hereinafter, an amplifier according to an embodiment of the invention will be described with reference to accompanying drawings. 
         [0032]      FIG. 1  is a block diagram illustrating the functions of the amplifier according to the embodiment of the invention. 
         [0033]    In  FIG. 1 , the amplifier  1  is connected to an audio device  2  outputting an audio signal of about a line level. 
         [0034]    The audio signal output from the audio device  2  is input as an input audio signal to the amplifier  1  and the power thereof is amplified by the amplifier  1 , and the resultant signal is output to a speaker  3 . The speaker  3  converts the input audio signal, which is supplied from the amplifier  1  and the power of which is amplified, into a sound and radiates the sound. 
         [0035]    The amplifier  1  and the audio device  2  are connected to a DC power source  4  supplying power necessary for operating them. Here, the power source necessary for operating the devices is not limited to DC power source, but AC power source may be appropriately used depending on characteristics of the devices. 
         [0036]    The audio device  2  and the amplifier  1  are collectively referred to as an audio output apparatus and the audio output apparatus and the speaker  3  are collectively referred to as an audio system. 
         [0037]    The amplifier  1  includes a simple envelope creating unit  10  as an envelope creating unit, a source voltage control unit  11 , a voltage-variable power source  12 , a signal delay processing unit  13 , and an amplifier unit  14  as a power amplifier stage. 
         [0038]    When an audio signal is input to the amplifier  1  from the audio device  2 , the input audio signal is input to the signal delay processing unit  13 . 
         [0039]    The signal delay processing unit  13  holds the input audio signal input to the amplifier  1  for a predetermined time every predetermined sampling period, and outputs the input audio signal of the predetermined sampling period to the simple envelope creating unit  10 . 
         [0040]    The signal delay processing unit  13  outputs the input audio signal of the predetermined sampling period held in the signal delay processing unit  13  to the amplifier unit  14  at the time at which a timing signal as a predetermined control signal is input from the source voltage control unit  11  of which details will be described later. That is, the time until the timing signal is input after the input audio signal is input to the signal delay processing unit  13  corresponds to the predetermined time. 
         [0041]    The simple envelope creating unit  10  creates a simple envelope to be described later from the input audio signal of the predetermined sampling period input from the signal delay processing unit  13 , and outputs information indicating the created simple envelope (simple envelope information) to the source voltage control unit  11 . 
         [0042]    The source voltage control unit  11  creates a voltage control signal on the basis of the simple envelope information input from the simple envelope creating unit  10  and controls the output voltage of the voltage-variable power source  12 . 
         [0043]    The voltage-variable power source  12  is a power source varying the output voltage to an arbitrary voltage value in response to the voltage control signal input from the source voltage control unit  11  and supplies the power (power source) of the output voltage value based on the voltage control signal to the amplifier unit  14 . 
         [0044]    The amplifier unit  14  is a D-class amplifier and serves to amplify the input audio signal of the predetermined sampling period input from the signal delay processing unit  13  with a degree of amplification A using the power supplied from the voltage-variable power source  12  and to output the amplified input audio signal to the speaker  3  connected to the amplifier  1 . 
         [0045]    Here, the source voltage control unit  11  can be embodied by a digital signal processor or a micro controller. The simple envelope creating unit  10  and the signal delay processing unit  13  can be embodied by a digital signal processor or a micro controller. 
         [0046]    Therefore, two or more of the source voltage control unit  11 , the simple envelope creating unit  10 , and the signal delay processing unit  13  may be embodied by a single digital signal processor or a micro controller. 
         [0047]    The detailed operation of the amplifier  1  having the above-mentioned configuration will be described below. 
         [0048]    When an audio signal is input from the audio device  2  to the amplifier  1 , the input audio signal is input to the signal delay processing unit  13 . 
         [0049]    The flow of processes in the signal delay processing unit  13  will be described with reference to the flowchart shown in  FIG. 2 . 
         [0050]    The signal delay processing unit  13  holds the input audio signal which is input for a predetermined time in a buffer circuit every predetermined sampling period, copies the input audio signal, and outputs the copied input audio signal of the predetermined sampling period to the simple envelope creating unit  10  (step S 201 ). 
         [0051]    The predetermined sampling period is a period of time defined by N digital audio signals sampled, for example, with a frequency of 44.1 kHz. Here, N is an integer. 
         [0052]    When a timing signal (details of which will be described later) is input from the source voltage control unit  11 , the signal delay processing unit  13  outputs the held input audio signal of the predetermined sampling period to the amplifier unit  14  (step S 202 ). 
         [0053]    Two paths of the input audio signal and the process of adjusting the timing of a signal in the two paths will be sequentially described below. A first signal path sequentially includes the signal delay processing unit  13 , the amplifier unit  14 , and the speaker  3 . A second signal path sequentially includes the signal delay processing unit  13 , the simple envelope creating unit  10 , the source voltage control unit  11 , and the voltage-variable power source  12 . 
         [0054]    First, the first signal path will be described with reference to the block diagram shown in  FIG. 1 . 
         [0055]    The input audio signal of the predetermined sampling period input from the signal delay processing unit  13  is input to the amplifier unit  14 . 
         [0056]    The amplifier unit  14  includes a PWM converter  141 , a gate driver  142 , a half bridge circuit  143 , and a low-pass filter  144 . 
         [0057]    The PWM converter  141  converts the input audio signal of the predetermined sampling period which is input into a PWM signal and outputs the PWM signal. A ΔΣ conversion method, a triangular wave comparison method, and the like are known as the PWM conversion method, and any of these methods can be used in this embodiment. 
         [0058]    The PWM signal output from the PWM converter  141  is input to the gate driver  142 . 
         [0059]    The gate driver  142  inserts a dead time into the input PWM signal, creates a drive signal obtained by shifting the potential of the PWM signal to such an extent to drive high-side and low-side high-speed switching elements  143   a  and  143   b  of the half bridge circuit  143 , and outputs the drive signal to the half bridge circuit  143 . 
         [0060]    The half bridge circuit  143  includes a high-side high-speed switching element  143   a  that is disposed on a high-potential power source side and that is supplied with a positive voltage from the voltage-variable power source  12  and a low-side high-speed switching element  143   b  that is disposed on a low-potential power source (or ground) side and that is supplied with a negative voltage from the voltage-variable power source  12 . 
         [0061]    The half bridge circuit  143  performs a switching operation based on the voltage amplitude determined by a positive voltage value and a negative voltage value in response to the drive signal input from the gate driver  142 , and creates an output PWM signal. An example of the high-speed switching element is a MOS field effect transistor. 
         [0062]    The output PWM signal created through the switching operation of the half bridge circuit  143  is filtered by the low-pass filter  144 , whereby the output PWM signal is converted into an analog audio signal and is then output to the speaker  3 . 
         [0063]    Then, the second signal path will be described. In the second signal path, when the input audio signal is input to the simple envelope creating unit  10  from the signal delay processing unit  13 , the simple envelope creating unit  10  performs the following processes. 
         [0064]    The operation of the simple envelope creating unit  10  will be described below with reference to the flowchart shown in  FIG. 3 . 
         [0065]    The simple envelope creating unit  10  creates a simple envelope for the input audio signal of the predetermined sampling period input from the signal delay processing unit  13 . Examples of the envelope creating method include known methods such as a maximum value holding method and a band-limiting method using an LPF. A simple envelope created using a simple method is exemplified herein. 
         [0066]    In describing the operation of the simple envelope creating unit  10 , x, N, and n are treated as integers and x is treated as a time. Each digital signal of the input audio signal is defined by data f(x) of time x, each digital signal in the created simple envelope is defined by data g(x) of time x, the predetermined sampling period including data of successive N points is defined as 1 frame, and the frames are processed as the n-th frame in the input order thereof. 
         [0067]    The simple envelope creating unit  10  determines whether x in the n-th frame of the input audio signal of the predetermined sampling period which is input satisfies (n−1)N&lt;x≦nN (step S 301 ), and calculates the absolute value |f(x)| of the input audio signal f(x) when it is determined that x satisfies (n−1)N&lt;x≦nN (step S 302 ). 
         [0068]    Then, the calculated |f(x)| is compared with a value obtained by multiplying the previous value |f(x−1)| by a coefficient a (step S 303 ), and the larger value is set as the simple envelope g(x) (steps S 304  and S 305 ). Then, xis updated (step S 306 ). 
         [0069]    Here, the coefficient a is a value used to determine the falling slope of the simple envelope g(x) and is determined from the falling slew rate of the output voltage when the load current in the voltage-variable power source  12  is the smallest. 
         [0070]    Since |f(x)| is always selected in the rise of the input audio signal f(x) through the processes of steps S 303 , S 304 , and S 305 , the simple envelope g(x) rises along the vicinity of the input audio signal f(x). 
         [0071]    In the fall of the input audio signal f(x), when the falling slope of the input audio signal f(x) is greater than the coefficient a, the simple envelope g(x) falls along the vicinity of the coefficient a. When the falling slope of the input audio signal f(x) is smaller than the coefficient a, the simple envelope g(x) falls along the vicinity of the input audio signal f(x). 
         [0072]    An example of the created simple envelope is shown in  FIG. 4 . A waveform expressed by a successive set of discrete digital signals is shown as an analog waveform in which the discrete digital signals are connected for the purpose of convenience in  FIG. 4 . 
         [0073]    By processing the input audio signal of the predetermined sampling period which is input as described above, the simple envelope creating unit  10  can obtain digital signals forming a waveform in which the rise is in the vicinity of |f(x)| and the fall is in the vicinity of the coefficient a, as indicated by the simple envelope g(x) in  FIG. 4 . 
         [0074]    The simple envelope is constructed by a successive set of discrete digital signals as shown in  FIG. 6 . The respective digital signals are defined as a dot. An inter-dot slope is calculated by an expression of “voltage value/time value” on the basis of the voltage value (vertical axis) of two successive dots and the time value (horizontal axis) calculated from the reciprocal of an inter-dot period used to calculate the simple envelope. 
         [0075]    The digital signals (simple envelope information) forming the simple envelope g(x) created by the simple envelope creating unit  10  is output to the source voltage control unit  11 . 
         [0076]    The source voltage control unit  11  creates a voltage control signal from the simple envelope information input from the simple envelope creating unit  10  as described below and outputs the created voltage control signal to the voltage-variable power source  12 . 
         [0077]    As shown in  FIG. 1 , the source voltage control unit  11  includes a slope comparison processing unit  112 , a total delay time calculating unit  113 , and a voltage control signal creating unit  114 . The simple envelope input from the simple envelope creating unit  10  is first input to the slope comparison processing unit  112 . 
         [0078]    The flow of processes in the slope comparison processing unit  112  will be described below with reference to the flowchart shown in  FIG. 5 . 
         [0079]    The slope comparison processing unit  112  first calculates the inter-dot slope of the dots defined by the digital signals forming the input simple envelope (step S 501 ). 
         [0080]    The inter-dot slope is calculated from the coordinate values in the voltage axis and the time axis of the anteroposterior dots. When the calculated slope is not positive, the calculated slope is output to the voltage control signal creating unit  114  (steps S 502 , S 506 , and S 508 ). 
         [0081]    When the calculated slope is positive, the slew rate, which corresponds to the difference in the voltage axis between the dots and the current value flowing in a load with the voltage value of the higher dot, of the voltage-variable power source  12  is selected from a data table (step S 503 ). 
         [0082]    Here, the data table includes voltage difference values between dots, a load current value with the voltage value of the higher dot, and the slew rate of the voltage-variable power source  12  corresponding to the two values and is stored in the slope comparison processing unit  112  in advance. Next, the slope calculated from the simple envelope is compared with the selected slew rate of the voltage-variable power source  12  (step S 504 ). 
         [0083]    When the slew rate is not smaller than the calculated slope, the calculated slope is selected and this value is output to the voltage control signal creating unit  114  (steps S 506  and S 508 ). 
         [0084]    When the slew rate is smaller than the calculated slope, the slew rate is selected (step S 505 ), an inter-dot delay time, which is a difference value in the time axis direction between the calculated slope and the slew rate, is calculated, this information is output to the total delay time calculating unit  113  (step S 507 ), and the slew rate is output to the voltage control signal creating unit  114  (step S 508 ). 
         [0085]    The inter-dot delay time is calculated as follows (see  FIG. 6 ). First, a difference value in the voltage axis between two dots and a slew rate of the voltage-variable power source  12  corresponding to the load current value with the voltage value of the higher dot are selected from the data table. 
         [0086]    Then, a difference in the time axis direction between the inter-dot slope of the simple envelope and the slew rate of the voltage-variable power source  12  when the voltage value varies from the lower dot of two dots to the higher dot is calculated. In this embodiment, this difference is defined as the inter-dot delay time. 
         [0087]    When the inter-dot slope of the simple envelope is greater than the selected slew rate of the voltage-variable power source  12 , the inter-dot delay time is generated. 
         [0088]    For example, as shown in  FIG. 6 , when dots of a voltage value d, a voltage value c, a voltage value a, and a voltage value b sequentially from the low voltage side in the simple envelope g(x) are considered, the inter-dot delay time is calculated as follows. 
         [0089]    That is, the inter-dot voltage difference (voltage value c-voltage value d) between the voltage value d and the voltage value c and the slew rate Sc corresponding to the load current when the voltage value of the higher dot (the voltage value c is the voltage value of the higher dot in this case) are applied to a load are selected from the data table, and the selected slew rate Sc and the inter-dot slope Gc between the voltage value d and the voltage value c are compared with each other. In this case, since the selected slew rate Sc is greater, the inter-dot delay time is not generated. 
         [0090]    The inter-dot voltage difference (voltage value a-voltage value c) between the voltage value c and the voltage value a and the slew rate Sa corresponding to the load current when the voltage value of the higher dot (the voltage value a is the voltage value of the higher dot in this case) are applied to a load are selected from the data table, and the selected slew rate Sa and the inter-dot slope Ga between the voltage value c and the voltage value a are compared with each other. In this case, since the selected slew rate Sa is smaller, the inter-dot delay time T 1  is generated. 
         [0091]    Similarly, the inter-dot voltage difference (voltage value b-voltage value a) between the voltage value a and the voltage value b and the slew rate Sb corresponding to the load current when the voltage value of the higher dot (the voltage value b is the voltage value of the higher dot in this case) are applied to a load are selected from the data table, and the selected slew rate Sb and the inter-dot slope Gb between the voltage value a and the voltage value b are compared with each other. In this case, since the selected slew rate Sb is smaller, the inter-dot delay time T 2  is generated. 
         [0092]    The total delay time in a predetermined sampling period is the total sum of the inter-dot delay times. In  FIG. 6 , a delay time is generated between the dots of the voltage value c and the voltage value a and between the dots of the voltage value a and the voltage value b, and “T 1 +T 2 ” is calculated as the total delay time. 
         [0093]    The operation of the slope comparison processing unit  112  is performed on the dots of the input audio signal of the predetermined sampling period. 
         [0094]    The total delay time calculating unit  113  to which the inter-dot delay time information is input performs the following processes. 
         [0095]    The flow of processes in the total delay time calculating unit  113  will be described below with reference to the flowchart shown in  FIG. 7 . 
         [0096]    The total delay time calculating unit  113  holds the inter-dot delay times input from the slope comparison processing unit  112  and calculates the total sum of the inter-dot delay times in a predetermined sampling period (step S 701 ). The calculated total delay time is output to the voltage control signal creating unit  114  (step S 702 ). 
         [0097]    The voltage control signal creating unit  114  having received the inter-dot slope and the slew rate from the slope comparison processing unit  112  performs the following processes. 
         [0098]    The flow of processes in the voltage control signal creating unit  114  will be described below with reference to the flowchart shown in  FIG. 8 . 
         [0099]    The voltage control signal creating unit  114  creates a non-delayed voltage control signal on the basis of the inter-dot slope input from the slope comparison processing unit  112  or the slew rate of the voltage-variable power source  12  (step S 801 ). 
         [0100]    Then, the non-delayed voltage control signal corresponding to the total delay time input from the total delay time calculating unit  113  from the start point of the non-delayed voltage control signal is deleted and a voltage control signal is created(step S 802 ). 
         [0101]    A timing signal is output to the signal delay processing unit  13  and the voltage control signal is delayed by an external delay time from the output of the timing signal and is then output to the voltage-variable power source  12  (step S 803 ). The external delay time is the width of a delay time generated by the PWM converter  141  and the gate driver  142 . 
         [0102]    An example of the voltage control signal created by the voltage control signal creating unit  114  will be described below with reference to  FIG. 9 . A waveform expressed by a successive set of discrete digital signals is shown as an analog waveform in which the discrete digital signals are connected for the purpose of convenience in  FIG. 9 . 
         [0103]    The voltage control signal creating unit  114  creates the voltage control signal as follows. First, the inter-dot slopes in the input simple envelope or the slew rates of the voltage-variable power source  12  are continuously connected to create a non-delayed voltage control signal. 
         [0104]    The non-delayed voltage control signal is a signal expressed by a waveform in which the voltage control signal and the voltage control signal corresponding to the total delay time “T 1 +T 2 ” connected before the start point of the voltage control signal are added in the drawing. Then, the non-delayed voltage control signal corresponding to the total delay time “T 1 +T 2 ” from the start point of the non-delayed voltage control signal is deleted. In this way, a voltage control signal of the same period as the predetermined sampling period is created as shown in the drawing. 
         [0105]    The voltage-variable power source  12  outputs a positive source voltage and a negative source voltage using the value of the voltage control signal from the voltage control signal creating unit  114  as a voltage target value. 
         [0106]    The positive source voltage is supplied to the high-side high-speed switching element  143   a  disposed on the high-potential power source side of the half bridge circuit  143  in the amplifier unit  14 . 
         [0107]    The negative source voltage is supplied to the low-side high-speed switching element  143   b  disposed on the low-potential power source side of the half bridge circuit  143  in the amplifier unit  14 . 
         [0108]    The process of adjusting the timing of two signal paths will be described below with reference to the block diagram shown in  FIG. 1 . 
         [0109]    The signal delay processing unit  13  delays the output of the input audio signal to the amplifier unit  14  by holding the input audio signal until a timing signal is input from the voltage control signal creating unit  114  after the input audio signal is output to the simple envelope creating unit  10 . 
         [0110]    When the voltage control signal creating unit  114  outputs the voltage control signal, the output of the voltage control signal is delayed by the external delay time, which is the sum of the delay times in the PWM converter  141  and the gate driver  142 , from the output of the timing signal. 
         [0111]    That is, the delay process of the signal delay processing unit  13  and the delay process performed at the time of outputting the voltage control signal from the voltage control signal creating unit  114  are used to adjust the time until the input audio signal is processed by the amplifier  14  and reaches the half bridge circuit  143  and the time until the input audio signal is processed by the source voltage control unit  11  and power is supplied to the half bridge circuit  143  from the voltage-variable power source  12 . 
         [0112]    In this way, since the timing of inputting the audio signal (input audio signal) input from the outside of the amplifier  1  to the amplifier  14  is adjusted, the source voltage of the amplifier  1  is controlled to appropriately follow a variation in level of the input audio signal. 
         [0113]    As described above, the invention includes the source voltage control unit  11  creating a voltage control signal from a simple envelope of an input audio signal to control the voltage-variable power source  12 . The source voltage control unit  11  includes the slope comparison processing unit  112  calculating the slope necessary for creating the voltage control signal, the total delay time calculating unit  113  calculating the total sum of the inter-dot delay times generated through the slope comparing process, and the voltage control signal creating unit  114  creating the voltage control signal so that the waveform formed by the voltage control signal controlling the voltage-variable power source  12  should be a waveform reflecting the selected slope or slew rate and the total delay time. The voltage control signal is adjusted to match with the timing at which the input audio signal is amplified by the amplifier unit  14 , and is then output to the voltage-variable power source  12 . 
         [0114]    Accordingly, by comparing the slew rate corresponding to the load current of the voltage-variable power source  12  with the inter-dot slope in the simple envelope of the input audio signal and reflecting the selected slope or slew rate and the total delay time in the voltage control signal as described above, it is possible to cope with the slew rate corresponding to the load current even when the load current of the voltage-variable power source  12  varies. By supplying the output voltage of the voltage-variable power source  12  controlled on the basis of the voltage control signal to the amplifier unit  14 , the audio signal is not distorted in the amplifier unit  14  and it is possible to keep the power efficiency high. 
       Second Embodiment 
       [0115]    Hereinafter, an amplifier according to a second embodiment of the invention will be described with reference to accompanying drawings. 
         [0116]      FIG. 10  is a block diagram illustrating the functions of the amplifier according to the second embodiment of the invention. 
         [0117]    In this embodiment, a voltage source control unit  21  is provided instead of the source voltage control unit  11  in the first embodiment. The voltage source control unit  21  includes a headroom calculating unit  212  and a voltage control signal creating unit  213 . The other configuration is the same as in the first embodiment and thus the configuration and operation thereof will not be described. Hereinafter, the configuration and operation in this embodiment will be described on the basis of the features of this embodiment. 
         [0118]    The amplifier  1  according to the second embodiment changes the value of a source voltage (set and apply the source voltage lowering the source voltage when the input audio signal is relatively low, and raising the source voltage when the input audio signal is relatively high) which is supplied to the amplifier  14  from the voltage-variable power source  12  to correspond to the variation in level (signal level of an envelope) of an input audio signal input to the amplifier  1 . 
         [0119]    When the “headroom” to be described below is not considered, the amplitude of an audio signal output from the amplifier  1  may become greater than the voltage value supplied from the voltage-variable power source  12  and the audio signal output from the amplifier  1  would be distorted, possibly. 
         [0120]    To what extent the source voltage output from the voltage-variable power source  12  can follow the voltage control signal input to the voltage-variable power source  12  is determined depending on the capabilities (such as the slew rate of the voltage-variable power source and the minimum output voltage) of the voltage-variable power source  12 . 
         [0121]    Accordingly, the source voltage output from the voltage-variable power source  12  needs to have a margin with respect to the amplitude of the audio signal output from the amplifier  1 . In the following description, the margin is referred to as headroom. 
         [0122]    As shown in  FIG. 11 , the voltage source control unit  21  includes the headroom calculating unit  212  and the voltage control signal creating unit  213 . The simple envelope information input from the simple envelope creating unit  10  is input to the headroom calculating unit  212  and the voltage control signal creating unit  213 . 
         [0123]    The flow of processes in the headroom calculating unit  212  will be described below with reference to the flowchart shown in  FIG. 11 . 
         [0124]    The headroom calculating unit  212  calculates headroom h(x) from a simple envelope g(x) at a time x input from the simple envelope creating unit  10 , the maximum value gmax of the simple envelope g(x), and the maximum value H of the headroom by the use of an expression h(x)=H×(1−g(x)/gmax) (step S 1101 ). 
         [0125]    In this embodiment, the process of calculating the headroom depending on the signal level of the envelope means a process of calculating the headroom h(x) through the use of the above-mentioned expression. 
         [0126]    Here, the maximum value gmax of the simple envelope is a value determined in advance from the degree of amplification A of the amplifier  14  through the use of the following expression, when the maximum voltage value output from the voltage-variable power source  12  is defined as Vmax and the output audio signal output from the amplifier  1  is controlled not to be a voltage value greater than or equal to Vmax. The expression is gmax=Vmax/A. 
         [0127]    The maximum value H of the headroom is expressed as H=Vmin/A from the minimum voltage value Vmin output from the voltage-variable power source  12 . 
         [0128]    The headroom calculating unit  212  outputs the calculated headroom h(x) to the voltage control signal creating unit  213  (step S 1102 ). 
         [0129]    The flow of processes in the voltage control signal creating unit  213  will be described below with reference to the flowchart shown in  FIG. 12 . 
         [0130]    The voltage control signal creating unit  213  creates a value, which is obtained by adding the simple envelope g(x) input from the simple envelope creating unit  10  and the headroom h(x) input from the headroom calculating unit  212 , as a voltage control signal k(x) (step S 1201 ). 
         [0131]    A timing signal is output to the signal delay processing unit  13  and the voltage control signal k(x) is delayed by the external delay time from the output of the timing signal and is output to the voltage-variable power source  12  (step S 1202 ). The external delay time means the width of a delay time generated in the PWM converter  141  and the gate driver  142 . 
         [0132]    An example of the created voltage control signal created by the voltage control signal creating unit  213  will be described below with reference to  FIG. 13 . A waveform expressed by a successive set of discrete digital signals is shown as an analog waveform in which the discrete digital signals are connected for the purpose of convenience in  FIG. 13 . 
         [0133]    As shown in  FIG. 13 , the simple envelope g(x), related to the input audio signal f(x), rises along the vicinity of the input audio signal f(x) and falls along the vicinity of the coefficient a. 
         [0134]    In the voltage control signal k(x), the headroom h(x) is added to the simple envelope g(x). As can be seen from the expression of the headroom h(x), the headroom h(x) takes the maximum value H when the simple envelope g(x) is 0, and the headroom h(x) takes 0.7×H when the simple envelope g(x) is 0.3×gmax. 
         [0135]    Accordingly,  FIG. 13  shows a wave form where the headroom h(x) takes H when the level of the input audio signal is 0, and as the level of the input audio signal increases from 0, the headroom h(x) becomes smaller than H. 
         [0136]    In the above description, the headroom is set from the calculation result using the signal level of an envelope when setting the headroom corresponding to the signal level of the envelope. However, the magnitudes (value or information indicating the value) of the headroom corresponding to the signal level of the envelope may be stored as a data table in advance and the magnitude of the headroom corresponding to the “detected signal level of the envelope” may be read from the data table to set the headroom when the signal level of the envelope is detected. 
         [0137]    As described above, the invention includes the source voltage control unit  21  creating a voltage control signal from a simple envelope of an input audio signal to control the voltage-variable power source  12 . The source voltage control unit  21  includes the headroom calculating unit  212  calculating the headroom necessary for creating the voltage control signal and the voltage control signal creating unit  213  creating the voltage control signal used to control the voltage-variable power source  12 . The voltage control signal creating unit  213  performs the process of adding the headroom, which is calculated depending on the signal level of the simple envelope by the headroom calculating unit  212 , to the simple envelope, adjusts the voltage control signal to match with the timing at which the input audio signal is amplified by the amplifier unit  14 , and then outputs the voltage control signal to the voltage-variable power source  12 . 
         [0138]    Accordingly, by changing the headroom to follow the input audio signal, when the amplitude of the input audio signal is rapidly increases from the vicinity of 0, the voltage control signal k(x) has a margin of about the maximum headroom H with respect to the input audio signal and thus the voltage value supplied to the amplifier unit  14  from the voltage-variable power source  12  is not lower than the amplitude of the audio signal output from the amplifier unit  14 . Since the headroom to be added to the source voltage can be reduced compared to conventional amplifiers as the amplitude of the input audio signal increases from 0, the audio signal in the amplifier unit  14  is not distorted and the power efficiency can be kept high by supplying the amplifier unit  14  with the output voltage of the voltage-variable power source  12  controlled by the voltage control signal. 
       INDUSTRIAL APPLICABILITY 
       [0139]    As described above, the invention can provide an amplifier amplifying power of an input signal, which can reduce distortion of the output signal to enhance power efficiency of the amplifier compared to conventional amplifiers, since it is not necessary to consider the headroom to be provided for the source voltage supplied to the power amplifier stage and it is possible to control the source voltage satisfactorily following the input signal even when the rising/falling slew rate of the power varies due to a load current variation. The amplifier according to the invention can be usefully used as an amplifier and the like controlling a source voltage of a supply power at a power amplifier stage of a signal. 
         [0140]    In addition, as described above, the invention can provide an amplifier amplifying the power of an input signal, which can enhance power efficiency of the amplifier, since an audio signal output from the amplifier is not distorted in spite of a rapid increase in amplitude of an input audio signal from the vicinity of 0 by changing the headroom to follow the input audio signal and the headroom added to the source voltage can be reduced as the amplitude of the input audio signal increases. The amplifier according to the invention can be usefully used as an amplifier and the like controlling a source voltage of supply power at a power amplifier stage of a signal. 
       REFERENCE SIGNS LIST 
       [0000]    
       
         
           
               1 : amplifier 
               2 : audio device 
               3 : speaker 
               4 : DC power source 
               10 : simple envelope creating unit 
               11 ,  21 : source voltage control unit 
               12 : voltage-variable power source 
               13 : signal delay processing unit 
               14 : amplifier unit 
               112 : slope comparison processing unit 
               113 : total delay time calculating unit 
               114 ,  213 : voltage control signal creating unit 
               212 : headroom calculating unit 
               141 : PWM converter 
               142 : gate driver 
               143 : half bridge circuit 
               144 : low-pass filter