Abstract:
An electrical conductivity measuring apparatus for measuring the electrical conductivity of liquid has a plurality of electrodes disposed in the liquid contained in a measuring cell, with an a.c. voltage being applied between the electrodes, thereby measuring the electrical conductivity by measuring a current flowing between the electrodes. The apparatus includes a reference a.c. voltage source including adjustment means for varying the magnitude and phase of the signal current, and is designed to cancel the conductivity of background by adding the current from the reference a.c. voltage source to the current from the electrodes.

Description:
BACKGROUND OF THE INVENTION 
     This invention relates to an apparatus for measuring the electrical conductivity of liquid, and particularly to an electrical conductivity measuring apparatus having a phase compensation circuit and suitable for the equipment based on a.c. voltage application. 
     Conventionally, a small change in the electrical conductivity of an electrolyte having a large electrical conductivity is measured by applying, to the background compensation resistor, a voltage equal in magnitude and opposite in polarity to the voltage applied to the measuring cell which contains the electrolyte, and by summing the output current from the resistor and the output current from the measuring cell. 
     This method is used mainly for measuring the electrical conductivity of a sample by detecting the variation of electrical conductivity of the solvent (electrolyte) before and after the sample is resolved in it. 
     In the above-mentioned conventional technique, the resistance of the resistor is adjusted before the occurrence of a small variation of electrical conductivity so as to nullify the output of the adder, so the varying component of the adder output is proportional to the varying component of electrical conductivity. 
     Techniques similar to the above-mentioned prior art are disclosed in JP-A-61-178457(U) and JP-A-62-167456, for example. 
     A method of measuring the electrical conductivity of solution based on d.c. voltage application is disclosed in JP-A-53-3872. This method is a 4-electrode method based on d.c. voltage application, and is said to be free from the variation attributable to the surface conditions of the electrodes and the influence of polarization phenomenon, allowing high accuracy measurement. The method is completely different in both principle and structure from the measuring method of the present invention. 
     A U.S. patent application Ser. No. 07/420,479 filed on Oct. 12, 1989 discloses an electrical conductivity measuring apparatus in which the above-mentioned resistor is adjusted automatically. 
     SUMMARY OF THE INVENTION 
     The conventional technique used with an electrical conductivity measuring apparatus based on a.c. voltage application described above unfavorably lacks the taking into consideration of the electrostatic capacity created around the measuring cell due to the polarization action, and therefore the measuring cell must be dealt with as a composite circuit of resistors and capacitors, instead of pure resistors. Consequently, there arises a phase difference between the application voltage and the current of the measuring cell, creating also a phase difference between the current flowing in the background compensation resistor and the current flowing in the measuring cell, and the output of the compensation circuit cannot be brought to zero through the adjustment of the background compensation resistor. 
     It is possible to nullify apparently the output of the compensation circuit by use of a rectifying means which rectifies the compensation circuit output in synchronism with the a.c. voltage applied to the measuring cell. The balance point obtained here differs from the case of zero amplitude resulting from the subtraction of an in-phase sinusoidal wave. That is, the balance point here is obtained when the d.c. component of a sinusoidal wave, which is out of phase by ##EQU1## with the synchronous rectification, falls to zero, the sinusoidal wave being formed by adding a sinusoidal wave of different phase to the cell current. Accordingly, a large a.c. signal remains and if the signal amplifier is set to have an increased gain for the high sensitivity analysis, the operational circuit of conductivity will have a problem of saturation. Moreover, in the conventional technique, in which a large signal is subjected to synchronous rectification, the variation of phase of this large signal develops a noise, and a high S/N ratio cannot be accomplished. 
     An object of this invention is to provide an electrical conductivity measuring apparatus capable of removing the background completely and performing the measurement of electrical conductivity of various electrolytes. 
     Another object of this invention is to provide an electrical conductivity measuring apparatus, the conductivity operational circuit of which is not saturated even if the cell signal amplifying circuit has a high gain, and therefore is suitable for use in the high sensitivity analysis, allowing the measurement of a small change of electrical conductivity of electrolyte having a large electrical conductivity. 
     A further object of this invention is to provide an electrical conductivity measuring apparatus which offers a high S/N ratio. 
     According to one aspect of this invention, in order to achieve the above objectives, the electrical conductivity measuring apparatus comprises a first generation means which is connected to a cell that contains electrolyte and generates a prescribed constant a.c. voltage to be applied to the cell; a synchronous rectifying means which is connected to the cell and rectifies an a.c. signal flowing through the cell; a second generation means which generates a compensation current for cancelling a background current, that flows through the cell, on the basis of the a.c. voltage, the compensation current being out of phase by π (180°) with the a.c. voltage; and a summing means which is connected between the cell and rectifying means and sums the background current and compensation current so as to cancel the background current; wherein the second generation means is provided with a means of correcting the phase of the compensation current in response to the phase deviation of the background current from the a.c. voltage. 
     According to a preferred embodiment of this invention, the phase correction for the compensation current is based on the principle of vectorial summation. Namely signals with the same frequency are summed, with the magnitude and phase of the addend signal being varied, and an arbitrary phase can be produced. 
     A compensation current equal in magnitude and out of phase by π (180°) with the a.c. current flowing through the measuring cell due to the application of the a.c. voltage is produced and it is added to the current from the cell, and the background current can be nullified in both d.c. and a.c. modes. 
     In the absence of the background current, the gain of the signal amplifier can be made higher, and a small cell current, i.e., a small change in the electrical conductivity in proportion to the cell current, can be measured. The signal after the background compensation or removal has no a.c. component, and a phase variation caused by synchronous rectification does not create a noise or drift. 
     The behavior of the inventive apparatus will be detailed. The prescribed a.c. voltage applied to the measuring cell is expressed as follows. 
     
         V.sub.C (ω)=V.sub.C sin ωt 
    
     where V C  is the peak value of the cell application voltage, ω is the angular velocity of the cell application voltage, and t is the time. 
     The current flowing through the cell is expressed as follows. 
     
         I.sub.CE (ω)=K σ V.sub.C sin (ωt+θ) 
    
     where K is a constant of proportion, σ is the electrical conductivity, and θ is a phase shift created by the electrostatic capacity of the cell. 
     When the electrical conductivity of the cell varies from σ to σ+Δσ, the cell current becomes as follows. 
     
         I.sub.CE (ω)=K (σ+Δσ)sin(ωt+θ) 
    
     Accordingly, the variation of cell current is proportional to the variation of electrical conductivity. For the high sensitivity measurement, the cell current needs to be amplified at a high gain. However, σ is incomparably larger than Δσ in general, and the amplifier cannot have a higher gain, since the operational circuit is saturated by the σ component. 
     On this account, a conventional manner of background compensation is to produce a signal for removing the σ component and subtract the signal from the cell current so that only the Δσ component is left remaining. The σ component removal signal is produced from the cell application voltage V C  (ω) using an inverting amplifier and resistors. 
     This method is based on the following equations for an electrical conductivity of σ. ##EQU2## where I O  is the output after compensation, and B is a proportional factor of the compensation current. 
     With the value of B being made variable and set to B=Kσ cos θ, α becomes equal to ##EQU3## and then, ##EQU4## 
     This equation reveals that I O  has its phase shifted by ##EQU5## relative to the phase of synchronous rectification. Accordingly, by taking synchronous rectification, its d.c. component is nullified, and the background can be compensated. In this connection, the synchronous rectification at this time is based on sin ωt, and it alternates the rectification phase angles of ωt=nσ (n=0, 1, 2, . . . ). 
     However, an a.c. component having an amplitude of V C  ·Kσsinθ still remains in the operational circuit. The value of θ is small in general and the amplitude can be made smaller as compared with the case before the compensation, although it imposes a problem with more sensitive measurement. 
     According to the present invention, a phase shift circuit is used to produce a signal to be added to V C  (ω) which signal differs in phase from V C  (ω) thereby to produce the compensation current Ico, as follows. ##EQU6## By varying the value of a and b, an arbitrary signal can be produced. Here, the signal is designed to have the same amplitude and different phase with respect to the background cell current, as follows. ##EQU7## By adding the compensation current to the cell current, both of the a.c. component and d.c. component can be nullified. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram showing an embodiment of the electrical conductivity measuring apparatus according to this invention; 
     FIG. 2 is a block diagram showing the internal arrangement of the conventional electrical conductivity measuring apparatus; 
     FIG. 3A is an idealized equivalent circuit of the measuring cell used in an electrical conductivity measuring apparatus; 
     FIG. 3B is a practical equivalent circuit of the measuring cell; 
     FIG. 4 is a vectorial diagram useful to explain the background compensation by the conventional electrical conductivity measuring apparatus; 
     FIGS. 5a-5d are signal waveform diagrams explaining the relation between the phase adjustment and the amplitude of various signals generated in the conventional electrical conductivity measuring apparatus; 
     FIG. 6 is a detailed schematic diagram of an example of the compensation current generation circuit indicated by 13 in FIG. 1; 
     FIG. 7 is a diagram useful to explain the operation of the compensation current generation circuit shown in FIG. 6; 
     FIGS. 8a-8h are signal waveform diagrams explaining the relation between the phase adjustment and the amplitude of various signals generated in the electrical conductivity measuring apparatus shown in FIG. 1; 
     FIG. 9 is a schematic diagram showing a specific example of the synchronous rectification gate signal generator shown in FIG. 1; 
     FIGS. 10a-10c are diagrams useful to explain the operation of the circuit shown in FIG. 9; 
     FIG. 11 is a block diagram showing another embodiment of this invention; and 
     FIG. 12 is a flowchart showing the operation of the controller shown in FIG. 11. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The present invention will be described with reference to the drawings. 
     FIG. 1 is a block diagram showing an embodiment of the inventive electrical conductivity measuring apparatus. In the figure, indicated by 1 is a measuring cell, 2 is electrolyte, 3 is a first electrode, 4 is a second electrode, 5 is a third electrode, 6 is a fourth electrode, 7 is a differential amplifier, and 8 is an application voltage generating circuit. A compensation current generation circuit 13 is made up of a phase shifter 9, a mixing ratio adjuster 10, an adder 11, and a background compensation value adjuster 12. The phase shifter 9, mixing ratio adjuster 10 and adder 11 constitute a phase correction circuit which corrects the phase of the compensation current. 
     Indicated by 14 is a current adder, 15 is a current-voltage converter, 17 is a synchronous rectification gate signal generation circuit, 18 is a synchronous rectification circuit which is known, and 19 is an output signal. The measuring cell 1 incorporates the electrodes 3-6 that are exposed to the flow of electrolyte 2. An a.c. voltage is applied to the first electrode 3 against the fourth electrode 6 which is at the ground voltage. 
     The output signal 19 is delivered through a filter and amplifier (not shown) to a calculation circuit (not shown), by which the electrical conductivity is calculated. 
     The application voltage generation circuit 8 is controlled by the output signal of the differential amplifier 7 so that the magnitude V C23  of potential difference 5 of the cell 1 is constant Accordingly, the differential amplifier 7 always produces an a.c. voltage of constant amplitude equivalent to the potential difference of the second and third electrodes 4, 5. 
     The current flowing out of the cell 1 is converted into a voltage by the current-voltage conversion circuit 15, and it is converted into a d.c. output 19 by the synchronous rectification circuit 18. 
     The following equations result. ##EQU8## where I C  is the cell current, σ is the electrical conductivity between the second and third electrodes 4, 5, and V C23  is the potential difference between the second and third electrodes. 
     Since V C23  is constant, σ is proportional to I C , and the electrical conductivity of electrolyte 2 can be evaluated by measuring the current of the cell 1. 
     In the case of measuring a small change in the electrical conductivity at high sensitivity, the measuring circuit needs to have an increased gain. However, if the electrical conductivity of the background before a change occurs is large, the cell saturated when the gain is simply raised. 
     Conventionally, as disclosed in the above-mentioned JP-A-61-178457(U) for example, a voltage which is equal in magnitude to the cell application voltage and having its polarity reversed by the inverting amplifier 16 is applied to the resistor 12, and the current from the resistor 12 is added to the cell current, as shown in FIG. 2. When the electrical conductivity of the resistor 12 becomes equal to that of the cell 1, the output of the current adder 14 goes zero and the successive circuit will not be saturated even if the gain is raised. This adjustment is named &#34;background compensation&#34;. After the &#34;background compensation&#34;, the current adder 14 has its output being proportional to the amount of change of the electrical conductivity. 
     The conventional measuring circuit (FIG. 2) operates correctly only in the case where the cell is represented by a pure resistor model as shown by the equivalent circuit of FIG. 3A. In a practical measuring cell, in which electric double layers and polarization create electrostatic capacity around the electrodes, the cell forms a composite circuit including resistors and electrostatic capacitances as shown in FIG. 3B. The values of electrostatic capacity depend on the concentration and type of electrolyte. 
     FIG. 4 shows the measuring operation based on the conventional background compensation stated above. In the figure, I CE  is the current flowing in the measuring cell, and it has a phase shift of θ relative to the cell application voltage. I CO  is the background compensation current, which is derived from the cell application voltage V C  and is different in phase by σ (180°) from it. When the amplitude of ICO is increased porgressively, the vector summation, i.e., the output I O  after background compensation has its phase angle rotated from θ toward I CO . At a point of rotation of ##EQU9## the output signal I O  is converted into a voltage and thereafter rendered the synchronous rectification, with the resulting waveform being shown by (d) in FIG. 5. 
     FIG. 5 shows a set of waveforms at various portions of the circuit shown in FIG. 2. In the figure, indicated by (a) is the waveform of the voltage converted from I O  , (b) is the waveform of the cell application voltage V C  (ω), and (c) is the waveform of the gate signal of synchronous rectification, in which the synchronous rectification circuit is controlled so that the phase of rectification alternates at phase angles nπ (n=0, 1, 2, . . . ) of the cell application voltage. FIG. 5 at (d) reveals that when synchronous rectification is conducted for I O  with its phase after background compensation being shifted by ##EQU10## from the phase of synchronous rectification, the output d.c component (i.e., mean value) is nullified, which is the behavior of the conventional background compensation. However, the background compensation current I CO  does not have a 180° phase deviation from the cell current, and therefore its a.c. component does not vanish, but remains as shown by I O  in FIG. 4 and at (d) of FIG. 5. 
     In contrast, according to the present invention, a phase shifter 9 is provided in the compensation current generation circuit 13 in FIG. 1 so that the compensation current and cell current have a 180° phase difference. 
     FIG. 6 shows a specific example of the compensation current generation circuit 13 in FIG. 1. In the figure, indicated by 20 is the cell application voltage produced by the differential amplifier 7 in FIG. 1, 21 is a resistor, 22 is a capacitor, 23 is a resistor, 24 is an operational amplifier, 25 is a potentiometer, 26 and 27 are resistors, 28 is a variable resistor, 29 is an operational amplifier, 30 is a resistor, and 31 is the compensation current. 
     The operational amplifier 24 forms a low-pass filter having a corner frequency set to the frequency of the cell application voltage, which is preferably 1 kHz. The corner frequency on the Bode diagram is known to have its phase angle shifted by 3/4π (135°), and accordingly the output of the operational amplifier 24 leads the cell application voltage by 135°. The operational amplifier 29 sums the output of the low-pass filter and the input signal on its inverting input terminal. The potentiometer 25 is used to vary the mixing ratio in summing the above-mentioned signals. 
     The operational amplifier 29 which sums two signals of different phases operates as a vector adder, and it produces an arbitrary signal with a phase range of 0 to 3/4π depending on the mixing ratio. The phase angle is adjusted so that the current as a result of mixing is coincident in phase with the cell current. Because of the inverting amplifier 29, the compensation current I CO  has a phase difference of π (180°) from the cell current I CE . 
     FIG. 7 is a vectorial diagram showing the relation of the foregoing currents. The cell current 70 is out of phase by θ with the cell application voltage V C  71. The low-pass filter output 72 is out of phase by 3/4π (135°) with the cell application voltage. The phase adjustment range of I CO  73 is from π to 7/4π. 
     Returning to FIG. 6, the variable resistor 28 is adjusted so that the cell current I CE  and compensation current I CO  is equal in amplitude and the I CO  and I CE  are summed, and both of the a.c. component and d.c. component can be nullified. 
     More specifically, in FIG. 8 which shows the relation of phase adjustment and the amplitude of various signals produced in various parts of the electrical conductivity measuring apparatus, the amplitude of the compensation current is adjusted first in the conventional manner so that the d.c. component is nullified as shown by (c) in FIG. 8 by following the following procedure. 
     Initially, the potentiometer 25 is adjusted so that the output current of the low-pass filter 24 flowing into the resistor 26 is brought to zero. Further, the synchronous rectification gate signal generator 17 is set up so that synchronous rectification alternates its phase at phase angles of nπ (n=0, 1, 2, . . . ) of cell application voltage. The synchronous rectification gate signal generator 17 will be explained later. With this condition, the variable resistor 28 is adjusted thereby to adjust the amplitude of compensation current, so that the mean value of the output signal of the synchronous rectification circuit whose input is provided by voltage conversion from I O , which is the result of summation of the cell current and compensation current, is nullified. The resulting relation among I O  (shown by (a) in FIG. 8), the phase of synchronous rectification (gate signal of synchronous rectification circuit shown by (b) in FIG. 8), and the synchronous rectification output provided by voltage conversion from I O  (shown by (c) in FIG. 8) is as shown in FIG. 8. Namely, the phase of I O  when the synchronous rectification output becomes zero is shifted by ##EQU11## relative to the phase of cell application voltage (i.e., phase of synchronous rectification). In this manner similar to the conventional method, a coarse adjustment for the compensation current is conducted in advance. Next, the phase of synchronous rectification is shifted by ##EQU12## 
     FIG. 8 shows by (d) the gate signal of the synchronous rectification circuit which produces the output as shown by (e) in FIG. 8. At this stage, the potentiometer 25 in FIG. 6 is adjusted so that the synchronous rectification output has its d.c. component nullified (as shown for its waveform by (f) in FIG. 8). These operations cause I O  to advance its phase by π (180°) relative to the cell application voltage, and consequently the compensation current I CO  has a phase shift of about 180° from the cell current. 
     Next, the phase of synchronous rectification is restored to 0π (0°), and the variable resistor 28 in FIG. 6 is adjusted so that the synchronous rectification output is nullified or minimized. FIG. 8 shows by (g) and (h) the gate signal and rectification output in this state. 
     By repeating the phase adjustment (FIG. 8 (d), (e), (f)) and compensation current adjustment (FIG. 8 (g), (h)), it is possible to bring the compensation current equal in magnitude to the cell current, and shift the phase by π (180°) from the compensation current. Consequently, the summed current I O  can be nullified in both d.c. and a.c. modes. 
     FIG. 9 shows a specific circuit arrangement of the synchronous rectification gate signal generator, and FIG. 10 shows the waveforms of the input and output signals of the circuit shown in FIG. 9. 
     In FIG. 9, indicated by 41 is a comparator having a non-inverting input terminal which receives the cell application voltage 20 and an inverting input terminal which has the ground voltage. Indicated by 42 is a delay circuit having a delay time corresponding to the phase angle of π/2 (0.25 ms when 1 kHz), and it is connected to the output of the comparator 41. An inverter 43 has its input terminal connected to receive the gate switching signal. An AND gate 44 receives the outputs of the comparator 41 and inverter 43. An AND gate 45 receives the outputs of the delay circuit 42 and the gate switching signal. An OR gate 46 which receives the outputs of the AND gates 44 and 45, and produces the synchronous rectification gate signal 47 on its output terminal. 
     The operation of the synchronous rectification gate signal generator 17 will be explained with reference to FIGS. 9 and 10. By receiving the cell application voltage 20 (shown by (a) in FIG. 10), the comparator 41 produces a &#34;1&#34; output in the positive half cycle of the application voltage and a &#34;0&#34; output in the negative half cycle. When the gate switching signal is &#34;0&#34;, the AND gate 44 is selected and a synchronous rectification gate signal of &#34;1&#34; is produced on the output of the OR gate 46 during a period when the cell application voltage has a phase from 2nπ to (2n+1)π(n=0, 1, 2, . . . ), as shown by (b) in FIG. 10. With this gate signal being applied, the synchronous rectification circuit operates for rectification in in-phase with the cell application voltage. On the other hand, when the gate switching signal is &#34;1&#34;, the AND gate 45 is selected, and a gate signal 43 of &#34;1&#34; is produced during a period when the output of the delay circuit 42, which delays the output of the comparator 41 by ##EQU13## is &#34;1&#34;, as shown by (c) in FIG. 10. Accordingly, a synchronous rectification gate signal of &#34;1&#34; is produced during a period when the cell application voltage has a phase from ##EQU14## as shown by (c) in FIG. 10. 
     By application of one of these gate signals, the synchronous rectification circuit alternates the phase of rectification in synchronism with the gate signal. For example, with a gate signal 40 of &#34;0&#34;, the rectification phase is switched at phase angles of nπ (n=0, 1, 2, . . . ), and the rectification circuit delivers its crude input signal for a phase from 0 to 2π and delivers its input signal in opposite polarity for a phase from π to 2π. With a gate signal 40 of &#34;1&#34;, the rectification phase is switched at phase angles of ##EQU15## and the rectification circuit delivers its crude input signal for a phase from ##EQU16## and delivers its input signal in opposite polarity for a phase from ##EQU17## 
     Although in the embodiment of FIG. 6 the resistor connected between the non-inverting input and output terminals of the operational amplifier 29 is a variable resistor, and the resistor connected to the output terminal is a fixed resistor, they may be a fixed resistor and a variable resistor, respectively. 
     Another embodiment of the inventive electrical conductivity measuring apparatus will be described with reference to FIGS. 11 and 12. 
     The electrical conductivity measuring apparatus according to this invention is suitable for the automation of adjustment. In the embodiment of FIG. 11, the functions of the potentiometer 25 and variable resistor 28 for adjustment in the embodiment of FIG. 6 are achieved by D/A converters with the intention of automatic compensating operation. In this connection, the variable resistor 28 is replaced with a fixed resistor and the fixed resistor 30 is replaced with a D/A converter. 
     In FIG. 11, indicated by 13&#39; is a compensation current generation circuit whose compensation action is automated, and 33 and 36 are D/A converters. Indicated by 37 is a comparator and 38 is a controller which controls the D/A converters 33 and 36 and synchronous rectification gate signal generation circuit 17. Reference numeral 32 denotes phase angle adjustment data and current adjustment data. Other component parts identical to those in FIGS. 1 and 6 are referred to by the same symbols, and their explanation is not repeated. 
     FIG. 12 is a flowchart showing the operation of the controller 38 described in the following. At the commencement of the compensating operation, the controller 38 clears the phase adjustment data 32 to &#34;0&#34;, and brings the synchronous rectification gate signal generation circuit 17 in-phase with the cell application voltage 20 (step 50). Next, the controller adjusts the compensation current adjustment data 35 so that the comparator produces a zero output (step 51). 
     Next, the controller sets the synchronous rectification gate signal generation circuit to have a phase difference of ##EQU18## from the cell application voltage 20 (step 52), and adjusts the phase adjustment data 32 so that the comparator 37 produces a &#34;0&#34; output (step 53). These steps results in a compensation current with a phase difference of about 180° from the cell current. 
     Next, the controller brings the synchronous rectification gate signal generation circuit 17 in-phase with the cell application voltage (step 54), and adjusts the compensation current adjustment data 35 so that the comparator 37 produces a &#34;0&#34; or minimal output (step 55). These steps result in a compensation current virtually equal in magnitude to the cell current. 
     Next, the controller judges whether the residual a.c. component has become smaller than the prescribed value (step 56), in which case the compensating operation is completed. Otherwise, the control sequence returns to step 52, and the steps 52-56 are repeated until the compensation current is equal in magnitude to the cell current and differs in phase by π (180°) from the cell current. 
     According to this invention, as described above, in conducting the measurement of electrical conductivity of various electrolytes, a complete background compensation including phase alignment can be made, whereby the operational amplifier is not saturated even at an increased gain for high sensitivity measurement, and accordingly a small change in electrical conductivity of an electrolyte having a large electrical conductivity can be measured. Moreover, because of the operation in the near-zero range of the a.c. component and d.c. component, a phase deviation of synchronous rectification does not turn to noise, and an electrical conductivity measuring apparatus with a high S/N property can be accomplished.