Abstract:
According to the present invention, there is provided a semiconductor device comprising:
       a gate insulating film selectively formed on a predetermined region of a semiconductor substrate;   a gate electrode formed on said gate insulating film; and   a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode,   wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×10 22  atoms/cm 3 .

Description:
CROSS REFERENCE TO RELATED APPLICATION 
       [0001]    This application is based upon and claims benefit of priority under 35 USC § 119 from the Japanese Patent Application No. 2004-317773, filed on Nov. 1, 2004, the entire contents of which are incorporated herein by reference. 
       BACKGROUND OF THE INVENTION 
       [0002]    The present invention relates to a semiconductor device and a method of fabricating the same. 
         [0003]    Recently, the electrical thickness of a gate insulating film decreases as the micropatterning of MOSFETs advances, and this poses the problem that a gate leakage current increases. To suppress this gate leakage current, therefore, a method which uses, as a gate insulating film, a high-dielectric-constant film having a relative dielectric constant higher than that of a silicon dioxide (SiO 2 ) film is proposed. A hafnium silicon oxynitride (HfSiON) film is an example of this high-dielectric-constant film. 
         [0004]    The hafnium silicon oxynitride (HfSiON) film is formed by, e.g., forming a hafnium silicate (HfSiO x ) film on a semiconductor substrate, and nitriding the hafnium silicate (HfSiO x ) film by doping nitrogen (N) into it. 
         [0005]    In the hafnium silicate (HfSiO x ) film, however, the bonding force between atoms is weak. Therefore, when nitrogen (N) is doped, bonding hands for bonding atoms are disconnected, and a large number of defects (holes) are formed. 
         [0006]    When this hafnium silicon oxynitride (HfSiON) film is exposed to an oxidizing ambient or the atmosphere, atmospheric oxygen (O 2 ) or the like is activated by hafnium (Hf) as a catalyst, and oxygen radicals are produced. These oxygen radicals easily invade the hafnium silicon oxynitride (HfSiON) film or a semiconductor substrate. 
         [0007]    Consequently, an interface insulating film having a low dielectric constant is formed between the hafnium silicon oxynitride (HfSiON) film and semiconductor substrate. This decreases the effective relative dielectric constant of the gate insulating film or increases the electrical thickness of the film. 
         [0008]    In addition, since oxygen (O) replaces nitrogen (N) in the hafnium silicon oxynitride (HfSiON) film, nitrogen (N) is released from the hafnium silicon oxynitride (HfSiON) film. 
         [0009]    As a consequence, the hafnium silicon oxynitride (HfSiON) film is separated into silicon dioxide (SiO 2 ) and hafnium dioxide (HfO 2 ), and these compounds crystallize. This decreases the heat resistance. Also, boron as a dopant readily breaks through the hafnium silicon oxynitride (HfSiON) film and diffuses into the semiconductor substrate. Furthermore, dielectric breakdown easily occurs, and this shortens the life of the gate insulating film. 
         [0010]    These problems produce fluctuation in gate threshold voltage and variations in transistor characteristics. 
         [0011]    A reference concerning a method of forming an insulating film having a high dielectric constant is as follows. 
         [0012]    Japanese Patent Laid-Open No. 2004-71696 
       SUMMARY OF THE INVENTION 
       [0013]    According to one aspect of the present invention, there is provided a semiconductor device fabrication method, comprising; 
         [0014]    forming, in a film formation chamber, a first insulating film containing at least a metal and oxygen on a surface of a semiconductor substrate; 
         [0015]    transferring the semiconductor substrate from the film formation chamber to a nitriding chamber via a transfer chamber; 
         [0016]    forming, in the nitriding chamber, a second insulating film containing at least a metal, oxygen, and nitrogen by nitriding the first insulating film by doping nitrogen into it; 
         [0017]    transferring the semiconductor substrate from the nitriding chamber to an annealing chamber via the transfer chamber; 
         [0018]    performing predetermined annealing on the second insulating film in the annealing chamber; and 
         [0019]    transferring the semiconductor substrate from the annealing chamber to the transfer chamber, 
         [0020]    wherein when at least the semiconductor substrate is transferred from the nitriding chamber to the annealing chamber via the transfer chamber, an ambient selected from the group consisting of a reduced-pressure ambient at about 10 −3  Torr, an inert gas ambient, and a nitrogen ambient is formed in the transfer chamber. 
         [0021]    According to one aspect of the present invention, there is provided a semiconductor device fabrication method, comprising; 
         [0022]    moving a transfer box containing a semiconductor substrate to a film formation chamber, and connecting the transfer box to the film formation chamber; 
         [0023]    transferring the semiconductor substrate from the transfer box to the film formation chamber; 
         [0024]    forming, in the film formation chamber, a first insulating film containing at least a metal and oxygen on a surface of the semiconductor substrate; 
         [0025]    transferring the semiconductor substrate from the film formation chamber to the transfer box; 
         [0026]    moving the transfer box containing the semiconductor substrate to a nitriding chamber, and connecting the transfer box to the nitriding chamber; 
         [0027]    transferring the semiconductor substrate from the transfer box to the nitriding chamber; 
         [0028]    forming, in the nitriding chamber, a second insulating film containing at least a metal, oxygen, and nitrogen by nitriding the first insulating film by doping nitrogen into it; 
         [0029]    transferring the semiconductor substrate from the nitriding chamber to the transfer box; 
         [0030]    moving the transfer box containing the semiconductor substrate to an annealing chamber, and connecting the transfer box to the annealing chamber; 
         [0031]    transferring the semiconductor substrate from the transfer box to the annealing chamber; 
         [0032]    performing predetermined annealing on the second insulating film in the annealing chamber; and 
         [0033]    transferring the semiconductor substrate from the annealing chamber to the transfer box, 
         [0034]    wherein when at least the semiconductor substrate is transferred from the nitriding chamber to the transfer box, the transfer box containing the semiconductor substrate is moved to the annealing chamber and the transfer box is connected to the annealing chamber, and the semiconductor substrate is transferred from the transfer box to the annealing chamber, an ambient selected from the group consisting of a reduced-pressure ambient at about 10 −3  Torr, an inert gas ambient, and a nitrogen ambient is formed in the transfer box. 
         [0035]    According to one aspect of the present invention, there is provided a semiconductor device, comprising: 
         [0036]    a gate insulating film selectively formed on a predetermined region of a semiconductor substrate; 
         [0037]    a gate electrode formed on said gate insulating film; and 
         [0038]    a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode, 
         [0039]    wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×10 22  atoms/cm 3 . 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0040]      FIG. 1  is a block diagram showing the arrangement of a gate insulating film/gate electrode formation apparatus according to the first embodiment of the present invention; 
           [0041]      FIG. 2  is a longitudinal sectional view showing an element sectional structure in a predetermined step of a MOSFET fabrication method according to the embodiment of the present invention; 
           [0042]      FIG. 3  is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method; 
           [0043]      FIG. 4  is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method; 
           [0044]      FIG. 5  is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method; 
           [0045]      FIG. 6  is a longitudinal sectional view showing an element sectional structure in a predetermined step of the same MOSFET fabrication method; 
           [0046]      FIG. 7  is a graph showing the distributions of the gate threshold voltages of MOSFETs in this embodiment in which a semiconductor substrate was not exposed to an oxidizing ambient or the atmosphere, and in a comparative example in which a semiconductor substrate was exposed to an oxidizing ambient or the atmosphere; 
           [0047]      FIG. 8  is a graph showing the time-dependent dielectric breakdown (TDDB) characteristics of the MOSFETs in this embodiment in which the semiconductor substrate was not exposed to an oxidizing ambient or the atmosphere, and in the comparative example in which the semiconductor substrate was exposed to an oxidizing ambient or the atmosphere; and 
           [0048]      FIG. 9  is a block diagram showing the arrangement of a gate insulating film/gate electrode formation apparatus according to the second embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0049]    Embodiments of the present invention will be described below with reference to the accompanying drawings. 
       (1) First Embodiment 
       [0050]      FIG. 1  shows the arrangement of a gate insulating film/gate electrode formation apparatus  10  according to the first embodiment of the present invention. A transfer chamber  20  formed into a substantially octagonal shape is placed near a central portion of the gate insulating film/gate electrode formation apparatus  10 . Around the transfer chamber  20 , a loading chamber  30 , unloading chamber  40 , film formation chamber  50 , nitriding chamber  60 , annealing chamber  70 , and gate insulating film/gate electrode formation chamber  80  are arranged. 
         [0051]    The loading chamber  30  loads a semiconductor substrate into the transfer chamber  20  of the gate insulating film/gate electrode formation apparatus  10  from the outside. The unloading chamber  40  unloads a semiconductor substrate to the outside from the transfer chamber  20  of the gate insulating film/gate electrode formation apparatus  10 . 
         [0052]    A transfer mechanism  90  such as an arm is placed near a central portion of the transfer chamber  20 , and transfers a semiconductor substrate between the chambers  30  to  80 . The transfer chamber  20  also has an exhausting mechanism (not shown), so the interior of the transfer chamber  20  can be adjusted to a desired pressure. In addition, a gas supply source (not shown) is connected to the transfer chamber  20  and supplies a desired gas. 
         [0053]    Accordingly, by forming, e.g., a reduced-pressure ambient at, e.g., about 10 −3  Torr, an inert gas ambient such as argon, or a nitrogen ambient in the transfer chamber  20 , a semiconductor substrate can be transferred to a desired one of the chambers  30  to  80  without being exposed to an oxidizing ambient or the atmosphere. 
         [0054]    The film formation chamber  50  forms a hafnium silicate (HfSiO x ) film on a semiconductor substrate. The nitriding chamber  60  forms a hafnium silicon oxynitride (HfSiON) film by nitriding the hafnium silicate (HfSiO x ) film by doping nitrogen (N) into it. 
         [0055]    The annealing chamber  70  performs predetermined annealing on the film formed on the semiconductor substrate. The gate insulating film/gate electrode formation chamber  80  deposits a film of a gate electrode material on the hafnium silicon oxynitride (HfSiON) film formed on the semiconductor substrate. 
         [0056]    Note that similar to the transfer chamber  20 , each of the chambers  30  to  80  has an exhausting mechanism and gas supply source (neither is shown). Therefore, different ambients can be independently formed in the chambers  20  to  80  of the gate insulating film/gate electrode formation apparatus  10 . 
         [0057]      FIGS. 2 to 6  illustrate a method of forming a gate insulating film and gate electrode by using the gate insulating film/gate electrode formation apparatus  10  according to this embodiment. First, as shown in  FIG. 2 , element isolation insulating films  110 A and  110 B are formed on a semiconductor substrate  100 , and a natural oxide film formed on the semiconductor substrate  100  is removed by washing using dilute hydrofluoric acid. 
         [0058]    When the semiconductor substrate  100  from which the natural oxide film is thus removed is placed in the loading chamber  30  of the gate insulating film/gate electrode formation apparatus  10 , the transfer mechanism  90  of the transfer chamber  20  unloads the semiconductor substrate  100  from the loading chamber  30 . In this state, a reduced-pressure ambient at, e.g., about 10 −3  Torr is formed in the transfer chamber  20  by the exhausting mechanism (not shown). It is also possible to form an inert gas ambient or nitrogen ambient in the transfer chamber  20  by supplying an inert gas such as argon or supplying nitrogen to the transfer chamber  20  from the gas supply source (not shown). 
         [0059]    The transfer mechanism  90  loads the semiconductor substrate  100  into the film formation chamber  50 . As shown in  FIG. 3 , tetrakisdiethylaminohafnium (TDEAH), tetrakisdimethylaminosilicon (TDMAS), and oxygen, for example, are supplied to the film formation chamber  50 , and the film formation chamber  50  forms a hafnium silicate (HfSiO x ) film  120  about 5 nm thick on the surface of the semiconductor substrate  100  by using MOCVD (Metal Organic Chemical Vapor Deposition). Note that the hafnium silicate (HfSiO X ) film  120  may also be formed by, e.g., sputtering or ALD (Atomic Layer Deposition), instead of MOCVD. 
         [0060]    The transfer mechanism  90  unloads the semiconductor substrate  100  from the film formation chamber  50 , and loads the semiconductor substrate  100  into the annealing chamber  70 . The annealing chamber  70  anneals the hafnium silicate (HfSiO x ) film  120  in an oxidizing ambient at, e.g., 600 to 800° C., thereby improving the quality of the hafnium silicate (HfSiO x ) film  120 . Note that this annealing may also be omitted. 
         [0061]    The transfer mechanism  90  unloads the semiconductor substrate  100  from the annealing chamber  70 , and loads the semiconductor substrate  100  into the nitriding chamber  60 . The nitriding chamber  60  nitrides the hafnium silicate (HfSiO X ) film  120  by supplying nitrogen at 10 to 25 at % by using a nitrogen-containing plasma, thereby forming a hafnium silicon oxynitride (HfSiON) film  120 . Note that at % represents an atomic composition ratio. 
         [0062]    Although nitrogen is supplied by using a nitrogen-containing plasma in this embodiment, nitrogen may also be supplied to the hafnium silicate (HfSiO x ) film  120  by annealing by using a nitrogen-containing gas. 
         [0063]    The transfer mechanism  90  unloads, the semiconductor substrate  100  from the nitriding chamber  60 , and loads the semiconductor substrate  100  into the annealing chamber  70 . 
         [0064]    In the hafnium silicate (HfSiO x ) film  120 , the bonding force between atoms is weak. When nitrogen (N) is supplied, therefore, bonding hands for bonding atoms are disconnected, and a large number of defects are formed. 
         [0065]    Accordingly, the annealing chamber  70  anneals the semiconductor substrate  100  in a nitrogen ambient at, e.g., 800 to 1,000° C., thereby restoring a number of defects formed in the hafnium silicon oxynitride (HfSiON) film  120 . 
         [0066]    Note that if the hafnium silicon oxynitride (HfSiON) film  120  having a large number of defects is exposed to an oxidizing ambient or the atmosphere, oxygen radicals activated by hafnium (Hf) as a catalyst invade the hafnium silicon oxynitride (HfSiON) film or semiconductor substrate to deteriorate the transistor characteristics. 
         [0067]    In this embodiment, however, a reduced-pressure ambient at about 10 −3  Torr, an inert gas ambient, or a nitrogen ambient is formed in the transfer chamber  20 . Therefore, when the transfer mechanism  90  of the transfer chamber  20  transfers the semiconductor substrate  100  from the nitriding chamber  60  to the annealing chamber  70 , the semiconductor substrate  100  is not exposed to an oxidizing ambient or the atmosphere. 
         [0068]    This makes it possible to suppress deterioration and variations of the transistor characteristics, and thereby increase the yield. 
         [0069]    To suppress deterioration of the transistor characteristics, a reduced-pressure ambient at about 10 −3  Torr, an inert gas ambient, or a nitrogen ambient need only be formed in the transfer chamber  20  at least while the semiconductor substrate  100  is transferred from the nitriding chamber  60  to the annealing chamber  70 . 
         [0070]    The transfer mechanism  90  unloads the semiconductor substrate  100  from the annealing chamber  70 , and loads the semiconductor substrate  100  into the gate insulating film/gate electrode formation chamber  80 . As shown in  FIG. 4 , the gate insulating film/gate electrode formation chamber  80  heats the semiconductor substrate  100  to about 700° C., and forms a polysilicon film  130  about 150 nm thick on the hafnium silicon oxynitride (HfSiON) film  120  by using monosilane (SiH 4 ) gas. Note that the gate electrode material is not limited to polysilicon, and it is also possible to use, e.g., amorphous silicon, silicon germanium, or a metal. 
         [0071]    The transfer mechanism  90  unloads the semiconductor substrate  100  from the gate insulating film/gate electrode formation chamber  80 , and places the semiconductor substrate  100  in the unloading chamber  40 . The semiconductor substrate  100  is then taken out from the gate insulating film/gate electrode formation apparatus  10 , and patterned. 
         [0072]    As shown in  FIG. 5 , photolithography, RIE (Reactive Ion Etching), or the like is executed to form a gate insulating film  140  made of the hafnium silicon oxynitride (HfSiON) film and a gate electrode  150  made of the polysilicon film. 
         [0073]    As shown in  FIG. 6 , a dopant is ion-implanted into the surfaces of the gate electrode  150  and semiconductor substrate  100 , and annealing is performed to form a source region  160 A and drain region  160 B. 
         [0074]    In a MOSFET  200  fabricated by the above method, as shown in  FIG. 6 , the element isolation insulating films  110 A and  110 B for element isolation are formed in the surface portion of the semiconductor substrate  100 , and the gate electrode  150  made of the polysilicon film is formed, via the gate insulating film  140  formed by the hafnium silicon oxynitride (HfSiON) film on the surface of the semiconductor substrate  100 , near a central portion of an element region isolated by the element isolation insulating films  110 A and  110 B. 
         [0075]    In this structure, the carbon concentration in the interface where the gate electrode  140  is in contact with the gate electrode  150  is 5×10 22  atoms/cm 3  or less. 
         [0076]    As described above, when the semiconductor substrate  100  is transferred from the nitriding chamber  60  to the annealing chamber  70 , a reduced-pressure ambient at about 10 −3  Torr, an inert gas ambient, or a nitrogen ambient is formed in the transfer chamber  20 . Compared to a case in which the semiconductor substrate  100  is exposed to the atmosphere or the like, it is possible to suppress adhesion of organic materials discharged from substances in the clean room and floating, and decrease the carbon concentration in the interface where the gate insulating film  140  is in contact with the gate electrode. 
         [0077]    This makes it possible to prevent dielectric breakdown of the gate insulating film, and improve the reliability of the gate insulating film  140 . 
         [0078]    Especially in devices from the 65-nm generation, the influence of defects such as dielectric breakdown caused by carbon in the interface is large. Therefore, the reliability of devices can be improved by applying this embodiment. 
         [0079]    Also, a channel region  170  is formed below the gate electrode  150  and close to the surface of the semiconductor substrate  100 . 
         [0080]    The source region  160 A is formed between the channel region  170  and element isolation insulating film  110 A, and the drain region  160 B is formed between the channel region  170  and element isolation insulating film  110 B. 
         [0081]      FIG. 7  shows the distributions of the gate threshold voltages of MOSFETs fabricated by cutting the semiconductor substrate  100  in this embodiment in which the semiconductor substrate  100  was not exposed to an oxidizing ambient or the atmosphere when it was transferred from the nitriding chamber  60  to the annealing chamber  70 , and in a comparative example in which the semiconductor substrate  100  was exposed to an oxidizing ambient or the atmosphere. 
         [0082]    As shown in  FIG. 7 , in the comparative example in which the substrate  100  was exposed to an oxidizing ambient or the atmosphere when it was transferred from the nitriding chamber  60  to the annealing chamber  70 , the gate threshold voltage of each MOSFET fabricated from the semiconductor substrate  100  existed within the range of −0.62 V to −0.54 V. That is, the variation was very large, and accordingly the yield was low. 
         [0083]    By contrast, in this embodiment in which the substrate  100  was not exposed to an oxidizing ambient or the atmosphere when it was transferred from the nitriding chamber  60  to the annealing chamber  70 , it was possible to make the variation in gate threshold voltage much smaller than that in the comparative example, and greatly increase the yield accordingly. 
         [0084]    Also,  FIG. 8  shows the time-dependent dielectric breakdown (TDDB) characteristics of MOSFETs fabricated as they were cut from the semiconductor substrate  100  in this embodiment in which the semiconductor substrate  100  was not exposed to an oxidizing ambient or the atmosphere when it was transferred from the nitriding chamber  60  to the annealing chamber  70 , and in the comparative example in which the semiconductor substrate  100  was exposed to an oxidizing ambient or the atmosphere. 
         [0085]    More specifically, electrons were injected from the semiconductor substrate  100  to the gate insulating film  140 , and a stress electric field of 12 MV/cm was applied to the gate insulating film  140 . After that, the dielectric breakdown time of each MOSFET was measured. Note that the abscissa indicates the dielectric breakdown time of each MOSFET, and the ordinate indicates a Weibull function (i.e., the dielectric breakdown probability). 
         [0086]    As shown in  FIG. 8 , in the comparative example in which the substrate  100  was exposed to an oxidizing ambient or the atmosphere when it was transferred from the nitriding chamber  60  to the annealing chamber  70 , the dielectric breakdown times of many MOSFETs fabricated from the semiconductor substrate  100  were short, and the life of the gate insulating film  140  was also short. In addition, the variation in dielectric breakdown time was large, so the reliability of the transistors was low. 
         [0087]    By contrast, in this embodiment in which the substrate  100  was not exposed to an oxidizing ambient or the atmosphere when it was transferred from the nitriding chamber  60  to the annealing chamber  70 , the dielectric breakdown times of many MOSFETs were longer than those of the comparative example, and the life of the gate insulating film  140  was long accordingly. In addition, the variation in dielectric breakdown time was smaller than that of the comparative example, so the reliability of the transistors was high. 
       Second Embodiment 
       [0088]      FIG. 9  shows the arrangement of a gate insulating film/gate electrode formation apparatus  300  according to the second embodiment of the present invention. In the gate insulating film/gate electrode formation apparatus  300 , a film formation chamber  310 , nitriding chamber  320 , annealing chamber  330 , and gate insulating film/gate electrode formation chamber  340  are arranged in predetermined positions, and transfer chambers  350 ,  360 ,  370 , and  380  are connected to the chambers  310 ,  320 ,  330 , and  340 , respectively. 
         [0089]    Transfer mechanisms  390 ,  400 ,  410 , and  420  are arranged in the transfer chambers  350 ,  360 ,  370 , and  380 , respectively, and load/unload a semiconductor substrate  100  into/from the chambers  310 ,  320 ,  330 , and  340 , respectively. 
         [0090]    The transfer chambers  350  to  380  each have an exhausting mechanism (not shown), so the interior of each of the transfer chambers  350  to  380  can be adjusted to a desired pressure. In addition, a gas supply source (not shown) is connected to each of the transfer chambers  350  to  380 , and supplies a desired gas. 
         [0091]    Accordingly, by forming, e.g., a reduced-pressure ambient at, e.g., about 10 −3  Torr, an inert gas ambient such as argon, or a nitrogen ambient in each of the transfer chambers  350  to  380 , the semiconductor substrate  100  can be loaded/unloaded into/from each of the chambers  310  to  340  without being exposed to an oxidizing ambient or the atmosphere. 
         [0092]    A transfer box  430  transfers the semiconductor substrate  100  to a desired one of the transfer chambers  350  to  380 . Similar to the transfer chambers  350  to  380 , the transfer box  430  has an exhausting mechanism (not shown), so the interior of the transfer box  430  can be adjusted to a desired pressure. In addition, a gas supply source (not shown) is connected to the transfer box  430 , and supplies a desired gas. 
         [0093]    Accordingly, by forming, e.g., a reduced-pressure ambient at, e.g., about 10 −3  Torr, an inert gas ambient such as argon, or a nitrogen ambient in the transfer box  430 , the semiconductor substrate  100  can be transferred to a desired one of the chambers  350  to  380  without being exposed to an oxidizing ambient or the atmosphere. 
         [0094]    A method of forming a gate insulating film and gate electrode by using the gate insulating film/gate electrode formation apparatus  300  according to this embodiment will be described below with reference to  FIGS. 2 to 6  used in the explanation of the first embodiment. Note that processes executed in the chambers  310  to  340  are the same as the processes executed in the corresponding chambers  50  to  80  of the gate insulating film/gate electrode formation apparatus  10  according to the first embodiment. 
         [0095]    First, a semiconductor substrate  100  in which element isolation insulating films  110 A and  110 B are formed and from which a natural oxide film is removed is put in the transfer box  430 , and the transfer box  430  is moved to and connected to the transfer chamber  350 . 
         [0096]    The transfer mechanism  390  of the transfer chamber  350  unloads the semiconductor substrate  100  from the transfer box  430 , and loads the semiconductor substrate  100  into the film formation chamber  310 . As shown in  FIG. 3 , the film formation chamber  310  forms a hafnium silicate (HfSiO X ) film  120  on the surface of the semiconductor substrate  100  by using, e.g., MOCVD. 
         [0097]    The transfer mechanism  390  unloads the semiconductor substrate  100  from the film formation chamber  310 , and puts the semiconductor substrate  100  in the transfer box  430 . The transfer box  430  is moved to and connected to the transfer chamber  370 . 
         [0098]    The transfer mechanism  410  of the transfer chamber  370  unloads the semiconductor substrate  100  from the transfer box  430 , and loads the semiconductor substrate  100  into the annealing chamber  330 . The annealing chamber  330  improves the quality of the hafnium silicate (HfSiO x ) film  120  by annealing it. Note that this annealing may also be omitted. 
         [0099]    The transfer mechanism  410  unloads the semiconductor substrate  100  from the annealing chamber  330 , and puts the semiconductor substrate  100  in the transfer box  430 . The transfer box  430  is moved to and connected to the transfer chamber  360 . 
         [0100]    The transfer mechanism  400  of the transfer chamber  360  unloads the semiconductor substrate  100  from the transfer box  430 , and loads the semiconductor substrate  100  into the nitriding chamber  320 . The nitriding chamber  320  nitrides the hafnium silicate (HfSiO x ) film  120  by supplying nitrogen to it, thereby forming a hafnium silicon oxynitride (HfSiON) film  120 . 
         [0101]    The transfer mechanism  400  unloads the semiconductor substrate  100  from the nitriding chamber  320 , and puts the semiconductor substrate  100  in the transfer box  430 . The transfer box  430  is moved to and connected to the transfer chamber  370 . The transfer mechanism  410  of the transfer chamber  370  unloads the semiconductor substrate  100  from the transfer box  430 , and loads the semiconductor substrate  100  into the annealing chamber  330 . 
         [0102]    In this embodiment, a reduced-pressure ambient at about 10 −3  Torr, an inert gas ambient, or a nitrogen ambient is formed in the transfer box  430  and the transfer chambers  360  and  370 . Therefore, the semiconductor substrate  100  can be transferred from the nitriding chamber  320  to the annealing chamber  330  without being exposed to an oxidizing ambient or the atmosphere. 
         [0103]    This makes it possible to suppress deterioration and variations of the transistor characteristics, and thereby increase the yield. 
         [0104]    To suppress deterioration of the transistor characteristics, a reduced-pressure ambient at about 10 −3  Torr, an inert gas ambient, or a nitrogen ambient need only be formed in the transfer chamber  360 , transfer box  430 , and transfer chamber  370  at least while the semiconductor substrate  100  is transferred from the nitriding chamber  320  to the annealing chamber  330 . 
         [0105]    The annealing chamber  330  restores a large number of defects formed in the hafnium silicon oxynitride (HfSiON) film  120  by annealing the semiconductor substrate  100  in a nitrogen ambient. 
         [0106]    The transfer mechanism  410  unloads the semiconductor substrate  100  from the annealing chamber  330 , and puts the semiconductor substrate  100  in the transfer box  430 . The transfer box  430  is moved to and connected to the transfer chamber  380 . 
         [0107]    The transfer mechanism  420  of the transfer chamber  380  unloads the semiconductor substrate  100  from the transfer box  430 , and loads the semiconductor substrate  100  into the gate insulating film/gate electrode formation chamber  340 . As shown in  FIG. 4 , the gate insulating film/gate electrode formation chamber  340  forms a polysilicon film  130  on the hafnium silicon oxynitride (HfSiON) film  120 . 
         [0108]    The transfer mechanism  420  unloads the semiconductor substrate  100  from the gate insulating film/gate electrode formation chamber  340 , and puts the semiconductor substrate  100  in the transfer box  430 . Then, the semiconductor substrate  100  is taken out from the gate insulating film/gate electrode formation apparatus  300 . 
         [0109]    As shown in  FIG. 5 , a gate insulating film  140  and gate electrode  150  are formed by patterning the polysilicon film  130  and hafnium silicon oxynitride (HfSiON) film  120 . After that, a source region  160 A and drain region  160 B are formed as shown in  FIG. 6 , thereby fabricating a MOSFET  200 . 
         [0110]    In the MOSFET fabricated by the above method, as in the first embodiment, the carbon concentration in the interface where the gate insulating film  140  is in contact with the gate electrode  150  is 5×10 22  atoms/cm 3  or less. This achieves the same effects as in the first embodiment. 
         [0111]    The semiconductor devices and their fabrication methods of the embodiments described above can suppress variations in transistor characteristics and increase the yield. 
         [0112]    Note that the above embodiments are merely examples and do not limit the present invention. For example, instead of hafnium (Hf), another metal such as zirconium may also be used. That is, it is also possible to form an insulating film containing at least a metal and oxygen on a semiconductor substrate, and nitride this insulating film to form an insulating film containing at least the metal, oxygen, and nitrogen. 
         [0113]    Also, in the above embodiments, the film formation chambers  50  and  310  and nitriding chambers  60  and  320  are different reaction chambers. However, these chambers may also be one reaction chamber.