Abstract:
A plasma display panel driving circuit includes a panel capacitor having first and second sides; a first switch electrically connected between a first voltage and the first side of the panel capacitor; a second switch electrically connected between a second voltage and a first node; a third switch electrically connected between a third voltage and the first side of the panel capacitor; a fourth switch electrically connected between a fourth voltage and the first node; an energy recovery circuit electrically connected between the first side of the panel capacitor and the first node; a fifth switch electrically connected between the first node and a second node; a sixth switch connected between a fifth voltage and the second node; a voltage source connected between the second node and a third node; and a scan IC. The driving circuit can produce driving waveforms that do not need to stay at ground potential.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS  
       [0001]     This application claims the benefit of the filing date of U.S. provisional patent application No. 60/595,306, filed Jun. 22, 2005, the contents of which are hereby incorporated by reference. 
     
    
     BACKGROUND OF THE INVENTION  
       [0002]     1. Field of the Invention  
         [0003]     The present invention relates to a driving circuit, and more specifically, to a driving circuit for a plasma display panel (PDP).  
         [0004]     2. Description of the Prior Art  
         [0005]     In recent years, there has been an increasing demand for planar matrix displays such as plasma display panels (PDP), liquid-crystal displays (LCD) and electroluminescent displays (EL display) in place of cathode ray tube terminals (CRT) due to the advantage of the thin appearance of the planar matrix displays.  
         [0006]     In a PDP display, charges are accumulated according to display data, and a sustaining discharge pulse is applied to paired electrodes in order to initiate discharge glow for display. As far as the PDP display is concerned, it is required to apply a high voltage to the electrodes. In particular, a pulse-duration of several microseconds is usually adopted. Hence the power consumption of the PDP display is quite considerable. Energy recovering (power saving) is therefore sought for. Many designs and patents have been developed for providing methods and apparatuses of energy recovering for PDPs.  
         [0007]     Please refer to  FIG. 1 .  FIG. 1  is a block diagram of a prior art driving circuit  100 . An equivalent capacitor of a plasma display panel is marked as Cp. The conventional driving circuit  100  includes four switches S 1  to S 4  for passing current, an X-side energy recovery circuit  110  and a Y-side energy recovery circuit  120  for charging/discharging the panel equivalent capacitor Cp from the X side of the panel equivalent capacitor Cp and the Y side of the panel equivalent capacitor Cp respectively. S 5 , S 6 , S 7  and S 8  are switches for passing current. D 5 , D 6 , D 7  and D 8  are diodes. Va and Vb are two voltage sources. C 1  and C 2  are capacitors adopted for recovering energy, and L 1  and L 2  are resonant inductors. The X-side energy recovery circuit  110  includes an energy-forward channel comprising the switch S 6 , the diode D 6  and the inductor L 1 , and an energy-backward channel comprising the inductor L 1 , the diode D 5  and the switch S 5 . Similarly, the Y-side energy recovery circuit  120  also includes an energy-forward channel comprising the switch S 8 , the diode D 8  and the inductor L 2 , and an energy-backward channel comprising the inductor L 2 , the diode D 7  and the switch S 7 .  
         [0008]     Please refer to  FIG. 2 .  FIG. 2  is a flowchart of generating the sustaining pulses of the panel equivalent capacitor Cp of the PDP by the conventional driving circuit  100  illustrated in  FIG. 1 .  
         [0009]     Step  200 : Start;  
         [0010]     Step  210 : Keep the voltage potentials at the X side and the Y side of the panel equivalent capacitor Cp at ground by turning on the switches S 3  and S 4 ;  
         [0011]     Step  220 : Charge the X side of the panel equivalent capacitor Cp by the capacitor C 1  and keep the voltage potential at the Y side of the panel equivalent capacitor Cp at ground by turning on the switches S 6  and S 4 ; wherein the voltage potential at the X side of the panel equivalent capacitor Cp goes up to Va accordingly;  
         [0012]     Step  230 : Supply charge to the panel equivalent capacitor Cp of the PDP from the X side by turning on the switches S 1  and S 4 ; wherein the voltage potential at the X side of the panel equivalent capacitor Cp keeps at Va and the voltage potential at the Y side of the panel equivalent capacitor Cp keeps at ground accordingly;  
         [0013]     Step  240 : Discharge the panel equivalent capacitor Cp from the X side and keep the voltage potential at the Y side of the panel equivalent capacitor Cp at ground by turning on the switches S 5  and S 4 ; wherein the voltage potential at the X side of the panel equivalent capacitor Cp goes down to ground accordingly;  
         [0014]     Step  250 : Keep the voltage potentials at the X side and the Y side of the panel equivalent capacitor Cp at ground by turning on the switches S 3  and S 4 ;  
         [0015]     Step  260 : Charge the Y side of the panel equivalent capacitor Cp by the capacitor C 2  and keep the voltage potential at the X side of the panel equivalent capacitor Cp at ground by turning on the switches S 8  and S 3 ; wherein the voltage potential at the Y side of the panel equivalent capacitor Cp goes up to Vb accordingly;  
         [0016]     Step  270 : Supply charge to the panel equivalent capacitor Cp of the PDP from the Y side by turning on the switches S 2  and S 3 ; wherein the voltage potential at the Y side of the panel equivalent capacitor Cp keeps at Vb and the voltage potential at the X side of the panel equivalent capacitor Cp keeps at ground accordingly;  
         [0017]     Step  280 : Discharge the panel equivalent capacitor Cp from the Y side and keep the voltage potential at the X side of the panel equivalent capacitor Cp at ground by turning on the switches S 7  and S 3 ; wherein the voltage potential at the Y side of the panel equivalent capacitor Cp goes down to ground accordingly;  
         [0018]     Step  290 : Keep the voltage potentials at the X side and the Y side of the panel equivalent capacitor Cp at ground by turning on the switches S 3  and S 4 ;  
         [0019]     Step  295 : End.  
         [0020]     Please refer to  FIG. 3 .  FIG. 3  shows a diagram illustrating the voltage potentials at the X side and the Y side of the panel equivalent capacitor Cp, and the control signals, M 1  to M 8 , of the switches S 1  to S 8  in  FIG. 1  respectively. In  FIG. 3 , the horizontal axis represents the time, while the vertical axis represents the voltage potential. Note that the switches S 1  to S 8  are designed to close (turned on) for passing current when the control signal is high, and to open (turned off) such that no current can pass when the control signal is low.  
         [0021]     Please refer to  FIG. 4 .  FIG. 4  shows another prior art driving circuit  400 . The driving circuit  400  shown in  FIG. 4  is also known as the Further Improvement of Energy Recovery Capacitor Elimination in T-shape ENergy REcovery Circuit (fierce tenrec), which is disclosed in U.S. patent application Ser. No. 10/908,610, the contents of which are hereby incorporated by reference in its entirety. The driving circuit  400  contains an energy recovery circuit  410 , switches S 11  to S 17 , an inductor L 11 , voltage sources Vc, Vd, Ve, and Vf, and equivalent capacitor of a plasma display panel C p . This driving circuit can make the waveforms in sustain period.  
         [0022]     Conventionally, the energy recovery (power saving) circuit provides two individual channels of charging and discharging the equivalent capacitor respectively (energy-forward channel and energy-backward channel) for each side of the panel equivalent capacitor Cp. Therefore, the amount of required components is quite large. Furthermore, the area of capacitors C 1  and C 2  is usually considerable. Hence the cost of energy recovery circuit is not easy to reduce.  
       SUMMARY OF THE INVENTION  
       [0023]     It is therefore an objective of the invention to provide plasma display panel driving circuits that solve the problems of the prior art.  
         [0024]     According to a preferred embodiment of the present invention, a claimed plasma display panel driving circuit includes a panel equivalent capacitor having a first side and a second side; a first switch electrically connected between a first voltage source and the first side of the panel equivalent capacitor; a second switch electrically connected between a second voltage source and a first node; a third switch electrically connected between a third voltage source and the first side of the panel equivalent capacitor; a fourth switch electrically connected between a fourth voltage source and the first node; an energy recovery circuit electrically connected between the first side of the panel equivalent capacitor and the first node; a fifth switch electrically connected between the first node and a second node; a sixth switch electrically connected between a fifth voltage source and the second node; a sixth voltage source electrically connected between the second node and a third node; and a scan IC comprising: a high-side switch electrically connected between the third node and the second side of the panel equivalent capacitor; and a low-side switch electrically connected between the second side of the panel equivalent capacitor and the second node.  
         [0025]     According to another preferred embodiment of the present invention, a claimed plasma display panel driving circuit includes a panel equivalent capacitor having a first side and a second side; a first switch electrically connected between a first voltage source and the first side of the panel equivalent capacitor; an energy recovery circuit electrically connected between the first side of the panel equivalent capacitor and a first node; a second switch electrically connected between a second voltage source and a second node; a third switch electrically connected between a third voltage source and the first side of the panel equivalent capacitor; a fourth switch electrically connected between a fourth voltage source and the first node; a fifth switch electrically connected between a fifth voltage source and the second node; a sixth voltage source electrically connected between the second node and a third node; and a scan IC comprising: a high-side switch electrically connected between the third node and the second side of the panel equivalent capacitor; and a low-side switch electrically connected between the second side of the panel equivalent capacitor and the second node.  
         [0026]     These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0027]      FIG. 1  is a circuit diagram of a prior art energy recovery circuit with an equivalent capacitor of a PDP.  
         [0028]      FIG. 2  is a flowchart of a prior art method of generating the sustaining pulses of the panel equivalent capacitor Cp.  
         [0029]      FIG. 3  is a diagram illustrating the voltage potentials at sides of the panel equivalent capacitor Cp and the control signals of the switches.  
         [0030]      FIG. 4  shows another prior art driving circuit.  
         [0031]      FIG. 5  shows a circuit diagram of a plasma display panel driving circuit according to an embodiment of the present invention.  
         [0032]      FIG. 6  illustrates a circuit diagram of a plasma display panel driving circuit implemented using MOSFET transistors.  
         [0033]      FIG. 7  illustrates the PDP driving waveform.  
         [0034]      FIG. 8  shows a circuit diagram of a plasma display panel driving circuit according to an embodiment of the present invention.  
         [0035]      FIG. 9  illustrates a circuit diagram of a plasma display panel driving circuit implemented using MOSFET transistors.  
         [0036]      FIG. 10  illustrates the PDP driving waveform.  
         [0037]      FIGS. 11-13  are a circuit diagrams of alternative energy recovery circuits for use with the present invention. 
     
    
     DETAILED DESCRIPTION  
       [0038]     The present invention provides a driving waveform and circuit for a PDP. The main idea of this invention is that the circuit can make the waveforms for PDP display in each period, and does not merely focus on sustain period. The advantages of this invention are that the fewer components can be used to create the driving waveforms, and the cost of circuit can be lowered accordingly.  
         [0039]     Please refer to  FIG. 5 .  FIG. 5  shows a circuit diagram of a plasma display panel driving circuit  500  according to an embodiment of the present invention. The driving circuit  500  comprises switches S 21  to S 29 . High-side and low-side switches are realized through transistors Q H  and Q L  that are in a scan IC  520 . The display panel driving circuit  500  also comprises an inductor L 22 , an equivalent capacitor of a PDP C p , and five voltage sources V 1  to V 5 . A voltage source Vys couples to scan IC  520  in parallel, wherein the positive and negative terminals of Vys couple to Q H  and Q L , respectively. Voltage sources V 1  and V 2  are positive voltage sources and voltage sources V 3  and V 4  are negative voltage sources. Voltage sources V 1  and V 2  can have the same voltage potential or can be different. Likewise, voltage sources V 3  and V 4  can have the same voltage potential or can be different. The voltage potential of V 4  is higher than the voltage potential of V 5  and lower than the voltage potential of (V 5 +Vys). An energy recovery circuit  510  is electrically connected to the display panel driving circuit  500  at nodes A and B, and includes switches S 25 , S 26 , S 27  and L 22 , wherein L 22  and S 27  couple in series.  
         [0040]     Please refer to  FIG. 6 .  FIG. 6  illustrates a circuit diagram of a plasma display panel driving circuit  600  implemented using MOSFET transistors. The switches S 41  to S 49  are all n-channel MOSFETs. Energy recovery circuit  610  includes switches S 45 , S 46 , S 47 , and L 4  wherein L 4  and S 47  couple in series. In addition, the scan IC  620  is realized out of two BJT transistors Q H  and Q L  although other types of transistors could also be used.  
         [0041]      FIG. 7  illustrates the PDP driving waveform. It can be realized by the driving circuit in  FIG. 6 . In  FIG. 7 , the high level of the signals for all switches represents the ON-state of the switches, and the low level of the signals for all switches represents the OFF-state. If the switch can operate in either ON-state or OFF-state, the signals will be marked as X. The switches can either be fully on or act as the large resistors or variable resistors in the ON-state.  
         [0042]     There are several different waveforms at the X side of the panel equivalent capacitor Cp. The operations are as follows. Please refer to  FIG. 6  and  FIG. 7  for examples.  
         [0043]     Positive ramp or exponential waveform (at t=t xa )  
         [0044]     Charge the X side of the panel equivalent capacitor Cp from low voltage potential to high voltage potential exponentially or linearly by turning on the switch S 41 . The switch S 41  acts as the large resistor or the variable resistor at t=t xa  period in  FIG. 7 .  
         [0045]     Negative ramp or exponential waveform (at t=t xb )  
         [0046]     Discharge the X side of the panel equivalent capacitor Cp from high voltage potential to low voltage potential exponentially or linearly by turning on the switch S 43 . The switch S 43  acts as the large resistor or the variable resistor at t=t xb  period in  FIG. 7 .  
         [0047]     Clamping waveform (at t=t xc1 , t=t xc2  and t=t xc3 )  
         [0048]     The X side of the panel equivalent capacitor Cp is clamped to the voltage potential V 3  by fully turning on the switch S 43  at t=t xc1  and t=t xc2  periods in  FIG. 7 . The X side of the panel equivalent capacitor Cp is clamped to the voltage potential V 1  by fully turning on the switch S 41  at t=t xc3  period in  FIG. 7 . The switches S 43  and S 41  act as short circuits while they are turned on during these periods.  
         [0049]     Energy recovery waveform (at t=t xc2 , t=t xd1 , t=t xc3  and t=t xd2 )  
         [0050]     At t=t xc2  period in  FIG. 7 , the X side of the panel equivalent capacitor Cp is clamped to the voltage potential V 3  by fully turning on the switch S 43 . The switch S 43  acts as a short circuit.  
         [0051]     At t=t xd1  period in  FIG. 7 , the X side of the panel equivalent capacitor Cp is charged from V 3  to V 1  through the components S 45 , S 47  and L 4 . The switches S 45  and S 47  are fully on and act as short circuits.  
         [0052]     At t=t xc3  period in  FIG. 7 , the X side of the panel equivalent capacitor Cp is clamped to the voltage potential V 1  by fully turning on the switch S 41 . The switch S 41  acts as a short circuit.  
         [0053]     At t=t xd2  period in  FIG. 7 , the X side of the panel equivalent capacitor Cp is discharged from V 1  to V 3  through the components S 45 , S 47  and L 4 . The switches S 45  and S 47  are fully on and act as short circuits.  
         [0054]     There are several different waveforms at the Y side of the panel equivalent capacitor Cp. The operations are as follows. Please refer to  FIG. 6  and  FIG. 7  for examples.  
         [0055]     Positive ramp or exponential waveform (at t=t ya )  
         [0056]     Charge the Y side of the panel equivalent capacitor Cp from low voltage potential to high voltage potential exponentially or linearly by turning on the switches S 42 , S 48  and Q L  of the scan IC  620  or S 42 , S 48  and Q H  of the scan IC  620 . If the path is through the switches S 42 , S 48 , and Q L  of the scan IC  620 , the highest voltage potential can reach V 2 . If the path is through the switches S 42 , S 48 , Q H  of the scan IC  620  and the voltage potential Vys, the highest voltage potential can reach (V 2 +Vys). At t=t ya  period in  FIG. 7 , the switch S 42  or/and the switch S 48  act as the large resistor or the variable resistor.  
         [0057]     Negative ramp or exponential waveform (at t=t yb )  
         [0058]     Discharge the Y side of the panel equivalent capacitor Cp from high voltage potential to low voltage potential exponentially or linearly by turning on the switches S 44  and Q L  of the scan IC  620  or the switches S 49  and Q L  of the scan IC  620 . The switch S 44  or the switch S 49  acts as the large resistor or the variable resistor at this period. If switch S 44  is used, the lowest voltage potential can reach V 4 . If switch S 49  is used, the lowest voltage potential can reach V 5 . At t=t yb  period in  FIG. 7 , the Y side of the panel equivalent capacitor Cp is pulled down from the voltage potential V 2  to the voltage potential V 5 . The switches S 49  and Q L  of the scan IC  620  are turned on and switch S 49  acts as the large resistor or variable resistor.  
         [0059]     Clamping waveform (at t=t yc1 , t=t yc2 , t=t yc3  and t=t yc4 )  
         [0060]     The Y side of the panel equivalent capacitor Cp is clamped to the voltage potential V 2  by fully turning on the switches S 42 , S 48 , and Q L  of the scan IC  620 . The Y side of the panel equivalent capacitor Cp is clamped to the voltage potential V 4  by fully turning on the switches S 44 , S 48 , and Q L  of the scan IC  620 . The Y side of the panel equivalent capacitor Cp is clamped to the voltage potential V 5  by fully turning on the switches S 49  and Q L  of the scan IC  620 . The switches S 42 , S 44 , S 48  and S 49  act as short circuits during these periods. At t=t yc1 , t=t yc2 , t=t yc3  and t=t yc4  periods in  FIG. 7 , the Y side of the panel equivalent capacitor Cp is clamped to the voltage potentials V 5 , V 4 , V 2  and V 4 , respectively.  
         [0061]     Energy recovery waveform (at t=t yd1 , t=t yc3  , t=t yd2  and t=t yc4 )  
         [0062]     At t=t yd1  period in  FIG. 7 , the Y side of the panel equivalent capacitor Cp is charged from V 4  to V 2  through the components S 46 , S 47 , S 48 , Q L  of the scan IC  620  and L 4 . The switches S 46 , S 47 , and S 48  are fully on and act as short circuits.  
         [0063]     At t=t yc3  period in  FIG. 7 , the Y side of the panel equivalent capacitor Cp is clamped to the voltage potential V 2  by fully turning on the switches S 42 , S 48  and Q L  of the scan IC  620 . The switches S 42  and S 48  act as short circuits.  
         [0064]     At t=t yd2  period in  FIG. 7 , the Y side of the panel equivalent capacitor Cp is discharged from V 2  to V 4  through the components S 46 , S 47 , S 48 , Q L  of the scan IC  620  and L 4 . The switches S 46 , S 47 , and S 48  are fully on and act as short circuits.  
         [0065]     At t=t yc4  period in  FIG. 7 , the Y side of the panel equivalent capacitor Cp is clamped to the voltage potential V 4  by fully turning on the switches S 44 , S 48  and Q L  of the scan IC  620 . The switches S 44  and S 48  act as short circuits.  
         [0066]     Scanning waveform (at t=t ye )  
         [0067]     The switch S 49  is fully turned on at this period. Q H  of the scan IC  620  is turned on except the period of producing the scan pulse. At the period of producing the scan pulse, Q L  of the scan IC  620  is turned on instead of Q H  of the scan IC  620 . Please refer to t=t ye  period in  FIG. 7 .  
         [0068]     The waveforms of the X side and the Y side of the panel equivalent capacitor Cp in  FIG. 7  can be rearranged according to the required timing or waveform shapes.  
         [0069]     Please refer to  FIG. 8 .  FIG. 8  shows a circuit diagram of a plasma display panel driving circuit  800  according to an embodiment of the present invention. The driving circuit  800  comprises switches S 51  to S 58 . High-side and low-side switches are realized through transistors Q H  and Q L  that are in a scan IC  820 . The display panel driving circuit  800  also comprises an inductor L 5 , an equivalent capacitor of a PDP C p , and five voltage sources V 1  to V 5 . A voltage source Vys couples to scan IC  820  in parallel, wherein the positive and negative terminals of Vys couple to Q H  and Q L , respectively. Voltage sources V 1  and V 2  are positive voltage sources and voltage sources V 3  and V 4  are negative voltage sources. Voltage sources V 1  and V 2  can have the same voltage potential or can be different. Likewise, voltage sources V 3  and V 4  can have the same voltage potential or can be different. The voltage potential of V 4  is higher than the voltage potential of V 5  and lower than the voltage potential of (V 5 +Vys). An energy recovery circuit  810  is electrically connected to the display panel driving circuit  800  at nodes A and B, and includes switches S 55 , S 56 , S 57  and L 5 , wherein L 5  and S 57  couple in series.  
         [0070]     Please refer to  FIG. 9 .  FIG. 9  illustrates a circuit diagram of a plasma display panel driving circuit  900  implemented using MOSFET transistors. The switches S 61  to S 68  are all n-channel MOSFETs. Energy recovery circuit  910  includes switches S 65 , S 66 , S 67 , and L 6  wherein L 6  and S 67  couple in series. In addition, the scan IC  920  is realized out of two BJT transistors Q H  and Q L  although other types of transistors could also be used.  
         [0071]      FIG. 10  illustrates the PDP driving waveform. It can be realized by  FIG. 9 . In  FIG. 10 , the high level of the signals for all switches represents the ON-state, and the low level of the signals for all switches represents the OFF-state. If the switch can operate in either ON-state or OFF-state, the signals will be marked as X. The switches can either be fully on or act as the large resistors or variable resistors in ON-state.  
         [0072]     There are several different waveforms at the X side of the panel equivalent capacitor Cp. The operations are as follows. Please refer to  FIG. 9  and  FIG. 10  for examples.  
         [0073]     Positive ramp or exponential waveform (at t=t xa )  
         [0074]     Charge the X side of the panel equivalent capacitor Cp from low voltage potential to high voltage potential exponentially or linearly by turning on the switch S 61 . The switch S 61  acts as the large resistor or the variable resistor in t=t xa  period in  FIG. 10 .  
         [0075]     Negative ramp or exponential waveform (at t=t xb )  
         [0076]     Discharge the X side of the panel equivalent capacitor Cp from high voltage potential to low voltage potential exponentially or linearly by turning on the switch S 63 . The switch S 63  acts as the large resistor or the variable resistor at t=t xb  period in  FIG. 10 .  
         [0077]     Clamping waveform (at t=t xc1 , t=t xc2  and t=t xc3 )  
         [0078]     The X side of the panel equivalent capacitor Cp is clamped to the voltage potential V 3  by fully turning on the switch S 63  at t=t xc1  and t=t xc2  periods in  FIG. 10 . The X side of the panel equivalent capacitor Cp is clamped to the voltage potential V 1  by fully turning on the switch S 61  at t=t xc3  period in  FIG. 10 . The switches S 63  and S 61  act as short circuits during these periods.  
         [0079]     Energy recovery waveform (at t=t xc2 , t=t xd1 , t=t xc3  and t=t xd2 )  
         [0080]     At t=t xc2  period in  FIG. 10 , the X side of the panel equivalent capacitor Cp is clamped to the voltage potential V 3  by fully turning on the switch S 63 . The switch S 63  acts as a short circuit.  
         [0081]     At t=t xd1  period in  FIG. 10 , the X side of the panel equivalent capacitor Cp is charged from V 3  to V 1  through the components S 65 , S 67  and L 6 . The switches S 65  and S 67  are fully on and act as short circuits.  
         [0082]     At t=t xc3  period in  FIG. 10 , the X side of the panel equivalent capacitor Cp is clamped to the voltage potential V 1  by fully turning on the switch S 61 . The switch S 61  acts as a short circuit.  
         [0083]     At t=t xd2  period in  FIG. 10 , the X side of the panel equivalent capacitor Cp is discharged from V 1  to V 3  through the components S 65 , S 67  and L 6 . The switches S 65  and S 67  are fully on and act as short circuits.  
         [0084]     There are several different waveforms at the Y side of the panel equivalent capacitor Cp. The operations are as follows. Please refer to  FIG. 9  and  FIG. 10  for examples.  
         [0085]     Positive ramp or exponential waveform (at t=t ya1  and t=t ya2 )  
         [0086]     Charge the Y side of the panel equivalent capacitor Cp from low voltage potential to high voltage potential exponentially or linearly by turning on the switches S 62  and Q L  or the switches S 62  and Q H  of scan IC  920 . If the path is through the switches S 62  and Q L  of scan IC  920 , the highest voltage potential can reach V 2 . If the path is through the switches S 62  and Q H  of scan IC  920  and the voltage potential Vys, the highest voltage potential can reach (V 2 +Vys). At t=t ya1  and t=t ya2  periods in  FIG. 10 , the switch S 62  acts as the large resistor or the variable resistor.  
         [0087]     Negative ramp or exponential waveform (at t=t yb )  
         [0088]     Discharge the Y side of the panel equivalent capacitor Cp from high voltage potential to low voltage potential exponentially or linearly by turning on the switches S 64  and Q H  of scan IC  920  or the switches S 68  and Q L  of scan IC  920 . The switch S 64  or the switch S 68  acts as the large resistor or the variable resistor at this period. If switch S 64  is used, the lowest voltage potential can reach V 4 . If switch S 68  is used, the lowest voltage potential can reach V 5 . At t=t yb  period in  FIG. 10 , the Y side of the panel equivalent capacitor Cp is pulled down from the voltage potential V 2  to the voltage potential V 5 . The switches S 68  and Q L  of scan IC  920  are turned on and switch S 68  acts as the large resistor or the variable resistor.  
         [0089]     Clamping waveform (at t=t yc1 , t=t yc2 , t=t yc3  and t=t yc4 )  
         [0090]     The Y side of the panel equivalent capacitor Cp is clamped to the voltage potential V 2  by fully turning on the switches S 62  and Q L  of scan IC  920 . The Y side of the panel equivalent capacitor Cp is clamped to the voltage potential V 4  by fully turning on the switches S 64  and Q H  of scan IC  920 . The Y side of the panel equivalent capacitor Cp is clamped to the voltage potential V 5  by fully turning on the switches S 68  and Q L  of scan IC  920 . The switches S 62 , S 64  and S 68  act as short circuits during these periods. At t=t yc1 , t=t yc2 , t=t yc3  and t=t yc4  periods in  FIG. 10 , the Y side of the panel equivalent capacitor Cp is clamped to the voltage potentials V 2  and V 4 , respectively.  
         [0091]     Energy recovery waveform (at t=t yd1 , t=t yc3  , t=t yd2  and t=t yc4 )  
         [0092]     At t=t yd1  period in  FIG. 10 , the Y side of the panel equivalent capacitor Cp is charged from V 4  to V 2  through the components S 66 , S 67 , Q H  of scan IC  920  and L 6 . The switches S 66  and S 67  are fully on and act as short circuits.  
         [0093]     At t=t yc3  period in  FIG. 10 , the Y side of the panel equivalent capacitor Cp is clamped to the voltage potential V 2  by fully turning on the switches S 62  and Q L  of scan IC  920 . The switch S 62  acts as a short circuit.  
         [0094]     At t=t yd2  period in  FIG. 10 , the Y side of the panel equivalent capacitor Cp is discharged from V 2  to V 4  through the components S 66 , S 67 , Q H  of scan IC  920  and L 6 . The switches S 66  and S 67  are fully on and act as short circuits.  
         [0095]     At t=t yc4  period in  FIG. 10 , the Y side of the panel equivalent capacitor Cp is clamped to the voltage potential V 4  by fully turning on the switches S 64  and Q H  of scan IC  920 . The switch S 64  acts as a short circuit.  
         [0096]     The switching of scan IC  920  at this period is soft switching and Q H  and Q L  of scan IC  920  operate in zero voltage switching (ZVS).  
         [0097]     Scanning waveform (at t=t ye )  
         [0098]     The switch S 68  is fully turned on at this period. Q H  of scan IC  920  is turned on except the period of producing the scan pulse. At the period of producing the scan pulse, Q L  of scan IC  920  is turned on instead of Q H  of scan IC  920 . Please refer to t=t ye  period in  FIG. 10 .  
         [0099]     The waveforms of the X side and the Y side of the panel equivalent capacitor Cp in  FIG. 10  can be rearranged according to the required timing or waveform shapes.  
         [0100]     Please refer to  FIG. 11 .  FIG. 11  is a circuit diagram of energy recovery circuit  1110 . Energy recovery circuits  410 ,  510 ,  610 ,  810 , and  910  shown in  FIGS. 4-6  and  8 - 9  can be replaced by energy recovery circuit  1110  in  FIG. 11  for changing the slopes of sustain waveforms of the X side and the Y side. The energy recovery circuit  1110  contains switches S 85 , S 86 , and S 87  and inductors L 82  and L 83 . Inductor L 82  and switch S 85  couple in series and inductor L 83  and switch S 86  couple in series. The slopes of the X side and the Y side can be adjusted by adjusting the properties of the inductors L 82  and L 83 , respectively.  
         [0101]     Please refer to  FIG. 12  and  FIG. 13 . If the voltage potentials of V 3  and V 4  are ground, the energy recovery circuits  410 ,  510 ,  610 ,  810 ,  910 , and  1110  should instead be replaced by energy recovery circuit  1210  or  1310 . The energy recovery circuit  1210  contains switches S 95 , S 96 , and S 97 , inductor L 91 , and capacitor C 91 . Inductor L 91 , switch S 97 , and capacitor C 91  couple in series. The energy recovery circuit  1310  contains switches S 951 , S 961  and S 971 , inductors L 92  and L 93 , and capacitor C 92 . Switch S 951  and inductor L 92  couple in series, switch S 961  and inductor L 93  couple in series, and switch S 971  and capacitor C 92  couple in series.  
         [0102]     Please note that the waveforms shown in  FIG. 7  and  FIG. 10  are merely two examples of waveforms that can be produced according to the present invention. Other waveforms could also be produced by rearranging the order in which the various switches are turned on and off. The scan ICs of the present invention switch use soft switching at all times except during the scanning period.  
         [0103]     The present invention can also be implemented by connecting two or more switches in parallel for sharing current. For example, switch S 61  in  FIG. 9  can be composed of two n-channel MOSFETs electrically connected in parallel for sharing the current. These two n-channel MOSFETs can be designed to create different slopes.  
         [0104]     Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.