Abstract:
The present invention provides a programmable integrated inductor having a compact design, having a dual turn and a parallel programmable impedance. In particular, the impedance value of the programmable changes, like a variable, programmable, as its range may be set to an unlimited number of values. The invention, thus, provides a wider range of programmable values without compromising space, at a constant equivalent given inductor area.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     The present application is a national filing in the U.S. Patent &amp; Trademark Office of PCT/IB2007/052611 filed Jul. 4, 2007, and claims priority of EPO Patent Application No. 06300777.7 filed Jul. 7, 2006, both of which applications are incorporated herein in their entireties by this reference. 
     FIELD OF THE INVENTION 
     The present invention relates to the field of programmable integrated inductors. In particular, the invention relates to providing a wide programmable inductance range within a compact area. 
     BACKGROUND OF THE INVENTION 
     Programmable inductors are essential components in Radio Frequency (RF) circuits in the domains of telecommunications, mobile communications, wireless local area networks (WLAN), TV, networking and so on. With such devices, many useful applications may be implemented, such as programmable voltage controlled oscillators (VCO), programmable filters, output buffers using a programmable over-shoot or boost, programmable features, i.e., gain, linearity, matching networks, in circuits like LNAs (Low Noise Amplifiers), mixers, power amplifiers and the like. 
     A traditional programmable inductor includes many inductors and switches in order to achieve the programmability function. For example, referring to  FIG. 1 , a schematic diagram illustrates a conventional programmable inductor implementation using multi-inductors technique with switches. 
     In particular, an exemplary programmable inductor  100  is shown having two conductors  102  and  104  and two switches  106  and  108 . When the switches  106  and  108  are both connected, the inductors  102  and  104  are connected to the inductor terminals in parallel. When either of the switches  106  and  108  have been disconnected, only inductor  102  is connected to the inductor terminals. Therefore, with the control of the switches  106  and  108 , inductors  102  and  104  may be connected to the inductor terminals in different configurations. Consequently, two different inductor values may be obtained in the inductor terminals, and the inductance value of this inductor is programmable. 
     However, this type of programmable inductor presents a number of limitations. The programmable inductor  100  takes too much area space because the inductor number increases with the number of programmable values. Therefore, when an area of an inductor is limited, the programmable values range are also limited. Furthermore, because of the large area, an inductor&#39;s radiations and magnetic coupling with other blocks or devices also increase, causing further performance degradations. 
     For example, to address the above drawbacks, various solutions have been advanced. One solution presented in, namely, US Patent Application 2006/0033602 A1, proposes a variable integrated inductor which has an inductance value that may be switched between two or more values. This reference proposes a principle based on the coupling between a primary inductor and a secondary one, the last being programmable with switches, which makes the coupling itself variable and as a result, the value of the primary inductor also varies. 
     However, in this type of variable integrated inductor, in one scenario where many secondary inductor pairs are disposed in a plan with each one placed near one another, the inconvenience of spatial extension and increasing coupling and radiation issues are present. In another scenario where these secondary inductor pairs are superposed over each other, there is no area issue which can be invoked. Further, another limitation arises resulting from the parasitic capacitors between the secondary inductors and the substrate on a side, and the primary inductor and the secondary inductors on the other side. These parasitic capacitors define the own resonance frequency of the primary and secondary inductors. The higher the capacitors are, the lower are the resonance frequencies, and an inductor may not be used at a frequency close or inferior to its resonance frequency. Therefore, there is a limitation on the frequency of use, resulting primarily from the superposition of many inductors, which may affect either the primary or the secondary inductors. Consequently, the increase of the programmability range may not be implemented without giving an upward limitation on the utilization frequency of a given programmable inductor. 
     Therefore, in view of these concerns, there is a continuing need for developing a new and improved programmable integrated inductor which would avoid the disadvantages and above mentioned problems while being cost effective and simple to implement. 
     OBJECT AND SUMMARY OF THE INVENTION 
     Accordingly, it is an object of the present invention to provide an improved programmable inductor as indicated according to claim  1 . In particular, the invention includes a programmable integrated inductor including a dual-turn inductor with at least one inner turn and at least one outer turn, where a current generated by the inner and the outer turn have the same direction, and at least one parallel programmable impedance configured to change an impedance value and an inductance value of the inductor, where the impedance value is a variable based as a function of a digital or an analog signal and the inductance value is programmable so that its range may be set to an unlimited number of values. 
     One or more of the following features may also be included. 
     In one aspect of the invention, the current in the inner turn is configured to generate a magnetic field B 1  and the current in the outer turn is configured to generate a magnetic field B 2 . 
     In yet another aspect, the range of values of the programmable inductor is configured to increase without increasing inductor dimensions. 
     In another aspect, dual-turn inductor includes N number of turns, or the dual-turn inductor includes a FIG. 8 shape and further includes at least one lower dual-turn and at least one upper dual-turn. 
     Embodiments may have one or more of the following advantages. 
     Advantageously, the present programmable integrated inductor may be implemented in a compact area, taking no more chip area than that required by traditional fixed inductors. Thus, compact design and space saving is achieved with an important area ratio saving. Further, the present invention increases the programmable inductance values range at a constant area. This new inductor area being relative to its maximum programmable value, the area saving results because there is no need to add other auxiliary or supplementary inductors to get access to lower inductor values. This permits the use of a single compact device rather than using many devices. 
     Furthermore, due mainly to the area limitation, the inductor layouts have reduced magnetic radiations and coupling. Thus, the area savings also results in an improvement of magnetic coupling properties. In other words, the limitation of the spatial extension considerably improves the sensitivity regarding the received and emitted radiations. This avoids high magnetic coupling or radiations issues in circuits containing separate and switchable inductors, which are caused mainly by the spatial extension of these conventional inductors. Thus, coupling properties are significantly improved. 
     Additionally, the programmable integrated inductor provides an inductance value that can be set to any value by changing the inductance value of parallel impedances. With this inductance value, it is possible to obtain either a continuous or a discrete law with the control signals. Further, the analog programmability option is also possible around any inductor value, being digitally programmable. Thus, it is possible to have either digital or analog programmability. 
     Furthermore, the invention advantageously provides a novel programmable inductor with a wide range of programmable values, providing a higher programmability range for a given and equivalent inductor area, as well as maximum frequency of utilization whereby the utilization of the programmable inductor can be carried out at much higher frequencies. 
     Another added value for devices implementing programmable inductors is the ability to facilitate front-end convergence solutions, such as making single-block LNAs or mixers compatible with many RF bands or standards requirements, mainly on gain and linearity parameters (IIP2, IIP3), or unifying many matching networks into a single structure that may be adapted to the desired RF band only by changing the inductor value. Any type of filters using inductors may also be easily adapted in their characteristics by using such programmable inductors. 
     These and other aspects of the invention will become apparent from and elucidated with reference to the embodiments described in the following description, drawings and from the claims. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a schematic diagram illustrating a traditional programmable inductor implementation using a multi-inductor assembly with switches; 
         FIG. 2  is a schematic diagram illustrating a fixed dual-turn inductor, illustrating the implementation of an improved method and system according to one of the embodiments of the present invention; 
         FIG. 3  is a schematic diagram illustrating a programmable dual-turn inductor, according to one of the embodiments of the present invention; 
         FIG. 4  is a schematic diagram illustrating a 3-turn programmable inductor, according to one of the embodiments of the present invention; 
         FIG. 5A  is a schematic diagram illustrating a figure “8” shaped dual-turn programmable inductor, according to one of the embodiments of the present invention; and 
         FIG. 5B  is a schematic diagram illustrating another derivative figure “8” shaped dual-turn programmable inductor, according to one of the embodiments of the present invention. 
     
    
    
     DESCRIPTION OF EMBODIMENTS 
     Referring to  FIG. 2 , a schematic diagram illustrates a fixed dual-turn inductor  200 . The inductor  200  includes an outer turn  202  and an inner turn  204 . With the structure of the dual-turn inductor  200 , the current in the outer turn  202  travels in the same direction as the current in the inner turn  204 . In  FIG. 2 , it can be seen that both the outer turn  202  and the inner turn  204  are turning clockwise, as indicated by the arrows. Consequently, the current in the outer turn  202  generates a magnetic field B 1    206  and the current in the inner turn  204  generates a magnetic field B 2    208 . 
     The magnetic flux generated by each turn may be defined by the following equation:
 
Φ k   =∫∫{right arrow over (B)}   k   {right arrow over (d)}S  ( k =1, 2)  [Equation No. 1]
 
     As magnetic fields B 1    206  and B 2    208  have the same directions, the total magnetic flux inside the dual-turn inductor  200  is the addition of the magnetic flux Φ 1  and Φ 2 , where Φ 1  is the magnetic flux calculated from the magnetic field B 1    206  by Equation No. 1 and Φ 2  is the magnetic flux calculated from the magnetic field B 2    208 . The inductance value of the fixed dual-turn inductor  200  may be defined as follows:
 
 L=Φ   tot   /i =(Φ 1 +Φ 2 + . . . +Φ k )/ i   [Equation No. 2]
 
     Referring now to  FIG. 3 , a schematic diagram illustrates a programmable dual-turn inductor  300 , which includes a dual-turn inductor outer turn  302  and an inner turn  304  with a parallel programmable impedance  310 . The structure of the dual-turn inductor  300  is the same as the fixed dual-turn inductor  200 . 
     If the current in the outer turn  302  has the same value and direction as the current in the outer turn  202  as shown in  FIG. 2 , the current in the inner turn  304  is lower than the current in the inner turn  204  of the fixed dual-turn inductor  200  of  FIG. 2 . The current i is separated into two branches at point  312  where one branch i′ crosses over to the inner turn  304  and another Δi proceeds to go through the impedance  310 . These two branches then combine at point  314 . The current i′ is given by following equation:
 
 i′=i−Δi   [Equation No. 3]
 
     The current i′ in the inner turn  304  is lower than the current i in the inner turn  204  of  FIG. 2 . A generated magnetic field  308  of the inner turn  304  is lower than the generated magnetic field  208 . As indicated by the Equation No. 1, the magnetic flux generated by the inner turn  204  is lower. Referring then to Equation No. 2, since the value of current i is fixed, the inductance value of the inductor  300  will be lower than that of the inductor  200 . 
     By making the impedance value of the impedance  310  vary as a function of a digital or an analog signal, the inner current i′ may be modulated. When the impedance value of  310  is changed, Δi is changed, then i′ is similarly modified based on Equation No. 3. According to Equations No. 1 and No. 2, the current i′, the magnetic field, the total flux, and the inductance value may be modulated. In this way, regardless of a discrete or a continuous law, the inductance value can be realized as a function of the control signal. The analog programmability option is possible around any inductor value, being digitally programmable. And the inductance value may be set to as many values as desired in the available range. 
     The variable impedance may be realized with a programmable trans-conductance or impedance, e.g., a MOS device, with a voltage signal controlling the gate. The variable impedance may also be realized by using a small Varicap (diode) block in parallel, providing an AC parallel path as a function of a tune voltage signal, i.e., using small size Varicaps to ensure a very high resonance frequency. 
     The added parasitics by the MOS switches are much lower and negligible if compared to those created by the secondary inductors, this being true regardless of whether the secondary inductor is single or multiple. The secondary inductor, i.e., single or multiple, being built with wide metal layers, generates naturally higher parasitic capacitors than the MOS switches. Therefore, for a given and equivalent programmability range, the utilization of the programmable inductor may be performed at much higher frequencies. 
     The possible degradation of the quality Q-factor may be considered to be an inconvenience due to the parallel impedance influence. However, the degradation may be roughly comparable to implementations that use simple switches. Many applications do not require high levels of Q-factor, such as broadband applications or blocks where linearity or gain/boost programmability specifications are more critical than noise or selectivity aspects. 
     In order to achieve a wider range of programmable values at a constant area, a dual-turn programmable inductor may be extended to an N-turns programmable inductor. For example, referring to  FIG. 4 , a 3-turn programmable inductor  400  is shown. The conductor has the form of a 3-turn inductor as shown by turns  402 ,  404  and  406  and two parallel programmable impedances  408  and  410 . This particular configuration offers the additional third turn  406  and the additional parallel programmable impedance  410  to the dual-turn inductor  300 , illustrated in  FIG. 3 . As shown, arrows indicate the direction of the currents in this exemplary 3-turn programmable inductor  400 . 
     For example, if the current in the first turn  402  is i, the current i′ in the second turn  404  may be given by the Equation No. 3. The current i″ in the third turn  406  may be given by the following relation:
 
 i″=i′−Δi′=i−Δi−Δi′   [Equation No. 4]
 
     The impedance values of the parallel programmable impedance  408  and  410  may be modulated by two separated signals, and then current Δi and Δi′ are under control. Referring to the foregoing Equations Nos. 1-4, the inductance value of the inductor  400  is a variable one. By making the impedance value of the programmable impedances  408  and  410  a function of a digital or an analog signal, the inductance value of the inductor  400  is programmable and may be set to as many values as desired in the available range. 
     Although in  FIG. 4 , a 3-turn programmable inductor has been shown and described, it may also be possible to implement more than a 3-turn programmable inductor which enables a much wider inductance value range. 
     Referring now to  FIG. 5A , a schematic diagram illustrates a figure-8-shaped dual-turn programmable inductor  500 , which presents the features of the previous configurations and further reduced coupling properties. The inductor  500  has the form of a dual-turn figure “8” shaped structure or configuration with two lower dual-turns  502  and  504 , upper dual-turns  506  and  508  and two programmable impedances  510  and  512 . 
     By virtue of the figure “8” shape, currents in the upper dual-turns  506  and  508  travel in a direction, e.g., counterclockwise, that is opposite to the current direction in the lower dual-turns  502  and  504 , which happens to be clockwise. Consequently, the figure “8” shape geometry has the advantage that the magnetic fields which emanate from the lower dual-turns  502  and  504  and the upper dual-turns  506  and  508  have opposing directions. As a result, the coupling properties are reduced. 
     Still referring to  FIG. 5A , if the current in the lower dual-turn  502  is i, the current i′ in the upper dual-turns  506  and  508  may be given by the Equation No. 3, and the current i″ in the lower dual-turn  504  may be given by the Equation No. 4. With respect to Equations Nos. 1 and 2, the inductance value of the inductor  500  is variable by modulating the impedance values of the programmable impedances  510  and  512 . By making the impedance value of the programmable impedances  510  and  512  a function of a digital or an analog signal, the inductance value of the inductor  500  is programmable and can be set to as many values as desired in the available range. 
     Referring now to  FIG. 5B , a schematic diagram illustrates another derivative figure “8” shaped dual-turns programmable inductor  500 B, which allows more symmetrical current distributions and magnetic fields. The inductor  500 B is a derivative inductor from inductor  500  of  FIG. 5A . Analogously, inductor  500 B has the lower dual-turns  502 B and  504 B, and upper dual-turns  506 B and  508 B structure. However, inductor  500 B has an variable impedance  512 B positioned at the top of the inductor  500 B. 
     By virtue of the figure “8” shape, current in the upper dual-turns travels in a direction opposite to the current in the lower dual-turns. If the current in the lower dual-turn  502 B is i, the current in upper turn  508 B is still i and the current in the lower turn  504 B and upper turn  506 B may be i′, which can given by the Equation No. 3. With respect to Equations Nos. 1 and 2, the inductance value of the inductor  500 B is a variable by modulating the impedance values of the programmable impedances  512 B. 
     Referring back to inductor  500 A of  FIG. 5 , which has i′+i′ and i+i″ total currents, respectively, for the upper and lower turns, the values of i′+i′ and i+i″ are not identical at all times. With respect to Equation No. 1, the upper and the lower magnetic fields may not be symmetrical, depending on the programmable impedances values. Comparatively, the inductor  500 B has i′+i and i+i′ total currents, respectively, for the upper and the lower turns. Total currents i′+i and i+i′ always have the same value. This results in more symmetrical upper and lower magnetic fields, regardless of the programmable impedance value. 
     Therefore, inductor  500 B in  FIG. 5B  allows more symmetrical currents distributions and magnetic fields between the upper-turns and the lower-turns. Consequently, this improves the external magnetic and coupling suppression properties for the inductor  500 B configuration. 
     Although the figure “8” shape dual-turn programmable inductor has been shown and described above with reference to  FIG. 5B , it is also possible to implement a derivative figure “8” shaped N-turn programmable inductor which enables a wider inductance value range. 
     An implementation of a programmable dual-turn inductor using an NMOS transistor as a parallel impedance has been carried out over a test-chip. For example, the NMOS size may be W=150 μm, L=0.25 μm, stripes=5. In this example, the programmable dual-turn inductor includes a dual-turn inductor and a NMOS used as a parallel impedance and an inductor control pad. The impedance control is made with a voltage potential applied directly on the gate. 
     While there has been illustrated and described what are presently considered to be the preferred embodiments of the present invention, it will be understood by those of ordinary skill in the art that various other modifications may be made, and equivalents may be substituted, without departing from the true scope of the present invention. 
     Additionally, many advanced modifications may be made to adapt a particular situation to the teachings of the present invention without departing from the central inventive concept described herein. Furthermore, an embodiment of the present invention may not include all of the features described above. Therefore, it is intended that the present invention not be limited to the particular embodiments disclosed, but that the invention include all embodiments falling within the scope of the appended claims and their equivalents.