Abstract:
A method and apparatus for providing a more reliable protection device and an improved PIC power integrated switch. Accordingly, the over-temperature status of the switch as well as the overcurrent status of each of a plurality of ports of the switch are detected. If there is over-temperature, ports with the overcurrent status are identified as a potential cause. These ports are then switched off. After a predetermined waiting time period during which the switch temperature is expected to decrease, the over-temperature status of the switch is again checked. If the over-temperature disappears, then the ports with non-overcurrent status remain on. However, if the over-temperature persists, then all of the ports are turned off. The improved PIC switch thus increases the dynamic operation range of the conventional PIC switch, while ensuring normal operations.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application is related to two commonly assigned applications being filed on the same day as this application, by the same inventors, entitled “Power Line Protection Devices and Methods Capable of Preventing False Fault Reporting” and “Integrated Switch Devices with Enhanced Functionalities,” respectively, U.S. application Ser. Nos. 09/280,267 and 09/290,272, respectively. The disclosures of these two applications are hereby incorporated by reference. 
    
    
     BACKGROUND OF THE INVENTION 
     The invention relates generally to protection devices, and more particularly to those used in computer power bus lines, which power downstream electronic components and power management circuits. 
     Modern technologies have allowed more and more computers to be connected to one another by way of networking. Each computer may have numerous peripheral devices connected to it. Peripheral devices include not only the traditional ones such as a keyboard, a mouse, etc., but also those with new applications, e.g., a digital camera. In a typical network system, a hub is connected to a number of nodes, each of which may be connected to a number of sub-nodes. Each node or sub-node may be a computer or a peripheral device. Each sub-node may be connected to additional sub-sub-nodes, and so on. In such a network system, power is typically distributed to the various nodes and sub-nodes, etc. One example of such a network environment relates to the recent USB (Universal Serial Bus) standards, e.g., USB-IF, USB Specification, Rev. 1.1, 1998. 
     In such a network system, each network node is continuously monitored. Normal operation as well as fault conditions (e.g., overcurrent, over-temperature, under-voltage, etc.) are constantly reported to a control circuit. When a fault condition, e.g., overcurrent condition, occurs at one node or sub-node, it is important that any point of failure not affect the operation of the remaining portions of the network system. In other words, the failure must be localized and isolated in order to achieve high performance in a network system. 
     Various power bus line protection devices have been proposed. Most conventional protection devices include a power integrated circuit (PIC) switch that uses overload detection circuitry to continuously monitor current flowing to all ports controlled by the switch as well as the temperature of the switch. If the preset current limit of a port is exceeded, the “offending” port is turned off. If the preset temperature limit of the switch is reached as a result of an overcurrent status of a port, for example, all ports are usually turned off without regard to the non-overcurrent status of any of the other ports. This protection scheme has the potential to significantly reduce the dynamic operation range for the switch controlling multiple ports, because if only one port is overloaded, which causes the over-temperature status of the switch, all other ports are turned off nonetheless. 
     Another proposed protection scheme uses a temperature range for the switch as a reference guide for switching off the ports. If the temperature of the switch reaches the lower limit of the range, an overload detection circuitry monitors the temperature of the switch more closely, but no action is taken, in anticipation of a decrease in the temperature. If the temperature continues to rise and eventually reaches the higher limit of the temperature range, the port is switched off. Such a scheme, however, cannot reliably protect the switch against overload, because the temperature range creates an uncertain overload region. If the temperature of the switch stays near the high end of the range for a relatively long period of time, without ever reaching the higher limit of the range, there is a high probability that the switch will be permanently damaged. 
     Therefore, there is a need to provide a more reliable protection device and an improved PIC switch that increases the dynamic operation range of the conventional PIC switch, while ensuring normal operations. 
     SUMMARY OF THE INVENTION 
     The present invention provides a more reliable protection device and an improved PIC switch that increases the dynamic operation range of the conventional PIC switch, while ensuring normal operations. 
     According to one embodiment of the present invention, a switch device is provided and comprises first and second ports; a fault protection logic for detecting over-temperature status of the device and overcurrent status of each of the first and second two ports and for generating control signals based on the over-temperature status and the overcurrent status of each of the two ports; and a control logic, responsive to the control signals, for switching on and off the two ports. In this embodiment, if there is an over-temperature and there is an overcurrent at the first port, but there is no overcurrent at the second port, the protection logic controls the control logic to switch off the first port and after a predetermined time period, the protection logic re-checks the over-temperature status of the device and controls the control logic to switch off the second port if the over-temperature persists. The predetermined time period is preferably about 300 ms. 
     According to one aspect of the embodiment of the invention, if there is an over-temperature and the overcurrent status at each of the ports is the same, the protection logic controls the control logic to switch off both of the ports. 
     According to another aspect of the embodiment of the invention, the protection logic includes a current limit circuit and if there is no over-temperature, but there is overcurrent status at both of the ports, the current limit circuit causes the control logic to limit current flowing through each of the ports to a predetermined value. If there is no over-temperature and there is no overcurrent at the first port, but there is overcurrent at the second port, the current limit circuit causes the control logic to limit current flowing through the second port to the predetermined value. The predetermined value is preferably about 500 mA. 
     According to a further aspect of the embodiment of the invention, the control logic includes a flag control circuit for setting a flag for each of the ports if such port is switched off and for setting a flag for each of the ports if current is limited at such port. 
     According to another embodiment of the invention, a method for protecting a switch device having first and second ports is provided. The method comprises the steps of: (a) detecting an over-temperature status of the device; (b) detecting an overcurrent status of each of the first and second ports; (c) if there is over-temperature and there is overcurrent at first port, but there is no overcurrent at the second port, switching off the first port and waiting for a predetermined time period; (d) after waiting for the predetermined time period, re-checking the over-temperature status of the device; and (e) if, after waiting for the predetermined time period, the over-temperature persists, switching off the second port. The predetermined time period is preferably about 300 ms. 
     According to the method embodiment of the invention, if there is an over-temperature and the overcurrent status at each of the ports is the same, both of the ports are switched off. If there is no over-temperature, but there is overcurrent status at both of the ports, the current flowing through each of the ports is limited to a predetermined value. If there is no over-temperature and there is no overcurrent at the first port, but there is overcurrent at the second port, the current flowing through the second port is limited to a predetermined value. The predetermined value is preferably about 500 mA. 
     Other objects and attainments together with a fuller understanding of the invention will become apparent and appreciated by referring to the following description and claims taken in conjunction with the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     In the drawings wherein like reference symbols refer to like parts: 
     FIG. 1 shows a functional block diagram illustrating an application of a power management and protection device according to an embodiment of the present invention; 
     FIG. 2 shows an exemplary PIC switch according to an embodiment of the present invention; 
     FIG. 3A shows a logic circuit diagram illustrating an exemplary implementation of the PIC switch in FIG. 2; 
     FIG. 3B illustrates an exemplary implementation of the gate drive logic in FIG. 3A; 
     FIG. 4 shows a flow chart diagram illustrating the operation of the IC switch according to an embodiment of the present invention; and 
     FIG. 5 shows a table summarizing the operation results obtained from implementing the flow chart in FIG.  4 . 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 1 shows a functional block diagram illustrating an application of a power management and protection device  66  in a personal computer environment, according to an embodiment of the present invention. In FIG. 1, a host  10  communicates with a peripheral device  11  via a USB port  12 . Peripheral device  11  communicates with other peripheral devices A and B (not shown) via USB ports  32  and  42 , respectively. USB port  12  includes a power line  13 , two data lines  14  and  15 , and a return line  16 . Similarly, USB port  32  includes a power line  33 , two data lines  34  and  35 , and a return line  36 ; USB port  42  includes a power line  43 , two data lines  44  and  45 , and a return line  46 . Peripheral device  11  includes a power management and protection device  66 , which includes a USB controller  22  and a power integrated circuit (PIC) switch  70 . Controller  22  may be a TUSB 2040 or TUSB 2070 device which is commercially available from Texas Instruments of Dallas, Tex. PIC switch  70  controls power supplied to USB ports  32  and  42  via power lines  33  and  43 , respectively. PIC switch  70  will be described in more detail later with reference to FIGS. 2 and 3. 
     Host  10  periodically checks peripheral devices  11  and other connected peripheral devices A and B to determine their present status, e.g., whether there is a data request, a fault condition report, etc. Under normal conditions in which no overcurrent is present at either port and PIC switch  70  operates at normal operating temperature, controller  22  sends active enable signals V EN 1   and V EN 2   to PIC switch  70  for controlling power supply to ports  32  and  42 , respectively. Under the normal conditions and upon receiving the enable signals by PIC switch  70 , power is supplied to ports  32  and  42  via power lines  33  and  43 , respectively. When a fault condition, such as an overcurrent, occurs at one of the ports, PIC switch  70  sends a fault flag signal, V FG 1   or V FG 2   , to controller  22 , which then informs host  10  of the fault condition. Depending on the over-temperature status of PIC switch  70  and the overcurrent status of the other port, the PIC switch will take appropriate actions with respect to the port having the overcurrent status. The operation details of PIC switch  70  will be described later in connection with FIG.  4 . 
     FIG. 2 shows an exemplary embodiment of PIC switch  66 , which has ports  1  and  2  for connecting to USB ports  32  and  42  (shown in FIG.  1 ), respectively. PIC switch  66  comprises an over-temperature/overcurrent (OT/OC) logic  76 , a gate and flag control logic  78 , and a plurality of switches SW 1  to SW 4 , with SW 1  for supplying power for port  1 , SW 2  for supplying power for port  2 , SW 3  for setting a flag signal VFGI for port  1 , and SW 4  for setting a flag signal VFG 2  for port  2 . 
     In PIC switch  66 , an over-temperature sensor  80  detects whether over 20  temperature is present and if so, it will output an OT signal to indicate an OT status of the switch. Upon receiving an OT signal, over-temperature shutdown circuit  82  outputs a control signal to port  1  flag control circuit  106 . 
     Current sensor  92  detects the current flowing via the Vin terminal of port  1  and reports to port  1  overcurrent circuit  84 , which detects whether there is overcurrent at port  1 . Upon detecting overcurrent, port  1  overcurrent circuit  84  outputs an OC 1  signal to indicate an overcurrent status of port  1 . Similarly, current sensor  94  detects the current flowing via the Vin terminal of port  2  and reports to port  2  overcurrent circuit  86 , which detects whether there is overcurrent at port  2 . Upon detecting overcurrent, port  2  overcurrent circuit  86  outputs an OC 2  signal to indicate an overcurrent status of port  2 . In FIG. 2, each delay circuit  98  provides a predetermined time delay, e.g., 300 ms, in the case there is over-temperature, but only one port has an overcurrent status. 
     Port  1  overcurrent logic  102  receives OT, OC 1  and OC 2  signals and outputs control signals to current limit circuit  96  and port  1  control circuit  106 . Upon receiving a control signal from port  1  overcurrent logic  102 , current limit circuit  96  provides a current limit signal to port  1  flag control circuit  106  and SW 1  gate drive logic  112  for limiting the current flowing via the Vin terminal of port  1 . 
     Port  1  flag control circuit  106  receives input control signals from over-temperature shutdown circuit  82 , port  1  overcurrent logic  102  and current limit circuit  96 . Based on the input control signals, control circuit  106  outputs a gate control signal for controlling the setting of a flag signal V FG 1   for port  1 , via switch SW 3 . Control circuit  106  also generates a SW 1  turn-off signal to a SW 1  gate drive logic  112  in accordance with the input control signals. SW 1  gate drive logic  112  can be activated by enable signal V EN 1   to limit the current flowing via the Vin terminal of port  1  or to switch off the output power at port  1 , depending on the input control signals received. 
     Port  2  overcurrent logic  104  receives OT, OC 1  and OC 2  signals and outputs control signals to current limit circuit  96  and port  2  control circuit  108 . Upon receiving a control signal from port  2  overcurrent logic  104 , current limit circuit  96  provides a current limit signal to port  2  flag control circuit  108  and SW 2  gate drive logic  114  for limiting the current flowing via the Vin terminal of port  2 . 
     Port  2  flag control circuit  108  receives input control signals from over-temperature shutdown circuit  82 , port  2  overcurrent logic  104  and current limit circuit  96 . Based on the input control signals, control circuit  108  outputs a gate control signal for controlling the setting of a flag signal V FG 2   for port  2 , via switch SW 2 . Control circuit  108  also generates a SW 2  turn-off signal to a SW 2  gate drive logic  114  in accordance with the input control signals. SW 2  gate drive logic  114  can be activated by enable signal V EN 2   to limit the current flowing via the Vin terminal of port  2  or to switch off the output power at port  2 , depending on the control signals received. 
     FIG. 3A shows a logic circuit diagram illustrating an exemplary implementation of PIC switch  66  in FIG.  2 . It should be noted that in FIG. 3A, pull-up resistors R 1  and R 2  and zener diodes Z 1  and Z 2  (which are not illustrated in FIG. 2 for simplicity) may be either internal or external to the PIC switch. In the case in which they are internal components of the PIC switch, each of them may be disconnected, at the option of the customer, by way of masking during fabrication to accommodate circuit boards with any pre-mounted external pull-up resistors or zener diodes. 
     FIG. 3B illustrates an exemplary implementation of gate drive logic  112  and  114  in FIG.  3 A. In FIG. 3B, the power switch high side driver is a standard circuit, such as UC1724 commercially from Unitrode, or IR2110 commercially available from International Rectifier. 
     The circuits of FIGS. 2 and 3A operate in accordance with a flow chart diagram in FIG. 4, which is now described with reference to FIGS. 2 and 3. 
     As illustrated in FIG. 4, at step S 1 , power is up. Over-temperature sensor  80  checks the over-temperature (OT) status of the PIC switch at step S 2 . Port  1  overcurrent logic  102  and port  2  overcurrent logic  104  respectively check the overcurrent status of port  1  (OC 1 ) and of port  2  (OC 2 ) of PIC switch  66 , at step S 4 . Depending on the states of OC 1 , OC 2  and OT, different paths will be followed with different results. 
     Assuming both OC 1  and OC 2  are both false at step S 4 , and OT is false at step S 12 , path #8 is followed. Thus, no action will be taken and all ports remain in the on state. If, however, OT is true at step S 12  with both OC 1  and OC 2  being false, path #1 is followed. At step  14 , SW 1  and SW 2  gate drive logic  112  and  114  switch off ports  1  and  2 , respectively, to protect the PIC switch against overheating. Furthermore, port  1  and port  2  flag control circuits  106  and  108  set flags V FG 1   and V FG 2   for ports  1  and  2 , respectively, to indicate the overcurrent status at both ports. In this case, the over-temperature is apparently not caused by the overcurrent status of any particular port. Therefore, the PIC switch must be turned off entirely to protect against overheating. 
     If, at step S 4 , both OC 1  and OC 2  are true, and at step S 12 , OT is true, path #4 is followed with the same results as those derived from following path #1. That is, all ports are switched off and the flags are set for all ports to indicate the overcurrent status at the ports. On the other hand, if, at step S 12 , OT is false with both OC 1  and OC 2  being true, port  1  and port  2  flag control circuits  106  and  108  set the flags for ports  1  and  2 , respectively, at step S 72 . At step S 74 , SW 1  gate drive logic  112  and SW 2  gate drive logic  114  are activated to limit the current flowing via the Vin terminals of ports  1  and  2 , respectively, to a predetermined value, e.g., 500 mA. According to a preferred embodiment of the present invention, SW 1  and SW 2  are made of MOSFETs with small on-resistances. 
     If, at step S 4 , OC 1  is true, but OC 2  is false, and at step S 6 , OT is false, then path #5 is followed. At step S 52 , port  1  flag control circuit  106  sets a flag V FG 1   for port  1  to indicate an overcurrent status. At step S 54 , SW 1  gate drive logic  112  is activated to limit the current flowing via the Vin terminal of port  1  to a predetermined value, e.g., 500 mA, to prevent potential overheating of the PIC switch. On the other hand, if, at step S 6 , OT is true, path #2 is followed. At step S 22 , SW 1  gate drive logic  112  switches off port  1  and port  1  flag control circuit  106  sets a flag V FG 1   for port  1  to indicate the overcurrent status. In this case, the over-temperature may be caused by the overcurrent at port  1 . Therefore, it is desirable to turn off only the “offending” port  1 , while leaving port  2  with non-overcurrent status on unless over-temperature persists. Thus, there is a waiting period of 300 ms, at step S 24 , provided by a delay circuit  98 . After this waiting period, OT is checked again at step S 26 . At step S 28 , if OT is false, no action will be taken with respect to port  2  and port  2  remains on since there is no danger of overheating the PIC switch. If, however, OT persists at step S 28 , SW 2  gate drive logic  114  switches off port  2  and port  2  flag control circuit  108  sets a flag V FG 2   for port  2  at step S 29 . Therefore, the PIC switch is entirely turned off. 
     In the flow chart diagram of FIG. 4, if, at step S 4 , OC 1  is false, but OC 2  is true, and at step S 8 , OT is true, path #3 is followed, which is similar to path #2. At step S 32 , SW 2  gate drive logic  114  switches off port  2  and port  2  flag control circuit  108  sets a flag V FG 2   for port  2  to indicate the overcurrent status. In this case again, the over-temperature may be caused by the overcurrent at port  2 . Therefore, it is desirable to turn off only the “offending” port  2 , while leaving port  2  with non-overcurrent status on unless over-temperature persists. Thus, there is a similar waiting period of 300 ms, at step S 34 , provided by a delay circuit  98 . After this waiting period, OT is checked again at step S 36 . At step S 38 , if OT is false, no action will be taken with respect to port  1  and port  1  remains on because there is no danger of overheating the PIC switch. If, however, OT persists at step S 38 , SW 1  gate drive logic  112  switches off port  1  and port  1  flag control circuit  106  sets a flag VFGI for port  1  at step S 39 . The PIC switch is thus entirely turned off. 
     If, at step S 4 , OC 1  is false, but OC 2  is true, and at step S 8 , OT is false, path #6 is followed, which is similar to path #5. At step S 62 , port  2  flag control circuit  108  sets a flag V FG 2   for port  2  to indicate an overcurrent status. At step S 64 , SW 2  gate drive logic  114  is activated to limit the current flowing via the Vin terminal of port  2  to a predetermined value, e.g., 500 mA, to prevent potential overheating of the PIC switch. 
     After step  100  is reached, any further changes in the over-temperature status of the PIC switch and the overcurrent status at any of the ports will be reported by the PIC switch to controller which then re-enables the PIC switch to perform the steps in the flow chart of FIG.  4 . 
     The flow chart in FIG. 4 can be easily adapted for use with a PIC switch with three or more ports. In such a case, when there is an over-temperature and at least one of the multiple ports has a non-overcurrent status, the ports with overcurrent status are switched off, while leaving the port with non-overcurrent status on, unless the over-temperature persists. After a predetermined waiting period, if the over-temperature persists, the entire PIC switch is turned off. Otherwise, the port with non-overcurrent status remains on. In other situations, the PIC switch will operate in a manner similar to that illustrated by the flow chart of FIG.  4 . In this way, the dynamic operating range of the PIC switch is substantially increased. The flow chart in FIG. 4 can also be implemented in software. 
     FIG. 5 shows a table summarizing the operation results obtained from following the different paths of the flow chart diagram in FIG.  4 . 
     Thus, by using the present invention, the overall operation efficiency of the network system can be achieved, while keeping all the circuit components and the peripheral ports in their normal operating ranges. 
     While the invention has been described in conjunction with several specific embodiments, it is evident to those skilled in the art that many further alternatives, modifications and variations will be apparent in light of the foregoing description. Thus, the invention described herein is intended to embrace all such alternatives, modifications and variations as may fall within the spirit and scope of the appended claims.