Abstract:
In order to accurately measure a low current bias in an automatic kine bias (AKB) circuit during several video lines that immediately follow vertical retrace, dynamic focus is interrupted by deactivating a dynamic focus voltage amplifier. The amplifier draws its power from a horizontal flyback transformer. In order to avoid a horizontal transient which may occur when the dynamic focus voltage amplifier is reactivated after being deactivated during a vertical blanking interval, the dynamic focus amplifier draws a current during vertical blanking which approximates the average current drawn during vertical scan.

Description:
The invention relates to a beam landing focus correction arrangement. 
     BACKGROUND 
     An image displayed on a cathode ray tube (CRT) may suffer from imperfections or distortions such as defocusing that is incident to the scanning of the beam on the CRT. Such imperfections or distortions occur because the distance from the electron gun of the CRT to the faceplate varies markedly as the beam is deflected, for example, in the horizontal direction. Reducing the defocusing that occurs as the beam is deflected in the horizontal direction, for example, may be obtained by developing a dynamic focus voltage having a parabolic voltage component at the horizontal rate and applying the dynamic focus voltage to a focus electrode of the CRT for dynamically varying the focus voltage. It is known to derive the parabolic voltage component at the horizontal rate from an S-correction voltage developed in an S-shaping capacitor of a horizontal deflection output stage. 
     The CRT that employs dynamic focus may have internal wiring that places the dynamic focus voltage close to, for example, the blue electron gun. In normal operation, the proximity to the blue electron gun may not cause any problem. However, when a low current bias measurement is made in an automatic kine bias (AKB) circuit, during several video line times that immediately follow vertical retrace, referred to as the AKB measurement interval, stray coupling of the horizontal component of the dynamic focus voltage may introduce an error in the biasing of the cathode electrode of the blue electron gun. As a result, the bias of the blue electron gun may not track the bias of the green and red electron guns. This may lead to unacceptable background color temperature changes. 
     It may be desirable to remove the horizontal dynamic focus voltage component from the focus electrode during the AKB measurement interval. Thereby, the undesirable coupling to the focus electrode is, advantageously, eliminated. During the AKB measurement interval, the value of the focus voltage may drift, due to the removal of the dynamic focus voltage component. After the end of the AKB measurement interval, a significant transient of the focus voltage may occur when the focus voltage is returned to its proper value. 
     It may be desirable to address a problem of picture distortion that occurs when the dynamic focus high voltage amplifier is powered with a deflection-derived power supply, especially when the horizontal frequency is a multiple of normal broadcast horizontal frequency. The dynamic focus signal is amplified to very high peak to peak voltages. The amplifier that does this job uses more power when operated at a high frequency, such as horizontal deflection frequencies in excess of 30 kHz, such as those used for multimedia and HDTV than it does for relatively low frequency 15 kHz used in conventional TV. When the high frequency variations cease during vertical blanking, the current drawn by the amplifier is greatly reduced. This causes a loading transient at the power source. If the power source is also providing scan deflection for the picture tube, as is often convenient, this loading transient may cause a distortion in the picture, such as width modulation ringing, that appears as wiggles in vertical lines in the top of the picture. 
     SUMMARY OF THE INVENTION 
     The problem of changes in deflection loading can be solved by designing the amplifier to draw nearly the same average current during vertical blanking that is drawn during normal dynamic focus operation. This strategy eliminates the undesired transient in deflection current. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIGS. 1A and 1B illustrate a horizontal deflection circuit output stage and a blanked dynamic focus power supply, in accordance with an inventive feature. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 1A illustrates a horizontal deflection circuit output stage  101  of a television receiver having multi-scan frequency capability. Stage  101  is energized by a regulated power supply  100  that generates a supply voltage B+. A conventional driver stage  103  is responsive to an input signal  107   a  at the selected horizontal scanning frequency nf H . Driver stage  103  generates a drive control signal  103   a  to control the switching operation in a switching transistor  104  of output stage  101 . By way of example, a value of n=1 may represent the horizontal frequency of a television signal according to a given standard such as a broadcasting standard. The collector of transistor  104  is coupled to a terminal T 0 A of a primary winding T 0 W 1  of a flyback transformer T 0 . The collector of transistor  104  is also coupled to a non-switched retrace capacitor  105 . The collector of transistor  104  is additionally coupled to a horizontal deflection winding LY to form a retrace resonant circuit. The collector of transistor  104  is also coupled to a conventional damper diode  108 . Winding LY is coupled in series with a linearity inductor LIN and a non-switched trace or S-capacitor CS 1 . Capacitor CS 1  is coupled between a terminal  25  and a reference potential, or ground GND such that terminal  25  is interposed between inductor LIN and S-capacitor CS 1 . 
     Output stage  101  is capable of producing a deflection current iy. Deflection current iy has substantially the same predetermined amplitude for any selected horizontal scan frequency of signal  103   a  selected from a range of 2f H  to 2.4f H  and for a selected horizontal frequency of 1f h . Controlling the amplitude of deflection current iy is accomplished by automatically increasing voltage B+ when the horizontal frequency increases, and vice versa, so as to maintain constant amplitude of deflection current iy. Voltage B+ is controlled by a conventional regulated power supply  100  operating in a closed-loop configuration via a feedback winding T 0 W 0  of transformer T 0 . The magnitude of voltage B+ is established, in accordance with a rectified, feedback flyback pulse signal FB having a magnitude that is indicative of the amplitude of current iy. A vertical rate parabola signal E-W is generated in a conventional way, not shown. Signal E-W is conventionally coupled to power supply  100  for producing a vertical rate parabola component of voltage B+ to provide for East-West distortion correction. 
     A switching circuit  60  is used for correcting a beam landing error such as linearity. Circuit  60  selectively couples none, one or both of a trace or S-capacitor CS 2  and a trace or S-capacitor CS 3  in parallel with trace capacitor CS 1 . The selective coupling is determined as a function of the range of frequencies from which the horizontal scan frequency is selected. In switching circuit  60 , capacitor CS 2  is coupled between terminal  25  and a drain electrode of a field effect transistor (FET) switch Q 20 . A source electrode of transistor Q 20  is coupled to ground GND. A protection resistor R 20  that prevents excessive voltage across transistor Q 20  is coupled across transistor Q 20 . 
     A register  201  applies switch control signals  60   a  and  60   b . Control signal  60   a  is coupled via a buffer  98  to a gate electrode of transistor Q 20 . When control signal  60   a  is at a first selectable level, transistor Q 20  is turned off. On the other hand, when control signal  60   a  is at a second selectable level, transistor Q 20  is turned on. Buffer  98  provides the required level shifting of signal  60   a  to accomplish the above mentioned switching operation, in a conventional manner. 
     In switching circuit  60 , capacitor CS 3  is coupled between terminal  25  and a drain electrode of a FET switch Q 20 ′. FET switch Q 20 ′ is controlled by control signal  60   b  in a similar way that FET switch Q 20  is controlled by control signal  60   a . Thus, a buffer  98 ′ performs a similar function as buffer  98 . 
     A microprocessor  208  is responsive to a data signal  209   b  generated in a frequency-to-data signal converter  209 . Signal  209   b  has a numerical value that is indicative of the frequency of a synchronizing signal HORZ-SYNC or deflection current iy. Converter  209  includes, for example, a counter that counts the number of clock pulses, during a given period of signal HORZ-SYNC and generates word signal  209   a  in accordance with the number of clock pulses that occur in the given period. Microprocessor  208  generates a control data signal  208   a  that is coupled to an input of register  201 . The value of signal  208   a  is determined in accordance with the horizontal rate of signal HORZ-SYNC. Register  201  generates, in accordance with data signal  208   a , control signals  60   a  and  60   b  at levels determined by signal  208   a , in accordance with the frequency of signal HORZ-SYNC. Alternatively, the value of signal  208   a  may be determined by a signal  109   b  that is provided by a keyboard, not shown. 
     When the frequency of horizontal deflection current iy is 1f H , transistors Q 20  and Q 20 ′ are turned on. The result is that both S-capacitors CS 2  and CS 3  are in-circuit S-capacitors that are coupled in parallel with non-switched S-capacitor CS 1  and establish a maximum S-capacitance value. When the frequency of horizontal deflection current iy is equal to or greater than 2f H  and less than 2.14f H , transistor Q 20  is turned off and transistor Q 20 ′ is turned on. The result is that S-capacitor CS 2  is decoupled from non-switched S-capacitor CS 1  and S-capacitor CS 3  is coupled to S-capacitor CS 1  to establish an intermediate S-capacitance value. When the frequency of horizontal deflection current iy is equal to or greater than 2.14f H , transistors Q 20  and Q 20 ′ are turned off. The result is that S-capacitors CS 2  and CS 3  are decoupled from non-switched S-capacitor CS 1  and establish a minimum S-capacitance value. Deflection current iy in capacitor CS 1 , CS 2  or CS 3  produces an S-shaping parabolic voltage V 5 . 
     The total retrace capacitance formed by capacitor  105  does not change at the different scan frequencies. Therefore, the retrace interval has the same length at the different scan frequencies. The values of capacitors CS 1 , CS 2  and CS 3  are selected to produce parabolic voltage V 5  at different amplitudes at different scan frequencies. The different amplitudes of voltage V 5  are required because the retrace interval length is constant. 
     In FIG. 1B, a transistor Q 1  and a transistor Q 2  are coupled to each other to form a differential input stage. These transistors have very high collector current-to-base current ratio, referred to as beta, to increase the input impedance at the base of transistor Q 1 . The base-emitter junction voltages of transistors Q 1  and Q 2  compensate each other and reduce direct current bias drift with temperature changes. Resistor R 15  and resistor R 16  form a voltage divider that is applied to a supply voltage 12V_D at +12V for biasing the base voltage of transistor Q 2  at about +3V. The value of an emitter resistor R 1  that is coupled to the emitters of transistors Q 1  and Q 2  is selected to conduct a maximum current of about 6 mA. This protects a high voltage transistor Q 4 . Transistor Q 4  is coupled to transistor Q 1  via a transistor Q 3  operating as a switch. Transistor Q 4  is coupled to transistor Q 1  via transistor Q 3  in a cascode configuration. Transistor Q 4  needs to be protected from being over-driven because transistor Q 4  can tolerate only up to about 10 mA collector current. This is accomplished because the amplifier has high transconductance at a collector current of up to about 6 mA, and lower transconductance above about 6 mA. The cascode configuration of transistors Q 4 , Q 3  and Q 1  isolates the Miller capacitance, not shown, across the collector-base junction of transistor Q 4 ; thereby, the bandwidth is increased. The cascode configuration also makes the amplifier gain independent of the low beta of high voltage transistor Q 4 . 
     A winding T 0 W 3  of transformer T 0  of FIG. 1A produces a stepped-up retrace voltage that is rectified in a diode D 4  and filtered in a capacitor C 5  to produce a supply voltage of about 1500 volts, for energizing the dynamic focus voltage generator of FIG.  1 B. An active pull up transistor Q 5  has a collector coupled to the supply voltage. A base pull-up resistor R 4  of transistor Q 5  is coupled to the supply voltage. A diode D 1  is coupled between the collector of transistor Q 4  and the emitter of transistor Q 5   
     A capacitance C 1  represents the sum of the stray capacitance of the focus electrode and of the wiring (not shown). Active pull-up transistor Q 5  is capable of sourcing a current from its emitter to charge stray capacitance C 1 . Pull-down transistor Q 4  is capable of sinking current via diode D 1  from capacitance C 1 . Advantageously, the active pull up arrangement is used to obtain fast response time with lowered power dissipation. The dynamic focus amplifier uses shunt feedback for the output at the emitter of transistor Q 5  via a feedback resistor R 5 . 
     A periodic control signal V_BLANK is at a HIGH state, during vertical blanking and during, for example, four video line times that follow the vertical blanking, referred to as the AKB measurement interval, not shown. Signal V_BLANK is delayed by a delay circuit (not shown) that delays a conventional vertical blanking signal V_BLANK by a suitable number of video line times such as four. The delayed signal is coupled to the base of a switch transistor Q 7 . The collector of transistor Q 7  is coupled to the base of transistor Q 3 . During vertical blanking and during the AKB measurement interval, transistor Q 3  is turned off by transistor Q 7 . 
     The class B amplifier shown in FIG. 1B embodies an aspect of the invention. Normally, this type of amplifier uses separate pull up transistor Q 5  and pull down transistor Q 4  to alternately charge and discharge a capacitive load, the focus electrode  17  of a CRT  10 . The capacitive load is shown as capacitor C 1 . 
     A voltage drop in resistor R 4  can then be chosen such that a desirable output voltage near to the maximum peak of the normal dynamic focus waveform is maintained during vertical blanking. Unfortunately, the current required to do this with a 1 Meg value of resistor R 4  is very small, and is much less than the average current drawn by the amplifier during normal dynamic focus operation. It is desired to make the current during vertical blanking nearly equal to the average current drawn during normal dynamic focus operation. 
     To accomplish this goal and maintain a focus output voltage nearly equal to the positive peak of the normal dynamic focus waveform, it is necessary to turn on transistor Q 5  during vertical blanking. For example, if the focus parabola fundamental frequency at the input, H_PARAB_IN, is 31 kHz, then the average current during normal dynamic focus operation might be, for example, 2 mA. Therefore, 2 mA will need to be drawn during vertical blanking in order to make the power supply loading consistent and free of transients. 
     However, with transistor Q 5  non-conductive, as would occur if the transistor in photo coupler PC 1 , Q-PC 1 , is on, as it is in normal dynamic focus operation, then 2 mA would cause up to a 2 kV voltage drop across 1 meg ohm pull up resistor R 4 . Since only 1500 V is available, the current source transistor Q 4  will saturate and the focus output will be near 12 volts during vertical blanking. 
     The vertical blanking drive is a positive going 5 volt or greater pulse that appears during the vertical retrace time at input V_BLANK and turns transistor Q 7  on. Normally the light emitting diode in photo coupler PC 1 , D-PC 1 , is conducting about 15 mA from the 12 V supply V 4  through resistors R 8  and R 6 . This current provides light flux to keep the transistor Q-PC 1  conducting. When transistor Q 7  conducts, this current is shunted away from the diode D-PC 1  into diode D 3  and transistor Q 7 . This method of switching maintains the current through resistors R 6  and R 8  nearly constant so that the voltage drop across resistor R 8  does not greatly change during vertical retrace. A change in the voltage drop across R 8  would also alter the 3V_REF derived from the resistor divider R 15  and R 16 . This 3V_REF regulates the amplitude of supply 12V_D. 
     Conduction of transistor Q 7  also causes transistor Q 3  to turn off by forcing its base voltage to be near ground. The transistor Q 3  emitter is held near 3 volts by forward conduction of the collector base junction of transistor Q 1  and the charge on coupling capacitor C 2 . At the junction of the emitter of transistor Q 4 , the collector of transistor Q 3  and resistor R 2 , the voltage is held near 11 volts because the base current of Q 4  is small and causes very little voltage drop across resistor R 11 . 
     Transistor Q 6  is off for scan modes other than 15 kHz conventional broadcast TV. During vertical blanking, Q 3  serves to disconnect the normal feedback gain control loop of the focus amplifier consisting of R 5 , R 3 , R 1 , Q 1  and Q 2 . Current through resistor R 2  and Q 7  to ground is substituted. Simultaneously, transistor Q-PC 1  turns off to allow transistor Q 5  to turn on. The focus output goes to 1500 V with 2 mA drawn as required to prevent transients. 
     For horizontal scan frequencies in the range of 31 kHz to 38 kHz, the amplifier average current changes. However, one value of resistor R 2  is sufficient to minimize transients to an acceptable level. At the conventional TV scan frequency of 15 kHz, the amplifier power and average current is about half. In this mode, transistor Q 6  turns on and reduces the voltage at the base of transistor Q 4  to about half its former value. This action reduces the current in resistor R 2  so that the amplifier average current is matched at this scan frequency.