Abstract:
Data communication system between computers; communication paths composed of m transmission lines are formed between two computers, and data to be transferred are coded based on a coding table comprised of encoding codes. When transmitting, state of the m transmission lines 74, 76 and 78 is changed. Therefore, timing signal is not required.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to data transmission, and more particularly to high speed operation thereof. 
     2. Description of the Prior Art 
     In order to exchange data, data is transmitted by installing transmission lines between computers. As one of such transmission methods, hitherto is known the start-stop synchronous communication method, which is shown in FIG. 1. The communication line is delivering an H level output in the absence of data. When transmitting data of 1 character (8 bits), the transmission side first sends a start bits (L level). The reception side, receiving it, generates a sampling pulse in an interval of a specific period T (1/baud rate) from after the half period (T/2) of the specific period T. On the other hand, the transmission side, successively to the start bit S, sends out data D0 to D7 and parity bit P sequentially by 1 bit each, in an interval of the specific period T. The reception side, by the sampling pulse, takes in the data and parity bit P on the communication line. In this way, when transmission of 8-bit data is over, the transmission side delivers an H level output as a stop bit E. The reception side, when correctly receiving the stop bit E, judges that the communication has been completed without error. 
     Data of 1 character (8 bits) is thus transmitted. The subsequent data will be similarly operated. 
     In such start-stop synchronous communication method, meanwhile, the transmission rate is determined by the period T of the sampling pulse. Therefore, by shortening the period T of the sampling pulse, the transmission rate is accelerated. However, when the period T is too short, errors are likely to occur, and the reliability may be lowered. That is, the transmission rate was limited by the period T of the sampling pulse. 
     Furthermore, in this communication method, the start bit S and stop bit E must be added to the front and rear ends. It further causes to slow down the transmission rate. 
     To solve these problems, the present inventor had already proposed new communication methods (U.S. patent application Ser. No. 410,206, Japanese Laid-open Patent Application HEI 2-262747). A hardware connection diagram of the communication method disclosed in the Japanese Laid-open Patent Application No. 2-262747 is shown in FIG. 2. A terminal 24 for RS-232C of a personal computer 1 and a terminal 25 for RS-232C of a personal computer 8 are connected with cable as shown in the diagram. A terminal RTS and a terminal DTR are originally terminals for use in modem interface, but they are used as output terminals in this example. Likewise, terminals CTS, DCD are used as input terminals instead of the intended use as terminals for modem interface. 
     It is supposed in the following explanation that data is transmitted from the computer 1 side to the computer 8 side. A floppy disk (not shown) storing the data to be transmitted is inserted into a disk drive 30. A receiving floppy disk (not shown) is inserted into a disk drive 40. The sending side CPU 2 reads out the data of the floppy disk through an interface 32. Here, meanwhile, it is supposed to send data in the unit of 8 bits (1 character). 
     In the memory 3, an encoding table as shown in FIGS. 3, 4 is stored. This table is intended to obtain an encoding code corresponding to each one of the values (there are 28) of 8-bit data (original data). For example, supposing the original data to be (00000000)2 (that is, 0 in decimal notation), the corresponding encoding code is 120. When the original data is (00010011)2 (19 in decimal notation), the encoding code is 102302. The encoding table is prepared according to rules, i.e., (1) the numeral of each figure should be any one of 0, 1, 2, 3, (2) adjacent figures have different numerals, (3) the numerical value always starts with 1 and ends with 0 or 2, and (4) the values from the first figure to the P-th figure in a P-figure encoding code do not coincide with the values from the first figure to the P-th figure of a Q-figure encoding code longer than P figures. The CPU 2 converts the original data to be transmitted into an encoding code according to this encoding table. For example, when the original data is (00000000)2, 120 is obtained. 
     A data transmission state is shown in FIG. 5. The CPU 2 sends out thus obtained encoding code 120 by 1 figure each in the sequence of 1, 2, 0. That is, using the terminals RTS, DTR (communication path 19), 0 is sent to the reception side as terminal RTS=L, terminal DTR=L, 1 as terminal RTS=L, terminal DTR=H, 2 as terminal RTS=H, terminal DTR=L, and 3 as terminal RTS=H, terminal DTR=H. 
     In the first place, the receiving side CPU 9 delivers 3 (terminal RTS=H, terminal DTR=H) toward the transmission side from the communication path 22 in order to tell that it is ready to receive. Receiving it, the sending side CPU 2 sends out 1 (terminal RTS=L, terminal DTR=H) from the communication path 19. 
     When 1 is sent in, the receiving side CPU 9 takes it in through the terminal CTS and terminal DCD (communication path 19). In the receiving side memory 10, too, the same encoding table as shown in FIGS. 3, 4 is stored. The CPU 9 checks when the received data 1 is present or not in the encoding table. Since there is no encoding code of 1, it waits for the next figure. 
     Meanwhile, the receiving side CPU 9, upon receiving the data 1, changes the value of the terminal RTS, terminal DTR (communication path 22) to 0. Detecting this change, the sending side CPU 8 recognizes that the reception side is ready to receive the next figure, and sends out the next figure 2 of the encoding code to the communication path 19. The receiving side CPU 9 detects the change of the state of the communication path 19, and recognizes that the data of the next figure has been sent (see rule (2) above). In other words, it is not necessary to use the sampling pulse as shown in FIG. 1. Receiving it, the receiving side CPU 9 checks when the encoding code of 12 is present or not. Since there is no encoding code of 12, it waits for next figure. 
     The receiving side CPU 9, upon receiving the data 2, changes the state of the communication path 22 from 0 to 2. The sending side CPU 8, monitoring this change, recognizes that the reception side is ready to receive next figure, and sends out the next figure 0 of the encoding code to the communication path 19. Receiving it, the receiving side CPU 9 checks when the encoding code of 120 is present or not. The encoding code 120 corresponds to (00000000)2. In the encoding code of 4 figures or more, nothing begins with 120 (see rule (4) above). Therefore, the receiving side CPU 9 obtains the original data (00000000)2 at this point. 
     The subsequent data is similarly transmitted. At this time, the value of the first figure and the value of the last figure of the encoding code are always different (see rule (3) above), the reception side recognizes that the first figure of the next data is sent in. 
     When exchanging the transmission side and reception side, it is arranged so that the newly receiving side sends the reception waiting value 3. As a result, the transmission side and reception side may be exchanged easily. The encoding code always begins with 1, and ends with 0 or 2 (see rule (3) above), so that there is no risk of confusion with the reception waiting value 3. 
     In this method of transmission, sampling pulse is not necessary. Therefore, the speed of transmitting the encoding code does not depend on the period of the sampling pulse, but it depends on the processing speed of the CPU. Since the processing speed of the CPU 2, 9 is very fast, high speed transmission is realized. 
     Furthermore, since the start bit and end bit are not necessary, higher speed is also possible from this aspect. In addition, the length of the encoding code ranges from the shortest of 3 figures to the longest of 7 figures. Therefore, as compared with the serial transmission system of 8-bit data, it is possible to increase the speed furthermore. 
     Thus, in the transmission method shown in FIG. 2 through FIG. 5, high speed transmission is realized by making use of the high speed processing of the CPU. It, however, involves the following problems. 
     In the prior transmission method, in order to do without sampling pulse, the adjacent figures of the encoding code always have different values (rule (2) above). That is, by the change of the value being sent in, it is known that the next figure is sent in. It is thus restricted that the adjacent figures must have different values. Accordingly, the encoding code becomes long, and increase of the transmission speed is limited. 
     It holds true in the last figure of certain data and the beginning figure of the next data. That is, the last figure of the encoding code and the beginning figure of the encoding code transmitted next must not be a same value. In order to maintain always this relation, it is limited that always different values must be given to the beginning figure and the ending figure of encoding code (see rule (3) above). It also causes to extend the encoding code, and impede the high speed tendency of the communication speed. 
     SUMMARY OF THE INVENTION 
     It is a primary object of the invention to solve the above problems and present a faster data transmitting method. 
     A method of communicating data between a sending device and a receiving device via a plurality of m parallel data lines which have K kinds of electric state in accordance with the present invention, said method comprises the steps of: 
     a) encoding each value of original data into a string of numeric code figure, wherein each figure has a value ranging from one to K m  -1; 
     b) changing an existing electric state of m parallel data lines on the basis of information of each figure in each string of numeric code figure; 
     c) acknowledging change in electric state of m parallel data line whereby restoring each figure in each string of numeric code figure; 
     d) restoring each value of the original data by means for decoding said restored numeric code figure string. 
     A data communicating system in accordance with the present invention comprises: 
     a) a sending device for sending data 
     b) a receiving device for receiving data 
     c) a communication path connected between said sending device and said receiving device, said communication path including m parallel data transmission line which has K kinds of electric state; 
     said sending device comprising a code table stored in first memory, encoding means for encoding each value of original data into a numeric code figure string on the basis of said code table and changing means for changing an existing electric state of said m parallel data line on the basis of information of each figure in each string of numeric code figure; 
     said receiving device comprising corresponding code table stored in second memory, means for acknowledging change in an electric state of said m parallel data line thereby restoring each figure in each string of numeric code figure and decoding means for decoding said restored numeric code figure string to recover the original data on the basis of said corresponding code table; 
     each figure in each said string of numeric code figure having a range from one to K m  -1. 
     The above, and other objects, features and advantages of the present invention will become apparent from the following description read in conjunction with the accompanying drawings, in which like reference numerals designate the same elements. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a drawing showing data transmission by conventional start-stop synchronous system. 
     FIG. 2 is a diagram showing hardware configuration in the data transmission method disclosed in the Japanese Laid-open Patent Application HEI 2-262747. 
     FIG. 3 is a diagram showing an encoding table used in the data transmission method in FIG. 2. 
     FIG. 4 is a diagram showing an encoding table used in the data transmission method in FIG. 2. 
     FIG. 5 is a diagram showing the detail of the data transmission method in FIG. 2. 
     FIG. 6 is a diagram showing the data transmission method in an embodiment of the invention. 
     FIG. 7 is a diagram showing the hardware configuration used in the above data transmission method. 
     FIG. 8 is a block diagram showing the detail of a control circuit 90. 
     FIG. 9 is an encoding table used in the above data transmission method. 
     FIG. 10 is a flow chart of the above data transmission. 
     FIG. 11 is a diagram showing the detail of the method of numerical values by changing the state of the transmission path. 
     FIG. 12 is a diagram showing a hardware configuration in other embodiment. 
    
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS 
     FIG. 7 shows a circuit diagram for realizing the data transmission method in an embodiment of the invention. A terminal 24 for RS-232C of a personal computer 1 and a terminal 25 for RS-232C of a personal computer 8 are connected by means of a cable as shown in the diagram. Terminals RTS, DTR and TXD and opposite terminals CTS, DCD and RI are connected. CPUs 2, 9 control the control circuits 90, 92 through control lines 25, 27 and data buses 15, 16, deliver data to the terminals RTS, DTR and TXD, and take in data from the terminals CTS, DCD and RI. The terminals RTS, DTR should be originally used in the modem interface, but are used as output terminals in this embodiment. Likewise, the terminals CTS, DCD are used as input terminals, instead of terminals for modem interface. 
     The detail of the control circuit 90 is shown in FIG. 8. A data bus buffer 100 is connected to an internal data bus 136 of the control circuit 90. The data bus buffer 100 is also connected to a data bus 15 of the CPU 2. The CPU 2 exchanges data through the data bus 15 and the data bus buffer 100. 
     The internal data bus 136 is connected with various registers 104, 106, 108, 110, 112, 114, 116, 118 and 120. When the CPU 2 exchanges data with any one of the registers, a selection signal is given to a selection control circuit 102 by the control line 25. Receiving the selection signal, the selection control circuit 102 enables to exchange data between the specified register and the internal data bus 136. 
     A modem control register 114 is to control outputs RTS, DTR of the modem control circuit 134. By setting the least significant bit of the modem control register 114 to H, the output RTS may be set to H. Likewise, by setting the second least significant bit to H, the output DTR may be set to H. 
     For example, when the CPU 2 is to set the terminal RTS to H level and the terminal DTR to L level, the operation is as follows. First, the CPU 2 selects the modem control register 114 by the control line 25. Next, through the data bus 15 and data bus buffer 100, (00000000001)2 is written in the modem control register 114. As a result, the terminal RTS becomes H level, and the terminal DTR, L level. 
     The terminal TXD is a signal sendout terminal for serial communication, and by nature it is not to be controlled directly from the CPU 2, 9. However, by sending a BREAK signal (the second most significant bit being H level) from the CPU 2 to the line control register 106, the terminal TXD may be set to H level. Thus, the CPU 2 controls the state of the terminals RTS, DTR, TXD. 
     Next is explained on the operation for reading the state of the terminals CTS, DCD, RI. For reading, a modem status register 116 is used. In the upper first bit of the modem status register 116, the state showing whether the terminal DCD is H or L is indicated. Similarly, in the second bit, the state of the terminal RI is shown, and in the fourth bit, the state of the terminal CTS is shown. The CPU 2 selects the modem status register 116 through the control line 25, and reads the content by way of the data bus buffer 100. Hence, the CPU 2 knows the state of the terminals CTS, DCD, RI. 
     The same is said of the control circuit 92. 
     In this embodiment, in this manner, using RS-232C terminals, communications are effected by making use of the RS-232C interface circuit. Therefore, in the appliance already equipped with RS-232C interface circuit, the invention may be executed only by modifying or adding the software without having to add the hardware. 
     When the transmission terminals can be controlled from the CPU and the state of the receiving terminals can be read by the CPU, this invention may be realized. For example, as shown in FIG. 12, buffers 50 to 72 may be provided for each terminal, and it may be designed to control directly from the CPU 2, 9. 
     The detail of data transmission will be described below. In the circuit shown in FIG. 7, it is supposed in the following explanation that the data is transmitted from the computer 1 side to the computer 8 side. In this embodiment, there are three communication lines 74, 76, 78 as data paths from the transmission side 1 to the reception side 8, and another three communication lines 80, 82, 84 as data paths are provided from the reception side 8 to the transmission side 1. In other embodiment, wireless path, such as radio transmission path, optical transmission path, may be used for communication path. 
     A floppy disk (not shown) storing the data to be transmitted is inserted into the disk drive 30. A receiving floppy disk (not shown) is inserted into the disk drive 40. The sending side CPU 2 reads out the data in the floppy disk through the interface 32. In this case, data in the unit of 8 bits (1 character) is transmitted. 
     In the memory 3 and memory 10, an encoding table as shown in FIG. 9 is stored. This table is to obtain an encoding code corresponding to each one of the values (there are 28) of 8-bit data (original data). For example, when the original data is (00000000)2 (that is, 0 in decimal notation), the corresponding encoding code is 1. When the original data is (00010011)2 (19 in decimal notation), the encoding code is 323. 
     The rule for preparing the encoding code is explained below. In the first place, the numerical value of each figure is any one from 1 to 2m-1, (rule A), where m is the number of communication paths from the transmission side to the reception side. The reason of not containing 0, that is, 1 to 2m-1 is given below. In this embodiment, meanwhile, since it is supposed that one communication path can take two states (H or L), the range is from 1 to 2m-1, but when one communication path can take K states, the range is from 1 to K m  -1. 
     Secondly, no longer code string begins with figures corresponding to a valid short code string (rule B). Hence, the stop bit is not required. 
     Thirdly, values of original data which occur frequently is encoded into assigned short code strings (rule C). 
     A flow chart of data transmission is shown in FIG. 10, and the data transmission state is given in FIG. 6. Referring now to these diagrams, the method of transmitting data will be described below. In this embodiment, a bunch of original data is transmitted as one packet. 
     At step S 30 , the receiving CPU 9 sends out 7 through communication paths 80, 82, 84. In this embodiment, the communication path 80 (RTS) is used as the higher bit, the communication path 82 (DTR) as the middle bit, and the communication path 84 (TXD) as the lower bit. Therefore, when transmitting 7, all terminals RTS, DTR, TXD are set to H. 
     The sending CPU 2 receives 7 (step S 2 ), and sends back 5 (communication path 74 (RTS)=H, communication path 76 (DTR)=L, communication path 78 (TXD)=H) (step S 4 ). The receiving CPU 9, receiving this 5, recognizes that the transmission side is ready, and sends out 0 (step S 34 ). The sending CPU 2 receives 0, and recognizes that the reception side is ready (step S 6 ). Thus, the transmission side and reception side are synchronized, and it is ready to start communications. 
     The CPU 2 converts the original data to be transmitted to an encoding code (step S 8 ) according to the encoding table in FIG. 9. Supposing that the original data is (11111111)2, or 255 in decimal notation, the encoding code is 26. 
     The CPU 2 does not transmit the first figure &#34;2&#34; of the encoding code obtained in this way directly as it is, but transmits by converting into the change of the state of transmission paths 74 (RTS), 76 (DTR), 78 (TXD). This mode is shown in FIG. 11. The present state of the communication paths 74 (RTS), 76 (DTR),78 (TXD) is 5 (101). The numerical value of the encoding code to be sent out is 2 (010). The present state of 5 (101) is changed by the portion corresponding to the numerical value 2 (010) to be transmitted (corresponding to communication path 76 (DTR)) (to 0 when 1, to 1 when 0). Mathematically, the exclusive OR of the two is calculated. Thus, the state of the communication paths 74 (RTS), 76 (DTR), 78 (TXD) is changed to 7 (111) (tl in FIG. 6). 
     The receiving CPU 9, detecting this change in the communication paths, recognizes that the data is transmitted (step S 36 ). Thus, sampling pulse is not required. Therefore, the state of the communication paths 74, 76, 78 must be changed in every figure. Accordingly, the encoding code is composed of other numerical value than 0 (rule A). When the encoding code is 0, the state of the communication paths 74, 76, 78 is not changed. Anyway, when the value is in a range of 1 to 28-1 other than 0, however the numerical values may be combined, the state of the communication paths 74, 76, 78 is changed. Therefore, like in the prior art, it is not necessary to assign different values for the first figure and last figure, or for adjacent figures. That is, there is no limitation to encoding code, and the encoding code may be shortened. 
     The CPU 9, as the communication path changes from 5 to 7, performs an inverse operation of the transmission side, and obtains the numerical value of 2 (step S 38 ). When the numerical value 2 is obtained in this way, the CPU 9 consequently changes the state of the communication paths 80, 82, 84 from 0 to 2 (step S 40 , t2 in FIG. 6). 
     Furthermore, the CPU 9 checks when the received data 2 is present in the encoding table or not (step S 42 ). Since there is no encoding code of 2, the operation returns to step S 36 . 
     On the other hand, the sending CPU 8, detecting that the communication paths 80, 82, 84 are changed from 0 to 2, recognizes that the reception side is ready to receive the next figure (step S 12 , t2 in FIG. 6). At step S 14 , it is judged when all figures (for the portion of 1 character) have been sent out or not. Now, only the first figure 2 of the encoding code 26 has been sent out, and the next figure 6 is left over, and the operation returns to step S 10 . Then the next figure 6 is transmitted toward the reception side (step S 10 ). That is, as mentioned above, 1 is sent out as the exclusive OR of the present state 7 of the communication paths 74,76, 78 and the numerical value 6 desired to be sent out (see FIG. 11, step S 10  in FIG. 10, t3 in FIG. 6). 
     The receiving CPU 9, detecting that the value of the communication path 19 has been changed, recognizes that the numerical value of the next figure is transmitted (step S 36 ). As the state of the communication paths 74, 76,78, is changed from 7 to 1, the numerical value 6 is obtained (step S 38 ). The receiving CPU 9 obtains 26 by combining the previous figure 2 and the present figure 6. It is judged when this 26 is present or not in the encoding data (step S 42 ). The encoding code 26 corresponds to (11111111)2 of the original data or 255 of decimal notation, and is present in the encoding table (FIG. 9). Therefore, the receiving CPU 9 can restore the original data (11111111)2. 
     In encoding code of three figures or more, meanwhile, the encoding table is created so that nothing begins with 26 (rule B). Therefore, at this point, the original data (11111111)2 may be confirmed and restored. That is, stop bit is not needed. The CPU 9 writes the restored original data (11111111)2 into the floppy disk set in the drive 40 through the interface 42 (step S 44 ). 
     Then data transmission for one character is over in this way, the reception side returns to step S 36 , and the transmission side returns to step S 8 , thereby transmitting next original data. 
     When all data are completely transmitted, the sending CPU 2 sets the state of communication paths 74, 76, 78 to 0 or 1 (step S 18 , t4 in FIG. 6). Receiving it, the receiving CPU 9 sends back 4 or 6 (step S 50 , t5 in FIG. 6). In this embodiment, when received correctly, 4 is sent out, and when abnormal, 6 is sent out. Receiving it, the transmission side processes the error (for example, re-transmits) when abnormal. When there is no error, 6 is sent back, and the packet transmission is terminated (step S 22 , t6 in FIG. 6). Thus, high speed data transmission is realized. 
     The operation is the same when the CPU 9 is the sending side and the CPU 2 is the receiving side. 
     When the size of the floppy disk of the sending computer 1 and the size of the floppy disk of the receiving computer 8 are different, data exchange by floppy disks is not possible. In such a case, by employing the above transmission method, high speed data transmission is enabled, which is particularly effective. 
     Of course in other cases than mentioned above, this is very effective as the method for transmitting data at high speed. 
     In the foregoing embodiments, meanwhile, three communication paths are used, but two or four or more paths may be used. 
     When the transmission side and reception side are fixed, the number of communication paths installed may be different from the transmission side to the reception side, and from the reception side to the transmission side. 
     In the embodiments, the communication paths 74,76, 78, 80, 82, 84 are explained as wired routes, but radio routes by light, infrared ray, radio wave, ultrasonic wave or the like may be also employed. 
     The embodiments relate to transmission by making use of communication paths conforming to the RS-232C standard (the method of use does not conform to the RS-232C standard), but it is also possible to abide by other standards. 
     In the data transmission method of the invention, it is intended to transmit the value of each figure of the encoding code by varying state of m communication paths. Therefore, by transmission of every figure, the state of the communication paths always changes, and it is not necessary to assign different numerical values for the adjacent figures of the encoding code. Furthermore, when sending the first figure of the next encoding code, the state of m communication paths always changes. Therefore, it is not necessary to assign different values for the first figure and last figure of the encoding code. In other words, the encoding code may be shortened without any restriction, transmission may be achieved at high speed. 
     It is meanwhile designed so that the values from the first figure to the P-th figure of the P-figure encoding code may not coincide with the values from the first figure to the P-th figure of the other encoding code in Q figures longer than the P-figure encoding code. Therefore, stop bit is not needed, and high speed transmission is realized. 
     Still more, the corresponding encoding code is set shorter for the original data higher in the incidence rate. Hence, faster data transmission is possible. 
     Having described preferred embodiments of the invention with reference to the accompanying drawings, it is to be understood that the invention is not limited to those precise embodiments, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope or spirit of the invention as defined in the appended claims.