Abstract:
A plasma display panel (PDP) with reduced switching loss when the PDP is driven at a high frequency. The PDP includes a first electrode, a second electrode parallel to the first electrode, and a third electrode crossing the first electrode and the second electrode, and a driver for applying a plurality of sustain pulses at a sustain frequency to the first electrode during a sustain period. The driver includes a first driving circuit for applying a first portion of the plurality of sustain pulses to the first electrode and a second driving circuit for applying a second portion of the plurality of sustain pulses to the first electrode. The first portion and the second portion of the plurality of sustain pulses have the same polarity, and the first driving circuit and the second driving circuit are configured to apply the first portion and the second portion, respectively, at different time.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims priority to and the benefit of U.S. Provisional Patent Application No. 61/085,728, filed on Aug. 1, 2008, the entire content of which is incorporated herein by reference. 
     
    
     BACKGROUND 
       [0002]    1. Field of the Invention 
         [0003]    The present invention relates to a circuit for driving a plasma display panel (PDP), and more particularly, to a circuit for driving a PDP with reduced switching loss. 
         [0004]    2. Discussion of Related Art 
         [0005]    A PDP emits light from phosphors excited by ultraviolet (UV) rays of, for example, 147 nm generated during the discharge of an inert gas mixture in the discharge cells of the PDP, and displays an image including characters and/or graphics. The PDP has both a thin profile and a large display area, and can display an image with improved picture quality due to recent technological developments. 
         [0006]    In a method of driving a typical PDP, one frame is divided into a plurality of sub frames. Each of the plurality of sub frames includes a reset period, an address period, and a sustain period. In the reset period, the wall charge states of the discharge cells are initialized. In the address period, cells for emitting light in the sustain period are selected among the plurality of discharge cells. In the sustain period, the cells that are selected in the address period emit light. 
         [0007]    In the sustain period, sustain pulses having a voltage of several hundred volts are alternately supplied to scan electrodes Y and sustain electrodes X at a frequency of several hundreds of KHz. When the sustain pulses are supplied, the PDP suffers a large amount of energy loss. In order to minimize the loss of energy, the PDP may include an energy recovery circuit. The energy recovery circuit recovers energy charged in the discharge cells and re-supplies the recovered energy when a next sustain pulse is supplied to minimize the loss of energy. 
         [0008]    In addition, in order to supply the sustain pulses to the scan electrodes Y and the sustain electrodes X in the sustain period, the driving circuit coupled to the electrodes needs to handle a high current flow. As the size of the PDP increases, the magnitude of the current that flows through the driving circuit increases. When the magnitude of the current that flows through the driving circuit increases, the internal voltage and the heat generation of the elements in the driving circuit increase. 
         [0009]    In order to handle high current, the sustain switch (coupled to a sustain power source) and the ground switch (coupled to a ground power source) included in the energy recovery circuit are each formed by coupling a plurality of switches in parallel to each other. When the plurality of switches are coupled to a current path in parallel to form the sustain switch and the ground switch, the current handling capacity increases, however, switching loss also increases. That is, when the switches are coupled to the current path in parallel, the parasitic capacitance of the switches increases. Furthermore, when the sustain frequency is increased in order to realize high picture quality, the increase in the parasitic capacitance of the switches causes a significant increase in switching loss. Therefore, it is desirable to provide an improved driving circuit with increased current handling capacity and reduced switching loss when the PDP is driven at a high frequency. 
         [0010]    Furthermore, it is desirable to design the circuit for driving the PDP to be realized at a low cost. In the conventional art, in order to drive the PDP at the high frequency, expensive elements capable of driving the PDP at the high frequency must be used at the respective stages of the driving circuit. Therefore, it is desirable to design a new driving circuit that can be manufactured at a low cost yet capable of driving the PDP at the high frequency. 
       SUMMARY OF THE INVENTION 
       [0011]    Accordingly, it is an aspect of the present invention to provide a plasma display panel (PDP) with reduced switching loss when the PDP is driven at a high frequency. 
         [0012]    It is another aspect of the present invention to provide a driving circuit for driving a PDP at a high frequency without increasing its manufacturing cost. 
         [0013]    According to an embodiment of the present invention, a plasma display device includes a first electrode, a second electrode parallel to the first electrode, and a third electrode crossing the first electrode and the second electrode, and a driver for applying a plurality of sustain pulses at a sustain frequency to the first electrode during a sustain period. The driver includes a first driving circuit for applying a first portion of the plurality of sustain pulses to the first electrode and a second driving circuit for applying a second portion of the plurality of sustain pulses to the first electrode. The first portion and the second portion of the plurality of sustain pulses have the same polarity, and the first driving circuit and the second driving circuit are configured to apply the first portion and the second portion, respectively, at different time. 
         [0014]    The first driving circuit and the second driving circuit may be configured to apply the first portion and the second portion, respectively, at frequencies less than the sustain frequency. 
         [0015]    Each of the first driving circuit and the second driving circuit may include a first switch having a first terminal coupled to a first power and a second terminal coupled to the first electrode, and a second switch having a first terminal coupled to the first electrode and a second terminal coupled to a second power. 
         [0016]    The first power may provide a sustain voltage. The second power may provide a ground voltage. 
         [0017]    The driver may further include a first energy recovery circuit coupled to the first electrode. 
         [0018]    The first energy recovery circuit may include a capacitor having a first terminal coupled to a ground voltage and a second terminal, an inductor having a first terminal coupled to the first electrode and a second terminal, a first switch having a first terminal coupled to the second terminal of the capacitor and a second terminal coupled to the second terminal of the inductor, and a second switch having a first terminal coupled to the second terminal of the inductor and a second terminal coupled to the second terminal of the capacitor. 
         [0019]    The first energy recovery circuit may include a capacitor having a first terminal coupled to a ground voltage and a second terminal, an inductor having a first terminal coupled to the second terminal of the capacitor and a second terminal, a first switch having a first terminal coupled to the second terminal of the inductor and a second terminal coupled to the first electrode, and a second switch having a first terminal coupled to the second terminal of the inductor and a second terminal coupled to the first electrode. 
         [0020]    The first energy recovery circuit may be coupled to the first electrode through each of the first and second driving circuits. 
         [0021]    The first portion and the second portion of the plurality of sustain pulses may be alternately applied to the first electrode. 
         [0022]    The driver may further include a second energy recovery circuit coupled to the first electrode. 
         [0023]    The second energy recovery circuit may have a substantially same circuit constitution as the first energy recovery circuit, and the first energy recovery circuit and the first driving circuit may be configured to generate the first portion of the plurality of sustain pulses. 
         [0024]    The second energy recovery circuit and the second driving circuit may be configured to generate the second portion of the plurality of sustain pulses. 
         [0025]    According to another embodiment of the present invention, a method of driving a plasma display device in a sustain period at a sustain frequency is provided. The plasma display device includes a first electrode, a second electrode parallel to the first electrode, and a third electrode crossing the first electrode and the second electrode. The method includes applying a first sustain pulse generated from a first driving circuit of the plasma display device to a first electrode, applying a second sustain pulse generated from a second driving circuit of the plasma display device to the first electrode, the second sustain pulse applied to the first electrode at a time different from that of the first sustain pulse. The first sustain pulse and the second sustain pulse have the same polarity. 
         [0026]    The method may further include applying the first sustain pulse to the first electrode during the sustain period at a first frequency that is less than the sustain frequency, and applying the second sustain pulse to the first electrode during the sustain period at a second frequency that is less than the sustain frequency. 
         [0027]    A summation of the first frequency and the second frequency may be equal to the sustain frequency. Each of the first frequency and the second frequency may be equal to one half of the sustain frequency. The first frequency may be equal to the second frequency. The first sustain pulse and the second sustain pulse may be alternately applied to the first electrode. 
         [0028]    According to yet another embodiment of the present invention, a plasma display device includes a first electrode, a second electrode parallel to the first electrode, a third electrode crossing the first electrode and the second electrode, and a driver for applying a plurality of sustain pulses at a sustain frequency to the first electrode during a sustain period. The driver includes a first driving circuit for applying a first portion of the plurality of sustain pulses to the first electrode; and a second driving circuit for applying a second portion of the plurality of sustain pulses to the first electrode, the second portion applied to the first electrode at a time different from that of the first portion. The first driving circuit and the second driving circuit are coupled in parallel with respect to the first electrode. 
         [0029]    An output voltage range of the first driving circuit may be substantially equal to that of the second driving circuit. The first driving circuit and the second driving circuit may be non-switchably coupled to the first electrode. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0030]    The accompanying drawings, together with the specification, illustrate exemplary embodiments of the present invention, and, together with the description, serve to explain the principles of the present invention. 
           [0031]      FIG. 1  is a schematic drawing illustrating a perspective view of the structure of a discharge cell of a plasma display panel (PDP); 
           [0032]      FIG. 2  is a schematic block diagram illustrating a PDP according to an embodiment of the present invention; 
           [0033]      FIG. 3  is a schematic diagram illustrating waveforms of a subfield of the PDP according to an embodiment of the present invention; 
           [0034]      FIG. 4A  is a schematic circuit diagram illustrating an energy recovery circuit according to an embodiment of the present invention; 
           [0035]      FIG. 4B  is a schematic circuit diagram illustrating an energy recovery circuit according to an embodiment of the present invention; 
           [0036]      FIG. 5  is a schematic diagram illustrating waveforms that describe a method of driving the energy recovery circuits of  FIGS. 4A and 4B ; 
           [0037]      FIG. 6  is a schematic diagram illustrating sustain pulses supplied by the energy recovery circuits of  FIGS. 4A and 4B ; 
           [0038]      FIG. 7A  is a schematic circuit diagram illustrating an energy recovery circuit according to an embodiment of the present invention; and 
           [0039]      FIG. 7B  is a schematic circuit diagram illustrating an energy recovery circuit according to an embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS 
       [0040]    Hereinafter, exemplary embodiments of the present invention will be described in detail as follows with reference to the accompanying drawings of  FIGS. 1 to 7B . 
         [0041]      FIG. 1  is a schematic diagram illustrating a discharge cell of a plasma display panel (PDP) according to an embodiment of the present invention. 
         [0042]    Referring to  FIG. 1 , the discharge cell of the conventional PDP corresponds to a scan electrode Y and a sustain electrode X formed on an upper substrate  10  and an address electrode A formed on a lower substrate  18 . The scan electrode Y and the sustain electrode X include transparent electrodes  12 Y and  12 X and metal bus electrodes  13 Y and  13 X, respectively. The metal bus electrodes  13 Y and  13 X have a smaller width than the width of the transparent electrodes  12 Y and  12 X, and are formed at edges of the transparent electrodes  12 Y and  12 X, respectively. An upper dielectric layer  14  and a protective layer  16  are laminated on the upper substrate  10  where the scan electrode Y and the sustain electrode X extend in parallel. 
         [0043]    A lower dielectric layer  22  and barrier ribs  24  are formed on the lower substrate  18  where the address electrode A is formed. A phosphor layer  26  is coated on the surface of the lower dielectric layer  22  and the barrier ribs  24 . The address electrode A is formed to cross the scan electrode Y and the sustain electrode X. The barrier ribs  24  may be formed in a stripe pattern and/or a mesh pattern. The phosphor layer  26  is excited by ultraviolet (UV) rays generated during a plasma discharge to generate one of red, green, or blue visible light. An inert gas mixture is injected into the discharge spaces provided between the upper and lower substrates  10  and  18  and the barrier ribs  24 . 
         [0044]      FIG. 2  schematically illustrates a block diagram of a PDP according to an embodiment of the present invention. 
         [0045]    Referring to  FIG. 2 , the PDP according to the embodiment of the present invention includes a plasma display panel  100 , an address driver  108 , a scan driver  106 , a sustain driver  110 , a waveform generator  104 , and an image processing unit  102 . 
         [0046]    The image processing unit  102  receives an analog image signal from the outside. The image processing unit  102  converts the analog image signal into a digital image signal. In addition, the image processing unit  102  generates a vertical synchronization signal, a horizontal synchronization signal and clock signals, and supplies the generated signals to the waveform generator  104 . 
         [0047]    The waveform generator  104  receives the digital image signal, the vertical synchronization signal, the horizontal synchronization signal, and the clock signals. The waveform generator  104  divides the digital image signal per each subfield and supplies the divided image signal to the address driver  108 . In addition, the waveform generator  104  generates control signals in response to the vertical synchronization signal, the horizontal synchronization signal and the clock signals, and supplies the generated control signals to the scan driver  106 , the address driver  108 , and the sustain driver  110 . 
         [0048]    The address driver  108  generates data signals in response to the digital image signal and the control signals supplied thereto, and supplies the generated data signals to the address electrodes A 1  to Am in the address period of the subfield. 
         [0049]    The scan driver  106  generates scan signals in response to the control signals supplied thereto and supplies the generated scan signals to the scan electrodes Y 1  to Yn in the address period of the subfield. Here, the scan signals can be supplied to the scan electrodes Y 1  to Yn by various methods. For example, the scan driver  106  can sequentially supply the scan signals to the scan electrodes Y 1  to Yn. In addition, the scan driver  106  may sequentially supply the scan signals to some scan electrodes (for example, odd scan electrodes) among the scan electrodes Y 1  to Yn, then the scan driver  106  may sequentially supply the scan signals to the remaining scan electrodes (for example, even scan electrodes). In addition, the scan driver  106  may supply ramp pulses to the scan electrodes Y 1  to Yn in the reset period of the subfield and supplies sustain pulses in a sustain period. The scan driver  106  includes an energy recovery circuit for supplying the sustain pulses. 
         [0050]    The sustain driver  110  supplies the sustain pulses to the sustain electrodes X 1  to Xn in response to the control signals supplied thereto. The sustain driver  110  and the scan driver  106  alternately apply the sustain pulses to the sustain electrodes X 1  to Xn and the scan electrodes Y 1  to Yn, respectively, in the sustain period. The sustain driver  110  includes the energy recovery circuit for supplying the sustain pulses. 
         [0051]      FIG. 3  is a schematic diagram illustrating waveforms for describing a method of driving the PDP according to an embodiment of the present invention.  FIG. 3  only illustrates driving waveforms supplied in one subfield among the plurality of subfields included in one frame for the convenience of description. 
         [0052]    Referring to  FIG. 3 , the subfield according to the embodiment of the present invention is divided into a reset period Ra, an address period Aa, and a sustain period Sa. 
         [0053]    In the reset period Ra, ramp pulses that rise with a slope (e.g., a predetermined slop) are supplied to the scan electrodes Y 1  to Yn in the wall charge accumulating period t 1  to t 2  while ground potential Vg is applied to the sustain electrodes X 1  to Xn and the address electrodes A 1  to Am. Ramp pulses that fall with a slope (e.g., a predetermined slop) are supplied to the scan electrodes Y 1  to Yn while a voltage Ve (e.g., a predetermined voltage) is applied to the sustain electrodes X 1  to Xn in wall charge distributing period t 2  to t 3 . The ground potential Vg is applied to the address electrodes A 1  to Am in the wall charge distributing period t 2  to t 3 . 
         [0054]    In the address period Aa, the scan signals are supplied to the scan electrodes Y 1  to Yn, and the data signals synchronized with the scan signals are supplied to the address electrodes A 1  to Am. 
         [0055]    In the sustain period Sa, the sustain pulses are alternately applied to the scan electrodes Y 1  to Yn and the sustain electrodes X 1  to Xn. Then, the wall charges of the discharge cells selected by address discharges are added to the voltage of the sustain pulses so that sustain discharges are generated between the scan electrodes Y (e.g., Y 1  to Yn) and the sustain electrodes X (e.g., X 1  to Xn) when the sustain pulses are applied. 
         [0056]      FIG. 4A  is a schematic circuit diagram illustrating a circuit for driving the scan electrodes according to an embodiment of the present invention. For convenience of description, description of the structure of a circuit for generating the waveforms applied to the scan electrodes Y in the reset period and the address period is omitted. For convenience of description, description of a circuit for driving the sustain electrodes X is omitted. Although not shown, the driving circuit coupled to the sustain electrodes X may have the same or similar structure as the circuit coupled to the scan electrodes Y. 
         [0057]    Referring to  FIG. 4A , the driving circuit according to an embodiment of the present invention includes a first sustain driving circuit  130  and a second sustain driving circuit  140 . The first sustain driving circuit  130  and the second sustain driving circuit  140  alternately supply the sustain pulses to the scan electrodes Y. 
         [0058]    Each of the first sustain driving circuit  130  and the second sustain driving circuit  140  includes a rising switch (Sr 1  or Sr 2 ) and a falling switch (Sf 1  or Sf 2 ) coupled between an inductor (L 1  or L 2 ) and a source capacitor (Cs 1  or Cs 2 ) in parallel, a sustain switch (Ss 1  or Ss 2 ) coupled between a panel capacitor Cp and a sustain power source Vs, a ground switch (Sg 1  or Sg 2 ) coupled between the panel capacitor Cp and a ground power source GND, and the inductor (L 1  or L 2 ) coupled between a common terminal between the rising switch (Sr 1  or Sr 2 ) and the falling switch (Sf 1  or Sf 2 ) and the panel capacitor Cp. 
         [0059]    In addition, a first diode (D 111  or D 112 ) is coupled between the rising switch (Sr 1  or Sr 2 ) and the inductor (L 1  or L 2 ) so that a current can be supplied from the rising switch (Sr 1  or Sr 2 ) to the inductor (L 1  or L 2 ), and a second diode (D 121  or D 122 ) is coupled between the falling switch (Sf 1  or Sf 2 ) and the source capacitor (Cs 1  or Cs 2 ) so that a current can be supplied from the falling switch (Sf 1  or Sf 2 ) to the source capacitor (Cs 1  or Cs 2 ). In some embodiments of the present invention, the positions of the failing switch (Sf 1  or Sf 2 ) and the second diode (D 121  or D 122 ) can be changed. For example, the second diode (D 121  or D 122 ) can be positioned between the inductor (L 1  or L 2 ) and the falling switch (Sf 1  or Sf 2 ). 
         [0060]    The panel capacitor Cp represents an electrostatic capacity or capacitance formed in the discharge cell. The rising switch (Sr 1  or Sr 2 ) is turned on when the voltage charged in the source capacitor (Cs 1  or Cs 2 ) is supplied to the panel capacitor Cp. The falling switch (Sf 1  or Sf 2 ) is turned on when the voltage charged in the panel capacitor Cp is recovered to the source capacitor (Cs 1  or Cs 2 ). The sustain switch (Ss 1  or Ss 2 ) is turned on when the sustain voltage Vs is supplied to the panel capacitor Cp. The ground switch (Sg 1  or Sg 2 ) is turned on when the ground power source GND is supplied to the panel capacitor Cp. The inductor (L 1  or L 2 ) forms a resonance circuit with the panel capacitor Cp. 
         [0061]    In the embodiment shown in  FIG. 4A , the first sustain driving circuit  130  and the second sustain driving circuit  140  are formed of the same circuit components. However, the present invention is not limited to the above described embodiment. For example, the components of the first sustain driving circuit  130  and the second sustain driving circuit  140  may have different values. Therefore, the first sustain driving circuit  130  and the second sustain driving circuit  140  may alternately apply different sustain waveforms to the scan electrodes Y (or sustain electrodes X). Furthermore, those skilled in the art will understand that the sustain driving circuits  130  and  140  may have other suitable circuit configurations within the scope of the present invention as long as the sustain driving circuits  130  and  140  can perform an energy recovery operation and a sustain operation. 
         [0062]      FIG. 4B  is a schematic circuit diagram illustrating a circuit for driving the scan electrodes according to an embodiment of the present invention. The differences between the embodiments shown in  FIG. 4A  and  FIG. 4B  are the relative locations of the rising switches (Sr 1 , Sr 2 , Sr 1 ′ and Sr 2 ′), the falling switches (Sf 1 , Sf 2 , Sf 1 ′ and Sf 2 ′) and the inductors (L 1 , L 2 , L 1 ′ and L 2 ′). Since the embodiment shown in  FIG. 4B  operates under substantially the same principles as the embodiment shown in  FIG. 4A , a detailed description of the operations of the embodiment shown in  FIG. 4B  will be omitted. 
         [0063]      FIG. 5  illustrates the operations of the circuits for driving the PDP of  FIGS. 4A and 4B . In  FIG. 5 , for convenience of description, the operations of the driving circuit will be described using only the first sustain driving circuit  130 . Here, the operations will be described with the assumption that the voltage of Vs/2 is charged in the source capacitor Cs (e.g., Cs 1 , Cs 2 , Cs 1 ′ or Cs 2 ′). 
         [0064]    First, the rising switch Sr (e.g., Sr 1 , Sr 2 , Sr 1 ′ or Sr 2 ′) is turned on at the point of time t 10 . When the rising switch Sr is turned on, the voltage stored in the source capacitor Cs is supplied to the panel capacitor Cp through the rising switch Sr, the first diode (e.g., D 111 , D 112 , D 111 ′ or D 112 ′), and the inductor L (e.g., L 1 , L 2 , L 1 ′ or L 2 ′). At this time, the inductor L and the panel capacitor Cp form an LC resonance circuit. In this case, the voltage of Vs/2 stored in the source capacitor Cs increases to the voltage of about Vs by the LC resonance circuit and is supplied to the panel capacitor Cp. 
         [0065]    The sustain switch Ss (e.g., Ss 1 , Ss 2 , Ss 1 ′ or Ss 2 ′) is turned on at the point of time t 11 . When the sustain switch Ss is turned on, the voltage of the sustain power source Vs is supplied to the panel capacitor Cp through the sustain switch Ss. Here, since the voltage of about Vs is charged in the panel capacitor Cp at the point of time immediately before t 11 , the energy supplied by the sustain power source Vs is minimized. On the other hand, the panel capacitor Cp is sustained at the sustain voltage Vs from the point of time t 11  to the point of time t 12 . Here, a period between the point of time t 11  and the point of time t 12  may be experimentally determined so that a stable sustain discharge is generated. 
         [0066]    The falling switch Sf (e.g., Sf 1 , Sf 2 , Sf 1 ′ or Sf 2 ′) is turned on at the point of time t 12 . When the falling switch Sf is turned on, the voltage charged in the panel capacitor Cp is recovered by the source capacitor Cs through the inductor L, the falling switch Sf, and the second diode (e.g., D 121 , D 122 , D 121 ′ or D 122 ′). 
         [0067]    The ground switch Sg (e.g., Sg 1 , Sg 2 , Sg 1 ′ or Sg 2 ′) is turned on at the point of time t 13 . When the ground switch Sg is turned on, the ground voltage GND is supplied to the panel capacitor Cp. 
         [0068]      FIG. 6  is a schematic diagram illustrating sustain waveforms according to an embodiment of the present invention. According to the embodiment of  FIG. 6 , the first recovery circuit  130  and the second recovery circuit  140  repeat the above-described operations in reference to  FIG. 5  to alternately supply the sustain pulses to the scan electrodes Y as illustrated in  FIG. 6 . As described above, when the first recovery circuit  130  and the second recovery circuit  140  are alternately driven to supply the sustain pulses, their switching frequencies are 1/2 of that of the sustain pulses applied to the scan electrodes Y so that their switching losses can be minimized or reduced. 
         [0069]    For example, when the sustain pulses must be supplied at a frequency of 200 KHz, the first sustain driving circuit  130  and the second sustain driving circuit  140  are each driven at a switching frequency of 100 KHz to alternately supply the sustain pulses. Therefore, their switching losses can be minimized or reduced. 
         [0070]    Furthermore, although the circuit for driving the sustain electrodes X is not illustrated in the drawings, the circuit for driving the sustain electrodes X can be designed to have the same structure as the circuit for driving the scan electrodes Y. According to an exemplary embodiment, the circuit for driving the sustain electrodes X may include two sustain driving circuits for alternately supplying sustain pulses to the sustain electrodes X. The scan electrodes Y and the X electrodes X are alternately applied with the sustain pulses. 
         [0071]      FIGS. 7A and 7B  are schematic circuit diagrams illustrating driving circuits according to embodiments of the present invention. 
         [0072]    In  FIG. 7A , only the driving circuit coupled to the scan electrodes Y is illustrated. However, the driving circuit coupled to the sustain electrodes X may have the same or similar structure as the driving circuit coupled to the scan electrodes Y. 
         [0073]    Referring to  FIG. 7A , the driving circuit according to an embodiment of the present invention includes an energy recovery circuit  150 , a first sustain circuit  160 , and a second sustain circuit  170 . 
         [0074]    The energy recovery circuit  150  is commonly coupled to the first sustain circuit  160  and the second sustain circuit  170 , and supplies or recovers energy through the first sustain circuit  160  or the second sustain circuit  170 . 
         [0075]    Therefore, the energy recovery circuit  150  includes an inductor L 3  that is commonly coupled to the first sustain circuit  160  and the second sustain circuit  170 , a rising switch Sr 3  and a falling switch Sf 3  coupled in parallel between the inductor L 3  and the source capacitor Cs 3 , a first diode D 113  positioned between the rising switch Sr 3  and the inductor L 3 , and a second diode D 123  coupled between the falling switch Sf 3  and the source capacitor Cs 3 . 
         [0076]    The voltage charged in the source capacitor Cs 3  corresponds to 1/2 of the sustain voltage Vs. The rising switch Sr 3  is turned on when the voltage charged in the source capacitor Cs 3  is supplied to the panel capacitor Cp. The falling switch Sf 3  is turned on when the voltage charged in the panel capacitor Cp is supplied to the source capacitor Cs 3 . The inductor L 3  forms a resonance circuit with the panel capacitor Cp. With the first diode D  113 , a current can flow from the rising switch Sr 3  to the inductor L 3 . With the second diode D 123 , a current can flow from the falling switch Sf 3  to the source capacitor Cs 3 . 
         [0077]    The first sustain circuit  160  and the second sustain circuit  170  supply the sustain voltage Vs or the ground voltage GND to the scan electrodes Y. The first sustain circuit  160  and the second sustain circuit  170  are alternately driven. 
         [0078]    Each of the first sustain circuit  160  and the second sustain circuit  170  includes a sustain switch (Ss 3  and Ss 4 ) coupled between the panel capacitor Cp and the sustain power source Vs, and a ground switch (Sg 3  and Sg 4 ) coupled between the panel capacitor Cp and the ground power source GND. 
         [0079]    The sustain switch (Ss 3  or Ss 4 ) is turned on when the sustain voltage Vs is supplied to the panel capacitor Cp. The ground switch (Sg 3  and Sg 4 ) is turned on when the ground power source GND is supplied to the panel capacitor Cp. 
         [0080]    The operations of the driving circuit of  FIG. 7A  will now be further described. First, the rising switch Sr 3  is turned on so that a voltage that increases to about the sustain voltage Vs is supplied to the panel capacitor Cp. Then, the sustain switch Ss 3  included in the first sustain circuit  160  is turned on so that the sustain voltage Vs is supplied to the panel capacitor Cp. 
         [0081]    After the sustain voltage Vs is supplied to the panel capacitor Cp, the falling switch Sf 3  is turned on. When the falling switch Sf 3  is turned on, the voltage charged in the panel capacitor Cp is recovered to the source capacitor Cs 3 . At this time, the source capacitor Cs 3  is charged with the voltage of Vs/2. After the voltage is charged in the source capacitor Cs 3 , the ground switch Sg 3  included in the first sustain circuit  160  is turned on so that the ground voltage is supplied to the panel capacitor Cp. 
         [0082]    When a next sustain pulse is supplied, the ground switch Sg 3  included in the first sustain circuit  160  is turned off and the rising switch Sr 3  is turned on. When the rising switch Sr 3  is turned on, the voltage that increases to about the sustain voltage is supplied to the panel capacitor Cp. Then, the sustain switch Ss 4  included in the second sustain circuit  170  is turned on so that the sustain voltage Vs is supplied to the panel capacitor Cp. 
         [0083]    After the sustain voltage Vs is supplied to the panel capacitor Cp, the falling switch Sf 3  is turned on. When the falling switch Sf 3  is turned on, the voltage charged in the panel capacitor Cp is recovered to the source capacitor Cs 3 . At this time, the source capacitor Cs 3  is charged with the voltage of Vs/2. After the voltage is charged in the source capacitor Cs 3 , the ground switch Sg 4  included in the second sustain circuit  170  is turned on so that the ground voltage is supplied to the panel capacitor Cp. 
         [0084]    The first sustain circuit  160  and the second sustain circuit  170  repeat the above-described operations to alternately supply the sustain pulses to the scan electrodes Y. As described above, when the first sustain circuit  160  and the second sustain circuit  170  are alternately driven, their switching frequencies are reduced by 1/2 so that their switching losses can be minimized or reduced. 
         [0085]    For example, when the driving circuit is driven at the switching frequency of 200 KHz, the first sustain circuit  160  and the second sustain circuit  170  are driven at the switching frequency of 100 KHz to alternately supply the sustain pulses. Therefore, their switching losses can be minimized or reduced. 
         [0086]    Furthermore, although the driving circuit of the sustain electrodes X is not illustrated in  FIG. 7A , the driving circuit of the sustain electrodes X can be designed to have the same or similar structure as that of the driving circuit of the scan electrodes Y. 
         [0087]    In the embodiment of  FIG. 7A , since the energy recovery operation is performed by a common energy recovery circuit  150 , unlike the embodiments of  FIGS. 4A and 4B , it is difficult to make the rising and falling shapes of the sustain waveforms to be different from each other so that the degree of freedom of the design of the waveforms is reduced. However, since the embodiment of  FIG. 7A  employs less circuit elements, it is possible to reduce the cost of manufacturing the driving circuit. 
         [0088]    The differences between the driving circuit illustrated in  FIG. 7B  and the one illustrated in  FIG. 7A  are the circuit configurations of their respective energy recovery circuits  150 . In  FIG. 7B , the inductor L 3 ′ is coupled between the source capacitor Cs 3 ′ and the rising switch Sr 3 ′ and the falling switch Sf 3 ′. Since the driving circuits of  FIGS. 7A and 7B  operate under substantially the same principle, a detailed description of the operation of the driving circuit of  FIG. 7B  will be omitted. 
         [0089]    In the above-described exemplary embodiments, a method of driving the sustain circuits at 1/2 of the desired sustain switching frequency using two sustain circuits is described. However, those skilled in the art will understand that a method of driving the sustain circuits at switching frequency of 1/n (n is no less than 3) of the desired sustain switching frequency can be performed using no less than 3 sustain circuits. 
         [0090]    Although exemplary embodiments of the present invention have been shown and described, it would be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined in the claims and their equivalents.