Abstract:
A pitch modification system for signals received from a tape player converts analog signals received from the player to binary digital form and stores them in sequential addresses in a memory unit at a rate set by a first clock. Output signals are produced by sequentially reading the stored information at a different rate as set by the frequency of a second clock, the ratio between the two clock frequencies causing the desired change in pitch with respect to the original signal. The output signal is converted from digital binary representation to an analog signal by a D/A converter. A detecting means is employed to detect no-signal conditions and generates an automatic reset signal which equalizes the two clock frequencies to restore the system to a zero-shift condition attendant to the appearance of silent passages on the tape.

Description:
BACKGROUND OF THE INVENTION 
     This invention relates to a device to change the pitch (play speed) of reproduced sound or music from a tape player and particularly for a tape player used to give a singer background music and mix the signer&#39;s voice with the background music. 
     A conventional pitch modifying device in a background music tape player includes a key to change the tape drive speed so that the user may select a desired pitch of reproduced music by changing the tape drive speed by operation of the key. Such a conventional device, however, once the changeover key is operated, has the property that the tape speed changeover rate, namely the pitch changeover rate, remains as it is. So, if the tape player is used by many persons, the changeover rate selected by a former user remains for a later user, and the later user has to readjust the changeover key. 
     Another conventional pitch modifying device is capable of changing merely the reproduced sound pitch without changing the tape drive speed. In such a device, also, the once selected pitch changeover rate remains as it is, and the device still poses the same problem. 
     OBJECT OF THE INVENTION 
     It is therefore an object of the invention to provide a reproduced sound pitch modifying device capable of automatically recovering a standard pitch when a reproduction at a modified pitch is finished. 
     SUMMARY OF THE INVENTION 
     According to a feature of the invention a pitch modification device for tape players features analog to digital conversion means for converting signals from the tape player into digital form and entering these digital signals as they are received into a memory means, contents of the memory means being subsequently read out and passed through a digital-to-analog conversion means and passed therefrom to an audio reproduction output means for reproducing the analog signals in audio form. Pitch shifting is secured by means of user-operated control means capable of controllingly setting the read-out frequency from the memory at various values equal to, less than, or greater than the read-in frequency, a zero-shift condition being automatically restored by means of a reset signal detector which detects signalless zones in the signals from the tape so as to restore the system to a zero-shift condition at the end of each passage. 
     According to specific features of the invention the frequency shift control means includes a pair of frequency dividers performing frequency division from a master clock oscillator to provide the writing clock and reading clock signals respectively, there further being provided a read-only memory storing the desired frequency division ratios and outputting a controlling chosen ratio to control the division ratio of the memory read frequency divider to preset values stored therein. Control of the chosen ratio is established most preferably by a keyboard-actuated encoder selectively accessing a chosen address of the read-only memory to cause the value stored therein to control the frequency division ratio. According to further related features of the invention the continuity of the output digital signals to the digital analog converter is insured by employing a pair of latched circuits for latchingly storing contiguous groups of digital signals and adding them up together appropriately by means of fade circuits connected thereto. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram showing an embodiment of the present invention employed in a tape player to provide a singer with a background music; 
     FIG. 2 is a block diagram showing in detail the control section, the data processing section and some relevant elements of FIG. 1; 
     FIGS. 3A, 3B, 4A and 4B are time charts of digital signals in the operating processes of the same embodiment; and 
     FIGS. 5A and 5B show diagramed waveforms for explanation of the operation of the data processing section. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     The invention will now be described in detail by way of a preferred embodiment referring to the drawings. 
     FIG. 1 shows a fundamental construction of an embodiment of the invention which is employed in a tape player to provide background music to a singer and which is arranged to mix reproduction signals from a magnetic tape with voice input signals from a microphone. In FIG. 1, reference letter H designates a tape reproduction head, AMP 1  is a head amplifier, and U 1  is a reset signal detector. The reset signal detector detects, for example, a signalless zone between or at the ends of recorded background music on a tape T, and sends a reset signal to a control section which will be described later. Reference letters A/D designate an A/D (analog-to-digital) converter, and RAM is a random-access memory (hereinafter called &#34;RAM&#34;). The A/D converter converts audio reproduction signals from the head H into digital signals and the RAM stores them. A control section designated by U 2  supplies a write signal to control write-down frequency for the RAM and a read signal to control the read-out frequency for the same. The pitch of the reproduced music is determined by the frequency ratio f R  /f W  (f R  is the read-out frequency and f W  is the write-in frequency). In this case, for example, the write-in frequency f W  is fixed so that the pitch may be modified by varying the read-out frequency. The control section U 2  has an operating board U 2a  associated therewith, and other elements to enable changing the read-out frequency f R . Reference numeral U 3  designates a data processing section which will be described later. A D/A (digital-to-analog) converter converts the read-out digital signal supplied from the RAM via the data processing section U 3  into a reproduced analog signal. Reference letters MIX designate a mixing circuit, numeral 1 is a microphone input terminal, AMP 2  is a microphone amplifier, AMP 3  is a power amplifier, and SP is a loudspeaker. The power amplifier AMP 3  and the loudspeaker SP make up a reproduction sound output means to output reproduction analog signals. 
     The control section U 2 , the data processing section U 3  and other relevant constituents which are outlined in FIG. 1 will be described in detail referring to FIG. 2. 
     The control section U 2  involves first and second clock frequency dividers D 1  and D 2  to which a master clock oscillator CL is commonly connected to generate a master clock signal. The first clock frequency divider D 1  performs frequency division of the master clock signal by a given division ratio and generates a write clock signal corresponding to the write-in signal. The second clock frequency divider D 2  also performs frequency division of the master clock signal and generates a read-out clock signal corresponding to the read-out signal. The frequency division ratio of the second divider D 2  is variable so that the read-out frequency f R  may be changed. The control section U 2  also involves the operating board U 2a  and a read-only memory ROM (hereinafter called &#34;ROM&#34;) to control the frequency division ratio for the second clock frequency divider D 2 . The operating board U 2a  carries operating buttons S 1  and S n  for selection of frequency division ratios for the second clock frequency divider D 2 . The operating board further carries an encoder E. When one of the operating buttons S 1  to S n  is depressed, the encoder E sends an encode signal corresponding to the depressed button and latches the succeeding signals thereafter until another button is depressed. The ROM involves plural addresses storing different frequency division ratio data, respectively. When the ROM receives an encode signal from the encoder E, a corresponding one of the data is supplied to the second clock frequency divider D 2  to control the same. An address O of the ROM stores a frequency division ratio data which equalizes the frequency division ratio of the second clock frequency divider D 2  to that of the first clock frequency divider D 1 . The encoder E is connected to a reset signal detector U 1  by a reset signal line 1 1 . When the encoder E is supplied with a reset signal, it is released from the latched state and supplies a signal to the ROM to reset it at the address O. Output lines from the first and second frequency dividers D 1  and D 2  are connected to a control circuit C. First and second read signal lines 1 2  and 1 3  derive from the control circuit C and are connected to the RAM via two-input first OR circuit OR 1 . A write signal line 1 4  also derives from the control circuit C and is connected to the RAM. A bus 1 5  branches off the line 1 4  and is connected to a bus buffer B. The first and second read signal lines 1 2 , 1 3  and the write signal line 1 4  are also connected to three-input second OR circuit OR 2 . The output of the second OR circuit OR 2  is connected to the RAM to supply it with a memory enable signal. 
     The data processing section U 3  generally functions to process digital signals (digital data) picked up from the RAM so as not to produce discontinuities in the resulting reproduced sound, and to send the resulting output to the D/A converter. In this case, a cross-fade data processing system is employed. First and second latch circuits L 1 , L 2  and first and second fade circuits F 1 , F 2  are associated with and first and second read signal lines 1 2  and 1 3 , respectively, and are connected to an adder ADD, which is in turn connected to the D/A converter. The first and second fade circuits F 1  and F 2  are connected to the control circuit C by first and second fade control signal lines 1 6  and 1 7 , while the first and second latch circuits L 1  and L 2  are provided with the first and second read signals which function as latch control signals. 
     The operation of the device will now be described in detail referring to FIGS. 3A, 3B, 5A and 5B, too. 
     In the explanation hereinbelow, the pitch is normal when the read-out frequency f R  is equal to the write-in frequency f W , the pitch is high when the read-out frequency f R  is higher than the write-in frequency f W , and is low when the read-out frequency f R  is lower than the write-in frequency f W , respectively. 
     Now assume that all the elements in FIGS. 1 and 2 are supplied with source power and are ready to operate, and that the write-in frequency f W  is kept constant due to the frequency division by the first clock frequency divider D 1 , while the read-out frequency f R  is set to be f W  &lt;f R  by operation of a given operating button on the operating board U 2a . When the tape player starts, signals on a tape are reproduced by the head H and are converted into digital signals by the A/D converter. The digital signals are stored in the RAM at a predetermined rate governed by the frequency f W . FIG. 3A shows a process wherein data a, b, c . . . consisting of the digital signals are stored in accordance with the time t 1 , t 2  . . . at the write-in frequency f W . In this data processing system employing the cross-fade method, the stored data a, b, c . . . are sequentially read out in every period T 1  by two read-out signals from the first and second read signal lines 1 2  and 1 3 . A data group N 1  which is stored during one period T 1  is read out by the first read-out signal before the time t 2  comes up, as shown in FIG. 3B. So, in the remaining time of the period T 1 , succeeding data i, j, k are read out. The data i, j, k belong to a data group N 2  to be read out by the second read-out signal and are read out two times. The data groups N 1  and N 2  which were read out at the different times are latched in the first and second latch circuits L 1  and L 2  by the latch control signals. 
     Assume now that the read-out frequency f R  is set to be f W  &gt;f R . As shown in FIG. 4B, a data group N 1  &#39; which is read out by the first read-out signal during the period T 1  involves less data a to f, for example, than the data a to i which are written during the same period T 1 . The second read-out signal reads out a next data group starting from the data j, skipping the remaining data g to i. Thus, although the processes of the data writing and reading are temporally different, they are corrected every period T 1 . Therefore, the data writing and reading appear to progress simultaneously as a whole. 
     In any event when the read-out frequency f R  is different from the write-in frequency f W , if the data groups N 1 , N 2  . . . which were read out by the first and second read-out signals are incorporated as they are, then the resulting reproduced sound will contain discontinuities. To amend this, the following treatment is taken in the data processing section U 3 , etc. As shown in FIG. 5A, the former data group N 1  is read out by the first read-out signal earlier as much as T 2  than the time t 1 , and similarly, the latter data group N 2  is read out by the second read-out signal earlier as much as T 2  than the time t 2 . The former and latter ends of the respective data groups N 1  and N 2  are faded in or faded out by the first and second fade circuits F 1  and F 2 . The fading operations last for the time 2T 2 . The data groups N 1  and N 2  as the result of the fading treatment are sequently added in the adder ADD and are shaped up into smooth and continuous digital signals are shown in FIG. 5B. The digital signals are then converted into analog signals by the D/A converter and the analog signals transmitted through the mixing circuit MIX and the power amplifier AMP 3  to the loudspeaker SP, and are thus reproduced into an audio sound. In this case, the resulting sound is reproduced at a high pitch or at a low pitch due to the control action of the control section U 2  which controls the read-out frequency f R  to be f W  21 f R  or f W  &gt;f R . 
     When a desired reproduction is finished, the reset signal detecting section U 1  detects a signalless zone on the tape and sends a reset signal to the encoder E. Then, the encoder E which latched an encode signal corresponding to the chosen read-out frequency f R  is released from its latched state, and applies a signal to reset the ROM at the address O. With this signal, the ROM is reset at the address O and adjusts the frequency division ratio of the second clock frequency divider D 2  to be same as that of the first clock frequency divider D 1 , namely f W  =f R , thereby resetting the tape player at the normal pitch. 
     As described in the above, the device according the present invention is arranged so that reproduction signals from the head are converted into digital signals so as to be once written down in the memory and to be there after reconverted to analog signals and be reproduced into an audio sound at a modified pitch in accordance with the ratio between a write-in frequency and a read-out frequency of the memory, and that the write-in and read-out frequencies are readjusted to be equal by a reset signal responsive to detection of a signalless zone on a tape so as to automatically reset the tape player at its original pitch. Therefore, particularly when the tape player is widely used by many persons, even if a former user sets the player at a different reproduction pitch, the next user can always get a reproduced sound at a normal pitch.