Abstract:
An integrated circuit for reducing the electromigration effect. The IC includes a substrate and a power transistor which has first and second source/drain regions. The IC further includes first, second, and third electrically conductive line segments being (i) directly above the first source/drain region and (ii) electrically coupled to the first source/drain region through first contact regions and second contact regions, respectively. The first and second electrically conductive line segments (i) reside in a first interconnect layer of the integrated circuit and (ii) run in the reference direction. The IC further includes an electrically conductive line being (i) directly above the first source/drain region, (ii) electrically coupled to the first and second electrically conductive line segments through a first via and a second via, respectively, (iii) resides in a second interconnect layer of the integrated circuit, and (iv) runs in the reference direction.

Description:
FIELD OF THE INVENTION 
   The present invention relates generally to integrated circuits and more particularly to integrated circuits for reducing electromigration effect. 
   BACKGROUND OF THE INVENTION 
   In a conventional integrated circuit (IC), metal lines (having copper or aluminum as primary conductors) in the first interconnect layer of the IC are vulnerable to electromigration effect. Therefore, there is a need for an integrated circuit in which metal lines are less vulnerable to electromigration effect than those of the prior art. 
   SUMMARY OF THE INVENTION 
   The present invention provides an integrated circuit, comprising (a) a substrate; (b) a first electrically conductive line segment and a second electrically conductive line segment on the substrate, wherein both the first and second electrically conductive line segments run in a reference direction, and wherein the first and second electrically conductive line segments reside in a first interconnect layer of the integrated circuit; and (c) an electrically conductive line electrically coupled to the first and second electrically conductive line segments through a first via and a second via, respectively, wherein the electrically conductive line resides in a second interconnect layer of the integrated circuit, wherein the second interconnect layer is above the first interconnect layer, and wherein the electrically conductive line runs in the reference direction. 
   The present invention provides an integrated circuit, comprising (a) a substrate; (b) a first electrically conductive line segment, a second electrically conductive line segment, and a third electrically conductive line segment on the substrate; wherein the first, second, and third electrically conductive line segments reside in a first interconnect layer of the integrated circuit, and wherein the first, second, and third electrically conductive line segments run in a first reference direction; and (c) a first electrically conductive line and a second electrically conductive line, wherein the first and second electrically conductive lines reside in a second interconnect layer of the integrated circuit, wherein the first electrically conductive line is electrically coupled to the first and third electrical conductive line segments in the first interconnect layer through a first via and a second via, respectively, wherein the second electrically conductive line is electrically coupled to the second and third electrically conductive line segments in the first interconnect layer through a third via and a fourth via, respectively, wherein the second interconnect layer is above the first interconnect layer, wherein the first and second electrically conductive lines run in a second reference direction, and wherein the first and second reference directions are perpendicular. 
   The present invention provides an integrated circuit in which metal lines are less vulnerable to electromigration effect than those of the prior art. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1A  depicts a perspective view of a structure, in accordance with embodiments of the present invention. 
       FIG. 1B  depicts a top down view of the structure of  FIG. 1A , in accordance with embodiments of the present invention. 
       FIG. 2A  depicts a perspective view of a structure, in accordance with embodiments of the present invention. 
       FIG. 2B  depicts a top down view of the structure of  FIG. 2A , in accordance with embodiments of the present invention. 
       FIG. 3A  depicts a perspective view of a structure, in accordance with embodiments of the present invention. 
       FIG. 3B  depicts a top down view of the structure of  FIG. 3A , in accordance with embodiments of the present invention. 
       FIG. 4A  depicts a perspective view of a structure, in accordance with embodiments of the present invention. 
       FIG. 4B  depicts a top down view of the structure of  FIG. 4A , in accordance with embodiments of the present invention. 
       FIG. 5A  depicts a perspective view of a structure, in accordance with embodiments of the present invention. 
       FIG. 5B  depicts a top down view of the structure of  FIG. 5A , in accordance with embodiments of the present invention. 
       FIG. 6A  depicts a perspective view of a structure, in accordance with embodiments of the present invention. 
       FIG. 6B  depicts a top down view of the structure of  FIG. 6A , in accordance with embodiments of the present invention. 
       FIG. 7  depicts a perspective view of a structure, in accordance with embodiments of the present invention. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 1A  depicts a perspective view of a structure  100 , in accordance with embodiments of the present invention. The structure  100  comprises (i) a source region  110   a  and a drain region  110   b  of a power transistor (not shown) which can be formed on top of a semiconductor wafer (not shown), (ii) twenty contact regions  115 , and (iii) two M 1  lines  120   a  and  120   b . The M 1  line  120   a  comprises nine M 1  line portions  115   a   1   a   2 - 115   a   9   a   10 , and the M 1  line  120   b  comprises nine M 1  line portions  115   b   1   b   2 - 115   b   9   b   10 . The source region  110   a  is electrically coupled to the M 1  line  120   a  through the ten contact regions  115   a   1 - 115   a   10 . The drain region  110   b  is electrically coupled to the M 1  line  120   b  through the ten contact regions  115   b   1 - 115   b   10 . In one embodiment, the source region  110   a  and the drain region  10   b  comprise a doped semiconductor material (e.g., doped silicon); the twenty contact regions  115  comprise tungsten; and the two M 1  lines  120  and  120   b  comprise copper. The source region  110   a , the drain region  110   b , and the two M 1  lines  120   a  and  120   b  run in a first direction  190 . 
     FIG. 1B  depicts a top down view of the structure  100  of  FIG. 1A , in accordance with embodiments of the present invention. 
   With reference to  FIGS. 1A and 1B , assume that there is a DC power supply  150  electrically connected to the structure  100  as shown. When the power transistor is conducting, the source region  110   a  and the drain region  110   b  are electrically connected together via a channel (not shown) of the power transistor which is located between the source region  110   a  and the drain region  110   b . As a result, there is an electron current flowing in the structure  100 . More specifically, the electron current flows from the DC power supply  150  to the M 1  line  120   a , then to the source region  110   a  through the ten contact regions  115   a   1 - 115   a   10 , then to the drain region  110   b  via the channel, then to the M 1  line  120   b  through the ten contact regions  115   b   1 - 115   b   10 , and then back to the DC power supply  150 . 
   It should be noted that the two M 1  copper lines  120   a  and  120   b  are more vulnerable to electromigration effect than the twenty tungsten contact regions  115  because copper is more vulnerable to electromigration effect than tungsten. The electromigration effect is a phenomenon in which voids appear in an electrically conducting line due to an electron current flowing in the line exceeding a certain electron current density. The closer to the DC power supply  150  an M 1  line portion is, the more vulnerable to electromigration effect that M 1  line portion is. This is because the closer to the DC power supply an M 1  line portion is, the higher current density that M 1  line portion has to carry. For example, the M 1  line portion  115   a   9   a   10  is more vulnerable to electromigration effect than the M 1  line portion  115   a   1   a   2 ; similarly the M 1  line portion  115   b   9   b   10  is more vulnerable to electromigration effect than the M 1  line portion  115   b   1   b   2 . 
     FIG. 2A  depicts a perspective view of a structure  200 , in accordance with embodiments of the present invention. The structure  200  of the  FIG. 2A  is similar to the structure  100  of  FIG. 1A , except as follows. Firstly, M 1  line  220   a  is divided into two M 1  line segments  220   a   1  and  220   a   2  by a gap  220   a   1   a   2  which is located between the two contact regions  215   a   5  and  215   a   6 . Secondly, M 1  line  220   b  is divided to two M 1  line segments  220   b   1  and  220   b   2  by a gap  220   b   1   b   2  which is located between the two contact regions  215   b   5  and  215   b   6 . There is no relationship between the lengths of the M 1  line segments and their proximity to the power supply  250 . 
   In addition, the structure  200  further comprises two M 2  lines  230   a  and  230   b  (also called bridges  230   a  and  230   b ) and four vias  225   a   1 ,  225   a   2 ,  225   b   1 , and  225   b   2 . The two M 2  lines  230   a  and  230   b  run in the first direction  190 . The M 2  line  230   a  electrically connects the two M 1  line segments  220   a   1  and  220   a   2  together through the vias  225   a   1  and  225   a   2 . In other words, the M 2  line  230   a  bridges the gap  220   a   1   a   2  between the two M 1  line segments  220   a   1  and  220   a   2 . Similarly, the M 2  line  230   b  electrically connects the two M 1  line segments  220   b   1  and  220   b   2  together through the vias  225   b   1  and  225   b   2 . In other words, the M 2  line  230   b  bridges the gap  220   b   1   b   2  between the two M 1  lines segments  220   b   1  and  220   b   2 . The four vias  225   a   1 ,  225   a   2 ,  225   b   1 , and  225   b   2  and the two M 2  lines  230   a  and  230   b  can comprise copper. 
     FIG. 2B  depicts a top down view of the structure  200  of  FIG. 2A , in accordance with embodiments of the present invention. 
   With reference to  FIGS. 2A and 2B , assume that there is a DC power supply  250  electrically connected to the structure  200  as shown. Then, the resulting electron current flow in the structure  200  is similar to that in the structure  100  of  FIG. 1A  except as follows. Firstly, the electron current flows from the M 1  line segment  220   a   2  to the M 1  line segment  220   a   1  through the bridge  230   a . Secondly, the electron current flows from the M 1  line segment  220   b   1  to the M 1  line segment  220   b   2  through the bridge  230   b.    
   Due to the short-length effect, it would be more difficult for the electromigration effect to occur in the M 1  line segments  220   a   1 ,  220   a   2 ,  220   b   1 , and  220   b   2  of the  FIG. 2A  than in the M 1  lines  120   a  and  120   b  of the  FIG. 1A , because the M 1  line segments  220  of the  FIG. 2A  are shorter than the M 1  lines  120  of the  FIG. 1A . The short-length effect is a phenomenon in which the shorter a metal line is, the more difficult for the electromigration effect to occur in that metal line. 
     FIG. 3A  depicts a perspective view of a structure  300 , in accordance with embodiments of the present invention. The structure  300  of the  FIG. 3A  is similar to the structure  200  of  FIG. 2A , except as follows. There are two pairs of source and drain regions (as shown in  FIG. 2A ), each of the two pairs is similar to the pair of source and drain regions of  FIG. 1A . M 1  line  320   a  is divided into three M 1  line segments  320   a   1 ,  320   a   2  and  320   a   3  by two gaps: (i) a gap  330   a   1   a   2  which is located between the contact region  315   a   1  and  315   a   2  and (ii) a gap  330   a   2   a   3  which is located between the contact region  315   a   8  and  315   a   9 . Similarly, M 1  line  320   b  is divided into three M 1  line segments  320   b   1 ,  320   b   2  and  320   b   3  by two gaps as shown in  FIG. 3A . M 1  line  320   c  is divided into three M 1  line segments  320   c   1 ,  320   c   2  and  320   c   3  by two gaps as shown in  FIG. 3A . M 1  line  320   d  is divided into three M 1  line segments  320   d   1 ,  320   d   2  and  320   d   3  by two gaps as shown in  FIG. 3A . 
   Assume that there is a DC power supply  350  electrically connected to the structure  300  as shown. In one embodiment, for M 1  line segments that are electrically coupled to the same source/drain (S/D) regions via the contact regions, the closer to the DC power supply  350  an M 1  line segment is, the shorter that M 1  line segment is. For example, the length L 1  of the M 1  line segment  320   a   1  is greater than the length L 2  of the M 1  line segment  320   a   2 , which is in turn greater than the length L 3  of the M 1  line segment  320   a   3  (i.e., L 1 &gt;L 2 &gt;L 3 ). As a result, compared with the M 1  line dividing scheme of  FIG. 2A , the M 1  line dividing scheme of  FIG. 3A  is better because the M 1  line dividing scheme of  FIG. 3A  gives more ability to withstand the electromigration effect to the line segments which are closer to the DC power supply  350 . 
   In addition, the structure  300  further comprises multiple M 2  lines (e.g.,  330   a ,  330   b ,  330   c ,  330   d ,  330   h , and  330   k ).  FIG. 3A  shows ten M 2  lines  330  in total. The ten M 2  lines  330  run in a second direction  395 , which is perpendicular to the first direction  190 . The two M 2  lines  330   b  and  330   d  help bridge the gap  320   a   1   a   2  between the M 1  line segments  320   a   1  and  320   a   2 . Similarly, the two M 2  lines  330   h  and  330   k  help bridge the gap  320   a   2   a   3  between the M 1  line segments  320   a   2  and  320   a   3 . The structure  300  further comprises twenty vias  325   a   1 - 325   a   5 ,  325   b   1 - 325   b   5 ,  325   c   1 - 325   c   5 , and  325   d   1 - 325   d   5 . The ten M 2  lines  330  and the twenty vias  325  can comprise copper. 
     FIG. 3B  depicts a top down view of the structure  300 , in accordance with embodiments of the present invention. 
   With reference to  FIGS. 3A and 3B , the electron current flow in the structure  300  is similar to that in the structure  200  of  FIG. 2A  except as follows. The electron current can flow from the M 1  line segment  320   a   3  to the M 1  line segment  320   a   2  through via  325   a   5 , the bridge  330   k , the via  325   c   5 , the M 1  line portion  315   c   8   c   9 , the via  325   c   4  the M 2  line bridge  330   h , and the via  325   a   4 , in that order. Similarly, the electron current can flow from the M 1  line segment  320   a   2  to M 1  line segment  320   a   1  through the via  325   a   2 , the bridge  330   d , the via  325   c   2 , the M 1  line portion  315   c   1   c   2 , the via  325   c   1 , the M 2  line bridge  330   b , and the via  325   a   1 , in that order. 
     FIG. 4A  depicts a perspective view of a structure  400 , in accordance with embodiments of the present invention. The structure  400  of the  FIG. 4A  is similar to the structure  300  of  FIG. 3A  in terms of (i) M 1  line dividing scheme (i.e., M 1  line segment that is closer to the power supply is shorter) and (ii) gap bridging scheme (i.e., crossing a gap by traveling through a detour comprising two M 2  lines which are perpendicular to M 1  line). 
   As shown in  FIG. 4A , it should be noted that all the M 2  lines are connected to the same two source/drain regions of structure  400 . In one embodiment, if both first and second M 2  lines are electrically connected to a first source/drain region and if the first M 2  line is electrically connected to a second source/drain region, then the second M 2  line is also electrically connected to the second source/drain region. 
     FIG. 4B  depicts a top down view of the structure  400 , in accordance with embodiments of the present invention. 
     FIG. 5A  depicts a perspective view of a structure  500 , in accordance with embodiments of the present invention. The structure  500  of the  FIG. 5A  is similar to the structure  400  of  FIG. 4A  in terms of (i) M 1  line dividing scheme (i.e., M 1  line segment that is closer to the power supply is shorter) and (ii) gap bridging scheme (i.e., crossing a gap by traveling through a detour comprising multiple M 2  lines which are perpendicular to M 1  line), except as follows. There are three M 2  lines  530   b ,  530   c , and  530   d  that are electrically connected between the M 1  line segments  520   a   2  and  520   c   1  of  FIG. 5A , whereas there are only two M 2  lines  430   b  and  430   c  that are electrically connected between the M 1  line segments  420   a   2  and  420   c   1  of  FIG. 4A . Therefore, the operation of the structure  500  is more reliable than the operation of the structure  400  of  FIG. 4A . 
     FIG. 5B  depicts a top down view of the structure  500 , in accordance with embodiments of the present invention. 
     FIG. 6A  depicts a perspective view of a structure  600 , in accordance with embodiments of the present invention. The structure  600  of the  FIG. 6A  is similar to the structure  400  of  FIG. 4A  except as follows. The width W 6  of the M 1  line segments  620  is greater than the width W 5  of the M 1  line segments  520 . 
     FIG. 6B  depicts a top down view of the structure  600 , in accordance with embodiments of the present invention. 
   In summary, the M 1  line dividing schemes of  FIGS. 3A ,  4 A,  5 A, and  6 A give more ability to withstand electromigration effect to the line segments which are closer to the DC power supply. The gap bridging scheme of  FIG. 2A  provides a detour which comprises a bridge in the same orientation as that of the M 1  line segments. The gap bridging schemes of  FIGS. 3A ,  4 A, and  5 A provide detours which comprise bridges whose orientation is perpendicular to the orientation of the M 1  line segments. 
   In the embodiments described above, it should be noted that the M 1  and M 2  lines are formed in a first and second interconnect layers, respectively, of a semiconductor integrated circuit (i.e., chip) (not shown). The second interconnect layer is immediately above the first interconnect layer. 
   In the embodiments described above, the metal lines that run laterally in the interconnect layers (e.g., M 1  line  120   a  and  120   b  of  FIG. 1A ) can comprise aluminum or copper. For aluminum metallization, the vias between metal levels (e.g., the via  225   a   1  of  FIG. 2A ) can comprise either tungsten (W) or Al, whereas the metal lines can comprise Al alloys, such as AlCu, AlSi, AlCuSi, with or without refractory metal under and over layers such as TiW, Ti,TiAl3, TiN, etc. The Al lines could be either RIE or damascene. For Cu metallization, the metal lines can comprise Cu with various forms of Ta-based liners, and single or dual damascene metal. 
   In the embodiments described above, only 2 metal levels M 1  and M 2  are described. In general, the present invention can be applied to any number of metal levels. As a result, to cross a gap in a metal level, the current can go up one or more metal levels and then go down to the original metal level. 
   In the embodiments described above, only two power transistors are described ( FIG. 3A ). In general, the present invention can be applied to any number of power transistors whose source/drain regions are arranged next to one another as in  FIG. 3A . As a result, to cross a gap overhead a S/D region, the current can go laterally to any metal line overhead any S/D region and then go back to overhead the original S/D region. 
   In the embodiments described above, the present invention is applied to power transistors (e.g., power transistor  110   a + 110   b  of  FIG. 1A ). In general, the present invention can be applied to hot regions of an integrated circuit (IC). More specifically, there are hot regions in an integrated circuit where temperatures are higher than elsewhere of the IC. Metal lines running close to these hot regions are more vulnerable to electromigration than others elsewhere. As a result, these metal lines can be divided up using the dividing scheme of the present invention (i.e., divided into segments whose lengths become shorter when coming closer to a hot region). The divided segments can be electrically connected together using the bridging schemes of the present invention (described above). As a result, the divided segments have more ability to withstand electromigration when coming closer to hot regions. 
     FIG. 7  depicts a perspective view of a structure  700 , in accordance with embodiments of the present invention. The structure  700  comprises illustratively 4 metal levels namely the first, second, third, and fourth metal levels (from bottom up). Assume that the metal lines in the first and third metal levels run in the north-south direction, whereas the metal lines in the second and fourth metal levels run in the east-west direction. 
   Assume that an electron current is to flow from a line segment  710   a  to a line segment  710   b  (i.e., cross the gap  712 ). The arrows represent the possible paths which the electron current can take. More specifically, the electron current can flow north in the line segment  710   a , then flow up to the second metal level, then flow west 2 portions, then flow down to the first metal level, then flow north 1 portion, then flow up the second level, then flow east 2 portions, then flow down to the first level, and then flow north in the line segment  710   b.    
   Alternatively, the electron current can flow north in the line segment  710   a , then flow up to the second metal level, then flow up to the third metal level, then flow north 1 portion, then flow down to the second metal level, then flow down to the first metal level, and then flow north in the line segment  710   b.    
   Assume that there is a gap at a location  723  which blocks the original path of the electron current described above. Then, to cross the gap  723 , the electron current can detour from the original path and flow up to the third metal level, then flow north 1 portion, then flow down to the second metal level, then flow east 1 portion, then flow up to the third metal level, then flow south 1 portion, and then flow down to the second metal level to continue on the original path. 
   The use of the short-length effect, as described by I. Blech (JAP 47 (4) 1203-1208 (1976)), to increase the electromigration robustness of a metal line has been proposed for several years. But it is difficult to utilize the Blech scheme generally in chip design due to restrictions imposed by design tools which have wiring algorithms that automatically connect pre-designed blocks of circuitry. Only in the application of power distribution grids that cover most of the chip is it feasible to try such schemes as set forth in the Filippi patent (U.S. Pat. No. 6,202,191). However, special situations arise where portions of a chip develop much higher currents or temperatures than the rest of the chip, and local wiring designs can substantially augment the current-carrying capability of the metallization. The present invention deals with these special situations. 
   While particular embodiments of the present invention have been described herein for purposes of illustration, many modifications and changes will become apparent to those skilled in the art. Accordingly, the appended claims are intended to encompass all such modifications and changes as fall within the true spirit and scope of this invention.