Abstract:
An echo canceller in a system, having a long impulse response such as in an acoustic system, which employs a fast Fourier transform to transform input data represented in the time domain into signals represented in the frequency domain to reduce calculations. To solve the problem of a long delay, the impulse response length is divided into a plurality of blocks. Each block then has a decreased number of samples within each block. Thus, a fast Fourier transform and finite impulse response type digital filtering are effected, so that the processing delay is decreased while the amount of calculations is kept small.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to an echo canceller with a short processing delay and a decreased number of multiplications. 
     It is well known that the frequency domain adaptive filter (FDAF) is superior to the time domain adaptive, filter (TDAF) concerning the of computations required. This is more realizable when the filter length is increased, as in the case of the acoustic noise or acoustic echo cancelling in speech communication systems having a long impulse response. The reduction in the computation number is obtained by replacing the convolution in the time domain by multiplication in the frequency domain, using a fast Fourier transform (FFT). 
     However, to realize a linear convolution of the time domain in the frequency domain, circular convolution must be considered which requires that the FFT use overlapped-save method and a block LMS algorithm. If the length of the block data introduced each time to the system is long, then the input-output, system propagation delay will also be long. If the length of the shifted data is short, then the propagation delay will be short but the multiplication number will be increased. Note, in the FDAF, the FFT length will be too long when the acoustic impulse response is too long. The impulse response of an acoustic echo path is about several hundred millisconds. 
     Accordingly, for the above reasons, a new echo canceller having a decreased computation number and a short propagation delay is required. 
     2. Description of the Related Art 
     The prior art will be explained with reference to FIGS. 9-14. 
     An echo canceller in the time domain is, as is well known and as shown in FIG. 9, constructed by a digital filter having a finite impulse response (FIR) type having coefficients h k  which are the estimated values of an impulse response h k  of an echo path to be estimated, where k=0, 1, . . . N-1, and N is the length of the FIR digital filter. 
     Each coefficient h k  is obtained by an adaptive control in which the difference signal e(n) between an echo signal y(n) passed through the echo path to be estimated and the estimated output y(n) of the FIR filter is adaptively controlled to be zero. Known adaptive controls are, a successive adaptive control method and a block adaptive control method. In the successive adaptive control method, the coefficients h k  are adaptively updated upon each input of one sample of the input data x(n). In the block adaptive control method, the coefficients are not updated until L samples of the input data have been input, so that the coefficients are updated as a lump at one time when L samples of input data have been received. 
     In the successive adaptive control method, the necessary multiplication number for each input sample is 2N. That is, N multiplications are necessary for calculating the output signal y(n), and N multiplications are necessary for updating the coefficients, resulting in the need for 2N multiplications. 
     In the block adaptive control method, a fast Fourier transform (FFT) is introduced to effect the processing shown in FIG. 9 in the frequency domain, so that the necessary number of multiplications can be reduced. The FFT by the block adaptive control is well known and is described in, for example, &#34;Fast Implementation of LMS Adaptive Filters&#34; IEEE TRANSACTION ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOL. ASSP-28, No. 4 AUGUST 1980. 
     The basic concept thereof is as follows. The convolution expressed by: ##EQU1## can be considered, as shown in FIGS. 10B-10E, as a sum of products of the input signal x(n) (FIG. 10A) and the respective coefficients, where the coefficient series is shifted by one sample for each input signal x(n). In the figure, N represents the length of the impulse response. Until L samples after one updating , the coefficients are not updated by the adaptive control. 
     Now, consider a series of the input samples x(n) with a periodic period (N+L-1), each period including (N+L-1) samples x(n-N+1) through x(n+L-1) of the input data x(n), as shown in FIG. 11A. On the other hand, with respect to the coefficients h k , a series with a periodic period (N+L-1) is obtained by inserting (L-1) &#34;1&#34;s between the coefficients h 0  and h N-1 . Then, by shifting the coefficients series one sample by one sample, as shown in FIGS. 11B-11F, (N+L-1).series are obtained. Each sample of the input data x(n-N+1) through x(n+L-1) is multiplied to each of the (N+L-1) series of the coefficients shown in FIGS. 11B-11F. Then, the multiplied results are summed to obtain an output series z(n) having a period of (N+L-1). As is apparent from FIGS. 10A-10E and 11A-11F, the latter half L samples of the series z(n) is equal to the series y(n). 
     In another aspect, the well known cyclic convolution shown in FIGS. 11A-11F is such that the discrete Fourier transform (DFT) of the output is expressed by the products of the DFT of each input. Therefore, the above-mentioned expression (1) can be realized by a constitution shown in FIG. 12. 
     Referring to FIG. 12, ##EQU2## can be written. 
     That is, an L sample overlap part 121 receives (N-1) samples of one block of input data x(n) and L samples of the previous block of input data, to generate (N+L-1) samples of overlapped elements in which L samples of the input data are overlapped. An (N+L-1)-point FFT 122 effects a fast Fourier transform on the (N+L-1) samples with the overlapped L elements to generate (N+L-1) elements of X 0  (k), X 1  (k), X.sub.(N-1) (k), X N  (k), . . . , X.sub.(N+L-2) (k). To the outputs X 0  (k), X 1  (k), . . . , estimated cofficients H k   0 , H k   1 , . . . , H k   N+L-2  are respectively multiplied, where the estimated coefficients are updated once after introducing each block of data, as described later in more detail. The results of the multiplications are then subject to inverse fast Fourier transform (IFFT) in the (N+L-1)-point IFFT 123. The output y(n) is obtained at the outputs of an output processing part 124, by considering only the last half L elements of the outputs of the (N+L-1)-point IFFT 123, or by discarding the first (N-1) elements of the outputs of the IFFT 123. The error signal e(n) is obtained by subtracting the estimated output from the echo signal y(n) transmitted via the echo path. The adaptive control is effected so as to reduce the error signal e(n) to zero. 
     The update control of the coefficients H k   i  is as follows. 
     The equation for the update control of the coefficients is expressed as: ##EQU3## 
     The calculation of the second term in the right hand side of the above equation is effected, as shown in FIGS. 13A-13F, as follows. That is, consider a series of the input data x(n) with a period (N+L-1), and consider a series with (N+L-1) period including L samples of error data e(n), e(n+1), . . . , e(n+L-1) and (N-1) &#34;0&#34;s padded. Each element of the input data series x(n-N+1), . . . , x(n+L-1) is multiplied to the series including the error data and the &#34;0&#34;s. 
     The series with the (N+L-1) period including error data and &#34;0&#34;s is shifted one element by one element in response to an input data sample so that (N+L-1) series are obtained as..shown in FIGS. 13B-13F. Then, each element of the input data series in the (N+L-1) period is multiplied with each of the (N+L-1) series shown in FIGS. 13B-13F, and the sum of the products is obtained from this sum, the preceding N samples are output as the second term of the right-hand side, of the equation (3). 
     A theory is known in which a periodic correlation function is obtained by the product of the DFT of one input and the complex conjugate of the DFT of the other input (see, for example, &#34;Theory and Application of Digital Signal Processing&#34; written by R. Rabiner and B. Gold, published in 1975 by PRENTICE-HALL Inc., N.J., pg. 403). 
     FIG. 14 is a block diagram of a conventional echo canceller using the block LMS algorithms and including the updating portion of the coefficients utilizing the above mentioned theory. In FIG. 14, 140 is an overlap processing part; 141 is an (N+L-1)-point FFT; 142 is a complex multiplication part; 143 is an (N+L-1) point inverse FFT; 144 is an output processing part for outputting the last L samples; 145 is a zero padding part; 146 is an (N+L-1) point FFT, 147 is a complex multiplication part; 148 is an IFFT; and 149 is an FFT. 
     Assuming that the response length is N, then the overlap processing part 140 receives an input signal x(n) and makes (N+L-1) samples as one block. Then, by overlapping L samples of one block and the successive block, the overlap processing part 140 outputs (N+L-1) samples of the input data x(n). 
     The (N+L-1) point FFT 141 receives each block of the input data x(n) to carry out a Fourier transform on each received block so that the input data x(n), which is represented in the time domain, is transformed to the signals X 0  (k), X 1  (k), . . . X(N+L-2)(k), which are represented in the frequency domain. In the complex multiplication part 142, the coefficients H k   0 , H k   1 , . . . , H k   N+L-2  are respectively multiplied to the signals X 0  (k), X 1  (k), . . . , X(N+L-2) in the frequency domain. The (N+L-1) point IFFT 143 receives the results of the multiplications and transforms the signals from the frequency domain representation to the time domain representation. 
     The output processing part 144 receives the (N+L-1) samples of the time domain representation and outputs the last L samples thereof. The output signal y(n) is subtracted from the echo signal y(n), which has passed through the acoustic echo path, resulting in an error signal e(n). 
     The error signal e(n) has L samples. In the zero padding part 145, (N-1) &#34;0&#34;s are padded in the portion preceiding the L samples of the error signal e(n). The (N+L-1) point FFT 146 receives the (N+L-1) samples of the &#34;0&#34;s and error signal e(n) to transform them into signal D k   0 , K k   1 , . . . , D k .sup.(N+L-2) in the frequency domain. 
     At the complex multiplication part 147, the signals E k   0 , E k   1 , . . . , E k .sup.(N+L-2) and the complex conjugatesof the signals X 0  (k), X 1  (k), X.sub.(N+L-2) k are respectively multiplied. The multiplied results are applied to the IFFT 148 so that the signals are transformed from the frequency domain representation to the time domain representation. The preceiding N samples of the output of the IFFT 148 are supplied to the FFT 149. In addition, the FFT 149 receives (L-1) samples of &#34;0&#34;s as the last (L-1) samples of the input signal. Thus, at the output of the IFFT 149, updating parts of the tap coefficients H k   0 , H k   1 , . . . , H k .sup.(N+L-2 are obtained. The tap coefficients are once obtained are updated, or in other words refreshed, after introducing each block of the input data x(n). 
     The refreshing of the tap copefficients is further described. The tap coefficients are updated at ach input of one block. Assuming that the L samples constitute one adaption block, and assuming that k is an integer, then, as the coefficient values in the period between kL and {KL+(L-1)}, the values of which were updated at the time KL, are used. The next coefficient values at the next time (K+1) are determined in such a way that the sum of the squares of the errors during the period between KL and {KL+(L-1)} is made minimum. In this case, assuming that the evaluation number is D, then, 
     
         D=e.sub.KL.sup.2 +e.sub.KL+1.sup.2 + . . . +e.sub.KL+(L-1).sup.2( 4) can be obtained. 
    
     The error e KL+1  can be expressed as: ##EQU4## where h i  represents an impulse response of the actual system; h KL   i  represents an estimated impulse response; and X KL+l-i  represents a sample of the series of the input data. Whereas, the following equation stands. ##EQU5## Therefore, the updating of the coefficients is expressed by ##EQU6## where μ is a constant value. Expression of the equation (7) in the vector form is as follows: ##EQU7## In the algorithm utilizing an FFT, assume that: ##EQU8## Then, the output vector Y K   T  is obtained by the latter half L samples of the cyclic convolution with a periodic period equal to (N+L-1) of the vectors H K   T  and X K   T  expressed by the equations (10) and (11). The FFT of the output of the cyclic convolution is the products of the FFT of each element which is subject to convolution. Therefore, the fundamental structure of the echo canceller shown in FIG. 14 is constructed by the parts 140-144. The coefficients H K   0  -H K .sup.(N+L-2) are updated by the outputs of the FFT 149. To update the coefficients, (L-1) zeros are padded in the FFT 149 to the second term in the equation (8), which is thus changed as follows. ##EQU9## 
     It is known that the IFFT 148 and the FFT updating the coefficients can be omitted (see &#34;Unconstrained Frequency-Domain Adaptive Filter&#34; D. Mansour et al., IEEE vol ASSP-30, No. 5, October 1982). 
     In the construction shown in FIG. 14, the necessary number of multiplications for each input of one sample is expressed as follows: ##EQU10## where (N+L-1) is assumed to be an n-th power of 2. By the equation proposed by Mansour et al., this is expressed as: ##EQU11## On the other hand, by a usual adaptive control effected sample by sample in the time domain, the necessary number of multiplications is as large as 2N. 
     When L and N are nearly equal in order of magnitude, the value expressed by the equation (14) or (15) is small in comparison with the number 2N. 
     However, in an echo canceller for an acoustic system, the length of the impulse response is so long that the number N becomes several thousand or more. Whereas, the block length L should be as small as possible, because it provides, as it is, a processing delay, and in order to minimize the influence due to fluctuation of the system. If L is sufficiently small in comparison with N, the value expressed by the equation (14) or (15) becomes almost equal to or larger than 2N. 
     Also, if (N+L-1) is not an n-th power of 2, the echo canceller having the structure shown in FIG. 14 cannot operate effectively. For example, assume that N=4096 and L=50, then the FFT portion shown in FIG. 14 must be arranged to execute 8096 multiplications resulting in an increase in the processing delay. 
     SUMMARY OF THE INVENTION 
     In view of the above problems in the prior art, an object of the present invention is to provide a new echo canceller in which the number of multiplications is decreased and the processing delay is shortened. 
     To attain the above object, there is provided, according to the present invention, an echo canceller for cancelling an echo signal passed through an echo path with an impulse response N, having an input end for receiving an input digital signal series and an output end for providing an error signal. The echo canceller comprises an N&#39; sample overlap processing part 10, connected to the input end, for receiving the input digital signal series, and for outputting 2N&#39; samples of said input digital signal series with N&#39; samples being overlapped; a 2N&#39;-point fast Fourier transform part, connected to the N&#39; sample overlap processing part, for effecting a fast Fourier transform on the 2N&#39; samples output from the overlap processing part so as to output 2N&#39; points of signals expressed in the frequency domain; an FIR filtering part for dividing said impulse response N in said input digital signal series into k blocks each consisting of N&#39; samples where k and N are integers, connected to the 2N&#39;-point fast Fourier transform part, for adding the multiplied output signals of said 2N&#39;-point fast Fourier transform part; a coefficient updating part, connected to the output end, for updating the coefficient of the FIR filtering part; a 2N&#39;-point inverse fast Fourier transform part, connected to the FIR filtering part, for effecting an inverse fast Fourier transform on the output of the FIR filtering part; an output processing part, connected to the 2N&#39;-point inverse fast Fourier transform part (15), for deleting the first N&#39; samples from the outputs of the 2N&#39;-point inverse fast Fourier transform part and for outputting the last N&#39; samples as an estimated echo signal; a delay circuit, connected to the echo path, for delaying the echo signal passed through the echo path by the N&#39; samples; and a subtractor, connected to the output processing part and the delay circuit, for obtaining an error signal corresponding to the difference between the output of the delay circuit and the estimated echo signal. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram showing a general structure of an echo canceller according to an embodiment of the present invention; 
     FIG. 2 is a diagram showing a an FIR filter having a tap number 2N&#39;, for explaining the basic idea of the present invention; 
     FIG. 3 is an equivalent circuit of the FIR filter shown in FIG. 2, for explaining the basic idea of the present invention; 
     FIG. 4 is a block diagram showing an echo canceller including the FIR filter shown in FIG. 3, for explaining the basic idea of the present invention; 
     FIG. 5 is a block diagram showing an echo canceller realized by the basic idea shown in FIGS. 2 and 3, according to an embodiment of the present invention; 
     FIG. 6 is a diagram for explaining the concept of dividing the FIR filter into k blocks, according to an embodiment of the present invention; 
     FIG. 7 is a block diagram showing an echo canceller realized by the concept shown in FIG. 6, according to another embodiment of the present invention; 
     FIG. 8 is a block diagram showing an echo canceller according to still another embodiment of the present invention; 
     FIG. 9 is a diagram showing a conventional time domain echo canceller; 
     FIGS. 10A to 10E are diagrams for explaining a conventional calculation of a convolution; 
     FIGS. 11A to 11F are diagrams for explaining a conventional calculation of a cyclic convolution; 
     FIG. 12 is a block diagram showing a conventional convolution calculation control utilizing FFT; 
     FIGS. 13A to 13F are diagrams for explaining the updating of the coefficients in a block adaptive control; and 
     FIG. 14 is a block diagram showing a conventional echo canceller with FFT and block adaptive control; 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 1 illustrates a general structure of an echo canceller according to an embodiment of the present invention. In the figure, a tap number N, which is determined by the impulse response of the system to be estimated, is considered to consist of k blocks of N&#39; samples. Assuming that a frame unit consists of N/k=N&#39; samples, then, the part 10 outputs 2N&#39; samples (or 2 frames) in which N&#39; samples are overlapped in the current input and the preceding input. A first 2N&#39;-point FFT 11 receives the 2N&#39; samples from the part 10 to effect a fast Fourier transform on the 2N&#39; samples so that the signals in the time domain are converted into the signals in the frequency domain. 
     In a finite impulse response (FIR) filter 12, each of the 2N&#39; points output from the first 2N&#39;-point FFT 11 is delayed by N&#39;×P samples, where 0≦P≦k-1. The delayed 2N&#39; samples are respectively multiplied with coefficients output from an update control part 17, and the multiplied outputs are added to obtain 2N&#39; outputs of the FIR filter 12. A 2N&#39; points IFFT effects an inverse FFT on the 2N&#39; outputs from the FIR filter 12 so that the signals of 2N&#39; samples in the frequency domain are converted into signals in the time domain. An output processing part 16 deletes the first half N&#39; samples from the outputs of the 2N&#39; points IFFT 15 and outputs the last N&#39; samples. 
     The update control part 17 effects an updating process of the coefficients of the FIR filter 12. A delay circuit 18 receives an echo component y(n) passed through the echo path 19 and delays it by N&#39; samples. A subtractor 20 subtracts the output of the last N&#39; samples of the output processing part 16 from the output of the delay circuit 8 to obtain error signals. 
     Since the FIR filtering is executed on the shortened block of N&#39; samples by dividing the impulse response having the length N into k blocks, the process delay is greatly shortened while the merits of the echo canceller utilizing FFT, i.e., the small number of multiplications, are maintained. It should be noted that the estimated value y(n) is considered to be a sum of the convolution of each block and the input data x(n) when the impulse response length of the system to be estimated is N, which is divided into the blocks each having N&#39; samples. 
     The basic concept of the present invention is described with reference to FIGS. 2 to 4. 
     FIG. 2 shows an FIR filter having a tap number 2N&#39;. In the figure, 21-0 through 21-(2N&#39;-2) are delay elements, each providing one sample of delay for the input signal x(n). 22-0 through 22-(2N&#39;-1) are multipliers, each operating to multiply the input sample and an estimated value h k  of the impulse response h k  of the system to be estimated, where k=0, 1, 2, . . . , or 2N&#39;-1. The multiplied results are added by an adder 23. The added result is subtracted from the echo-signal y(n) by a subtractor 20 to obtain an error signal e(n). An adaptive control is effected to make the error signal e(n) zero. 
     The FIR filter having the tap number 2N&#39; shown in FIG. 2 can be considered to be a composite filter including a block B1 with a tap number N&#39; and a block B2 with a tap number N&#39;. Therefore, the FIR filter shown in FIG. 2 can be expressed as shown in FIG. 3. 
     In FIGS. 2 and 3, the same reference symbols represent the same parts. The left side of FIG. 3 includes the block B1, and the right side of FIG. 3 includes the block B2. The outputs of the block B1 are added by an adder 23-1, and the output of the adder 23-1 is subtracted from the echo signal y(n) by a subtractor 20-1. The input signal x(n) is delayed by N&#39; samples by delay elements 24-0 through 24-(N&#39;-1) to be inputted into the block B2. The outputs of the block B2 are added by an adder 23-2, and the output of the adder 23-2 is subtracted from the output of the subtractor 20 to provide the error signal e(n). 
     The constitution of the circuit in the right side or in the left side in FIG. 3 is substantially the same as the conventional constitution shown in FIG. 14 except for the number of samples to be processed. Accordingly, the detailed construction of the echo canceller shown in FIG. 3 can be depicted as the construction shown in FIG. 4. 
     In FIG. 4, reference symbols 31-1 and 31-2 are N&#39; overlap processing parts and 2N&#39;-point FFTs; 32-1 and 32-2 are zero padding parts for padding N&#39; zeros to the portion preceding the error signal e(n) at the output OUT; 33-1 and 33-2 are 2N&#39; point FFT processing parts for effecting FFT on the outputs of the zero padding parts 32-1 and 32-2; 34-1 and 34-2 are coefficients multiplying parts or, in other words, FIR filtering parts; 35-1 and 35-2 are 2N&#39; points inverse FFT processing parts; 36-1 and 36-2 are output processing parts for outputting the last N&#39; samples by deleting the preceding N&#39; samples; 37-1 and 37-2 are inverse FFT processing parts; and 38-1 and 38-2 are FFT processing parts The IFFT processing parts 37-1 and 37-2 and the FFT processing parts 38-1 and 38-2 operate to provide the updated coefficients H 0   i  and H 1   i . As mentioned before in the description of the prior art, the IFFT processing parts 37-1 and 37-2 and the FFT processing parts 38-1 and 38-2 for updating the coefficients can be omitted. 
     The difference between the left side circuit and the right side circuit in FIG. 4 is that the outputs of the part 31-2 are respectively delayed by one sample by delay elements 39-0, 39-1, . . . , and 39-(2N&#39;-1). This corresponds to the N&#39; samples of the delay elements shown in the right side circuit in FIG. 3. 
     FIG. 5 shows an equivalent system to the construction shown in FIG. 4 except that the IFFT processing parts 37-1 and 37-2 and the FFT parts 38-1 and 38-2 in FIG. 4 are omitted in FIG. 5 and the separate parts 31-1 and 31-2, 32-1 and 32-2, 33-1 and 33-2, 34-1 and 34-2, 35-1 and 35-2, 36-1 and 36-2 in FIG. 4 are respectively combined as unit parts 31 through 36 in FIG. 5. 
     In FIG. 5, the FIR filtering part 34 has two-divided portions as already shown in FIG. 2. In one of the two-divided portions, the 2N&#39; outputs of the N&#39; sample overlap processing part and the 2N&#39; point FFT 31 and the estimated coefficients H 0   0  through H 0 .sup. 2N&#39;-1 are multiplied to obtain these products. In another one of the two-divided portions, the above-mentioned 2N&#39; outputs are delayed by the delay elements 39-0 through 39-(2N&#39;-1). Then, the delayed outputs are multiplied to the estimated coefficients H 1   0  through H 1   2N&#39;-1  to obtain these products. The products with respect to the first output are summed by the adder 40-0. Similarly, the products with respect to the second, third, . . . , and (2N&#39;-1)th outputs are respectively summed by the corresponding adders 40-1 through 40-(2N&#39;-1). Thus, at the outputs of these adders 40-0 through 40-(2N&#39;-1), 2N&#39; outputs of the FIR filter 34 are obtained. 
     By the system construction shown in FIG. 5, the input signal having the impulse response of N samples is divided into two so that the processing is effected on each block with N&#39; samples, and the process delay is shortened to be N&#39; samples. 
     In the above-described embodiment of the present invention, the FIR filter is divided into only two for the sake of simplicity of the description. The present invention, however, is not restricted to the above embodiment, and similar considerations are possible even when the number of divisions is increased. 
     FIGS. 6A through 6F are diagrams for explaining the concept of dividing the FIR filter into k blocks. 
     As shown in FIG. 6A, the estimated impulse response h is divided into k blocks h 0 , h 1 , . . . , h k-1  , each block consisting of N&#39; samples. FIG. 6B shows the input signal x. The output of the FIR filter is the sum of the convolutions of each block h i  and the input signal x. The convolutions are shown in FIGS. 6C, 6D, 6E, 6F, . . . as the expressions h 0  *x, h 1  *x, . . . and h k-1  *x. 
     For each component h i  of the impulse response, the convolution output is delayed by ixN&#39; samples. Therefore, under the assumption that the updating period of the tap coefficients of the block LMS algorithm is N&#39; samples, the output of the FFT for i-th block must be delayed by i samples. 
     FIG. 7 is a block diagram showing an echo canceller in which an FIR filter is divided into k blocks, taking into account the considerations described with reference to FIGS. 6A through 6F, according to another embodiment of the present invention. 
     In FIG. 7, the construction is similar to the conventional one shown in FIG. 13 except that, in FIG. 7, the number of samples in one block is N&#39; and the FIR filter includes k delay elements 13 connected in series for each block. The tap coefficient between two delay elements 13 is multiplied by a multiplier 14 to the estimated coefficient H i   j , where i=0, 1, . . . , or 2N&#39;-1 and j=0, 1, . . . , or k-1. The multiplied results are summed by adders 12-0 through 12-(2N&#39;-1). Reference number 10 represents an N&#39; sample overlap processing part; 11 is a 2N&#39; point FFT processing part; 15 is a 2N&#39; point IFFT processing part; 16 is an output processing part for deleting the preceding N&#39; samples and outputting the latter half N&#39; samples; 17 is a coefficient updating part; 171 is a zero padding part for padding N&#39; zeros into the preceding half N&#39; samples of the error signal e(n); and 172 is a 2N&#39; point FFT processing part for processing the output of the zero padding part 171. 
     In FIG. 7, the constitution of the coefficient updating part 17 is simple because the IFFT 37-1 or 37-2 and the FFT 38-1 or 38-2 are omitted. 
     The operation of the echo canceller shown in FIG. 7 is as follows. 
     The input signal x(n) from the input terminal IN is processed by the N&#39; sample overlap processing part 10 so that a unit consisting of 2N&#39; samples of the input signals is output at each output timing. In the overlapping process, the latter half N&#39; samples of the current unit of 2N&#39; samples are overlapped with the preceding half N&#39; samples of the immediately previous output (see FIGS. 6B through 6F). The 2N&#39; samples output from the N&#39; sample overlap processing part 10 are received by the 2N&#39; point FFT processing part 11 and are processed by a fast Fourier transform so that the input signal expressed in the time domain is transformed into the signal expressed in the frequency domain. The complex conjugates of the 2N&#39; outputs from the 2N&#39;-point FFT processing part 11 are respectively multiplied with the error coefficients E 0  through E 2N&#39;-1  which are output from the 2N&#39;-point FFT processing part 172 in the coefficient updating part 17 at the error signal side, resulting in the updating parts of the coefficients H 0   0  through H 2N&#39;-1   0  which correspond to the block h 0 . With respect to the outputs which are delayed by one sample by the delay elements 13, the complex conjugates thereof are multiplied with the error coefficients E 0  through E 2N&#39;-1  so that the updating parts of the coefficients H 0   1  through H 2N&#39;-1   1  corresponding to the block h 1  are obtained. Similarly, the updating parts of the coefficeints H 0   i  through H 2N&#39;-1   i  corresponding to the blocks h i  (where i=2, 3, . . . , or k-1) are obtained. The coefficients obtained in such a way as above are classified into groups respectively corresponding to the outputs of the 2N&#39; point FFT processing part 11. Then, the multiplied data by the classified coefficients H 0   0   through H 0   k-1 , H 1   0  through H 1   k-1 , . . . and H 2N&#39;-1   0  through H 2N&#39;-1   1  are summed respectively by the adders 12-0 through 12-(2N&#39;`1). The adder results are input to the 2N&#39; point IFFT processing part 15 and are processed therein by an inverse fast Fourier transform. Then, in the output processing part 16, the preceding half N&#39; samples are deleted so that the last half N&#39; samples are output as the estimated echo signal y(n). By subtracting the value y(n) from the echo signal y(n) passed through the echo path, the error signal e(n) is obtained. 
     Since the impulse response is divided into a plurality of blocks, each block consisting of N&#39; samples, the delay in the N&#39; delay circuit 18 can be made as short as N&#39;. The delay N&#39; can be made smaller and smaller by increasing the number of divided blocks so that the processing delay can be reduced. 
     In the embodiment shown in FIG. 7, the coefficient updating part 17 is simplified. FIG. 8 shows an another embodiment of the present invention in which only a coefficient updating part 17a is different from the coefficient updating part 17 shown in FIG. 7. The other parts are similar to those shown in FIG. 7. 
     In FIG. 8, the coefficient updating part 17a includes the zero padding part 171, the 2N&#39;-point FFT processing part 172, multipliers 173, 174, . . . , 2N&#39;-point IFFT processing parts 175-0 through 175-(k-1), and 2N&#39;-point FFT processing parts 176-0 through 176-(k-1) 
     By the coefficient updating part 17a shown in FIG. 8, the coefficients H k   i , where k=0, 1, 2, . . . , or 2N&#39;-1, and i=0, 1, 2, . . . , or k-1, can be derived by dividing the conventional equation (3) into a plurality of blocks each consisting of N&#39; samples, as follows. ##EQU12## 
     In the equation (16), the number N&#39; in the coefficient H k ,N i , or H k+1 ,N&#39; i , denotes that each block consists of N&#39; samples. The m-th block in the above equation plus N&#39; zeros, gives the following equation (17). ##EQU13## 
     By comparing the second term in the above equation (17) with the conventional expression (13), it can be appreciated that the tap coefficients corresponding to the m-th block can be calculated by a structure similar to the conventional one shown in FIG. 14, except that the number of samples to be processed in the coefficient updating part 17a is 2N&#39; which is smaller than the number of samples processed in the conventional coefficient updating part shown in FIG. 14. That is, in the 2N&#39;-point FFT processing part 176-k shown in FIG. 8, N&#39; &#34;0&#34;s are added to the outputs of the IFFT processing part 175-0 so that the updating parts of the coefficients H i   k  (i=0, 1, 2, . . . , and 2N&#39;-1) are output. The update of these coefficients is effected in a lump each time N&#39; samples of input data are received. 
     It shouId be noted that the functions of the aforementioned parts shown in FIGS. 5 and 8 can be realized by arithmetic functions in a program controlled type processor. 
     From the foregoing description, it is apparent that, according to the present invention, the necessary numbers of multiplications corresponding to the expressions (14) and (15) are respectively: 
     
         (4k+6)log.sub.2 N&#39;+16k+12                                  (18) 
    
     
         16log.sub.2 N&#39;+8k+12                                       (19) 
    
     where k is a number of divisions; N&#39; is the block length to be adapted, and N=N&#39;×k. This value is generally much smaller than 2N even when the processing delay N&#39; is small. 
     That is, according to the present invention, a block adaptive algorithm can be realized with a smaller number of multiplications than conventionally used. Further, by selecting the value N&#39; to be a power of 2, an effective construction can be realized. That is, the construction shown in FIG. 5, FIG. 7 or FIG. 8 can be said to have a higher flexibility in comparison with the conventional construction.