Abstract:
The present general inventive concept provides a serially arranged printed circuit board including a printed circuit board body and a connector connected to the printed circuit board body configured to exchange a signal with an external device. The printed circuit board body includes a plurality of semiconductor device areas, on which a plurality of semiconductor devices is formed, and a dummy area including a plurality of conductive patterns electrically connecting the connector with the plurality of semiconductor device areas, respectively. Each of the plurality of conductive patterns is formed in two or more multiple layers.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This U.S. non-provisional patent application claims priority under 35 U.S.C. §119 of Korean Patent Application No. 10-2012-0076196, filed on Jul. 12, 2012, the entire contents of which are hereby incorporated by reference. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The present general inventive concept herein relates to semiconductor devices, and more particularly, to a serially arranged printed circuit board. 
         [0004]    2. Description of the Related Art 
         [0005]    A serially arranged printed circuit board indicates a printed circuit board on which a plurality of semiconductor devices is formed. A plurality of semiconductor devices formed on one serially arranged printed circuit board is tested at the same time. If the test is completed, the serially arranged printed circuit board is cut, and then a plurality of semiconductor devices is manufactured. 
         [0006]    If a serially arranged printed circuit board is used, the number of semiconductor devices being produced in a printed circuit board of the same area increases. Thus, the productivity of semiconductor device increases and the production cost of semiconductor device decreases. If a serially arranged printed circuit board is used, a plurality of semiconductor devices is tested at the same time. Thus, test time of semiconductor devices is reduced and the productivity of the semiconductor devices is improved. 
         [0007]    A serially arranged printed circuit board includes a connector which is supplied with various signals. Semiconductor devices formed on a serially arranged printed circuit board are tested according to a signal supplied from the connector. If the number of the semiconductor devices formed on a serially arranged printed circuit board increases, a distance between the connector and a semiconductor device farthest from the connector increases. If a distance between the connector and a semiconductor device increases, a length of a conductive pattern connecting the connector and the semiconductor device increases. If the length of conductive pattern increases, resistance of conductive pattern increases. If the resistance of conductive pattern increases, a level of power supply being supplied to the semiconductor device is reduced. The reduction of the power supply may cause a test failure. 
       SUMMARY OF THE INVENTION 
       [0008]    The present general inventive concept provides a serially arranged printed circuit board comprising multiple layer conductive patterns. 
         [0009]    Additional features and/or utilities of the present general inventive concept will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present general inventive concept 
         [0010]    The foregoing and/or other features and utilities of the present general inventive concept are achieved by providing a serially arranged printed circuit board comprising a printed circuit board body; and a connector connected to the printed circuit board body being configured to exchange a signal with an external device. The printed circuit board body includes a plurality of semiconductor device areas on which a plurality of semiconductor devices is respectively formed; and a dummy area including a plurality of conductive patterns electrically connecting the connector to the plurality of semiconductor device areas, respectively. Each of the plurality of conductive patterns is formed in two or more multiple layers. 
         [0011]    The dummy area may further include a plurality of insulating layers, wherein the two or more multiple layers are separated from each other by the plurality of insulating layers, and wherein parts of each of the plurality of conductive patterns formed in the two or more multiple layers are electrically connected to one another through plugs. 
         [0012]    Each of the plurality of conductive patterns may be a conductive pattern to which a power supply voltage is supplied. 
         [0013]    Each of the plurality of conductive patterns is formed so that a voltage drop by each of the conductive patterns is less than a reference value. 
         [0014]    The reference value may be determined according to an allowable range of the power supply voltage which a plurality of semiconductor devices formed in the plurality of semiconductor device areas supports. 
         [0015]    The foregoing and/or other features and utilities of the present general inventive concept may also be achieved by providing a serially arranged printed circuit board comprising a plurality of insulating layers forming a plurality of electrically isolated layers and comprising a first area and a second area; and a conductive pattern formed in the plurality of electrically isolated layers of the first area. Parts of the conductive pattern formed in the plurality of electrically isolated layers are electrically connected to one another through plugs penetrating the plurality of insulating layers. The conductive pattern extends from one layer among the plurality of electrically isolated layers toward the second area. 
         [0016]    The serially arranged printed circuit board may further comprise a second conductive pattern formed in the plurality of electrically isolated layers of the first area and electrically connected to the conductive pattern, wherein parts of the second conductive pattern formed in the plurality of electrically isolated layers of the first area are electrically connected to one another through plugs penetrating the plurality of insulating layers, and wherein the second conductive pattern extends from one layer among the plurality of electrically isolated layers toward the second area. 
         [0017]    The conductive pattern and the second conductive pattern may extend toward different parts of the second area respectively. 
         [0018]    The second area may comprise a plurality of semiconductor device areas on which a plurality of semiconductor devices is formed, and wherein the conductive pattern and the second conductive pattern extend toward different semiconductor device areas of the plurality of semiconductor device areas. 
         [0019]    The serially arranged printed circuit board may further comprise a connector configured to be formed on the plurality of insulating layers to be electrically connected to the conductive pattern and receive a signal from outside the serially arranged printed circuit board. 
         [0020]    The conductive pattern may be configured to receive a power supply voltage from the connector and supply the received power supply voltage to the second area. 
         [0021]    The foregoing and/or other features and utilities of the present general inventive concept are achieved by providing a serially arranged printed circuit board comprising: two or more semiconductor device areas; a connector to receive a signal from outside the serially arranged printed circuit board and respectively supply the received signal to the two or more semiconductor device areas; and two or more conductive patterns respectively connecting the connector with the two or more semiconductor device areas, each of the plurality of conductive patterns being formed in two or more layers of conductive material. 
         [0022]    The two or more layers of conductive material may be separated by at least one insulating layer. 
         [0023]    Parts of the two or more layers of conductive material may be electrically connected by a plurality of plugs. 
         [0024]    The two or more layers of conductive material may be electrically connected to the connector through a conductive component. 
         [0025]    The foregoing and/or other features and utilities of the present general inventive concept may also be achieved by providing a serially arranged printed circuit board comprising: a plurality of semiconductor device areas; a connector to receive a signal from outside the serially arranged printed circuit board and respectively supply the received signal to the plurality of semiconductor device areas; and a plurality of conductive patterns, each of the plurality of conductive patterns being formed in a plurality of layers of conductive material to respectively connect the connector with the plurality of semiconductor device areas. 
         [0026]    Each of the plurality of layers of conductive material may be separated by at least one insulating layer. 
         [0027]    Parts of each of the plurality of layers of conductive material may be electrically connected by a plurality of plugs. 
         [0028]    The plurality of layers of conductive material and the plurality of plugs together may form a mesh structure. 
         [0029]    The foregoing and/or other features and utilities of the present general inventive concept may also be achieved by providing a method of determining whether a serially arranged printed circuit board is being used, the method comprising: calculating a resistance of a detected side conductor; calculating a length of one of a plurality of conductive patterns; calculating a voltage drop of the one of the plurality of conductive patterns; determining whether the calculated voltage drop exceeds a predetermined reference level; and determining whether the one of the plurality of conductive patterns has a multiple layered structure. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0030]    These and/or other features and utilities of the present general inventive concept will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which: 
           [0031]      FIG. 1  is a perspective view illustrating a serially arranged printed circuit board in accordance with embodiments of the present general inventive concept. 
           [0032]      FIG. 2  is a top plan view illustrating a serially arranged printed circuit board in accordance with embodiments of the present general inventive concept. 
           [0033]      FIG. 3  is a cross sectional view illustrating a first example of cross section taken along the line III-III′ of  FIG. 2 . 
           [0034]      FIG. 4  is a cross sectional view illustrating a second example of cross section taken along the line III-III′ of  FIG. 2 . 
           [0035]      FIG. 5  is a perspective view illustrating a semiconductor device in accordance with embodiments of the present general inventive concept. 
           [0036]      FIG. 6  is a side view illustrating a side of the semiconductor device of  FIG. 5 . 
           [0037]      FIG. 7  is a flow chart illustrating a method of distinguishing whether a serially arranged printed circuit board is used in accordance with embodiments of the present general inventive concept. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0038]    Reference will now be made in detail to the embodiments of the present general inventive concept, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout. The embodiments are described below in order to explain the present general inventive concept while referring to the figures. 
         [0039]      FIG. 1  is a perspective view illustrating a serially arranged printed circuit board  100  in accordance with embodiments of the present general inventive concept. Referring to  FIG. 1 , the serially arranged printed circuit board  100  includes a printed circuit board body  110 , a plurality of semiconductor device areas  121  through  123 , first semiconductor packages  131  through  133 , second semiconductor packages  141  through  143 , and a connector  150 . 
         [0040]    The semiconductor device areas  121  through  123  are areas in which semiconductor devices are formed. The semiconductor devices formed in the semiconductor device areas  121  through  123  may have the same structure. 
         [0041]    The first semiconductor package  131  and the second semiconductor package  141  may be formed in the semiconductor device area  121 . The first and second semiconductor packages  131  and  141  may be connected to the printed circuit board body  110  through a ball grid array (BGA) or a pin grid array (PGA). 
         [0042]    The first semiconductor package  131  may include a logical package performing a logical operation. The second semiconductor package  141  may include a plurality of memory packages. The first semiconductor package  131  may include a memory controller and the second semiconductor package  141  may include a plurality of nonvolatile memory packages. A semiconductor device formed in the semiconductor device area  121  may be a solid state drive (SSD). However, a semiconductor device formed in the semiconductor device area  121  is not limited to the solid state drive (SSD). A semiconductor device formed in the semiconductor device area  121  may include various types of semiconductor devices manufactured on the basis of a printed circuit board. 
         [0043]    A semiconductor device may include an ultra mobile PC (UMPC), a workstation, a netbook, a personal digital assistants (PDA), a portable computer, a web tablet, a tablet computer, a wireless phone, a mobile phone, a smart phone, an e-book, a portable multimedia player (PMP), a portable game machine, a navigation device, a black box, a digital camera, a digital multimedia broadcasting (DMB) player, a three dimensional television, a smart television, a digital audio recorder, a digital audio player, a digital picture recorder, a digital picture player, a digital video recorder, a digital video player, a storage constituting a data center, a device that can transmit and receive information in a wireless environment, one of various electronic devices constituting a home network, one of various electronic devices constituting a computer network, one of various electronic devices constituting a telematics network, and one of various constituent elements constituting a radio-frequency identification (RFID) device or a computing system. 
         [0044]    The first semiconductor package  132  and the second semiconductor package  142  may be formed in the semiconductor device area  122 . The first semiconductor package  133  and the second semiconductor package  143  may be formed in the semiconductor device area  123 . The semiconductor devices formed in the semiconductor device areas  122  and  123  may have the same structure as the semiconductor devices formed in the semiconductor device area  121 . 
         [0045]    In the printed circuit board body  110 , an area that does not belong to the semiconductor device areas  121  through  123  may be a dummy area. 
         [0046]    The connector  150  may be connected to the printed circuit board body  110 . The connector  150  receives a signal from outside the serially arranged printed circuit board  100  and may supply the received signal to the semiconductor device areas  121  through  123  through conductive patterns (refer to  FIG. 2 ). The connector  150  receives a power supply voltage, a ground voltage, and various signals needed for a test and may respectively supply the received various signals to the semiconductor device areas  121  through  123 . 
         [0047]      FIG. 2  is a top plan view illustrating a serially arranged printed circuit board  100  in accordance with embodiments of the present general inventive concept. Referring to  FIGS. 1 and 2 , the serially arranged printed circuit board  100  includes a printed circuit board body  110 , a plurality of semiconductor device areas  121  through  123 , first semiconductor packages  131  through  133 , second semiconductor packages  141  through  143 , and a connector  150 . 
         [0048]    A plurality of conductive patterns  161  through  163  can respectively connect the connector  150  and the semiconductor device areas  121  through  123 . The plurality of conductive patterns  161  through  163  may be formed on a surface of the printed circuit board body  110  or inside the printed circuit board body  110 . For a brief description, regardless of locations at which the plurality of conductive patterns  161  through  163  are formed, the plurality of conductive patterns  161  through  163  is illustrated in  FIG. 2  to assist in describing the present general inventive concept. However, the plurality of conductive patterns is not limited to the locations illustrated in  FIG. 2 . 
         [0049]    The conductive pattern  161  can connect the connector  150  and the semiconductor device area  121 . The conductive pattern  162  can connect the connector  150  and the semiconductor device area  122 . The conductive pattern  163  can connect the connector  150  and the semiconductor device area  123 . The conductive patterns  161  through  163  are supplied with a power supply voltage from the connector  150  and can respectively supply the power supply voltage to semiconductor devices formed on the semiconductor device areas  121  through  123 . The conductive patterns  161  through  163  may include copper patterns, silver patterns, or a combination of copper and silver patterns. 
         [0050]    The serially arranged printed circuit board  100  supplies a power supply voltage being supplied from the connector  150  to the semiconductor device areas  121  through  123  through the conductive patterns  161  through  163 . As a distance between the connector  150  and the semiconductor device areas  121  through  123  increases, a length of the conductive pattern  161 ,  162  or  163  increases and, consequently, resistance of the conductive pattern  161 ,  162  or  163  increases. An increase of resistance may cause a voltage drop. For example, a power supply voltage being supplied to the semiconductor device area  123  farthest from the connector  150  may be lower than a range of normal operation voltage of the semiconductor device formed in the semiconductor device area  123 . 
         [0051]    A conventional serially arranged printed circuit board supplies a power supply to a semiconductor device area through a conductive pattern formed in one layer. Thus, to prevent a voltage drop of the conductive pattern, a size of the conductive pattern has to be increased. If a size of the conductive pattern increases, the number of semiconductor device areas formed in one serially arranged printed circuit board may be reduced. That is, the productivity of the serially arranged printed circuit board and the semiconductor device may be decreased. 
         [0052]    To prevent that problem, the conductive patterns  161 ,  162  and  163  of the serially arranged printed circuit board  100  in accordance with embodiments of the inventive concept are formed in a multiple layer. 
         [0053]      FIG. 3  is a cross sectional view illustrating a first example of the cross section taken along the line III-III′ of  FIG. 2 . Referring to  FIGS. 1 through 3 , the printed circuit board body  110  may include a plurality of insulating layers  111 . Conductive materials  113  are provided between the insulating layers  111   a.  The conductive materials  113  are formed on a plurality of layers divided by the plurality of insulating layers  111   a.  The conductive materials  113  are electrically connected to one another through plugs  115  penetrating the plurality of insulating layers  111   a  to form the conductive pattern  161 . The conductive materials  113  are electrically connected to the connector  150  through a conductive component  117 . 
         [0054]    One of the conductive materials  113  formed on the plurality of layers extends toward the semiconductor device area  121 . The conductive material  113  extending to the semiconductor device area  121  can supply a power supply voltage to the semiconductor device area  121 . 
         [0055]    If the conductive pattern  161  is formed on the plurality of layers, resistance of the conductive pattern  161  is reduced. If the resistance of the conductive pattern  161  is reduced, a voltage drop caused by the conductive pattern  161  may also be reduced. Thus, an error caused by a power supply voltage, supplied to the semiconductor device areas  121  through  123 , becoming lower than a normal operation range of the semiconductor devices during transmission may be prevented. 
         [0056]    The conductive pattern  161  may be formed so that a voltage drop caused by the conductive pattern  161  becomes less than a reference value. The reference value may be determined according to an allowable range of power supply voltage supported by a semiconductor device formed in the semiconductor device area  121 . 
         [0057]    If the conductive pattern  161  is formed on the plurality of layers, resistance of the conductive pattern  161  is reduced without an increase of a size of the conductive material being formed on one layer. Furthermore, if the conductive pattern  161  is formed on the plurality of layers, a size of the conductive material  113  formed on one layer may be reduced. That is, the number of semiconductor device areas  121  through  123  being formed on the printed circuit board  100  may be increased. 
         [0058]      FIG. 4  is a cross sectional view illustrating a second example of the cross section taken along the line of  FIG. 2 . If comparing  FIG. 3  with  FIG. 4 , the number of plugs  115  illustrated in  FIG. 4  is greater than the number of plugs illustrated in  FIG. 3 . That is, the number of plugs  115  connecting the conductive materials  113  being formed on the plurality of layers may be increased. If the number of plugs  115  is increased, the conductive materials  113  can form a mesh structure together with the plugs  115 . If the conductive materials  113  and the plugs  115  form a mesh structure, resistance of the conductive pattern  161  may be further reduced. 
         [0059]      FIG. 5  is a perspective view illustrating a semiconductor device  221  in accordance with embodiments of the present general inventive concept. Referring to  FIG. 5 , the semiconductor device  221  includes a printed circuit board  210 , first semiconductor packages  231 , and second semiconductor packages  241 . 
         [0060]    The semiconductor device  221  may be the first semiconductor device area  121  separated from the serially arranged printed circuit board  100  of  FIG. 1 . Separating the first semiconductor device area  121  from the serially arranged printed circuit board  100  of  FIG. 1  may result in forming the semiconductor device  221 . 
         [0061]      FIG. 6  is a side view illustrating a side of the semiconductor device  221  of  FIG. 5 . Referring to  FIGS. 5 and 6 , a side conductor  261  is formed on a side of the semiconductor device  221 . The side conductor  261  may be a result that the conductive pattern  161 , described with reference to  FIGS. 1 through 4 , is cut. If the serially arranged printed circuit board  100  is used, the side conductor  261  may exist on the side of the semiconductor device  221 . 
         [0062]      FIG. 7  is a flow chart illustrating a method of distinguishing whether a serially arranged printed circuit board  100  is used in accordance with embodiments of the present general inventive concept. Referring to  FIGS. 1 ,  6 , and  7 , in a step S 110 , it is distinguished whether the side conductor  261  is detected. In other words, in step S 110  it is distinguished whether the side conductor  261  is detected on the side of the printed circuit board  210  of the semiconductor device  221 . If the side conductor  261  is not detected, it is distinguished that the serially arranged printed circuit board  100  is not used. If the side conductor  261  is detected, a step S 120  is performed. 
         [0063]    In the step S 120 , resistance of the detected side conductor  261  is calculated. In particular, resistance per unit length of the detected side conductor  261  may be calculated according to an ingredient and a cross sectional area of the detected side conductor  261 . 
         [0064]    In a step S 130 , a length of the conductive pattern  161  is calculated. In the serially arranged printed circuit board  100 , a length of the conductive pattern  161  connecting the connector  150  and the semiconductor device area  121 , on which the semiconductor device  221  is formed, may be calculated. Considering that the semiconductor device  221  corresponds to the semiconductor device area  123  farthest from the connector  150  in the serially arranged printed circuit board  100 , a length of the conductive pattern  161  may be calculated. A length of the conductive pattern  161  may be calculated according to a size of the semiconductor device  221 , the number of the semiconductor device areas  121  through  123  formed in the one serially arranged printed circuit board  100 , and the type of the conductive pattern  161 . 
         [0065]    In a step S 140 , a voltage drop of the conductive pattern  161  is calculated. When a power supply voltage of the semiconductor device  221  is applied to one end of the conductive pattern  161 , a voltage drop occurring in the other end of the conductive pattern  161  can be calculated. The voltage drop may be calculated according to resistance per unit length of the conductive pattern  161  and a length of the conductive pattern  161 . 
         [0066]    In a step S 150 , it is distinguished whether the calculated voltage drop exceeds a reference value. If the calculated voltage drop does not exceed the reference value, it is distinguished that the one serially arranged printed circuit board  100  is not used. If the calculated voltage drop exceeds the reference value, it is distinguished that the one serially arranged printed circuit board  100  is used. Further, if the calculated voltage drop exceeds the reference value, the multiple layer pattern of the serially arranged printed circuit board  100  is identified in step S 160 . It can be distinguished whether a voltage according to the calculated voltage drop belongs to a range of normal operation voltage of the semiconductor device  221 . If the voltage according to the calculated voltage drop is beyond the range of normal operation voltage of the semiconductor device  221 , the semiconductor device  221  cannot be normally tested through the serially arranged printed circuit board  100 . Even though the semiconductor device  221  cannot be normally tested, if the semiconductor device  221  exists in product form, the conductive pattern  161  is formed in a multiple layer to reduce resistance of the conductive pattern  161  like the serially arranged printed circuit board  100  in accordance with embodiments of the inventive concept. 
         [0067]    According to the present general inventive concept, a conductive pattern connecting a connector and a semiconductor device is formed in a plurality of layers. Thus, a voltage drop due to the conductive pattern is prevented and a serially arranged printed circuit board having improved reliability is provided. 
         [0068]    Although a few embodiments of the present general inventive concept have been shown and described, it will be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the general inventive concept, the scope of which is defined in the appended claims and their equivalents.