Abstract:
The present invention provides an RF power amplifier architecture which with dynamic digital control of the amplification by incorporating digitized RF input and output signal envelope data and environmental temperature sensor(s) readings into an arbitrary control algorithm implemented on a digital processor. Via the combination of digitally controlled DC/DC converter and a D/A converter, the quiescent bias of the power FET of the RF output stage can become a realization of virtually any function of the feedback and input data.

Description:
FIELD OF THE INVENTION 
     The present invention relates to feedback control of power amplifiers, more specifically power amplifiers having digital feedback control. 
     BACKGROUND OF THE INVENTION 
     In general, feedback control is desired in electrical amplification systems. If a power amplification system is designed without the use of feedback control, the quality requirements for its components become more demanding driving the cost and production complexity up. In addition, in a fixed biased amplifier [1], where the output power stage bias depends only weakly on the instantaneous input power level, the average power amplifier efficiency may be too low due to the stage being turned on even in an absence of the input signal. A common trade off for efficiency is linearity, which is seldom an acceptable sacrifice in power amplifiers designed for use in modern communication systems. Some previously described systems use transmit keying functionality [2], which does increase the average efficiency of an amplifier but it relies on additional synchronization mechanisms external to the amplifier and additional control lines. This limits the general use of the amplifier product, since it requires the transmitter to have proper transmit keying compatibility. Other RF power amplifiers, such as the one described in [3], utilize thermal properties of components to de-couple the amplifier transfer function from the operating environment temperature dependency. However, this technique ties the response to temperature variation to that of the components used and does not allow arbitrarily flexible control functions without the circuit hardware change. 
     SUMMARY OF THE INVENTION 
     The present invention provides a new RF power amplifier architecture which with dynamic digital control of the amplification by incorporating digitized RF input and output signal envelope data and environmental temperature sensor(s) readings into an arbitrary control algorithm implemented on a digital processor. Via the combination of digitally controlled DC/DC converter and a D/A converter, the quiescent bias of the power FET of the RF output stage can become a realization of virtually any function of the feedback and input data. For example, a constant output power level can be kept for a given input power level and the Power Out vs. Power In response can be preprogrammed as an arbitrary waveform data. The architecture presented by this invention can achieve the same goal as the transmit keying technique does without the need of separate control lines since only the the input signal dynamics are used as the control assertion. The RF power amplifier can be turned off or put into a lower power idle state if there is no signal present at its input. An edge trigger is included for the envelope detector. It can be utilized in cases where either the A/D conversion rate or the algorithm processing rate cannot sustain the signal envelope dynamics. If the input signal envelope is too short, the edge trigger can command the digital processor to set some predefined bias condition before processing the feedback data thus making the system response quicker. 
     An architecture of a High Power Radio Frequency Amplifier with Dynamic Digital Control is presented. The RF input power, RF output power, RF power reflected from the load connected to the RF Output port, and circuit temperature are sampled, digitized, and then processed by a digital processor. The processor controls the Power Amplifier bias by setting the gate (via D/A Converter) and drain voltages (by controlling the DC/DC Converter) on the power FET of the output stage. This allows to obtain full dynamic control of such key parameters as gain, linearity, and amplifier efficiency and provides the possibility of dynamic reconfiguration of the amplifier to accommodate for different trade-off modes. The presence of Temperature Feedback mechanism allows for the implementation of temperature compensating algorithms. Moreover, the same hardware architecture may be used in different products with characteristics redefined by software/firmware greatly reducing the time and the cost of development. In addition, arbitrary input to output power relationship can be achieved providing greater stability and control flexibility. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a high level block diagram of the method and structure of the present invention. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     The invention is now discussed with reference to the figures. 
     The block diagram of the presented invention reflecting the architecture embodiment is illustrated in  FIG. 1 . The amplifier  1  receives RF signal at its input and provides amplified RF signal at its output. The input signal is coupled to the envelope detector  5  via a directional coupler  3 . This arrangement also helps to minimize the interference caused by impedance mismatches on the amplifier  1  input. 
     The output of the envelope detector  5  is connected to the input of the A/D (analog to digital) converter  11 . The output of the A/D converter is connected to the data input port of the digital processor  2 . 
     In addition, the output of the envelope detector  5  is connected to an edge trigger  9  which provides binary digital output at levels compatible with the digital processor  2  I/O specifications upon envelope detection. The edge trigger  9  output is connected to the input port of the digital processor  2 . 
     A temperature sensor  14  with digitized output is connected to the data input port of the digital processor  2 . The amplified RF output signal provided by the amplifier  1  is coupled via the reflectometer  4  into the envelope detector  7  and the envelope detector  8 . 
     The purpose for employing the reflectometer is to split the output RF signal into its forward going (detector  7 ) and reflected components (detector  8 ). The forward going portion of the signal can then be used in the output power feedback control while the reflected portion can be used in the reflection feedback for the voltage standing wave ratio (VSWR) magnitude computation. 
     The output of the envelope detector  7  is connected to the input of the A/D converter  12 . The output of the A/D converter  12  is connected to the digital data port of the digital processor  2 . 
     The output of the envelope detector  8  is connected to the input of the A/D converter  13 . The output of the A/D converter  13  is connected to the digital data port of the digital processor  2 . 
     The signals/data received are made available as inputs for a control algorithm implemented in the digital processor  2 , which comprises memory, a microprocessor and a control program for its operation to accomplish the objects of the invention. The digital processor  2  establishes control signals for the D/A converter  6  and DC/DC converter  10  according to the provided control algorithm. The output of the D/A converter  6  is available on the gate terminal of a power FET of the output stage while the output of the DC/DC converter  10  is available on the drain terminal of a power FET of the output stage. 
     With the realization of the presented invention into a physical electronic system, the value of the amplitude of the output RF power as a function of sampled parameters is established by the actual algorithm implemented on the digital processor  2 . However, the general functionality intended for the invented RF amplifier architecture in the following specific example: 
     The power amplifier  1  is kept in a low power mode by adjusting the D/A converter  6  output to a minimum while no RF input signal is detected by the envelope detector  5 . Upon the detection of the RF input signal by the envelope detector  5 , the bias to the power FET of the output power stage is adjusted to the minimum required to produce the appropriate amplified output RF power signal via the D/A converter  6  and the DC/DC converter  10 . The operational relationship of the output RF power and the control parameters can be expressed as follows:
 
 P   RFOUT   =P   RFIN   G ( P   RFIN   ,P   RFFWD   ,P   RFREV   ,T   ENV )δ ENV  
 
     Where P sub.RFIN.sub is the input RF power, P sub.RFFWD.sub is the forward-going RF output power, P sub.RFREV.sub is the reverse-going (reflected) output power, T sub.ENV.sub is the environment temperature. The term delta sub.ENV.sub the gating function realized by the edge trigger  9 : 
     
       
         
           
             
               δ 
               ENV 
             
             = 
             
               { 
               
                 
                   
                     
                       1 
                       , 
                       
                         envelope 
                         ⁢ 
                         
                             
                         
                         ⁢ 
                         detected 
                       
                     
                   
                 
                 
                   
                     
                       0 
                       , 
                       otherwise 
                     
                   
                 
               
               } 
             
           
         
       
     
     The algorithms implemented on the digital processor  2  define the gain function G, which need not be neither linear nor continuous. For example, a special case of a discontinuous piece-wise G can be implemented in a form of a look-up table in memory for a set of ranges of P sub.RFINO.sub. While establishing the bias control signals, the input signals/data from the temperature sensor  14  and the envelope detector  8  (VSWR) can be utilized to decrease the probability of damaging the amplifier due to overheating or power FET drain over-voltage due to high VSWR. If the value of the signal sampled by the A/D converter  13  exceeds the threshold corresponding to dangerous VSWR levels, the D/A converter  6  output shall be reduced by the digital processor  2  thus reducing the power FET gate bias level and limiting the RF signal amplification. The same shall be done if the temperature sensed by the temperature sensor  14  is at an overheat level. If a quicker control response is required by the application, a preset voltage level on the D/A converter  6  maybe enabled (turned on or activated) by a signal produced by the edge trigger  9 . 
     In a general sense, novel concepts of the present invention comprise: 
     1. An overall architectural arrangement of the invention high power RF amplifier with dynamic digital control whereby the sensing circuitry comprised of the directional coupler  3 , the reflectometer  4 , the envelope detector  5 , the envelope detector  7 , the envelope detector  8 , the edge trigger  9 , the A/D converter  11 , the A/D converter  12 , the A/D converter  13 , and the temperature sensor  14  is fed back into the digital processor  2 . 
     2. The overall architectural arrangement of the high power RF amplifier with dynamic digital control whereby the output stage bias circuitry of the amplifier comprised of the D/A converter  6  and the DC/DC converter  10  is coupled to the gate terminal and the drain terminal of the power FET, respectively, and is controlled by the digital processor  2 . 
     3. The overall architectural arrangement of the high power RF amplifier with dynamic digital control whereby an arbitrary algorithm can be implemented which defines the operational relationship of the output RF power and the control parameters according to the following equation:
 
 P   RFOUT   =P   RFIN   G ( P   RFIN   ,P   RFFWD   ,P   RFREV   ,T   ENV )δ ENV  
 
     REFERENCES 
     
         
         [1] Thomas H. Lee, “Planar Microwave Engineering”, Cambridge University Press., pp. 631-640, 2004 
         [2] Thomas W. Hull, Antonio Pagnamenta, “Radio Frequency Signal Power Amplifier”, U.S. Pat. No. 54,367,443, Jan. 4, 1983 
         [3] Yogendra K. Chawla, Leonid Reyzelman, “Linear RF Power Amplifier”, U.S. Pat. No. 5,726,603, Mar. 10, 1998 
       
    
     The above design options will sometimes present the skilled designer with considerable and wide ranges from which to choose appropriate apparatus and method modifications for the above examples. However, the objects of the present invention will still be obtained by that skilled designer applying such design options in an appropriate manner.