Abstract:
A method of forming solder mask, suitable for forming a solder mask on the surface of a wiring board, is provided. The surface of the wiring board includes a first region and a second region, and the surface of the wiring board has a wiring pattern thereon. The method includes forming a first sub solder mask in the first region on the surface of the wiring board by performing a screen-printing or a photolithographic process, and forming a second sub solder mask in the second region on the surface of the wiring board by performing an ink-jet printing process. The method not only improves the precision of the solder mask alignment on the wiring board and its reliability, but also increases the production rate and lowers the manufacturing cost.

Description:
CROSS-REFERENCE TO RELATED APPLICATION  
       [0001]     This application claims the priority benefit of Taiwan application serial no. 94138042, filed on Oct. 31, 2005. All disclosure of the Taiwan application is incorporated herein by reference.  
       BACKGROUND OF THE INVENTION  
       [0002]     1. Field of the Invention  
         [0003]     The present invention relates to a method of forming a solder mask. More particularly, the present invention relates to a method of forming a solder mask on a wiring board.  
         [0004]     2. Description of the Related Art  
         [0005]     With the rapid development of digital electronic technologies, printed wiring boards are found widely used in digital electronic products. Electronic products, such as mobile phones, computers, and digital cameras etc., are fabricated with a printed wiring board. In other words, wiring boards are used for almost all of the electronic devices. According to the fabricating method, wiring boards can be divided into two major types: a lamination method and a build-up method. In general, the lamination method is applied to produce a Printed Wiring Board (PWB) which has a lower wiring density. On the other hand, the build-up method is applied to produce a package substrate with a higher wiring density. However, with the current trend for wiring boards with higher wiring density, regardless whether it is a PWB or a package substrate, the design of the PWB and the package substrate should meet the demand of high wiring density and small line width.  
         [0006]     As described, a wiring board is to provide a support for the external electronic devices and a medium for transferring currents between them. Therefore, in the fabrication of a wiring board, wirings of the external electronic device assembling areas must be defined and a layer of high molecular weight material must cover the non-assembling areas to serve as a protection for the wiring board. The protective high molecular weight material layer is often referred to as the solder mask. Conventionally, the coating process for forming a solder mask on the wiring board includes spraying a layer of photosensitive ink on the surface of the printed wiring board; the photosensitive ink layer is exposed and developed to produce a patterned solder mask.  
         [0007]      FIG. 1A  is a top view of a conventional wiring board having a solder mask thereon.  FIG. 1B  is a cross-sectional view along line A-A′ of  FIG. 1A . The wiring board  100  shown in  FIGS. 1A and 1B  includes a base layer  110 , a wiring pattern  120  and a solder mask  130 . The base layer  110  is, for example, a single insulating layer or a plurality of patterned conductive layers and at least one insulating layer alternately stacked over each other. The wiring pattern  120  on the surface of the base layer  110  includes a plurality of pads  122  and a plurality of conductive traces  124 . The pads  122  are exposed by the openings  130   a  of the solder mask  130  and used for carrying and connecting with other external electronic devices such as capacitors or diodes. The conductive traces  124  are connected to the pads  122  for transmitting current signals. In addition, the solder mask  130  also covers the other portion of the conductive traces  124  that are not connected with external devices (the areas marked with dashed lines in  FIG. 1A ) so as to provide some protection.  
         [0008]     Using the Non-Solder Mask Defined (NSMD) pad as an example, there is a gap d 1  between the pad  122  of the wiring pattern  120  and the opening  130   a . In the process of forming the solder mask  130 , the size of the gap d 1  is mainly determined by the precision of alignment of the coating machine. In general, if the screen-printing method is used to fabricate the solder mask  130 , because of lower alignment accuracy, the gap d 1  must be larger to prevent any solder mask  130  from directly covering the pad  122  and reducing the exposed surface of the pad  122 . On the other hand, if the photolithographic process, which has higher alignment accuracy, is used to fabricate the solder mask  130 , a gap d 1  can be smaller than the one produced by the screen-printing method. Thus, the wiring density in the wiring board  100  can be increased.  
         [0009]     With the demand for a higher wiring density in the wiring board  100 , the gap d 1  in between the pad  122  and the opening  130   a  of the solder mask  130  has to be reduced so that more wiring patterns  120  can be accommodated within the same area. Therefore, photolithographic process is more frequently selected as the means for forming the solder mask  130  due to the demand for a higher precision in the alignment.  
         [0010]     With the upcoming trend for producing larger wiring boards  100 , even the photolithographic method of forming the solder mask  130 , which can produce a smaller gap d 1 , needs a plurality of trail substrates to obtain an accurate alignment due to the expansion and contraction of the wiring board. Alternatively, a glass substrate or separate exposure method is used to resolve this problem. However, the aforesaid method not only complicate the process of forming the solder mask  130 , but also considerably increases the production cost. Although an ink-jet printing process can compensate for the expansion and contraction to produce a highly aligned solder mask  130  with a relatively small gap d 1 , the need for coating a large wiring board  100  often leads to a slowdown of the fabrication process. Consequently, the increase of production cost makes the ink-jet printing technique not suitable for mass-producing wiring boards  100  with high wiring density.  
       SUMMARY OF THE INVENTION  
       [0011]     An objective of the present invention is to provide a method of forming a solder mask capable of reducing the time needed to fabricate the solder mask on a high wiring density wiring board.  
         [0012]     Another objective of the present invention is to provide a high wiring density wiring board having a solder mask that shortens the fabrication time.  
         [0013]     To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method of forming a solder mask suitable for forming a solder mask on a surface of a base layer of a wiring board. A surface of the wiring board includes a first region and a second region, and a wiring pattern is disposed on the surface of the wiring. The method includes forming a first sub solder mask in the first region on the surface of the wiring board by performing a screen-printing or a photolithographic process. Then, a second sub solder mask is formed in the second region on the surface of the wiring board by performing an ink-jet printing process.  
         [0014]     According to one preferred embodiment of the present invention, the step of forming the second sub solder mask further includes depositing in such a way that the second sub solder mask and the already formed first sub solder mask partially overlap in the junction between the first region and the second region.  
         [0015]     According to one preferred embodiment of the present invention, the step of forming the first sub solder mask further includes depositing in such a way that the first sub solder mask and the already formed second sub solder mask partially overlap in the junction between the first area and the second area.  
         [0016]     The present invention also provide a wiring board with a solder mask thereon. The wiring board comprises at least a base layer with a surface, a wiring pattern disposed on the surface of the base layer, a first sub solder mask and a second sub solder mask. The surface of the base layer includes a first region and a second region. The first sub solder mask is disposed in the first region on the surface of the base layer. The second sub solder mask and the first sub solder mask partially overlap in the junction between the first region and the second region.  
         [0017]     According to one preferred embodiment of the present invention, the wiring pattern disposed in the first region has a wiring density smaller than the wiring pattern disposed in the second region.  
         [0018]     According to one preferred embodiment of the present invention, the first sub solder mask covers the wiring pattern in the first region and the second sub solder mask exposes the wiring pattern in the second region.  
         [0019]     According to one preferred embodiment of the present invention, the first sub solder mask has a thickness greater than the second sub solder mask or the first sub solder mask has a thickness smaller than the second sub solder mask.  
         [0020]     In brief, the present invention utilizes a screen-printing or photolithographic process together with an ink-jet printing process to fabricate a solder mask on a wiring board with a shorter production time and a higher alignment precision and reliability. Hence, the method is suitable for mass-producing wiring boards with a high wiring density so that the productivity is increased and the production cost is reduced.  
         [0021]     It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0022]     The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings,  
         [0023]      FIG. 1A  is a top view of a conventional wiring board having a solder mask thereon.  
         [0024]      FIG. 1B  is a cross-sectional view along line A-A′ of  FIG. 1A .  
         [0025]      FIGS. 2A, 3A  and  4 A are top views showing a method of forming a solder mask according to the first embodiment of the present invention.  
         [0026]      FIG. 2B  is a cross-sectional view along line X-X′ of  FIG. 2A .  
         [0027]      FIG. 3B  is a cross-sectional view along line X-X′ of  FIG. 3A .  
         [0028]      FIG. 4B  is a cross-sectional view along line X-X′ of  FIG. 4A .  
         [0029]      FIG. 5  is a cross-sectional view showing the second sub solder mask in  FIG. 4A  having a thickness greater than the first sub solder mask.  
         [0030]      FIGS. 6A, 7A ,  8 A and  9 A are top views showing a method of forming a sub solder mask according to the second embodiment of the present invention.  
         [0031]      FIG. 6B  is a cross-sectional view along line Y-Y′ of  FIG. 6A .  
         [0032]      FIG. 7B  is a cross-sectional view along line Y-Y′ of  FIG. 7A .  
         [0033]      FIG. 8B  is a cross-sectional view along line Y-Y′ of  FIG. 8A .  
         [0034]      FIG. 9B  is a cross-sectional view along line Y-Y′ of  FIG. 9A .  
         [0035]      FIG. 10  is a cross-sectional view showing the second sub solder mask in  FIG. 9A  having a thickness greater than the first sub solder mask. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0036]     Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.  
       First Embodiment  
       [0037]     In the following, an embodiment is described to illustrate the process of forming a solder mask over a wiring board.  FIGS. 2A, 3A  and  4 A are top views showing a method of forming a solder mask according to a first embodiment of the present invention.  FIG. 2B  is a cross-sectional view along line X-X′ of  FIG. 2A .  FIG. 3B  is a cross-sectional view along line X-X′ of  FIG. 3A .  FIG. 4B  is a cross-sectional view along line X-X′ of  FIG. 4A . In  FIGS. 2A and 2B , the wiring board  300  includes a base layer  310  and a wiring pattern  320  disposed on a surface  310   a  of the base layer  310 . The base layer  310  is, for example, a single insulating layer or comprises a plurality of patterned conductive layers and at least an insulation layer alternately stacked over each other. The wiring pattern  320  includes a plurality of pads  322  and a plurality of conductive traces  324 . The pads  322  are used for supporting and providing a means of conduction with external electronic devices and the conductive traces  324  are used for transmitting signaling current.  
         [0038]     In  FIG. 2A , the dash lines divides the surface  310   a  of the base layer  310  into a first region A 1  and a second region A 2 . In other words, the first region A 1  and the second region A 2  on the surface  310   a  of the base layer  310  exist at a junction I marked by the dash line. In a first embodiment, the wiring density in the second region A 2  is higher with respect to the wiring density in the first region A 1 . The pads  322  in the wiring pattern  320  are located in the second region A 2  where the wiring density is higher.  
         [0039]     As shown in  FIGS. 3A and 3B , a first sub solder mask  330   a  is formed on the surface  310   a  of the base layer  310  in the first region A 1  by performing a screen-printing process, and the first sub solder mask  330   a  covers a portion of the wiring pattern  320  in the first region A 1 . Because the first region A 1  on the surface  310   a  of the wiring board  300  has a lower wiring density, a layer of ink can be coated on the first region A 1  by the screen-printing method to form the first sub solder mask  330 . At this stage, the second region A 2  on the surface  310   a  with a higher wiring density still does not have any solder mask material formed or deposited thereon.  
         [0040]     As shown in  FIGS. 4A and 4B , after forming the first sub solder mask  330   a  through a screen-printing process, an ink-jet printing method is used to form a second sub solder mask  330   b  on the surface  310   a  of the base layer  310  in the second region A 2 . Furthermore, the openings  332  in the second sub solder mask  330   b  also expose the pads  322  (portions) of the wiring pattern  320  respectively. Because the surface  310   a  in the second region A 2  has a higher wiring density, a more accurate alignment is required when forming the solder mask over the second region A 2 . Therefore, the ink-jet printing method, which has a higher precision, is used to form the second sub solder mask  330   b  over the second region A 2 . Since the ink-jet printing method of forming a solder mask over a wiring board  300  has a higher alignment precision compared with the screen-printing or the photolithographic process, the gap d 2  between the second sub solder mask  330   b  and the pad  322  of the wiring pattern  320  is smaller than the gap d 1  produced by the conventional technique (as shown in  FIGS. 1A and 1B ). Up to this stage, the steps required to fabricate a solder mask comprising a first sub solder mask  330   a  and a second sub solder mask  330   b  on the base layer  310  of the wiring board  300  is completed.  
         [0041]     It should be noted that the second sub solder mask  330   b  is formed in such a way that it partially overlap the already formed first sub solder mask  330   a  at the junction I between the first region A 1  and the second region A 2  as shown in  FIG. 4B . This ensures that there is no gap at the junction I between the first sub solder mask  330   a  in the first region A 1  and the second sub solder mask  330   b  in the second region A 2 .  
         [0042]     As shown in  FIG. 4B , the thickness of the second sub solder mask  330   b  is set to a value smaller than the thickness of the first sub solder mask  330   a . However, this embodiment by no means limits the thickness of the second sub solder mask  330   b  as such.  FIG. 5  is a cross-sectional view showing the second sub solder mask in  FIG. 4A  having a thickness greater than the first sub solder mask. As shown in  FIG. 5 , the ink-jet printing process produces a second sub solder mask  330   b  having a thickness greater than the first sub solder mask  330   a . Furthermore, the second sub solder mask  330   b  also overlaps the already formed first sub solder mask  330   a  at the junction I between the first region A 1  and the second region A 2 . This ensures that there is no gap in the junction I between the first sub solder mask  330   a  and the second sub solder mask  330   b.    
       Second Embodiment  
       [0043]     In the following, another embodiment is used to explain the process of forming a solder mask over a wiring board.  FIGS. 6A, 7A ,  8 A and  9 A are top views showing a method of forming a sub solder mask according to a second embodiment of the present invention.  FIG. 6B  is a cross-sectional view along line Y-Y′ of  FIG. 6A .  FIG. 7B  is a cross-sectional view along line Y-Y′ of  FIG. 7A .  FIG. 8B  is a cross-sectional view along line Y-Y′ of  FIG. 8A .  FIG. 9B  is a cross-sectional view along line Y-Y′ of  FIG. 9A . As shown in  FIGS. 6A and 6B , the wiring board  400  has a structure similar to the wiring board  300  in  FIG. 2A . The wiring board  400  includes a base layer  410  and a wiring pattern  420  disposed on the surface  410   a  of the base layer  410 . Since the process of patterning the base layer  410  is identical to the process used in the first embodiment, a detailed description is omitted. The wiring pattern  420  includes a plurality of pads  422  and a plurality of conductive traces  424 . In the second embodiment, the junction I indicated by dash line in  FIG. 6A  divides the surface  410   a  of the base layer  410  into a first region A 1  with a lower wiring density and a second region A 2  with a higher wiring density. The pads  422  of the wiring pattern  420  are located in the second region A 2 , which has a higher wiring density.  
         [0044]     As shown in  FIGS. 7A and 7B , a photosensitive ink layer O is globally deposited over the surface  410   a  (including both the first region A 1  and the second region A 2 ) of the base layer  410  to cover the whole wiring pattern  420 .  
         [0045]     As shown in  FIGS. 8A and 8B , after forming a photosensitive ink layer O over the surface  410   a  of the base layer  410  (as shown in  FIGS. 7A and 7B ), the photosensitive ink layer O is exposed and developed to form a first sub solder mask  430   a , which covers a portion of the wiring pattern  420  in the first region A 1 . In the second embodiment, the first sub solder mask  430   a  has a pattern profile that matches the first region A 1  and exposes the second region A 2 . Hence, after performing a photo-exposure and a development process on the photosensitive ink layer O shown in  FIGS. 7A and 7B , the first sub solder mask  430   a  shown in  FIGS. 8A and 8B  is formed.  
         [0046]     As shown in  FIGS. 9A and 9B , after forming the patterned first sub solder mask  430   a  in a photolithographic process, an ink-jet printing process is performed to form a second sub solder mask  430   b  on the surface  410   a  of the base layer  410  in the second region A 2 . The openings  432  in the second sub solder mask  430   b  expose the pads  422  (portions) of the wiring pattern  420  respectively. Similarly, as in the first embodiment, the process of forming of a solder mask over the second region A 2  demands a higher alignment precision because the wiring density on the surface  410   a  of the wiring board  400  in the second region A 2  is higher. Therefore, the ink-jet printing process, which can provide a higher alignment precision, is the appropriate method for forming the second sub solder mask  430   b  over the second region A 2 . Since the ink-jet printing process has a higher alignment precision than either the screen-printing process or the photolithographic process, the gap d 3  between the second solder mask  430   b  and the pad  422  of the wiring pattern  420  is smaller than the gap d 1  produced by the conventional technique (as shown in  FIGS. 1A and 1B ). Up to this stage, the steps required to fabricate a solder mask comprising a first sub solder mask  430   a  and a second sub solder mask  430   b  on the base layer  410  of the wiring board  400  is completed.  
         [0047]     Similarly, as in the first embodiment, the second sub solder mask  430   b  is formed in such a way that it partially overlaps the already formed first sub solder mask  430   a  at the junction I between the first region A 1  and the second region A 2  as shown in  FIG. 9B  to ensure that there is no gap at the junction I between the first sub solder mask  430   a  in the first region A 1  and the second sub solder mask  430   b  in the second region A 2 .  
         [0048]     As shown in  FIG. 9B , the thickness of the second sub solder mask  430   b  is set to a value smaller than the thickness of the first sub solder mask  430   a . However, this embodiment by no means limits the thickness of the second sub solder mask  430   b  as such.  FIG. 10  is a cross-sectional view showing the second sub solder mask in  FIG. 9A  having a thickness greater than the first sub solder mask. As shown in  FIG. 10 , the ink-jet printing process produces a second sub solder mask  430   b  having a thickness greater than the first sub solder mask  430   a . Furthermore, the second sub solder mask  430   b  also partially overlaps the already formed first sub solder mask  430   a  at the junction I between the first region A 1  and the second region A 2 .  
         [0049]     In the two aforementioned embodiments, the first sub solder mask is formed on the base layer of the wiring board before forming the second sub solder mask. Obviously, this should by no means limit the scope of the present invention. In the process of forming the solder mask, the second sub solder mask can be formed before the first sub solder mask. To ensure a tight engagement between the first sub solder mask and the second sub solder mask at the junction, the first sub solder mask is formed to overlap partially the already formed second sub solder mask at the junction between the first region and the second region. In addition, the thickness of the first sub solder mask can be greater than or smaller than the thickness of the second sub solder mask. Here, a detailed description with drawings is not repeated.  
         [0050]     In summary, the advantages of the present invention includes:  
         [0051]     1. The ink-jet printing process is used to form the solder mask over the region in the wiring board having a high wiring density. Hence, the gap between the wiring pattern of the wiring board and the solder mask is reduced. As a result, the present invention is suitable for forming a solder mask layer on a wiring board with a high wiring density to increase reliability.  
         [0052]     2. Because the screen-printing process or photolithographic process is used together with the ink-jet printing process to form solder masks on a wiring board, the present invention can increase the speed of forming a solder mask over a wiring board with a high wiring density. Ultimately, the productivity of wiring board is increased and overall production cost is reduced.  
         [0053]     It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.