Abstract:
An array substrate comprises: a substrate; and a plurality of gate lines ( 101 ) and a plurality of data lines ( 102 ), which are formed on the substrate. Two adjacent gate lines ( 101 ) and two adjacent data lines ( 102 ) intersect with each other to form a pixel region. Each pixel region comprises two pixel electrodes ( 103 ) and two thin-film transistors (TFTs). The drain electrodes of two thin-film transistors (TFTs) are respectively connected to two pixel electrodes ( 103 ), the source electrodes of two thin-film transistors (TFTs) are respectively connected to two data lines, and the gate electrodes of two thin-film transistors (TFTs) are connected to one of two gate lines.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application is based on International Application No. PCT/CN2012/084458 filed on Nov. 12, 2012, which claims priority to Chinese National Application No. 201210138048.X filed on May 4, 2012, the contents of which are incorporated herein by reference. 
     TECHNICAL FIELD 
     Embodiments of the present invention relate to an array substrate, a liquid crystal panel and a display device. 
     BACKGROUND 
     Liquid crystal displays are widely used as displays for TVs and computers due to its advantages of light weight, low irradiation and portability. 
     A liquid crystal display includes various modes such as In-Plane Switching (IPS) liquid crystal panel and Fringe-Field Switching (FFS) liquid crystal panel. A liquid crystal panel includes an array substrate, a color filter substrate and a liquid crystal layer encapsulated between the array substrate and the color filter substrate.  FIG. 1  is a structural representation of an array substrate in an IPS liquid crystal panel of prior art. As illustrated in  FIG. 1 , the array substrate in an IPS liquid crystal panel in the art of state includes a substrate (not illustrated in the figure), gate lines  101 , data lines  102 , pixel electrodes  103 , common electrodes  104 , common electrode lines  105  and thin film transistors (TFTs); and the sources and drains of the TFTs are connected with the data lines  102  and pixel electrodes  103  respectively, the gates of the TFTs are connected with the gate lines (or scan lines)  101  respectively, and the common electrodes  104  are connected with the common electrode lines  105 . Turning on or off of the TFTs is controlled by gate drivers in the liquid crystal panel. When a TFT is turned on, a data signal, which is an alternating voltage, is applied onto a pixel electrode  103  through a source driver, and a constant voltage Vcom is applied onto a common electrode  104 . The constant voltage Vcom is of a value between a high potential in a positive period and a low potential in a negative period of the alternating voltage applied onto the pixel electrode  103  to form an electric field, between the pixel electrode  103  and the common electrode  104 , that can control alignment direction of liquid crystal molecules in the liquid crystal layer. The constant voltage is generally of an intermediate value between the high potential in the positive period and the low potential in the negative period of the alternating voltage. 
       FIG. 2  is a voltage signal diagram on a pixel electrode and a common electrode in the art of state. As illustrated in  FIG. 2 , in the figure, Vg denotes a scan signal output from the gate driver, Vp denotes an actual alternating voltage on the pixel electrode  103 , Vp′ denotes an object alternating voltage applied onto the pixel electrode  103 , where ΔVp=Vp′−Vp. In the art of state, when a gate driver in the liquid crystal panel turns on the TFT connected with a pixel electrode  103 , a source driver in the liquid crystal panel applies an alternating voltage to the pixel electrode  103 , that is, charges the pixel electrode  103 . Since the TFT in the array substrate further includes some parasitic capacitance, the source driver will charge these parasitic capacitors at the same time, which will generate coupling capacitance. When the gate driver in the liquid crystal panel turns off the TFT connected with the pixel electrode  103 , the source driver stops charging the pixel electrode  103 . The gate driver causes the voltage drop (typically 30˜40V) generated when the TFT is turned off to be fed back to the pixel electrode  103  through the coupling capacitance, resulting in a voltage drop of ΔVp on the pixel electrode  103 . Since the voltage applied onto the common electrode  104  is a constant voltage, but there will be a voltage drop of ΔVp on the pixel electrode  103  both in a positive period and a negative period of the alternating voltage, the voltage value on the pixel electrode  103  become non-symmetric with respect to the constant voltage applied onto the common electrode  104 , thereby influencing the gray scale values of the displayed image, leading to image retention. Meanwhile, some charged ions remain in the liquid crystal layer during the fabrication of a liquid crystal panel, which will accumulate nearby an alignment layer under the effect of an electric field, thus when the liquid crystal panel displays the next frame image, the electric field in the liquid crystal layer will change, while the electric field generated by residuary charged ions in the liquid crystal layer cannot be rapidly changed accordingly. The electric field generated by residuary charged ions causes the liquid crystal panel to display the previous frame of image still, resulting in even severer image retention. 
     SUMMARY 
     One embodiment of the present invention provides an array substrate including: a substrate; and a plurality of gate lines and a plurality of data lines formed on the substrate, two adjacent gate lines and two adjacent data lines intersecting each other to form a pixel region, wherein each the pixel region comprises two pixel electrodes and two thin film transistors (TFTs), drains of the two thin film transistors are connected with the two pixel electrodes respectively, sources of the two thin film transistors are connected with the two data lines respectively, and gates of the two thin film transistors are connected with one of the two gate lines. 
     Another embodiment of the present invention provides a liquid crystal panel including: an array substrate, a color filter substrate and a liquid crystal layer encapsulated between the array substrate and the color filter substrate, the array substrate including: a plurality of gate lines and a plurality of data lines, two adjacent gate lines and two adjacent data lines intersecting each other to form one pixel region; source drivers connected with the data lines; and Gate drivers connected with the gate lines, wherein each the pixel region comprises two pixel electrodes and two thin film transistors (TFTs), drains of the two thin film transistors are connected with the two pixel electrodes respectively, sources of the two thin film transistors are connected with the two data lines respectively, and gates of the two thin film transistors are connected with one of the two gate lines. 
     Another embodiment of the present invention provides a display device including the above-mentioned liquid crystal panel. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       For better understanding technical proposals according to embodiments of the present invention, drawings of the embodiments will be described briefly below. Obviously, drawings in the following description only relate to some embodiments of the present invention, not to limit the present invention. 
         FIG. 1  is a structural representation of an array substrate in an IPS liquid crystal panel of the art of state; 
         FIG. 2  is a voltage signal diagram on a pixel electrode and a common electrode of the art of state; 
         FIG. 3  is a structure schematic diagram of an array substrate provided in an embodiment of the present invention; 
         FIG. 4  is a structure schematic diagram of a liquid crystal panel provided in an embodiment of the present invention; and 
         FIG. 5  is a diagram of the voltage signal applied onto the two pixel electrodes in  FIG. 4 . 
     
    
    
     DETAILED DESCRIPTION 
     In order to make the purpose, technology solution and advantages of embodiments of the present invention more clear, technology solutions according to embodiments of the present invention will be described clearly and completely below with respect to drawings of embodiments of the present invention. It is to be understood that the described embodiments are part of but not all of embodiments of the present invention. Based on the described embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without any creative labor fall into the protecting scope of the present invention. 
     The embodiments of the present invention provide an array substrate, a liquid crystal panel and a display device to address the image retention problem that tends to occur when the liquid crystal panel in the art of state is displaying images. In order for one skilled in the art to better understand the technical proposal provided in the embodiments of the present invention, the array substrate, the liquid crystal panel and the display device provided in the embodiments of the present invention will be described in detail with reference to the accompanying drawings. 
       FIG. 3  is a structure schematic diagram of an array substrate provided in an embodiment of the present invention. As illustrated in  FIG. 3 , the array substrate in this embodiment includes a substrate (not shown) and gate drivers (not shown), source drivers (not shown), M gate lines  101 , N data lines  102 , and TFTs formed on the substrate; a gate driver is connected with a gate line  101 , a source driver is connected with a data line  102 , the gate driver outputs scan signals to the gate line  101 , and the source driver outputs data signals to the data line  102 . Adjacent two gate lines and adjacent two data lines intersect each other to form a pixel region, and M gate lines  101  and N data lines  102  intersect each other to form (M−1)×(N−1) pixel regions. Each pixel region includes two pixel electrodes  103  and two TFTs. Drains of the two TFTs are connected with two pixel electrodes  103  respectively, sources of the two TFTs are connected with adjacent two data lines  102  respectively, and two gates of the two TFTs are connected with one of two adjacent gate lines  101 , namely, connected with same one gate line  101 . 
     In this embodiment, in one pixel region, when the gate driver outputs a scan signal to the gate line  101  to turn on the two TFTs, the source driver will apply an alternating voltage to two adjacent data lines  102  of the pixel region respectively, causing the alternating voltages on the two adjacent data lines  102  to be in a positive period and a negative period respectively and accordingly the alternating voltages on the two pixel electrodes  103  in the pixel region to be also in a positive period and in a negative period respectively, thereby generating an electric field between the two pixel electrodes  103 . 
     In an embodiment of the present invention, the pixel electrode  103  may be designed into a comb-tooth shape, and the two comb-tooth shaped pixel electrodes in one pixel region are disposed in an interleaving manner to enhance the strength of electric field between pixel electrodes  103 . However, embodiments of the present invention are not limited thereto. 
     In an embodiment of the present invention, the pixel electrode  103  is generally formed of a transparent conductor material such as indium tin oxide or indium zinc oxide. 
       FIG. 4  is a structure schematic diagram of a liquid crystal panel provided in an embodiment of the present invention; and  FIG. 5  is a diagram of the voltage signal applied onto the two pixel electrodes in  FIG. 4 . As illustrated in  FIG. 4 , the liquid crystal panel of the present embodiment may include an array substrate  10 , a color filter substrate  20  and a liquid crystal layer  30  encapsulated between the array substrate  10  and the color filter substrate  20 . The data lines on the array substrate  10  are connected with source drivers to receive data signals, and the gate lines on the array substrate  20  are connected with gate drivers to receive scanning signals. For the convenience of explanation, the structure illustrated in  FIG. 3  may be used for the array substrate  10  in the liquid crystal panel of the present embodiment; however embodiments of the present invention are not limited thereto. The data signals illustrated in  FIG. 5  are applied on the two pixel electrodes  103  in one pixel region respectively. When the gate driver outputs scan signal to the gate line  101  to turn on the two TFTs in one pixel region, the source driver applies data signals with opposite polarities to the two pixel electrodes  103 , namely the two adjacent pixel electrodes  103 , in one pixel region through the two adjacent data lines  102 ; the data signals with opposite polarities are alternating voltages in a positive period and a negative period respectively. The time sequences of the alternating voltages on the two adjacent pixel electrodes  103  are controlled to make alternating voltages on the two adjacent pixel electrodes  103  be in a positive period and a negative period respectively. Since the alternating voltages on the two pixel electrodes  103  in one pixel region are in a positive period and a negative period respectively, a horizontal electric field is formed due to the voltage difference between the two pixel electrodes  103 , and it can control alignment directions of liquid crystal molecules in the liquid crystal layer  30 . 
     In the embodiments of the present invention, the voltage difference between two pixel electrodes  103  in one pixel region is the difference between the high voltage in the positive period and the low voltage in the negative period of the alternating voltage. In the art of state, the constant voltage applied on the common electrode is generally an intermediate value between the high voltage in a positive period and the low voltage in a negative period of the alternating voltage applied onto the pixel electrode, and the voltage difference between the pixel electrode and the common electrode is about a half of the difference between the high voltage and the low voltage of the alternating voltage. Therefore, in order to obtain same strength of electric field in the liquid crystal layer, in the embodiments of the present invention, the difference between the high voltage and the low voltage of the alternating voltage applied on the two pixel electrodes  103  is about a half of the difference between the high voltage and the low voltage of the alternating voltage applied onto the pixel electrode in the art of state, which reduces the difference between the high voltage and the low voltage of the alternating voltage output by the source driver and saves energy consumption. 
     When the scan signal output by the gate drive circuit turn off the TFTs, the source driver stops applying data signals with opposite polarities to the two pixel electrodes  103 , and when the gate driver turns off the TFTs, coupling capacitances generated by the two TFTs are fed back to the two pixel electrodes  103  in one pixel region respectively, causing both pixel electrodes  103  (alternating voltages thereof are in a positive period and a negative period respectively) to generate a voltage drop of ΔVp. As illustrated in  FIG. 5 , Vg denotes the scan signal applied onto a gate line, Vp 1  and Vp 2  denote the actual alternating voltages applied onto the two pixel electrodes  103  in one pixel region respectively, Vp 1 ′ and Vp 2 ′ denote the object alternating voltages applied on the pixel electrodes  103  respectively, wherein ΔVp=Vp 1 ′−Vp 1 =Vp 2 ′−Vp 2 . Since both pixel electrodes  103  generate the voltage drop of ΔVp at the same time, self-compensation is realized, which ensures the balance and stabilization of the voltage difference between the two pixel electrodes  103 , thereby effectively alleviating image retention of the displayed image. 
     In embodiments of the present invention, a horizontal electric field is formed between two pixel electrodes in one pixel region when data signals with opposite polarities are applied onto the two pixel electrodes; when the gate driver turns off the TFTs, the coupling capacitances generated by the two TFTs are fed back to the two pixel electrodes respectively to cause both pixel electrodes to generate a voltage drop of ΔVp, hence realizing self-compensation, which ensures the balance and stabilization of the voltage difference between the two pixel electrodes, and thus effectively alleviates image retention of display, and saves energy consumption by reducing the alternating voltage applied onto the pixel electrodes at the same time. 
     An embodiment of the present invention further provides a display device including the above-mentioned liquid crystal panel. The structure as illustrated in  FIG. 4  may be used for the liquid crystal panel in the present embodiment. In the embodiments of the present invention, a horizontal electric field is formed between the two pixel electrodes by having the alternating voltages on the two pixel electrodes to be in a positive period and a negative period respectively; when the gate driver turns off the TFTs, both pixel electrodes generate voltage drops of ΔVp to realize self-compensation, which ensures the balance and stabilization of the voltage difference between the two pixel electrodes, and thus effectively alleviates image retention of display, and saves energy consumption by reducing the alternating voltages applied onto the pixel electrodes at the same time. 
     The above embodiments are only for the purpose of describing technical proposal of the present invention rather than limiting it. While the present invention has been described in detail with reference to the above-mentioned embodiments, those of ordinary skill in the art should understand that they can modify the technical solution recorded in the above embodiments or conduct equivalent substitution for a part of technical features thereof and these modifications or substitutions will not make the nature of respective technical solution to depart from the spirit and scope of technical solutions of embodiments of the present invention.