Abstract:
A switching power supply exhibits high conversion efficiency and facilitates reducing the size thereof. The switching power supply includes a half-bridge circuit including a first series circuit formed of switching devices Q 1  and Q 2  and connected between the output terminals of a DC power supply; and a second series circuit connecting primary inductance Lr 1  of transformer T 1 , primary inductance Lr 2  of transformer T 2  and capacitor Cr in series. The second series circuit is connected between the output terminals of the half-bridge circuit, and is made to conduct a series resonance operation. The switching devices Q 1  and Q 2  is controlled at the ON-duties of 0.5 for reducing the breakdown voltages of rectifying diodes D 1  and D 2  on the secondary side of transformers T 1  and T 2  and for improving the conversion efficiency of the switching device.

Description:
BACKGROUND OF THE INVENTION AND RELATED ART STATEMENT 
     The present invention relates to a switching power supply. Specifically, the invention relates to an isolation type DC-DC converter that obtains a DC output insulated from a commercial AC power supply. 
     A DC output isolated from a commercial AC power supply is obtained usually with an isolation type DC-DC converter from an intermediate DC voltage obtained by rectifying and smoothing an AC voltage. In a power supply, to which the specifications on the higher harmonic of an input current are applied, an intermediate DC voltage is obtained from an AC power supply via a boost chopper circuit. 
     It has been required for the switching power supply apparatuses to exhibit a high efficiency, to cause less noises, to be small in size, to be manufactured with low manufacturing costs, and to be very reliable. For meeting the demands described above, various circuit configurations have been proposed. 
       FIG. 5  is a block circuit diagram of a conventional switching power supply. The conventional switching power supply has a circuit configuration almost similar to the circuit configurations of the isolation type DC-DC converters described in the following Patent Documents 1 and 2. 
     Now the operations of the DC-DC converter shown in  FIG. 5  will be described below with reference to the wave chart described in  FIG. 6 . 
     Feedback circuit FB 1  shown in  FIG. 5  amplifies the error caused between an output voltage V o  and the set value (reference value) of the output voltage. Control circuit Cont 1  turns ON and OFF MOSFETs Q 1  and Q 2  alternately at a preset fixed frequency fs (=1/T) during a period excluding dead times Td 1  and Td 2  set for MOSFETs Q 1  and Q 2  respectively. At the same time, control circuit Cont  1  controls the output voltage V o  at a constant value by means of controlling the ON-duties of MOSFETs Q 1  and Q 2  in response to an output signal (feedback signal) VFB fed from feedback circuit FB 1 . 
     Transformers T 1  and T 2  are represented by the respective equivalent circuits including exciting inductance Lm 1  and exciting inductance Lm 2 , leakage inductance Lr 1  and leakage inductance Lr 2 , primary windings Np 1  and Np 2 , and secondary windings Ns 1  and Ns 2 , respectively. 
     Capacitor Cr cuts the DC component of the currents which flow through the primary windings of transformers T 1  and T 2  to prevent DC magnetization from causing. 
     Inductance element L z  resonates partially with capacitor C s , when MOSFETs Q 1  and Q 2  conduct switching, to make MOSFETs Q 1  and Q 2  perform zero-voltage switching. Inductance element L z  may be omitted by employing leakage inductance Lr 1  of transformer T 1  and leakage inductance Lr 2  of transformer T 2  in substitution for inductance element L z . In the following descriptions, inductance element L z  is omitted. Capacitor C s  may be omitted by employing the parasitic capacitance of MOSFETs Q 1  and Q 2  in substitution for capacitor C s . 
     By setting the resonance frequency of the series circuit consisting of primary inductance (Lm 1  and Lr 1 ) of transformer T 1 , primary inductance (Lm 2  and Lr 2 ) of transformer T 2 , and capacitor C r  to be much lower than the switching frequency fs, currents IQ 1  and IQ 2  flowing through MOSFETs Q 1  and Q 2  are made to rise linearly. 
     In a period (t 0 &lt;t&lt;t 3 ), for which MOSFET Q 1  is ON, energy is fed from a DC power supply to the load side via transformer T 1 . In this period, transformer T 2  works for a choke coil. In a period (t 3 &lt;t&lt;t 0 ), for which MOSFET Q 2  is ON, energy is fed from capacitor C r  to the load side via transformer T 2 . In this period, transformer T 1  works for a choke coil. 
     Rectifying diode D 1  becomes conductive as MOSFET Q 2  shifts from the ON-state thereof to the OFF-state thereof at a time t 0  and current ID 1  increases at a gradient of V o /(Lr 1 +Lr 2 ). Current ID 2  that flows through rectifying diode D 2  decreases at a gradient of −V o /(Lr 1 +Lr 2 ) as MOSFET Q 2  shifts from the ON-state thereof to the OFF-state thereof. As current ID 2  becomes zero at a time t 2 , rectifying diode D 2  shifts to the OFF-state thereof. As MOSFET Q 1  shifts from the ON-state thereof to the OFF-state thereof at the time t 3 , current ID 1  decreases at the gradient of −V o /(Lr 1 +Lr 2 ). As current ID 1  becomes zero at a time t 5 , rectifying diode D 1  shifts to the OFF-state thereof. Current ID 2  that flows through rectifying diode D 2  increases at the gradient of V o /(Lr 1 +Lr 2 ). 
       FIG. 8  is a block circuit diagram of another conventional switching power supply. The conventional switching power supply shown in  FIG. 8  has a circuit configuration almost similar to the circuit configuration of the isolation type DC-DC converter described in the following Patent Document 3. 
     Now the operations of the DC-DC converter shown in  FIG. 8  will be described below with reference to the wave chart described in  FIG. 9 . 
     Control circuit Cont 1  turns ON and OFF MOSFETs Q 1  and Q 2  alternately at an ON-duty of 0.5 during a period excluding dead times Td 1  and Td 2  set for MOSFETs Q 1  and Q 2  respectively. At the same time, control circuit Cont 1  controls the switching frequency fs of MOSFETs Q 1  and Q 2  in response to the output signal VFB fed from feedback circuit FB 1 . Thus, control circuit Cont 1  controls the output voltage V o  at a constant value. 
     In  FIG. 8 , transformer T 3  is represented by an equivalent circuit including exciting inductance Lm 1 , leakage inductance Lr, primary winding Np 1 , and secondary windings Ns 1  and Ns 2 . 
     Capacitor Cr cuts the DC component of the current which flows through the primary winding of transformer T 1  to prevent DC magnetization from causing. Capacitor Cr constitutes a resonance circuit together with exciting inductance Lm of transformer T 1 , leakage inductance Lr of transformer T 1  and inductance element Lz. 
     Inductance element L z  resonates partially with capacitor C s , when MOSFETs Q 1  and Q 2  conduct switching, to make MOSFETs Q 1  and Q 2  perform zero-voltage switching. Inductance element L z  may be omitted by employing leakage inductance Lr of transformer T 1  in substitution for inductance element L z . From the following descriptions, inductance element L z  is omitted. Capacitor C s  may be omitted by employing the parasitic capacitance of MOSFETs Q 1  and Q 2  in substitution for capacitor C s . 
     As MOSFET Q 1  shifts to the ON-state thereof, leakage inductance Lr and resonance capacitor Cs resonate, shaping currents IQ 1  and ID 1  with sinusoidal waveforms, respectively. As current ID 1  becomes zero at the time t 3 , diode D 1  becomes OFF and primary inductance (Lm and Lr) of transformer T 1  and capacitor Cr resonate, making a current having a sinusoidal waveform, the frequency of which is low, flow through MOSFET Q 1 . 
     Patent Document 1: Japanese Unexamined Patent Application Publication No. Hei. 8 (1996)-228486 ( FIG. 1 ). 
     Patent Document 2: Japanese Unexamined Patent Application Publication No. 2007-74830 ( FIGS. 7 and 8 ) corresponding to U.S. Patent Application Publication No. US 2007/0053210 A1. 
     Patent Document 3: Japanese Patent No. 2734296 ( FIG. 1 ) 
     According to the Patent Document 2, the output voltage V o  from the circuit shown in  FIG. 5  is described by the following equation (1) that includes a DC power supply voltage Vin, an ON-duty D and a winding ratio n (=Np 1 /Ns 1 =Np 2 /Ns 2 ) in transformers T 1  and T 2 .
 
 V   o   =D ·(1 −D )·Vin/ n   (1)
 
     The equation (1) indicates that the output voltage V o  is controlled by controlling the ON-duty D. 
     Now a voltage conversion rate M is defined that M=2n·V o /Vin. Then, the voltage conversion rate M is described by the following equation (2).
 
 M= 2 D ·(1 −D )  (2)
 
     As described in  FIG. 7 , the voltage conversion rate M shows the maximum at the ON-duty D of 0.5. Since the output voltage V o  of a general forward converter is described by the following equation (3) according to the Patent Document 2, the winding ratio n of the transformers can be made to be small. As a result, the leakage inductance can be reduced, the high-frequency characteristics can be improved, and the transformers can be made to be small in size.
 
 V   o=D·Vin/   n   (3)
 
     However, when the winding ratio n is smaller, a higher reverse voltage is applied to diodes D 1  and D 2 . Therefore, it is necessary to prepare diodes exhibiting a higher breakdown voltage, when the winding ratio n is small. Since the forward voltage drop across a diode becomes larger as the breakdown voltage of the diode becomes higher, more losses are caused in the diode, lowering the conversion efficiency of the switching power supply. 
     The Patent Document 3 defines the period, for which currents flow through diodes D 1  and D 2  in the circuit shown in  FIG. 8 , as an “electric-power transfer period” and the period, for which any current does not flow through diodes D 1  and D 2  in the circuit shown in  FIG. 8 , as an “electric-power interruption period”. The circuit shown in  FIG. 8  adjusts the ratio of the electric-power transfer period and the electric-power interruption period to control the output voltage V o  at a constant value. 
     Even when the load becomes heavy in the case described above, there certainly exists a period, for which the value of a synthesized current, obtained by rectifying and synthesizing the currents flowing through diodes D 1  and D 2 , is zero. During the period described above, the effective values of the currents flowing through the transformer secondary windings and the diodes increase, lowering the conversion efficiency. Since the effective current value of smoothing capacitor C o  is also large, it is necessary for smoothing capacitor C o  to be large. Large smoothing capacitor C o  is hazardous for reducing the size of the switching power supply. 
     Now another problem of the conventional switching power supply will be described below. 
     The voltage conversion rate M of the circuit shown in FIG.  8  shows characteristic changes as described in  FIG. 10 . 
     In  FIG. 10 , the vertical axis represents the normalized frequency F that is the ratio of the switching frequency Fs and the resonance frequency Fr of leakage inductance Lr and capacitor Cr. If described by an equation, F=Fs/Fr. The voltage conversion rate M exhibits dependencies on the load resistance R o  in the operation region, in which M is larger than 1 and F is smaller than 1 (M&gt;1, F&lt;1). Especially, the frequency, at which the voltage conversion rate M shows the maximum, changes depending on the load. At the normalized frequency F of 1, the switching frequency Fs and the resonance frequency Fr coincide with each other. At the normalized frequency F of 1, the period between t 3  and t 4  in  FIG. 9  does not exist. At the normalized frequency F of less than 1, a resonance current due to primary inductance (Lm and Lr) of transformer T 1  and capacitor Cr flows during the periods t 3 &lt;t&lt;t 4  and t 7 &lt;t&lt;t 0 . 
     As the switching frequency exceeds the frequency, at which the voltage conversion rate M shows the maximum, to the lower side, the switching power supply shown in  FIG. 8  operates as indicated by the waveforms described in  FIG. 11 . Usually, the state is called current leading mode. 
     As the resonance current turns from positive to negative during the ON-period of MOSFET Q 1  for example, current flows through the body diode of MOSFET Q 1 . Even if MOSFET Q 1  is turned off, the current will keep flowing through the body diode of MOSFET Q 1 . As MOSFET Q 2  is turned on, the body diode of MOSFET Q 1  conducts reverse recovery, making a large through current flow. If this state continues, MOSFET Q 1  will be broken down by the heat generated therein, since the reverse recovery losses caused by the body diode of MOSFET Q 1  are large. 
     For preventing the current leading mode from causing, it is effective to make control circuit Cont 1  limit the normalized frequency F to be lower than Fmin. However, the point, at which the voltage conversion rate M shows the maximum, changes greatly depending on the load as described in  FIG. 10 . Therefore, it is very difficult to set the frequency Fmin, at which off-resonance is prevented from causing under all the unfavorable conditions including sudden change of the DC power supply voltage, sudden change caused in the load, and overload. 
     The present invention has been made to obviate the above problems in the conventional switching power supply. 
     Further objects and advantages of the invention will be apparent from the following description of the invention. 
     SUMMARY OF THE INVENTION 
     According to a first aspect of the invention, there is provided a switching power supply for obviating the problems described above, the switching power supply comprising: 
     a DC power supply; 
     a first series circuit connected in parallel to the DC power supply, the first series circuit including a first switching circuit and a second switching circuit connected in series to each other; 
     the first switching circuit including a first parallel circuit, the first parallel circuit including a first switching device, a first diode, and a first capacitor; 
     the second switching circuit including a second parallel circuit, the second parallel circuit including a second switching device, a second diode, and a second capacitor; and 
     a second series circuit including an inductance element, a primary winding of a first transformer, a primary winding of a second transformer, and a capacitor, the second series circuit being connected in parallel to any of the first and second switching circuits; 
     wherein the switching power supply rectifies and smoothes a voltage generated across a secondary winding of the first transformer and a voltage generated across a secondary winding of the second transformer for obtaining a DC output; and 
     the switching power supply turns on and off the first switching device and the second switching device alternately at a switching frequency higher than a series resonance frequency determined by the sum of the inductance value of the inductance element, the inductance value of the first transformer and the inductance value of the second transformer, and the capacitance value of the capacitor. 
     According to a second aspect of the invention, the switching power supply includes a control circuit that sets the ON-duties of the first and second switching devices at 0.5 and adjusts the switching frequency for controlling the voltage of the DC output at a constant value. 
     According to a third aspect of the invention, the primary inductance value of the first transformer and the primary inductance value of the second transformer are almost equal to each other; and 
     the winding ratio of the first transformer and the winding ratio of the second transformer are equal to each other. 
     According to a fourth aspect of the invention, the switching power supply includes a control circuit, which controls a minimum value of the switching frequency to be higher than the series resonance frequency determined by the sum of the inductance value of the inductance element, the inductance value of the first transformer and the inductance value of the second transformer, and the static capacitance value of the capacitor. 
     According to a fifth aspect of the invention, the winding ratio n of the primary winding and the secondary winding in the first and second transformers is set to be described by the following relational expression,
 
 n &gt;Vin (max)/(4 V   o ),
 
     wherein Vin (max) is a maximum input voltage from the DC power supply and V o  is the voltage of the DC output. 
     According to a sixth aspect of the invention, the switching power supply includes a control circuit, which controls a switching frequency in response to a feedback signal for controlling the voltage of the DC output, fixes the switching frequency in response to the feedback signal exceeding a value corresponding to the upper limit value of the switching frequency to the lower side, and changes the ON-duties of the first and second switching devices variably for controlling the voltage of the DC output. 
     According to a seventh aspect of the invention, the winding ratio n of the primary and secondary windings in the first and second transformers is set to be described by the following relational expression,
 
 n &lt;Vin (max)/(4 V   o ),
 
     wherein Vin (max) is a maximum input voltage from the DC power supply and V o  is the voltage of the DC output; and 
     the switching power supply includes a control circuit, which controls a switching frequency in response to a feedback signal for controlling the voltage of the DC output, fixes the switching frequency in response to the feedback signal exceeding a value corresponding to the upper limit value of the switching frequency to the lower side, and changes the ON-duties of the first and second switching devices variably, by which to control the voltage of the DC output. 
     According to the first through fourth aspects of the invention, the output voltage is controlled at a constant value without setting the winding ratios of the transformers to be small. Therefore, diodes exhibiting a low breakdown voltage may be used with no problem and the conversion efficiency is improved. 
     According to the fifth aspect of the invention, the minimum frequency set for preventing current leading mode from causing is set easily and the reliability of the switching power supply is improved. 
     According to the sixth aspect of the invention, the switching frequency is prevented from rising under a light load, the exciting current of the transformer is suppressed at a low value, and the conversion efficiency is improved independently of the load weight. 
     According to the seventh aspect of the invention, the magnetic flux amplitude under a heavy load is suppressed to be small and the core losses are reduced. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a block circuit diagram of a switching power supply according to the invention. 
         FIG. 2  is a wave chart describing the operations of the circuit shown in  FIG. 1 . 
         FIG. 3  is a graph relating the voltage conversion rate M of the circuit shown in  FIG. 1  and the normalized frequency F with each other with load weights as parameters. 
         FIG. 4  is a diagram describing the characteristic control performances of the switching power supply according to the invention. 
         FIG. 5  is a block circuit diagram of a conventional switching power supply. 
         FIG. 6  is a wave chart describing the operations of the circuit shown in  FIG. 5 . 
         FIG. 7  is a curve relating to the voltage conversion rate M with the ON-duty D. 
         FIG. 8  is a block circuit diagram of another conventional switching power supply. 
         FIG. 9  is a wave chart describing the operations of the circuit shown in  FIG. 8 . 
         FIG. 10  is a graph relating to the voltage conversion rate M of the circuit shown in  FIG. 8  and the normalized frequency F with each other with load weights as parameters. 
         FIG. 11  is a wave chart describing the waveforms for explaining the problems of the circuit shown in  FIG. 8 . 
     
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
     Now the invention will be described in detail hereinafter with reference to the accompanied drawings which illustrate the preferred embodiments of the invention. 
       FIG. 1  is a block circuit diagram of a switching power supply according to a first embodiment of the invention. (The first aspect of the invention) 
     The switching power supply shown in  FIG. 1  is different from the switching power supply shown in  FIG. 5  in that a series resonance circuit is configured by the inductance components of transformers T 1  and T 2 , inductance element L z  and capacitor Cr, and control circuit Cont 1  conducts frequency control at the ON-duty set at 0.5 in the switching power supply shown in  FIG. 1 . Although the circuit configuration shown in  FIG. 1  is the same as the circuit configuration shown in  FIG. 5 , any series resonance circuit is not formed in  FIG. 5 . Although there exists parasitic capacitance and internal inductance in parallel to MOSFETs Q 1  and Q 2  in  FIG. 1  as well as in  FIG. 5 , the parasitic capacitance and the internal inductance are not illustrated in  FIGS. 1 and 5 . 
     Now the operations of the switching power supply shown in  FIG. 1  will be described below with reference to the wave chart shown in  FIG. 2 . 
     Inductance element L z  resonates partially with capacitor C s , when MOSFETs Q 1  and Q 2  conduct switching, to make MOSFETs Q 1  and Q 2  perform zero-voltage switching. Inductance element L z  may be omitted by employing leakage inductance Lr 1  of transformer T 1  and leakage inductance Lr 2  of transformer T 2  in substitution for inductance element L z . In the following descriptions, inductance element L z  is omitted. Capacitor C s  may be omitted by employing the parasitic capacitance of MOSFETs Q 1  and Q 2  in substitution for capacitor C s . 
     The primary inductance of transformer T 1  and the primary inductance of transformer T 2  are set to be almost the same. The winding ratio in transformer T 1  and the winding ratio in transformer T 2  are set to be the same. The ON-duty of MOSFETs Q 1  and Q 2  is set at 0.5. Due to the settings described above, the waveform of current IQ 1  and the waveform of current IQ 2  are symmetrical with each other and the waveform of current ID 1  and the waveform of current ID 2  are symmetrical with each other. Therefore, the heat quantity generated by the losses caused in MOSFET Q 1  and the heat quantity generated by the losses caused in MOSFET Q 2  are equal to each other. The heat quantity generated by the losses caused in diode D 1  and the heat quantity generated by the losses caused in diode D 2  are equal to each other. 
     MOSFETs Q 1  and Q 2  and diodes D 1  and D 2  are thermally coupled to the respective common heat sinks and cooled thereby. The cooling capability of the heat sink is determined considering the calorific value of MOSFET Q 1  or Q 2  (diode D 1  or D 2 ), that generates more heat. If an imbalance exists between the calorific values of MOSFETs Q 1  and Q 2  (diodes D 1  and D 2 ), a larger heat sink will be selected to meet the requirement of the element that generates more heat. 
     As described above, the heat quantity caused by the losses of MOSFET Q 1  and the heat quantity caused by the losses of MOSFET Q 2  are equal to each other, and heat quantity caused by the losses of diode D 1  and the heat quantity caused by the losses of diode D 2  are equal to each other according to the invention. Therefore, it is not necessary to use an excessively large heat sink according to the invention. As a result, it is possible to prevent the heat sink for cooling MOSFETs Q 1  and Q 2  and the heat sink for cooling diodes D 1  and D 2  from increasing the sizes thereof. (The second and third aspects of the invention) 
     Here, it is assumed that the primary inductance of transformer T 1  and the primary inductance of transformer T 2  are the same Lp and that the leakage inductance value is small enough to be negligible as compared with the primary inductance value Lp. Then, the voltage conversion rate M of the circuit shown in  FIG. 1  depends on the normalized frequency F as described in  FIG. 3  with load weights as parameters. 
     Here, the normalized frequency F is the ratio of the switching frequency F s  and the resonance frequency Fr of primary inductance Lp and capacitor Cs. If described by an equation, F=Fs/Fr. 
     As  FIG. 3  indicates, the voltage conversion rate M shows the maximum at the normalized frequency of 1/√{square root over ( )}2 independently of the load weight. The reason for this is because the circuit shown in  FIG. 1  works, at the normalized frequency higher than 1, through the resonance of the primary inductance Lp of transformer T 1  or T 2  and capacitor Cr. The reason for this is also because the circuit shown in  FIG. 1  works, at the normalized frequency equal to or lower than 1, through the resonance of the sum of the primary inductance of transformer T 1  and the primary inductance of transformer T 2  and capacitor Cr. 
     Since the current leading mode of operations is caused, in the same manner as in the circuit shown in  FIG. 8 , at the normalized frequency of less than 1/√{square root over ( )}2(F&lt;1/√{square root over ( )}2), the circuit shown in  FIG. 1  is made to work at the normalized frequency of higher than 1/√{square root over ( )}2 (F&gt;1/√{square root over ( )}2). Here, the normalized frequency F, at which the voltage conversion rate M shows the maximum, is constant independently of the load weight. Therefore, it is very easy to set the frequency Fmin, at which current leading mode is prevented from causing under all the unfavorable conditions including sudden change of the DC power supply voltage, sudden change caused in the load, and overload. In other words, it is possible to provide a very reliable switching power supply that does not cause any current leading mode. 
     At the normalized frequency between 1/√{square root over ( )}2 and 1 (1/√{square root over ( )}2&lt;F&lt;1), there exists a period, for which the value of a synthesized current, obtained by rectifying and synthesizing currents ID 1  and ID 2  flowing through diodes D 1  and D 2 , is zero. In this period, the waveforms of currents ID 1  and ID 2  are similar to those described in  FIG. 9 . The effective values of the currents flowing through diodes D 1 , D 2  and smoothing capacitor C o  are large. 
     At the normalized frequency F higher than 1, there exists no period, for which the synthesized current value ID 1 +ID 2  is zero. An AC current is superposed slightly onto the DC current. It is possible to set the effective values of the currents flowing through diodes D 1 , D 2  and smoothing capacitor C o  to be smaller than those in the circuit shown in  FIG. 8 . Therefore, by setting the lowest operation frequency of control circuit Cont 1  such that the normalized frequency F is higher than 1 according to the fourth aspect of the invention, it is possible to improve the conversion efficiency and to use smaller circuit component parts. 
     In the region, in which the normalized frequency F is higher than 1, the voltage conversion rate M converges to 0.5 as the normalized frequency F increases. Therefore, by setting the operation point such that the voltage conversion rate M is higher than 0.5 over the entire operation range of the switching power supply, it becomes possible to prevent the switching frequency from increasing too much. In detail, it is effective to set the winding ratio n of the transformers as described by the following relational expression, since the output voltage V o  is equal to Vin·M/(2n). (The fifth aspect of the invention)
 
 n &gt;Vin (max)· Mmin /(2 V   o )=Vin(max)/(4 V   o )
 
     However, when the transformer winding ratio n is close to Vin(max)/(4 V o ), the switching frequency increases greatly under a light load and the conversion efficiency under the light load lowers. To obviate this problem, the switching frequency is fixed as the feedback signal value for controlling the DC output current exceeds the value corresponding to the maximum switching frequency and the ON-duties of the first and second switching devices are controlled variably. (The sixth aspect of the invention) 
       FIG. 4  is a diagram describing the characteristic control performances of the switching power supply according to the invention (according to the sixth aspect of the invention). Now the control performances of the switching power supply according to the invention will be described below with reference to  FIG. 4 . 
     In  FIG. 4 , the normalized frequency F and the ON-duty D are controlled in response to the feedback voltage VFB. In the range, in which the feedback voltage VFB is equal to or higher than a voltage V 3 , the ON-duty D is set at 0.5 and the switching frequency is limited to F(min) to prevent off-resonance from causing. 
     In the range, in which the feedback voltage VFB is equal to or lower than the voltage V 3  and equal to or higher than a voltage V 2 , the ON-duty D is set at 0.5 and the switching frequency is controlled variably. 
     In the range, in which the feedback voltage VFB is equal to or lower than the voltage V 2  and equal to or higher than a voltage V 1 , the switching frequency is limited to F(max) and the ON-duty D is controlled variably. 
     In the range, in which the feedback voltage VFB is equal to or lower than the voltage V 1  and equal to or higher 0, the ON-duty D is set at 0 to stop the switching. 
     Due to the control schemes described above, the voltage conversion rate M is made to change continuously between 0 and Mmax. Thus, it is possible to control the output voltage V o  at a constant value independently of the load weight without increasing the switching frequency excessively. 
     Now the seventh aspect of the invention will be described below. 
     When the transformer winding ratio n is set as described by the following relational expression, exciting currents ILm 1  and ILm 2  of transformers T 1  and T 2  do not cross zero under a heavy load but repeat rising and falling without changing the signs thereof.
 
 n &lt;Vin (max)/(4 V   o )
 
     In this case, the magnetic flux amplitudes of transformers T 1  and T 2  are smaller than the magnetic flux amplitudes in the case, in which exciting currents ILm 1  and ILm 2  cress zero. Therefore, it is possible to reduce the core losses and to improve the conversion efficiency. 
     However, the condition for controlling the output voltage V o  at a constant value is given by the following relational expression.
 
 M &lt;Vin (max)/(2 Vin )
 
     The voltage conversion rate M is lower than 0.5, when the input voltage Vin shows the maximum. The minimum value of the voltage conversion rate M is 0.5 as the voltage conversion characteristics described in  FIG. 3  indicate. Therefore, it means that the output voltage V o  will exceed the set value thereof to the higher side under the operating conditions, under which the input voltage Vin shows the maximum, even when the switching frequency is set to be infinitesimally high. Therefore, the control method according to the sixth aspect of the invention makes it possible to set the voltage conversion rate M to be lower than 0.5 and to control the output voltage V o  at a constant value over the entire input voltage range. 
     The disclosure of Japanese Patent Application No. 2008-011206 filed on Jan. 22, 2008 is incorporated as a reference. 
     While the invention has been explained with reference to the specific embodiments of the invention, the explanation is illustrative and the invention is limited only by the appended claims.