Abstract:
A PWM controller according to the present invention provides a technique to control the output voltage and output current of the power supply without the feedback control circuit in the secondary side of the transformer. In order to achieve better regulation, an adaptive load and a feedback synthesizer are equipped into the PWM controller, which associated with the auxiliary winding of the transformer regulate the output voltage of the power supply as a constant. Furthermore, a programmable power limiter in the PWM controller controls the power that is delivered from the primary side to the output of the power supply. The threshold of the power limit is varied in accordance with the change of output voltage. Because the output power is the function of the output voltage of the power supply, a constant current output is realized when the output current of the power supply is greater than a maximum value.

Description:
BACKGROUND OF INVENTION 
     1. Field of the Invention 
     The present invention relates to a switching power supply and more specifically relates to the pulse width modulation (PWM) controller of the switching power supply. 
     2. Background of the Invention 
     With the advantage of high efficiency, smaller size and lighter weight, switching mode power supplies have been widely used in electronic appliances, computers, etc. A typical switching mode power supply generally includes a PWM controller, a power MOSFET, a transformer and a feedback control circuit. The feedback control circuit is used to sense the output voltage and/or the output current in the secondary side of the power supply, and then connect to the PWM controller through an isolated device such as optical-coupler to achieve the feedback loop. FIG. 1 shows a traditional flyback power supply. A capacitor  220  connected to a PWM controller  100  is charged via a resistor  210 . The PWM controller  100  is started up once its supply voltage Vcc is higher than the start-threshold voltage. When the PWM controller  100  starts to operate, it will output a PWM signal to drive a MOSFET  300  and a transformer  400 , meanwhile its supply voltage V CC  will be supplied by the auxiliary winding of the transformer  400  through a rectifier  230 . A resistor  240  converts the switching current of the transformer  400  into voltage signal for PWM control and over-power protection. The feedback voltage V FB  is derived from the output of an optical-coupler  250 . The output voltage conducted through a resistor  290  and a Zener voltage of the Zener diode  280  drive the input of the optical-coupler  250  to form the feedback-loop. Through the PWM controller  100  the voltage V FB  determines the on-time (T ON ) of the PWM signal and decides the output power. A transistor  260  associates with a current-sense resistor  270  and determines the maximum output current. As the output current increases and the voltage across the current-sense resistor  270  exceeds the junction voltage of the transistor  260  such as 0.7 V, the transistor  260  will be turned on to reduce the on-time(T ON ) of the PWM signal through decreasing the feedback voltage V FB  and thus clamping the output current of the power supply as a constant. 
     Although the forgoing circuit is able to regulate output voltage and output current, it is difficult to shrink the power supply without eliminating the optical-coupler and secondary feedback control-circuit. Furthermore the current-sense resistor for the constant current output increases the power consumption of the power supply. According to the present invention, a primary side control eliminates the need of optical-coupler and secondary feedback control-circuit, and therefore reduces the device counts and the size of the power supplies, and so saves cost. Additionally, because the current-sense resistor is not necessary for the constant current output, the efficiency of the power supply is thus improved. 
     SUMMARY OF INVENTION 
     The present invention provides a technique to control the output voltage as well as the output current without the need of the feedback circuit in the secondary side of the power supply. The PWM controller indirectly senses the output voltage through its supply voltage, which is supplied by the auxiliary winding of the transformer. A feedback synthesizer is designed to generate a feedback current proportional to the variation of the supply voltage. Since the supply voltage produced by the auxiliary winding is correlated with the output voltage of the power supply, as the output voltage in the secondary side varies due to the variation of the load, this will result in a proportional variation in the auxiliary winding as well. However, the variation of the current flowing through the auxiliary winding creates different voltage drops and greatly affects the accuracy of the detection for the output voltage. In order to improve the regulation, an adaptive load is operated in the form of current, which is varied inversely proportional to the feedback current, which therefore achieves a constant supply current flowing through the path of the auxiliary winding. Consequently, the voltage drops in the auxiliary winding path will not affect the detection of output voltage. Furthermore, a programmable power limiter in the PWM controller controls the power delivered from the primary side of the transformer to the output of the power supply. The threshold of the power limit is varied in accordance with the change of output voltage. Since the output power is the function of the output voltage of the power supply, a constant current output is realized when the output current of the power supply is greater than a maximum value. 
     Advantageously, the PWM controller can regulate the output voltage and provide a constant current output through the primary side control, which eliminates the need of a feedback control-circuit in the secondary side. Therefore the device counts, the size of the power supply and the cost are greatly reduced. It is to be understood that both the foregoing general descriptions and the following detail descriptions are exemplary, and are intended to provide further explanation of the invention as claimed. 
    
    
     BRIEF DESCRIPTION OF DRAWINGS 
     The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings, 
     FIG. 1 shows a traditional flyback power supply; 
     FIG. 2 illustrates a flyback power supply regulating the output power in primary side according to the present invention; 
     FIG. 3 schematically shows a circuit diagram of the PWM controller according to the present invention; 
     FIG. 4 shows a preferred embodiment of the adaptive load and the feedback synthesizer according to the present invention shown in FIG. 2; 
     FIG. 5 shows a preferred embodiment of the programmable power limiter; 
     FIG. 6 shows the curve of the limit voltage versus the supply voltage, in which the constant output current is achieved; 
     FIG. 7 shows three types of output power limit. 
    
    
     DETAILED DESCRIPTION 
     FIG. 2 shows a flyback power supply without the feedback control-circuit in the secondary side of the power supply, in which V 1  and V 2  are the voltage in the auxiliary winding and the secondary winding of a transformer  400  respectively. The auxiliary winding supplies the supply voltage V CC  through a rectifier  230 . The voltage V 2  is given by,                V   2     =       N   S               φ          t                 (   1   )                                
     where N S  is the turn number of the secondary winding, φ is the magnetic flux of the transformer, 
     The voltage V 1  the auxiliary winding can be expressed as,                V   1     =       N   A               φ          t                 (   2   )                                
     where N A  is the turn number of the auxiliary winding, 
     From Equation (1) and (2), then                V   1     =         N   A       N   S       ×     V   2               (   3   )                                
     The voltage V 1  induced in the auxiliary winding is correlated with the voltage V 2  generated in the secondary winding of the transformer. Since the voltage in the auxiliary side is varied in accordance with the voltage variation in the secondary winding, the output load condition can thus be detected from the auxiliary winding of the transformer in the primary side. According to the present invention, a PWM controller  101  includes a feedback synthesizer  103  to produce a feedback current I FB  in accordance with the change of the supply voltage Vcc. The feedback current I FB  will generate a feedback voltage V FB  to control the on-time of the PWM signal. The feedback current I FB  will be reduced and the feedback voltage V FB  will be increased in response to the decrease of the supply voltage V CC . The increase of the feedback voltage V FB  will cause the increase of on-time (T ON ) of the PWM signal and therefore increase the voltage for the supply voltage V CC  and the output of the power supply. On the contrary, when the output load is decreased, the voltages in the secondary winding and the auxiliary winding will increase accordingly. The feedback current I FB  will be increased in response to the increase of the supply voltage V CC , meanwhile the feedback voltage V is decreased to reduce the on-time (T ON ) of the PWM signal. 
     However, when the output load is changed, the variation of the current flowing through the auxiliary winding poses different voltage drops in the rectifier  230  and the auxiliary winding of the transformer  400 , and thus greatly affects the accuracy of the detection for the output voltage. An adaptive load  102  included in the PWM controller  101  is applied to compensate the variation of the feedback current I FB . The adaptive load current I L  that is produced by the adaptive load  102  is varied in inverse proportion to the feedback current I FB  which keeps a supply current I VCC  as a constant, which flows through the rectifier  230  and the auxiliary winding of the transformer  400 . The constant supply current I VCC  keeps the same voltage drops for different load conditions and improves the accuracy of sensing output voltage through the auxiliary winding. 
     FIG. 3 schematically shows a circuit diagram of the PWM controller  101  according to the present invention. The PWM controller  101  comprises a first comparator  20 , a second comparator  21 , an AND-gate  22 , an AND-gate  24 , a RS flip-flop  23 , an oscillator  25 , the feedback synthesizer  103 , the adaptive load  102  and a programmable power limiter  26 . The supply voltage V CC  drives the programmable power limiter  26 , the feedback synthesizer  103  and the adaptive load  102 . The output of the feedback synthesizer  103  is connected to the positive input of the first comparator  20 . The negative input of the first comparator  20  and the negative input of the second comparator  21  are connected to a current-sense voltage V S , in which the current-sense voltage Vs is converted from the switching current of the transformer  400  and is coupled to the source of the power MOSFET  300 . The positive input of the second comparator  21  is connected to the output of the programmable power limiter  26  for the output power limit. The outputs of the first comparator  20  and the second comparator  21  are connected to two inputs of the AND-gate  22  respectively. The output of the AND-gate  22  is connected to the reset-input of the RS flip-flop  23 . The oscillator  25  outputs a pulse signal V P  to the set-input of the RS flip-flop  23 . The first Input of the AND-gate  24  is also connected to the pulse signal. The output of the RS flip-flop  23  is connected to the second input of the AND-gate  24 . The AND-gate  24  outputs the PWM signal to drive the MOSFET  300 . 
     FIG. 4 shows a preferred embodiment of the adaptive load  102  and the feedback synthesizer  103  according to the present invention shown in FIG.  2 . The feedback synthesizer  103  comprises a constant current source that is composed of a first operation amplifier (OPA)  35 , a first transistor  36  and a first resistor  37 ; a first current mirror that is composed of a transistor  33  and a transistor  34 ; a third current mirror that is composed of a transistor  38  and a transistor  39 ; a fourth current mirror that is composed of a transistor  30  and a transistor  31 ; a fifth current mirror that is composed of a transistor  41  and a transistor  40 ; a feedback current source that is composed of a Zenor diode  46 , a second resistor  43 (R 2 ), a third resistor  47 (R 3 ), a second OPA  45  and a second transistor  42 ; and a fourth resistor  32 (R 4 ). A reference voltage V R  is connected to the positive input of the first OPA  35 . The output of the first OPA  35  is connected to the gate of the first transistor  36 . The source of the first transistor  36  is connected to the negative input of the first OPA  35 . The first resistor  37 (R 1 ) is connected between the source of the first transistor  36  and the ground. The gates of the transistors  33  and  34  and the drains of the transistors  33  and  36  are tied together. The sources of the transistors  33  and  34  are tied together to the supply voltage V CC . The gates of the transistors  38  and  39  and the drains of the transistors  34  and  38  are tied together. The sources of the transistors  38  and  39  are connected to the ground. The gates of the transistors  30  and  31  and the drains of the transistors  31 ,  39  and  40  are tied together. The sources of the transistors  30 ,  31 ,  40  and  41  are connected to the supply voltage V CC . The gates of the transistors  40  and  41  and the drain of the transistor  41  are tied together to the drain of the second transistor  42 . The gate of the second transistor  42  is connected to the output of the second OPA  45 . The source of the second transistor  42  is connected to the negative input of the second OPA  45 . The second resistor  43 (R 2 ) is connected between the source of the second transistor  42  and the ground. The third resistor  47 (R 3 ) is connected between the positive input of the second OPA  45  and the ground. The anode of the Zener diode  46  is connected to the positive input of the second OPA  45 . The cathode of the Zener diode  46  is connected to the supply voltage V CC . The fourth resistor  32 (R 4 ) is connected between the drain of the transistor  30  and the ground to convert the drain current of the transistor  30  into a feedback voltage V FB . 
     Through the reference voltage V R  the constant current source outputs a constant current I R , a which is given by 
     
       
         
           I 
           R 
           =V 
           R 
           /R 
           1 
         
       
     
     The first current mirror mirrors a first current I 1  from the constant current I R . The third current mirror mirrors a third current I 3  from the first current I 1 . Once the output voltage of the power supply varies due to the variation of the output load, a corresponding voltage will result in the auxiliary bias winding and the supply voltage Vcc. The feedback current I FB  can be expressed as,                  I   FB     =         V   CC     -     V   Z         R   2         ,           (   4   )                                
     where Vz is the voltage of the Zener diode  46 . 
     The feedback current I FB  is varied in proportion to the variation of the supply voltage V CC . As the supply voltage V CC  decreases due to the increased load condition, the feedback current I FB  will reduce according to Equation (4).The fifth current mirror mirrors a fifth current I 5  from the feedback current I FB . As FIG. 4 shows, since the third current I 3  is kept as a constant, a decreased fifth current I 5  will result in an increased fourth current I 4 . The fourth current mirror mirrors a drain current I F  from the fourth current I 4 . The fourth resistor  32  (R 4 ) converts the drain current I F  into a feedback voltage V FB . Therefore, the on-time(T ON ) of the PWM signal is increased and the output voltage is then raised. On the contrary, while the output voltage of the power supply increases due to a decreased load, the feedback current I FB  will be increased and result in a decreased feedback voltage V FB  to decrease the on-time of the PWM signal. 
     As shown in FIG. 2, through the rectifier  230 , the auxiliary winding of the transformer  400  provides the supply voltage V CC  for the PWM controller  101 .The voltage of the auxiliary winding is varied in response to the change of the output load. The different loads will result in different voltages in auxiliary winding of the transformer  400 . The variation of the voltage in auxiliary winding causes the modulation and variation of the feedback current I FB  and the supply current I VCC . The variation of the supply current I VCC  creates different voltage drops in the rectifier  230  and the auxiliary winding, which greatly affects the detection of the voltage in auxiliary winding. In order to avoid the different voltage drops in the rectifier  230  and the auxiliary winding, a constant supply current I VCC  is needed. Since the feedback current I FB  is varied in proportion to the supply voltage V CC , the adaptive load  102  is applied to vary the supply current I VCC  in inverse proportion to the feedback current I FB . Therefore, the supply current I VCC  is kept constant. The adaptive load  102  is used to compensate the variation of the feedback current I FB , which comprises a second current mirror that is composed of the transistor  33  and a transistor  52 ; a sixth current mirror that is composed of the transistor  41  and a transistor  44 ; a seventh current mirror that is composed of a transistor  51  and a transistor  50 ; and an eighth current mirror that is composed of a transistor  48  and a transistor  49 . The gate of the transistor  52  is connected to the gate of the transistor  33 . The sources of the transistors  44  and  52  are connected to the supply voltage V CC . The drains of the transistors  49 ,  51  and  52  and the gates of the transistors  50  and  51  are tied together. The gates of the transistors  48  and  49  and the drains of the transistors  44  and  48  are tied together. The sources of the transistors  48 ,  49 ,  50  and  51  are connected to the ground. The drain of the transistor  50  is connected to the supply voltage V CC . The gate of the transistor  44  is connected to the gate of the transistor  41 . The sixth current mirror mirrors a sixth current I 6  from the feedback current I FB . The second current mirror mirrors a second current I 2  from the constant current I R.  The adaptive load current I L  is given by 
     
       
           I   L   =N   7 ( I   2   −N   8   ×I   6 )  (5) 
       
     
     where N 7  and N 8  is the ratio of the seventh and eighth current mirror respectively; therefore, Equation (5) can be shown as, 
     
       
           I   L   =N   7 ( I   2   −N   8   ×N   6   I   FB )  (6) 
       
     
     where N 6  is the ratio of the sixth current mirror. 
     According to Equation (6), as the feedback current I FB  increases, the adaptive load current I L  will reduce. On the contrary, as the feedback current I FB  decreases, the adaptive load current I L  will increase. Therefore, the adaptive load current I L  keeps the supply current I VCC  as a constant to avoid the different voltage drops in the rectifier  230  and auxiliary winding. 
     FIG. 5 shows an embodiment of a programmable power limiter  26  according to the present invention, which comprises a fifth resistor  68  (R 5 ), a sixth resistor  69  (R 6 ) a third OPA  67 , a third transistor  65 , a seventh resistor  66 (R 7 ), an eighth resistor  61 (R 8 ), a current source  60 (I A ), a current source  62 (I X ) and a ninth current mirror that is composed of a transistor  64  and a transistor  63 . The fifth resistor  68 (R 5 ) is connected between the supply voltage V CC  and the positive input of the third OPA  67 . The sixth resistor  69  (R 6 ) is connected between the positive input of the third OPA  67  and the ground. The output of the third OPA  67  is connected to the gate of the third transistor  65 . The negative input of the third OPA  67  is connected to the source of the third transistor  65 . The seventh resistor  66  (R 7 ) is connected between the source of the third transistor  65  and the ground. The sources of the transistors  63  and  64  are connected together. The gates of the transistors  63  and  64  and the drains of the transistors  64  and  65  are tied together. The eighth resistor  61  (R 8 ) is connected between the drain of the transistor  63  and the ground. The current source  62 (I X ) is connected between the supply voltage V CC  and the source of the transistor  64 . The current source  60 (I A ) is connected between the supply voltage V CC  and the drain of the transistor  63 . The limit voltage V LIMIT  is derived from the drain of the transistor  63 . 
     The output power Po is given by, 
     
       
         
           P 
           O 
           =V 
           O 
           ×I 
           O 
         
       
     
     where V O  and I O  are the output voltage and output current of the power supply. 
     Setting I O  as a constant, when, V O2 =0.5×V O1  we can get, 
     
       
           P   O2 =0.5 ×P   O1   
       
     
     Due to the power 
     
       
           P= (1/2) ×L×I   2   ×f   (7) 
       
     
     
       
         
           
             
               
                 
                   
                     Set 
                      
                     
                         
                     
                      
                     
                       ( 
                       
                         1 
                         / 
                         2 
                       
                       ) 
                     
                     × 
                     
                       L 
                       P 
                     
                     × 
                     f 
                   
                   = 
                   
                     K 
                     0 
                   
                 
               
               
                 
                   ( 
                   8 
                   ) 
                 
               
             
             
               
                 
                   
                     P 
                     O 
                   
                   = 
                   
                     
                       K 
                       0 
                     
                     × 
                     
                       I 
                       P 
                       2 
                     
                   
                 
               
               
                 
                     
                 
               
             
             
               
                 
                   
                     I 
                     P 
                   
                   = 
                   
                     
                       
                         
                           P 
                           O 
                         
                         
                           K 
                           0 
                         
                       
                     
                     = 
                     
                       
                         K 
                         1 
                       
                        
                       
                         
                           P 
                           O 
                         
                       
                     
                   
                 
               
               
                 
                     
                 
               
             
             
               
                 
                   
                     
                       Due 
                        
                       
                           
                       
                        
                       to 
                        
                       
                           
                       
                        
                       
                         P 
                         O2 
                       
                     
                     = 
                     
                       0.5 
                       × 
                       
                         P 
                         O1 
                       
                     
                   
                   , 
                 
               
               
                 
                     
                 
               
             
             
               
                 
                   
                     I 
                     P2 
                   
                   = 
                   
                     0.707 
                     × 
                     
                       I 
                       P1 
                     
                   
                 
               
               
                 
                     
                 
               
             
           
         
                 
         
             
         
      
     
     Referring to forgoing equations, we find that the output current can be controlled by controlling the primary current of the transformer, in which the constant current output can be acheived by limiting the primary current as (0.707×Ip 1 ) when the output voltage is equal to (0.5×Vo 1 ) wherein the Vo 1  is the maximum output voltage and Ip 1  is the maximum output current. 
     A programmable power limiter is shown in FIG. 5 
     File: 10244USF.RTF                I   X     =       I   B     +     I   C               (   9   )                 Set                   I   B       =     I   C                               V   LMIT     =         I   B     ×     R   8       +       I   A     ×     R   8                                   I   C     =         V   CC       R   7       ×     (       R   6         R   5     +     R   6         )               (   10   )                 Substitute                   I   B                   from                 equation                   (   9   )       ,                             V   LMIT     =       (         R   8       R   7       ×       R   6         R   5     +     R   6         ×     V   CC       )     +       I   A     ×     R   8                                     Set                   K   x       =         R   8       R   7       ×       R   6         R   5     +     R   6             ,       K   y     =       I   A     ×     R   8         ,                               From                 equation                   (   10   )       ,       V   LIMIT     =     1                 and                 0.707                 for                   V   CC                   and                                                  V   CC     /   2                   respectively     ,                         Then                               V   CC     ×     K   x       +     K   y       =   1           (   11   )                       V   CC     2     ×     K   x       +     K   y       =   0.707           (   12   )                                
     FIG. 6 shows the curve of the limit voltage V LIMIT  versus the supply voltage Vcc, in which the constant current output is achieved. The programmable power limiter  26  shown in FIG. 5 generates the limit voltage V LIMIT . By properly selecting the K x  and K y  (the resistance of the resistors R 5 , R 6 , R 7 , R 8  and the current source I A ) according to the equation (11) and (12), the curve shown in FIG. 6 can be determined. The limit voltage is clamped at the voltage V X  such as 1V when the supply voltage exceeds a specific value, wherein the maximum output power is limited. FIG. 7 shows three output power limits including constant power, constant current and current foldback represented by line  70 ,  71  and  72  respectively, in which different K x  and K y  are applied. 
     As described above, a feedback synthesizer and an adaptive load are equipped in the PWM controller, which associated with the auxiliary winding of the transformer regulate the output voltage of the power supply as a constant. Furthermore, a programmable power limiter in the PWM controller controls the output power and achieves the constant current output. The PWM controller can regulate the output voltage and provide a constant current output through the primary side control, which eliminates the need of a feedback control circuit in the secondary side. Consequently, the device counts, the size of the power supply and the cost are greatly reduced. 
     It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.