Abstract:
Power control for a laser used for bust mode communication as well as end-of-life detection for the laser are performed in a combined manner, resulting in a savings in both cost and power consumption. This is achieved by employing a peak comparator which is supplied with an indication of the magnitude of a the laser signal, and supplying to the peak comparator in a time multiplexed manner with different thresholds, such as a first threshold which is used for performing power control and a second threshold which is used for performing end of life detection, on an alternative packet-by-packet basis. Thus, the first threshold is supplied for the duration of a first packet and the second threshold is used for the duration of a second packet. Additional thresholds and packets may be employed for other functions as desired by an implementor.

Description:
TECHNICAL FIELD 
     This invention relates to the art of controlling generated signals, and more particularly, to controlling a laser used for burst mode transmission in a passive optical network (PON). 
     BACKGROUND OF THE INVENTION 
     In prior art optical networks using continuous signal format, power control for the laser and end-of-life detection for the laser are performed independently, resulting in high cost and substantial power consumption. Moreover, when using a bursty signal format, no end-of-life detection was performed in prior art optical networks. 
     SUMMARY OF THE INVENTION 
     We have recognized that for optical networks using a bursty signal format power control for the laser as well as end-of-life detection for the laser can be combined, resulting in a savings in both cost and power consumption. This is achieved by employing a peak comparator which is supplied with an indication of the magnitude of a generated, e.g., laser, signal, and supplying different thresholds to the peak comparator in a time multiplexed manner, such as a first threshold which is used for performing power control and a second threshold which is used for performing end of life detection, on an alternative packet-by-packet basis. Thus, the first threshold is supplied for the duration of a first packet and the second threshold is used for the duration of a second packet. Additional thresholds and packets may be employed for other functions as desired by an implementor. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     In the drawing: 
     FIG. 1 shows an exemplary arrangement for performing power control and end-of-life detection for a source in accordance with the principles of the invention; 
     FIG. 2 shows an exemplary embodiment of a peak comparator; 
     FIG. 3 is an exemplary timing diagram showing the bits of various packets and the signal generated as an output by the controller of FIG. 1; and 
     FIG. 4 shows another exemplary peak comparator. 
    
    
     DETAILED DESCRIPTION 
     The following merely illustrates the principles of the invention. It will thus be appreciated that those skilled in the art will be able to devise various arrangements which, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope. Furthermore, all examples and conditional language recited herein are principally intended expressly to be only for pedagogical purposes to aid the reader in understanding the principles of the invention and the concepts contributed by the inventor(s) to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure. 
     Thus, for example, it will be appreciated by those skilled in the art that the block diagrams herein represent conceptual views of illustrative circuitry embodying the principles of the invention. Similarly, it will be appreciated that the various flow charts, flow diagrams, state transition diagrams, pseudocode, and the like represent various processes which may be substantially represented in computer readable medium and so executed by a computer or processor, whether or not such computer or processor is explicitly shown. 
     The functions of the various elements shown in the FIGs., including functional blocks labeled as “processors” may be provided through the use of dedicated hardware as well as hardware capable of executing software in association with appropriate software. When provided by a processor, the functions may be provided by a single dedicated processor, by a single shared processor, or by a plurality of individual processors, some of which may be shared. Moreover, explicit use of the term “processor” or “controller” should not be construed to refer exclusively to hardware capable of executing software, and may implicitly include, without limitation, digital signal processor (DSP) hardware, read-only memory (ROM) for storing software, random access memory (RAM), and non-volatile storage. Other hardware, conventional and/or custom, may also be included. Similarly, any switches shown in the FIGS. are conceptual only. Their function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic, or even manually, the particular technique being selectable by the implementor as more specifically understood from the context. 
     In the claims hereof any element expressed as a means for performing a specified function is intended to encompass any way of performing that function including, for example, a) a combination of circuit elements which performs that function or b) software in any form, including, therefore, firmware, microcode or the like, combined with appropriate circuitry for executing that software to perform the function. The invention as defined by such claims resides in the fact that the functionalities provided by the various recited means are combined and brought together in the manner which the claims call for. Applicant thus regards any means which can provide those functionalities as equivalent as those shown herein. 
     FIG. 1 shows an exemplary arrangement for performing power control and end-of-life detection for a source in accordance with the principles of the invention. More specifically, shown in FIG. 1 are a) peak comparator  101 ; b) source  103 ; c) N input multiplexer  105 ; d) threshold sources  107 , including threshold sources  107 - 1  through  107 -N; e) control line  109 , f) N output demultiplexer  111 ; g) controllable gain driver  119 ; h) controller  121 ; i) alarm light emitting diode (LED)  123 ; and j) value stores  125  and  127 . Peak comparator  101  is arranged to compare the magnitude of the pulses supplied from source  103  against a threshold level supplied by one of threshold sources  107  that is controllably passed via N input multiplexer  105 . 
     Source  103  may be any type of source, e.g., a voltage source or a current source. When used to control laser power, such as for use in a passive optical network (PON), source  103  may be made up of photodiode  117  which is optically coupled to laser  115 . The signal output by photodiode  117  is directly proportional to the output power supplied by laser  115 . Photodiode  117  is considerably more stable than laser  115  in terms of their respective responses to temperature and age variations. As a result changes in the signal supplied as an output from photodiode  117  reflect, essentially, changes in the output of laser  115 . 
     The pulses supplied from source  103  are grouped in packets, which may be supplied in a bursty manner. Depending on the implementation, either the instantaneous peak magnitude of the pulses may be used, or the average peak magnitude of the bits over a packet may be used, as will be described in more detail hereinbelow. 
     In accordance with an aspect of the invention, the particular threshold values depend on the operation desired to be performed when the corresponding threshold source is selected. For example, for use in performing power control, one of threshold sources  107 , e.g., threshold source  107 - 1 , is set to the current level which would be generated by photodiode  117  when laser  115  is supplying the desired power level for typical use, as specified by a user, such as to meet PON communication requirements for a particular link length. Similarly, for use in performing end-of-life detection, one of threshold sources  107 , e.g., threshold source  107 - 2 , is set to the current level which would be generated by photodiode  117  when laser  115  is nearing the end of its useful life as specified by the user, e.g., one half or one third of the power level desired for typical use. 
     Other threshold sources  107 , e.g., threshold source  107 -N, may be used for other user specified functions, e.g., to provide an early end of life warning or other function desired by the user. Those of ordinary skill in the art will be able to develop such functions and specify appropriate thresholds therefor. 
     Both multiplexer  105  and demultiplexer  111  are responsive to a signal supplied on control line  109  by controller  121 . More specifically, in accordance with the principles of the invention, for each packet, controller  121  supplies a signal specifying a particular one of threshold sources  107  to be passed by multiplexer  105  and a particular one of outputs  113  of demultiplexer  111  to which the output of peak comparator  101  is to be supplied. For example, when there are only two threshold sources  107 , a single binary signal may be supplied by controller  121  to select the desired threshold. To this end, a logic 1 would select one of threshold sources  107  and a corresponding output  113  of demultiplexer  111  and a logic 0 would select the other one of threshold sources  107  and its corresponding output  113  of demultiplexer  111 . 
     FIG. 3 is an exemplary timing diagram for one embodiment of the invention. Shown in FIG. 3 are the bits of various packets  301  and signal  303  generated as an output by controller  121  (FIG.  1 ). Other timing variations may be developed by the implementor. For example, controller  121  could switch between two threshold sources only after having selected a particular threshold for two packet times. In such an embodiment the first of the two successive packets having a particular threshold is used for a reset function, which may be necessary in certain embodiments for precharging various components, as described in further detail hereinbelow in connection with FIG. 4, and the second packet of the two successive packets is used for the actual power control or end-of-life detection. There may also be unused packets in between the packets selected for power control and the end-of-life detection, as well as separating any reset function packets from comparison packets. Moreover, depending on the number of thresholds employed, controller  121  may generate more than one bit of output. 
     Continuing with the example above, for a packet for which there is the performance of power control, threshold source  107 - 1  is set to the peak current level which would be generated by photodiode  117  when laser  115  is supplying the desired power level for typical use, as specified by a user. Controller  121  supplies to control line  109  a signal so that multiplexer  105  selects threshold source  107 - 1 , and similarly, demultiplexer  111  selects output  113 - 1 . If the peak power from photodiode  117  is less than the value of the power control threshold supplied by power control threshold source  107 - 1 , the output signal supplied by peak comparator  101  will increase. This increased output will be supplied via demultiplexer  111  through output  113 - 1  to controllable gain driver  119 , which will increase the gain driving laser  115 , so as to increase the light output of laser  115 , if it is not already at its maximum. Conversely, if the peak power from photodiode  117  is greater than the value of the power control threshold supplied by power control threshold source  107 - 1 , the output signal supplied by peak comparator  101  will decrease. This decreased output will be supplied via demultiplexer  111  through output  113 - 1  to controllable gain driver  119 , which will decrease the gain driving laser  115 , so as to decrease the light output of laser  115 . 
     Similarly, for a packet for which there is the performance of end-of-life detection, threshold source  107 - 2  is set to the peak current level which would be generated by photodiode  117  when laser  115  is at the power level specified as corresponding to the end-of-life of laser  115 . Controller  121  supplies to control line  109  a signal so that multiplexer  105  selects threshold source  107 - 2 , and similarly, demultiplexer  111  selects output  113 - 2 . If the peak power from photodiode  117  is greater than the value of the end-of-life threshold supplied by power control threshold source  107 - 2 , the output signal supplied by peak comparator  101  will be a low value, and in particular, one that is too low to turn on alarm LED  123 . This low output will be supplied via demultiplexer  111  through output  113 - 2  to alarm LED  123 , which will remain off. However, if the peak power from photodiode  117  is less than the value of the end-of-life threshold supplied by power control threshold source  107 - 2 , the output signal supplied by peak comparator  101  will be a high value, and in particular, one that is high enough to turn on alarm LED  123 . This high output will be supplied via demultiplexer  111  through output  113 - 2  to alarm LED  123 , which will turn on, indicating to the user that the end of the useful life of laser  115  is at hand. 
     Note that each of value stores  125  and  127  pass through any value supplied to them from demultiplexer  111 . Furthermore, when a value is not being supplied by demultiplexer  111  each of value stores  125  and  127  continues to supply the last value supplied to it when a value was being supplied to it by demultiplexer  111 . Thus, an open circuit condition which might otherwise occur when demultiplexer  111  selects a different one of outputs  113  than it had previously selected is avoided. Value stores  125  and  127  may be implemented in either analog or digital form, and they need not be the same. Value stores  125  and  127  may be series types, as shown in FIG.  1 . or parallel types. 
     FIG. 2 shows an exemplary embodiment of peak comparator  101  (FIG.  1 ). Peak comparator  101  is supplied with currents I pd  and I ref , as shown in FIG.  1 . Current I pd  is supplied to current to voltage converter  201  (FIG.  2 ), while I ref  is supplied to current to voltage converter  203 . Preferably, current to voltage converters  201  and  203  have substantially the same transresistance. Thus, each of the applied currents are converted into voltages. The voltage supplied as an output from current to voltage converter  201 , which represents the signal from source  103  (FIG.  1 ), is supplied to peak detector  205  (FIG.  2 ), which supplies as an output the peak voltage it detects to voltage comparator  207 . The signal supplied as an output from current to voltage converter  203 , which represents the signal from one of threshold sources  107 , is also supplied to voltage comparator  207 . Voltage comparator  207  compares the two voltages supplied to it and supplies as an output a signal indicative of which input is greater. For example, voltage comparator  207  may supply as an output a signal which is an amplified version of the difference between the voltage supplied by current to voltage converter  203  and peak detector  205 . Depending on the gain of voltage comparator  207 , the output supplied thereby can be either only the extremes of the voltages that can be generated by voltage comparator  207 , to yield a digital type of signal; or it can also take on various values between the extremes of the voltages that can be generated by voltage comparator  207 , to yield an analog type of signal. 
     FIG. 4 shows another exemplary peak comparator for use in performing power control or end-of-life detection for a source, in accordance with the principles of the invention. More specifically, shown in FIG. 4 are a) precharge voltage source  405 , b) threshold current source  407 , c) comparator  409  d) switches  411  and  413 , and e) capacitor  421 . 
     Within source  103  is capacitor  421 . Capacitor  421  is not shown explicitly, because, typically, it is an inherent part of source  103 , i.e., it is a parasitic capacitance of photodiode  117 . However, an explicit capacitor may be used, or an explicit capacitor may be used in conjunction with the parasitic capacitance of photodiode  117 . 
     In operation, prior to the beginning of a packet reset switch  413  is closed. This precharges capacitor  421  to the voltage of precharge voltage source  405 . Thereafter, reset switch  413  is opened. Then, the packet is transmitted. 
     During the period of transmission switch  411  closes each time a pulse of light is generated by laser  115  for the duration light is emitted. This causes a current to be injected from threshold current source  407  into capacitor  421 . The value of this current is set by the selected one of current sources  107  (FIG.  1 ), which is current mirrored by threshold current source  407  (FIG.  4 ). Thus, the magnitude of the injected current pulses is the threshold level against which the output of source  403  is being compared. During the transmission of the packet there is an integration by capacitor  421  of the output of photodiode  117  and the current injected from threshold current source  407 . The injected current from threshold current source  407  and the output of photodiode  117  are arranged to combine in a subtractive manner. 
     As a result, if the injected current from threshold current source  407  and the output of photodiode  117  are not substantially identical, the voltage on capacitor  425  may change, i.e., it will either increase or decrease. At the end of the packet transmission, the resulting voltage on capacitor  421  is compared against the voltage of precharge voltage source  405  by comparator  409 . 
     When using the peak comparator shown in FIG. 4, value store  125  (FIG. 1) may be implemented as an up/down counter, which further advantageously provides a filtering effect, and value store  127  may be implemented as a flip flop. If value stores  125  and  127  are so implemented, demultiplexer  111  may be implemented using the enabling logic of the up/down counter and flip flop.