Abstract:
Disclosed herein is a printed circuit board having an RF module power stage circuit embedded therein. Specifically, this invention relates to a printed circuit board having an RF module power stage circuit embedded therein, in which a terminal pad for a resistor, a bead, or an inductor is defined or formed on a power supply plane of a multilayered wired board to connect the resistor, the bead, or the inductor to the power supply plane, and the resistor, the bead, or the inductor is connected in parallel with a decoupling capacitor by using a via hole or by embedding the resistor, the bead or the inductor perpendicular to the power supply plane, thus decreasing the size of the RF module and improving the performance thereof.

Description:
This application is a Divisional of U.S. Ser. No. 11/449,408 filed Jun. 7, 2006, now U.S. Pat. No. 7,663,892, which claims priority from the KR 10-2005-0054064 filed Jun. 22, 2005, the contents of which are incorporated herein by reference. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates, generally, to a printed circuit board (PCB) having an RF module power stage circuit embedded therein, and more particularly, to a PCB having an RF module power stage circuit embedded therein, in which a terminal pad for a resistor, a bead, or an inductor is defined or formed on a power supply plane of a multilayered wired board to connect the resistor, the bead, or the inductor to the power supply plane, and the resistor, the bead, or the inductor is connected in parallel with a decoupling capacitor by using a via hole or by embedding the resistor, the bead or the inductor perpendicular to the power supply plane, thus decreasing the size of the RF module and improving the performance thereof. 
     2. Description of the Related Art 
     In order to correspond to requirements for miniaturization and high functionality of electronic products according to the recent development of electronic industries, electronic techniques have been developed to insert a resistor, a capacitor, and an IC (Integrated Circuit) into a substrate. 
     Although a discrete chip resistor or a discrete chip capacitor has been mounted on the surface of a PCB to date, the development of PCBs in which passive devices such as resistors or capacitors are embedded has been under study in recent years. 
     That is, techniques for fabricating a PCB having an embedded passive device are intended to substitute for a conventional chip resistor or chip capacitor by inserting a passive device into the outer layer or inner layer of the PCB using new materials and processes. 
     In the PCB having an embedded passive device, in which the passive device is inserted into the outer layer or inner layer of the PCB, when the passive device is incorporated into part of the PCB regardless of the size of the PCB, it is referred to as an ‘embedded passive device’. Such a substrate is called an ‘embedded passive device PCB’. 
     The most important characteristic of the embedded passive device PCB is that the passive device, such as the resistor or capacitor, is intrinsically provided in the PCB, without the need for mounting a discrete passive device on the surface of the PCB. 
     According to technical trends of embedded passive device PCBs in recent years, thorough research into techniques for realizing an embedded decoupling capacitor in a flip chip package substrate for high-speed products has been conducted. In this regard, a method of fabricating a flip chip substrate having an embedded capacitor was disclosed in U.S. Pat. No. 6,407,929, which was granted to Intel Corporation. 
       FIGS. 1A to 1K  illustrate a process of fabricating a flip chip substrate having an embedded capacitor, which was patented by Intel Corporation. 
       FIGS. 1A to 1E  illustrate a process of fabricating a silicon chip capacitor, and  FIGS. 1F to 1K  illustrate a process of fabricating a package substrate including an embedded capacitor by mounting the capacitor in the package. 
     As shown in  FIG. 1A , a silicon substrate  101  is prepared, and as shown in  FIG. 1B , titanium or titanium nitride is deposited on the silicon substrate  101  to form a barrier layer  102 . 
     As shown in  FIG. 1C , platinum, palladium, tungsten, or AlSiCu is deposited on the barrier layer  102  to form a silicon chip capacitor lower electrode  103  having a thickness of 1˜10 μm. 
     As shown in  FIG. 1D , material having a high dielectric constant, such as SrTiO 3 , BaTiO 3 , Pb(Zr)TiO 3 , or Ta 2 O 5 , is deposited on the lower electrode  103 , thus forming a capacitor dielectric layer  104  having a thickness of 100˜1000 Å. 
     As shown in  FIG. 1E , the upper electrode  105  of the silicon chip capacitor is formed on the dielectric layer  104  using the same process for forming the lower electrode  103  of the silicon chip capacitor. 
     Subsequently, the silicon chip capacitor, having a thickness of 30˜150 μm, is mounted on an electronic package having a plurality of via holes and conductive material deposited thereon, after which an insulating layer is formed, thus fabricating a flip chip package having an embedded silicon chip capacitor. 
     That is, as shown in  FIG. 1F , the flip chip package substrate, having an electronic inner circuit in which the plurality of via holes is formed and the conductive material is deposited, is provided, and the silicon chip capacitor is mounted thereon, as shown in  FIG. 1G . 
     In  FIG. 1H , an insulating layer  109  having a thickness of 80˜150 μm is formed on the silicon chip capacitor mounted in  FIG. 1G . 
     In  FIG. 1I , the insulating layer  109  is subjected to laser cutting to form via holes  110  having a diameter of 50˜300 μm. 
     In  FIG. 1J , in order to electrically connect the upper electrode  105  of the silicon chip capacitor, conductive material  112  is deposited.  FIG. 1K  is a cross-sectional view showing the electronic package provided with an embedded capacitor using a build-up process. 
     In addition to U.S. Pat. No. 6,407,929, granted to Intel Corporation, conventional techniques related to the embedded passive device PCB comprise Japanese Patent Laid-open Publication No. 1995-115277 regarding ‘layered ceramic part’, Japanese Patent Laid-open Publication No. 2002-344146 regarding ‘high-frequency module and fabrication method thereof’, and Japanese Patent Laid-open Publication No. 2004-056144 regarding ‘printed circuit board’. 
     Such conventional techniques are used to realize an embedded decoupling capacitor in a flip chip package substrate for high-speed products. However, techniques for embedding a resistor or bead linked with a decoupling capacitor in order to improve the performance of the power stage of an RF IC having a high degree of integration are not well developed yet. 
     SUMMARY OF THE INVENTION 
     In order to solve the problems encountered in the prior art, an object of the present invention is to provide a PCB in which a resistor or bead, linked with a decoupling capacitor, is embedded in order to improve the performance of the power stage of an RF IC having a high degree of integration. 
     With the goal of accomplishing the above object, the present invention provides a PCB having an RF module power stage circuit embedded therein, comprising a power supply plane, which is formed in a multilayered printed circuit board, includes a connection pad electrically insulated therefrom, and is connected to an outer power supply line; a first device, one terminal of which is placed on the connection pad of the power supply plane, and the other terminal of which is placed on the power supply plane; and a second device, which is formed in the multilayered printed circuit board, is connected to the first device through a first connection via hole, and is connected to an RF IC module mounted in the multilayered printed circuit board through a second connection via hole. 
     In addition, the present invention provides a PCB having an RF module power stage circuit embedded therein, comprising a power supply plane, which is formed in a multilayered printed circuit board, is connected to an outer power supply line, and has a connection pad region defined therein; a first device, one terminal of which is placed on the connection pad region of the power supply plane, which is provided perpendicular to the power supply plane; and a second device, which is formed in the multilayered printed circuit board, is connected to the other terminal of the first device, and is connected to an RF IC module mounted in the multilayered printed circuit board through a connection via hole. 
     In addition, the present invention provides a PCB having an RF module power stage circuit embedded therein, comprising a power supply plane, which is formed in a multilayered printed circuit board, includes a connection pad electrically insulated therefrom, and is connected to an outer power supply line; a first device, one terminal of which is placed on the connection pad of the power supply plane, and the other terminal of which is placed on the power supply plane; a second device, which is formed in the multilayered printed circuit board, is connected to the first device through a first connection via hole, and is connected to an RF IC module mounted in the multilayered printed circuit board through a second connection via hole; and a third device, which is formed in the multilayered printed circuit board, is connected to the second device through a third connection via hole, and is connected to the RF IC module mounted in the multilayered printed circuit board through a fourth connection via hole. 
     In addition, the present invention provides a PCB having an RF module power stage circuit embedded therein, comprising a power supply plane, which is formed in a multilayered printed circuit board, is connected to an outer power supply line, and has a connection pad region defined therein; a first device, one terminal of which is placed on the connection pad of the power supply plane, which is provided perpendicular to the power supply plane; a second device, which is formed in the multilayered printed circuit board, is connected to the other terminal of the first device, and is connected to an RF IC module mounted in the multilayered printed circuit board through a first connection via hole; and a third device, which is formed in the multilayered printed circuit board, is connected to the second device through a second connection via hole, and is connected to the RF IC module mounted in the multilayered printed circuit board through a third connection via hole. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIGS. 1A to 1K  are cross-sectional views showing a conventional process of fabricating a flip chip substrate having an embedded capacitor, which was patented by Intel Corporation; 
         FIG. 2A  is a cross-sectional view showing a PCB having an RF module power stage circuit embedded therein, according to a first embodiment of the present invention, and  FIG. 2B  is an equivalent circuit diagram of  FIG. 2A ; 
         FIG. 3A  is a top plan view showing a power supply plane of  FIG. 2A , and  FIG. 3B  is a top plan view showing a ground plane of  FIG. 2B ; 
         FIG. 4A  is a cross-sectional view showing a PCB having an RF module power stage circuit embedded therein, according to a second embodiment of the present invention, and  FIG. 4B  is an equivalent circuit diagram of  FIG. 4A ; 
         FIG. 5A  is a top plan view showing a power supply plane of  FIG. 4A , and  FIG. 5B  is a top plan view showing a ground plane of  FIG. 4B ; 
         FIG. 6A  is a cross-sectional view showing a PCB having an RF module power stage circuit embedded therein, according to a third embodiment of the present invention, and  FIG. 6B  is an equivalent circuit diagram of  FIG. 6A ; and 
         FIG. 7  is a top plan view showing a power supply plane of  FIG. 6A . 
     
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Hereinafter, a detailed description will be given of the preferred embodiment of the present invention. 
     An RF IC and a baseband IC constituting an RF module are typically realized to have different power stage circuits from each other. That is, in the case of the RF IC, the inhibition of high frequency coupling between different power stages integrated on a single chip is regarded as an important design process from the point of view of prevention of oscillation. 
     Thus, unlike the structure of the power stage of a digital IC, the RF IC realizes the above function through resistors or beads, and further functions to stabilize DC bias and acts as an RF choke. 
       FIG. 2A  is a cross-sectional view showing a PCB having an RC power stage circuit of an RF IC embedded therein, according to a first embodiment of the present invention, and  FIG. 2B  is an equivalent circuit diagram of  FIG. 2A . 
     Referring to  FIG. 2A , the PCB having an RC power stage circuit of an RF IC embedded therein, according to the first embodiment of the present invention, has a power supply plane  210  and a ground plane  230 , which are formed as internal layers. 
     As shown in  FIGS. 2A and 3A , a plurality of connection pads  295   a ,  295   b ,  295   c  is formed in the power supply plane  210  to be isolated from the power supply plane  210 . 
     As such, the connection pads  295   a ,  295   b ,  295   c  may be formed by removing the portions surrounding the connection pads  295   a ,  295   b ,  295   c  from the power supply plane  210  through etching. 
     In addition, first sides of resistors  260   a ,  260   b ,  260   c  are placed on respective connection pads  295   a ,  295   b ,  295   c , and second sides thereof are placed on the power supply plane  210 . 
     In order to connect the resistors  260   a ,  260   b ,  260   c  to decoupling capacitors  231   a ,  231   b ,  231   c , first sides of connection via holes  270   a ,  270   b ,  270   c  are connected to respective connection pads  295   a ,  295   b ,  295   c , and second sides thereof are connected to respective upper electrodes  230   a ,  230   b ,  230   c  of the decoupling capacitors  231   a ,  231   b ,  231   c  through grooves  221   a ,  221   b ,  221   c  of the ground plane  220 , as shown in  FIG. 3B . 
     In this way, when the connection via holes  270   a ,  270   b ,  270   c  are used to connect the resistors  260   a ,  260   b ,  260   c  to the upper electrodes  230   a ,  230   b ,  230   c  of the decoupling capacitors, the decoupling capacitors  231   a ,  231   b ,  231   c  are connected in parallel with the resistors  260   a ,  260   b ,  260   c , as shown in the equivalent circuit diagram of  FIG. 2B . 
     As such, individual decoupling capacitors  231   a ,  231   b ,  231   c  are composed of the ground plane  220 , an insulating layer  225  having a high dielectric constant laminated on the ground plane  220 , and the upper electrodes  230   a ,  230   b ,  230   c  formed on the insulating layer  225 . When the ground plane  220  is used as a lower electrode, first sides of the decoupling capacitors  231   a ,  231   b ,  231   c  are grounded, as shown in  FIG. 2B . 
     The upper electrodes  230   a ,  230   b ,  230   c  of the three decoupling capacitors  231   a ,  231   b ,  231   c  are connected to an RF IC  250  of the PCB, and more particularly, to respective RF IC pads  240   a ,  240   b ,    240 c  of said RF IC  250 . 
     In addition, the connection via holes  280   a ,  280   b ,  280   c  function to connect the resistors  260   a ,  260   b ,  260   c  to the RF IC  250 . Thus, when the decoupling capacitors  231   a ,  231   b ,  231   c  and the resistors  260   a ,  260   b ,  260   c  are connected to the RF IC  250  through the connection via holes  280   a ,  280   b ,  280   c , the parallel connection points of the decoupling capacitors  231   a ,  231   b ,  231   c  and the resistors  260   a ,  260   b ,  260   c  are connected to the input terminal of the RF IC  250 , as shown in  FIG. 2B . Thereby, the PCB of  FIG. 2A , in which the plurality of resistors  260   a ,  260   b ,  260   c  and decoupling capacitors  231   a ,  231   b ,  231   c  are embedded, constitutes the equivalent circuit of  FIG. 2B . 
       FIG. 4A  is a cross-sectional view showing a PCB having an LC power stage circuit of an RF IC embedded therein, according to a second embodiment of the present invention, and  FIG. 4B  is an equivalent circuit diagram of  FIG. 4A . 
     Referring to  FIG. 4A , the PCB having an LC power stage circuit of an RF IC embedded therein, according to the second embodiment of the present invention, has a power supply plane  310  and a ground plane  330 , which are formed as internal layers. As such, in the power supply plane  310 , a plurality of connection pad regions  395   a ,  395   b ,  395   c  is defined, as shown in  FIGS. 4A and 5A . 
     Unlike the first embodiment shown in  FIG. 2A , according to the second embodiment, inductors  360   a ,  360   b ,  360   c  are formed perpendicular to the power supply plane  310 , and are connected to upper electrodes  330   a ,  330   b ,  330   c  of decoupling capacitors  331   a ,  331   b ,  331   c  through grooves of the ground plane  320  of  FIG. 5B , as shown in  FIG. 3B . 
     In this way, when first sides of the inductors  360   a ,  360   b ,  360   c  are connected to respective connection pad regions  395   a ,  395   b ,  395   c  of the power supply plane  310  and second sides thereof are connected to the upper electrodes  330   a ,  330   b ,  330   c  of the decoupling capacitors  331   a ,  331   b ,  331   c , the inductors  360   a ,  360   b ,  360   c  and the decoupling capacitors  331   a ,  331   b ,  331   c  are connected in parallel with each other, respectively, as shown in the equivalent circuit diagram of  FIG. 4B . 
     As such, individual decoupling capacitors  331   a ,  331   b ,  331   c  are composed of the ground plane  320 , an insulating layer  325  having a high dielectric constant laminated on the ground plane  320 , and the upper electrodes  330   a ,  330   b ,  330   c  formed on the insulating layer  325 . When the ground plane  320  is used as a lower electrode, first sides of the decoupling capacitors  331   a ,  331   b ,  331   c  are grounded, as shown in  FIG. 4B   
     The upper electrodes  330   a ,  330   b ,  330   c  of the three decoupling capacitors  331   a ,  331   b ,  331   c  are connected to an RF IC  350  through connection via holes  380   a ,  380   b ,  380   c.    
     Further, the connection via holes  380   a ,  380   b ,  380   c  respectively function to connect the inductors  360   a ,  360   b ,  360   c  to the RF IC  350 . When the decoupling capacitors  331   a ,  331   b ,  331   c  and the inductors  360   a ,  360   b ,  360   c  are connected to the RF IC  350  through the connection via holes  380   a ,  380   b ,  380   c , the parallel connection points of the decoupling capacitors  331   a ,  331   b ,  331   c  and the inductors  360   a ,  360   b ,  360   c  are connected to the input terminal of the RF IC  350 , as shown in  FIG. 4B . Thereby, the PCB of  FIG. 4A , in which the inductors  360   a ,  360   b ,  360   c  and decoupling capacitors  331   a ,  331   b ,  331   c  are embedded, constitutes the equivalent circuit of  FIG. 4B . 
     According to the second embodiment, unlike the first embodiment, additional connection pads, which are isolated from the power supply plane  310 , are not formed in the power supply plane  310 , and the inductors  360   a ,  360   b ,  360   c  are provided perpendicularly to form a circuit. However, as in the first embodiment, additional connection pads, which are isolated from the power supply plane  310 , may be formed in the power supply plane  310 , and then first sides of the inductors  360   a ,  360   b ,  360   c  may be connected to the additional connection pads and second sides thereof may be connected to the power supply plane  310 , thus forming a circuit. In addition, in the first embodiment, the circuit may be formed in a manner such that additional connection pads  295   a ,  295   b ,  295   c  are not formed in the power supply plane  210 , and the resistors  260   a ,  260   b ,  260   c  are provided perpendicular to the power supply plane  210 , as in the second embodiment. 
       FIG. 6A  is a cross-sectional view showing a PCB having an embedded RF power stage, according to a third embodiment of the present invention, and  FIG. 6B  is an equivalent circuit diagram of  FIG. 6A . 
     Referring to  FIG. 6A , the PCB having an RC power stage circuit of an RF IC embedded therein, according to the third embodiment of the present invention, is composed of a first ground plane  405 , a power supply plane  410 , a first decoupling capacitor power supply plane  420 , a second ground plane  430 , and a second decoupling capacitor power supply plane  440 , which are formed as internal layers. 
     The first ground plane  405  and the second ground plane  430  are connected to each other through connection via holes  475   a ,  475   b , thus maintaining the same ground voltage. 
     Further, a plurality of connection pads  414   a ,  414   b ,  414   c  is formed in the power supply plane  410  to be isolated from the power supply plane  410 , as shown in  FIGS. 6A and 7 . 
     Such connection pads  414   a ,  414   b ,  414   c  may be formed by removing the portions surrounding the connection pads  414   a ,  414   b ,  414   c  from the power supply plane  410  through etching. 
     First sides of the inductors  412   a ,  412   b ,  412   c  are placed on respective connection pads  414   a ,  414   b ,  414   c , and second sides thereof are placed on the power supply plane  410 . 
     In order to connect the inductors  412   a ,  412   b ,  412   c  to upper electrode surfaces  423   a ,  423   b ,  423   c  of respective decoupling capacitors  422   a ,  422   b ,  422   c  provided on the first decoupling capacitor power supply plane  420 , first sides of the connection via holes  470   a ,  470   b ,  470   c  are connected to respective connection pads  414   a ,  414   b ,  414   c , and second sides thereof are connected to the upper electrodes  423   a ,  423   b ,  423   c  of the decoupling capacitors. 
     In this way, when the connection via holes  470   a ,  470   b ,  470   c  are used to connect the inductors  412   a ,  412   b ,  412   c  to the upper electrodes  423   a ,  423   b ,  423   c  of the decoupling capacitors, the decoupling capacitors  422   a ,  422   b ,  422   c  are connected in parallel with the inductors  412   a ,  412   b ,  412   c , respectively, as can be seen in the equivalent circuit diagram of  FIG. 6B . 
     As such, individual decoupling capacitors  422   a ,  422   b ,  422   c  are composed of the first decoupling power supply plane  420 , the second ground plane  430 , and an insulating layer  425  having a high dielectric constant formed between the first decoupling power supply plane  420  and the second ground plane  430 . 
     In addition, the first decoupling capacitor power supply plane  420  and the second decoupling capacitor power supply plane  440  are connected to each other through other connection via holes  472   a ,  472   b ,  472   c , such that the decoupling capacitors  422   a ,  422   b ,  422   c  placed under the second ground plane  430  are connected in parallel with decoupling capacitors  437   a ,  437   b ,  437   c  placed above the second ground plane  430 , as can be seen in the equivalent circuit diagram of  FIG. 6B . 
     Individual decoupling capacitors  437   a ,  437   b ,  437   c  placed above the second ground plane  430  include the second ground plane  430 , an insulating layer  435  having a high dielectric constant formed on the second ground plane  430 , and upper electrodes  438   a ,  438   b ,  438   c  of the second decoupling capacitor power supply plane  440  formed on the insulating layer  435 . In this way, when the second ground plane  430  is used as the lower electrode, first sides of the decoupling capacitors  437   a ,  437   b ,  437   c  are grounded, as shown in  FIG. 6B . 
     The upper electrodes  423   a ,  423   b ,  423   c  of the three decoupling capacitors  422   a ,  422   b ,  422   c  provided under the second ground plane  430  are connected to an RF IC  460  through the connection via holes  472   a ,  472   b ,  472   c.    
     The upper electrodes  438   a ,  438   b ,  438   c  of the three decoupling capacitors  437   a ,  437   b ,  437   c  provided above the second ground plane  430  are connected to the RF IC  460  through connection via holes  474   a ,  474   b ,  474   c.    
     Further, the connection via holes  472   a ,  472   b ,  472   c  function to connect the inductors  412   a ,  412   b ,  412   c  to the RF IC  460 . Thus, when the decoupling capacitors  422   a ,  422   b ,  422   c ,  437   a ,  437   b ,  437   c  and the inductors  412   a ,  412   b ,  412   c  are connected to the RF IC  460  through the connection via holes  472   a ,  472   b ,  472   c ,  474   a ,  474   b ,  474   c , the parallel connection points of the decoupling capacitors  422   a ,  422   b ,  422   c ,  437   a ,  437   b ,  437   c  and the inductors  412   a ,  412   b ,  412   c  are connected to the input terminal of the RF IC  460 , as shown in  FIG. 6B . Thereby, the PCB of  FIG. 6A , in which the plurality of inductors  412   a ,  412   b ,  412   c  and decoupling capacitors  422   a ,  422   b ,  422   c ,  437   a ,  437   b ,  437   c  is embedded, constitutes the equivalent circuit of  FIG. 6B . 
     As described hereinbefore, the present invention provides a PCB having an RF module power stage circuit embedded therein. According to the present invention, decoupling capacitors, resistors, beads, or inductors, which are provided around an RF IC, are embedded in an RF IC package substrate, therefore minimizing parasitic inductance, resulting in high power stage stability. 
     In addition, according to the present invention, decoupling capacitors, resistors, beads, or inductors, which are provided around the RF IC, are embedded in the RF IC package substrate, therefore decreasing the size of the RF module. 
     Although the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.