Abstract:
A printed circuit board for electrical devices having RF components, particularly for mobile radio telecommunication devices, wherein to increase the packing density of electronic circuits and conductor-track structures on such circuit board, a “micro via” coating is initially applied to one or both sides of a printed circuit board assembly. This “micro via” coating then has, in particular, RF circuits and RF conductor-track structures applied to at least part of its surface. Finally, the RF circuits and RF conductor-track structures are protected in relation to an RF ground coating of the printed circuit board assembly by barrier areas arranged in an assembly coating, situated directly below the “micro via” coating, of the printed circuit board assembly against interfering influences which impair the RF parameters, to be set in each case, of the RF circuits and RF conductor-track structures.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a printed circuit board for electrical devices having RF components, particularly for mobile radio telecommunication devices, wherein the printed circuit board has a “micro via” coating applied to it and includes RF circuits, non-RF circuits, RF conductor-track structures and non-RF conductor-track structures arranged on it. 
     2. Description of the Prior Art 
     In electrical devices having radio-frequency components or radio-frequency device parts (RF component; RF device parts), these RF components need [lacuna] to be separated from the non-RF components (e.g. AF components) or protected against reciprocal influences, on account of interreactions which arise between such components. This may occur because (1) the RF signals affect the AF response of the AF components if the latter are a placed too close to the RF components; (2) or when the AF components are placed too close to the RF components, the RF parameter settings of the RF components are affected. A typical location where RF components (RF circuits with RF interconnections and RF components) and non-RF components (non-RF circuits with non-RF interconnections and non-RF components) are arranged in close proximity to one another is a printed circuit board or electronic printed circuit board assembly in electrical devices. Furthermore, the interfering interaction between the components is accentuated in small electrical devices with small printed circuit boards. On the other hand, the demand for ever smaller and more compact electrical devices is increasing. This is particularly; the case where the miniaturized devices are portable i.e., the user can take them virtually anywhere (to any geographical location). One example of such small portable devices is mobile radio communication devices. 
     On the basis of the multiplicity of mobile radio telecommunication devices ( such as DECT telecommunication devices, GSM telecommunication devices, PHS telecommunication devices, “IS-95” telecommunication devices and other telecommunication devices based on pure or hybrid transmission methods from the basic transmission methods FDMA, TDMA, CDMA (e.g., the DS-CDMA method or the JD-CDMA method) which are used for a variety of message transmission purposes (such as the transmission of speech, packet and/or video data) and which give rise, by way of example, to the problems illustrated above relating to “demand for miniaturization on the one hand and avoidance of the interfering interaction between RF components and AF components on the other” in the context of the demand for cheaper and cheaper devices (i.e., mass-produced product), the following gives a representative illustration and explanation, for all the devices mentioned, of the effects produced thereby, using the example of a DECT mobile part. 
     FIG. 1 shows a first printed circuit board LP 1 , which is used in the Siemens “GIGASET 1000 S,C” DECT mobile part and, for production engineering reasons, is preferably fitted with components on one side. As shown in the cross section illustration in FIG. 2, the printed circuit board LP 1  has a multilayer first printed circuit board assembly LPT 1  which includes four printed circuit board layers LPL 1  . . . LPL 4 , has a thickness of approx. 1350 μm, and is preferably constructed using the known hybrid masslam process. The printed circuit board assembly LPT 1  referred to here contains a first core K 1  having a thickness of approx. 360 m, and having with a first metal coating M 1   K1  (third printed circuit board layer LPL 3 ) which is arranged on the underside of the core K 1 , is preferably made of copper. The first core K 1  also has a second metal coating M 2   K1  (second printed circuit board layer LPL 2 ) which is arranged on the top of the core K 1  and is preferably made of copper. The metal coatings M 1   K1 , M 2   K1  have a respective first “prepreg” coating P 1 , with a thickness of in each case approx. 360 μm, arranged on them. The “prepreg” coatings denoted are glass fiber reinforced epoxy coatings. The “prepreg” coating PI arranged on the metal coating M 1   K1  has, on the side opposite the metal coating M 1   K1 , a third metal coating M 1   P1  (fourth printed circuit board layer LPL 4 ) which is preferably made of copper and, on the side opposite the metal coating M 2   K1 , a fourth metal coating M 2   P1  (first printed circuit board layer LPL 1 ) which also is preferably made of copper. The first printed circuit board layer LPL 1  has a critical first RF conductor-track structure LBS 1   RF , for example, arranged in it, whilst the second printed circuit board layer LPL 2  is provided with a first non-RF conductortrack structure LBS 1   NRF  and/or a first non-RF circuit interconnection SVD 1   NRF , for example. To protect the RF conductor-track structure LBSL 1   RF  in relation to the RF ground coating MS RF  in the third printed circuit board layer LPL 3  from the influence of the non-RF conductor-track structure LBS 1   NRF  and/or a first non-RF circuit interconnection SVD 1   NRF , the second printed circuit board layer LPL 2  is provided with a first barrier area SB 1  which largely surrounds first field lines FL 1  of the RF signal. Furthermore, the printed circuit board assembly LPT 1  has first through holes DB 1   LPT1  for RF connections and non-RF connections between the first printed circuit board layer LPL 1  and the fourth printed circuit board layer LPL 4 , as well as second through holes DB 2   LPT1  for connecting external modules (e.g. earpiece, microphone etc.). 
     FIG. 3 shows an enlarged three-dimensional illustration of the region drawn in dashed lines in FIG.  2 . 
     FIG. 4 shows a second printed circuit board LP 2 , used in the Siemens “GIGASET 2000 S,C” DECT mobile part and again, for production engineering reasons, preferably fitted with components on one side. As shown in the cross section illustration in FIG. 5, the printed circuit board LP 2  has a multilayer second printed circuit board assembly LPT 2 , which again includes the four printed circuit board layers LPL 1  . . . LPL 4 , has a thickness of approx. 1350 μm, and is preferably constructed using the known hybrid masslam process. The printed circuit board assembly LPT 2  referred to here contains a second core K 2  having a thickness of approx. 360 μm and having a fifth metal coating M 1   K2  (third printed circuit board layer LPL 3 ) which is arranged on the underside of the core K 2  and is preferably made of copper. 
     The second core K 2  also has a sixth metal coating M 2   K2  (second printed circuit board layer LPL 2 ) which is arranged on the top of the core K 2 , is preferably made of copper, and forms the second RF ground coating MS 2   RF . The metal coating M 1   K2 , M 2   K2  has a respective second “prepreg” coating P 2 , with a thickness of in each case approx. 360 μm, arranged on it. The “prepreg” coating P 2  arranged on the metal coating M 1   K2  has, on the side opposite the metal coating M 1   K2 , a seventh metal coating M 2   P2  (fourth printed circuit board layer LPL 4 ) which is preferably made of copper and, on the side opposite the metal coating M 2   K2 , an eighth metal coating M 2   P2  (first printed circuit board layer LPL 1 ), preferably made of copper. The printed circuit board layers LPL 2  . . . LPL 4  have a known tri-plate structure arranged in them. This structure includes a critical second RF conductor-track structure LBS 2   RF  in the third printed circuit board layer LPL 3 , the RF ground coating MS 2   RF  in the second printed circuit board layer LPL 2 , and a third RF ground coating MS 3   RF , which is amply designed for second field lines FL 2  of the RF signal, in the fourth printed circuit board layer LPL 4 . Furthermore, the printed circuit board assembly LPT 2  has first through holes DB 1   LPT2  for the RF connections and non-RF connections between the first printed circuit board layer LPL 1  and the fourth printed circuit board layer LPL 4  as well as second through holes DB 2   LPT2  for connecting the external modules (e.g. earpiece, microphone etc.). 
     To reduce the dimensions of the printed circuit boards LP 1 , LP 2  and thus—as explained in the introduction—be able to produce more compact DECT mobile parts, it is known practice to fit components to both sides of the printed circuit boards. This, however, requires higher complexity in terms of production engineering. 
     When designing printed circuit boards for electrical devices without RF components, it is known practice to use “micro via” technology (Mv technology) in order to promote the abovementioned miniaturization of electrical devices. In printed circuit technology, “micro vias” denote plated-through holes on printed circuit boards in the order of micrometers. MV technology is an alternative to mechanically plating-through blind holes, which is likewise known. MV technology is a connection technology for cheaply producing printed circuit boards without RF circuits and RF conductor-track structures. The cost saving is achieved by virtue of the fact that not only mechanical drilling operations for blind holes, and the addition and removal of material, but also the deburring of the holes, are dispensed with. A number of production processes for producing such “micro via” coatings with a large area are currently known. These processes are the “Sequential Built Up” process (SBU process), the “Silver Bump” process (SB process), the plasma etching process, laser drilling with a CO 2  laser and laser drilling with a YAG laser. For large-scale use, the cost aspect (economic viability) means that, from a modern perspective, probably only the first two production processes can be considered. The “micro vias” (plated-through holes) produced using this technology have a diameter of 50 to 150 μm, for example, and require soldering lands, for example, with diameters in the range between 0.12 and 0.35 mm. The “micro via” diameter is again dependent on the distance between the “micro via” coating (“micro via” layer) and the nearest coating (layer) further that have 4 diameter/layer spacing&gt;1. In combination with the very fine conductor technology having conductor-track widths of 50 μm, extremely high wiring densities are achieved. 
     In the case of standard technologies (e.g., blind-hole plated-through holes) known as an alternative to MV technology, the size of a printed circuit board is determined to a considerable extent by the space requirement for the plated-through holes and by the conductor-track structure on the component side of the printed circuit board. Since it is possible, with MV technology, to “dip down” to the first inner layer directly in the “pad” of the components, the space requirement for plated-through holes and conductor-track structures is now of only little consequence. As long as RF problems are not an issue, components may be placed as close to one another as is permitted from a production engineering perspective. On the above premise, with MV technology, the printed circuit board size is determined almost exclusively by the number and type of the components used. 
     The object on which the present invention is based, therefore, is to increase the packing density of electronic circuits and conductor-track structures on printed circuit boards for electrical devices having RF components, particularly for mobile radio telecommunication devices, and hence to reduce the dimensions of the printed circuit board. 
     SUMMARY OF THE INVENTION 
     The present the invention therefore considers applying a “micro via” coating to one or both sides of a printed circuit board assembly, applying the device-specific circuits with circuit interconnections and components as well as conductor-track structures (e.g. RF circuits having RF circuit interconnections and RF components as well as RF conductor-track structures or non-RF circuits having non-RF circuit interconnections and non-RF components and non-RF conductor-track structures to at least part of the surface of this “micro via” coating, and protecting the RF circuits and RF conductor-track structures in relation to an RF ground coating of the printed circuit board assembly by means of barrier areas, or so-called windows, arranged in an assembly layer and situated directly below the “micro via” coating, of the printed circuit board assembly from interfering influences which impair the RF parameters, to be set in each case, of the RF circuits and RF conductor-track structures (e.g., from the non-RF conductor-track structures and/or non-RF circuit interconnections likewise arranged on the assembly coating, situated directly below the “micro via” coating, of the printed circuit board assembly). 
     The procedure described above for constructing a printed circuit board is also valid, or also can be used if (unlike the above embodiments) on the one hand the RF circuit interconnections of the RF circuits and RF conductor-track structures on the assembly coating, situated directly below the “micro via” coating, of the printed circuit board assembly, and on the other hand the barrier areas and the RF components of the RF circuits, the non-RF conductor-track structures and/or the non-RF circuits with the circuit interconnections. and components, are arranged on the “micro via” coating. Furthermore, the two procedures may also be combined. 
     When using “micro via” technology and the window technique, it must be accepted, for a specific packing volume of circuits and conductor-track structures on the printed circuit board, that the number of printed circuit board layers is increased in comparison with a technology which does not use “micro via” technology and the window technique. However, the number of printed circuit board layers can be kept unchanged as compared with a technology not using “micro via” technology and the window technique only if, contrary to the objective on which the present invention is based, the packing density is reduced and, hence, the intended reduction (miniaturization) of the electrical device is not achieved. 
     If a printed circuit board for electrical devices having RF components, particularly for mobile radio telecommunication devices, is constructed using the proposed method, however, the space required for accommodating the device-specific circuits and conductor-track structures on the printed circuit board is significantly smaller than on printed circuit boards of conventional design. 
     The rest of the procedure according to an embodiment of the present invention affords the advantage that—if the distance between the “micro via” coating and the assembly coating, situated directly below the “micro via” coating, of the printed circuit board assembly is of the order of magnitude necessary for cheaply producing a “micro via” coating using the known “Sequential Built Up” process (SBU process)—in addition to the smaller printed circuit board design on account of the higher packing density, the production costs for the printed circuit board are drastically reduced. 
     A further development of the present invention allows, for example on the basis of the “hole diameter of a “micro via” relating to the distance between the “micro via” coating and the assembly coating, situated directly below the “micro via” coating, of the “printed circuit board assembly” condition, with typical hole diameters of between 50 μm and 150 μm, the ratio of the hole diameter to the layer spacing to be greater than 1, and requires soldering land diameters of between 0.12 mm and 0.35 mm. 
     As a result of another development of the present invention, a further reduction in the size of the printed circuit board design is possible because the RF circuit, which additionally can be applied to the “micro via” coating covering the first holes (“standard vias”), can be used to increase the packing density further. 
     Yet another development of the present invention ensures that, when the first holes in the “micro via” coating are covered, the micro-environment produced in the holes as a result of covering does not cause any blowing (explosion). 
    
    
     Additional features and advantages of the present invention are described in, and will be apparent from, the Detailed Description of the Preferred Embodiments and the Drawing. 
     DESCRIPTION OF THE DRAWING 
     FIG. 1 shows a known printed circuit board which is used in a DECT mobile part; 
     FIG. 2 is a cross section illustration of the printed circuit board of FIG. 1; 
     FIG. 3 shows an enlarged three-dimensional view of the region drawn in dashed lines in FIG. 2; 
     FIG. 4 shows another known printed circuit board used in a DECT mobile part; 
     FIG. 5 is a cross section illustration of the printed circuit board of FIG. 4; 
     FIG. 6 shows a printed circuit board in accordance with the teachings of the present invention; 
     FIG. 7 shows an enlarged three-dimensional view of the region shown by dashed lines in FIG. 6; 
     FIG. 8 shows an alternative embodiment of a printed circuit board of the present invention; 
     FIG. 9 shows the dimensions of the printed circuit board of FIG. 8; and 
     FIG. 10 shows yet another embodiment of a printed circuit board of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 6 shows in accordance with the teachings of the present invention, a third printed circuit board LP 3 , which is modified from the circuit boards LP 1 , LP 2  by the use of MV technology in connection with the window technique matched to it and for production engineering reasons is preferably again fitted with components on one side. It is also possible for components to be fitted on both sides, however. This would make the dimensions of the printed circuit board LP 3  even smaller. As shown in the cross section illustration in FIG. 6, and by comparison with the printed circuit board assemblies LPT 1 , LPT 2  having the printed circuit board layers LPL 1  . . . LPL 4  in FIGS. 2 and 5, the printed circuit board LP 3  with a thickness of approximately  1400  μm has a multilayer third printed circuit board assembly LPT 3 , which includes four printed circuit board layers LPL 2  . . . LPL 5  and whose printed circuit board layers LPL 2  . . . LPL 5  are again preferably constructed using the known hybrid masslam process. Unlike the printed circuit boards LP 1 , LP 2  having the printed circuit board assemblies LPT 1 , LPT 2 , the outer coating on the top of the printed circuit board assembly LPT 3  and the outer coating on the underside of the printed circuit board assembly LPT 3  are each provided with a further printed circuit board layer LPL 1 , LPL 6 , constructed using MN technology. The printed circuit board assembly LPT 3  contains a third core K 3  having a thickness of approx. 360 m and having a ninth metal coating M 1   K3 (fourth printed circuit board layer LPL 4 ), which is arranged on the underside of the core K 3  and is preferably made of copper the third core K 3  also has a tenth metal coating M 2   K3  (third printed circuit board layer LPL 3 ) which is arranged on the top of the core K 3 , is preferably made of copper and is designed as the fourth RF ground coating MS 4   RF . The metal coatings M 1   K3 , M 2   K3  each have a third “prepreg” coating P 3 , with a thickness of in each case approximately 360 μm, arranged on them. The “prepreg” coating P 3  arranged on the metal coating M 1   K3  has, on the side opposite the metal coating M 1   K3 , an eleventh metal coating M 1   P3  (fifth printed circuit board layer LPL 5 ), preferably made of copper and, on the side opposite the metal coating M 2   K3 , a twelfth metal coating M 2   P3  (second printed circuit board layer LPL 2 ), preferably made of copper. 
     The metal coatings M 1   P3 , M 2   P3  each have a first “micro via” coating MV 1 , with a thickness of in each case approximately 50 μm, arranged on them. The “micro via” coating MV 1  arranged on the metal coating M 1   P3  has, on the side opposite the metal coating M 1   P3 , a thirteenth metal coating M 1   MV1  (sixth printed circuit board layer LPLG) which is preferably made of copper and, on the side opposite the metal coating M 2   P3 , a fourteenth metal coating M 2   MV1 , (first printed circuit board layer LPL 1 ), preferably made of copper. The first printed circuit board layer LPL 1  has a critical third RF conductor-track structure LBS 3   RF  for example, arranged in it, whilst the second printed circuit board layer LPL 2  is provided with a second non-RF conductor-track structure LBS 2   NRF  and/or a second non-RF circuit interconnection SVD 2   NRF , for example. To protect the RF conductor-track structure LBS 3   RF  in relation to the RF ground coating MS 4   RF  in the third printed circuit board layer LPL 3  against the influence of the non-RF conductor-track structure LBS 2   NRF  and/or the non-RF circuit interconnection SVD 2   NRF  the second printed circuit board layer LPL 2  is provided with a second barrier area SB 2 , which largely surrounds third field lines FL 3  of the RF signal. 
     The RF conductor-track structure LBS 2   RF  also be may, alternatively or additionally, arranged in the second printed circuit board layer LPL 2 , the fifth printed circuit board layer LPL 5  and/or the sixth printed circuit board layer LPL 6 . In the latter instance, the barrier area would logically have to be situated in the fifth printed circuit board layer LPL 5 . In the first two instances, the barrier areas would be situated in the first printed circuit board layer LPL 1  and in the sixth printed circuit board layer LPL 6 , respectively. 
     Furthermore, the printed circuit board assembly LPT 3  has first through holes DB 1   LPT3  for RF connections and non-RF connections between the first printed circuit board layer LPL 1  and the sixth printed circuit board layer LPL 6 , as well as second through holes DB 2   LPT3  for connecting external modules (e.g. earpiece, microphone etc.). If, in particular, the through holes DB 1   LPT3  as illustrated remain open, then these holes leak RF radiation (undesirable effect) produced by the RF circuits and RF conductor-track structures on the printed circuit board. FIG. 7 shows an enlarged three-dimensional illustration of the region shown by dashed lines in FIG.  6 . 
     FIG. 8 shows a fourth printed circuit board LP 4 , which is slightly modified from the printed circuit boards LP 3  in FIG. 6 and, for production engineering reasons, is preferably again fitted with components on one side. Once components can be fitted on both sides here. As shown in the cross section illustration in FIG.  8  and by comparison with the printed circuit board assembly LPT 3  in FIG. 6, the printed circuit board LP 4  with a thickness of approximately 1400 μm has a multilayer fourth printed circuit board assembly LPT 4 , which again includes the four printed circuit board layers LPL 2  . . . LPL 5  and which is again preferably constructed using the known hybrid masslam process, and has the two printed circuit board layers LPL 1 , LPL 6  constructed using MV technology. 
     The printed circuit board layer LPL 1  is situated on the outer coating on the top of the printed circuit board assembly LPT 4 , whilst the printed circuit board layer LPL 6  is situated on the outer coating on the underside of the printed circuit board assembly LPT 4 . The printed circuit board assembly LPT 4  then contains a fourth core K 4  having a thickness of approximately 360 μm and having a fifteenth metal coating M 1   K4  (fourth printed circuit board layer LPL 4 ), which is arranged on the underside of the core K 4  and is preferably made of copper. The fourth core K 4  also has a sixteenth metal coating M 2   K4  (third printed circuit board layer LPL 3 ) which is arranged on the top of the core K 4 , is preferably made of copper, and is designed as the fifth RF ground coating MS 5   RF . The metal coatings M 1   K4 , M 2   K4  each have a fourth “prepreg” coating P 4 , with a thickness of in each case approximately 360 μm, arranged on them. The “prepreg” coating P 4  arranged on the metal coating M 1   K4  has, on the side opposite the metal coating M 1   K4 , a seventeenth metal coating M 1   P4  (fifth printed circuit board layer LPL 5 ), preferably made of copper and, on the side opposite the metal coating M 2   K4 , an eighteenth metal coating M 2   P4  (second printed circuit board layer LPL 2 ), preferably made of copper. The metal coatings M 1   P4 , M 2   P4  each have a second “micro via” coating MV 2  having a thickness of in each case approximately 50 μm, arranged on them. The “micro via” coating MV 2  arranged on the metal coating M 1   P4  has, on the side opposite the metal coating M 1   P4 , a nineteenth metal coating M 1   MV2  (sixth printed circuit board layer LPL 6 ), preferably made of copper and, on the side opposite the metal coating M 2   P4 , a twentieth metal coating M 2   MV2  (first printed circuit board layer LPL 1 ), preferably made of copper. The first printed circuit board layer LPL 1  has a critical fourth RF conductor-track structure LBS 4   RF , for example, arranged in it, whilst the second printed circuit board layer LPL 2  is provided with a third non-RF conductor-track structure LBS 3   NRF  and/or a third non-RF circuit interconnection SVD 3   NRF , for example. To protect the RF conductor-track structure LBS 4   RF  in relation to the RF ground coating MS RF  in the third printed circuit board layer LPL 3  against the influence of the non-RF conductor-track structure LBS 3   NRF  and/or the non-RF circuit interconnection SVD 3   NRF , the second printed circuit board layer LPL 2  is provided with a third barrier area SB 3 , which largely surrounds fourth field lines FL 4  of the RF signal. 
     The RF conductor-track structure LBS 4   RF  also may be, again alternatively or additionally, arranged in the second printed circuit board layer LPL 2 , the fifth printed circuit board layer LPL 5  and/or the sixth printed circuit board layer LPL 6 . In the latter instance, the barrier area would logically have to be situated in the fifth printed circuit board layer LPL 5 . In the first two instances, the barrier areas would be situated in the first printed circuit board layer LPL 1  and in the sixth printed circuit board layer LPL 6 , respectively. 
     Furthermore, the printed circuit board assembly LPT 4  has first through holes DB 1   LPT4  for RF connections and non-RF connections between the first printed circuit board layer LPL 1  and the sixth printed circuit board layer LPL 6 , as well as second through holes DB 2   LPT4  for connecting external modules (e.g. audio unit, microphone etc.). In contrast to the circumstances in FIG. 6, the through holes DB 1   LPT4  are as illustrated closed by the “micro via” coating MV 2  with the metal coating M 1   MV2  and with the metal coating M 2   MV2 . Whilst this measure creates additional space for RF circuits and RF conductor-track structures on the metal coating M 2   MV2  (further increasing the packing density), the fact that the metal coating M 1   MV2  is designed as a continuous ground coating means that the holes are made “impervious to RF” on the metal coating M 1   MV2 , so that no RF radiation produced by the RF circuits and RF conductor-track structures on the printed circuit board can now leak from this part of the lacuna hole opening. Since an RF circuit or an RF conductor-track structure is placed over the other hole opening, the RF radiation leaking from this is not critical. 
     So that the hole DB LPT4  covered in this way does not blow out when covered, as a result of the micro-environment this produces in the hole, the hole is preferably filled up with a filling material Fm. 
     FIG. 9 shows the dimensions, which can be achieved in this way, of the printed circuit board LP 4 . 
     FIG. 10 shows a fifth printed circuit board LP 5 , which is slightly modified from the printed circuit board LP 3  in FIG.  6  and the printed circuit board LP 4  in FIG. 8 and, for production engineering reasons, is preferably again fitted with components on one side. It is again also possible for components to be fitted on both sides here. As shown in the cross sectional illustration in FIG. 10, and by comparison with the multilayer third printed circuit board assembly LPT 3 , including the six printed circuit board layers LPL 1  . . . LPL 6 , in FIG.  6  and the fourth printed circuit board assembly LPT 4  in FIG. 8, the printed circuit board LP 5  has a multilayer fifth printed circuit board assembly LPT 5 , which includes four printed circuit board layers LPL 1  . . . LPL 4 , again has a thickness of approximately 1400 μm and whose printed circuit board layers LPL 2  . . . LPL 3  are again preferably constructed using the known hybrid masslam process, whilst the printed circuit board layers LPL 1 , LPL 4  are constructed using MV technology. 
     Unlike the printed circuit board assemblies LPT 3 , LPT 4 , the printed circuit board assembly LPT 5  includes a single assembly coating. This makes it possible to reduce production costs in terms of the design of the printed circuit board assembly. The printed circuit board assembly LPT 5  contains a fifth “prepreg” coating P 5 , with a thickness of approximately 620 μm. This “prepreg” coating P 5  has, on the underside of the “prepreg” coating P 5 , a twenty-first metal coating M 1   P5  (third printed circuit board layer LPL 3 ), which is preferably made of copper and is designed as the sixth RF ground coating MS 6   RF . The “prepreg” coating P 5  also has on its top a twenty-second metal coating M 2   P5  (second printed circuit board layer LPL 2 ), preferably made of copper. The metal coating M 1   P5 , M 2   P5  has a respective third “micro via” coating MV 3 , with a thickness of, in each case, approximately 50 μm, arranged on it. The “micro via” coating MV 3  arranged on the metal coating M 1   P5  has, on the side opposite the metal coating M 1   P5 , a twenty-third metal coating M 1   MV3  (sixth printed circuit board layer LPL 4 ), preferably made of copper and, on the side opposite the metal coating M 2   P5  (first printed circuit board layer LPL 1 ), preferably made of copper. The first printed circuit board layer LPL 1  has a critical fifth RF conductor-track structure LBS 5   RF , for example, arranged on it, whilst the second printed circuit board layer LPL 2  is provided with a fourth non-RF conductor-track structure LBS 4   NRF  and/or a fourth non-RF circuit interconnection SVD 4   NRF , for example. To protect the RF conductor-track structure LBS 5 RF in relation to the RF ground coating MS 6   RF  int he third printed circuit board layer LPL 3  against the influence of the non-RF conductor-track structure LBS 4   NRF  and/or the non-RF circuit interconnection SVD 4   NRF , the second printed circuit board layer LPL 2  is provided with a fourth barrier area SB 4 , which amply surrounds fourth field lines FL 5  of the RF signal. 
     The RF conductor-track structure LBS 4   RF  also may be, again alternatively or additionally, arranged in the second printed circuit board layer LPL 2 , the third printed circuit board layer LPL 3  and/or the fourth printed circuit board layer LPL 4 . In the latter instance, the barrier area logically would have to be situated int he third printed circuit board layer LPL 3 . In the first two instances, the barrier areas would be situated in the first printed circuit board layer LPL 1  and in the fourth printed circuit board layer LPL 4 , respectively. 
     Furthermore, the printed circuit board assembly LPT 5  has first through holes DB 1   LPTS  for RF connections and non-RF connections between the first printed circuit board layer LPL 1  and the fourth printed circuit board layer LPL 4 , as well as second through holes DB 2   LPTS  for connecting external modules (e.g. audio unit, microphone, etc.). In contrast to the circumstances in FIG. 6, and in line with the circumstances in FIG. 8, the through holes DB 1   LPTS  are as illustrated closed by the “micro via” coating MV 3  with the metal coating M 1   MV3  and with the metal coating M 2   MV3 . Whilst this measure creates additional space for RF circuits and RF conductor-track structures on the metal coating M 2   MV3  (Fourth increase in the packing density), the fact that the metal coating M 1   MV3  is designed as a continuous ground coating means that the holes are made “impervious to RF” on the metal coating M 1   MV3 , so that no RF radiation produced by the RF circuits and RF conductor-track structures on the printed circuit board can now leak from this part of the hole opening. Since an RF circuit or an RF conductor-track structure is placed over the other hole opening, the RF radiation leaking from this is not critical. 
     So that the hole DB LPT4  covered in this way does not blow when covered as a result of the microconditioning this produces in the hole, the hole is preferably filled up with the filling material FM. 
     Although the present invention has been described with reference to specific embodiments, those of skill in the art will recognize that changes may be made thereto without departing from the spirit and scope of the invention as set forth in the hereafter appended claims.