Abstract:
A method and apparatus to square an element A when a defining polynomial of a finite field GF(2 n ) is expressed as  
           f   ⁡     (   x   )       =       x   n     +       ∑     i   =   1     i     ⁢           ⁢     x     k   1         +   1       ,       
 
and the element A contained in the finite field is expressed as A−(a 0 ,a 1 ,a 2  . . . ,a n−1 )∈GF( 2   n ). The method determines coefficients m i , I ij , V 0 , V ij , and V such that the coefficient mi satisfies a predetermined condition with respect to k i  when  1≦ i≦t is a natural number, I ij  depends on n, k i , and j when  2≦j≦m   i , V 0  and V ij  of n bits, respectively, depend on n, I ij , and k i , and obtains the coefficient V with respect to m i  according to the following formula  
                 V   i     =       ⁢       V   i2     ⊕     V   i3     ⊕   …   ⊕     V   im         ,               V   =       ⁢       V   0     ⊕       ∑       m   1     ≠   0       ⁢           ⁢     V   i                   
 
determines a coefficient s i  according to k i  and n and cyclically shifts the coefficient V by s i ; performing an XOR operation on the cyclically shifted coefficient V and the element A; and rewires a result of the XOR operation in a predetermined order and outputs results of the squaring.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS  
       [0001]     This application claims the benefit of Korean Patent Application Nos. 2003-38684, filed on Jun. 16, 2003 and 2003-77329, filed on Nov. 3, 2003, in the Korean Intellectual Property Office, the disclosures of which are incorporated herein by reference.  
       BACKGROUND OF THE INVENTION  
       [0002]     1. Field of the Invention  
         [0003]     The present invention relates to a method and apparatus to perform a squaring operation in a finite field.  
         [0004]     2. Description of the Related Art  
         [0005]     A finite field GF(2 n ) is a number system containing 2 n  elements. Based on the fact that each element of the finite field GF(2 n ) can be represented by n bits, practical applications of the finite field can be accomplished. Practical applications, such as hardware implementation of error correction codes and elliptic curve cryptosystems, frequently perform calculations in GF(2 n ). An apparatus for encoding/decoding Reed-Solomon codes performs calculations in GF(2 n ), and an encryption/decryption apparatus of an elliptic curve cryptosystem performs calculations in GF(2 n ) where “n” is a large value.  
         [0006]     The addition and multiplication rules of GF(2), which contain only binary numbers 0 and 1, are defined by Formula (1). 
 
0+0=1+1=0 
 
0+1=1+0=1 
 
0×0=1×0=0×1=0 
 
1×1=1 
 
         [0007]     Here, binary addition is a bitwise exclusive OR (referred to as XOR hereinafter) operation, and binary multiplication is a bitwise AND (referred to as AND hereinafter) operation.  
         [0008]     Since the finite field GF(2 n ) (n&gt;1) is a number system containing 2 n  elements, addition and multiplication correspond to arithmetic modulo of an irreducible n-degree polynomial having coefficients in GF(2). The irreducible n-degree polynomial is referred to as a defining polynomial of the finite field. When a root of the defining polynomial is α, an element of the finite field has a standard representation given by Formula (2). 
 
 a   0   +a   1   a+a   2   a   2   + . . . +a   n−1   a   n−1 =( a   0   ,a   1   ,a   2   , . . . , a   n−1 ),  a   i   ∈GF (2)   (2) 
 
         [0009]     Multiplication of two elements in the finite field GF(2 n ) is given by polynomial multiplication of a and then modulo operation by the defining polynomial. Addition of two elements of the finite field GF(2n) is performed by polynomial addition of α.  
         [0010]     Assume that the defining polynomial of the finite field GF(2 n ) is expressed as shown in Formula (3) and α is a root of the defining polynomial.  
               f   ⁡     (   x   )       =       x   n     +       ∑     i   =   1     t     ⁢           ⁢     x     k   1         +   1             (   3   )             
 
 where n is an arbitrary natural number, 0&lt;t, and k i &lt;n. 
 
         [0012]     If an element A of the finite field is expressed as A=(a 0 ,a 1 ,a 2 , . . . ,a n−1 )∈GF(2 n ), the square of the element A is determined by polynomial multiplication of a and then modulo operation by the polynomial f(α). 
 
 A   2 ≡( a   0   +a   1   a+a   2   a   2   + . . . +a   n−1   a   n−1 ) 2  mod  f ( a )   (4) 
 
         [0013]     Conventional techniques of performing a squaring operation as shown in Formula (4) will be explained below. Here, the size of hardware, namely, the number of gates, serves as a measure for area complexity, and gate delays of the hardware serve as a measure for time complexity. Cryptographic standards, such as SEC and ANSI X9.62, define coefficients necessary for the elliptic curve cryptosystems and recommend several coefficients in the finite field. The two standards are most widely used to determine coefficients in the finite field. Accordingly, the two standards are used as criteria in deciding wide applicability of the respective techniques. Here, n represents the dimension of the finite field.  
         [0014]     The invention by H. Wu entitled “Bit-parallel finite field multiplier and squarer using polynomial basis (IEEE Transactions on Computers, Vol. 51, No.7, pp. 750-758, 2002)” discloses an arrangement of squaring results for values of n and k when a defining polynomial is a trinomial given by x n +x k +1. Since the formula adopted by the Wu&#39;s invention is optimized, high efficiency in area and time complexity can be achieved. But, Wu&#39;s invention does not cover the case when the defining polynomial is a pentanomial.  
         [0015]     The invention by C. H. Kim et al. entitled “A new hardware architecture for operations in GF(2 n ) (IEEE Transactions on Computers, Vol. 51, No.1, pp. 90-92, 2002)” discloses that when n+1 is a prime number, 2∈Z n+1  is a primitive element in GF(2 n ), an anomalous basis is used, and a defining polynomial is an all-one polynomial (AOP), squaring can be achieved by rewiring, where rewiring means redefining relationships among elements and/or inserting new elements into a matrix. But, the pertinent n and the defining polynomial for Kim&#39;s invention are not found in the standards.  
         [0016]     The invention by K. Aoki et al. entitled “Scheme for arithmetic operations in finite field and group operations over elliptic curves realizing improved computational speed (U.S. Pat. Nos. 6,266,688 and 6,202,076, 2001)” discloses that when n is even and the finite field GF(2 n ) meets a condition of GF(2)&lt;GF(2 n/2 )&lt;GF(2 n ), arithmetic operations in the finite field GF(2 n ) can be performed using arithmetic operations in the finite field GF(2n/2), and suggests a square calculation device using the scheme. But when using the Aoki device, a way of representing the finite field is different from that in the standards, resulting in poor compatibility. Further, since most of “n”s in the standards are odd, the invention by K. Aoki et al. is rarely applicable.  
         [0017]     The invention by Lambert et al. entitled “Method and apparatus for implementing arithmetical operations in finite fields (EU Pat. No.1,076,284 A1, 2001)” performs a squaring operation using a cyclic basis. The cyclic basis is 1,a Δ ,a 2Δ ,a 3Δ , . . . ,a (m−1)Δ  where Δ, the smallest divisor of 2n−1, satisfies m=(2 n −1)/Δ≧n, Δ≧n. In this case, the squaring operation is implemented by rewiring. But the invention requires basis conversion, which is very complex since the factor Δ satisfying the above condition is fairly large.  
         [0018]     The invention by G. Orlando et al. entitled “Squaring architecture for GF(2n) and its application in cryptographic systems (Electronics Letters, Vol. 36, No.13, pp.1116-1117, 2000)” discloses a method of dividing an element according to predetermined fundamentals and inputting the divided element to a multiplier. The squaring architecture includes 3.5 n gates as well as the multiplier. Accordingly, the invention by G. Orlando et al. is less efficient than the invention by H. Wu employing approximately n/2 gates.  
         [0019]     The invention by C. C. Wang et al. entitled “VLSI architectures for computing multiplications and inverses in GF(2m) (IEEE Transactions on Computers, Vol. C-34, No. 8, pp. 709-717, 1985)” utilizes a normal basis such that a squaring operation is implemented by rewiring. But basis conversion required by the invention is very complex.  
         [0020]     Accordingly, there is a demand for a method and apparatus for performing a squaring operation that does not require complex basis conversion and has low area and time complexity.  
       SUMMARY OF THE INVENTION  
       [0021]     The present invention provides a method and apparatus to perform a squaring operation in a finite field by defining coefficients necessary for the squaring operation using a defining polynomial of the finite field, performing exclusive OR (referred to as XOR hereinafter) operations on the defined coefficients, and rewiring results of the XOR operation.  
         [0022]     According to an aspect of the present invention, there is provided a method to perform a squaring operation on an element A when a defining polynomial of a finite field GF(2 n ) is expressed as  
         f   ⁡     (   x   )       =       x   n     +       ∑     i   =   1     t     ⁢           ⁢     x     k   1         +   1         
 
 where n is odd, and the element A contained in the finite field is expressed as A=(a 0 ,a 1 ,a 2 , . . . ,a n−1 )∈GF(2 n ), the method comprising: determining predefined coefficients m i , I ij , V 0 , V ij , and V, such that the coefficient m i  satisfies a predetermined condition with respect to k i  when 0≦i≦t is a natural number, the coefficient I ij  depends on n, k i , and j when 2≦j≦m i , the coefficients V 0  and V ij  of n bits, respectively, depend on n, I ij , and k i , and obtaining the coefficient V with respect to m i  according to the following formula;  
                   V   i     =       ⁢       V   i2     ⊕     V   i3     ⊕   …   ⊕     V   im         ,               V   =       ⁢       V   0     ⊕       ∑       m   1     ≠   0       ⁢           ⁢     V   i                 ;       
 
 determining a predefined coefficient s i  according to k i  and n and cyclically shifting the coefficient V by s i ; performing XOR operations on the cyclically shifted coefficient V and the element A; and rewiring a result of the XOR operations in a predefined order and outputting results of the squaring operation. 
 
         [0025]     According to another aspect of the present invention, there is provided an apparatus to perform a squaring operation on an element A when a defining polynomial of a finite field GF(2 n ) is expressed as  
         f   ⁡     (   x   )       =       x   n     +       ∑     i   =   1     t     ⁢           ⁢     x     k   1         +   1         
 
 where n is odd, and the element A of the finite field is expressed as A=(a 0 ,a 1 ,a 2 , . . . ,a n−1 )∈GF(2 n ), the apparatus comprising: a coefficient calculating unit, which calculates coefficients necessary for the squaring operation by: determining predefined coefficients m i , I ij , V 0 , V i , and V such that the coefficient ml satisfies a predetermined condition with respect to k i  when 0≦i≦t is a natural number, the coefficient I ij  depends on n, k i , and j when 2≦j≦m i , the coefficients V 0  and V ij  of n bits, respectively, depend on n, I ij , and k i , and obtaining the coefficient V with respect to m i  according to the following formula;  
                   V   i     =       ⁢       V   i2     ⊕     V   i3     ⊕   …   ⊕     V   im         ,               V   =       ⁢       V   0     ⊕       ∑       m   1     ≠   0       ⁢           ⁢     V   i                 ;       
 
 and determining a predefined coefficient s i  according to k i  and n and cyclically shifting the coefficient V by s i ; an XOR operating unit, which includes a plurality of XOR gates and performs XOR operations on input A according to results of the calculated coefficient unit; and a rewiring unit, which rewires outputs of the XOR operating unit in a predefined order and outputs final results of the squaring operation. 
 
         [0028]     According to still another aspect of the present invention, there is provided a method to perform a squaring operation on an element A when a defining polynomial of a finite field GF(2 n ) is expressed as  
         f   ⁡     (   x   )       =       x   n     +       ∑     i   =   1     t     ⁢           ⁢     x     k   1         +   1         
 
 where n is even, and the element A of the finite field is expressed as A=(a 0 ,a 1 ,a 2 , . . . ,a n−1 )∈GF(2 n ), the method comprising: determining predefined coefficients m i , I ij , V 0 , V ij , and V, such that the coefficient m i  satisfies a predetermined condition with respect to k i  when 1≦i≦t is a natural number, the coefficient I ij  depends on n, k i , and j when 2≦j≦m i , the coefficients V 0  and V ij  of n bits, respectively, depend on n, I ij , and k i , and obtaining the coefficient V with respect to m i  according to the following formula;  
                   V   i     =       ⁢       V   i2     ⊕     V   i3     ⊕   …   ⊕     V   im         ,               V   =       ⁢       V   0     ⊕       ∑       m   1     ≠   1       ⁢           ⁢     V   i                 ;       
 
 determining a predefined coefficient s i  according to k i  and n and cyclically shifting the coefficient V by s i  according to a predetermined formula; obtaining an element {overscore (A)} from the element A and performing XOR operations on the cyclically shifted coefficient V with the element {overscore (A)}; and rewiring a result of the XOR operations in a predefined order and outputting results of the squaring operation. 
 
         [0031]     According to yet another aspect of the present invention, there is provided an apparatus to perform a squaring operation on an element A when a defining polynomial of a finite field GF(2 n ) is expressed as  
         f   ⁡     (   x   )       =       x   n     +       ∑     i   =   1     t     ⁢           ⁢     x     k   1         +   1         
 
 where n is even, and the element A of the finite field is expressed as A=(a 0 ,a 1 ,a 2 , . . . ,a n−1 )∈GF(2 n ), the apparatus comprising: a coefficient calculating unit, which calculates coefficients necessary for the squaring operation by: determining predefined coefficients m i , I ij , V 0 , V ij , and V such that the coefficient m i  satisfies a predetermined condition with respect to k i  when 1≦i≦t is a natural number, the coefficient I ij  depends on n, k i , and j when 2≦j≦m i , the coefficients V 0  and V ij  of n bits, respectively, depend on n, I ij , and k i , and obtaining the coefficient V with respect to m i  according to the following formula; and  
         V   i     =       V   i2     ⊕     V   i3     ⊕   ⋯   ⊕     V     im   i             
       V   =       V   0     ⊕       ∑       m   i     ≠   0       ⁢     V   i             
 
 determining a predetermined coefficient s i  according to k i  and n and cyclically shifting the coefficient V by s i  according to a predetermined formula; an XOR operating unit, which includes a plurality of XOR gates, and which obtains an element {overscore (A)} from the input element A according to a second predetermined formula, and performs XOR operations on results of the cyclic shift operation received from the coefficient calculating unit with the element {overscore (A)}; and a rewiring unit, which rewires an output of the XOR operating unit and outputs final results of the squaring operation. 
 
         [0034]     Additional aspects and/or advantages of the invention will be set forth in part in the description which follows, and in part, will be obvious from the description, or may be learned by practice of the invention. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0035]     These and/or other aspects and advantages of the invention will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:  
         [0036]      FIG. 1  is a block diagram of an apparatus to perform a squaring operation in a finite field according to a first embodiment of the present invention;  
         [0037]      FIG. 2  illustrates an implementation result of Formula (23) using a plurality of exclusive OR gates and a rewiring unit;  
         [0038]      FIG. 3  illustrates an implementation result of Formula (27) using a plurality of XOR gates and a rewiring unit;  
         [0039]      FIG. 4  illustrates a result obtained after reducing a number of the XOR gates of  FIG. 3 ;  
         [0040]      FIG. 5  is a block diagram of an apparatus to perform a squaring operation in a finite field according to a second embodiment of the present invention;  
         [0041]      FIG. 6  illustrates an implementation result of Formula (42) using a plurality of XOR gates and a rewiring unit;  
         [0042]      FIG. 7  is a table illustrating a comparison of area and time complexity between the conventional art and embodiments of the present invention;  
         [0043]      FIG. 8  is a table illustrating a comparison of area and time complexity in three finite fields defined by SEC standards between the conventional art and an embodiment of the present invention; and  
         [0044]      FIG. 9  is a table illustrating a comparison of applicability to the standards, basis conversion, and problem between the conventional art and an embodiment of the present invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0045]     Reference will now be made in detail to the embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout. The embodiments are described below to explain the present invention by referring to the figures.  
         [0046]      FIG. 1  is a block diagram of an apparatus to perform a squaring operation in a finite field GF(2 n ) according to a first embodiment of the present invention when n is odd. Referring to  FIG. 1 , the apparatus includes a coefficient calculating unit  10 , an XOR operating unit  12 , and a rewiring unit  14 .  
         [0047]     The coefficient calculating unit  10  calculates coefficients necessary for the squaring operation of a defining polynomial. The XOR operating unit  12  performs XOR operations on coefficients output from the coefficient calculating unit  10 . The rewiring unit  14  rewires outputs of the XOR operating unit  12  and outputs final coefficients of the squaring operation.  
         [0048]     The operation of the apparatus to perform the squaring operation when n is odd will now be explained in further detail.  
         [0049]     Assume that the defining polynomial of GF(2 n ) is defined by Formula (5).  
               f   ⁡     (   x   )       =       x   n     +       ∑     i   =   1     t     ⁢     x     k   i         +   1             (   5   )             
 
         [0050]     If an element A of the finite field is expressed as A=(a 0 ,a 1 ,a 2 , . . . ,a n−1 )∈GF(2 n ), the square A 2  of the element A may be expressed by Formula (6).  
                     A   2     ≡       ⁢         (       a   0     +       a   1     ⁢   α     +       a   2     ⁢     α   2       +   ⋯   +       a     n   -   1       ⁢     α     n   -   1           )     2     ⁢   mod   ⁢           ⁢     f   ⁡     (   α   )                     =       ⁢       c   0     ⁢     c   1     ⁢     c   2     ⁢           ⁢   ⋯   ⁢           ⁢     c     n   -   1                     =       ⁢   C                 (   6   )             
 
         [0051]     The square A 2  directs to a vector C, which also belongs to GF(2 n ).  
         [0052]     In Formula (5), x n +1 and  
         ∑     i   =   1     t     ⁢     x     k   i           
 
 add up to the defining polynomial f(x), and area and time complexity of a multiplier are determined by n, t, and k i . 
 
         [0054]     Coefficients m i , I ij , I, V 0 , V ij , and V, necessary for obtaining the components of the vector C, are defined as follows.  
         [0055]     If k i =1 for i=1,2, . . . ,t, the coefficient m i =0.  
         [0056]     If k i  satisfies the following Formula (7)  
                     (     r   -   2     )     ⁢   n     +   1       r   -   1       &lt;     k   i     ≤           (     r   -   1     )     ⁢   n     +   1     r             (   7   )             
 
 where r≧2 is an integer, it is defined that the coefficient m i =r. When m i  is not 0, the coefficient I ij  (i=1,2, . . . ,t, and j=2,3, . . . , m i ) is defined by Formula (8).  
               I   ij     =         n   -   1     2     -     ⌊       (     j   -   1     )     ⁢       n   -     k   i       2       ⌋               (   8   )             
 
         [0058]     If k i  is even, the coefficient I is defined by Formula (9). 
 
 I =max{ I   i2   |k   i : even}   (9) 
 
         [0059]     If k i  is not even, the coefficient I=0.  
         [0060]     The coefficient V 0  is defined by Formula (10).  
               V   0     =         a       n   +   1     2       ⁢     a       n   +   3     2       ⁢           ⁢   ⋯   ⁢           ⁢     a     n   -   1       ⁢   00   ⁢           ⁢   ⋯   ⁢           ⁢   0       ︸     n   ⁢           ⁢   bits                 (   10   )             
 
         [0061]     The coefficient V ij  is defined as follows when m i ≠0. Both when k i  is odd and when k i  is even and j is odd, the coefficient V ij  is defined by Formula (11).  
               V   ij     =         a     n   -     l   ij         ⁢     a     n   -     l   ij     +   1       ⁢           ⁢   ⋯   ⁢           ⁢     a     n   -   1       ⁢   00   ⁢           ⁢   ⋯   ⁢           ⁢   0       ︸     n   ⁢           ⁢   bits                 (   11   )             
 
         [0062]     When both k i  and j are even, the coefficient V ij  is defined by Formula (12).  
               V   ij     =         0   ⁢           ⁢   ⋯   ⁢           ⁢   0       ︸         n   -   1     2     ⁢   bits         ⁢           ⁢         a     n   -     l   ij         ⁢     a     n   -     l   ij     +   1       ⁢           ⁢   ⋯   ⁢           ⁢     a     n   -   1       ⁢   00   ⁢           ⁢   ⋯   ⁢           ⁢   0       ︸         n   +   1     2     ⁢   bits                   (   12   )             
 
         [0063]     The coefficient calculating unit  10  obtains the coefficients V i  and V from the already obtained coefficients by Formula (13).  
                 V   i     =       V   i2     ⊕     V   i3     ⊕   ⋯   ⊕     V     im   i           ⁢     
     ⁢     V   =       V   0     ⊕       ∑       m   i     ≠   0       ⁢     V   i                   (   13   )             
 
         [0064]     Next, a coefficient s i  dependent on k i  (i=1,2, . . . ,t) is defined by Formula (14).  
               s   i     =     {               k   i     +   1     2               k   i     ⁢      :     ⁢   odd     ,                   k   i     +   1   +   n     2             k   i     ⁢      :     ⁢   even                     (   14   )             
 
         [0065]     A cyclic shift operation is performed on the coefficient V for respective s i  through s t  obtained from Formula (14), XOR operations are performed on results of the cyclic shift operation, and one more XOR operation is performed with the element A. A result C′ of the XOR operations may be expressed by Formula (15). 
 
 C′=A ⊕( V&gt;&gt;s   1 )⊕ . . . ⊕( V&gt;&gt;s   t )   (15) 
 
         [0066]     The result C′ obtained from Formula (15) is represented as an XOR operation formula on the element A. The XOR operating unit  12  performs the XOR operation according to Formula (15).  
         [0067]     If the result C′ obtained from Formula (15) is expressed as C′=c 0 ′c 1 ′ . . . c n−1 ′, c i  of the square A 2 =c 0   c   1 ′ . . . c n−1  is obtained from the result C′ by Formula (16) 
 
 c   i   =c   j ′( i ≡ 2 j  mod  n )   (16) 
 
         [0068]     The rewiring unit  14  rewires the results obtained from Formula (15) according to Formula (16) and outputs final results of the squaring operation.  
         [0069]     The area and time complexity of the apparatus constructed as above are calculated as follows. The apparatus according to the first embodiment performs only XOR operations. The number of times the XOR operations are performed is given by Formula (17).  
                   -   l     +       ∑       m   i     ≠   0       ⁢     l   i2       +     l   i3     +   ⋯   +     l     im   i           ︸     step   ⁢           ⁢   1         ≥       +       t   ⁡     (         n   -   1     2     +   l     )         ︸     step   ⁢           ⁢   2           +     0     ︸     step   ⁢           ⁢   3                   (   17   )             
 
         [0070]     Since the third operation only requires the rewiring operation, no XOR operations are performed in the third operation. In particular, when t=1, that is, when the defining polynomial is a trinomial, if k 1  satisfies Formula (18),  
             1   &lt;     k   1     ≤       n   +   1     2             (   18   )             
 
 then the number of XOR operations performed is given by Formula (19).  
             {                 k   1     -   1       2     ︸     step   ⁢           ⁢   1           +       n   -   1       2     ︸     step   ⁢           ⁢   2                       k   1     ⁢      :odd       ,                 0     ︸     step   ⁢           ⁢   1         +           n   -   1     2     +       k   1     2         ︸     step   ⁢           ⁢   2                   k   1     ⁢      :even                     (   19   )             
 
         [0072]     It is difficult to explain the time complexity of the apparatus exactly. Thus, a case of the worst time complexity can be explained. Since the squaring apparatus according to the first preferred embodiment of the present invention employs only XOR gates, gate delays can serve as a measure of the time complexity. The maximum delay due to the XOR gates is determined by Formula (20).  
             ⌈       log   2     ⁡     (     1   +   t   +       ∑       m   i     ≠   0       ⁢     (       m   i     -   1     )         )       ⌉           (   20   )             
 
         [0073]     Particularly, when t=1 and k i  satisfies Formula (18), an XOR gate delay is expressed by Formula (21).  
             {         2             k   1     ⁢      :odd       ,             1           k   1     ⁢      :even                     (   21   )             
 
         [0074]     As an example, calculation results of the coefficients and the complexity will now be explained when n=11, in the first embodiment. When the defining polynomial is expressed as X 11 +X 2 +1, t=1 and k 1 =2. Coefficients necessary for the squaring operation are determined from the n, t, and k i  as follows. According to Formulae (7) through (11), m 1 =2, I 12 =1, I=1, V 0 =a 6 a 7 a 8 a 9 a 10 000000, and V 12 =00000a 10 00000. Using the coefficients m 1 , I 12 , I, V 0 , and V 12 , V 1 =00000a 10 00000 and V=a 6 a 7 a 8 a 9 a 10 a 10 00000 are obtained according to Formula (13).  
         [0075]     The coefficient s 1  is determined as s 1 =7 according to Formula (14). According to Formula (15), the vector C′ is determined by Formula (22).  
               C   ′     =       ⁢     A   ⊕     (     V   ⪢   7     )                   =       ⁢     A   ⊕       a   10     ⁢     a   10     ⁢   00000   ⁢     a   6     ⁢     a   7     ⁢     a   8     ⁢     a   9                     =       ⁢       (       a   0     ⊕     a   10       )     ⁢     (       a   1     ⊕     a   10       )     ⁢     a   2     ⁢     a   3     ⁢     a   4     ⁢     a   5     ⁢       a   6     ⁡     (       a   7     ⊕     a   6       )                         ⁢       (       a   8     ⊕     a   7       )     ⁢     (       a   9     ⊕     a   8       )     ⁢     (       a   10     ⊕     a   9       )                 
 
         [0076]     If the rewiring operation with respect to C′ is implemented according to Formula (14), the square A 2 =c 0 c 1 c 2  . . . c 9 c 10  is obtained by Formula (23). 
 
A 2 =( a   0   ⊕a   10 ) a   6 ( a   1   ⊕a   10 )( a   7   ⊕a   6 ) a   2 ( a   8   ⊕a   7 ) a   3 ( a   9   ⊕a   8 ) a   4 ( a   10   ⊕a   9 ) a   5    (23) 
 
         [0077]      FIG. 2  illustrates an implementation result of Formula (23) obtained using a plurality of XOR gates  21  and a rewiring unit  22 .  
         [0078]     Referring to  FIG. 2 , the squaring apparatus includes six XOR gates contributing to area complexity, and has one gate delay contributing to time complexity.  
         [0079]     For another example, the case where the defining polynomial is x 11 +x 4 +x 2 +x+1 will now be explained. According to the defining polynomial, t=3, k 1 =1, k 2 =2, and k 3 =4.  
         [0080]     Coefficients obtained from t, k 1 , k 2 , and k 3  are expressed by Formula (24). 
 
m 1 =0, m 2 =m 3 =2 
 
l 22 =1, l 32 =2 
 
l=2 
 
V 0 =a 6 a 7 a 8 a 9 a 10 000000 
 
V 22 =00000a 10 00000, V 32 =00000a 9 a 10 0000   (24) 
 
         [0081]     From the coefficients of Formula (24), V 2 =00000a 10 00000 and V 3 =00000a 9 a 10 0000 are obtained. The coefficient V is determined by Formula (25). 
 
 V=a   6   a   7   a   8   a   9 ( a   10   ⊕a   9 ) a   10 00000   (25) 
 
         [0082]     According to Formula (14), it is determined that s i =1, s 2 =7, and s 3 =8. Accordingly, vector C′ is determined by Formula (26).  
                     C   ′     =       ⁢     A   ⊕     (     V   ⪢   1     )     ⊕     (     V   ⪢   7     )     ⊕     (     V   ⪢   8     )                   =       ⁢       (       a   0     ⊕     a   9     ⊕     a   10       )     ⁢     (       a   1     ⊕     a   6     ⊕     a   10     ⊕     a   9     ⊕     a   10       )                       ⁢       (       a   2     ⊕     a   7     ⊕     a   9     ⊕     a   10     ⊕     a   10       )     ⁢     (       a   3     ⊕     a   8     ⊕     a   10       )                       ⁢       (       a   4     ⊕     a   9       )     ⁢     (       a   5     ⊕     a   10       )     ⁢     (       a   6     ⊕     a   9     ⊕     a   10       )     ⁢     (       a   7     ⊕     a   6     ⊕     a   10       )                       ⁢       (       a   8     ⊕     a   6     ⊕     a   7       )     ⁢     (       a   9     ⊕     a   7     ⊕     a   8       )     ⁢     (       a   10     ⊕     a   8     ⊕     a   9       )                     (   26   )             
 
         [0083]     If rewiring is performed according to Formula (16), the vector C (in other words, A 2 ) is obtained by Formula (27). 
 
 A   2 =( a   0   ⊕a   9   ⊕a   10 )( a   6   ⊕a   9   ⊕a   10 )( a   1   ⊕a   6   ⊕a   10 ⊕a 9   ⊕a   10 )( a   1   ⊕a   6   ⊕a   10 )( a   2   ⊕a   7   ⊕a   9   ⊕a   10   ⊕a   10 )( a   8   ⊕a   6   ⊕a   7 )( a   3   ⊕a   8   ⊕a   10 )( a   9   ⊕a   7   ⊕a   8 )( a   4   ⊕a   9 )( a   10   ⊕a   8   ⊕a   9 )( a   5   ⊕a   10 )   (27) 
 
         [0084]      FIG. 3  illustrates an implementation result of Formula (27) using a plurality of XOR gates  31  and a rewiring unit  32 .  FIG. 4  illustrates a result obtained with a reduced number of XOR gates  41 . For example, since a 10 ⊕a 10 =0 in a 1 ⊕a 6 ⊕a 10 ⊕a 9 ⊕a 10  corresponding to c 2  of the vector C of Formula (27), only a 1 ⊕a 6 ⊕a 9  needs to be performed. Accordingly, the number of the XOR gates can be reduced. For another example, when c 3 =a 8 ⊕a 6 ⊕a 7 , if a 7 ⊕a 6 , which also exists in c 3 =a 7 ⊕a 6 ⊕a 10 , is reused, the number of the XOR gates used in calculating c 5  can be further reduced.  FIG. 4  illustrates results obtained after reducing the number of the XOR gates  41  in the aforesaid manner.  
         [0085]      FIG. 5  is a block diagram of an apparatus to perform a squaring operation in a finite field GF(2 n ) according to a second embodiment of the present invention when n is even. The apparatus according to the second embodiment includes a coefficient calculating unit  50 , an XOR operating unit  52 , and a rewiring unit  54 .  
         [0086]     The coefficient calculating unit  50  calculates coefficients necessary for the squaring operation using a defining polynomial. The XOR operating unit  52  performs XOR operations on coefficients output from the coefficient calculating unit  50 . The rewiring unit  54  rewires the outputs of the XOR operating unit  52  and outputs final results of the squaring operation.  
         [0087]     The operation of the apparatus of the second embodiment will now be explained in further detail.  
         [0088]     If the defining polynomial of GF(2 n ) where n is even is defined by Formula (5) in the same manner as where n is odd, when an element A contained in the finite field is expressed as A=(a 0 ,a 1 ,a 2 , . . . ,a n−1 )∈GF(2 n ), the square A 2  of the element A may be expressed by Formula (6). The result C of the squaring operation in Formula (6) is also contained in GF(2 n ).  
         [0089]     Coefficients m i , I ij , I, V 0 , V ij , and V necessary for obtaining components of the vector C are defined as the follows.  
         [0090]     If k i =1 (i=1,2, . . . ,t), then it is set that m i =1.  
         [0091]     If k i  satisfies Formula (28)  
                     (     r   -   2     )     ⁢   n     +   1       r   -   1       &lt;     k   i     ≤           (     r   -   1     )     ⁢   n     +   1     r             (   28   )             
 
 when an integer r≧2, then the coefficient m i  is defined to be r. When m i ≠1 (i=1,2, . . . , t), the coefficient I ij  (j=2,3, . . . ,m i ) is defined by Formula (29).  
               l   ij     =       n   2     -       (     j   -   1     )     ⁢     n   2       +       ⌊       (     j   -   1     )     ⁢       k   i     2       ⌋     ⁢   T               (   29   )             
 
         [0093]     The coefficient V 0  is defined by Formula (30).  
               V   0     =         a     n   -     n   2         ⁢     a     n   -     n   2     +   1       ⁢   ⋯   ⁢           ⁢     a     n   -   1       ⁢   00   ⁢   ⋯0       ︸     n   ⁢           ⁢   bits                 (   30   )             
 
         [0094]     When m i ≠1 (i=1,2, . . . ,t) and k i  is even, or when m i ≠1 and both k i  and j are odd, then the coefficient V ij  (j=2,3, . . . ,m i ) is defined by Formula (31).  
               V   ij     =         a     n   -     l   ij         ⁢     a     n   -     l   ij     +   1       ⁢   ⋯   ⁢           ⁢     a     n   -   1       ⁢   00   ⁢   ⋯0       ︸     n   ⁢           ⁢   bits                 (   31   )             
 
         [0095]     On the other hand, when m i ≠1, k i  is odd, and j is even, then the coefficient V ij  is defined by Formula (32).  
               V   ij     =         0   ⁢   ⋯0       ︸       n   2     ⁢           ⁢   bits         ⁢         a     n   -     l   ij         ⁢     a     n   -     l   ij     +   1       ⁢   ⋯   ⁢           ⁢     a     n   -   1       ⁢   00   ⁢   ⋯0       ︸       n   2     ⁢           ⁢   bits                   (   32   )             
 
         [0096]     The coefficient calculating unit 50 outputs final calculation results represented by Formula (33), obtained from the coefficients m i , V 0 , and V ij  when m i ≠1.  
                     V   i     =       V   i2     ⊕     V   i3     ⊕   ⋯   ⊕     V     im   i                     V   =       V   0     ⊕       ∑       m   i     ≠   1               ⁢           ⁢     V   i                       (   33   )             
 
         [0097]     A coefficient s i  dependent on k i  (i=1,2, . . . ,t) is defined by Formula (34).  
               s   i     =     {               n   +     k   i     -   1     2     ⁢                       k   i     ⁢     :     ⁢           ⁢   odd     ,                 k   i     2             k   i     :           ⁢   even                     (   34   )             
 
         [0098]     Next, an element {overscore (A)} is defined by Formula (35).  
               A   _     =         (       a   0     ⊕     a     n   2         )     ⁢     (       a   1     ⊕     a       n   2     +   1         )     ⁢     ⋯   (       a       n   2     -   1       ⊕     a     n   -   1         )     ⁢   0   ⁢   ⋯0       ︸     n   ⁢           ⁢   bits                 (   35   )             
 
         [0099]     A shift operation marked by {overscore (&gt;&gt;)} is expressed by Formula (36).  
                           a   0     ⁢           ⁢   ⋯   ⁢           ⁢     a       n   2     -   1       ⁢     a     n   2       ⁢           ⁢   ⋯   ⁢           ⁢     a     n   -   1         ⁢        _       ⁢   s     =                       ⁢     {               a       n   2     -   s       ⁢           ⁢   ⋯   ⁢           ⁢     a       n   2     -   1       ⁢     a   0     ⁢           ⁢   ⋯   ⁢           ⁢     a       n   2     -   s   -   1       ⁢     a     n   -   s       ⁢           ⁢   ⋯   ⁢           ⁢   s     ≤       n   2     -   1                                     ⁢       a     n   -   1       ⁢     a     n   2       ⁢           ⁢   ⋯   ⁢           ⁢     a     n   -   s   -   1                                     a     n   -   s   -   1       ⁢           ⁢   ⋯   ⁢           ⁢     a     n   -   1       ⁢     a     n   2       ⁢           ⁢   ⋯   ⁢           ⁢     a     n   -   s   +     n   2     -   2       ⁢     a       n   2     -   s   +     n   2         ⁢           ⁢   ⋯   ⁢           ⁢   s     ≥     n   2                                     ⁢       a       n   2     -   1       ⁢     a   0     ⁢           ⁢   ⋯   ⁢           ⁢     a       n   2     -   s   +     n   2     -   1                                             (   36   )             
 
         [0100]     The shift operation is performed on the coefficient V according to Formula (36) with respect to s i  through s t  obtained from Formula (34), XOR operations are performed on results of the shift operation, and one more XOR operations is performed with the element {overscore (A)} of Formula (35). If the result C of the XOR operations may be expressed by Formula (37), then the result C′ obtained from Formula (37) is represented as an XOR operation formula with respect to the element A. The XOR operating unit  52  performs the XOR operation according to Formula (37). 
 
 C′={overscore (A)} ⊕( V{overscore (&gt;&gt;)}s   1 )⊕ . . . ⊕( V{overscore (&gt;&gt;)}s   t )   (37)
 
         [0101]     If the result C′ obtained from Formula (37) is expressed as C′=c 0 ′c 1 ′ . . . c n−1 ′, c n−1 ′, c i  of A 2 =c 0 c 1  . . . c n−1  is obtained from the result C′ according to Formula (38).  
               c   i     =     {           c   j   ′           (       i   ≡     2   ⁢   j       ⁣     ,     j   ≤       n   2     -   1           )               c   j   ′           (       i   =       2   ⁢   j     -   n   +   1       ,     j   ≥     n   2         )                     (   38   )             
 
         [0102]     The rewiring unit  54  rewires the results obtained from Formula (37) according to Formula (38), and outputs final results of the squaring operation.  
         [0103]     For example, the case where the defining polynomial is x 10 +x 4 +x 3 +x+1 will be explained below. According to the defining polynomial, t=3, k 1 =1, k 2 =3, and k 3 =4.  
         [0104]     Coefficients obtained from the t, k 1 , k 2 , and k 3  are expressed by Formula (39). 
 
m 1 =1, m 2 =m 3 =2 
 
l 22 =1, l 32 =2 
 
V 0 =a 5 a 6 a 7 a 8 a 9 00000 
 
V 22 =00000a 9 0000, V 32 =a 8 a 9 00000000   (39) 
 
         [0105]     According to Formula (33), V 2 , V 3 , and V are represented by Formula (40). 
 
V 2 =00000a 9 0000, V 3 =a 8 a 9 00000000 
 
 V= ( a   5   ⊕a   8 )( a   6   ⊕a   9 ) a   7   a   8   a   9 a 9 0000   (40) 
 
         [0106]     According to Formula (34), it is determined that s 1 =5, s 2 =6, and s 3 =2. According to Formulae 35 through 37, the result C′ is determined as shown in Formula (41).  
                               C   ′     =       ⁢       A   _     ⊕       (   V   ⁢        _       ⁢   5         )     ⊕       (   V   ⁢        _       ⁢   6       )     ⊕       (   V   ⁢        _       ⁢   2       )               =       ⁢       (       a   0     ⊕     a   5     ⊕     a   8       )     ⁢     (       a   1     ⊕     a   6     ⊕     a   9     ⊕     a   9       )     ⁢     (       a   2     ⊕     a   7     ⊕     a   9     ⊕     a   5     ⊕     a   8       )                       ⁢       (       a   3     ⊕     a   8     ⊕     a   6     ⊕     a   9       )     ⁢     (       a   4     ⊕     a   9     ⊕     a   7       )     ⁢     (       a   5     ⊕     a   8     ⊕     a   9       )                       ⁢       (       a   6     ⊕     a   9     ⊕     a   5     ⊕     a   8       )     ⁢     (       a   7     ⊕     a   6     ⊕     a   9     ⊕     a   9       )     ⁢     (       a   8     ⊕     a   7       )     ⁢     (       a   9     ⊕     a   8       )                     (   41   )             
 
         [0107]     If the result C′ obtained from Formula (41) is rewired, the result of the squaring operation is obtained by Formula (42). 
 
 A   2 =( a   0   ⊕a   5   ⊕a   8 )( a   5   ⊕a   8   ⊕a   9 )( a   1   ⊕a   6   ⊕a   9   ⊕a   9 )( a   6   ⊕a   9   ⊕a   5   ⊕a   8 )( a   2   ⊕a   1   ⊕a   9   ⊕a   5   ⊕a   8 )(a 7   ⊕a   6   ⊕a   9   ⊕a   9 )( a   3   ⊕a   8   ⊕a   6   ⊕a   9 )( a   8   ⊕a   7 )( a   4   ⊕a   9   ⊕a   7 )( a   9   ⊕a   8 )   (42) 
 
         [0108]      FIG. 6  illustrates an implementation result of Formula (42) using a plurality of XOR gates  61  and a rewiring unit  62 . Referring to  FIG. 6 , the squaring apparatus includes twenty-five XOR gates contributing to area complexity and has four XOR gate delays contributing to time complexity.  
         [0109]      FIGS. 7 through 9  are tables illustrating comparisons between the conventional art and embodiments of the present invention. Referring to  FIG. 7 , the present invention considers the case where the defining polynomial is a trinomial, that is, x n +x k +1 (1≦k≦n/2) in terms of area and time complexity.  FIG. 8  is a table illustrating a comparison of area and time complexity, in three finite fields defined by SEC standards between the conventional art and an embodiment of the present invention. It is assumed that an input of the squaring apparatus follows a standard representation.  FIG. 9  is a table illustrating a comparison of applicability of standards, basis conversion, and problems between the conventional art and an embodiment of the present invention. It is assumed that an input of the squaring apparatus has a standard representation.  
         [0110]     Referring to the tables, in terms of time and area complexity, embodiments of the present invention are superior, similar, or inferior to the conventional art according to different cases. But the invention by C. H. Kim, et al. uses a dimension and a defining polynomial that are not found in the standards, resulting in poor compatibility, and the invention by Lambert, et al. and the invention by C. C. Wang et al. require complex basis conversion. In general, basis conversion requires approximately n 2  gates and gate delays of approximately log 2 n. If there is no method of efficient basis conversion, the conventional inventions are less efficient than the present invention. Further the invention by H. Wu is restricted to a trinomial as a defining polynomial, thereby having limitations in its application.  
         [0111]     Even when n is even, embodiments of the present invention can be applied to any cases given in the standards, thereby achieving wide applicability.  
         [0112]     As is described above, since the squaring apparatus according to an embodiment of the present invention is applicable to most cases in the standards, it has wide applicability and efficient area and time complexity. Also, the squaring apparatus does not require basis conversion. In addition, since the squaring apparatus can be applied when a trinomial and a pentanomial are used as the defining polynomial, it is superior to the conventional art in terms of applicability to the cases in the standards.  
         [0113]     Although a few embodiments of the present invention have been shown and described, it would be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the claims and their equivalents.