Abstract:
Blixers, which are a relatively recent development, have not be studied as extensively as many older circuit designs. Here, a blixer is provided that improves linearity and reduces noise over other conventional blixer designs. To accomplish this, the blixer provided here uses a differential amplifier and/or a dummy path within its mixing circuit to perform noise reduction (and improve linearity).

Description:
TECHNICAL FIELD 
     The invention relates generally to radio frequency (RF) circuitry and, more particularly, to a blixer. 
     BACKGROUND 
     Turning to  FIG. 1  of the drawings, an example of a conventional blixer  100  can be seen. A blixer (i.e.,  100 ) is circuit that combines a balun, low-noise amplifier (LNA) and an I/Q mixer. As shown, blixer  100  generally comprises a balun-LNA core (which generally comprises NMOS transistors Q 1  and Q 2 , inductor L, capacitor C 1 , and resistor R 1 ) coupled to a switching quad or switching core (which generally comprises NMOS transistors Q 3  through Q 6  and resistor-capacitor (RC) networks  102 - 1  and  102 - 2 ). In operation, an RF input signal is provided to the balun-LNA core (which also receives bias voltages VBIAS 1  and VBIAS 2 ). Since transistors Q 2  is n-times the size of transistor Q 1 , the transconductance g m2  of transistor Q 2  is n-times the transconductance g m1  of transistor Q 1  (or g m2 =n*g m1 ). The signals from balun-LNA core (which are g m1 *V IN  and g m2 *V IN ) are applied to low impedance nodes of the switching core so as to be mixed with a differential local oscillator signal LOP and LOM. In order to achieve the desired intermediate frequency signals IFP and IFM, transistors Q 4  and Q 5  are n-times the side of transistors Q 3  and Q 6 . Additionally, each RC network  104 - 1  through  104 - 4  has an impedance Z 2  that is 1-nth the impedance Z 1  of each of RC networks  102 - 1  and  102 - 2  (or Z 2 =Z 1 /n). This blixer  100 , however, can be noisy, and due to the stacking of the transistors Q 1 -Q 6 , the amount of head room available for signal swing can be severely limited, limiting achievable gain. Additionally, this headroom limitation due to the supply voltage also limits the linearity blixer  100 . Thus, there is however a desire to improve the linearity and reduce the noise of this blixer  100 . 
     An example of a conventional blixer is Blaakmeer et al., “The BLIXER, a wideband balun-LNA-I/Q-mixer topology,”  IEEE J. Solid - State Circuits , vol. 43, no. 12, pp. 2706-2715, December 2008. 
     SUMMARY 
     A preferred embodiment of the present invention, accordingly, provides an apparatus. The apparatus comprises a transconductance circuit that receives an input signal and that generates a first amplified signal and a second amplified signal; and a mixing circuit having: a first mixer that is coupled to the transconductance circuit so as to receive the first amplified signal, wherein the first mixer mixes the first amplified signal with a mixing signal, wherein the mixing signal has a duty cycle that is a fraction of a local oscillator duty cycle; a second mixer that is coupled to the transconductance circuit so as to receive the second amplified signal, wherein the second mixer mixes the second amplified signal with the mixing signal; an first impedance network that is coupled each of the first and second mixers, wherein the first impedance network is adapted to have an feedback impedance; a second impedance network that is coupled each of the first and second mixers, wherein the second impedance network is adapted to have the feedback impedance; and a differential amplifier that is coupled to each impedance network. 
     In accordance with a preferred embodiment of the present invention, the mixing circuit further comprises a first capacitor that is coupled between the transconductance circuit and the first mixer; and a second capacitor that is coupled between the transconductance circuit and the second mixer. 
     In accordance with a preferred embodiment of the present invention, the first impedance network further comprises: a first resistor that is coupled to the first mixer; a second resistor that is coupled in series with the first resistor, wherein a collective impedance of the first and second resistors is approximately equal to the feedback impedance, and wherein the second mixer is coupled to a node between the first and second resistors; and a first switch that is coupled in parallel to the first resistor. 
     In accordance with a preferred embodiment of the present invention, the first impedance network further comprises: a third resistor that is coupled to the first mixer; a fourth resistor that is coupled in series with the third resistor, wherein a collective impedance of the third and fourth resistors is approximately equal to the feedback impedance, and wherein the second mixer is coupled to a node between the first and second resistors; and a second switch that is coupled in parallel to the first resistor. 
     In accordance with a preferred embodiment of the present invention, the first impedance network further comprises a first resistor having the feedback impedance and wherein the second impedance network further comprises a second resistor having the feedback impedance. 
     In accordance with a preferred embodiment of the present invention, the mixing circuit further comprises a dummy path that is coupled to second capacitor. 
     In accordance with a preferred embodiment of the present invention, the differential amplifier further comprises a first differential amplifier, and wherein the dummy path further comprises: a third mixer that is coupled to the second capacitor; and a second differential amplifier that is coupled to the third mixer. 
     In accordance with a preferred embodiment of the present invention, the fraction further comprises a first fraction, and wherein the mixing signal further comprises a first mixing signal, and wherein the third mixer mixes the second amplified signal with a second mixing signal having a duty cycle that is a second fraction of the local oscillator duty cycle. 
     In accordance with a preferred embodiment of the present invention, the transistors from each of first and second mixers have a first size, and wherein the transistors from the third mixer have a second size. 
     In accordance with a preferred embodiment of the present invention, an apparatus comprising: a transconductance circuit that generates a first amplified signal and a second amplified signal, wherein the transconductance circuit includes: a first current source having a first current; a second current source having a second current, wherein the second current is K-times larger than the first current; a first transistor that is coupled to the first current source and that receives a first bias voltage; a second transistor that is coupled to the first transistor and that receives an input signal and a second bias voltage; a third transistor that is coupled to the second current source and that receives first bias voltage; and a fourth transistor that is coupled to the third transistor and that receives the input signal and the second bias voltage; and a mixing circuit having: a first mixer that is coupled to the transconductance circuit so as to receive the first amplified signal, wherein the first mixer mixes the first amplified signal with a mixing signal, wherein the mixing signal has a duty cycle that is a fraction of a local oscillator duty cycle; a second mixer that is coupled to the transconductance circuit so as to receive the second amplified signal, wherein the second mixer mixes the second amplified signal with the mixing signal; an first impedance network that is coupled each of the first and second mixers, wherein the first impedance network is adapted to have an feedback impedance; a second impedance network that is coupled each of the first and second mixers, wherein the second impedance network is adapted to have the feedback impedance; and a differential amplifier that is coupled to each impedance network. 
     In accordance with a preferred embodiment of the present invention, the transconductance circuit further comprises: a resistor that is coupled to the fourth transistor and that receives the second bias voltage; and a capacitor that is coupled to the fourth transistor and that receives the input signal. 
     The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and the specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which: 
         FIG. 1  is a circuit diagram of a conventional blixer; and 
         FIGS. 2 through 4  are circuit diagrams of examples of blixers in accordance with a preferred embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION 
     Refer now to the drawings wherein depicted elements are, for the sake of clarity, not necessarily shown to scale and wherein like or similar elements are designated by the same reference numeral through the several views. 
     Turning to  FIG. 2 , an example of a blixer  200 - 1  in accordance with a preferred embodiment of the present invention can be seen. Blixer  200 - 1  generally comprises a transconductance circuit  202  and a mixing circuit  204 - 1 . In operation, the tranconductance circuit  202  generally receives the input signal VIN and generates amplified signals from the input signal VIN. Mixing circuit  204 - 1  then can mix these amplified signals with a mixing signal LOF 1  having a duty cycle that is a fraction (generally 50% or 25%) of a local oscillator signal so that differential amplifier  214  and impedance networks (generally resistors R 7  and R 8  and switch S 2  or resistors R 9  and R 10  and switch S 1 ) can generally perform noise cancellation or noise reduction. The mixing is generally performed by mixers  210  and  212 , which are typically passive mixers (which can, for example, be Gilbert cell mixers). 
     To generate the amplified signal, the transconductance circuit  202  generally uses two branches that each generate one of the amplified signals. The input signal VIN is generally received at the source of NMOS transistor Q 9  (which can biased by bias voltage VBIAS 3  and generally has a transconductance g m3 ), and, in combination with current source  206  (which can generate a current I 0 ) and NMOS transistor Q 7  (which can bias by bias voltage VBIAS 4 ), transistor Q 9  generates an amplified signal (which is generally VIN*g m3 ). Additionally, NMOS transistor Q 10  generally receives the input voltage VIN through capacitor C 6  (which is also biased by bias voltage VBIAS 3  through resistor R 6 ). This transistor Q 10  generally has a transconductance of K*g m3  and, in combination with transistor Q 8  (which is generally biased by bias voltage VBIAS 4 ) and current source  208  (which generates a current of K*I 0 ), generates an amplified signal (which is generally VIN*K*g m3 ). These amplified signals can then be provided to AC-coupling capacitors C 7  and C 8 . 
     To provide noise cancellation, switches S 1  and S 2  can be actuated to vary the impedance of the impedance networks. Typically, resistor R 8  and R 10  have resistances of K*RL, and resistors R 7  and R 9  typically have resistances of (K−1)RL/K. When the switches S 1  and S 2  are actuated, the total resistance (or impedance for the circuit shown) for each impedance network is RL. Thus, when switches S 1  and S 2  are actuated, the differential amplifier  214  is used to perform noise reduction using the total impedance of the impedance network, whereas in normal operation (when switches S 1  and S 2  are open), a resistance of K*RL is used. 
     Turning to  FIG. 3 , another example of a blixer  200 - 2  can be seen. In this configuration the impedance networks of blixer  200 - 1  have been replaced by resistors R 11  and R 12  (which generally have a resistance of RL) and a dummy path  216 - 1  has been included. The dummy path  216 - 1  generally comprises a mixer  220 - 1  (which is typically a passive mixer having transistors that are about the same size or aspect ratio (channel width to channel length) as the transistors used for mixers  210  and  220 ), differential amplifier  218 , and resistors R 13  and R 14  (which each typically have a resistance of RL). Typically, mixer  220 - 1  mixes an amplified output signal from capacitor C 7  with a mixing signal LOF 2  having a duty cycle that is a fraction or multiple (i.e., K−2 times) the local oscillator duty cycle. This dummy path  216 - 1  generally “siphons” the extra signal current from the main path. Additionally, the dummy path  216 - 1  can be used for RF filtering by appropriately sizing the filter around amplifier  218 . 
     In another alternative, which can be seen in  FIG. 4 , blixer  200 - 3  generally uses a dummy path  216 - 2  instead of dummy path  216 - 1 . A difference between dummy paths  216 - 1  and  216 - 2  lies in difference between mixers  220 - 1  and  220 - 2 . Namely, mixer  220 - 2  uses mixing signal LOF 1 , but the transistors used within mixer  220 - 2  are K−1 times the size of the transistors used for mixers  210  and  212 . This arrangement for blixer  200 - 3  generally provides substantially similar functionality to the arrangement for blixer  200 - 2  but may provide an advantageous layout. 
     As a result of using the blixer  200 - 1 ,  200 - 2 , or  200 - 3 , several advantages can be realized. Namely, the linearity is improved over blixer  100  due to the low signal swing at the output of transconductance circuit  202 . There is also a much larger intermediate frequency gain due to the available signal swing. Additionally, there is generally little to no flicker noise because of the passive nature of the mixing circuits  204 - 1 ,  204 - 2 , and  204 - 3 . To demonstrate the improved performance, Table 1 is provided below, which compares blixer  100  to blixer  200 - 1 ,  200 - 2 , and  200 - 3 . 
     
       
         
               
               
               
             
               
               
               
             
           
               
                   
                 TABLE 1 
               
               
                   
                   
               
               
                   
                 Blixer 100 
                 Blixer 200-1, 200-2, or 200-3 
               
               
                   
                   
               
             
             
               
                   
               
             
          
           
               
                 Noise 
                  4.3 dB 
                 2.1 dB  
               
               
                 IP 3   
                     +10 dBm 
                 +14.5 dBm  
               
               
                 Signal swing after 
                 +15 dB 
                 +5 dB 
               
               
                 mixer 
                 (voltage output) 
                 (current output) 
               
               
                 DC current 
                 3 + 12 + 16 mA 
                 2 + 8 mA 
               
               
                   
               
             
          
         
       
     
     Having thus described the present invention by reference to certain of its preferred embodiments, it is noted that the embodiments disclosed are illustrative rather than limiting in nature and that a wide range of variations, modifications, changes, and substitutions are contemplated in the foregoing disclosure and, in some instances, some features of the present invention may be employed without a corresponding use of the other features. Accordingly, it is appropriate that the appended claims be construed broadly and in a manner consistent with the scope of the invention.