Abstract:
A photo detector device includes a photosensitive transistor capable of detecting an optical signal including an image component and a background component and converting the optical signal into a current including an image current corresponding to the image component and a background current corresponding to the background component, a first amplifier module electrically connected to the photosensitive transistor capable of canceling the background current and amplifying the image current, and a second amplifier module electrically connected to the first amplifier module capable of detecting a direct-current (dc) portion of the image current.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    The present invention relates generally to an image sensor, and more particularly, to a photo detector device capable of detecting an image input from a stylus, pen, torch or a shadow. 
         [0002]    With the rapid development in the high-tech industry, pen tablets have been widely applicable to Personal Digital Assistants (PDAs), Personal Computers (PCs) and other electrical appliances used in our daily life. Generally, a pen tablet includes one of a resistor-type, electromagnetic inductance-type, capacitor-type and optoelectronic-type writing panel. As an example of the conventional optoelectronic-type pen tablet, an optical signal is converted into electrical charges, which in turn is stored in a capacitor of a detector array including capacitors, optoelectronic components and switch transistors before it is subsequently read. The capacitors may require additional areas and therefore adversely reduce the aspect ratio of the panel. Furthermore, the charges generated by a background light source and an input signal are equally stored in the capacitor, adversely resulting in a relatively narrow dynamic range. It is therefore desirable to have a photo detector device that is able to convert an optical signal into a photocurrent, eliminating the storing capacitors used in the conventional panels. 
       BRIEF SUMMARY OF THE INVENTION 
       [0003]    Examples of the invention may provide a photo detector device that comprises a photosensitive transistor capable of detecting an optical signal including an image component and a background component and converting the optical signal into a current including an image current corresponding to the image component and a background current corresponding to the background component, a first amplifier module electrically connected to the photosensitive transistor capable of canceling the background current and amplifying the image current, and a second amplifier module electrically connected to the first amplifier module capable of detecting a direct-current (dc) portion of the image current. 
         [0004]    Examples of the invention may also provide a photo detector device that comprises a plurality of first conductive lines extending in parallel with each other, a plurality of second conductive lines extending in parallel with each other and being orthogonal to the plurality of first conductive lines, and an array of optical detectors each of which is disposed near one of the plurality of first conductive lines and one of the plurality of the second conductive lines, and comprises a photosensitive transistor capable of detecting an optical signal including an image component and a background component and converting the optical signal into a current including an image current corresponding to the image component and a background current corresponding to the background component, a first amplifier module electrically connected to the photosensitive transistor capable of canceling the background current and amplifying the image current, and a second amplifier module electrically connected to the first amplifier module capable of detecting a direct-current (dc) portion of the image current. 
         [0005]    Some examples of the invention may also provide a photo detector device that comprises a substrate, a gate electrode over the substrate, an insulating layer over the gate electrode and the insulating layer, a semiconductor layer over the insulating layer, a first diffused region over the semiconductor layer, a second diffused region over the semiconductor layer, and a third diffused region over the semiconductor layer and the gate electrode between the first diffused region and the second diffused region, wherein the first diffused region, the gate electrode and the third diffused region form a first photosensitive transistor capable of detecting an optical signal, and the second diffused region, the gate electrode and the third diffused region form a second photosensitive transistor capable of detecting an optical signal. 
         [0006]    It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed. 
     
    
     
       BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS 
         [0007]    The foregoing summary, as well as the following detailed description of the invention, will be better understood when read in conjunction with the appended drawings. For the purpose of illustrating the invention, there are shown in the drawings examples consistent with the invention. It should be understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown. 
           [0008]    In the drawings: 
           [0009]      FIG. 1A  is a schematic circuit diagram of a photo detector array consistent with an example of the present invention; 
           [0010]      FIG. 1B  is an enlarged circuit diagram of a photosensitive transistor of the photo detector array illustrated in  FIG. 1A ; 
           [0011]      FIG. 1C  is an enlarged circuit diagram of a first amplifier module of the photo detector array illustrated in  FIG. 1A ; 
           [0012]      FIG. 1D  is an enlarged circuit diagram of a second amplifier module of the photo detector array illustrated in  FIG. 1A ; 
           [0013]      FIG. 1E  is an enlarged circuit diagram of a third amplifier module of the photo detector array illustrated in  FIG. 1A ; 
           [0014]      FIG. 2A  is a schematic diagram of a photo detector array consistent with another example of the present invention; 
           [0015]      FIG. 2B  is an enlarged circuit diagram of a photosensitive transistor and a switching transistor of the photo detector array illustrated in  FIG. 2B ; 
           [0016]      FIG. 2C  is a schematic cross-sectional diagram of a photo detector array incorporated in a thin film transistor liquid crystal display panel consistent with an example of the present invention; 
           [0017]      FIGS. 3A and 3B  are respectively a cross-sectional view and a top view of a photo detector device consistent with examples of the present invention; 
           [0018]      FIG. 3C  is a top view of a conventional photo detector device; 
           [0019]      FIGS. 4A and 4B  are respectively a cross-sectional view and a top view of a photo detector device consistent with examples of the present invention; and 
           [0020]      FIG. 4C  is a top view of another conventional photo detector device. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0021]    Reference will now be made in detail to the present embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts. 
         [0022]      FIG. 1A  is a schematic circuit diagram of a photo detector array  10  consistent with an example of the present invention. Referring to  FIG. 1A , the photo detector array  10  includes a photosensitive transistor array  14 , and a first amplifier module  11 , a second amplifier module  12  and a third amplifier module  13  electrically connected to each row of the photosensitive transistor array  14 . The photosensitive transistor array  14  includes a plurality of photosensitive transistors  14 - 1  formed in rows and columns. A representative photosensitive transistor  14 - 1  is disposed near an intersection of one of a plurality of gate lines  14 -G and one of a plurality of data lines  14 -D orthogonal to the gate lines  14 -G. Each of the plurality of data lines  14 -D is electrically connected to the first amplifier module  11 , which in turn is electrically connected to the second amplifier module  12  and the third amplifier module  13  connected in parallel with the second amplifier module  12 . The photo detector array  10  may further include a first detector  15 - 1  and a second detector  15 - 2 , which are electrically connected to the second amplifier module  12  and the third amplifier module  13 , respectively. 
         [0023]      FIG. 1B  is an enlarged circuit diagram of the photosensitive transistor  14 - 1  of the photo detector array  10  illustrated in  FIG. 1A . The photosensitive transistor  14 - 1  functions to detect light and serve as a switch. Referring to  FIG. 1B , the photosensitive transistor  14 - 1  includes a first electrode  141 , a second electrode  142  and a gate electrode  143 . The first electrode  141 , which serves as a drain of the photosensitive transistor  14 - 1 , is connected to the gate line  14 -G. The second electrode  142 , which serves as a source of the photosensitive transistor  14 - 1 , is connected to the data line  14 -D. The gate electrode  143  is connected to the gate line  14 -G and thus is short-circuited to the first electrode  14 - 1 , which advantageously prevents parasitic capacitance from accumulation therebetween. In the absence of an input optical signal provided from, for example, a light source such as a stylus or torch, a pressure source such as a force applied from an ordinary pen or fingertip, or even the shadow of an object, only the background light will be detected by the photosensitive transistor  14 - 1  if the gate line  14 -G is selected. The background light is converted to a photo current I B , which is generally a relatively small current. In the presence of an input optical signal, the photosensitive transistor  14 - 1  generates a current I if the gate line  14 -G is selected. The current I includes an image current I M  due to the input optical signal and the photo current I B  due to the background light. The current I is provided to the first amplifier module  11 . 
         [0024]      FIG. 1C  is an enlarged circuit diagram of the first amplifier module  11  of the photo detector array  10  illustrated in  FIG. 1A . Referring to  FIG. 1C , the first amplifier module  11  includes a first variable resistor  111 , a second variable resistor  112 , a capacitor  113 , an operational amplifier  114  and a resistor  115 . The first amplifier module  11  functions to obtain the image current I M  out of the current I by removing the photo current I B . The resistance of the first variable resistor  111  varies as the photo current I B  varies. Specifically, the resistance of the first variable resistor  111  is automatically adjusted in response to the variation in the background light intensity so as to provide differential signal compensation. Therefore, the photo current I B  is cancelled in the operational amplifier  114  due to a differential amplifier circuit function. As a result, interference caused by the background light is minimized, which enhances the system sensitivity and expands the dynamic range of the photo detector array  10 . 
         [0025]    In the absence of an input optical signal, the first variable resistor  111  maintains an output voltage of the first amplifier module  11  at a stable level. That is, the gain of the first amplifier module  11  may be designed with a substantially large value (but not infinite) such that the signal response is sensitive enough to determine whether an input optical signal is light or shadow. In one example consistent with the present invention, when an output value is smaller than the level, it is determined that an input optical signal is provided by a stylus. Furthermore, when an output value is greater than the level, it is determined that an input optical signal is provided by a shadow. In another example, when an output value is greater than the level, it is determined that an input optical signal is provided by a stylus. Furthermore, when an output value is smaller than the level, it is determined that an input optical signal is provided by a shadow. In still another example, the stable level is a gray scale value 128, given 8 bits per pixel. A relatively white-color optical input signal has a gray scale value ranging from 128 to 255, while a relatively black-color optical input signal has a gray scale value ranging from 0 to 128. The compensation process therefore compensates for the variation in the background light and the differences of optoelectronic characteristics of the plurality of photosensitive transistors  14 - 1  as well. Consequently, the output voltage of each of the plurality of photosensitive transistors  14 - 1  of the photo detector array  10  is maintained at a stable level in the absence of an input optical signal. Therefore, a stylus may be used as an entry tool. Similarly, the shadow of finger, chopstick or ordinary pen may also serve as an entry tool. In one example, an input optical signal having a diameter of approximately 3 millimeter or greater is detectable by the photo detector array  10 . 
         [0026]      FIG. 1D  is an enlarged circuit diagram of the second amplifier module  12  of the photo detector array  10  illustrated in  FIG. 1A . Referring to  FIG. 1D , the second amplifier module  12  includes a first resistor  121 , a second resistor  122 , a capacitor  123  and an operational amplifier  124 . The second resistor  122  and the capacitor  123  form a low pass filter. The second amplifier module  12  functions to process a direct-current (dc) component of a signal provided by the first amplifier module  11 . Specifically, the second amplifier module  12  filters out or attenuates frequencies higher than the cutoff frequency of the low pass filter, thereby reducing the high-frequency noise in the dc component. The dc component is generated by an optical input through, for example, a general stylus, pen, torch, finger or chopstick. In one example consistent with the present invention, the photo detector array  10  includes an analog-to-digital converter (not shown) of a multiplexer (not shown) electrically connected to the second amplifier module  12  at a subsequent stage to further process the dc component. 
         [0027]      FIG. 1E  is an enlarged circuit diagram of the third amplifier module  13  of the photo detector array  10  illustrated in  FIG. 1A . Referring to  FIG. 1E , the third amplifier module  13  includes a first resistor  131 , a second resistor  132 , a first capacitor  133 , a second capacitor  135  and an operational amplifier  134 . The third amplifier module  13  functions to serve as a band pass filter, and process an alternating-current (ac) component of a signal provided by the first amplifier module  11 . The ac component is generated by an optical input through, for example, a dedicated stylus having a specific output specification such as frequency. The third amplifier module  13  is able to detect a modulated optical signal from the dedicated stylus, which converts a force applied therethrough on a panel into a frequency. In one example consistent with the present invention, the photo detector array  10  includes a phase-locked-loop (“PLL”) circuit (not shown) electrically connected to the third amplifier module  13  at a subsequent stage to convert the frequency of the dedicated stylus into a voltage signal. 
         [0028]    Referring to  FIG. 1A , each of the first detector  15 - 1  and the second detector  15 - 2  includes a diode (not numbered) and a low pass filter (not numbered) connected in parallel with the diode. The second detector  15 - 2  is able to detect the amplitude of the signal from the third amplifier module  13 . 
         [0029]      FIG. 2A  is a schematic diagram of a photo detector array  20  consistent with another example of the present invention. Referring to  FIG. 2A , the photo detector array  20  is similar to the photo detector array  10  illustrated in  FIG. 1A  except a photosensitive transistor array  24 . The photosensitive transistor array  24  includes a plurality of photosensitive transistors  24 - 1  and a plurality of switching transistors  24 - 2  formed in rows and columns. A representative photosensitive transistor  24 - 1  and a representative switching transistor  24 - 2  are disposed near an intersection of one of a plurality of gate lines  24 -G and one of a plurality of data lines  24 -D orthogonal to the gate lines  24 -G. 
         [0030]      FIG. 2B  is an enlarged circuit diagram of the photosensitive transistor  24 - 1  and the switching transistor  24 - 2  of the photo detector array  20  illustrated in  FIG. 2B . Referring to  FIG. 2B , the photosensitive transistor  24 - 1  includes a first electrode  241 , a second electrode  242  and a gate electrode  243 , which serve as a drain, source and gate of the photosensitive transistor  24 - 1 , respectively. The first electrode  241  and the gate electrode  243  are short-circuited to prevent parasitic capacitance from accumulation therebetween. The switching transistor  24 - 2  includes a first electrode  242 , a second electrode  244  and a gate electrode  245 , which serve as a drain, source and gate of the switching transistor  24 - 2 , respectively. The gate electrode  245  is connected to the gate line  24 -G, and the second electrode  244  is connected to the data line  24 -D. In the absence of an input optical signal provided from, for example, a stylus, an ordinary pen, a torch, a fingertip or even the shadow of an object, only the background light will be detected by the photosensitive transistor  24 - 1  if the gate line  24 -G is selected, which turns on the switching transistor  24 - 2  and the photosensitive transistor  24 - 1 . The background light is converted to a photo current I B . In the presence of an input optical signal, the photosensitive transistor  24 - 1  generates a current I if the gate line  24 -G is selected. The current I includes an image current I M  due to the input optical signal and the photo current I B  due to the background light. The current I is provided to the first amplifier module  11 . 
         [0031]      FIG. 2C  is a schematic cross-sectional diagram of the photo detector array  24  incorporated in a thin film transistor liquid crystal display panel  21  consistent with an example of the present invention. Referring to  FIG. 2C , the panel  21  includes a pair of polarizers  201 ,  202 , a pair of glass substrates  203 ,  204 , a pair of alignment films  205 ,  206 , a color filter film  207 , a common electrode  208 , a liquid crystal cell  209 , a backlight unit  210  and a thin film transistor (“TFT”) layer  211 . The photo detector array  24  is formed in the TFT layer  211 . In one example consistent with the present invention, the gate lines  24 -G illustrated in  FIG. 2B  serve as a portion of gate lines for switching transistors in the TFT layer  211 . 
         [0032]      FIGS. 3A and 3B  are respectively a cross-sectional view and a top view of a photo detector device  30  consistent with examples of the present invention. Referring to  FIG. 3A , the photo detector device  30  includes a substrate  31 , a gate electrode “G” over the substrate  31 , an insulating layer  32  over the gate electrode G, a semiconductor layer  33  over the insulating layer  32 , and a first source electrode “S 1 ”, a drain electrode “D” and a second source electrode “S 2 ” over the semiconductor layer  33 . To avoid accumulation of parasitic capacitance, the drain electrode D and the gate electrode G are coupled to one another as illustrated in  FIG. 1A . In the present example, the gate electrode G is aligned with the first source electrode S 1  and the second source electrode S 2 . In other examples, the gate electrode G may cross over a portion of the first source electrode S 1  or the entire first source electrode S 1 . Similarly, the gate electrode G may cross over a portion of the second source electrode S 2  or the entire second source electrode S 2 . Referring to  FIG. 3B , the photo detector device  30  includes two channel widths “W” and therefore two folds of channel width-to-length ratio, i.e., 2 (W/L), L being the channel length, in five unit areas, each of which is substantially equal to a source or drain electrode area. 
         [0033]      FIG. 3C  is a top view of a conventional photo detector device  31 . To achieve the same two folds of channel width-to-length ratio, a total number of six unit areas are required in the conventional photo detector device  31 , including a first channel width defined by a first set of source, drain and gate electrodes S′, D′ and G′, respectively, and a second channel width defined by a second set of source, drain and gate electrodes S″, D″ and G″, respectively. By comparison, the photo detector device  30  illustrated in  FIG. 3A  or  3 B is more area effective than the conventional photo detector device  31 . 
         [0034]      FIGS. 4A and 4B  are respectively a cross-sectional view and a top view of a photo detector device  40  consistent with examples of the present invention. Referring to  FIG. 4A , the photo detector device  40  includes a substrate  41 , a first gate electrode “G 1 ” and a second gate electrode “G 2 ” over the substrate  41 , an insulating layer  42  over the gate electrodes G 1  and G 2 , a semiconductor layer  43  over the insulating layer  42 , and a first source electrode “S 1 ”, a first drain electrode D 1 , a second drain electrode D 2  and a second source electrode S 2  over the semiconductor layer  43 . The first gate electrode G 1  and the second gate electrodes G 2  are the gates of a photosensitive transistor and a switching transistor, respectively. To avoid accumulation of parasitic capacitance, the first drain electrode D 1  and the first gate electrode G 1  are coupled to one another as illustrated in  FIG. 2A . The first gate electrode G 1  may overlap the first source electrode S 1  or the second drain electrode D 2  or both. The second gate electrode G 2  is aligned with the second source electrode S 2  and the second drain electrode D 2 . In other examples, however, the second gate electrode G 2  may cross over a portion of the second source electrode S 2  or the entire second source electrode S 2 . Similarly, the second gate electrode G 2  may cross over a portion of the second drain electrode D 2  or the entire second drain electrode D 2 . Referring to  FIG. 4B , the photo detector device  40  includes two channel widths “W” and therefore two folds of channel width-to-length ratio, i.e., 2 (W/L), in seven unit areas. 
         [0035]      FIG. 4C  is a top view of another conventional photo detector device  41 . To achieve the same two folds of channel width-to-length ratio, a total number of eight unit areas are required in the conventional photo detector device  41 , including a first channel width defined by a first set of source, drain and gate electrodes S′, D′ and G′, respectively, and a second channel width defined by a second set of source, drain and gate electrodes S″, D″ and G″, respectively. A third transistor including S′″, G′″ and S′″ serves as a switching transistor. By comparison, the photo detector device  40  illustrated in  FIG. 4A  or  4 B is more area effective than the conventional photo detector device  41 . 
         [0036]    It will be appreciated by those skilled in the art that changes could be made to one or more of the examples described above without departing from the broad inventive concept thereof. It is understood, therefore, that this invention is not limited to the particular examples disclosed, but it is intended to cover modifications within the scope of the present invention as defined by the appended claims. 
         [0037]    Further, in describing certain illustrative examples of the present invention, the specification may have presented the method and/or process of the present invention as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. As one of ordinary skill in the art would appreciate, other sequences of steps may be possible. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. In addition, the claims directed to the method and/or process of the present invention should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the present invention.