Abstract:
A fully integrated feedback controlled coil driver is disclosed for inductive power transfer to electronic devices. For efficient power transfer, a voltage across a switch that switchably couples the coil between a DC input power source and ground is sampled and compared with a preselected reference voltage to generate an error voltage. The error voltage is integrated over time and compared to a voltage ramp. The value of the integrated error voltage relative to the voltage ramp is used to obtain an optimal on time for the switch such that coil current is maximized for a given DC input power. The coil driver can also provide ASK modulation on the coil current by changing the size of the switch according to input data.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is a continuation of International Appl. No. PCT/US2013/057592, filed Aug. 30, 2013, which claims the benefit of U.S. Provisional Application No. 61/695,815 entitled “FEEDBACK CONTROLLED COIL DRIVER FOR INDUCTIVE POWER TRANSFER,” filed on Aug. 31, 2012, the entirety of which is hereby incorporated by reference herein. 
     
    
     BACKGROUND OF THE INVENTION 
       [0002]    Inductive power transfer or transmission is frequently used to deliver power wirelessly to portable electronic devices. Wireless power transfer is used in a variety of applications, such as, for recharging the batteries in portable devices, such as smart phones, tablets and laptops. Such power transfer systems are also used to transmit power transcutaneously, i.e., through the skin, to implanted medical devices, to either power an implant directly or to recharge the implant&#39;s battery. 
         [0003]    As shown in  FIG. 1 , a conventional power transfer system  100  typically includes a coil driver  114  driving a primary coil LP ( 112 ), which inductively couples and powers secondary coil, LS ( 122 ) located inside electronic device  120 . Various transcutaneous power transfer systems are described in: W. Loke, et al., “A 0.5V sub-mW wireless magnetic tracking transponder for radiation therapy,” Sym. on VLSI Cir., pp. 172-173, 2011; Y. Liao, et al., “A 3 μW wireless powered CMOS glucose sensor for an active contact lens,” ISSCC Dig. Tech. papers, pp. 38-39, 2011 and S. Lee, et al., “A low-power bidirectional telemetry device with a near-field charging feature for a cardiac microstimulator,” IEEE Tran. Bio. Cir. Syst., vol. 5, pp. 357-367, August, 2011. Although some implants are designed to obtain power directly from the batteries within the implants, those batteries that are rechargeable still have to be recharged wirelessly by an external power transmitter. See E. Lee, et al., “A biomedical implantable FES battery-powered micro-stimulator,” IEEE Tran. Cir. Syst. I, vol. 56, pp. 2583-2596, December 2009. In recent developments, many efforts have been devoted to improve the power reception and the power management within the implants. See, for example, H. Lee and M. Ghovanloo, “Fully integrated power efficient AC-to-DC converter design in inductively powered biomedical applications,” Proc. of IEEE 2011 CICC, paper 8.7, 2011. However, the coil driver in an external transmitter still requires a lot of discrete components. See the article by S. Lee, et al., 2011 cited above and also G. Kendir, et al., “An optimal design methodology for inductive power link with class-E amplifier,” IEEE Tran. Cir. Syst. I, vol. 52, pp. 857-866, May, 2005. 
         [0004]    Class E amplifier type systems  210  as shown in  FIG. 2  are commonly used in coil driver designs, See S. Lee, et al., 2011 and G. Kendir, et al., 2005 cited above. In addition to discrete capacitors CT 1  ( 213 ) and CT 2  ( 215 ), a bulky RF choke LC ( 211 ) is also required in this circuit topology. Since a power transmitter is normally part of a patient&#39;s external controller for an implanted medical device  220 , it is important for the external controller to be small and lightweight. Therefore, a coil driver for such a wireless power transfer system should use a minimal number of discrete components to achieve a small size and should have low power consumption such that only a small battery is required. 
       SUMMARY OF THE INVENTION 
       [0005]    The invention deals with a design for a feedback controlled coil driver that achieves an optimum coil driver switch “on time”. The coil is part of an LC tank circuit and the optimum coil driver switch “on time” is achievable for different operating frequencies without the need for adjusting the values of the inductance and capacitance of the LC tank circuit. The optimum coil driver switch “on time” further results in a maximized value of the ratio of the square of the peak to peak coil current to the power delivered by a LC tank circuit power supply. 
         [0006]    The optimum coil driver switch “on time” is obtained by switchably coupling the LC tank circuit between a power supply and ground at controlled times. A sample and hold circuit monitors the LC tank circuit output voltage and an integrator circuit integrates the difference between the output voltage and a prescribed reference voltage which is typically set to zero volts. One of many unique attributes of the present invention is that a ramp voltage is generated at the time the LC tank circuit is coupled to ground which is then compared to the output of the integrator circuit. The coil driver switch decouples the LC tank circuit from ground when the value of the ramp voltage exceeds the value of the integrated difference voltage. 
         [0007]    A repetitive pulse signal generator provides a pulse train to the coil driver switch at a predetermined frequency. Each pulse of the pulse train has a start time and a pulse width (“on time”) which is controlled by the feedback loop as described above which causes the “on time ” to be optimized with the identified benefits and advantages. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0008]      FIG. 1  is a block diagram of a power transfer system for an electronic device. 
           [0009]      FIG. 2  is a block diagram of a power transfer system using a prior art coil driver based on a class E amplifier. 
           [0010]      FIG. 3  is a block diagram of a power transfer system using a coil driver based on a resonant DC-AC converter topology. 
           [0011]      FIG. 4A-4D  are timing waveforms for various values of on times for a switch for a coil driver, according to an embodiment of the present invention. 
           [0012]      FIG. 5A  is a block diagram of a feedback controlled coil driver according to an embodiment of the present invention. 
           [0013]      FIG. 5B  is a timing waveform for the output of the ramp generator in  FIG. 5A . 
           [0014]      FIG. 6  is an exemplary schematic of the inductor switch and sample and hold of  FIG. 5A . 
           [0015]      FIGS. 7A-7B  is a flowchart showing a method for feedback control of a coil driver for inductive power transfer according to an embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0016]      FIG. 3  is a block diagram of a power transfer system  300  using a coil driver  310  based on resonant DC-AC converter topology. See N. Mohan, T. Undeland and W. Robbins, Power electronics: converters, applications, and design, John Wiley &amp; Sons, 2003 and also M. Paemel, “High-efficiency transfer for medical implants,” IEEE Solid-State Cir. Mag., vol. 3, pp. 47-59, 2011 for more information on resonant DC-AC converter design. Primary coil LP ( 312 ) and discrete capacitor CT ( 314 ) form a resonant LC tank circuit for transmitting power to the secondary coil LS ( 322 ) in implant  320 . One possible operating frequency FO, for such an inductive link is at about 120 kHz. See E. Lee, et al., “A biomedical implantable FES battery-powered micro-stimulator,” IEEE Tran. Cir. Syst. I, vol. 56, pp. 2583-2596, December 2009. For higher operating frequencies (e.g., 13.56 MHz), capacitor CT ( 314 ) can be potentially integrated on-chip for further component reduction. 
         [0017]    As will be discussed with respect to  FIGS. 4A-4D  and  5 A- 5 B, a feedback loop minimizes the power dissipation on coil driver  310  by controlling the “on time” (TON) of switch MS ( 316 ). Coil driver  310  is also capable of providing amplitude shift keying (ASK) modulation on the power transfer since, in some applications, data is sent from the external controller to an implant via the same inductive link. See, for example S. Lee, et al., 2011 cited above and also R. Sarpeshkar, Ultra low power bioelectronics: fundamentals, biomedical applications, and bio-inspired systems, Cambridge University Press, 2010. 
         [0018]    The operating frequency FO of coil driver  310  is derived from an input clock frequency, FCLOCK, where, for the current application, FCLOCK=20×FO. For proper operation of coil driver  310 , capacitor CT ( 314 ) is selected such that the resonant frequency of primary coil LP ( 312 ) and CT ( 314 ) is FLC=½π/(LP×CT) 0.5  is greater than FO, (See M. 
         [0019]    Paemel, “High-efficiency transmission for medical implants,” IEEE Solid-State Cir. Mag., vol. 3, pp. 47-59, 2011). Due to the physical sizes and the location constraints of the coils in an implant and an external controller, the coupling coefficient KC ( 306 ) and the Q factors of the coils are relatively small in these types of systems. Hence, the power efficiency of the inductive coupling is also low. 
         [0020]    To maximize the power transfer to secondary coil LS ( 322 ), the current on primary coil LP ( 312 ) in  FIG. 3 , given as primary coil current IL ( 313 ), must be maximized for a given power delivery from the primary coil supply voltage VLP ( 301 ), (See R. Sarpeshkar, 2012 cited above). Primary coil current IL ( 313 ) is generated by turning on, at controlled times, switch MS ( 316 ) such that primary coil LP ( 312 ) is energized by supply voltage VLP ( 301 ). When switch MS ( 316 ) is off, primary coil LP ( 312 ) and capacitor CT ( 314 ) are decoupled from ground and will resonate, producing a sinusoidal primary coil current IL ( 313 ) until switch MS ( 316 ) is turned on again in the next cycle, as shown in  FIG. 4A . For a given power PLP, from supply voltage VLP ( 316 ), the peak to peak value of primary coil current IL given as ILP-P is maximized by controlling the on time TON ( 404 ), for switch MS ( 316 ) so that switch MS ( 316 ) only allows current flow when the coil driver output voltage VL ( 304 ) across switch MS ( 316 ), reaches exactly 0V and remains essentially 0V during the duration of on time TON ( 404 ). In this case, the power dissipation by switch MS ( 316 ) is minimized and the turn on time TON ( 404 ) will be equal to the optimal on time given as TOP ( 405 ) and the following condition, as shown in equation (1) below, will be satisfied, 
         [0000]    
       
         
           
             
               
                 
                   
                     FLC 
                     FO 
                   
                   = 
                   
                     
                       1 
                       
                         1 
                         - 
                         
                           FO 
                           × 
                           TOP 
                         
                       
                     
                      
                     
                       ( 
                       
                         
                           1 
                           2 
                         
                         + 
                         
                           
                             1 
                             π 
                           
                            
                           arctan 
                            
                           
                             1 
                             
                               π 
                                
                               
                                   
                               
                                
                               FLC 
                               × 
                               TOP 
                             
                           
                         
                       
                       ) 
                     
                   
                 
               
               
                 
                   ( 
                   1 
                   ) 
                 
               
             
           
         
       
     
         [0021]    The maximum value of coil driver output voltage VL ( 304 ) across switch MS ( 316 ), VLMAX, and the peak to peak primary coil current ILP-P can be written as: 
         [0000]    
       
         
           
             
               
                 
                   VLMAX 
                   = 
                   
                     VLP 
                      
                     
                       ( 
                       
                         1 
                         + 
                         
                           
                             1 
                             / 
                             sin 
                           
                            
                           
                               
                           
                            
                           θ 
                         
                       
                       ) 
                     
                   
                 
               
               
                 
                   ( 
                   2 
                   ) 
                 
               
             
             
               
                 
                   
                     ILP 
                     - 
                     P 
                   
                   = 
                   
                     
                       VLP 
                       × 
                       TOP 
                     
                     
                       LP 
                       × 
                       cos 
                        
                       
                           
                       
                        
                       θ 
                     
                   
                 
               
               
                 
                   ( 
                   3 
                   ) 
                 
               
             
           
         
       
     
         [0000]    where θ=arctan [2/TOP·(CT·LP) 0.5 ]. 
         [0022]    A figure of merit, FM ( 408 ), defined as FO·LP·ILP−P 2 /PLP will be used to measure the effectiveness of generating primary coil current IL, when the on time TON the optimal on time TOP, then FM will be maximized. For a given operating frequency FO, manual adjustments on primary coil LP, capacitor CT or on time TON are often required to maximize the power transfer to an implant, (See S. Lee, et al., 2011 and R. Sarpeshkar, 2010 cited above). The impedance of primary coil LP ( 312 ), and hence, the resonant frequency of primary coil LP ( 312 ) and capacitor CT ( 314 ), may deviate from the nominal value after manual adjustments when primary coil LP ( 312 ) is near any metallic objects or an implant that has large coupling coefficients (KC&gt;0.1) with primary coil LP ( 312 ) (See R. Sarpeshkar, 2010 cited above). The present invention provides an automatic adjustment scheme to achieve optimal on time TOP for primary coil LP ( 312 ). 
         [0023]      FIG. 4A-4D  are timing waveforms for various values of on times TON ( 404 ) for switch MS ( 516 ) for coil driver  500 .  FIGS. 4A-4D  show four timing waveforms: voltage VSW ( 503 ) applied to switch MS ( 516 ), coil current IL ( 513 ) and coil driver output voltage VL ( 504 ) for various values of on time TON ( 404 ) in relation to an optimal on time TOP ( 405 ). During each cycle 1/FO ( 412 ) of voltage VSW ( 503 ) applied to switch MS ( 516 ), turn on time TON ( 404 ) begins at turn on start time TST ( 402 ). Voltage VSW ( 503 ) applied to switch MS ( 516 ) is a repetitive pulse signal with a frequency equal to the operating frequency FO. 
         [0024]      FIG. 5A  is a block diagram of a feedback controlled coil driver  500  according to an embodiment of the present invention.  FIG. 5B  is a timing waveform for the output of the ramp generator  552  in  FIG. 5A . Primary coil LP ( 512 ) and capacitor CT ( 514 ) form an LC tank circuit for power transfer to a secondary coil, which is not shown in  FIG. 5A . In the present invention, a feedback controlled technique is used to achieve optimal on time TOP ( 504 ) automatically. A sample and hold circuit S/H ( 534 ) is used to sample the coil driver output voltage VL ( 504 ) across switch MS ( 516 ) at the instant switch MS ( 516 ) is turned on. This instant is denoted as turn on start time TST ( 402 ) and the sampled voltage of coil driver output VL ( 504 ) at turn on start time TST is denoted as VLS ( 538 ) as shown in  FIGS. 4A-4D  and  5 A. The difference between the sampled voltage VLS ( 538 ) and the reference voltage VREF ( 536 ), which represents an error voltage VER (not shown), is integrated by integrator  541  comprised of transconductor GM ( 540 ) and capacitor CI ( 546 ) to produce the integral over time of VER designated as voltage VIO in  FIG. 5A . To achieve on time TON equal to optimal on time TOP, reference voltage VREF ( 536 ) is set to 0V. The feedback loop for controlling MS ( 516 ) is to have coil driver output voltage VL ( 504 ) equal to zero when MS ( 516 ) starts to turn on. VL ( 504 ) is compared to VREF ( 536 ) after it is sampled at the instant when MS ( 516 ) starts to turn on. This comparison drives the on time in the right direction until VL ( 504 ) equals VREF ( 536 ). With VREF equal to zero, VL will be driven to zero in steady state and the optimum on time TON will be achieved. The integrator  541  output voltage VIO ( 542 ), is used as a threshold for comparator CO 1  ( 550 ). On time TON ( 404 ) is determined by the output of comparator CO 1  ( 550 ), ramp generator  552  and the value of VIO ( 542 ). When switch MS ( 516 ) turns on at turn on start time TST ( 402 ), ramp generator  552  begins to produce ramp voltage VRAMP ( 554 ) shown in  FIG. 5B . When VRAMP is greater than VIO, comparator CO 1  ( 550 ) will signal digital circuit  522  to turn off switch MS ( 516 ) via control signal  556 . Therefore, on time TON ( 404 ) is the time taken from TST ( 402 ) to the instant when comparator CO 1  ( 550 ) causes MS ( 516 ) to turn off. Digital circuits  522  include a repetitive pulse signal generator to provide a pulse train VSW ( 503 ) to coil driver switch MS ( 516 ) at operating frequency FO. Each pulse of pulse train VSW ( 503 ) has turn on start time TST ( 402 ) and a pulse width (“on time”) TON ( 404 ) which is controlled by feedback controller  530  via control signal  556 . 
         [0025]      FIG. 5B  illustrates the influence of the value of VIO on the switch on time TON. For example, for a VIO value of VIO1, the corresponding on time is TON1 and for a VIO value of VIO2, the corresponding on time is TON2. Since the signal appearing at the output of integrator  541  is greater at VIO2 than at VIO1, the switch on time TON2 will be longer than the on time TON1. The slope of the VRAMP ( 554 ) signal is fixed by the ramp generator ( 552 ), but can be adjusted to establish speed of feedback response. The maximum value of ramp voltage VRAMP ( 544 ) during any one cycle ( 412 ) of operating frequency FO is less than or equal to the supply voltage of ramp generator  552 . Accordingly, sample and hold circuit S/H ( 534 ), integrator  541 , ramp generator  552  and comparator CO 1  ( 550 ) may, in combination, be considered a feedback controller for providing a control signal  556  for controlling the on time of switch MS ( 516 ). The control signal comprises the integral of the difference between the sampled output voltage VLS and VREF as influenced by the ramp voltage VRAMP ( 554 ) in comparator CO 1 . For on time TON less than optimal on time TOP, sampled voltage VLS ( 538 ) and therefore error voltage VER, will be less than 0V as shown in  FIG. 4B . Integrator  541  will drive voltage VIO ( 542 ) to a higher value, resulting in a longer on time TON. 
         [0026]    For on time TON greater than optimal on time TOP, sampled voltage VLS will be greater than 0V as shown in  FIG. 4C . Integrator  541  output voltage VIO ( 542 ) will be driven to a lower value resulting in a shorter on time TON. In steady state, the feedback loop will drive sampled voltage VLS ( 538 ) to the value of the reference voltage VREF ( 536 ) and as a result, the error voltage VER=0V and voltage VIO ( 542 ) will remain constant. At that point, TON ( 404 ) is at its optimal value and equal to TOP ( 405 ) for VREF=0V. Even if the value of primary coil LP ( 512 ) deviates from the nominal value due to a nearby metallic object, the feedback loop will adjust TON ( 404 ) according to sampled voltage VLS ( 538 ) until VLS=0V and the optimal on time TOP ( 405 ) is achieved. Resistor RI ( 544 ) and capacitor CR ( 548 ) are added to the feedback loop for respective stability compensation and ripple reduction on voltage VIO ( 542 ). 
         [0027]    In cases where on time TON ( 404 ) is too short during power up, the coil driver output voltage VL ( 504 ) across switch MS ( 516 ) will go negative and turn on the parasitic diode of switch MS ( 516 ) before switch MS ( 516 ) turns on at turn on start time TST as shown in  FIG. 4D . Primary coil LP ( 512 ) will be charged through the parasitic diode of switch MS ( 516 ) and coil driver output voltage VL ( 504 ) may even begin to increase before switch MS ( 516 ) turns on at turn on start time TST, resulting in a positive sampled voltage VLS ( 538 ). The feedback loop may incorrectly interpret that on time TON is too long and proceed to reduce it further, eventually complete turning off switch MS ( 516 ). As a consequence, primary coil LP ( 512 ) will be recharged solely by the parasitic diode and coil driver  500  will operate at a frequency different from the operating frequency FO. In addition, the driver will have a very low figure of merit FM. This condition can be avoided by ensuring a minimum pulse width for TON and by adding a comparator CO 2  ( 532 ) as shown in  FIG. 5A . 
         [0028]    When the voltage across switch MS ( 516 ), VL is less than 0V, comparator CO 2  ( 532 ) will signal the sample and hold S/H ( 534 ) to sample voltage VL ( 504 ) at the next clock  520  cycle even before turn on start time TST. Hence, the sampled voltage VLS will be less than 0V such that integrator  541  will drive its output voltage VIO ( 542 ) to a higher value leading to a longer on time TON and ultimately, an optimal on time TOP in steady state. 
         [0029]    The power transfer level of coil driver  500  can be controlled by adjusting the coil supply voltage VLP ( 501 ) without affecting on time TON since the peak to peak primary coil current ILP-P is directly proportional to supply voltage VLP ( 501 ) according to Eq. (3). 
         [0030]      FIG. 6  is a schematic of an exemplary implementation of the inductor switch MS ( 516 ) and sample and hold S/H ( 534 ) of  FIG. 5A . For example, if a 5V 0.8 μm CMOS process is used to implement coil driver  500 , the VGS&#39;s and the VDS&#39;s of the MOSFETs will be limited to ˜5V and ˜12V, respectively. According to Eq. (2), the coil driver output voltage VL ( 604 ) across inductor switch  610  in this example can go up to ˜15V for a supply voltage VLP=5V. To accommodate the required high VDS for switch MS ( 616 ), a MOSFET transistor MC ( 618 ) is added in series to switch MS ( 616 ) as shown in  FIG. 6 . The drain voltage of switch MS ( 616 ), denoted by VLD ( 609 ), is now limited to &lt;5V for VDD=5V, and the VDS of transistor MC ( 618 ) will be limited to &lt;12V. Since large transistor sizes are needed for transistor MC ( 618 ) and switch MS ( 616 ) to minimize the overall on resistance, the voltage VL ( 604 ) is approximately equal to VLD ( 609 ) for VL essentially equal to 0V. 
         [0031]    Instead of sampling coil driver output voltage VL ( 604 ) directly, sample voltage VLS can be obtained by sampling VLD ( 609 ), which has a lower voltage swing that is less than VDD. Therefore, the input of the sample and hold S/H ( 534 ) does not need to have high voltage tolerance. Since voltages VL ( 604 ) and VLD ( 609 ) can also go below 0V as shown in  FIG. 4B  and  FIG. 4D , MOSFETs M 1 -M 2  ( 621 ,  622 ) are used as a level shifter as well as a buffer to prevent charge leakage from sampling capacitor CS ( 654 ) to VLD ( 609 ) via the parasitic NPN associated with switch S 1  ( 641 ). A similar circuit arrangement is used for the reference voltage input VREF ( 636 ) to match the VLD ( 609 ) voltage input. After the voltage VL ( 604 ) is sampled, the charges on sampling capacitors CS ( 654 ) redistribute to the holding capacitors CH ( 656 ). The voltage difference between holding capacitors CH ( 656 ) represents the voltage difference between VLD ( 609 ) and VREF ( 636 ), or VER ( 612 ). However, this operation also introduces an extra pole in the feedback loop. This extra pole is compensated using a switched capacitor CD ( 664 ), which allows better control on the DC gain as well as the pole location of the sample and hold S/H ( 634 ) for achieving overall stability of coil driver  500 . Switches S 1 -S 7  inside sample and hold S/H ( 634 ) are controlled by two non-overlapping clock signals—S ( 650 ) and T ( 652 ). Signal S controls switches S 1 , S 3 , S 5  and S 6 . Signal T controls switches S 2 , S 4  and S 7 . For the other circuits including transconductor GM ( 540 ), comparators CO 1  ( 550 ) and CO 2  ( 532 ), conventional circuit design techniques can be used. 
         [0032]    As discussed previously, coil driver  500  is also designed for sending data to an implant using ASK modulation. A low modulation index in the range between 5% and 25% can be used for such implants. Although ASK modulation on primary coil current IL ( 513 ) can be achieved by modulating the coil supply VLP ( 501 ) according to the digital input DATA ( 524 ), a complicated hybrid amplifier for fast settling can be required to drive supply voltage VLP ( 501 ) (See, for example, Y. Wu and P. Mok, “ A two - phase switching hybrid supply modulator for polar transmitters with  9%  efficiency improvement,”  ISSCC Dig. Tech. papers, pp. 196-197, 2010). 
         [0033]    A simpler scheme that does not require any additional discrete components to achieve ASK modulation can be used. It is based on changing the size of switch MS ( 516 ) according to digital input DATA. For DATA=1, the size of switch MS ( 516 ) remains nominal and the amplitude of primary coil current IL is the amplitude during the normal power transfer operation discussed above. For DATA=0, primary coil current IL ( 513 ) is modulated to have a lower amplitude by reducing the size of switch MS ( 516 ) for a higher on-resistance (RON), limiting the current flow from supply voltage VLP ( 501 ) to primary coil LP ( 512 ). However, the voltage across switch MS ( 516 ) is non-zero in this case even when switch MS ( 516 ) is on. As a result, the power dissipation is higher than the optimal value achieved during the normal power transfer operation. Nevertheless, sending data to an implant may not occur frequently, depending on the application. A technique for data transfer utilizing the tank circuit is to supplement the switch MS ( 516 ) with a plurality of switches, wherein the number of switches in the plurality is controlled by or is a function of the digital DATA Input signal which may be modulated by ASK for data transfer. 
         [0034]      FIGS. 7A-7B  is a flowchart  700  showing a method for feedback control of a coil driver, such as coil driver  500  in  FIG. 5A , for inductive power transfer according to an embodiment of the present invention. In block  702 , a repetitive pulse signal at the operating frequency FO is generated having a frequency of the clock  520  divided by N. Accordingly, N pulses of the clock  520  will occur between consecutive pulses of FO. Integrator voltage VIO ( 542 ) is set to an initial value. Flow proceeds to block  704 , where switch MS ( 516 ) is turned on at turn on start time TST, which is the time at which the leading edge of switch voltage VSW ( 503 ) occurs. Switch voltage VSW ( 503 ) is the pulse signal generated in block  702 . Flow proceeds to block  706 . 
         [0035]    In block  706 , switch MS ( 516 ) is turned off according to an initial preset turn on time. Flow proceeds to block  708  where the feedback controlled coil driver protocol commences. In block  708 , the coil driver output voltage VL ( 504 ) across switch MS ( 516 ) is sampled. Flow proceeds to block  710 . In block  710 , the voltage VL ( 504 ) is examined to determine whether it is less than 0 volts. If VL is equal to or greater than 0 volts, flow proceeds to block  712 . If VL is less than 0 volts, flow proceeds to block  730 . 
         [0036]    In block  712 , a test for the beginning of the next consecutive turn on start time TST occurs. If the next consecutive turn on start time TST has not occurred, then flow returns to block  710 . Blocks  710  and  712  comprise a continuous or repetitive loop until the next turn on start time TST occurs. 
         [0037]    In block  730 , coil driver output voltage VL ( 504 ) is sampled at the beginning of the next clock  520  cycle. In other words, VL is sampled at the occurrence of the next pulse in the pulse train defining clock  520 . No more than N clock pulses will occur before a TST occurs. Flow proceeds to block  732 , where a test for the beginning of the next turn on start time TST occurs. If the next turn on start time TST has not taken place, then flow returns to block  732 . If the next turn on start time TST has occurred, then flow proceeds to block  714 , where voltage VL ( 504 ) is sampled and flow proceeds to block  716 . 
         [0038]    In block  716 , switch MS ( 516 ) is turned on, ramp generator  552  starts to generate VRAMP ( 554 ). Flow proceeds to block  718 , where integrator voltage VIO ( 542 ) is updated based on the equation VIO (new)=VIO (old)+C×VL, where C is a constant. Flow proceeds to block  720 . 
         [0039]    In block  720 , the output of ramp generator  552  VRAMP ( 554 ) is examined to determine whether it is greater than integrator voltage VIO. If VRAMP is less than or equal to VIO, then flow proceeds to block  734 , where switch MS ( 516 ) is kept on and flow returns to block  720 . If VRAMP is greater than VIO, then flow proceeds to block  722 . 
         [0040]    In block  722 , the turn on time of switch MS ( 516 ) is tested to see if it is greater than a preset minimum turn on time. If the turn on time of switch MS ( 516 ) is not greater than the preset minimum turn on time, then flow proceeds to block  736 , where switch MS ( 516 ) is kept on and flow proceeds back to block  722 . If the turn on time of switch MS ( 516 ) is greater than a preset minimum turn on time, then flow proceeds to block  724 , where switch MS ( 516 ) is turned off and flow proceeds to block  726 . The blocks  722  and  724  are precautionary in nature to compensate for a situation when TON may be considered too short, as shown in  FIG. 4D , for proper circuit operation. However, with comparator ( 532 ) and the associated circuits operating as contemplated, the on time TON will be adjusted correctly and blocks  722  and  724  may be eliminated. 
         [0041]    In block  726 , a test occurs to determine if coil driver  500  should be turned off. If coil driver  500  is to be turned off, then method  700  ends. If coil driver  500  is not to be turned off, then flow returns to block  708 . 
         [0042]    Although the preceding description describes various embodiments of the system, the invention is not limited to such embodiments, but rather covers all modifications, alternatives, and equivalents that fall within the spirit and scope of the invention. Since many embodiments of the invention can be made without departing from the spirit and scope of the invention, the invention resides in the claims hereinafter appended.