Abstract:
The charger includes a controller, a battery power source having at least two power settings connected to the controller, a power supply connectable to an outside power source, the power supply receiving a current and voltage from the outside power source for providing power to at least one of the controller and the battery power source, and a foldback circuit for switching between two power settings depending upon at least one of the current and voltage received from the outside power source.

Description:
[0001]     The following application derives priority from U.S. Application No. 60/369,769, filed Apr. 3, 2002, now pending, and U.S. Application No. 60/377,184, filed on May 1, 2002, now pending. 
     
    
     FIELD OF THE INVENTION  
       [0002]     This invention relates generally to battery chargers and more particularly to battery chargers with protection circuitry.  
       BACKGROUND OF THE INVENTION  
       [0003]     The battery packs for portable power tools, outdoor tools and certain kitchen and domestic appliances may include rechargeable batteries, such as lithium, nickel cadmium, nickel metal hydride and lead-acid batteries, so that they can be recharged rather than be replaced. Thereby a substantial cost saving is achieved.  
         [0004]     Some chargers can be connected to a vehicle battery, such as a car battery. Referring to  FIG. 1 , car battery  1  can-be connected to charger  20  via a lighter plug  5 . Charger  20  in turn charges battery pack  10 .  
         [0005]     Two virtual resistors  3 ,  4  may exist between car battery  1  and charger  20 . Virtual resistors  3 ,  4  represent the inherent resistance before and after the lighter plug connection, which in turn create voltage drops. Accordingly, the voltage V IN  received by the charger  20  may not necessarily be equal to the voltage of car battery  1 .  
         [0006]     A fuse  2  may also be provided between car battery  1  and charger  20 . Typically, such fuse  2  has a rating of about  8  amps. In other words, if the current I IN  going to charger  20  is larger than about 8 amps, the fuse  2  will open.  
         [0007]     This could be problematic as charger  20  typically sends an effective constant current I OUT  to battery pack  10 . Such problem arises because of the following equation: 
 
( V   IN )( I   IN ) k =( V   PACK )( I   OUT ), 
 
         [0008]     where V IN , I IN , and I OUT  are defined above,  
         [0009]     k is the charger efficiency constant, and  
         [0010]     V PACK  is the voltage of battery pack  10 .  
         [0011]     Under such equation, since V PACK  is set by the battery pack, and I OUT  as set by the charger and the charger efficiency constant k are relatively constant, the only two variables remaining are V IN  and I IN . If V IN  drops below a certain threshold, I IN  will have to increase to maintain the equation. However, if I IN  increases beyond a certain threshold, it will force fuse  2  to open, thus prematurely ending charging.  
       SUMMARY OF THE INVENTION  
       [0012]     In accordance with the present invention, an improved battery pack charger is employed. The charger includes a controller, a battery power source having at least two power settings connected to the controller, at least one terminal connected to at least one of the controller and the battery power source, a power supply connectable to an outside power source, the power supply receiving a current and voltage from the outside power source for providing power to at least one of the controller and the battery power source, and a foldback circuit for switching between two power settings depending upon at least one of the current and voltage received from the outside power source.  
         [0013]     Additional features and benefits of the present invention are described, and will be apparent from, the accompanying drawings and the detailed description below. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0014]     The accompanying drawings illustrate preferred embodiments of the invention according to the practical application of the principles thereof, and in which:  
         [0015]      FIG. 1  is a simplified block diagram of a battery pack and charger;  
         [0016]      FIG. 2  illustrates an exemplary charger according to the present invention, where  FIG. 2A  is a block diagram of a battery pack and the charger, and  FIG. 2B  is a schematic diagram of the charger;  
         [0017]      FIG. 3  is a flowchart showing a method according to the present invention;  
         [0018]      FIG. 4  is a simplified block diagram of an alternate battery pack and charger;  
         [0019]      FIG. 5  is a schematic diagram of the watchdog circuit according to the invention;  
         [0020]      FIG. 6  is a schematic diagram of the charger including the watchdog circuit of  FIG. 5 ;  
         [0021]      FIG. 7  is a simplified block diagram of another alternate charmer; and  
         [0022]      FIG. 8  is a schematic diagram of an alternate watchdog circuit according to the invention.  
     
    
     DETAILED DESCRIPTION  
       [0023]     The invention is now described with reference to the accompanying figures, wherein like numerals designate like parts.  
         [0024]     Referring to  FIGS. 1-2 , a battery pack  10  is connected to a charger  20 . Battery pack  10  may comprise a plurality of battery cells  11  connected in series and/or parallel, which dictate the voltage and storage capacity for battery pack  10 . Battery pack  10  may include three battery contacts: first battery contact  12 , second battery contact  13 , third battery contact  14  and fourth battery contact  16 . Battery contact  12  is the B+ (positive) terminal for battery pack  10 . Battery contact  14  is the B− or negative/common terminal. Battery contact  13  is the S or sensing terminal. Battery contacts  12  and  14  receive the charging current sent from the charger  20  (preferably from current source  22 , as discussed below) for charging the battery pack  10 .  
         [0025]     As shown in  FIG. 2 , the battery cells  11  are connected between the battery contacts  12  and  14 . In addition, preferably connected between battery contacts  13  and  14  is a temperature sensing device  15 , such as a negative temperature co-efficient (NTC) resistor, or thermistor, R T . The temperature sensing device is preferably in closer proximity to the cells  11  for monitoring of the battery temperature. Persons skilled in the art will recognize that other components, such as capacitors, etc., or circuits can be used to provide a signal representative of the battery temperature.  
         [0026]     Battery pack  10  may also comprise an identifier as known in the prior art, such as resistor R ID , so that charger  20  can identify the type and capacity of the battery pack, and charge accordingly. Resistor R ID  is preferably connected between battery contacts  16  and  14 , where battery contact  16  is the ID terminal.  
         [0027]     The charger  20  preferably comprises a controller  21 , which in turn includes positive terminal (B+)  17  and negative (B−) terminal  18 , which are coupled to battery pack  10  via battery contacts  12  and  14 , respectively. The positive terminal may also act as an input, preferably an analog/digital input, in order for the controller  21  to detect the battery pack voltage. In addition, the controller  21  may include another input TC, preferably an analog/digital input, which is coupled to the temperature sensing device  15  via the third battery contact  13  (S). This allows the controller  21  to monitor the battery temperature.  
         [0028]     Controller  21  may include a microprocessor  23  for controlling the charging and monitoring operations. Controller  21  may control a charging power source for providing power to the battery pack  10 , such as current source  22  that provides current to battery pack  10 . This current may be a fast charging current and/or an equalization current. Current source  22  may be integrated within controller  21 .  
         [0029]     Controller  21  may have a memory  25  for storing data. Memory  25  may be integrated within controller  21  and/or microprocessor  23 .  
         [0030]     The charger  20 , and its elements within, including controller  21 , microprocessor  23 , and current source  22 , receive the necessary power from a DC mains power supply  24 , which may be ultimately connected to car battery  1 . DC mains power supply  24  may convert the power received from the vehicle battery to the necessary power requirements of the different elements, as is well known in the art. DC mains power supply  24  may include a filter, which in turn may include capacitors C 1 , C 2 , C 3 , C 36 , and C 34  and inductors L 1 , L 2 , L 3  to filter out unwanted fluctuations in the input voltage.  
         [0031]     Controller  21  may also control a fan  25 . Fan  25  preferably blows air towards the battery pack  10  for cooling the battery pack  10 .  
         [0032]     In order to avoid opening fuse  2  because of a high I IN , it is preferable to provide a foldback circuit  26  that monitors several inputs, and lowers the current output I OUT  of current source  22 . Foldback circuit  26  may monitor the current output I OUT , as well as the battery pack voltage V PACK . In addition, foldback circuit  26  may receive information from controller  26  and/or DC mains power supply  24  concerning input voltage V IN . If foldback circuit  26  determines that, based on those inputs, the input current I IN  will exceed a certain threshold, such as 8 amps, foldback circuit  26  will send a signal to current source  22 , lowering current output I OUT . By lowering current output I OUT , input current I IN  is also lowered, thus preventing opening fuse  2 .  
         [0033]     Referring to  FIG. 2B , foldback circuit  26  preferably works in the following manner. The connection from output B+ to diode D 38  is preferably used to detect a voltage level set by diodes D 38  and/or D 16 . When this voltage level is exceeded, transistor Q 3  is preferably switched on. Transistor Q 3 , when in the on state, preferably ensures that transistor Q 4  is in the off state by pulling the gate down to the source. Transistor Q 4  is preferably used a switch to change the gain of the current sense amplifier U 3 :A.  
         [0034]     Persons skilled in the art will note that pin P 21  of microprocessor  23  will sense the state of the amplifier U 3 :A by measuring the voltage. Microprocessor  23  can also detect the output voltage V OUT  via pin P 13  and the input voltage V IN  can be detected via pin P 4 .  
         [0035]     Pin P 21  of microprocessor  23  is preferably normally left in a high impedance state and preferably used as an input to detect the function of transistor Q 3 . When the microprocessor  23  needs to force the output current I OUT  low, it will preferably make pin P 21  an output and put it in the low state, thus removing the gate drive from transistor Q 4  and changing the gain of the current feedback amp U 3 :A. Such circuit is advantageous as it minimizes the number of components, as well as controls any unwanted oscillations.  
         [0036]     Persons skilled in the art will recognize that foldback circuit  26  can be implemented with a circuit, as shown in  FIG. 2B , or via a software algorithm, as shown in  FIG. 3 . Persons skilled in the art will recognize that the order of the steps discussed below may be altered.  
         [0037]     The charging process begins upon insertion of battery pack  10  into charger  20  by the user (ST 1 ). The charger  20  then begins charging (ST 2 ) by sending a charge current sent from current source  22  to battery pack  10 . Preferably, the fast charge current is about 2 Amps.  
         [0038]     The controller  21  and/or microprocessor  23  reads input voltage V IN  (ST 3 ). The controller  21  and/or microprocessor  23  then preferably checks whether input voltage V IN  is greater than a first threshold X (ST 4 ). Preferably, first threshold X represents a high vehicle battery voltage, which may be about 17 volts for a vehicle battery rated for 12 volts.  
         [0039]     If input voltage V IN  is not greater than a first threshold X, then controller  21  and/or microprocessor  23  then preferably checks whether input voltage V IN  is smaller than a second threshold Y (ST 5 ). Preferably, second threshold Y represents a low vehicle battery voltage, which may be about 10 volts for a vehicle battery rated for 12 volts.  
         [0040]     If (a) input voltage V IN  is not greater than a first threshold X and (b) input voltage V IN  is not smaller than a second threshold Y, charging of battery pack  10  continues until the charging process is terminated by removal of the battery pack  10 , or by a termination algorithm, etc. The controller  21  and/or microprocessor  23  nevertheless keep reading input voltage V IN  and comparing input voltage V IN  to first and second thresholds X,Y until termination.  
         [0041]     If (a) input voltage V IN  is greater than a first threshold X or (b) input voltage V IN  is smaller than a second threshold Y, an error subroutine may begin. It is preferable to set a counter to a certain predetermined number (ST 6 ), such as thirty. In addition, it is preferable to turn off current source  22  (and thus the output current I OUT ) (ST 7 ). A error signal may also be displayed via an LCD display or LEDs. A sound source, such as a piezoelectric element, a beeper, etc., may also be used to alert the user to the error condition.  
         [0042]     The controller  21  and/or microprocessor  23  may again read input voltage V IN  (ST 8 ). The controller  21  and/or microprocessor  23  then preferably checks whether input voltage V IN  is greater than a third threshold A (ST 9 ). Preferably, third threshold A represents a value lower than the first threshold X in order to prevent charger  20  from oscillating between states in the flowchart. Accordingly, third threshold A may be about 16.8 volts for a vehicle battery rated for 12 volts. If the input voltage V IN  is larger than third threshold A, then the charger  20  returns to ST 7  and/or ST 8  until the input voltage V IN  is equal to or smaller than third threshold A, or battery pack  10  is removed.  
         [0043]     If input voltage V IN  is not greater than a third threshold A, then controller  21  and/or microprocessor  23  then preferably checks whether input voltage V IN  is smaller than a fourth threshold B (ST 10 ). Preferably, fourth threshold B is a value higher than second threshold Y in order to prevent charger  20  from oscillating between states in the flowchart. Accordingly, fourth threshold B may be about 10.7 volts for a vehicle battery rated for 12 volts. If the input voltage V IN  is smaller than fourth threshold B, then the charger  20  returns to ST 7  and/or ST 8  until the input voltage V IN  is equal to or smaller than third threshold A, or battery pack  10  is removed.  
         [0044]     If (a) input voltage V IN  is not greater than a third threshold A and (b) input voltage V IN  is not smaller than a fourth threshold B, it is preferable to turn on current source  22  (and thus the output current I OUT ) (ST 11 ) for a limited amount of time, such as 10 milliseconds. The controller  21  and/or microprocessor  23  may again read input voltage V IN  (ST 12 ) to in effect check the battery pack&#39;s reaction to output current I OUT . After such reading, it is preferable to turn off current source  22  (and thus the output current I OUT  (ST 13 ). Turning on and off current source  22  allows the controller  21  to check the battery pack&#39;s reaction without sending too much current, which may damage the battery pack  10 .  
         [0045]     The controller  21  and/or microprocessor  23  then preferably checks whether input voltage V IN  is greater than a fifth threshold C (ST 14 ). Preferably, fifth threshold C represents a value higher than fourth threshold B. Accordingly, fifth threshold C may be about 10.2 volts for a vehicle battery rated for 12 volts. If the input voltage V IN  is larger than fifth threshold C, then the charger  20  returns to ST 3 , so that charging of battery pack  10  can continue. Persons skilled in the art shall recognize that, if an error signal was displayed, such signal can be ended or removed.  
         [0046]     However, if input voltage V IN  is not greater than a fifth threshold C, the counter can be decreased (ST 15 ). If the counter is zero (ST 16 ), then the charger  20  returns to ST 7  and/or ST 8  until the input voltage V IN  is equal to or smaller than third threshold A, or battery pack  10  is removed.  
         [0047]     If the counter is not zero, controller  21  and/or microprocessor  23  then preferably checks whether a phase back flag has been set (ST 17 ). If such flag has been set, then the charger  20  returns to ST 7  and/or ST 8  until the input voltage V IN  is equal to or smaller than third threshold A, or battery pack  10  is removed.  
         [0048]     If the phaseback flag has not been set, then controller  21  and/or microprocessor  23  then preferably control current source  22  to lower, or phase back, the output current I OUT  (ST 18 ). Preferably, the output current I OUT  is lowered from about 2 amps to about 1.3 amps for the rest of the charging process.  
         [0049]     Because of the lowered output current I OUT , it may be preferable to clear the memory stacks which contain input voltage V IN  and/or battery pack temperature information (ST 18 , ST 19 , respectively), so as to not trigger a termination algorithm prematurely.  
         [0050]     In addition, it is preferable to set the phaseback flag (ST 21 ). After setting the flag, the charger  20  can then return to ST 7  and/or ST 8  until the input voltage V IN  is equal to or smaller than third threshold A, or battery pack  10  is removed.  
         [0051]     It may also be preferable for the microprocessor  23  to lower the output current I ON  (e.g., from 2.0 amps to 1.3 amps) if the battery pack voltage V PACK  is above a certain threshold, such as about 34 volts. Like before, this is preferably done to avoid the opening of fuse  2 .  
         [0052]     Charger  20  may also have protective circuits other than foldback circuit  26 . For example, it is preferably to provide a circuit to turn off current source  22  if the output current ION is on and the battery pack  10  is removed. This could create a large voltage spike across the B+ and B− terminals, which could damage components within charger  20 .  
         [0053]     Rather than relying on the analog/digital inputs of microprocessor  23 , it is preferably to use a high speed input in microprocessor  23 , so that if the desired signal is received, the microprocessor  23  would turn current source  22  off. Persons skilled in the art will recognize that such high speed input is pin P 24  of microprocessor  23 . In addition, persons skilled in the art will recognize how the type of signal received by microprocessor  23  via pin P 24  from examining  FIG. 2B .  
         [0054]     It is also preferable to provide a watchdog circuit  27  that monitors whether microprocessor  23  is in control of current source  22 . In a preferred embodiment, watchdog circuit  27  monitors pulses given at a specific interval by the microprocessor  23 . In the event that the microprocessor  23  fails to provide such pulses at the predetermined interval, the watchdog circuit  27  preferably bypasses the microprocessor  23  and preferably disables current source  22  and/or DC mains power supply  24 . The disabled current source  22  and/or DC mains power supply  24  will preferably remain disabled until power is removed from charger  20 .  
         [0055]     The watchdog circuit  27  preferably has two resettable timers. These two timers are used to provide a margin of error before the watchdog circuit  27  disables current source  22  and/or DC mains power supply  24 , to prevent nuisance or undesired tripping of the watchdog circuit  27 . Typically, this margin of error is a factor of five. In other words, microprocessor  23  would have to miss five pulses before the watchdog circuit  27  disables current source  22  and/or DC mains power supply  24 .  
         [0056]     Referring to  FIG. 2B , transistors Q 1 , Q 2  are ultimately controlled by microprocessor  23  to provide pulses. When these pulses are present, a voltage is developed across capacitor C 20 , which in turn allows C 31  to charge. Preferably, the microprocessor shuts down the current source  22  for about 33 milliseconds in every one-second period.  
         [0057]     This allows capacitor C 20  to discharge through resistor R 38 . Since amplifier U 3 :B is preferably in a voltage follower configuration, capacitor C 31  preferably discharges into pin  7  of amplifier U 3 :B.  
         [0058]     If the microprocessor does not shut down current source  22  at the specified interval, capacitor C 3   1  will continue to charge until the voltage reaches approximately the zener voltage V Z  of diode D 35 . This allows current to flow through the base of transistor Q 7 , which starts to turn on transistor Q 7 . This in turn starts transistor Q 8  conducting, which in turn supplies more current through diode  41  to the base of transistor Q 7 , making transistor Q 7  to conduct more current. This feedback process continues until the circuit is latched with transistors Q 7 , Q 8  substantially, if not fully, saturated.  
         [0059]     When the voltage at the collector of transistor Q 8  is equal to or greater than the sum of zener voltage V Z  of diode D 40 , forward bias voltage V F  of diode D 8  and one volt (i.e., the shutdown voltage of integrated circuit U 2 ), integrated circuit U 2  is forced into an overcurrent condition and shuts down current source  22 . The watchdog circuit  27  will thus remain latched in this state until the power is removed from charger  20 .  
         [0060]     Persons skilled in the art will recognize that the watchdog circuit  27  may have three sections: a first timer, a second timer and a latch. The first timer will include capacitor C 19 , which preferably couples drain pulese to form a voltage across resistor R 38 , capacitor C 20  and diode D 12 . The timer is formed by the voltage decay of resistor R 38  and capacitor C 20  when the drain pulses are not present. Diode D 13  preferably discharges capacitor C 19 . Resistor R 37  limits the current into diode D 12 . Diode  23  blocks any discharge of capacitor C 20  except through resistor R 38 . Diode D  12  sets a maximum voltage on this timer circuit. Resistor R 21  limits current into pin  5  of amplifier U 3 :B.  
         [0061]     The second timer includes capacitor C 31 , resistor R 66 , which charges capacitor C 31 , diode D 10 , which prevents pin  7  of amplifier U 3 :B from charging capacitor C 31 , and amplifier U 3 :B, which discharges capacitor C 31 .  
         [0062]     The latch includes resistor R 39 , which allows the voltage to rise at the base of transistor Q 7  regardless of the potential across capacitor C 31 , diode D 35 , which sets the latch trip voltage, and capacitor C 32 , which filters noise across diode D 35 . As discussed above, the latch includes transistors Q 7 , Q 8 , which create a feedback loop, as well as resistor R 70 , which limits current through the base of transistor Q 8 , resistor R 63 , which sets the gain of transistor Q 8 , and resistor R 71 , which limits the current going into the base of transistor Q 7 . Furthermore, the latch includes resistor R 65 , which insures that diode D 35  is at VZ**, diode D 41 , which prevents voltage across capacitor C 31  from influencing pin  3  of integrated circuit U 2 , diode D 40 , which insures a latched state before shut down, diode D 32 , which prevents voltage a pin  3  of integrated circuit U 2  from being exceeded, and resistor R 64 , which limits current through diode D 32 . Finally, the latch includes a diode D 8 , which prevents the watchdog circuit to influence the charger circuitry during normal charger operation.  
         [0063]     Referring to  FIG. 2B , the values of the different components of an exemplary charger according to the invention are as follows:  
                                                       C1   1200 microfarads/35 V           C2   1200 microfarads/35 V           C3   1200 microfarads/35 V           C4   0.1 microfarads/50 V           C5   0.068 microfarads/100 V           C6   0.1 microfarads           C7   10 microfarads/25 V           C8   470 picofarads/500 V           C9   470 picofarads/500 V           C10   47 microfarads/250 V           C11   0.1 microfarads           C12   2700 picofarads/50 V           C13   0.1 microfarads           C14   0.01 microfarads           C15   1800 picofarads           C16   0.1 microfarads           C17   5.6 nanofarads           C18   0.1 microfarads           C19   2200 picofarads/500 V           C20   0.22 microfarads           C22   1 microfarads/25 V           C23   0.1 microfarads           C24   0.001 microfarads           C25   0.1 microfarads           C26   0.1 microfarads           C27   0.1 microfarads/25 V           C28   0.01 microfarads           C29   0.1 microfarads           C30A   1 microfarads/100 V           C31   47 microfarads/50 V           C32   0.1 microfarads           C33   0.1 microfarads           C36   1200 microfarads/35 V           D2   20 v Zener           D3   IN4973           D4   MUR460           D5   MUR460           D6   1OMQ060N           D7   10MQ060N           D8   IN4148           D10   IN4148           D12   IN5242           D13   IN4148           D16   33 V Zener           D17   IN4148           D18   LED           D19   IN4148           D20   IN4148           D21   IN4148           D22   IN4148           D23   IN4148           D24   IN4937           D25   IN5231B           D26   11DQ06           D27   IN4148           D28   6.8 V Zener           D29   IN4148           D32   IN5231B           D35   IN5231B           D36   10MQ060N           D39   P6KE91A           D40   6.2 V Zener           D41   1N4148           D42   36 V Zener           D43   51 V Zener           L1   Rod Core           L2   Rod Core           L3: B   Choke           L4   550 microhenries           Q1   IRF3205           Q2   IRF3205           Q3   2N3904           Q4   BSH105           Q5   2N3904           Q6   BSH105           Q7   MMBT3904           Q8   MMBT3906           Q9   ZTX449           Q10   ZTX549           R1   43 kiloohms           R2   1 kiloohms           R3   510 ohms           R5   100 ohms           R7   18 ohms           R8   18 ohms           R9   2.05 kiloohms           R10   150 ohms           R13   13.7 ohms           R14   392 ohms           R15   1 kiloohms           R16   1.82 kiloohms           R17   1.82 kiloohms           R18   1 kiloohms           R19   10 kiloohms           R20   22.1 kiloohms           R21   10 kiloohms           R24   1 kiloohms           R25   10 kiloohms           R26   10 kiloohms           R27   80.6 kiloohms           R28   9.09 kiloohms           R29   2 kiloohms           R30   2 kiloohms           R31   27.4 kiloohms           R32   15.0 kiloohms           R33   39 kiloohms           R34   51 kiloohms           R35   10 kiloohms           R36   1 kiloohms           R37   300 ohms           R38   10 kiloohms           R39   10 kiloohms           R41   90.9 kiloohms           R42   30.9 kiloohms           R43   390 ohms           R44   100 ohms           R45   8.25 kiloohms           R46   1 kiloohms           R47   10 kiloohms           R48   100 ohms           R49   1 kiloohms           R50   0.12 ohms           R51   1.82 kiloohms           R53   665 ohms           R54   10 kiloohms           R56   1 kiloohms           R57   2 kiloohms           R58   332 ohms           R59   90.9 kiloohms           R60   120 ohms           R63   1.5 kiloohms           R64   330 ohms           R65   30 kiloohms           R66   200 kiloohms           R68   200 kiloohms           R70   1.2 kiloohms           R71   1.2 kiloohms           R72   200 kiloohms           R73   200 kiloohms           R74   11.8 ohms           R75   11.8 ohms           R76   124 kiloohms           R77   11.5 ohms           Microprocessor 23   Zilog Z86C83           U2   UC3845           U3   LM358           U4   5 volt, 2%           VR1   10 kiloohms potentiometer           X1   3.58 megahertz           Z1   15G330K                      
 
         [0064]     Referring to  FIG. 4 , an alternate charger and battery pack combination is shown, wherein like numerals designate like parts. One major difference between the prior charger and the present charger is that the present charger  20 , and its elements within, including controller  21 , microprocessor  23 , and current source  22 , receive the necessary power from an AC mains power supply  24 ′, rather than DC mains power supply  24 .  
         [0065]     It is preferable to provide a watchdog circuit  27  that monitors whether controller  21  and/or microprocessor  23  are in control of current source  22 , and/or that the current source  22  is responding to commands from controller  21  and/or microprocessor  23 . In a preferred embodiment, watchdog circuit  27  monitors pulses given at a specific interval by the microprocessor  23 . In the event that the microprocessor  23  fails to provide such pulses at the predetermined interval, the watchdog circuit  27  preferably bypasses the microprocessor  23  and preferably disables current source  22  and/or AC mains power supply  24 ′. The disabled current source  22  and/or AC mains power supply  24 ′ will preferably remain disabled until power is removed from charger  20 .  
         [0066]     One embodiment of watchdog  27  is shown in  FIGS. 5-6 . Terminal C is preferably connected to the output of current source  22  and the battery pack  10 . In addition, terminal C may receive an oscillating voltage, which is preferably rectified and filtered by diode D 38 ′ and capacitor C 27 ′. The microprocessor  23  basically superimposes a signal on the current source output by disabling the current source  22  for a predetermined period of time, e.g., 10 milliseconds once every second. The  10  ms signal allows capacitor C 27 ′ to discharge, limiting the current through transistor Q 12 ′.  
         [0067]     When transistor Q 12 ′ does not conduct, current preferably flows through resistors R 84 ′, R 86 ′, causing transistor Q 13 ′ to conduct. When transistor Q 13 ′ conducts, capacitor C 29 ′ is preferably discharged. The periodicity of the 10 ms signal prevents the voltage across capacitor C 29 ′ from rising to a level sufficient to trigger the latching circuit formed by transistors Q 14 ′, Q 15 ′.  
         [0068]     If the 10 ms signal pulse did not happen once during a period of about 2-3 seconds, the supply voltage from terminal A charges capacitor C 29 ′ through resistor R 85 ′ beyond the threshold, actuating latching circuit Q 14 ′, Q 15 ′. When the latching circuit latches, the voltage between terminals A, B goes down to 1 volt, disabling the current source  22 .  
         [0069]     Referring to  FIGS. 5-6 , the values of the different components of an exemplary charger according to the invention are as follows:  
                                                       C1′   0.22 microfarads, 10%, 400 VDC           C3′   100 microfarads, 250 V           C5′   100 microfarads, 10 V, 20%,           C6′   1000 picofarads, 1 KV, 20%           C7′   1 microfarad, 35 V, 20%           C8′   1000 picofarads, 1 KV, 20%           C9′   0.1 microfarad, 50 V, 10%           C12′   1 microfarad, 35 V, 20%           C13′   100 picofarads, 50 V, 10%           C14′   1000 picofarads, 50 V, 10%           C15′   22 microfarads, 35 V, 20%           C16′   1 microfarad, 35 V, 20%           C17′   10 microfarads, 100 V           C27′   0.1 microfarad, 50 V, 10%           C28′   0.01 microfarads, 50 V, 10%           C29′   100 microfarads, 50 V, 20%           C30′   0.1 microfarad, 50 V, 10%           D1′   1N4006           D2′   1N4006           D3′   1N4006           D4′   1N4006           D5′   1N4006           D6′   1N4006           D8′   (LED) RED           D9′   5.1 V, 5%, ½ W, SMT           D10′   18 V, 5PCT, ½ W, SMT           D12′   1N5248B           D14′   1N4937           D15′   1N4148           D16′   4 A, 600 V, UFR (MUR460)           D17′   1N4148           D19′   1N5267B           D21′   75 V, SMT (1N4148W)           D22′   1N4006           D23′   51 V, .5 W, LEADED (P6KE51A)           D24′   1N5257B           D29′   75 V, SMT (1N4148W)           D34′   1N4937           D38′   1N4937           F1′   2 amps, 250 V           L1′   100 microhenries           L2′   4.3 millihenries LFU1005V03           Q1′   IRF644           Q2′   2N3906           Q3′   2N3904           Q4′   2N3906           Q5′   2N3904           Q6′   2N5551           Q7′   2N3904           Q12′   2N3904           Q13′   2N3904           Q14′   2N3906           Q15′   2N3904           R1′   150 kiloohms           R2′   7.5 kiloohms           R3′   7.5 kiloohms           R5′   1 kiloohms           R6′   39 kiloohms           R7′   10 ohms           R8′   200 ohms           R9′   2.2 kiloohms           R11′   510 ohms           R12′   100 ohms           R13′   100 ohms           R14′   2.7 kiloohms           R15′   47 kiloohms           R16′   36 kiloohms           R17′   47 kiloohms           R18′   300 kiloohms           R19′   4.02 kiloohms           R20′   620 kiloohms           R21′   0.11 ohms           R22′   100 kiloohms           R24′   47.5 kiloohms           R25′   14 kiloohms           R26′   80.6 kiloohms           R27′   240 kiloohms           R28′   7.5 kiloohms           R31′   240 kiloohms           R34′   5.1 kiloohms           R35′   33 kiloohms           R36′   8.25 kiloohms           R37′   10 kiloohms           R38′   33 kiloohms           R39′   8.2 kiloohms           R40′   158 kiloohms           R42′   2.4 ohms           R47′   82 kiloohms           R48′   82 kiloohms           R49′   100 kiloohms (NTC thermistor)           R51′   1 kiloohms           R52′   33 kiloohms           R53′   360 kiloohms           R54′   120 kiloohms           R55′   240 kiloohms           R65′   100 kiloohms           R68′   10 kiloohms           R70′   100 kiloohms           R71′   270 kiloohms           R81′   24 kiloohms           R82′   10 kiloohms           R83′   10 kiloohms           R84′   10 kiloohms           R85′   51 kiloohms           R86′   5.1 kiloohms           R87′   47 ohms           R88′   470 kiloohms           R89′   47 kiloohms           R90′   510 ohms           R91′   240 ohms           R92′   100 ohms                      
 
         [0070]     U 1 ′ PIC16C717 from Microchip Technologies  
         [0071]     Persons skilled in the art will recognize that the sensing terminal, i.e., terminal C, of watchdog circuit  27  is hard-wired onto the output of current source  22 . However, this need not be so. Referring to  FIGS. 7-8 , watchdog circuit  27 ′ is preferably inductively connected to the output of current source  22 .  
         [0072]     Preferably, a wire loop WL is used to detect, by means of magnetic induction, the presence of a periodic signal superimposed by controller  21  (or microprocessor  23 ) upon the output of current source  22 . The detected superimposed periodic signal is demodulated by watchdog circuit  27 ′. Like before, the microprocessor  23  basically superimposes a signal on the current source output by disabling the current source  22  for 10 milliseconds once every second.  
         [0073]     Watchdog circuit  27 ′ preferably has several loops of wire forming wire loop WL. The loops are placed around or in proximity to the main inductor (not shown) of current source  22 . The flux linkage between wire loop WL and the main inductor imposes a voltage across wire loop WL. Voltage across wire loop WL in turn forces current to flow through diodes D 38 ′, D 39 ′. Current through diode D 38 ′ in turn excites the filter network formed by resistors R 92 ′, R 93 ′ and capacitor C 31 ′.  
         [0074]     As current flows, capacitor C 31 ′ is charged, promoting current flow through resistor R 94 ′ and causing transistor Q 16 ′ to conduct. In other words, detection of the 10 ms signal preferably excites the filter by charging capacitor C 31 ′, promoting current flow through resistor R 94 ′ and causing transistor Q 16 ′ to conduct.  
         [0075]     When transistor Q 16 ′ conducts, current through resistor R 95 ′ is preferably limited, thus preventing transistor Q 17 ′ from conducting. When transistor Q 17 ′ does not conduct, current through diode D 39 ′ is allowed to charge capacitor C 32 ′ with a time constant effectively programmed by resistor R 96 ′. If the voltage across capacitor C 32 ′ rises to a sufficient level, then the latching circuit formed by resistors R 97 ′, R 98 ′, and transistors Q 18 ′, Q 19 ′ is triggered. Such latching circuit can be used to short (and preferably disable) the current source  22 .  
         [0076]     When the current source  22  is disabled for  10  ms, no voltage is created through wire loop WL. Because no current then flows through diodes D 38 ′, D 39 ′, capacitor C 31 ′ can discharge. The discharge of capacitor C 1  in effect limits the current through resistor R 94 ′ and transistor Q 16 ′, preventing transistor Q 16 ′ from conducting.  
         [0077]     When transistor Q 16 ′ does not conduct, current flows through resistors R 99 ′, R 95 ′, thus causing transistor Q 17 ′ to conduct. When transistor Q 17 ′ conducts, capacitor C 32 ′ preferably discharges with a time constant effectively programmed by resistor R 100 ′. However, the periodicity of the 10 ms signal prevents the voltage across capacitor C 32 ′ from rising to a level sufficient to trigger the latching circuit formed by resistors R 97 ′, R 98 ′, and transistors Q 18 ′, Q 19 ′.  
         [0078]     Persons skilled in the art will recognize that the watchdog circuits  27 ,  27 ′ are preferably not connected to the low reference voltage, i.e., ground, in chargers. This obviates the need for expensive high voltage parts, such as high voltage resistors and switches, to handle 120-150 volts.  
         [0079]     Finally, persons skilled in the art may recognize other additions or alternatives to the means disclosed herein. However, all these additions and/or alterations are considered to be equivalents of the present invention.