Abstract:
An electronic circuit includes a functional circuit in series with at least one first current source between two terminals of application of a power supply voltage. The first current source is controllable between an operating mode where it delivers a fixed current, independent from the power consumption of said functional circuit, and an operating mode where it delivers a variable current, depending on the power consumption of the functional circuit.

Description:
BACKGROUND 
       [0001]    1. Technical Field 
         [0002]    The present disclosure generally relates to electronic circuits and, more specifically, to the power supply of such circuits. It more specifically applies to a regulator, integrated with the functional circuital block that it powers. 
         [0003]    2. Description of the Related Art 
         [0004]    Certain integrated circuits or integrated circuit functional blocks manipulate quantities (generally digital data) which are desired to be made inaccessible from the outside of the circuit, or accessible with a controlled access. Such is for example the case of secret keys in cryptographic applications. The current signature of integrated circuits is however capable of providing information to an external observer (a hacker) carrying out so-called side channel attacks. 
       BRIEF SUMMARY 
       [0005]    One embodiment provides a solution masking the current signature of an integrated circuit or of a portion of such a circuit. 
         [0006]    One embodiment provides a solution which remains compatible with different operating modes of the integrated circuit and, more specifically, compatible with a nominal operating mode, a stand-by operating mode, or a test operating mode. 
         [0007]    Thus, an embodiment provides an electronic circuit comprising a functional circuit in series with at least one first current source between two terminals of application of a power supply voltage, wherein said first current source is controllable between an operating mode where it delivers a fixed current, independent from the power consumption of said functional circuit, and an operating mode where it delivers a variable current depending of the power consumption of said functional circuit. 
         [0008]    According to an embodiment, said first current course is in series with a second current source of variable value, said second source being in parallel on said functional circuit and being active in the first operating mode. 
         [0009]    According to an embodiment, the second current source is controlled by a differential amplifier measuring the level of the power supply voltage of said functional circuit. 
         [0010]    According to an embodiment, said first current source comprises a current mirror assembly of first transistors on a branch integrating a switch for selecting the operating mode. 
         [0011]    According to an embodiment, a transistor controlled by said amplifier grounds the gates of the first transistors. 
         [0012]    The foregoing and other features and advantages will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS 
         [0013]      FIG. 1  shows an embodiment of an electronic circuit; 
           [0014]      FIG. 2  shows an embodiment of a power supply regulator, integrated with a functional circuital block in an electronic circuit; 
           [0015]      FIG. 3  shows a more detailed diagram of an embodiment of the power supply regulator; and 
           [0016]      FIGS. 4A and 4B  are timing diagrams illustrating the operation of the regulator of  FIGS. 2 and 3 . 
       
    
    
     DETAILED DESCRIPTION 
       [0017]    The same elements have been designated with the same reference numerals in the different drawings. For clarity, only those steps and elements which are useful to the understanding of the embodiments which will be described have been detailed. In particular, the function implemented by the integrated circuit(s) or circuit portion(s) powered by means of the regulator to be described has not been detailed, the described embodiments being compatible with usual functions of such functional blocks. 
         [0018]      FIG. 1  very schematically shows an electronic circuit  1  (IC) of the type to which the present disclosure applies. 
         [0019]    Such a circuit is intended to be supplied with a D.C. voltage Vps applied between terminals  12  (voltage Vps) and  14  (ground GND). 
         [0020]    The embodiments will be described hereafter in relation with this example of supply with a positive D.C. voltage. Such embodiments however transpose to other forms of D.C. power supply, for example, a negative power supply or a power supply between positive and negative potentials. 
         [0021]    In applications where all or part of circuit  1  manipulates data, the access to which is desired to be protected from the outside (secret quantity, cryptography algorithms, etc.), it is desirable to avoid for the current signature of circuit  1 , that is, the current variation sampled by this circuit from the power supply source, to enable to detect the protected data. Indeed, the integrated circuit power consumption, and thus the amount of current sampled from the power supply, depends on the task executed by the circuit and on the states of the manipulated data. This type of side-channel attack is known as static power analysis (SPA) or differential power analysis (DPA). 
         [0022]      FIG. 2  is a simplified representation of an integrated circuit lA equipped with a regulator  2 . This regulator is intended to power the operational function circuits (FCT)  3  of circuit  1 A. 
         [0023]    In the following description, regulator  2  is assumed to power the entirety of circuit  1 A, that is, that the circuit only integrates functional circuit  3  and regulator  2 . However, the embodiments which will be described more generally apply to the power supply, by a regulator  2 , of all or part of an integrated circuit, the concerned portion(s) preferably corresponding to the portions having a power consumption which is desired to be masked. 
         [0024]    To mask the power consumption of functional circuit  3 , it is provided to set to a constant average value I T  the current sampled from the power supply. A source  22  of a current, for example, but not necessarily, constant, is thus provided between terminal  12  and a terminal  16  for powering block  3 . In order for current I T  to be constant independently from a current I r  really consumed by block  3 , a variable current source  24  is provided in parallel on block  3 . The function of current source  24  is to consume a current I v  such that the sum of currents I r  and I v  is constant in average and equal to I T . 
         [0025]    For example, current source  22  is sized according to the maximum possible power consumption of functional circuit  3  so that, whatever this power consumption, current I sampled from the power supply  2  is constant in average. 
         [0026]    The power supply  2  includes a differential amplifier  4  having first and second inputs that respectively receive a reference level REF and a voltage V DD  that powers the functional circuit  3 . Variable current source  24  is controlled by a differential output of the differential amplifier  4  of level V DD . Thus, amplifier  4  regulates the value of current I v  according to the power consumption of block  3 . When the power consumption of block  3  increases, the level of voltage V DD  tends to decrease since the total current sampled by branches  24  and  3  is set by value I T . Amplifier  4  then controls source  24  to decrease current I v  that it samples and thus restore the level of voltage V DD . In the opposite case where the power consumption of block  3  decreases, amplifier  4  causes an increase of current I v  sampled by source  24 . 
         [0027]    The inventors have however observed that there are integrated circuit operating situations where it is not desirable to implement the functionality of current sources  22  and  24 , whether it generates too high a power consumption, or whether it is precisely desired to visualize the current power consumption, for example, in a test situation. 
         [0028]    To allow an operation where current I is not maintained constant, it is functionally provided to deactivate current sources  22  and  24 . This function is symbolized by two switches K 1  and K 2  respectively interposed in series with source  22 , between terminals  12  and  16 , and with source  24 , between terminals  16  and  14 . Switches K 1  and K 2  are controlled from a same signal CTRL. In a first position (called A in  FIG. 2 ), switches K 1  and K 2  connect sources  22  and  24  to the circuit and the above-described operation is then obtained. In a second position (called B in  FIG. 2 ), switch K 2  is open, thus deactivating current source  24  and switch K 1  connects, instead of source  22 , a variable current source  26  between terminals  12  and  16 . The variable current source is controlled by amplifier  4  to preserve a functional circuit of regulation of level V DD  required by the operation of circuit  3 . Thus, when circuit  3  tends to draw more current (current I r  increases), amplifier  4  causes an increase of the current provided by source  26  to maintain voltage level V DD . Conversely, when the power consumption of circuit  3  decreases, comparator  4  causes a decrease of the current in source  26 , here again to maintain the desired voltage level V DD .  FIG. 3  shows a more detailed electric diagram of an embodiment of circuit  1 A of  FIG. 2 . 
         [0029]    Differential amplifier  4  receives a reference voltage V REF  (for example, a so- called bandgap voltage) as well as data relative to the value of voltage V DD  at node  16  (typically via two resistors R 1  and R 2  in series between terminal  16  and ground  14 ). Amplifier  4  controls current source  24 , here formed of an N-channel MOS transistor N 24  connected between terminal  16  and ground  14 . Current source  22  is formed of a P-channel MOS transistor P 22 , connected between terminals  12  and  16  and assembled as a current mirror having a branch comprising, in series between terminals  12  and  14 , a P-channel MOS transistor P 21 , a switch K playing the role of switches K 1  and K 2  of  FIG. 2 , and a source  28  of current I s . A surface area ratio N between transistors P 21  and P 22  sets the value of current I T  with respect to current I s . 
         [0030]    Current source  26  is formed of an N-channel MOS transistor N 26  connecting node  23  of interconnection of the gates of transistors P 21  and P 22  to ground  14 . The gate of transistor N 26  is connected to the junction point of a source  29  of a bias current I p  and of an N-channel MOS transistor N 27  between terminals  12  and  14 , the gate of transistor N 27  being connected to the output of amplifier  4 . Bias current source  29  and transistor N 27  operate as an inverter amplifier (common source) for the output of amplifier  4  with respect to transistor N 26 . 
         [0031]    When switch K is closed, the circuit operates as described hereabove in a mode where the total value I of the current sampled from the power supply source at level I T  is maintained (neglecting the power consumption in the branch of transistor P 21 ). Current source  29  may be turned off in this operating mode, the gate of transistor N 26  then being grounded. 
         [0032]    When switch K is open, transistor N 26  behaves as the source of current I s  to set (taking into account the surface area ratio between transistors P 21  and P 22 ) the current in transistor P 22  to make it approximately equal to current I r  consumed by functional circuit  3 , and thus regulate the level of voltage V DD  independently from the power consumption of functional circuit  3 . 
         [0033]      FIGS. 4A and 4B  illustrate, in timing diagrams, the operation of the regulator of  FIGS. 2 and 3 .  FIG. 4A  illustrates an example of variation of current I sampled from the power supply.  FIG. 4B  illustrates an example of states ON or OFF of signal CTRL, state ON corresponding to a position where switch K is closed. 
         [0034]    In the left-hand portion of the timing diagrams, a situation A corresponding to a masking of the current consumption of the circuit is assumed. In this case, current I r  really consumed by functional circuit  3  is completed by current I v  consumed by current source  24  so that the total current I sampled from the power supply corresponds to value I T  . In such a situation, a possible attacker cannot extract data relative to the operations performed by functional circuit  3  from an analysis of the circuit power consumption. 
         [0035]    The central and right-hand portions of  FIGS. 4A and 4B  illustrate two examples of situation where switch K is open (state OFF). In the central portion, a stand-by operating mode of functional circuit  3 , where its power consumption need not be masked and where it is however desired to decrease the general circuit power consumption, is assumed. In such a case, current I corresponds to current I r  really consumed. However, as shown in  FIG. 4A , the power consumption is decreased with respect to an operation where the current consumption is masked. 
         [0036]    In the right-hand portion of  FIGS. 4A and 4B , an operation of the circuit in test mode is assumed where, to be able to verify the operation, it is desired to be able to measure the power consumption of functional circuit  3 , which should thus not be masked. In such a situation, the power consumption may remain high and reach value I T . However, it is not masked. 
         [0037]    When switch K is open, the operation is the following. If current I r  tends to increase by a power consumption inflow in block  3 , voltage V DD  tends to decrease so that the level on the non-inverting terminal of amplifier  4  also tends to decrease. The output voltage of this amplifier also decreases. Due to the inversion function ensured by transistor N 27 , the gate voltage level of transistor N 26  increases. This results in an increase of the current sampled by transistor N 26 , which results in a decrease of the gate voltage on node  23  and, accordingly, in an increase of the current in transistor P 22 , which allows an increase of the level of voltage V DD , thus regulating this level. In the case where the power consumption by block  3  decreases, the reverse operation occurs. 
         [0038]    In a practical implementation, it will of course be ascertained to provide capacitive compensation elements, in particular between amplifier  4  and the gate of transistor N 26 , for the stability of the assembly. 
         [0039]    An advantage of the described embodiment is that it is now possible to choose between a masking of the power consumption of an integrated circuit to accordingly protect manipulations of information that it contains and a low-power consumption operation (stand-by mode or test mode). As a variation, this function may be used to control, at will, the implementation or not of the masking, for example, when circuit  1 A performs a critical operation in terms of information security. 
         [0040]    Another advantage is that its forming is particularly simple, the cost in terms of number of transistors to ensure the two functions being low. 
         [0041]    Various embodiments have been described. Various alterations, modifications, and improvements will occur to those skilled in the art. In particular, the selection of the values to be given to the different currents of the different fixed current sources is to be made according to the application, and especially to the expected power consumptions. Further, the practical implementation of the described embodiments is within the abilities of those skilled in the art based on the functional indications given hereinabove. 
         [0042]    Such alterations, modifications, and improvements are intended to be part of this disclosure. Accordingly, the foregoing description is by way of example only and is not intended to be limiting. 
         [0043]    The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.