Abstract:
An active high gain filter includes high value resistances in feedback implemented using a negative resistance circuit configuration. The high value resistance is implemented using two or smaller resistances connected in the negative resistance circuit configuration. This implementation permits integration of the filter circuit using less occupied area while still providing an accurate transfer function response.

Description:
TECHNICAL FIELD 
       [0001]    The present invention relates to filter circuits. 
       BACKGROUND 
       [0002]    Since the early days of microminiaturization, the design and implementation of filters has presented special problems relating to the difficulty in miniaturizing conventional LCR (inductor-capacitor-resistor) filters for integration on a chip. In particular, integrating the inductor component has proven to be a difficult challenge. Thus, there has been a preference for the use of inductor-less alternatives to LCR filters that are compatible with microminiaturization and on-chip integration. This continues to be necessary because, in spite of the “digital revolution,” the so-called “analog front end” (AFE) of most electronic devices, which interface with the real world, is and will continue to be, analog. 
         [0003]    The design of high-accuracy analog circuits is becoming more difficult with current mixed-signal integrated circuits because of the scaling down of both circuit supply voltages and transistor channel lengths. Most of these circuits require the use of high performance active filters. For example, radio-frequency (RF) transceivers make use of high gain filters at the intermediate frequency (IF). Indeed, the gain achievable in the early stages of the receiver is limited due to the high operation frequency. Even electronics circuits for micro-mechanical sensors (MEMS) require high gain filters. For example, high gain filters are used to evaluate the movement of mechanical parts by evaluating the charge variations in their capacitance. Unfortunately, the high value of the resistors required in the active filter in order to implement a high gain leads to a waste of circuit area and an increase in the cost of production. Furthermore, due to the dimensions of such resistors, the parasitic effects are not negligible and introduce distortion in the frequency response of the filter. Even the in-band group-delay variation could be affected. 
         [0004]    For these reasons there is a need in the art for a new approach/topology to implement a filter with a high-gain and accurate transfer function. 
         [0005]    Reference is now made to  FIG. 1  showing a circuit diagram for a second order complex band-pass filter circuit. The topology used is referred to in the art as the leapfrog topology. The leapfrog topology is preferred because it provides for a low sensitivity to process and mismatch variation. This is important for a complex band-pass filter in order to guarantee an accurate image rejection in a frequency down conversion circuit. 
         [0006]    The filter circuit receives a differential in-phase input signal I I  and a differential quadrature-phase input signal I Q . The filter circuit outputs a differential in-phase output signal V I  and a differential quadrature-phase output signal V Q . 
         [0007]    The differential in-phase input signal I I  is applied to the differential inputs of a first operational amplifier  10 . The differential outputs of the first operational amplifier  10  are coupled to the differential inputs of the first operational amplifier through a feedback network formed by resistor R 1  connected in parallel with capacitor C 1 . Specifically, the non-inverting output of the first operational amplifier  10  is coupled to the non-inverting input of the first operational amplifier  10  by R 1  and C 1  connected in parallel, while the inverting output of the first operational amplifier  10  is coupled to the inverting input of the first operational amplifier  10  by R 1  and C 1  connected in parallel. 
         [0008]    The differential quadrature-phase input signal I Q  is applied to the differential inputs of a second operational amplifier  12 . The differential outputs of the second operational amplifier  12  are cross-coupled to the differential inputs of the second operational amplifier through a feedback network formed by resistor R 2  connected in parallel with capacitor C 2 . Specifically, the non-inverting output of the second operational amplifier  12  is coupled to the inverting input of the second operational amplifier  12  by R 2  and C 2  connected in parallel, while the inverting output of the second operational amplifier  12  is coupled to the non-inverting input of the second operational amplifier  10  by R 2  and C 2  connected in parallel. 
         [0009]    In a preferred implementation, R 1 =R 2  and C 1 =C 2 . 
         [0010]    The differential outputs of the first operational amplifier  10  are further cross-coupled to the differential inputs of the second operational amplifier  12  by resistors R 3 . Specifically, the non-inverting output of the first operational amplifier  10  is coupled to the inverting input of the second operational amplifier  12  by R 3 , while the inverting output of the first operational amplifier  10  is coupled to the non-inverting input of the second operational amplifier  12  by R 3 . 
         [0011]    The differential outputs of the second operational amplifier  12  are further coupled to the differential inputs of the first operational amplifier  10  by resistors R 4 . Specifically, the non-inverting output of the second operational amplifier  12  is coupled to the non-inverting input of the first operational amplifier  10  by R 4 , while the inverting output of the second operational amplifier  12  is coupled to the inverting input of the first operational amplifier  10  by R 4 . 
         [0012]    In a preferred implementation, R 3 =R 4 . 
         [0013]    The differential outputs of the first operational amplifier  10  are further cross-coupled to the differential inputs of a third operational amplifier  14  by resistors R 5 . Specifically, the non-inverting output of the first operational amplifier  10  is coupled to the inverting input of the third operational amplifier  14  by R 5 , while the inverting output of the first operational amplifier  10  is coupled to the non-inverting input of the third operational amplifier  14  by R 5 . The differential outputs of the second operational amplifier  12  are further cross-coupled to the differential inputs of a fourth operational amplifier  16  by resistors R 6 . Specifically, the non-inverting output of the second operational amplifier  12  is coupled to the inverting input of the fourth operational amplifier  16  by R 6 , while the inverting output of the second operational amplifier  12  is coupled to the non-inverting input of the fourth operational amplifier  16  by R 6 . 
         [0014]    In a preferred implementation, R 5 =R 6 . 
         [0015]    The differential outputs of the third operational amplifier  14  (at the differential in-phase output signal V I ) are coupled to the differential inputs of the third operational amplifier through a feedback network formed by resistor R 7  connected in parallel with capacitor C 3 . Specifically, the non-inverting output of the third operational amplifier  14  is coupled to the non-inverting input of the third operational amplifier  14  by R 7  and C 3  connected in parallel, while the inverting output of the third operational amplifier  14  is coupled to the inverting input of the third operational amplifier  14  by R 7  and C 3  connected in parallel. 
         [0016]    The differential outputs of the fourth operational amplifier  16  (at the differential quadrature-phase output signal V Q ) are cross-coupled to the differential inputs of the fourth operational amplifier through a feedback network formed by resistor R 8  connected in parallel with capacitor C 4 . Specifically, the non-inverting output of the fourth operational amplifier  16  is coupled to the inverting input of the fourth operational amplifier  16  by R 8  and C 4  connected in parallel, while the inverting output of the fourth operational amplifier  16  is coupled to the non-inverting input of the fourth operational amplifier  16  by R 8  and C 4  connected in parallel. 
         [0017]    In a preferred implementation, R 7 =R 8  and C 3 =C 4 . 
         [0018]    The differential outputs of the third operational amplifier  14  (at the differential in-phase output signal V I ) are further coupled to the differential inputs of the first operational amplifier  10  through a feedback network formed by resistors R 9 . Specifically, the non-inverting output of the third operational amplifier  14  is coupled to the non-inverting input of the first operational amplifier  10  by R 9 , while the inverting output of the third operational amplifier  14  is coupled to the inverting input of the first operational amplifier  10  by R 9 . 
         [0019]    The differential outputs of the fourth operational amplifier  16  (at the differential quadrature-phase output signal V Q ) are further cross-coupled to the differential inputs of the second operational amplifier  12  through a feedback network formed resistors R 10 . Specifically, the non-inverting output of the fourth operational amplifier  16  is coupled to the inverting input of the second operational amplifier  12  by R 10 , while the inverting output of the fourth operational amplifier  16  is coupled to the non-inverting input of the second operational amplifier  12  by R 10 . 
         [0020]    In a preferred implementation, R 9 =R 10 . 
         [0021]    The differential outputs of the third operational amplifier  14  are further cross-coupled to the differential inputs of the fourth operational amplifier  16  by resistors R 11 . Specifically, the non-inverting output of the third operational amplifier  14  is coupled to the inverting input of the fourth operational amplifier  16  by R 11 , while the inverting output of the third operational amplifier  14  is coupled to the non-inverting input of the fourth operational amplifier  16  by R 11 . 
         [0022]    The differential outputs of the fourth operational amplifier  16  are further coupled to the differential inputs of the third operational amplifier  14  by resistors R 12 . Specifically, the non-inverting output of the fourth operational amplifier  16  is coupled to the non-inverting input of the third operational amplifier  14  by R 12 , while the inverting output of the fourth operational amplifier  16  is coupled to the inverting input of the third operational amplifier  14  by R 12 . 
         [0023]    In a preferred implementation, R 11 =R 12 . 
         [0024]    Consider the filter specifications as shown in the following table: 
         [0000]    
       
         
               
               
               
               
             
               
               
               
               
             
           
               
                   
                   
               
               
                   
                 Parameter 
                 Specification 
                 unit 
               
               
                   
                   
               
             
             
               
                   
               
             
          
           
               
                   
                 Gain 
                 128 
                 dBΩ 
               
               
                   
                 Center Frequency (ω o ) 
                 1.33 
                 MHz 
               
               
                   
                 Bandwidth 
                 1.6 
                 MHz 
               
               
                   
                 Output Noise (V no ) 
                 700 
                 nV/√Hz 
               
               
                   
                 Linearity 
               
               
                   
                 Group Delay 
                 60 
                 ns 
               
               
                   
                 Current Consumption 
                 500 
                 μA 
               
               
                   
                   
               
             
          
         
       
     
         [0025]    The corresponding transfer function for the filter implemented as in  FIG. 1  is shown in  FIG. 2A . This is the transfer function considering an ideal implementation of the filter, i.e. using ideal operational amplifiers and an ideal passive network. The related group-delay for the filter implemented as in  FIG. 1  is shown in  FIG. 2B . 
         [0026]    Unfortunately, in a practical implementation, ideal components are not available. Considering the design equations the value of feedback resistors R 10  and R 11 , from input to output, it is directly proportional to the gain Go of the amplifier, i.e.: 
         [0000]        Go= 122 dbΩs.e.         20 log( R 10)=122 dBΩ;  R 10= R 11≈1.26 MΩ
 
         [0027]    The problem is that this value of resistance is very high and will have a direct impact on the area of silicon occupied by the circuit and thus the cost of the device. Furthermore, even considering use of an ideal operational amplifier, the transfer function and group delay will be distorted as shown in  FIGS. 3A and 3B , respectively. 
         [0028]    In a communication system the distortion of the transfer function could lead to a loss of information and could be unacceptable. The distortions are due to the high value and large size resistors. Indeed, even at low frequency (for example, 1.33 MHz), the parasitic effects for such high value resistors are not negligible. The maximum value usable for high resistivity poly resistors in a standard CMOS technology is limited. Hence, in order to implement a high value resistor it will be necessary to use the series connection of many polysilicon resistors. The occupied silicon area of such a resistor will be very high. Furthermore, the connection and the parasitic capacitances (C p ) will be not negligible. The model of such a high value resistor is shown in  FIG. 4 . These parasitic effects will make changes in the wanted transfer function called distortions. 
         [0029]    Thus, there would be an advantage if the filter could be implemented using smaller value resistors while still providing for a high gain with an accurate transfer function. 
       SUMMARY 
       [0030]    The present invention presents a new topology for implementing high value resistors for use, for example, in high gain filter circuits. This solution supports an accurate transfer function of the active filter and low silicon area occupation. 
         [0031]    In an embodiment, a filter circuit comprises: a trans-impedance amplification circuit having a differential input comprising an inverting input and a non-inverting input and a differential output comprising an inverting output and a non-inverting output; a first feedback network comprising a first impedance coupled between the inverting output and the inverting input and a second impedance coupled between the inverting output and the non-inverting input; and a second feedback network comprising a third impedance coupled between the non-inverting output and the non-inverting input and a fourth impedance coupled between the non-inverting output and the inverting input. 
         [0032]    In an embodiment, a filter circuit comprises: a differential input comprising an inverting input and a non-inverting input; a differential output comprising an inverting output and a non-inverting output; trans-impedance amplification circuitry coupled between the differential input and the differential output; and a feedback network comprising: a first resistor coupled between the inverting output and the inverting input; a second resistor coupled between the inverting output and the non-inverting input; a third resistor coupled between the non-inverting output and the non-inverting input; and a fourth resistor coupled between the non-inverting output and the inverting input. 
         [0033]    In an embodiment, a filter circuit comprises: an in-phase differential input comprising a first inverting input and a first non-inverting input; an in-phase differential output comprising a first inverting output and a first non-inverting output; a quadrature-phase differential input comprising a second inverting input and a second non-inverting input; a quadrature-phase differential output comprising a second inverting output and a second non-inverting output; trans-impedance amplification circuitry coupled between the in-phase and quadrature-phase differential inputs and the in-phase and quadrature-phase differential outputs; a first feedback network comprising: a first resistor coupled between the first inverting output and the first inverting input; a second resistor coupled between the first inverting output and the first non-inverting input; a third resistor coupled between the first non-inverting output and the first non-inverting input; and a fourth resistor coupled between the first non-inverting output and the first inverting input; and a second feedback network comprising: a fifth resistor coupled between the second inverting output and the second inverting input; a sixth resistor coupled between the second inverting output and the second non-inverting input; a seventh resistor coupled between the second non-inverting output and the second non-inverting input; and an eighth resistor coupled between the second non-inverting output and the second inverting input. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0034]    For a better understanding, preferred embodiments thereof are now described, purely by way of non-limiting example, with reference to the attached drawings, wherein: 
           [0035]      FIG. 1  is a circuit diagram for a second order complex band-pass filter circuit; 
           [0036]      FIGS. 2A and 2B  show the transfer function and group delay for an ideal filter; 
           [0037]      FIGS. 3A and 3B  show the transfer function and group delay for a practical filter; 
           [0038]      FIG. 4  shows the equivalent real circuit for a large value ideal resistor implemented as an integrated circuit; 
           [0039]      FIG. 5  is a circuit diagram for a second order complex band-pass filter circuit; 
           [0040]      FIG. 6  is a generalized representation of the solution shown in detail in  FIG. 5 ; and 
           [0041]      FIGS. 7A and 7B  show the transfer function and group delay for the filter of  FIG. 5 . 
       
    
    
     DETAILED DESCRIPTION 
       [0042]    Reference is now made to  FIG. 5  showing a circuit diagram for a second order complex band-pass filter circuit. The topology used is referred to in the art as the leapfrog topology. The leapfrog topology is preferred because it provides for a low sensitivity to process and mismatch variation. This is important for a complex band-pass filter in order to guarantee an accurate image rejection in a frequency down conversion circuit. 
         [0043]    The filter circuit receives a differential in-phase input signal I I  and a differential quadrature-phase input signal I Q . The filter circuit outputs a differential in-phase output signal V I  and a differential quadrature-phase output signal V Q . 
         [0044]    The differential in-phase input signal I I  is applied to the differential inputs of a first operational amplifier  10 . The differential outputs of the first operational amplifier  10  are coupled to the differential inputs of the first operational amplifier through a feedback network formed by resistor R 1  connected in parallel with capacitor C 1 . Specifically, the non-inverting output of the first operational amplifier  10  is coupled to the non-inverting input of the first operational amplifier  10  by R 1  and C 1  connected in parallel, while the inverting output of the first operational amplifier  10  is coupled to the inverting input of the first operational amplifier  10  by R 1  and C 1  connected in parallel. 
         [0045]    The differential quadrature-phase input signal I Q  is applied to the differential inputs of a second operational amplifier  12 . The differential outputs of the second operational amplifier  12  are cross-coupled to the differential inputs of the second operational amplifier through a feedback network formed by resistor R 2  connected in parallel with capacitor C 2 . Specifically, the non-inverting output of the second operational amplifier  12  is coupled to the inverting input of the second operational amplifier  12  by R 2  and C 2  connected in parallel, while the inverting output of the second operational amplifier  12  is coupled to the non-inverting input of the second operational amplifier  10  by R 2  and C 2  connected in parallel. 
         [0046]    In a preferred implementation, R 1 =R 2  and C 1 =C 2 . 
         [0047]    The differential outputs of the first operational amplifier  10  are further cross-coupled to the differential inputs of the second operational amplifier  12  by resistors R 3 . Specifically, the non-inverting output of the first operational amplifier  10  is coupled to the inverting input of the second operational amplifier  12  by R 3 , while the inverting output of the first operational amplifier  10  is coupled to the non-inverting input of the second operational amplifier  12  by R 3 . 
         [0048]    The differential outputs of the second operational amplifier  12  are further coupled to the differential inputs of the first operational amplifier  10  by resistors R 4 . Specifically, the non-inverting output of the second operational amplifier  12  is coupled to the non-inverting input of the first operational amplifier  10  by R 4 , while the inverting output of the second operational amplifier  12  is coupled to the inverting input of the first operational amplifier  10  by R 4 . 
         [0049]    In a preferred implementation, R 3 =R 4 . 
         [0050]    The differential outputs of the first operational amplifier  10  are further cross-coupled to the differential inputs of a third operational amplifier  14  by resistors R 5 . Specifically, the non-inverting output of the first operational amplifier  10  is coupled to the inverting input of the third operational amplifier  14  by R 5 , while the inverting output of the first operational amplifier  10  is coupled to the non-inverting input of the third operational amplifier  14  by R 5 . 
         [0051]    The differential outputs of the second operational amplifier  12  are further cross-coupled to the differential inputs of a fourth operational amplifier  16  by resistors R 6 . Specifically, the non-inverting output of the second operational amplifier  12  is coupled to the inverting input of the fourth operational amplifier  16  by R 6 , while the inverting output of the second operational amplifier  12  is coupled to the non-inverting input of the fourth operational amplifier  16  by R 6 . 
         [0052]    In a preferred implementation, R 5 =R 6 . 
         [0053]    The differential outputs of the third operational amplifier  14  (at the differential in-phase output signal V I ) are coupled to the differential inputs of the third operational amplifier through a feedback network formed by resistor R 7  connected in parallel with capacitor C 3 . Specifically, the non-inverting output of the third operational amplifier  14  is coupled to the non-inverting input of the third operational amplifier  14  by R 7  and C 3  connected in parallel, while the inverting output of the third operational amplifier  14  is coupled to the inverting input of the third operational amplifier  14  by R 7  and C 3  connected in parallel. 
         [0054]    The differential outputs of the fourth operational amplifier  16  (at the differential quadrature-phase output signal V Q ) are cross-coupled to the differential inputs of the fourth operational amplifier through a feedback network formed by resistor R 8  connected in parallel with capacitor C 4 . Specifically, the non-inverting output of the fourth operational amplifier  16  is coupled to the inverting input of the fourth operational amplifier  16  by R 8  and C 4  connected in parallel, while the inverting output of the fourth operational amplifier  16  is coupled to the non-inverting input of the fourth operational amplifier  16  by R 8  and C 4  connected in parallel. 
         [0055]    In a preferred implementation, R 7 =R 8  and C 3 =C 4 . 
         [0056]    The differential outputs of the third operational amplifier  14  (at the differential in-phase output signal V I ) are further coupled to the differential inputs of the first operational amplifier  10  through a feedback network formed by resistors R 9   a . Specifically, the non-inverting output of the third operational amplifier  14  is coupled to the non-inverting input of the first operational amplifier  10  by R 9   a , while the inverting output of the third operational amplifier  14  is coupled to the inverting input of the first operational amplifier  10  by R 9   a.    
         [0057]    The differential outputs of the third operational amplifier  14  (at the differential in-phase output signal VI) are further cross-coupled to the differential inputs of the first operational amplifier  10  through a feedback network formed by resistors R 9   b . Specifically, the non-inverting output of the third operational amplifier  14  is coupled to the inverting input of the first operational amplifier  10  by R 9   b , while the inverting output of the third operational amplifier  14  is coupled to the non-inverting input of the first operational amplifier  10  by R 9   b.    
         [0058]    The differential outputs of the fourth operational amplifier  16  (at the differential quadrature-phase output signal V Q ) are further coupled to the differential inputs of the second operational amplifier  12  through a feedback network formed resistors R 10   a . Specifically, the non-inverting output of the fourth operational amplifier  16  is coupled to the non-inverting input of the second operational amplifier  12  by R 10   a , while the inverting output of the fourth operational amplifier  16  is coupled to the inverting input of the second operational amplifier  12  by R 10   a.    
         [0059]    The differential outputs of the fourth operational amplifier  16  (at the differential quadrature-phase output signal VQ) are further cross-coupled to the differential inputs of the second operational amplifier  12  through a feedback network formed resistors R 10   b . Specifically, the non-inverting output of the fourth operational amplifier  16  is coupled to the inverting input of the second operational amplifier  12  by R 10   b , while the inverting output of the fourth operational amplifier  16  is coupled to the non-inverting input of the second operational amplifier  12  by R 10   b.    
         [0060]    In a preferred implementation, R 9   a =R 10   a  and R 9   b =R 10   b.    
         [0061]    The differential outputs of the third operational amplifier  14  are further cross-coupled to the differential inputs of the fourth operational amplifier  16  by resistors R 11 . Specifically, the non-inverting output of the third operational amplifier  14  is coupled to the inverting input of the fourth operational amplifier  16  by R 11 , while the inverting output of the third operational amplifier  14  is coupled to the non-inverting input of the fourth operational amplifier  16  by R 11 . 
         [0062]    The differential outputs of the fourth operational amplifier  16  are further coupled to the differential inputs of the third operational amplifier  14  by resistors R 12 . Specifically, the non-inverting output of the fourth operational amplifier  16  is coupled to the non-inverting input of the third operational amplifier  14  by R 12 , while the inverting output of the fourth operational amplifier  16  is coupled to the inverting input of the third operational amplifier  14  by R 12 . 
         [0063]    In a preferred implementation, R 11 =R 12 . 
         [0064]    The circuit of  FIG. 5  implements the feedback resistance Rfb between the filter output V and the filter input I in each of the in-phase and quadrature-phase circuits using a negative resistor network. For example, in the in-phase circuit, the negative resistor network is formed by cross coupling two resistors R 9   a  and two resistors R 9   b , while in the quadrature-phase circuit, the negative resistor network for the feedback resistance is formed by cross coupling two resistors R 10   a  and two resistors R 10   b.    
         [0065]    The DC gain of the  FIG. 5  filter is given by: 
         [0000]    
       
         
           
             Go 
             = 
             
               
                 V 
                 I 
               
               = 
               
                 
                   R 
                    
                   
                       
                   
                    
                   9 
                    
                   a 
                   * 
                   R 
                    
                   
                       
                   
                    
                   9 
                    
                   b 
                 
                 
                   
                     R 
                      
                     
                         
                     
                      
                     9 
                      
                     b 
                   
                   - 
                   
                     R 
                      
                     
                         
                     
                      
                     9 
                      
                     a 
                   
                 
               
             
           
         
       
     
         [0066]      FIG. 6  illustrates a generalized representation of the solution shown in detail in  FIG. 5 . The trans-impedance amplifier represents the circuitry of  FIG. 6  except for the resistances R 9   a , R 9   b , R 10   a , R 10   b . The feedback resistors Ra and Rb define the gain of the circuit. In order to simplify the discussion, a real filter is considered in  FIG. 6 . Using this differential circuitry with a negative resistance feedback technique, it is possible to realize a 1.26 MΩ feedback resistance using two resistors Ra and Rb each of around 100 kΩ. This will provide the desired gain, but at a significant reduction in occupied area. 
         [0067]    However, this solution does have limitations. For example, the boost of the gain and the area reduction are limited by the condition: 
         [0000]        Rb−Ra&gt; 0 
         [0068]    Indeed, it is necessary to make the denominator of the foregoing gain expression to be not negative. Furthermore, this condition has to be guaranteed with mismatch variations. The maximum boost from this solution is: 
         [0000]    
       
         
           
             
               
                 Rb 
                 - 
                 Ra 
               
               → 
               
                 Rb 
                 - 
                 
                   Δ 
                    
                   
                       
                   
                    
                   Rb 
                 
                 - 
                 
                   ( 
                   
                     Ra 
                     + 
                     
                       Δ 
                        
                       
                           
                       
                        
                       Ra 
                     
                   
                   ) 
                 
               
             
             = 
             
               
                 Rb 
                 - 
                 rRb 
                 - 
                 Ra 
                 - 
                 rRa 
               
               = 
               
                 
                   Rb 
                    
                   
                     ( 
                     
                       1 
                       - 
                       r 
                     
                     ) 
                   
                 
                 - 
                 
                   Ra 
                    
                   
                     ( 
                     
                       1 
                       + 
                       r 
                     
                     ) 
                   
                 
               
             
           
         
       
       
         
           
             
                 
             
              
             
               Rb 
               &gt; 
               
                 
                   
                     1 
                     + 
                     r 
                   
                   
                     1 
                     - 
                     r 
                   
                 
                  
                 Ra 
               
             
           
         
       
     
         [0069]    For a given CMOS technology the expected mismatch variation may be 1%, then: 
         [0000]    
       
         
           
             
               
                 Δ 
                  
                 
                     
                 
                  
                 R 
               
               R 
             
             = 
             
               
                 
                   1 
                    
                   % 
                 
                 → 
                 
                   G 
                    
                   
                       
                   
                    
                   max 
                 
               
               = 
               
                 
                   
                     
                       rR 
                        
                       
                         ( 
                         
                           R 
                           + 
                           
                             Δ 
                              
                             
                                 
                             
                              
                             R 
                           
                         
                         ) 
                       
                     
                     
                       R 
                       + 
                       
                         Δ 
                          
                         
                             
                         
                          
                         R 
                       
                       - 
                       R 
                     
                   
                   ≅ 
                   
                     
                       2 
                        
                       R 
                     
                     
                       Δ 
                        
                       
                           
                       
                        
                       
                         R 
                         / 
                         R 
                       
                     
                   
                 
                 = 
                 
                   Go 
                   
                     Δ 
                      
                     
                         
                     
                      
                     
                       R 
                       / 
                       R 
                     
                   
                 
               
             
           
         
       
     
         [0070]    So, a 1% mismatch will result in a 50 times boost in the gain and a 50 times reduction of area. 
         [0071]    Reference is now made to  FIGS. 7A and 7B  showing the transfer function and group delay for the filter of  FIG. 5 . With comparison to the ideal response shown in  FIGS. 2A and 2B , it will be noted that the filter of  FIG. 5  presents a response substantially matching the ideal response, but with the advantage of integrated circuit implementation using smaller value resistors and less occupied surface area in comparison to the circuit of  FIG. 1 . Furthermore, the distortion shown in  FIGS. 3A and 3B  has been eliminated. 
         [0072]    Although resistors are shown in the figures, it will be understood that any suitable impedance circuit could be used in place of the resistor circuit. 
         [0073]    The foregoing description has provided by way of exemplary and non-limiting examples a full and informative description of the exemplary embodiment of this invention. However, various modifications and adaptations may become apparent to those skilled in the relevant arts in view of the foregoing description, when read in conjunction with the accompanying drawings and the appended claims. However, all such and similar modifications of the teachings of this invention will still fall within the scope of this invention as defined in the appended claims.