Abstract:
A wireless communication network ( 10 ) comprising a wireless transmitter ( 12 ). The transmitter comprises a plurality of antennas (AT 1   1 , AT 1   2 ), wherein each of the plurality of antennas is operable for transmitting signals. The transmitter also comprises, for each of a plurality of different user channels (D n ), circuitry ( 22   n ) for providing a plurality of groups of symbols in a first symbol group sequence (D 1   n ). The transmitter also comprises, for each of the plurality of different user channels, circuitry ( 24   1   n ) for forming a first modulated symbol group sequence for the user channel by modulating the symbols in the first symbol group sequence for the user channel with a unique code that corresponds to the user channel and distinguishes the user channel from each other of the plurality of different user channels and circuitry ( 26   1 ) for combining the first modulated symbol group sequences and providing them for transmission by a first antenna (AT 1   1 ). The transmitter also comprises, for each of the plurality of different user channels, circuitry ( 22   n ) for forming a second symbol group sequence (D 2   n ) by re-ordering the groups of symbols in the first symbol group sequence and further by time reversing symbols in at least some of the groups of symbols. Also for each of the plurality of different user channels, the transmitter comprises circuitry ( 24   2   n ) for forming a second modulated symbol group sequence for the user channel by modulating the symbols in the second symbol group sequence for the user channel with a unique code that corresponds to the user and distinguishes the user from each other of the plurality of different user channels. Finally, the transmitter comprises circuitry ( 26   2 ) for combining the second modulated symbol group sequences and providing them for transmission by the second antenna (AT 1   2 ).

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS  
         [0001]    This application claims the benefit, under 35 U.S.C. § 119(e)(1), of U.S. Provisional Application No. 60/215,806 (TI-31293PS), filed Jul. 5, 2000.  
         BACKGROUND OF THE INVENTION  
         [0002]    The present embodiments relate to wireless communications systems and are more particularly directed to reducing same user intersymbol interference (“ISI”) and also reducing receiver complexity in a code division multiple access (“CDMA”) cellular communications system.  
           [0003]    Wireless communications have become very prevalent in business, personal, and other applications, and as a result the technology for such communications continues to advance in various areas. One such advancement includes the use of spread spectrum communications, including that of CDMA cellular communications. CDMA systems are characterized by simultaneous transmission of different data signals (e.g., corresponding to different users) over a common antenna channel by assigning each signal a unique code. This unique code is matched with a code of a selected user station within the cell to determine the proper recipient of a data signal.  
           [0004]    Due to various factors including the fact that CDMA communications are along a wireless medium, an originally transmitted communication from a base station to a user station may arrive at a user station at multiple and different times. Each different arriving signal that is based on the same original communication is said to have a diversity with respect to other arriving signals originating from the same transmitted communication. Various diversity types may occur in CDMA communications, and the CDMA art strives to ultimately receive and process the originally transmitted data by exploiting the effects on each signal that are caused by the one or more diversities affecting the signal.  
           [0005]    One type of CDMA diversity occurs because a transmitted signal from the base station is reflected by objects such as the ground, mountains, buildings, and other things that it contacts. As a result, a same single transmitted communication may arrive at the receiver at numerous different times, and assuming that each such arrival is sufficiently separated in time, then each different arriving signal is said to travel along a different channel and arrive as a different “path.” These multiple signals are referred to in the art as multiple paths or multipaths. Several multipaths may eventually arrive at the user station and the channel traveled by each may cause each path to have a different phase, amplitude, and signal-to-noise ratio (“SNR”). Accordingly, for one communication between one base station and one user station, each multipath is a replica of the same user information, and each path is said to have time diversity relative to other mulitpath(s) due to the difference in arrival time which causes different (uncorrelated) fading/noise characteristics for each multipath. Although multipaths carry the same user information to the receiver, they may be separately recognized by the receiver based on the timing of arrival of each multipath. More particularly, CDMA communications are modulated using a spreading code which consists of a series of binary pulses, and this code runs at a higher rate than the symbol data rate and determines the actual transmission bandwidth. In the current industry, each piece of CDMA signal transmitted according to this code is said to be a “chip,” where each chip corresponds to an element in the CDMA code. Thus, the chip frequency defines the rate of the CDMA code. Given the use of transmission of the CDMA signal using chips, then multipaths separated in time by more than one of these chips are distinguishable at the receiver because of the low auto-correlations of CDMA codes as known in the art.  
           [0006]    In contrast to multipath diversity which is a natural phenomenon, other types of diversity are sometimes designed into CDMA systems in an effort to improve signal performance, thereby improving various data accuracy measures (e.g., bit error rate (“BER”), frame error rate (“FER”), and symbol error rate (“SER”)). An example of such a designed diversity scheme is antenna diversity and is introduced here since it has particular application to the preferred embodiments discussed later. Antenna diversity, or sometimes referred to as antenna array diversity, describes a wireless system using more than one antenna by a same station. Antenna diversity often proves useful because fading is independent across different antennas. The notion of a station using multiple antennas is more typically associated with a base station using multiple antennas to receive signals transmitted from a single-antenna mobile station, although more recently systems have been proposed for a base station using multiple antennas to transmit signals transmitted to a single-antenna mobile station. Each of these alternatives is further explored below.  
           [0007]    Certain antenna array diversity techniques suggest the use of more than one antenna at the receiver, and this approach is termed receive antenna diversity. For example, in prior art analog systems, often a base station receiver was equipped with two antennas, each for receiving a signal from a single-antenna mobile station. Thus, when the single-antenna mobile station transmits to the base station, each receiver antenna provides at least one corresponding received signal for processing. By implementing multiple receive antennas, the performance of an ideal receiver is enhanced because each corresponding received signal may be separately processed and combined for greater data accuracy.  
           [0008]    More recently there have been proposals to use more than one antenna at the transmitter, and this approach is termed transmit antenna diversity. For example, in the field of mobile communications, a base station transmitter may be equipped with two antennas for transmitting to a single-antenna mobile station. The use of multiple antennas at the base station for transmitting has been viewed as favorable over using multiple antennas at the mobile station because typically the mobile station is in the form of a hand-held or comparable device, and it is desirable for such a device to have lower power and processing requirements as compared to those at the base station. Thus, the reduced resources of the mobile station are less supportive of multiple antennas, whereas the relatively high-powered base station more readily lends itself to antenna diversity. In any event, transmit antenna diversity also provides a form of diversity from which signal performance may be improved over single antenna communications by separately processing and combining the diverse signals for greater data accuracy at the receiver. Also in connection with transmit antenna diversity and to further contrast it with multipath diversity described above, note that the multiple transmit antennas at a single station are typically within several meters (e.g., three to four meters) of one another, and this spatial relationship is also sometimes referred to as providing spatial diversity. Given the spatial diversity distance, the same signal transmitted by each antenna will arrive at a destination (assuming no other diversity) at respective times that relate to the distance between the transmitting antennas. However, the difference between these times is considerably smaller than the width of a chip and, thus, the arriving signals are not separately distinguishable in the same manner as are multipaths described above.  
           [0009]    By way of additional background, CDMA continues to advance along with corresponding standards that have brought forth a next generation wideband CDMA (“WCDMA”). WCDMA includes alternative methods of data transfer, one being time division duplex (“TDD”) and another being frequency division duplex (“FDD”). The present embodiments may be incorporated either in TDD or FDD; thus, both approaches are further introduced here. TDD data are transmitted in one of various different forms, such as quadrature phase shift keyed (“QPSK”) symbols or other higher-ordered modulation schemes such as quadrature amplitude modulation (“QAM”) or 8 phase shift keying (“PSK”). The symbols are transmitted in data packets of a predetermined duration or time slot. Within a data frame having 15 of these slots, bidirectional communications are permitted, that is, one or more of the slots may correspond to communications from a base station to a user station while other slots in the same frame may correspond to communications from a user station to a base station. The spreading factor used for TDD is relatively small, whereas FDD may use either a large or small spreading factor. FDD data are comparable in many respects to TDD including the use of 15-slot frames, although FDD permits a different frequency band for uplink communications (i.e., user to base station) versus downlink communications (i.e., base to user station), whereas TDD uses a single frequency in both directions.  
           [0010]    While the preceding prior art aspects support various types of cellular communications, the present inventors have observed that the signal performance in CDMA communications may be improved further. Specifically, in CDMA systems with transmitter antenna diversity, there is some level of ISI. In the past, the focus in the CDMA art has been on this ISI as it occurs between symbols from different users. As a simplified example, consider a given time period when a first user&#39;s symbols are transmitted along a first antenna while at the same time a second user&#39;s symbols are transmitted along a second antenna; in this example, there is some amount of ISI as between the first user&#39;s symbols and the second user&#39;s symbols, and this ISI has been examined in the industry. In contrast, however, the present inventors endeavor herein to focus in an area away from the concern of the art, and instead seek to improve overall performance by looking to a different type of ISI in a CDMA system. Specifically, also during the previous example, while the first user&#39;s symbols are transmitted along the first antenna, they also are transmitted along the second antenna. As a result, there is also ISI between communications for the same user due to multipaths arising from the transmissions along the first and second antennas. Further, such ISI becomes even a larger issue in systems with more than two antennas. Accordingly, the present inventors turn their focus to these aspects and herein describe various embodiments directed thereto.  
         BRIEF SUMMARY OF THE INVENTION  
         [0011]    In the preferred embodiment, there is a wireless communication network comprising a wireless transmitter. The transmitter comprises a plurality of antennas, wherein each of the plurality of antennas is operable for transmitting signals. The transmitter also comprises, for each of a plurality of different user channels, circuitry for providing a plurality of groups of symbols in a first symbol group sequence. The transmitter also comprises, for each of the plurality of different user channels, circuitry for forming a first modulated symbol group sequence for the user channel by modulating the symbols in the first symbol group sequence for the user channel with a unique code that corresponds to the user channel and distinguishes the user channel from each other of the plurality of different user channels and circuitry for combining the first modulated symbol group sequences and providing them for transmission by a first antenna. The transmitter also comprises, for each of the plurality of different user channels, circuitry for forming a second symbol group sequence by re-ordering the groups of symbols in the first symbol group sequence and further by time reversing symbols in at least some of the groups of symbols. Also for each of the plurality of different user channels, the transmitter comprises circuitry for forming a second modulated symbol group sequence for the user channel by modulating the symbols in the second symbol group sequence for the user channel with a unique code that corresponds to the user and distinguishes the user from each other of the plurality of different user channels. Finally, the transmitter comprises circuitry for combining the second modulated symbol group sequences and providing them for transmission by the second antenna. Other circuits, systems, and methods are also disclosed and claimed.  
       
    
    
     BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING  
       [0012]    [0012]FIG. 1 illustrates a diagram of a cellular communications system by way of a contemporary code division multiple access (“CDMA”) example in which the preferred embodiments operate.  
         [0013]    [0013]FIG. 2 illustrates a functional block diagram of a transmitter according to the preferred embodiment.  
         [0014]    [0014]FIG. 3 illustrates a functional block diagram of a first preferred embodiment modulator as may be implemented in the transmitter of FIG. 2.  
         [0015]    [0015]FIG. 4 illustrates a timing sequence of the operational output of the modulator of FIG. 3 in ordering and processing time reversed and STTD encoded symbols to be coupled to two antennas of a base station according to the preferred embodiment.  
         [0016]    [0016]FIG. 5 illustrates the timing sequence of FIG. 4 following the multiplication of the processed symbols by corresponding codes.  
         [0017]    [0017]FIG. 6 a  illustrates a functional block diagram of a preferred receiver station for receiving and processing the signals of FIG. 5.  
         [0018]    [0018]FIG. 6 b  illustrates a functional block diagram of an alternative preferred receiver station for receiving and processing the signals of FIG. 5.  
         [0019]    [0019]FIG. 7 illustrates a functional block diagram of a second preferred embodiment modulator as may be implemented in the transmitter of FIG. 2.  
         [0020]    [0020]FIG. 8 a  illustrates a functional block diagram of a preferred receiver station for receiving and processing the signals transmitted using the modulator of FIG. 7.  
         [0021]    [0021]FIG. 8 b  illustrates a functional block diagram of an alternative preferred receiver station for receiving and processing the signals transmitted using the modulator of FIG. 7.  
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0022]    [0022]FIG. 1 illustrates a diagram of a cellular communications system  10  by way of a contemporary code division multiple access (“CDMA”) example, in which the preferred embodiments operate. Within system  10  are shown two base stations BST 1  and BST 2 . Each base station BST 1  and BST 2  includes a respective set of antennas AT 1   1  through AT 1   n  and AT 2   1  through AT 2   n  through which each may transmit or receive CDMA signals. The general area of intended reach of each base station defines a corresponding cell; thus, base station BST 1  is intended to generally communicate with cellular devices within Cell  1 , while base station BST 2  is intended to generally communicate with cellular devices within Cell  2 . Of course, some overlap between the communication reach of Cells  1  and  2  exists by design to support continuous communications should a communication station move from one cell to the other. Indeed, further in this regard, system  10  also includes a user station UST, which is shown in connection with a vehicle V to demonstrate that user station UST is mobile. In addition, by way of example user station UST includes a single antenna ATU for both transmitting and receiving cellular communications. Lastly, one skilled in the art should appreciate that system  10  and the preferred embodiments are application to various CDMA systems, including WCDMA systems.  
         [0023]    In some respects, system  10  may operate according to known general techniques for various types of cellular or other spread spectrum communications, including CDMA communications. Such general techniques are known in the art and include the commencement of a call from user station UST and the handling of that call by either or both of base stations BST 1  and BST 2 . Where system  10  differs from the prior art, however, is the system for, and method of, communicating signals from each of the set of base station antennas (e.g., AT 1   1  through AT 1   n ) to user station UST as well as the reduction in complexity of the receiving apparatus in user station UST as a result thereof. These distinctions are further detailed below in connection with FIGS. 2 through 8.  
         [0024]    [0024]FIG. 2 illustrates a block diagram of a transmitter  12  according to the preferred embodiment and which may be used for either or both of base stations BST 1  and BST 2  in FIG. 1. In various respects, transmitter  12  may be constructed according to principles known in the art, but as further detailed below such known aspects are improved as a whole due to advancements in the construction and operation as relating to symbol modulating block. Turning more specifically to transmitter  12 , it receives information bits B i  at an input to a channel encoder  14 . Channel encoder  14  encodes the information bits B i  in an effort to improve raw bit error rate. Various encoding techniques may be used by channel encoder  14  and as applied to bits B i , with examples including the use of convolutional code, block code, turbo code, or a combination of any of these codes. The encoded output of channel encoder  14  is coupled to the input of an interleaver  16 . Interleaver  16  operates with respect to a block of encoded bits and shuffles the ordering of those bits so that the combination of this operation with the encoding by channel encoder  14  exploits the time diversity of the information. For example, one shuffling technique that may be performed by interleaver  16  is to receive bits in a matrix fashion such that bits are received into a matrix in a row-by-row fashion, and then those bits are output from the matrix to a symbol mapper  18  in a column-by-column fashion. Symbol mapper  18  then converts its input bits to symbols, designated generally as S 1 . The converted symbols S i  may take various forms, such as quadrature phase shift keying (“QPSK”) sybmols, binary phase shift keying (“BPSK”) symbols, or quadrature amplitude modulation (“QAM”) sybmols. In any event, symbols S i  may represent various information such as user data symbols, as well as pilot symbols and control symbols such as transmit power control (“TPC”) symbols and rate information (“RI”) symbols.  
         [0025]    Symbols S i  are coupled to a modulator  20 . Generally, modulator  20  modulates each data symbol by combining it with, or multiplying it times, a CDMA spreading sequence which can be a pseudo-noise (“PN”) digital signal or PN code or other spreading code (i.e., it utilizes spread spectrum technology). By way of introduction to additional and novel aspects of modulator  20 , it also imparts two additional types of encoding so as to reduce the ISI of the signal when received and decoded, namely: (1) the symbols are transmitted using space time block coded transmit antenna diversity (“STTD”); and (2) selected ones of those symbols are time reversed, where time reversal is detailed below. In all events, the spreading sequence imparted in the signal by modulator  20  facilitates simultaneous transmission of information from different users over a common channel by assigning each of the user signals a unique code during transmission. Further, this unique code makes the simultaneously transmitted signals over the same bandwidth distinguishable at a receiver (e.g., user station UST of FIG. 1 or other receivers). Modulator  20  has multiple outputs, each connected to a respective antenna AT 1  and AT 1   n .  
         [0026]    [0026]FIG. 3 illustrates a block diagram of modulator  20  from FIG. 2 and in greater detail, and one skilled in the art may readily appreciate various hardware/software implementations to achieve modulator  20  in view of the following description thereof. As discussed above, modulator  20  receives symbols S i , and in FIG. 3 these symbols are subdivided into data for user channels designated D 1  through D L , thereby indicating a total of L user channels. Each user data channel is connected as an input to a respective time reversed STTD encoder  22   1  through  22   L . In addition, although not shown to simplify the illustration and remaining discussion, note that modulator  20  in an expanded embodiment preferably includes additional user channels that are not STTD encoded. Returning to the embodiment as shown, and as further detailed below, each time reversed STTD encoder  22   1  through  22   L  outputs the data it receives in two forms along two respective outputs. Looking by way of example to time reversed STTD encoder  22   1 , along its upper output it is shown to output the data symbols in the a format designated as D 1   1  which, as detailed below is the same form as the input D 1 , while along its lower output it is shown to output the data symbols in a format designated D 2   1 . As also detailed below, this latter output is encoded using the two techniques introduced earlier, namely, STTD and time reversal. Similarly, the remaining time reversed STTD encoders  22   2  through  22   L  also output the data input to each in this manner, illustrated with an upper output understood as providing the input data and a lower output providing time reversed STTD data.  
         [0027]    Each upper output D 1   n  from a time reversed STTD encoder  22   1  through  22   L  is connected as an input to a respective code multiplier  24   1   1  through  24   1   L , and each lower output D 2   n  from a time reversed STTD encoder  22   1  through  22   L  is connected as an input to a respective code multiplier  24   2   1  through  24   2   L . Each code multiplier multiplies its input times a different code corresponding to the user data provided at its input, where each respective code is indicated generally in the illustration. For example, with respect to code multiplier  24   1   1 , it multiplies the data D 1   1  at its input times a code C 1 . The specific type of code implemented as code C 1  may vary, but in one common CDMA implementation code C 1 , as well as the other comparable codes in the other code multipliers, is a Walsh code (or other PN code). For reasons more apparent later, note also that each code (e.g., C 1 ) is multiplied by one code multiplier (e.g.,  24   1   1 ) times a group of data (e.g., D 1   1 ) while that same code (e.g., C 1 ) is multiplied by a different code multiplier (e.g.,  24   1   1 ) times the time reversed STTD encoded form of that same group of data (e.g., D 2   1 ) The outputs of code multipliers  24   1   1  through  24   1   L  are all connected to an adder  26   1  while the outputs of code multipliers  24   2   1  through  24   2   L  are all connected to an adder  26   2 . To simplify the current illustration and discussion, modulator  20  is shown as connected to only two antennas AT 1  and AT 1   2 , and more particularly the output of adder  26   1  is connected to antenna AT 1  while the output of adder  26   2  is connected to antenna AT 1   2 . From the remaining discussion, one skilled in the art should readily appreciate, however, how a comparable construction could be implemented with additional adders, antennas, code multipliers, and time reversed STTD encoders.  
         [0028]    The operation of transmitter  20  is now described. In response to receiving symbols S i , each time reversed STTD encoder  22   1  through  22   L  first buffers a number of symbols, where preferably the symbols are grouped into blocks and the number of buffered blocks equals the number of transmit antennas. In the example of FIG. 3 which has two transmit antennas AT 1   1  and AT 1   2 , each time reversed STTD encoder  22   1  through  22   L  therefore buffers two blocks of symbols. For the sake of a simplified example, let D 1 , as input to time reversed STTD encoder  22   1 , consist of the following two blocks, D 1   1 (1) and D 1   1 (2), of symbols, where the (n) designation of “1” or “2” indicates the advancement of time. For further discussion, assume these blocks have the symbols in the time sequence shown in the following Equations 1 and 2:  
         D 1   1 (1)={S 1 ,S 2 ,S 3 ,S 4 }Equation 1  
         D 1   1 (2)={S 5 ,S 6 ,S 7 ,S 8 }Equation 2  
         [0029]    Thus, time reversed STTD encoder  22   1  first buffers symbol blocks D 1   1 (1) and D 1   1 (2).  
         [0030]    The next step of operation of each of time reversed STTD encoders  22   1  through  22   L  is now discussed in connection with an example illustrated in FIG. 4. Specifically, FIG. 4 illustrates a timing sequence of the upper and lower outputs, D 1   1  and D 2   1 , respectively, of time reversed STTD encoder  22   1 . Further, these outputs of time reversed STTD encoder  22   1  are shown in connection with antennas AT 1   1  and AT 1   2 , respectively, as one skilled in the art will appreciate from FIG. 3 that after additional operations the symbols output by time reversed STTD encoder  22   1  are further processed and transmitted along these respective antennas. Looking first with respect to antenna AT 1   1 , FIG. 4 illustrates as also suggested earlier that time reversed STTD encoder  22   1  outputs at its upper output the symbols in the same order as received as data D 1 . Thus, from times t 1  through t 5 , block D 1   1 (1) (i.e., S 1  through S 4 ) is output by time reversed STTD encoder  22   1 , while from times t 5  through t 9 , block D 1   1 (2) (i.e., S 5 ) through S 8 ) is output by time reversed STTD encoder  22   1 . During the same time, however, and for transmission along antenna AT 1   2 , time reversed STTD encoder  22   1  performs various manipulations of the symbols for blocks D 1   1 (1) and D 1   1 (2) before outputting those blocks as data D 2   1 . Specifically, four manipulations are made: (i) the blocks are reversed in order relative to D 1 , that is, D 1   1 (2) is transmitted before D 1   1 (1); (ii) the complex conjugates of the symbols are formed, and as designated using an asterisk superscript in FIG. 4; (iii) the negative value of the first of the two outputted blocks is output while the positive value of the second of the two outputted blocks symbol is output so that −D 1   1 (2) is first output followed by +D 1   1 (1); and (iv) the symbols within each block are reversed in time order, meaning where a first symbol in the sequence normally immediately preceded a second symbol, the time reversal reverses that order such that once time reversed the first symbol follows immediately after the second symbol. In the example of FIG. 4, therefore, the time reversed sequence consists of S 8  through S 5  for block D 1   1 (2) and S 4  through S 1  for block D 1   1 (1). Indeed, it is noted that the first three manipulations are also described in detail in U.S. patent application 09/514,452, filed Feb. 25, 2000, entitled, “Space Time Transmit Diversity For TDD/WCDMA Systems,” (TI-28984), which is co-assigned to the same assignee as the present application, and which is hereby incorporated herein by reference. However, the present embodiment finds even additional benefits through the implementation of the fourth stated manipulation.  
         [0031]    For the sake of the remaining discussion, let the following conventions in Equations 3 and 4 be used to depict the outputs D 1   1  and D 2   1  of time reversed STTD encoder  22   1 .  
         D 1   1 ={D 1   1 (1),D 1   1 (2)}Equation 3  
         D 2   1   1 ={({overscore (D)} 1   1 (2))*,({overscore (D)} 1   1 (1))*}Equation 4  
         [0032]    Equation 3 depicts that D 1  includes block D 1   1 (1) followed by block D 1   1 (2) where the data in these blocks may be referred to as non-manipulated in the present context in that the symbols are not changed in any manner prior to transmission, and from the preceding it is established that time reversed STTD encoder  22   1  passes this input along to its upper output. Equation 4 is intended to illustrate the four manipulations described above, where it is intended that the left pointing arrow (e.g., {overscore (X)}) over each block in D 2   1  indicates the time reversal of the order of each symbol in that block.  
         [0033]    As indicated above, each output of each time reversed STTD encoder  22   1  through  22   L  is connected as an input to a respective code multiplier  24   1   1  through  24   1   L , and it now may be appreciated that each such code multiplier forms a product using that input and the corresponding code illustrated in FIG. 3 as a multiplicand. Thus, FIG. 5 illustrates the timing sequence of the upper and lower outputs, D 1   1  and D 2   1 , from FIG. 4, again in connection with antennas AT 1   1  and AT 1   2 , after those outputs are multiplied times codes by code multipliers  24   1   1  and  24   2   1 . Given the preceding conventions, therefore, the output of code multiplier  24   1   1  may be represented as providing the two blocks of output shown in the following Equation 5:  
         C 1 D 1   1 ={C 1 D 1   1 (1),C 1 D 1   1 (2)}Equation 5  
         [0034]    Further, the output of code multiplier  24   2   1  may be represented as providing the two blocks of output shown in the following Equation 6:  
         [0035]    C 1 D 2   1 ={−C 1 ({overscore (D)} 1   1 (2))*,C 1 (D 1   1 (1))*}Equation 6  
         [0036]    Lastly and also for later reference, the preceding observations can be generalized for all time reversed STTD encoders  22   1  through  22   L  and a respective code multiplier  24   1   1  through  24   1   L  or  24   2   1  through  24   2   L , such that for any time reversed STTD encoder outputting an upper signal D 1   n  and a lower signal D 2   n , the multipliers to which those outputs are connected provide the outputs shown in the following Equations 7 and 8:  
         C n D 1   n ={C n D 1   n (1),C n D 1   n (2)}Equation 7  
         C n D 2   n ={−C n ({overscore (D)} 1   n (2))*,C n (D 1   n (1))*Equation 8  
         [0037]    Following the operation of code multipliers  24   1   1  through  24   1   L , the output of each is summed by adder  26   1  and provided to antenna AT 1   1 . Thus, the output of adder  26   1  may be represented by the following Equation 9:  
               adder                   26   1                   output     =     {             (         C   1            D   1   1          (   1   )         +   …   +       C   n            D   1   n          (   1   )         +   …   +       C   L            D   1   L          (   1   )           )     ,               (         C   1            D   1   1          (   2   )         +   …   +       C   n            D   1   n          (   2   )         +   …   +       C   L            D   1   L          (   2   )           )           }             Equation                 9                               
 
         [0038]    Similarly, following the operation of code multipliers  24   2   1  through  24   2   L , the output of each is summed by adder  26   2  and provided to antenna AT 1   2 . Thus, the output of adder  26   2  may be represented by the following Equation 10:  
               adder                   26   2                   output     =     {               -         C   1          (         D   ←     1   1          (   2   )       )       *       +   …   +     -         C   n          (         D   ←     1   n          (   2   )       )       *       +   …   +     -         C   L          (         D   ←     1   L          (   2   )       )       *         ,                     C   1          (         D   ←     1   1          (   1   )       )       *     +   …   +         C   n          (         D   ←     1   n          (   1   )       )       *     +   …   +         C   L          (         D   ←     1   L          (   1   )       )       *             }             Equation                 10                               
 
         [0039]    From the preceding, it may be appreciated that antennas AT 1   1  and AT 1   2  transmit the signals as shown in Equations 9 and 10 above. Further, each wireless signals also obtains a respective channel effect as it passes to a receiver along with a certain amount of noise, where these additional affects are discussed later.  
         [0040]    [0040]FIG. 6 a  illustrates a block diagram of a receiver  30  as a first embodiment for receiving signals communicated from transmitter  12 , and one skilled in the art may readily appreciate various hardware/software implementations to achieve receiver  30  in view of the following description thereof. Further, receiver  30  may be used as an implementation of user station UST in FIG. 1. Receiver  30  is shown to include antenna ATU from FIG. 1, and it provides signals it receives to an input of an RF demodulator  32 . The analog output of RF demodulator  32  is connected as an input to an analog-to-digital (“A/D”) converter  34  that has its output connected as an input to a matched filter  36 . Matched filter  36  includes a despreader  36   a  that has its input connected to the output of A/D converter  34 , and the output of despreader  36   a  is connected to the input of an STTD decoder and RAKE block  36   b.  While not separately illustrated, block  36   b  includes a buffer sized to store a sufficient number of chips corresponding to a number of symbols, where preferably the number equals the total number of symbols transmitted by all groups communicated at one time by all antennas of transmitter  12 ; thus, in the example where two transmit antennas are used, then the buffer stores at least a number of chips equal to two groups of symbols, where such groups were shown by way of example in FIG. 4. Block  36   b  has two outputs  36   1  and  36   2 , where output  36   1  is connected as an input to a block  1  equalizer  38   1  and output  36   2  is connected as an input to a block  2  equalizer  38   1 . Block  1  equalizer  38 , outputs an estimated vector of data blocks designated {overscore ({circumflex over (D 1 )})} where the blocks of this vector estimate the block of data as shown in Equation 1 as well as the comparable block for all other users, while block  2  equalizer  38 , outputs an estimated vector of data blocks designated {overscore ({circumflex over (D 2 )})} where the blocks of this vector relate to the block of data as shown in Equation 2 as well as the comparable block for all other users. These blocks are further appreciated from the operational description below.  
         [0041]    Before discussing the operation of receiver  30 , note that FIG. 6 b  illustrates a block diagram of a receiver  30 ′ as a second embodiment for receiving signals communicated from transmitter  12 . Receiver  30 ′ is identical to receiver  30  of FIG. 6 a  with the exception of the implementation of matched filter  36 ′ in receiver  30 ′. Specifically, within matched filter  36 ′, the same block functions as illustrated in matched filter  36  are presented, but the order of connection is swapped, that is, the output of A/D converter  34  is connected to the input of an STTD decoder and RAKE block  36   c,  and the output of block  36   c  is connected as an input to a despreader  36   d.  Block  36   d  here provides the two outputs  36   1  and  36   2 , where those outputs are connected as inputs to block  1  equalizer  38   1  and block  2  equalizer  38   1 , respectively.  
         [0042]    The operation of receivers  30  and  30 ′ is now described, where the following also demonstrates how the operation of both receivers is similar and the order of the STTD decoder and RAKE function (i.e., blocks  36   b  and  36   c ) relative to the despreading function (i.e., blocks  36   a  and  36   d ) may be reversed as described below. In addition, from the following operational description, one skilled in the art may develop various hardware and/or software techniques for implementing these block devices, and with respect to the STTD decoder and RAKE function one example of such an implementation may be found in U.S. patent application 09/205,029 (TI-28441), filed Dec. 3, 1998, and hereby incorporated herein by reference. Turning now to the operation of receiver  30  (and  30 ′), radio frequency signals are received by receive antenna ATU, downconverted by demodulator  32 , and converted from analog to digital signals by A/D converter  34 , all as known in the art. In addition, as known in the CDMA art, where there are multiple signals all received according to a common channel and with noise, such as is the case with respect to signals received by receiver  30  from transmitter  12 , then such signals are commonly processed by a matched filter in order to reduce the effects of noise, that is, to improve the SNR of those signals. In the preferred embodiment, therefore, the signals from A/D converter  34  are processed by such a matched filter in the form of matched filter  36  (or  36 ′), but as particularly detailed below matched filter  36  (or  36 ′) should be specifically constructed to accommodate the various manipulations of the symbols as encoded by transmitter  12 . In addition, because the despreading function and the STTD decoding and RAKE functions are linear operations as shown mathematically below, then the order these two functions can be swapped thereby giving rise to either filter  36  of FIG. 6 a  or filter  36 ′ of FIG. 6 b.  In any event, each output of matched filter  36  (or  36 ′) represents a sequence of processed symbol signals. Also, as proven below the preferred embodiment permits these symbols to be processed separately by equalizers  38   1  and  38   2  in view of the manner in which they were transmitted by transmitter  12 , thereby reducing the complexity of receiver  30  (or  30 ′).  
         [0043]    The operation of matched filter  36  (or  36 ′), block  1  equalizer  38   1 , and block  2  equalizer  38   2  is now explained based on the following derivation of the properties of those devices. Specifically, recall the earlier convention wherein data D 1  consists of the two blocks, D 1   1 (1) and D 1   1 (2). Given these blocks and recalling the illustration of modulator  20  in FIG. 3, let the net composite response for the user corresponding to data D 1   1  from antenna AT 1   1  be as shown in the following Equation 11:  
           g   1   1 ( n )= H   1 ( n ){circle over (×)} C   1 ( n )Equation 11  
         [0044]    where H 1 (n) is the channel impulse response from antenna AT 1   1  and {circle over (×)}indicates the convolution of signals. Similarly, let the net composite response for the user corresponding to data D 2   1  from antenna AT 1   2  be as shown in the following Equation 12:  
           g   2   1 ( n )= H   2 ( n ){circle over (×)} C   1 ( n )Equation 12  
         [0045]    where H 2 (n) is the channel impulse response from antenna AT 1   2 . From Equations 11 and 12, the following Z transforms in Equations 13 and 14 can be taken, respectively:  
         G 1   1 (Z)=Σg 1   1 (n)Z −n Equation 13  
         G 2   1 (Z)=Σg 2   1 (n)Z −n Equation 14  
         [0046]    Further from the properties of Z-transform, the following Equations 15 and 16 may be stated:  
         G 1   1 (Z −1 )=Σg 1   1 (−n)Z −n Equation 15  
         [0047]    is the Z-transform of the time reversed signal g 1   1 (−n); and:  
         G 1   1 (Z −1 )=Σg 2   1 (−n)Z −n Equation 16  
         [0048]    is the Z-transform of the time reversed signal g 2   1 (−n). Equations 17 and 18 set forth further properties of the Z-transform:  
         (G 1   1 (Z −1 ))*=(G 1   1 )*(Z)Equation 17  
         (G 2   1 (Z −1 ))*=(G 2   1 )*(Z)Equation 18  
         [0049]    Having established various parameters regarding the response with respect to antennas AT 1   1  and AT 1   2 , additional definitions may be given after which the preceding is applied thereto to develop the functionality preferably implemented in matched filter  36  (or  36 ′), block  1  equalizer  38   1 , and block  2  equalizer  38   2 . Specifically, having defined D 1   1 (1) and D 1   1 (2) as the non-manipulated symbols with respect to a single user, let the following Equations 19 and 20 define corresponding composite data blocks, where each such composite block includes the non-manipulated symbols of all users communicated simultaneously at a given time (n). Thus, Equation 19 defines a composite data block {overscore (D 1 )} with respect to time (1) while Equation 20 defines a composite data block {overscore (D 2 )} with respect to time (2):  
                 D   _        1        (   Z   )       =       [               D   1   1          (   1   )            (   Z   )                     D   1   2          (   1   )            (   Z   )               ⋮                 D   1   L          (   1   )            (   Z   )             ]     LX1             Equation                 19                   D   _        2        (   Z   )       =     [               D   1   1          (   2   )            (   Z   )                     D   1   2          (   2   )            (   Z   )               ⋮                 D   1   L          (   2   )            (   Z   )             ]             Equation                 20                               
 
         [0050]    Further let the net composite Z-transform for the channel for the data blocks be as represented in the following Equations 21 and 22:  
         {overscore (G)} 1 Z=└G 1   1 (Z) G 1   2 (Z) . . . G 1   L (Z)┘ 1XL Equation 21  
         {overscore (G)} 2 Z=└G 2   1 (Z) G 2   2 (Z) . . . G 2   L (Z)┘ 1XL Equation 22  
         [0051]    Then the Z-transform of the net received vector for the two sub-blocks, that is, the net signals input into matched filter  36  (or  36 ′), is given by the following Equations 23 and 24:  
           {overscore (R)} 1( z )= {overscore (G)}   1 ( Z ) {overscore (D)} 1( Z )− {overscore (G)}   2 ( Z ) {overscore (D)} 2*( Z   −1 )+ {overscore (N)} 1( Z )Equation 23  
           {overscore (R)} 2( z )= {overscore (G)}   1 ( Z ) {overscore (D)} 2( Z )+ {overscore (G)}   2 ( Z ) {overscore (D)} 1*( Z   −1 )+ {overscore (N)} 2( Z )Equation 24  
         [0052]    which for the second sub-block of Equation 24 can be rewritten as in the following Equation 25:  
           {overscore (R)} 2*( z   −1 )= {overscore (G)}   1 *( Z   −1 ) {overscore (D)} 2*( Z   −1 )+ {overscore (G)}   2 *( Z   −1 ) {overscore (D)} 1( Z )+ {overscore (N)} 2*( {overscore (Z)}   −1 )Equation 25  
         [0053]    and where the blocks {overscore (N)} 1 (Z) and {overscore (N)} 2 (Z) are the Z transforms of the additive white Gaussian noise (AWGN) for data block {overscore (D)} 1 (Z) and {overscore (D)} 2 (Z) respectively. Putting into matrix form we get the following Equation 26:  
                       [             R   _        1        (   Z   )                   R   _          2   *          (     Z     -   1       )             ]       2      X1       =                        [               G   _     1          (   Z   )             -         G   _     2          (   Z   )                       G   _     2   *          (     Z     -   1       )                 G   _     1   *          (     Z     -   1       )             ]       2      X2L            [             D   _        1        (   Z   )                   D   _          2   *          (     Z     -   1       )             ]         2      LX1       +                                [             N   _        1        (   Z   )                   N   _          2   *          (     Z     -   1       )             ]       2      X1                     Equation                 26                               
 
         [0054]    In Equation 26, therefore, it may be seen that it provides components with respect to the conjugate transpose, the data, and the noise.  
         [0055]    Having derived the preceding, the preferred operational requirements of block  1  equalizer  38   1  and block  2  equalizer  38   2  are established first by recognizing that the signals to those equalizers are first processed as a composite net signal by matched filter  36  (or  36 ′). Thus, according to processing theory, the effect of that matched filter may be stated as in the following Equation 27 and which also therefore provides guidance as to the preferred operational configuration of matched filter  36  (or  36 ′) so that it achieves the factor of Ω:  
                   Ω   =                  [               G   _     1          (   Z   )             -         G   _     2          (   Z   )                       G   _     2   *          (     Z     -   1       )                 G   _     1   *          (     Z     -   1       )             ]     H                 =                  [             (         G   _     1          (   Z   )       )     T             (         G   _     2          (   Z   )       )     T                 (     -         G   _     2   *          (     Z     -   1       )         )     T             (         G   _     1   *          (     Z     -   1       )       )     T           ]       2      X2L                     Equation                 27                               
 
         [0056]    where the notations [] H , [] T  denote the conjugate transpose and the transpose of a matrix, respectively. Next, the effect provided by the Equation 27 matched filter can be multiplied times both sides of Equation  26 , yielding the following Equation 28:  
                     Ω   *     [             R   _        1        (   Z   )                   R   _          2   *          (     Z     -   1       )             ]       =                  Ω   *       [               G   _     1          (   Z   )             -         G   _     2          (   Z   )                       G   _     2   *          (     Z     -   1       )                 G   _     1   *          (     Z     -   1       )             ]          [             D   _        1        (   Z   )                   D   _          2   *          (     Z     -   1       )             ]         +                              Ω   *     [             N   _        1        (   Z   )                   N   _          2   *          (     Z     -   1       )             ]                     Equation                 28                               
 
         [0057]    Let the following Equation 29 in terms of Λ be substituted for the data-related multiplicand matrices of Equation 28:  
                 Ω     2      LX2       *       [               G   _     1          (   Z   )             -         G   _     2          (   Z   )                       G   _     2   *          (     Z     -   1       )                 G   _     1   *          (     Z     -   1       )             ]       2      X2L         =       [         Λ       Γ             Γ   *         Λ         ]       2      LX2L               Equation                 29                               
 
         where Λ=( {overscore (G)}   1 *( Z   −1 )) T   {overscore (G)}   1 ( Z )+( {overscore (G)}   2 ( Z )) T   {overscore (G)}   2 *( Z   −1 ); and  
         Γ=−( {overscore (G)}   1 *( Z   −1 ) T   {overscore (G)}   2 ( Z )+( {overscore (G)}   2 ( Z )) T   {overscore (G)}   1 *( Z   −1 ).  
         [0058]    From Equation 29, one skilled in the art may first ascertain that to therefore embody block  1  equalizer  38   1  and block  2  equalizer  38   2 , one such equalizer would be directed to an implementation with respect to Λ while the other would be directed to an implementation with respect to Γ. However, the present inventors have observed that due to the symbol level time reversal of the STTD encoding in the preferred embodiment, the matrix Γ has zeros along the diagonal terms. In addition, the non-diagonal terms are small due to cross-correlations between the different users and can be neglected for reduced complexity and, indeed, these non-diagonal terms are even closer to zero (or some negligible amount) due to the additional implementation of symbol wise time reversal in the preferred embodiment. Given these observations, the data received from matched filter  36  (or  36 ′) can be effectively approximated by substituting Γ=0 into Equation 28 to yield the following Equation 30:  
                 Ω     2      LX2       *       [             R   _        1        (   Z   )                   R   _          2   *          (     Z     -   1       )             ]       2      X2         ≈             [         Λ       0           0       Λ         ]       2      LX2L            [             D   _        1        (   Z   )                   D   _          2   *          (     Z     -   1       )             ]         2      LX2       +       Ω     2      LX2       *       [             N   _        1        (   Z   )                   N   _          2   *          (     Z     -   1       )             ]       2      X2                   Equation                 30                               
 
         [0059]    Looking now to block  1  equalizer  38   1  and block  2  equalizer  38   2  in FIG. 6 a  (or  6   b ) in view of Equation 30, note that block  1  equalizer  38   1  receives a set of signals from matched filter  36  (or  36 ′) corresponding to time n=1 (i.e., both the non-manipulated symbols and codes sent via antenna AT1 1  and the manipulated symbols and codes sent via antenna AT1 2 ), while block  2  equalizer  38   2  receives a set of signals from matched filter  36  corresponding to time n=2. However, the derivation of Equation 30 and the observations giving rise to it indicate that both of these sets of signals may be multiplied times the inverse of the matrix pertaining to Λ in order to retrieve the data and, thus, the preferred embodiment of equalizers  38   1  and  38   2  operate in this manner with respect to their respective inputs. As a result, both outputs {overscore ({circumflex over (D 1 )})} and {overscore ({circumflex over (D 2 )})} are preferably determined in response to the inverse of the common matrix pertaining to Λ that is, in response to Λ −1 . More particularly, by multiplying the signal input from output  36   1  times Λ −1 , block  1  equalizer  38   1  provides {overscore ({circumflex over (D)})}  1  which is an estimate of the signals in time that correspond to {overscore (D)} 1  of Equation 19, and by multiplying the signal input from output  36   2  times Λ −1 , block  1  equalizer  38   1  provides {overscore ({circumflex over (D)})}  2  which is an estimate of the signals in time that correspond to {overscore (D)} 2  of Equation 20. Thus, equalizer  38   1  is operable to output an estimate of the signal which reflects the channel of transmission from antenna AT 1  and separately equalizer  38   2  is operable to output an estimate of the signal which reflects the channel of transmission from antenna AT 2 . The separate determinations arise from the distinct inputs, and can be achieved using dual hardware/software in parallel operation or the same hardware/software in serial operation. In either event, however, complexity is relatively reduced due to the above-discussed result of the being able to remove the matrix Γ from the required determinations. Finally, once {overscore ({circumflex over (D 1  )})} and {overscore ({circumflex over (D 2  )})} are obtained, they may be used further or processed by receiver  30  (or  30 ′) in manners ascertainable by one skilled in the art.  
         [0060]    Before proceeding, it is noteworthy to observe that the single common matrix multiplier,  
         [         Λ       0           0       Λ         ]     ,                         
 
         [0061]    of the preferred embodiment of block  1  equalizer  38   1  and block  2  equalizer  38   2  provides considerable improvement over a system wherein one set of data would require multiplication times a first corresponding matrix while a second set of data would require multiplication times a second and different corresponding matrix. Specifically, as is known in matrix operations, for a matrix of size M, then to take its inverse involves an arithmetic complexity on the order of M 3 . However, since Equation  30  includes a matrix having a diagonal equal to zero, then the underlying operation requires only the taking of the inverse of the diagonal matrix, thereby providing a considerably less complex evaluation. As a result, the complexity of block  1  equalizer  38   1  and block  2  equalizer  38   2 , as compared to a system requiring additional matrix manipulations, is considerably reduced. Moreover, as discussed above with respect to transmitter  12 , there is also a reduction in ISI in the incoming encoded signals.  
         [0062]    As an additional observation regarding block  1  equalizer  38   1  and block  2  equalizer  38   2 , note that alternative embodiments may be created given the preceding recognition that both equalizers share the mutual matrix relating to Λ 1 . For example, other standard receivers like MMSE equalizers could be altered to implement the mutual matrix benefit, including either those with or without feedback. For example, instead of multiplying a set of input signals times only times Λ 1   −1 , in an alternative embodiment additional factors may be implemented such as a multiplication times a matrix of (Λ 1 +σ 2 I) −1  as would be used to reduce mean square error. In such an instance, σ 2  is the variance of the AWGN noise and I is the identity matrix. Still other alternatives may be ascertained by one skilled in the art.  
         [0063]    Given the preceding, the present inventors have observed that by implementing time reversal in addition to STTD in a CDMA system, ISI is removed as between antennas for the same user or transmission. For example, assume that data D 1  represents the symbols corresponding to a first user. From the preceding, it may be appreciated that a user&#39;s symbols in one form of D 1 , that is, as C 1 D 1   1 , are communicated along antenna AT 1   1 . At the same time, an alternative set of symbols, namely, C 1 D 2   1 , are communicated along antenna AT 1   2 . The preferred embodiment of encoding in this manner eliminates the ISI from this same user data provided via antenna AT 1   1  which would otherwise provide ISI onto antenna AT 1   2 , and it likewise eliminates the ISI from this same user data provided via antenna AT 1   2  which would otherwise provide ISI onto antenna AT 1   1 .  
         [0064]    [0064]FIG. 7 illustrates a block diagram of an alternative embodiment modulator  20 ′ for use in transmitter  12  of FIG. 1 and which implements the same functional connections as modulator  20  shown in FIG. 3, where the alternative modulator  20 ′ of FIG. 7 varies from modulator  20  by implementing time reversal with respect to selected codes. Specifically, looking to the lower half of FIG. 7, note that the multiplicands identified in code multipliers  24   2   1  through  24   2   L  illustrate that the codes provided as a multiplicand by such multipliers are time reversed (using the above-introduced convention of the left pointing arrow over each code multiplicand). In contrast, the upper half of FIG. 7 is the same as FIG. 3.  
         [0065]    The operation of modulator  20 ′ of FIG. 7 should be readily appreciated given the previous discussion of modulator  20  and further in view of the following additional observations which also facilitate an understanding of the later-illustrated preferred embodiment receivers that receive the signals provided by modulator  20 ′. Similar to Equations 19 and 20, let {overscore (X)} 1  be the composite signal of the spreading codes and the data block {overscore (D)} 1  and {overscore (X)} 2  be the composite signal of the spreading codes and the data block {overscore (D)} 2  as shown in the following Equations 31 and 32:  
           {overscore (X)} 1={ C   1   D   1   1 (1)+ C   2   D   1   2 (1)+. . . + C   L   D   1   L (1)}Equation 31  
           {overscore (X)} 2={ C   1   D   1   1 (2)+ C   2   D   1   2 (2)+. . . + C   L   D   1   L (2)}Equation 32  
         [0066]    The upper half of modulator  20 ′ operates in the same manner as modulator  20  and, thus, reference is made to Equation 9 which designates the output to antenna AT 1   1 . With respect to the lower half of modulator  20 ′, the output of adder  26   2  may be represented by the following Equation 33, which one skilled in the art may readily derive given the previous Equation 10 as well as the time reversal of the codes in code multipliers  24   2   1  through  24   2   L :  
                     adder                   26   2                   output     =     {               -       (         C   ←     1              D   ←     1   1          (   2   )         )     *       +   …   +     -       (         C   ←     n              D   ←     1   n          (   2   )         )     *       +   …   +     -       (         C   ←     L              D   ←     1   L          (   2   )         )     *         ,                   (         C   ←     1              D   ←     1   1          (   1   )         )     *     +   …   +       (         C   ←     n              D   ←     1   n          (   1   )         )     *     +   …   +       (         C   ←     L              D   ←     1   L          (   1   )         )     *             }                 =     {         -       X   _     ←            2   *       ,         X   _     ←          1   *         }                   Equation                 33                               
 
         [0067]    The signal provided according to Equation 33 provides improved signal performance at a receiving station by reducing same user ISI in a manner comparable to that described above with respect to the first embodiment. In addition, however, and as detailed below, this signal also facilitates a receiver structure with certain benefits as compared to receiver  30  of FIG. 6 a  (or receiver  30 ′ of FIG. 6 b ).  
         [0068]    [0068]FIG. 8 a  illustrates a functional block diagram of a preferred receiver station  40  for receiving and processing the signals transmitted using modulator  20 ′ of FIG. 7, and again one skilled in the art may readily appreciate various hardware/software implementations to achieve receiver  40  in view of the following description thereof. Receiver  40  includes antenna ATU from FIG. 1, and it provides signals it receives to an input of an RF demodulator  42 . The analog output of RF demodulator  42  is connected as an input to an analog-to-digital (“A/D”) converter  44  that has its output connected as an input to an STTD decoder and RAKE block  46  which also implements the functionality of a matched filter as detailed below. While not separately illustrated, block  46  includes a buffer sized to store a sufficient number of chips corresponding to a number of symbols, where preferably the number equals the total number of symbols transmitted by all groups communicated at one time by all antennas of transmitter  12 ; thus, in the example where two transmit antennas are used, then the buffer stores at least a number of chips equal to two groups of symbols, where such groups were shown by way of example in FIG. 4. Block  46  has two outputs  46   1  and  46   2 , where output  46   1  is connected as an input to a block  1  despreader  48   1  and output  46   2  is connected as an input to a block  2  despreader  48   2 . The output of block  1  despreader  48   1  is connected as an input to a block  1  equalizer  50   1  which outputs the previously-introduced estimated vector of data blocks designated {overscore ({circumflex over (D 1 )})}, and the output of block  2  despreader  48   2  is connected as an input to a block  2  equalizer  50   2  which outputs the previously-introduced estimated vector of data blocks designated {overscore ({circumflex over (D 2 )})}. These blocks are further appreciated from the operational description below.  
         [0069]    Before discussing the operation of receiver  40 , note that FIG. 8 b  illustrates a block diagram of a receiver  40 ′ as a second embodiment for receiving signals communicated from modulator  20 ′ of FIG. 7. Receiver  40 ′ is identical to receiver  40  with the exception of the implementation of the ordering of its despreading and block equalizing functions, that is, the order of connection of these functions is swapped. Specifically, the two outputs  46   1  and  46   2  of STTD decoder and RAKE  46  are connected as inputs to block  1  equalizer  52   1  and block  2  equalizer  52   2 , respectively. The output of block  1  equalizer  52   1  is connected as an input to a block  1  despreader  54   1 , and the output of block  2  equalizer  52   2  is connected as an input to a block  2  despreader  54   2 . Further, the outputs of block  1  despreader  54 , and block  2  despreader  54   2  provide {overscore ({circumflex over (D 1 )})} and {overscore ({circumflex over (D 2 )})}, respectively.  
         [0070]    The operation of receivers  40  and  40 ′ is now described, where the following also demonstrates how the operation of both receivers is similar and why the order of the despreading function relative to the equalizing function may be reversed as shown mathematically below. In addition, from the following operational description, one skilled in the art may develop various hardware and/or software techniques for implementing these block devices. Turning now to the operation of receiver  40  (and  40 ′), let the following Equations 34 and 35 represent the Z transform of the channel impulse response from antennas AT 1  and AT 2 , respectively:  
         H 1 (Z)=ΣH 1 (n)Z −n Equation 34  
         H 2 (Z)=ΣH 2 (n)Z −n Equation 35  
         [0071]    Accordingly, the received signal for the two sub-blocks is given by the following Equations 36 and 37:  
           {overscore (R)} 1( z )= H   1 ( Z ) {overscore (X)} 1( Z )− H   2 ( Z ) {overscore (X)} 2*( Z   −1 )+ {overscore (N)} 1( Z )Equation 36  
           {overscore (R)} 2( z )= H   1 ( Z ) {overscore (X)} 2( Z )+ H   2 ( Z ) {overscore (X)} 1*( Z   −1 )+ {overscore (N)} 2( Z )Equation 37  
         [0072]    The second sub-block as shown in Equation 37 can be rewritten as in the following Equation 38:  
           {overscore (R)} 2*( z   −1 )= H   1 *( Z   −1 ) {overscore (X)} 2*( Z   −1 )+ H   2 *( Z   −1 ) {overscore (X)} 1( Z )+ {overscore (N)} 2*( Z   −1 )Equation 38  
         [0073]    Equation 38 implies that we can now write the matrix equation shown in the following Equation 39:  
                   Ω   =                  [             H   1          (   Z   )             -       H   2          (   Z   )                     H   2   *          (     Z     -   1       )               H   1   *          (     Z     -   1       )             ]     H                 =                  [             H   1   *          (     Z     -   1       )               H   2          (   Z   )                 -       H   2   *          (     Z     -   1       )                 H   1          (   Z   )             ]       2      X                 2                     Equation                 40                               
 
         [0074]    According to processing theory in a manner comparable to Equation 27 for an earlier embodiment, the effect of that matched filter, such as implemented in STTD decoder and RAKE  46 , may be stated as in the following Equation 40 and which also therefore provides guidance as to the preferred operational configuration the matched filter functionality within STTD decoder and RAKE  46  so that it achieves the factor of:  
                       [             R   _        1        (   Z   )                   R   _          2   *          (     Z     -   1       )             ]       2      X                 2       =                  [             H   1          (   Z   )             -       H   2          (   Z   )                     H   2   *          (     Z     -   1       )               H   1   *          (     Z     -   1       )             ]       2      X                 2                                    [             X   _        1        (   Z   )                   X   _          2   *          (     Z     -   1       )             ]       2      X                 2       +                                [             N   _        1        (   Z   )                   N   _          2   *          (     Z     -   1       )             ]       2      X                 2                     Equation                 39                               
 
         [0075]    where again the notation [] H , denotes the conjugate transpose of a matrix. Next, the effect provided by the Equation 40 matched filter can be multiplied times both sides of Equation 39, yielding the following Equation 41:  
                   Ω   =         [             R   _        1        (   Z   )                   R   _          2   *          (     Z     -   1       )             ]       2      X                 2       =                Ω   *     [             H   1          (   Z   )             -       H   2          (   Z   )                     H   2   *          (     Z     -   1       )               H   1   *          (     Z     -   1       )             ]                                    [             X   _        1        (   Z   )                   X   _          2   *          (     Z     -   1       )             ]     +                              Ω   *     [             N   _        1        (   Z   )                   N   _          2   *          (     Z     -   1       )             ]                     Equation                 41                               
 
         [0076]    Let the following Equation 42 in terms of Λ be substituted for the data-related multiplicand matrices of Equation 41:  
               Ω   *     [             H   1          (   Z   )             -       H   2          (   Z   )                     H   2   *          (     Z     -   1       )               H   1   *          (     Z     -   1       )             ]       =       [         Λ       0           0       Λ         ]       2      X                 2               Equation                 42                               
 
         [0077]    where Λ=H 1 *(Z −1 )H 1 (Z)+H 2 (Z)H 2 *(Z −1 ). Note also with respect to Equation 42 that in the case of receivers  40  and  40 ′, and as a result of the code reversal from modulator  20 ′ of FIG. 7, the diagonal of the matrix based on Λ equals zero rather than approximating zero as is the case for modulator  20  as described in connection with Equations 29 and 30. As a result, an even greater reduction in ISI is anticipated with these embodiments.  
         [0078]    Having derived the filtering operation of STTD decoder and RAKE  46  in Equation 42, it may be substituted into Equation 41 to yield the following Equation 43:  
                     Ω   *     [             R   _        1        (   Z   )                   R   _          2   *          (     Z     -   1       )             ]       =                    [         Λ       0           0       Λ         ]          [             X   _        1        (   Z   )                   X   _          2   *          (     Z     -   1       )             ]       +                              Ω   *     [             N   _        1        (   Z   )                   N   _          2   *          (     Z     -   1       )             ]                     Equation                 43                               
 
         [0079]    From Equation 43, in order to obtain the data two additional operations are required and it is now shown how such operations are achieved by the despreading and equalizing functions in FIGS. 8 a  and  8   b,  irrespective of the ordering thereof. Specifically, in either FIG. 8 a  or FIG. 8 b,  one set of despreading and equalizing functions (i.e., either  48   1  and  50   1  or  52   1  and  54   1 ) receives a set of signals from the matched filter operation of STTD decoder and RAKE  46  corresponding to time n=1 (i.e., both the non-manipulated symbols and codes sent via antenna AT 1   1  and the manipulated symbols and codes sent via antenna AT 1   2 ), while another set of despreading and equalizing functions (i.e., either  48   2  and  50   2  or  52   2  and  54   2 ) receives a set of signals from the matched filter operation of STTD decoder and RAKE  46  corresponding to time n=2. Here, the derivation of Equation 43 and the observations giving rise to it indicate that both of these sets of signals may be multiplied times the inverse of the matrix pertaining to Λ, but the result relates to the combination of the data and multiplied code as shown in Equation 33 rather than directly to the data as was the case in FIGS. 6 a  and  6   b.  Thus, in order to retrieve the data the preferred embodiment uses despreading (e.g., blocks  48   1  and  48   2 , or blocks  54   1  and  54   2 ) after STTD decoder and RAKE  46  to remove the code from the result and also equalizers (e.g., block  50   1  and  50   2  or  52   1  and  52   2 ) to multiply times the inverse of the matrix pertaining to Λ. As a result, both outputs {overscore ({circumflex over (D 1 )})} and {overscore ({circumflex over (D 2 )})} are preferably determined in response to the inverse of the common matrix pertaining to Λ (i.e., Λ −1 ) as well as the code removal. In addition, because the despreading function and the equalizing functions are linear operations, then the order these two functions can be swapped thereby giving rise to either receiver  40  of FIG. 8 a  or receiver  40  of FIG. 8 b.  Still further, note with respect to FIGS. 8 a  and  8   b  that one combination of a despreader and equalizer is operable to output an estimate of the signal which reflects the channel of transmission from antenna AT 1  and separately another combination of a despreader and equalizer  38  is operable to output an estimate of the signal which reflects the channel of transmission from antenna AT 2 . Again, the separate determinations arise from the distinct inputs, and can be achieved using dual hardware/software in parallel operation or the same hardware/software in serial operation. In either event, however, complexity is relatively reduced due to the result of finding a zero diagonal for the matrix pertaining to Λ. Once {overscore ({circumflex over (D 1 )})} and {overscore ({circumflex over (D 2 )})} are obtained, they may be used further or processed by receiver  30  (or  30 ′) in manners ascertainable by one skilled in the art.  
         [0080]    Having detailed the implementation and operation of modulator  20 ′ and two alternative preferred receivers  40  and  40 ′ for processing its signals, note further that the realization of Equation 33 also gives rise to two additional embodiments based on which alternative method of data transfer is implemented in the CDMA system, that is, whether the system is communicating TDD or FDD data. Specifically, in a first embodiment providing a TDD system, each code C n  may represent a product of a Walsh code and a scrambling code. As known in the art, each of the Walsh code and the scrambling code has a period equal to a symbol, that is, the number of chips in each code is equal to the number of chips in the symbol. Thus, to accomplish a time reversal of such a code, each code chip is reversed in time. In other words, for a product of a Walsh code and a scrambling code having chips P 0  through P n−1 , the time reversal of that code, as provided as a multiplicand by one of code multipliers  24   2   1  through  24   2   L , is P n-1  through P 0 . Thus, to achieve code reversal in connection with a symbol S l , the corresponding code multiplier  24   2   1  through  24   2   L  determines the following product in Equation 44:  
         product={S i ×P n−1 ,S l ×P n−2 , . . . ,S i ×P 0 Equation 44  
         [0081]    However, in a second embodiment providing an FDD system, first note that it is known that FDD systems implement a so-called long code in addition to a Walsh code. In applying the preferred embodiment to such a system, each multiplicand code C n  therefore may represent the product of both the Walsh code and the long code. The Walsh code is time reversed in the same manner as shown in Equation 28 on a chip basis. The long code, however, has a duration far greater than that of a single symbol. Specifically, a long code count has a period equal to  2   24 −1 chips. By way of example, therefore, for a typical chip rate equal to 1.2288 MHz, then each long code is approximately 3,579,139 seconds or approximately 41.425 days long. Preferably, therefore, modulator  20 ′ would not seek to reverse in time this considerably lengthy long code. Instead, in a preferred embodiment as applied to an FDD system, only the long code chips pertaining to a given block of symbols are time reversed prior to the multiplication times that symbol. For example, consider again the example of symbols shown in FIG. 4 and illustrated as blocks D 1   1 (1) and D 1   1 (2), as also set forth earlier in Equations 1 and 2. Additionally, assume these same blocks were processed in modulator  20 ′ of FIG. 7. Thus, for block D 1   1 (2) without time reversal of the symbols and the Walsh code, then symbol S 5  would be multiplied times the Walsh code (i.e., W 0  through W n−1 ) and also times long code chips LCC x  through LCC x+n−1 , respectively, while symbol S 6  would be multiplied times the Walsh code and also times long code chips LCC x+n  through LCC x+2n , respectively, while symbol S 7  would be multiplied times the Walsh code and also times long code chips LCC x+2n+1  through LCC x+3n , respectively, and finally symbol S 8  would be multiplied times the Walsh code and also times long code chips LCC x+3n+1  through LCC x+4n , respectively. However, in the present embodiment, the long code is time reversed by reversing the entire number of long chips corresponding to the block of symbols, and in the present example therefore chips LCC x  through LCC x+4n , corresponding to the block of symbols D 1   1 (2), are time reversed (also, the Walsh code is time reversed as explained above). As a result, code multiplier  24   2   1  determines the following four product sequences shown in Equations 45 through 48:  
                   product   =                {                 (     -     S   8       )     *     ×     LCC     x   +     4      n     -   1         ,                     (     -     S   8       )     *     ×     W     n   -   2       ×     LCC     x   +     4      n     -   3         ,   …              ,                                                  (     -     S   8       )     *     ×     W     n   -   1       ×     LCC     x   +     4      n     -   2         ,                   (     -     S   8       )     *     ×     W   0     ×     LCC     x   +     3      n                 }                 Equation                 45                     product   =                {                 (     -     S   7       )     *     ×     W   n     ×     LCC     x   +     3      n     -   1         ,                     (     -     S   7       )     *     ×     W     n   -   2       ×     LCC     x   +     3      n     -   3         ,   …              ,                                                  (     -   S     )     *     ×     W     n   -   1       ×     LCC     x   +     3      n     -   2         ,                   (     -     S   7       )     *     ×     W   0     ×     LCC     x   +     2      n                 }                 Equation                 46                     product   =                {                 (     -     S   6       )     *     ×     W   n     ×     LCC     x   +     2      n     -   1         ,                     (     -     S   6       )     *     ×     W     n   -   2       ×     LCC     x   +     2      n     -   3         ,   …              ,                                                  (     -     S   6       )     *     ×     W     n   -   1       ×     LCC     x   +     2      n     -   2         ,                   (     -     S   6       )     *     ×     W   0     ×     LCC     x   +   n               }                 Equation                 47                     product   =                {                 (     -     S   5       )     *     ×     W     n   -   1       ×     LCC     x   +   n   -   1         ,                     (     -     S   5       )     *     ×     W     n   -   3       ×     LCC     x   +   n   -   3         ,   …              ,                                                  (     -     S   5       )     *     ×     W     n   -   2       ×     LCC     x   +   n   -   2         ,                   (     -     S   5       )     *     ×     W   0     ×     LCC   x             }                 Equation                 48                               
 
         [0082]    From Equations 45 through 48, one skilled in the art also will appreciate how comparable code reversal is also applied with respect to block D 1   1 (1), where the long code chips that would be applied to the manipulated symbols of that block also would be time reversed over all chips corresponding to that block.  
         [0083]    The preceding FIGS. 6 a  and  6   b  versus  8   a  and  8   b  also may be compared to draw one additional observation regarding the alternatives provided therein and in view of the modulators  20  and  20 ′ transmitting signals to those receivers. Specifically, as to receiver  40 ′ of FIG. 8 b,  note that its despreading operations (i.e., blocks  54   1  and  54   2 ) can follow its equalization whereas for receiver  40  of FIG. 8 a  as well as for receivers  30  and  30 ′ of FIGS. 6 a  and  6   b,  the despreading operation precedes equalization. With respect to receiver  40 ′, therefore, it may be advantageous in the cases when the receiver does not have any knowledge of the other user codes being transmitted in the base station.  
         [0084]    From the above, it may be appreciated that the above embodiments provide a wireless communication network including a transmitter and receiver, wherein the transmitter communicates signals using transmit antenna diversity in a manner that reduces ISI and the receiver has reduced device complexity as a result thereof. As a result, overall network performance is improved. Further, while the present embodiments have been described in detail, various substitutions, modifications or alterations could be made to the descriptions set forth above without departing from the inventive scope, as is evident from many variations set forth by examples above. As another example, while CDMA/WCDMA has been demonstrated as the preferred wireless environment, other wireless systems may implement the preferred embodiment. As still another example, while the receivers illustrated above depict a single receive antenna, one skilled in the art may readily adopt the preceding teachings to multiple receive antennas. Thus, these observations as well as others ascertainable by one skilled in the art further illustrate the inventive scope, as defined by the following claims.