Abstract:
In a device or a recording apparatus for converting n-bit data into m-bit data with different conversion methods, and selecting and outputting one of a plurality of converted m-bit data, when controlling output means in accordance with the plurality of m-bit data, a specific signal component is extracted from each of the plurality of m-bit data, the absolute values of the plurality of extracted outputs are obtained, and at least one of the plurality of absolute values or the extracted output corresponding thereto is selectively output (recorded). Thus, superposition and suppression of a specific frequency component can be realized by a single circuit having a very simple circuit configuration. As a result, the size and the cost of a digital signal recording apparatus utilizing a modulation circuit of this kind can be reduced.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     This invention relates to a digital modulating device for modulating a digital signal, and to a recording apparatus for recording a digital signal on a recording medium. More particularly, the invention relates to a digital modulating device for converting n-bit data into m (&gt;n)-bit data, and to a digital recording apparatus for recording a signal component having a specific frequency as a pilot signal added to main information while controlling the intensity of the signal component. 
     2. Description of the Related Art 
     In conventional apparatuses for recording a digital signal on a recording medium, there has been known a technique in which high-density recording is performed by recording the signal by forming a large number of tracks on the recording medium. When reproducing a recorded signal from such an apparatus, a so-called tracking control operation must be performed so that a reproducing head can assuredly trace high-density recording tracks and digital information can be reproduced in an excellent state. 
     In an ordinary tracking operation, a pilot signal for tracking control is superposed on a recording signal during a recording operation, and a tracking error is detected using the pilot signal. A technique of superposing a pilot signal having a low frequency which is not influenced by an azimuth and the like is generally adopted. 
     FIG. 1 is a diagram illustrating a conventional recording pattern of pilot signals, in which two kinds of pilot signals f1 and f2 are periodically multiplexed with an information signal on a large number of tracks recorded in parallel on a recording tape T. In FIG. 1, symbol F 0  represents a track on which a pilot signal is not multiplexed, symbol F 1  represents a track on which the pilot signal f1 is multiplexed, and symbol F2 represents a track on which the pilot signal f2 is multiplexed. 
     In a reproducing operation, while a head traces a track F 0 , the crosstalk component of the pilot signal f1 from a track F 1  adjacent to the track F 0  and the crosstalk component of the pilot signal f2 from a track F 2  adjacent to the track F 0  are compared with each other to form a tracking-error signal. 
     However, when it is intended to apply the above-described tracking control (of multiplexing pilot signals) to a digital recording apparatus, a pilot signal and a recording signal (containing main information) are superposed independently. As a result, the S/N ratio of a digital signal in a reproducing operation is degraded, causing an increase in the error rate of reproduced data. This causes degradation in a reproduced image when the tracking control is applied to a digital VCR (video cassette recorder). 
     Furthermore, a strong spectrum of the digital recording signal is present in the vicinity of the frequency of the pilot signal, thereby causing degradation in the S/N ratio of the pilot signal in a reproducing operation, as well as degradation in tracking accuracy. This also causes degradation in a reproduced image when the tracking control is applied to a digital VCR. 
     Recently, there has been proposed a technique in which a pilot signal is superposed on a digital recording signal while including a pilot-signal component in a digital modulating signal. However, a very complicated circuit configuration is required for realizing such a proposal. 
     SUMMARY OF THE INVENTION 
     It is an object of the present invention to solve the above-described problems. 
     It is another object of the present invention to provide a digital modulating device capable of superposing a signal component having a desired frequency on a digital modulated signal with a relatively simple circuit configuration. 
     According to one aspect, the present invention, which achieves the above-described object, relates to a digital modulating device, comprising conversion means for converting n-bit data into m-bit data with different conversion methods, output means for selecting and outputting one of a plurality of m-bit data output from the conversion means, and control means for controlling the output means in accordance with the plurality of m-bit data. The control means comprises a plurality of extraction means for extracting a specific signal component from each of the plurality of m-bit data, a plurality of absolute-value calculation means for obtaining the absolute values of outputs from the plurality of extraction means, and switching means for selectively outputting an output from at least one of the plurality of absolute-value calculation means and an output from the extraction means corresponding to the output. 
     According to the above-described configuration, when it is intended to superpose a specific signal, the switching means may select the output of the extraction means. When it is intended to suppress the environment of the frequency component relating to the specific signal, the output of the absolute-value calculation means may be selected. Accordingly, a specific signal can be superposed on a modulated signal without separately providing a circuit for superposing the specific frequency component. 
     According to another aspect, the present invention relates to a digital modulating method, comprising the steps of convertng n-bit data into m-bit data with different conversion methods, extracting a specific signal component from each of a plurality of m-bit data output as a result of the conversion, obtaining the absolute value of each of the plurality of extracted specific signal components, and outputting one of the plurality of m-bit data by selectively using the absolute-value and the specific signal component. 
     According to still another aspect, the present invention relates to a digital modulating device, comprising modulation means for modulating digital data by different modulation methods, output means for selecting and outputting one of data output from the modulation means, and control means for controlling the output means in accordance with the output of the modulation means. The control means extracts a specific signal component from each of the output data, and controls the output means by selectively using data indicating the amplitude of the extracted component and data indicating the power of the extracted component. 
     It is still another object of the present invention to provide a digital recording apparatus capable of recording a digital signal on a recording medium in a state of being superposed with a signal component having a desired frequency with a simple circuit configuration. 
     According to yet another aspect, the present invention, which achieves the above-described object, relates to a digital signal recording apparatus, comprising conversion means for convertng n-bit data into m-bit data with different conversion methods, recording means for selecting one of a plurality of m-bit data output from the conversion means and recording the selected data on a recording medium, and control means for controlling the selection operation of the recording means in accordance with the plurality of m-bit data. The control means comprises a plurality of extraction means for extracting a specific signal component from each of the plurality of m-bit data, a plurality of absolute-value calculation means for obtaining the absolute values of outputs from the plurality of extraction means, and switching means for selectively outputting an output of at least one of the plurality of absolute-value calculation means and an output from the extraction means corresponding to the output. 
     According to yet a further aspect, the present invention relates to a digital signal recording apparatus, comprising modulation means for modulating digital data with different modulation methods, recording means for selecting one of data output from the modulation means and recording the selected data on a recording medium, and control means for controlling the selection operation of the recording means in accordance with an output from the modulation means. The control means extracts a specific signal component from each of the output data, and controls the selection operation by selectively using data indicating the amplitude of the extracted component and data indicating the power of the extracted component. 
    
    
     The foregoing and other objects, advantages and features of the present invention will become more apparent from the following detailed description of the preferred embodiment taken in conjunction with the accompanying drawings. 
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a diagram illustrating a signal recording format for performing tracking control; 
     FIG. 2 is a schematic diagram illustrating a string of modulated data to be recorded; 
     FIG. 3 is a diagram illustrating the configuration of a principal portion of a digital recording apparatus according to an embodiment of the present invention; 
     FIG. 4 is a diagram illustrating the configuration of a precoder shown in FIG. 3; 
     FIG. 5 is a diagram illustrating the configuration of a determination circuit shown in FIG. 3; 
     FIGS. 6 and 7 are diagrams illustrating the configuration of signal extraction units of a digital modulation circuit shown in FIG. 5; and 
     FIGS. 8(a) through 8(c) are diagrams illustrating spectra of a signal recorded by the apparatus shown in FIG. 3. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
     A preferred embodiment of the present invention will now be described with reference to the drawings. 
     FIG. 3 is a diagram illustrating the configuration of a principal portion of a digital signal recording apparatus according the preferred embodiment. In FIG. 3, parallel data comprising a plurality of bits (for example, 8 bits) is input to a terminal 1. This signal is input to a parallel/serial converter 2 to become a binary-bit stream, and is then input to a &#34;0&#34; inserter 3 and a &#34;1&#34; inserter 4. That is, the same data is input to the inserters 3 and 4. 
     The &#34;0&#34; inserter 3 inserts 1-bit binary information &#34;0&#34; for every predetermined number of data, for example, as shown in FIG. 2, for every three words (24 bits). Similarly, the &#34;1&#34; inserter 4 inserts 1-bit binary information &#34;1&#34; for a predetermined number of data (24 bits). Output data strings (bit streams) from the inserters 3 and 4 are input to an NRZI (non-return-to-zero-inverted) precoder 5. Although the precoder 5 will be described later in detail, it has the configuration shown in FIG. 4. The precoder 5 outputs different data strings for a data string in which binary information &#34;0&#34; is inserted and for a data string in which binary information &#34;1&#34; is inserted. 
     Two kinds of data strings are output from the precoder 5 and are input to a switch 6 and to a determination circuit 8. Although the determination circuit 8 will be described later in detail, it has the configuration shown in FIG. 5. In order to detect the intensity of a specific frequency component for each data string and to suppress or emphasize the specific frequency component, the determination circuit 8 outputs a selection signal SEL for selecting one of (i) a modulated data string obtained from a data string in which the above-described binary information &#34;0&#34; is inserted, and (ii) a modulated data string obtained from a data string in which the binary information &#34;1&#34; is inserted from the output of the precoder 5. The switch 6 is controlled by this selection signal SEL. A pair of modulated data strings output from the precoder 5 are delayed by buffers 11 and 12 for a period necessary for determination by the determination circuit 8, and are then selectively output by the switch 6. A magnetic recording device 7 includes a recording amplifier 13 and a recording head 14. 
     The configuration of the precoder 5 will now be described in detail with reference to FIG. 4. In FIG. 4, a data string from the &#34;0&#34; inserter 3 is input to an input terminal 101. A data string from the &#34;1&#34; inserter 4 is input to an input terminal 121. Switches 103, 105, 123 and 125 are usually connected to the &#34;0&#34; side. Exclusive OR&#39;s of data of data strings input to the respective input terminals and data of the same data strings which precede the respective data by two bits and have been delayed by 1-bit delay circuits 104 and 106, and 124 and 126 are obtained by EX-OR circuits 102 and 122, and the obtained data are output from output terminals 107 and 127, respectively. 
     When the final bit of 25 bits, comprising an inserted 1 bit and information bits for three words, is input to the terminals 101 and 121, a selection signal SEL indicating which of the 25-bit data must be selected is input to a terminal 111. A timing control circuit 10 shown in FIG. 3 generates a reset signal RST at the timing of the input of the final bit to the precoder 5 in response to a clock signal input to a terminal 9. The reset signal RST is input to the terminal 110 shown in FIG. 4 to connect the respective switches 103, 105, 123 and 125 to the &#34;1&#34; side for a period corresponding to 1-bit data, whereby the signal of a modulated data string selected by the selection signal SEL is input to the 1-bit delay circuits 104 and 106, or 124 and 126 via the switch 112 or 113, respectively. 
     Accordingly, when inserted bits of respective 25 bits are input to the terminals 101 and 121, the final bit of the selected 25-bit data string is output from the delay circuits 104 or 124, and a bit preceding the final bit by two bits is output from the delay circuits 106 or 126, respectively. Since an exclusive OR of data and data preceding the data by two bits is always calculated except in this reset operation, codes of odd-bit data are controlled by an inserted bit in the first 25 bits, and codes of bit data which have not been controlled in the preceding 25 bits are controlled in the succeeding 25 bits. 
     Next, a description will be provided of the configuration of the determination circuit 8 shown in FIG. 3 with reference to FIG. 5. In FIG. 5, two outputs of the precoder 5 shown in FIG. 3, i.e., a modulated data string obtained from a data string in which binary information &#34;0&#34; is inserted (D0-in) and a modulated data string obtained from a data string in which binary information &#34;1&#34; is inserted (D1-in) are input to input terminal 151 and 154, respectively. Reference numeral 155 represents an f1-SIN unit for extracting a sine (SIN) component having a frequency f1, reference numeral 156 represents an f1-COS unit for extracting a cosine (COS) component having the frequency f1, reference numeral 157 represents an f2-SIN unit for extracting a sine (SIN) component having a frequency f2, reference numeral 158 represents an f2-COS unit for extracting a cosine (COS) component having the frequency f2, and reference numeral 159 represents a DC unit for extracting a DC component. 
     Reference numeral 152 represents an f1-reference generator for generating a reference signal having the frequency f1, which generates a sine wave and a cosine wave having the frequency f1 Reference numeral 153 represents an f2-reference generator for generating a reference signal having the frequency f2, which generates a sine wave and a cosine wave having the frequency f2. The generated signals are input to reference-signal input terminals (Ref-in) of the corresponding units. The modulated data string (D0-in) and the modulated data string (D1-in) are input to input terminals D-in 0 and D-in 1 of the units 155, 156, 157, 158 and 159, respectively. 
     FIG. 6 illustrates the configuration of each of the units 155 and 157, and FIG. 7 illustrates the configuration of each of the units 156 and 158. The DC unit 159 has such a configuration that in the configuration shown in FIG. 7, &#34;1&#34; is always input to a reference-signal input terminal (Ref-in) 225. The two modulated data strings (D0-in and D1-in) are input to input terminals 201 (D-in 0) and 211 (D-in 1), and are further input to multipliers 202 and 212, respectively. A reference signal from the reference-signal input terminal (Ref-in) is input to the other terminals of the multipliers 202 and 212, and a sine component or a cosine component of each frequency is obtained from the multipliers 202 or 212. 
     A description will now be provided of an operation for outputting a modulating signal having characteristics as shown in FIG. 8(a). The characteristics shown in FIG. 8(a) are such that a carrier (a pilot signal) is generated at the frequency f1, the spectrum attenuates in the environment thereof, a dip is generated in the spectrum in the vicinity of the frequency f2, and the spectrum is suppressed in the vicinity of the DC component. 
     In the multipliers 202 and 212, the respective modulated data strings (D0-in and D1-in) are multiplied by a sine component having the frequency f1, respectively. In each of the multipliers, a reference signal is multiplied by &#34;1&#34; when each data of a modulated data string is &#34;1&#34;, and is multiplied by &#34;-1&#34; when each data of a modulated data string is &#34;0&#34;. 
     The sums of data each comprising 25 bits (the same number of bits as the reference signal) from the multipliers 202 and 212 are calculated by and output from CDS (code word digital sum) circuits 203 and 213, respectively. These sums are accumulated by a pair of DSV (digital sum value) circuits comprising an adder 204 and a delay circuit 225, and an adder 214 and a delay circuit 226. An accumulated value corresponding to an actually output modulated signal is selected by a switch 220 as an accumulated value of the past. This pair of DSV circuits are reset by resetting data within the delay circuits 225 and 226 at the time to start accumulation, for example, at the time to start recording on each track. 
     Accumulated values input to the adders 204 and 214 are accumulated values of modulated signals which have been selected in the past. The adders 204 and 214 output values obtained by adding the sums which have been newly calculated by the CDS circuits 203 and 204 to these values, respectively. The accumulated values output from the adders 204 and 214 are input to absolute-value circuits 205 and 215, and are directly input to one terminals of data selectors 206 and 216, respectively, in a state of having a plus or minus sign. The outputs of the absolute-value circuits 205 and 215 are input to the other terminals of the data selectors 206 and 216, respectively. 
     One of the mode signals (each indicating one of the characters shown in FIGS. 8(a), 8(b) and 8(c) with which a modulated signal is formed) is supplied to a mode input terminal 221 from a mode assigning circuit 162 shown in FIG. 5. The mode assigning circuit 162 supplies mode signals &#34;1&#34; and &#34;0&#34; to the units 155 and 157, respectively, when forming a modulated signal having the spectrum shown in FIG. 8(a), and supplies mode signals &#34;0&#34; and &#34;1&#34; to the units 155 and 157, respectively, when forming a modulated signal having the spectrum shown in FIG. 8(b). When forming a modulated signal having the spectrum shown in FIG. 8(c), a mode signal &#34;0&#34; is supplied to the units 155 and 157. 
     Since it is intended, in this case, to obtain a modulated signal having the spectrum shown in FIG. 8(a), a mode signal &#34;1&#34; is input to a mode terminal (mode-in) of the unit 155. In FIG. 6, when &#34;1&#34; is input to the mode input terminal (mode-in) 221, the data selector 206 and 216 output accumulated values having plus or minus signs, and these values are output from output terminals 207 (D-out 0) and 217 (D-out 1), respectively. 
     On the other hand, since a mode signal &#34;0&#34; is input to the mode input terminal 221 of the unit 157, in the unit 157, outputs from the absolute-value circuits 205 and 215 are output from output terminals 207 (D-out 0) and 217 (D-out 1) via the data selector 206 and 216, respectively. The absolute values of accumulated values of outputs from the adders 204 and 214 of the units 156, 158 and 159 are unconditionally obtained by the absolute-value circuits 205 and 215, and the obtained values are output from the output terminals 207 and 217, respectively. 
     Outputs from output terminals (D-out 0) of the respective units 155, 156, 157, 158 and 159 are supplied to an adder 160, and outputs from output terminals (D-out 1) of the respective units 155, 156, 157, 158 and 159 are supplied to an adder 161. The outputs of these adders 160 and 161 are compared by a comparator 163, which makes the selection signal SEL &#34;0&#34; when the output of the adder 160 is smaller than the output of the adder 161, and makes the selection signal SEL &#34;1&#34; when the output of the adder 161 is smaller than the output of the adder 160. As described above, the selection signal SEL controls the switch 6 shown in FIG. 3, so that a modulated data string obtained from a data string in which binary information &#34;0&#34; is inserted (as output from the precoder 5) is output when the selection signal SEL is &#34;0&#34;, and a data string in which binary information &#34;1&#34; is inserted is output when the selection signal SEL is &#34;1&#34;. 
     The selection signal SEL is subjected to feedback to the units 155, 156, 157, 158 and 159, and the accumulated values of the past for calculating the next accumulated values are set to the values of modulated data strings which have actually been output. That is, the selection signal SEL is input to a terminal 222 shown in FIGS. 6 and 7 to control the data selector 220, so that the output of the delay circuit 225 is input to the adders 204 and 214 when the selection signal SEL is &#34;0&#34;, and the output of the delay circuit 226 is input to the adders 204 and 214 when the selection signal SEL is &#34;1&#34;. 
     As will be described later, the selection signal SEL is also subjected to feedback to the precoder 5, and is used for making the value of past data when performing NRZI modulation of the subsequent input data string to coincide with modulated data which has acutally been output. 
     Next, the operation of the determination circuit 8 according to the above-described modes will be briefly described. That is, when a mode signal &#34;0&#34; is supplied from the mode assigning circuit 162 to the units 155 and 157, the absolute values of sine components and cosine components having the frequencies f1 and f2, and the DC component are added by the adders 160 and 161, and the entire circuitry operates so as to suppress these signal components by selecting a modulated code string at the side having a smaller addition output by the comparator 163. Accordingly, in this case, a modulated data string having the spectrum characteristics shown in FIG. 8(c) is obtained. 
     When a mode signal &#34;1&#34; is supplied from the mode assigning circuit 162 to the unit 155, the value, having a sign, of a sine component having the frequency f1 and the absolute values of all other components are added by the adders 160 and 161, and a modulated code string having a smaller addition output is selected by the comparator 163. In this case, a reference signal input to the multipliers 202 and 212 becomes a sine component having the frequency f1, which is directly supplied to the adders 160 and 161. Hence, the entire circuitry operates such that the f1 component has the spectrum corresponding to the sine wave, and other components are suppressed. Accordingly, in this case, a modulated data string having the spectrum characteristics shown in FIG. 8(a) is obtained. 
     When a mode signal &#34;1&#34; is supplied from the mode assigning signal 162 to the unit 157, the entire circuitry operates such that the f2 component has the spectrum corresponding to the sine wave, and other components are suppressed. Accordingly, in this case, a modulated data string having the spectrum characteristics shown in FIG. 8(b) is obtained. 
     Accordingly, in the case of a digital recording apparatus, pilot signals can be superposed as shown in FIG. 1 by supplying a mode signal &#34;0&#34; from the mode assigning circuit 162 to the units 155 and 157 when forming a track F 0  shown in FIG. 1, supplying from the mode assigning circuit 162 a mode signal &#34;1&#34; to the unit 155 and a mode signal &#34;0&#34; to the unit 157 when forming a track F 1 , and supplying from the mode assigning circuit 162 a mode signal &#34;0&#34; to the unit 155 and a mode signal &#34;1&#34; to the unit 157 when forming a track F 2 . 
     Although in the above-described embodiment, data from the adders 204 and 214 passing through the absolute circuits 205 and 215, and data from the adders 204 and 214 not passing through the absolute circuits 205 and 215, respectively, are selectively output, the same effects may be also obtained by selectively outputting only data from one of the adders 204 and 214 passing through the corresponding absolute circuit and data from the one of the adders 204 and 214 not passing through the corresponding absolute circuit. 
     According to the configuration of the above-described embodiment, by merely providing one or a plurality of switching means, a desired frequency component may be either suppressed or emphasized, and recording of a digital signal in which a plurality of pilot signals are selectively multiplexed or not multiplexed can be realized without providing particular circuitry for generating pilot signals. 
     As described above, according to the present invention, it is possible to provide a digital modulating device capable of superposing a signal component having a desired frequency on a digitally-modulated signal with a relatively simple circuit configuration. It is also possible to provide a digital recording apparatus capable of recording a digital signal on a recording medium in a state of being superposed on a desired frequency component with a simple circuit configuration. 
     The individual components shown in outline or designated by blocks in the drawings are all well known in the digital modulating device and digital signal recording apparatus arts and their specific construction and operation are not critical to the operation or the best mode for carrying out the invention. 
     While the present invention has been described with respect to what is presently considered to be the preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiment. To the contrary, the present invention is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.