Abstract:
The invention relates to an optical power monitoring device for a photodiode assembly, which converts the DC component of a photodiode&#39;s bias current into a common mode voltage indicative of the average optical power of the incident light. The photodiode assembly, which is mountable in a conventional four-lead TO can package, includes a photodiode, a pre-amplifier, and a common mode voltage controller. The common mode voltage is added to the differential voltage, and the combined signal is output via the two data signal leads of the TO can package.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
   The present invention claims priority from U.S. patent application Ser. No. 60/376,899 filed Apr. 30, 2002. 

   TECHNICAL FIELD 
   The present invention relates to an optical power monitor for use with a photodiode, and in particular to the conversion of the DC component of the photodiode bias current into a common mode voltage signal for transmitting the average optical power of incoming light via the differential outputs. 
   BACKGROUND OF THE INVENTION 
   Standard photodiodes are packaged along with a pre-amplifier in a transistor-outline (TO) can package. A TO can package is a hermetically sealed unit with a lens in one end for directing incoming light onto the photodiode, which converts the light into an electrical current. The conventional TO can package implementation of an optical receiver includes four leads, two of which provide transmission of power (Power and Ground) and two of which provide transmission of differential data (Out+ and Out−). Newly developed electro-optic devices, e.g. transceivers, offer diagnostic capabilities, such as optical power monitoring, which includes measuring the power level of the input optical signal. Monitoring the power level of incoming light provides an indication of the quality of the transmitting laser, as well as the incoming transmission line. Conventional optical power monitors are relatively complicated and costly. Moreover, the aforementioned basic requirements consume all of the four leads from the conventional TO can, leaving none for transmitting the optical power level or any other operating parameter. One option is to add additional leads; however, this option increases costs and makes assembly more difficult, particularly for small form factor (SFF) devices. Another option is to utilize the AC component of the photodiode current, such as disclosed in U.S. Pat. No. 6,528,777 issued Mar. 4, 2003 to Ames et al. Unfortunately, this system does not incorporate any feedback in the control system and can therefore develop large errors due to drift over the environmental corners. 
   An object of the present invention is to overcome the shortcomings of the prior art by providing a relatively simple and inexpensive optical power monitor for a photodiode in a conventional four-lead TO can package. 
   Another object of the present invention is to provide a means by which the photodiode bias current level is monitored using a common mode signal that can be transmitted using the existing four leads provided by a conventional TO can package. 
   SUMMARY OF THE INVENTION 
   Accordingly, the present invention relates to a photodiode assembly mountable in a transistor outline can package, of the type including four leads extending therefrom, comprising: 
   a photodiode for converting incident light into a photodiode current comprising an alternating (AC) component indicative of an amplitude of the optical power of the incident light, and a direct current (DC) component indicative of an average optical power of the incident light; 
   a pre-amplifier for converting the AC component into a differential signal defined by a difference between a first alternating output signal and a second alternating output signal, complementary to the first alternating output signal; and 
   a common-mode controller for controlling a common mode signal between the first and second alternating output signals based on the DC component;
         wherein the common mode signal and the differential output signal are combined for transmission via two of the four leads, whereby the common mode signal can be extracted from the differential output signal to provide an indication of the optical power of the incident light.       

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The invention will be described in greater detail with reference to the accompanying drawings which represent preferred embodiments thereof, wherein: 
       FIG. 1  is a schematic representation of the photodiode assembly according to the present invention; 
       FIG. 2  is a more detailed circuit diagram of the photodiode assembly of  FIG. 1 ; 
       FIG. 3  is a graphical representation of the AC response of the transimpedance amplifier of the photodiode assembly of  FIG. 1 ; and 
       FIG. 4  is a graphical representation of the transfer function of the photodiode of the photodiode assembly of FIG.  1 . 
   

   DETAILED DESCRIPTION 
   With reference to  FIGS. 1 and 2 , the circuitry accompanying a photodiode  1  in a TO can package  2  includes a pre-amplifier  3  and a common mode signal controller  4 . The illustrated photodiode  1  is a reverse biased photodiode, which responds to an incident optical signal by generating an initial current with both an AC and a DC component. The pre-amplifier  3  is a high speed trans-impedance amplifier comprised of first, second and third stages  6 ,  7  and  8 , respectively, which translates the AC component of the initial current into a differential output signal, e.g. V diff =V out+ −V out− . The differential signal amplitude is thereby proportional to the incident optical signal amplitude. The common mode signal controller  4  is a current to voltage converter using a low frequency signal path for developing a common mode output signal, e.g. V cm =(V out+ +V out− )/2, proportional to the photodiode bias current, i.e. the average optical power of the incident optical signal. Preferably, the differential signal is a differential voltage signal, and the common mode signal is a common mode voltage signal, although a person skilled in the art could conceive of other forms of signals, e.g. current. 
   The anode of the photodiode  1  sources the current to the In connection  9  of the transimpedance amplifier  3 , which eliminates the DC component by any one of a number of known methods, and which provides a differential voltage signal defined by a difference between a first alternating output voltage signal and a second alternating output voltage signal, complementary to the first alternating output voltage signal. The output of the second stage  7  of the trans-impedance amplifier  3  ideally is a differential waveform in which the average values of each single ended waveform are equal. To accomplish this, a Ref signal is introduced at  11 , which is equal to the average of the output of the first stage  6 . Alternatively, the DC component can be eliminated before the first stage  6  via an inductor (not shown) electrically connected from the In connection  9  to ground, or with some other equivalent active circuit, and by making Ref equivalent to ground. Other techniques for canceling the DC offset component are well known to those skilled in the art. Even if some DC offset exists, the common mode voltage is not affected, since it is controlled by an independent circuit. The third stage  8  converts first and second alternating current signals to the first and second alternating voltage signals using first and second load resistors  10   a  and  10   b . The AC response of the trans-impedance amplifier  3  is illustrated in FIG.  3 . The average V diff  output is equal to 0 when the DC component has been completely eliminated. R t , the trans-impedance gain, is equal to ΔV diff /ΔI pd . 
   The cathode of the photodiode  1  sinks the current (I bias ) from the Filter connection  12  to the common mode voltage controller  4 . In this case the high speed AC data component is filtered off by a low-pass filter comprised of a filter capacitor  13  (C filt ) and a filter resistor  14  (R filt ), leaving only the average current (I AVG ) to determine the voltage at the Filter connection  12 . The voltage at the Filter connection  12  can be calculated by subtracting the voltage drop through the filter resistor  14  (R filt ) from the supply voltage (V cc ) provided via first and second leads  16  and  17 , i.e. V filt =V cc −I AVG  R filt . Accordingly, with reference to  FIG. 4 , the voltage V filt  is related to the average optical power by the photodiode responsivity, R pd . Subsequently, the voltage V filt  is level shifted by a voltage offset  18 , and input to a negative terminal of an OPAMP  19 . The voltage offset  18  is large enough to enable the output drivers bias current to develop output voltage swing large enough to signal the data. The output of the OPAMP  19  is a control voltage fed to the gate of a PFET  21 . The OPAMP  19  thereby controls the PFET  21 , which acts like a variable resistor, by shunting a pull up resistor  22  (R pu ), and causing the voltage on the drain of the PFET  21  to vary. The variation of the voltage on the drain of PFET  21  causes the common mode voltage of the outputs (Out+ and Out−)  23  and  24  to vary. 
   If the Ref level into the second stage  7  is equal to the average of the output of the first stage  6 , then the V diff  would be positive for a digital “1” and negative for a digital “0”. This alternating output is summed with the common mode signal at output nodes  25   a  and  25   b . After exiting the TO can  2 , the common mode signal is extracted by external circuitry, which can then determine the average optical power of the incoming optical signal. 
   A feedback loop  26  is provided to compensate for inconsistencies in the PFET  21  caused by manufacturing tolerances, which alter the characteristic voltages, e.g. threshold voltage, and by voltage and temperature variations. The common mode voltage (V cm ) is sensed by a center tap  27  of two sense resistors  28   a  and  28   b  (R sense ), which feedback a feedback voltage to the positive terminal of the OPAMP  19 . An additional gain resistor  29  (R gain ) can be provided to adjust the closed loop gain of the circuit, thereby maximizing the resolution of the common mode voltage signal. The output of the OPAMP  19 , i.e. the control voltage, converges to whatever voltage is required on the gate of the PFET  21  so that the loop reaches a balanced state, which occurs when the positive and negative input terminals to the OPAMP  19  are equal. 
   Accordingly, it is possible to determine the level of I bias  by recovering the common mode voltage V cm  of the outputs  23  and  24  utilizing the following equation:
 
 V   cm   =V   cc −( I   bias   R   filt   +V   os )( R   sense /2 +R   gain )/ R   gain 
 
   Assuming K and L are constants depending on the values of V os , R sense , R filt , and R gain  we can rewrite the equation as:
 
 I   bias   ×K+L=V   cc   −V   cm