Abstract:
An automatic gain control system with hysteresis switching includes an error calculator for calculating the difference between a first estimation signal and a take over point (TOP) value to produce an error signal. A hysteresis comparator compares the first estimation signal and the TOP value to produce a control signal. A first gain control loop generates a first gain control signal based on the control signal to control a gain of a first variable gain amplifier. A second gain control loop generates a second gain control signal based on the control signal to control a gain of a second variable gain amplifier. As the first estimation signal leaves a hysteresis region of the hysteresis comparator, the first gain control signal is monotonically decreasing and the first gain control signal is monotonically increasing. As a result, the total gain is stable.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to the technical field of automatic gain control (AGC) and, more particularly, to a double-loop automatic gain controlling system based on hysteresis switching with a stably changing total gain. 
         [0003]    2. Description of Related Art 
         [0004]      FIG. 1  is a block diagram of automatic gain control in the prior art. An antenna  102  receives wireless communication signals. A coordinator  100  has a band-pass filter  104  for selecting a broadband spectrum including signals. A low noise amplifier  106  magnifies the broadband spectrum signals selected by the band-pass filter  104  according to a fixed magnification. A variable gain amplifier  108  magnifies the output signals of the low noise amplifier  106  according to a control signal V RF . A down converter  110  changes the frequency of the output signals of the variable gain amplifier  108  from the radio frequency to the intermediate frequency. A band-pass filter  112  executes narrowband filtering to filter and thus generate a narrowband signal. A variable gain amplifier  114  magnifies the output signals of the band-pass filter  112  according to a control signal V IF . An A/D converter  116  changes the output signals of the variable gain amplifier  114  to digital type. An automatic gain control device  120  outputs signals according to the A/D converter  116  and a power monitoring device  122  to generate the control signal V RF  of the variable gain amplifier  108  and the control signal V IF  of the variable gain amplifier  114 . 
         [0005]    For example, in the prior art, the output voltage V Z  of the variable gain amplifier  114  is 110 dB μV approximately, and its corresponding voltage is 400-500 mV approximately, which corresponds to the range of input voltage of the A/D converter  116 . If the input voltage Vx of the coordinator  100  is 60 dB μV approximately, which is the strength of the RF signal, and the band-pass filter  112  has a gain loss of −20 dB, it could be calculated that the sum of the gain of the coordinator  100  and the variable gain amplifier  114  is 110−(60−20)=70 dB μV, wherein the gain of the coordinator  114  includes the gain of the low noise amplifier  106  and the gain of the variable gain amplifier  108 . However, since many reasons, such as the channel noise and the channel variability, may cause the input voltage Vx of the coordinator  100  to drift around 60 dB μV, the automatic gain control device  120  should adjust the control signals V RF  and V IF . 
         [0006]      FIG. 2  is a schematic diagram of operation of gain adjustment of automatic gain control in the prior art, which is divided into area I and area II according to the level of input voltage, namely, the input voltage Vx of the coordinator  100 . In the area I, the control signal V RF  is used to fix the gain of the variable gain amplifier  108  to a predetermined maximum gain  G RFmax, and the control signal V IF  is used to adjust the gain of the variable gain amplifier  114 . In the area II, the control signal V IF  is used to fix the gain of the variable gain amplifier  114  to a predetermined minimum gain  GI Fmin, and the control signal V RF  is used to adjust the gain of the variable gain amplifier  108 . The predetermined maximum gain  G RFmax of the variable gain amplifier  108  is not the real maximum gain RFgain_max, and for performance and linear magnification, generally the predetermined maximum gain  G RFmax is designed as slightly less than the maximum gain RFgain_max. For the same reason, the predetermined minimum gain  GI Fmin of the variable gain amplifier  114  is not the minimum gain IFgain_min, and generally the predetermined minimum gain  GI Fmin is designed larger than the minimum gain IFgain_min slightly. 
         [0007]    As shown in  FIG. 2 , when the level of the input voltage Vx of the coordinator  100  is 60 dB μV, the variable gain amplifier  108  and the low noise amplifier  106  provide gain of 40 dB for  G RFmax, and the variable gain amplifier  114  provides gain of 30 dB for  GI Fmin. When the level of the input voltage Vx of the coordinator  100  is 70 dB μV, the variable gain amplifier  114  provides fixed gain of 30 dB for  GI Fmin, and the variable gain amplifier  108  adjusts its gain according to the control voltage V RF  outputted by the automatic gain control device  120 , and the voltage V Z  is 110 dB μV approximately, which is neither too large to exceed the range of input voltage of the A/D converter  116  nor too small to prevent the A/D converter  116  from proceeding conversion. 
         [0008]    When the level of the input voltage Vx of the coordinator  100  is 50 dB μV, the variable gain amplifier  114  provides fixed gain of 40 dB for  G RFmax, the variable gain amplifier  114  adjusts its gain according to the control voltage V IF  outputted by the automatic gain control device  120 , and the voltage V Z  is 110 dB μV approximately. 
         [0009]    However, when the level of the voltage Vx is approximately 60 dB μV, the whole automatic gain control system frequently switches between the area I and the area II. In the case, it not only easily generates low frequency noise due to switching, resulting in negatively affecting the gain adjustment of the automatic gain control system, but also easily makes the system instability. 
         [0010]    Therefore, it is desirable to provide an improved automatic gain control system to mitigate and/or obviate the aforementioned problems. 
       SUMMARY OF THE INVENTION 
       [0011]    The object of the present invention is to provide an automatic gain control system with hysteresis switching, which uses a hysteresis comparator to solve the problems of system instability and increasing noises generated by frequently switching, and also solve the problems of the errors caused by abruptly changed gain generated by using the hysteresis comparator. 
         [0012]    To achieve the object, an automatic gain control system is provided, which includes an automatic gain control path and a control device. The automatic gain control path comprises a first variable gain amplifier (VGA) and a second variable gain amplifier. The first variable gain amplifier has a predetermined maximum gain control voltage, which corresponds to a predetermined maximum gain of the first variable gain amplifier. The second variable gain amplifier has a predetermined minimum gain control voltage, which corresponds to a predetermined minimum gain of the second variable gain amplifier. The control device is used to control the gain of the first variable gain amplifier and the second variable gain amplifier. The control device includes an error calculator, a hysteresis comparator, a first automatic gain control loop, and a second automatic gain control loop. The error calculator calculates the output signal and a target value of the automatic gain control path, so as to generate an error signal. The hysteresis comparator compares a first estimation signal and the take over point (TOP) value to generate a control signal. The first automatic gain control loop is connected to the error calculator, the hysteresis comparator and the first variable gain amplifier for generating a first gain control signal according to the error signal and the control signal, to control gain of the first variable gain amplifier. The second automatic gain control loop is also connected to the error calculator, the hysteresis comparator and the second variable gain amplifier, generates a second gain control signal according to the error signal and the control signal, so as to control gain of the second variable gain amplifier. When the first estimation signal leaves the hysteresis area of the hysteresis comparator, the first gain control signal and the second gain control signal are increasing or decreasing progressively. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0013]      FIG. 1  is a block diagram of automatic gain control in the prior art; 
           [0014]      FIG. 2  is a schematic diagram of operation of gain adjustment of automatic gain control in the prior art; 
           [0015]      FIG. 3  is a block diagram of an automatic gain control system according to the present invention; 
           [0016]      FIG. 4  is a block diagram of the RF automatic gain control loop according to the present invention; 
           [0017]      FIG. 5  is a block diagram of the IF automatic gain control loop according to the present invention; 
           [0018]      FIG. 6  and  FIG. 7  are schematic diagrams of operation of automatic gain control loop with hysteresis according to the present invention; 
           [0019]      FIG. 8  is a block diagram of an automatic gain control system according to another embodiment of the invention; 
           [0020]      FIG. 9  is a block diagram of the first automatic gain control loop according to the present invention; 
           [0021]      FIG. 10  is a block diagram of the second automatic gain control loop according to the present invention; 
           [0022]      FIG. 11  and  FIG. 12  are schematic diagrams of operation of the automatic gain control loop with hysteresis according to another embodiment of the invention; 
           [0023]      FIG. 13  is a schematic diagram of operation of the first automatic gain control loop according to the present invention; 
           [0024]      FIG. 14  is a schematic diagram of operation of the second automatic gain control loop according to the present invention; 
           [0025]      FIG. 15  is a block diagram of the first automatic gain control loop according to a further embodiment of the invention; 
           [0026]      FIG. 16  is a block diagram of the second automatic gain control loop according to a further embodiment of the invention; 
           [0027]      FIG. 17  is a schematic diagram of operation of the first automatic gain control loop according to a further embodiment of the invention; 
           [0028]      FIG. 18  is a schematic diagram of operation of the second automatic gain control loop according to a further embodiment of the invention; 
           [0029]      FIG. 19  is a block diagram of the first automatic gain control loop according to another embodiment of the invention; and 
           [0030]      FIG. 20  is a block diagram of the second automatic gain control loop according to another embodiment of the invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0031]    For the problem that the whole automatic gain control system frequently switches between the area I and the area II when the level of the voltage Vx is around 60 dB μV, the present invention provides an automatic gain control system using a hysteresis comparator to solve the problem of system instability and increasing noises generated by frequently switching.  FIG. 3  and  FIG. 8  are block diagrams of two kinds of automatic gain control systems according to the present invention. The automatic gain control system shown in  FIG. 3  comprises an automatic gain control path  130  and a control device  300 . The automatic gain control path  130  includes a first variable gain amplifier  108  and a second automatic gain amplifier  114 . The first variable gain amplifier  108  has a predetermined maximum gain control voltage VRFmax, which corresponds to a predetermined maximum gain GRFmax of the first variable gain amplifier. The second variable gain amplifier  114  has a predetermined minimum gain control voltage VIFmin, which corresponds to a predetermined minimum gain GIFmin of the second variable gain amplifier. The control device  300  is used to control the gain of the first variable gain amplifier  108  and the second variable gain amplifier  114 , and the control device includes an error calculator  320 , a hysteresis comparator  330 , two multiplexers  340 ,  350 , an RF automatic gain control loop  360 , an IF automatic gain control loop  370 , and an RF strength estimation device  310 . 
         [0032]    The RF strength estimation device  310  is connected to the automatic gain control path  130  for estimating and generating a first estimation signal Xest according the output signal Vz of the automatic gain control path  130 . Since the control device  300  has the control voltages V 1 , V 2  of the first variable gain amplifier  108  and the second variable gain amplifier  114 . Before designing, it is also known that the band-pass filter has a gain loss of −20 dB. The RF strength estimation device  310  estimates the input voltage Vx of the automatic gain control path  130  to generate a first estimation signal Xest according to the output voltage Vz of the second variable gain amplifier  114 . 
         [0033]    The error calculator  320  is connected to the automatic gain control path  130  to calculate the output signal Vz of the automatic gain control path  130  and a target value, so as to generate a error signal Err. Generally, the target value is set as 110 dB μV. 
         [0034]    The hysteresis comparator  330  compares the first estimation signal Xest and a take over point (TOP) value, so as to generate a control signal Vctrl. In the embodiment, the TOP value is 60 dB μV. 
         [0035]    The multiplexers  340 ,  350  are connected to the error calculator  320  and the hysteresis comparator  330 . When the control signal Vctrl is high potential, the multiplexer  340  chooses the error signal Err to output, and the multiplexer  350  chooses 0 to output. When the control signal Vctrl is low potential, the multiplexer  340  chooses 0 to output, and the multiplexer  350  chooses the error signal Err to output. 
         [0036]    The RF automatic gain control loop  360  is connected the hysteresis comparator  330 , the multiplexer  340  and the first variable gain amplifier  108  for generating a first gain control signal V 1  to control the gain of the first variable gain amplifier  108  according to the control signal Vctrl. 
         [0037]      FIG. 4  is a block diagram of the RF automatic gain control loop of  FIG. 3 . The RF automatic gain control loop  360  includes a multiplier  410 , an adder  420 , a register  430  and a multiplexer  440 . 
         [0038]    The IF automatic gain control loop  370  is connected to the hysteresis comparator  330 , the multiplexer  350  and the second variable gain amplifier  114  for generating a second gain control signal V 2  to control the gain of the second variable gain amplifier  114  according to the control signal Vctrl. 
         [0039]      FIG. 5  is a block diagram of the IF automatic gain control loop of  FIG. 3 . The IF automatic gain control loop  370  includes a multiplier  510 , an adder  520 , a register  530  and a multiplexer  540 . 
         [0040]    When the control signal Vctrl is high potential, the second gain control signal V 2  of the IF automatic gain control loop  370  is set, and the gain of the IF variable gain amplifier  114  is the predetermined minimum gain GIFmin. Meanwhile, the second gain control signal V 2  is the predetermined minimum gain control voltage VIFmin, and the first gain control voltage V 1  of the RF automatic gain control loop  360  is: 
         [0000]        V 1( n+ 1)= V 1( n )+ K 1×Err( n ),
 
         [0000]    where V 1  is the first gain control signal, K 1  is the multiplicator of the multiplier  410 , and Err is the error signal. Further, n is an abbreviation of nT and n+1 is an abbreviation of (n+1)T, which represent a present time point and the next time point, respectively. Such abbreviation is an usual representation way in the control system or signal processing and thus is not described in details. 
         [0041]    When the control signal Vctrl is low potential, the first gain control signal V 1  of the RF automatic gain control loop  360  is set to make the gain of the RF variable gain amplifier  108  as the predetermined maximum gain GRFmax. Meanwhile, the first gain control signal V 1  is the predetermined maximum gain control voltage VRFmax, and the second gain control signal V 2  of the IF variable gain amplifier  114  is: 
         [0000]        V 2( n+ 1)= V 2( n )+ K 2×Err( n ),
 
         [0000]    where V 2  is the second gain control signal, K 2  is the multiplicator of the multiplier  210 , and Err is the error signal. 
         [0042]      FIG. 6  and  FIG. 7  are schematic diagrams of operation of automatic gain control loop with hysteresis of  FIG. 3 .  FIG. 6  is the automatic gain control when the voltage Vx decreases gradually from larger than 60 dB μV to smaller than 60 dB μV. 
         [0043]    As shown in  FIG. 6 , when the voltage Vx is larger than 60 dB μV, and the corresponding first estimation signal Xset is also larger than 60 dB μV, the control signal Vctrl is high potential, the second gain control voltage V 2  of the IF automatic gain control loop  370  is set to make the gain of the second variable gain amplifier  114  be the predetermined minimum gain GIFmin, and the first gain control signal V 1  of the RF automatic gain control loop  360  is V 1 ( n+ 1)=V 1 ( n )+K 1 ×Err(n). Namely, the gain of the RF automatic gain control loop  360  moves along the line  610 , and the gain of the IF variable gain amplifier  114  moves along the line  620 . 
         [0044]    When the first estimation Xest is smaller than 60 dB μV and over a hysteresis range ε, the control signal Vctrl is low potential, the first gain control voltage V 1  of the RF automatic gain control loop  360  is set to make the gain of the RF variable gain amplifier  108  be the predetermined maximum gain GRFmax, and the second gain control signal V 2  of the IF variable gain amplifier  114  is V 2 ( n+ 1)=V 2 ( n )+K 2 ×Err(n). Namely, the gain of the RF automatic gain control loop  360  moves along the line  630 , and the gain of the IF variable gain amplifier  114  moves along the line  640 . 
         [0045]      FIG. 7  is the automatic gain control when the voltage Vx increases gradually from smaller than 60 dB μV to larger than 60 dB μV. The operation of  FIG. 7  is similar to that of  FIG. 6 , and thus a detailed description is deemed unnecessary. 
         [0046]    The predetermined maximum gain GRFmax of the variable gain amplifier  108  is not its real maximum gain RFgain_max. For the performance and linear magnification, generally the predetermined maximum gain  G RFmax is set as slightly less than the maximum gain RFgain_max. For the same reason, the predetermined minimum gain  GI Fmin of the variable gain amplifier  114  is not its real minimum gain IFgain_min, and generally the predetermined minimum gain  GI Fmin is set as slightly larger than the minimum gain IFgain_min. 
         [0047]    By using the hysteresis comparator  330 , the present invention can avoid the problem of easily producing noises due to the frequently switching between the area I and the area II of the automatic gain control system in the prior art. 
         [0048]    Please refer to  FIG. 6 , when the control signal Vctrl becomes low potential from high potential, as shown in the circle A of  FIG. 6 , the RF automatic gain control loop  360  suddenly decreases to the predetermined maximum gain GRFmax. As shown in the circle B of  FIG. 6 , the total gain of the RF automatic gain control loop  360  and the IF automatic gain control loop  370  also generates a downward convex wave, which affects the operation of a backend stage, such as the A/D converter  118 , resulting in generation of errors. For the same reason, in the circle C of  FIG. 7 , the IF automatic gain control loop  370  suddenly increases to the predetermined minimum gain GIFmin. As shown in the circle D of  FIG. 7 , the total gain of the RF automatic gain control loop  360  and the IF automatic gain control loop  370  also generates a upward convex wave. 
         [0049]    For the aforementioned problems, the present invention provides an automatic gain control system.  FIG. 8  is a block diagram of an automatic gain control system according to another embodiment of the invention, which comprises an automatic gain control path  130  and a control device  800 . 
         [0050]    The automatic gain control path  130  includes a first variable gain amplifier  108  and a second variable gain amplifier  114 . The first variable gain amplifier  108  has a predetermined maximum gain control voltage VRFmax, which corresponds to a predetermined maximum gain GRFmax of the first variable gain amplifier  108 . The second variable gain amplifier  114  has a predetermined minimum gain control voltage VIFmin, which corresponds to a predetermined minimum gain GIFmin of the second variable gain amplifier  114 . 
         [0051]    The control device  800  is used to control the first variable gain amplifier  108  and the second variable gain amplifier  114 . The control device  800  includes an RF strength estimation device  810 , an error calculator  820 , a hysteresis comparator  830 , a first automatic gain control loop  840 , and a second automatic gain control loop  850 . 
         [0052]    The RF strength estimation device  810  is connected to the automatic gain control path  130  for estimating and generating a first estimation signal Xest according the output signal Vz of the automatic gain control path  130 . Since the control device  800  has the control voltages V 1 , V 2  of the first variable gain amplifier  108  and the second variable gain amplifier  114 . Before designing, it is also known that the band-pass filter  112  has a gain loss of −20 dB. The RF strength estimation device  810  estimates the input voltage Vx of the automatic gain control path  130  to generate a first estimation signal Xest according to the output voltage Vz of the second variable gain amplifier  114 . 
         [0053]    The error calculator  820  is connected to the automatic gain control path  130  to calculate the output signal Vz of the automatic gain control path  130  and a target value, so as to generate an error signal Err. Generally, the target value is set as 110 dB μV. 
         [0054]    The first automatic gain control loop  840  is connected to the hysteresis comparator  830 , the error calculator  820  and the first variable gain amplifier  108  for generating a first gain control signal V 1  according to the control signal Vctrl to control the gain of the first variable gain amplifier  108 . 
         [0055]    The second automatic gain control loop  850  is connected to the hysteresis comparator  830 , the error calculator  820 , and the second variable gain amplifier  114  for generating a second gain control signal V 2  according to the control signal Vctrl so as to control the gain of the second variable gain amplifier  114 . 
         [0056]    When the first estimation signal Xest is located in the hysteresis area of the hysteresis comparator  830 , the first gain control signal V 1  and the second gain control signal V 2  are increasing or decreasing progressively to alleviate the problem of convex waves in the above embodiment. 
         [0057]      FIG. 9  is a block diagram of the first automatic gain control loop  840  according to the present invention. The first automatic gain control loop  840  includes a first multiplier  910 , a first multiplexer  920 , a second multiplexer  930 , a first adder  940 , a first register  950  and a first comparator  960 . 
         [0058]      FIG. 10  is a block diagram of the second automatic gain control loop  850  according to the present invention. The second automatic gain control loop  850  includes a second multiplier  1010 , a third multiplexer  1020 , a fourth multiplexer  1030 , a second adder  1040 , a second register  1050  and a second comparator  1060 . 
         [0059]      FIG. 11  and  FIG. 12  are schematic diagrams of operation of the automatic gain control loop with hysteresis according to another embodiment of the invention. From  FIG. 9  and  FIG. 10 , it is known that, when the system is located in the area II, the control voltage Vctrl is high potential, and the first gain control signal V 1  corresponds to the following equation: 
         [0000]        V 1( n+ 1)= V 1( n )×Err( n )× K 1,
 
         [0000]    where V 1  is the first gain control signal, Err is the error signal, and K 1  is the multiplicator of the first multiplier  910 . 
         [0060]    When the control signal Vctrl is high potential and the second gain control signal V 2  is smaller than the predetermined minimum gain control voltage VIFmin, the second gain control signal V 2  corresponds to the following equation: 
         [0000]        V 2( n+ 1)= V 2( n )+ s 2, 
         [0000]    where V 2  is the second gain control signal, and s 2  is the second adjustment step. When the control signal Vctrl is high potential and the second gain control signal V 2  is not smaller than the predetermined minimum gain control voltage VIFmin, the second gain control signal V 2  corresponds to the following equation: 
         [0000]        V 2( n+ 1)= VIF min, 
         [0000]    where VIFmin is the predetermined minimum gain control voltage. Namely, as shown in  FIG. 14 , the second gain control signal V 2  gradually increases to the predetermined minimum gain control voltage VIFmin according to the equation V 2 ( n+ 1)=V 2 ( n )+s 2 . When the second gain control signal V 2  is slightly larger than the predetermined minimum gain control voltage VIFmin, the second gain control signal V 2  is equal to the predetermined minimum gain control voltage VIFmin according to the equation V 2 ( n+ 1)=VIFmin. 
         [0061]    From the above description and  FIG. 11 , it is known that the gain of first automatic gain control loop  840  moves along the line  1110 , and the gain of the second variable gain amplifier  850  moves along the line  1120 . 
         [0062]    When the first estimation Xest is smaller than 60 dB μV and over a hysteresis range ε, the control signal Vctrl is low potential, and since the first gain control voltage V 1  corresponds to the equation V 1 ( n+ 1)=V 1 ( n )+Err(n)×K 2 , the first gain control signal V 1  is larger than the predetermined maximum gain control voltage VRFmax. 
         [0063]    When the control signal Vctrl is low potential and the first gain control signal V 1  is larger than the predetermined maximum gain control voltage VRFmax, the first gain control signal corresponds to the following equation: 
         [0000]        V 1( n+ 1)= V 1( n )+(− s 1),
 
         [0000]    where V 1  is the first gain control signal, and s 1  is a first adjustment step. 
         [0064]    When the control signal Vctrl is low potential and the first gain control signal V 1  is not larger than the predetermined maximum gain control voltage VRFmax, the first gain control signal V 1  corresponds to the following equation: 
         [0000]        V 1( n+ 1)= VRF max, 
         [0000]    where VRFmax is the predetermined maximum gain control voltage. 
         [0065]    Namely, as shown in  FIG. 13 , the first gain control signal V 1  gradually decreases to the predetermined maximum gain control voltage VRFmax according to the equation V 1 ( n+ 1)=V 1 ( n )+(−s 1 ). 
         [0066]    When the first gain control signal V 1  is slightly smaller than the predetermined maximum gain control voltage VRFmax, the first gain control signal V 1  is equal to the predetermined maximum gain control voltage VRFmax according to the equation V 1 ( n+ 1)=VRFmax. 
         [0067]    From the above description and  FIG. 11 , it is known that the gain of the first automatic gain control loop  840  moves along the line  1130 , and the gain of the second variable gain amplifier  850  moves along the line  1140 . 
         [0068]    When the control signal Vctrl is low potential, the second gain control signal V 2  corresponds to the following equation: 
         [0000]        V 2( n+ 1)= V 2( n )+Err× K 2,
 
         [0000]    where V 2  is the second gain control signal, Err is the error signal, and K 2  is the multiplicator of the second multiplier. 
         [0069]    As shown in the circle A of  FIG. 11 , the first automatic gain control loop  840  does not suddenly decrease to the predetermined maximum gain GRFmax, but as shown in  FIG. 12 , the first gain control signal V 1  gradually decreases to the predetermined maximum gain control voltage VRFmax. Meanwhile, the total gain of the first automatic gain control loop  840  and the second automatic gain control loop  850 , as shown by the circle B of  FIG. 11 , does not generate a downward convex wave. 
         [0070]    For the same reason, when the system is located in the area I and moves to the area II, as shown in the circle C of  FIG. 12 , the second automatic gain control loop  850  does not increase to the predetermined minimum gain control voltage VIFmin, and as shown in  FIG. 14 , the second gain control signal V 2  gradually increases to the predetermined gain control voltage VIFmin. Meanwhile, the total gain of the first automatic gain control loop  840  and the second automatic gain control loop  850 , as shown by the circle D of  FIG. 12 , does not generate an upward convex wave. 
         [0071]      FIG. 15  is a block diagram of the first automatic gain control loop  840  according a further embodiment of the invention. 
         [0072]    The first automatic gain control loop  840  includes a third multiplier  1510 , a fifth multiplexer  1520 , a first filter  1530 , a third adder  1540 , a first subtractor  1550 , and a third register  1560 . 
         [0073]      FIG. 16  is a block diagram of the second automatic gain control loop according to a further embodiment of the invention. The second automatic gain control loop  850  includes a fourth multiplier  1610 , a sixth multiplexer  1620 , a second filter  1630 , a fourth adder  1640 , a second subtractor  1650 , and a fourth register  1660 . 
         [0074]    The first filter  1530  and the second filter  1630  are preferably low-pass filters. 
         [0075]    When the control signal is high potential, the first gain control signal V 1  corresponds to the following equation: 
         [0000]        V 1( n+ 1)= V 1( n )+Err× K 3,
 
         [0000]    where V 1  is the first gain control signal, Err is the error signal, and K 3  is the multiplicator of the third multiplier. The second gain control signal corresponds to the following equation: 
         [0000]        V 2( n+ 1)= V 2( n )+Filter2( VIF min− V 2( n )),
 
         [0000]    where V 2  is the second gain control signal, VIFmin is the predetermined minimum gain control voltage, Filter 2 (VIFmin−V 2 ( n )) is the output signal (VIFmin−V 2 ( n )) of the second filter after executing filtering to the second subtractor. Namely, in the circle C of  FIG. 12 , since the second gain control signal V 2  is smaller than the predetermined minimum gain control voltage VIFmin, the value of Filter 2 ((VIFmin−V 2 ( n )) is positive, and the second gain control signal V 2  gradually increases to the predetermined minimum gain control voltage VIFmin. 
         [0076]    When the control signal Vctrl is low potential, the first gain control signal V 1  corresponds to the following equation: 
         [0000]        V 1( n+ 1)= V 1( n )+Filter1( VIF max− V 1( n )),
 
         [0000]    where V 1  is the first gain control signal, VRFmax is the predetermined maximum gain control voltage, Filter 1 (VRFmax−V 1 ( n )) is the output signal (VRFmax−V 1 ( n )) of the first filter after executing filtering to the first subtractor. Namely, in the circle A of  FIG. 11 , since the first gain control signal V 1  is larger than the predetermined maximum gain control voltage VRFmax, the value of Filter 1 (VIFmax−V 1 ( n )) is negative, and the first gain control signal V 1  gradually decreases to the predetermined gain control voltage VRFmax. The second gain control signal V 2  corresponds to the following equation: 
         [0000]        V 2( n+ 1)= V 2( n )+Err× K 4,
 
         [0000]    where V 2  is the second gain control signal, Err is the error signal, and K 4  is the multiplicator of the fourth multiplier. 
         [0077]    As shown in  FIG. 17 , with the use of the first filter  1530 , the first gain control signal V 1  gradually decreases to the predetermined maximum gain control voltage VRFmax according the equation V 1 ( n+ 1)=V 1 ( n )+Filter 1 (VIFmax−V 1 ( n )). Meanwhile, as shown in  FIG. 18 , with the use of the second filter  1630 , the second gain control signal V 2  gradually decreases to the predetermined minimum gain control voltage VIFmin according to the equation V 2 ( n+ 1)=V 2 ( n )+Filter 2 (VIFmin−V 2 ( n )). 
         [0078]      FIG. 19  is a block diagram of the first automatic gain control loop according to another embodiment of the invention. The first automatic gain control loop  840  includes a fifth multiplier  1910 , a seventh multiplexer  1920 , a first table look-up device  1930 , a fifth adder  1940 , a third subtractor  1950 , and a fifth register  1960 . The first table look-up device  1930  has a first enable input  1931 , when the first enable input  1931  is low potential, the first table look-up device  1930  is enabled. When the first table look-up device  1930  is enabled, it sequentially outputs a set of values, which are monotonically increasing. When the first table look-up device  1930  is not enabled, it outputs a value of 0. The set of values are all smaller than 0, such as −100Δ, −50Δ, −25Δ, and so on, where Δ is larger than 0. By the way, the first gain control signal V 1  is monotonically decreasing. 
         [0079]      FIG. 20  is a block diagram of the second automatic gain control loop  850  according to another embodiment of the invention. The second automatic gain control loop  850  includes a sixth multiplier  2010 , an eighth multiplexer  2020 , a second table look-up device  2030 , a sixth adder  2040 , a fourth subtractor  2050  and a sixth register  2060 . The second table look-up device  2030  has a second enable input  2031 . When the second enable input  2031  is high potential, the second table look-up device  2030  is enabled. When the second table look-up device  2030  is enable, it sequentially outputs a set of values, which are monotonically increasing, and the set of values are all larger than 0. When the second table look-up device  2030  is not enabled, it outputs a value of 0. The set of values are all smaller than 0, such as 100Δ, 50Δ, 25Δ, and so on, where Δ is larger than 0. By the way, the second gain control signal V 2  is monotonically increasing. 
         [0080]    When the control signal Vctrl is high potential, the first gain control signal V 1  corresponds to the following equation: 
         [0000]        V 1( n+ 1)= V 1( n )+Err× K 5,
 
         [0000]    where V 1  is the first gain control signal, Err is the error signal, and K 5  is the multiplicator of the fifth multiplier. The second gain control signal V 2 ( n+ 1) corresponds to the following equation: 
         [0000]        V 2( n+ 1)= V 2( n )+Look_up( VIF min− V 2( n )),
 
         [0000]    where V 2  is the second gain control signal, VIFmin is the predetermined minimum gain control voltage, and Look_up(VIFmin−V 2 ( n )) is the output signal generated by the second table look-up device  2030  according to the second enable input. Look_up(VIFmin−V 2 ( n )) can be 100Δ, 50Δ, 25Δ, and so on, where Δ is larger than 0. Namely, in the circle C of  FIG. 12 , since the second gain control signal V 2  is smaller than the predetermined minimum gain control voltage VIFmin, the second table look-up device  2030  is enabled and sequentially outputs a set of values Look_up(VIFmin−V 2 ( n )), which are monotonically increasing. Since the value of Look_up(VIFmin−V 2 ( n )) is positive, the second gain control signal V 2  gradually increases to the predetermined minimum gain control voltage VIFmin. 
         [0081]    When the control signal Vctrl is low potential, the first gain control signal V 1  corresponds to the following equation: 
         [0000]        V 1( n+ 1)= V 1( n )+Look_up( VRF max− V 1( n )),
 
         [0000]    where V 1  is the first gain control signal, VRFmax is the predetermined maximum gain control voltage, Look_up(VRFmax−V1(n)) is the output signal generated by the first table look-up device  1930  according to the first enable input, Look_up(VRFmax−V 1 ( n )) can be 100Δ, −50Δ, −25Δ, and so on. Namely, in the circle A of  FIG. 11 , since the first gain control signal V 1  is larger than the predetermined maximum gain control voltage VRFmax, the first table look-up device  1930  is enabled and sequentially outputs a set of values Look_up(VRFmax−V 1 ( n )), which are monotonically increasing. Since the value of Look_up(VRFmax−V 1 ( n )) is negative, the first gain control signal V 1  gradually decreases to the predetermined maximum gain control voltage VRFmax. 
         [0082]    When the control signal Vctrl is low potential, the second gain control signal V 2  corresponds to the following equation: 
         [0000]        V 2( n+ 1)= V 2( n )+Err× K 6,
 
         [0000]    where V 2  is the second gain control signal, Err is the error signal, and K 6  is the multiplicator of the sixth multiplier. 
         [0083]    From the above description, it is known that the prior art does not consider the problems of system instability and increasing noises, which are generated by the automatic gain control system frequently switching between the area I and the area II. The present invention uses the hysteresis comparator to solve the problems of system instability and increasing noises generated by frequently switching. Meanwhile, the present invention not only solves the problem generated by frequently switching, but also considers the problem of suddenly changing of gain generated by practically using the hysteresis comparator to solve the problem of error generated by the abrupt change of gain. Accordingly, the present invention provides better stability and automatic control performance to the system than in the prior art. 
         [0084]    Although the present invention has been explained in relation to its preferred embodiment, it is to be understood that many other possible modifications and variations can be made without departing from the scope of the invention as hereinafter claimed.