Abstract:
A universal indicator light circuit for indicating that a storage medium is detected by a computer includes a first electronic switch, a second electronic switch, a connecting unit, a terminal unit with three terminals and a light emitting unit. If the storage medium transmits a high level signal on detection, the second terminal of the terminal unit should be connected to the third terminal of the terminal unit through the connecting unit. If the storage medium transmits a low level signal on detection, the second terminal of the terminal unit should be connected to the first terminal of the terminal unit through the connecting unit. Thereby, the light emitting unit has a clear and unambiguous function no matter what type of storage medium is detected by the computer.

Description:
BACKGROUND 
       [0001]    1. Technical Field 
         [0002]    The present disclosure relates to an indicator light circuit, and particularly to an indicator light circuit for indicating that a storage medium is detected by a computer. 
         [0003]    2. Description of Related Art 
         [0004]    A hard disk drive (HDD) indicator light, such as a light emitting diode (LED), may be installed in a computer for indicating whether a HDD is detected by the computer or not. The HDD indicator light will be turned on when the HDD indicator light receives a low level control signal from the HDD. The HDD indicator light is controlled by the transmitted signal of the HDD. However, the transmitted signals of the HDDs from different manufacturers may not be identical. For example, some HDDs transmit a low level signal to turn on the HDD indicator light when they are detected by the computer. In contrast, some HDDs transmit a high level signal to turn off the HDD indicator light when they are detected by the computer. Thus, users may confuse the ON state of the HDD indicator light with the OFF state of the HDD indicator light since they do not know which HDD state is being detected by the computer. 
         [0005]    Therefore, there is need for improvement in the art. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0006]    Many aspects of the present disclosure can be better understood with reference to the following drawing(s). The components in the drawing(s) are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawing(s), like reference numerals designate corresponding parts throughout the several views. 
           [0007]    The FIGURE is a circuit diagram of an embodiment of an indicator light circuit of the present disclosure. 
       
    
    
     DETAILED DESCRIPTION 
       [0008]    As shown in the FIGURE, an indicator light circuit  100  in an embodiment includes four resistive elements, first and second electronic switches, a terminal unit  80  with three terminals, a storage medium  90 , a connecting unit  70  and a light emitting unit D. In this embodiment, the four resistive elements are first to fourth resistors R 1 -R 4 , the first and the second electronic switches are respectively a transistor Q 1  and a field-effect transistor (FET) Q 2 , the three terminals are first to third terminals  1 - 3 , the storage medium  90  is a hard disk drive (HDD), the connecting unit  70  is a jumper connector and the light emitting unit D is a light emitting diode (LED). The storage medium  90  further includes a signal pin RLED. When the storage medium  90  is detected by a computer (i.e. the storage medium  90  is detected by an input/output system when the computer is powered on), the signal pin RLED transmits a first level signal or a second level signal according to the manufacturing specifications of the storage medium  90 . In this embodiment, the first level signal is a first high level signal and the second level signal is a first low level signal. In addition, the signal pin RLED transmits a pulsating signal when the storage medium  90  is being read/written to. The transistor Q 1  further includes a first terminal corresponding to a base, a second terminal corresponding to a collector, and a third terminal corresponding to an emitter. The FET Q 2  further includes a first terminal corresponding to a gate, a second terminal corresponding to a drain, and a third terminal corresponding to a source. The light emitting unit D further includes a first terminal corresponding to an anode and a second terminal corresponding to a cathode. 
         [0009]    In the embodiment, the high level signal is a signal with a high level potential, and the low level signal is a signal with a low level potential, wherein a voltage between the high level potential and a ground potential is larger than each of threshold voltages of the transistor Q 1  and the FET Q 2 , and a voltage between the low level potential and the ground potential is smaller than each of threshold voltages of the transistor Q 1  and the FET Q 2 . 
         [0010]    The signal pin RLED is connected to a power unit P 5 V through the first resistor R 1  and connected to the base of the transistor Q 1  through the second resistor R 2 . The collector of the transistor Q 1  is connected to the power unit P 5 V through the third resistor R 3  and connected to the second terminal  2  of the terminal unit  80 . The emitter of the transistor Q 1  is grounded. The gate of the FET Q 2  is connected to the first terminal  1  of the terminal unit  80 , the source of the FET Q 2  is grounded, and the drain of the FET Q 2  is connected to the third terminal  3  of the terminal unit  80  and the cathode of the light emitting unit D. The anode of the light emitting unit D is connected to the power unit P 5 V through the fourth resistor R 4 . The light emitting unit D gives an indication that the storage medium  90  is detected by the computer upon detection. 
         [0011]    The connecting unit  70  connects the second terminal  2  of the terminal unit  80  to the first terminal  1  or the third terminal  3  of the terminal unit  80  according to manufacturing specifications of the storage mediums  90 . If the signal pin RLED of the storage medium  90  is preset to transmit a first high level signal upon the storage medium  90  being detected by the computer, the connecting unit  70  should connect the second terminal  2  of the terminal unit  80  to the third terminal  3  of the terminal unit  80 . In addition, the position of the connecting unit  70  should be changed to connect the second terminal  2  of the terminal unit  80  to the first terminal  1  of the terminal unit  80  if the signal pin RLED of the storage medium  90  is preset to transmit a first low level signal upon the storage medium  90  being detected by the computer. 
         [0012]    An operating principle of the embodiment of the present disclosure is as follows. 
         [0013]    When the signal pin RLED transmits the first high level signal upon the storage medium  90  being detected by the computer, the first high level signal will be received by the base of the transistor Q 1 . Thus, the transistor Q 1  is turned on, so that the second terminal  2  of the terminal unit  80  receives the ground potential. Since the second terminal  2  of the terminal unit  80  is connected to the third terminal  3  of the terminal unit  80  through the connecting unit  70 , the cathode of the light emitting unit D also receives the ground potential. Accordingly, the light emitting unit D is turned on to indicate that a storage medium  90  is detected by the computer. Furthermore, the signal pin RLED transmits a pulsating signal when the storage medium  90  is being read/written to by the computer. When the base of the transistor Q 1  receives a second high level signal from the pulsating signal, this process is similar to the process of receiving a first high level signal so that the light emitting unit D is turned on. When the base of the transistor Q 1  receives a second low level signal from the pulsating signal, the transistor Q 1  is turned off so that the third terminal  3  receives a high level potential, i.e. an output potential of the power unit P 5 V, through the second terminal  2 , and the light emitting unit D is turned off. Therefore, the light emitting unit D can be turned on and off alternately to flash according to the pulsating signal of the signal pin RLED. 
         [0014]    If the signal pin RLED transmits the first low level signal when the storage medium  90  is detected by the computer, the position of the connecting unit  70  should be changed to connect the second terminal  2  of the terminal unit  80  to the first terminal  1  of the terminal unit  80 . The first low level signal will be received by the base of the transistor Q 1 . Thus, the transistor Q 1  is turned off, so that the second terminal  2  receives the high level potential of the power unit P 5 V. In this embodiment, the high level potential is the output potential of the power unit P 5 V. Since the second terminal  2  is connected to the first terminal  1  through the connecting unit  70 , the gate of the FET Q 2  receives the high level potential of the power unit P 5 V so that the FET Q 2  is turned on, and the cathode of the light emitting unit D receives the ground potential. Accordingly, the light emitting unit D is turned on to indicate that a storage medium  90  is detected by the computer. Furthermore, the signal pin RLED transmits the pulsating signal when the storage medium  90  is being read/written to by the computer. When the base of the transistor Q 1  receives the second low level signal from the pulsating signal, this process is similar to the process of receiving the first low level signal so that the light emitting unit D is turned off. When the base of the transistor Q 1  receives the second high level signal from the pulsating signal, the transistor Q 1  is turned on so that the gate of the FET Q 2  receives the ground potential through the first and the second terminals  1  and  2  and the transistor Q 1 . Since the gate of the FET Q 2  receives the ground potential, which can be regarded as a low level potential, the FET Q 2  is turned off. Thus, the cathode of the light emitting unit D is connected with the third terminal  3  which is dead and the light emitting unit D is turned off. Therefore, the light emitting unit D can be turned on and off alternately to flash according to the pulsating signal of the signal pin RLED. 
         [0015]    The transistor Q 1  and the FET Q 2  are used as electronic switches in this embodiment. The transistor Q 1  and FET can be replaced by other kinds of transistors or electronic elements with a switching function, such as an electronic switching chip, in other embodiments. 
         [0016]    In other embodiments, the connecting unit  70  can be other connecting devices, such as a jumper wire, and the light emitting unit D can be other light sources, such as a lamp. The first to fourth resistors R 1 -R 4  protect the indicator light circuit. In an embodiment, the first to fourth resistors R 1 -R 4  is not needed if the voltage of the power unit P 5 V is smaller than the respective breakdown voltages of the transistor Q 1 , the FET Q 2  and the light emitting unit D. 
         [0017]    The circuit of the above indicator light circuit  100  is simple and low cost. Users can directly connect the signal pin RLED of any storage medium  90 , notwithstanding different manufacturing specifications, to the indicator light circuit  100 . In addition, users can optionally connect the second terminal  2  to the first terminal  1  or to the third terminal  3 , according to the signal of the storage medium  90  transmitted when the storage medium  90  is detected by the computer, by orienting the connecting unit  70  for the indication given by the light emitting unit D. Accordingly, the light emitting unit D clearly indicates whether a storage medium  90  is detected by the computer or not and a user can directly understand the indication given by the light emitting unit D without any confusion. 
         [0018]    While the disclosure has been described by way of example and in terms of various embodiments, it is to be understood that the disclosure is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the range of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.