Abstract:
A method for forming a nanowhisker of, e.g., a III-V semiconductor material on a silicon substrate, comprises: preparing a surface of the silicon substrate with measures including passivating the substrate surface by HF etching, so that the substrate surface is essentially atomically flat. Catalytic particles on the substrate surface are deposited from an aerosol; the substrate is annealed; and gases for a MOVPE process are introduced into the atmosphere surrounding the substrate, so that nanowhiskers are grown by the VLS mechanism. In the grown nanowhisker, the crystal directions of the substrate are transferred to the epitaxial crystal planes at the base of the nanowhisker and adjacent the substrate surface. A segment of an optically active material may be formed within the nanowhisker and bounded by heterojunctions so as to create a quantum well wherein the height of the quantum well is much greater than the thermal energy at room temperature, whereby the luminescence properties of the segment remain constant without quenching from cryogenic temperatures up to room temperature.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
     This application claims the benefit of the priority of U.S. Provisional Patent Application No. 60/582,513, filed Jun. 25, 2004, the entirety of which is incorporated herein by reference. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     This invention relates generally to structures produced by techniques of nanotechnology, and methods of producing such structures. 
     More specifically, the invention relates to such structures and devices incorporating at least one element, essentially in one-dimensional form, which is of nanometer dimensions in its width or diameter, which is produced with the aid of a catalytic particle, and which is commonly termed a “nanowhisker.” 
     The invention relates also to a method of forming a nanowhisker of a certain material on a substrate of a dissimilar material. 
     2. Brief Description of the Prior Art 
     Nanotechnology covers various fields, including that of nanoengineering, which may be regarded as the practice of engineering on the nanoscale. This may result in structures ranging in size from small devices of atomic dimensions, to much larger scale structures—for example, on the microscopic scale. Typically, nanostructures are devices having at least two dimensions less than about 1 μm (i.e., nanometer dimensions). Ordinarily, layered structures or stock materials having one or more layers with a thickness less than 1 μm are not considered to be nanostructures. Thus, the term nanostructures includes free-standing or isolated structures that have two dimensions less than about 1 μm, that have functions and utilities different from those of larger structures, and that are typically manufactured by methods different from conventional procedures for preparing somewhat larger, i.e., microscale, structures. Although the exact boundaries of the class of nanostructures are not defined by a particular numerical size limit, the term has come to signify such a class that is readily recognized by those skilled in the art. In many cases, an upper limit of the size of the at least two dimensions that characterize nanostructures is about 500 nm. In some technical contexts, the term “nanostructure” is construed to cover structures having at least two dimensions of about 100 nm or less. In a given context, the skilled practitioner will recognize the range of sizes intended. In this application, the term “nanostructure” is broadly intended to refer to an elongated structure having at least two transverse dimensions less than about 1 μm, as indicated above. In more preferred applications, such dimensions will be less than about 100 nm, more preferably less than about 50 nm, and even more preferably less than about 20 nm. 
     Nanostructures include one-dimensional nanoelements, essentially in one-dimensional form, that are of nanometer dimensions in their width or diameter, and that are commonly known as nanowhiskers, nanorods, nanowires, nanotubes, etc. 
     The basic process of whisker formation on substrates by the so-called VLS (vapor-liquid-solid) mechanism is well known. A particle of a catalytic material, usually gold, is placed on a substrate and heated in the presence of certain gases to form a melt. A pillar forms under the melt, and the melt rises up on top of the pillar. The result is a whisker of a desired material with the solidified particle melt positioned on top. See Wagner,  Whisker Technology , Wiley, N.Y., 1970, and E. I Givargizov,  Current Topics in Materials Science , Vol. 1, pages 79-145, North Holland Publishing Company, 1978. In early applications of this technique, the dimensions of such whiskers were in the micrometer range, but the technique has since also been applied for the formation of nanowhiskers. For example, International Patent Application Publication No. WO 01/84238 (the entirety of which is incorporated herein by reference) discloses in FIGS. 15 and 16 a method of forming nanowhiskers, wherein nanometer sized particles from an aerosol are deposited on a substrate and these particles are used as seeds to create filaments or nanowhiskers. 
     Although the growth of nanowhiskers catalyzed by the presence of a catalytic particle at the tip of the growing whisker has conventionally been referred to as the VLS (Vapor-Liquid-Solid process), it has come to be recognized that the catalytic particle may not have to be in the liquid state to function as an effective catalyst for whisker growth. At least some evidence suggests that material for forming the whisker can reach the particle-whisker interface and contribute to the growing whisker even if the catalytic particle is at a temperature below its melting point and presumably in the solid state. Under such conditions, the growth material, e.g., atoms that are added to the tip of the whisker as it grows, may be able to diffuse through a the body of a solid catalytic particle or may even diffuse along the surface of the solid catalytic particle to the growing tip of the whisker at the growing temperature. Persson et al., “Solid-phase diffusion mechanism for GaAs nanowires growth,”  Nature Materials , Vol. 3, October 2004, pages 687-681, shows that, for semiconductor compound nanowhiskers there may occur solid-phase diffusion mechanism of a single component (Ga) of a compound (GaAs) through a catalytic particle. Evidently, the overall effect is the same, i.e., elongation of the whisker catalyzed by the catalytic particle, whatever the exact mechanism may be under particular circumstances of temperature, catalytic particle composition, intended composition of the whisker, or other conditions relevant to whisker growth. For purposes of this application, the term “VLS process,” or “VLS mechanism,” or equivalent terminology, is intended to include all such catalyzed procedures wherein nanowhisker growth is catalyzed by a particle, liquid or solid, in contact with the growing tip of the nanowhisker. 
     For the purposes of this specification the term “nanowhisker” is intended to mean a one-dimensional nanoelement with a width or diameter (or, generally, a cross-dimension) of nanometer size, the element preferably having been formed by the so-called VLS mechanism, as defined above. Nanowhiskers are also referred to in the art as “nanowires” or, in context, simply as “whiskers” or “wires.” 
     Several experimental studies on the growth of nanowhiskers have been made, the most important reported by Hiruma et al. They grew III-V nanowhiskers on III-V substrates in a metal organic chemical vapor deposition (MOCVD) growth system. See Hiruma et al.,  J. Appl. Phys.  74, page 3162 (1993); Hiruma et al.,  J. Appl. Phys.  77, page 447 (1995); Hiruma et al.,  IEICE Trans. Electron . E77C, page 1420 (1994); Hiruma et al.,  J. Crystal Growth,  163, pages 226-231 (1996). 
     More recently, growth of Si nanowires on Si substrates has been demonstrated. See, e.g., Westwater et al.,  J. Vac. Sci. Technol ., B 1997, 15, page 554. Very recently, growth of Ge nanowires on Si substrates was also demonstrated. See Kamins et al.,  Nano Lett.  2004, 4, pages 503-506, Web published Jan. 23, 2004. 
     In the prior art in general, many different approaches have been tried in order to realize perfect epitaxial growth of III-V materials on silicon substrates. The primary motivation for these strong efforts is that, if such a technology could be developed, a very wide spectrum of so called III-V heterostructure devices may be incorporated with main-stream silicon technology, thus opening the way to highly advanced high-speed and opto-electronic devices incorporated with silicon. 
     Besides the efforts toward integrating III-V materials on Si, other approaches toward the specific goal of efficient light-emission using Si have been proposed—for example, the formation of porous Si via electrochemical etching (Canham, L. T.,  Appl. Phys. Lett.,  1990, 57, page 1046) and the incorporation of luminescent defects, such as rare-earth impurities (Michel et al,  Semiconduct. Semimet.,  1998, 49, page 111. 
     Epitaxial growth of III-V semiconductors on Si presents a number of difficulties, such as lattice mismatch, differences in crystal structure (III-V&#39;s have a polar zinc blende or wurtzite structure whereas Si has a covalent diamond structure), and a large difference in thermal expansion coefficient. Much work has been done on planar growth of layers of III-V materials on Si substrates using different approaches such as buffer layers, growth on patterned Si surfaces, and selected area growth from small openings. See, for example, Kawanami, H.,  Sol. Energy Mater. Sol. Cells , 2001, 66, page 479. 
     A major challenge has been to avoid the formation of antiphase domains related to the initiation of III-V growth on two atomic planes of silicon differing by one atomic layer, which leads to the formation of anti-phase domain walls and defective material. In Ohlsson et al., “Anti-domain-free GaP, grown in atomically flat (001) Si sub-μm-sized openings”,  Appl. Phys. Lett ., Vol 80, No. 24, 17 Jun. 2002, pages 4546-4548, to address the problem of antiphase domains, GaP nanocrystals were grown on a Si(001) substrate surface through openings in a mask of SiO 2 . The mask openings were defined by e-beam lithography. Etching and chemical stripping followed, and organic residues were removed by oxygen plasma. A high annealing temperature of 1000° C. was used to remove Si oxide and to provide atomic flatness on the silicon surface on which GaP is nucleated. An atomically flat surface is a surface that presents a single crystal facet and does not exhibit atomic steps. 
     I prior U.S. patent application Ser. No. 10/613,071, published as No. 2004-0075464, to Samuelson et al., and International Patent Application Publication No. WO-A-04/004927 (both of which publications are incorporated herein by reference), there are disclosed methods of forming nanowhiskers by a chemical beam epitaxy method. Nanowhiskers are disclosed having segments of different materials, with abrupt or sharp heterojunctions therebetween. Structures are disclosed comprising nanowhiskers of, for example, gallium arsenide extending from a silicon substrate. Processes are disclosed for forming epitaxial layers of III-V materials on a silicon substrate, involving initial formation of nanowhiskers on the substrate and using the nanowhiskers as nucleation centers for an epitaxial layer. 
     Improvements are desirable in the formation of nanowhiskers of III-V materials (or having at least a base portion of III-V material) on a substrate of Group IV material to ensure that the nanowhiskers are grown in a highly reliable way with accurate predetermined dimensions and structure, and with accurately predetermined physical characteristics for implementing the above structures and processes. More generally, improvements are desirable in the formation of nanowhiskers having at least a base portion of a predetermined material on a substrate of a dissimilar material. 
     SUMMARY OF THE INVENTION 
     One object of the invention is to provide a method for forming, on a substrate of a Group IV material, a nanowhisker having at least a base portion of a III-V semiconductor material. 
     A more general object of the invention is to provide a method for forming a nanowhisker, having at least a base portion of a predetermined material, on a substrate of a dissimilar material. 
     A further object of the invention is to provide a nanostructure comprising a nanowhisker upstanding form a substrate of a Group IV material and having at least a base portion of a III-V semiconductor material. 
     A further object of the invention is to provide a nanostructure including a nanowhisker formed on a substrate of a Group IV material, the nanowhisker having at least a base portion of a III-V semiconductor material and one or more segments of a further material bounded with abrupt or sharp heterojunctions. 
     In accordance with a first aspect, the invention provides a method for forming a nanowhisker, having at least a base portion of a first material, on a substrate of a second material, different from said first material, comprising: 
     providing a substrate of said second material having a surface that is prepared to remove impurities and to provide at least one atomically flat growth region; 
     providing on said growth region at least one catalytic particle; 
     introducing into the atmosphere surrounding the substrate, gases for forming the nanowhisker, and heating the substrate to a predetermined growth temperature at which the nanowhisker is grown on said growth region via a said catalytic particle. 
     In accordance with a more specific aspect, the invention provides a method for forming a nanowhisker, having at least a base portion of a III-V first semiconductor material on a substrate of a Group IV second material, comprising: 
     providing a substrate of said second material having a surface that is prepared to remove impurities and to provide at least one atomically flat growth region; 
     providing on said growth region at least one catalytic particle; and 
     introducing into the atmosphere surrounding the substrate, gases for forming the nanowhisker, and heating the substrate to a predetermined growth temperature at which the nanowhisker is grown via a said catalytic particle. 
     It has been found that an issue in achieving growth of III-V nanowhiskers (i.e., nanowhiskers of which at least the initial growth or base portion is of a III-V material) on a silicon substrate, or other Group IV material, is to provide essentially a perfect surface from which catalytic growth is initiated. In order to provide for the formation of an ideal group III-V (or Group II-VI) semiconductoron the substrate, the interface between the metallic nanoparticle and the substrate has to be of a character that only a single-domain of the crystalline nanowhsker material is formed. This may ideally be obtained by keeping the interface atomically flat over the diameter of the nanowire, or more generally by nucleation conditions that lead to a single nucleus from which the nanowhisker nucleates and grows. Thus, it is desirable to have a totally clean surface that is free from impurity and oxide and that is preferably also atomically flat at the whisker growth site (or at least sufficient that the nanowhisker nucleates and grows from a single nucleus). In this way, growth of the nanowhisker material in bulk form that might occur at imperfections on the substrate surface is inhibited, and factors that promote nanowhisker growth are encouraged, such as migration of nanowhisker material along the surface of the substrate to the catalytic growth particle. 
     In practice of the invention, it is desirable to employ one or more cleaning operations to remove organic residue that is commonly found on a substrate surface. It is also desirable to employ steps such as etching to remove existing oxide formations on the substrate surface. In order to prevent further oxide growth on the substrate surface, subsequent to these removal steps, it is desirable to passivate the surface, at least temporarily, such as by HF etching. 
     It would in principle be possible to provide a surface with a layer of passivating material such as silicon nitride or silicon dioxide, and to form apertures in the passivating layer (for example, by etching) and to treat the exposed substrate surface in the apertures to achieve the ideal conditions as described above. Catalytic particles would then be formed within respective apertures by a suitable deposition process. 
     In a currently preferred embodiment, however, the entire substrate surface is processed towards an ideal condition, followed by deposition on the surface of catalytic particles by an aerosol process. To this end, it is preferred to passivate the surface by means of etching with an acid such as HF. This has the effect that free or dangling bonds on the substrate surface are terminated with hydrogen ions. This prevents further oxide growth on the substrate surface, and maintains ideal surface conditions while aerosol deposition takes place. Aerosol deposition, and any further processing on the substrate surface takes place in accordance with the invention before any significant degradation of the passivation properties of the hydrogen termination. In practice, a time period of about 2 hours may be permissible. 
     As regards the catalytic particles, any metal that is commonly used for nanowhisker growth, such as Au, may be used with this invention. In particular applications where it is not desirable to use Au on silicon substrates, because of the tendency for Au to diffuse into the silicon and create deep level defects, other materials such as In or Ga may be used, where the nanowhisker to be formed contains such materials. 
     The catalytic particles are preferably provided on the substrate surface in the form of an aerosol deposition, as noted above. This has an advantage that very accurate control may be exerted over the size of the particles (see International Patent Application Publication No. WO 01/84238, the entirety of which is incorporated herein by reference). Alternatively, the catalytic particles may be formed by deposition from a liquid suspension (colloids from a solution), or may be defined by a NIL (nano imprint lithography) process. In yet another alternative method of forming catalytic particles, a thin film of catalytic material may be formed over substrate surface in a manner similar to that disclosed in the above-referenced publications to Hiruma et al. When the substrate is heated in an initial annealing step, the film liquifies and breaks up into catalytic particles, from which nanowhiskers may be grown. 
     It has been found that in order to achieve epitaxial nanowhisker growth, it is desirable to anneal the substrate surface prior to nanowhisker growth. Such annealing preferably occurs at a temperature between 600° C. and 650° C. for a silicon surface. Further, it has been found that gases containing elements for nanowhisker growth should not be present in the atmosphere surrounding the substrate during this annealing process. This is in contrast to prior procedures where it is common to expose the substrate during the annealing process to a gas containing Group V elements, such as arsenic or phosphorous. 
     VLS growth may occur by the chemical beam epitaxy method or MOCVD (MOVPE) method. In these methods, it is common to employ two sources of gas, one being a organometallic compound containing a metal, such as gallium or indium, that is required to form part of the nanowhisker material, and another gas containing a Group V or VI element, such as phosphine or arsine, that is desired to react with said metal to produce the compound of the nanowhisker. 
     In MOCVD techniques, it is common to introduce the gases together for growth. In addition, it is common to have the phosphine, arsine or similar hydride gas, introduced during the annealing step. However, in contrast to this, it has been found in accordance with the present invention that such gas should not be introduced during the annealing step. 
     With the above measures, it has been found that very accurately determined nanowhiskers having precise dimensions and physical characteristics can be formed on substrates of dissimilar material. In particular, materials of a III-V semiconductor material, such as indium phosphide, gallium arsenide, gallium phosphide etc., may be formed on Group IV material substrates such as silicon. Silicon substrates are especially preferred in practice of the invention, in that such substrates are inexpensive and commonly used in industry, as opposed to substrates of III-V materials that are much more expensive. Any surface of the silicon or other substrate material may, in principle, be used for whisker growth in practice of the invention, e.g. (001), (111). 
     It has been found that the crystalline perfection of nanowhiskers grown in accordance with the invention is such that, at the base of the nanowhisker at its junction with the substrate, crystal planes are epitaxially formed within the nanowhisker one upon the other, to form a transition of crystal material where the crystalline orientation of the substrate surface is preserved in the epitaxially grown layers of the whisker. That is to say, there is not an indistinct region of amorphous material and crystal segments at the base, between the substrate and the aligned crystal planes of the nanowhisker. Defects or dislocations may exist at the base, e.g. stacking faults, but these are not such as to disturb the essential crystallinity and the crystal directions of the substrate surface that are transferred to the epitaxial growth of the whisker. The problems of lattice mismatch are largely accommodated by radial expansion of the diameter of the base of the nanowhisker. 
     Accordingly, in yet another aspect, the invention provides a nanostructure comprising a nanowhisker upstanding from a substrate of silicon and having at least a base portion formed of a III-V material, wherein at a junction of the base portion with the substrate, crystal planes are epitaxially formed within the nanowhisker one upon the other, and crystallographic directions of the substrate surface are transferred to the epitaxially formed crystal planes of the nanowhisker. 
     It will be appreciated that with the present invention, structures and processes that have been previously proposed and demonstrated (for example, in the aforementioned U.S. patent application Ser. No. 10/613,071, published as No. 2004-0075464, and International Patent Application Publication No. WO-A-04/004927) may be more accurately and reliably implemented. In particular, the processes disclosed for forming epitaxial layers on silicon substrates may be implemented with a reduced risk of non-epitaxial growth. 
     The present invention is in principle applicable to any of the materials that may be used in the manufacture of nanowhiskers and substrates therefor. Such materials are commonly semiconductors formed of Group II through Group VI elements. Such elements include, without limitation, the following: 
     Group II: Be, Mg, Ca; Zn, Cd, Hg; 
     Group III: B, Al, Ga, In, Tl; 
     Group IV: C, Si, Ge, Sn, Pb; 
     Group V: N, P, As, Sb; 
     Group VI; O, S, Se, Te. 
     Semiconductor compounds are commonly formed of two elements to make III-V compounds or II-VI compounds. However, ternary or quaternary compounds are also commonly employed involving, e.g., two elements from Group II or from Group III. Stoichiometric and non-stoichiometric mixtures of elements are commonly employed. 
     III-V materials and II-VI materials include, without limitation, the following: 
     AlN, GaN, SiC, BP, InN, GaP, AlP, AlAs, GaAs, InP, PbS, PbSe, InAs, ZnSe, ZnTe, CdS, CdSe, AlSb, GaSb, SnTe, InSb, HgTe, CdTe, ZnTe, ZnO. 
     In accordance with the invention, a substrate may be selected from one of the above Group IV, III-V or II-VI materials, and the nanowhiskers (or at least the base portions thereof) may be selected from another of the Group IV, III-V or II-VI materials. Thus, the substrate may in principle be of Group IV, Group III-V or Group II-VI material, and the nanowhiskers may similarly be materials within these groups. Other substrates that are commonly used, such as aluminium oxide (sapphire) or silicon carbide, may also be employed in principle. In its most preferred practice, however, the invention is specifically concerned with substrates of silicon or other Group IV materials that are commonly available in the industry, and nanowhisker compounds of III-V material. 
     It will be understood that there may have been proposed and demonstrated other methods for producing nanowhiskers of III-V material on Group IV material, particularly those Group IV materials that are easier to work with than silicon. However, it is generally recognized that silicon is the most difficult of the Group IV materials to work with. The present invention achieves successful growth of III-V nanowhiskers on silicon, and may readily be applied to Group IV and other substrate materials generally, without the exercise of inventive ingenuity. 
     As one of its principal advantages, the invention demonstrates epitaxial nucleation and growth of III-V semiconductor nanowhiskers on silicon substrates. This addresses the long-time challenge of integrating high performance III-V semiconductors with mainstream silicon technology. 
     The present invention additionally permits the formation of light emitting or light detecting devices within nanowhiskers grown in accordance with the principles herein described. In prior U.S. patent application Ser. No. 10/613,071, published as No. 2004-0075464, to Samuelson et al., and International Patent Application Publication No. WO-A-04/004927, there are disclosed various light emitting and light detecting devices incorporated within a nanowhisker. For example, a p-n junction may be formed by doping two adjacent segments of the nanowhisker with oppositely charged dopant ions. This may be used as a light emitting diode, or as a photodetector. A heterojunction between two segments of different material within a nanowhisker may provide similar functions to a p-n junction. A segment of an optically active material forming heterojunctions with adjacent portions of the nanowhisker may form laser devices, resonant tunnelling diodes, heterobipolar transistors, and other electronic and photonic devices. Further there is disclosed a method of forming heterojunctions within a nanowhisker, which are accurately formed and may extend over a width of between one and eight atomic layers of the nanowhisker crystal. Such heterojunctions may be atomically abrupt, extending over as few as one or two atomic layers. As stated in the above referenced application U.S. patent application Ser. No. 10/613,071, “sharp heterojunction” means a transition from one material to another material over five or less atomic monolayers. However, for the purpose of the present specification, heterojunctions may extend over five or more than five atomic monolayers, but yet still provide a desired function of quantum confinement and defining a quantum well. Heterojunctions that define a quantum well may, in this specification, be referred to as “sharp.” 
     In a further aspect, the invention permits the incorporation of double heterostructure segments in such nanowhiskers, allowing efficient room-temperature generation of light from, e.g., III-V nanowires grown on Si substrates. Advanced heterostructure devices presently realized on very expensive, silicon-incompatible III-V substrates, such as resonant tunnelling diodes, superlattice device structures and heterostructure photonic devices for on-chip communication, are, in accordance with the invention, available as complementary device technologies for integration with silicon. 
     Thus, in another aspect, the invention is concerned with a nanowhisker having at least a base portion of a III-V semiconductor material, and the nanowhisker being formed on a substrate of a Group IV material and including a segment of a further material disposed along the length of the nanowhisker, wherein accurately formed heterojunctions are provided at the boundaries of the segment with adjacent portions of the nanowhisker. 
     It has been found that such heterojunctions may be very precisely and accurately formed with sharp or abrupt junctions extending over only a few atomic lattice planes. The material of the nanowhisker in general is single crystal, single domain, pure epitaxial growth without defect or dislocation. It has been found that the optical characteristics of such nanowhiskers are very high quality, with the luminescence properties remaining constant from very low cryogenic temperatures up to room temperatures, without quenching of the luminescence. This arises, in significant part, because the confining potential of the quantum well formed by the heterojunctions bounding the segment is well defined (at least 200 meV up to 500 meV) and much greater than the thermal energy at room temperature, kT (˜25 meV), so that the thermal movement of free charge carriers does not disturb the energy distributions of the carriers within the quantum well. 
     Thus, in a further aspect, the present invention provides a structure, including a nanowhisker formed on a substrate of a Group IV material, the nanowhisker having at least a base portion of a III-V semiconductor material and a segment of a further material disposed along the length of the nanowhisker, wherein accurately formed heterojunctions are provided at the boundaries of the segment with adjacent portions of the nanowhisker such as to create a quantum well bounding the segment, wherein the height of the quantum well is much greater than the thermal energy at room temperature so as to provide a device that is one of a photonics device and an electronics device. 
     Further, the luminescence properties of the segment remain essentially constant, with substantially no quenching, from cryogenic temperatures up to room temperature, thereby providing for highly reliable photonics devices. In accordance with the invention, the provision of nanowhiskers containing optically active material on a silicon substrate permits a very effective implementation of optical interconnects on a silicon chip. As processor speeds increase, a limiting factor in silicon chips is speed of transmission of optical pulses along buses formed as conductive lines on the substrate. A means of avoiding this limitation is to provide a data bus in the form of an optical interconnect comprising an optical path including a light emitter and a light receiver positioned on the substrate surface. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Preferred embodiments of the invention will now be described with reference to the accompanying drawings. 
         FIGS. 1A to 1C  show a first embodiment of the invention, comprising growth of GaP nanowhiskers on Si (111).  FIG. 1A  is a 45° tilt SEM image of GaP nanowires growing vertically from the Si (111) surface in the [111] direction.  FIG. 1B  shows a top view from the same sample, scale bar 1 μm.  FIG. 1C  is an HRTEM image of the Si substrate-nanowhisker interface of a nanowhisker of  FIG. 1A , scale bar 10 nm. The crystal directions from the Si substrate (lower) are transferred to the nanowhisker (upper). 
         FIGS. 2A and 2B  show modifications of the first embodiment, specifically SEM images of vertical GaAs ( FIG. 2A ) nanowhiskers and InP ( FIG. 2B ) nanowhiskers grown from and Si (111) substrate, tilt 45°, scale bars 1 μm. 
         FIGS. 3A and 3B  show a second embodiment of the invention, HAADF STEM images of a light-emitting GaAsP segment incorporated in a GaP nanowire during growth. The segment is approximately 500 nm long corresponding to a growth time of 1 min of a total of 5 min. In  FIG. 3A , the location of the segment in the nanowire is seen as a brighter region in the mid section, scale bar 500 nm.  FIG. 3B  is an XEDS line scan of the GaP nanowire with GaAsP segment showing the sharp nature of the interface, scale bar 200 nm. 
         FIGS. 4A to 4C  show photoluminescence from the nanowhiskers of  FIG. 3 .  FIG. 4A  shows room-temperature PL from standing wires as-grown on a Si(001) surface as seen from above, scale bar 5 μm. When excited with a 458 nm laser source the wires emit at 725 nm. The luminescence was visible to the naked eye and the image was recorded using a standard digital camera with 15 s integration time.  FIG. 4B  shows a top view SEM image of the same sample, scale bar 1 μm. Four nanowhiskers grow in the four different &lt;111&gt; directions. The nanowhiskers form an angle of 35.3° with the Si(001) surface as illustrated in the inset.  FIG. 4C  shows 10 K and room-temperature PL spectra from individual wires scraped off and resting on a SiO 2  surface. The luminescence from the wires remained bright at room temperature, with negligible quenching observed. 
     
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The integration of III-V compound semiconductors, which are dominant in applications such as light-emitting diodes and optoelectronics, with mainstream Si technology is a long sought-after goal for the semiconductor industry. If mastered, significant limitations of the otherwise ideal Si material could be compensated: first, the low efficiency in light generation in Si and, second, the lack of a versatile heterostructure technology required for many high-speed electronic and photonic devices. 
     The present invention, in an especially preferred mode, provides III-V nanowhiskers (i.e., nanowhiskers of which at least the initial growth or base portion is of a III-V material) grown epitaxially on Si substrates. By the term “epitaxially,” it is meant that the crystallographic directions are transferred from the substrate to the nanowhiskers. GaP has a lattice mismatch of less than 0.4% relative to Si and is therefore a preferred candidate for epitaxial growth on Si among the III-V compounds. The GaP—Si junction has applications in heterojunction bipolar transistors with GaP as large band gap emitter with sharp and ideal interfaces to Si. Successful synthesis is demonstrated of epitaxially oriented GaP nanowhiskers on Si(111) and Si(001) substrates. To demonstrate room temperature light generation on silicon, light emitting GaAsP heterostructure segments were inserted. The present invention provides epitaxial growth of nanowhiskers on Si for more heavily lattice-mismatched compounds such as InP (4.1%) and GaAs (8.1%). 
     In a first embodiment, size-selected gold aerosol nanoparticles were used as seeding particles for nanowire growth. Prior to aerosol deposition, the Si substrates were cleaned and organic residues removed. As a final step before deposition, the samples were treated with hydrofluoric acid to create a hydrogen-terminated surface. The samples were then immediately transferred to a controlled nitrogen atmosphere where the aerosol deposition took place. Typically, 40 nm diameter Au aerosol particles at a density of 2 μm −2  were used. After aerosol deposition, the sample was exposed as little as possible to open air since the hydrogen-terminated surface is known to deteriorate with time. The nanowire growth was performed in a low-pressure, 10 kPa, MOVPE system. Samples were annealed at 625° C. in a hydrogen atmosphere for 10 min before growth. The temperature was then ramped down to the growth temperature of typically 475° C. Growth of GaP nanowhiskers was initiated when the precursors, trimethyl gallium and phosphine, were introduced simultaneously into the growth cell. A typical growth time was 4 min. For incorporation, in a second embodiment of the invention, of an optically active GaAsP heterosegment, arsine was switched on at a certain time during growth. The GaAs x P 1-x  composition was then controlled by adjusting the arsine-to-phosphine ratio. For growth of InP and GaAs on Si, the procedure was very similar but with different temperatures and precursors as appropriate to those materials. 
     Samples were then characterized using scanning electron microscopy (SEM), transmission electron microscopy (TEM), and photoluminescence (PL) spectroscopy. Specifically,  FIG. 1A  shows a 45° tilt SEM micrograph of GaP nanowhiskers growing vertically from the Si(111) surface in the [111] direction. A thin planar film of GaP on the Si substrate can be seen as a corrugation of the surface between the wires. TEM investigations estimate the film thickness to be about 20 nm, i.e., the uncatalyzed planar growth rate is approximately 10 −2  of the nanowire growth rate. The wires were grown using 40 nm seed Au nanoparticles. Top wire diameter is close to 40 nm.  FIG. 1B  is a top view of the same sample showing the perfection in the vertical alignment.  FIG. 1C  is a HRTEM image of the Si substrate-GaP nanowhisker interface. The crystal directions from the Si substrate are transferred to the nanowhisker. 
     The preferred III-V nanowhisker growth direction in most reported cases in the literature is the [111]B direction, i.e., corresponding to vertical growth from a (111) oriented surface. The Si(111) surface actually has four possible &lt;111&gt; growth directions, one vertical and three forming an angle of 19.5° with the substrate surface, distributed 120° apart azimuthally. Only the vertical [111] direction is observed, which is expected if the gold-silicon interface is flat, as the only facet available for nucleation is then the (111) facet, the other facets simply not being present during nucleation. This is indisputably the case when looking at  FIGS. 1A  and B and clearly demonstrates the perfect epitaxial nature of the growth. Well-aligned vertically oriented nanowhiskers were reproducibly obtained in a large number (20+) of growth runs. 
     To investigate the interface between the Si substrate and the GaP nanowire, samples were prepared for high-resolution transmission electron microscopy (HRTEM) by cleaving polishing, and ion milling the silicon substrate after wire growth ( FIG. 1C ). The transfer of crystallographic information from the Si substrate to the GaP nanowhiskers can clearly be seen, in that the crystal directions of the Si substrate are transferred to the epitaxial layers at the base of the nanowhisker. 
     In modifications of the first embodiment, III-V compounds with a large lattice mismatch such as GaAs ( FIG. 2A ) and InP ( FIG. 2B ), with lattice mismatch of 4.1% and 8.1% respectively, are also be grown epitaxially on Si. Specifically,  FIGS. 2A and 2B  show SEM images of vertical (A) GaAs nanowhiskers and (B) InP nanowhiskers grown on Si(111) substrates. The small wire cross-section enables the wires to accommodate and relax strain from the large lattice misfits of otherwise incompatible materials. 
     It was found that passivation (e.g., hydrogen passivation) of the Si surface is particularly advantageous. On samples where the native oxide was not removed prior to aerosol deposition, no epitaxial orientation was observed. It was also noticed that for samples that were kept in a glovebox atmosphere for a longer time (˜3 months), the yield of straight epitaxial wires was lower than from freshly prepared samples. As the reoxidation of the HF-etched surface is moderately slow, this suggests that even a very thin layer of native oxide is detrimental to epitaxial wire growth. 
     EXAMPLES 
     Starting material was “Toyo” Epitaxial Silicon Wafers, P type substrate with a P type epilayer orientation (111). 
     
       
         
               
               
               
               
               
             
               
               
               
               
               
               
             
           
               
                   
                   
               
               
                   
                 Dopant 
                   
                 Resistivity 
                 Thickness 
               
               
                   
                   
               
             
             
               
                   
               
             
          
           
               
                   
                 Substrate 
                 Boron 
                 &lt;0.015 
                 Ω cm 
                 245 μm 
               
               
                   
                 Layer 
                 Boron 
                 12 
                 Ω cm 
                  27 μm 
               
               
                   
                   
               
             
          
         
       
     
     Preparation Prior to Growth 
     1) Clean with ultrasonic Tri-clean to remove organic residues and particles. 
     The wafer was placed in a test tube and solution a) below was added. The test tube was put in ultrasonic bath at 35 KHz for 2-3 minutes. After, the bath the solution was decanted and the next solution was added. The process repeated for solutions b)-d) in that order. 
     a) Trichloroethylene (proanalysi) 
     b) Acetone (proanalysi) 
     c) Ethanol (95%) 
     d) Milli-Q-H 2 O 
     The water was decanted and refilled 2-3 times in Milli-Q-H 2 O (18.2 W cm 25° C.). Rinse the wafer.) 
     2) The wafer was removed from the rinse water and immediately cleaned with Piranha Etch to remove any remaining organic residues. 
     The following were measured and mixed in a separate container:
         7 parts sulphuric acid (95-97% proanalysi)   3 parts hydrogen peroxide (30% proanalysi)       

     When mixed, an exothermic reaction causes the solution to heat to over 70° C. This mixture was poured over the samples and was stirred occasionally for 6 min. 
     The Piranha Etch was decanted and the wafer was rinsed as before 3-4 times. 
     3) The wafer was taken directly from the rinsing water and put in a Hydrofluoric acid (HF) dip to remove silicon dioxide on the surface. 
     A 5% HF solution was prepared by measuring and mixed in a separate container:
         1 part HF (40% proanalysi)   7 parts in Milli-Q-H 2 O (18.2 M W cm 25° C.)       

     The solution was stirred occasionally for 2 min. 
     The wafer was removed from the HF solution and care was taken that there were no visible droplets remaining on the polished side of the wafer. The backside of the wafer was blotted on a filter paper to remove any liquid on the backside of the wafer. It was then transferred directly into an atmospherically controlled glove box (H 2 O and O 2  levels &lt;1 ppm) via a load lock for the aerosol deposition. 
     A standard aerosol particle diameter of 40 nm was used with particle surface densities ranging from ˜0.05 to 40 μm −2 . 
     After aerosol deposition, the samples were stored up to 2 weeks in an atmospherically controlled glove box until they were transferred in air to the MOVPE glove box chamber for loading and growth. 
     The samples were then mounted in the growth chamber of the MOVPE system (low pressure 100 mbar). 
     A typical growth run, GaP nanowhiskers: 
     1. Temperature was raised to an annealing temperature of 625° C. and annealed for 10 min under hydrogen atmosphere. Temperature was ramped down linearly during 5 min to growth temperature, 475° C. 
     2. Growth started when the two sources, TMG and phosphine were simultaneously introduced in the growth chamber. The molar fraction source flows were 1.5×10 −2  for phosphine and 1.25×10 −5  for TMG in 6 l/min hydrogen. A typical growth time was 4 minutes. 
     3. Growth stops when the TMG is switched off. The temperature is then lowered and the phosphine is switched off as temperature drops below 300° C. 
     Comments to the procedure described above:
         The HF-etch creates a hydrogen-terminated surface, i.e., a hydrogen atom is attached to each dangling bond of the Si (111) surface. Other surface preparations such as no cleaning at all, organic clean but no oxide removal, did not produce good wire growth. As a hydrogen terminated surface is oxidized over time, it is preferable to use freshly prepared samples. Samples kept in a glove box atmosphere for ˜3 months produced lower quality wires than freshly prepared samples.   Annealing temperature was found to be an important parameter for the wire quality and investigated temperatures in the range 550 to 700° C. A high annealing temperature (700° C.) gave wires with a heavy base and irregular nucleation, resulting in many small wires around the main stem as well as many wires creeping along the surface with no orientation. A low annealing temperature (550° C.), on the other hand, resulted in loss of the epitaxial orientation from the substrate, i.e., the wires were no longer vertically aligned but had a random orientation. At this low temperature, many gold particles also did not nucleate to form wires but remained as dead particles lying on the surface. 625° C. was found to be a suitable compromise between the two extremes above.   It was observed that if the phosphine was activated during the annealing step, as is the conventional procedure when growing GaP nanowhiskers on GaP substrates, there was no wire growth.       

       FIGS. 1A to 1C  show GaP nanowhiskers grown on a silicon substrate. The formation of the nanowhiskers is ideal, with the nanowhiskers exhibiting perfect regularity. In general, the achievement of ideal nanowhiskers is due to the formation of perfect conditions for nanowire growth, including atomically flat surfaces with no impurity or oxide formation that might give rise to bulk growth and that might inhibit factors that promote nanowhisker growth. 
     Referring to  FIGS. 3A and 3B  and  4 A to  4 C, in a second embodiment of this invention, light-emitting segments of GaAs x P 1-x  were inserted in GaP wires grown on Si. The composition can be tuned by controlling the arsenic to phosphorus ratio during growth, and the length of the segment is determined by the growth time. 
     The method of forming the nanowhiskers was essentially the same as that in Example 1, but conditions are changed during growth to produce the gallium arsenide phosphide heterojunctions. The procedure for changing conditions is described in earlier mentioned U.S. patent application Ser. No. 10/613,071, published as No. 2004-0075464, to Samuelson et al. 
     Using Si(001) substrates, the nanowhiskers grew in four different &lt;111&gt; directions ( FIG. 4B ). On the (001) surface orientation, four equivalent &lt;111&gt; directions make an angle of 35.3° with the substrate distributed 90° apart azimuthally. For epitaxial growth, all four directions can be expected since the &lt;111&gt; directions are equivalent. 
       FIG. 3A  shows a high angle annular dark-field scanning transmission electron microscopy (HAADF-STEM) image of a GaP nanowire with a 500 nm long segment of GaAs x P 1-x . An X-ray energy dispersive spectrometry (XEDS) composition line scan of the segment ( FIG. 3B ) shows that the interfaces are very sharp. From XEDS composition analysis, a composition of ˜30% P and ˜70% As in the segment can be inferred. The phosphorous content of the GaAsP segment measured with XEDS is probably somewhat higher than that of the actual segment core; after growth of the segment, a thin shell of GaP is deposited over the GaAsP core due to lateral growth when the end part of the GaP nanowire is grown. 
     The optically active segments were characterized using PL spectroscopy and PL imaging.  FIG. 4A  shows room temperature luminescence imaging in the deep red spectral region (725 nm) from standing wires, as grown on Si (001). The nanowhiskers were excited using an Ar+ laser, emitting at 458 nm and with an intensity of approximately 3 kW/cm 2 . A sample with a low wire density of ˜0.05 μm −2  was used to make it possible to resolve individual wires. The (001) substrate orientation was chosen to ease the collection of the light since light is mainly emitted in lobes from the segment and the light is collected from above. The elongations of the spots in two perpendicular directions correspond to the projection of the four different &lt;111&gt; directions ( FIG. 4B ). The fact that luminescence of individual nanowhiskers can be imaged at room temperature suggests that the radiative recombination from GaP/GaAsP/GaP double heterostructure segments is not thermally quenched even at room temperature. 
     For a detailed PL-spectroscopy study, standing nanowhiskers were scraped off from a (111) substrate and transferred to a grid-patterned SiO 2  surface. The advantage of placing the nanowhiskers on the grid structure is that, after PL spectroscopy, each wire can be located with SEM to confirm that it is a single wire with a well-defined segment. PL spectra from separate nanowhiskers were recorded at 10° K and room temperature, demonstrating high uniformity ( FIG. 4C ) in the luminescence from the individual wires. The GaP/GaAsP/GaP nanowhiskers exhibit sharp peaks at about 1.78 eV with a full width half-maximum (fwhm) of about 60 meV at 10° K. The PL remains bright at room temperature with peaks shifted to 1.71 eV and with an average fwhm of about 75 meV, with negligible quenching of the emission. The spectral shift corresponds well with the band-gap shrinkage from 10° K to room temperature. Comparing the PL spectra with data in the literature for bulk GaAsP, a composition of GaAs 0.8 P 0.2  can be inferred, in reasonable agreement with the XEDS composition analysis. By changing the As x P 1-x  composition in the segment, it is possible to continuously tune the emitting wavelength from the band gap of GaP to the band gap of GaAs, representing a wavelength span of 550-900 nm, corresponding to the spectral range achieved in GaAsP LED technology for growth on GaP. 
     Among its most important advantages, the present invention provides device-quality III-V semiconductor growth on silicon substrates with perfect epitaxial nucleation of oriented III-V nanowhiskers. The present invention additionally demonstrates visible room-temperature luminescence of heterostructure III-V nanowhiskers formed on silicon substrates as bright as at cryogenic temperatures.