Abstract:
A passive equalizer with negative impedance to increase a gain includes a first RC loop, a second RC loop, a cascade RL circuit and a cross-coupled inverter unit. Each of the first and the second RC loops includes a first resistor, a second resistor connected in series to the first resistor at a node to thereby form a resistor series, and a capacitor connected in parallel to the resistor series. The cascade RL circuit is connected between the RC loops and includes a fifth resistor, a sixth resistor and an inductor connected between the fifth resistor and the sixth resistor. The cross-coupled inverter unit is connected in parallel to the RL circuit and connected between the RC loops for using the feature of negative impedance to obtain an excellent high-frequency gain.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to a passive equalizer and, more particularly, to a passive equalizer with negative impedance to increase a gain. 
         [0003]    2. Description of Related Art 
         [0004]    Passive equalizers are widely used in a high-speed serial communication link such as a high definition multimedia interface (HDMI).  FIGS. 1   a  and  1   b  show a schematic diagram of a communication system with a typical passive equalizer  11 . The passive equalizer  11  can be implemented as required at a position close to the transmitting side  1 , as shown in  FIG. 1   a,  or the receiving side, as shown in  FIG. 1   b,  for compensation.  FIG. 2  is a circuit diagram of a typical passive equalizer, which is comprised of passive elements such as resistor R, inductor L and capacitor C.  FIG. 3  is a graph of a frequency response of gains for a typical passive equalizer. As shown in  FIG. 3 , the passive equalizer at high frequency has a gain close to −0.5 dB in the vertical axis, and close to one at most. Accordingly, the high frequency gain is restrained, and the signal restoring capability is poor. In addition, the feature values of the passive elements in the typical passive equalizer cannot be easily adjusted, resulting in losing the flexibility on use. 
         [0005]    Therefore, it is desirable to provide an improved passive equalizer to mitigate and/or obviate the aforementioned problems. 
       SUMMARY OF THE INVENTION 
       [0006]    The object of the present invention is to provide a passive equalizer, which can use negative impedance to increase a gain. 
         [0007]    According to a feature of the invention, a passive equalizer with negative impedance to increase a gain is provided. The passive equalizer includes a first RC loop, a second RC loop, a cascade RL circuit and a cross-coupled inverter unit. The first RC loop includes a first resistor, a second resistor connected in series to the first resistor at a first node to thereby form a first resistor series, and a first capacitor connected in parallel to the first resistor series. The second RC loop includes a third resistor, a fourth resistor connected in series to the third resistor at a second node to thereby form a second resistor series, and a second capacitor connected in parallel to the second resistor series. The cascade RL circuit is connected between the first node and the second node and includes a fifth resistor, a sixth resistor and an inductor connected between the fifth resistor and the sixth resistor. The cross-coupled inverter unit is connected in parallel to the cascade RL circuit and connected between the first node and the second node. 
         [0008]    According to another feature of the invention, a passive equalizer with negative impedance to increase a gain is provided. The passive equalizer includes a first RC loop, a second RC loop, a cascade RL circuit, a first cross-coupled inverter unit and a second cross-coupled inverter unit. The first RC loop includes a first resistor, a second resistor connected in series to the first resistor at a first node to thereby form a first resistor series, and a first capacitor connected in parallel to the first resistor series. Two ends of the first RC loop function as differential positive input and output terminals respectively. The second RC loop includes a third resistor, a fourth resistor connected in series to the third resistor at a second node to thereby form a second resistor series, and a second capacitor connected in parallel to the second resistor series. Two ends of the second RC loop function as differential negative input and output terminals respectively. The cascade RL circuit is connected between the first node and the second node and includes a fifth resistor, a sixth resistor and an inductor connected between the fifth resistor and the sixth resistor. The first cross-coupled inverter unit is connected in parallel to the cascade RL circuit and connected between the differential positive input terminal and the differential negative input terminal. The second cross-coupled inverter unit is connected in parallel to the cascade RL circuit and connected between the differential positive output terminal and the differential negative output terminal. 
         [0009]    According to a further feature of the invention, a passive equalizer with negative impedance to increase a gain is provided. The passive equalizer includes a first RC loop, a second RC loop, a cascade RL circuit and a cross-coupled inverter unit. The first RC loop includes a first resistor with a first node and a second node at two ends and a first capacitor connected between the first node and the second node. The second RC loop includes a second resistor with a third node and a fourth node at two ends and a second capacitor connected between the third node and the fourth node. The cascade RL circuit is connected between the first node and the third node and includes a third resistor, a fourth resistor and an inductor connected between the third resistor and the fourth resistor. The cross-coupled inverter unit is connected in parallel to the cascade RL circuit and connected between the first node and the third node. 
         [0010]    According to a further another feature of the invention, a passive equalizer with negative impedance to increase a gain is provided. The passive equalizer includes a first RC loop, a second RC loop, a cascade RL circuit and a cross-coupled inverter unit. The first RC loop includes a first resistor with a first node and a second node at two ends and a first capacitor connected between the first node and the second node. The second RC loop includes a second resistor with a third node and a fourth node at two ends and a second capacitor connected between the third node and the fourth node. The cascade RL circuit is connected between the first node and the third node and includes a third resistor, a fourth resistor and an inductor connected between the third resistor and the fourth resistor. The cross-coupled inverter unit is connected in parallel to the cascade RL circuit and connected between the second node and the fourth node. 
         [0011]    Other objects, advantages, and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0012]      FIG. 1  is a schematic diagram of a communication system with a typical passive equalizer; 
           [0013]      FIG. 2  is a circuit of a typical passive equalizer; 
           [0014]      FIG. 3  is a graph of a frequency response of gains of a typical passive equalizer; 
           [0015]      FIG. 4  is a circuit of a passive equalizer with negative impedance to increase a gain in accordance with an embodiment of the invention; 
           [0016]      FIG. 5  is a circuit of a passive equalizer with negative impedance to increase a gain in accordance with another embodiment of the invention; 
           [0017]      FIG. 6  is a circuit of a passive equalizer with negative impedance to increase a gain in accordance with a further embodiment of the invention; 
           [0018]      FIG. 7  is a circuit of a passive equalizer with negative impedance to increase a gain in accordance with a further another embodiment of the invention; 
           [0019]      FIG. 8   a  is a circuit of a cross-coupled inverter unit of the passive equalizer of  FIG. 4 ; 
           [0020]      FIG. 8   b  is a circuit of a cross-coupled inverter unit of the passive equalizer of  FIG. 5 ; 
           [0021]      FIG. 9   a  is a circuit of a cross-coupled inverter unit of the passive equalizer of  FIG. 6 ; 
           [0022]      FIG. 9   b  is a circuit of a cross-coupled inverter unit of the passive equalizer of  FIG. 7 ; and 
           [0023]      FIG. 10  is a graph of a frequency response of gains of a passive equalizer in accordance with the invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0024]      FIG. 4  is a circuit of a passive equalizer with negative impedance to increase a gain in accordance with an embodiment of the invention. In  FIG. 4 , the passive equalizer includes two RC loops  401  and  403 , a cascade RL circuit  405  and a cross-coupled inverter unit  407 . 
         [0025]    The RC loop  401  includes a capacitor C 1 , a resistor R 1  and a resistor R 2 . A resistor series R 1 -R 2  is formed by connecting the resistors R 1  and R 2  at a node N 1 . The capacitor C 1  is connected in parallel to the resistor series R 1 -R 2 . The RC loop  403  includes a capacitor C 2 , a resistor R 3  and a resistor R 4 . A resistor series R 3 -R 4  is formed by connecting the resistors R 3  and R 4  at a node N 2 . The capacitor C 2  is connected in parallel to the resistor series R 3 -R 4 . The cascade RL circuit  405  includes an inductor L 1 , a resistor R 5  and a resistor R 6 . Two ends of the inductor L 1  are connected to the resistors R 5  and R 6  respectively. Two ends of the cascade RL circuit  405  are connected to the nodes N 1  and N 2  respectively. The cross-coupled inverter unit  407  is connected in parallel to the cascade RL circuit  405  and also has two ends respectively connected to the nodes N 1  and N 2 . The cross-coupled inverter unit  407  includes two inverters  4071  and  4073 . The inverter  4071  has an input terminal connected to the node N 1  and an output terminal connected to the node N 2 . The inverter  4073  has an output terminal connected to the node N 1 . In this embodiment, the passive equalizer is an equalizer for applications with bi-direction signal transmission. That is, each end of the RC loop  401  or  403  can act as an input or output terminal. 
         [0026]    At a low frequency, the passive equalizer can have a circuit gain of R 5 /(R 1 +R 5 ), and accordingly the resistance of the resistors can be adjusted to determine the circuit gain. Since the cross-coupled inverter unit  407  has the feature of negative impedance, which is equivalent to a voltage source. Accordingly, at a high frequency operation, the equivalent voltage source can provide a current to the inductors and the capacitors. Thus, it effectively increases the high-frequency gain, and the active element can assist the passive elements. In this case, only a small amount of consumed current is required for obtaining the good performance. 
         [0027]      FIG. 5  is a circuit of a passive equalizer with negative impedance to increase a gain according to another embodiment of the invention. In  FIG. 5 , the passive equalizer includes two RC loops  501  and  503 , a cascade RL circuit  505 , two cross-coupled inverter units  507  and  509 . The RC loop  501  includes a capacitor C 1  and two resistors R 1  and R 2 . A resistor series R 1 -R 2  is formed by connecting the resistor R 1  to the resistor R 2  at a node N 1 . The capacitor C 1  is connected in parallel to the resistor series R 1 -R 2 . Two ends of the RC loop  501  function as differential positive input and output terminals respectively. The RC loop  503  includes a capacitor C 2  and two resistors R 3  and R 4 . A resistor series R 3 -R 4  is formed by connecting the resistor R 3  to the resistor R 4  at a node N 2 . The capacitor C 2  is connected in parallel to the resistor series R 3 -R 4 . Two ends of the RC loop  503  function as differential negative input and output terminals respectively. The cascade RL circuit  505  includes an inductor L 1  and two resistors R 5  and R 6 . The inductor L 1  is connected between the resistors R 5  and R 6 . Two ends of the cascade RL circuit  505  are connected to the nodes N 1  and N 2  respectively. The cross-coupled inverter unit  507  is connected in parallel to the cascade RL circuit  505 . Two ends of the cross-coupled inverter unit  507  are connected to the differential positive and negative input terminals respectively. Two ends of the cross-coupled inverter unit  509  are connected to the differential positive and negative output terminals respectively. The cross-coupled inverter unit  507  includes two inverters  5071  and  5073 . The inverter  5071  has an input terminal connected to the differential positive input terminal and an output terminal connected to the differential negative input terminal. The inverter  5073  has an input terminal connected to the differential negative input terminal and an output terminal connected to the differential positive input terminal. The cross-coupled inverter unit  509  includes two inverters  5091  and  5093 . The inverter  5091  has an input terminal connected to the differential positive output terminal and an output terminal connected to the differential negative output terminal. The inverter  5093  has an input terminal connected to the differential negative output terminal and an output terminal connected to the differential positive output terminal. 
         [0028]    In this embodiment, the passive equalizer is an equalizer for applications with bi-direction signal transmission. That is, each end of the RC loop  401  or  403  can act as an input or output terminal. 
         [0029]    At a low frequency, the passive equalizer can have a circuit gain of R 5 /(R 1 +R 5 ), and accordingly the resistance of the resistors can be adjusted to determine the circuit gain. Since the cross-coupled inverter units  507  and  509  have the feature of negative -impedance, which is equivalent to a voltage source. Accordingly, at a high frequency operation, the equivalent voltage source can provide a current to the inductors and the capacitors. Thus, it effectively increases the high-frequency gain, and the active element can assist the passive elements. In this case, only a small amount of consumed current is required for obtaining the good performance. 
         [0030]      FIG. 6  is a circuit of a passive equalizer with negative impedance to increase a gain in accordance with a further embodiment of the invention. In  FIG. 6 , the passive equalizer includes two RC loops  601  and  603 , a cascade RL circuit  605  and a cross-coupled inverter unit  607 . 
         [0031]    The RC loop  601  includes a capacitor C 1  and a resistor R 1 . Two ends of the resistor R 1  are nodes N 1  and N 2  respectively. The capacitor C 2  is connected between the nodes N 1  and N 2 . The RC loop  603  includes a resistor R 2  and a capacitor C 2 . Two ends of the resistor R 2  are nodes N 3  and N 4  respectively. The capacitor C 2  is connected between the nodes N 3  and N 4 . The cascade RL circuit  605  includes an inductor L 1  and two resistors R 3  and R 4 . Two ends of the inductor L 1  are connected to the resistors R 3  and R 4  respectively. Two ends of the cascade RL circuit  605  are connected to the nodes N 1  and N 3  respectively. The cross-coupled inverter unit  607  is connected in parallel to the cascade RL circuit  605 . Two ends of the cross-coupled inverter unit  607  are connected to the nodes N 1  and N 3  respectively. The cross-coupled inverter unit  607  includes two inverters  6071  and  6073 . The inverter  6071  has an input terminal connected to the node N 1  and an output terminal connected to the node N 3 . The inverter  6073  has an input terminal connected to the node N 3  and an output terminal connected to the node N 1 . The node N 1  is connected to a differential positive output terminal. The node N 2  is connected to a differential positive input terminal. The node N 3  is connected to a differential negative output terminal. The node N 4  is connected to a differential negative input terminal. The passive equalizer is an equalizer for applications with single direction signal transmission, such as HDMI/DisplayPort. 
         [0032]    At a low frequency, the passive equalizer can have a circuit gain of R 3 /(R 1 +R 3 ), and accordingly the resistance of the resistors can be adjusted to determine the circuit gain. Since the cross-coupled inverter unit  607  has the feature of negative impedance, which is equivalent to a voltage source. Accordingly, at a high frequency operation, the equivalent voltage source can provide a current to the inductors and the capacitors. Thus, it effectively increases the high-frequency gain, and the active element can assist the passive elements. In this case, only a small amount of consumed current is required for obtaining the good performance. 
         [0033]      FIG. 7  is a circuit of a passive equalizer with negative impedance to increase a gain according to a further another embodiment of the invention. In  FIG. 7 , the passive equalizer includes two RC loops  701  and  703 , a cascade RL circuit  705  and a cross-coupled inverter unit  707 . 
         [0034]    The RC loop  701  includes a capacitor C 1  and a resistor R 1 . Two ends of the resistor R 1  are nodes N 1  and N 2  respectively. The capacitor C 2  is connected between the nodes N 1  and N 2 . The RC loop  703  includes a capacitor C 2  and a resistor R 2 . Two ends of the resistor R 2  are nodes N 3  and N 4  respectively. The capacitor C 2  is connected between the nodes N 3  and N 4 . The cascade RL circuit  705  includes an inductor L 1  and two resistors R 3  and R 4 . Two ends of the inductor L 1  are connected to the resistors R 3  and R 4  respectively. Two ends of the cascade RL circuit  705  are connected to the nodes N 1  and N 3  respectively. The cross-coupled inverter unit  707  is connected in parallel to the cascade RL circuit  705 . Two ends of the cross-coupled inverter unit  707  are connected to the nodes N 2  and N 4  respectively. The cross-coupled inverter unit  707  includes two inverters  7071  and  7073 . The inverter  7071  has an input terminal connected to the node N 2  and an output terminal connected to the node N 4 . The inverter  7073  has an input terminal connected to the node N 4  and an output terminal connected to the node N 2 . The node N 1  is connected to a differential positive output terminal. The node N 2  is connected to a differential positive input terminal. The node N 3  is connected to a differential negative output terminal. The node N 4  is connected to a differential negative input terminal. The passive equalizer is an equalizer for applications with single direction signal transmission, such as HDMI/DisplayPort. 
         [0035]    At a low frequency, the passive equalizer can have a circuit gain of R 3 /(R 1 +R 3 ), and accordingly the resistance of the resistors can be adjusted to determine the circuit gain. Since the cross-coupled inverter unit  707  has the feature of negative impedance, which is equivalent to a voltage source. Accordingly, at a high frequency operation, the equivalent voltage source can provide a current to the inductors and the capacitors. Thus, it effectively increases the high-frequency gain, and the active element can assist the passive elements. In this case, only a small amount of consumed current is required for obtaining the good performance. 
         [0036]      FIGS. 8   a,    8   b,    9   a,    9   b  show a circuit of a cross-coupled inverter unit of the passive equalizer in accordance with the invention. The cross-coupled inverter unit of the passive equalizer in the invention can be implemented by two inverters (as shown in  FIG. 8   a ), a differential amplifier (as shown in  FIG. 9   a ), or a source-degeneration topology (as shown in  FIGS. 8   b,    9   b ). 
         [0037]      FIG. 10  is a graph of a frequency response of gains of a passive equalizer in accordance with the invention. As shown in  FIG. 10 , the gain frequency response of the passive equalizer of  FIG. 4  is indicated by a solid curve, and the gain frequency response of the passive equalizer of  FIG. 5  is indicated by a dotted curve. As shown in  FIG. 3  (prior art) and  FIG. 10  (the present invention), the passive equalizer at high frequency in the prior art is close to −0.5 dB on the vertical axis, and the passive equalizer at high frequency (2 GHz) in the invention is close to −2.5 dB on the vertical axis, which is much better than −0.5 dB in the prior art. Therefore, the passive equalizer is relatively improved at high frequency. 
         [0038]    In view of the foregoing, it is known that, with a small amount of consumed power, the passive equalizer of the invention can use the negative impedance of the cross-coupled inverter unit to obtain the considerable improvement on high frequency gain. 
         [0039]    Although the present invention has been explained in relation to its preferred embodiment, it is to be understood that many other possible modifications and variations can be made without departing from the spirit and scope of the invention as hereinafter claimed.