Abstract:
The present invention is for substrates for use in interposes for electronic packaging purposes. One preferred embodiment of the present invention is a substrate for use in a Spring Connector Matrix (SCM) interposer having an array of electrically insulated spring connectors each having a fixed end portion and a floating end portion resiliently flexibly coupled to its associated fixed end portion and capable of being independently displaceable in a plane substantially perpendicular to the SCM interposer&#39;s major surfaces. Another preferred embodiment of the present invention is a substrate intended to be folded along one or more predetermined fold lines or forming a 3D interposer. Folding is intended at wings which may be wholly formed of valve metal material or may include one or more electrically insulated valve metal traces electrically connected to one or more interconnect regions intended for ICs either single or double sided mounted thereon.

Description:
FIELD OF THE INVENTION  
       [0001]     The invention relates to microelectronic packaging and components.  
       BACKGROUND OF THE INVENTION  
       [0002]     Interposers including inter alia pin grid arrays (PGAs), ball grid arrays (BGAs), and chip-scale packages (CSPs) are employed for coupling one or more chips to a printed circuit board or a power and/or voltage source. Such interposers are required to electrically, mechanically, and thermally couple between two substantially different media which typically have different mechanical and thermal behavior and also different input/output (I/O) interconnection pitches.  
         [0003]     In Applicant&#39;s PCT International Application No. PCT/IL98/00230 published under WO98/53499 entitled “Substrate for Electronic Packaging, Pin Jig Fixture”, the entire contents of which are incorporated herein by reference, there is illustrated and described a substrate for electronic packaging, and a pin jig fixture for manufacturing same. The substrate has a discrete, generally prismatoid, initially electrically conductive valve metal solid body with one or more spaced apart original valve metal vias each individually electrically insulated by a porous oxidized body portion therearound.  
         [0004]     In Applicant&#39;s PCT International Application No. PCT/IL99/00633 published under WO00/31797 entitled “Device for Electronic Packaging Pin Jig Fixture”, the entire contents of which are incorporated herein by reference, there is illustrated and described a device for electronic packaging, and a pin jig fixture for manufacturing same. A device may include vias similar to those in Applicant&#39;s aforementioned WO98/53499 and/or other trace designs. Applicant&#39;s WO00/31797 also illustrates and describes multi-layer devices, and electronic packaging including BGA interposers.  
       SUMMARY OF THE INVENTION  
       [0005]     The first aspect of the present invention is directed toward a substrate for use in a Spring Connector Matrix (SCM) interposer suitable for electrical packaging purposes. The SCM interposer includes an array of electrically insulated spring connectors each having a fixed end portion and a floating end portion resiliently flexibly coupled to its associated fixed end portion and capable of being independently displaceable in a plane substantially perpendicular to the SCM interposers major surfaces. The fixed end portions and the floating end portions can be provided with different types of electrically conductive elements including inter alia balls, bumps, and the like, depending on the intended application of a SCM interpose. Intended applications of a SCM interposer include inter alia an ultrasound transducer, a probe card, and the like. Various active and/or passive circuit elements may be incorporated into a SCM interposer as illustrated and described in Applicant&#39;s aforementioned WO00/31797.  
         [0006]     The second aspect of the present invention is directed toward a substrate capable of being folded along at least one predetermined fold line into a three dimensional (3D) interposer for electronic packaging purposes. The substrate includes at least one interconnect region intended for the mounting of one or more integrated chips (ICs) thereon either in a single or double sided manner, and at least one non-interconnect region or so-called wing for folding along a predetermined fold line to render angular disposed first and second non-interconnect region portions. A non-interconnect region may be entirely of valve metal in which case it is inherently capable of being folded once or even more. Alternatively, a non-interconnect region may include one or more electrically insulated elongated valve metal traces whose longitudinal axes are generally perpendicular to a fold line. Such traces are electrically insulated by valve metal oxide which is a relatively brittle material and therefore which may crack on folding but this will not affect the intended purpose of its intended 3D interposer since the elongated valve metal traces will still remain intact. An intended 3D interposer can have a relatively simple structure, say, a single non-interconnect region to be folded with respect to a single interconnect region or a complicated multi-storey structure for considerably reducing the footprint of a relatively large substrate. 3D interposers not only afford smaller footprint but they also facilitate improved heat sink design, and EMI shielding. The 3D interposer also facilitates an efficient process for manufacturing electronic packages, the process including either one side or two sided lapping of ICs to a uniform height depending on whether the ICs are single or double sided mounted on a 3D interposer.  
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0007]     In order to understand the invention and to see how it may be carried out in practice, preferred embodiments will now be described, by way of non-limiting examples only, with reference to the accompany drawings in which similar parts are likewise numbered, and in which:  
         [0008]      FIG. 1  is a top view of a first preferred embodiment of a Spring Connector Matrix (SCM) interposer prior to solder masking and without electrically conductive pads;  
         [0009]      FIG. 2  is a cross section view of the SCM interposer of  FIG. 1  along line A-A after solder masking;  
         [0010]      FIGS. 3A-3L  illustrate the process for manufacturing the SCM interposer of  FIG. 1 ;  
         [0011]      FIG. 4  is a top view of a second preferred embodiment of a SCM interposer also prior to solder masking;  
         [0012]      FIG. 5  is a cross section view of the SCM interposer of  FIG. 4  along line C-C after solder masking;  
         [0013]      FIG. 6  is a cross section view of an ultrasound transducer including the SCM interposer of  FIG. 1 ;  
         [0014]      FIG. 7  is a cross section view of a probe card including the SCM interposer of  FIG. 1 ;  
         [0015]      FIG. 8  is a side view of a BGA electronic package;  
         [0016]      FIG. 9  is a top view of a substrate for folding into the BGA electronic package of  FIG. 8 ;  
         [0017]      FIG. 10  is a cross section view of the substrate of  FIG. 9  along line D-D;  
         [0018]      FIGS. 11A-11E  illustrate the process for manufacturing the electronic package of  FIG. 8 ;  
         [0019]      FIG. 12  is a perspective view of a two-storey 3D interposer;  
         [0020]      FIG. 13  is a top view of an L-shaped substrate for folding along three predetermined fold lines into the 3D interposer of  FIG. 12 ;  
         [0021]      FIG. 14  is a cross section view of a bus of the substrate of  FIG. 13  along line E-E; and  
         [0022]      FIG. 15  is a side view of a BGA electronic package including the 3D interposer of  FIG. 12  along line of sight F. 
     
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS  
       [0023]      FIGS. 1 and 2  show a Spring Connector Matrix (SCM) interposer  100  suitable for packaging a range of electronic devices including an ultrasound transducer (see  FIG. 6 ), a probe card (see  FIG. 7 ), and other devices. The SCM interposer  100  includes a discrete, generally prismatoid, primarily valve metal substrate  101  intimately sandwiched between solder mask and signal layers  102  and  103  having major surfaces  104  and  106 . The substrate  101  includes an array of keyhole shaped perimeter walls  107  (constituting surrounds) each electrically insulating an elongated valve metal insert  108 . The thickness of the perimeter wall  107  is of at least 50 microns in the plane of the major surfaces  104  and  106 .  
         [0024]     The SCM interposer  100  includes an array of throughgoing cavities  109  perpendicularly extending between the major surfaces  104  and  106 . The throughgoing cavities  109  are positioned so as to be internally coextensive with a major portion of each perimeter wall  107  for converting inserts  108  into spring connectors  111  each having a fixed end portion  112  rigidly connected to its defining perimeter wall  107  and a cantilever floating end portion  113  inherently resiliently flexibly coupled to its associated fixed end portion  112 . Thus, a SCM interposer&#39;s floating end portions  113  are independently displaceable with respect to its fixed end portions  112  in a plane substantially perpendicular to its major plane as shown by arrows B. Each fixed end portion  112  is provided with an electrically conductive pad  114  and each floating end portion  113  is provided with an electrically conductive pad  116  for electrical connection of a SCM interposer  100  with external electronic components and devices. The SCM interposer  100  may be provided with various active and/or passive circuit elements as illustrated and described in Applicant&#39;s aforementioned WO01/31797.  
         [0025]     The process for the manufacture of a SCM interposer  100  is now described with reference to  FIGS. 3A-3L  starting from a discrete, generally prismatoid, non-layered valve metal blank  117  with opposing generally parallel major surfaces  118  and  119 : A first pair of mirror photoresist masks  121  are applied in registration to the valve metal blanks major surfaces  118  and  119  (see  FIG. 3A ). The masked valve metal blank  117  undergoes a low voltage dual-sided porous anodization to form the largely valve metal substrate  101  with the keyhole shaped perimeter walls  107  extending generally perpendicular to the substrate&#39;s major surfaces  118  and  119  for defining the elongated valve metal inserts  108  (see  FIG. 3B ). The photoresist masks  121  are removed (see  FIG. 3C ) and the largely valve metal substrate  101  undergoes copper deposition to cover its major surfaces with copper to form an intermediate product  122  with major surfaces  123  and  124  (see  FIG. 3D ). A pair of different photoresist masks  126  and  127  are applied to the intermediate products major surfaces  123  and  124  (see  FIG. 3E ) and the masked intermediate product  122  undergoes copper etching to form an intermediate product  128  with major surfaces  129  and  131  respectively having electrically conductive pads  114  and electrically conductive pads  116  (see  FIG. 3F ). The photoresist masks  126  and  127  ale removed (see  FIG. 3G ) and a second pair of mirror photoresist masks  132  are applied in registration to the intermediate products major surfaces  129  and  131  (see  FIG. 3H ). The masked intermediate product  128  undergoes aluminum etching to form the throughgoing cavities  109  defining the spring connectors  111  (see  FIG. 3I ). The photoresist masks  132  are removed (see  FIG. 3J ) and solder masks  133  and  134  are applied to the intermediate products major surfaces  129  and  131  to form the SCM interposer&#39;s solder mask and signal layers  102  and  103  (see  FIG. 3K ). The SCM interposer  100  can be provided with balls  136  attached to its electrically conductive pads  114  and electrically conductive pads  116  or, alternatively, balls  136  can be replaced by lighter bumps  137  depending on the intended application of a SCM interposer  100  (see  FIG. 3L ).  
         [0026]      FIGS. 4 and 5  show a Spring Connector Matrix (SCM) interposer  140  similar to the SCM interposer  100  insofar as it also includes an array of spring connectors  141  each having a fixed end portion  142  and a floating end portion  143 . The difference between the SCM interposer  140  and the SCM interposer  100  is that the former&#39;s floating end portions  143  are floatingly supported by an inner circle  144  of three resiliently flexible equidistanced tethers  146  which are in turn floating supported by an outer circle  147  of three resiliently flexible equidistanced tethers  148  connecting the inner circle  144  to the remainder of the spring connector  141 . This tethering arrangement better contains lateral movement of the floating end portions  143  in the plane of SCM interposer  140  than the cantilevering arrangement but allows less movement of the floating end portions  143  in the plane perpendicular thereto. The SCM interposer  140  is manufactured using the same process as the SCM interposer  100  except in this case the aluminum etching step of  FIG. 3H  employs a pair of different photoresist masks for rendering the floating end portions  143  rather than the cantilever floating end portions  113 .  
         [0027]      FIG. 6  shows an ultrasound transducer  150  including a SCM interposer  100  including an array of balls  151  attached to its electrically conductive pads  114  and an array of bumps  152  attached to its electrically conductive pads  116 , a rigid control board  153  and an acoustic matrix  154  including a polymer substrate  156  with an array of independently operative acoustic elements (constituting electronic components)  157 . The control board  153  is soldered onto the array of balls  151  whilst each acoustic element  157  is individually soldered to a bump of the array of bumps  152  whereby each acoustic element  157  is capable of independent mechanical vibratory motion perpendicular to the plane of the SCM interposer  100  in response to its individual electrical stimulation.  
         [0028]      FIG. 7  shows a probe card  160  including a SCM interposer  100  including an array of balls  161  attached to its electrically conductive pads  114  and an array of balls  162  attached to its electrically conductive pads  116 , a rigid control board  163 , and a probe card  164  including an array of independently operative test pads (constituting electronic components)  166 . The control board  163  is soldered onto the array of balls  161  whilst each test pad  166  is individually soldered to a bump of the array of bumps  162  whereby each test pad  166  is capable of independent displacement perpendicular to the plane of the SCM interposer  100 .  
         [0029]      FIGS. 8-10  show a BGA electronic package  170  including a 3D BGA interposer  171  folded from a substrate  172  having a pair of opposing generally parallel major surfaces  173  and  174  along a pair of predetermined fold lines  176  and  177 . The substrate  172  includes a discrete, generally prismatoid, initially entirely valve metal non-layered solid body  178  formed into an interconnect region  179  having an imaginary generally rectangular perimeter  181  in a top view of the substrate&#39;s major surfaces  173  and  174 . The fold lines  176  and  177  are parallel to opposite sides of the perimeter  181  and displaced therefrom by a relatively short distance of a few millimeters. The interconnect region  179  includes electrically insulated valve metal traces constituting active and/or passive electronic devices as illustrated and described in Applicant&#39;s aforementioned WO00/31797 and has a pair of ICs  182  mounted single sided thereon.  
         [0030]     The substrate  172  includes a primarily valve metal non-interconnect region  183  adjacent to one end of the interconnect region  179  and a wholly valve metal non-interconnect region  184  adjacent to the opposite end of the interconnect region  179 . The non-interconnect region  183  includes an electrically insulated valve metal trace  186  having a longitudinal axis  187  substantially perpendicular to the fold line  176  and designed to connect the interconnect region  179  to, say, a power source  188 . The valve metal trace  186  is preferably electrically insulated by a pair of elongated valve metal oxide walls  189  generally perpendicularly extending between the major surfaces  173  and  174 . The valve metal oxide walls  189  are preferably formed by a dual sided porous anodization step simultaneously with the forming of the interconnect region  179 .  
         [0031]     The process for the manufacture of the electronic package  170  is now described with reference to  FIGS. 11A-11E  starting from the substrate  172 . ICs  182  of different heights H 1  and H 2  where H 1 &gt;H 2  are mounted on the interconnect region  179  (see  FIG. 11B ). The ICs  182  are one-sided lapped to a uniform height ID (see  FIG. 11C ). The substrate&#39;s major surface  174  is provided with balls  191  (see  FIG. 11D ). The substrate  172  is folded along the fold lines  176  and  177  to form the 3D BGA interposer  171  (see  FIG. 11E ).  
         [0032]      FIGS. 12-15  show a BGA electronic package  200  including a two storey 3D BGA interposer  201  folded from an L-shaped substrate  202  having a pair of opposing generally parallel major surfaces  203  and  204  along three fold lines  206 ,  207  and  208 . The substrate  202  includes a discrete, generally prismatoid, initially entirely valve metal non-layered solid body  209  formed into three interconnect regions  211 ,  212  and  213 , a wholly valve metal non-interconnect region  214 , and a pair of primarily valve metal non-interconnect regions  216  and  217 . The interconnect region  211  is provided with ICs  218  on the substrate&#39;s upper surface  203 , and balls  219  on the substrate&#39;s lower surface  204 . The interconnect region  212  is provided with ICs  221  mounted on the substrate&#39;s upper surface  203 , and ICs  222  mounted on the substrates lower surface  204 . The interconnect region  213  is provided with ICs  223  mounted on the substrate&#39;s upper surface  203 , and ICs  224  mounted on the substrate&#39;s lower surface  204 . The non-interconnect regions  216  and  217  are similar to the non-interconnect region  183  but differ therefrom insofar as they each include a bus  226  of electrically insulated valve metal traces  227  rather than a single valve metal trace.  
         [0033]     While the invention has been described with respect to a limited number of embodiments, it will be appreciated that many variations, modifications, and other applications of the invention can be made within the scope of the appended claims.