Abstract:
A high precision receiver with a means to reduce or compensate the skew caused by the receiver&#39;s hysteresis by using a dynamic reference that is varied depending on a current output signal. To avoid oscillation, the reference signal can be switched over with a certain delay.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    This invention relates generally to digital signal processing, and more particularly, to a receiver having an input means for receiving an input signal and a reference signal, and an output means for producing an output digital signal varying from a high level to a low level depending on whether a threshold is crossed by the input signal. Further, this invention relates to a method for compensating the skew of a receiver of the above type.  
           [0003]    2. Background of the Invention  
           [0004]    In many electronic applications, receivers are used to generate an output digital signal varying from a high level to a low level depending on whether a threshold is crossed by the input signal. Commonly this function is implemented in a comparator comparing an input signal with a threshold signal and outputting a high level or low level signal depending on whether a threshold is crossed by the input signal.  
           [0005]    Input signals often include noise (due to external noise sources, temperature variations, etc.). Because of such noise, a “false” threshold crossing may occur causing a receiver to erroneously output an incorrect logic level. In order to increase a receiver&#39;s immunity to noise, a hysteretic comparator can be used which has two actual threshold values differing from one another by a hysteresis value. When the input signal is above a first actual threshold the output signal is high-level, and when the input signal is below a second actual threshold the output signal is low-level. Thus, a hysteresis value is the difference between these two actual threshold values.  
           [0006]    Therefore, if the input signal is measured in, e.g. volts, the hysteresis value can also be expressed in volts.  
           [0007]    As well known to those skilled in the art, a traditional hysteretic comparator will always produce a skew (described below in more detail) that may be insignificant in low-speed applications. However, in the up-to-date high-speed communication systems the skew produced by traditional hysteretic comparators can adversely affect the outputted data.  
           [0008]    This problem was not solved using means known in the art.  
           [0009]    Thus, U.S. Pat. No. 5,404,054 to Kotowski describes a method and apparatus for controlling programmable or dynamic hysteresis. In Kotowski&#39;s method and circuit, the hysteresis “decay pattern,” the rate of decay, and the minimum separation between a high switchpoint and a low switchpoint are all programmable. Kotowski&#39;s circuit uses one or more comparators and digital-to-analog converters (DAC) controlled by digital logic, depending on the number of switchpoints.  
           [0010]    U.S. Pat. Nos. 5,610,545 and 5,617,050 to Jenkins et al. respectively describe a method and a circuit for providing programmable hysteresis levels, using a programmable hysteresis input for adjusting the hysteresis differential to different preset and intermediate hysteresis levels.  
           [0011]    U.S. Pat. No. 5,798,663 describes a hysteresis generator for providing a comparator with precision hysteresis reference input by varying threshold reference voltage of a comparator depending upon whether the output state of the comparator is high or low.  
           [0012]    The related art discloses various means forof hardware hysteresis control or programmable dynamic hysteresis for threshold detection. However, none of the related art provides simple means to compensate the skew caused by a comparator hysteresis and provide accurate detection of High and Low output signal states.  
         BRIEF SUMMARY OF THE INVENTION  
         [0013]    The object of the present invention is the provision of a signal receiver with a hysteretic comparator incorporated therein, with simple means to compensate the skew caused by the hysteresis.  
           [0014]    Another object of the present invention is to provide a method for compensating the skew of a receiver of the above type.  
           [0015]    In one aspect of the invention, claimed is a receiver having an input means for receving an input signal and a reference signal, and an output means for producing an output digital signal varying from a high level to a low level depending on whether a threshold, that is a function of the reference signal, is crossed by the input signal, the receiver comprising a hysteretic comparator having a first input and a second input, and an output making up the receiver output means and providing said output signal; wherein the output signal is high-level when the input signal is above a first threshold, and is low-level when the input signal is below a second threshold, the first threshold and the second threshold differing from one another by a hysteresis value, and a reference signal adjusting means having a signal input, a control input to which said output signal is fed via a feedback line, and an output for providing the threshold signal, wherein the reference signal adjusting means increases the reference signal when the output signal is high-level, and decreases the reference signal when the output signal is low-level; and wherein said first comparator input and said adjusting means signal input make up said receiver input means, so that said input signal is fed to the first comparator input; said reference signal is fed to the adjusting means signal input; and said adjusting means output is connected to the comparator second input.  
           [0016]    Preferably, the the threshold-adjusting means further comprise an offset signal generator for producing an offset signal of substantially half the hysteresis value; an adder/subtractor having an input that makes up said adjusting means signal input and another input for receiving said offset signal, and an output providing a sum and difference of these reference signal and offset signal; and a multiplexor having an input receiving said sum and difference, a control input that makes up said adjusting means control input and an output that makes up said adjusting means output.  
           [0017]    Preferably, said feedback line has a delay means incorporated therein.  
           [0018]    In another aspect of the invention, claimed is a method for compensating the skew of a receiver adapted for receiving an input signal and a reference signal, the receiver comprising a hysteretic comparator, the method including feeding said input signal and reference signal to respective inputs of the hysteretic comparator, increasing the reference signal when the output signal is high, and decreasing the reference signal when the output signal is low.  
           [0019]    Preferably, the steps of increasing and decreasing the reference signal are delayed. Preferably, the reference signal is increased and decreased by substantially one half the hysteresis value of said hysteretic comparator. The hysteresis value may be precalculated basing on the comparator specification, measured or monitored.  
           [0020]    Preferably, the delay is about the half period of the input signal (for a periodic data transmission). For non-periodic signals, the delay depends upon a signal slew rate. 
       
    
    
     BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS  
       [0021]    For a better understanding of the present invention and the advantages thereof and to show how the same may be carried into effect, reference will now be made, by way of example, to the following description now taken in conjunction with the accompanying drawings in which:  
         [0022]    [0022]FIG. 1 is a circuit diagram of a high precision receiver with a means to compensate hysteresis in accordance with the present invention.  
         [0023]    [0023]FIGS. 2 a - 2   d  show voltage levels illustrating the operation of the receiver in accordance with the preferred embodiment of the present invention.  
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0024]    An example embodiment of the present invention is described with reference to FIG. 1. Presented in FIG. 1 is a receiver  1  having an input means for receving an input signal V input  and a reference signal V ref , and an output means for producing an output digital signal V output  varying from a high voltage level to a low voltage level depending on whether a threshold is crossed by the input signal V input . It shall be noted that the notation such as V input , V ref , V output  and the like here define a signal and/or its voltage. The receiver comprises a hysteretic comparator  10  and a reference signal adjusting means  20 . The comparator  10  has a first input  13  and a second input  15 . An input signal is fed to the first comparator input  13 ; thus, the input  13  makes up the receiver input means. The second comparator input  15  receives a threshold signal from the signal adjusting means described below in more detail. The output  11  of the comparator  10  makes up the receiver output means and provides said output signal V output .  
         [0025]    The design of a hysteretic comparator is well-known to those skilled in the art, and thus not specified in detail here (see, e.g. The Art of Electronics, second edition by Paul Horowitz and Winfield Hill, Cambridge University Press, 1980, 1989, ISBN 0521-37095-7, pages 229 to 231). It is well known, however, that the output signal voltage V output  of a hysteretic comparator is high when the input signal is above a first threshold, and is low when the input signal is below a second threshold. It shall be noted that the first threshold and the second threshold are functions of the reference signal V ref . These two thresholds differ from one another by a hysteresis voltage.  
         [0026]    The receiver further comprises a reference signal adjusting means  20  including an offset signal generator  21 , an adder/subtractor  22  and a multiplexor  23 .  
         [0027]    The adder/subtractor  22  has an input  24  for said reference signal. This input makes up the adjusting means signal input. Further, the adder/subtractor  22  has an input  25  for an offset signal generated by the offset signal generator. An offset signal V offset  is a constant-voltage signal of substantially half the hysteresis voltage. The design of a generator for producing this kind of signal is well-known to those skilled in the art, and thus not specified in detail here. At the output, the adder/subtractor  22  provides a difference and sum of these reference signal and offset signal. The design of an adder/subtractor for producing a sum and difference of two inputted signals is well known to those skilled in the art, and thus not specified in detail here. Both the difference and sum of the reference signal and offset signal is received at respective inputs  26  and  27  of the multiplexor  16 . The multiplexor  16  has a control input  28 . To the control input  28 , said output signal V output  is fed via a feedback line  29  from the output  11 . A delay means, e.g. a vernier  30  is incorporated in the feedback line. The vernier  30  is set in such a way that V offset  is added to or subtracted from, the reference signal with a delay about the half period of the input signal. The design of a multiplexer for switching between two inputted signals by control of a control signal is well known to those skilled in the art, and thus not specified in detail here.  
         [0028]    At the multiplexor  23  output  31  that makes up said adjusting means output a threshold signal is produced. The multiplexor  23  output  31  is connected to the comparator second input  15 . Thus, the threshold signal V threshold  is fed to the comparator  10 .  
         [0029]    The voltage V threshold  is not constant but depends on whether V output  is at a high level or a low level. In particular, when V output  is high, the reference signal adjusting means  20  produces V threshold  as a sum of V ref  and V offset . Similarly, when V output  is low, V ref  is decreased by V offset  that is half the hysteresis voltage. V offset  is added to or subtracted from, the reference signal with a delay of about the half period of the input signal.  
         [0030]    The operation of the receiver  10  is illustrated in FIGS. 2 a - 2   d.    
         [0031]    According to the invention, to compensate the skew caused by the comparator hysteresis, a dynamic threshold is used, whereby when a high voltage or logical “one” is currently outputted, the threshold is shifted up by half the hysteresis value, and when a low voltage or logical “zero” is outputted, the reference is respectively shifted down. This will reduce or totally eliminate the skew caused by the comparator hysteresis.  
         [0032]    As illustrated in FIG. 2 a,  when a comparator does not have a hysteresis, a typical input signal will cross a constant threshold when the voltage of this signal reaches V ref ; i.e. at moments t 1 , t 2 , t 3  and t 4 . However, with a hysteretic comparator, the threshold will be crossed later, when the voltage of the rising input signal reaches the first actual threshold value V 1threshold , and when the voltage of the falling input signal reaches the second actual threshold value V 2threshold , i.e. at moments t 1 ′, t 2 ′, t 3 ′, t 4 ′, not at the desired moments t 1 , t 2 , t 3 , t 4 . Thus, the output signal shown in FIG. 2 b  will switch between “one” and “zero” with a delay or skew.  
         [0033]    According to the invention, the reference signal is adjusted as illustrated in FIG. 2 c.  Thus, with the delay Δt (of about half period of the input signal) after the moment when the output signal has switched from “zero” to “one” at t 1 , the reference voltage V ref  is increased by V offset , by means of the reference signal adjusting means  20 . Therefore, actually, the next time the threshold is crossed, and the output signal switches from “one” and “zero” at the moment t 2 , as desired. With the delay Δt after t 2 , the reference voltage V ref  is decreased by V offset , therefore, actually, the next time the threshold is crossed, and the output signal switches from “zero” to “one” at the moment t 3 , as desired.  
         [0034]    The delay Δt is introduced to avoid switching the threshold at the same moment as the output signal is switched, that can cause the receiver circuit oscillation.  
         [0035]    It shall be appreciated that though the example embodiment has been described with reference to voltage levels, the invention may be as well implemented with respect to current levels. Thus, the described embodiments of the inventions are intended to be exemplary, and numerous variations and modifications will be apparent to those skilled in the art.