Abstract:
A resistor circuit having its impedance controlled by a DC voltage is provided. The resistor circuit includes a first resistor with an expected impedance. The circuit also includes a second resistor connected in series with a DC voltage controlled transistor. The first resistor is placed in parallel with the series connection of the second resistor and the transistor. Adjustments to the impedance of the circuit occur by adding or removing the impedances of the second resistor and transistor by varying the DC voltage applied to the transistor. In doing so, the impedance of the resistor circuit will be controlled to match a desired impedance regardless of the variations caused by the manufacturing process, operating temperature or operating power supply voltage.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     This invention relates generally to the field of integrated circuits and, more particularly, to a resistor circuit with a DC voltage control. 
     2. Description of the Related Art 
     Resistors are frequently incorporated into integrated circuits. One well known technique for fabricating and using resistors within an integrated circuit is to deposit a layer or strip of polysilicon material onto a semiconductor substrate. The polysilicon strip, with contacts used to form electrical connections, forms a passive resistor (also referred to in the art as a polysilicon resistor). The polysilicon material has a known resistivity, expressed in Ω/cm 2 , and the resistance of the polysilicon resistor is directly related to the length of the polysilicon strip used to form the resistor. 
     FIG. 1a illustrates a polysilicon resistor 10 formed from a layer or strip of polysilicon material 12. The resistor 10 has two contacts 14, 16 used to form electrical connections between the resistor 10 and other circuit elements. As illustrated in FIG. 1a, the polysilicon resistor 10 is connected between an input signal IN and a supply voltage V SD . FIG. 1b illustrates the electrical circuit of FIG. 1a including polysilicon resistor 10 of FIG. 1a represented by its known impedance R 12 . 
     Although the use of polysilicon resistors provides an attractive and convenient method for incorporating resistors within integrated circuits, the use of such resistors is not without problems. One known problem, for example, is that the sheet resistance of the polysilicon material varies. The variation can be as large as ±30 percent of the expected impedance. The sheet resistance, and thus, the impedance of the polysilicon resistor, is effected by variations in the manufacturing process. In addition, the impedance of the polysilicon resistor is effected by operating temperature and power supply voltage variations which are difficult to control when the polysilicon resistor is in operational use. 
     This is a particular problem in applications requiring the polysilicon resistors to be maintained at a precise impedance. In high speed signal transmission environments, for example, the impedance of an integrated circuit that is sending or receiving a signal over a signal path must be a precise value. When a signal exits an integrated circuit, travels an appreciable distance along the signal path and enters another integrated circuit, signal reflections can be experienced from impedance discontinuities at any point along the signal path. These undesirable reflections result in reduced noise immunity and increase the time for the signal to become, and remain, valid at the far end of the signal path. It is well known, however, that when the signal path is viewed as a transmission line with a characteristic impedance, undesirable reflections are eliminated when the transmission line is terminated at the sending and/or receiving ends with an impedance having a value equal to the characteristic impedance of the transmission line. 
     FIGS. 1a and 1b illustrate the use of a polysilicon resistor 10 to terminate a transmission line 20 in a high speed transmission environment. The length of the polysilicon material 12 used to create the polysilicon resistor 10 is chosen to match the impedance of the transmission line 20. However, with possible variations as large as ±30 percent of the desired impedance, undesirable reflections and transmission problems may occur. 
     Accordingly, there is a desire and need for an integrated circuit containing polysilicon resistors with well controlled impedances to overcome resistor impedance variations which may be caused by variations in the manufacturing process, operating temperature or operating power supply voltage. 
     SUMMARY OF THE INVENTION 
     The present invention provides a resistor circuit with a well controlled impedance which overcomes impedance variations caused by variations in the manufacturing process, operating temperature or operating power supply voltage. 
     The above and other features and advantages of the invention are achieved by providing a resistor circuit having its impedance controlled by a DC voltage. The resistor circuit includes a first resistor with an expected impedance. The circuit also includes a second resistor connected in series with a DC voltage controlled transistor. The first resistor is placed in parallel with the series connection of the second resistor and the transistor. Adjustments to the impedance of the circuit occur by adding or removing the impedances of the second resistor and transistor by varying the DC voltage applied to the transistor. In doing so, the impedance of the resistor circuit will be controlled to match a desired impedance regardless of the variations caused by the manufacturing process, operating temperature or operating power supply voltage. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The foregoing and other advantages and features of the invention will become more apparent from the detailed description of the preferred embodiments of the invention given below with reference to the accompanying drawings in which: 
     FIG. 1a illustrates a conventional resistor circuit including a polysilicon resistor; 
     FIG. 1b illustrates the resistor circuit of FIG. 1a where the polysilicon resistor is represented by its known impedance; 
     FIG. 2a illustrates a resistor circuit constructed in accordance with the present invention; 
     FIG. 2b illustrates the resistor circuit of FIG. 2a where the polysilicon resistors are represented by their known impedance; 
     FIG. 3 illustrates a graph of the I-V characteristics of a MOS transistor; and 
     FIG. 4 illustrates an exemplary circuit used to generate a DC control voltage for controlling the impedance of the resistor circuit of FIGS. 2a and 2b. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 2a illustrates a resistor circuit 40 constructed in accordance with the present invention. The circuit 40 includes two polysilicon resistors 50, 60 and a N metal-oxide semiconductor (NMOS) transistor 70. In a preferred embodiment, the circuit 40 is used to terminate a transmission line 80 in a high speed transmission environment. It must be noted that the present invention can be used in any integrated circuit or application requiring a controlled impedance and is not to be limited to a high speed transmission environment. It must also be noted the transistor 70 can be a PMOS transistor or any transistor with similar characteristics as will be described below. 
     The first polysilicon resistor 50 is formed from a layer or strip of polysilicon material 52. The resistor 50 has two contacts 54, 56 used to form electrical connections between the resistor 50 and other circuit elements. In a preferred embodiment the polysilicon resistor 50 would be connected between the transmission line 80 and a supply voltage V SD , where V SD  can be equal to the ground potential or any supply voltage. An input signal IN travelling along the transmission line 80 is also illustrated. 
     The second polysilicon resistor 60 is also formed from a layer or strip of polysilicon material 62. The resistor 60 has two contacts 64, 66 used to form electrical connections between the resistor 60 and other circuit elements. The second polysilicon resistor 60 is connected in series with the source terminal of the NMOS transistor 70. In a preferred embodiment the polysilicon resistor 60 would also be connected to the transmission line 80. It must be noted that for illustrative purposes only, the resistors 50, 60 are polysilicon resistors and that any type of resistor or impedance element suitable for use within an integrated circuit may be used as the resistors 50, 60. 
     The source terminal of the transistor 70 is connected to the supply voltage V SD . Therefore, the series connection of the transistor 70 and the second resistor 60 is connected in parallel with the first resistor 50. The gate terminal of the transistor 70 is connected to a DC control voltage V DC . 
     FIG. 2b illustrates the resistor circuit 40 where the polysilicon resistors 50, 60 are represented by their known impedances R 50 , R 60 . Although not shown, the transistor 70 has an impedance R 70 . As will be discussed below, the impedances R 50 , R 60 , R 70  will be chosen such that the circuit 40 always has a desired output impedance. In a preferred embodiment, the desired impedance would be the impedance of the transmission line 80. 
     The circuit 40 is designed such that its output impedance is the impedance R 50  of the first resistor 50 when the first resistor 50 has an impedance R 50  matching the desired impedance. To achieve this, the impedances R 60 , R 70  are switched out of the circuit 40 by reducing the voltage applied to the gate of the transistor 70 below its threshold voltage. In the situations where the first resistor 50 has an impedance R 50  that is larger than the desired impedance, the circuit&#39;s 40 output impedance consists of the combination of all of the impedances R 50 , R 60 , R 70 . This is done by switching in the impedances R 60 , R 70  by increasing the voltage being applied to the gate of the transistor 70. The series combination of the transistor&#39;s 70 impedance R 70  and the second resistor&#39;s 60 impedance R 60  is combined in parallel with the impedance R 50  to create a circuit 40 impedance that matches the desired impedance. 
     It is desirable to have the impedance R 50  of the first resistor 50 match the desired impedance. As stated earlier, the impedance R 50  of the first polysilicon resistor 50 is directly related to the length of the polysilicon material 52 used to create the resistor 50. The sheet resistance, however, of the polysilicon material 52 can vary as much as ±30 percent of the expected impedance R 50  due to processing, temperature and power supply variations. Therefore, the length of the polysilicon material 52 used for the first resistor 50 is selected to be approximately 30 percent larger than the desired impedance for the resistor circuit 40. For example, if the circuit 40 were to be used to terminate a 50Ω transmission line 80, then the length of the polysilicon material 52 used for the first resistor 50 is selected such that its expected impedance R 50  is approximately 65Ω while its actual impedance R 50  can vary between 50Ω and 80Ω. 
     To compensate for the possible variations of the first resistor&#39;s 50 impedance R 50 , the circuit 40 is designed to use the parallel combination of the first resistor 50 with the series connection of the second resistor 60 and transistor 70, as described above, when the impedance R 50  of the first resistor 50 is larger than the desired impedance. It must be noted that any processing variations that occur in the first resistor 50 will also occur in the second resistor 60 since they will be manufactured in the same process. Thus, it is possible to choose the impedance R 60  of the second resistor 60 and the impedance R 70  of the transistor 70 such that their series combination when combined in parallel with the impedance R 50  of the first resistor 50 will cause the circuit&#39;s 40 output impedance to match the desired impedance. 
     It must be noted that the impedance R 70  of the transistor 70 will vary with the voltage applied to it since NMOS transistors have non-linear I-V characteristics. Referring now to FIG. 3, it can be seen that NMOS transistors have a very small linear region 100 and a much larger non-linear region 102. The slope of these regions 100, 102 represent the conductance (the inverse of impedance) of a NMOS transistor. The typical linear region 100 spans only a few tenths of a volt. Therefore, when a drain-to-source voltage on the CMOS transistor 70 becomes greater than a few tenths of a volt, its impedance R 70  increases dramatically. This provides an infinite number of potential impedances R 70  for the transistor 70 which when combined with the impedances R 50 , R 60  of the resistors 50, 60 bolsters the circuit&#39;s 40 ability to maintain a well controlled impedance. 
     In operation, the impedance of the circuit 40 is controlled by altering the DC voltage applied to the gate of the transistor 70. FIG. 4 illustrates an exemplary control circuit 110 used to generate and apply the proper DC threshold voltage to the transistor 70. It must be noted that this circuit 110 is only one exemplary technique of controlling the impedance of the circuit 40 and the invention is not to be limited solely to this technique. The circuit 110 includes a reference circuit 120 and two operational amplifiers (op-amps) 112, 114. The reference circuit 120 is exactly the same as the resistor circuit 40 (FIG. 2b ) because it has been manufactured by the same process that manufactured circuit 40. This way, any variations in the resistor circuit 40 are also present in the reference circuit 120. The one difference between the reference circuit 120 and the resistor circuit 40 is that a reference resistor R REF  replaces the transmission line 80 in the reference circuit 120. The reference circuit 120 is connected to the non-inverting terminal of the first op-amp 112. The inverting terminal of the first op-amp 112 is connected to a reference voltage V REF . The output of the first op-amp 112 is connected to the gate of the transistor 70 of the reference circuit 120 to provide further control of the reference circuit 120 and to the non-inverting terminal of the second op-amp 114. The output of the second op-amp 114 is used as the DC control voltage V DC  to the resistor circuit 40 and is also fed back into its inverting terminal. Preferably, the second op-amp 114 is a unity gain amplifier which provides high impedance isolation. 
     The circuit 110 operates as follows. The reference voltage V REF  and the reference impedance R REF  are chosen such that the reference circuit 120 will simulate the resistor circuit 40 under operating conditions, such as, for example, when the circuit 40 is connected to a transmission line 80. The reference impedance R REF  simulates the desired impedance while the reference voltage V REF  is the voltage required by the reference circuit 120 to achieve the reference impedance R REF . Accordingly, the reference voltage V REF  and impedance R REF  are application dependent. 
     The first amplifier 112 generates an output that causes the reference circuit 120 to have an impedance matching the reference impedance R REF . Since the reference circuit 120 is exactly the same as the resistor circuit 40, the output of the first amplifier also causes the resistor circuit 40 to have the desired impedance. Initially, however, it is preferred that the output from the first amplifier 112 be fed through the second amplifier 114 to provide high impedance isolation prior to being sent to the resistor circuit 40. Accordingly, the output of the second amplifier is the DC control voltage V DC . Thus, the control circuit 110 provides a DC control voltage V DC  that can adjust the impedance of the resistor circuit 40 to compensate for any processing, operating temperature or power supply voltage variations. 
     Although the present invention has been described as part of an integrated circuit, it must be noted that the present invention may be utilized in any type of circuit, integrated or not, where a controlled impedance is desired. It must also be noted that the resistor circuit 40 can use additional resistors or transistors other than the second resistor 60 and the transistor 70 to help control the impedance of the circuit 40. 
     While the invention has been described in detail in connection with the preferred embodiments known at the time, it should be readily understood that the invention is not limited to such disclosed embodiments. Rather, the invention can be modified to incorporate any number of variations, alterations, substitutions or equivalent arrangements not heretofore described, but which are commensurate with the spirit and scope of the invention. Accordingly, the invention is not to be seen as limited by the foregoing description, but is only limited by the scope of the appended claims.