Abstract:
A folded cascode device senses the drain current of a source follower, and a current mirror device multiplies the sensed drain current for application to an output load. The source follower and the current mirror device are preferably of the same type (e.g., both NMOS). The resulting composite source follower provides relatively wide bandwidth at relatively low power. The folded cascode allows (NMOS) source and sink control. Using current mirror feedback reduces the stability problems associated with other solutions that rely on a voltage feedback stage. Composite source followers of the present invention can be used in any traditional buffer applications, such as in operational amplifiers, regulators, or high-speed signal paths.

Description:
BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention relates to electronics, and, in particular, to source follower circuits. 
   2. Description of the Related Art 
   Source followers are used to buffer signals and provide low output impedance to drive resistive loads. Traditional source followers have load drive capability limited to the quiescent current in the buffer. In addition, traditional source followers require too much power for many applications. 
   To reduce power dissipation (and area) required to reach a given output resistance, a super source follower configuration is sometimes used. See P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer,  Analysis and Design of Analog Integrated Circuits,  4 th  ed., John Wiley &amp; Sons, Inc., New York, 2001, pp. 213–215, the teachings of which are incorporated herein by reference. Unfortunately, the PMOS boost of this solution is too slow for many applications. 
   U.S. Patent Publication No. 2002/0175761 A1 (Bach et al.), the teachings of which are incorporated herein by reference, describes a PMOS version of a folded source follower. Unfortunately, this PMOS super source follower is also too slow for many applications. 
   SUMMARY OF THE INVENTION 
   Problems in the prior art are addressed in accordance with the principles of the present invention by a composite source follower with enhanced drive. According to certain embodiments of the present invention, the drain current of a source follower (e.g., an NMOS source follower) is sensed, e.g., with a folded cascode device. The sensed current from the folded cascode is multiplied to the output load using a current mirror device of the same type as the source follower. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     Other aspects, features, and advantages of the present invention will become more fully apparent from the following detailed description, the appended claims, and the accompanying drawings in which like reference numerals identify similar or identical elements. 
       FIG. 1  shows a schematic circuit diagram of a composite source follower, according to one embodiment of the present invention. 
   

   DETAILED DESCRIPTION 
   Reference herein to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments necessarily mutually exclusive of other embodiments. 
     FIG. 1  shows a schematic circuit diagram of a composite source follower  100 , according to one embodiment of the present invention. At a functional level, composite source follower  100  comprises a current source configured to provide a (relatively) constant current to the rest of the circuit, a source follower configured to receive an input signal VIN, a folded cascode device connected to sense the drain current of the source follower, and a current mirror device connected to multiply the sensed drain current for application to an output load connected at the source follower output VOUT. 
   At the device level, composite source follower  100  comprises five MOS transistors M 0 –M 4 . In the implementation shown in  FIG. 1 , transistors M 0 –M 2  are NMOS devices, and transistors M 3 –M 4  are PMOS devices. In an alternative implementation, M 0 –M 2  may be PMOS devices and M 3 –M 4  may be NMOS devices. 
   As shown in  FIG. 1 , the source of transistor M 3  is connected to the supply voltage Vdd, the gate of M 3  is connected to bias voltage vbp1, and the drain of M 3  is connected to (1) the source of transistor M 4  and (2) the drain of transistor M 2 . 
   The gate of transistor M 4  is connected to bias voltage vbp2, and the drain of M 4  is connected to (1) the drain of transistor M 1 , (2) the gate of M 1 , and (3) the gate of transistor M 0 . 
   The source of transistor M 1  is connected to ground. 
   The gate of transistor M 2  is connected to the input voltage VIN, and the source of M 2  is connected to (1) the drain of transistor M 0  and (2) the output voltage VOUT. 
   The source of transistor M 0  is connected to ground. 
   Transistor M 3  functions as a (relatively) constant current source for composite source follower  100 , with the current from M 3  being divided between transistor M 4  and transistor M 2 . The gate bias voltage vbp1 is preferably selected to ensure that transistor M 3  stays in saturation for all expected operations of composite source follower  100 . 
   Transistors M 0  and M 2  are configured as a source follower. In particular, with the input VIN applied to the gate of M 2 , and both the source of M 2  and the drain of M 0  connected to the output VOUT, the voltage at output VOUT will be proportional to (i.e., will follow) the voltage applied at input VIN. 
   Transistors M 0  and M 1  are configured as current mirrors, with the current through M 0  mirrored by (i.e., proportional to) the current through M 1 , and vice versa. In the implementation of  FIG. 1 , M 0  is three times the size of M 1 . As such, the current through M 0  will be approximately three times as large as the current through M 1 . In other implementations, this ratio of 3:1 may be different. Depending on the requirements of the particular circuit application, the magnitude of the ratio may be limited by the stability of the circuit, e.g., to a maximum of about 4:1. 
   With an appropriate gate bias voltage vbp2 applied, transistor M 4  functions as a folded cascode device that senses the drain current of transistor M 2 . The sensed current is then multiplied by the current mirror. M 4  acts as a current buffer of gain 1 that prevents the current mirror from being overloaded. 
   When an input voltage signal is applied at input VIN, a portion of the signal goes to the output VOUT via the gate-to-source of M 2 , while another portion of the signal goes to the output VOUT via the gate-to-drain of M 2 , through M 4 , and through the gate-to-drain of M 0 . This second signal path functions as a signal feed-back path in composite source follower  100 . The effect of this feed-back signal is to reduce the voltage at output VOUT even more than the voltage reduction from the first signal path (i.e., the gate-to-source of M 2 ). As a result, the voltage at output VOUT will be a smaller fraction of the voltage at input VIN than if the circuitry included only the source follower combination of transistors M 0  and M 2 . As such, composite source follower  100  can be used as a buffer for applications in which the output VOUT is to be connected to drive relatively low-impedance loads. 
   Another way to look at the operations of composite source follower  100  is to analyze the current flow. The current  13  from current source M 3  is divided into a current  12  to transistor M 2  and a current  14  to transistor M 4 , where I 3 =I 2 +I 4 . The current  12  is itself divided into a current lout at VOUT and a current  10  through transistor M 0 , where I 2 =Iout+I 0 . 
   An increase in the voltage applied at input VIN causes the current  12  through M 2  to increase. As a result, the current  14  through transistor M 4  (and therefore through transistor M 1 ) decreases. This decrease in current through M 1  is mirrored by a decrease in current through M 0 , where the decrease in current is multiplied by a factor of 3. This amplified decrease in the current  10  through M 0  causes an increased fraction of the current  12  to flow to VOUT as current lout. 
   The result is an increase in the overall transconductance of composite source follower  100  as compared to the source follower configuration of transistors M 2  and M 0  alone. In particular, the overall transconductance of composite source follower  100  is (I+Loop — gain), where Loop — gain is a function of the ratio of the transistors in the current mirror (e.g., 3 for the implementation of  FIG. 1 ). Thus, composite source follower  100  provides a four-fold increase in transconductance as compared to the source follower of M 2  and M 0  alone. 
   As used in the following claims, the term “channel nodes” refer to the source and drain of a transistor. 
   The invention has been described in the context of a composite source follower comprising a constant current source, a source follower, a folded cascode device that senses the drain current of the source follower, and a current mirror that multiplies the sensed drain current, each of which has been described as being implemented in composite source follower  100  of  FIG. 1  with specific types of devices. Those skilled in the art will understand that the invention can also be implemented using different devices. For example, the particular sizes of the individual devices might also change depending on the particular application. As mentioned previously, the NMOS devices may be replaced with PMOS devices, and vice versa. Furthermore, devices of suitable technologies other than MOS can be used, such as bipolar technology. For bipolar implementations, for example, the terms drain, source, and gate used in both this specification and in the following claims will be understood to refer to the collector, emitter, and base, respectively, of bipolar devices. Moreover, each of the constant current source, the source follower, the folded cascode device, and the current mirror might be able to be implemented using different configurations of devices to achieve similar or analogous functions. 
   Although the present invention is preferably implemented as part of a single integrated circuit, it may also be implemented using discrete devices. 
   It will be further understood that various changes in the details, materials, and arrangements of the parts which have been described and illustrated in order to explain the nature of this invention may be made by those skilled in the art without departing from the scope of the invention as expressed in the following claims.