Abstract:
An amplifier comprises: first and second supply terminals intended to receive a DC supply voltage; a first branch coupled between the first and second supply terminals and including a first terminal of application of a differential signal to be amplified; a second branch coupled between the first and second supply terminals and including a second terminal of application of the differential signal to be amplified; a third branch coupled between the first and second supply terminals and including a first amplifier having an input terminal connected to the second branch and having an output terminal configured to be coupled to a load, and a measurement element configured to measure a current in the third branch; and a fourth branch coupled between the first and second supply terminals and including a second amplifier having an input terminal connected to the first branch, and a copying element configured to copy the current measured in the third branch.

Description:
BACKGROUND 
     1. Technical Field 
     The present disclosure generally relates to electronic circuits and, more specifically, to differential input amplifiers. The present disclosure more specifically applies to amplifiers made in bipolar or BiCMOS technology. 
     2. Description of the Related Art 
     Amplifiers with a differential input pair are, especially for small signals (on the order of a few tens of millivolts at the input), particularly sensitive to imbalances (offsets) likely to be present in the currents between branches. 
     One can distinguish so-called random imbalance linked to a mismatch between the components from a so-called systematic imbalance, linked to the amplifier structure (diagram). A random imbalance varies from one chip to the other in circuits of a same wafer while a systematic imbalance is the same for all chips in a same wafer but is sensitive to manufacturing dispersions (variations from one wafer or from one wafer batch to another) as well as to the circuit operating temperature. 
     The systematic imbalance is due to the sampling, from a single one of the two differential branches, of a current to be amplified to provide the useful signal. This introduces an imbalance in the currents of the two branches, which alters the input signal measurement, and thus the accuracy of the amplification. 
     The systematic imbalance has long been neglected with respect to the random imbalance. Advances in the correction of random imbalances result in a no longer negligible systematic imbalance, in particular for low-amplitude input signals (with an amplitude lower than a few tens of millivolts). 
     BRIEF SUMMARY 
     One embodiment is a solution to correct possible systematic imbalances in an amplifier. 
     The solution can be transposed to different differential input pair amplifier structures. 
     One embodiment overcomes all or part of the disadvantages of amplifiers with differential inputs. 
     One embodiment decreases the systematic imbalance. 
     One embodiment is a solution self-adaptable to the circuit temperature operating conditions. 
     One embodiment is a solution compatible with different amplifier structures. 
     One embodiment is an amplifier with differential inputs comprising, between two terminals intended to receive a D.C. supply voltage: 
     a first branch comprising a first terminal of application of a differential signal to be amplified; 
     a second branch comprising a second terminal of application of the differential signal to be amplified; 
     a third branch comprising a first bipolar amplifier having an input terminal connected to the second branch and having an output terminal intended to be coupled to a load, and an element for measuring the current in this third branch; and 
     a fourth branch comprising a second bipolar amplifier having an input terminal connected to the first branch, and an element for copying the current measured in the third branch. 
     According to an embodiment, the measurement and copying elements are respectively associated with resistors in series. 
     According to an embodiment, the amplifiers of the third and fourth branches are formed by means of identical transistors. 
     According to an embodiment, the measurement and copying elements are formed of identical transistors. 
     According to an embodiment, the measurement element comprises a first diode-assembled transistor and the copying element comprises a second transistor mirror-assembled on the first transistor. 
     According to an embodiment, the amplifier is formed in bipolar technology. 
     According to an embodiment, the amplifier is formed in BiCMOS technology. 
     One embodiment is a method for compensating for an imbalance between a first branch and a second branch of an amplifier with differential inputs, comprising the steps of: 
     measuring the value of a current induced by a load coupled to the second branch; and 
     reproducing a current of same value in the first branch. 
     The foregoing features and advantages will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS 
         FIG. 1  is an electric diagram of an amplifier with no systematic imbalance correction; 
         FIG. 2  is an electric diagram of an amplifier with a systematic imbalance correction; 
         FIG. 3  is a block diagram of an embodiment of an amplifier with differential inputs; 
         FIG. 4  is an electric diagram of an embodiment of an amplifier with differential inputs; 
         FIG. 5  is an electric diagram of another embodiment of an amplifier with differential inputs; 
         FIG. 6  is an electric diagram of yet another embodiment of an amplifier with differential inputs; 
         FIG. 7  partially illustrates an alternative output stage; and 
         FIG. 8  partially illustrates another alternative output stage. 
     
    
    
     DETAILED DESCRIPTION 
     For clarity, the same elements have been designated with the same reference numerals in the different drawings. Further, only those elements which are useful to the understanding of the present disclosure have been shown and will be described. In particular, the origin of the signals to be amplified and the destination of the amplified signals have not been detailed, the present disclosure being compatible with any current use. 
     In the following description, only the systematic imbalance is considered and the transistors are assumed to be matched, that is, with no random imbalance. The possible random imbalance may be addressed by other means. 
       FIG. 1  schematically shows an example of an amplifier with a differential input pair with no systematic imbalance correction. The differential pair comprises two parallel branches B 1  and B 2 , each comprising a bipolar transistor Q 1  or Q 2  in series with a current source  11  or  21 , respectively. The two branches B 1  and B 2  are in parallel between a terminal  1  of application of a first supply voltage (positive voltage Vcc in this example) and a bias current source  9 , itself connected to a terminal  2  of application of a second supply voltage (for example, the ground). In this example, transistors Q 1  and Q 2  are of type NPN and their respective emitters are connected together to a terminal of current source  9  while their respective collectors are connected to current sources  11  and  21 . The respective bases of transistors Q 1  and Q 2  define input terminals  15  and  25  of the amplifier. The collector of transistor Q 2  is further connected to the base of a transistor Q 3 , for example, of type PNP, of a third branch B 3  (amplification branch). The emitter of transistor Q 3  is directly connected to terminal  1  while its collector is connected to terminal  2  by a bias source  39 . This collector further defines an output terminal S intended to be connected to a load  8 . 
     In an amplifier such as illustrated in  FIG. 1 , base current Ib 3  of output transistor Q 3  generates a systematic imbalance between branches B 1  and B 2 . Current Ib 3  makes the respective collector currents Ic 1  and Ic 2  of transistors Q 1  and Q 2  different, even though current sources  11  and  21  are sized to provide identical currents. Assuming that transistors Q 1  and Q 2  are perfectly matched (which amounts to neglecting the random imbalance), the voltage representative of the systematic imbalance, noted Vio, corresponds to the difference between the low/emitter voltages Vbe 1  and Vbe 2  of transistors Q 1  and Q 2 . Assuming that the bias current  19  provided by bias source  9  corresponds to twice the current provided by each of sources  11  and  21 , and assuming that base current Ib 3  is very small as compared to this bias current, voltage Vio is approximately equal to Vt(2*Ib 3 /I 9 ), where Vt represents the thermodynamic voltage (kT/q, with T representing the temperature, q representing the charge of the electron and k representing Boltzmann&#39;s constant). 
     The systematic imbalance thus depends on operating temperature T of the circuit and on base current Ib 3 , and thus on current Is pulled by the load (Is=β 3 *Ib 3 , where β 3  represents the gain of amplification transistor Q 3 ). 
       FIG. 2  is an electric diagram of a usual solution for correcting the systematic imbalance in an amplifier such as shown in  FIG. 1 . 
     As compared with the diagram of  FIG. 1 , the circuit comprises a fourth branch B 4 , formed of a current source  49  and of a PNP-type bipolar transistor Q 4 . The base of transistor Q 4  is connected to the collector of transistor Q 1  while its emitter is connected to terminal  1  and its collector is connected by current source  49  to terminal  2 . Such an assembly amounts to attempting to duplicate load  8  on branch B 1  of the differential input pair. For this purpose, current source  49  is sized so that base current Ib 4  of transistor Q 4  corresponds to base current Ib 3  of transistor Q 3  in a nominal operation. 
     The systematic imbalance voltage in the assembly of  FIG. 2  can, with the same assumptions as those discussed in relation with  FIG. 1 , be expressed as follows:
 
 Vio=Vt (2( Ib 4− Ib 3)/ I 9).
 
     This systematic imbalance thus disappears if base currents Ib 4  and Ib 3  are equal. In practice, the two currents are different from each other for several reasons. First, current Ib 3  varies according to current Is surged by load  8  and the correction performed by the circuit of  FIG. 2  does not enable taking such a variation into account. Further, an imbalance linked to the current mirror used to form sources  39  and  49  is likely to generate disparities between the two branches. 
     As a result, part of the systematic imbalance, which can be expressed as Vt(ΔIb/I 9 ), where ΔIb represents the difference between currents Ib 4  and Ib 3 , is not corrected. 
     This imbalance remains dependent on the temperature, on a variation of the load, or on a manufacturing process variation between amplifier batches originating from different wafers. 
       FIG. 3  is a block diagram of an embodiment of an amplifier with differential inputs with a dynamic correction of the systematic imbalance. 
     The input stage (differential pair) is symbolized by two branches B 1  and B 2  in parallel between two terminals  1  and  2  of application of a D.C. supply voltage Vcc, branches B 1  and B 2  having input terminals  15  and  25  of application of a differential signal to be amplified. The output of branch B 2  controls an amplifier in bipolar technology  3  having its output S intended to be connected to a load  8  (LOAD) to be powered. On the side of branch B 1 , an amplifier  4  in bipolar technology, identical to amplifier  3 , is connected to a corresponding output of branch B 1  and powers a load  48 , which may be a dummy load. To dynamically correct the systematic imbalance, the current in output amplifier  3  is measured to be copied on the side of amplifier  4 , to have it vary correspondingly. Thus, if the current in the load varies, this variation is reflected on the side of balancing amplifier  4 . This operation will be better understood from the description of the following drawings. 
       FIG. 4  is an electric diagram of an embodiment of an amplifier with a differential pair at its input, in which differential pair  10 ′ is on the side of positive voltage Vcc, that is, current sources  11  and  21  of respective branches B 1  and B 2  are connected to terminal  2  (for example, the ground) and bias source  9 ′ is connected to terminal  1 . 
     In this example, transistors Q 1 ′ and Q 2 ′ of branches B 1  and B 2  are of type PNP. Current sources  11  and  21  are formed of NPN-type transistors Q 11  and Q 21 . Each transistor Q 11 , Q 21  has its emitter connected to terminal  2  by a resistor R 11 , R 21 , respectively, with transistor Q 21  being mirror-assembled on transistor Q 11  which is assembled as a diode (collector and base interconnected). Resistors R 11  and R 21  ideally have the same value but are in practice adjusted to balance branches B 1  and B 2  in the quiescent state. As a variation, an additional transistor Q 12  (shown in dotted lines), called a booster, is used to decrease the impact of the base currents of transistors Q 11  and Q 21  on the current in transistor Q 11 . The base of transistor Q 12  is connected to the collector of transistor Q 11  while its emitter is connected to the common bases of transistors Q 11  and Q 21  and its collector is connected to terminal  1  or to any other fixed voltage node. 
     On the amplification branch side, an NPN-type transistor Q 31  is interposed between the emitter of transistor Q 3  and terminal  2 . Transistor Q 31  is diode-assembled (collector and base interconnected) and is used to measure the emitter current of transistor Q 3 , and thus indirectly its collector current, which varies according to current Is pulled by load  8 . A bias current source  39  remains interposed between terminal  1  and the collector of transistor Q 3  from which output current Is is sampled. 
     A fourth branch B 4  is used to reproduce the imbalance on branch B 1 . Branch B 4  comprises, in series between terminals  1  and  2 , an NPN-type transistor Q 4  and a current source  41 , formed of an NPN-type transistor Q 41 . Transistor Q 41  has its emitter connected to terminal  2  and its collector connected to the emitter of transistor Q 4 . Transistor Q 41  is mirror-assembled on measurement transistor Q 31 , its base being connected to that of transistor Q 31 . The function of transistor Q 41  is to reproduce, on the side of transistor Q 4 , a variation of the current in transistor Q 3 . The fact of making the current in transistor Q 4  dependent on that in transistor Q 3  enables compensating, both in temperature and in charge current variation, and also in manufacturing process variation, the respective currents of the differential branches and, accordingly, considerably decreasing the systematic imbalance of the amplifier. This amounts to canceling (making negligible) difference ΔIb between base currents Ib 4  and Ib 3 . 
     Resistors R 31  and R 41  (shown in dotted lines) may be interposed between the respective emitters of transistors Q 31  and Q 41  of terminal  2 . Such optional resistors improve the accuracy of the balancing of branches B 3  and B 4  (and thus B 1  and B 2 ), but at the cost of an additional voltage drop. 
       FIG. 5  shows the electric diagram of another embodiment of an amplifier in which differential pair  10  has an inverted position with respect to  FIG. 4 , with current source  9  being connected to terminal  2  and transistors Q 1  and Q 2  being of type NPN. As compared with the assembly with  FIG. 4 , PNP-type transistors Q 11 ′, Q 21 ′, Q 31 ′, and Q 41  form current sources  11 ′,  21 ′,  31 ′, and  41 ′ on the side of terminal  1  and amplification and correction transistors Q 3 ′ and Q 4 ′ are of type PNP. In the example of  FIG. 5 , a booster PNP-type transistor Q 12 ′ has been illustrated. The operation of the assembly of  FIG. 5  can be induced from that discussed in relation with the previous drawings. 
     According to an alternative embodiment, not shown, the role of transistor Q 4  of  FIG. 4  (respectively Q 4 ′ of  FIG. 5 ) is played by transistor Q 12  (respectively Q 12 ′) which is then matched with transistor Q 3  (respectively Q 3 ′). The collector of transistor Q 41  (respectively Q 41 ′) is connected to the emitter of transistor Q 12  (respectively Q 12 ′). This amounts to connecting the junction point of transistors Q 4  and Q 41  (respectively Q 4 ′ and Q 41 ′) to the bases of transistors Q 11  and Q 21  (respectively Q 11 ′ and Q 21 ′) without connecting these bases to the collector of transistor Q 11  (respectively Q 11 ′). 
       FIG. 6  shows still another embodiment of an amplifier illustrating the fact that the transistors of the current sources may be MOS transistors. As compared with the diagram of  FIG. 4 , N-channel MOS transistors N 11 , N 21 , N 31 , and N 41  are arranged instead of transistors Q 11 , Q 21 , Q 31 , and Q 41 . Transistors N 11  and N 31  are diode-assembled (interconnected gate and drain), transistors N 21  and N 41  being mirror-assembled, respectively on transistors N 11  and N 31 . 
       FIG. 7  partially shows a variation in which load  8  is not directly connected to the collector of transistor Q 3  but via an additional branch B 5  comprising an NPN-type transistor Q 5  having its base connected to the collector of transistor Q 3 , the emitter is connected to terminal  2 , and the collector is connected to terminal  1  by a bias current source  59 . The collector of transistor Q 5  defines the output terminal intended to be connected to load  8 . This assembly illustrates that it is not necessary to reproduce the balancing system on a possible second amplification branch. Indeed, the errors generated by this branch may be neglected since they are of the second order due to the amplification already performed by transistor Q 3 , the current sampled from its collector being a base current for transistor Q 5 . 
       FIG. 8  illustrates another variation according to which transistor Q 3  is replaced by a Darlington-type amplifier assembly  3  (transistors Q 34  and Q 35 ). In such a situation, the current of the full amplification branch must be measured (transistor Q 31 ), that is, the measurement must be performed on the emitter of transistor Q 35  rather than on that of transistor Q 34 . Other amplifying assemblies may be envisaged. 
     Amplifiers  3  and  4  are selected to be identical, which means that in case of a Darlington-type assembly or other, a similar assembly must be reproduced on the side of amplifier  4 . 
     An advantage of the described embodiments is that they compensate for the systematic imbalance of an amplifier with differential inputs by making this compensation stable with respect to temperature and to manufacturing process variations. 
     Various embodiments have been described, and different variations and modifications may be envisaged and will occur to those skilled in the art. In particular, the choice between an exclusively bipolar or bipolar and MOS (BiCMOS) assembly depends on the other circuit assemblies and on the available technology, and it is possible to only have amplifiers  3  and  4  in bipolar technology, with the other components being bipolar or MOS. Further, the dimensions to be given to the different transistors and current sources depend on the application and are within the abilities of those skilled in the art based on the functional indications given hereabove. In practice, the transistors of the differential pair have the same surface, the same applying for the transistors of current sources  11  and  21 . Further, the different discussed variations may be combined. 
     Such alterations, modifications, and improvements are intended to be part of this disclosure. Accordingly, the foregoing description is by way of example only and is not intended to be limiting. 
     These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.