Abstract:
A method for fabricating a thin film transistor is provided. A conductive layer is formed on a substrate. A patterned mask is formed on the conductive layer to cover a predetermined thin film transistor (TFT) area, and at least one portion of the conductive layer exposed by the patterned mask are removed. A laser is applied to form a laser hole in the patterned mask to expose a portion of the conductive layer and the laser hole substantially corresponds to a channel region of the predetermined TFT area. The exposed conductive layer is etched to form source and drain electrodes on opposite sides of the channel region.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to a fabrication method for a thin film transistor, and more particularly to a fabrication method utilizing laser ablation technology to simplify the manufacturing of thin film transistors. 
         [0003]    2. Description of the Related Art 
         [0004]      FIG. 1   a  to  FIG. 1   e  illustrate a conventional process for manufacturing a thin film transistor in liquid crystal display using five photomasks. In  FIG. 1   a , a first conductive layer is formed on a substrate  100  by sputtering. Then, the first conductive layer is patterned to form a gate electrode  120  on the substrate  100  by a first photolithography and etching process beyond a predetermined thin film transistor area T. 
         [0005]    In  FIG. 1   b , an insulating film  140 , a semiconductor film  160 , and an ohmic contact layer  180  are sequentially formed on the gate electrode  120 . The semiconductor layer  160  and the ohmic contact layer  180  are patterned by a second photolithography and etching process to remove portions beyond the predetermined thin film transistor area T. 
         [0006]    In  FIG. 1   c , a second conductive layer is formed on the substrate  100  by sputtering. The second conductive layer and the ohmic contact layer  180  underlying the second conductive layer are patterned by a third photolithography and etching process to form a drain electrode  200   a  and a source electrode  200   b  on the predetermined TFT area T. A portion of the semiconductor layer  160  exposed by an opening serves as a channel region. More specifically, the semiconductor layer  160  is exposed by an opening located between the drain electrode  200   a  and source electrode  200   b.    
         [0007]    In  FIG. 1   d , a passivation layer  220  covers the substrate  100  and the island shaped structure on the thin film transistor area T. The passivation layer  220  is then patterned by a fourth photolithography and etching process to form a contact hole  240  therein, thereby exposing a portion of the source electrode  200   b.    
         [0008]    In  FIG. 1   e , a pixel electrode  260  is formed on a portion of the passivation layer  220  and patterned by a fifth photolithography and etching process. The pixel electrode  260  is electrically connected to the source electrode  200   b  through the connect hole  240 . 
         [0009]    As mentioned above, the process for manufacturing the thin film transistor typically requires the use of five photomasks. Since manufacturing costs are greatly dependent upon the total number of photomasks used, it is a general object in the art to save the manufacturing costs by reducing the number of photomasks. It has been proposed in other fields, to use a laser ablation process to eliminate the need for photomasks to simplify the manufacturing steps. For example, in U.S. Patent Publication No. 20050064648, irradiation of the laser beam is performed on a photothermal converting layer to transfer heat and therefore sublimate a portion of a sublimation layer thereon. U.S. Patent Publication No. 20050258478 uses laser ablation to form a groove pattern in a semiconductor film. 
       BRIEF SUMMARY OF THE INVENTION 
       [0010]    The present invention to provide a method of fabricating a thin film transistor that simplifies the manufacturing process by using laser ablation. 
         [0011]    A method of fabricating a thin film transistor comprising: forming a conductive layer on a substrate, forming a patterned mask on the conductive layer to cover a predetermined TFT area, removing at least one portion of the conductive layer not covered by the patterned mask, applying a laser to form a laser hole in the patterned mask to expose a portion of the conductive layer and the laser hole substantially corresponding to a channel region of the predetermined TFT area, and etching the exposed conductive layer to form a source electrode and a drain electrode on opposite sides of the channel region of the predetermined TFT area. 
         [0012]    A detailed description is given in the following embodiments with reference to the accompanying drawings. 
     
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0013]    The accompanying drawings illustrate one or more embodiments of the present invention and, together with the written description, serve to explain the principles of the present invention. Wherever possible, the same reference numbers are used throughout the drawings to refer to the same or like elements of an embodiment, and wherein: 
           [0014]      FIG. 1   a  to  FIG. 1   e  are cross-sections illustrating the conventional process steps of fabricating a thin film transistor using five photomasks; and 
           [0015]      FIG. 2  to  FIG. 10  are cross-sections illustrating the process steps of fabricating the thin film transistor according to a preferred embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0016]    The following description is of the embodiment of carrying out the present invention. This description is made for the purpose of illustrating the general principles of the present embodiment of the invention and should not be taken in a limiting sense. 
         [0017]    As illustrated in  FIG. 2 , a conductive layer is formed on the substrate  300  and patterned by a first photolithography and etching process to form a gate electrode  310 . Generally, the substrate  300  is a rigidity substrate such as glass, quartz, ceramic, or silicon substrate, but it may be a flexible substrate such as a plastic substrate when applied to flexible displays. Suitable materials for flexible substrates include, but are not limited to, polyethersulfone (PES), polyethylenenaphthalate (PEN), polyethylene (PE), polyimide (PI), polyvinyl chloride (PVC), polyethylene terephthalate (PET), or combinations thereof. Moreover, the substrate  300  may be formed of transparent or opaque materials, and when it is applied to OLED (organic electroluminescence light device) or flexible display field, the substrate  300  may be formed by metal substrate. 
         [0018]    Next, an insulating layer  320 , a semiconductor layer  340 , an ohmic contact layer  360 , a conductive layer  380  and a photoresist as an etch-protective mask are sequentially formed on the substrate  300  and the gate electrode  310 . The photoresist is patterned by a second photolithography process, and as illustrated in  FIG. 3 , the patterned photoresist  400  (namely patterned mask) covers a portion of the conductive layer  380  on a predetermined thin film transistor area A. Referring to  FIG. 4 , at least the portion of the conductive layer  380  not covered by the patterned photoresist  400  are removed by anisotropic etching. The material of the semiconductor layer  340  and ohmic contact layer  360  includes, but is not limited to, amorphous silicon, poly-silicon, micro-crystal silicon, single crystal silicon, or combinations thereof. The ohmic contact layer  360  may contain n type dopant or p type dopant. 
         [0019]    In  FIG. 5 , applying energy of a laser beam irradiate to a portion of the patterned photoresist  400 , and then the portion of the patterned photoresist  400  is removed by the laser ablation process to form a laser hole B therein, which exposes the conductive layer  380  located on a predetermined channel region C of the predetermined thin film transistor area A. In other words, the laser hole B is substantially corresponding to the conductive layer  380  located on the predetermined channel region C. Subsequently, the ohmic contact layer  360  and the semiconductor layer  340  beyond the predetermined thin film transistor area A is removed by anisotropic etching or isotropic etching. In other words, at least one portion of the ohmic contact layer  360  and at least one portion of the semiconductor layer  340  not covered by the patterned photoresist  400  are removed by anisotropic etching or isotropic etching. During etching, the conductive layer  380  located on the predetermined channel region C as a protective layer to prevent the underlying ohmic contact layer  360  and semiconductor layer  340  from being etched. The structure after the etching process is shown in  FIG. 6 . Although in the illustrated embodiment the etching process is performed following the laser ablation process that defines the laser hole B, it is noted, however, that this etching step can be performed prior to the laser ablation without affecting the result. Next, the conductive layer  380  and the ohmic contact layer  360  under the laser hole B are sequentially etched to define a drain electrode  380   a  and source electrode  380   b  located on opposite sides of the channel region C of the predetermined thin film transistor area A, as shown in  FIG. 7 . The photoresist layer  400  is then removed, resulting in the structure as shown in  FIG. 8 . Rather than conventional use of a photomask to define the pattern of the photoresist  400 , the present embodiment of the invention uses a laser ablation process, obviating the need for a photomask and thus conserving manufacturing costs. 
         [0020]    In laser ablation, digital exposure technique may be used to align the laser beam position and to control the power thereof automatically. Furthermore, although not necessarily required, a photomask may be used to help the alignment of the laser beam to define the laser hole B in the patterned photoresist layer  400 . 
         [0021]    Next, as illustrated in  FIG. 9 , a passivation layer  420  is formed on the conductive layer  380  including the drain electrode  380   a  and the source electrode  380   b , and patterned by a third photolithography and etching process to define a contact hole D that exposes a portion of the source electrode  380   b  or a portion of the drain electrode  380   a . As shown in  FIG. 10 , a pixel electrode  440  is formed on a portion of the passivation layer  420  and patterned using a fourth photolithography and etching process. The pixel electrode  440  is electrically connected to the source electrode  380   b  or the drain electrode  380   a  through the contact hole D. The pixel electrode  440  can be a transparent or reflective electrode dependent on display type. Suitable materials for the transparent electrode include, but are not limited to, aluminum zinc oxide (AZO), indium zinc oxide (IZO), indium tin oxide (ITO), cadmium tin oxide (CTO), or like as. Suitable materials for the reflective electrode include, but are not limited to, gold, silver, copper, iron, aluminum, titanium, tantalum, molybdenum, rubidium, tungsten, and alloys, or combinations thereof. In addition, the pixel electrode can be of trans-flective materials or a combination of transparent material and reflective material. In other words, the transparent material and the reflective material are covering the portion of the passivation layer  420 , and the portion of the transparent material is covering the portion of the reflective material by each other. Moreover, the material of the conductive layer  380  and the gate electrode  310  may be the same as the pixel electrode  440 . 
         [0022]    The pixel electrode  440  is adopted to provide a voltage to a luminescence layer (not shown) or liquid crystal layer. In other words, forming the luminescence layer on at least one portion of the pixel or filling the liquid crystal layer between the substrate  300  and other substrate (not shown), the liquid crystal layer contact with the pixel electrode. The luminescence layer may include inorganic materials used in light emitting device (LED) or organic materials used in electroluminescence light device (ELD) such as OLED (organic light emitting device) or PLED (polymer light emitting device). 
         [0023]    The laser ablation of the embodiment of the present invention can be applied to the manufacture of color filters, such as the thin film transistor formed on a color filter namely array on color filter (AOC), or the color filter formed on the thin film transistor namely color filter on array (COA) designs. 
         [0024]    While the present invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the present invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.