Abstract:
Embodiments include electronic packages and methods for forming electronic packages. One method includes providing a die and a thermal interface material on the die. A metal body is adapted to fit over the die. A wetting layer of a material comprising indium is formed on the metal body. The thermal interface material on the die is brought into contact with the wetting layer of material comprising indium. The thermal interface material is heated to form a bond between the thermal interface material and the wetting layer so that the thermal interface material is coupled to the metal body, and to form a bond between the thermal interface material and the die so that the thermal interface material is coupled to the die.

Description:
TECHNICAL FIELD  
       [0001]     Embodiments of the present invention relate generally to electronics packaging. More particularly, certain embodiments of the present invention relate to an electronic assembly including a semiconductor die which is thermally coupled through an interface material to a thermally conductive body to dissipate heat, and to manufacturing methods thereof.  
       RELATED ART  
       [0002]     Integrated circuits are generally formed on semiconductor wafers formed from materials such as silicon. The semiconductor wafers are processed to form various electronic devices thereon. The wafers are diced into semiconductor chips, which may then be attached to a package substrate. Such a chip or die may have solder bump contacts on the integrated circuit. The solder bump contacts extend downward onto contact pads of a package substrate, and are typically attached in a thermal reflow process. Electronic signals may be provided through the solder bump contacts to and from the integrated circuit. Operation of the integrated circuit generates heat in the device. Heat is conducted to an upper surface of the die, and should be conducted or convected away to maintain the temperature of the integrated circuit below a predetermined level for purposes of maintaining functional integrity of the integrated circuit.  
         [0003]     One way to conduct heat from an integrated circuit die is through the use of a heat spreader, which may be positioned above the die and thermally coupled to the die through a thermal interface material.  
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0004]     Embodiments are described by way of example, with reference to the accompanying drawings, which are not drawn to scale, wherein:  
         [0005]      FIG. 1  is a cross-sectional side view of components of an electronic assembly in accordance with an embodiment of the present invention, before being finally assembled;  
         [0006]      FIG. 2  is a view of the electronic assembly of  FIG. 1 , after heating of the assembly, in accordance with an embodiment of the present invention; and  
         [0007]      FIG. 3  is a cross-sectional view illustrating certain aspects of the electronic assembly of the embodiment shown in  FIG. 2  in greater detail.  
         [0008]      FIG. 4  is a cross-sectional view of an embodiment including a heat sink, in accordance with an embodiment of the present invention, before being finally assembled. 
     
    
     DETAILED DESCRIPTION  
       [0009]     U.S. Pat. No. 6,504,242 describes an electronic assembly including a die and a heat spreader. The heat spreader has a nickel layer formed thereon, and a gold wetting layer on the nickel layer. The nickel layer acts as a diffusion barrier. The purpose of the gold layer is to serve as a wetting layer for an indium preform positioned between the heat spreader and the die. The stack is heated and cooled to “solder” the indium to the gold. During this operation an intermetallic layer including indium and gold (AuIn 2 ) is typically also formed.  
         [0010]     Applicants have observed that thermal degradation of such an electronic assembly as described in U.S. Pat. No. 6,504,242 may occur. The thermal degradation may result in failures due to crack propagation between the indium-gold intermetallic layer and the indium layer.  
         [0011]      FIG. 1  of the accompanying drawings illustrates components of an electronic assembly  10  according to an embodiment of the present invention, before being finally assembled, including a semiconductor package subassembly  12 , a layer  14  of pure indium, a heat spreader subassembly  16 , and an adhesive sealant  18 . The layer of pure indium  14  is preferably in a preformed state. The preform may be in the form of a foil cut from a ribbon formed using a known process, such as an extrusion and rolling process. Preferably, the indium preform  14  has a thickness in the range of 5-500 microns, more preferably about 200-225 microns.  
         [0012]     The heat spreader subassembly  16  preferably includes a primary heat spreading structure  20  of copper, a thin nickel layer  22  plated on the primary heat spreading structure  20 , and an indium layer  24  plated on the nickel layer  22 . The primary heat spreading structure  20  preferably includes a horizontal heat spreading plate  28 , and sides  30  extending downward from edges of the heat spreading plate  28 . Preferably, there are four of the sides  30  which, together with the heat spreading plate  28 , form a lid or cap with an internal cavity  32  which is open to the bottom. All surfaces of the primary heat spreading structure  20  are preferably plated with the nickel layer  22 , as illustrated in  FIG. 1 . The nickel layer may act as a protective layer and diffusion barrier, depending on the specific materials being used.  
         [0013]     The indium layer  24  is preferably selectively plated on an area of the nickel layer  22  located on the lower surface of the heat spreading plate  28 , as illustrated in  FIG. 1 . The indium layer  24  may be formed by first masking surfaces of the nickel layer  22  where the indium layer  24  is not required, plating on exposed surfaces of the nickel layer  22 , and subsequently removing any masking material on surfaces of the nickel layer  22  where the indium layer  24  was prevented from plating.  
         [0014]     The indium layer  24  serves as a wetting layer for the indium preform  14 . Indium does not easily bond to nickel oxide, which may be formed on the nickel surface due to oxidation. By plating the indium onto the nickel layer, the plating process acts to clean the nickel surface so that the indium is formed in contact with nickel and a good bond will result. Certain preferred embodiments will utilize a wet plating process as known in the art for plating the indium to the nickel on the heat spreading structure  20 . The indium wetting layer  24  in certain embodiments may be formed to a thickness of about 1 micron (μm) or less, for example, about 0.2 μm. Other embodiments may, if desired, utilize a wetting layer greater than 1 μm or less than 0.2 μm.  
         [0015]     The semiconductor package subassembly  12  preferably includes a package substrate  36  and a semiconductor die  38 . The package substrate  36  may be made of a material such as, for example, an organic plastic material. Other package materials, including, but not limited to ceramics, may also be used. The semiconductor die  38  typically includes a semiconductor substrate  40  having an integrated circuit  42  of semiconductor electronic components and metal lines in a lower surface thereof.  
         [0016]     The semiconductor die  38  may further include solder bumps  44  formed on a lower surface of the integrated circuit  42 , as illustrated in  FIG. 1 . The solder bumps  44  are typically formed according to the known controlled collapse chip connect (C4) process. The solder bumps  44  are structurally secured to the semiconductor substrate  40  using a known reflow process. The solder bumps  44  are also electrically connected to the integrated circuit  42 , so that signals can be provided through the solder bumps  44  to and from the integrated circuit  42 . The semiconductor die  38  also may include a stack  46  of layers formed on an upper surface of the semiconductor substrate  40 . The stack  46  preferably includes a titanium layer, a nickel vanadium alloy layer, and a gold layer, which are sequentially deposited on top of one another. The preform of indium  14  is preferably approximately 225 μm thick, has a thermal conductivity of approximately 80 W/mK, and is located on an upper surface of the gold layer of the stack  4 , as illustrated in  FIG. 1 . Other preform thicknesses are also possible. In addition, if the preform is made of a material other than pure indium, the thermal conductivity may also vary from 80 W/mK.  
         [0017]     An adhesive sealant  18  is located on lower surfaces of the sides  30  of the heat spreader structure  20 . The heat spreader subassembly  16  is located over the semiconductor die  38  and the preform of indium  14 . Lower surfaces of the adhesive sealant  18  contact an upper surface of the package substrate  36  as illustrated in  FIG. 1 . A lower surface of the indium wetting layer  24  contacts an upper surface of the preform of indium  14 . The preform  14  may be in the form of a foil.  
         [0018]     A clamp (not shown) is then located over the components of the electronic assembly  10 , and the electronic assembly  10 , together with the clamp, is heated. The heating may be carried out by sending the clamped electronic assembly through a reflow furnace. A flux material as know in the art may be used, although in certain embodiments a flux may not be necessary. The components of the electronic assembly  10  are heated in the reflow furnace, and subsequently allowed to cool. The reflow furnace heats the components of the electronic assembly  10  to a temperature of, for example, approximately 180° C. Such a temperature is above a melting temperature of pure indium, which is approximately 157° C. The temperature may preferably be about 20-30° C. above the melting point of the preform material.  
         [0019]      FIG. 2  illustrates the electronic assembly  10  after it is allowed to cool. Cooling of the indium  14  results in its solidification. By heating and cooling the indium  14 , the indium is “soldered” to both the indium layer  24  and the gold layer of the stack  46 . A highly effective path for heat to conduct from the die  38  to the heat spreading structure  20  is formed. The sides  30  of the heat spreading structure  20  are also secured to the substrate  36  by the adhesive sealant  18 .  
         [0020]     The order that the various sections of the assembly  10  are assembled may be varied. For example, if desired, the die  38  may be attached to the package substrate prior to placing the preform  14  on the die  40  and prior to placing the heat spreader assembly (with wetting layer  24 ) on the preform  14  and prior to heating the assembly to melt the preform  14  and couple the sections together. Alternatively, the die  38  could be coupled to the package substrate  36  after heating the assembly and coupling the sections together.  
         [0021]     In use, electronic signals are transmitted through the solder bumps  44  between the package substrate  36  and the integrated circuit  42 . Operation of the integrated circuit  42  causes heating of the semiconductor die  38 . Heat transfers from the semiconductor die  38  through the indium  14  thermal interface material to the heat spreader subassembly  16 . The heat spreads sideways through the heat spreader subassembly  16  and is conducted or convected from an upper surface of the heat spreader subassembly  16 .  
         [0022]      FIG. 3  is a cross-sectional view showing the components of the assembly  10  of  FIG. 2  in greater detail. Some of the nickel layer  22  and indium layer  24  are consumed to form a nickel-indium intermetallic  50 . In addition, a gold-indium intermetallic layer  52  is formed by some of the indium from the indium layer  14  and the gold layer of the stack  46 .  
         [0023]      FIG. 4  is a cross-sectional view of an embodiment showing the components of  FIG. 1  and further including a heat sink  56 . The heat sink  56  includes fins  58 . The heat sink  56  may be coupled to the heat spreading structure  20  using a similar manner to that described above for coupling the die and the heat spreading structure  20 , with an indium wetting layer  60  on the nickel layer  22  on the heat spreading structure  20 , a preform  62  (which may be the same as preform  14  described above), and another indium wetting layer  64  on a surface of the body heat sink  56 . In such an embodiment, the heat sink  56  may include a layer such as nickel that the indium wetting layer is bonded to. Another embodiment may omit the heat spreader subassembly  16 .  
         [0024]     A variety of modifications to the embodiments may also be made. For example, in certain embodiments, a wetting layer formed from indium may be coupled to a variety of bodies including, but not limited to the heat spreading structure  20  and the heat sink  56  described above. Such bodies may have a variety of sizes, geometries and materials. For example, the heat spreading structure  20  may be formed from other materials including, but not limited to aluminum.  
         [0025]     Furthermore, depending on the materials used, in certain embodiments the indium wetting layer may be formed directly on a body without the need of an intermediate layer such as a nickel layer. In addition, in certain embodiments a variety of materials in addition to pure indium may be used as the preform material, including, for example, indium alloys such as indium-tin and indium-bismuth. Other materials including, for example, tin and tin alloys may also be utilized in certain embodiments as the perform material. Certain embodiments may also replace or modify one or more materials of the stack  46  on the semiconductor substrate  40 . For example, the gold layer in the tri-stack may in certain embodiments be replaced with indium.  
         [0026]     While certain exemplary embodiments have been described above and shown in the accompanying drawings, it is to be understood that such embodiments are merely illustrative and not restrictive of the current invention, and that this invention is not restricted to the specific constructions and arrangements shown and described since modifications may occur to those having ordinary skill in the art.