Abstract:
Ripple reduction loop for chopper amplifiers and chopper-stabilized amplifiers. The ripple reduction loop includes a first chopper, a first amplifier having an input coupled to an output of the first chopper, a second chopper having an input coupled to an output of the first amplifier, a second amplifier having an input coupled to an output of the second chopper, a third chopper, an output of the second amplifier having its output capacitively coupled to an input of the third chopper as the only input to the third chopper, a third amplifier coupled as an integrator having an input coupled to an output of the third chopper, an output of the integrator being coupled to combine with the output of the first amplifier as the input of the second chopper, and at least one Miller capacitor coupled between an output of the second amplifier and the input of the second amplifier. Various embodiments are disclosed.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This application claims the benefit of U.S. Provisional Patent Application No. 61/149,532 filed Feb. 3, 2009. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to the field of operational and instrumentation amplifiers. 
     2. Prior Art 
     U.S. Pat. No. 7,209,000 entitled “Frequency Stabilization of Chopper-Stabilized Amplifiers” discloses frequency stabilization of chopper-stabilized amplifiers using multipath hybrid single or double nested Miller compensation, the disclosure of which is hereby incorporated by reference. The compensation may provide a desired 6 dB/oct roll off for both instrumentation amplifiers and operational amplifiers. 
     Another important reference is a paper presented at the AACD in Milan on April 8-10 by Johan H. Huijsing of Delft University of Technology, and published in Analog Circuit Design, edited by Michiel Steyaert, Arthur van Roermund, and Herman Casier, Springer Science + Business Media B.V. 2009, pp. 99-123, referred to herein as the Springer paper, and also hereby incorporated herein by reference. It does not include the Ripple Reduction Loop of the present invention. The new drawings presented herein are derived from that paper, but do include the Ripple Reduction Loop of the present invention. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a diagram illustrating one embodiment of an operational amplifier in accordance with the present invention. 
         FIG. 2   a  is a diagram illustrating another embodiment of an operational amplifier in accordance with the present invention, this embodiment having an offset compensation loop. 
         FIG. 2   b  is a diagram illustrating another embodiment of an operational amplifier in accordance with the present invention, this embodiment having an alternate offset compensation loop. 
         FIG. 2   c  is a diagram illustrating a further embodiment of an operational amplifier in accordance with the present invention, this embodiment having a further alternate offset compensation loop. 
         FIG. 3  is a diagram illustrating one embodiment of a current-feedback instrumentation amplifier in accordance with the present invention. 
         FIG. 4   a  is a diagram illustrating another embodiment of a current-feedback instrumentation amplifier in accordance with the present invention, this embodiment having an offset compensation loop. 
         FIG. 4   b  is a diagram illustrating another embodiment of a current-feedback operational amplifier in accordance with the present invention, this embodiment having an alternate offset compensation loop. 
         FIG. 4   c  is a diagram illustrating still another embodiment of a current-feedback operational amplifier in accordance with the present invention, this embodiment having a further alternate offset compensation loop. 
         FIG. 5  is a diagram illustrating still another embodiment of an instrumentation amplifier in accordance with the present invention. 
         FIG. 6  is a diagram illustrating a typical cascode buffer that may be used in the embodiment of  FIG. 5 . 
         FIG. 7  is a diagram illustrating still another embodiment of an operational amplifier in accordance with the present invention. 
         FIG. 8  is a diagram illustrating still another embodiment of an instrumentation amplifier in accordance with the present invention. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The two references cited in the prior art section are of background interest, but do not include the Ripple Reduction Loop of the present invention. The drawings presented herein for the present invention are derived from the Springer paper. As used herein and in the claims to follow, the word amplifier means an amplifier comprising one or more stages. Also while the various embodiments are disclosed herein with respect to exemplary embodiments using transconductance amplifiers, and where more specific, are shown as using CMOS devices, the present invention is not so limited, and may be realized, by way of example, using voltage amplifiers and/or bipolar transistors. 
     The operational amplifier of  FIG. 1  may be compared to FIG. 8.1 of the Springer paper.  FIG. 1  herein clearly shows that amplifier G 5 , or G 7  in FIG. 16 or FIG. 8 of the U.S. Pat. No. 7,209,000, are no longer needed. In  FIG. 1  herein, there is only one feed-forward path through Gm 2 . Therefore, Miller capacitors CM 11  and CM 12  are sufficient to obtain a straight 6 dB per octave roll-off. CM 31  and CM 32  of FIG. 8.1 of Springer (or Cm 51  and Cm 52  in FIG. 16 or FIG. 8 of the &#39;000 patent) need not anymore obey the rule CM 3 =CM 1 (Gm 5 /Gm 2 ) which the &#39;000 patent describes. Hence CM 31  and CM 32  can be freely chosen to optimize the ripple reduction of the present invention. 
     The ripple reduction loop functions quite simply. If Gm 2  between the choppers has an offset Vos and there is no input voltage, than the output of Gm 2  has a DC output offset current (equal to Vos×Gm 2 ). Chopper 2  converts this DC current into a square-wave current at its output. The output Miller integrator stage Gm 1  changes the square wave input current into a triangle output voltage, referred to herein as “the output ripple”. The ripple reduction capacitors Cm 31  and Cm 32  sense this triangular voltage and transform it into a square wave current. That square wave current is rectified by the chopper Ch 3  and integrated by integrator Gm 4 . The output voltage of Gm 4  is used by control amplifier Gm 3  to correct the offset of Gm 2  if the sign in the ripple reduction loop is correct. The integrator G 4  goes on integrating as long as there is a ripple. When the ripple is reduced to virtually zero, the output current of control amplifier Gm 3  precisely corrects the offset of Gm 2 . The result is a simple chopper amplifier without offset and without ripple. (Amplifier Gm 1  has an input offset, but that offset, when referred back to the input v id  to the amplifier system, is reduced by the gain of amplifier Gm 2 ). 
     The operational amplifier of  FIG. 2   a  shows how one can reduce the offset of Gm 4  for example by inserting an offset reduction loop with an auto-zeroed Gm 8 , integrator Gm 7  and control amplifier Gm 6 . This was also needed in FIG. 8.2 of the Springer paper to further reduce ripple. The offset reduction of Gm 4  can be implemented in many ways. 
     In the circuit of the  FIG. 2   a , the offset reduction of Gm 4  is needed to take away the ripple floor that is otherwise introduced by the offset of Gm 4 . This can be explained as follows: If Gm 4  has offset, the feedback around Gm 4  makes this appear as a hard offset voltage Vos 4  in front of Gm 4 . This offset appears as a square wave with a peak-to-peak value of 2Vos 4  in front of the chopper Ch 3 . The capacitors CM 31  and Cm 31  are charged back and forth with this voltage. This charge is rectified by Ch 3 , integrated by Gm 4 , amplified by Gm 3 , and appears as an offset of Gm 2 , or as a ripple at the output. The peak-to-peak output ripple can therefore never be lower as 2Vos 4 , as that ripple voltage is needed to compensate the ripple at the left hand side of Ch 3 . While  FIG. 2   a  shows an auto-zeroed Gm 8  in the offset compensation loop, any of many other offset compensation loops may be used. As an example,  FIG. 2   b  shows a chopper operational amplifier with a ripple-reduction loop. The ripple-reduction loop has an offset-compensation loop around integrator Gm 4 . The offset-compensation loop consists of an auto-zero amplifier Gm 8 , a passive integrator Cint 7 , and a control amplifier Gm 6 . If amplifier Gm 4  has offset, then this is sensed by the auto-zero amplifier Gm 8 . The output current of Gm 8  is integrated by a passive integrator Cint 7 . The voltage Vint on Cint 7  is used by control amplifier Gm 6  to cancel the offset of the integrator Gm 4 , as in  FIG. 2   a.    
     A further alternate embodiment of offset compensation is shown in  FIG. 2   c . The offset-compensation loop, referred to herein and in the claims as a chopper loop, consists of the chopper Ch 3 , a sense amplifier Gm 8 , a chopper Ch 4 , an active integrator Gm 7 , and a control amplifier Gm 6 . If the integrator Gm 4  has offset, there will be a square wave in front of chopper Ch 3 . This square wave is sensed by Gm 8 . The square wave output current of Gm 8  is being rectified by Ch 4  and integrated by Gm 7 . The output of the integrator is coupled to the output of the integrator Gm 4  in order to correct its offset. If sense amplifier Gm 8  has offset, its output current is modulated by Ch 4  and integrated by Gm 7 . Therefore a small triangle ripple will be present on the output voltage of Gm 7 . This ripple is further reduced by the control amplifier Gm 6  that is relative weak in regard to Gm 4 . Therefore the resulting ripple on the output of integrator Gm 4  will be even smaller. The same reduction of signal takes place again when this ripple is further coupled towards the output by control amplifier Gm 3  which is weaker than Gm 2 . Hence, the ripple due to the offset Vos 8  of Gm 8  can be neglected. 
     What holds for the operational amplifiers of  FIG. 1  and  FIGS. 2   a ,  2   b  and  2   c  above, also is valid for Current-Feedback Instrumentation Amplifiers. These amplifiers are explained in the Springer paper. 
     The Current-Feedback Instrumentation Amplifier of  FIG. 3  shows how we can eliminate the feed-forward amplifiers Gm 51  and Gm 52  of the circuit of FIG. 8.3 of the Springer paper, or FIG. 18 and FIG. 7 of the U.S. Pat. No. 7,209,000. 
     The ripple reduction loop functions in the same way as in the above operational amplifier of  FIG. 1 . If Gm 21  and Gm 22  have offset, then the chopper amplifier will show a ripple at the output. This ripple is sensed by Cm 31  and Cm 32 , rectified by Ch 3 , and integrated by Gm 4 . The control amplifier finally corrects the offset of Gm 21  and Gm 22 , so that the origin of the ripple is taken away. 
     Also in this case, the offset of Gm 4  poses a floor for the ripple reduction. Therefore an offset reduction loop around Gm 4  is applied in the circuit of  FIG. 4 . 
     The Current-Feedback Instrumentation Amplifier of  FIGS. 4   a ,  4   b  and  4   c  (see FIG. 8.4 of the Springer paper) show how for example the offset of Gm 4  is reduced by an offset reduction loop. They are similar to the amplifier of  FIG. 3  with the offset compensation loops of  FIGS. 2   a ,  2   b  and  2   c , respectively, so will not further be explained here. 
     Besides a chopper and virtual ground of the input of Gm 4 , it is also possible to approach the offset in the current domain. This is shown by  FIG. 5 . 
       FIG. 5  shows how the offset can be reduced in the current domain. First, the currents of the ripple sense capacitors C 31  and C 32  are going into the low impedance input of a cascode buffer stage. After that, the signal is rectified in a chopper Ch 6 . Then the signal is buffered again in a second cascode buffer stage and integrated by a passive integrator C 4 . The offset and integrator signal on C 4  now has no influence anymore on the signals of the sense capacitors C 41  and C 42 . A small ripple can now occur because of the output offset current of cascode buffer 1 . If needed, this offset can be reduced by a local offset cancellation loop around cascode buffer 1 , for example with chopper stabilization. 
       FIG. 6  shows a circuit implementation of the cascode buffer 1  and cascode buffer 1  used in a preferred embodiment. This circuit is described in a paper by M. Kashmiri et all (M. Kashmiri et al. “A Temperature-to-Digital Converter Based on an Optimized Electrothermal Filter,”  ESSCIRC Dig. Tech. Papers , pp. 74-77, September 2008) though in that paper the circuit was not used as a buffer. 
     The ripple reduction loop can also be applied to the chopper correction loops of chopper-stabilized OpAmps and InstAmps. This is shown below in  FIG. 7 . In FIG. 7.3 of the Springer paper, auto-zeroing of Gm 5  was needed to remove the offset of the chopper correction amplifier. That offset causes a ripple. A drawback of that method is extra noise by the auto-zero function. Now with the ripple reduction loop of the present invention, that is eliminated. The ripple reduction loop consists of the ripple sensing capacitors Cm 61  and Cm 62 . They feel the ripple from the chopper amplifier Gm 5  at the output of the integrator Gm 4 . The ripple is rectified by Ch 3  and integrated by Gm 7 . The control amplifier Gm 6  finally corrects the offset of the chopper amplifier Gm 5 . Therefore the ripple is strongly reduced, while the offset of the main amplifier is taken away without adding the extra noise of the auto-zero function in the chopper correction amplifier, as was the case in the related amplifier of FIG. 7.3 of the Springer paper. 
     In  FIG. 8  finally, the ripple reduction loop has been applied to a chopper-stabilized current-feedback instrumentation amplifier. The current-feedback Instrumentation amplifier has been explained in the Springer paper with reference to FIG. 7.7. The ripple reduction loop functions in the same way as in the case of the operational amplifier of  FIG. 7 . 
     In the foregoing description, the various preferred embodiments are generally shown as using differential amplifiers, though single ended amplifiers may also be used. Also the word amplifier as used herein and in the claims to follow is not used in a limiting sense, but in a broad sense, and can include voltage amplifiers, as well as amplifiers fabricated using not only CMOS transistors, but also other types of transistors, such as by way of example, bipolar transistors, and may include amplifiers of single or multiple stages. 
     Thus while certain preferred embodiments of the present invention have been disclosed and described herein for purposes of illustration and not for purposes of limitation, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.