Abstract:
A protection device is enclosed. The device has a first MOSFET (Q  10 ), a second MOSFET (Q  11 ) and a third JFET (Q  12 ) with their conductive paths in series with the JFET (Q  12 ) being located between the MOSFETS (Q  10,  Q  11 ). The source of the first MOSFET (Q  10 ) is connected to the gate of the second MOSFET (Q  11 ) and the source of the second MOSFET (Q  11 ) is connected to the gate of the first MOSFET (Q  10 ). The MOSFETS (Q  10,  Q  11 ) and JFET (Q  12 ) together form a variable resistance circuit block connectable between an input and an output The gate of the JFET (Q  12 ) being coupled to the input and the output by respective current sources.

Description:
[0001]     This invention relates to a protection device. In particular, the invention concerns a protection device which may function to prevent the flow of undesirable transients or isolate a load from undesirably high voltages or currents.  
         [0002]     The device of the invention may be used as an alternative to a fuse. Fuses employing thermal or magnetic elements for effecting control of currents and voltages are known.  
       BACKGROUND ART  
       [0003]     U.S. Pat. No. 5,742,463 proposes various active circuits which may function as a protection device and serve as an alternative to known fuses for inhibiting the transmission of transients to a load.  
         [0004]     The practical embodiments disclosed in U.S. Pat. No. 5,742,463 employ depletion mode junction field effect transistors (JFETS) and utilize commutating diodes in those embodiments where the number of components has been minimised. U.S. Pat. No. 5,742,463 suggests that depletion mode metal oxide semi conductor field effect transistors (MOSFETS) may be used as alternatives to junction field effect transistors (JFETS).  
         [0005]     The operation of the embodiment of U.S. Pat. No. 5,742,463 is such that once the JFETS that have their conduction paths in series are in the cut-off phase of their conduction characteristics in response to the present of a transient of a sufficient magnitude, those JFETS cannot return to their original conducting phase until the applied input returns to zero or near zero.  
         [0006]     Thus, the embodiments of U.S. Pat. No. 5,742,463 were unsuitable for operation with inputs which were level shifted and where transients occurred and the input did not return to zero or near zero after the occurrence of the transient that caused the series connected transistors to assume their cut-off condition. In addition, U.S. Pat. No. 5,742,463 required the presence of commutating diodes.  
       SUMMARY OF THE INVENTION  
       [0007]     It is an object of the present invention to provide an active protection device which may serve as an alternative to known types of fuses and at least minimises some of the disadvantage referred to above.  
         [0008]     According to one aspect of the invention there is provided a protection device connectable between an input and a load or connectable in a circuit, the device having a variable resistance circuit block connectable between the input and the load or connectable in the circuit as a series element, the circuit block having a first depletion mode FET, a second depletion mode FET having a gate coupled to the first FET with a gate of the first FET being coupled to the second FET and a third depletion mode field effect transistor (FET) between the first and second FETS and having its conductive channel in series with conductive paths of the first and second FETS and said third FET for generating a negligible resistance when the current through the circuit block is below a threshold level and for generating a relatively high resistance when the current through the circuit block reaches a threshold level.  
         [0009]     Preferably, the first and second FETS are high voltage depletion mode MOSFETS. Preferably the third FET is a depletion mode JFET. In one embodiment the MOSFETS are n-channel MOSFETS and the JFET is a pchannel JFET.  
         [0010]     Preferably, the protection device includes a holding circuit connected between a first one and a second one of the transistors, the holding circuit provides a holding voltage for resetting the second transistor after the occurrence of a transient without the need for the input to return to zero or near zero. The holding circuit may include a depletion mode MOSFET with its conductive channel connected between the gate of the JFET and the input.  
         [0011]     Preferably a current source, which in its simplest form is a resistor, is connected between the gate of the JFET and the input and also between the gate and the output.  
     
    
     BRIEF DESCRIPTION OF DRAWINGS  
       [0012]     Particular preferred embodiments of the invention will now be described by way of example with reference to the drawings in which:  
         [0013]      FIG. 1  is a circuit diagram of a protection device or transient blocking unit (TBU) according to a first embodiment of the invention;  
         [0014]      FIG. 2  is a circuit diagram of a protection device according to a second embodiment of the invention;  
         [0015]      FIG. 3  is a circuit diagram of a protection device according to a third embodiment of the invention, and  
         [0016]      FIG. 4  is a circuit diagram of a protection device according to a fourth embodiment of the invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0017]      FIG. 1  shows a TBU circuit suitable for bipolar operation. The depletion mode N channel MOSFETS Q 10  and Q 11  are in series with depletion mode P channel JFET Q 12 . With the input more positive than the output and where the input (or through) current is below a threshold current all three transistors Q 10  to Q 12  are conducting. When a current greater than the threshold current is applied through the TBU, MOSFET Q 10  and JFET Q 12  cease conducting for positive currents and MOSFET Q 11  and JFET Q 12  for negative currents and the input is isolated from the output. For the circuit to reset the input must return to zero or near zero. The commutating diodes of U.S. Pat. No. 5,742,463 may be eliminated when Q 10  and Q 11  are MOSFETs and Q 12  is a JFET and a current source, which in its simplest form is a resistor, is used to connect the gate of Q 12  to the drain of each of Q 10  and Q 11 . In this figure, transistors Q 10 , Q 12  and Q 11  form a variable resistance circuit block and resistors R 1  and R 2  are current sources.  
         [0018]      FIG. 2  shows a TBU circuit according to a second embodiment of the invention. The TBU of  FIG. 2  has a combination of a N channel depletion mode MOSFET Q 1  in series with a P channel depletion mode JFET Q 2  and an N channel depletion mode MOSFET Q 3 .  
         [0019]     The drain of Q 1  is coupled to an input of the TBU and the drain of Q 3  is coupled to an output of the TBU.  
         [0020]     A further depletion mode N channel MOSFET Q 4  has its drain coupled to the input of the TBU via resistor R 1  and its source coupled to the output of the TBU via resistor R 2 . An avalanche diode D 1  extends between the drain and source of Q 4 . The source of Q 4  is coupled to the gate of Q 2  and an avalanche diode D 2  extends between the gate of Q 2  and the gate of Q 4 . Transistors Q 1 , Q 2  and Q 3  form a variable resistance circuit block.  
         [0021]     The circuit of  FIG. 2  operates as follows:  
         [0022]     When there is no over-current condition all of the FETS in the circuit are conducting and a small voltage drop is established across each of the series connected FETS Q 1 , Q 2  and Q 3  with the major voltage applied to the input being available at the output of the TBU. This is the normal untriggered state of the TBU and the circuit performs identically to that of the circuit of  FIG. 1  until the threshold is reached.  
         [0023]     In the event of an over-current, when the current through the TBU reaches the threshold current, MOSFET Q 1  in combination with JFET Q 2  stops conducting if the over current is a positive current from the input to the output or MOSFET Q 3  in combination with JFET Q 2  stops conducting if the over current is a positive current from the output to the input. In the case of positive current MOSFET Q 4  has the same gate/source voltage as that generated across the JFET Q 2 . When JFET Q 2  stops conducting the gate/source bias voltage stops MOSFET Q 4  from conducting also, bringing avalanche diode D 1  into the circuit. This condition is maintained until the voltage at the input of the TBU falls below a voltage equal to the voltage “V holding” of the avalanche diode D 1  plus the avalanche voltage of diode D 2 . This action removes the gate/source bias from Q 2 , allowing the TBU to return to its initial conducting state without the requirement that the input voltage at input I/P returns to zero or near zero.  
         [0024]      FIG. 3  of drawings shows a TBU circuit like that shown in  FIG. 2 . The components that the circuit of  FIG. 3  has in common with  FIG. 2  have been identified with like notation. The circuit of  FIG. 3  provides a TBU capable of isolating a higher voltage than the TBU of  FIG. 2 .  
         [0025]     The TBU of  FIG. 3  has additional components connected between the input and output. After the TBU of circuit  3  is triggered as a result of threshold current being exceeded, transistors Q 1 , Q 2  and Q 3  provide the, normal circuit block function as described for the circuits of  FIGS. 1 and 2 . However, transistors Q 5  and Q 8  remain conducting if the voltage across the TBU (input voltage) is less than a minimum voltage V set by the avalanche voltage of back to back avalanche diode D 3 . When the input is greater than this minimum voltage, current begins to flow through pchannel depletion mode JFET Q 6 , back to back avalanche diodes D 3  and depletion mode p channel JFET Q 7 . For positive current, the basic TBU combination of Q 5  and Q 6  trigger to an open circuit, blocking the additional voltage across Q 5 . For negative current the basic TBU combination of Q 7  and Q 8  trigger to an open circuit, blocking the additional voltage across Q 8 . The components associated with Q 4  function as in  FIG. 2  to ensure that the circuit may reset without the need for the input to return to zero or near zero voltage.  
         [0026]      FIG. 4  shows an alternative TBU to that of  FIG. 2 . In  FIG. 4 , transistor Q 4  of  FIG. 2  has been replaced with a depletion mode n-channel JFET. Transistor Q 9  requires the presence of commutating diodes D 4  and D 5  for it to function in the same manner as the circuit of  FIG. 2 .  
         [0027]     The circuits of the invention employ depletion mode MOSFETS in the conduction path. As a consequence the need for commutating diodes required in the practical embodiments of U.S. Pat. No. 5,742,463 are not necessary in the embodiments of the present invention. In addition, the circuits of  FIGS. 2, 3  and  4  according to the present invention are configured to ensure resetting so the conducting state may occur without the need for the input to the circuit to return to zero or near zero.  
         [0028]     The circuits of the figures also function if the active components are swapped to the types other than those illustrated (N to P and P to N) and the diode directions are reversed.  
         [0029]     With minor variations to the circuits to account for differing gate characteristics, other depletion mode FET devices such as JFETS and SITFETS may also be used to complete the same essential function.