Abstract:
The post exposure bake cycle in a chemically amplified resist process is more precisely controlled by measuring the distance from multiple locations on the bottom of each processed wafer to a reference plane surface while the wafer is supported on a cool plate. Subsequent to measuring the distance, the wafers are transferred to the hot plate that has a series of controllable heating elements. The set temperature for the heating elements is established in response to the distances measured while the wafer is on the cooling plate. The measurements are taken by utilizing proximity sensors located within the cooling plate.

Description:
FIELD OF THE INVENTION 
       [0001]    This invention relates to a method and apparatus to subject a semiconductor wafer to a post exposure bake (PEB). 
       BACKGROUND OF THE INVENTION 
       [0002]    In the semiconductor photolithography process, the bake cycles are extremely important for uniformity and repeatability of the various process steps, with the most significant being the post exposure bake (PEB) cycle in a chemically amplified resist process. In this process, a photoresist is applied to the semiconductor surface. The photoresist is subjected to a mask exposure to apply a circuit pattern. Chemically amplified resists require both an exposure dose to generate a latent acid image, and a thermal dose to drive the deblocking reaction that changes the solubility of the resist. The post exposure bake must optimize the balance between relative rates of the diffusion and reaction processes. 
         [0003]    Hot plates having uniformities within a range of a few tenths of a degree centigrade are currently available and are generally adequate for current process methods. However, there is an uncontrolled phenomena in the production implementation of this PEB process that is likely to cause severe issues as feature sizes continue to decrease. The phenomena, or problem, is that the hot plates are precisely calibrated using a flat bare silicon wafer with imbedded thermal sensors. But actual production wafers with deposited films on the surface of the silicon exhibit small amounts of warpage due to the stresses induced by the deposited films. This warpage can cause the normal gap between the wafer and the hot plate (referred to as the proximity gap), to vary across the wafer from a normal value of approximately 100 μm by as much as 100 μm deviation from the mean proximity gap. 
         [0004]    This variability in the proximity gap changes the heat transfer characteristics in the area of the varying gap causing temperature non-uniformity on the wafer surface. This temperature difference can result in a change in critical dimension (CD) in that area of several nanometers, which can approach the entire CD variation budget for current leading edge devices, and will exceed the projected CD budget for smaller devices planned for production in the next few years. 
         [0005]    In one current hot plate system, a combined cool plate and baking plate reside in one module. In this module, the silicon wafer is placed on the cool plate and then transferred internally in the module to the bake plate, and then, after baking, returned to the cool plate where it is subsequently removed to continue processing. The bake plate contains multiple zone heating elements for precise calibration of bake temperatures. For advanced work, proposals have been published to address the warpage issue by relying on a hope for consistency of warpage by device layer, and zone-based bake temperature adjustment for all waters of a certain device layer. 
       SUMMARY OF THE INVENTION 
       [0006]    The present invention is premised on the realization that in a post exposure bake utilizing both a cool plate and a hot plate, the topography of the bottom surface of a semiconductor wafer can be measured when the wafer is resting on the cool plate. The wafer is transferred from the cool plate to the hot plate and the topographical data is conveyed to a control system for the baking plate. Different heating elements in the hot plate are controlled to compensate for the differences in distances from the hot plate surface to the surface of the wafer, as predicted by wafer topography measurements made at the cool plate. 
         [0007]    By imbedding proximity sensors into a cool plate where the wafer is positioned immediately prior to the baking step, one can measure the gap at a plurality of points between each individual wafer and the reference plane of the cool plate immediately prior to baking that individual wafer. From these measurements, a profile of the warpage of that wafer will be generated. From the profile data, individual temperature offsets to compensate for the proximity gap variation will be calculated from a reference look-up table, and the appropriate adjustments will be made to the individual heating element zones beneath the areas of proximity variation. 
         [0008]    Since the ramp up of the temperature of a cold wafer is a dynamic event, small adjustments in control set points will stabilize during the ramp event. By this method, each wafer will see a customized heating event matching the physical shape of that individual wafer. The two primary advantages of this approach are individual wafer physical measurement for custom compensation, and high speed on the fly correction with no loss in production. This same method can be used in other similar wafer heating processes such as the post apply bake. 
         [0009]    The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with a general description of the invention given above, and the detailed description given below, serve to explain the invention. 
     
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]      FIG. 1  is an overhead diagrammatic depiction of the apparatus of the present invention; 
           [0011]      FIG. 2A  is a cross sectional view taken at lines  2 - 2  of  FIG. 1  showing a semi-conductor wafer being inserted in the apparatus of  FIG. 1 . 
           [0012]      FIG. 2B  is the same view as  FIG. 2A  with the wafer located on a cool plate in the apparatus shown in  FIG. 1 . 
           [0013]      FIG. 2C  is the same view as  FIG. 2A  showing the wafer transferring to the heating section of the device shown in  FIG. 1 . 
           [0014]      FIG. 2D  is the same view as  FIG. 2A  showing the wafer resting on the hot plate of the apparatus shown in  FIG. 1 . 
           [0015]      FIG. 3  is an overhead view of a hotplate heating element. 
           [0016]      FIG. 4  is an overhead view of an alternate embodiment of the hotplate heating element. 
           [0017]      FIG. 5  is a diagrammatical depiction of the apparatus of the controls for the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0018]    According to the present invention, a semi-conductor wafer is heated on a hot plate during the processing steps and generally subsequent to application of a chemically amplified resist. 
         [0019]    The topography of the bottom surface of the semiconductor wafer is measured during processing immediately prior to locating the semiconductor wafer on a hot plate. A plurality of distances from a common plane to the bottom surface of the semiconductor wafer are measured. That information is then transferred to a control unit for the heating plate. The hot plate in turn is controlled to establish a plurality of heating zones corresponding to the measured locations and selectively heat areas of the semi-conductor wafer on the heating plate to compensate for differences in measured distances. 
         [0020]    An apparatus or module  10  for practicing the present invention includes a cool plate  12  and a hot plate  14 . The module  10  is surrounded by an exterior casing  16  which includes sidewalls  17  and top and bottom walls  18  and  19  respectively. An opening  20  through sidewall  17  permits access to the interior of module  10 . 
         [0021]    The cool plate  12  includes a support surface  21  supported by an arm  22  which moves along a guide support  24 . The support surface  21  includes slots  26  and  28  which align with support posts  30 . These support posts  30  extend from a common base  32  which is adapted to raise and lower the posts  30  relative to support surface  21  as shown by arrows  34  and  35 . Support surface  21  includes a plurality of pins  36  adapted to support the semi-conductor wafer from its bottom surface so that the bottom surface of a wafer does not contact the support surface  21 . 
         [0022]    The support surface  21  of cool plate  12  includes a plurality of proximity sensors  38 . The number and location of the proximity sensors will be determined by the configuration of the heating plate. Basically, a sufficient number of proximity sensors are utilized to provide sufficient data to control heating elements in hot plate  14 . Accordingly, the more heating elements employed, the more sensors are required. If the hot plate has a series of concentric heating elements one would employ at least 3 sensors for each concentric ring located the same distance from a center point corresponding to one of the concentric heating elements as discussed below. 
         [0023]    As shown in  FIG. 1  the module  10  includes a central wall  40  between the cool plate  12  and the heating plate  14  an opening  42  allows a wafer to be transferred from the cool plate to the hot plate. 
         [0024]    The hot plate includes a surface  44  and a plurality of support pins  46  along with three holes  48  aligned with three posts  50  which are supported on a common base  52 . Base  52  is designed to raise and lower the posts  50  as shown by arrows  53  and  55 . As shown in  FIG. 4 , a series of controlled heating elements  56 - 60  are embedded in hot plate  14 . These heating elements are selectively operated by a control unit  62 . 
         [0025]    As shown in  FIG. 5  the proximity sensors  38  in cool plate  12  provide data to control unit  62  which in turn controls each of the heating elements  56 - 60  causing each element to reach a selected temperature. The control unit  62  receives the distance data determined by proximity sensors  38  and in turn establishes a set temperature for the individual heating element  56 - 60  in order to uniformly heat a wafer  62  during processing. 
         [0026]    The temperature required for each heating element to uniformly heat the bottom surface of semi-conductor wafer can be determined emperically by testing the hot plate using sensors located at various distances from the surface of the hot plate and storing this data. Alternately, this can be determined utilizing the following algorithm 
         [0000]    
       
         
           
             
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         [0000]    where ρ is the density of silicon, C p  is the heat capacity of silicon, L is the thickness of the wafer, T is the temperature of the resist-coated wafer, K air  is the thermal conductivity of air, δ is the thickness of the gap between the hot plate or cool plate and the wafer, and h is a coefficient for heat lost from the top surface of the wafer to the surroundings. Thus, the control  62  can either utilize stored emperical data or the algorithm in order to determine the set point for each heating element on the hot plate. 
         [0027]    The following illustrates how one can measure the topography of the bottom of a wafer and uniformly heat the wafer without increasing processing time. As shown in  FIGS. 2A-2D , a semiconductor wafer  66  is placed on posts  30  which are in the raised position as shown in  FIG. 2A . The wafer  66  (preferably subsequent to a masking operation and exposure) is positioned on the posts  30  using for example, a robotic arm (not shown). The posts  30  are then lowered as indicated by arrow  35  in  FIG. 2B  and the wafer is supported on pins  30  above support surface  21 . Proximity sensors  38  detect the distances between the proximity sensors which are all located on a common plane, and the bottom surface of the wafer  66 . 
         [0028]    A variety of different proximity sensors can be used including infrared, acoustic, inductive, eddy current, and capacitive type proximity sensors and laser interferometers. Distance measurements are then transferred to the control unit  62 . The arm  22  is driven by a motor (not shown) along guide  24  moving the cool plate  12  through opening  42  to a position above the hotplate  14 . Posts  50  raise, extending through slots  26  and  28 , and lift the wafer  66  off of the support surface  21 . The arm  22  is then retracted back through opening  42  returning the cool plate to its original position. The posts  50  lower as shown in  FIG. 2D  positioning the wafer  66  on pins  46 . 
         [0029]    The control unit will make small adjustments in the control set points for heating elements  56 ,  58  and  60  prior to or during the transfer operation. Thus the heating elements  56 - 60  will recover at the new desired set temperature following the disruptive thermal event which occurs as the cool wafer is positioned on the hot plate  14 . The heating step is continued for the desired period and the posts  50  are then raised as shown in  FIG. 2C  lifting the wafer  66  off the hot plate  12 . The cool plate  12  is extended back through opening  42  below wafer  66  with the posts  50  within slots  26  and  28 . The posts  50  are lowered and the wafer  66  rests on pins  36  of support surface  21 . The cool plate  12  is then retracted retrieving the wafer  66  allowing it to cool and be removed from the module  10 . The wafer  66  is removed and the process is repeated with a different wafer. This achieves a uniform heating of the semiconductor wafer during processing selectively heating the wafer for the post exposure bake. This is accomplished without requiring any additional processing time because the measurement of the bottom surface of the wafer is accomplished without any additional processing steps. This in turn provides greater tolerances for the device manufacturer without increasing processing time. 
         [0030]    As shown in  FIG. 4  an alternate embodiment of the heating plate  14  includes annular segmented heating elements. In this particular embodiment, four annular sets of heating elements  74 ,  76 ,  78 , and  80  are employed with each one of these sets having 3-7 individual segmented heating elements, each of these heating elements can be selectively activated by the control unit  62  responsive to distances measured from the proximity sensors  38  located in the cool plate  12 . To provide distance measurement needed to control these heating elements, the cool plate  12  would include at least one proximity sensor  38  for each of the heating elements. The particular arrangement of the heating elements can vary depending upon desired application. This procedure can be used in similar wafer heating processes such as the post apply bake. 
         [0031]    While the present invention has been illustrated by the description of one or more embodiments thereof, and while the embodiments have been described in considerable detail, they are not intended to restrict or in any way limit the scope of the appended claims to such detail. Additional advantages and modifications will readily appear to those skilled in the art. The invention in its broader aspects is therefore not limited to the specific details, representative apparatus and method and illustrative examples shown and described. Accordingly, departures may be made from such details without departing from the scope of the general inventive concept.