Abstract:
A circuit for controlling a switch to be controlled in unidirectional fashion while the voltage present thereacross is an A.C. Voltage, including circuitry for delaying the switch turning-on with respect to a zero crossing of the voltage thereacross, and circuitry for triggering the switch turning-off after its turning on, at the end of a predetermined time interval plus or minus an error time controlled by the duty cycle of the A.C. Voltage across the switch, in one or several previous periods. The control circuit applies to the forming of a rectifying circuit by the switch.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
   This application is a continuation of U.S. application Ser. No. 10/978,316, filed Oct. 29,2004 entitled CONTROL OF A MOS TRANSISTOR AS A RECTIFYING ELEMENT, which application is incorporated herein by reference in its entirety. 

   BACKGROUND OF THE INVENTION 
   1. Field on the Invention 
   The present invention relates to A.C. voltage rectifying elements. The present invention more specifically relates to the implementation of a rectifying function (diode) by means of a MOS transistor. 
   2. Discussion of the Related Art 
     FIG. 1  very schematically shows a first example of a circuit using rectifying elements of the type to which the present invention may apply. In this example, it is a so-called forward-type converter. Such a converter is essentially formed of a transformer T having a primary winding T 1  receiving a D.C. voltage provided by a capacitor C 1  connected to the output of a diode bridge B supplied with an A.C. voltage. Winding T 1  is grounded by a switch K. Switch K is controlled in pulse-width modulation by a PWM signal (high-frequency with respect to the A.C. power supply) set to regulate a D.C. voltage Vout provided by the converter. Voltage Vout is provided on the secondary side T 2  across a capacitor C 2  storing the power transferred from primary T 1  to secondary T 2  of the transformer during periods when switch K is on. A first end of secondary winding T 2  is connected, by a diode D 1  in series with an inductance L 1 , to a first electrode of capacitor C 2  defining a positive output terminal, while its other end is directly connected to the other electrode of capacitor C 2  defining ground M 2  on the side of voltage Vout. A free wheel diode D 2  connects the junction point of diode D 1  and of inductance L 1  to ground M 2 , the anode of the diode being on the ground side. The operation of such a converter is known. 
   The rectifying elements are here formed of diodes D 1  and D 2  which have the disadvantage of exhibiting a threshold voltage on the order of from 0.3 to 1.5 volts, which adversely affects the converter operation, especially in low-voltage applications. 
     FIG. 2  partially and schematically illustrates a modification applied to a PWM converter of  FIG. 1  to decrease the threshold voltage of the rectifying elements. In  FIG. 2 , only a portion of the secondary has been shown, the rest being similar to  FIG. 1 . To decrease the threshold voltage of diodes D 1  and D 2 , said diodes are replaced with two N-channel MOS transistors N 1  and N 2  which are adequately controlled by a specific circuit CTRL. For voltage reference reasons, transistor N 1  replacing diode D 1  must however be placed on the ground branch of the converter, while transistor N 2  can be placed in the same way as diode D 2  of  FIG. 1 . Control circuit CTRL further receives a supply voltage SUPPLY as well as a signal SYNCH of synchronization with respect to the switching of the D.C. voltage performed on the primary side, to synchronize the respective turn-off and turn-on times of transistors N 1  and N 2  with the turn-off and turn-on times of switch K (not shown in  FIG. 2 ). 
   A disadvantage of the synchronous rectifying circuit of  FIG. 2  is that transistors N 1  and N 2  cannot have an autonomous operation. They need a synchronization signal coming from the primary as well as a supply voltage. 
   Another disadvantage is the presence of a MOS transistor on the ground line and not on the high line on the secondary side. 
     FIG. 3  illustrates another example of a voltage converter to which the present invention applies. It is a D.C./D.C. converter having the function of raising an output voltage Vout with respect to the level of an input voltage V 1  provided, for example, by a battery. The positive electrode of battery V 1  is connected to a first end of an inductance L having its other end connected, by a first MOS transistor N 1 , to a first electrode of an output capacitor across which is sampled output voltage Vout. The junction point of inductance L and of transistor N 1  is further connected, by a transistor N 2 , to the ground defined by the negative electrode of battery V 1  to which the second electrode of capacitor C is connected. In such an application, the control of transistors N 1  and N 2  is particularly difficult since it requires a level shifter to control transistor N 1  which has no ground reference. 
   It would be desirable to have a rectifying element with a low threshold voltage, which does not pose the problems of MOS transistor control in conventional configurations. 
   SUMMARY OF THE INVENTION 
   The present invention aims at providing a circuit of autonomous control of a MOS transistor ensuring a rectifying function. 
   The present invention also aims at providing an autonomous rectifying element, that is, with two terminals, comprising a MOS transistor and its control circuit. 
   To achieve these and other objects, the present invention provides a circuit for controlling a switch to be controlled in unidirectional fashion while the voltage present thereacross is an A.C. voltage, comprising: 
   means for delaying the switch turning-on with respect to a zero crossing of the voltage thereacross; and 
   means for triggering the switch turning-off after its turning on, at the end of a predetermined time interval plus or minus an error time controlled by the duty cycle of the A.C. voltage across the switch, in one or several previous periods. 
   According to an embodiment of the present invention, said predetermined duration is selected according to the maximum expected variations of the duty cycle. 
   According to an embodiment of the present invention, a capacitor and a diode are series-connected between the terminals of the switch to provide a supply voltage to the control circuit, the capacitor being charged when the switch is off. 
   According to an embodiment of the present invention, the control circuit comprises: 
   a circuit for detecting the sign of the voltage across the capacitor; 
   a ramp generator reset on each sign switching of the voltage across the switch in a direction in which it must become conductive, said generator being controlled by the detection circuit; 
   a means for causing the turning-on of the switch after detection of a sign switching of the voltage thereacross; and 
   a circuit for controlling the duration of the on state with a predetermined value. 
   According to an embodiment of the present invention, a first delay element brings a minimum delay to a turn-off order of the switch which follows its turning-on. 
   According to an embodiment of the present invention, a second delay element brings a delay to the turning-on of the switch with respect to the inversion of the voltage thereacross. 
   According to an embodiment of the present invention, an output amplifier providing the control signal of the switch is controlled by means for detecting an inversion of the voltage direction, to cause the turning-off of the switch in case of an incidental voltage inversion. 
   According to an embodiment of the present invention, the switch is a MOS transistor. 
   According to an embodiment of the present invention, a diode in parallel on the switch is used for the starting. 
   The present invention also provides a rectifying circuit with a low threshold voltage comprising a switch in parallel with a diode preferably formed of its parasitic diode, and a control circuit associated with a supply circuit drawing its power supply directly from across the controlled transistor when said transistor is on. 
   According to an embodiment of the present invention, the rectifying circuit exclusively comprises two external connection terminals. 
   The foregoing objects, features, and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIGS. 1 to 3 , previously described, illustrate conventional examples of a rectifying element assembly to which the present invention applies; 
       FIG. 4  very schematically shows an embodiment of a rectifying circuit based on MOS transistors according to the present invention; 
       FIGS. 5A and 5B  illustrate, in timing diagrams, the operation of the circuit of  FIG. 4 ; 
       FIG. 6  shows an embodiment of a circuit for controlling a MOS transistor assembled as a rectifying element according to the present invention; 
       FIGS. 7A to 7H  illustrate, in the form of timing diagrams, the operation of the circuit of  FIG. 6 ; and 
       FIG. 8  shows an alternative control circuit according to the present invention, comprising optional protection devices. 
   

   DETAILED DESCRIPTION 
   The same elements have been designated with the same reference numerals in the different drawings. For clarity, only those elements which are necessary to the understanding of the present invention have been shown in the drawings and will be described hereafter. In particular, not all the possible applications of an autonomous rectifying circuit according to the present invention have been shown, the present invention generally applying to the replacing of a diode in a rectifying function with a MOS transistor and its control circuit. 
   A feature of the present invention is to control a MOS transistor having its drain and its source defining two end terminals of the rectifying circuit, by synchronizing its on periods exclusively according to the voltage present thereacross (between its drain and its source). 
   Preferably, the control circuit is autonomous, that is, it draws the power necessary to its operation from across the MOS transistor. 
   The present invention thus implements a diode function by means of an autonomous circuit exclusively having two terminals to be connected to the rest of the application. 
     FIG. 4  schematically shows, in the form of blocks, a rectifying circuit with a MOS transistor according to the present invention. This circuit essentially comprises an N-channel MOS transistor  1  having its source defining anode A of the rectifying circuit and having its drain defining cathode K thereof. A diode  2  is connected in parallel on transistor  1  with its anode confounded with the source of transistor  1 . In practice, diode  2  may be formed by the parasitic diode of transistor  1 . 
   According to the present invention, the gate of transistor  1  receives a control voltage Vc provided by a circuit  3  (CT) which sets the conduction periods of transistor  1  according to the voltage sensed thereacross. For this purpose, circuit  3  comprises two terminals respectively connected to electrodes K and A. Circuit  3  is further autonomously supplied with a voltage Vcc directly extracted from the voltage between terminals K and A. In the example of  FIG. 4 , the supply circuit is formed of a diode  4  having its anode connected to cathode K of the circuit and having its cathode connected, by a storage capacitor  5 , to anode A. Voltage Vcc intended for circuit  3  is sampled across capacitor  5 . This embodiment is a simplified embodiment, improved versions of which will be discussed hereafter. 
   According to the present invention, the halfwaves during which transistor  1  is off due to a positive voltage Vd between its terminals K and A (with the conventions chosen in the drawings) are used to charge capacitor  5 , diode  4  being forward biased during these periods. During halfwaves when voltage Vd is negative, transistor  1  is turned on by circuit  3  and diode  4  prevents capacitor  5  from discharging other than by supplying circuit  3 . 
   It can thus be seen that the present invention performs a rectifying function in the case where the voltage present between terminals K and A is a voltage which switches directions, that is, which comes from an A.C. source. More specifically, the present invention applies to the case where voltage Vd is of relatively high voltage switched-mode type (several tens of kilohertz) to avoid requiring a capacitor  5  having too large a size, said capacitor indeed having to maintain a sufficient charge during periods when transistor  1  conducts. 
   Of course, the voltage Vcc necessary to the operation of circuit  3  may be provided by other means, especially for the case where an adequate voltage is available in the rest of the circuit. However, the obtaining of voltage Vcc directly by the voltage across the circuit of the present invention is preferably, since this provides a completely autonomous circuit with no voltage reference problem. 
     FIGS. 5A and 5B  respectively illustrate, in the form of timing diagrams, an example of the shape of voltage Vd across transistor  1  and of the corresponding control voltage Vc provided by circuit  3 . 
   As long as capacitor  5  is discharged (system starting), transistor  1  is off whatever voltage Vd (circuit  3  is not supplied and thus cannot ensure the control). A possible conduction during periods when the voltage of terminal A is greater than the voltage of terminal K (negative voltage Vd with the conventions of the drawings) is then ensured by diode  2 , which is then forward biased. A few halfwaves of voltage Vd may be necessary to sufficiently charge capacitor  5  and enable starting of the system. 
     FIGS. 5A and 5B  illustrate an example in steady state and, for simplification, assume a rectangular voltage Vd (for example, originating from a switched-mode power supply). All that will be discussed hereafter also applies in the case of a voltage Vd of sine or other shape, provided that it is an A.C. voltage. 
   During periods or halfwaves where voltage Vd across transistor  1  is positive, said transistor is off (Vc=0). Capacitor  5  charges during these periods. 
   At a time t 1  when voltage Vd nulls out (change of halfwave towards a negative halfwave), the reverse voltage (negative voltage in the orientation of the drawing) is first limited to a first threshold TH 1  corresponding to the threshold voltage (on the order of 0.7 volt) of diode  2 . Indeed, as soon as voltage Vd reaches this negative value, diode  2  conducts and introduces a forward voltage drop of value TH 1 . Circuit  3  is designed to detect the occurrence of this negative voltage and to cause the turning-on of transistor  1  at a time t 2  following time t 1  with a predetermined duration. At time t 2 , transistor  1  is turned on, which reduces the forward voltage drop to threshold voltage TH 2  of this transistor. In practice, this voltage drop is, at worst, smaller than 0.2 and can even be reduced to approximately 50 mV. It is linked to the on-state resistance of the MOS transistor (RdsON) and thus depends on the current set by the application. It also depends on the transistor size and on the avalanche voltage of the technology. 
   The turning-off of transistor  1  must occur at a time t 3  coming before a time (in principle, unknown) t 4  of halfwave change (transition to the new positive halfwave). 
   According to the present invention, advantage is taken from the fact that the duty cycle variations of voltage Vd are generally small from one period to the other to predict halfwave change time t 4  with respect to the previous period P of voltage Vd. In fact, circuit  3  determines an on duration (t 3 −t 2 ) with respect to the preceding period of voltage Vd. Time interval Δt=t 4 −t 3  is controlled by circuit  3  on a duty cycle change to be maintained at a predetermined value chosen according to the maximum expected extent of the duty cycle variations from one period to another in the considered application. 
   The turning-off of transistor  1  in advance with respect to the occurrence of the positive halfwave is indispensable to avoid conduction of the system during this positive halfwave, which would cancel the desired rectifying effect. However, upon turning-on of the transistor (time t 2 ), the lag time (interval between times t 1  and t 2 ) may be eliminated if the application allows turning on as soon as the negative halfwave begins. 
   Several means may be envisaged to control time interval Δt on a predetermined minimum value to delay time t 3  in case of an increase in period P of voltage Vd or conversely to advance time t 3  in case of a shortening of period P, taking into account at least one previous period. 
     FIG. 6  shows the diagram of an example of the forming of a circuit  3  according to the present invention implementing these functions. It shows, again, transistor  1  to be controlled, as well as diode  2  in parallel. To simplify the discussion, the means for providing supply voltage Vcc have not been shown in  FIG. 6 . They are, for example, constituted by diode  4  and of capacitor  5  as in  FIG. 4 . 
     FIGS. 7A to 7H  will be described together with  FIG. 6 , the operation of which they explain in timing diagrams showing examples of shapes at characteristic points of the circuit. 
   As discussed previously, the circuit operation is conditioned by the disappearing of voltage Vd or more specifically the switching from a positive to a negative halfwave of this voltage Vd ( FIG. 7A , time t 1 ) with the direction conventions of the drawings. 
   The detection of the direction of voltage Vd is performed by means of a resistive dividing bridge R 1 -R 2  connected between terminals K and A, and having its midpoint connected to the input of an inverter  10 . Inverter  10  is used to put in digital form the detection signal. Voltage V 10  ( FIG. 7B ) at the output of inverter  10  is at a positive level (state  1  substantially corresponding to supply voltage Vcc of the inverter) from time t 1  and for the entire duration of the negative halfwave of voltage Vd, that is, until time t 4 . 
   The output of inverter  10  drives a differentiator  11  (for example, a resistive and capacitive cell RC) having its output connected to the base of an NPN-type bipolar transistor (or an equivalent means) having the function of short-circuiting a capacitor  13  otherwise receiving a current from a current source  14  drawing its power from power supply Vcc. The emitter of transistor  12  is connected to terminal A while its collector is connected to the junction point of source  14  and of capacitor  13 . Signal V 11  ( FIG. 7C ) at the output of the differentiator exhibits a pulse of short duration at each time t 1  when voltage Vd disappears. This pulse turns on transistor  12 , which discharges capacitor  13  (voltage V 13 ,  FIG. 7D ). From time t 5  when the control of transistor  12  disappears, the charge of capacitor  13  by constant current source  14  starts again. The interval between times t 1  and t 5 , set by the time constant of differentiator  11 , is chosen to be as small as possible. A sawtooth signal with a period P is thus generated (neglecting pulse t 5 -t 1 ). 
   Voltage V 13  is applied to the inverting input of an operational amplifier  15 . The output of amplifier  15  is sent to the input of two timing elements (for example, delay lines)  16  and  17  introducing respective predetermined delays td 1  and td 2 . Output V 15  ( FIG. 7E ) of amplifier  15  switches high at time t 1  when the voltage of its inverting input disappears.  FIG. 7F  illustrates the shape of voltage V 16  at the output of delay element  16 . Arbitrarily, it has been assumed in this example that delay td 1  is greater than delay td 2 . It should however be noted that these delays need not be linked to each other. Delay td 1  corresponds to the minimum predetermined time interval between times t 3  and t 4  while delay td 2  corresponds to the predetermined turn-on delay of switch  1  (interval between times t 1  and t 2 ). 
   In the example of  FIG. 6 , it is assumed that delay element  16  only acts on the falling edges of signal V 1   5  and introduces no delay on the rising edges. Similarly, it is assumed that delay element  17  only acts on the rising edges of signal V 15 . Such assumptions are coherent since times td 1  and td 2  are in practice negligible as compared to the switching period. 
     FIG. 7G  illustrates the shape of voltage Vc which corresponds to the output of element  17 . Optionally, a buffer or level-adapting amplifier  18  is provided between the output of element  17  and the gate of transistor  1 . Amplifier  18  then is, preferably, controllable as will be subsequently described in relation with  FIG. 8 . 
   The output of element  16  is combined in a gate of X-OR type  19  with the state detected by inverter  10  (signal V 10 ).  FIG. 7H  illustrates the result of this combination (signal V 19 ), which crosses an integrator  20  before being looped back on the non-inverting input of amplifier  15 . The value of the error provided by integrator  20  is visible in  FIG. 7D  (level V 20 ) and the time when the ramp of signal V 13  reaches value V 20  corresponds to time t 3  when interval td 1  starts being downcounted by element  16 . 
   This amounts to adding, to duration td 1 , a variable time ter which tends towards 0 by the closed-loop control. Time ter corresponds to the control error, the integral of which is multiplied by a coefficient E by integrator  20 . This approximately corresponds to a first order linear system. The larger constant E, the faster a variation of the duty cycle is recovered. There theoretically is no limit to value E, except for possible saturation or the like problems. 
   In  FIG. 7 , the case where error ter nulls out on the second period is considered. The interval between times t 3  and t 4  then corresponds to constant td 1 . Of course, in practice, duration ter tends towards zero but is never really zero. 
   Preferably, the possible variation of duration ter is limited to constant td 1  to avoid, when error ter subtracts to constant td 1 , for transistor  1  to be conductive while voltage Vd is positive. 
   An advantage of the present invention is that the transistor control circuit is completely autonomous and requires no fixed voltage reference (for example, the ground) for the circuit to which the rectifying element is connected. The only constraint is that, to enable its supply (provision of voltage Vcc) and a proper operation, the signal applied across transistor  1  must effectively be an A.C. signal. 
     FIG. 8  partially shows additional elements of the circuit of  FIGS. 4 and 6  according to a preferred embodiment of the present invention. Circuit  3  of  FIG. 8  comprises the elements described in relation with  FIG. 6 , only controllable buffer  18  of which has been shown. 
   According to this embodiment, circuit  18  is controlled (activated or deactivated) to block the control signal of transistor  1  under the effect of an RS-type flip-flop  30 . The input for setting to 1 (S) of flip-flop  30  is connected, by an inverter  31 , to cathode K and its input for resetting to 0 (R) is connected to the output of an operational amplifier  32 . The respective inverting and non-inverting inputs of amplifier  32  are connected to terminals K and A. The function of such an assembly is to turn off the MOS transistor if, incidentally, the voltage between terminals K and A inverts during a negative halfwave. Indeed, as soon as voltage Vd becomes positive, the output of amplifier  22  switches high, which turns off amplifier  18 . 
   However, at each falling edge of voltage Vd, signal S switches to state  1 , which activates amplifier  18 . 
     FIG. 18  illustrates another alternative concerning the supply circuit. The case in point is to insert a resistor R between diode  4  and capacitor  5 . This resistor R enables the charge current of capacitor  5  to be of leakage current type while it is of recovery current type in the absence of resistor R. The voltage provided by capacitor  5  may be regulated by a circuit  33  (REG) before providing voltage Vcc to block  3 . 
   An advantage of the present invention is that it provides a unidirectional autonomous circuit likely to replace a diode in many applications. Further, the present invention enables replacing a transistor in a synchronous operation since the circuit performs an automated synchronization with respect to the voltage present between terminals A and K. In this type of application, the present invention enables preserving the switch position on the positive line (conversely to  FIG. 2  where transistor N 1  is on the ground line). It is thus avoided to cut the ground line, which considerably improves the fulfilling of electromagnetic constraints. 
   Another advantage of the present invention is that (except for short switching times (durations td 2  and td 1 +ter)), the series voltage drop of the rectifying element of the present invention corresponds to that of a MOS transistor and is thus considerably smaller than that of a diode. 
   Of course, the present invention is likely to have various alterations, modifications, and improvements which will readily occur to those skilled in the art. In particular, other circuits than those illustrated in relation with  FIG. 6  may be used to perform the functions of introducing a predetermined turn-on delay and a variable turn-off delay for the MOS transistor. Similarly, in an implementation of the type of that of  FIG. 6 , the logic states selected for the operation of circuit  3  are arbitrary, provided that the level of signal Vc is compatible with the control of transistor  1 . 
   Further, the connection of a rectifying circuit according to the present invention in a conventional converter is within the abilities of those skilled in the art based on the functional indications given hereabove. 
   Moreover, although the use of a MOS transistor is preferred, other switches can be envisaged. For example, a bipolar transistor may be used, with the provision of a current control and an oversizing of system supply capacitor  5 . 
   Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and the scope of the present invention. Accordingly, the foregoing description is by way of example only and is not intended to be limiting. The present invention is limited only as defined in the following claims and the equivalents thereto.