Abstract:
An improved method for maintaining optimal amplifier bias current utilizing a signal conditioning element  0710  which serves to symmetrically condition a sense voltage  0105  such that the sense voltage  0105  distortion is substantially determined by properties of the signal conditioning element  0710  rather than by properties of the amplifier amplification devices  0101  or the input perturbing signal.

Description:
[0001]    Contained herein is an application for a utility patent for the invention AMPLIFIER BIAS CONTROL invented by Kevin M Hayes of 1911N. East Av. Sarasota Fla. 34234. 
         [0002]    The present invention is in the technical field of electronic amplifiers, more particularly in the technical field of audio power amplifiers. 
       BACKGROUND OF THE INVENTION 
       [0003]    To realize high fidelity audio reproduction it is of paramount importance for an amplifying device&#39;s bias current to remain constant. Deviations from this optimum bias current alter the device&#39;s gain and frequency response which negatively impact audio quality. 
         [0004]    Amplifier bias current is influenced by many factors like ambient temperature change, instability of bias setting circuitry and device performance parameter drift (transconductance and offset) over time. As such it is desirable to establish a methodology to automatically and autonomously account for and correct for these effects. 
         [0005]    An electronic device&#39;s current can be inferred by imposing said current across a resistor to create a sense voltage. Electronic control loops can then be used to monitor the low frequency (DC) components of the sense voltage and make circuit adjustments to maintain bias current at a user defined optimum value. The important inference here is that the sense voltage DC component is a faithful representation of device bias current. In other words it is assumed that a constant proportionality exists between the sense voltage DC component and the device bias current. 
         [0006]    When no perturbing signal, such as an audio signal, is passing through the device the proportionality inference of [005] is valid and the sense voltage DC component is guaranteed to represent the device&#39;s bias current. As such any sense voltage DC deviation represents a true bias current shift which is accompanied by a control loop response serving to cancel the deviation reestablishing the optimum bias current. 
         [0007]    There is a range of perturbing signal amplitudes increasing from “smaller” to “larger” where the introduction of said signal will not affect the sense voltage DC component and thus maintain the relationship of [005]. This region is the termed the class A range and it is in this region optimum bias current is maintained. Outside this range however the perturbing signal amplitude becomes large enough to cause sense voltage distortion which in turn adds a sense voltage DC component. This distortion induced DC component is indistinguishable from a DC component due to bias current shift and consequently the control loop works to remove it. In other words large perturbing signals cause distortion which forces a control loop correction which serves to adjust the device away from the optimal bias. The region in which input signals become large enough to cause appreciable sense voltage distortion is called the class B range. It is important to note that this definition of class B differs somewhat from the strict industry interpretation. For the sake of brevity it is expedient to classify distortions arising from operation in class AB and true class B, as defined strictly in industry, into the comprehensive term “class B”. A control loop response resulting from a DC shift caused solely from entering class B operation is undesirable since optimum bias is not maintained which negatively impacts audio quality. 
         [0008]    Prior art approaches have attempted to minimize the class B sense voltage distortion by using diodes to limit the positive going portion of the sense voltage. One weakness of this approach is that the distortion introduced by the negative going sense voltage is not considered or accounted for. This distortion being neither systematic nor predicable introduces DC components to the system which are incorrectly acted on by the control loop. This results in the modulation of the bias current away from the optimal value. Another major failing of the prior art approach is that the positive going excursion limiting depends on a diode&#39;s absolute forward voltage drop which is strongly dependant on absolute temperature. 
       SUMMARY OF THE INVENTION 
       [0009]    This invention&#39;s purpose is to establish a known bias current through an electronic amplification device independent of device performance parameter drift and independent of distortion caused by perturbing signals. 
         [0010]    This disclosure describes an electronic circuit which controls the bias current of an electronic amplification device which operates, absent a perturbing signal, in class A mode but under the influence of a perturbing signal may enter class B operation. This invention automatically controls the amplification device&#39;s bias current irrespective of the class of operation. 
         [0011]    The invention disclosed here involves preconditioning the sense voltage to make the proportionality assumption of [005] valid independent of whether the device operates in class A or class B or if the device&#39;s performance parameters drift over time. 
         [0012]    These advantages of the present invention will become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures. 
     
    
     
       BRIEF DESCRIPTIONS OF THE DRAWINGS 
         [0013]      FIG. 1  depicts a block diagram of an exemplary prior art control system used to establish a known bias current in an amplification device. 
           [0014]      FIG. 2  introduces a “small” input signal to the exemplary prior art control system of  FIG. 1 . This signal causes the amplification device to operate exclusively in the class A region. As such no distortion appears at the sense voltage  0305  and no control loop corrective action is taken. 
           [0015]      FIG. 3  introduces a “large” input signal to the exemplary prior art control system of  FIG. 1 . This signal causes the amplification device to enter the class B region and as such distortion appears at the sense voltage  0305 . This distortion then produces an accompanying sense voltage  0305  DC component and an undesirable control loop correction. 
           [0016]      FIG. 4  introduces a diode signal conditioning block  0410  to the exemplary prior art control system of FIG  1 . The diode signal conditioning block&#39;s purpose is to limit the sense voltage&#39;s  0305  positive excursion to minimize the DC component introduced to the diode conditioned voltage  0412 . 
           [0017]      FIG. 5   a  adds detail to the prior art approach for the diode signal conditioning block  0410  of  FIG. 4 . The positive going excursion of the conditioned voltage  0412  is limited by a diode&#39;s forward voltage drop. The negative going excursion of the conditioned voltage  0412  is established by unpredictable and non systematic properties of the amplification device  0101  of  FIG. 4 .  FIG. 5   b  provides additional detail for the definitions of the high and low levels produced in response to the diode signal conditioning block  0410  at the diode conditioned voltage  0412 . The high level  0501  is solely determined by a diode&#39;s forward diode drop and the low level  0502  is determined by properties of the amplification device  0101 . 
           [0018]      FIG. 6  discloses the present invention. A symmetrical signal conditioning block  0610  replaces the diode signal conditioning block  0410  of  FIG. 4 . 
           [0019]      FIG. 7   a  introduces the symmetrical conditioning element  0710  which includes the clamp high terminal  0703  and the clamp low terminal  0704 .  FIG. 7   b  provides additional detail for the definitions of the high and low levels produced in response to the symmetrical signal conditioning block  0610  at the conditioned voltage  0612 . Unlike in the prior art manifestations the high level  0701  is not established by diode forward drops and the low level  0702  is not influenced by properties o f the amplification device  0101 . Instead both the high  0701  and low  0702  levels are produced by a common, systematic, and predictable mechanism. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0020]      FIG. 1  depicts an exemplary prior art block diagram used to establish an amplification device&#39;s  0101  bias current. This amplification can be provided by any device including but not limited to a bipolar transistor, a MOS transistor, a JFET transistor or a vacuum tube. A sense voltage  0105  is created by passing the device&#39;s current through resistor  0102 . The resistor  0102  enables direct measurement of the amplification device&#39;s  0101  bias current by monitoring the sense node  0104  and applying ohm&#39;s law. A control loop  0103  can then compare the sense voltage  0105  to a given bias voltage  0107  and then operate on the amplification device  0101 . The control loop&#39;s operation on the amplification device  0101  typically takes the form of adjusting the amplification device&#39;s control terminal (base, grid, gate) voltage until the sense voltage  0105  equals the bias voltage  0107 . And in this way the optimum predetermined bias current is maintained through the amplification device  0101 . 
         [0021]    In the case of  FIG. 1  the proportionality relationship between the bias voltage  0107  and sense voltage  0105  is 1:1 but generally need not be. What is important is for the bias voltage&#39;s  0107  DC component to faithfully represent the amplification device&#39;s  0101  DC bias current component independent of the input signal&#39;s  0109  amplitude. 
         [0022]    For audio applications the control loop  0103  has a bandwidth as low as practicably possible so that it works only to correct the DC component of the sense voltage without impacting the information contained in higher frequencies. If the bandwidth of the control loop is too high it will work to reduce the amplitude of some portion of the audio spectrum which is undesirable. 
         [0023]      FIG. 2  depicts an exemplary prior art block diagram with a “small” input voltage  0209  imposed on the input node  0108 . Small is used to denote a signal which causes the amplification device  0101  to operate exclusively in the class A region. The sense voltage  0205  appearing at the sense node  0104  will exhibit no appreciable distortion and thus contributes no DC component to the sense voltage  0205 . This in turn means no corrective action is taken by the control loop  0103  and the optimum device bias current is maintained. In other words there is a range of perturbing signal amplitudes that maintain class A operation and thus produce no appreciable distortion at the sense node  0104 . Since no distortion appears at the sense voltage  0305  no control loop corrective action is taken and optimum device bias is preserved. 
         [0024]      FIG. 3  depicts an exemplary prior art block diagram with a “large” input voltage  0309  imposed on the input node  0108 . Large is used to denote a signal which causes the amplification device  0101  to operate in both the class A and class B regions. The sense voltage  0305  appearing at the sense node  0104  exhibits significant distortion in both the positive going excursion and the negative going excursion in the form of gain compression. This distortion produces an accompanying sense voltage  0305  DC component resulting in an undesirable control loop correction which moves the device from its optimum bias. In other words there is a range of perturbing signal amplitudes that cause departure from class A operation producing distortion in the sense voltage  0305  at the sense node  0104 . The DC component of the distorted sense voltage  0305  initiates a control loop correction moving the device away from optimum bias. 
         [0025]    The mechanisms which produce the positive and the negative distortion are different and uncorrelated. The positive going distortion being primarily caused by gain modulation due to high device current while the negative going distortion is primarily caused by gain modulation due to low device current. The net result of both distortions is the addition of a DC component to the sense voltage  0305  which causes the control loop  0103  to take corrective action and to improperly adjust the bias current away from the optimum value. 
         [0026]      FIG. 4  introduces a diode signal conditioning block  0410  to the exemplary prior art control system of FIG  1 . The diode signal conditioning block  0410  attempts to minimize the distortion induced DC component at the diode conditioned node  0411  by limiting only its positive going voltage excursion. 
         [0027]      FIG. 5   a  shows a prior art manifestation of the diode signal condition block  0410 .  FIG. 5   b  describes the high level  0501  and low level  0502  produced by the diode signal conditioning block  0410 . The high level  0501  being substantially determined by a diode&#39;s forward voltage drop and the low level  0502  being substantially determined by the amplification device&#39;s  0101  low current operating behavior. The high level  0501  is not predictable because of the inherent temperature sensitivity of a diode forward voltage to temperature and the low level  0502  is not predictable because it is determined by amplification device&#39;s  0101  properties that can change over time. 
         [0028]    The DC component of the diode conditioned voltage  0412  can then be viewed as resulting from a superposition of diode induced distortion during a positive going voltage excursion in conjunction with distortion produced as the amplification device  0101  it is deprived of current during a negative voltage excursion. These two sources of distortion are clearly neither correlated, stabile nor predictable and thus sum to produce an unpredictable non-zero result resulting in a control loop correction. 
         [0029]    Another limitation of the diode clamp embodiment is that a diode&#39;s resistance changes drastically as it goes from an off to an on state. The effectiveness of the clamping action then depends on the sense voltage&#39;s  0104  amplitude because this determines the degree to which the diode is on. In effect by using diodes, the limiting action can be segmented into three modes or regions. The first being the class A mode where no control loop correction is required and the input signal is small enough to keep the diodes in the diode signal conditioning block  0410  always off . The second region being the margin between class A and class B operation where the diodes are just beginning to conduct and the third region being the case where a large input signal is present forcing the diodes to be on for a significant portion of the cycle. In other words the character of the diode limiting distortion depends on the amplitude of the input signal which is unknown and variable. The issues highlighted in [027], [028] and [029] represent the major shortcomings in the prior art approach. 
         [0030]      FIG. 6  discloses the invention which provides a solution to the problem of class B operation influencing device bias current. The innovation is represented by the substitution of the diode signal conditioning block  0410  of  FIG. 4  with the symmetrical signal conditioning block  0610 . The purpose of the symmetrical signal conditioning block  0610  is to impose distortion on both the positive going excursion and the negative going excursion in a manner that is predicable, stable and correlated. Unlike in the prior art approach the symmetrical signal conditioning block  0610  provides positive limiting and negative limiting using a common mechanism whose temperature and operational stability is guaranteed. The superposition of the positive going and negative going distortions then produce a sum that more substantially cancels which prompts a smaller control loop  0103  correction. 
         [0031]      FIG. 7   a  shows a more detailed invention block diagram which includes the symmetrical conditioning element  0710  as well as the clamp high terminal  0703  and the clamp low terminal  0704 . The symmetrical conditioning element  0710  can take the form of any number of readily available, purpose built integrated circuits which serve to limit the positive and negative going voltages excursions of the sense voltage  0305  in response to the clamp high terminal  0703  and the clamp low terminal  0704 . An example of such an integrated circuit is an Analog Devices AD8036 clamping amplifier 
         [0032]      FIG. 7   b  describes the high level  0701  and low level  0702  produced by the symmetrical conditioning element  0710 . The high level  0701  is determined by the clamp high terminal  0703  and the low level  0702  is determined by the clamp low terminal  0704 . It is important to note that neither the high level  0701  or low level  0702  depend on diode forward drops or any low current performance limitations of the amplification device  0101  unlike in the prior art approach. 
         [0033]    The symmetrical signal conditioning provided by the symmetrical conditioning element  0710  takes the form of buffering and then limiting the sense voltage&#39;s  0305  excursions above and below the optimum bias point voltage. It is important the methodologies for limiting the positive and negative excursion are the same so as to produce symmetrical positive going and negative going waveform sections. This symmetry substantially minimizes the distortion induced DC component at the control loop input  0611  and thus minimizes the amount by which the control loop  0103  inadvertently adjusts device bias. 
         [0034]    This specification makes obvious the advantages conferred by the disclosed invention over the prior art in maintaining an amplification device&#39;s optimum bias current . Symmetrically conditioning a sense voltage using a purpose built, integrated limiting circuit overcomes prior art deficiencies described in [027], [028] and [029].