Abstract:
A DC-to-DC converter having a transformer with a primary and a tapped secondary, two serial output filter inductors connected parallel with the secondary, a center output filter inductor connected between the secondary tap and serial output inductors, two serially connected switches connected in parallel with the two output inductors for receiving a signal to control operation of the switches during steady state and an output load connected between the serial connection of the serial output inductors and serial switching devices. The transformer primary side connected with double-ended primary-side topologies. The transformer secondary and output filers configured to form a current tripler rectifier, current quadtupler rectifier or current N-tuper rectifier. The output filter inductors evenly share output current resulting in reduction of current and thermal stress during high current application and the rectification topology has simple driving for synchronous rectifier application without increasing complexity of control and operation of primary-side topologies.

Description:
This application claims the benefit of priority to U.S. Provisional Patent Application No. 60/808,612 filed on May 26, 2006. 

   FIELD OF THE INVENTION 
   This invention relates to DC-to-DC converters and, in particular, to methods, systems, apparatus and devices for high-density, high-frequency, and high efficiency isolated dc-dc converters. 
   BACKGROUND AND PRIOR ART 
   There are three conventional rectifier topologies for low voltage applications.  FIG. 1   a  shows the prior art forward rectifier with its main switching waveforms for steady-state operation. As shown by the waveforms in  FIG. 1   b,  the rectifier transformer has unidirectional utilization. There is one output filter inductor, which carries full load current, leading to high current and thermal stresses for high current applications. Another problem with the prior art forward rectifier is that full load dc current bias is difficult for the inductor magnetic design and always results in bulky inductor size and hence inflexibility for PCB layout designs. As a result, the forward rectification is not suitable for high current applications. 
   For the center-tapped rectifier, the transformer utilization is bi-directional, however, a single output filter inductor is used to carry the whole load current. The conventional center-tapped rectifier is shown in  FIG. 2   a,  and its key steady-state operation waveforms are shown in  FIG. 2   b.  As shown, the transformer utilization are bi-directional, however, a single output filter inductor is utilized to carry the whole load current. Therefore, the filter inductor suffers high current and thermal stresses for high current applications, resulting in bulky inductor size and inflexibility for footprint budget and PCB layout. Moreover, the transformer secondary windings are not efficiently utilized due to the fact that one of two tapped secondary windings conducts the full load current for half of the switching period. Consequently, center-tapped rectifier is not well suited for high current applications. 
     FIG. 3   a  shows a current doubler rectifier and the corresponding key steady-state operation waveforms are shown in  FIG. 3   b.  As shown, there are two output filter inductors, and each carries only half of the load current. Compared with center-tapped rectifier, the copper loss in the inductors is reduced and inductor magnetic design is simplified since each inductor carries half of the load current, which results in better thermal management and design flexibility. In addition, the transformer utilization is improved since the transformer secondary winding is used for bi-directional currents over the whole switching cycle and the transformer winding carries half of the load current. 
   In high-performance microprocessor and telecommunication applications, the system operation speed and integration density keeps increasing so that the required converter supply voltage continuously decreases while supply current continuously increases due to the increasing power level requirement. Since real estate on printed circuit boards is limited, high-current high-power-density power conversion is demanded for microprocessor and telecommunication applications. In general, conversion efficiency and thermal management are the restrictions against high power density. 
   High switching frequency is an effective way to improve power density, and topologies featuring high efficiency at high switching frequency are desirable. In addition, topologies with even current and thermal stresses are also demanded, especially for low voltage and high current applications. Because secondary-side conduction loss dominates the overall power loss in isolated low-voltage high-current dc-dc converters, secondary-side topologies are desirable to have low conduction loss and well-distributed power dissipation to improve overall conversion efficiency and satisfy thermal management requirement. 
   The present invention provides current tripler rectification topology for high current applications. Basically, an additional inductor is added in the current doubler rectifier to help share the load current, and each inductor carries only one-third of the load current. As a result, it has better power dissipation than the conventional center-tapped and current doubler topologies, leading to better thermal management and potentially improved power density. In addition, compared to center-tapped rectifier, transformer secondary winding utilization is also improved and the transformer winding conduction loss is reduced. 
   SUMMARY OF THE INVENTION 
   A primary objective of the invention is to provide new methods, systems, apparatus and devices for a current tripler secondary-side rectification topology for use in isolated dc-dc converters in high current applications. 
   A secondary objective of the invention is to provide new methods, systems, apparatus and devices for a current tripler secondary-side rectification for use in various primary topologies such as full bridge, half bridge and push pull topologies. 
   A third objective of the invention is to provide new methods, systems, apparatus and devices for a current tripler secondary-side rectification that has good thermal management, simplified magnetic design and low copper loss for inductor and transformer due to the fact that the load current is better distributed in three inductors. 
   A forth objective of the present invention is to provide new methods, systems, apparatus and devices for a current tripler secondary-side rectification that has high current capability; the rectification topology of the present invention has simple driving for synchronous rectifier application without increasing the complexity of the control and operation of primary-side topologies. 
   A fifth objective of the present invention is to provide new methods, systems, apparatus and devices for a current quadrupler rectification topology. 
   A sixth objective of the present invention is to provide new methods, systems, apparatus and devices for a current N-trupler rectifier topology. 
   A seventh objective of the present invention is to provide new methods, systems, apparatus and devices for secondary-side rectification topology in isolated converters. 
   The present invention provides a DC-to-DC converter having a transformer with a primary side winding and a secondary side winding having a tap, at first and second output filter inductor serially connected in parallel with the secondary winding, a center output filter inductor having a first end and a second end, the first end connected to the secondary tap and second end connected to a serial connection of the first and second output inductor, a serially connected first and a second switching device connected in parallel with the first and second output inductors for receiving a driving signal to control the operation of the first and second switching devices during steady state operation and a output load connected between the serial connection of the first and second output inductor and the serial connection of the first and second switching devices, wherein the output filter inductors evenly share an output current resulting in a reduction in current and thermal stress for high current application. The input stage applying ac voltage to the primary side winding of the transformer is a double-ended primary-side topology, such as a half bridge primary topology, a full bridge primary topology and a push-pull primary topology. 
   In a first embodiment, the transformer secondary winding is a center-tapped secondary winding and the transformer has a turns ration is n: 1:1 and the center output filter inductance includes a third output filter inductor forming a current tripler rectification topology, wherein the current tripler rectifier control and operation of the primary side topologies is the same as used for conventional center-tapped and current doubler rectifiers. 
   In a second embodiment, the transformed secondary side winding has a first and a second tap, the first tap between a first and second secondary winding and the second tap between the second secondary winding and a third secondary winding and the center output filter inductors include a fourth output filter inductor connected between the first tap and the serial connection of the first and second output filter inductors and a fifth output filter inductor connected between the second tap and the serial connection of the first and second output filter inductors forming a current quadrupler rectifier, wherein the first, second, fourth and fifth output filter inductors evenly share a load current and the transformer secondary side winding carries partial load current to have higher current capability for DC-DC conversion. 
   Another embodiment of the present invention provides a current N-tupler, wherein the transformer includes N-1 secondary-side windings having N-2 secondary taps between adjacent secondary side windings and the center output filter inductor includes N output filter inductors, one end of each output filter inductors connected to one of the (N-2) secondary side taps, the other end of the N output filter inductors connected to the serial connection of the first and second output filter inductors to form the N-tupler rectifier, wherein each of the N output filter inductors evenly shares 1/N load current. 
   Further objects and advantages of this invention will be apparent from the following detailed description of preferred embodiments which are illustrated schematically in the accompanying drawings. 

   
     BRIEF DESCRIPTION OF THE FIGURES 
       FIG. 1   a  is a schematic diagram of a prior art forward rectifier (half-wave rectifier). 
       FIG. 1   b  shows waveforms corresponding to steady state operation of the forward rectifier shown in  FIG. 1   a.    
       FIG. 2   a  is a schematic diagram of a prior art center-tapped rectifier. 
       FIG. 2   b  shows waveforms corresponding to steady state operation of the center-tapped rectifier shown in  FIG. 2   a.    
       FIG. 3   a  is a schematic diagram of a prior art current doubler rectifier. 
       FIG. 3   b  shows waveforms corresponding to steady state operation of the current doubler rectifier shown in  FIG. 3   a.    
       FIG. 4   a  is a schematic diagram of a current tripler rectifier of the present invention. 
       FIG. 4   b  shows waveforms corresponding to steady state operation of the current tripler rectifier shown in  FIG. 4   a.    
       FIG. 5   a  is schematic diagrams showing operation of the current tripler rectifier during a first mode of operation, respectively, according to the present invention. 
       FIG. 5   b  is schematic diagrams showing operation of the current tripler rectifier during a second mode of operation, respectively, according to the present invention. 
       FIG. 5   c  is schematic diagrams showing operation of the current tripler rectifier during a third mode of operation, respectively, according to the present invention. 
       FIG. 5   d  is schematic diagrams showing operation of the current tripler rectifier during a fourth mode of operation, respectively, according to the present invention. 
       FIG. 6  is a schematic diagram of a current quadrupler rectifier topology according to the present invention. 
       FIG. 7  shows waveforms corresponding to steady state operation of the current quadrupler rectifier shown in  FIG. 6 . 
       FIG. 8  is a schematic diagram of a current N-tupler rectifier topology according to the present invention. 
       FIG. 9  shows waveforms produced from an experimental prototype according to the present invention. 
       FIG. 10  is a graph showing the efficiency comparison for an input voltage of 48V. 
       FIG. 11  is a table showing a comparison between the topology of the present invention and the conventional center-tapped and current-doubler rectifiers. 
   

   DESCRIPTION OF THE PREFERRED EMBODIMENTS 
   Before explaining the disclosed embodiments of the present invention in detail it is to be understood that the invention is not limited in its application to the details of the particular arrangements shown since the invention is capable of other embodiments. Also, the terminology used herein is for the purpose of description and not of limitation. 
   The method, system, apparatus and device of the present invention provides a current tripler rectification (CTR) topology and the key steady-state operation waveforms are shown in  FIGS. 4   a  and  4   b,  respectively. There are three output filter inductors L 1 , L 2  and L 3  and the transformer Tx secondary side is center-tapped. The primary ac voltage pulse can be generated by state-of-the-art topologies such as push-pull, half bridge and full bridge primary-side topologies. The transformer turns ratio is n: 1:1 as labeled. 
   Ignoring the leakage inductance and applying ac voltage pulse to the primary side of the transformer Tx as shown in  FIG. 4 , according to volt-second balance across the inductors, the output voltage is obtained in terms of duty cycle and input voltage. 
                         V   o     =       2   ·   D   ·     V   in       n             (     0   ≤   D   ≤   0.5     )                 (   1   )               
where V in  is the input voltage, and D is the steady-state duty cycle value. The dc voltage gain of the above current tripler rectifier is the same for both the center-tapped and the current doubler rectification topologies. By removing either the inductor L 3 , or by removing both the inductors L 1  and L 2  from the topology of the present invention, these respective conventional topologies are obtained.
 
   Neglecting the inductor current ripple, each inductor&#39;s dc current is one third of the load current: 
                     I   1     =       I   2     =       I   3     =       1   3     ⁢     I     o   ⁢                       ,           (   2   )               
where I o  is the load current. When the applied ac pulse is absolutely symmetrical, the dc bias of the transformer&#39;s magnetizing current is zero:
 I M =0   (3) 
   The operation principle of the current tripler rectifier is described by four operation modes as shown in  FIGS. 5   a - 5   d,  when a symmetrical ac pulse signal is applied to the primary side of the transformer. For this description of circuit operation, the following assumptions are made:
     The converter operates in steady state.   Components are considered ideal except otherwise indicated.   Leakage inductance L 1  is neglected.   

   In  FIGS. 5   a - d,  the active portion of the circuit is shown with bold lines while the inactive circuitry is shown with thin black lines. As shown in  FIG. 5   a  in conjunction with the waveforms shown in  FIG. 4   b,  in Mode  1  (t 0 &lt;t&lt;t 1 ); At t 0 , the positive voltage V in  is applied to the primary side of transformer Tx. Switch SR 1  is turned off and SR 2  is on. The inductor L 1  is linearly charged by voltage 
             (         2   ·     V   in       n     -     V   o       )     ,         
and in the inductor L 1  current L 3  linearly increases as shown in  FIG. 4   b  at the slope:
 
                     ⅆ     i   1         ⅆ   t       =           2   ·     V   in       n     -     V   o         L   1               (   4   )               
where V o  is the output voltage and n is the transformer&#39;s turns ratio. The inductor L 3  is linearly charged by voltage difference between the reflected input voltage in the secondary side and the output voltage, and inductor current i 3  is increasing with the slope:
 
                     ⅆ     i   3         ⅆ   t       =           V   in     n     -     V   o         L   3               (   5   )               
During the Mode  1  interval shown in  FIG. 5   a,  inductor L 2  is discharged by the output voltage V o . The inductor current i 2  freewheels through output capacitor C O  and SR 2 , and decreases linearly shown in  FIG. 4   b  at the following slope:
 
   
     
       
         
           
             
               
                 
                   
                     ⅆ 
                     
                       i 
                       2 
                     
                   
                   
                     ⅆ 
                     t 
                   
                 
                 = 
                 
                   
                     V 
                     o 
                   
                   
                     L 
                     2 
                   
                 
               
             
             
               
                 ( 
                 6 
                 ) 
               
             
           
         
       
     
   
   Referring to  FIG. 5   b  in conjunction with  FIG. 4   b,  in Mode  2  (t 1 &lt;t&lt;t 2 ) the transformer Tx primary is shorted or opened according to the operation and control of the primary-side topology at t 1 . Switches SR 1  and SR 2  are both on, as shown by the thick black lines in  FIG. 5   b,  to provide a freewheeling path for the three filter inductor currents i 1 , i 2  and i3. As shown by the three inductor current waveforms in  FIG. 4   b,  the three output inductors L 1 , L 2  and L 3  are all linearly discharged by the output voltage V o , and the three inductor currents decrease at the same slope as follows: 
                     ⅆ     i     1   ⁢                   ⅆ   t       =       V   o       L   1               (   7   )                   ⅆ     i   2         ⅆ   t       =       V   o       L   2               (   8   )                   ⅆ     i   3         ⅆ   t       =       V   o       L   3               (   9   )               
showing that each of the three inductor currents during Mode  2  are approximately one-third of the output current I o /3.
 
     FIG. 5   c  shows an operational circuit during Mode  3  (t 2 &lt;t&lt;t 3 ). As shown in  FIG. 4   b,  at t 2  the negative voltage −V in  is applied to the primary-side of the transformer. Switch SR 1  is on and SR 2  is turned off. The inductor L 1  is linearly discharged by the output voltage V o , and the inductor L 1  current i 1  freewheels as shown in  FIG. 4   b  and decreases at the following slope: 
                     ⅆ     i   1         ⅆ   t       =       V   o       L   1               (   10   )               
The inductor L 2  is charged by the difference voltage
 
             (         2   ·     V   in       n     -     V   o       )     ,         
and the inductor current i 3  linearly increases at the slope:
 
                     ⅆ     i   2         ⅆ   t       =           2   ·     V   in       n     -     V   o         L   2               (   11   )               
The inductor L 3  is linearly charged by difference voltage
 
             (         V   in     n     -     V   o       )     ,         
and i 3  increases with the slope:
 
                     ⅆ     i   3         ⅆ   t       =           V   in     n     -     V   o         L   3               (   12   )               
The operational circuit for Mode  4  is shown in  FIG. 5   d  for the time period (t 3 &lt;t&lt;t 4 ). At t 3 , the transformer primary side voltage becomes zero, and it repeats the same freewheeling mode as shown in  FIG. 4   b  and described for Mode  2  operation until the time instant t 4 . As shown, the three inductor currents decrease with the same slope as:
 
                     ⅆ     i     1   ⁢                   ⅆ   t       =       V   o       L   1               (   13   )                   ⅆ     i   2         ⅆ   t       =       V   o       L   2               (   14   )                   ⅆ     i   3         ⅆ   t       =       V   o       L   3               (   15   )               
The operation mode returns to Mode  1  after Mode  4 , and a next switch cycle starts.
 
   The current tripler rectification topology of the present invention can be used with double-ended primary-side topologies such as push-pull, half bridge and full bridge. There is no difference between the current tripler rectifier and the conventional center-tapped and current doubler rectifiers in terms of the control and operation of the primary-side topologies. In addition, the driving signals for the secondary-side synchronous rectifiers (SRs) are identical to those for the conventional center-tapped and current doubler rectifiers. 
   In the topology of the present invention described above, there are three output inductors L 1 , L 2  and L 3  evenly sharing the load current I o  and thus the current stress is relieved in high current applications. As a result, the inductors design is simplified and better thermal management is achieved. 
   Detailed comparison between the topology of the present invention and the conventional center-tapped and current-doubler rectifiers are shown in the table of  FIG. 11 . For fair comparison, assume that three rectifiers operate with the same switching frequency and have the identical input and output voltages, as well as equal load currents and output ripple currents. Current values in Table 1 do not reflect the effect of the ac components in the inductor currents for the purpose of simplicity. 
     FIG. 11  shows that the current tripler rectifier has the same dc voltage gain as the center-tapped and current doubler rectifiers, and as a result, the steady-state duty cycle values are also the same. In addition, the rms current and voltage stress of synchronous rectifiers are the same. As mentioned above, the driving signals for the synchronous rectifiers are also the same. Therefore, the design of the primary-side circuits, transformer and synchronous rectifiers are the same for the three compared rectification topologies. 
   The inductor currents in the current tripler rectifier are only one-third of that in the center-tapped rectifier, while the individual inductor currents in the current doubler rectifier are half of that in the center-tapped rectifier. However, to achieve the same output ripple current, the filter inductance in the current doubler rectifier need to be doubled, and the filter inductance in the current tripler rectifier need to be tripled as shown in  FIG. 11 . One of the distinct features for the current tripler rectifier is its better current distribution and possible lower power dissipation across the power train, which alleviates difficulties in thermal management and packaging for high current applications, which leads to potentially increased power density. 
   Since the load current is evenly shared by three independent output inductors as shown in  FIG. 11 , the topology has the lowest total inductor copper loss as compared with the center-tapped and the current doubler rectifier given identical dc resistance for each inductor. Another advantage of the rectification technique of the present invention is the simplest magnetic design for inductors because of the reduction in the inductor dc current. 
   Besides, the current tripler rectifier has better transformer utilization and lower transformer winding conduction loss than the center-tapped rectification in that the secondary winding in the rectifier is used all over the switch cycle and only carries partial load current when conducting. As shown in  FIG. 11 , transformer secondary winding rms current in the current tripler rectifier is also lower than that in the center-tapped rectifier. 
   Also, the addition of the third inductor is a benefit to PCB layout design and power density improvement. Since the physical size of the magnetic core is proportional to the energy stored in it 
             (       1   2     ⁢     I   2     ⁢   L     )     ,         
the total volume of three inductors should be the same as that of the current doubler rectifier and the center-tapped rectifier. For discrete magnetics approach, the individual inductor size is reduced, which makes PCB layout design more flexible. Further converter size reduction can benefit from integrated magnetics and correspondingly increase the power density.
 
   Therefore, compared to the center-tapped rectifier and the current doubler rectifier, the current tripler topology of the present invention has high current capability, well-distributed power dissipation and good thermal management for high current applications. 
   The current tripler rectification concept of the present invention can be extended to the Current Quadrupler rectifier topology as shown in  FIG. 6 .  FIG. 7  shows the current quadrupler rectifier&#39;s key waveforms for steady-state operation for Mode  1 , Mode  2 , Mode  3  and Mode  4 . Like the current tripler rectifier previously described, the four individual inductors L 1 , L 2 , L 3  and L 4  evenly share the load current I o  and the transformer secondary side winding carries partial load current in the current quadrupler rectifier. As a result, the current quadrupler has even higher current capability and better thermal management than the current tripler topology. Since each inductor current is only one fourth of load current, the inductor magnetic design is further simplified than that in the current tripler rectifier. However, the transformer design is more complex since there are three secondary windings. As a result, there&#39;s a trade-off in selection of rectifier topologies. 
   In general, the current tripler rectification concept can be extended to the current N-tupler rectifier as shown in  FIG. 8 . In this example, there are (N-1) transformer secondary-side windings and N inductors in the current N-tupler rectification topology. Each inductor evenly shares 
           1   N         
load current, leading to more evenly distributed power dissipation over the power train and thus easier power management. As a matter of fact, current doubler and current tripler rectifiers are particular examples of the current N-tupler topologies where N is two and three, respectively.
 
   Similar to the current tripler rectifier, the inductor magnetic design is simplified due to the reduction of the dc bias current and it has the same control and operation of primary side topology as conventional current doubler rectifier without any complexity increase in driving circuitry for switches SRs. However, the current N-tupler rectifier becomes impractical for higher current output when N is larger than four because there are too many filter inductors and secondary-side windings for the transformer resulting in complicated transformer structure as shown in  FIG. 8 . 
   An experimental prototype of the symmetrical half bridge dc-dc converter with the current tripler rectifier was built with the nominal input voltage 48V, output voltage 1.2V, and maximum load current of 45 A. In the prototype, Si7456 is used for two main switches S 1  and S 2  of the primary-side half bridge converter, and Si7868 MOSFET manufactured by Vishay is used for the secondary-side synchronous rectifier SR 1  and SR 2 , two in parallel each side. Core ER14.5/3F3 Manufactured by Bobbin is selected as the planar transformer with turns ratio of 12:1:1. The converter runs at the switching frequency of 211 kHz and each output inductor has an inductance value of 0.8 μH and DCR value of 0.588 mΩ. 
   The experimental current waveforms i 1 , i 2  and i 3  of the topology of the present invention are shown in  FIG. 9  as well as the transformer primary voltage waveform V in . As shown, the load current is evenly distributed in the three inductors. Removing the inductor L 3  from the topology of the present invention, the converter becomes the conventional half bridge dc-dc converter with the current doubler synchronous rectifier.  FIG. 10  compares the efficiency curves between the CTR rectifier and the conventional current doubler rectifier at V in =48V, which are measured with the same primary-side half bridge dc-dc converter respectively. As shown, the current triper rectifier achieves up to 1.5% efficiency improvement over the current doubler rectifier at 45 A load, which verifies that the topology is advantageous over the conventional current doubler rectifier. Noting that the efficiency improvement increases with the load current in  FIG. 10  verifies that the current tripler rectifier is more suitable for high current applications than the current doubler rectifier and significant efficiency improvement is expected for higher output current. 
   While the invention has been described, disclosed, illustrated and shown in various terms of certain embodiments or modifications which it has presumed in practice, the scope of the invention is not intended to be, nor should it be deemed to be, limited thereby and such other modifications or embodiments as may be suggested by the teachings herein are particularly reserved especially as they fall within the breadth and scope of the claims here appended.