Abstract:
Sequence network circuits are provided for use in three-phase protective relaying applications. In one embodiment, the circuit includes input circuit means for receiving input signals, one of which comprises a reference input signal, and signal processing means for processing such input signals. The signal processing means includes an operational amplifier and a single capacitor. A plurality of resistors couple the input signals to the operational amplifier. The value of the resistors and the capacitor are selected such that the output signal of the operational amplifier is representative of the quadrature voltage, relative to the reference input signal, and shifted 90° lagging with respect to its normal phase position. Other embodiments are disclosed.

Description:
This is a continuation of application Ser. No. 041,137, filed May 21, 1979, and now abandoned. 
    
    
     BACKGROUND OF THE INVENTION 
     The present invention relates to sequence network circuits, and more particularly to such circuits for use in protective relaying applications. 
     The present invention employs the well known theory of symmetrical components. This theory is explained in sustantial detail in the textbook, Symmetrical Components, by Wagner and Evans, published by McGraw-Hill in 1933. 
     The theory of symmetrical components is widely employed in protective relaying applications. In this connection, see the following U.S. Patents: 
     U.S. Pat. No. 4,034,269-Wilkinson, issued July 5, 1977; U.S. Pat. No. 4,091,433-Wilkinson, issued May 23, 1978, and U.S. Pat. No. 3,992,651-Hodges, issued Nov. 16, 1976. 
     One problem with several available sequence network circuits is that such circuits often include an undesirable number of components, such as operational amplifiers and capacitors, which can contribute extraneous transient output signals and increased cost per function. Also, such available circuits can not be conveniently modified to vary the circuit output characteristics as may be necessary when employing such a circuit in different types of protective relaying applications. Further, it would be desirable, for certain protective relaying applications, to provide simple sequence network circuits, such as: quadrature voltage circuits and positive sequence enhancement (positive sequence mix) circuits wherein the input signals to such latter circuits could be either phase-to-neutral or phase-to-phase signals. 
     Accordingly, it is a general object of this invention to provide sequence network circuits having a small number of components. 
     It is another object of this invention to provide such sequence network circuits which can be conviently modified for use in different protective relaying applications. 
     It is another object of this invention to provide such sequence network circuits which include quadrature voltage circuits and positive sequence enhancement circuits. 
     SUMMARY 
     In carrying out one form of my invention, I provide a sequence network circuit for use in combination with a three-phase (X, Y, Z) a-c power system. The circuit includes input circuit means for receiving: (1) three separate input signals respectively representative of the phase-to-neutral voltage in the three phases (X, Y, Z) and a fourth input signal representative of the negative of the zero sequence voltage therein; or (2) three separate input signals respectively representative of the line current in the three phases (X, Y, Z) and a fourth input signal representative of the negative of the zero sequence current in the system. 
     The circuit inlcudes signal processing means, having: 
     1. an operational amplifier having a non-inverting input adapted to be coupled to a reference potential and an inverting input coupled to its output through a feedback resistor R F , 
     2. a capacitor C, one side of which is adapted to be coupled to the reference potential and the other side of which is coupled to a junction 14, 
     3. a resistor R 5  coupled between the junction 14 and the inverting input of the operational amplifier with a summing point 16 being provided between resistor R 5  and the inverting input, 
     4. a resistor R 1A  coupling a first one of the three input signals to summing point 16 and a resistor R 1B  coupling the first input signal to junction 14, the first input signal comprising a reference input signal, 
     5. a resistor R 2A  coupling a second one of the three input signals to summing point 16, 
     6. a resistor R 3B  coupling a third one of the three input signals to junction 14, 
     7. a resistor R 4A  coupling the fourth input signal to summing point 16 and a resistor R 4B  coupling the fourth input signal to junction 14, 
     wherein the values of the components in the circuit are selected such that the output signal E of the operational amplifier is representative of the quadrature voltage, relative to the reference input signal of 4. above, and shifted 90° lagging with respect to its normal phase position. 
     Other forms of sequence network circuits are provided. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram of one form of sequence network circuit of the present invention. 
     FIG. 2 is a circuit diagram of another form of sequence network circuit of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring initially to FIG. 1, one form of sequence network circuit of the present invention is generally designated 10. The sequence network circuit 10 includes an operational amplifier 12 having its non-inverting input coupled through resistor R to a reference potential. The sequence network circuit receives four input voltage signals: E X , E Y , E Z , and -E O . These input signals are respectively representative of either: the phase-to-neutral voltage in phases X, Y, Z of a three-phase a-c power system (which may, for example, respectively represent phases A, B, C) and the negative of the zero sequence voltage therein; or the line currents and the negative of the zero sequence current flowing in a three-phase a-c power system, all of such input signals having a common reference potential. The sequence network circuit 10 includes a single capacitor C, one side of which is coupled to junction 14 and the other side of which is coupled to the reference potential. 
     A feedback resistor R F  is coupled between the inverting input and the output of operational amplifier 12. Resistor R 5  is coupled between junction 14 and a summing point 16. Input signal -E O  is coupled through resistor R 4A  to summing point 16 and through resistor R 4B  to junction 14. Input signal E X  is coupled through resistor R 1A  to summing point 16 and through resistor R 1B  to junction 14. Input signal E Y  is coupled through resistor R 2A  to summing point 16. Input signal E Z  is coupled through resistor R 3B  to junction 14. For purposes which will be discussed later in connection with another form of sequence network circuit of the present invention, resistors R 2B  and R 3A  are shown in dashed lines in FIG. 1. More particularly, resistor R 2B  couples input signal E Y  to junction 14 and resistor R 3A  couples signal E Z  to summing point 16. 
     The output signal E of the operational amplifier 2 of FIG. 1 is established by the following relation: 
     
         E=-i.sub.s R.sub.F                                         (1) 
    
     where i s  is the current flowing out of summing point 16. 
     The current i s  flowing out of summing point 16 may be generally expressed as: ##EQU1## 
     wherein: X C  represents the reactance of capacitor C at system frequency, and R P  is defined by: 
     
         (1/R.sub.P =(1/R.sub.1B)+(1/R.sub.2B)+(1/R.sub.3B)+(1/R.sub.4B) (4) 
    
     Assigning appropriate values to the components of the sequence network circuit 10 of FIG. 1 results in various useful output signals E. For example, consider Case #1 in which the following values are assigned to circuit 10: 
     
                       Case #1______________________________________Quadrature Voltage at -90°(Phase-to-Neutral Input Signals)Component    Relationship  Exemplary Value (60 hertz)______________________________________Resistor R.sub.1A    (64/3)X.sub.C 56.2KΩResistor R.sub.2A    (32/3)X.sub.C 28.0KΩResistor R.sub.3A     ∞      OmitResistor R.sub.4A    (64/9)X.sub.C 18.7KΩResistor R.sub.1B    (8)(1 + S)X.sub.C                  28.7KΩResistor R.sub.2B     ∞      OmitResistor R.sub.3B    (4)(1 + S)X.sub.C                  14.3KΩResistor R.sub.4B    (8/3)(1 + S)X.sub.C                  9.53KΩResistor R.sub.5    (4/3)(1 - S)X.sub.C                  2.21KΩResistor R.sub.F    (64/3)X.sub.C (For 1 PU                  56.2KΩ    Output)Capacitor C    1/(2πf X.sub.C)                  1.00 μf______________________________________ 
    
     wherein: 
     S is assigned the fixed numeric value: ##EQU2## 
     X C  is assigned any arbitrary value. One exemplary arbitrary value of X C  is: 
     
         10.sup.3 /(0.12π)ohms=2.65258 KΩ. 
    
     Now, substituting the Case #1 relationships in expressions (3) and (4) results in: ##EQU3## 
     Substituting symmetrical components of the voltages E X , E Y , and E Z , as determined from symmetrical component theory, into expression (6) results in: 
     
         i.sub.s =(3/64X.sub.C)[E.sub.X1 -E.sub.X2 ]                (7) 
    
     
         E=-(3/64X.sub.C)R.sub.F [E.sub.X1 -E.sub.X2 ]              (8) 
    
     wherein E X1  represents the positive sequence component of phase X voltage and E X2  represents the negative sequence component of phase X voltage. 
     Substituting the relationship for R F  from Case #1 for one per unit output (1 PU) into expression (8): ##EQU4## 
     By definition, quadrature voltage is expressed, with respect to phase X, as: ##EQU5## 
     Therefore, comparing expressions (9) and (10), it can be seen that the sequence network circuit output signal E for Case #1 may be expressed as: ##EQU6## representing the quadrature voltage E QX   
     with respect to the reference phase-to-neutral input signal (phase X), and shifted 90° lagging with respect to its normal phase position. 
     Referring again to sequence network circuit 10 of FIG. 1, consider Case #2: 
     
                       Case #2______________________________________Positive Sequence Mix at 180°(Phase-to-Neutral Input Signals)                      ExemplaryComponent    Relationship      Value (60 hertz)______________________________________R.sub.1A     ##STR1##         5.62KΩR.sub.2A     ##STR2##         24.3KΩR.sub.3A ∞           OmitR.sub.4A     ##STR3##         12.1KΩR.sub.1B     ##STR4##         18.2KΩR.sub.2B ∞           OmitR.sub.3B     ##STR5##         9.09KΩR.sub.4B     ##STR6##         6.04KΩR.sub.5     ##STR7##         3.01KΩR.sub.F     ##STR8##         5.62KΩ    (For 1PU Output)C        1/(2πf X.sub.C)                      1.00 μf______________________________________ 
    
     wherein: 
     X C  is assigned any arbitrary value, e.g., X C  =10 3  /(0.12λ) ohms=2.65258 KΩ 
     For this Case, K 1  may be chosen to have any value in accordance with:  -1  ≦(1/K 1 )&lt;∞. K 1  has been assigned the exemplary value 0.3 for reasons which relate to one utilization of this sequence network circuit. 
     It can be shown that, under Case #2, using the one per unit output (1PU) relationship for R F , output signal E is: ##EQU7## representing the phase-to-neutral voltage of phase X summed with K 1  times the positive sequence component of phase X voltage, the sum having a 180° phase reversal with respect to the input signal E X . 
     For a balanced three-phase system, E X  =E X1  so, for such a condition of input signals, ##EQU8## Therefore, one per unit output, as defined by the relationship for R F , is the output magnitude when the input signals represent a balanced three-phase voltage set. 
     Referring again to FIG. 1, consider Case #3: 
     
                       Case #3______________________________________Positive Sequences Mix at 0°(Phase-to-Neutral Input Signals)Com-                        Exemplary Valueponent Relationship          (60 hertz)______________________________________R.sub.1A ∞               OmitR.sub.2A  ##STR9##             56.2KΩR.sub.3A  ##STR10##            43.2KΩR.sub.4A  ##STR11##            16.9KΩR.sub.1B  ##STR12##            18.2KΩR.sub.2B  ##STR13##            16.2KΩR.sub.3B  ##STR14##            21.0KΩR.sub.4B  ##STR15##            6.04KΩR.sub.5  ##STR16##            3.01KΩR.sub.F  ##STR17##            43.2KΩ (1PU)C     1/(2πf X.sub.C)    1.00 μf______________________________________ 
    
     wherein X C  has any arbitrary value, e.g., X C  =(10 3  /0.12π) ohms=2.65258 KΩ and K 1  may be chosen in accordance with: -1≦K 1 . As in Case #2, K 1  has been assigned the exemplary value of 0.3. 
     It can be shown that, under Case #3, using the one per unit output relationship for R F , output signal E is: ##EQU9## which is similar to expression (12) of Case #2 but at 0° with respect to the input signal E X . 
     For a balanced three-phase system, E X  =E X1  so, for such a case: 
     
         E.sub.BAL =+E.sub.X1                                       (15) 
    
     Therefore, one per unit output, as defined by the relationship for R F , is the output magnitude when the input signals represent a balanced three-phase voltage set. 
     Referring now to FIG. 2, another form of sequence network circuit of the present invention is generally designated 20. The network circuit 20 of FIG. 2 is similar to the network circuit 10 of FIG. 1 so that, whenever possible, like reference numerals have been employed to represent like elements. 
     Network circuit 20 receives three input voltage signals: E XY , E YZ , E ZX , respectively representative of the phase-to-phase voltages between phases X, Y, Z; or respectively representative of the delta currents flowing in phases X, Y, Z. Input signal E XY  is coupled through resistor R 6A  to summing point 16 and coupled through resistor R 6B  to junction point 14. Input signal E YZ  is coupled through resistor R 7A  to summing point 16 and through resistor R 7B  to junction 14. Input signal E ZY  is coupled through resistor R 8A  to summing point 16 and through resistor R 8B  to junction 14. For reasons which will be later apparent, resistors R 7B  and R 8A  are shown in dashed lines. 
     Consider Case #4 in which the following values are assigned to the circuit 20: 
     
                       Case #4______________________________________Positive Sequence Mix at 180°(Phase-to-Phase Input Signals)Com-                        Exemplary Valueponent Relationship          (60 hertz)______________________________________R.sub.6A  ##STR18##            2.87KΩR.sub.7A  ##STR19##            12.7KΩR.sub.8A ∞               OmitR.sub.6B  ##STR20##            9.09KΩR.sub.7B ∞               OmitR.sub.8B  ##STR21##            4.64KΩR.sub.5  ##STR22##            3.01KΩR.sub.F  ##STR23##            2.87KΩC     1/(2πf X.sub.C)    1.00 μf______________________________________ 
    
     wherein X C  and K 1  are chosen as in Case #2 for the determination of the exemplary values. 
     It can be shown, in a manner related to that hereinbefore discussed in connection with Cases #1 through #3, that under Case #4, output signal E of circuit 20 is: ##EQU10## where E XY1  is the positive sequence component of input voltage E XY . 
     Substituting the one per unit output relationship for R F  into expression (16) results in: ##EQU11## 
     The output signal E of expression (17) represents the phase voltage between phases X and Y summed with K 1  times the positive sequence component of the phase-to-phase voltage E XY , the sum having a 180° phase reversal with respect to the input signal E XY . 
     For a balanced three-phase system, E XY  =E XY1 , so, for such a case: 
     
         E.sub.BAL =-E.sub.XY1,                                     (18) 
    
     where one per unit output, as defined by the relationship for R F , is the output magnitude when the input signals represent a balanced three-phase voltage set. 
     Consider Case #5 in which the following values are assigned to the circuit 20: 
     
                       Case #5______________________________________Positive Sequence Mix at 0°(Phase-to-Phase Input Signals)Com-                        Exemplary Valueponent Relationship         (60 hertz)______________________________________R.sub.6A  ∞              OmitR.sub.7A   ##STR24##           28.0KΩR.sub.8A   ##STR25##           21.5KΩR.sub.6B   ##STR26##           9.09KΩR.sub.7B   ##STR27##           8.06KΩR.sub.8B   ##STR28##           10.5KΩR.sub.5   ##STR29##           3.01KΩR.sub.F   ##STR30##           21.5KΩ  (1PU)C      1/(2πf X.sub. C)  1.00 μf______________________________________ 
    
     wherein X C  and K 1  are chosen as in Case #3 for the determination of the exemplary values. 
     It can be shown that, under Case #5, output signal E of circuit 20 is: ##EQU12## or, when the one per unit output relationship for R F  is substituted, ##EQU13## 
     The output signal E of expressions (19) and (20) represent the same voltage as do the output voltage for the relationships given for Case #4 but includes 180° phase reversal thereto without the use of an additional inverting amplifier. 
     For a balanced three-phase system, E XY  =E XY1 , so, for such a case: 
     
         E.sub.BAL =+E.sub.XY1,                                     (21) 
    
     where one per unit output, as defined by the relationship for R F , is the output magnitude when the input signals represent a balanced three-phase voltage set. 
     GENERAL CONSIDERATIONS 
     It is to be appreciated that the sequence network circuits of the present invention are not limited to all of the details recited in Cases #1 through #5. More particularly, the sequence network circuits 10 and 20 of FIGS. 1 and 2 may be made applicable to a power source frequency other than the exemplary 60 hertz system. For example, 50 hertz sequence network circuits 10 and 20 can be obtained by employing a capacitor C of 1.2 μf instead of the exemplary capacitor value hereinbefore assigned in Cases 190 1 through #5, with no other component changes. Also, values of the feedback resistor R F  may be freely chosen to provide any desired output magnitude. For example, the output magnitude may be made different from the generally preferred one per unit value simply by changing the value of resistor R F  by the same ratio. 
     An advantage of the sequence network circuits of the present invention over available sequence network circuits is that, in the present invention, each circuit may include only one capacitor and only one operational amplifier. Also, the circuits 10 and 20 of FIGS. 1 and 2 can be conveniently modified to obtain various useful output signals, as discussed hereinbefore in connection with Cases 190 1 through 190 5 . Another advantage of the sequence network circuits of the present invention is the reduced circuit generation of transient responses, which transient responses represent erroneous information to successive protective relaying measurement circuits. This advantage is accomplished through the presence of the single reactive element C, and the short time constant associated therewith. 
     Exemplary protective relaying applications in which the sequence network circuits of the present invention may be employed are discussed in copending patent applications of: Ser. No. 879,653, filed Feb. 21, 1978, entitled, &#34;Ground Distance Relay Employing Phase Comparator Measurement&#34;; and Ser. No. 032,303, filed Apr. 23, 1979, entitled, &#34;Static Distance Relays With Improved Polarizing Signal&#34;. Each of these copending applications is assigned to the assignee of the present application and is hereby incorporated by reference into the present application. 
     Also, although the present invention has been illustrated as employing phase-to-neutral and phase-to-phase voltage input signals, it is equally applicable to input voltage signals representative of current signals. 
     The relationships of resistor R F  of FIGS. 1 &amp; 2 may be conveniently chosen for the one per unit output value, as previously described. In this connection, the value of K 1  in Cases 190 2-5 should not be chosen as -1. More particularly, when K 1  is assigned the value of -1, the output signal E will not contain any of the positive sequence component of the three-phase input signal set, and one per unit output cannot be defined as previously stated. For K 1  =-1, the output signals E in Cases #2, #3 will each be proportional to (E X2  +E 0 ) ∠0° with the output signals in Cases #4, #5 being proportional to E XY2  ∠0°. Further, the stated permissible values of K 1  for Cases #2-#5 include an infinitely large value. More particularly, for K 1  =∞, and for the one per unit relationships shown for R F , the output signals E for Cases #2, #3, #4, #5 respectively become: E X1  ∠180°; E X1  ∠0°; E XY1  ∠ 1/2°; and E XY1  ∠0°. 
     For some applications, it may be desirable to reassign the identities of phases X, Y, Z to be other than A, B, C. For example, X, Y, Z, may respectively represent B, C, A or C, A, B, such reassignments merely constituting a &#34;rolling&#34; of phase connections to respectively obtain phase B, C as reference, while maintaining the same phase sequence. Similarly, for those applications where phase-to-phase input signals are employed, the phase connections can also be &#34;rolled&#34;. 
     Another feature of the present invention is that the interchange of input signal connections to phases Y and Z provide additional useful output signals E. For example, with respect to Case #1 relationships, interchanging input signal connections to phases Y and Z provides an output signal which is 180° out-of-phase with the signal obtained using Case #1 connections. Further, if such an interchange of phase Y and Z connections is made for Cases #2 and #3, the result is the direct substitution of the negative sequence component E X2  for the positive sequence component E X1  shown in expressions (12) and (14). One per unit output, under these conditions, is defined as the output magnitude when the input signals represent a balanced reversed phase sequence three-phase voltage set. Similarly, for those applications where phase-to-phase input signals are employed, the YZ and ZX input connections can also be interchanged. 
     While I have illustrated preferred embodiments of my invention by way of illustration, many modifications will occur to those skilled in the art and I therefore wish to have it understood that I intend in the appended claims to cover all such modifications as fall within the true spirit and scope of my invention.