Abstract:
A voltage multiplier and driver circuit for energizing a backlight or lamp device in a timepiece. The circuit includes switching transistors responsive to an alternating signal for alternately disconnecting the lamp (load) while a capacitor is connected across a DC voltage source and for reconnecting the lamp (load) across a series (voltage additive) connection of the DC voltage source and the charged capacitor. The alternating signal frequency and duty cycle are selected to energize the lamp (load) to a predetermined color temperature.

Description:
BACKGROUND OF THE INVENTION 
     This invention relates generally to an improved voltage multiplier and driver circuit for use in a timepiece. It is particularly directed to the provision of a circuit means for energizing a lamp device in a timepiece. 
     Timepieces for some time now have used backlights to enable viewing where the ambient light condition is relatively poor. 
     The use of a backlight, particularly in a low voltage battery powered timepiece such as a portable clock or wristwatch, imposes a number of conditions upon the design of the driver circuit, VlZ: 
     It must have a very low power consumption; 
     It must be capable of energizing a lamp to luminese, i.e., have voltage-current rating, while operating from a relatively low voltage supply; 
     It must be inexpensive; 
     It must utilize a minimum number of components and optimize use of the available space within the timepiece. 
     The present invention provides an improved voltage multiplier and driver circuit which satisfies the above noted conditions. 
     The following patents represent some of the prior art pertinent to the field of voltage multipliers and backlights for timepieces: U.S. Pat. Nos. 2,980,816 issued Apr. 18, 1961 to Elmer Curry Payne; 3,673,572 issued June 27, 1972 to Philip O. Sliva; 4,068,295 issued Jan. 10, 1978 to Hubert Portmann; 3,955,353 issued May 11, 1976 to Brian Astle; 3,824,447 issued July 16, 1974 to Tsuneo Kuwabara and 3,008,429 issued Feb. 15, 1977 to James M. Phalan. 
     These patents are mentioned as being representative of the prior art and other pertinent patents may exist. 
     SUMMARY OF THE INVENTION 
     In the preferred embodiment of the invention the circuit comprises switching means responsive to a control signal for alternately connecting (first) a capacitor as a load across a DC voltage source and (next) connecting said capacitor as a voltage source in series with the DC voltage source across a lamp device such that the lamp device is periodically impulsed by the sum of the DC voltage source and the capacitor voltage. The periodicity, duty cycle and voltage of the impulses are selected to energize the lamp device to a predetermined color temperature. 
     Accordingly, an object of the invention is to provide a new and improved driver circuit for energizing a backlight or lamp device in a timepiece. 
     Another object of this invention is to provide a new and improved voltage multiplier circuit. 
     A further object of this invention is to provide a new and improved voltage multiplier and driver arrangement for providing voltage/current impulses to a load. 
     Further advantages and objectives of the present invention will be apparent from the following detailed description of the preferred embodiment of the invention. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     FIG. 1 is a schematic diagram of the voltage multiplier and driver circuit according to the invention. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     FIG. 1 is a detailed description of the best presently contemplated mode of carrying out the invention. 
     With reference to FIG. 1, the voltage multiplier and driver circuit comprises six transistors 1-6, a capacitor 7 and six resistors R1-R6. 
     The input power source 40 is a battery or direct current (DC) variable voltage source which varies between approximately 1.5 and 5 volts. The positive and negative terminals of the input power source 40 are connected to terminals 14 and 15, respectively. 
     The collector 8 of transistor 5 and the emitters 9, 10 of transistors 1 and 3, respectively, are connected to terminal 14. The emitter 11 of transistor 6 is connected, via resistor R5, to terminal 14. 
     The emitters 12 and 13 of the transistors 4 and 2, respectively, and emitter 16, via resistor R3, are connected to terminal 15, i.e., the negative terminal of the input power source 40. Terminal 15 and, therefore, the negative terminal of the input power source 40 is selected as the reference or ground potential for the circuit. 
     The collector 17 of transistor 6 is connected to the reference potential. 
     The base electrode 18, 19, via resistors R6 and R4 respectively, are connected to emitters 11 and 16, respectively. The collectors 20, 21 of transistors 1 and 2 are connected together and to the connection between resistors R1, R2 and one terminal (-) of capacitor 7, defining a junction point A. The other end of resistor R1, is connected to base 22 of transistor 3. And the other end of resistor R2 is connected to base 23 of transistor 4. 
     The collector 24 of transistor 3 is connected to a first output terminal 25 and the other (+) terminal of capacitor 7. 
     The collector 26 of transistor 4 is connected to a second output terminal 27. 
     The lamp 28 is connected across the first and second output terminals 25, 27. The lamp 28 is provided to illuminate a display of a timepiece, meter, calculator or the like (not shown). 
     The base electrode 29, 30 of transistors 5 and 6 are connected to an alternating signal input source 31. The alternating signal input source 31 provides alternating signal 32 having a variable frequency between approximately 200 and 2 KHZ. 
     Assuming for the moment that there is no signal input 32, transistors 1 and 2 are switched off, i.e., non-conducting, since the base 18 of PNP transistor 1 is connected, via resistors R6 and R5, to the positive terminal 14 and the base 19 of NPN transistor 2 is connected, via resistors R4 and R3, to the negative terminal 15. Junction point A is floating and, therefore, transistors 3 and 4 being of opposite conductivity type are prevented from connecting the lamp 28 across terminals 14 and 15. 
     In operation, as the logic &#34;1&#34; (positive) portion of the input signal 32 is applied to the bases 29, 30 of transistors 5 and 6, transistor 5 is switched on, i.e., conducting and transistor 6 is switched off, i.e., non-conducting. With transistor 5 switched on, base 19 is connected to the positive voltage terminal 14 potential, neglecting any voltage drop across transistor 5, which causes transistor 2 to be switched on connecting junction point A to the negative or ground voltage terminal 15. 
     A negative potential at junction point A causes transistor 4 to be switched off, disconnecting the lamp (load) 28 and output terminal 27 from the negative terminal 15 of the input voltage source 40, and causes transistor 3 to be switched on. 
     Switching on transistors 3 and 2 connects capacitor 7 across terminals 14 and 15 causing capacitor 7 to be charged approximately to the voltage potential of the power source 40. 
     As the logic &#34;0&#34; (negative) portion of the input signal 32 is applied to the bases 29, 30 of transistors 5 and 6, transistor 5 is switched off and transistor 6 is switched on. 
     Switching off transistor 5 results in switching off transistor 2 which disconnects junction point A from the negative terminal 15. 
     Switching on transistor 6 causes base 18 to approach the ground or negative potential of terminal 15, neglecting any voltage drop across transistor 6, which causes transistor 1 to be switched on connecting junction point A to the positive voltage terminal 14. 
     With junction point A connected to the positive voltage terminal 14, transistor 3 is switched off and transistor 4 is switched on. 
     Switching on transistor 4 couples the lamp (load) 28 in series between negative terminal 15, via output terminal 27 and transistor 4, and the positive terminal 14 via capacitor 7 and transistor 1. Capacitor 7 is connected in series circuit between the lamp (load) 28 and the input voltage source 40 and, being previously charged as shown, in series additive polarity with the input voltage source 40. In the above manner, the lamp (load) 28 is connected across the sum or additive voltage potentials of the input voltage V in  plus the capacitor (charged voltage) V c , i.e., V lamp  =V c  during each logic &#34;0&#34; control signal. 
     The above cycle is repeated to provide drive pulses to the lamp (load) 28 having periodicity proportional to the frequency of the input alternating signal 32. 
     The potential of the input voltage source 40 and the frequency of the input alternating signal 32 are variable to permit controlled variation of the color temperature of the lamp 28. 
     While a wide variety of types of lamp or backlight devices, transistors, frequencies, voltage-batteries or power sources may be employed, the circuit illustrated may be employed, the circuit illistrated in FIG. 1 was constructed and successfully operated using the following components: 
     Voltage source 40: 1.5 to 5 VDC 
     Input Alternating signal 32: 200-2 KHZ 
     Transistors 2, 5, 4: (Texas Instru.) 2 N 4401 
     Transistors 1, 6, 3: (Texas Instru.) 2 N 4403 
     Resistors 3, 5: 33 K Ohms 
     Resistors 4, 6: 100 Ohms 
     Resistors 1, 2: 270 Ohms 
     Capacitor 7: 50 uf, 6V DC 
     Lamp 28: 180 ma type 
     While there has been described herein what is considered to be the preferred embodiment of the invention, other modifications may occur to those skilled in the art, and it is intended that the appended claims to cover all such modifications fall within the true spirit and scope of the invention.