Abstract:
A switching mode power supply reduces switching losses during standby mode by alternately enabling and disabling the switching operation of a main switch during standby mode. When the main switch is enabled, it is forced to operate at a duty cycle which is greater than the minimum duty cycle. Therefore, the average switching frequency is reduced during standby mode, and switching losses are reduced accordingly. The switching mode power supply includes a current supply circuit which provides a first amount of current to a feedback capacitor when the main switch is operating, and a second, lower amount of current when the main switch is not operating. In standby mode, when the main switch is not operating, the reduced current from the current supply circuit causes the voltage across the feedback capacitor to be held at an artificially low level compared to normal mode, thereby causing the main switch to remain off even though the output voltage is below the setpoint level. When the output voltage finally falls low enough to cause the switch to turn on, the current from the current supply circuit returns to the normal level, and the power supply operates as if it was in normal mode. However, because the output voltage is well below the setpoint level, the switch operates at a high duty cycle, and since there is a light load in standby mode, only a few switching cycles are required to bring the output voltage back up to the setpoint level. Therefore, the average number of switching cycles in standby mode is reduced, and switching losses are reduced accordingly.

Description:
This application claims priority from Korean patent application No. 98-17735 filed May 16, 1998 in the name of Samsung Electronics Co., Ltd., which is herein incorporated by reference for all purposes. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates generally to switching mode power supplies, and more particularly, to a method and apparatus for reducing switching losses during standby mode in a switching mode power supply. 
     2. Description of the Related Art 
     Conventional electronic devices such as televisions, computer monitors, VCRs, etc., operate in a normal mode in which considerable power is consumed, and in a standby mode in which little power is consumed while waiting for the normal mode to resume. 
     Although most electronic devices consume less power in standby mode than in normal mode, most electronic devices remain in standby mode much longer than normal mode. Consequently, most countries have recently started placing restrictions on the amount of power consumed by devices in standby mode. 
     Conventional electronic devices attempt to reduce power consumption in standby mode by utilizing auxiliary power supplies, reducing input power, etc. However, the implementation of these methods increases the manufacturing cost considerably. 
     When a switching mode power supply (“SMPS”) operates in standby mode, most of the input power is consumed by the switching losses of a main switch, which is coupled to the primary winding of a transformer, and by an integrated circuit (IC) which controls the operation of the main switch. Therefore, to reduce power consumption in standby mode, it would be desirable to reduce switching losses from the main switch in standby mode. 
     SUMMARY OF THE INVENTION 
     It is therefore, an object of the present invention to reduce the power consumption of an SMPS in standby mode. 
     A further object of the present invention is to provide an inexpensive technique for reducing the power consumption of an SMPS in standby mode. 
     Another object of the present invention is to reduce the switching losses of an SMPS in standby mode. 
     To accomplish these and other objects, an SMPS in accordance with the present invention reduces switching losses during standby mode by alternately enabling and disabling the switching operation of a main switch during standby mode. When the main switch is enabled, it is forced to operate at a duty cycle which is greater than the minimum duty cycle. Therefore, only a few switching cycles are required to maintain the output voltage, so the average switching frequency is reduced during standby mode, and switching losses are reduced accordingly. 
     One aspect of the present invention is an SMPS which includes a current supply circuit that supplies a first amount of current when the main switch is enabled (i.e., is switching), and a second, lower amount of current when the main switch is disabled (i.e., has stopped switching). The current from the current supply circuit is used to charge a feedback capacitor, thereby generating a feedback voltage across the capacitor. A switch driver controls the operation of the main switch in response to the feedback voltage. A higher feedback voltage causes the switch to operate at a higher duty cycle. When the feedback voltage drops below a level that corresponds to the minimum duty cycle, the main switch stops switching. 
     Feedback control of the power supply output voltage is provided by a dependent current source which is coupled in parallel with the feedback capacitor so as to divert current from the current supply circuit away from the feedback capacitor. As the output voltage increases, the current flow through the dependent current source increases, and more current is diverted from the feedback capacitor. This causes the feedback voltage to decrease, and consequently, the duty cycle of the main switch decreases. 
     During normal mode, the power supply operates in a condition of equilibrium in which the current flowing through the dependent current source balances the first, higher amount of current from the current supply circuit, thereby maintaining the feedback voltage at a level required to maintain the output voltage at a predetermined level. 
     Standby mode begins when the load decreases rapidly. This causes the output voltage to momentarily rise higher than the predetermined output level because the main power section tends to provide constant power. As the output voltage rises, the current through the dependent current source increases rapidly, thereby diverting additional current from the feedback capacitor and causing the feedback voltage to fall below the level corresponding to the minimum duty cycle. This causes the main switch to stop switching, which in turn, causes the current supply circuit to begin supplying the second, lower amount of current, and also causes the output voltage to begin decreasing. 
     With the current supply circuit operating at the second, lower current level, the dependent current source diverts enough current from the feedback capacitor to maintain the feedback voltage below the level corresponding to the minimum duty cycle, even though the output voltage is below the predetermined level. Therefore, the main switch remains off. 
     As the output voltage continues to fall, the current through the dependent current source decreases until it falls below the second, lower current level from the current supply circuit, and the feedback capacitor then begins charging. This causes the feedback voltage to increase, and when it reaches the level corresponding to the minimum duty cycle, the main switch begins operating again. The switching operation of the main switch causes the current supply circuit to begin sourcing current at the first, higher level again, which consequently causes the feedback voltage across the feedback capacitor to rise rapidly, so the main switch operates at a duty cycle that is greater than the minimum duty cycle. The output voltage rises rapidly because there is only a small load on the power supply during standby mode even though the switch is operating at a relatively high duty cycle. 
     The increasing output voltage causes the current flowing through the dependent current source to increase, so more current from the current supply circuit is diverted from the charging capacitor. The feedback voltage is pulled below the level corresponding to the minimum duty cycle, so the main switch stops switching. The power supply continues to alternately start and stop the switching operation of a main switch as long as it remains in standby mode. 
     Another aspect of the present invention is a switching a switching mode power supply comprising: a main power section having a main switch for providing output power to a load in a normal mode and a standby mode; a switch driver coupled to the main switch for controlling the main switch responsive to a feedback signal, wherein the switch driver disables the main switch when the feedback signal reaches a level corresponding to a minimum duty cycle; a feedback circuit coupled to the switch driver for generating the feedback signal responsive to the output power; and a feedback manipulation circuit coupled to the feedback circuit for manipulating the feedback signal during standby mode to disable the main switch during a first period in standby mode and to force the main switch to operate at a duty cycle which is greater than the minimum duty cycle during a second period of standby mode. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate preferred embodiments of the present invention, and, together with the description, serve to explain the principles of the invention: 
     FIG. 1 is a conceptual circuit diagram of an embodiment of an SMPS in accordance with the present invention. 
     FIG. 2 shows a first preferred embodiment of the current supply circuit of FIG.  1 . 
     FIG. 3 shows waveforms of the main operation of each circuit described in FIG. 2 in the standby mode. 
     FIG. 4 shows a second preferred embodiment of the current supply circuit of FIG.  1 . 
     FIG. 5 shows waveforms of the main operation of each circuit described in FIG. 4 in the standby mode. 
     FIG. 6 shows a more detailed circuit diagram of an SMPS in accordance with the first preferred embodiment of the present invention. 
     FIG. 7 shows waveforms of the main operation of each circuit described in FIG.  6 . 
     FIG. 8 shows a more detailed circuit diagram of an SMPS in accordance with the second preferred embodiment of the present invention. 
    
    
     DETAILED DESCRIPTION 
     As shown in FIG. 1, an SMPS in accordance with the present invention comprises a main power section  100 , a feedback circuit  200 , a current supply circuit  300 , and a switch driver  400 . 
     The main power section  100  includes a primary winding coupled to an input supply voltage Vin, a capacitor C 1  connected to the primary winding, and a main switch SW 1  connected in parallel with capacitor C 1 . The main power section  100  receives the input voltage Vin and supplies the output voltage Vout to a load  500  through a transformer. The amount of output power is controlled by the duty cycle of the main switch SW 1 . 
     As with most SMPSs, the circuit of FIG. 1 feeds back the output voltage Vout, and utilize the feedback voltage to control the duty cycle of the main switch SW 1  in the main power section  100 , thereby providing an appropriate output voltage to the load  500 . 
     The feedback circuit  200  includes a dependent current source Ifb and a capacitor Cfb. The current from the dependent current source Ifb varies in response to the output voltage Vout. The feedback circuit  200  detects the output voltage Vout and generates a feedback voltage Vfb which controls the switch driver  400 . If the output voltage Vout increases, the current Ifb increases. Consequently, the feedback voltage Vfb, which appears across capacitor Cfb, decreases. 
     The current supply circuit  300  supplies current to capacitor Cfb and, as shown in FIG. 1, comprises two current sources I 1  and I 2 , and a switch SW 2 . In a preferred embodiment of the present invention, the current from the current supply circuit  300  is always provided to capacitor Cfb from both either the current source I 1  alone or from the current sources I 1  and I 2  simultaneously. In standby mode, the switch SW 2  turns off when the main power section  100  stops operating (that is, when the main switch SW 1  stops switching), and turns on while the main power section  100  starts operating. That is to say, current is provided to capacitor Cfb from both currents sources I 1  and I 2  simultaneously while the main power section  100  is operating, and from only the current source I 1  when the main power section  100  stops operating. Therefore, in the standby mode, more current is provided to capacitor Cfb while the main switch SW 1  executes switching operations than when it stops switching. 
     The switch driver  400  controls the main switch SW 1  in response to the feedback voltage Vfb from the feedback circuit  200 . 
     The operation of the SMPS of FIG. 1 will now be described. 
     In a conventional SMPS, a main switch operates at a fixed switching frequency corresponding to a minimum duty cycle in standby mode. However, occasionally, the switch must operate at a duty cycle that is lower than the minimum duty cycle to control the output voltage. In such a case, an intermittent switching pattern is adopted (i.e., one or two switching periods are skipped). However, this still results in high switching losses in standby mode. 
     To overcome this problem, an SMPS in accordance with the present invention as illustrated in FIG. 1 operates in standby mode by repeatedly alternating between operating at a duty cycle which is greater than the minimum duty cycle and operating with a duty cycle of zero. To accomplish this, the circuit of FIG. 1 varies the magnitude of the current from the current supply circuit  300  to the feedback circuit depending on whether the main switch SW 1  is operating. 
     When the main switch SW 1  stops operating, switch SW 2  turns off and, consequently, only the current I 1  is provided to capacitor Cfb. Since power is not provided to the load when switch SW 1  stops operating, the output voltage Vout decreases continuously. 
     Therefore, the current Ifb decreases continuously. When Ifb decreases below the value of I 1 , capacitor Cfb charges, thereby increasing the feedback voltage Vfb. 
     When the feedback voltage Vfb exceeds a predetermined reference voltage corresponding to the minimum duty cycle, the switch driver  400  begins operating the main switch SW 1 . This in turn causes SW 2  to turn on, thereby causing the current supply circuit  300  to provide both currents I 1  and I 2  to capacitor Cfb. The sudden increase in current to capacitor Cfb causes the voltage Vfb to increase, which in turn causes the power supply section  100  to operate with a duty cycle that is larger than the minimum duty cycle. This causes the output voltage Vout to increase, and the current Ifb increases accordingly. When current Ifb exceeds the sum of I 1  and I 2 , capacitor Cfb begins discharging, and the feedback voltage Vfb decreases accordingly. When the feedback voltage decreases below the reference voltage corresponding to the minimum duty cycle, the switch driver  400  causes the main switch SW 1  to stop switching. The above described steps are then repeated as long as the SMPS remains in standby mode. 
     FIG. 2 shows a first preferred embodiment of the current supply circuit in FIG.  1 . 
     As shown in FIG. 2, a current supply circuit  600  comprises a current source I 3 , resistors Ra, Rb, R 1 , R 2 , R 3 , a capacitor C 2 , diodes D 1 , D 2 , D 3 , D 4  and zener diodes ZD 1 , ZD 2 . 
     Diodes D 2 , D 3 , D 4  all have anodes connected to the current source I 3 . The cathode of diode D 3  is connected to one terminal of capacitor Cfb of the feedback circuit  200 . Resistors Ra, Rb are connected in series between the cathode of diode D 4  and a ground voltage. A node voltage Vd between resistor Ra and resistor Rb is input to the switch driver  400 . 
     Diode D 1  has its anode connected to a secondary winding which is coupled to a primary winding of the main power section  100 , and its cathode is connected to one terminal of resistor R 1 . Resistor R 1  has its other terminal connected to the cathode of the zener diode ZD 1 , and one terminal of each of capacitor C 2  and resistors R 2  and R 3 . The other terminal of resistor R 3  is connected to the cathode of zener diode ZD 2 . The anodes of the zener diodes ZD 1 , ZD 2 , and the other terminals of capacitor C 2  and resistor R 2  are grounded. 
     The operation of the current supply circuit  600  in FIG. 2 in the normal operation mode will now be described. 
     In normal mode, a winding voltage Va, which is induced on the secondary winding by the primary winding during every switching cycle, charges capacitor C 2  through diode D 1  until the voltage across C 2  reaches the breakdown voltage of zener diode ZD 1 . Capacitor C 2  is charged to the breakdown voltage level in a period of time that is shorter than the switching cycle of the main power section  100 . When the voltage Vb of capacitor C 2  reaches the breakdown voltage, diode D 2  is reverse biased. Thus, diode D 2  is always off in normal mode. Consequently, the current from current source I 3  flows through diodes D 3  and D 4 . The current supplied to the feedback circuit  200  increases, which is analogous to the switch SW 2  of FIG. 1 turning on. 
     When the output voltage Vout is slightly greater than the predetermined output voltage in normal mode due to a variation in the load, the current Ifb increases due to the increase in the output voltage Vout. As a result, the feedback voltage Vfb across capacitor Cfb decreases, and the voltage Vd, which is applied to the switch driver  400  decreases. This causes the switch driver  400  to reduce the duty cycle of the main power supply section  100 , thereby reducing the output voltage Vout to the predetermined level. 
     If the output voltage falls below the predetermined level due to variations in the load, the current Ifb decreases, and capacitor Cfb is charged by current from current source I 3  via diode D 3 . This causes the feedback voltage Vfb to increase, and the voltage Vd increases accordingly, thereby causing the switch driver  400  to increase the duty cycle of the main switch SW 1  in power supply section  100 . This causes the output voltage Vout to increase to the predetermined level. 
     The operation of the circuit of FIG. 2 in standby mode will now be described with referenced to FIG.  3 . When the main power section  100  stops switching, the winding voltage Va induced on the secondary winding decreases to almost ground level causing diode D 1  to turn off. Capacitor C 2  discharges via resistor R 2 . When Vb decreases below the value of the feedback voltage Vfb, diode D 2  turns on, and a portion of the current from current source I 3  flows through D 2  and R 2 . Therefore, the current supplied to the feedback circuit  200  is reduced by the amount of current flowing through D 2 . Since the main power section  100  has stopped operating, the output voltage Vout as shown in FIG. 3 decreases, thereby causing the current Ifb to decrease. 
     When the current Ifb decreases to a level that is less than the current flowing through D 3 , capacitor Cfb begins charging. When the feedback voltage Vfb reaches the reference voltage corresponding to the minimum duty cycle, the main switch SW 1  begins switching again, and the winding voltage Va increases causing diode D 1  to turn on. As capacitor C 2  charges, voltage Vb increases until diode D 2  turns off. Current ID 3 , which flows to the feedback circuit  200  via diode D 3 , then increases rapidly. The feedback voltage Vfb develops a ripple which is much larger than the reference voltage corresponding to the minimum duty cycle. Thus, the main switch SW 1  switches at a duty cycle that is much larger than the minimum duty cycle, thereby causing the output voltage Vout to increase. When Vout reaches the predetermined output voltage, the main power section  100  stops operating, and the operations described above are repeated. 
     The transient periods when the main power section turns on and off are not shown in the waveforms of FIG. 3 because they are shorter than the switching cycle of the main switch SW 1 . 
     Because the current supplied to the feedback circuit while the main power section is on is smaller than the current supplied while the main power section is off, the off periods are longer than the on period. Thus, the switching frequency decreases, and switching losses are reduced. 
     A second preferred embodiment of a current supply circuit  700  according to the present invention will be described with reference to FIG.  4 . 
     As shown in FIG. 4, a current supply circuit  700  comprises a current source I 4 ; diodes D 5 , D 6 , D 7 ; resistors R 4 , R 5 , R 6 , R 7 , Rc, Rd; a zener diode ZD 3 ; and a NPN bipolar transistor. 
     Diode D 5  has its anode connected to the secondary winding, which is coupled to the primary winding of the main power section  100  in FIG. 1, and its cathode connected to one terminal of resistor R 4 . The other terminal of resistor R 4  is connected to the cathode of the zener diode ZD 3  and one terminal of each of resistors R 5 , R 7 . The other terminal of resistor R 5  is connected to one terminal of resistor R 6  and the base of the transistor Q 1 . Transistor Q 1  has its collector connected to the other terminal of resistor R 7  and its emitter coupled to one terminal of capacitor Cfb in the feedback circuit  200 . 
     The anodes of diodes D 6  and D 7  are connected to the current source I 4 . The cathode of diode D 6  is connected to one terminal of capacitor Cfb. Resistors Rc, Rd are connected in series between diode D 7  and the around. The voltage at the node between resistor Rc and resistor Rd is input to the switch driver  300 . 
     The operation of the main power section  700  shown in FIG. 4 will be described. 
     In normal mode, the main power section  100  operates at a high duty cycle to maintain the output voltage Vout to a normal load. Thus, the feedback voltage Vfb remains at a relatively high level. The voltage Vt induced on the secondary winding is rectified by D 5  and flows through ZD 3 . The voltage Ve across zener diode ZD 3  is divided by resistors R 5  and R 6  and applied to the base of transistor Q 1 . Since Vfb is relatively high during normal mode, the base-emitter junction of Q 1  is reversed bias and Q 1  turns off. 
     The operation of current supply circuit  700  in standby mode will now be described with reference to FIG.  5 . When the main power section  100  stops operating, the voltage induced on the secondary winding decreases to almost ground level, thereby causing the voltage at the base of Q 1  to decrease to almost ground level as well. Thus, transistor Q 1  remains off. Since the main power supply section  100  is not operating, the output voltage Vout decreases continuously causing the dependent current Ifb to decrease. When the current Ifb decreases below the level of the current flowing through D 6 , capacitor Cfb begins charging. When the feedback voltage Vfb increases to the reference level corresponding to the minimum duty cycle, the main switch SW 1  begins switching, thereby causing the winding voltage Vt to increase. This turns on transistor Q 1  because the feedback voltage Vfb is near the reference voltage corresponding to the minimum duty cycle. When transistor Q 1  turns on, the current supplied to the feedback circuit  200  increases rapidly causing a ripple in the feedback voltage Vfb which is higher than the reference voltage corresponding to the minimum duty cycle. This in turn causes the main power section  100  to operate at a duty cycle which is greater than the minimum duty cycle. This causes the output voltage Vout to increase until it reaches the predetermined output level at which point the main supply section  100  stops operating and the steps described above are repeated. 
     FIG. 6 is a diagram showing more details of the first embodiment of the present invention. Elements in FIG. 6 which correspond to those of FIGS. 1 and 2 are described using the same reference numerals, and the description of their operation will not be repeated here. 
     FIG. 6 shows more details of an SMPS in accordance with the first embodiment of the present invention. Corresponding elements from FIG.  1  and FIG. 2 are described using the same reference numerals. 
     In FIG. 6, the main power section  100 , which is described generally in FIG. 1, further includes a bridge diode BD for rectifying an AC input, and a capacitor Cin and resistor Rin for filtering the rectified voltage. The main power section  100  utilizes a MOS (metal oxide semiconductor) switching transistor  110  as the main switch. 
     The dependent current source Ifb of the feedback circuit  200  utilizes a photo-coupler  210 . 
     The switch driver  400  has a sensing resistor Rsen connected between ground and the source of MOS transistor  110 , an offset voltage source, and a comparator  410  for receiving the output voltage from current supply circuit  600  and the offset voltage Voffset at its inverted and non-inverted input terminals, respectively. 
     Hereinafter, the operation of the detailed circuit in FIG. 6 is described with reference to FIG.  7 . 
     A high power level is supplied to the load in normal mode, so transistor  110  switches at a large duty cycle. The output voltage Vout is maintained at the predetermined voltage in normal mode and accordingly, the feedback voltage Vfb remains constant. A steady current flows from current source I 3  through diode D 3 , but not through diode D 2 . 
     When the load decreases rapidly, the circuit of FIG. 6 changes from normal mode to standby mode. When the load decreases, the output voltage Vout instantaneously becomes higher than the predetermined voltage because the main power section  100  tries to provide constant output power. As the output voltage Vout increases, the current Ifb from the photocoupler  210  increases greatly, thereby discharging capacitor Cfb and causing the feedback voltage Vfb to decrease greatly compared to normal mode. The voltage Vd applied to comparator  410  becomes lower than the offset voltage Voffset, and therefore, switching transistor  110  stops switching, and the SMPS of FIG. 6 enters standby mode. 
     The operation in standby mode has been described above. 
     The feedback voltage Vfb corresponding to the minimum duty cycle in FIG. 7 is the voltage at which Vd input to the comparator is equal to the offset voltage, and more particularly, Vfb=(Ra+Rb)/Ra×Voffset. 
     FIG. 8 shows more details of an SMPS in accordance with the second embodiment of the present invention. In FIG. 8, circuit elements similar to those in FIGS. 1,  4 , and  6  are shown with the same reference numbers. The operation of the various circuits shown in FIG. 8 are in many ways similar to the operation described above described embodiments, therefore, further description of the circuits will not be provided. 
     Because an SMPS in accordance with the present invention executes switching operation for a first period and stops switching operation for a second period during standby mode, the switching loss and the input power can be decreased. 
     Having described and illustrated the principles of the invention in a preferred embodiment thereof, it should be apparent that the invention can be modified in arrangement and detail without departing from such principles. We claim all modifications and variations coming within the spirit and scope of the following claims.