Abstract:
Various embodiments of the present invention provide systems and methods for recovering data from a storage medium. As an example, a data recovery circuit is disclosed that includes: a controller circuit, a data processing circuit, a selector circuit, and a combining circuit. The controller circuit is operable to position a sensor over a track of the storage medium at a first distance from the center of the track to yield a first data set, and to position the sensor over the track of the storage medium at a second distance from the center of the track to yield a second data set. The data processing circuit is operable to process a processing data set, and the selector circuit is operable to select between the first data set and a combined data set as the processing data set. The combining circuit is operable to combine the first data set with at least the second data set to yield the combined data set.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    The present inventions are related to systems and methods for data retrieval, and more particularly to systems and methods for retrieving data from a track based storage medium. 
         [0002]    Various circuits have been developed that provide for accessing data from a storage medium. As an example, a disk drive system typically includes a head that is positioned in relation to data on a storage medium to allow for sensing the information maintained on the storage medium. Where the head is not positioned correctly, the information on the storage medium may not be readable, and an error message is generated. Such a failure to properly recover data from the storage medium is undesirable. 
         [0003]    Hence, for at least the aforementioned reasons, there exists a need in the art for advanced systems and methods for recovering data from a storage medium. 
       BRIEF SUMMARY OF THE INVENTION 
       [0004]    The present inventions are related to systems and methods for data retrieval, and more particularly to systems and methods for retrieving data from a track based storage medium. 
         [0005]    Various embodiments of the present invention provide data recovery circuits that include: a controller circuit, a data processing circuit, a selector circuit, and a combining circuit. The controller circuit is operable to position a sensor over a track of the storage medium at a first distance from the center of the track to yield a first data set, and to position the sensor over the track of the storage medium at a second distance from the center of the track to yield a second data set. The data processing circuit is operable to process a processing data set, and the selector circuit is operable to select between the first data set and a combined data set as the processing data set. The combining circuit operable to combine the first data set with at least the second data set to yield the combined data set. 
         [0006]    In some instances of the aforementioned embodiments, the combining circuit is an averaging circuit operable to average the first data set with at least the second data set to yield the combined data set. In some cases, the averaging circuit includes: a coefficient table, an accumulation memory, a first multiplier circuit, a second multiplier circuit, and a summation circuit. The coefficient table is operable to provide a first coefficient and a second coefficient each corresponding to a number of data sets included in the combined data set. The accumulation memory is operable to store the combined data set. The first multiplier circuit is operable to multiply the first data set by the first coefficient to yield a first weighted data set, and the second multiplier circuit is operable to multiply a prior instance of the combined data set by the second coefficient to yield a second weighted data set. The summation circuit is operable to sum the first weighted data set with the second weighted data set to yield the combined data set. In one or more particular cases, the first coefficient is one and the second coefficient is zero when the first data set is an initial data set, and when the first data set is greater than the seventh consecutive data set the first coefficient and the second coefficient are the same as for a previously combined data set. 
         [0007]    In various instances of the aforementioned embodiments, the circuit further includes an analog to digital converter circuit operable to receive a signal derived from the head and to provide a corresponding series of digital samples; and an equalizer circuit operable to equalize the series of digital samples to yield the first data set and the second data set. In some instances of the aforementioned embodiments, the data processing circuit includes a data detection circuit and a data decoding circuit. In one or more instances of the aforementioned embodiments, the circuit further includes a head location controller circuit operable to position the sensor relative to the storage medium. In some such instances, the first distance from the center of the track is controlled by the head location controller based upon an input from the controller circuit, and the first distance from the center of the track is between a maximum positive offset and a negative maximum offset. In some cases, the input from the controller circuit is generated at least in part on a programmable offset value and a programmable step value. 
         [0008]    Other embodiments of the present invention provide methods for data recovery. The methods include: providing a storage medium having data stored along a track; receiving a first data set corresponding to information sensed from the track using a sensor disposed over the track at a first offset distance from the center of the track; receiving a second data set corresponding to information sensed from the track using the sensor disposed over the track at a second offset distance from the center of the track; combining the first data set with at least the second data set to yield a combined data set; and processing the combined data set. 
         [0009]    In some cases, processing the combined data set includes performing a data detection and a data decoding on the data set. In various instances of the aforementioned embodiments, the method further includes: positioning the sensor over the track at the first offset distance from the center of the track; and positioning the sensor over the track at the second offset distance from the center of the track. In some instances of the aforementioned embodiments, the first offset distance from the center of the track is a maximum offset, and the maximum offset is programmable. In various instances of the aforementioned embodiments, the method further includes calculating the second offset from the center of the track. In such instances, calculating the second offset from the center of the track is done by adding a step value to a previous offset position to yield the second offset from the center of the track. In some instances, combining the first data set with at least the second data set to yield the combined data set includes averaging the first data set with at least the second data set such that the combined data set is an average data set. 
         [0010]    This summary provides only a general outline of some embodiments of the invention. Many other objects, features, advantages and other embodiments of the invention will become more fully apparent from the following detailed description, the appended claims and the accompanying drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0011]    A further understanding of the various embodiments of the present invention may be realized by reference to the figures which are described in remaining portions of the specification. In the figures, like reference numerals are used throughout several figures to refer to similar components. In some instances, a sub-label consisting of a lower case letter is associated with a reference numeral to denote one of multiple similar components. When reference is made to a reference numeral without specification to an existing sub-label, it is intended to refer to all such multiple similar components. 
           [0012]      FIG. 1  depicts three track based read scenarios that occur in state of the art data recovery; 
           [0013]      FIG. 2  shows a storage system including a read channel with an off track data recovery circuit in accordance with some embodiments of the present invention; 
           [0014]      FIG. 3  depicts an off track data recovery circuit in accordance with some embodiments of the present invention; and 
           [0015]      FIG. 4  is a flow diagram showing a process in accordance with some embodiments of the present invention for off track data recovery. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0016]    The present inventions are related to systems and methods for data retrieval, and more particularly to systems and methods for retrieving data from a track based storage medium. 
         [0017]    Turning to  FIG. 1 , three track read scenarios  100 ,  101 ,  102  are depicted that occur in state of the art data recovery. Scenario  100  shows a head  105  (i.e., a sensing device or sensor) flying over a track  195  in a direction  103 . The dashed center line represents the alignment of head  105  relative to track  195 . In scenario  100 , head  105  is well centered over track  195 . Such a centered disposition of head  105  relative to track  195  yields a sensed signal output  120  with an amplitude  135 . 
         [0018]    Scenario  101  shows a head  110  flying over a track  195  in a direction  113 . The dashed center line represents the alignment of head  110  relative to a track  196 . In scenario  101 , head  110  is offset from track  196  by a positive delta distance  114 . Such an offset orientation of head  110  relative to track  196  yields a sensed signal output  125  with an amplitude  140 . Of note, amplitude  140  is less than amplitude  135 . Such a reduction in amplitude can result in an inability to recover the data sensed from track  196 . 
         [0019]    Scenario  102  shows a head  115  flying over a track  197  in a direction  123 . The dashed center line represents the alignment of head  115  relative to a track  197 . In scenario  102 , head  115  is offset from track  197  by a negative delta distance  124 . Such an offset orientation of head  115  relative to track  197  yields a sensed signal output  130  with an amplitude  145 . Of note, amplitude  145  is less than amplitude  135 . Such a reduction in amplitude can result in an inability to recover the data sensed from track  197 . 
         [0020]    Turning to  FIG. 2 , a storage system  200  including a read channel circuit  210  with an off track data recovery circuit is shown in accordance with various embodiments of the present invention. Storage system  200  may be, for example, a hard disk drive. Storage system  200  also includes a preamplifier  270 , an interface controller  220 , a hard disk controller  266 , a motor controller  268 , a spindle motor  272 , a disk platter  278 , and a read/write head  276 . Interface controller  220  controls addressing and timing of data to/from disk platter  278 . The data on disk platter  278  consists of groups of magnetic signals that may be detected by read/write head assembly  276  when the assembly is properly positioned over disk platter  278 . In one embodiment, disk platter  278  includes magnetic signals recorded in accordance with either a longitudinal or a perpendicular recording scheme. 
         [0021]    In a typical read operation, read/write head assembly  276  is accurately positioned by motor controller  268  over a desired data track on disk platter  278 . Motor controller  268  both positions read/write head assembly  276  in relation to disk platter  278  and drives spindle motor  272  by moving read/write head assembly to the proper data track on disk platter  278  under the direction of hard disk controller  266 . Spindle motor  272  spins disk platter  278  at a determined spin rate (RPMs). Once read/write head assembly  278  is positioned adjacent the proper data track, magnetic signals representing data on disk platter  278  are sensed by read/write head assembly  276  as disk platter  278  is rotated by spindle motor  272 . The sensed magnetic signals are provided as a continuous, minute analog signal representative of the magnetic data on disk platter  278 . This minute analog signal is transferred from read/write head assembly  276  to read channel circuit  210  via preamplifier  270 . Preamplifier  270  is operable to amplify the minute analog signals accessed from disk platter  278 . In turn, read channel circuit  210  decodes and digitizes the received analog signal to recreate the information originally written to disk platter  278 . This data is provided as read data  203  to a receiving circuit. A write operation is substantially the opposite of the preceding read operation with write data  201  being provided to read channel circuit  210 . This data is then encoded and written to disk platter  278 . 
         [0022]    In some cases, read channel circuit  210  is unable to recover the originally written data. In such cases, it may be tested whether the inability to recover the data is due to an improper positioning of read/write head assembly  276  relative to the track on disk platter  278  from which data is being read. Such an improper positioning results in an unacceptable lateral distance between read/write head assembly  276  and the center of the track being read. In such cases, the off track data recovery circuit included in read channel circuit  210  attempts to recover the data. The off track data recovery circuit may be implemented similar to that discussed in relation to  FIG. 3  below, and/or may operate consistent with the method discussed in relation to  FIG. 4  below. 
         [0023]    It should be noted that storage system  200  may be integrated into a larger storage system such as, for example, a RAID (redundant array of inexpensive disks or redundant array of independent disks) based storage system. It should also be noted that various functions or blocks of storage system  200  may be implemented in either software or firmware, while other functions or blocks are implemented in hardware. 
         [0024]    Turning to  FIG. 3 , an off track data recovery circuit  300  is shown in accordance with some embodiments of the present invention. Off track data recovery circuit  300  includes a controller circuit  305  operable to provide control signals  307  to a head location controller circuit  310 . In turn, head location controller circuit  310  provides a location control  311  to a head  312 . In response to location control  311 , head  312  is positioned relative to a track on a storage medium  315 . Controller circuit  305  is operable to adjust the location of head  312  relative to a given track from a maximum offset (e.g., a maximum positive offset) from one direction from the center of the track as indicated by a maximum offset input  303  by discrete step amounts indicated by a programmable step value  302  to the maximum offset (e.g., a maximum negative offset) from the opposite direction from the center of the track. In some cases, both maximum offset input  303  and programmable step value  302  are programmable. In other cases, one or both of the aforementioned are fixed values. 
         [0025]    At each step that controller circuit  305  moves head  312  relative to the center of the track being read, data is sensed from storage medium  315  and provided as an analog output  316  to an analog front end circuit  320 . Analog front end circuit  320  includes various circuitry used to prepare analog output  316  for analog to digital conversion by analog to digital converter circuit  325 . In some embodiments of the present invention, analog front end circuit  320  includes a preamplifier circuit (not shown) that amplifies analog output  316 , and a continuous time filter (not shown) that filters the amplified output. In particular, analog front end circuit  320  provides a processed output  321  to analog to digital converter circuit  325  where it is converted to a series of digital samples  326 . 
         [0026]    Digital samples  326  are provided to an equalizer circuit  330  that performs an equalization to yield an equalized data set  331  to a multiplexer circuit  332 . In some embodiments of the present invention equalizer circuit  330  is a digital finite impulse response filter as are known in the art. Multiplexer circuit  332  provides either equalized data set  331  or an averaged data set  351  as a processing data set  333 . Controller circuit  305  provides a selector output  306  that controls which of the multiplexer inputs are provided as processing data set  333 . 
         [0027]    Processing data set  333  is provided to a data processing circuit  335  where it is processed in an attempt to recover the data originally written to storage medium  312 . The recovered data is provided as data output  337 , and a convergence indicator output  336  is provided to controller circuit  305 . Data processing circuit  335  may be any circuit known in the art that is capable of decoding information in an attempt to recover an original data set. In one particular embodiment, data processing circuit includes a maximum a posteriori detector circuit and a low density parity check circuit as are known in the art. Other embodiments of the present invention include a data processing circuit that includes a Viterbi algorithm data detector circuit and a low density parity check circuit as are known in the art. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of data processing circuits that may be used in relation to different embodiments of the present invention. 
         [0028]    Off track data recovery circuit  300  includes a read averaging circuit  370  (shown in dashed lines) that is operable to average each of the data sets that are re-read each time controller circuit  305  causes an offset from the center of the track being read. Read averaging circuit  370  includes a counter circuit  340  that increments each time the track is successfully re-read under direction of a count output  308 . In some embodiments, a data set is considered successfully re-read where the synchronization information included as part of the data set was properly identified. Counter circuit  340  is also reset once either the data from the particular track has been recovered as indicated by convergence indicator output  336  or once all of the steps between the positive maximum offset and the negative maximum offset from the center of the track have been processed. Counter circuit  340  provides a count output  341  to an average coefficient table  345 . Count output  341  corresponds to the number of data sets that have been accumulated in an accumulation memory  350 . 
         [0029]    Based on count output  341 , average coefficient table  345  provides a new data averaging coefficient  347  and an accumulated data averaging coefficient  346 . These averaging coefficients are used to weight the newly received data relative to the already accumulated data to yield an average value. For example, where the count value is zero, new data averaging coefficient  347  is one and accumulated data averaging coefficient  346  is zero. In this case, equalized data set  331  (the newly received data set) is multiplied by one by a multiplier circuit  347  and provided as a weighted output  356  to a summation circuit  360 . Averaged data set  351  from accumulation memory  350  is multiplied by zero by a multiplier circuit  365  and provided as a weighted output  366  to summation circuit  360 . In turn, summation circuit  360  adds weighted output  356  to weighted output  366  to yield an average output  347  that is stored to accumulation memory  350 . Of note, when count output  341  is zero (i.e., equalized data set  331  corresponds to the first re-read of the track), average output  361  is equalized data set  331 . 
         [0030]    As another example, when count output  341  is one new data averaging coefficient  347  is 0.5 and accumulated data averaging coefficient  346  is 0.5. In this case, equalized data set  331  is multiplied by 0.5 by multiplier circuit  347  and provided as weighted output  356  to summation circuit  360 ; and averaged data set  351  is multiplied by 0.5 by multiplier circuit  365  and provided as weighted output  366  to summation circuit  360 . In turn, summation circuit  360  adds weighted output  356  to weighted output  366  to yield an average output  347  that is stored to accumulation memory  350 . Of note, in this case (i.e., equalized data set  331  corresponds to the second re-read of the track), average output  361  is the average of equalized data set  331  and averaged data set  351 . 
         [0031]    As yet another example, when count output  341  is two new data averaging coefficient  347  is 0.33 and accumulated data averaging coefficient  346  is 0.67. In this case, equalized data set  331  is multiplied by 0.33 by multiplier circuit  347  and provided as weighted output  356  to summation circuit  360 ; and averaged data set  351  is multiplied by 0.67 by multiplier circuit  365  and provided as weighted output  366  to summation circuit  360 . In turn, summation circuit  360  adds weighted output  356  to weighted output  366  to yield an average output  347  that is stored to accumulation memory  350 . Of note, in this case (i.e., equalized data set  331  corresponds to the third re-read of the track), average output  361  is the weighted average of equalized data set  331  and averaged data set  351 . 
         [0032]    Controller circuit  305  asserts selector output  306  such that averaged data set  351  is provided as processing data set  333  by multiplexer circuit  332 . As such, averaged data set  351  is processed by data processing circuit  335  to see if the averaged data set converges. Of note, when count output  341  is equal to zero, selector output  306  is asserted such that equalized data set  331  is provided as processing data set  333 . When count output  341  is greater than zero, selector output  306  is asserted such that averaged data set  351  is provided as processing data set  333 . 
         [0033]    This process of averaging and performing data processing continues until either the data sets corresponding to each of the steps between the positive maximum offset and the negative maximum offset from the center of the track have been processed, or until a data convergence is indicated by convergence indicator output  336 . The following pseudocode describes the operation of read averaging circuit  370 : 
         [0000]    
       
         
               
               
             
               
               
             
               
               
             
               
               
             
               
               
             
               
               
             
               
               
             
           
               
                   
                   
               
             
             
               
                   
                 For (i=0 to i=max) 
               
               
                   
                 { 
               
             
          
           
               
                   
                 If (recently read data set is successfully received) 
               
               
                   
                 { 
               
             
          
           
               
                   
                 Average Output 361 = (1/1+i) Equalized 
               
               
                   
                 Data Set 331 + (i/1+i) Averaged Data Set 351; 
               
               
                   
                 i = i+1 
               
             
          
           
               
                   
                 } 
               
               
                   
                 If (average data set converges) 
               
               
                   
                 { 
               
             
          
           
               
                   
                 i = max 
               
             
          
           
               
                   
                 } 
               
             
          
           
               
                   
                 } 
               
               
                   
                   
               
             
          
         
       
     
         [0034]    In some cases to limit circuit complexity, any count output  341  that is greater than eight uses the same values for new data averaging coefficient  347  and accumulated data averaging coefficient  346 . Thus, even where the number of steps between the negative maximum offset and the positive maximum offset is greater than eight, the maximum number of eight will be used in the averaging process. The following pseudocode describes the operation of read averaging circuit  370  where the coefficients based on the count value are limited: 
         [0000]    
       
         
               
               
             
               
               
             
               
               
             
               
               
             
               
               
             
               
               
             
               
               
             
               
               
             
               
               
             
           
               
                   
                   
               
             
             
               
                   
                 For (i=0 to i=max) 
               
               
                   
                 { 
               
             
          
           
               
                   
                 If (recently read data set is successfully received 
               
               
                   
                 AND Count Output 341 &lt; 8) 
               
               
                   
                 { 
               
             
          
           
               
                   
                 Average Output 361 = (1/1+i) Equalized 
               
               
                   
                 Data Set 331 + (i/1+i) Averaged Data Set 351; 
               
               
                   
                 i = i+1 
               
             
          
           
               
                   
                 } 
               
               
                   
                 Else If (recently read data set is successfully received 
               
               
                   
                 AND Count Output 341 ≧ 8) 
               
               
                   
                 { 
               
             
          
           
               
                   
                 Average Output 361 = (1/8) Equalized 
               
               
                   
                 Data Set 331 + (7/8) Averaged Data Set 351; 
               
             
          
           
               
                   
                 } 
               
               
                   
                 If (average data set converges) 
               
               
                   
                 { 
               
             
          
           
               
                   
                 i = max 
               
             
          
           
               
                   
                 } 
               
             
          
           
               
                   
                 } 
               
               
                   
                   
               
             
          
         
       
     
         [0035]    Turning to  FIG. 4 , a flow diagram  400  depicts a process in accordance with some embodiments of the present invention for off track data recovery. Following flow diagram  400 , a data set is received (block  405 ). The data set is received by positioning a head over a storage medium in relation to a track. The data set is passed to an analog front end circuit where analog front end processing is performed (block  410 ). Such analog processing may be any processing known in the art for amplifying and/or filtering an analog signal. The processed data is provided to an analog to digital converter circuit where an analog to digital conversion is performed (block  415 ). Such an analog to digital conversion yields a series of digital samples corresponding to the input received from the analog front end processing. An equalization process is performed on the series of digital samples to yield an equalized data set (block  420 ). In some cases, the equalization process is performed by a digital finite impulse response filter circuit. Data processing is then performed on the equalized data set in an attempt to recover data originally written to the storage medium (block  425 ). Such data processing may be performed using any data processing approaches and/or circuitry known in the art. For example, the data processing circuit includes a maximum a posteriori detector circuit and a low density parity check circuit as are known in the art. Other embodiments of the present invention include a data processing circuit that includes a Viterbi algorithm data detector circuit and a low density parity check circuit as are known in the art. Based upon the disclosure provide herein, one of ordinary skill in the art will recognize a variety of circuitry and/or data processing methods that may be used in relation to different embodiments of the present invention. 
         [0036]    It is determined whether a retry is desired (block  430 ). A retry is desired, for example, where the initial reading of the data set failed to converge. Such convergence occurs when the error correction codes and/or parity checking done by the data processing indicates an acceptable conclusion to the processing. Where a retry is not desired (e.g., the data set converged) (block  430 ), the recovered data set is provided as an output (block  435 ). 
         [0037]    Alternatively, where a retry is desired (block  430 ), the head used to sense the data from the storage medium is moved to a positive maximum offset from the center of the track from which the data was originally read (block  440 ). With the head in this positive maximum offset orientation, the data set is re-read from the track (block  445 ). This re-read process includes moving or flying the head over the track with the defined offset from what is expected to be the center of the track associated with the data set being read. The received data set is passed to an analog front end circuit where analog front end processing is performed (block  450 ). Again, such analog processing may be any processing known in the art for amplifying and/or filtering an analog signal. The processed data is provided to an analog to digital converter circuit where an analog to digital conversion is performed (block  455 ). Again, such an analog to digital conversion yields a series of digital samples corresponding to the input received from the analog front end processing. An equalization process is performed on the series of digital samples to yield an equalized data set (block  460 ). 
         [0038]    The recently received data set is averaged with previously re-read data sets (block  465 ). In the case where the data set is the first re-read data set, the average is simply the currently received data set. The resulting averaged data set is stored to a buffer (block  470 ). Data processing is performed on the averaged output (block  475 ). Again, such data processing may be performed using any data processing approaches and/or circuitry known in the art. Where the data processing converges (block  480 ), the output resulting from the data processing is provided (block  485 ). 
         [0039]    Otherwise, where the data processing failed to converge (block  480 ) it is determined whether the track offset has been decremented to the maximum negative offset (block  490 ). Where the track offset has not been decremented to the maximum negative offset (block  490 ), the track offset is decremented by a step value, and the head is re-positioned over the track in accordance with the new track offset (block  496 ). In some embodiments of the present invention, the step value and the maximum track offset value are programmable. With the head in this orientation, the processes of blocks  445 ,  450 ,  455 ,  460 ,  465 ,  470 ,  475 ,  480 ,  485 ,  490 ,  495 ,  496  are repeated. Alternatively, where the track offset has been decremented to the maximum negative offset (block  490 ) a failure to recover indication is provided (block  495 ). 
         [0040]    It should be noted that the various blocks discussed in the above application may be implemented in integrated circuits along with other functionality. Such integrated circuits may include all of the functions of a given block, system or circuit, or only a subset of the block, system or circuit. Further, elements of the blocks, systems or circuits may be implemented across multiple integrated circuits. Such integrated circuits may be any type of integrated circuit known in the art including, but are not limited to, a monolithic integrated circuit, a flip chip integrated circuit, a multichip module integrated circuit, and/or a mixed signal integrated circuit. It should also be noted that various functions of the blocks, systems or circuits discussed herein may be implemented in either software or firmware. In some such cases, the entire system, block or circuit may be implemented using its software or firmware equivalent. In other cases, the one part of a given system, block or circuit may be implemented in software or firmware, while other parts are implemented in hardware. 
         [0041]    In conclusion, the invention provides novel systems, devices, methods and arrangements for data processing. While detailed descriptions of one or more embodiments of the invention have been given above, various alternatives, modifications, and equivalents will be apparent to those skilled in the art without varying from the spirit of the invention. Therefore, the above description should not be taken as limiting the scope of the invention, which is defined by the appended claims.