Abstract:
A triangular wave generating circuit includes: an integrating unit including a capacitor, the integrating unit having an output for providing a triangular wave signal; first and second constant current sources for charging and discharging the capacitor; a switch unit for coupling the first and second current sources to the integrating unit to charge and discharge the capacitor in response to an internal clock signal; a high/low level limiter including first and second comparing units for comparing the output of the integrating unit with upper and lower triangular wave peak limit reference voltages, respectively, and providing output signals indicating when the output of the integrating unit coincides with the peak limit reference voltages; a clock generator for providing the internal clock signal in response to the comparing unit output signals; and means for varying a peak-to-peak swing of the triangular wave signal over time to synchronize the internal clock signal with an externally supplied clock pulse.

Description:
FIELD OF THE INVENTION 
   The present invention relates to triangular wave generating circuits, such as those used in Class-D amplifiers. 
   BACKGROUND OF THE INVENTION 
   Triangular wave generating circuits are used in various applications. One common application is for converting an analog audio signal into a pulse signal in a Class-D power amplifier. One such Class-D Audio Amplifier is described in U.S. Pat. No. 6,791,405 to Tsuji et al., entitled “Triangular Wave Generating Circuit Used in Class-D Amplifier” (the “&#39;405 Patent”), the entirety of which is hereby incorporated by reference herein. 
     FIG. 1  is a circuit diagram illustrating a prior art circuit  10  for forming a triangular wave (V out ) from a square wave signal. The performance of this triangular wave can seriously influence the accuracy of applications that utilize the triangular wave, such as pulse width modulation (PWM) applications. The switching frequency f SW  of the output triangular wave is equal to 1/(T up +T down ) wherein T up  is the period of the rise of the triangular wave from V L  to V H  and T down  is the period of the falling of the triangular wave from V H  to V L . The “up” period T up  is equal to C*V tri,pp /I charge , where C is the capacitor C across the operational amplifier  12 , V tri,pp  is the voltage difference between V H  and V L , and I charge  is the charging current from current source I 1 . Similarly, the “down” period T down  is equal to C*V tri,pp /I discharge , where I discharge  is the discharging current from current source I 2  in  FIG. 1 . Assuming I charge  is matched to I discharge , then f SW  is equal to I charge /(2*C*V tri,pp ). From this equation, it is known that the switching frequency of the triangular wave is directly proportional to the charge and discharge currents, I charge  and I discharge , and inversely proportional to the triangular wave swing (V tri,pp ). 
     FIG. 2  illustrates potential problems with the triangular wave generators such as the generator  10  of  FIG. 1 . For example, as shown in “Problem 1” of  FIG. 2 , the triangular wave does not vary between the desired peak limits V H  and V L  if the current sources are not matched, i.e., if current source I 2 &gt;I 1  or current source I 1 &lt;I 2 . Similarly, “Problem  2 ” illustrates that this same issue arises if the square wave signal does not have an ideal duty cycle. The second problem is frequently found when the internal clock pulse is not synchronized to an external clock source. Synchronizing an internal clock to an external clock is important in, for example, multiple class D amplifier applications, such a 5.1 channel or 7.1 channel audio systems. If the switching frequency is not the same, a beat frequency will occur in the audio band. 
   The &#39;405 Patent discussed above teaches a method of providing synchronization with an external clock to form a triangular wave. The method of the &#39;405 Patent achieves synchronization between and internal clock signal and an externally provided clock signal by varying the triangular wave slope, i.e., by varying the charge/discharge currents. However, in class-D amplifiers, the audio quality is affected by the slope of the triangular wave. Once the slope of the triangular wave becomes smaller than the slope of the amplifier&#39;s integrator output, the audio quality becomes worse. 
   Improved triangular wave generators are desired. 
   SUMMARY OF THE INVENTION 
   A triangular wave generating circuit includes: an integrating unit including a capacitor, the integrating unit having an output for providing a triangular wave signal; first and second constant current sources for charging and discharging the capacitor; a switch unit for coupling the first and second current sources to the integrating unit to charge and discharge the capacitor in response to an internal clock signal; a high/low level limiter including first and second comparing units for comparing the output of the integrating unit with upper and lower triangular wave peak limit reference voltages, respectively, and providing output signals indicating when the output of the integrating unit coincides with the peak limit reference voltages; a clock generator for providing the internal clock signal in response to the comparing unit output signals; and means for varying a peak-to-peak swing of the triangular wave signal over time to synchronize the internal clock signal with an externally supplied clock pulse. 
   The above and other features of the present invention will be better understood from the following detailed description of the preferred embodiments of the invention that is provided in connection with the accompanying drawings. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The accompanying drawings illustrate preferred embodiments of the invention, as well as other information pertinent to the disclosure, in which: 
       FIG. 1  is circuit diagram of a prior art triangular wave signal generator; 
       FIG. 2  illustrates various problems with prior art triangular wave generators; 
       FIGS. 3A and 3B  illustrate the operation of a prior art triangular wave signal generator in response to an internal clock signal; 
       FIG. 4  is a block diagram a triangular wave generator according to an embodiment of the present invention; 
       FIG. 5  illustrates an embodiment of a synchronizing circuit for use in the triangular wave generator of  FIG. 4 ; 
       FIG. 6  illustrates an embodiment of a low pass filter for use in the triangular wave generator of  FIG. 4 ; 
       FIG. 7  illustrates an embodiment of the V H /V L  generator module of the triangular wave generator  FIG. 4 ; 
       FIG. 7A  illustrates an alternative embodiment of the generator module shown in  FIG. 7 ; 
       FIGS. 8A and 8B  are timing diagrams illustrating the operation of the triangular wave generator of  FIG. 4 ; and 
       FIG. 9  is a diagram of a Class D audio amplifier with which the triangular wave generator of  FIG. 4  may be used. 
   

   DETAILED DESCRIPTION 
   The present invention relates to triangular wave generating circuits. One common application of these circuits is converting an analog audio signal into a pulse signal in a Class-D power amplifier. Exemplary Class-D audio amplifiers are described in co-pending and commonly assigned U.S. patent application Ser. No. 11/462,166 entitled “Class-D Audio Amplifier with Half-Swing Pulse Width Modulation” filed Aug. 3, 2006, now U.S. Pat. No. 7,339,425, the entirety of which is hereby incorporated by reference herein (hereinafter, the &#39;425 Patent). Other examples of Class-D Audio Amplifiers are also described in the &#39;405 Patent to Tsuji et al. 
   The operational principle of the triangular wave generator is illustrated in connection with the prior art triangular wave generator  10 A shown in  FIG. 3A . The triangular wave generator  10 A includes four basic stages that operate together to form the triangular wave V tri  shown in the graph of  FIG. 3B . The generator  10 A includes a current source stage  20  including the first current source  14  and the second current source  16 , an integrating circuit  30  including an operational amplifier  12  having a capacitor C coupled between an input and an output of the operational amplifier  12 , a high/low level limiter  40  comprising a pair of comparators C 1 , C 2 , and a switch unit  50  including a flip flop  18 .  FIG. 3B  shows the relationship between the output triangular wave V tri  and signal Q. In the illustrated circuit  10 , the integrator  30  is an inverted integrator. When signal Q is high, the capacitor C is discharged by constant current I discharge  from current source  14 , and V tri  goes down. Once V tri  is less than V L , Q changes to a low state from its high state. With Q at a low state, capacitor C is charged by constant current I charge  from current source  16 , and V tri  goes up. Once V tri  is larger than V H , Q changes to high state from its low state. 
   The triangular wave generator described herein is capable of synchronizing with an externally provided clock pulse signal to limit the triangular signal between desired high and low peak-to-peak limits when synchronizing to an external clock signal. As described in detail below, the triangular wave generator synchronizes an internal clock signal with the externally provided clock signal by selectively varying the limits of the swing (V tri,pp ) of the triangular wave generator. With the approach of the present invention, the slope of the rise (upswing) and fall (downswing) of signal V tri  is constant and only the peak of the triangular wave signal is changed in order to obtain synchronization. As discussed in the Background section the slope of the triangular wave influences audio output quality in class D-amplifier implementations. This is a concern with the prior art design of the &#39;405 Patent to Tsuji et al. but not with the triangle wave generating circuit and methodology described herein. 
     FIG. 4  is a circuit diagram of a triangular wave generator  100  for generating triangular wave V tri  according to an embodiment of the present invention. As with the prior art triangular wave generators discussed above, the triangular wave generator  100  includes a pair of matching charge/discharge current sources  115 ,  110 , a switch unit  120 , which may comprise a transistor pair, for selecting one of the current sources  110 ,  115 , and an integrating circuit  125 , shown as an inverted integrator comprising an operational amplifier and a capacitor. Signal V cm  provided to the operational amplifier of the integrator  125  is set to a constant reference voltage, such as VDD/2. The embodiment shown in  FIG. 4  also includes a high/low level limiter circuit  135  including a pair of comparators  137 ,  139 , and a V H /V L  generator unit  130  which provides upper and lower triangular wave peak limit reference voltages to the comparators  137 ,  139  to set the upper and lower limits of the triangular wave V tri . The V H /V L  generator unit  130  receives a Master/Slave mode selector control signal M/S and a synchronization voltage signal (V SYNC ), as described in more detail below, as inputs. As with generator  10 A in  FIG. 3A , the output voltage V CMPH  of the comparator  137  and the output voltage V CMPL  of the comparator  139  are provided to an internal clock generator circuit  140 , which, in the illustrated embodiment, includes a SR latch. The clock generator  140  provides the first internal clock singal Vb for controlling switching unit  120  and the second internal clock signal Vc (CLK int ), which is the inversion of signal Vb. The triangular wave generator  100  also includes a synchronizing logic module  150  and a low-pass filter  145 . 
   If signal M/S is high, the generator unit  130  causes the triangular wave generator  100  to operate in the master mode, i.e., closed loop mode, and if signal M/S is low, the generator unit  130  causes the triangular wave generator  100  to operate in the slave mode, i.e., to synchronize to an external clock CLK ext . The voltage signal V FD  represents the phase difference between the internal clock CLK int , which is the inverted signal of clock Vb, and the external clock CLK ext . V SYNC  is a filtered version of difference signal V FD , specifically with high frequency components removed. Signal V SYNC  is provided to the generator unit  130  and is used as an upper limit of the triangular wave V tri  when the slave mode is enabled by control signal M/S. 
     FIG. 5  illustrates an embodiment of the synchronizing logic module  150 . The synchronizing logic module  150  performs an OR function on the internal clock signal Vc and the externally provided clock pulse signal CLK ext . In the illustrated embodiment, the synchronizing logic module includes an OR gate with inputs Vc and CLK ext  and provides output V FD . The synchronizing logic module  150  provides V FD  low only when both Vc and CLK ext  are low. Alternative logic structures for implementing the OR function will be apparent to those familiar with logic designs. 
     FIG. 6  illustrates an embodiment of the low pass filter  145 , more specifically an RC low pass filter. The low pass filter  145  is capable of ignoring transient spikes caused by undesired interference, such as static charge. In operation, the external clock CLK ext  does not always have a 50% duty cycle, and at time may have a short pulse. To ensure that the circuit operates normally under these conditions, the shortest pulse width of the external clock CLK ext  should have a minimum width, for example, larger than 0.7 R*C. 
   The operation of the triangular wave generator of  FIG. 4  is now described. Signal Vc, which is also labeled CLK int  in  FIG. 4 , represents the frequency and phase of the triangular wave V tri . The synchronizing logic  150  compares CLK int  with the external clock CLK ext  to generate pulse-type difference signal V FD . After low pass filtering by low pass filter  145 , pulse signal V FD  becomes V SYNC  and has a slope like characteristic when V FD  is low. Assuming the generator unit  130  is set to slave mode by signal M/S, the upper peak limit reference voltage V H  is set to V SYNC  by generator unit  130  to dynamically control the upper peak limit to obtain synchronization with the external clock pulse CLK ext . It should be apparent that if V H  or V L  is changed, the frequency of the triangular wave V tri  is changed. The adjustment will continue until CLK int  and CLK ext  are inversely synchronized with phase shift, that is until V FD  is a fixed-width pulse. In this embodiment, the generator unit  130  does not utilize a fixed voltage for the upper peak limit reference voltage V H  but rather dynamically adjusts it over time by setting it to variable signal V SYNC  to adjust the triangular wave frequency while using a fixed lower limit for V L . The voltage generator unit  130  operates to set the triangular wave peak limit reference voltage V H  to one of a predetermined fixed V H  and V SYNC  depending on the operational mode set by the control signal M/S. In an alternative embodiment, the lower limit of the triangular wave (V L ) is adjusted to adjust the triangular wave frequency while maintaining a fixed upper limit for V H . 
   A brief explanation of the operation of the generation of the triangular wave V tri  is helpful in understanding the operation of the voltage generator unit  130 . The charge/discharge current sources  115 ,  110  are controlled by the internal clock signal Vb. If the clock signal Vb is high, the capacitor C charges until V tri  is larger than the value of reference voltage V H . Once V tri  is larger than the value set for V H , Vb goes low and the capacitor discharges until V tri  is lower than the value of V L . In master mode, as determined by signal M/S, the upper peak limit reference voltage for the triangular wave is set a fixed high reference voltage. This fixed voltage represents the upper peak limit for the signal V tri . Lower peak limit reference voltage V L  is a fixed reference voltage and sets the low peak limit for the signal V tri . If the system is in slave mode as set by the signal M/S, the lower limit is again set to the fixed low reference voltage V L . However, in slave mode, the upper peak limit reference voltage V H  is set to synchronizing voltage V SYNC , which can be changed from clock period to clock period depending on changed in difference voltage signal V FD . Voltage V SYNC , therefore, is not fixed. Once synchronization occurs, the low pulse width of V FD  becomes fixed and V tri,pp  settles at a constant voltage. 
     FIG. 7  is a circuit diagram of the VH/VL generator unit  130 . As shown in  FIG. 7 , the generator unit  130  includes a resistive ladder for providing constant reference voltages V L  and V H1 . Output V H  is selectively coupled through a switch to either V H1  or V SYNC  under control of signal M/S. When M/S is low (i.e., slave mode), V H  is set to V SYNC  and when M/S is high (i.e., master mode), V H  is set to V H1 . 
   Although the above-described embodiment dynamically adjusts the upper limit of the triangular wave (V H ) from clock period to clock period by setting it to variable voltage signal V SYNC  to adjust the triangular wave frequency, it is also possible as discussed above to adjust the lower limit of the triangular wave (V L ) to adjust the triangular wave frequency. In such an embodiment, the upper limit V H  is fixed in both master and slave modes and the logic of the synchronizing logic  150  and the voltage generator unit  130  are modified accordingly. For example, the OR gate of  FIG. 6  is replaced with an AND gate and the voltage generator unit is configured as unit  130 A shown in  FIG. 7A . 
     FIG. 8A  is a timing diagram further illustrating the operation of the triangular wave generator circuit  100  in slave mode. In this mode, the voltage V L  is set to a constant lower limit reference voltage and the upper limit reference voltage V H  is set to V SYNC . When t=0, V FD  changes to low and V tri =VA, which is the initial condition of V tri . From t=[0˜D 1 ], because Vb is high, the capacitor C is charged and V tri  goes up. Because the circuit is in slave mode, V H  is set to V SYNC  by the generator module  130 . At the same time, V SYNC  falls from VDD until V tri =V H =V SYNC =V a1  at time D 1 . Then, at time D 1 , Vb changes from high to low and V FD  changes to high, because Vc is high. 
   From the time interval t=[D 1 ˜T], V tri  falls down to the constant value V L  and then goes up. At the time when V tri  changes from falling to rising, Vb changes from low to high. When Vb is low, the triangular wave falls towards predetermined low voltage V L . When Vb is high, the triangular wave begins to rise to the reference voltage set by V H . At time t=T, V tri  is at a voltage level V a2  and V FD  changes to low again because both Vc and CLK ext  are low. Because V a2  is less than V SYNC  at this point, the triangular wave continues to rise. T is the period of external clock CLK ext . 
   During the time period from t=[T˜T+D 2 ], Vb is still at high state and V tri  goes up. At time t=T, V SYNC  starts to fall from VDD until V tri =V H =V SYNC =V a3  at time t=T+D 2 . Then, Vb changes from high to low and V FD  changes to high again. 
   During the time interval from time t=[T+D 2 ˜2T], V tri  falls down to V L  and then goes up. At the time when V tri  changes from falling down to going up, Vb changes from low to high. At time t=2T, Vtri is charged to voltage level V a4  and V FD  changes to low again. 
   During the time interval from time t=[2T˜2T+D 3 ], Vb is still at high state and V tri  continues to rise. At time t=2T, Vsync starts to fall from VDD until V tri =V SYNC =V a5  at time t=2T+D 3 . Then, Vb changes from high to low and V FD  changes to high again. 
   During the time interval from time t=[2T+D 3 ˜3T], V tri  falls down to V L  and then goes up. At the time when V tri  changes from falling down to going up, Vb changes from low to high. At t=3T, Vtri is charged to V a6  and V FD  changes to low again. 
   During the time interval from time t=[3T˜3T+D 4 ], Vb is still at high state and V tri  goes up. At time t=3T, V SYNC  starts to fall from VDD until V tri =V SYNC =V a7  at time t=3T+D 4 . Then, Vb changes from high to low and V FD  changes to high again. 
   During time interval t=[3T+D 4 ˜4T], V tri  falls down to V L  and then goes up. At the time when V tri  changes from falling down to going up, Vb changes from low to high. At t=4T, V tri  is charged to voltage level V a8  and V FD  changes to low again. 
   From the waveform shown in  FIG. 8A , it can be seen that the difference between V a3  and V a5  is smaller than the difference between V a1  and V a3 . Indeed, the V tri  waveform conforms to the following equation: |V a1 −V a3 |&gt;|V a3 −V a5 |&gt;|V a5 −V a7 |&gt; . . . &gt;|V a(2x−1) −V a(2x+1) |. When “x” approaches infinity, |V a(2x−1) −V a(2x+1) | approaches 0 and V a(2x+1) =V L +(T*Slope tri )/2. Assuming the rising and falling slope of the triangular wave generator is the same (Slope tri ), and that the period of the external clock is T and the low limit of the triangular wave is V L , then the expected upper peak of triangular wave generator is V tri,upper =V L +(0.5T)*Slope tri  and the frequency is 1/T. 
     FIG. 8B  is a timing diagram showing signal V FD , CLK int , CLK ext , V tri , and V SYNC  at steady state after the synchronization has been achieved. When the circuit is stable, Vc (i.e., CLK int ) is always slightly behind CLK ext  and the triangular wave Vtri settles at a consistent peak to peak-to-peak voltage, i.e., the upper peak is no longer varied to obtain synchronization. 
   In exemplary embodiments, the triangular wave generator  100  described above can be used as the triangular wave generator for a Class D Audio Amplifier, such as shown in  FIG. 9  and described in detail in the &#39;425 Patent. As shown in  FIG. 9  and described in the &#39;425 Patent, Class D amplifiers have a triangular wave generator, a modulation stage which generate the pulse-width-modulates (PWM) waveform from the input signal by using a triangular wave output from the triangular wave generating circuit, and a switching amplification output stage for amplification of an output of the modulation stage. 
   As described herein, a triangular wave generator includes the structure for varying the peak-to-peak swing of the triangle wave by dynamically controlling at least one of the upper and lower peak limit reference voltages used in setting the peak-to-peak values of the triangle wave. In embodiments, the reference voltage is set to a synchronization voltage that varies period-to-period dependent on the level of synchronization between the internal and external clock signal. In some embodiments, a voltage generator sets the reference voltage to the synchronization voltage or to a constant reference voltage dependent on the mode of the generator. The variable synchronization voltage can be provided by a synchronization circuit and low pass filter. 
   Although the invention has been described in terms of exemplary embodiments, it is not limited thereto. Rather, the appended claims should be construed broadly to include other variants and embodiments of the invention that may be made by those skilled in the art without departing from the scope and range of equivalents of the invention.