Abstract:
Various embodiments of the invention implement countermeasures designed to withstand attacks by potential intruders who seek partial or full retrieval of elliptic curve secrets by using known methods that exploit system vulnerabilities, including elliptic operation differentiation, dummy operation detection, lattice attacks, and first real operation detection. Various embodiments of the invention provide resistance against side-channel attacks, such as sample power analysis, caused by the detectability of scalar values from information leaked during regular operation flow that would otherwise compromise system security. In certain embodiments, system immunity is maintained by performing elliptic scalar operations that use secret-independent operation flow in a secure Elliptic Curve Cryptosystem.

Description:
CROSS REFERENCE TO RELATED PATENT APPLICATIONS 
       [0001]    This application is related to and claims the priority benefit of French Patent Application No. 155210, filed Mar. 18, 2015, and titled “Systems and Methods for Operating Secure Elliptic Curve Cryptosystems,” listing inventors Jeremy Dubeuf, Frank Lhermet, and Yann Yves Rene Loisel, which application is hereby incorporated herein by reference in its entirety. 
       BACKGROUND 
       [0002]    A. Technical Field 
         [0003]    The present invention relates to secure systems and, more particularly, to secure systems and methods for Elliptic Curve Cryptosystems (ECCs) designed as countermeasure to side-channel attacks aimed at uncovering secret information from operations performed by electric circuitry. 
         [0004]    B. Background of the Invention 
         [0005]    Elliptic Curve Cryptosystem (ECC) implementations are increasingly replacing RSA for use in asymmetric cryptographic schemes, such as Diffie-Hellman key exchange or authentication, due to the exponential increase in key length requirements for RSA that makes improvements in security relatively difficult compared to ECCs, for which improvements in security require only a linear increase in key length. As an example, the security level of a 128-bit symmetric system, for which RSA requires a key length of 3,072 bits, can be converted into a 256-bit symmetric system by increasing the RSA key length five-fold to 15,360 bits. In comparison, the key length required to improve an equivalent 128-bit ECC symmetric system into a 256-bit symmetric system increases linearly, i.e., two-fold, from 256-283 bits to 512-571 bits. As a result, upgrading the security level of an RSA product drastically decreases system performance in terms of time, power consumption, and cost when compared to an ECC secured circuit. 
         [0006]    Like other cryptosystems, ECCs use standard, non-proprietary algorithms to encrypt confidential data to protect against theft of secret information. Most encryption methods, however, do not prevent determined adversaries from circumventing the cryptosystem and unveiling critical keying material as data is being processed by the encryption circuit during encryption and decryption of confidential data. Well-known weaknesses in cryptosystems include leakage of information in the form of timing, power consumption, and electro-magnetic radiation information detectable during computations and subject to analysis even without physical tampering. Additionally, information may leak when the cryptosystem is subjected to fault insertion. 
         [0007]    Side-channel attacks are one type of attack frequently employed to extract encryption keys, passwords, and other cryptographic data from a secure system (e.g., payment terminals, smart cards, security modules, mobile phones) by taking advantage of the fact that circuit properties are closely associated with and reflect the physical implementation of the encryption engine and the operations performed on the data processed by the particular encryption algorithm. In a differential side-channel attack, for example, a skilled attacker may perform numerous calls to a function in the secure system that the attacker attempts to break by performing statistical analysis on characteristic circuit properties, including electromagnetic emissions profiles of current and voltage transitions, power consumption profiles, and timing patters of generated signals. Since different instructions have different power consumption profiles, after monitoring a circuit under investigation, collecting sufficient data, and filtering out noise by statistical means, details of the system behavior can be inferred from the obtained information and, ultimately, the sought after secret data can be reconstructed. 
         [0008]    For example, the implementation of a standard algorithm into a secure system causes current to flow through a given logic circuit from which knowledge about the circuit and the data processed by logic circuitry is inadvertently revealed to the surroundings of the circuit. In a circuit with a fixed number of gates and fixed location the data and current associated with that data travel through logic gates, which makes logic operations within the circuit prone to being probed for the purpose of tracing and extracting secret information, thereby, rendering the security of the cryptosystem vulnerable. 
         [0009]    Several approaches exist aimed at protecting the security of a circuit by increasing the level of difficulty of carrying out this type of non-intrusive attack and prevent the leakage of observable, compromising information from a circuit to its surroundings. One such approach relies on modifying the encryption algorithm in such a manner as to perform security-related operations on both the actual bits of a secret key as well as the inverse thereof. 
         [0010]    Other types of attack on a circuit include the method of fault injection. Using this approach, in preparation of carrying out an attack, an adversary manipulates a circuit that normally undergoes random operations and forces the circuit to deviate from regular cryptographic operations to switch into a more deterministic mode of operation. For example, by purposefully raising a voltage applied to the circuit, the attacker may trigger a certain circuit response that, in effect, reduces the randomness of operations, thereby, allowing the attacker to gain control of a more predictable circuit behavior and making it easier to successfully carry out an attack. 
         [0011]    What is needed are tools for secure systems designers to overcome the above-described limitations while taking advantage of the benefits ECC provides to secured circuits. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0012]    Reference will be made to embodiments of the invention, examples of which may be illustrated in the accompanying figures. These figures are intended to be illustrative, not limiting. Although the invention is generally described in the context of these embodiments, it should be understood that this is not intended to limit the scope of the invention to these particular embodiments. 
           [0013]      FIG. 1  is a flowchart that illustrates a process using an existing ECC using a scalar double-and-add algorithm that includes dummy operations as countermeasure to simple power analysis. 
           [0014]      FIG. 2  shows a typical power trace for an exemplary double-and-add sequence of operations. 
           [0015]      FIGS. 3A and 3B  illustrate the detection of secret key bits from exemplary sequences of elliptic double-and-add operations without countermeasure. 
           [0016]      FIG. 4A  illustrates an exemplary sequence of elliptic double-and-always-add operations as a countermeasure without initialization to the infinity point. 
           [0017]      FIG. 4B  illustrates an existing sequence of elliptic double-and-always-add operations as a countermeasure with initialization to the infinity point. 
           [0018]      FIG. 5  is a flowchart that illustrates a process using a scalar double-and-add algorithm that is resistant to simple power analysis and c-safe-error, according to various embodiments of the invention. 
           [0019]      FIG. 6  is a flowchart that illustrates a prior art process using an existing fixed-base comb algorithm that includes pre-computation. 
           [0020]      FIG. 7  is a flowchart that illustrates a process using an exemplary fixed-base comb algorithm, according to various embodiments of the invention. 
           [0021]      FIG. 8  illustrates a sequence of scalar double-and-add operations generated by one of the processes in  FIGS. 5 and 7 . 
           [0022]      FIG. 9  illustrates a functional block diagram of a secure computing system that implements embodiments of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0023]    In the following description, for the purpose of explanation, specific details are set forth in order to provide an understanding of the invention. It will be apparent, however, to one skilled in the art that the invention can be practiced without these details. One skilled in the art will recognize that embodiments of the present invention, described below, may be performed in a variety of ways and using a variety of means. Those skilled in the art will also recognize that additional modifications, applications, and embodiments are within the scope thereof, as are additional fields in which the invention may provide utility. Accordingly, the embodiments described below are illustrative of specific embodiments of the invention and are meant to avoid obscuring the invention. 
         [0024]    Reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, characteristic, or function described in connection with the embodiment is included in at least one embodiment of the invention. The appearance of the phrase “in one embodiment,” “in an embodiment,” or the like in various places in the specification are not necessarily referring to the same embodiment. Furthermore, connections between components or between method steps in the figures are not restricted to connections that are affected directly. Instead, connections illustrated in the figures between components or method steps may be modified or otherwise changed through the addition thereto of intermediary components or method steps, without departing from the teachings of the present invention. 
         [0025]    In this document, the terms “infinity point,” “initial value set to infinity,” and “point at infinity” are used interchangeably. 
         [0026]      FIG. 1  is a flowchart that illustrates a process using an existing ECC using a scalar double-and-add algorithm that includes dummy operations as countermeasure to simple power analysis. In general, an elliptic curve is a set of points that is defined by an equation. Basic operations on points of the elliptic curve, such as a scalar multiplication or addition can be used to encrypt data. While multiplication, addition, and doubling operations are analogous to those applied to numbers, two points located on an elliptic curve are added within their own system of coordinates. Adding two points on a curve will result in a third point located on the curve, and the addition process is iterative. A point is multiplied by a scalar typically by adding the point a certain number of times to itself to yield another point on the curve based on a formula, such that the multiplication by a scalar equals an addition. 
         [0027]    If the point of origin and the number of times an addition is to be performed are known, the result is easy to compute. In contrast, if only the resulting point is known, it is virtually impossible to determine the number of times the addition had been performed to arrive at the resulting point. It is this effect that makes point multiplication attractive for use in cryptography. 
         [0028]    The method shown in  FIG. 1 , also known as “always-double-and-add,” is typically implemented as a scalar algorithm in the ECC. Process  100  begins at step  102  when an elliptic point and a scalar are received by the ECC for processing. 
         [0029]    At step  104 , Q is initialized to the infinity point (i.e., a neutral element for elliptic curves) before at step  106  key bits of the scalar are sequentially processed. 
         [0030]    The processing of the secret bits includes always doubling Q at step  108 , and, if the parsed value of the processed bit is equal to 1, then performing an elliptical point addition by adding, at step  112 , the elliptic point to Q. 
         [0031]    Conversely, if the considered bit does not equal 1 then, at step  114 , performing a dummy operation, typically without saving the result or saving it at a different location. 
         [0032]    The dummy operation inserted by this technique forces an elliptic addition to be executed in this step even if the result of that addition is not actually constituting a countermeasure to an SPA attack. 
         [0033]    After all secret key bits are processed at step  116 , at step  118 , Q is output. 
         [0034]    There exist a number of scalar algorithms that can perform similar operations. For example, a scalar may be used to yield a digital signature, and a result can be verified by using a public key value. Advantageously, since the public key value cannot be used to retrieve the private value, this presents a difficult to solve problem, thus, lending itself to public key cryptography for digital signatures. However, like most other methods, this approach presents significant weaknesses in the scalar algorithm in terms of security since these type of operations are easily observable giving rise to information leaks that can be detected through side-channel analysis, including timing analysis, SPA, or EM equivalence leading to the discovery of the secret length, which can be exploited, e.g., through lattices. 
         [0035]    As an example, in a practical implementation the Q register is initialized at the infinity point (i.e., at zero), i.e., until a nonzero bit is being processed, no real doubling and no real calculation operation is performed because a multiplication by zero still leads to a zero result. Then, when the first nonzero bit is, in fact, being processed only a data transfer takes place, but no calculation is performed. As a result, the first elliptic point addition operation that is preceded by an elliptic point double operation (i.e., the infinity point) can be detected as a relatively shorter and different timing pattern or amplitude pattern. It is noted that since once the processed secret bit equals 1 an elliptic addition is performed, but no operation is performed when the value of the secret bit equals 0 and the result remains unchanged. 
         [0036]    In addition, absent step  114 , a skilled attacker may differentiate the elliptic addition from the elliptic doubling operation, for example, by using power analysis or EM equivalent in order to exploit the relatively shorter and different timing patterns, lower amplitudes, etc., created by the two different operations in order to partially or fully retrieve the elliptic curve secret.  FIG. 2  shows a typical power trace  200  for an exemplary double-and-add sequence of operations. Power trace  200  illustrates differences in the power consumption patterns for an elliptic point double operation  260  and an elliptic point addition operation  270 . By observing the characteristic patterns for a given sequence of secret keys processed by elliptic double-an-add operations, the attacker can relatively easily find the secret key. 
         [0037]      FIGS. 3A and 3B  illustrate the detection of secret key bits from exemplary sequences of elliptic double-and-add operations without countermeasure. In sequences  300  and  350 , the letter “D”  302  indicates an elliptic point doubling, whereas the letter “A”  304  indicates an elliptic point addition. Since additions are performed only when the secret key bit is equal to 1, the detection of a pattern for two consecutive D&#39;s  304 , i.e., elliptic double operations, indicates a zero bit, whereas a D  304  followed by an A  302  indicates a 1 for the secret bit. As a result, the key bit sequence 110110 can be obtained from sequence  300 . Similarly, the pattern for secret sequence  350  leaks information that allows the attacker to deduce and expose the key bit sequence 010110, thereby, compromising system security. 
         [0038]      FIG. 4A  illustrates an exemplary sequence of elliptic double-and-always-add operations as a countermeasure without initialization to the infinity point. In the double-and-always-add algorithm, dummy operations denoted as A′  410  are inserted into sequence  400  in order to obtain a constant operation flow. However, if a register is initialized to the infinity point, it is possible to detect this and, thus, determine the length of the secret key, for example, as number of MSBs set to zero. Unlike the sequence in  FIG. 4A , the sequence of elliptic double and always add operations in  FIG. 4B  does not use an initialization to the infinity point. This may be accomplished by initializing a register to a base point, such that it behaves as if the MSB is set equal to 1 (i.e., a 1-bit leak). Therefore, the double-and-always-add operations in  FIG. 4B  serve as a countermeasure by preventing the detection of the infinity point. 
         [0039]    Unfortunately, dummy operations A′  410  may still be detected, for example, through a c-safe-error attack, which involves inserting a fault into the system during the computation of A  304  or A′  410  and observing whether the result contains a fault. If, in response to the fault attack, the result remains unchanged, i.e., the fault did not alter the result, this indicates that the operation was a dummy operation. As a result, an attacker may identify and eliminate dummy operations in a sequence of elliptic double-and-always-add operations in order to recover bits of the secret key. 
         [0040]    Overall, it would be desirable to have systems and methods that provide protection against timing analysis, Simple Power Analysis (SPA), EM analysis, and fault attacks for elliptic scalar operations that make to-be-protected secrets flow independent. 
         [0041]      FIG. 5  is a flowchart that illustrates a process using a scalar double-and-add algorithm that is resistant to simple power analysis and c-safe-error, according to various embodiments of the invention. Process  500  begins at step  502  when an elliptic point and a scalar are received by an ECC. At step  504 , Q is initialized to the base point. Initialization at a non-neutral point avoids 2*0 and 0+P type operations being performed and, thus, serves as a countermeasure, for example, for the attack schemes mentioned with reference to  FIG. 1  that exploit the detectability of zero bits based on timing pattern analysis and the like. In addition, the secret length remains protected from mathematical cryptoanalysis tools, such as lattice attacks, that seek to retrieve a secret from partial information (e.g., a few bits) that is less than the scalar value of the bit. 
         [0042]    At step  506  key bits of the scalar are sequentially processed, for example, iteratively in a loop configuration exclusive of the secret LSB to prevent the loop from counting down to zero. The processing of the secret bits includes always doubling Q at step  508 , and, if the parsed value of the processed bit is not equal to 1, then performing an elliptical point subtraction by subtracting the elliptic point from Q, at step  512  and, otherwise, at step  514 , performing elliptical point addition by adding the elliptic point to Q. It is noted that this accomplished without the need to inject dummy operations that are intended as a countermeasure to non-invasive channel analysis, such as SPA attacks, since dummy operations remain detectable by, for example, fault injection attacks (c-safe error) that inject a fault in an operation to detect a dummy operation based on its characteristic of not altering the result in any manner. 
         [0043]    In one embodiment, elliptical point subtraction and addition are performed in a balanced loop configuration. Advantageously, since the two operations of elliptical point addition and subtraction are nearly electrically indistinguishable from each other with respect to timing and power consumption, the circuit attacks based on detection of electrical signatures through power analysis or EM equivalent are made significantly more difficult, thereby, increasing the resistance of the circuit against side-channel attacks. 
         [0044]    At step  514 , a point verification operation checks for calculation errors, for example, by determining whether the result is indeed located on the curve as an indication that no fault occurred. Point verification is recommended against fault attack. In addition, outside of the loop, the difference between Q and the elliptic point is computed not necessarily to obtain accurate results, but to protect the secret LSB from timing attacks, SPA, and EM equivalent. 
         [0045]    Finally, once the secret key bits have been processed, it is determined whether the LSB has the value 1, at step  518 . If so, Q is output, at step  520 ; otherwise, the result of Q−P is output at step  522 . 
         [0046]    One critical constraint of cryptographic algorithms is the tradeoff between implementation cost and performance. Some existing cryptographic systems use memory to store intermediate results to improve performance in terms of scalar operations. Pre-processing improves performance over double-and-add, as memory can be used to store and reuse points for calculations and operations. It will be appreciated by those skilled in the art that fewer or additional steps may be incorporated with the steps illustrated herein without departing from the scope of the invention. No particular order is implied by the arrangement of blocks within the flowchart or the description herein. It will be further appreciated that the preceding examples and embodiments are exemplary and are for the purposes of clarity and understanding and not limiting to the scope of the present invention. It is intended that all permutations, enhancements, equivalents, combinations, and improvements thereto that are apparent to those skilled in the art, upon a reading of the specification and a study of the drawings, are included within the scope of the present invention. It is therefore intended that the claims include all such modifications, permutations, and equivalents as fall within the true spirit and scope of the present invention. 
         [0047]      FIG. 6  is a flowchart that illustrates a prior art process using an existing fixed-base comb algorithm that includes pre-computation. 
         [0048]    Process  600  begins at step  602  when a scalar, an elliptic point, and a window width are received by the ECC for processing. 
         [0049]    At step  604 , 2 w  points are pre-computed, and the scalar width line is rearranged at step  606 . 
         [0050]    At step  608 , Q is initialized to the infinity point before, at step  610 , key bits of the scalar are sequentially processed. 
         [0051]    Processing of the secret bits includes doubling Q, at step  612 . 
         [0052]    At step  614 , the correct pre-computed values are added by performing elliptical point addition before, finally, at step  616 , the elliptic point is output. 
         [0053]    However, process  600  suffers from similar deficiencies in terms of security as the process in  FIG. 1 , including the initialization of Q at the infinity point, which leaks information about the fact that no operation is performed when the value of the secret bit equals zero and, thus, enables attackers to power trace characteristic patterns, etc. 
         [0054]    Various embodiments of the innovation take advantage of reusing pre-calculated values in different scenarios so as to reduce the number of required pre-calculated values. This allows for a reduction in implementation cost compared to existing methods. Applied to scalar algorithms that use pre-calculated values, some embodiments of the innovation provide for a reduction in about half of the number of pre-calculated values without causing any noticeable reduction in cryptosystem performance.  FIG. 7  is a flowchart that illustrates a process using an exemplary fixed-base comb algorithm, according to various embodiments of the invention. Process  700  implements some of the same novel schemes to a scalar fixed-base comb method and any derivatives so as to make the hardware side-channel attack resistant. 
         [0055]    Process  700  begins at step  702  when a scalar, an elliptic point, and a window width are received by the ECC for processing. 
         [0056]    At step  704 , 2 w-1  points are pre-computed and saved. 
         [0057]    At step  706 , the scalar width line is rearranged. 
         [0058]    At step  708 , Q is initialized to the greatest pre-computed value. 
         [0059]    At step  710 , width bits of the scalar are sequentially processed, for example, four lines of 64 bits iteratively in a loop configuration exclusive of the secret LSB. 
         [0060]    Processing of the secret bits includes doubling Q, at step  712 . 
         [0061]    At step  714 , the correct pre-computed values are added or subtracted by performing elliptical point addition or subtraction, for example, in a balanced loop configuration so as to use each pre-computed value twice. In one embodiment, this reduces the number of pre-calculated values in half as each value is used twice. In cases where pre-calculated values need to be stored, this reduces memory requirements and, therefore, leads to an increased performance-to-cost ratio. 
         [0062]    Finally, at step  716 , the elliptic point is output. 
         [0063]    It is understood that the pre-calculated MSB of the scalar need not be forced at ‘1’ during pre-calculations. Process 700 may be performed equally well with MSB set to ‘0,’ as it is not necessary to counteract the infinity point problem of existing processes that try to hide the secret launch of a basic operation from detection. Since in process  700  the launch remains hidden, no information leakage takes place, thereby, strengthening the side-channel attack resistance of the system. Further, while not explicitly shown, one skilled in the art will appreciate that bits may be padded with additional bits in order to equalize string lengths as necessary. One of ordinary skill in the art will appreciate that in pre-computation cases multi-bits of the scalar may be parsed simultaneously instead of one by one. 
         [0064]      FIG. 8  illustrates a sequence of scalar double-and-add operations generated by one of the processes in  FIGS. 5 and 7 . 
         [0065]      FIG. 9  illustrates a functional block diagram of a secure computing system that implements embodiments of the present invention. Aspects of the present patent document are directed to secure systems for ECCs. System  900  may comprise a plurality of input devices  910 , output devices  908 , processor  902 , communication port  914 , memory  906 , and network interface  912 , a power supply (not shown), and other components that are not shown for sake of simplicity. Processor  902  may comprise a secure cryptographic microcontroller; local and system level buses; function modules, including a CPU core, a universal memory controller, key sources, a cryptographic processor; a symmetric key crypto accelerator (e.g., an AES); and an asymmetric key crypto accelerator (e.g., for RSA and ECCs). Control units may be included in the CPU core and/or the universal memory controller of processor  902  to copy or temporarily store a secret key, for example, in memory  906 . A dedicated secure link may be applied to allow processor  902  to communicate with key sources to transfer key request commands and secret keys via the secure link rather than a bus. 
         [0066]    For purposes of this disclosure, secure system  900  may further include any instrumentality or aggregate of instrumentalities operable to compute, calculate, determine, classify, process, transmit, receive, retrieve, originate, route, switch, store, display, communicate, manifest, detect, record, reproduce, handle, or utilize any form of information, intelligence, or data for business, scientific, control, or other purposes. For example, a secure system may be embedded into a computer, mobile device (e.g., personal digital assistant or smart phone), server (e.g., blade server or rack server), network storage device, or any other suitable device and may vary in size, shape, performance, and functionality. Secure system  900  may include random access memory, one or more processing resources, (e.g., CPU) or hardware or software control logic, ROM, and/or other types of nonvolatile memory. Additional components of secure system  900  may include one or more buses operable to transmit communications between the various hardware components. 
         [0067]    It will be understood that the functionalities shown for system  900  may operate to support various embodiments of a secure system—although it is understood that secure system  900  may be differently configured and include other components that implement the embodiments computing elliptical curve operations (e.g., using a curve of an n-bit length) for use in digital signatures and other protocols to performing the computations in a security context (e.g., Elliptic Curve Digital Signature Algorithm, Elliptic Curve Diffie-Hellman Exchange, Elliptic Curve Integrated Encryption Scheme). 
         [0068]    It is noted that aspects of the present invention may be encoded on one or more non-transitory computer-readable media with instructions for one or more processors  902  to cause steps to be performed. The non-transitory computer-readable media may include volatile and non-volatile memory  906 . It is also noted that alternative implementations are possible, including hardware and software/hardware implementations. Hardware-implemented functions may be realized using ASICs, programmable arrays, digital signal processing circuitry (e.g., state machines configured to directly implement an elliptic scalar operations), and the like. Accordingly, the “means” terms in any claims are intended to cover both software and hardware implementations. Similarly, the term “computer-readable medium or media” as used herein includes software and/or hardware having a program of instructions embodied therein or a combination thereof. 
         [0069]    With these implementation alternatives in mind, it is understood that the figures and accompanying description provide the functional information that a person skilled in the art would require to write program code (i.e., software) and/or to fabricate circuits (i.e., hardware) to perform the processing required. One skilled in the art will recognize that no particular security system, protocol, or programming language is critical to the practice of the present invention. One skilled in the art will also recognize that a number of the elements described above may be physically and/or functionally separated into sub-modules or combined together. 
         [0070]    It will be appreciated by those skilled in the art that the preceding examples and embodiments are exemplary and not limiting to the scope of the present invention. It is intended that all permutations, enhancements, equivalents, combinations, and improvements thereto that are apparent to those skilled in the art upon a reading of the specification and a study of the drawings are included within the true spirit and scope of the present invention.