Abstract:
A voltage adjusting circuit includes a reference voltage generator generating a reference voltage, a differential amplifier comparing the reference voltage with a distribution voltage, and compensating for a variation of the reference voltage, and a voltage divider dividing a power supply voltage and generating a constant output voltage according to an output from the differential amplifier.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a voltage adjusting circuit, and in particular to a voltage adjusting circuit that can output a stable output voltage regardless of a temperature variation. 
     2. Description of the Background Art 
     In general, a high voltage must be applied to a drain of a memory cell in a program or erase operation of a flash memory. The high voltage is generated by using an external power source. To reduce unnecessary power consumption, a voltage adjusting circuit for constantly maintaining the high voltage regardless of the external power source is required. 
     Referring to FIG. 1, a conventional voltage adjusting circuit includes a reference voltage generator  10 , a differential amplifier  12  and a voltage divider  14 . 
     The voltage divider  14  has an NMOS transistor  31  connected in series between a power supply voltage Vcc and a ground voltage Vss, and resisters R 1 , R 2  that are passive elements. A gate of the NMOS transistor  31  is connected to an output terminal of the differential amplifier  12 , and a noninverted input terminal (+) and an inverted input terminal (−) of the differential amplifier  12  are connected respectively to a common node  50  of the resisters R 1 , R 2  and an output terminal of the reference voltage generator  10 . 
     The operation of the conventional voltage adjusting circuit will now be described. 
     The reference voltage generator  10  generates a reference voltage Vref from the external voltage Vcc. Thereafter, the reference voltage Vref is compared in the differential amplifier  12  with a divided voltage Vreg from the voltage divider  14 . As a result, a turn-on degree of the NMOS transistor  31  is controlled by a comparison voltage Vdiff outputted from the differential amplifier  12 , thus varying an output voltage Vout. In this case, the output voltage Vout is represented by the following expression. 
     
       
         Vout−Vref×(1+R1/R2) 
       
     
     However, when the output voltage Vout is varied, the divided voltage Vreg is also varied by the resisters R 1 , R 2 . Therefore, the differential amplifier  12  controls the turn-on degree of the NMOS transistor  31  by comparing the reference voltage Vref with the varied distribution voltage Vreg. Accordingly, the conventional voltage adjusting circuit generates a final output voltage Vout by repeatedly performing the above operation until the levels of the reference voltage Vref and the distribution voltage Vreg are identical. 
     In general, a program or erase operation of a flash EEPROM cell, a lock-out level decision, a high voltage pumping, a negative voltage pumping and the like are more exactly and stably carried out when a voltage to be applied is influenced by a variation in temperature as less as possible. However, the conventional voltage adjusting circuit providing a voltage for performing the above-mentioned operations has a predetermined error according to a temperature variation. 
     That is, when a temperature is varied in the conventional voltage adjusting circuit, the reference voltage Vref outputted from the reference voltage generator is also varied. For example, the reference voltage Vref of a bandgap reference voltage generator has a variation rate of approximately 3%. The output voltage Vout has a predetermined error according to a temperature variation because the output voltage Vout is varied as much as the variation rate of the reference voltage Vref. 
     SUMMARY OF THE INVENTION 
     It is therefore an object of the present invention to provide a voltage adjusting circuit capable of outputting a stable output voltage by compensating for a variation of a reference voltage resulting from a temperature variation. 
     In order to achieve the above-described object of the present invention, there is provided a voltage adjusting circuit compensating for a variation of a reference voltage by connecting temperature compensation elements having different temperature constants to sources of first and second NMOS transistors composing a differential amplifier. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention will become better understood with reference to the accompanying drawings which are given only by way of illustration and thus are not limitative of the present invention, wherein: 
     FIG. 1 is a block diagram illustrating a conventional voltage adjusting circuit; 
     FIG. 2 is a block diagram illustrating a voltage adjusting circuit according to the present invention; 
     FIGS. 3A and 3B are graphs showing variations of a reference voltage and temperature compensation resisters according to a temperature variation in the configuration of FIG. 2; and 
     FIGS. 4A and 4B are graphs showing a voltage at both terminals of the temperature compensation resisters, the reference voltage, a divided voltage and a final output voltage according to a temperature variation in the configuration of FIG.  2 . 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     In order to compensate for a variation of a reference voltage Vref according to a temperature variation, a voltage adjusting circuit according to the present invention connects temperature compensation elements having different temperature constants respectively to sources of first and second NMOS transistors  32 ,  33  included in a differential amplifier  16 . Accordingly, an off-set corresponding to an amount of a variation of the reference voltage Vref resulting from the temperature variation is provided to the differential amplifier  16  through the temperature compensation elements, thereby constantly maintaining the output voltage Vout. 
     FIG. 2 illustrates a voltage adjusting circuit in accordance with a first embodiment of the present invention. 
     As shown in FIG. 2, the voltage adjusting circuit according to the present invention includes a reference voltage generator  10 , a differential amplifier  16  and a voltage divider  14 . The reference voltage generator  16  and the voltage divider  14  are identical in constitution and operation to the conventional ones. 
     The differential amplifier  16  includes first and second NMOS transistors  32 ,  33  each respectively receiving the reference voltage Vref and a divided voltage Vreg at their gates; load resisters R 3 , R 4  connected to a power voltage Vcc and drains of the first and second NMOS transistors  32 ,  33 ; temperature compensation resisters R 5 , R 6  respectively connected to sources of the first and second NMOS transistors  32 ,  33 ; and a current source  34  connected between a common node  51  of the temperature compensation resisters R 5 , R 6  and a ground voltage Vss. Here, a temperature constant of the temperature compensation resister R 5  is set greater than that of the temperature compensation resister R 6 . 
     The operation of the voltage adjusting circuit in accordance with the present invention will now be explained with reference to the accompanying drawings. 
     FIG. 3A is a graph showing a variation of the reference temperature Vref according to a temperature variation Temp. Referring to FIG. 3A, when the reference voltage Vref from the reference voltage generator  10  is increased according to a temperature increase, a resistance value of the temperature compensation resister R 5  is increased and a resistance value of the temperature compensation resister R 6  is decreased. Accordingly, as shown in FIG. 4A, a voltage V 2  measured across the temperature compensation resister R 5  is increased, and a voltage V 1  measured across the temperature compensation resister R 6  is decreased. Here, it is presumed that voltages Vgs between the gates and sources of the first and second NMOS transistors  32 ,  33  are Vgs 1  and Vgs 2 , respectively, and also presumed that a voltage difference between the voltages V 1 , V 2  is Vd, Vgs 1 , Vgs 2  and Vd are represented as follows. 
     
       
         Vgs1=Vref−V2 
       
     
     
       
         Vgs1=Vreg−V1 
       
     
     
       
         Vd=V2−V1 
       
     
     Accordingly, taking a temperature into account, the above expressions are represented as follows. 
     
       
         Vgs1′=Vref·T−V2·T 
       
     
     
       
         Vgs2′=Vreg·T−V1·T 
       
     
     
       
         Vd′=V2·T−V1·T 
       
     
     However, the differential amplifier  16  is operated for the voltages Vgs between the gates and sources of the first and second NMOS transistors  32 ,  33  to be equal, and thus “Vgs 1 ′=Vgs 2 ′” is satisfied. Therefore, the divided voltage Vreg is represented as the following expression. 
     
       
         Vreg=Vref−Vd 
       
     
     When a variation according to a temperature is considered, the above expression is represented as follows. 
     
       
         d(Vreg)=d(Vref)−d(Vd) 
       
     
     According to the above expression, a variation amount of the divided voltage Vreg is equal to a value obtained by subtracting a variation amount of the voltage Vd from a variation amount of the reference voltage Vref. Therefore, when the reference voltage Vref is equal in variation amount to the voltage Vd, the divided voltage Vreg is constantly maintained, regardless of the temperature variation. For instance, when the temperature constants of the temperature compensation resisters R 5 , R 6  are defined as Tc 1  and Tc 2 , respectively, and Tc 1  is set greater than Tc 2 , as shown in FIG. 4B, even if the reference voltage Vref is varied according to the temperature variation, the divided voltage Vreg is constantly maintained, thereby removing an error of the output voltage Vout resulting from the temperature variation. 
     According to another embodiment of the present invention, a thermistor may be employed as the temperature compensation element, instead of the temperature compensation resister. 
     As discussed earlier, according to the present invention, a stable voltage is generated by connecting the resisters having different temperature constants respectively to the sources of the differential pair in the differential amplifier and by compensating for a variation of the reference voltage according to a temperature. 
     As the present invention may be embodied in several forms without departing from the spirit or essential characteristics thereof, it should also be understood that the above-described embodiment is not limited by any of the details of the foregoing description, unless otherwise specified, but rather should be construed broadly within its spirit and scope as defined in the appended claims, and therefore all changes and modifications that fall within the meets and bounds of the claims, or equivalences of such meets and bounds are therefore intended to be embraced by the appended claims.