Abstract:
The present invention relates to a manufacturing method for a micromechanical component, a corresponding composite component, and a corresponding micromechanical component. The method has the following steps: providing a first composite (W 1 ; W 1 ′; W 1 ″; W 1 ′″) of a plurality of semiconductor chips (SC 1 , SC 2 , SC 3 ; SC 2 ″; SC 1 ′″, SC 2 ′″; SC 3 ′″), the first composite having a first front surface (V 1 ; V 1 ′; V 1 ″; V 1 ′″) and a first back surface (R 1 ; R 1 ′; R 1 ″; R 1 ′″); providing a second composite (W 2 ; W 2 ′) of a corresponding plurality of carrier substrates (SS 1 , SS 2 , SS 3 ; SS 1 ′″, SS 2 ′″, SS 3 ′″), the second composite having a second front surface (V 2 ; V 2 ′″) and a second back surface (R 2 ; R 2 ′″); imprinting a structured adhesion promoter layer (SG) on the first front surface (V 1 ; V 1 ′; V 1 ″; V 1 ′″) and/or the second front surface (V 2 ; V 2 ′″), the layer having degassing channels (SK, KG); aligning the first front surface (V 1 ; V 1 ′; V 1 ″; V 1 ′″) and the second front surface (V 2 ; V 2 ′″) corresponding to a plurality of micromechanical components, each having a semiconductor chip (SC 1 , SC 2 , SC 3 ; SC 2 ″; SC 1 ′″, SC 2 ′″; SC 3 ′″) and a corresponding carrier substrate (SS 1 , SS 2 , SS 3 ; SS 1 ′″, SS 2 ′″, SS 3 ′″); connecting the first front surface (V 1 ; V 1 ′; V 1 ″; V 1 ′″) and the second front surface (V 2 ; V 2 ′″) via the structured adhesion promoter layer (SG) by applying pressure in such a way that each semiconductor chip (SC 1 , SC 2 , SC 3 ; SC 2 ″; SC 1 ′″, SC 2′″;  SC 3 ′″) is connected to a corresponding carrier substrate (SS 1 , SS 2 , SS 3 ; SS 1 ′″, SS 2 ′″, SS 3 ′″) corresponding to a respective micromechanical component, so that a gas from the ambient atmosphere is able to escape to the outside through the degassing channels (SK, KG); and separating the micromechanical components.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to a manufacturing method for a micromechanical component, a corresponding composite component, and a corresponding micromechanical component. 
         [0003]    2. Description of Related Art 
         [0004]    Without limiting generality, the present invention and its underlying technical objective are explained on the basis of high-pressure sensor elements, whereby one or multiple thin silicon chips, with or without an integrated evaluation circuit, are soldered onto a steel substrate having a steel diaphragm. 
         [0005]    As is known from published German patent application document DE 10 2007 012 106 A1, the circuit and connection side of the silicon chips is situated on the side facing away from the steel diaphragm. A glass solder (also referred to below as “seal glass”), for example, is used as the solder. This technology is known, for example, as “pattern transfer.” However, there are various challenges with regard to processing. Multiple complex changes between front and back side processing of the chips are required. The handling of the small to very small chips used is complicated. Multiple complex changes between wafer processes, individual chip processes (soldering), and batch processes are necessary. Lastly, special measures are required in order to minimize cavity formation during soldering. 
         [0006]    Published German patent application document DE 100 36 284 A1 describes a high-pressure sensor element in which at least one measuring element in the form of a strain gauge is mounted on a diaphragm, the measuring element being separated from the diaphragm by an electrically insulating layer. The measuring element is mounted on an electrically insulating substrate, which in a further step is fastened to the side of the diaphragm facing away from the measuring element, so that the electrically insulating substrate forms the electrically insulating layer. 
         [0007]    Published German patent application document DE 10 2007 012 106 A1 discloses a pressure sensor having a metal housing and a semiconductor chip. The housing has a diaphragm formed in one piece with the housing, and an inlet for supplying a fluid to the diaphragm. 
         [0008]    Published German patent application document DE 103 50 036 A1 and published German patent application document DE 10 2005 035 057 A1 each describe a method for manufacturing a semiconductor chip system, a plurality of semiconductor chips being connected to a carrier substrate via thin webs or support points on the back side. The webs are made of silicon, for example, and are surrounded by a cavity in the manufacturing process. Using an etching process which is selective for the carrier substrate and the semiconductor chips, the webs may be dissolved, thus separating the semiconductor chips from the carrier substrate. 
         [0009]    Published German patent application document DE 199 34 114 A1 describes a substrate and a workpiece carrier for accommodating a plurality of such substrates for forming a composite substrate. 
       SUMMARY OF THE INVENTION 
       [0010]    The manufacturing method for a micromechanical component, the composite component, and the corresponding micromechanical component of the present invention have the advantage that the micromechanical components in question may be manufactured easily, reliably, and in particular without cavities, using only wafer processes or a combination of wafer and batch processes. The minimization of cavity formation during soldering allows degassing channels in the printed seal glass structures, and, if necessary, a convex shape of the chips during soldering. This increases the stability of the electrical components. The manufacturing may be simplified and made more cost-effective by using composite substrates instead of individual substrates. 
         [0011]    The outer contour of the chip and the separated substrate may be matched to one another using separating processes for nonlinear contours within the composite structure. This allows a high utilization of surface area in the semiconductor wafer when at the same time the separated substrate has a favorable mounting geometry (round, polygonal, or rectangular, for example). In addition, the method according to the present invention has excellent shrinkage capabilities. 
         [0012]    The underlying concept of the present invention involves applying a structured bonding promoter layer, for example by imprinting, on the first front surface and/or the second front surface, the front surface(s) having degassing channels, whereby within the composite structure, each semiconductor chip is connected, essentially free of cavities, to a corresponding carrier substrate corresponding to a respective micromechanical component, so that during the connection process step a gas from the ambient atmosphere is able to escape to the outside through the degassing channels. According to one preferred refinement, the first composite is a wafer composite. 
         [0013]    According to another preferred refinement, the wafer composite is designed in such a way that the semiconductor chips are connected to a main wafer element via one or multiple support points, each of which is surrounded by a cavity. By using porous silicon, for example, such low-defect, thin silicon chips may be manufactured without the need for back-grinding, polishing, or plasma etching method steps. Greatly simplified handling is made possible by using the source wafer as a carrier of such thin silicon chips instead of using back-thinning, lamination, and multiple transfer lamination processes. 
         [0014]    According to another preferred refinement, the connection step includes a thermal and/or mechanical step in which the support points break, thereby separating the main wafer element from the semiconductor chips. 
         [0015]    According to another preferred refinement, the first composite is designed in such a way that the plurality of semiconductor chips is provided on a dicing tape. 
         [0016]    According to another preferred refinement, the second composite is a wafer composite. The handling and adjustment of the substrates is simplified by using such large substrates instead of individual substrates and workpiece carrier systems. 
         [0017]    According to another preferred refinement, the second composite is designed in such a way that the plurality of carrier substrates is connected with the aid of a carrier device. 
         [0018]    According to another preferred refinement, the bonding promoter layer is a seal glass layer, which for the connection is heated to a temperature in the range of 100° C. to 500° C. The soldering may be simplified and made more cost-effective by using wafer seal glass bonding instead of individual chip bonding using a “pick and place” tool. Chip defects in seal glass bonding may be avoided by introducing the pressing force via the back side of the chip instead of on the front side of the chip, using a pick and place tool. 
         [0019]    According to another preferred refinement, the bonding promoter layer (SG) has a pressure pattern having multiple separate structures (SGS) having first degassing channels (SK), the separate structures (SGS) being separated by second degassing channels (KG). 
         [0020]    According to another preferred refinement, the carrier substrates are steel substrates. 
         [0021]    According to another preferred refinement, each semiconductor chip has an integrated circuit on its first front surface, the first front surface being connected to the second front surface via the structured bonding promoter layer. 
         [0022]    According to another preferred refinement, a step of through contacting of the semiconductor chips, starting from the first back surface, is carried out after the connection and before the separation. 
         [0023]    According to another preferred refinement, a step of thinning the first composite of the plurality of semiconductor chips at the first back surface is carried out before the through contacting. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0024]    Exemplary embodiments of the present invention are illustrated in the drawings and explained in greater detail in the following description. 
           [0025]      FIGS. 1   a,b  through  FIGS. 4   a, b  show schematic cross-sectional views for explaining a manufacturing method for a micromechanical component according to a first specific embodiment of the present invention. 
           [0026]      FIG. 5  shows a schematic cross-sectional view for explaining an installation design for a micromechanical component according to the first specific embodiment of the present invention. 
           [0027]      FIG. 6  shows a schematic cross-sectional view for explaining a manufacturing method for a micromechanical component according to a second specific embodiment of the present invention. 
           [0028]      FIG. 7  shows a schematic cross-sectional view for explaining a manufacturing method for a micromechanical component according to a third specific embodiment of the present invention. 
           [0029]      FIGS. 8   a, b  show schematic cross-sectional views for explaining a manufacturing method for a micromechanical component according to a fourth specific embodiment of the present invention. 
           [0030]      FIGS. 9   a, b  show schematic cross-sectional views for explaining a manufacturing method for a micromechanical component according to a fifth specific embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0031]    Similar or functionally identical components are denoted by the same reference numerals in the figures. 
         [0032]      FIGS. 1   a, b  through  FIGS. 4   a, b  show schematic cross-sectional views for explaining a manufacturing method for a micromechanical component according to a first specific embodiment of the present invention. 
         [0033]    In  FIGS. 1   a, b , reference numeral  1  denotes a main silicon wafer element of a silicon wafer W 1  to which thin silicon sensor chips SC 1 , SC 2 , . . . are connected via a respective web or support point ST 1 , ST 2 , . . . . 
         [0034]    It is apparent from  FIG. 1   b  that  FIG. 1   a  represents detail A of wafer W 1  according to  FIG. 1   b . On their front side, silicon sensor chips SC 1 , SC 2 , . . . have an integrated circuit C 1  and C 2 , respectively, in which a piezosensitive device P used for pressure detection is provided. Support points ST 1 , ST 2 , . . . are made of silicon, and are manufactured, for example, according to the method described in DE 10 2005 035 057 A1. Support points ST 1 , ST 2 , . . . are surrounded by a respective cavity H 1  and H 2 , etc. 
         [0035]    Silicon sensor chips SC 1 , SC 2  situated above respective cavity 
         [0036]    H 1 , H 2  have a particularly thin design so that they will be suitable as high-pressure sensor elements. Support points ST 1 , ST 2 , . . . made of silicon fix silicon sensor chips SC 1 , SC 2 , . . . during the semiconductor and micromechanical processes to be carried out within the composite structure. One preferred configuration of support points ST 1 , ST 2 , . . . is in the middle region of silicon sensor chips SC 1 , SC 2 , . . . . Multiple support points may also be provided for each chip. 
         [0037]    Using such a system, during front-side dry etching for producing separating trenches T 1 , T 2 , T 3 , as the result of internal stresses silicon sensor chips SC 1 , SC 2 , . . . may assume a slightly convex shape; i.e., the lateral ends of silicon sensor chips SC 1 , SC 2 , . . . are situated closer to main wafer element  1  than is the middle region. The convex shape thus avoids gas inclusions and cavities during a seal glass bonding process to be subsequently carried out, described in greater detail below. Separating trenches T 1 , T 2 , T 3  provided between silicon sensor chips SC 1 , SC 2 , . . . extend to main wafer element  1 . The separating trenches should be provided with a predefined minimum width and depth which allow the thermal expansion and meniscus formation for the seal glass wafer bonding to be subsequently carried out. 
         [0038]    The system according to  FIGS. 1   a, b  is thus a first composite of a plurality of semiconductor chips SC 1 , SC 2 , . . . the first composite having a first front surface V 1  and a first back surface R 1 . First front surface V 1  is formed by the totality of the front surfaces of silicon sensor chips SC 1 , SC 2 , . . . , as illustrated in  FIG. 1   b.    
         [0039]    Separating trenches T 1 , T 2 , T 3 , which are produced using the front-side dry etching process, may be provided in any desired shape. The shape of silicon sensor chips SC 1 , SC 2 , . . . may therefore be adapted to the desired shape of the carrier substrates, which in this case are made of steel, for example, and which are to be connected in this way. 
         [0040]    In  FIGS. 2   a , b, reference numeral  10  denotes a carrier substrate main element made of steel which is present in the form of a wafer W 2 , wafer W 2  preferably having the same dimensions as wafer W 1  described in conjunction with  FIGS. 1   a, b . Wafer W 2  has a second front surface V 2  and a second back surface R 2 . 
         [0041]    Detail B from  FIG. 2   b  is illustrated in  FIG. 2   a . A plurality of high-pressure diaphragms M 1 , M 2 , M 3 , . . . is provided on second front surface V 2  via boreholes B 1 , B 2 , B 3 , . . . on the back side. The grid of high-pressure diaphragms M 1 , M 2 , M 3 , . . . corresponds to the grid of silicon chips SC 1 , SC 2 , . . . on silicon wafer W 1 . 
         [0042]    In order to adjust stainless steel wafer W 2  during the seal glass bonding which is to be subsequently carried out, for connection to silicon wafer W 1  stainless steel wafer W 2  has two visually evaluatable adjustment holes LJ which are provided in the grid of high-pressure diaphragms M 1 , M 2 , M 3  . . . and which are produced together with same. Very good positional accuracy of adjustment holes LJ with respect to diaphragms M 1 , M 2 , M 3 , . . . and diaphragm boreholes B 1 , B 2 , B 3 , . . . is ensured by this joint mechanical production, for example in a clamping device. 
         [0043]    Also provided on second front surface V 2  are grooves N 1 , N 2  which allow simplification of the subsequent separation of individual steel carrier substrates SS 1 , SS 2 , SS 3 , . . . by sawing along saw lines S 12 , S 23 , . . . and of the subsequent mounting by laser welding. 
         [0044]    Thus, stainless steel wafer W 2  contains a second composite of a plurality of carrier substrates SS 1 , SS 2 , SS 3 , . . . , the second composite having second front surface V 2  and second back surface R 2 , and in a subsequent method step second front surface V 2  being connected to silicon sensor chips SC 1 , SC 2 , . . . in the composite of wafer W 1 . 
         [0045]      FIGS. 3   a, b  illustrate the step of imprinting a structured seal glass layer SG on second front surface V 2  of stainless steel wafer W 2  ( FIG. 3   a ), and the step of connecting wafers W 1  and W 2  via seal glass layer SG. 
         [0046]    The imprinting according to  FIG. 3   a  is carried out using screen printing or dispensing, for example. Individual seal glass structures SGS which are separated from one another by wide degassing channels KG are designed in such a way that a seal glass structure having narrow degassing channels SK for low-cavity seal glass bonding of silicon chips SC 1 , SC 2 , . . . is present at each position of a stainless steel diaphragm M 1 , M 2 , M 3 , . . . . Narrow degassing channels SK open into wide degassing channels KG. Wide degassing channels KG allow the gases to be completely discharged to the outside via the wafer edge of superposed wafers W 1 , W 2 , since the degassing channels lead to that location. Examples of design options for degassing channels SK include a pie segment-shaped structure, a strip-shaped structure, and a gridded structure, or the like. 
         [0047]    Reference character DMB in  FIG. 3   a  denotes the diameter of steel diaphragms M 1 , M 2 , M 3 , . . . . It is apparent from the figure that the diameter of seal glass structures SGS is larger than that of steel diaphragms M 1 , M 2 , M 3 , . . . , since the diameter of silicon sensor chips SC 1 , SC 2 , SC 3 , . . . is also larger than that of steel diaphragms M 1 , M 2 , M 3 , . . . . The diameter of seal glass structures SGS essentially corresponds to the diameter of silicon sensor chips SC 1 , SC 2 , SC 3 . 
         [0048]    Additionally or alternatively, silicon wafer W 1  may be imprinted with such seal glass structures SGS. 
         [0049]    Adjustment holes LJ of stainless steel wafer W 2  are used for visually aligning seal glass structures SGS. After wafers W 1 , W 2  are aligned according to the plurality of micromechanical components to be formed, each having a silicon sensor chip and a corresponding carrier substrate made of steel, first front surface V 1  is connected to second front surface V 2  via structured seal glass layer SG in order to form a corresponding composite of micromechanical components, as illustrated in  FIG. 3   b.    
         [0050]    The connection is established using the known technique of seal glass wafer bonding, at temperatures of 100° C. to 500° C. and using an appropriately selected pressure force, for example using an appropriate punch, thus making it possible to avoid cavities between diaphragms M 1 , M 2 , M 3 , . . . and sensor chips SC 1 , SC 2 , SC 3 , . . . . Support points ST 1 , ST 2 , ST 3 , . . . are selectively separated as a result of the mechanical pressure force during the seal glass wafer bonding, by using a thermomechanical splitting process during cooling during the seal glass wafer bonding, with different coefficients of thermal expansion of silicon wafer W 1  and of stainless steel wafer W 2 , or by using a mechanical force action or a chemical attack on support points ST 1 , ST 2 , ST 3 , . . . , thus detaching the firm connection of main wafer element  1  to silicon sensor chips SC 1 , SC 2 , SC 3 , . . . . This separation allows displacements, and thus cooling of stainless steel wafer W 2  and the soldered-on silicon sensor chips SC 1 , SC 2 , SC 3 , . . . with low internal stress. After cooling, main wafer element is easily lifted off the structure that is formed. 
         [0051]      FIG. 4   a  shows the state after main wafer element  1  is lifted off, and back sides of silicon sensor chips SC 1 , SC 2 , SC 3 , . . . are optionally smoothed. 
         [0052]    In a subsequent process step also shown in  FIG. 4   a , back-side through contacting of silicon sensor chips SC 1 , SC 2 , SC 3  is carried out, whereby, starting from the back side, contact holes K 11 , K 12 , K 21 , K 22 , K 32  . . . are formed in order to connect a printed conductor device L 1 , L 2  of the respective integrated circuit, provided in the front side of semiconductor chips SC 1 , SC 2 , SC 3 , from the back side of semiconductor chips SC 1 , SC 2 , SC 3 , . . . . 
         [0053]      FIG. 4   b  is an enlarged detailed view for explaining the back-side through contacting of silicon sensor chip SC 2 . 
         [0054]    For contacting printed conductors L 1 , L 2 , which are provided in a front thin-layer ceramic D 2  (for the first specific embodiment, shown only in  FIG. 4   b ) of circuit C 2 , the back side of silicon sensor chip SC 2  is provided with an appropriate resist mask (not illustrated), after which an appropriate dry etch process for contact holes K 21 , K 22  is carried out up to printed conductors L 1 , L 2 , using an appropriate etch stop, for example. 
         [0055]    Producing the resist mask is made more difficult by the topography of stainless steel wafer W 2 , which has soldered-on silicon sensor chips SC 1 , SC 2 , SC 3 , . . . . For this reason a spray coating is preferably used, thus producing large contacts, for example for conductive adhesive contacting, having less stringent demands for structural precision. After the dry etch step, an insulating layer I is deposited on the back side of silicon sensor chips SC 1 , SC 2 , SC 3 , and contact holes K 21 , K 22  are opened toward printed conductors L 1 , L 2  using lithography once again, followed by dry etching with etch stop in printed conductors L 1 , L 2 . 
         [0056]    Conductive adhesive contact fillings KF 21 , KF 22  are then filled into contact holes K 21 , K 22 , resulting in the process state according to  FIG. 4   b.    
         [0057]    It should also be pointed out that printed conductors L 1 , L 2  are connected to circuit connection regions CC 1  and CC 2 , respectively, of integrated circuit C 2 , which in turn are connected to piezoelectric device P via further printed conductors and other electronic components (not shown). 
         [0058]    Following the process state according to  FIGS. 4   a , b, the composite component is separated into the components, each of which is composed of a silicon sensor chip and a carrier substrate made of steel. For this purpose, a sawing process is carried out along respective saw lines S 12 , S 23 , . . . . Laser water jet cutting, for example, may be used for the sawing, producing a suitable outer contour, a round contour, for example, for welding the sensor components to a connecting element. During and after the separation, the separated components are handled on a fiberglass tape or other suitable carrier (not shown). 
         [0059]      FIG. 5  shows a schematic cross-sectional view for explaining an installation design for a micromechanical component according to the first specific embodiment of the present invention. 
         [0060]    As illustrated in  FIG. 5 , for the installation the sensor component, composed of carrier substrate SS 2  and silicon sensor chip SC 2 , is welded to a connecting element AS 2  by beam welding at the circumference, thus forming weld seam SN. As a result of the circumferential welding, during operation weld seam SN is preferably acted on by pressure stresses, which allows the sensor in question to be durably designed for particularly high pressures. By welding only in the lower area of the sensor component, the distance of the thermal weld influx zone from silicon sensor chip SC 2  may be kept relatively large. 
         [0061]    Following the process state explained in conjunction with  FIG. 5 , the sensor components are adjusted as a function of pressure and temperature. A sensor component without an evaluation electronics system is adjusted in the associated ASIC (two-chip approach), and sensor elements having an integrated evaluation electronics system may be adjusted with the aid of thyristor zapping or zener zapping. 
         [0062]    Fuel injection systems, air conditioning systems, and geared transmission systems are mentioned as examples of applications for the high-pressure sensors designed in this manner. 
         [0063]      FIG. 6  shows a schematic cross-sectional view for explaining a manufacturing method for a micromechanical component according to a second specific embodiment of the present invention. 
         [0064]    In the second specific embodiment illustrated in  FIG. 6 , the first composite of the plurality of semiconductor chips SC 1 , SC 2 ′, . . . differs in that each semiconductor chip SC 1 ′, SC 2 ′, . . . is completely integrated into main wafer element  1 ′ of a wafer W 1 ′; i.e., no support points made of silicon are present as in the first specific embodiment. 
         [0065]    Wafer W 1 ′ has a first front surface V 1 ′ and a first back surface R 1 ′. The design of circuits C 1 ′, C 2 ′ in sensor chips SC 1 ′, SC 2 ′ corresponds to the design of circuit regions C 1 , C 2 , including piezoelectric device P, which has been explained in conjunction with  FIGS. 1   a, b.    
         [0066]    In addition, in  FIG. 6  reference character PL denotes a polishing line to which W 1 ′ is thinned, starting from second back surface R 1 ′, after the seal glass wafer bonding of surface V 1 ′ on surface V 2  of stainless steel wafer W 2 , in order to achieve the required small thickness of silicon sensor chips SC 1 ′, SC 2 ′, . . . . It should be noted that the back-thinning of wafer W 1 ′ starting from second back surface R 1 ′ may be carried out by etching or chemical-mechanical ablation, for example. Lastly, reference character S 12 ′ denotes a line for a separation process, carried out by sawing, for example. In contrast to the first specific embodiment, in this separation process main wafer element  1 ′ of wafer W 1 ′ may also be cut through concurrently with stainless steel wafer W 2 . 
         [0067]      FIG. 7  shows a schematic cross-sectional view for explaining a manufacturing method for a micromechanical component according to a third specific embodiment of the present invention. 
         [0068]    In the third specific embodiment according to  FIG. 7 , in contrast to the first specific embodiment described above there is no back-side through contacting of silicon sensor chip SC 2 ″, situated at that location, from back surface R 1 ″ thereof; rather, there is simultaneous seal glass wafer bonding of front surface V 1 ″ and simultaneous soldering of solder bumps LB 1 , LB 2 , which are provided on printed conductors L 1 ″, L 2 ″ on the circuit side in thin-layer ceramic D 2 ″, on corresponding printed conductors which are provided in an isolated manner in or on surface V 2  of carrier substrate SS 2  (indicated by dashed lines). The same as for the first specific embodiment, printed conductors L 1 ″ and L 2 ″ are connected to corresponding circuit connection regions CC 1 ″, CC 2 ″ of integrated circuit C 2 ″ 
         [0069]      FIGS. 8   a, b  show schematic cross-sectional views for explaining a manufacturing method for a micromechanical component according to a fourth specific embodiment of the present invention. 
         [0070]    In the fourth specific embodiment according to  FIG. 8 , the first composite of the plurality of semiconductor chips SC 1 ′″, SC 2 ′″, . . . is provided on a bordered dicing tape SF in a composite W 1 ″; silicon sensor chips SC 1 ′″, SC 2 ′″, . . . have circuit regions CC 1 ′″, CC 2 ′″, . . . which correspond to circuit regions C 1 , C 2 , including piezosensitive device P, previously explained. Thus, based on the process state according to  FIG. 6 , semiconductor chips SC 1 ′″, SC 2 ′″, . . . are already thinned and sawed into individual chips SC 1 ′″, SC 2 ′″, . . . . This composite W 1 ″ is held together only by bordered dicing tape SF. Reference character V 1 ′″ denotes the first front surface of first composite W 1 ″, while reference character R 1 ′″ denotes the first back surface of first composite W 1 ″. 
         [0071]    In contrast- to the specific embodiments previously described, in the fourth specific embodiment it is likewise provided that steel carrier substrates SS 1 ′″, SS 2 ′″, SS 3 ′″, . . . are not present in the form of a stainless steel wafer, but rather as individual substrates which are joined as composite W 2 ′ with the aid of a carrier device TE as explained in detail in DE 199 34 114 A1, for example. Reference character V 2 ′″ denotes the second front surface of composite W 2 ″, while reference character R 2 ′″ denotes the second back surface thereof. 
         [0072]    Following the process state according to  FIG. 8 , the seal glass bonding, back-side contacting, separation, and the other subsequent process steps previously described in conjunction with the first specific embodiment are carried out. 
         [0073]      FIGS. 9   a, b  show schematic cross-sectional views for explaining a manufacturing method for a micromechanical component according to a fifth specific embodiment of the present invention. 
         [0074]    In the fifth specific embodiment according to  FIGS. 9   a , b, thinned and separated sensor chips SC 1 ′″, SC 2 ′″, . . . are joined via a bordered dicing tape SF′ in a composite W 1 ′″ which, unlike the fourth specific embodiment, is mounted on first front surface V 1 ′″, while its first back surface R 1 ′″ is exposed. 
         [0075]    Accordingly, first back surface R 1 ′″ is soldered at second front surface V 2  of steel carrier substrate SS 2  to chip SC 2 ′″, etc., whose circuit connection regions CC 1 ′″, CC 2 ′″ of circuit C 2 ′″ are connected to front surface V 1 ′″ via printed conductors LB 1 ′″, LB 2 ′″ which extend through thin-layer ceramic D 2 ′″. Printed conductors LB 1 ′″, LB 2 ′″ may subsequently be electrically connected by bonding or other techniques. 
         [0076]    Although the present invention has been described above on the basis of preferred exemplary embodiments, it is not limited thereto, and may be modified in numerous ways. 
         [0077]    In particular, the stated material combinations as well as types of sensors are only examples. The above-mentioned specific embodiments may also be combined in any desired manner with regard to the types of composites and types of contacting.