Abstract:
Various exemplary embodiments relate to an integrated optical device including: a semiconductor waveguide on a substrate; a dielectric waveguide on a substrate optically coupled to the semiconductor waveguide; and a germanium device on the semiconductor waveguide optically coupled to the semiconductor waveguide.

Description:
TECHNICAL FIELD 
     Various exemplary embodiments disclosed herein relate generally to the monolithic integration of dielectric waveguides and germanium-based devices. 
     BACKGROUND 
     Great advances are being made in the optical processing of optical signals. This is leading to the development of optical circuits. Such optical circuits include different optical devices that are used to transmit, receive and process optical signals. Therefore, optical waveguides having low loss and other desirable characteristics may be used to connect different optical devices. 
     SUMMARY 
     There is a need for an optical coupling between passive optical circuits and semiconductor-based optical devices such as modulators, photodetectors and switches. 
     A brief summary of various exemplary embodiments is presented. Some simplifications and omissions may be made in the following summary, which is intended to highlight and introduce some aspects of the various exemplary embodiments, but not to limit the scope of the invention. Detailed descriptions of a preferred exemplary embodiment adequate to allow those of ordinary skill in the art to make and use the inventive concepts will follow in the later sections. 
     Various exemplary embodiments provide an integrated optical device including: a semiconductor waveguide on a substrate; a dielectric waveguide on a substrate optically coupled to the semiconductor waveguide; and a germanium device on the semiconductor waveguide optically coupled to the semiconductor waveguide. 
     Various exemplary embodiments further provide a method of forming an integrated optical device comprising: patterning a silicon layer on a silicon-on-insulator (SOI) wafer; forming a dielectric waveguide on a substrate optically coupled to the silicon layer; and forming a germanium device on the silicon layer optically coupled to the silicon layer. 
     Various embodiments may be further adapted wherein the semiconductor waveguide is single crystal silicon. 
     Various embodiments may further include a planarization layer on the substrate, wherein the planarization layer has a thickness approximately the same as a thickness of the semiconductor waveguide and wherein the dielectric waveguide overlaps the planarization layer and a portion of the semiconductor waveguide. 
     Various embodiments may further include a spacing layer between the dielectric waveguide and the planarization layer and between the dielectric waveguide and the semiconductor waveguide. 
     Various embodiments may be further adapted wherein the spacing layer is part of the planarization layer. 
     Various embodiments may be further adapted wherein the silicon substrate, the buried insulating layer, and the semiconductor waveguide comprise a silicon-on-insulator (SOI) wafer. 
     Various embodiments may be further adapted wherein germanium device is a photodetector, a modulator, or a switch. 
     Various embodiments may be further adapted wherein the dielectric waveguide is coupled to a passive photonic circuit. 
     Various embodiments may be further adapted wherein dielectric waveguide is one of silica, SiON, Si 3 N 4 , and benzocyclobutene. 
     Various embodiments may further include forming a planarization layer on the SOI wafer after patterning the silicon layer, wherein the planarization layer has a thickness approximately the same as a thickness of the silicon layer and wherein the dielectric waveguide overlaps the planarization layer and a portion of the silicon layer. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       In order to better understand various exemplary embodiments, reference is made to the accompanying drawings, wherein: 
         FIG. 1  illustrates a cross-sectional view of an embodiment of a monolithic integrated optical device including a dielectric optical waveguide coupled to a germanium-based device; 
         FIG. 2  illustrates a cross-sectional view of another embodiment of a monolithic integrated optical device including a dielectric optical waveguide coupled to a germanium-based device; and 
         FIG. 3  illustrates a cross-sectional view of another embodiment of a monolithic integrated optical device including a dielectric optical waveguide coupled to a germanium-based device. 
     
    
    
     DETAILED DESCRIPTION 
     Referring now to the drawings, in which like numerals refer to like components or steps, there are disclosed broad aspects of various exemplary embodiments. 
     Waveguides made of dielectric materials such as silicon-dioxide, silicon-oxynitride, and silicon-nitride have many advantages compared to waveguides made of semiconductor materials such as silicon and indium-phosphide. These advantages include lower propagation loss, less temperature sensitivity, and better robustness to dimension variations. All of these are critical aspects for photonic functionalities such as filtering, multiplexing/demultiplexing, etc. The success of photonic lightwave circuits (PLC), which are based on silica or silicon-dioxide, serves as a good example of this. However, it is often necessary to put those passive photonic functionalities together with photodetectors, modulators, or other circuits, which are usually semiconductor-based, for complete photonic transceiver circuits. Traditionally, this is done by packaging the passive chip together with separate photodetectors or modulators or arrays of such devices. Monolithically integrating the passive dielectric waveguide circuits with these active devices would allow development of photonic circuits with smaller form-factor, enhanced complexity, and lower cost. Below, a general scheme where passive dielectric waveguides may be monolithically integrated with germanium-based active devices on a single silicon chip is described. 
     One example of such integration is placing a dielectric waveguide on top of a germanium photodetector. However, there are several problems with this configuration. First, because the dielectric waveguides are processed after the germanium photodetectors or other circuits, the processing temperature has to be below a certain value (for example, 600° C.) to avoid damaging the detectors or other circuits. Secondly, because the waveguides are on top of germanium, they interfere the placement of the metal contacts, which might affect the speed or efficiency of the resulting device. Thirdly, such configuration may not be applicable to other germanium-based devices such as modulators. Therefore, there remains a need for monolithic integrated optical device that overcomes these problems. 
       FIG. 1  illustrates a cross-sectional view of an embodiment of a monolithic integrated optical device including a dielectric optical waveguide coupled to a germanium-based device. A monolithic integrated optical device  100  may include a substrate  110  made of silicon, a buried insulating layer  120  made of silicon-dioxide, a silicon layer  130 , a dielectric waveguide  150 , and a germanium-based device  160 . 
     The substrate  110 , the buried insulating layer  120 , and the silicon layer  130  may form a silicon-on-insulator (SOI) wafer  140 . SOI wafers  140  are readily available. The substrate  110  may be made of any materials that provide the necessary structure for the SOI wafer  140 . The buried insulating layer may be made of insulating materials other than silicon-dioxide. Such insulating materials may include materials with an index of refraction that is less than the index refraction of the silicon layer  130  and the index of refraction of the dielectric waveguide  150  and that may provide adequate insulation between the silicon layer  130  and the substrate  110 , and also adequate optical isolation between the silicon layer  130  and the substrate  110  and between the dielectric waveguide  150  and the substrate  110 . Further, the use of an SOI wafer  140  may allow for the silicon layer  130  to be formed in a single crystal structure. 
     A single crystal silicon layer  130  may have better optical characteristics than a poly-crystalline silicon layer and an amorphous silicon layer. Further, the use of single crystal silicon may lead to better germanium devices  160  that may be formed on the silicon layer  130 . Poly-crystalline silicon and amorphous silicon layers  130  may lead to poly-crystalline germanium and amorphous germanium layers that form the basis of the germanium device  160 . Thus, the use of poly-crystalline germanium and amorphous germanium layers may lead to decreased performance characteristics of the resulting germanium device  160 . 
     Alternatively, instead of using a SOI wafer  140 , the buried insulating layer  120  and the silicon layer  130  may be formed on the substrate  110  at the time that the monolithic integrated optical device  100  is formed. This may be accomplished using well know semiconductor deposition and patterning manufacturing processes. It is noted that the resulting deposited silicon layer  130  would not result in a single crystal silicon layer  130 . Thus, this type of manufacturing process would be used when the desired germanium device performance may tolerate the use of amorphous or poly-crystalline germanium. 
     The silicon layer  130  on the buried insulating layer  120  may be patterned. The patterned silicon layer  130  may have three different regions. The first region may interface with the dielectric waveguide  150 . The second region may act as a silicon waveguide. The third region may provide a substrate for the formation of the germanium device  160  as well as acting as a waveguide. Thus, the shape and the size of the silicon layer  130  may be formed to accommodate the functions of these three different regions. Further, the silicon layer  130  may be replaced by a layer of another semiconductor material as well. Such materials may include, for example, indium-phosphide (InP), gallium-arsenide (GaAs), and InGaAsP. 
     The dielectric waveguide  150  may be formed to overlap the first region of the silicon layer  130 . The dielectric waveguide  150  may be made of silica, SiON, Si 3 N 4 , polymers, benzocyclobutene (BCB), etc. The dielectric waveguide  150  may be connected to or integrated with various known passive photonic circuits. 
     The germanium device  160  may be formed by patterning germanium deposited on the silicon layer  130  or by selective growth of germanium in patterned openings on the silicon layer  130 . Such germanium devices  160  may be photodetectors, modulators, switches, etc. The photodetectors may be, for example, a PIN or avalanche photodetector. Because germanium and silicon have similar crystalline structures, high quality germanium devices  160  may be formed on a silicon layer  130 . Further, a layer of SiGe may be formed on the silicon layer before the germanium layer is formed. The SiGe layer may provide a transition from the silicon crystal structure to the germanium crystal structure. Further, this layer may have a thickness of about 10 nm to 50 nm. 
     The monolithic integrated optical device  100  may operate as follows. Light from passive photonic circuits may be propagated by the dielectric waveguide  150  to the silicon layer  130 . The light may couple from the dielectric waveguide  150  into the silicon layer  130  that may act as a semiconductor waveguide. The light in the silicon layer  130  may propagate to the germanium device  160 . When the germanium device  160  is a photodetector, the germanium device may detect the light from the silicon layer  130  and may produce an output electrical signal indicating the presence and characteristics of the optical signal detected. 
     The monolithic integrated optical device  100  may be formed as follows. First, a silicon layer  130  on a SOI wafer  140  may be patterned. Next, a dielectric waveguide  150  may be formed on the SOI wafer, with a portion of the dielectric  150  overlapping a portion of the silicon layer  130 . Finally, a germanium device  160  may be formed on the silicon layer  130  by depositing and patterning a germanium layer on the silicon layer  130  or by selective growth of germanium in patterned openings on the silicon layer  130 . Further, an intermediate layer of SiGe may be formed on the silicon layer  130  prior to the formation of the germanium layer. 
       FIG. 2  illustrates a cross-sectional view of another embodiment of a monolithic integrated optical device including a dielectric optical waveguide coupled to a germanium-based device. A monolithic integrated optical device  200  is the same as the monolithic integrated optical device  100  in  FIG. 1  except for the addition of the planarization layer  270 . The planarization layer  270  may be between the dielectric waveguide  150  and the buried insulating layer  120 . The planarization layer  270  may have approximately the same thickness as the silicon layer  130 . The planarization layer  270  in combination with the silicon layer  130  forms a substantially flat surface upon which the dielectric waveguide  130  may be formed. The use of the planarization layer  270  may remove the vertical boundary between the dielectric waveguide  150  and an edge of the silicon layer  130 , thus reducing reflections and scattering of light at the boundary between the dielectric waveguide  150  and the silicon layer  130 . 
     The planarization layer  270  may be formed by deposition and patterning after the silicon layer  130  is formed. After the formation of the planarization layer  270 , the dielectric waveguide  150  may be formed on the planarization layer  270  and the silicon layer  130 . 
       FIG. 3  illustrates a cross-sectional view of another embodiment of a monolithic integrated optical device including a dielectric optical waveguide coupled to a germanium-based device. A monolithic integrated optical device  300  is the same as the monolithic integrated optical device  200  in  FIG. 2  except for the addition of a spacer layer  380 . The spacer layer  380  may be between the dielectric waveguide  150  and the combination of the planarization layer  270  and the silicon layer  130 . The spacer layer  380  may help to reduce optical scattering and reflections at the boundary between the dielectric waveguide  150  and the silicon layer  130 . Further, the spacer layer  380  may be used to protect the silicon layer  130  during the processing of the dielectric waveguide  150 . 
     The spacer layer  380  may be formed on the surface of the planarization layer  270  and the silicon layer  130 . Then the dielectric waveguide  150  may be formed on the spacer layer  380 . Next, the exposed spacer layer  380  over the silicon layer  130  may be removed, and then the germanium device  160  may be formed as described above with respect to  FIG. 1 . 
     The thickness of the spacer layer  380  may be selected to optimize the optical coupling. It should be noted that as the thickness of the spacer increases, the amount of optical scattering/reflections at the boundaries may decrease. The thickness of the spacer may be less than 200 nm, may be less than 100 nm, or may be about 100 nm. The spacer may be made of any material that passes the optical signal with a minimal loss and/or that has an index of refraction lower than either the dielectric waveguide  150  or the silicon layer  130 . For example, suitable materials may include one of SiO 2 , SiON, Si 3 N 4 , and benzocyclobutene (BCB). In some cases, the spacer may be of the same material as the planarization layer, and may be deposited together with the planarization layer. In some cases, the spacer can be of a different material than the planarization layer and may be deposited separately. 
     Although the various exemplary embodiments have been described in detail with particular reference to certain exemplary aspects thereof, it should be understood that the invention is capable of other embodiments and its details are capable of modifications in various obvious respects. As is readily apparent to those skilled in the art, variations and modifications can be effected while remaining within the spirit and scope of the invention. Accordingly, the foregoing disclosure, description, and figures are for illustrative purposes only and do not in any way limit the invention, which is defined only by the claims.