Abstract:
A method of controlling the charge of the bootstrap capacitor during light load or no load conditions for a non-synchronous type of DC-DC converter consists of bootstrap capacitor voltage detector, light load detector and secondary switch controller. By turning on the secondary switch during the off-time of the power transistor when the bootstrap voltage is lower than the required value under light load condition, the bootstrap capacitor voltage will be able to charge back to the required value, yet minimizing the minimum current requirement for the DC-DC converter.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     The present invention relates to a non-synchronous dc-dc converter having a bootstrap capacitor and a control circuit and, more particularly, to a method for controlling the charge of a bootstrap capacitor for non-synchronous type DC-DC converter, and also to an apparatus for controlling the charge of a bootstrap capacitor for non-synchronous type DC-DC converter.  
         [0002]     In an integrated step-down dc-dc converter system, the power device is usually NPN transistor in bipolar technology, NMOS in CMOS technology or N-type DMOS in BCD technology. Bootstrapping is often used to raise the driver voltage above the power rail in order to reduce the loss of the top power transistor. P-type transistor is not commonly used due to the relatively large area needed, which is about 2-3 times larger than the n-type counterpart.  
         [0003]     For a non-synchronous DC-DC converter, in normal operation when load current is high enough, the bootstrap capacitor is charged by a voltage regulator through a diode when the switching node of the dc-dc converter goes to (−Vd) at the off-time of the power transistor, where Vd is the forward diode voltage drop. When the power transistor turns on, the switching node will go high. The stored voltage in the bootstrap capacitor will generate a voltage higher than the supply voltage. However, when the load current becomes light, which means that the inductor current becomes discontinuous during the off-time of the power transistor, the switching node of the dc-dc converter will only stay at (−Vd) for a very short time, and will be at the same voltage level as the output when the inductor current becomes 0. As a result, the voltage stored in the bootstrap capacitor will eventually become the difference between the voltage regulator output voltage subtracted by forward diode voltage drop and the output voltage. This may not be enough to fully turn on the driver for the power transistor.  
         [0004]     To overcome this problem, one method is to connect a dummy load at the output of the dc-dc converter, so that there will be a certain amount of current flowing in the dc-dc converter even at light load or no load condition, which would keep the output transistor switching. The dummy load should be of certain value to make sure that the switching node could be able to stay at (−Vd) for sufficient long time for the bootstrap capacitor to charge up. One problem with this simple method is that the efficiency of the dc-dc converter is suffered because the current in the dummy load always flows to ground, even when the bootstrap capacitor voltage is high enough.  
         [0005]      FIG. 1  is a block diagram showing a conventional DC-DC converter with the PWM controlled output stage using bootstrap and dummy load. Here the bipolar power transistor  3  is used for illustration only. The transistor could be a NMOS or N-type DMOS transistor. The bootstrap capacitor  7  is connected between the cathode of the diode,  9  and the switching node, LX. A voltage regulator,  17 , is connected to the anode of the diode  9 . The voltage regulator charges the bootstrap capacitor C 1  when LX goes to (−VD 1 ) at the power transistor off-time. The voltage across the bootstrap capacitor Cboot is (VREF). When the power transistor  3  is turned on, LX will go high. Hence the voltage at BS becomes (LX+VREF), which can be higher than the power rail voltage and provide this voltage to the driver block and fully saturate the power transistor  3 .  
         [0006]     One problem of the conventional bootstrap method is that the bootstrap capacitor may not be fully charged at light load or no load conditions. When the load current is light, the inductor current will eventually becomes discontinuous. As can be seen from  FIG. 2 , at light load, LX stays at −Vd for T 1  and then becomes Vout when the inductor current becomes 0. That means the time to charge up the bootstrap capacitor becomes T 1 . For the rest of the off-time, the voltage across the bootstrap capacitor is (VREF−VD 2 −Vout). When the Vout is close to VREF, or even worse when Vout is higher than VREF, there may not be enough charging to the bootstrap capacitor.  
         [0007]     The situation becomes worse when there is no load current drawing from the output of the DC-DC converter. LX will stay at the same voltage as Vout for an even longer time. So the bootstrap capacitor could not be charged to an enough high level to turn on the driver circuit when the load current becomes heavy after the light load condition and the switching of the power transistor is required.  
         [0008]     To overcome this, one method is to add a dummy load, as shown in  FIG. 1 . The purpose of the dummy load is to maintain a certain amount of current flow in the inductor to keep the switching of the output node. But this method will reduce the efficiency of the DC-DC converter for all the conditions.  
       SUMMARY OF THE INVENTION  
       [0009]     The purpose of this invention is to provide a method to control the charge in the bootstrap capacitor for step-down converter which operates under the light load or no load condition without the efficiency loss.  
         [0010]     According to the present invention, a step-down dc-dc converter is incorporated with light load detector, bootstrap voltage detector, secondary switch and on-time control to maintain the voltage of the bootstrap capacitor under light load or no load.  
         [0011]     For a PWM controlled step-down dc-dc converter, the output power transistor duty is determined comparing the amplified error voltage to a ramping signal, which could be a triangular wave or saw-tooth wave. When the amplified error voltage is higher than the ramping signal, the output power transistor will be turned on. During light load or no load, the duty cycle of the output power transistor will reduce, which implies that the amplified error voltage is near or lower than the bottom of the triangular wave or saw-tooth wave. By detecting the level of the amplified error voltage, a light load or no load condition can be detected.  
         [0012]     The bootstrap voltage detector monitors the voltage across the bootstrap capacitor continuously. When the voltage across the bootstrap capacitor is lower than the threshold voltage, the bootstrap voltage detector will output a “bootstrap low” signal. The threshold voltage would be the minimum voltage that is needed to turn on the power transistor plus some margin.  
         [0013]     When both the light load signal and “bootstrap low” signal are received, a secondary switch will turn on during the off-time of the power transistor. This will pull low the switching node voltage to nearly ground, which allows the bootstrap capacitor to charge up. During normal operation, when the bootstrap voltage can be maintained above the threshold voltage, the secondary switch is always off and consumes no current.  
         [0014]     This switch is not the same as the commonly referred “synchronous rectifier” which turn on every cycle where the bootstrap capacitor is charged through the switch under normal operation. The size of the “synchronous rectifier” is comparable to the top power transistor because it needs to conduct high current. The size of the secondary switch in this invention only conducts the charging current of the bootstrap capacitor, which is usually a few tens of mA.  
         [0015]     According to the present invention, a method for controlling the charge of a bootstrap capacitor for non-synchronous type DC-DC converter, having a power transistor, comprises:  
         [0016]     comparing a voltage across the bootstrap capacitor with a predetermined threshold level; and  
         [0017]     turning on a secondary switch during off-time of the power transistor when the voltage across the bootstrap capacitor is lower than the predetermined threshold and when the light load condition is detected.  
         [0018]     According to present invention, the method further comprising detecting the light load condition at the output.  
         [0019]     According to present invention, the secondary switch is a secondary transistor.  
         [0020]     According to present invention, the secondary switch includes a plurality of transistors.  
         [0021]     According to present invention, the bootstrap capacitor is charged by a voltage regulator when the bootstrap capacitor voltage is higher than the predetermined level.  
         [0022]     According to present invention, the bootstrap capacitor is charged by a voltage regulator when the load current is heavy.  
         [0023]     According to present invention, the light load condition is detected by monitoring the drop of an error amplifier output.  
         [0024]     According to present invention, on-time of the secondary switch is determined by comparing the ramping signal with a preset voltage.  
         [0025]     According to present invention, an apparatus for controlling the charge of a bootstrap capacitor for non-synchronous type DC-DC converter, having a power transistor, comprises:  
         [0026]     a comparator operative to compare a voltage across the bootstrap capacitor with a predetermined threshold level; and  
         [0027]     a secondary switch operative to be turned on during off-time of the power transistor when the voltage across the bootstrap capacitor is lower than the predetermined threshold and when the light load condition is detected.  
         [0028]     According to present invention, the apparatus further comprises a light load detector operative to detect the light load condition at the output.  
         [0029]     According to present invention, the secondary switch is a secondary transistor.  
         [0030]     According to present invention, the secondary switch includes a plurality of transistors.  
         [0031]     According to present invention, the bootstrap capacitor is charged by a voltage regulator when the bootstrap capacitor voltage is higher than the predetermined level.  
         [0032]     According to present invention, the bootstrap capacitor is charged by a voltage regulator when the load current is heavy.  
         [0033]     According to present invention, the light load detector detects the light load condition by monitoring the drop of an error amplifier output.  
         [0034]     According to present invention, on-time of the secondary switch is determined by comparing the ramping signal with a preset voltage. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0035]      FIG. 1  is a block diagram showing the output stage of a PWM with bootstrap and dummy load according to the prior art;  
         [0036]      FIG. 2  is the output waveforms during light load of  FIG. 1 ;  
         [0037]      FIG. 3  is a block diagram of a bootstrap charge control network according to the first embodiment;  
         [0038]      FIG. 4A  is a circuit diagram of a light load detector shown in  FIG. 3 ;  
         [0039]      FIG. 4B  shows waveforms to explain the operation of the light load detector;  
         [0040]      FIG. 5A  is a circuit diagram of an on-time control shown in  FIG. 3 ;  
         [0041]      FIG. 5B  shows waveforms to explain the operation of the on-time control circuit; and  
         [0042]      FIG. 6  is a block diagram of a bootstrap charge control network according to the second embodiment. 
     
    
       [0043]     It will be recognized that some or all of the Figures are schematic representations for purposes of illustration and do not necessarily depict the actual relative sizes or locations of the elements shown.  
       DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0044]     The following description explains the best mode embodiment of the present invention.  
       First Embodiment  
       [0045]     Referring to  FIG. 3 , a first embodiment of a non-synchronous DC-DC converter according to the present invention is shown.  
         [0046]     The DC-DC converter has an error amplifier  2 , an oscillator  6 , a pulse width modulation (PWM) circuit  4 , a driver stage  1 , a power transistor  3 , a linear regulator  17 , a diode  9 , a bootstrap capacitor  7 , a diode  5 , an inductor  11 , a capacitor  13 , and a control circuit  30 . The load control circuit  30  has a BS (bootstrap) voltage detector  21 , a light load detector  19 , an on-time control  23  and a secondary switch  25  formed by a transistor  25 . The secondary switch  25  can be formed by a plurality of transistors.  
         [0047]     Here a bipolar power transistor  3  is used, but can be any other type, such as a NMOS transistor or an N-type DMOS transistor. The bootstrap capacitor  7  is connected between the cathode of the diode  9  and a switching node LX. Here, LX is also used as a voltage level at the node LX. The voltage regulator  17  is connected to the anode of the diode  9 . The voltage regulator  17  charges the bootstrap capacitor C 1  when the voltage LX goes to (−VD 1 ) at the power transistor off-time. The voltage across the bootstrap capacitor  7  is (VREF). When the power transistor  3  is turned on, the voltage LX goes high. Hence the voltage at BS becomes (LX+VREF), which can be higher than VCC. This voltage is applied to the driver stage  1  to fully saturate the power transistor  3 .  
         [0048]     The circuit has no maximum duty limit. In the circuit, a bootstrap capacitor voltage, that is a voltage across capacitor  7 , can drop below a threshold voltage under two conditions. One is the light load condition; the other is when the duty cycle of the output is higher than a predetermined duty cycle. The later is due to the off-time of the power transistor being shorter than a predetermined off-time which is necessary for the bootstrap capacitor to charge up. This invention is targeted to maintain the bootstrap capacitor for light load. Hence, a light load detector is necessary for this embodiment.  
         [0049]     The light load detector  19  produces a light-load signal when the output current becomes lower than a predetermined threshold level. The light load detector  19  detects the load by detecting the reduction in duty cycle or some other methods. The BS voltage detector  21  detects the voltage across the bootstrap capacitor  7 , and compares the detected voltage with a predetermined voltage VBS. The voltage VBS is the preset threshold voltage which is higher than the minimum required voltage for the bootstrap to work. When the voltage across the bootstrap capacitor becomes less than the voltage VBS, the BS voltage detector  21  produces a high level signal. When the light load is detected, and the BS voltage detector  21  produces high level signals, the on-time control  23  produces a high level signal to turn on the secondary transistor  25 , during the off-time of the main power transistor  3 . The on-time of the secondary transistor  25  is determined by the on-time control  23 . When the secondary transistor  25  is turned on, LX voltage will be pulled near to the ground voltage. Hence, the bootstrap capacitor  7  is charged up to “VREF−VD”.  
         [0050]      FIG. 4A  is a circuit diagram showing a preferred example of the light load detector  19 . The light load detector  19  includes a comparator  31  which detects the reduction of the output duty cycle. The comparator  31  compares the output of the error amplifier  2  with a predetermined voltage Vlight (=VTB+ΔV).  
         [0051]     As shown in  FIG. 3 , in a PWM DC-DC converter, the duty cycle is determined by a comparator  4  which compares the output of the error amplifier  2  with a triangular signal produced from oscillator  6 . As shown in  FIG. 4B , when the error amplifier output is higher than the triangular oscillator output, the PWM output is high and the power transistor  3  is turned on. At light load, shown in the right hand half side of  FIG. 4B , the duty cycle is reduced. As a result, error amplifier output will move downward to the bottom of the ramping signal waveform, which could be either a triangular waveform or saw-tooth waveform. The threshold of the light load detector  19  should be set higher than the bottom of the saw-tooth wave by a voltage ΔV, as shown in  FIG. 4B . The voltage ΔV is determined such that for error amplifier output at this level, the DC-DC output duty cycle will be enough for the bootstrap capacitor  7  to charge up during the power transistor off-time. The comparator  31  of the light load detector  19  compares the output of the error amplifier with the other input of a reference signal generator producing a fixed voltage of the magnitude of the sum of the bottom of the triangular oscillator output VTB and the voltage ΔV. The light load detector  19 , together with the BS voltage detector  21 , determines a light load condition.  
         [0052]      FIG. 5A  is a circuit diagram showing a preferred example of the on-time control  23 . The on-time control  23  includes a comparator  51 . One input of the comparator  51  is applied with a predetermined voltage V 1  and the other input of the same is applied with the output of the oscillator  6 . The on-time of the secondary transistor  25  is set during power transistor off-time. As shown in  FIG. 5B , the voltage V 1  is a voltage that is lower than the peak value of the ramping signal, i.e., the triangle signal, and higher than the error amplifier output voltage under light load condition. When the ramping signal is higher than V 1 , the output of the comparator  51  is high, which allows the secondary transistor  25  to turn on. The secondary transistor  25  is only allowed to turn on when the ramping signal is higher than V 1 .  
       Second Embodiment  
       [0053]     Referring to  FIG. 6 , a second embodiment of a non-synchronous DC-DC converter with maximum duty limit according to the present invention is shown.  
         [0054]     The second embodiment shown in  FIG. 6  differs from the first embodiment of  FIG. 3  in that the second embodiment does not have a light load detector  19 . The elements in  FIG. 6  are numbered with the same reference number as that used in  FIG. 3  and have the same function as that of  FIG. 3 . The on-time of the secondary transistor  25  is determined by the duration when the maximum voltage is higher than the ramping signal, or by using the same method as described in  FIG. 5 .  
         [0055]     Having described the above embodiment of the invention, various alternations, modifications or improvement could be made by those skilled in the art. Such alternations, modifications or improvement are intended to be within the spirit and scope of this invention. The above description is by ways of example only, and is not intended as limiting. The invention is only limited as defined in the following claims.