Abstract:
A method of dry etching a PCMO stack, includes preparing a substrate; depositing a barrier layer; depositing a bottom electrode; depositing a PCMO thin film; depositing a top electrode; depositing a hard mask layer; applying photoresist and patterning; etching the hard mask layer; dry etching the top electrode; dry etching the PCMO layer in a multi-step etching process; dry etching the bottom electrode; and completing the PCMO-based device.

Description:
FIELD OF THE INVENTION 
     This invention relates to a Pt/PCMO (Pr 1-x Ca x MnO 3 )/Pt stack dry etching process for RRAM (Resistor Random Access Memory) applications, although the method of the invention may also be used in fabrication of DRAMs, capacitors, sensors, optical displays, optical switches, transducers, imagers and other magnetic devices. 
     BACKGROUND OF THE INVENTION 
     PCMO metal oxide is very hard to etch by a dry etch process. PCMO etching has been reported to include use of chlorine and argon, however, the etch rate is too low for commercial applications, and the masks used in the processes are unstable, and do not remain intact. It is also reported that PCMO has been sputter etched using pure argon, however, many of the same problems arise, in that selectivity of the etch of the PCMO thin film is poor when compared to the mask material and any underlying layers. Lee et al.,  Dry Etching to Form Submicron Features in CMR Oxides: PrBaCaMnO   3    and LaSr MnO   3 , which is available at mse.ufl.edu/˜spear/recent_papers/cmr_oxides/cmr_oxides.pdf. 
     SUMMARY OF THE INVENTION 
     A method of dry etching a PCMO stack, includes preparing a substrate; depositing a barrier layer; depositing a bottom electrode; depositing a PCMO thin film; depositing a top electrode; depositing a hard mask layer; applying photoresist and patterning; etching the hard mask layer; dry etching the top electrode; dry etching the PCMO layer in a multi-step etching process; dry etching the bottom electrode; wherein the dry etching includes an etching chemistry including Ar, O 2 , and a Cl-containing gas; and completing the PCMO-based device. 
     It is an object of this invention is to provide a method of dry etching a Pt/PCMO/Pt stack. 
     Another object of the invention is to dry etch a Pt/PCMO/Pt stack using a single hard mask to provide a clean sidewall and field. 
     A further object of the invention is to provide a method of dry etching a Pt/PCMO/Pt stack which exhibits high selectivity over the hard mask and underlying layer for RRAM applications, and specifically for fabrication of an RRAM using having a PCMO or doped PCMO thin film therein. 
     This summary and objectives of the invention are provided to enable quick comprehension of the nature of the invention. A more thorough understanding of the invention may be obtained by reference to the following detailed description of the preferred embodiment of the invention in connection with the drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a block diagram of the method of the invention. 
         FIGS. 2 and 3  depicts etching profiles of a TiN/Pt/PCMO/Pt/Ti/Si stack. 
     
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The method of the invention provides a techniques for dry etching a PCMO-based device using a single masking step. Referring to  FIG. 1 , the method of the invention is depicted generally at  10 . The initial step of the method of the invention is to prepare a suitable substrate, which may be silicon, silicon dioxide or polysilicon, and which may have a number of structures formed thereon, block  12 . A barrier layer is deposited on the substrate, block  14 , which barrier layer material is taken from the group of materials consisting of Ta, TaN, Ti, TiN, TiAIN, TiSiN, TaSiN, or TiAl. A bottom electrode is fabricated, block  16 , on the barrier layer, using a material taken from the group of materials consisting of platinum, iridium, ruthenium, and oxides of iridium and ruthenium, such as IrO2, RuO2, or a Y x Ba 2 Cu 3 O 7-x  (YBCO), to a thickness of between about 30 nm to 500 nm. A Pr x Ca 1-x MnO 3  (PCMO) thin film is deposited, block  18 , on the bottom electrode, to a thickness of between about 10 nm to 500 nm. A top electrode formed of material taken from the group of material consisting of Pt, Ir, Ru or their conducting oxide is deposited on the PCMO thin film, block  20 , and has a thickness in the range of between about 10 nm-300 nm. A hard mask, such as TiN, TiO2, Ta, TaN, TiAIN, TiSiN, TaSiN, or TiAl, is deposited on the top electrode, block  22 . The thickness of the hard mask is between about 10 nm to 300 nm. A thin layer of Ti, having a thickness in the range of between about 5 nm to 50 nm may be used to enhance the adhesion between the top electrode and the hard mask, in a modified embodiment of the method of the invention. Photoresist is then deposited on the hard mask and developed with the requisite patterns, block  24 . After the hard mask is etched, block  26 , using conventional techniques, the photoresist is striped and the wafer is ready for dry Pt/PCMO/Pt stack etching. 
     The top electrode may be dry etched according to the method of the invention through use of a gas mixture of Ar, O 2 , and Cl 2 , block  28 . The Cl 2  gas may be replaced by BCl 3 , CCl 4 , SiCl 4 , or a combination thereof. The total gas flow rate is between about 20 sccm to 100 sccm, and has a preferred flow rate of between about 40 sccm to 70 sccm. The process pressure is between about 1 mTorr and 50 mTorr, and has a preferred value of between about 1 mTorr to 10 mTorr. Microwave power is between about 400 W to 1000 W, and the substrate RF bias power is between about 10 W to 1000 W. The substrate temperature is maintained between about −50° C. to 500° C. The percentage of the oxygen in the gas chemistry is in the range of between about 1% to 50% and has a preferred range of between about 5% to 30%. The percentage of Ar in the gas chemistry is in the range of between about 5% to 80%, and a preferred range of between about 40% to 80%. The remaining gas component is comprised of Cl 2 . 
     After the top electrode is etched, the same process may be used to etch the PCMO layer, block  30 , however, for PCMO etching, a two step, or a multiple step, etching process has been found to provide better results. In the first etching step, Ar and O 2  and a chlorine-containing gas comprise the etching chemistry, which is used to remove most of the PCMO thin film. The same etching process and parameters are used for the first PCMO etch step as was used for etching the top electrode. In the second etching step, Ar and O 2  comprise the etching chemistry, which is used to remove the rest of the PCMO thin film. These two steps may be alternately applied in repeated cycles provided that shorter etching times are used in each step. The Ar, Cl 2  and O 2  etching chemistry provides a higher etch rate than when using only Ar and O 2  only ambient, however, using only Ar and O 2  provides for a cleaner side wall and field than when all three gases are used in the etching chemistry, thus resulting in a device that has a better throughput rate, and exhibits more reliable performance characteristics that if only a single step etching process were used on the PCMO, as is done in the prior art. The parameters for the second PCMO etching step are the same as for the first step, with the elimination of the chlorine-containing gas, thus, 100% of the gas mixture is argon and oxygen. After etching of the PCMO layer is complete, the bottom electrode may be etched using the same process as used to etch the top electrode, block  32 . The PCMO-containing device is then completed, block  34 . 
     The dry etching method of the invention may be applied to Ir/PCMO/Ir, Ru/PCMO/Ru, IrO2/PCMO/IrO2, and RuO2/PCMO/RuO2 capacitors. After Pt/PCMO/Pt stack of the capacitor is etched, a TiN hard mask and a barrier layer may be etched using conventional, state-of-the-art etching techniques. It is preferred to use the same material for both the hard mask and the barrier layer, at about the same thickness range, such as Ti/TiN/Pt (bottom electrode)/PCMO/Pt (top electrode)/TiJTiN stack, which allows for the hard mask and the barrier layer to be etched away in a single etching step. Otherwise, if dissimilar materials are used, multiple masking and etching step may be needed to accomplish the desired results. 
     In another embodiment of the method of the invention, a TiN hard mask layer may remain on the top electrode, if required for the completed device. In another embodiment, the barrier layer may be patterned before the bottom electrode is formed, thus eliminating the need for a separate barrier layer removal step. 
       FIGS. 2 and 3  depict examples of structures fabricated according to the method of the invention. The dry etching system may be performed in any state-of-the-art, high-density plasma reactor. An example of such a reactor is an ECR (Electron Cyclotron Resonance) plasma reactor. In this case, the ion density and ion energy in the plasma are controlled independently by adjusting the ECR microwave power and the RF bias power. The gas chemistry for  FIGS. 2 and 3  is Ar (40-80%), O2 (5%-30%) and Cl 2  (30-50%). The process pressure is 1 mTorr to 10 mTor. The microwave power is at between 500 W to 800 W, and the RF bias power is at 100 W to 400 W. The etching was done in three steps. The first step is etching the Pt top electrode using Cl 2 , Ar and O 2  ambient; the second step is etching the PCMO thin film using alternating cycles: e.g. using Cl 2 +Ar+O 2  to etch the bulk of PCMO, and then using Ar and O 2  for the over etching step with the Ar in a range of between about 90% to 50%, and O 2  in a range of between about 10% to 50%, respectively. The third step is etching the bottom electrode using the same process as used to etch the top electrode. The forth step is an optional step, and provides for the etching of the hard mask and the barrier layer using conventional etching techniques.  FIG. 2  depicts the etching profile of stack etching of Pt/PCMO stop (Etching profile of TiN (80 nm)/Pt (50 nm)/PCMO (150 nm)/Pt (150 nm)/Ti/Si) on the bottom electrode and  FIG. 3  is the stack etching of Pt/PCMO/Pt stop on Ti barrier layer, (Etching profile of TiN (80 nm)/Pt (120 nm)/PCMO (180 nm)/Pt (100 nm)/Ti/Si). 
     Another variant of the method of the invention is to use TiN, TiO2, Ta, TaN, TiAIN, TiSiN, TaSiN, or TiAl, as the single hard mask to stack etch top electrode/PCMO/bottom electrode, such as Pt/PCMO/Pt. 
     Thus, a one mask Pt/PCMO/Pt stack etching process for RRAM applications has been disclosed. It will be appreciated that further variations and modifications thereof may be made within the scope of the invention as defined in the appended claims.