Abstract:
Data message sync patterns for use in a network that utilizes Manchester (Bi-Phase) signal encoding with an embedded sync pattern. The sync pattern of the invention differs from conventional sync patterns for Manchester (Bi-Phase) type signal encoding, allowing greater deviation of the local oscillators in the communication network without increase in the communication network bandwidth.

Description:
[0001]     This specification includes a computer program listing appendix contained on a compact disc, said computer program listing appendix being incorporated-by-reference herein. There are two compact discs which are identical: labeled Copy 1 and Copy 2. The names of the files on each disc are “ib_rcvr.vhd” and “ib_xmit.vhd”; the date of creation of the files was Mar. 16, 2004; the sizes of the files are 29 kb and 22 kb, respectively.  
       FIELD OF THE INVENTION  
       [0002]     The present invention relates to a data message sync pattern, and more specifically an improved data message sync pattern for use in a network that utilizes Manchester (Bi-Phase) signal encoding with an embedded sync pattern.  
       BACKGROUND OF THE INVENTION  
       [0003]     The IntelliBus protocol first implemented in 1999 utilizes a Manchester (Bi-Phase) type signal encoded messaging format to transfer data over a network. The message format comprises a sync pattern plus a Manchester encoded 18-bit word. The sync pattern is used to identify the beginning of each 18 bit word, and the sync pattern identifies that word as either a command or data word. Traditionally sync patterns for Manchester encoded words in communication systems are 3 data bit-times wide. The sync patterns are invalid data patterns and were either 1½ bit periods constant high signal followed by 1½ bit periods constant low signal, or 1½ bit period constant low signal followed by 1½ bit periods constant high signal.  
         [0004]     Current systems oversample the asynchronous data patterns and use algorithms to find the sync patterns in the Manchester encoded signals. However, the length of time from the center to the end of the sync pattern limits the amount of frequency deviation from the expected rate that a receiver can tolerate. Thus, the sync pattern itself is the weakest part of the message decoding, and therefore sets the maximum-amount of deviation permitted.  
         [0005]     It is desirable to be able to receive and transmit Manchester encoded data words on a communication network asynchronously, meaning that no communication clock signal needs to be transmitted with the Manchester encoded data. This places the burden of recognizing the beginning of a data word, and correctly receiving each bit of the word, on each receiving node in the communication system even in the presence of distortion, or apparent distortion, of the received data signal. Apparent distortion can be caused by a mismatch of the frequencies of the expected transmit and receive frequencies in the communication system, or by duty cycle skew in the receiver or transmitter. Yet another form of distortion can be caused by undesirable interfering noise signals added to the desired data signal. Noise sources can be from reflections on the network cable, crosstalk between network cable pairs, or other forms of conducted or radiated noise signals.  
         [0006]     In order to receive data words in the presence of a mismatch in expected data rate between a transmitter and receiver node, it is advantageous for the receiving node to oversample the received data signal and look for the crossings between the high and low portions of the received data signals. The receiver then makes a decision on where the beginning of the word is located, and whether the data bits are valid and should be saved to a register or other memory.  
         [0007]     It is also desirable that the network signals not contain a DC component. This allows the network signals to be passed through transformers, capacitors, or radio links, as required.  
         [0008]     Traditional sync patterns used in Manchester encoded communication systems limit the frequency deviation that can be tolerated between the transmitter and receiver. The present invention comprises an improved set of sync patterns that allow greater mismatch in data frequency between the transmitting and receiving network nodes for a given oversampling rate.  
       SUMMARY OF THE INVENTION  
       [0009]     The sync patterns of the present invention allow greater deviation of the local oscillators in the communication system from the nominal frequency, while maintaining the absence of a DC component to the signals and using no additional communication system bandwidth.  
         [0010]     This invention changes the shapes of the sync patterns at the start of the Manchester encoded data words as compared to the traditional shapes so that for a given oversampling rate the maximum allowable frequency mismatch between the transmitter and receiver for the sync pattern is the same as for the bit patterns in the rest of the word. The sync patterns of this invention are similar to the traditional sync patterns, but have extra transitions that allow the receiver logic to correctly identify the sync patterns in the presence of greater frequency deviation than for the traditional sync patterns.  
         [0011]     The sync patterns of the invention have no DC component so that the signals can pass through transformers, capacitors or RF links, or any other transmission medium that cannot pass a DC or very low frequency signal. Moreover, the sync patterns of the invention are no longer in time than the traditional sync patterns, so that there is no decrease in the amount of data that can be moved in the communication system when compared to a system using a traditional sync pattern.  
         [0012]     This invention can be used on any network application that utilizes Manchester (Bi-Phase) type signal encoding with an embedded sync pattern.  
         [0013]     Further features and advantages of the present invention, as well as the structure and operation of various embodiments of the present invention, are described in detail below with reference to the accompanying drawings. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0014]      FIG. 1  is a block diagram of a typical network that may utilize the data message sync pattern of the present invention;  
         [0015]      FIGS. 2 and 3  are waveforms illustrating prior art sync patterns;  
         [0016]      FIGS. 4 and 5  are waveforms illustrating sync patterns in accordance with preferred embodiments of the present invention;  
         [0017]      FIGS. 6 and 7  are flow diagrams of the software implementing the sync patterns of  FIGS. 4 and 5 , respectively; and  
         [0018]      FIG. 8  is a block diagram of a test set-up for measuring frequency deviation tolerance. 
     
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS  
       [0019]     With reference to  FIG. 1  of the drawing, there is shown a typical network bus  10  that may utilize Manchester (Bi-Phase) type signal encoding with an embedded sync pattern in accordance with the present invention. Such a typical network bus has a plurality of receiver/transmitter nodes N that receive and transmit data over the Manchester-type signal encoded network.  
         [0020]      FIGS. 2 and 3  illustrate prior art (traditional) sync patterns for a Manchester signal encoded network.  FIG. 2  illustrates waveforms  20 ,  22  where the sync pattern is detected when the received signal goes low for 1½ bit periods, followed by the received signal going high for 1½ bit periods.  FIG. 3  illustrates prior art Manchester-type sync pattern waveforms  24 ,  26  where the sync pattern is detected when the received signal goes high for 1½ bit periods followed by the received signal going low for 1½ bit periods.  
         [0021]      FIGS. 4 and 5  illustrate-sync patterns in accordance with preferred embodiments of the present invention for use with Manchester encoding. With reference to  FIG. 4 , there is shown waveforms  30 ,  32  illustrating sync patterns in accordance with the present invention for use with Manchester encoding where the sync pattern is detected when the received signal goes low for 1 bit period, followed by the received signal going high for 1½ bit periods, followed by the received signal going low for ½ bit period. In  FIG. 5  there is shown sync patterns in accordance with the present invention for use with Manchester encoded signals where the sync pattern is detected when the received signal goes high for 1 bit period, followed by the received signal going low for 1½ bit periods, followed by the sync pattern going high for ½ bit period.  
         [0022]     Thus, it will be noted that in comparing the prior art sync patterns with those of the invention, the sync patterns of the invention have additional transitions between low and high. While the prior art sync patterns have three (3) such transitions, the sync patterns in accordance with preferred embodiments of the invention have four (4) such transitions. The additional transition allows the receiver/transmitter to correctly identify the sync pattern in the presence of greater frequency deviation between the transmitted and received signals. This is accomplished with the total periods of the sync patterns of the invention being no greater than the total periods of the traditional sync patterns.  
         [0023]     The method of detecting the sync patterns in accordance with preferred embodiments of the invention as shown by the waveforms of  FIGS. 4 and 5  will be further described with reference to the flow diagrams of  FIGS. 6 and 7 .  FIG. 6  is a flow diagram for detecting the sync pattern of  FIG. 4 . A receiver/transmitter in the network monitors ( 50 ) the received signal and determines ( 52 ) whether the received signal has gone low for 1 bit period. If so, the received signal continues to be monitored ( 54 ) to determine if it goes high at the conclusion of 1 bit period ( 56 ), and whether it then remains high for 1½ bit periods ( 58 ). If both of these criteria are met, i.e., the received signal went low for 1 bit period, followed by going high for 1½ bit periods, the signal is monitored ( 60 ) to determine if it then goes low ( 62 ), and if so, if it goes low for ½ bit periods ( 64 ). If all three criteria are met, i.e., the received signal goes low for 1 bit period, followed by going high for 1½ bit periods, followed by going low for ½ bit period, the sync pattern is detected ( 66 ).  
         [0024]      FIG. 7  is a flow diagram for detecting the sync pattern of  FIG. 5 . A receiver/transmitter in the network monitors ( 70 ) the received signal and determines ( 72 ) whether the received signal has gone high for 1 bit period. If so, the received signal continues to be monitored ( 74 ) to determine if it goes low at the conclusion of 1 bit period ( 76 ), and whether it remains low for 1½ bit periods ( 78 ). If both of these criteria are met, i.e., the received signal went high for 1 bit period, followed by going low for 1½ bit periods, the signal is monitored ( 80 ) to determine if it then goes high ( 82 ), and if so, if it goes high for ½ bit period ( 84 ). If all three criteria are met, i.e., the received signal goes high for 1 bit period, followed by going low for 1½ bit periods, followed by going high for ½ bit period, the sync pattern is detected ( 86 ).  
         [0025]     With reference to  FIG. 8 , closed loop tests were conducted to find the frequency deviation that could be tolerated in a network. The test comprised a node  90  on an RS-485 bus generating a command word with a sync pattern  40 / 42  and 18 data bits including a parity bit, then a data word with a sync pattern  30 / 32  and 18 data bits, including parity bit. A second node  92  received the command word and data word, and if both were received properly, transmitted the data word back to the first node. The first node received the data word and compared it with the word it sent. If they matched no error indication was generated. If there was a mismatch or missing reply the first node generated an error indication. The frequency of local oscillator  1  for node  90  was set at a nominal 6 MHz. These tests showed that with 6 times oversampling asynchronous receivers using the traditional sync patterns, the local oscillator  2  for node  92  could be varied from 5.50 MHz (−8.33%) to 6.547 Mhz (+9.11%) with no communication errors occurring. With 6 times oversampling asynchronous receivers using the sync patterns of the present invention, the local oscillator  2  could be varied from 5.40 MHz (−10.0%) to 6.750 MHz (+12.5%) with no communication errors occurring. Thus, the sync patterns of the invention allowed a worst case frequency deviation of the local oscillators between the two nodes to increase from 8.33% to 10% (a worst case frequency deviation allowance increase of about 20%).  
         [0026]     When implementing digital logic to receive the Manchester encoded data stream there is a tradeoff between the local oscillator frequency and the performance of the receiver logic. The digital logic in the receiver can only sample the incoming data stream at a rate of 1/(local oscillator frequency=T). The digital logic uses these samples to find the edges in the data, and uses the edges to find the sync patterns and bit stream. The digital receiver logic therefore can only find the transitions in a waveform with an uncertainty of 1/T. The uncertainty is one factor that reduces the amount of local oscillator frequency mismatch from nominal that can be tolerated between the sending and receiving units. Ideally the digital logic in the receiver would use a local oscillator frequency that would be fast enough to sample the data stream at a rate of at least 10 times per bit or more to reduce the effects of the sampling uncertainty. However practical limitations on the frequency at which a digital receiver circuit can be operated typically limit the sampling rate. In accordance with preferred embodiments of the invention, a schematic based circuit used a sample rate of 6 samples per bit, and a VHDL based circuit used a sample rate of 10 samples per bit. When receiving a 30 Mbit/sec data stream the schematic based circuit used a 180 MHz local oscillator, and the VHDL based circuit used a 300 MHz local oscillator. The VHDL based circuit is contained in the computer program listing appendix to this specification.  
         [0027]     While the present invention has been described by reference to specific embodiments and specific uses, it should be understood that other configurations and arrangements could be constructed, and different uses could be made, without departing from the scope of the invention as set forth in the following claims.