Abstract:
A circuit arrangement permits a microcontroller wirebond pad to be configured to be an analog or digital input or output. The circuit arrangement uses any of a plurality of switching configurations to selectively determine the use of the wirebond pad under control of the microcontroller&#39;s processor. The microcontroller can be configured using configurable analog and configurable digital blocks to perform any of a plurality of functions with certain of the pinouts determined under program control.

Description:
CROSS REFERENCE TO RELATED DOCUMENTS 
   This application is related to and claims priority benefit under 35 U.S.C. 119(e) of U.S. Provisional patent Application Ser. No. 60/243,708, filed Oct. 26, 2000 to Snyder, et al. which is hereby incorporated herein by reference. This application is also related to U.S. patent application Ser. No. 09/893,048, filed Jun. 26, 2001 to Kutz, et al. entitled “Multiple Use of Microcontroller Pad”, which is hereby incorporated herein by reference. 

   COPYRIGHT NOTICE 
   A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever. 
   FIELD OF THE INVENTION 
   This invention relates generally to the field of integrated circuits. More particularly, this invention relates to an arrangement for multiple use of wirebond pads on a microcontroller die. 
   BACKGROUND OF THE INVENTION 
   The size of an integrated circuit die required is often constrained by the number of wirebonding pads needed to provide a given function. When a large number of pinouts are required to support a particular functionality, the corresponding large number of wirebond pads can dictate the size of an integrated circuit die. Since the size of the die is directly related to the production cost and throughput of a particular circuit, it is desirable to minimize the size required for each circuit. In the case of a microcontroller, this factor can become extremely important since it is desirable to provide a maximum level of versatility in any given device to increase its marketplace acceptance and thus volumes of the device produced. 
   SUMMARY OF THE INVENTION 
   The present invention relates generally to integrated circuits. Objects, advantages and features of the invention will become apparent to those skilled in the art upon consideration of the following detailed description of the invention. 
   In one embodiment consistent with the present invention, a circuit arrangement permits a microcontroller wirebond pad to be configured to be an analog or digital input or output. The circuit arrangement uses any of a plurality of switching configurations to selectively determine the use of the wirebond pad under control of the microcontroller&#39;s processor. The microcontroller can be configured using configurable analog and configurable digital blocks to perform any of a plurality of functions with certain of the pinouts determined under program control. This provides an advantage of being able to use the wirebond pad for multiple purposes and frees a design of the constraint of providing all possible pinout configurations for all analog and digital configurations. 
   In an embodiment consistent with the invention, a microcontroller has a configurable analog circuit block and a configurable digital circuit block. A wirebond pad and a processor are provided. A switching circuit selectively connects the configurable analog circuit block and the digital circuit block to the wirebond pad under control of the processor. 
   In another embodiment, a microcontroller, consistent with the invention, has a circuit including at least one of an analog circuit and a digital circuit. A wirebond pad and a processor are arranged so that a switching circuit selectively connects the circuit to the wirebond pad under control of the processor. 
   In certain preferred embodiments, the configurable analog circuit block has an analog input and an analog output and the configurable digital circuit block has a digital input and a digital output. The switching circuit selectively connects one of the analog input, the analog output, the digital input and the digital output to the wirebond pad under control of the processor. Various switching circuits including tristate analog and digital circuits, analog switches and logic gates (for example) can be used to effect the switching. 
   The above summaries are intended to illustrate exemplary embodiments of the invention, which will be best understood in conjunction with the detailed description to follow, and are not intended to limit the scope of the appended claims. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The features of the invention believed to be novel are set forth with particularity in the appended claims. The invention itself however, both as to organization and method of operation, together with objects and advantages thereof, may be best understood by reference to the following detailed description of the invention, which describes certain exemplary embodiments of the invention, taken in conjunction with the accompanying drawings in which: 
       FIG. 1  is an exemplary layout of an integrated circuit die. 
       FIG. 2  is an overall block diagram of a microcontroller consistent with an exemplary embodiment of the present invention. 
       FIG. 3  illustrates a first switching arrangement for configuring a wirebond pad consistent with an embodiment of the invention. 
       FIG. 4  illustrates a second switching arrangement for configuring a wirebond pad consistent with an embodiment of the invention. 
       FIG. 5  illustrates a third switching arrangement for configuring a wirebond pad consistent with an embodiment of the invention. 
       FIG. 6  illustrates a fourth switching arrangement for configuring a wirebond pad consistent with an embodiment of the invention. 
   

   DETAILED DESCRIPTION OF THE INVENTION 
   In the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be recognized by one skilled in the art that the present invention may be practiced without these specific details or with equivalents thereof. In other instances, well known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the present invention. 
   While this invention is susceptible of embodiment in many different forms, there is shown in the drawings and will herein be described in detail specific embodiments, with the understanding that the present disclosure is to be considered as an example of the principles of the invention and not intended to limit the invention to the specific embodiments shown and described. In the description below, like reference numerals are used to describe the same, similar or corresponding parts in the several views of the drawings. 
   Turning now to  FIG. 1 , an integrated circuit die  10  is illustrated. Die  10  includes a plurality of wirebonding pads  14  (which are typically used for providing a wirebond or soldered electrical connection to the integrated circuit  18 ) situated around a periphery of the die  10 . The pads  14  are separated by a separation distance  22  defined generally by the resolution of the circuit&#39;s manufacturing process and the circuit layout. Pads  14  are shown symmetrically disposed around the periphery in this illustration, but this is not generally a requirement. The pads  14  are also generally of a particular geometry, generally square with a minimum size  26  as shown, but other shapes are also used. 
   In the classic manufacturing process, an array of such dice are produced on a wafer of silicon. The dies are then separated from one another by cutting or breaking at a scribe line. During this process, the corner areas  30  of the die have historically been exposed to substantial amounts of mechanical stress and may fracture or break in the separation process. However, gradual improvements in the technology of separation of the dies has substantially lessened the stress and incidence of fractures in this region. In order to maximize the versatility of the circuit arrangement of the present invention, a microcontroller  100  as illustrated in  FIG. 2  utilizes one or more multi-purpose pads  114 . Microcontroller  100  includes a processor  120  that can be programmed for a specified purpose by or for a user. A plurality of digital circuits are provided to form configurable digital blocks  124 . These configurable digital blocks  124  can include gates, counters, buffers, latches, decoders, encoders, registers, flip-flops, timers, etc. that can be user configured in any suitable arrangement to implement a user&#39;s desired circuit configuration. Similarly, a plurality of analog circuits are provided to form configurable analog blocks  130 . These configurable analog blocks may include filters, amplifiers, switches, clippers, limiters, summers, buffers, etc. that can be interconnected in a suitable arrangement to implement the user&#39;s desired circuit configuration. 
   The inputs and outputs for the configurable digital blocks  124  and configurable analog blocks  130  are coupled to a plurality of configurable switches  136  to be routed to the multi-purpose pad  114 . These switches are programmed by the user or at manufacture through the processor  120  and can be arranged in a number of ways to provide multiple use of the pad  114  to provide a unidirectional or bi-directional signal path as illustrated. The switching arrangement illustrated in  FIG. 2  is somewhat conceptual and can be implemented in any number of ways as illustrated in  FIGS. 3–6  as well as other implementations that will occur to those skilled in the art. 
     FIG. 3  illustrates a first circuit arrangement that can be utilized to implement the switching function of configurable switches  136 . In this embodiment, an electronic switch circuit  304  can be used. Switch circuit  304  can be realized with, for example, a plurality of CMOS analog switches with one side of each switch connected together at a common junction. Switch  304  is connected to an analog input  310 , an analog output  314 , a digital input  320  and a digital output  326 —any of which can be connected to pad  114  depending upon the switch position. The switch position can be determined by a control bus  330  that serves to enable one of the desired connections (e.g., by selectively turning on one of the CMOS analog switches) and thus complete the circuit to pad  114 . The switch can be configured under the control of the processor  120  as either analog or digital, input or output. 
   In another embodiment illustrated in  FIG. 4 , an analog input (to the microcontroller through pad  114 ) can be selectively switched to  310  using an analog switch  404  operating under control of an analog in enable control line  410  that turns switch  404  on or off as desired to implement a connection to pad  114 . An analog output from the microcontroller  100  can be selectively provided using tristate buffer amplifier  414 . The analog out signal at  314  to be supplied to pad  114  is supplied to the non-inverting input of a voltage follower configured operational amplifier. The amplifier can be selectively enabled using tristate control at a tristate analog out enable line  420 . Tristate control can similarly be used to control digital out signal  326  through a tristate inverter  424 . The output of the tristate inverter  424  is connected to pad  114  and it can be effectively removed from the circuit or switched on using tristate control applied by tristate digital out enable signal  430  to control whether or not the inverter is enabled or “tri-stated”. Tristate control can similarly be used to control digital in signal  320  through a tristate inverter  436 . The high impedance input of the tristate inverter  436  is connected to pad  114  and it can be effectively removed from the circuit or switched on using tristate control applied by tristate digital in enable signal  440  to control whether or not the inverter is enabled or disabled (tri-stated). In this embodiment, the pad  114  is isolated from the circuitry within the microcontroller by the high impedance of a tristate controlled gate or an analog switch in the off position to thus prevent unnecessary loading. Again, the switching arrangement can be configured under the control of the processor  120  as either analog or digital, input or output. 
     FIG. 5  illustrates another embodiment of a switching arrangement consistent with the present invention. In this embodiment, resistors are used to provide isolation to reduce circuit complexity. An analog input signal to the microcontroller  100  passes from pad  114  through an isolation resistor  510  to provide the input at node  310 . If the input is not being used as an analog input, the signal at  310  is simply ignored by the microcontroller  100  or not connected to a functioning configurable analog circuit block  130 . As in the example of  FIG. 5 , an analog output from the microcontroller  100  can be selectively provided using tristate buffer amplifier  414 . The analog out signal  314  to be supplied to pad  114  is supplied to the non-inverting input of a voltage follower configured operational amplifier. The amplifier can be selectively enabled using tristate control at a tristate analog out enable line  420 . 
   In this embodiment, digital NAND gates are used for switches in the digital signal paths. Other digital gates such as AND gates could also be used. NAND gate  520  is used to gate a signal from digital out  326  to pad  114  through an isolation resistor  526 . The pad  114  is configured as a digital output by use of a digital signal applied to digital out enable  530  to either pass or reject digital signals at node  326 . A logic zero at  530  effectively forces the output of NAND gate  520  to a logic high state at all times to effectively turn off the gate. Resistor  526  isolates this high state from the pad  114 . Other isolation resistor arrangements could also be used. In a similar manner, NAND gate  540  is used to gate a signal from pad  114  to digital in  320  through an isolation resistor (not shown). The pad  114  is configured as a digital input by use of a digital signal applied to digital in enable  550  to either pass or reject digital signals at pad  114 . A logic zero at  550  effectively forces the output of NAND gate  540  to a logic high state at all times. Again, the switching arrangement can be configured under the control of the processor  120  as either analog or digital, input or output. 
   Another embodiment is illustrated in  FIG. 6 . In this embodiment, as in  FIG. 5 , an analog input signal to the microcontroller  100  passes from pad  114  through an isolation resistor  510  to provide the input at node  310 . If the input is not being used as an analog input, the signal at  310  is simply ignored by the microcontroller  100  or not connected to a functioning configurable analog circuit block  130 . As in  FIG. 4 , tristate control is used to control digital out signal  326  through a tristate inverter  424 . The output of the tristate inverter  424  is connected to pad  114  and it can be effectively removed from the circuit or switched on using tristate control applied by tristate digital out enable signal  430  to control whether or not the inverter is enabled or tri-stated. 
   Analog output signals can be passed to pad  114  by use of an analog buffer configured operational amplifier  610 . The input of amplifier  610  is connected to analog out node  314  and the output is passed through an analog switch  614  to pad  114 . A digital signal at  620  controls the state of switch  614  to provide an analog out enable function. Switch  614  provides isolation between the amplifier  610 &#39;s output and pad  114  if the analog out function is not enabled. In another embodiment, not shown, a resistor could be used for isolation in place of switch  614  with no input being applied to the amplifier  314 . Digital input signals can be accommodated by use of an inverter (or buffer)  630  with its input connected to pad  114 . The inverter&#39;s output is provided as a signal at node  320 . In this embodiment, the inverter has no tristate control or other switching mechanism as such and the output of inverter  630  is simply not connected to functional logic or ignored if not being used. Again, the switching arrangement can be configured under the control of the processor  120  as either analog or digital, input or output. 
   Other switching arrangements can also be provided without departing from the invention using switches, tristate devices, logic switches and other switching arrangements to provide selective control by the processor of the configuration of one or more pads of microcontroller to thus enhance the versatility of the device without increasing device size to accommodate numerous pinouts. Moreover, although specific combinations of switching techniques have been illustrated with each example of  FIGS. 3–6 , the switching techniques shown for each signal line can be used individually in any suitable combination to provide the switching most suitable to a given application, circuit manufacturing process, layout, etc. In addition, although analog inputs were only shown switched using an analog switch, a tristate amplifier buffer could also be used as in the case of analog outputs. Also, while NAND gates were used as switches, other multiple input logic gates could be used. And, although inverting tristate buffers were used as switches, non-inverting configurations could also be used. Moreover, although only a single connection (e.g., analog or digital input or output) has been described as connected to the wirebond pad under microcontroller control, multiple connections to a single pad can also be implemented within the scope of the present invention. Such variations should be considered equivalents. 
   While the invention has been described in conjunction with specific embodiments, it is evident that many alternatives, modifications, permutations and variations will become apparent to those skilled in the art in light of the foregoing description. Accordingly, it is intended that the present invention embrace all such alternatives, modifications and variations as fall within the scope of the appended claims.