Abstract:
A voltage adjustment system includes a power supply for providing an initial voltage signal, a plurality of buck converters for receiving the initial voltage signal and generating one adjustable output voltage signal respectively, a microcontroller for determining one adjustable output voltage signal to output and determining whether a variable voltage signal generated by a buck converter that outputs the adjustable output voltage signal is positive or negative, a display unit for displaying value of the adjustable output voltage signal that is outputted, a plurality of voltage control units corresponding to the plurality of buck converters, and a voltage variation adjustment circuit including two buttons. The variable voltage signal is added to the adjustable output voltage signal generated by the same buck converter. Selection of the two buttons causes the microcontroller to adjust absolute value of the variable voltage signal generated by the buck converter through the corresponding voltage control unit.

Description:
BACKGROUND 
     1. Technical Field 
     The present disclosure relates to a voltage adjustment system, and particularly to a voltage adjustment system for electrical testing of electronic devices. 
     2. Description of Related Art 
     Many electronic devices such as computers may require electrical testing before delivery. Different operating circuits of the electronic device require different operating voltages during the electrical testing process. For example, electrical testing an electronic device may require operating voltages of 3.3 volts, 5 volts, and 12 volts, and when testing whether the electronic device works abnormally when the operating voltages have slightly changed, the operating voltages of 3.3 volts, 5 volts, and 12 volts may need to be slightly adjusted. 
     Different power supplies are needed to provide different operating voltages, and voltage adjustment circuits are needed to slightly adjust the operating voltages. Thus, many testing equipments lead to circuit complexity, and high cost. 
     Therefore, it is desired to provide a voltage adjustment system which can overcome the above-described deficiencies. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       Many aspects of the present voltage adjustment system can be better understood with reference to the following drawings. The components in the various drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present voltage adjustment system. 
         FIG. 1  is a block diagram of a voltage adjustment system according to one embodiment of the present disclosure. 
         FIG. 2  is a circuit diagram of one embodiment of a buck converter and a voltage control unit of the voltage adjustment system shown in  FIG. 1 . 
         FIG. 3  is a circuit diagram of one embodiment illustrating electrical connections between a microcontroller, selection switches, a bidirectional switch, and a display unit of the voltage adjustment system shown in  FIG. 1 . 
         FIG. 4  is a circuit diagram of one embodiment of a voltage variation adjustment circuit of the voltage adjustment system shown in  FIG. 1 . 
         FIG. 5  is a circuit diagram of one embodiment illustrating electrical connections between the buck converter and the microcontroller of the voltage adjustment system shown in  FIG. 1 . 
     
    
    
     DETAILED DESCRIPTION 
     Referring to  FIG. 1 , a voltage adjustment system  100  according to an exemplary embodiment of the present disclosure includes a power supply  10 , a plurality of buck converters  11  electronically connected to the power supply  10 , an analog-to digital converter (ADC)  12 , a microcontroller  13 , a demultiplexer  14 , a plurality of voltage control units  15 , a voltage variation adjustment circuit  16 , a plurality of selection switches  17  corresponding to the plurality of buck converters  11 , a bidirectional switch  18 , and a display unit  19 . The plurality of buck converters  11  are electronically connected to the ADC  12 , and each buck converter  11  is electronically connected to a voltage control unit  15 . The plurality of voltage control units  15  are electronically connected to the demultiplexer  14  and the voltage variation adjustment circuit  16 . The plurality of buck converters  11 , the ADC  12 , the demultiplexer  14 , the voltage variation adjustment circuit  16 , the plurality of selection switches  17 , the bidirectional switch  18 , and the display unit  19  are all electronically connected to the microcontroller  13 . The number of the buck converters  11 , the voltage control units  15 , and the selection switches  17  are the same, and determined by the number of desired output voltage signals. In this embodiment, the number of the desired output voltage signals is four. 
     Referring to  FIG. 2 , each buck converter  11  includes a voltage terminal VCC 5 , a function terminal VMSET/MODE, two general purpose input/output terminals GPIO 1 /REFIN, GPIO 2 . Each voltage control unit  15  includes an n-channel transistor Q 1 , a digital potentiometer  151 , and two current limiting resistors R. A drain electrode of the transistor Q 1  is electronically connected to the voltage terminal VCC 5 , a source electrode of the transistor Q 1  is electronically connected to the function terminal VMSET/MODE, and a gate electrode of the transistor Q 1  is electronically connected to a 5 volts input terminal through a current limiting resistor R. 
     The digital potentiometer  151  includes three control terminals  INC ,  CS , U/  D  and three resistor terminals RH, RW, RL. The three control terminals  INC ,  CS , U/  D  are operable to receive control signals according to which a resistance of the digital potentiometer  151  is adjusted. The resistor terminal RH is floating, the resistor terminal RW is electronically connected to the function terminal VMSET/MODE, and the resistor terminal RL is grounded through a current limiting resistor R. The digital potentiometer  151  can be referred to as a rheostat that is digitally controlled, the resistor terminal RW can be referred to as a wiper terminal of the rheostat, and the resistor terminals RH, RL can be referred to as two ends of the rheostat. The operation modes of the digital potentiometer  151  are shown in the following table, and “X” in the table is capable of representing any value. 
     
       
         
               
               
               
               
             
           
               
                   
               
               
                 
                   INC 
                 
                 
                   CS 
                 
                 U/  D   
                 Operation 
               
               
                   
               
             
             
               
                 high to low 
                 low 
                 high 
                 wiper terminal toward RH 
               
               
                 high to low 
                 low 
                 low 
                 wiper terminal toward RL 
               
               
                 High 
                 low to high 
                 X 
                 store wiper terminal position 
               
               
                   
               
             
          
         
       
     
     Referring to  FIG. 3 , in this embodiment, the microcontroller  13  is a single chip microcomputer. The microcontroller  13  includes a plurality of pins P 1 . 0 ˜P 1 . 7 , P 2 . 0 ˜P 2 . 2 , P 2 . 5 ˜P 2 . 6 . Each of the pins P 1 . 0 ˜P 1 . 3  is grounded through a selection switch  17 . Each selection switch  17  is electronically connected to a 5 volts input terminal through a current limiting resistor R. According to switch states of the selection switches  17 , the pins P 1 . 4 , P 1 . 5  outputs selection signals to the ADC  12  and the demultiplexer  14 . The pin P 1 . 6  is electronically connected to the bidirectional switch  18 . According to selection of the bidirectional switch  18 , the pin P 1 . 7  outputs a voltage variation control signal to the general purpose input/output terminal GPIO 1 /REFIN. The pin P 2 . 0  is electronically connected to the control terminal U/  D . The pins P 2 . 1 , P 2 . 2  are electronically connected to the voltage variation adjustment circuit  16 . The pins P 2 . 5 , P 2 . 6  are electronically connected to the display unit  19 . 
     Referring to  FIG. 4 , the voltage variation adjustment circuit  16  includes four n-channel transistors Q 2 , Q 3 , Q 4 , Q 5 , a plurality of current limiting resistors R, and two buttons SW 1 , SW 2 . The control terminal  INC  of each digital potentiometer  151  is grounded through the transistor Q 2 , and the control terminal  INC  of each digital potentiometer  151  is also grounded through the transistor Q 3 . A gate electrode of the transistor Q 2  and a gate electrode of the transistor Q 4  are electronically connected to the button SW 1 . The gate electrode of the transistor Q 4  is grounded through a current limiting resistor R, a drain electrode of the transistor Q 4  is electronically connected to the pin P 2 . 1 , and a source electrode of the transistor Q 4  is grounded. A gate electrode of the transistor Q 3  and a gate electrode of the transistor Q 5  are electronically connected to the button SW 2 . The gate electrode of the transistor Q 5  is grounded through a current limiting resistor R, a drain electrode of the transistor Q 5  is electronically connected to the pin P 2 . 2 , and a source electrode of the transistor Q 5  is grounded. The two buttons SW 1 , SW 2  are electronically connected to a 5 volts input terminal. 
     Referring to  FIG. 5 , the pin P 1 . 7  is electronically connected to the general purpose input/output terminal GPIO 1 /REFIN. The general purpose input/output terminal GPIO 1 /REFIN is electronically connected to a gate electrode of a transistor Q 6 . A drain electrode of the transistor Q 6  is electronically connected to the general purpose input/output terminal GPIO 2 . A source electrode of the transistor Q 6  is grounded. The general purpose input/output terminal GPIO 2  is electronically connected to a 5 volts input terminal through a current limiting resistor R. 
     Referring to  FIGS. 1-5 , the voltage adjustment system  100  functions as follows: 
     The power supply  10  sends an initial voltage signal to the four buck converters  11 . The four buck converters  11  receive the initial voltage signal and generate four different output voltage signals V 1 , V 2 , V 3 , and V 4  respectively. When the selection switch  17  corresponding to the buck converter  11  that generate the output voltage signal V 1  is closed, the microcontroller  13  sends selection signals ADD-A, ADD-B to the ADC  12  and the demultiplexer  14  through the pins P 1 . 4 , P 1 . 5 . According to the selection signals ADD-A, ADD-B, the ADC  12  collects the output voltage signal V 1 , converts the output voltage signal V 1  into a digital signal, and sends the digital signal to the microcontroller  13 . The microcontroller  13  sends a display control signal to the display unit  19 . The display unit  19  receives the display control signal and displays the value of the output voltage signal V 1 . The demultiplexer  14  receives the selection signals ADD-A, ADD-B and sends a low level signal (logic 0) Margin S 1  to a voltage control unit  15  connected to the buck converter  11  that generate the output voltage signal V 1 . The voltage control unit  15  receives the low level signal Margin S 1 , and the low level signal Margin S 1  is applied to the control terminal  CS  of the digital potentiometer  151  and the gate electrode of the transistor Q 1 . According to the low level signal Margin S 1 , the transistor Q 1  turns off, then the function terminal VMSET/MODE is disconnected from the voltage terminal VCC 5 , and the buck converter  11  that generate the output voltage signal V 1  generates a variable voltage signal ΔV OUT  added to the output voltage signal V 1 . That is the variable voltage signal ΔV OUT  is added to the output voltage signal V 1  generated by the same buck converter  11 . 
     When there is a need to slightly adjust the value of the output voltage signal V 1 , users may choose to increase or decrease the value of the output voltage signal V 1  through the bidirectional switch  18 . If the value of the output voltage signal V 1  needs to be increased, the microcontroller  13  sends a low level signal (logic 0) to the general purpose input/output terminal GPIO 1 /REFIN through the pin P 1 . 7 . Then the transistor Q 6  turns off, the voltage of the general purpose input/output terminal GPIO 2  is at a high logic level, and then the variable voltage signal ΔV OUT  is positive. If the value of the output voltage signal V 1  needs to be decreased, the microcontroller  13  sends a high level signal (logic 1) to the general purpose input/output terminal GPIO 1 /REFIN through the pin P 1 . 7 . Then the transistor Q 6  turns on, the voltage of the general purpose input/output terminal GPIO 2  is at a low logic level, and then the variable voltage signal ΔV OUT  is negative. 
     The adjustment process of the absolute value of the variable voltage signal ΔV OUT  is as follows: 
     If the absolute value of the variable voltage signal ΔV OUT  needs to be increased, the button SW 2  is pressed. Then the transistors Q 3 , Q 5  turn on, the voltage of the control terminal  INC  changes from logic high to logic low, and the voltage of the pin P 2 . 2  changes from logic high to logic low. The microcontroller  13  sends a low level signal (logic 0) to the control terminal U/  D  through the pin P 2 . 0 . Referring to the above-mentioned table, the resistance between the resistor terminal RW and the resistor terminal RL is decreased. In this embodiment, the absolute value of the variable voltage signal ΔV OUT  is inversely proportional to the resistance between the resistor terminal RW, and then the absolute value of the variable voltage signal ΔV OUT  is increased. 
     If the absolute value of the variable voltage signal ΔV OUT  needs to be decreased, the button SW 1  is pressed. Then the transistors Q 2 , Q 4  turn on, the voltage of the control terminal  INC  changes from logic high to logic low, and the voltage of the pin P 2 . 1  changes from logic high to logic low. The microcontroller  13  sends a high level signal (logic 1) to the control terminal U/  D  through the pin P 2 . 0 . Referring to the above-mentioned table, the resistance between the resistor terminal RW and the resistor terminal RL is increased, and then the absolute value of the variable voltage signal ΔV OUT  is decreased. The adjusted output voltage signal V 1  is displayed on the display unit  19 . 
     As detailed above, according to an initial voltage signal, the voltage adjustment system  100  generates a plurality of adjustable output voltage signals and is easily operated. 
     It is to be further understood that even though numerous characteristics and advantages of the present embodiments have been set forth in the foregoing description, together with details of structures and functions of various embodiments, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.