Abstract:
An apparatus comprising a first portion, a second portion and a processor. The first portion is configured to generate a count signal in response to a number of oscillations of a clock signal. The first portion is powered by an unswitched power source. The second portion is configured to generate an interrupt signal in response to the count signal and a predetermined stored value. The second portion is powered by a switched power source. The processor is configured to (i) receive the interrupt signal and (ii) generate the switched power.

Description:
FIELD OF THE INVENTION  
       [0001]     The present invention relates to clock generation generally and, more particularly, to a real time clock architecture and/or method for a system on a chip (SOC) application.  
       BACKGROUND OF THE INVENTION  
       [0002]     Conventional system on a chip (SOC) designs need a real time clock. For example, a DVD recorder (or other recorder) needs to know when to wake up from a sleep mode to record a particular event, such as a TV program. The clock needs to keep the time even when the recorder is unplugged from the power supply. In particular, a quality recorder should not be blinking at “12:00” when the power supply is restored.  
         [0003]     Conventional solutions use an external discrete real time clock (RTC) chip to hold time. Such chips normally use bipolar technology so that they are able to run on a button battery or other low voltage inexpensive battery. External discrete real time clock chips increase the overall cost of a design.  
         [0004]     Other solutions integrate the clock onto the SOC chip. However, a SOC is not ideal for extremely low power applications (i.e., being powered by a button battery). A typical integrated clock needs to run on a re-chargeable battery only. Rechargeable batteries are expensive. Another approach is to integrate a clock into the SOC chip with special process. Such special processes are expensive and not practical on sub-micron technology.  
         [0005]     It would be desirable to implement an inexpensive real time clock that minimized power usage.  
       SUMMARY OF THE INVENTION  
       [0006]     The present invention concerns an apparatus comprising a first portion, a second portion and a processor. The first portion is configured to generate a count signal in response to a number of oscillations of a clock signal. The first portion is powered by an unswitched power source. The second portion is configured to generate an interrupt signal in response to the count signal and a predetermined stored value. The second portion is powered by a switched power source. The processor is configured to (i) receive the interrupt signal and (ii) generate the switched power.  
         [0007]     The objects, features and advantages of the present invention include providing clock generation system that may (i) be implemented in a system on a chip (SOC), (ii) consume a limited amount of power, (iii) be implemented without special VLSI processes (e.g., using normal sub-micron process), (iv) work with a large variety of battery voltages (e.g., 1.2 volts to 3.3 volts), (v) work with standard lithium watch battery, rechargeable battery, super capacitor etc., (vi) provide an automatic low battery detection, (vii) provide flexibility by implementing features in software, (viii) be implemented with low cost without an external real time clock (RTC) chip, (ix) be fabricated with standard VLSI process, and/or (x) provide long battery life (e.g., &gt;10 years) on standard watch battery. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0008]     These and other objects, features and advantages of the present invention will be apparent from the following detailed description and the appended claims and drawings in which:  
         [0009]      FIG. 1  is a block diagram of the present invention;  
         [0010]      FIG. 2  is a diagram of the voltage comparator of  FIG. 1 ;  
         [0011]      FIG. 3  is a diagram of a start up circuit;  
         [0012]      FIG. 4  is a diagram of the counter of  FIG. 1 ; and  
         [0013]      FIG. 5  is a diagram of a power supply implementation for the system of  FIG. 1 . 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0014]     Referring to  FIG. 1 , a block diagram of a system  100  is shown in accordance with a preferred embodiment of the present invention. The system  100  generally comprises an external portion  102 , an internal portion  104  and a software module/processor  106 . The external portion  102  generally comprises a crystal oscillator  110  and a counter  112 . The oscillator  110  may have an input  114   a  and in input  144   b  that are connected to a crystal  116 . The oscillator  110  may have an output  118  that presents a signal (e.g., CLK) to an input  120  of the counter  112 . The signal CLK may be a square wave that oscillates at a particular frequency in response to a frequency of the crystal  116 . In one example, an inexpensive watch crystal may be used to implement the crystal  116 . Such a crystal is typically run at 32,768 Hz. However, other frequencies may be used to meet the design criteria of a particular implementation.  
         [0015]     The counter  112  may be implemented as an asynchronous counter to avoid the need to implement clocking circuitry. An asynchronous counter normally uses less power than a synchronous counter. In one example, the counter  112  may be implemented as a 46-bit counter. However, other counters may be implemented to meet the design criteria of a particular implementation. A 46-bit counter may be useful if the crystal  116  is a 32,768 Hz crystal (e.g., the frequency of a standard watch crystal). 32,768/2ˆ15=1 second. 1 second*2ˆ31=2,147,483,648 seconds which equals 68 years. So a 46-bit counter driven by a 32,768 Hz crystal will count for 68 years, long beyond the useful life of a typical DVD recorder. A 45-bit counter will count for 34 years.  
         [0016]     The internal portion  104  may be implemented as core logic (e.g., software run on a microprocessor, such as an embedded microprocessor or microcontroller). The internal portion  104  generally comprises a block (or circuit)  130 , a block (or circuit)  132  and a block (or circuit)  134 . The circuit  130  may be implemented as a voltage comparator circuit. The circuit  132  may be implemented as a comparator circuit. The circuit  134  may be implemented as a register. The register  134  may be configured to provide a timer interrupt signal (e.g., TIME). The signal TIME may be a multi-bit signal.  
         [0017]     The external portion  102  may have an input  122  that receives a voltage (e.g., BAT) from an external source. The external source may be implemented as a battery, a capacitor, or other appropriate external power source. In one example, the external power may be a watch battery, re-chargeable battery, super capacitor or system power. The voltage comparator  130  may be powered by the external source through an input  123 . The comparator  132  and the register  134  are generally powered by the same power supply that supplies the core logic in the processor  106 . The counter  112  has an output  124  that presents a signal (e.g., COUNT). The signal COUNT may be a multi-bit signal. The comparator  132  has an input  136  that receives the signal COUNT and an input  138  that receives the signal TIME from the register  134 . The comparator  132  compares the signal COUNT to the signal TIME to generate an interrupt signal (e.g., INT) presented through an output  140 . The signal COUNT may be presented to an input  150 . The signal INT may be presented to an input  152 . An input  154  may receive the signal CLK. An input  156  may receive a signal (e.g.,. LOW) from the comparator  130 .  
         [0018]     The core logic  104  (which runs on the core power) comprises the voltage comparator  130 , the comparator  132 , the time register  134  and control logic/startup logic for the XTAL oscillator/counter (to be described in more detail in connection with  FIG. 3 ).  
         [0019]     Referring to  FIG. 2 , a more detailed diagram of the voltage comparator  130  is shown. The voltage comparator  130  monitors the voltage BAT of the external source or battery. If the voltage BAT drops below a certain level (e.g., 1.2 volts in one example), then the output of the comparator  130  (e.g., the signal LOW) would be asserted. The signal LOW is monitored by the microprocessor  106 . A band gap reference  131  (a normal component in a DVD recorder chip) may be used to create a constant voltage signal (e.g., VINT) used to drive other analog circuits in the chip. The band gap reference voltage VINT is used as a voltage standard and compared with the battery voltage BAT to determine if the battery is performing within specifications (e.g., whether the voltage BAT is above a certain voltage level).  
         [0020]     The crystal  116  may be implemented, in one example, as a low cost external watch crystal. However, other types of low cost crystals may be implemented to meet the design criteria of a particular implementation. While the present invention may be suitable for use with a low cost crystal, the invention will work with any crystal that is convenient. The oscillator  110  may be implemented as a low power crystal (e.g., XTAL) oscillator. The oscillator  110  and the counter  112  run on external power. In general, the external portion  102  continues to operate even if the power source that runs the main core (e.g., the core power) of the chip is removed.  
         [0021]     Referring to  FIG. 3 , a diagram of a start up logic for the circuit  102  is shown. The oscillator  110  needs a pulse (e.g., START) to start oscillating. The counter  112  needs another pulse (e.g., RESET) for an initial start up (or after the battery is changed). The pulse START may be generated from a register  160  programmed by a microcontroller  106 . The pulse RESET may be generated from a register  162  programmed by microcontroller  106 . A power loss in the internal portion  104  does not affect the XTAL oscillator  110  and the counter  112 . The comparator  132  generates the interrupt signal INT when the signal COUNT is equal to the predetermined value TIME. Such a feature may be useful for starting a user pre-set recording process or other real time system tasks. Software run in the internal processor  106  may be used to interpret the count into real time. Conversions such as to and/or from day light savings time may also be implemented. The interrupt signal INT may be used to wake up a recording process and/or drive the external clock display logic. The processor  106  calculates the difference between the value COUNT and the real time and stores this information in internal memory, external flash memory or external storage device (not shown). Thus, the counter  112  never needs to be set and the overall circuitry may be simplified and power consumption may be lowered.  
         [0022]     The present invention may be implemented using standard sub-micron technology to minimize the transistors needed for implementation. The internal circuit  102  includes the oscillator  110  (with external clock xtal) and a single counter  112 , so the transistors are kept to a minimum. Implementing the counter as a 31-bit second counter may be used to count up to more than 50 years.  
         [0023]     Referring to  FIG. 4 a  more detailed diagram of the counter  112  is shown. The counter  112  may be implemented using a simple asynchronous toggle flip flop with a propagated carry. For example, the counter  112  may be implemented as a number of flip-flops  170   a - 170   n.  The counter  112  does not normally need to be programmed by the internal embedded microprocessor  106 , which eliminates the need for synchronous logic. When a user sets the time, the processor  106  remembers the difference between the signal COUNT and the wall clock, and saves the difference in a flash memory, hard disk drive or any non-volatile memory (not shown). When the processor  106  needs to know the current time, the core logic  104  reads the counter  122  and adds the difference retrieved from non-volatile memory. The oscillator  110  and the counter  112  run on a separate battery power supply. The counter  112  may be implemented with a transistor count that is so small that a typical button battery could last for more than 10 years.  
         [0024]     The rest of the clock generation system  100  (e.g., other than the external portion  102 ) is not implemented by hardware, but rather is normally implemented by the software of the internal portion  104 . The embedded processor  106  reads the value in the counter  112 , adds the retrieved difference value, and converts the value into seconds, minutes, date and year. The software  104  may also provide adjustments, such as for daylight savings time. Therefore, the real time clock has only a minimal part of logic run on the battery. The system  100  uses a partition between hardware/software to minimize the drain on the clock battery.  
         [0025]     Referring to  FIG. 5 a  diagram of the system  100  illustrated in the context of a power supply is shown. In the system  100 , an power supply  180  may be implemented to provide power to the oscillator  110  and counter  112  if the system  100  has standard power. The battery  182  would engage if the main power  180  (e.g., an internal power supply) is lost. Using the main power  180  when it is available may further extend the life of battery  182 . A number of diodes  184   a - 184   n  may be implemented between the battery  182  and the power supply  180 . The diodes  184   a - 184   n  may be used to control the direction of current.  
         [0026]     The core logic  104  would compare the value in the counter  112  with some pre-set value. If the values match, the interrupt signal INT would be sent to the embedded processor  106  such that TV recording software (or other external software) could be started. The comparator  112  works on the main power, and thus would not drain the battery.  
         [0027]     The system  100  may automatically detect a low battery condition by comparing the battery voltage with an internal band gap voltage generator. In many SOC chips, a band gap circuit is commonly implemented for other purpose. Thus, a battery low monitor is constructed with a simple voltage comparator and an existing band gap voltage generator.  
         [0028]     The function performed by the software module  104  and a processor  106  of  FIG. 1  may be implemented using a conventional general purpose digital computer programmed according to the teachings of the present specification, as will be apparent to those skilled in the relevant art(s). Appropriate software coding can readily be prepared by skilled programmers based on the teachings of the present disclosure, as-will also be apparent to those skilled in the relevant art(s).  
         [0029]     The present invention may also be implemented by the preparation of ASICs, FPGAs, or by interconnecting an appropriate network of conventional component circuits, as is described herein, modifications of which will be readily apparent to those skilled in the art(s).  
         [0030]     The present invention thus may also include a computer product which may be a storage medium including instructions which can be used to program a computer to perform a process in accordance with the present invention. The storage medium can include, but is not limited to, any type of disk including floppy disk, optical disk, CD-ROM, magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, Flash memory, magnetic or optical cards, or any type of media suitable for storing electronic instructions.  
         [0031]     While the invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the invention.