Abstract:
There is provided a voltage mode push-pull driver output stage with low power consumption and improved output return loss (ORL) suitable for various high bandwidth data transmission applications. By structuring the output stage to have tunable resistances adjustable by voltages applied to transistors, the output stage is readily adaptable to different applications requiring different resistances or impedance matching.

Description:
RELATED APPLICATIONS 
       [0001]    This application claims priority to U.S. Provisional Application No. 61/211,864, filed Apr. 3, 2009, which is hereby incorporated by reference in its entirety. 
     
    
     BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The present invention is generally in the field of electrical circuits. More specifically, the present invention is in the field of cable drivers. 
         [0004]    2. Background Art 
         [0005]    Cable drivers are used to amplify and transmit data signals, such as video or audio, through interconnect cables from one device to another. For example, in professional video applications such as operating a television or broadcast studio, several devices with multiple input and output ports may need to be interconnected, including routers, distribution amplifiers, and switchers. As supporting infrastructure continually expands to support more devices and port interconnections, it becomes increasingly important to optimize the power consumption of the cable drivers in such devices to reduce operating costs and improve reliability. Furthermore, with the proliferation of high bandwidth video such as high definition 1080P video and the adoption of the 3G-Serial Digital Interface (SDI), it is also increasingly important to improve the output return loss (ORL) of the cable driver to preserve the quality of the transmitted signal. 
         [0006]    Conventionally, current mode output stages are used in such video cable drivers. However, current mode output stages require undesirably high levels of power consumption and typically require large output transistors, which undesirably degrade ORL, especially at high bandwidth 3G-SDI data transmission rates. One known method of mitigating ORL degradation in conventional current mode cable drivers utilizes external inductance and resistance on the outputs. However, this method undesirably requires external components and custom tuning for each particular application. 
         [0007]    Accordingly, there is a need to overcome the drawbacks and deficiencies in the art by providing a cable driver output stage with low power consumption and improved ORL suitable for various high bandwidth data transmission applications. 
       SUMMARY OF THE INVENTION 
       [0008]    There are provided systems and methods for voltage mode push-pull driver output stage, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0009]    The features and advantages of the present invention will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed description and accompanying drawings, wherein: 
           [0010]      FIG. 1  shows a circuit diagram of voltage mode push-pull output stage, according to one embodiment of the invention; and 
           [0011]      FIG. 2  shows a flowchart describing the steps, according to one embodiment of the present invention, by which a voltage mode push-pull output stage can operate a driver. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0012]    Although the invention is described with respect to specific embodiments, the principles of the invention can obviously be applied beyond the specifically described embodiments of the invention described herein. Moreover, in the description of the present invention, certain details have been left out to not obscure the inventive aspects of the invention. The details left out are within the knowledge of a person of ordinary skill in the art. The drawings in the present application and their accompanying detailed description are directed to merely example embodiments of the invention. To maintain brevity, other embodiments of the invention which use the principles of the present invention are not specifically described in the present application and are not specifically illustrated by the present drawings. 
         [0013]    Various embodiments of the present invention provide a voltage mode push-pull output stage for a driver, such as a cable driver, that provides substantially reduced power consumption and improved ORL, as well as other advantages as discussed below. The invention&#39;s voltage mode push-pull output stage also provides an integrated output termination, such as a 75 ohm output termination. 
         [0014]      FIG. 1  shows a circuit diagram of voltage mode push-pull output stage  100  (hereinafter referred to simply as “output stage  100 ” in the patent application), according to one embodiment of the invention. Output stage  100  can be an output stage for a driver, such as a cable driver and can be driven by a pre-driver (not shown in  FIG. 1 ). Output stage  100  has a programmable output impedance, which can be, for example, 75 ohms. In one embodiment, the output impedance of output stage  100  can be 50 ohms. Output stage  100  is coupled between voltage regulator  102  and ground and includes transistors P 1  and P 2 , which can be, for example, P channel field effect transistors (PFETs), transistors N 1  and N 2 , which can be, for example, N channel FETs (NFETs), and resistors R 1 , R 2 , R 3 , and R 4 . Output stage  100  can be configured to receive input  104  and provide an output at output pad  106 . Input  104  can be a DC voltage that can switch between 0.0 volts and a regulated voltage (Vreg) at a high frequency. Input  104  can have a data rate of, for example, between 100 megabits per second (Mb/s) and 3 gigabits per second (Gb/s). 
         [0015]    As shown in  FIG. 1 , input  104  is coupled to the gates of P 1  and N 1 , the source of P 1  is coupled to voltage regulator  102 , and the drain of transistor P 1  is coupled to node  110 . Voltage regulator  102  can provide a DC voltage of, for example, approximately 1.6 volts. In another embodiment, voltage regulator  102  can provide a DC voltage that is higher or lower than 1.6 volts. Tunable resistance  114 , which includes R 3  coupled in series with P 2  and R 4  coupled across R 3  and P 2 , is coupled between node  110  and node  108 , which is coupled to output pad  106 . As shown, the drain of transistor P 1  is coupled to node  110 , tunable resistance  114  also includes transistor P 1 . Also shown in  FIG. 1 , the source of N 1  is coupled to ground and the drain of N 1  is coupled to node  112 . Tunable resistance  116 , which includes R 1  coupled in series with N 2  and R 2  coupled across R 1  and N 2 , is coupled between node  112  and node  108 . As further shown, the drain of transistor N 1  is coupled to node  112 , tunable resistance  116  also includes transistor N 1 . 
         [0016]    When input  104  is at logic “1” (i.e. a logic high level), N 1  conducts current and P 1  is off, and when input  104  is at logic “0” (i.e. a logic low level), P 1  conducts current and N 1  is off. When N 1  is turned on, current can flow through tunable resistance  116 , which can be tuned so as to provide a desired resistance between output pad  106  and ground. For example, tunable resistance  116  can be tuned to provide approximately 75 ohms between output pad  106  and ground. Tunable resistance  116  can be tuned by applying an appropriate DC tuning voltage to the gate of N 2  so as to cause a desired resistance (i.e. output impedance), such as approximately 75 ohms, to be provided between output pad  106  and ground. For example, a replica circuit corresponding to output stage  100  can be utilized to determine the tuning voltage to be applied to the gate of N 2 . In the replica circuit, N 1  can be turned on with a logic “1” and a known current can be forced into node  108 , forming a loop. The voltage on the gate of N 2  in the replica circuit can then be adjusted so that the voltage at node  108  is equal to a reference voltage, which can be determined by the resistance, such as approximately 75 ohms, that is to be provided between output pad  106  and ground. The adjusted voltage that is applied to the gate of N 2  in the replica circuit can determine the tuning voltage to be applied to the gate of N 2  to achieve the desired resistance between output pad  106  and ground in output stage  100 . 
         [0017]    In one embodiment, the DC tuning voltage applied to the gate of N 2  can be controlled by means of an external resistance Rset and the replica of output stage  100 . A loop can set the DC tuning voltage so that the equivalent replica impedance is proportional to the external resistance. 
         [0018]    When P 1  is turned on, current can flow through tunable resistance  114 , which can be tuned so as to provide a desired resistance, such as approximately 75 ohms, between voltage regulator  102  and output pad  106 . Tunable resistance  114  can be tuned by applying an appropriate DC tuning voltage to the gate of P 2  so as to cause a desired resistance (i.e. output impedance), such as approximately 75 ohms, to be provided between voltage regulator  102  and output pad  106 . Tunable resistance  114  can be tuned in a similar manner as tunable resistance  116 . For example, another replica circuit corresponding to output stage  100  can be utilized to determine the tuning voltage to be applied to the gate of P 2 . In the replica circuit, P 1  can be fully turned on by applying a logic “0” to the gate of P  1 . A known current can be injected into the source of P 1  at voltage regulator  102  and the gate of P 2  can be adjusted to provide a reference voltage at node  108 . In one embodiment of the invention, the reference voltage can be approximately 1.2 volts, which can correspond to a logic “1” at output pad  106 . The adjusted voltage that is applied to the gate of P 2  in the replica circuit can determine the tuning voltage to be applied to the gate of P 2  to achieve the desired resistance between voltage regulator  102  and output pad  106  in output stage  100 . 
         [0019]    In one embodiment, the DC tuning voltage applied to the gate of P 2  can be controlled by means of an external resistance Rset and the replica of output stage  100 . A loop can set the DC tuning voltage so that the equivalent replica impedance is proportional to the external resistance. 
         [0020]    In output stage  100 , output pad  106  can be AC coupled to a load by a capacitor, for example. Output stage  100  can provide an output pulse at output pad  106  having a peak-to-peak voltage swing of, for example, approximately 800 millivolts (mV)±10 percent. To achieve a voltage swing of approximately 800 mV, the logic low can be approximately 0.4 volts and the logic high can be approximately 1.2 volts at output pad  106 . 
         [0021]    When N 1  is on and P 1  is off, current can flow through tunable resistance  116  and N 1  and a logic “0” (logic low) is produced at output pad  106 . When N 1  is on, an output impedance, such as a 75 ohm impedance, can be defined between output pad  106  and ground by the bottom half of output stage  100 . When P 1  is on and N 1  is off, current can flow from voltage regulator  102  through P 1  and tunable resistance  114  to output pad  106 . The current flowing to output pad  106  can provide a voltage at output pad  106  that defines a logic “1” (logic high). When P 1  is on, an output impedance, such as a 75 ohm impedance, can be defined between voltage regulator  102  and output pad  106  by the top half of output stage  100 . 
         [0022]    In output stage  100 , current flowing in the internal output termination actually contributes to the voltage swing and the output is truly single-ended. The current required to provide amplitude Vamp when output pad  106  is coupled to a receiver having a termination Rterm can be I=Vamp/(2·Rterm) (assuming Rterm is equal to the output termination of output stage  100 ). In a conventional current mode driver, the internal output termination is in parallel with the receiver output termination. As a result, the current required to provide the same output amplitude can be I=(2·Vamp)/Rterm. Consequently, the conventional current mode driver can require four times as much current as output stage  100  to provide the same output voltage swing. Also, the conventional current mode driver provides differential outputs. Thus, current is wasted in the conventional current mode driver when both outputs are not being utilized. Thus, the invention&#39;s voltage mode push-pull output stage substantially reduces power consumption compared to a conventional current mode driver. 
         [0023]    Also, since there is less current flowing into N 1  and P  1 , those transistors can be smaller and, consequently, easier to drive. As a result, the circuit (e.g. pre-driver) driving the input of output stage  100  can advantageously consume less power and can be easier to design. In output stage  100 , P 2 , N 2 , R 1 , R 2 , R 3 , and R 4  can also be reduced in size, which can reduce manufacturing cost. Also, output stage  100  can advantageously consume less area on an IC chip. 
         [0024]    Additionally, since N 1  and P 1  are smaller, they have less parasitic capacitance. As result, the parasitic capacitance on output pad  106  can be reduced, which can advantageously improve return loss at high frequency. 
         [0025]    Further, the invention&#39;s voltage mode push-pull output stage can provide improved duty cycle dispersion (DCD) characteristics, thereby advantageously reducing jitter. 
         [0026]    Moreover, by utilizing a voltage regulator, the invention&#39;s voltage mode push-pull output stage can advantageously provide increased power supply noise rejection. 
         [0027]    Moving to  FIG. 2 ,  FIG. 2  shows a flowchart describing the steps, according to one embodiment of the present invention, by which a voltage mode push-pull output stage can operate a driver. Certain details and features have been left out of flowchart  200  of  FIG. 2  that are apparent to a person of ordinary skill in the art. For example, a step may consist of one or more sub-steps or may involve specialized equipment, as known in the art. While steps  210  through  240  shown in flowchart  200  are sufficient to describe one embodiment of the present invention, other embodiments of the invention may utilize steps different from those shown in flowchart  200 . 
         [0028]    At step  210 , the output stage adjusts a first tunable resistance between a first node and a third node by adjusting a first tuning voltage applied to a gate of a second transistor. Referring to  FIG. 1 , this corresponds to output stage  100  adjusting tunable resistance  114  between node  110  and node  108  by adjusting a first tuning voltage applied to a gate of transistor P 2 . As described above, feeding a known current through a replica circuit of output stage  100  may be utilized to determine the appropriate first tuning voltage for setting a desired output impedance between voltage regulator  102  and output pad  106 , such as 50 or 75 ohms. Alternatively, as also described above, the first tuning voltage may be controlled by means of external resistance and the replica circuit. 
         [0029]    At step  220 , the output stage adjusts a second tunable resistance between a second node and the third node by adjusting a second tuning voltage applied to a gate of a fourth transistor. Step  220  may be carried out in a manner similar to step  210 . Referring to  FIG. 1 , this corresponds to output stage  100  adjusting tunable resistance  116  between node  112  and node  108  by adjusting a second tuning voltage applied to a gate of transistor N 2 . As described above, feeding a known current through a replica circuit of output stage  100  may be utilized to determine the appropriate second tuning voltage for setting a desired output impedance between ground and output pad  106 , such as 50 or 75 ohms. Alternatively, as also described above, the second tuning voltage may be controlled by means of external resistance and the replica circuit. 
         [0030]    At step  230 , the output stage receives an input signal coupled to a gate of a first transistor and a gate of a third transistor. Referring to  FIG. 1 , this corresponds to output stage  100  receiving input  104  coupled to a gate of transistor P 1  and a gate of transistor N 1 . 
         [0031]    At step  240 , the output stage conducts current through the second tunable resistance when the input signal is at logic high or through the first tunable resistance when the input signal is at logic low. As discussed above, when transistor N 1  receives input  104  as logic high, current travels through tunable resistance  116 , and transistor P 1  goes into an off state. As previously described, output stage  100  may be configured such that output pad  106  receives approximately 0.4 volts representing logic low. On the other hand, when transistor P 1  receives input  104  as logic low, current travels through tunable resistance  114 , and transistor N 1  goes into an off state. As previously described, output stage  100  may be configured such that output pad  106  receives approximately 1.2 volts representing logic high. As a result, input  104  is efficiently transmitted by voltage mode push-pull driver output stage  100  through output pad  106 , which may, for example, further transmit the signal through video cable interconnects to another device. 
         [0032]    From the above description of the invention it is manifest that various techniques can be used for implementing the concepts of the present invention without departing from its scope. Moreover, while the invention has been described with specific reference to certain embodiments, a person of ordinary skills in the art would recognize that changes can be made in form and detail without departing from the spirit and the scope of the invention. As such, the described embodiments are to be considered in all respects as illustrative and not restrictive. It should also be understood that the invention is not limited to the particular embodiments described herein, but is capable of many rearrangements, modifications, and substitutions without departing from the scope of the invention.