Abstract:
The sense signal, which is used to indicate that the motor phase current in a stepper motor is at the set point, is masked both before and after each pulse width modulator edge thereby reducing susceptibility to commutation noise from any phase. A mask time is created for a period before and after a PWM edge. The phase current is balanced during this mask time by removing and replacing the phase current

Description:
BACKGROUND OF THE INVENTION  
       [0001]     The phase current in each phase of a multi-phase step motor must be carefully controlled to insure precise motor rotation and to hold the motor in a fixed position upon stoppage. Methods for such motor control usually include a simple comparator and a set point for determining when the motor phase current is at or above the set point.  
         [0002]     However, at low motor currents, commutation transients can cause the comparator to prematurely indicate that the set current has been reached and audible noise is often generated due to the uncertainty of the comparator switch point.  
         [0003]     U.S. Pat. No. 5,650,705 entitled “Apparatus and Method for Controlling Currents in an Inductor”, U.S. Pat. No. 5,264,770 entitled “Stepper Motor Driver Circuit” and U.S. Pat. No. 6,049,184 entitled “Method and Arrangement for Controlling A Current” each describe various methods for accurately controlling current in stepper motor applications.  
         [0004]     One method used to eliminate the noise effects during switching transients consists of blocking or “masking” the sense signal during the transient. When at low current settings, simply masking the sense signal can cause errors if the motor current increases above the set point during the mask period, as a result, the phase current can be, on average, too high. Not masking commutation transients can cause the phase current to be shut off before the set point is reached; as a result, the phase current can be, on average, too low. Further, audible noise is often generated due to the uncertainty of the switch point.  
         [0005]     One example of a mask control signal used in controlling a stepper motor is described within U.S. Pat. No. 5,003,261 entitled “Rotation Detection Circuit Having Input Pulse Signals for a Step Motor”.  
         [0006]     One purpose of the present invention is to improve stepper motor accuracy at low phase current values.  
       SUMMARY OF THE INVENTION  
       [0007]     The sense signal, which is used to indicate that the motor phase current in a stepper motor is at the set point, is masked both before and after each pulse width modulator edge thereby reducing susceptibility to commutation noise from any phase. While the sense signal is masked, current is removed during the portion of the mask period before the PWM_OSC edge, and then an equal amount is put in during the mask period after the PWM_OSC edge. The removal and replacement keeps the current balanced during the commutation transient period allowing the accurate replacement of the normally occurring losses. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0008]      FIG. 1  is a schematic representation of the step motor control circuit according to the invention; and  
         [0009]      FIG. 2  is a diagrammatic representation of the signal waveforms used within the circuit of  FIG. 1 .  
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT  
       [0010]     The step motor control circuit shown in  FIG. 1  is similar to that described within US Patent Application (serial number IMS-11) entitled:” A Method for Independently Controlling Each Phase of a Multi-phase Step Motor” wherein each of phase of the multi-phase motor is separately controlled. As shown in  FIG. 1 , one motor phase coil  11  of a multiphase motor (not shown) is interconnected with the driver circuit  10  by means of an H bridge switch arrangement, hereafter “H bridge”  12  consisting of switches S 1 -S 4 , similar to that shown in the aforementioned U.S. Pat. No. 6,049,184 for individual control of each separate motor phase. Although only one motor phase coil  11  is depicted, it is understood that the driver circuit  10  connects in a similar manner with the other motor phase coils (not shown).  
         [0011]     By activating the appropriate switches S 1 -S 4  current can be directed through the phase coil  11  in different directions. In accordance with the teachings of the present invention, forward current, “FWD” is defined herein as increasing current away from zero. Reverse current, “REV” is defined as decreasing current toward zero. To achieve “FWD current or “REV” current one switch in the upper portion and one switch in the lower portion of the “H” bridge are activated. Recirculating current, RECIRC is defined as allowing current to move within the upper or lower portion of the H bridge  12  when FWD or REV current has been terminated. To achieve RECIRC current both switches S 3 , S 4  in the lower portion or both switches S 1 , S 2  in the upper portion of the “H” bridge  12  are activated. Phase current is sensed during FWD current across a resistor R 1  creating a signal I_SENSE on conductor  20 . The I_SENSE signal is conditioned by the signal conditioning OP AMP  14  then compared with the SET_POINT signal on conductor  22  created by SET POINT generator  13  using the comparator  15 . The comparator  15  creates the FWD signal on conductor  23 , which indicates that the FWD current as indicated by the I_SENSE signal is at or above the SET_POINT during the forward condition. The PWM oscillator  17  creates a PWM_OSC signal on conductor  24  and REVERSE, hereafter “REV” signal on conductor  25  which direct the bridge control logic  18  to activate the appropriate switches S 1 -S 4  in the “H” bridge  12 . The PWM oscillator  17  further creates the MASK signal on conductor  26  which, when present, prevents the FWD signal from connecting with the bridge control logic  18 . The logic gate  16  with inputs FWD and MASK, as described earlier, creates the signal END_FWD on conductor  27  which, when present, directs the bridge control logic  18  to stop the forward condition allowing the phase current to recirculate. The remaining motor phases are controlled in a similar manner.  
         [0012]     For a clearer understanding of the invention, it is helpful to refer now to the signal waveforms  28 - 33  as shown in  FIG. 2 . The PWM-OSC signal  28  is depicted as long time base configuration compared to the I-SENSE signal  31 , which is depicted in solid lines with the SET-POINT signal  31 A indicated in phantom  
         [0013]     Referring to both  FIG. 1  and  FIG. 2 , the bridge control logic  18 , during the REV signal  29  activates the appropriate switches S 1 -S 4  in the H bridge  12  causing REV current to flow in the phase. At PWM_OSC signal edge  28 A, of the PWM-OSC signal  28 , the bridge control logic  18  switches to the FWD direction. During the MASK signal  30 , the END_FWD signal  33  on conductor  27  will not be present. For the duration of the MASK signal  30  at the input to the logic gate  16  switching transients  31 B, are prevented from prematurely ending the FWD current. When the MASK signal  30  is absent from the input to logic gate  16 , the END_FWD signal  33  can occur in response to the FWD signal  32 , on the input to logic gate  16 . When the END_FWD signal  33  occurs the bridge control logic  18  stops the FWD current and switches to RECIRC current. The removal and replacement during the MASK signal  30  keeps the current balanced during the commutation transient period. The phase current losses that naturally occur while the H bridge is in RECIRC are accurately replaced when the phase current flows in the FWD direction after the MASK signal  30  ends.  
         [0014]     In this arrangement, the FWD current will not be stopped prematurely by switching transients nor be allowed to stay on too long by a simple mask, whereby the “FWD” current will rise to the SET_POINT signal  31 A consistently. It is to be noted that the other motor phases can use the same PWM_OSC signal edge  28 A or the other PWM_OSC signal edge as indicated at  28 B.