Abstract:
Disclosed is a method of adjusting a reception threshold value in data reception. The method comprises: generating a transmission signal on the basis of a clock regenerated from a reception signal, determining a worst phase at which a bit error rate becomes maximum by changing a phase of the transmission signal, and adjusting a reception threshold value in the state of the worst phase. The worst phase is determined by detecting the bit error rate by shifting the phase of the transmission signal by a predetermined interval while fixing the reception threshold value to a predetermined value.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to a method of adjusting a reception threshold value in data reception, and more particularly to a method of adjusting the reception threshold value of a reception signal to minimize the influence of a crosstalk signal from a transmission part on a reception part of a data transmission and reception module, and a data transmission and reception module using the method. 
         [0003]    2. Description of the Related Art 
         [0004]    Along with the demand for a wider bandwidth of a data network, the need for an increase of the capacity and the speed in data transmission has been increasing. For example, an optical communication device providing a transmission bandwidth of 10 Gbit/s has been increasingly introduced. A 10 Gbit/s optical transceiver module, which is a data transmission and reception module implementing the optical communication device, has been spreading, promoted by an industry standard called MSA (Multi Source Agreement). As a result, the improvement in performance and the reduction in size and cost of the module have been in progress. For example, in an XFP (10 Gbps Small Form Factor Pluggable) module compliant with the MSA, a transmission part and a reception part are integrated together to reduce the size of the module. As compared with a conventional 300-pin MSA SFF (Small Form Factor) optical transceiver module, the XFP module needs to be reduced to one sixth in size and one third in power consumption. The specification of the XFP module is disclosed in XFP REVISION 4.5 SPECIFICATION (&lt;http://www.xfpmsa.org/cgi-bin/msa.cgi&gt;). 
         [0005]    In the reduction in size of a module, it is necessary to reduce the sizes of the transmission part and the reception part while improving the characteristic of the module. Particularly, in a module in which the transmission part and the reception part are integrated together, as in the XFP module, a crosstalk from the transmission part to the reception part constitutes a serious problem for the improvement in performance of the reception part. Techniques of removing a crosstalk signal include, for example, a technique described in Japanese Unexamined Patent Application Publication No. 2005-130303. 
         [0006]    To improve the characteristic of the transmission part of the data transmission and reception module, the amplitude needs to be increased. Meanwhile, to improve the reception characteristic, a high-sensitivity APD (Avalanche Photodiode) device or the like is used, and thus the signal amplitude is substantially reduced. Therefore, to improve the reception characteristic of the data transmission and reception module in which the transmission part and the reception part are integrated together, as in the XFP pluggable module, for example, it is important to remove the crosstalk from the transmission part as much as possible. In such a module, however, the transmission part and the reception part are close to each other due to the small size of the module. Therefore, it is difficult to completely remove the crosstalk from the transmission part to the reception part. 
       SUMMARY 
       [0007]    There is provided a method of adjusting a reception threshold value of a reception signal to minimize the influence of a crosstalk signal from a transmission part on a reception part of a data transmission and reception module, and a data transmission and reception module using the method. 
         [0008]    According to an aspect of an embodiment, there is provided a method comprising: generating a transmission signal on the basis of a clock regenerated from a reception signal; changing the phase of the transmission signal to locate a phase of the transmission signal maximizing a bit error rate of the reception signal, and determining the located phase as the worst phase; and adjusting the reception threshold value in the state of the worst phase. 
         [0009]    According to the method, the reception threshold value is optimally adjusted in the state of the worst phase. Therefore, irrespective of the phase of the transmission signal, it is possible to perform bit determination of the reception signal while preventing the deterioration of the reception signal due to a crosstalk signal attributed to, for example, the rise and fall of the transmission signal. Particularly, in a data transmission and reception module in which the transmission part and the reception part are integrated together, data reception can be performed in a state in which the influence of the crosstalk from the transmission part on the reception part is minimized. 
         [0010]    Further, the method according to the aspect of the embodiment may be configured such that the worst phase is located by detecting the bit error rate while sequentially shifting the phase of the transmission signal by a predetermined value in a state in which the reception threshold value is fixed to a predetermined value. 
         [0011]    According to the method, the phase of the transmission signal minimizing the bit error rate can be accurately located, even if the crosstalk signal attributed to the rise and fall of the transmission signal is deviated from the rise and fall timing of the transmission signal, or if there is a crosstalk caused by a factor other than the crosstalk signal attributed to the rise and fall of the transmission signal. 
         [0012]    Further, the method according to the aspect of the embodiment may be configured to further include: setting an initial value to the reception threshold value making the bit error rate higher than a predetermined bit error rate; detecting the bit error rate while sequentially shifting the reception threshold value from the initial value by a predetermined value; and determining the reception threshold value minimizing the bit error rate as an optimal threshold value. 
         [0013]    According to the method, irrespective of the phase of the transmission signal, the data reception can be performed in a state of the lowest bit error rate. 
         [0014]    Further, the method according to the aspect of the embodiment may be configured to further include: setting an initial threshold value to the reception threshold value making the bit error rate higher than a predetermined allowable bit error rate; detecting the bit error rate while sequentially shifting the reception threshold value from the initial threshold value by a predetermined interval; and determining, as an optimal threshold value, the value obtained by multiplying by a predetermined correction coefficient the reception threshold value making the bit error rate first fall below the predetermined allowable bit error rate. 
         [0015]    According to the method, it is possible to minimize the number of measurements of the bit error rate, and thus to effectively obtain the optimal threshold value. 
         [0016]    According to the embodiment, it is possible to prevent the influence of the crosstalk from the transmission part on the reception part, and thus to improve the reception characteristic. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0017]      FIG. 1  illustrates a configuration example of a device incorporating therein a data transmission and reception apparatus according to an embodiment; 
           [0018]      FIG. 2  illustrates a configuration example of the data transmission and reception apparatus according to the embodiment; 
           [0019]      FIG. 3  is the first conceptual diagram illustrating the influence of a crosstalk from a transmission part on a reception part; 
           [0020]      FIG. 4  is the second conceptual diagram illustrating the influence of the crosstalk from the transmission part on the reception part; 
           [0021]      FIG. 5  illustrates the first display example of the eye pattern of a reception signal; 
           [0022]      FIG. 6  illustrates the second display example of the eye pattern of the reception signal; 
           [0023]      FIG. 7  illustrates the third display example of the eye pattern of the reception signal; 
           [0024]      FIG. 8  is a conceptual diagram illustrating a method of obtaining an optimal threshold value of the reception signal according to the embodiment; 
           [0025]      FIG. 9  is the first flowchart illustrating a method of adjusting a reception threshold value according to the embodiment; 
           [0026]      FIG. 10  is the second flowchart illustrating the method of adjusting the reception threshold value according to the embodiment; 
           [0027]      FIG. 11  is the third flowchart illustrating the method of adjusting the reception threshold value according to the embodiment; 
           [0028]      FIG. 12  is the fourth flowchart illustrating the method of adjusting the reception threshold value according to the embodiment; 
           [0029]      FIG. 13  is the fifth flowchart illustrating the method of adjusting the reception threshold value according to the embodiment; 
           [0030]      FIG. 14  is the sixth flowchart illustrating the method of adjusting the reception threshold value according to the embodiment; and 
           [0031]      FIG. 15  is the seventh flowchart illustrating the method of adjusting the reception threshold value according to the embodiment. 
       
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0032]      FIG. 1  illustrates a configuration example of a device incorporating therein a data transmission and reception module according to an embodiment. In the configuration example illustrated herein, an XFP pluggable module is used as a typical data transmission and reception module. A device  1  is a communication device incorporating therein the data transmission and reception module according to the embodiment. Meanwhile, a device  2  is a communication device having a data transmitting and receiving function, and may be either one of a device using a conventional technique and a device applied with the embodiment. 
         [0033]    Via a data transmission and reception module  100  according to the embodiment, the device  1  communicates with the device  2 , which is the communication partner of the device  1 . Further, in the device  1 , a circuit  200  fulfills the function of the device  1  by exchanging data with the device  2  via the data transmission and reception module  100 . In the example of  FIG. 1 , the data transmission and reception module  100  according to the embodiment includes a reception part  10 , a control part  20 , a transmission part  30 , and a clock extraction part  40 . 
         [0034]    The reception part  10  receives a data signal from the device  2 , which is the communication partner of the device  1 , and transfers the received data signal to the clock extraction part  40 . 
         [0035]    On the basis of an instruction sent from the control part  20 , the clock extraction part  40  performs a switching control of switching between a test mode and an active mode. In the active mode, the clock extraction part  40  outputs a reception signal output from the reception part  10  to the circuit  200  of the device  1  via a communication interface  102 , and outputs a transmission signal output from the circuit  200  to the transmission part  30 . Meanwhile, in the test mode, the clock extraction part  40  performs bit determination while comparing the reception signal output from the reception part  10  with a predetermined reception threshold value, and demodulates the reception signal into a digital signal. Then, the clock extraction part  40  extracts clock information from the reception signal and regenerates a clock. Thereafter, on the basis of the regenerated clock, the clock extraction part  40  generates a transmission signal of a predetermined pattern, performs phase adjustment of the transmission signal, and then outputs the transmission signal to the transmission part  30 . In the test mode, the communication with the circuit  200  is performed in a shutdown state entered by a changeover switch. The adjustment of the reception threshold value according to the embodiment is performed in the test mode, and the test mode is switched to the active mode when an optimal threshold value obtained after the adjustment has been set in the clock extraction part  40 . The reception signal of normal operation data is demodulated by the bit determination based on the optimal threshold value, and is transferred to the circuit  200 . The adjustment of the reception threshold value is performed while the bit error rate of the reception signal is detected. 
         [0036]    The control part  20  performs a variety of controls on the reception part  10 , the transmission part  30 , and the clock extraction part  40 . Details of the controls will be later described with reference to  FIG. 2 . 
         [0037]    On the basis of an instruction sent from the control part  20 , the transmission part  30  sets the output power of the transmission signal transferred from the clock extraction part  40 . Then, via a communication interface  101 , the transmission part  30  transmits the transmission signal to the device  2  connected thereto. 
         [0038]    In the device  1  applied with the above-described data transmission and reception module according to the embodiment, only one data transmission and reception module is typically illustrated for the convenience of explanation. However, the device  1  is not limited to the above configuration, and may include an arbitrary number of data transmission and reception modules. Therefore, the number of the device  2 , which is the communication partner of the device  1 , is also arbitrary, not limited to one. Further, the circuit  200  is provided depending on the function fulfilled by the device  1 . The configuration of the circuit  200  does not affect the nature of the embodiment. Thus, detailed description thereof will be omitted. 
         [0039]      FIG. 2  illustrates a configuration example of the data transmission and reception module according to the embodiment. 
         [0040]    As illustrated in the configuration example of the device in the foregoing  FIG. 1 , the data transmission and reception module  100  according to the embodiment includes the reception part  10 , the control part  20 , the transmission part  30 , and the clock extraction part  40 . 
         [0041]    Control signals transferred between the control part  20  and the reception part  10 , the transmission part  30 , and the clock extraction part  40  are indicated by dotted arrows. 
         [0042]    The clock extraction part  40  may be configured to include, for example, a threshold value adjusting part  41 , a signal monitoring part  42 , a clock regenerating part  43 , a signal generating part  44 , and a phase varying part  45 . 
         [0043]    The threshold value adjusting part  41  stores, as the reception threshold value, a bit determination threshold value constituting the reference value in the bit determination of the reception signal transferred from the reception part  10 . On the basis of an instruction of a control signal  92  sent from the control part  20 , the threshold value adjusting part  41  changes the reception threshold value. Then, on the basis of the changed threshold value, the threshold value adjusting part  41  performs the bit determination of the reception signal and digital-demodulates the reception signal. 
         [0044]    The signal monitoring part  42  monitors the bit error rate of the reception signal, and notifies the control part  20  of the result of the monitoring through a control signal  93 . 
         [0045]    The clock regenerating part  43  extracts clock information included in the reception signal transferred from the threshold value adjusting part  41 , and regenerates a clock. 
         [0046]    In synchronization with the clock regenerated in the clock regenerating part  43 , the signal generating part  44  generates a signal pattern instructed by the control part  20  through a control signal  94 , such as a PN (Pseudo Noise) pattern, for example. In this process, the control to start and stop the generation of the signal pattern is also performed through the control signal  94  sent from the control part  20 . 
         [0047]    On the basis of a value notified by the control part  20  through a control signal  95 , the phase varying part  45  adjusts the phase of the signal generated in the signal generating part  44 . In a 10 Gbit/s data transmission and reception module, for example, the phase varying part  45  performs such adjustment as shifting the phase in picoseconds (10-12 seconds). 
         [0048]    The reception part  10  is for performing reception processing of the data signal transmitted from the device  2 , which is the communication partner of the device  1 , via the communication interface  101 . If the data signal is an optical signal, for example, the reception part  10  converts the optical signal into an electrical signal, and transfers the converted signal to the threshold value adjusting part  41 . If the module uses an APD, for example, the module may be configured such that a voltage value which should be maintained is instructed to the reception part  10  by the control part  20  through a control signal  91  in the above process. 
         [0049]    Via the communication interface  101 , the transmission part  30  transmits the transmission signal, which has been generated in the signal generating part  44  and phase-adjusted by the phase varying part  45 , to the device  2 , which is the communication partner of the device  1 . The module may be configured such that the power value of the transmission output, for example, is instructed to the transmission part  30  in the above process through a control signal  96  sent from the control part  20 . 
         [0050]    On the basis of an instruction sent from a not-illustrated circuit managing and controlling the entirety of the device  1 , for example, the control part  20  performs the switching control of the operation mode by switching changeover switches  46  and  47  of the clock extraction part  40  through a control signal  97 . That is, to set in the test mode, the control part  20  switches the changeover switch  46  to transfer the reception signal output from the clock regenerating part  43  to the signal generating part  44 , and switches the changeover switch  47  to output the transmission signal output from the phase varying part  45  to the transmission part  30 . In the test mode, therefore, the communication interface  102  with the circuit  200  of the device  1  is cut off. Meanwhile, to set in the active mode, the control part  20  switches the changeover switch  46  to output the reception signal output from the clock regenerating part  43  to the circuit  200  of the device  1  via the communication interface  102 , and switches the changeover switch  47  to output the transmission signal output from the circuit  200  of the device  1  to the transmission part  30 .  FIG. 2  illustrates an example in which the changeover switches  46  and  47  are in the test mode. 
         [0051]    To adjust the reception threshold value, the control part  20  first sets the clock extraction part  40  in the test mode. Then, the control part  20  sets a predetermined threshold value in the threshold value adjusting part  41  to regenerate the clock from the reception signal and generate a signal of a predetermined pattern. The control part  20  then outputs the generated signal while adjusting the phase of the signal. Then, the control part  20  locates a phase of the transmission signal at which the error state notified by the signal monitoring part  42  is the worst, i.e., the bit error rate detected by the signal monitoring part  42  is maximized, and determines the located phase as the worst phase. Then, in the state of the located worst phase, the control part  20  adjusts the reception threshold value set in the threshold value adjusting part  41 . Thereby, the control part  20  obtains a threshold value minimizing the bit error rate, and determines the obtained threshold value as the optimal threshold value. Then, the control part  20  sets the obtained optimal threshold value in the threshold value adjusting part  41  as the final reception threshold value. Thereafter, the control part  20  switches the changeover switches  46  and  47  of the clock extraction part  40  to set the operation mode to the active mode. Accordingly, the circuit  200  of the device  1  can receive the reception signal from the data transmission and reception module  100 , with the influence of the crosstalk from the transmission part  30  on the reception part  10  minimized. 
         [0052]      FIG. 3  is the first conceptual diagram illustrating the influence of the crosstalk from the transmission part on the reception part. The diagram illustrates a transmission signal  71 , a crosstalk signal  72  attributed to the transmission signal  71 , and a reception signal  73  deteriorated by the crosstalk signal  72 , with the signals associated with one another on the same time axis. In the example illustrated herein, rise and fall timing  51  of the transmission signal  71  coincides with bit determination timing  52  of the reception signal  73 . For the convenience of explanation, the present example illustrates a signal pattern in which the amplitude of the transmission signal  71  and the reception signal  73  repeats the ON/OFF cycle for every 1-bit pulse. 
         [0053]    Generally, the magnitude of the crosstalk attributed to the transmission signal  71  tends to be maximized at the rise and fall timing of the signal (i.e., at portions  81  of  FIG. 3 ). Thus, the amplitude of the crosstalk signal  72  attributed to the transmission signal  71  is increased in synchronization with the rise and fall of the transmission signal  71  (as in portions  82  of  FIG. 3 , for example). In the reception part  10  provided in proximity to the transmission part  30 , therefore, the reception signal  73  tends to be deteriorated at the rise and fall timing of the transmission signal  71  (as in portions  83   a  of  FIG. 3 , for example). 
         [0054]    In the example of  FIG. 3 , in which the rise and fall timing  51  of the transmission signal  71  coincides with the bit determination timing  52  of the reception signal  73 , portions near the bit determination timing  52  of the reception signal  73  (i.e., central portions of respective bit signal pulses) are deteriorated. If the reception threshold value, i.e., the bit determination threshold value is not appropriately set, as in a case in which a threshold value  63  shown in  FIG. 3  is used as the reception threshold value, for example, the bit determination is not correctly performed. As a result, the bit error rate is increased. 
         [0055]    However, if the reception threshold value is set to a value between threshold values  61  and  62 , for example, the bit determination is correctly performed. Accordingly, the bit error rate can be suppressed to a small value. 
         [0056]      FIG. 3  described above illustrates an example in which the amplitude of the crosstalk signal  72  is maximized at the rise and fall timing of the transmission signal  71 . In this case, the bit error rate is expected to be maximized by having the rise and fall timing of the transmission signal  71  coincide with the central portion of each of the bit signal pulses of the reception signal  73 . However, the timing at which the amplitude of the crosstalk signal  72  is maximized may not necessarily coincide with and may be deviated from the rise and fall timing of the transmission signal  71 , depending on the structure or the use environment of the data transmission and reception module. Further, the crosstalk may be generated by the influence of a factor other than the rise and fall of the transmission signal  71 . According to the embodiment, therefore, the phase of the transmission signal  71  is adjusted while the bit error rate of the reception signal  73  is monitored, to thereby locate the worst phase of the transmission signal  71  maximizing the bit error rate. Thereby, the worst phase of the transmission signal  71  can be accurately located irrespective of the factors responsible for the occurrence of the crosstalk. 
         [0057]      FIG. 4  is the second conceptual diagram illustrating the influence of the crosstalk from the transmission part on the reception part. The diagram illustrates an example in which the rise and fall timing  51  of the transmission signal  71  does not coincide with the bit determination timing  52  of the reception signal  73 . In this case, the distance of the bit determination timing  52  from the rise and fall timing  51  of the transmission signal  71  is the greatest. Thus, the influence of the crosstalk signal  72  is assumed to be the smallest. 
         [0058]    That is, the amplitude of the crosstalk signal  72  attributed to the transmission signal  71  is increased at the rise and fall timing  51  of the reception signal  73  (as in the portions  82  of  FIG. 4 , for example). Thus, rising and falling portions of the reception signal  73  (such as portions  83   b  of  FIG. 4 , for example) are deteriorated. However, the bit determination timing  52  of the reception signal  73 , i.e., the central portions of the bit signal pulses are deviated in timing from the amplitude-increased portions  82  of the crosstalk signal  72 . Thus, the influence of the crosstalk signal  72  is small. Accordingly, a bit error does not occur even if the bit determination is performed on the basis of the threshold value  63 , and correct bit determination is performed. 
         [0059]    As illustrated in  FIGS. 3 and 4  described above, even with the use of the same threshold value  63  as the reception threshold value, the incidence ratio of bit determination errors changes due to the phase relationship between the transmission signal  71  and the reception signal  73 . That is, the bit error is expected to occur infrequently when the rise and fall timing  51  of the transmission signal  71  is close to the rise and fall timing of the reception signal  73 . Meanwhile, the bit error is expected to occur frequently when the rise and fall timing  51  of the transmission signal  71  is close to the central portion of each of the bit signal pulses of the reception signal  73 , i.e., the bit determination timing  52 . 
         [0060]      FIG. 5  illustrates the first display example of the eye pattern of the reception signal, in which the crosstalk hardly occurs and the bit error rate is low. The horizontal axis and the vertical axis represent the phase and the amplitude of the reception signal, respectively. 
         [0061]    The reference numeral  53  indicates a mask area. If the mask area  53  includes the intersection point  52   a  of the bit determination timing (phase)  52  and the reception threshold value  60 , it is understood that the bit determination of the reception signal  73  is correctly performed. 
         [0062]      FIG. 6  illustrates the second display example of the eye pattern of the reception signal, in which the bit error rate is expected to be maximized. The eye pattern is shown in association with the phase of the transmission signal. 
         [0063]    In a method of adjusting the reception threshold value according to the embodiment, the threshold value  63 , with which the occurrence of the bit error is expected, is first set as a predetermined reception threshold value. In this state, the rise and fall timing (phase)  51  of the transmission signal  71  is sequentially shifted at a predetermined interval, and the phase maximizing the bit error rate is determined as the worst phase of the transmission signal  71 . The example of  FIG. 6  indicates that the phase becomes the worst when the rise and fall phase  51  of the transmission signal  71  is located in the proximity of the center of the bit signal pulse of the reception signal  73 . This is because, as illustrated in the foregoing  FIG. 3 , the amplitude of the crosstalk signal  72  is increased at the rise and fall timing  51  of the transmission signal  71 , and the occurrence probability of the bit error is the highest when the rise and fall timing  51  overlaps with the bit determination timing  52  of the reception signal  73 . This is also observed from the display example of the eye pattern of the reception signal  73  in  FIG. 6 , in which the eye pattern is the narrowest in the central portion of the bit signal pulse due to the distorted portions  83   a  caused by the influence of the crosstalk signal  72 . The distorted portions  83   a  of the reception signal  73  intrude into mask area  53  to reduce the area in which the bit determination is correctly performed. That is, it is understood that, to correctly perform the bit determination, the reception threshold value (the bit determination threshold value) should be set to a value between the threshold values  61  and  62 , which is unaffected by the crosstalk signal  72  even at the worst phase  51  shown in  FIG. 6 . 
         [0064]    As described above, according to the embodiment, the bit error rate is monitored while the phase of the transmission signal is shifted by a predetermined value in the state in which the reception threshold value is fixed to a predetermined value, so that the phase maximizing the bit error rate is located as the worst phase. Accordingly, the worst phase can be accurately located, even if the crosstalk signal attributed to the rise and fall of the transmission signal is deviated from the rise and fall timing of the transmission signal, or if there is a crosstalk caused by a factor other than the crosstalk signal attributed to the rise and fall of the transmission signal. 
         [0065]      FIG. 7  illustrates the third display example of the eye pattern of the reception signal, in which the bit error rate is expected to be minimized. The eye pattern is shown in association with the phase of the transmission signal. 
         [0066]    In the present case, as illustrated in the foregoing  FIG. 4 , the rise and fall phase  51  of the transmission signal  71  substantially coincides with the rise and fall phase of the bit signal pulses of the reception signal  73 . Further, the deterioration of the reception signal  73  due to the crosstalk signal  72  occurring at the timing of the rise and fall phase  51  of the transmission signal  71  occurs in the rising and falling portions  83   b  of the bit signal pulses. Thus, the mask area  53  of the eye pattern of the reception signal  73  is not intruded. In the bit determination timing  52 , therefore, the influence of the crosstalk signal  72  is small, and correct bit determination can be performed. 
         [0067]    As described above, the influence of the crosstalk signal  72  from the transmission part on the reception signal  73  can be prevented by appropriately adjusting the phase of the transmission signal  71 . In the active mode, however, the transmission data is transferred from the circuit  200  not in synchronization with the reception data. It is therefore difficult to adjust the phase of the transmission signal  71 . However, as described above, if the optimal threshold value minimizing the bit error rate at the worst phase of the transmission signal  71  is obtained and set as the reception threshold value in the test mode, and if the test mode is thereafter switched to the active mode, a signal can be also received in the active mode in the state in which the influence of the crosstalk is small irrespective of the phase of the transmission signal  71 . 
         [0068]      FIG. 8  is a conceptual diagram illustrating a method of obtaining the optimal threshold value of the reception signal. 
         [0069]    In the example illustrated herein, the bit error rate is measured with a predetermined measurement interval, which is a value dividing the maximum amplitude of the reception signal into ten equal segments with threshold values T 1  to T 9 . 
         [0070]    As illustrated in the second display example of the eye pattern of the reception signal in the foregoing  FIG. 6 , the optimal threshold value of the reception signal in the state of the worst phase can be selected as a value between the threshold values  61  and  62 . 
         [0071]    The selection of the optimal threshold value from the values between the threshold values  61  and  62  can be performed by one of the following methods, for example. 
         [0072]    (1) The bit error rate is measured while the reception threshold value is shifted by a predetermined interval in a stepwise manner, with the initial value set to a value with which the bit error is expected to occur (e.g., T 1 ). Then, the threshold value minimizing the bit error rate is determined as the optimal threshold value. 
         [0073]    (2) The initial value of the reception threshold value is set to a sufficiently small or large threshold value with which the bit error is expected to occur (e.g., T 1  or T 9 ), and the set value of the reception threshold value is increased or decreased by a predetermined value. Then, the reception threshold value with which the bit error rate first falls below a predetermined allowable bit error rate, e.g., 10 −9  (e.g., T 4  or T 6 ) is multiplied by a predetermined coefficient, and the resultant value is determined as the optimal threshold value. 
         [0074]    (3) The first initial value of the reception threshold value is set to a sufficiently small threshold value with which the bit error is expected to occur (e.g., T 1 ). Then, the set value of the reception threshold value is increased by a predetermined value, and the reception threshold value with which the bit error rate first falls below a predetermined allowable bit error rate, e.g., 10 −9  (e.g., T 4 ) is determined as the first threshold value. Meanwhile, the second initial value of the reception threshold value is set to a sufficiently large threshold value with which the bit error is expected to occur (e.g., T 9 ). Then, the set value of the reception threshold value is decreased by a predetermined value, and the reception threshold value with which the bit error rate first falls below a predetermined allowable bit error rate, e.g., 10 −9  (e.g., T 6 ) is determined as the second threshold value. Then, the intermediate value between the first and second threshold values (e.g., T 5 ) is determined as the optimal threshold value. 
         [0075]      FIG. 9  is the first flowchart illustrating a method of adjusting the reception threshold value according to the embodiment. 
         [0076]    At Step S 1000 , the operation mode of the data transmission and reception module is set to the test mode. 
         [0077]    At Step S 2000 , the reception threshold value is set to a predetermined initial threshold value. The initial threshold value may be set to, for example, a sufficiently small threshold value with which the bit error is expected to occur (e.g., the threshold value  63  shown in the display example of the eye pattern in the foregoing  FIG. 6 ). 
         [0078]    At Step S 3000 , the bit error rate is measured at the predetermined reception threshold value set at the Step S 2000 , while the phase of the transmission signal is shifted by a predetermined value in a stepwise manner. Then, the phase maximizing the bit error rate is located and determined as the worst phase. Details of the present step will be later described with reference to  FIG. 10 . 
         [0079]    At Step S 4000 , the reception threshold value minimizing the bit error rate in the state of the worst phase located at the Step S 3000  is obtained and determined as the optimal threshold value. Details of the present step will be later described with reference to  FIG. 11 . 
         [0080]    At Step S 5000 , the optimal threshold value obtained at the Step S 4000  is set as the reception threshold value, and the mode is shifted to the active mode. 
         [0081]      FIG. 10  is the second flowchart illustrating the method of adjusting the reception threshold value according to the embodiment. The flowchart illustrates the details of the Step S 3000  described in the flowchart of the foregoing  FIG. 9 . 
         [0082]    At Step S 3100 , the initial phase of the transmission signal is set, and information of the set phase is stored in a phase storing area which is provided, for example, in the control part  20  of  FIG. 2 . The initial phase may be set to, for example, the same phase as the phase of the reception signal. 
         [0083]    At Step S 3200 , the bit error rate at the initial phase is measured and stored in an error storing area which is provided, for example, in the control part  20  of  FIG. 2 . 
         [0084]    At Step S 3300 , the bit error rate is measured, with the phase of the transmission signal shifted by a predetermined value. 
         [0085]    At Step S 3400 , it is determined whether or not the currently measured bit error rate is higher than the bit error rate stored in the error storing area. If the currently measured bit error rate is higher than the stored bit error rate (YES), the procedure shifts to the next Step S 3500 . If the currently measured bit error rate is not higher than the stored bit error rate (NO), the procedure shifts to Step S 3600 . 
         [0086]    At Step S 3500 , the current phase of the transmission signal and the measured bit error rate are stored in the phase storing area and the error storing area, respectively. 
         [0087]    At Step S 3600 , it is determined whether or not the measurement of the bit error rate has been completed at all measurement points. If the measurement has been completed (YES), the procedure shifts to the next Step S 3700 . If the measurement has not been completed (NO), the procedure returns to the Step S 3300  to perform the next measurement. 
         [0088]    At Step S 3700 , the phase information stored in the phase storing area is determined as the worst phase. 
         [0089]    As described above, the bit error rate is measured while the phase of the transmission signal is shifted by a predetermined value, and the phase maximizing the bit error rate is determined as the worst phase of the transmission signal. Thereby, the worst phase can be accurately located, even if the timing maximizing the crosstalk signal from the transmission part is deviated from the rise and fall timing of the transmission signal due to some sort of environmental condition and so forth. 
         [0090]      FIG. 11  is the third flowchart illustrating the method of adjusting the reception threshold value according to the embodiment. The flowchart illustrates a first embodiment for achieving the Step S 4000  described in the flowchart of the foregoing  FIG. 9 . 
         [0091]    At Step S 4110 , the initial threshold value is set for the reception threshold value, and the set initial threshold value is stored in a threshold value storing area which is provided, for example, in the control part  20  of  FIG. 2 . The initial threshold value may be set to, for example, a sufficiently small or large threshold value with which the bit error is expected to occur. 
         [0092]    At Step S 4120 , the bit error rate is measured, and the measured bit error rate is stored in the error storing area. 
         [0093]    At Step S 4130 , a value shifted from the currently set reception threshold value by a predetermined interval is set in the threshold value adjusting part as a new threshold value, and the bit error rate is measured. In this step, if a sufficiently small threshold value has been set as the initial threshold value at the Step S 4110 , the reception threshold value is shifted by a predetermined interval in the increasing direction. Meanwhile, if a sufficiently large threshold value has been set as the initial threshold value at the Step S 4110 , the reception threshold value is shifted by a predetermined interval in the decreasing direction. 
         [0094]    At Step S 4140 , it is determined whether or not the currently measured bit error rate is smaller than the bit error rate stored in the error storing area. If the currently measured bit error rate is smaller than the stored bit error rate (YES), the procedure shifts to the next Step S 4150 . If the currently measured bit error rate is not smaller than the stored bit error rate (NO), the procedure shifts to Step S 4160 . 
         [0095]    At Step S 4150 , the threshold value set in the threshold value adjusting part and the currently measured bit error rate are stored in the threshold value storing area and the error storing area, respectively. 
         [0096]    At Step S 4160 , it is determined whether or not the measurement of the bit error rate has been completed at all measurement points. If the measurement has been completed (YES), the procedure shifts to the next Step S 4170 . If the measurement has not yet been completed (NO), the procedure returns to the Step S 4130  to perform the next measurement. 
         [0097]    At Step S 4170 , the reception threshold value stored in the threshold value storing area is determined as the optimal threshold value. 
         [0098]    In the above-described method, the bit error rate is measured over the entire amplitude of the reception signal. Then, the threshold value with which the bit error rate is the lowest within the error range of the comparison and determination operation of the bit error rate performed at the Step S 4140  is selected as the optimal threshold value. In this case, the value of the threshold value  61  or  62  shown in the foregoing  FIG. 8 , which constitutes a boundary across which the deterioration of the reception signal occurs due to the influence of the crosstalk, is not necessarily specified. Instead, the threshold value with which the bit error rate is the lowest within the entire amplitude of the reception signal serves as the optimal threshold value. Therefore, the optimal threshold value may be close to the threshold value  61  or  62 , or may be in an intermediate area between the threshold values  61  and  62 . 
         [0099]      FIG. 12  is the fourth flowchart illustrating the method of adjusting the reception threshold value according to the embodiment. The flowchart illustrates a second embodiment for achieving the Step S 4000  described in the flowchart of the foregoing  FIG. 9 . 
         [0100]    At Step S 4210 , the initial threshold value is set for the reception threshold value, and the set initial threshold value is stored in the threshold value storing area. The initial threshold value may be set to, for example, a sufficiently small or large threshold value with which the bit error is expected to occur. 
         [0101]    At Step S 4220 , the bit error rate is measured, and the measured bit error rate is stored in the error storage area. 
         [0102]    At Step S 4230 , a value shifted from the currently set reception threshold value by a predetermined interval is set in the threshold value adjusting part as a new threshold value, and the bit error rate is measured. In this step, if a sufficiently small threshold value has been set as the initial threshold value at the Step S 4210 , the reception threshold value is shifted by a predetermined interval in the increasing direction. Meanwhile, if a sufficiently large threshold value has been set as the initial threshold value at the Step S 4210 , the reception threshold value is shifted by a predetermined interval in the decreasing direction. 
         [0103]    At Step S 4240 , it is determined whether or not the currently measured bit error rate is smaller than a predetermined allowable bit error rate. If the currently measured bit error rate is smaller than the predetermined allowable bit error rate (YES), the procedure shifts to the next Step S 4250 . If the currently measured bit error rate is not smaller than the predetermined allowable bit error rate (NO), the procedure shifts to Step S 4260 . 
         [0104]    At Step S 4250 , the threshold value set in the threshold value adjusting part and the currently measured bit error rate are stored in the threshold value storing area and the error storing area, respectively. 
         [0105]    At Step S 4260 , it is determined whether or not the measurement of the bit error rate has been completed at all measurement points. If the measurement has been completed (YES), the procedure shifts to the next Step S 4270 . If the measurement has not yet been completed (NO), the procedure returns to the Step S 4230  to perform the next measurement. 
         [0106]    At Step S 4270 , a value obtained by multiplying the threshold value stored in the threshold value storage area by a predetermined correction coefficient is determined as the optimal threshold value. The correction coefficient is a value determined by the method of configuring the data transmission and reception module, the environmental condition, and so forth. The correction coefficient may be, for example, a value 10% to 20% greater than the threshold value, i.e., a value approximately between 1.1 and 1.2. Thereby, the optimal threshold value can be set not to a value close to the threshold value  61  or  62  shown in the foregoing  FIG. 6 , which constitutes the boundary across which the bit error occurs, but to a value in the intermediate area between the threshold values  61  and  62 . Accordingly, the occurrence probability of the bit error can be further reduced. 
         [0107]    In the above-described method, it is determined at the Step S 4240  whether or not the measured bit error rate is smaller than the predetermined allowable bit error rate. Therefore, the value of the threshold value  61  or  62  shown in the foregoing  FIG. 8 , which constitutes the boundary across which the deterioration of the reception signal occurs due to the influence of the crosstalk, can be accurately specified. As a result, the optimal threshold value can be appropriately selected from the intermediate area between the threshold values  61  and  62 . Further, the bit error rate does not need to be measured over the entire amplitude of the reception signal by appropriately configuring the determination of measurement completion at the Step  4260  of  FIG. 12 . Accordingly, the optimal threshold value can be effectively obtained. 
         [0108]      FIG. 13  is the fifth flowchart illustrating the method of adjusting the reception threshold value according to the embodiment. The flowchart illustrates a third embodiment for achieving the Step S 4000  described in the flowchart of the foregoing  FIG. 9 . 
         [0109]    At Step S 4310 , the initial threshold value is set to a sufficiently small threshold value with which the bit error is expected to occur, and the first threshold value (a value approximating the threshold value  61  of the foregoing  FIG. 8 , e.g., T 4 ) is obtained. Details of the present step will be later described with reference to  FIG. 14 . 
         [0110]    At Step S 4320 , the initial threshold value is set to a sufficiently large threshold value with which the bit error is expected to occur, and the second threshold value (a value approximating the threshold value  62  of the foregoing  FIG. 8 , e.g., T 6 ) is obtained. Details of the present step will be later described with reference to  FIG. 15 . 
         [0111]    At Step S 4330 , the intermediate value between the first and second threshold values obtained at the Steps S 4310  and S 4320  (T 5  in the example of  FIG. 8 ) is determined as the optimal threshold value. 
         [0112]    Accordingly, as illustrated in the foregoing  FIG. 8 , it is possible to obtain, as the optimal threshold value, the threshold value least subject to the influence of the distortion in the waveform of the reception signal  73  caused by the crosstalk. 
         [0113]      FIG. 14  is the sixth flowchart illustrating the method of adjusting the reception threshold value according to the embodiment. The flowchart illustrates the details of the Step S 4310  described in the flowchart of the foregoing  FIG. 13 . 
         [0114]    At Step S 4311 , the initial threshold value is set for the reception threshold value, and the set initial threshold value is stored in the threshold value storing area. The initial threshold value may be set to a sufficiently small threshold value with which the bit error is expected to occur (e.g., T 1  of  FIG. 8 ). 
         [0115]    At Step S 4312 , the bit error rate is measured, and the measured bit error rate is stored in the error storing area. 
         [0116]    At Step S 4313 , a value increased from the currently set reception threshold value by a predetermined interval is set in the threshold value adjusting part as a new threshold value, and the bit error rate is measured. 
         [0117]    At Step S 4314 , it is determined whether or not the currently measured bit error rate is smaller than a predetermined allowable bit error rate. If the currently measured bit error rate is smaller than the predetermined allowable bit error rate (YES), the procedure shifts to the next Step S 4315 . If the currently measured bit error rate is not smaller than the predetermined allowable bit error rate (NO), the procedure shifts to Step S 4316 . 
         [0118]    At Step S 4315 , the threshold value set in the threshold value adjusting part and the currently measured bit error rate are stored in the threshold value storing area and the error storing area, respectively. 
         [0119]    At Step S 4316 , it is determined whether or not the measurement of the bit error rate has been completed at all measurement points. If the measurement has been completed (YES), the procedure shifts to the next Step S 4317 . If the measurement has not yet been completed (NO), the procedure returns to the Step S 4313  to perform the next measurement. 
         [0120]    At Step S 4317 , the threshold value stored in the threshold value storing area is determined as the first threshold value. 
         [0121]      FIG. 15  is the seventh flowchart illustrating the method of adjusting the reception threshold value according to the embodiment. The flowchart illustrates the details of the Step S 4320  described in the flowchart of the foregoing  FIG. 13 . 
         [0122]    At Step S 4321 , the initial threshold value is set for the reception threshold value, and the set initial threshold value is stored in the threshold value storing area. The initial threshold value may be set to a sufficiently large threshold value with which the bit error is expected to occur (e.g., T 9  of  FIG. 8 ). 
         [0123]    At Step S 4322 , the bit error rate is measured, and the measured bit error rate is stored in the error storing area. 
         [0124]    At Step S 4323 , a value decreased from the currently set reception threshold value by a predetermined interval is set in the threshold value adjusting part as a new threshold value, and the bit error rate is measured. 
         [0125]    At Step S 4324 , it is determined whether or not the currently measured bit error rate is smaller than a predetermined allowable bit error rate. If the currently measured bit error rate is smaller than the predetermined allowable bit error rate (YES), the procedure shifts to the next Step S 4325 . If the currently measured bit error rate is not smaller than the predetermined allowable bit error rate (NO), the procedure shifts to Step S 4326 . 
         [0126]    At Step S 4325 , the threshold value set in the threshold value adjusting part and the currently measured bit error rate are stored in the threshold value storing area and the error storing area, respectively. 
         [0127]    At Step S 4326 , it is determined whether or not the measurement of the bit error rate has been completed at all measurement points. If the measurement has been completed (YES), the procedure shifts to the next Step S 4327 . If the measurement has not yet been completed (NO), the procedure returns to the Step S 4323  to perform the next measurement. 
         [0128]    At Step S 4327 , the threshold value stored in the threshold value storage area is determined as the second threshold value. 
         [0129]    Each of the first to seventh flowcharts illustrating the method of adjusting the reception threshold value according to the embodiment presents one example, and the processing flowchart can be modified in various ways. The modification, however, does not affect the nature of the embodiment.