Abstract:
A system for processing errors in a processor comprising, a first register having a unique identifier operative to store a first error data, a processor operative to retrieve the first error data from the first register, associate the first error data with the unique identifier, and generate a first uniform error packet including the first error data and the unique identifier and a storage medium operative to store the first uniform error packet.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    This invention relates generally to processing error information, and more particularly to saving, extracting, and compiling error information in a computer system. 
         [0002]    Microprocessor systems often capture error information in fault isolation registers and trap registers. Using software code specifically tailored to find specific errors in the registers allows operators to compile and analyze errors. 
         [0003]    It would be desirable that a system and method allow operators to easily retrieve and compile errors for processing. 
       BRIEF SUMMARY OF THE INVENTION 
       [0004]    An exemplary embodiment includes a system for processing errors in a processor comprising, a first register having a unique identifier operative to store a first error data, a processor operative to retrieve the first error data from the first register, associate the first error data with the unique identifier, and generate a first uniform error packet including the first error data and the unique identifier and a storage medium operative to store the first uniform error packet. 
         [0005]    An exemplary method includes a method for analyzing processor error data comprising, determining if an error has occurred in a processor, retrieving a first error data stored in a first register, associating the first error data stored in the first register with a unique identifier of the first register, and saving the first error data with the unique identifier of the first register. 
         [0006]    An exemplary embodiment of a computer program product for providing real-time recommendations, the computer program product comprising, a computer-readable storage medium for storing instructions for executing a real-time recommendation service, the real-time recommendation service comprising a method of, determining if an error has occurred in a processor, retrieving a first error data stored in a first register, associating the first error data stored in the first register with a unique identifier of the first register, and saving the first error data with the unique identifier of the first register. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]    Referring now to the drawings wherein like elements are numbered alike in the several FIGURES: 
           [0008]      FIGS. 1   a  and  1   b  illustrate an exemplary embodiment of a processor system. 
           [0009]      FIGS. 2   a  and  2   b  illustrate an exemplary embodiment of method for error detection in a microprocessor system. 
       
    
    
     DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS 
       [0010]    An exemplary embodiment of the present invention provides improved error detection and analysis in a processor. 
         [0011]    Processors often include registers such as, for example, fault isolation registers and trap registers that are used to save fault data from the processor. When faults are detected, they may be analyzed by retrieving the fault data from the fault isolation registers. The fault data is often retrieved by writing code that specifically finds fault data in registers associated with a particular error. This method is cumbersome because the fault registers are not identified by a uniform system that allows code to be easily adapted to access data for a given error. Additionally, once the fault data is retrieved from a fault isolation register, the fault isolation register is reset. Though the data is useful for analyzing a given error, if the data in the fault isolation register also contains data associated with mother error, the data for that other error may be lost, resulting in inefficient error analysis for the unknown error. It is desirable for a method and system that allows simple access to error data in fault isolation registers, and allows the error data in the registers to be easily archived for later error analysis. 
         [0012]    In this regard, an exemplary embodiment of a system  100  for error analysis is illustrated in  FIG. 1   a - 1   b.  Referring to  FIG. 1   a,  System  100  includes a processor  102  having a global fault isolation register  109 , local fault isolation registers  106 , trap registers  108 , access hardware  110  and host firmware  112 . In operation, error data  104  are sent to the local fault isolation registers  106  that store failure indications and the trap registers  108  that store detailed error data. The local fault isolation registers  106  indicate the error condition to the global isolation register  109  that summarizes die status of the local fault isolation registers  106 . The access hardware  110  is used to access the error data on the registers and can reset the registers once the error data is received. The access hardware  110  is controlled by the host firmware  112 . 
         [0013]    The global fault isolation register  109 , the fault isolation registers  106 , and the trap registers  108  have unique identifiers that identify each register in the system  100 . The unique identifiers may be based, for example, on a hierarchical or linear identification system depending on the design of the processor  102 . The use of unique identifiers allows the host firmware  112  to be easily directed to retrieve error data from the registers. 
         [0014]    One method of retrieving error data from the registers is to use a serial interface to stream data out of the machine. Another method is to use a parallel protocol to access the registers via a local bus. The host firmware  112  is used to compile LEM, GEM, and trap register information and output a Uniform Error Packet (UEP)  114 . The UEPs may also contain a time that the error data was retrieved from the registers, assisting in archiving the error data and in later analysis. 
         [0015]    The UEPs are sent to maintenance firmware  116  (shown in  FIG. 1   b ). The maintenance firmware compiles the UEPs into a uniform error summary  118  that may, for example, be a data file. Auxiliary maintenance firmware  120  is used to direct the processor  102  to send error data for the uniform error summaries to an error database  124  via a communicative link  122 . An error database processing program  126  may be used, for example, on a processing device  128  that may access the error database  124  and analyze the error data in the uniform error summaries  118  saved on the error database  124 . 
         [0016]    In the system  100 , the error database  124  is used to accumulate error data for multiple computer machines. In the case of multiple machines, specific machine characteristics should also be associated with the Uniform Error Summary information  118  for helping to identify where the errors occurred. 
         [0017]      FIGS. 2   a  and  2   b  illustrate a block diagram of an exemplary method (polling routine) for retrieving error data from the registers (of  FIG. 1   a ) and compiling Uniform Error Packets. A polling routine for error data is begun in block  202 . In block  204  a next GEM address and next GEM bit is loaded by the host firmware  112 . The next GEM is read in block  206 . If there is an error bit in the range between the next GEM bit and the end of the GEM that is active as tested in block  208 , the polling routine moves to block  214 . If there are no error bits in the range between the next GEM bit and the end of the GEM that are active as tested in block  208 , the next GEM address is loaded by the host firmware  112  and the next GEM bit is set to zero, as shown in block  210 . In block  212  it is determined whether the next GEM address is the same as the original next GEM address that was loaded prior to the initiation of the polling routine. If the next GEM address is not the same as the original GEM address, the polling routine returns to block  206  to read the next GEM in the list of GEMs. If the next GEM address is the same as the original GEM address, the polling routine determines whether there is an error bit active within the GEM up to the bit just before the original next GEM bit. If yes, the polling routine moves to block  214 . If no, then there is no new Uniform Error Packet to be created and the method continues in  FIG. 2   b.    
         [0018]    In block  214 , the GEM is saved in a uniform error packet (UEP). In block  216 , the first bit that is on is located beginning at the next bit to be checked. The bit position is used to determine a branch to the general error handling in block  218 . The determining a branch may be implemented with a look-up table. Examples may include separate error handling code for interfaces, thresholds, cache errors, recovery events, etc. In the general error handling, the LEMs associated with the detected GEM bit are saved into the UEP. The LEMs are inspected for error bits. If trap registers are available for the detected LEM bits, the trap registers are also read and saved in the UEP. If a threshold counter is being used to count the errors, the threshold counter is updated. The time that the LEMs and trap registers were read is also saved in the UEP, and the LEMs are reset. The uniform error packet is output in block  220 . The method continues in  FIG. 2   b.    
         [0019]    In  FIG. 2   b,  in block  224 , interval timers may be retrieved for the node associated with the polling routine. If the time interval has passed in block  226 , thresholds, such as, for example error thresholds, are cleared in block  227 . Once thresholds are cleared, a setup for a next polling routine call is initiated and the next GEM address and next error bit are updated in block  228 . If the time interval has not passed in block  226 , the method continues to block  228 . In block  230  the routine is returned to the caller, in this case, the polling routine.  6   
         [0020]    The use of UEP having error data, unique identifiers of the registers, and times associated with the data in the UEP to compile Uniform Error Summary files allows error data to be easily accessed archived, and analyzed. The advantages of a uniform system of compiling and archiving error data that uniquely identifies the error data from particular registers greatly increases the efficiency of analyzing error data in the processor  102 . The amount of host firmware code  112  that has to be specifically written is minimized. 
         [0021]    As described above, the embodiments of the invention may be embodied in the form of computer-implemented processes and apparatuses for practicing those processes. Embodiments of the invention may also be embodied in the form of computer program code containing instructions embodied in tangible media, such as floppy diskettes, CD-ROMs, hard drives, or any other computer-readable storage medium, wherein, when the computer program code is loaded into and executed by a computer, the computer becomes an apparatus for practicing the invention. The present invention can also be embodied in the form of computer program code, for example, whether stored in a storage medium, loaded into and/or executed by a computer, or transmitted over some transmission medium, such as over electrical wiring or cabling, through fiber optics, or via electromagnetic radiation, wherein, when the computer program code is loaded into and executed by a computer, the computer becomes an apparatus for practicing the invention. When implemented on a general-purpose microprocessor, the computer program code segments configure the microprocessor to create specific logic circuits. 
         [0022]    While the invention has been described with reference to exemplary embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed as the best mode contemplated for carrying out this invention, but that the invention will include all embodiments falling within the scope of the appended claims. Moreover, the use of the terms first, second, etc. do not denote any order or importance, but rather the terms first, second, etc. are used to distinguish one element from another.