Abstract:
An apparatus for providing both supports including synchronous dynamic random access memory module and the double data rate dynamic random access memory module is provided. A motherboard can support standard synchronous dynamic random access memory and dual data rate dynamic random access memory by using the disable and enable functions of the terminator. The invention reduces manufacturing production waste due to complex fabrication process of memory module. In addition, the trouble of upgrading the computer by consumer can be eliminated.

Description:
CROSS-REFERENCE TO RELATED APPLICATION  
       [0001]    This application claims the priority benefit of U.S. provisional application serial no. 60/237,532, filed on Oct. 4, 2000 and Taiwan application serial nos. 90100487, 90100488, 90100489, filed together on Jan. 10, 2001. 
     
    
     
       BACKGROUND OF THE INVENTION  
         [0002]    1. Field of the Invention  
           [0003]    The invention relates generally to a component of a motherboard in a PC system and more particularly to an apparatus that supports both synchronous dynamic random access memory module and the double data rate dynamic random access memory module.  
           [0004]    2. Description of the Related Art  
           [0005]    Digital information is often stored in dynamic random access memory (DRAM). One type of DRAM transfers information synchronously with a clock signal. This type of DRAM is referred to as synchronous DRAM (SDRAM). SDRAM provides a burst read access (when programmed for burst length of 4). In case of 64-bit data bus interface system, such a transfer involves 32 bytes of data per SDRAM access. Currently PC systems typically use such as arrangement.  
           [0006]    SDRAM transfers information once every clock cycle of the clock signal, such as the rising edge of the clock signal. Nevertheless, DDR DRAM transfers data on each edge of the clock signal (i.e., twice every clock cycle of the clock signal), thus doubling the peak throughput of the memory device as compared with SDRAM. DDR DRAM thus provides a burst of eight data transfers on every burst read access (when programmed for burst length of 4). As a result, the operation speed of the memory can be increased.  
           [0007]    The operation difference between the synchronous dynamic random access memory and the double data rate dynamic random access memory is as follows. (1) The SDRAM works in normal clock signal, and the DDR DRAM works in differential clock signal. (2) The VDD of SDRAM is 3.3V, and the VDDQ of DDR DRAM is 2.5V. (3) SDRAM does not require a reference voltage, and the DDR DRAM requires a reference voltage of ½ VDDQ. (4) The data bus connected to SDRAM is a normal CMOS logic, and the data bus connected to DDR DRAM is a series stub terminated logic  2  (SSTL_ 2 ). (5) The data bus connected to SDRAM does not require a terminated voltage VTT, and the data bus connected to DDR DRAM requires a terminated voltage VTT to absorb the reflected electric wave. (6) The data bus connected to SDRAM does not require a pull-up resistor, while the data bus connected to DDR DRAM requires a pull-up resistor. The superiority of the DDR DRAM includes its double data rate.  
           [0008]    Currently, the motherboard supports either the SDRAM module or the DDR DRAM module. Cause of the memory module slot cannot support simultaneously both the SDRAM and the DDR DRAM. Also, support for both memory technologies would avoid obstacles to upgrading memory within a computer system. Thus, a technique is needed to provide compatibility for both SDRAM and DDR DRAM within a common system.  
         SUMMARY OF THE INVENTION  
         [0009]    According to one embodiment of the principle of the present invention, a synthesizer comprises terminator of which the conduction is controllable. By applying the synthesizer to a motherboard, the user has the great flexibility in using different memory modules.  
           [0010]    The invention is embodied in an synthesizer comprising a first signal terminal, a second signal terminal, a first enable pin, a terminator, a first electronic switch and a second electronic switch. The first and the second signal terminals are used for external connection. The first electronic switch has one terminal coupled to the first signal terminal and the other terminal coupled to the terminator. A control terminal of the first electronic switch is coupled to the first enable pin to control whether the terminator is conducted with the first signal terminal by the first enable pin. The second electronic switch has one terminal coupled to the first signal terminal and the other terminal coupled to the second signal terminal. The control terminal of the second electronic switch is coupled to the first enable pin to control whether the first and the second signal terminals are conducted with each other.  
           [0011]    The above synthesizer further comprises a first source pin. The terminator has a first terminal and a second terminal. The first terminal of the terminator is connected to the first source pin, and the second terminal of the terminator is connected to the first electronic switch. The synthesizer can also comprise a second source pin. The first source pin and the second source pin are located in symmetric positions of the package of the synthesizer, and the first source pin is coupled to the second source pin. The first and the second source pins can also be formed on the same side of the package with an uppermost and lowermost symmetric position. Thus, the source pins of the synthesizer and other synthesizers can be connected in series. The synthesizer can also comprise a second enable pin. The first enable pin and the second enable pin are located in symmetric positions of the package of the synthesizer. The first enable pin is coupled to the second enable pin. The above electronic switches can be made of transmission gate.  
           [0012]    The invention further provides a motherboard that supports memory module slots both with and without a terminator. The motherboard comprises a first memory module slot, a second memory module slot, a synthesizer coupled to the first and the second memory module slots and a control chip set. The first memory module slot is used to connect a first memory module and requires a terminator for operation. The second memory module slot is used to connect a second memory module. The synthesizer is coupled to both the first and the second memory module slots. When the first memory module slot is inserted with the first memory module, the synthesizer provides an equivalent terminator. When the second memory module slot is embedded with the second memory module, the synthesizer does not provide an equivalent resistor. The control chip set is coupled to the first memory module slot and the synthesizer. When the first memory module is embedded in the first memory module slot, the control chip set controls the operation mode of the first memory module.  
           [0013]    In the above motherboard, the first memory module includes a double data rate dynamic random access memory, while the second memory module includes a synchronous dynamic random access memory. The motherboard further comprises a voltage modulator coupled to the synthesizer to provide a terminal voltage and a clock generator coupled to the first and the second memory module slots. When the first memory module is embedded in the first memory module slot, a differential clock signal is generated. When the second memory module is embedded in the second memory module slot, a normal clock signal is generated.  
           [0014]    Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0015]    Other features and advantages of the present invention will be come apparent by reference to the following detailed description when considered in conjunction with the accompanying drawings, in which:  
         [0016]    [0016]FIG. 1 is shows a schematic drawing of a synthesizer in one embodiment of the invention;  
         [0017]    [0017]FIG. 2 shows the layout of components of a computer motherboard that supports DDR DRAM; and  
         [0018]    [0018]FIG. 3 shows the layout of components of a computer motherboard that supports SDRAM/DDR DRAM. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0019]    Aspects of the present invention include methods and apparatus for designing an integrated circuit. In the following description, specific information is set forth to provide a thorough understanding of the present invention. Well-known circuits and devices are included in block diagram form in order to not to complicate the description unnecessarily. Moreover, it will be apparent to one skill in the art that specific details of these blocks are not required in order to practice the present invention.  
         [0020]    [0020]FIG. 1 shows one embodiment of a synthesizer according to the invention. The synthesizer comprises first signal terminals  101 - 110 , second signal terminals  120 - 129 , a first enable pin  130 , a second enable pin  174 , a first source pin  170 , a second source pin  172 , terminators  131 - 140 , first electronic switches  150 - 159  and second electronic switches  160 - 169 . The first and second signal terminals  101 - 110  and  120 - 129  are used for external connection. Each of the first electronic switches  150 - 159  has one terminal connected to the first signal terminals  101 - 110  and the other terminal connected to the terminators  131 - 140 . The control terminals of the first electronic switches  150 - 159  are connected to the first enable pin  130 , which can then control the conduction between the terminators  131 - 140  and the first signal terminals  101 - 110 . Each of the second electronic switches  160 - 169  has one terminal connected to the first signal terminals  101 - 110  and the other terminal connected to the second signal terminals  120 - 129 . The control terminals of the second electronic switches  160 - 169  are connected to the first enable pin  130  to control the conduction between the first and the second signal terminals  101 - 110  and  120 - 129 . By switching between the first electronic switches  150 - 159  and the second electronic switches  160 - 169 , the first and the second signals  101 - 110  and  120 - 129  can select use of the terminators  131 - 140 . When the first electronic switches  150 - 159  are conducted, the second electronic switches  160 - 169  are open. Therefore, the first signal terminals  101 - 110  have the terminators  131 - 140 . When the second electronic switches  160 - 169  are conducted, the first electronic switches  101 - 110  are open, and the second signal terminals  120 - 129  can output to external directly. It is appreciated that people of ordinary skill in the art may understand that effects with other states are obtained when the first and second electronic switches  150 - 159  and  160 - 169  are both conducted or opened.  
         [0021]    The above synthesizer  100  may further comprise a first source pin  170 . Each of the terminators  131 - 140  has a first terminal  171 - 180  and a second terminal  181 - 190 , respectively. The first terminals  171 - 180  are connected to the first source pin  170 , and the second terminals  181 - 190  are connected to the first electronic switches  150 - 159 . A second source pin  172  may also be included in the above synthesizer  100 . The first source pin  170  and second source pin  172  are located in symmetric positions of a package for the synthesizer  100 . The first source pin  170  is coupled to the second source pin  172 . The first and the second source pins  170  and  172  may be located at the uppermost and lowermost symmetric positions of the same side of the package. The first and second source pins  170  and  172  of the synthesizer  100  are connected with the source pins of other synthesizers in series. The first enable pin  130  and the second enable pin  174  are located at symmetric positions of the package of the synthesizer  100 . The first enable pin  130  is coupled to the second enable pin  174 . The arrangement of these pins is advantageous in that they reduce the leading space while connecting the synthesizer  100  with others on a motherboard. The first and second electronic switches  150 - 159  and  160 - 169  are made of transmission gates.  
         [0022]    [0022]FIG. 2 shows the layout of components of a computer motherboard that supports DDR DRAM. The computer motherboard  200  that supports DDR DRAM memory module comprises a CPU slot  201 , a control chip set  202 , a differential clock generator  203 , memory module slots  204 - 207 , voltage modulator  208 , terminators  209 , PCI slots  212 - 214  and ISA slots  210 - 211 . The CPU slot  201  is used for insertion of a CPU. The control chip set  202  is the control chip set that supports DDR DRAM memory module. The differential clock generator  203  generates a differential clock signal required by the DDR DRAM. The memory module slots  204 - 207  are used for installation of DDR DRAN memory modules. The voltage modulator  208  provides a terminal voltage required by a data bus connected to the DDR DRAM memory module. The terminators  209  are used to absorb the electric wave transmitted by the data bus connected to the DDR DRAM memory module. The PCI slots  212 - 214  are for installation of PCI interface cards and the ISA slots  210 - 211  are used to install ISA interface cards.  
         [0023]    Referring to FIG. 2, the terminators  209  and the voltage modulator  208  are installed on the printed circuit board of the motherboard  200 . The conventional motherboard  200  can only support a DDR DRAM memory module and cannot support the SDRAM. The cost of DDR DRAM memory module is much higher than that of SDRAM. Therefore, the DDR DRAM memory modules are suitable for use in a high-level computer system such as net server.  
         [0024]    [0024]FIG. 3 shows the layout of components of a motherboard that supports SDRAM/DDR DRAM. The motherboard  300  comprises a CPU slot  301 , a control chip set  302 , a clock generator  303 , first memory module slots  304 - 305 , second memory module slots  306 - 307 , PCI slots  312 - 314 , ISA slots  310 - 311  and a synthesizer  316 . The functions of the CPU slot  301 , the voltage modulator  308  and the ISA slots  310 - 311  are the same as the similar components illustrated in FIG. 2. The first memory module slots  304 - 305  are for embedding first memory modules. Terminators are required when operating the first memory modules terminator. The second memory modules  306 - 307  are used to install second memory modules. In this embodiment, the first memory modules include double data rate dynamic random access memories and the second memory modules include synchronous dynamic random access memories.  
         [0025]    The synthesizer  316  can have the same structure as shown in FIG. 1. The synthesizer  316  is coupled to the first and the second memory module slots  304 - 305  and  306 - 307 . When the first memory modules are inserted in the first memory module slots  304  and  305 , the synthesizer  316  provides an equivalent terminator. Meanwhile, the first memory module slots  304 - 305  do not conduct with the second memory module slots  306 - 307 . When the second memory modules are inserted in the second memory module slots  306 - 307 , the synthesizer  316  does not provide the equivalent terminator, and the first and second memory module slots  304 - 305  and  306 - 307  conduct with each other. The control chip set  302  is coupled to the first memory module slots  304 - 305  and the synthesizer  316 . When the first memory modules are inserted in the first memory module slots  304 - 305 , the control chip set  302  operates at a double data rate operation mode. When the second memory modules are inserted in the second memory module slots  306 - 307  , the control chip set  302  operates with a normal operation data rate.  
         [0026]    Further referring to FIG. 3, since the first memory module slots  304 - 305  in the motherboard  300  are double data rate memory modules operated under a double data rate mode, a more stable transmission environment is required due to the faster rate. Therefore, the first memory module slots  304 - 306  are closer to the control chip to provide a more stable transmission environment.  
         [0027]    According to the invention, a synthesizer able to control the conduction of terminators is provided. The synthesizer can be applied to a motherboard, so that the motherboard can use the standard synchronous dynamic random access memory and the standard double data rate dynamic random access memory with great flexibility. The manufacturer can thus save the cost for fabricating various modules. Consumers also benefit from the added convenience.  
         [0028]    Other embodiments of the invention will appear to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples to be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.