Abstract:
An adjustable frequency oscillator 2 is provided by a comparator timer 4 having a potentiometer 6 at its output 8 for concurrently changing both charging current and threshold trip voltage to control the frequency of oscillation of the comparator output. The oscillator is ideal for proximity switch applications, particularly photoelectric type proximity switches, for timing a delayed output signal following a given sensed condition.

Description:
BACKGROUND AND SUMMARY 
     The invention provides an adjustable frequency oscillator using a comparator timer. Single means, such as a potentiometer, concurrently changes both charging current and threshold trip voltage to change the frequency of oscillation of the comparator output. 
     The circuitry features expanded frequency range, reduced power consumption and improved adjustment resolution. 
     Though not limited thereto, the oscillator was developed for proximity switches and is particularly useful in photoelectric type proximity switches for timing a delayed output signal following a given sensed condition. The wide range together with the low power consumption makes the oscillator ideal for such proximity switch application. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a circuit diagram of an adjustable frequency oscillator constructed in accordance with the invention. 
     FIG. 2 is a circuit diagram showing a further preferred implementation of the circuit of FIG. 1. 
     FIG. 3 is a circuit diagram showing an alternate embodiment of FIG. 2. 
    
    
     DETAILED DESCRIPTION 
     FIG. 1 shows an adjustable frequency oscillator 2 comprising in combination comparator means 4 and single means 6 at the output 8 of the comparator for currently changing both charging current and threshold trip voltage for the comparator to change the frequency of oscillation of the comparator output. Means 6 is adjusted in one direction to increase charging current and decrease threshold trip voltage, to increase oscillation frequency. Means 6 is adjusted in another direction to decrease charging current and increase threshold trip voltage, to decrease oscillation frequency. In the preferred embodiment, means 6 is a potentiometer. 
     Potentiometer 6 comprises a wiper 10 connected from the comparator output to a variable point along a pot resistor 12. The lower end 14 of the pot resistor is connected to a reference threshold input terminal 16 of the comparator, such as the plus input of an operational amplifier. The bottom end 14 of the pot resister is preferably connected in a voltage divider network, provided by resistors R 2  and R 3 , to reference input terminal 16 of the comparator. The upper end 18 of the pot resistor is connected in an RC circuit, provided by resistor R 1  and capacitor C, to a comparing input terminal 20 of the comparator, such as the minus terminal of an operational amplifier, for comparison against the reference input terminal 16. The connection of input terminals 16 and 20 may be interchanged. 
     When wiper 10 is moved downwardly, the threshold trip voltage at reference input terminal 16 is increased, and the charging current to capacitor C is decreased. It thus takes longer for the voltage at comparing input terminal 20 to rise in a given polarity direction above the voltage at reference input terminal 16. This decreases the oscillation frequency of comparator output 8. 
     When wiper 10 is moved upwardly, the threshold trip voltage at reference input terminal 16 is decreased, and the charging current to capacitor C is increased. It thus takes less time for the voltage at comparing input terminal 20 to rise in a given polarity direction above the voltage at reference input terminal 16. This increases the oscillation frequency of comparator output 8. 
     Comparator output 8 switches states when the voltage at comparing input terminal 20 rises above the voltage at reference input terminal 16 due to the charging of capacitor C. When output 8 switches states, capacitor C begins charging in the other polarity direction until the voltage at comparing input terminal 20 drops below the voltage at reference input terminal 16. Comparator output 8 then switches states again, to complete an oscillation cycle which is repeated at a frequency controlled by potentiometer 6. Capacitor C thus charges in alternate polarity directions during alternate half cycles, and reference input terminal 16 is at alternate high and low levels during alternate half cycles, according to the oscillating alternating state of output 8. 
     The voltage divider network, R 2  and R 3 , and the RC circuit, R 1  and C, are connected to a reference voltage as indicated at 22. Referring to FIG. 2, reference voltage 22 is provided by voltage follower means 24. The voltage follower means comprises an operational amplifier 26 having an output 28 connected at reference voltage point 22 to the voltage divider network and the RC circuit. Op amp 26 has one input 30 supplied by a given voltage V, and another input 32 connected in feedback relation from output 28 such that the voltage on output 28 follows the voltage on input 30. If the voltage on input 30 rises, then the voltage at output 28 also rises, which increased voltage is fed back to the other input 32 for comparison against the on input 30, and the output continues to change until the inputs are in balance. The voltage on input 30 is supplied through a voltage divider network provided by resistors R 4  and R 5 . 
     In FIG. 3, the parallel combination of resistors R 6  and R 7  sets the reference voltage and acts as part of the resistance divider network for the positive feedback portion of the oscillator circuit. The ratio of R 6  to R 7  is the same as the ratio of R 4  to R 5  of Fig. 2, and if the equivalent resistance of the parallel combination of R 6  and R 7  is the same as the resistance R 3  of FIG. 2, and if the values of C, R 1 , P and R 2  of both FIGS. 2 and 3 are equal, then the output frequency and duty cycle of FIGS. 2 and 3 will be equal. Because capacitor C of FIG. 3 is connected to the negative supply, on start-up, the first half cycle of oscillation will have an extended time period while the capacitor charges up to the required offset voltage. The circuit of FIG. 2 does not have this start-up delay characteristic. In FIGS. 1 and 2, the RC circuit and the voltage divider network are connected to a common reference voltage, and this provides faster start-up. In Fig. 3, the RC circuit and the voltage divider network are connected to different reference voltages. 
     It is recognized that various modifications are possible within the scope of the appended claims.