Abstract:
An image sensor includes: a pixel array having a plurality of unit pixels arranged in a matrix form of rows and columns; and a plurality of power lines provided on the pixel array for providing the unit pixels with a power supply voltage, wherein the power lines are configured perpendicularly to a scan direction for outputting image data from the pixel array.

Description:
FIELD OF THE INVENTION  
       [0001]     The present invention relates to an image sensor; and, more particularly, to an image sensor for improving an image quality by configuring a power line perpendicularly to a scan direction.  
       DESCRIPTION OF RELATED ARTS  
       [0002]     An image sensor, e.g., a charge coupled device (CCD) and a CMOS image sensor, is a semiconductor device for converting an optical image into an electric signal. The CCD is provided with a plurality of capacitors which are arranged very close one another in order to store electric charge. On the contrary, the CMOS image sensor includes a plurality of unit pixels which is implemented with a single photodiode and three or four transistors for driving the unit pixel.  
         [0003]     Though the CMOS image sensor produces an image of low quality compared with that of the CCD, the CMOS image sensor has dominated an image sensor market because of its advantages such as low fabricating cost and low power consumption.  
         [0004]      FIG. 1  is a diagram describing a conventional CMOS image sensor which performs a line scan row-by-row.  
         [0005]     As shown in  FIG. 1 , a pixel array PA configured with an N number of pixel columns and an M number of pixel rows to have N×M number of unit pixels UP are provided. Each unit pixel UP provided with a single photodiode and three or four transistors receives a power supply voltage VDD supplied to row-by-row. Therefore, the number of power lines VDD 1  to VDDM for providing the power supply voltage VDD is corresponding to the number of the pixel rows, i.e., M.  
         [0006]     For example, an image sensor of video graphics array (VGA) includes 640 pixel columns and 480 pixel rows and, therefore, 640 numbers of unit pixels UP concurrently start operation in response to one power line.  
         [0007]      FIG. 2  is a schematic circuit diagram modeling one power line configured in the same direction with a line scan direction.  
         [0008]     As described in  FIG. 2 , each unit pixel UP is implemented with a plurality of resistors R and capacitors C corresponding to the number of the pixel columns, i.e., N.  
         [0009]     When the power supply voltage VDD of 2.5V is used for driving the CMOS image sensor, a level of the power supply voltage VDD at the first column A is still 2.5V. However, as the line scan is performed, the level of the power supply voltage VDD decreases. The level of the power supply voltage VDD of the Nth column C drops to 2.45V.  
         [0010]     Abovementioned voltage drop could cause a serious problem under a low operation voltage circumstance. That is, when the power supply voltage VDD lower than 2.5V is used, an amount of the power supply voltage VDD supplied to the unit pixel is too small to drive the unit pixel properly by reaching to the Nth column. Therefore, an image quality of unit pixels near to the Nth column is degraded. Further, as a resolution of the image sensor increases, the number of unit pixels in a corresponding line also increases. In this case, the problem caused by the voltage drop becomes serious.  
       SUMMARY OF THE INVENTION  
       [0011]     It is, therefore, an object of the present invention to provide an image sensor for improving an image quality by configuring a power line perpendicularly to a scan direction.  
         [0012]     In accordance with an aspect of the present invention, there is provided an image sensor, including: a pixel array having a plurality of unit pixels arranged in a matrix form of rows and columns; and a plurality of power lines provided on the pixel array for providing the unit pixels with a power supply voltage, wherein the power lines are configured perpendicularly to a scan direction for outputting an image data from the pixel array.  
         [0013]     In accordance with another aspect of the present invention, there is provided a method for configuring a plurality of power lines on a pixel array of an image sensor, the method including: forming the pixel array having a plurality of unit pixels arranged in a matrix form of rows and columns; and configuring the power lines on the pixel array for providing the unit pixels with a power supply voltage, wherein the power lines are configured perpendicularly to a scan direction for outputting an image data from the pixel array. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0014]     The above and other objects and features of the present invention will become apparent from the following description of preferred embodiments taken in conjunction with the accompanying drawings, in which:  
         [0015]      FIG. 1  is a diagram describing a conventional CMOS image sensor which performs a line scan row-by-row;  
         [0016]      FIG. 2  is a schematic circuit diagram modeling one power line configured in the same direction with a line scan direction;  
         [0017]      FIG. 3  is a diagram showing a CMOS image sensor in accordance with an embodiment of the present invention which performs a line scan row-by-row;  
         [0018]      FIG. 4  is a schematic circuit diagram modeling one power line configured perpendicularly to the scan direction; and  
         [0019]      FIG. 5  is a diagram describing a CMOS image sensor in accordance with an embodiment of the present invention which performs a line scan column-by-column. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0020]     Hereinafter, an image sensor in accordance with the present invention will be described in detail referring to the accompanying drawings.  
         [0021]      FIG. 3  is a diagram showing a CMOS image sensor in accordance with an embodiment of the present invention which performs a line scan row-by-row.  
         [0022]     Referring to  FIG. 3 , a pixel array PA configured with an N number of pixel columns and an M number of pixel rows to have N×M number of unit pixels UP are provided. Each unit pixel UP provided with a single photodiode and three or four transistors receives a power supply voltage VDD.  
         [0023]     The power line VDD 1  to VDDN is configured perpendicularly to a scan direction for outputting an image data from the pixel array PA. In other words, when the CMOS image sensor performs a line scan in a row direction, the power supply voltage VDD is supplied column-by-column. In this case, the number of power line VDD 1  to VDDN is corresponding to the number of the pixel columns, i.e., N.  
         [0024]     Though it is not described in  FIG. 3 , the CMOS image sensor further includes a data line for outputting the image data from the plurality of unit pixels. The power line VDD 1  to VDDN is configured in the same direction with the data line. That is, when the CMOS image sensor performs the line scan in the row direction, the image data in a single row is scanned column-by-column and, then, outputted through the data line configured in a column direction.  
         [0025]     All of the power lines VDD 1  to VDDN receives the power supplied voltage VDD from a main power line VDD_M arranged in the row direction. Therefore, the main power line VDD_M and the power line VDD 1  to VDDN are arranged perpendicularly to each other.  
         [0026]     Meanwhile, although the single main power line VDD_M is provided in the embodiment described in  FIG. 3 , a plurality of main power lines can be included in another embodiment of the present invention. In this case, each main power line VDD_M is shared by a predetermined number of power lines in order to supply the power supply voltage VDD to the predetermined number of power lines.  
         [0027]     As abovementioned, the power lines VDD 1  to VDDN is configured perpendicularly to the scan direction, only one unit pixel UP among the unit pixels connected to one power line is connected to the power line at one time. That is, because the line scan is performed row-by-row, the unit pixel UP corresponding to the row which is currently scanned is connected to the power line. Therefore, a voltage drop is not occurred during a scan operation.  
         [0028]      FIG. 4  is a schematic circuit diagram modeling the power line configured perpendicularly to the scan direction.  
         [0029]     As shown, each unit pixel UP is implemented with a plurality of resistors R and capacitors C corresponding to the number of the pixel rows, i.e., M.  
         [0030]     As abovementioned, the unit pixels in one power line, i.e., in one column line, connected to the power line when the scanning operation is performed to the corresponding row. Therefore, the voltage drop is not occurred and, thus, every unit pixels in the same power line receives the power supply voltage VDD of 2.5V when the level of the power supply voltage VDD is 2.5V.  
         [0031]      FIG. 5  is a diagram describing a CMOS image sensor in accordance with an embodiment of the present invention which performs a line scan column-by-column.  
         [0032]     Referring to  FIG. 5 , a pixel array PA configured with an N number of pixel columns and an M number of pixel rows to have N×M number of unit pixels UP are provided. Each unit pixel UP provided with a single photodiode and three or four transistors receives a power supply voltage VDD.  
         [0033]     The power line VDD 1  to VDDM is configured perpendicularly to a scan direction for outputting an image data from the pixel array PA. In other words, when the CMOS image sensor performs a line scan in a column direction, the power supply voltage VDD is supplied row-by-row. In this case, the number of power line VDD 1  to VDDM is corresponding to the number of the pixel rows, i.e., M.  
         [0034]     Though it is not described in  FIG. 5 , the CMOS image sensor further includes a data line for outputting the image data from the plurality of unit pixels. The power line VDD 1  to VDDM is configured in the same direction with the data line. That is, when the CMOS image sensor performs the line scan in the column direction, the image data in a single column is scanned row-by-row and, then, outputted through the data line configured in a row direction.  
         [0035]     All of the power lines VDD 1  to VDDM receives the power supplied voltage VDD from a main power line VDD_M arranged in the column direction. Therefore, the main power line VDD_M and the power line VDD 1  to VDDM are arranged perpendicularly to each other.  
         [0036]     Meanwhile, although the single main power line VDD_M is provided in the embodiment described in  FIG. 5 , a plurality of main power lines can be included in another embodiment of the present invention. In this case, each main power line VDD_M is shared by a predetermined number of power lines in order to supply the power supply voltage VDD to the predetermined number of power lines.  
         [0037]     As abovementioned, the power lines VDD 1  to VDDM is configured perpendicularly to the scan direction, only one unit pixel UP among the unit pixels connected to one power line is connected to the power line at one time. That is, because the line scan is performed column-by-column, the unit pixel UP corresponding to the column which is currently scanned is connected to the power line. Therefore, a voltage drop is not occurred during a scan operation.  
         [0038]     Further, in abovementioned embodiments, the present invention is explained by taking the CMOS image sensor as an example. However, the present invention can be also applied to image sensors of active type.  
         [0039]     The present invention provides an image sensor for improving an image quality by configuring a power line perpendicularly to a scan direction.  
         [0040]     The present application contains subject matter related to Korean patent application No. 2005-12033, filed in the Korean Patent Office on Feb. 14, 2005, the entire contents of which being incorporated herein by reference.  
         [0041]     While the present invention has been described with respect to the particular embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims.