Abstract:
A method and a system for frequency measuring or monitoring and particularly suitable for power system frequencies in the range of approximately 0-2 KHz is disclosed. The technique is suitable for single-phase or three-phase periodic signals. Synchronism of sampling to power systems waveform and zero crossing detection are not required. The method is particularly attractive when used in conjunction with other on-line digital processing/control tasks since the interface between the power network and the computer may be shared and the fast and accurate detection of frequency variation can be beneficially used by the rapid digital processors.

Description:
BACKGROUND OF INVENTION 
     (a) Field of the Invention 
     The present invention relates to a method and a system for measuring frequency or frequency deviation of a periodic signal in the range of approximately from 0 to 2 KHz and wherein the measuring is effected by sampling the periodic signal at precise time intervals and providing digital value signals representative of the sampled values for processing to calculate the lapse time of the signal since its previous crossing of the same level. 
     (b) Description of Prior Art 
     With the growth of power systems, permissible frequency deviations have been reducing while at the same time frequency-bias, (expressed as megawatts per 0.1 Hz deviation) have been increasing. 
     The advent of frequency sensitive relays, load behaviour modelling and other computer controlled loops have necessitated measurements of power system frequency with a degree of speed, precision and stability, not provided by conventional electromechanical instruments. 
     Various methods have been suggested based on measurement of the time between zero crossings of the signals. Others have suggested the calculation of the frequency on the basis of a comparison with a standard and precise periodic signal. Various types of circuitry are employed in these methods such as digital, analog and hybrid circuits. 
     All the methods stress the importance of an analog meter display even if some have the frequency available in numerical form. All assume signals to be reasonably free from random and high frequency noise so that a zero crossing detector (inherent in all the above methods) will perform satisfactorily. None have any estimate of frequency before half a cycle, and some have longer lags due to the use of filters. 
     Our studies of the voltage and current waveforms of power systems at bulk power substation level in normal operation show that the random noise present can cause the zero crossing detection, of the prior art, to be quite inaccurate, particularly in view of the small magnitude of frequency variations to be measured. 
     SUMMARY OF INVENTION 
     It is therefore a feature of the present invention to provide a method and a system for measuring small magnitude of frequency deviation of low frequency signals of about 0 to 2 KHz, and which substantially overcomes the above-mentioned disadvantages. 
     A further feature of the present invention is to provide a power system frequency measuring system or meter for measuring frequencies in the low frequency range of approximately 0 to 2 KHz by computing at each sampling instant, and estimating, with precision, the time period of the signal, namely the lapse time since the previous crossing of the signal at the same level (zero or non-zero) whereby to calculate the frequency deviation of the signal. 
     According to the above features, from a broad aspect, the present invention provides a method of measuring frequency or frequency deviation of a periodic signal in the range of approximately from 0 to 2 KHz. The method comprises the steps of sampling the periodic signal at precise time intervals to obtain sample values. The sample values are converted to provide digital value signals. A predetermined number of the digital value signals representative of the lapse time of at least a time period of the periodic signal, are stored. 
     The frequency, frequency deviation or time period deviation is then derived by linearly interpolating two successive samples of said digital value signals to determine the time period deviation of said periodic signal and in accordance with the formula 
     
         N=(V.sub.i-n -V.sub.i) Sgn(V.sub.i-1 -V.sub.i) 
    
     
         D=|V.sub.i-1 -V.sub.i |+V.sub.i-n+1 -V.sub.i-n | 
    
     
         1/2α=ΣN/ΣD 
    
     
         f=1/(n-α)δ 
    
     where V i , V i-1 , V i-n  and V i-n+1  are digital value signals and Sgn is the sign + or -, α the time period deviation and f the frequency V i-1  and V i-n+1  are to be replaced by V i-3  and V i-n+3  in case of a three-phase multiplexed signal. 
     According to a further broad aspect of the present invention, there is provided a power system frequency measuring system for measuring frequencies in the low frequency range of approximately 0 to 2 KHz. The system comprises an analog/digital converter circuit having an input for receiving a periodic signal whose frequency is to be measured. A real time clock controls the analog to the digital converter circuit to provide a periodic time signal for sampling the frequency signal at precise intervals. The A/D converter circuit provides output digital value signals at the precise intervals and derived from a signal at its input. Memory device is provided for storing a predetermined number of the digital value signals representative of the lapse time of above a time period of the signal. Devices to perform certain arithmetic operations are further provided for processing selected samples of the stored digital value signals to provide output numerator and denominator signal values expressed by the formula: 
     
         Num. N=(V.sub.i-n -V.sub.i) Sgn(V.sub.i-1 -V.sub.i) 
    
     
         Den. D=|V.sub.i-1 -V.sub.i |+|V.sub.i-n+1 -V.sub.i-n |, 
    
     where V i , V i-1 , V i-n  and V i-n+1  are digital value signals and Sgn is the function sign (+ or -). Divider operator provides a resultant output signal from the N and D signal values. The resultant signal is representative of the frequency deviation of the signal. 
    
    
     BRIEF DESCRIPTION OF DRAWINGS 
     A preferred embodiment of the present invention will now be described with reference to the accompanying drawings in which: 
     FIG. 1 is an illustration of a three-phase periodic signal showing the sampling time intervals and an example of the location of the first, second, last and second to last sampled values in such time period; 
     FIG. 2 is a block diagram of the power system frequency measuring system; and 
     FIG. 3 is a flow diagram of a program. 
    
    
     DESCRIPTION OF PREFERRED EMBODIMENTS 
     With reference to FIG. 1, there is shown the waveforms in a three-phase system, each signal being denoted by respective reference numerals 11, 12 and 13. The method and system proposed herein is based on computing at each sampling instant 10, an estimate of the time period t, namely, the lapse time since the previous crossing of the same signal at the same level as that of the sampling instant. A weighted mean time period deviation is computed from the three phases 11, 12 and 13, and the weight being the absolute value of the level variations between two successive sampling instants. The poor estimates of time periods from the samples near the peak of the waveform are automatically weighted out, and each set of three-phase samples (may or may not be concurrent) lead to time period estimates of uniform precision. The changes in frequency during as short as three sampling instants (in a three-phase system) can be detected. It should be noted that other weighting functions such as the square values are also appropriate. It is also noted that the method is as equally applicable to a single phase periodic signal. 
     Digital frequency determination is obtained by the system and method which will be described later and based on the following mathematical basis. 
     If n (for 3-phase, nearest multiple of 3) is the number of samples required to span a time period, then 
     
         nδ&gt;1/f 
    
     where δ is the time lapsed between two successive samples. 
     The time period deviation can be computed by linear interpolation between two successive sampling instants as follows: 
     
         α=nδ-1/f=(V.sub.i-n -V.sub.i)/(V.sub.i-n -V.sub.i-n+1) or (V.sub.i-n -V.sub.i)/(V.sub.i-1 -V.sub.i) 
    
     As mentioned above, since the value computed when V is near a peak is very imprecise, the α&#39;s are weighted by their respective absolute values 
     
         |[V.sub.i-n -V.sub.i-n+1 ]| or |V.sub.i-1 -V.sub.i | 
    
     and thus the following relation is obtained: 
     
         N=(V.sub.i-n -V.sub.i) Sgn(V.sub.i-1 -V.sub.i) 
    
     
         D&#39;=|V.sub.i-1 -V.sub.i | or |V.sub.i-n+1 -V.sub.i-n | 
    
     
         D=|V.sub.i-1 -V.sub.i |+|V.sub.i-n+1 -V.sub.i-n | 
    
     
         α=N/D&#39;=2N/D 
    
     In order to reduce the effect of changes in amplitude of the signal, and to improve the immunity to random noise, N and D are accumulated over an equal number of samples and then divided. Thus the following relation is obtained: 
     
         1/2α=ΣN/ΣD=ΣN/ΣD. 
    
     Frequency may be computed from the deviation &#34;α&#34; computed in the previous formula. 
     
         f=1/(n-α)δ 
    
     In case of a 3-phase multiplexed signal, V i-1  and V i-n+1  are to be changed to V i-3  and V i-n+3  respectively. It should be noted that frequency may be calculated from the output signal of this time period deviation. 
     Referring now to FIG. 2, there is shown the system which realizes the computation of the present invention. A single phase or three-phase multiplexed signal is fed to the input 20 of an analog to digital converter circuit 21. A master clock 22 provides clocking pulses to an interval timer 23 which provides periodic time signals to the A/D converter for sampling the frequency signal on the input 20 at precise intervals of time, namely intervals 10 as shown in FIG. 1. The interval timer 23 controls also the timing of the multiplexing device and the displacement memory device. The converter circuit 21 provides output digital value signals at its output 24 for each sampled interval 10 of the input signal. The value of the digital signals are representative of the amplitude of the signals, from the zero level, at that precise sampling instant. 
     The digital value signals at the output 24 are fed to a memory device, herein a displacement memory 25, for storing a predetermined number, namely n.sub.δ, of the digital value samples. The frequency of the signal being approximately known, the displacement memory is of such a size whereby there will be sufficient digital value samples to scan a complete cycle. 
     Operator system in the form of differential operators and absolute value operators and accumulators are provided for processing selected digital values from the displacement memory to provide output numerator and denominator signal values &#34;SN&#34; and &#34;SD&#34; expressed by the above-mentioned formulas. This computation is accomplished as follows. As shown in FIG. 2, a first differential operator 26 has two inputs 27 and 28 connected respectively to a first and a second digital value signal of the displacement memory 25. Similarly, a second differential operator 29 has two inputs 30 and 31 connected respectively to a second to last and last digital value signal from the displacement memory. As expressed by the formula, the first signal is V i , the second signal is V i-1 , the second to last signal is V i-n+1  and the last signal is V i-n . 
     Each of the operators 26 and 29 has a clock input 32 from the interval timer circuit 23 whereby the system operates in synchronism. Also, the differential operators are provided with a control input 33 which determines the sign of the function of the differential operator, that is to say, subtraction with or without a change of sign operation. These are preset functions. The output 34 from each of the differential operators 26 and 29 connect respectively to an absolute value operator 35 and 36. The output of the absolute value operators consists of absolute output signals fed to the inputs 37 and 38, respectively, of an accumulator 39. At the output 40 of the accumulator 39 are the output signals &#34;SD&#34;. 
     A third differential operator 41 is provided with two inputs 42 and 43 connected respectively to the first digital value signal and the last digital value signal, respectively. A third input 44 connects to an output 45 of the absolute value operator connected to the differential operator 26. At this output 45 are the sign Sgn signals of the output signals on output connection 37. Signals from the differential operator 41 are fed to an input 46 of an accumulator 47. At the output 48 of the accumulator 47 are the signals &#34;SN&#34;. Both the signals SD and SN are fed to a division device, herein a divider circuit 49, whereby at sample times, the numerator signal is divided by the denominator signal to produce a resultant output signal at its output 50 representative of the time period deviation of the measured signal. Alternatively, and as previously mentioned, the circuit could be adapted to provide an output which is proportional to the frequency actually measured. 
     Additionally, as shown, a multiplex circuit &#34;MPX&#34; may be connected in case of a three-phase frequency signal to sequentially select each signal of the three-phase at the precise sampling instants and to feed that signal to the A/D converter 21 of FIG. 2 to provide output digital value signals from the divider 21 representative, sequentially, of the three phases. FIG. 1 shows the three sequential samples on a respective one of the three phases 11, 12 and 13. 
     It is obvious to a person skilled in the art that the output from the divider 49 could be used directly by other digital circuits. If, for example, a display of frequency is required in a system, a suitable calibrated digital or analog meter can use this signal as its input. It is also noted that the operator system, as described herein, can be realized using conventional, off-the-shelf, electronic circuitry. This invention is concerned with the method and the system or device for carrying out the method to determine the frequency deviation of a low frequency signal. Various system devices such as microprocessor based systems, may be used to perform the operation described herein without departing from the invention. A detailed flow diagram showing the steps of a program to carry out the operation of the system is illustrated in FIG. 3. 
     Broadly described, the method herein defined consists in measuring frequency or frequency deviation of a low frequency signal in the range of approximately from 0 to 2 KHz and comprising the steps of sampling the signal at precise time intervals to obtain sampled values. The sampled values are converted to digital value signals which are stored in a displacement memory and representative of at least a time period of a frequency signal. The time period deviation is then derived from selected samples of the stored digital value signals by linearly interpolating two successive ones of such stored digital value signals in accordance with the formula expressed herein. 
     It is within the ambit of the present invention to cover any obvious modifications of the method and system described, provided these fall within the scope of the broad claims appended hereto. 
     The following is a computer program listing to simulate the operation of the flow diagram of FIG. 3 and particularly the steps from block 50 to block 51. This part of the program deals with the ΣN/ΣD subroutine. ##SPC1## 
     The following is a computer program listing to simulate the operation of the flow diagram of FIG. 3 and particularly the steps in the blocks 52 and 53. This part of the program simulates a frequency compulation. ##SPC2## 
     The following is a computer Fortran language program listing to read in options and print the desired number of values. ##SPC3##