Abstract:
A control circuit controls the operation of a brushless DC (BLDC) sensorless motor having a first terminal connected to a first winding, a second terminal connected to a second winding and a third terminal connected to a third winding. A driver circuit applies drive signals to the first and second terminals and places the third terminal in a high-impedance state. The drive signals include first drive signals at a first current amplitude and second drive signals at a second current amplitude different from the first current amplitude. A differencing circuit senses a first mutual inductance voltage at the third terminal in response to the first drive signals and senses a second mutual inductance voltage at the third terminal in response to the second drive signals. The differencing circuit further determines a difference between the first and second mutual inductance voltages and produces a difference signal that is used for zero-crossing detection and rotor position sensing.

Description:
TECHNICAL FIELD 
       [0001]    The present disclosure generally relates to a motor control circuit and, more particularly, to a motor control circuit that compensates for the mutual inductance voltage offset present in some brushless DC (BLDC) sensorless motors. 
       BACKGROUND 
       [0002]    Reference is now made to  FIG. 1  showing a prior art control circuit  10  for a brushless DC (BLDC) sensorless motor  12 . 
         [0003]    The motor  12  includes three motor windings represented by inductances La, Lb and Lc. Each motor winding is coupled between a center terminal CT of the motor  12  and one of the external drive terminals A, B, C of the motor. For example, the winding La is coupled between CT and terminal A, the winding Lb is coupled between CT and terminal B. and the winding Lc is coupled between CT and terminal C. The motor  12  may further support a fourth external terminal that is connected to the center terminal CT. 
         [0004]    The control circuit  10  includes a driver circuit  14  that operates to generate drive signals (Out A, Out B and Out C) for application to the external drive terminals A, B, C of the motor. The driver circuit  14  operates in response to control signals  16  generated by a logic circuit  18  (which may be implemented in an embodiment using a programmed microcontroller or microprocessor). In the case of the three phases of the motor  12 , the logic circuit  18  controls the driver circuit  14  to drive the terminals of the motor with a “six-step” technique wherein the windings are cyclically powered. The six steps may, for example, comprise: CB; AB; AC; BC; BA; and CA, wherein the first letter x in the letter pair xy identifies the motor terminal connected by the driver circuit  14  to a higher voltage and the second letter y identifies the motor terminal connected by the driver circuit  14  to a lower voltage. It will be noted that for each step there is a winding of the motor  12  which is not driven (this being typically accomplished by having the associated terminal of the motor placed by the driver circuit in a high-impedance or tri-state state). 
         [0005]    If the BLDC motor  12  is running at a relative high speed, the voltage across the undriven winding arises mainly due to the counter back-electromotive force (BEMF) that is function of the motor speed. If the motor  12  is instead stopped or running at a very low speed, the voltage across the undriven winding arises instead mainly due to the mutual inductance (MI) phenomena if the driver circuit generates variable current (for example, the driver is working in a switching mode). The variable current flowing through the driven winding generates variable magnetic flux. The variable magnetic flux is concatenated to the undriven winding (thanks to the mutual inductance) and generates a voltage across the undriven winding itself (this being referred to in the art as the “mutual inductance” voltage). Because the mutual inductance is function of the rotor position, the voltage generated across the undriven coil (the mutual inductance voltage) will also be a function of the rotor position and its variability is used to detect the rotor position. 
         [0006]    Using a multiplexor (MUX) circuit  20 , the undriven motor terminal at each step of the drive cycle is selectively connected to a first input of a comparator circuit  22 . The logic circuit  18  uses selection signal S to control the switching selection made by the multiplexor circuit  20  to choose the terminal for the undriven winding. A second input of the comparator  22  is connected to a reference node  26 , with that reference node being connected in an embodiment to the fourth external terminal of the motor  12  that is connected to the center terminal CT. In event the connection to the center terminal CT is not available, a virtual center terminal can be created using resistors  24  that are coupled between the reference node  26  and each of the drive terminals for the signals Out A, Out B and Out C at the output of the driver circuit  14 . 
         [0007]    The comparator  22  functions as a zero-crossing (ZC) detection circuit to detect instances where the voltage on the first input (i.e., the voltage on the undriven motor terminal) crosses over the voltage of the reference node  26 . The zero-crossing detection signal  28  output from the comparator  22  is applied to the logic circuit  18  for use, for example, in detecting the physical rotational position of the motor  12  using techniques well known to those skilled in the art. Knowledge of the rotor position is important in order to properly generate the sequence of signals in the pair xy for application to the motor terminals for driving motor operation. 
         [0008]    In the case where the motor  12  is running at a relative high speed, the voltage across the undriven winding is usually high enough for the comparator  22  to make a reliable zero-cross detection. However, in the case where the motor  12  is instead stopped or running at a very low speed, the magnitude of the variable voltage across the undriven winding can be very low (for example, tenths of millivolts). An accurate zero-crossing detection may be difficult due to the presence of a mutual inductance (MI) voltage offset. Any error in the center tap reconstruction using resistors  24  (for example, due to resistive mismatch) or any motor construction unbalance (for example, due to coil asymmetry), can introduce an unwanted voltage offset in the voltage across the undriven winding.  FIG. 2  shows an ideal example of the MI voltage sensed on the undriven motor terminal for motor  12  as well as the locations where the comparator  22  can make an accurate zero-crossing detection.  FIG. 3 , however, shows the effect of the mutual inductance voltage offset  30  on the voltage across the undriven winding which shifts the position of the zero-crossing detection (referred to as a zero-cross position error) relative to the ideal case of  FIG. 2 . The mutual inductance voltage offset can make the mutual inductance zero-crossing (MIZC) detection unreliable, and in a worst case scenario the MIZC detection is not guaranteed at all. In either case, detection of rotor position is compromised. 
         [0009]    There is a need in art to account for the mutual inductance voltage offset in order to make an accurate MIZC detection. 
       SUMMARY 
       [0010]    In an embodiment, a control circuit is provided for controlling the operation of a brushless DC (BLDC) sensorless motor having a first terminal connected to a first winding, a second terminal connected to a second winding and a third terminal connected to a third winding. The control circuit comprises: a driver circuit configured to apply drive signals to the first and second terminals and place the third terminal in a high-impedance state; wherein the drive signals generated by the driver circuit include first drive signals at a first current amplitude and a second drive signals at a second current amplitude different from the first current amplitude; and a differencing circuit configured to sense a first mutual inductance voltage at the third terminal in response to the first drive signals and sense a second mutual inductance voltage at the third terminal in response to the second drive signals, said differencing circuit further configured to determine a difference between the first and second mutual inductance voltages and produce a difference signal. 
         [0011]    In an embodiment, a control circuit for controlling operation of a brushless DC (BLDC) sensorless motor having a first terminal connected to a first winding, a second terminal connected to a second winding and a third terminal connected to a third winding comprises: a drive control circuit configured to control the generation of drive signals to the first and second terminals and place the third terminal in a high-impedance state; wherein the drive signals include first drive signals at a first current amplitude and second drive signals at a second current amplitude different from the first current amplitude; and a differencing circuit configured to sense a first mutual inductance voltage at the third terminal in response to the first drive signals and sense a second mutual inductance voltage at the third terminal in response to the second drive signals, said differencing circuit further configured to determine a difference between the first and second mutual inductance voltages and produce a difference signal. 
         [0012]    In an embodiment, a control circuit for controlling operation of a brushless DC (BLDC) sensorless motor having a first terminal connected to a first winding, a second terminal connected to a second winding and a third terminal connected to a third winding comprises: a logic circuit configured to control the generation of drive signals for application to the first and second terminals and place the third terminal in a high-impedance state, wherein the drive signals include first drive signals at a first current amplitude and second drive signals at a second current amplitude different from the first current amplitude; an analog-to-digital converter configured to sense a first mutual inductance voltage at the third terminal in response to the first drive signals to generate a first digital signal and sense a second mutual inductance voltage at the third terminal in response to the second drive signals to generate a second digital signal; said logic circuit further configured to determine a difference between the first and second digital signals and produce a difference signal indicative of a difference between the first and second mutual inductance voltages. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0013]    The foregoing and other features and advantages will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings, among which: 
           [0014]      FIG. 1  shows a prior art control circuit for a brushless DC (BLDC) sensorless motor; 
           [0015]      FIG. 2  shows an ideal example of a mutual inductance voltage on an undriven winding of a motor; 
           [0016]      FIG. 3  shows the effect of a mutual inductance voltage offset on the mutual inductance voltage across the undriven winding of the motor; 
           [0017]      FIG. 4  shows a control circuit for a BLDC sensorless motor with mutual inductance voltage offset compensation; 
           [0018]      FIG. 5  shows the effect of the mutual inductance voltage offset on the voltage across the undriven winding for two different current amplitudes; 
           [0019]      FIGS. 5A and 5B  illustrate winding current with two different magnitudes; 
           [0020]      FIG. 6  shows the result of determining the difference between the mutual inductance voltages for the two different currents; 
           [0021]      FIG. 7  illustrates details of an analog implementation of  FIG. 4 ; 
           [0022]      FIGS. 8-10  illustrate details of digital implementations of  FIG. 4 ; 
           [0023]      FIGS. 11A and 12A  show waveforms for a start-up procedure of the implementation of  FIG. 1 ; 
           [0024]      FIGS. 11B and 12B  show waveforms for a start-up procedure of the implementation of  FIG. 4 ; 
           [0025]      FIG. 13A  illustrates prior art operation; and 
           [0026]      FIG. 13B  is a waveform for operation with respect to a single drive current amplitude for zero-crossing detection. 
       
    
    
     DETAILED DESCRIPTION 
       [0027]    The same elements have been designated with the same reference numerals in the different drawings. In particular, the structural and/or functional elements common to the different embodiments may be designated with the same reference numerals and may have identical structural, dimensional, and material properties. For clarity, only those steps and elements which are useful to the understanding of the described embodiments have been shown and will be detailed. In particular, the circuits powered by the power converter have not been detailed, the described embodiments being compatible with usual applications. In the following description, when reference is made to terms “about”, “approximately”, or “in the order of”, this means to within 10%, preferably to within 5%. 
         [0028]    Reference is now made to  FIG. 4  showing a control circuit  110  for a BLDC sensorless motor  12  with mutual inductance voltage offset compensation. Like reference numbers refer to like or similar components or features in  FIG. 1  and will not be further described. The description of  FIG. 1  presented above is incorporated here by reference. The driver  110  of  FIG. 4  differs from the driver  10  of  FIG. 10  mainly with respect to the inclusion of a mutual inductance (MI) voltage difference detection circuit  112  and provision with respect to the logic circuit  118  and driver circuit  114  to drive the motor  12  with different current amplitudes. The logic circuit  118  include a drive control circuit for generating drive control signals applied to control operation of the driver circuit  114 . In  FIG. 4 , the MI voltage difference detection circuit  112  includes a first input coupled to the output of the MUX circuit  20  and a second input coupled to the reference node  26 . The comparator  22  has a first input coupled to an output of the MI voltage difference detection circuit  112  and a second input coupled to receive a reference voltage Vref. 
         [0029]    The control circuit  110  may be implemented as an integrated circuit comprising one or more chips in a single package. It will further be understood that the driver circuit  114  may be implemented “off-chip” using discrete transistor devices in half-bridge circuit configurations as known in the art. The circuitry of MUX circuit  20 , MI voltage difference detection circuit  112  and comparator  22  may be implemented as mixed analog/digital domain circuits on one or more chips. In certain embodiments, as much of the signal processing as possible is preferably implemented in the digital domain. Appropriate analog-to-digital converter and digital-to-analog converter circuitry would be provided to convert the signals between the analog/digital domains. 
         [0030]      FIG. 5  shows the effect of the mutual inductance voltage offset on the voltage across the undriven winding for two different current amplitudes (referenced as a “high” current (MI 1 ) and a “low” current (MI 2 ) to indicate their relative magnitudes or maximum amplitudes) in driving operation of the motor. It will be noted that the mutual inductance voltage across the undriven winding of the motor  12  has a modulation amplitude that is a function of the magnitude of the current flowing through the two driven windings of the motor. Additionally, it will be noted that the mutual inductance voltage offset  30  on the voltage across the undriven winding is independent of the magnitude of the current flowing through the two driven windings of the motor. The logic circuit  118  and driver circuit  114  function in  FIG. 4  to drive the motor  12  with different current amplitudes (high and low, for example), while the mutual inductance (MI) voltage difference detection circuit  112  functions to determine the difference between the mutual inductance voltages for the two different currents. 
         [0031]      FIG. 5A  shows the applied winding current.  FIG. 5B  shows detail of the applied winding current to more explicitly show that the winding current includes a relative higher magnitude current and a relatively lower magnitude current that is applied to the winding. The different current amplitudes (high and low) are obtained by forcing a current decay (for example, acting on the current limiter circuit) for a certain time. In  FIG. 5B , the high current point and the low current point generate two different mutual inductance voltages (MI 1  and MI 2 ), respectively. 
         [0032]      FIG. 6  shows the result of determining the difference between the mutual inductance voltages for the two different currents. The mutual inductance voltage offset  30 , which is shared in common at a same magnitude for each of the mutual inductance voltages MI 1  and MI 2  at the two different currents, is canceled by the differencing operation performed by the mutual inductance (MI) voltage difference detection circuit  112 . The result of the differencing operation is shown by waveform MI 1 -MI 2  which is applied to the first input of the comparator circuit  22  for comparison against the reference voltage Vref (which comprises, for example, a null voltage). The signal at the output of the MI voltage difference detection circuit  112  (i.e, MI 1 -MI 2 ) is a “sign” signal that is either positive or negative, and the null reference voltage is used for the sign comparison. The comparator circuit  22  functions as the zero-crossing detector to generate the zero-crossing detection signal  28 . Notably, the detected zero-cross positions are, in the case of the waveform MI 1 -MI 2 , accurate since the zero-cross position error has been compensated by the operation of the mutual inductance (MI) voltage difference detection circuit  112  (compare to ideal case of  FIG. 2 ). 
         [0033]    It will further be noted that the zero-crossing event coincides with instances wherein the MI 1  and MI 2  waveforms cross over each other. In other words, the zero-crossing event coincides with instances where the mathematical difference between MI 1  and MI 2  changes sign. This sign change can be detected by the voltage difference detection circuit  112  and output as the zero-crossing signal. Examples of implementations of the described operation are presented below. 
         [0034]    It will be understood that the illustration of the MI voltage difference detection circuit  112  and comparator circuit  22  as separate from the logic circuit is by example only. Indeed, the functionalities performed by these circuits may be implemented within the logic circuit itself if desired. Indeed, much of the signal processing operations could be performed in a microprocessor or microcontroller circuit which implements all or part of the logic circuit  118 , the MI voltage difference detection circuit  112  and comparator circuit  22 . Appropriate analog-to-digital converter and digital-to-analog converter circuitry would be provided to convert the signals between the analog/digital domains. 
         [0035]    The functionality of the mutual inductance (MI) voltage difference detection circuit  112  can be implemented in a number of ways using either analog or digital circuitry. 
         [0036]    An example of an analog circuit implementation is shown in  FIG. 7 . The MI 1  voltage is sampled and stored using the sample and hold (S&amp;H) circuit and is compared with the voltage MI 2  using a differencing circuit (Diff) after a certain time. Of course, the voltage MI 1  and the voltage MI 2  on the undriven winding must be generated using two different driven winding current amplitudes, and this is effectuated through the operation of the logic circuit and driver circuit as discussed above. The voltages MI 1  and MI 2  are the analog voltages across the undriven winding as output by the operational amplifier (OpAmp) with reference to the voltage at the reference node  26 . When the output of the comparator changes state, this is indicative of a change in sign with respect to the difference between the voltage MI 1  and the voltage MI 2  provides information regarding the MI zero-cross detection. In this implementation the logic circuit not only provides the control signal S for selecting the undriven terminal through the MUX, but also provides a control T for timing the sample and hold function to capture either the voltage MI 1  and the voltage MI 2 . 
         [0037]    An example of a digital circuit implementation is shown in  FIG. 8 . In this circuit the MI 1  voltage is measured using the OpAmp and the analog to digital converter (ADC) circuit. The MI 2  voltage is also measured using the OpAmp and the ADC circuit at a different time. The ADC circuit further receives a fixed ADC reference voltage (for example, a ground voltage), and because of this the OpAmp is included to reconstruct the differential voltage across the winding. Of course, the voltage MI 1  and the voltage MI 2  on the undriven winding must be generated using two different driven winding current amplitudes, and this is effectuated through the operation of the logic circuit and driver circuit as discussed above. The digital values for the MI 1  and MI 2  voltages are supplied to the logic circuit which implements the difference determination and performs the zero-crossing detection. So, the MI 1 -M 12  determination is a numeric computation done inside the logic block. 
         [0038]    A further example of a digital circuit implementation is shown in  FIG. 9 . In this circuit the differential voltage across the winding (mutual inductance voltage MI 1  and MI 2 ) is obtained by properly using the reference of the analog to digital converter (ADC) circuit. The use of the center tap voltage as ADC reference voltage allows for reconstruction of the differential voltage across the undriven winding without using the OpAmp circuit, thus reducing the cost of the application. Thus, the numeric voltage at the output of the ADC for application to the logic circuit is the differential voltage between the undriven coil tap and the center tap obtained with a single ADC conversion. Of course, the voltage MI 1  and the voltage MI 2  on the undriven winding must be generated using two different driven winding current amplitudes, and this is effectuated through the operation of the logic circuit and driver circuit as discussed above. This circuit does not use the OpAmp circuit as shown in  FIG. 8 . 
         [0039]    Another example of a digital circuit implementation is shown in  FIG. 10 . In this circuit, the voltage difference on the undriven winding is obtained by a numeric difference. Each MI voltage (MI 1  and MI 2 ) is then obtained by two analog to digital converter (ADC) conversion operations performed in fast sequence where the first ADC conversion is applied to the tap of the undriven coil selected by MUX 1 , and the second conversion is applied to the center tap voltage selected by MUX 2 . Of course, the voltage MI 1  and the voltage MI 2  on the undriven winding must be generated using two different driven winding current amplitudes, and this is effectuated through the operation of the logic circuit and driver circuit as discussed above. The digital values for the MI 1  and MI 2  voltages are supplied to the logic circuit which implements the difference determination and performs the zero-crossing detection. So, the MI 1 -MI 2  determination is a numeric computation done inside the logic block. The ADC circuit further receives a fixed ADC reference voltage (for example, a ground voltage). 
         [0040]    The foregoing advantageously permits cancellation of the mutual inductance voltage offset without the necessity of actually measuring the mutual inductance voltage offset. 
         [0041]      FIGS. 11A and 11B  show waveforms for start-up procedures, with  FIG. 11A  showing operation of the prior art circuit  10  of  FIG. 1  and  FIG. 11B  showing operation of the circuit  110  of  FIG. 4 .  FIG. 11A  illustrates the mutual inductance zero-cross (MIZC) signal as being affected by imprecise (spurious) commutations  90  (due to the mutual inductance voltage offset).  FIG. 11B , on the other hand, illustrates that the difference determination for the MI 1 -MI 2  zero-cross signal is instead without any imprecise commutations  92  (because the mutual inductance voltage offset has been compensated). 
         [0042]      FIGS. 12A and 12B  likewise show waveforms for start-up procedures, with  FIG. 12A  showing operation of the prior art circuit  10  of  FIG. 1  and  FIG. 12B  showing operation of the circuit  110  of  FIG. 4 .  FIG. 12A  shows in more detail the imprecise (spurious) commutations  90  present in the mutual inductance zero-cross (MIZC) signal due to the offset.  FIG. 12B , on the other hand, shows that the spurious commutations are not present in the difference MI 1 -M 12  zero-cross signal. 
         [0043]    The foregoing describe how to cancel the effect of the mutual inductance voltage offset without the necessity to directly measure the offset amplitude itself (the offset is automatically cancelled by the MI 1 -MI 2  computation). 
         [0044]    The mutual inductance voltage offset measurement is anyway possible thanks to the following characteristic: The MI voltage offset is equal to the MI 1  and/or MI 2  voltage value measured in the MI 1 -MI 2  Zero cross position (see,  FIG. 5 ). Thanks to the above characteristic, it is possible to measure the voltage offset during the motor driving commutations based on the MI 1 -MI 2  zero cross. In other words, any time the MI 1 -MI 2  zero cross is detected, the MI 1  (or MI 2 ) value is stored (in a memory, for example, see  FIGS. 7-10  storing MI value at zero cross). The stored value corresponds to the mutual inductance voltage offset and can be used as described herein. 
         [0045]    The knowledge of the mutual inductance offset value allows for use of a mutual inductance zero cross detection by the logic circuitry without the necessity of the double mutual inductance voltage measurement (MI 1  and MI 2 ) and computation of the difference (MI 1 -MI 2 ). This allows further advantages on the BLDC driving technique. 
         [0046]    Knowing the offset value it is possible to use a single mutual inductance voltage (MI 1 , for example) in a further operational mode to detect the mutual inductance voltage zero cross, in other words it is not required for two different current amplitudes to be used to generate MI 1  and MI 2  with an advantage in terms of current ripple. The logic circuit thus need only control the driver circuit to generate a single current amplitude and the mutual inductance voltage in response to that current amplitude is obtained (and perhaps stored if needed) for comparison against the previously stored value associated with the zero cross detection. 
         [0047]    Knowing the voltage offset, the zero cross is simply obtained by comparing the MI 1  voltage with the offset (MI 1 -Offset). 
         [0048]      FIG. 5A  shows the current ripple generated by the high current and low current conditions (required for MI 1  and MI 2  generation). Knowing the voltage offset, however, means that the two different current amplitudes are no longer necessary. The current ripple can then be minimized with advantages in term of average current and acoustic noise generation. The driver can accordingly operate with only the higher (or lower) drive amplitude and the ripple associated with use of both current amplitudes is obviated. 
         [0049]    An example of mutual inductance voltage offset measure (during the first driver commutations) and the usage of the voltage offset is shown in  FIG. 13B .  FIG. 13A  shows the BLDC startup procedure based on the MI 1  zero cross (as in the prior art) with imprecise (spurious) commutations  90  while  FIG. 13B  shows the startup instead based on the MI 1 -Offset zero cross without any imprecise commutations  92 .  FIG. 13A  further shows performance using a prior art method based on the undriven winding differential voltage zero cross, such as in the prior art method showed in  FIG. 1 . 
         [0050]    In  FIG. 13B , it is evident how the embodiments herein are able to guarantee a very accurate zero cross detection in comparison to the prior art method. It is also evident the advantage of the offset measurement to minimize the current ripple for a minimum time. 
         [0051]    Various embodiments have been described. Various alterations, modifications, and improvements will readily occur to those skilled in the art. Further, the practical implementation of the embodiments which have been described is within the abilities of those skilled in the art based on the functional indications given hereabove.