Abstract:
A differential amplifier including circuit means for generating a tail current which is not only porportional to absolute temperature, but also is adjusted to compensate for the non-ideal transistor geometries and properties, including finite beta and non-zero, temperature-dependent intrinsic resistances, so as to result in an amplification ratio which is substantially independent of all component variations.

Description:
FIELD OF THE INVENTION 
     This invention relates to differential amplifier circuits, and, more particularly, gain-compensated differential amplifier circuits. 
     BACKGROUND OF THE INVENTION 
     The differential amplifier is a very common circuit configuration used to amplify the difference voltage between two input signals. In the ideal case, the output is entirely independent of the individual signal voltages and is dependent only on their difference. Differential amplifiers are widely used in applications where weak signals are to be amplified, particularly weak signals which may be contaminated by common-mode noise. They are universally used in operational amplifiers and are very important in DC amplifier design. Referring to FIG. 1, a schematic circuit diagram is shown for a classic bipolar transistor differential amplifier 10, or &#34;long-tail pair&#34;, having a single-ended output. 
     The differential gain, G, of a differential amplifier and its temperature stability, dG/dT, are typically parameters of great significance in its design and use. The differential mode gain G for the circuit of FIG. 1, taking into account finite current gain (beta) and finite emitter and base resistances for transistors 12 and 14 (which are assumed to be matched), is given by the equation 
     
         G=R.sub.c /2(r+r.sub.e), 
    
     where R c  is the resistance of the collector load resistor 13; r e  is the intrinsic &#34;electronic&#34; emitter resistance, kT/qI, of each of the transistors 14 and 12, where k is Boltzmann&#39;s constant, T is the absolute temperature, q is electronic charge, and I is half of the tail current in the lead 18; and r is the total ohmic emitter resistance, r=r ee&#39;  +r bb&#39;  /(beta), r ee&#39;  being the emitter resistance, r bb&#39;  being the base resistance and (beta) being the current gain of each transistor. 
     Many temperature-dependent factors appear in the foregoing equation. The intrinsic emitter resistance obviously is a function of temperature and perfect stabilization of that quantity requires that the tail current be proportional to absolute temperature (PTAT). The base resistance is very temperature-dependent. The ohmic emitter resistance is also temperature-dependent to a lesser degree. Further, these resistance values are very geometry sensitive and can, with R c  and beta, vary from wafer to wafer (and lot to lot) in the fabrication process. 
     Accordingly, it is an object of the present invention to provide a differential amplifier with improved temperature stability of gain. 
     Yet another object of the invention is to provide a differential amplifier in which temperature stabilization and gain uncertainty is minimized from lot to lot in the fabrication process. 
     SUMMARY OF THE INVENTION 
     The foregoing and other objects of the invention are achieved in a differential amplifier including tail current generator means for providing a tail current which is PTAT and which includes a component of current which compensates for the ohmic resistances of the transistors and finite beta. This latter component of current is a function of the transistor geometries and therefore compensates automatically for lot-to-lot variations. The tail current generator means includes a current source biased by a ΔV BE  cell which employs device geometries related to those of the transistors in the long-tail pair. 
     The invention will be more fully understood from the following detailed description, which should be read in conjunction with the accompanying drawing, in which like numerals are used to identify like elements. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     In the drawing: 
     FIG. 1 is a schematic circuit diagram of a basic differential amplifier circuit according to the prior art; 
     FIG. 2 is a simplified schematic circuit diagram of a tail current generator according to the present invention, for use with a differential amplifier to achieve temperature-stable gain; and 
     FIG. 3 is a detailed schematic circuit diagram of a gain-compensated differential amplifier according to the present invention. 
    
    
     DETAILED DESCRIPTION 
     In the circuit of FIG. 1, the ideal small signal differential voltage gain (assuming infinite beta transistors and negligible base and emitter resistances) is R c  /2r e . Thus, the actual gain differs from the ideal gain by the factor 1/(1+r/r e ). Using typical values such as r=2.5 ohms and r e  =26 ohms, the small signal gain error, due to the assumption that r&lt;&lt;r e , is about 10 percent. Since r e  is a function of the tail current, an expression can be derived for setting the tail current to a value which will restore the gain to the idealized value. This expression is 
     
         2I=2GVt/Rc(1-2Gr/Rc)                                       (18) 
    
     where G is the desired gain and V T  is the thermal voltage, kT/q. If r were known, it would be a simple matter to raise the tail current by the appropriate factor. However, this ohmic resistance is not easy to measure and, in any event, it varies significantly from one production lot to the next. A design is needed, therefore, which is self-compensating. 
     A first consideration in the design of a gain-stable, temperature-compensated long-tail pair is the requirement that the tail current be PTAT in order to make the intrinsic emitter resistance constant. For this purpose, the ΔV BE  cell 20 of FIG. 2 is used to bais a current source 22 for generating the tail current, 2I. The use of a ΔV BE  cell as means to generate a tail current which is PTAT is well documented in the literature, as prior art. The current source comprises a common-emitter NPN transistor 24 having an emitter resistor 26, of resistance R e , connected to the negative supply (or ground, if a single-sided supply is used). The ΔV BE  cell 20 is formed by a pair of transistors 28 and 32, a first emitter resistor 34 and a second emitter resistor 36. Transistor 32 has a unit-area emitter, transistor 28 has an emitter area of A units, and transistor 24 has an emitter area of M units. Transistors 28 and 32 are driven to equal current densities by a high-gain feedback circuit 38, which forces an appropriate base voltage. Under the assumption that the differential amplifier is an ideal amplifier, half of the tail current is given by the formula ##EQU1## If the ohmic emitter resistances are included, though, and the assumption is made that the smaller transistor, transistor 32, has an emitter resistance r and the larger device, transistor 28, emitter resistance r/A, then the equation for I becomes ##EQU2## 
     The denominator of equation 40 will readily be seen to have the same form as that of equation 18; it will further be seen that algebraic manipulation yields the equation ##EQU3## 
     The area ratio A may be chosen to suit the V BE  requirements, but is usually much greater than unity, so the term (1-1/A) is not very dependent on A. Since r appears on both sides of the equation, it may be eliminated. Rearranging shows that the primary control is in the ratio R g  /R c  : ##EQU4## Thus in theory, once G, A, and R c  are chosen, R g  can be selected to achieve compensation. 
     Most of the long-tail pair transistors&#39; internal resistance arises in R bb&#39; , in the bases; R ee&#39;  is usually much less significant. R bb&#39;  is not only troublesome because of its effect on the gain of the long-tail pair (since it appears as R bb&#39;  /beta in the emitter circuit, and is often comparable to the electronic r e ), but also because it introduces noise. R bb&#39;  also has an impact on the bandwidth; the higher R bb&#39; , the lower the amplifier bandwidth. Minimization of R bb&#39;  is thus desirable. To minimize R bb&#39; , the transistor geometry should have narrow emitter stripes and base contacts spaced as closely as possible to the emitter edge. A nominal value of R bb&#39;  for such a transistor, for example, may be about 57 ohms. However, R bb&#39;  may well be subject to a large tolerance. For example, a design nominally intended to yield 57 ohms could produce an R bb&#39;  equal to 80 ohms. If the long-tail pair is designed to have a nominal 10 dB gain and the transistors have a minimum beta of 65, then even with negligible R ee&#39; , the actual gain may be as low as 9.54 dB, which is a considerable deviation from the designed gain. Trimming could restore this gain to the desired value, but only at a specific temperature as R bb&#39;  is very temperature-dependent. Hence it is desirable to compensate for the base-defect error in a more exact way, which tracks with temperature. 
     Use of the ΔV BE  cell makes this possible. The operation of a ΔV BE  cell as means to generate a tail current which is PTAT is well documented in the literature, as prior art. However, this invention shows how, with proper design, this ΔV BE  cell can be used to bias the current source (i.e., transistor 24 and emitter resistor 26) to a point which adds to the tail current a component keyed to and tracking the ohmic resistances associated with the device geometries. 
     In the discussion of FIG. 2 above, a somewhat simiplified analysis was used, assuming, among other things, that series emitter resistors were not used in the long-tail pair and that only intrinsic emitter resistances need be considered. The present invention has greatest utility when series emitter resistors in the long-tail are small (relative to the electronic emitter resistances of the transistors) or are not used, of course, but use of such resistors is not uncommon. The analysis also failed to consider a number of other sources of error. A more rigorous, more generalized circuit model is shown in FIG. 3, which depicts a complete resistance-corrected, gain-compensated differential amplifier according to the invention, with all emitter-related ohmic resistances shown explicitly. 
     Transistor 32 is assumed to have a unit area emitter geometry, with intrinsic emitter resistance r and series emitter resistor 52 (of resistance NR T . The other ΔV BE  cell transistor 28 has emitter area of A units, intrinsic emitter resistance r/A, series resistors 54 (of resistance NR T  /A) and 34 (of resistance R g ). Transistors 28 and 32 operate at the same current density, although different collector currents. The long-tail pair transistors 12 and 14 have N-unit emitter areas, intrinsic emitter resistance r/N and, for generality, series emitter resistors 56 and 58 of resistance R T . The current-source transistor 24 has emitter area of M units, intrinsic emitter resistance r/M and a series emitter resistor 26 of resistance R e  /M. The quiescent collector current for each of the differential amplifier transistors 12 and 14 is intended to be a constant value, I, over some temperature range of interest. As will be seen, this is provided by establishing an appropriate bias voltage on bias line 60 to the base of transistor 24. 
     The transconductance of the long-tail pair, and thus its gain, actually is a function of the collector current, not the tail current. Thus, to set the collector current to the desired value, an increase must be made to the tail current to compensate for finite B. Consequently, the tail current I tail  (i.e., I tail  =2I, as shown in FIG. 1 and FIG. 2), which is also the collector current of transistor 24, must be 2I(1+1/beta). Further, there is a difference between the emitter current I E24  of current source transistor 24 and the tail current I tail  of the long-tail pair. Each of these B-compensation factors amounts to about 1% gain error, with an associated temperature drift of typically 100 ppm/° C. To correctly compensate for this total error, the voltage applied to bias line 60 has to produce across the series combination of emitter resistor 26 and intrinsic emitter resistance r/M a voltage adequate to cause the emitter current in transistor 24, I E24 , to be (1+1/beta) times the tail current, or to a first order approximation (1+2/beta) times the total collector current, 2I. Additionally, the long-tail pair may (and normally would be) driven by an emitter follower on each input (not shown). The differential output resistance of the emitter followers typically introduces another &#34;one-alpha&#34; error for which similar compensation may be provided; in such a situation, the emitter current I E24  should be 2I(1+3/beta), since second-order terms can be ignored. 
     A high-gain feedback circuit 38 between the collectors of transistors 28, 32 and the base of transistor 24 drives transistor 32 via a resistance SRe, where S is a factor chosen to eliminate the beta-dependence in the system. 
     The operation of the ΔV BE  cell 20 is well documented in the literature. It provides on line 60 a drive voltage V bias  which produces PTAT. Assuming the various transistors have reasonably matched current gains, the tail current is thus both PTAT and adjusted (i.e., set to an appropriate level) to account for the characteristics (particularly beta) of the transistors in the differential amplifier and the intrinsic emitter resistance of the current source. 
     Having thus described the inventive concept and an embodiment of the invention, various modifications, alterations and improvements will readily occur to those skilled in the art. Such modifications, alterations and improvements are intended to be suggested though not expressly discussed, as the foregoing detailed description is offered by way of example only and is not intended to be limiting. The invention is limited only by the following claims and equivalents thereto.