Abstract:
The present invention provides a system and method for controlling a solenoid that ensures accurate timing between the enabling of the driving circuit and the activation of the solenoid, while simultaneously providing a two energy level driving scheme to reduce power consumption. The present invention utilizes a single enable signal and supplies the solenoid two different energy levels, a higher “set” level and a lower “hold” level. The generation of these two levels is based on the enabling signal and guarantees that the higher “set” level is present when the solenoid is activated, thereby minimizing undesirable timing jitter.

Description:
[0001]     This application is a continuation of application Ser. No. 10/838,597, filed May 4, 2004, the disclosure of which is hereby incorporated by reference. 
     
    
     BACKGROUND OF THE INVENTION  
       [0002]     Solenoids are widely used to convert electrical energy into mechanical movement and, due to their utility, are used in a wide range of applications, from time-critical valves to power locks in automobiles to simple doorbells.  
         [0003]     Briefly, a solenoid consists of an electrical wire, typically circularly wrapped to create a coil. A magnetically conductive rod is placed inside the coil. When current passes through the coil, a magnetic field is created, which causes the rod to move relative to the coil. In numerous embodiments, a biasing member such as a spring is used to return the rod to its inactive state when the current ceases to flow through the coil.  
         [0004]     A simple example of a solenoid is the traditional doorbell. When the user actuates the doorbell, that action connects the coiled wire to the power source, thereby creating a magnetic field within the coiled wire. This field causes a magnetically conductive plunger to move and typically strike a metal tuning plate, which creates the first “ding” sound typically heard. After the doorbell has been released, a biasing member, such as a spring, returns the plunger to its inactive position. In some doorbells, the plunger strikes a second metal tuning plate, creating a second “dong” sound. These same principles apply in more complex applications, such as valves. In that embodiment, the movement of the plunger typically reveals an opening which is normally obstructed by the plunger, thus opening the valve.  
         [0005]     Because of the variety of applications, there are a number of different methods of driving these solenoids. In some cases, cost is the most important factor, while in others, power consumption or speed may be the most important factor.  
         [0006]     A number of different embodiments of solenoid driver circuits are commercially available. In fact, several manufacturers produce integrated circuits that perform this function in a single chip. To conserve power, some embodiments regulate the amount of current that is driven through the coiled wire. One common technique used to do this is to vary the voltage supplied to the solenoid, using a technique known as “chopping”, to insure that the current remains constant. The voltage is varied typically in a sawtooth pattern to limit the current to a predetermined value.  
         [0007]     In other embodiments, a dual energy level driving system is used. It is a well-known characteristic of solenoids that the energy needed to activate the solenoid and cause movement of the rod is greater than the energy needed to hold the rod in this active state. As a result, some circuits utilize two different levels of current or voltage to drive solenoids; a first, or higher, level needed to “set” the solenoid and a second, or lower, level needed to “hold” the solenoid.  
         [0008]     However, in current embodiments, these power saving mechanisms create uncertainty or jitter in the timing of the solenoid. For example, some applications require a precise relationship between the time that the energy is supplied to the coil and the time that the solenoid is activated. By using a simple circuit, which supplies voltage upon the assertion of a specific enabling signal, this predictability can be obtained, however it is not power efficient.  
         [0009]     Circuits that control the current by “chopping” the voltage reduce overall power consumption, but are not as predictable with respect to the time between the enabling of power to the solenoid and the activation of that solenoid, due to the variation in the chopped voltage being supplied to the solenoid.  
         [0010]     Similarly, circuits that implement two different voltage or current levels experience timing variation as well. Typically, these circuits use the enabling signal to indicate that the “set” voltage should be applied. Using a conventional timing delay mechanism, the level is later switched to the lower “hold” voltage. However, since the higher level is being applied as the circuit is being enabled, a race condition can occur in which the sequence of the enabling of the circuit and the application of the higher voltage can be indeterminate. In some instances, the higher voltage will be present when the circuit is enabled, resulting in a fast turn-on time. In other instances, the higher voltage will not be present when the circuit is enabled, but will be present some time thereafter, resulting is a somewhat slower turn-on time.  
         [0011]     In some applications, a capacitor is charged while the solenoid is in the off position. When the solenoid has to be activated, the capacitor&#39;s charge is added to the available supply voltage to ensure rapid switching of the solenoid by creating a high peak current. For this method, timing of the solenoid is only predictable when the pauses between activations are long relative to the capacitor charge rate.  
         [0012]     In many applications, the small difference in timing caused by these power-saving mechanisms has no effect on the operation of the system in which the solenoid is being used. However, there are applications, such as time-critical valve control in the fabrication of integrated circuits, where it is imperative that there be a predictable time period between the enabling of the circuit and the activation of the solenoid. In these applications, circuits typically do not employ any power saving techniques because of the unacceptable timing jitter that results.  
         [0013]     Therefore, it is an object of the present invention to provide a system and method for controlling a solenoid that minimizes the jitter between the enabling of the circuit and the activation of the solenoid, while implementing a dual energy level driving scheme to reduce power consumption.  
       SUMMARY OF THE INVENTION  
       [0014]     The problems of the prior art have been overcome by the present invention, which provides a system and method for controlling a solenoid that ensures accurate timing while simultaneously providing a dual energy level driving scheme to reduce power consumption. The present invention utilizes a single enable signal and supplies the solenoid two different energy levels, a higher “set” level and a lower “hold” level. The generation of these two levels is based on the enabling signal and guarantees that the higher “set” level is present when the solenoid is activated, thereby minimizing timing jitter. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0015]      FIG. 1  is a schematic diagram illustrating one embodiment of the present invention;  
         [0016]      FIG. 2  is a timing diagram illustrating the electrical operation of the present invention; and  
         [0017]      FIG. 3  is a schematic diagram illustrating the pharmaceutical fluid dispensing system of the present invention. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0018]      FIG. 1  is a schematic diagram of the preferred embodiment of the present invention. Variations of this circuit are possible without deviating from the spirit of the invention. The preferred embodiment of the circuit has a power input  11 , a signal input  12  and an output signal  13 .  
         [0019]     The power input,  11 , supplies voltage to the several components in the circuit  10  and to the solenoid  20 . Any suitable power source (not shown) can be used to supply the requisite power input to the circuit  10 . The amount of voltage supplied also is not particularly limited, and can include 24, 12 and 5 volts and is preferably 12 volts.  
         [0020]     The circuit has a single input signal  12  that is used to enable the solenoid  20 . In this embodiment, the circuit  10  allows voltage to be passed to the solenoid  20  via the output signal  13  when the enable signal  12  is a logic high. Alternatively, those skilled in the art will appreciate that the circuit can be designed such that the solenoid  20  is powered when the enable signal  12  is a logic low.  
         [0021]     The circuit  10  has a single output signal  13  that is in communication with the solenoid  20 . The presence of voltage at this output signal  13  allows the solenoid  20  to close, while the absence of voltage at the signal  13  causes the solenoid  20  to open.  
         [0022]     In this embodiment, the power input  11  supplies voltage to a voltage regulator U 1 . This regulator U 1  generates the second lower voltage  101  that is used by the solenoid  20  to hold it in the closed position. Capacitor C 1  is in communication with the output of the voltage regulator to help improve the stability of the output voltage. While the preferred voltage regulator U 1  is a 5V switching regulator with high efficiency to minimize power loss and heat generation, other embodiments are within the scope of the invention. For example, the second lower voltage  101  could be generated using a linear regulator, although the heat generated would be significantly higher. Alternatively, the circuit  10  could have a second power input, created elsewhere in the design, which supplies the lower voltage, without the need to generate it within the circuit.  
         [0023]     A diode D 2  is in series between the output of the voltage regulator U 1  and the input of power switch Q 2 , with the anode of diode D 2  in communication with the voltage regulator U 1  and the cathode of diode D 2  in communication with the power switch Q 2 . The cathode of diode D 2  is also in communication with the output of power switch Q 1 , labeled  104 . Power switches Q 1  and Q 2  represent the preferred embodiment, although other implementations are possible. For example, discrete FET transistors, with their associated protection circuitry, could be utilized to perform the same function. In this embodiment, diode D 2  is a Schottky diode to minimize forward voltage drop, but any diode can be used to implement this circuit.  
         [0024]     The input voltage  11  is also in communication with the input of power switch Q 1  and one lead of resistor R 2 . The opposite lead of resistor R 2 , labeled  102 , is in communication with one lead of resistor R 1 , capacitor C 2  and the input to inverter U 2 , which preferably has a Schmitt trigger type input.  
         [0025]     An inverter with a Schmitt trigger type input is one in which the input voltage at which the output switches in one direction is guaranteed to be measurably higher than the voltage at which the output switches in the other direction. In other words, a typical Schmitt trigger type inverter using a 12 volt supply would cause the output to switch to a low state when the input rises above roughly 7.0 volts. However, the output will not return to the high state until the input drops below roughly 4.7 volts. The difference between these values guarantees that the output of the device will not oscillate while the input voltage is slowly increasing or decreasing.  
         [0026]     The other lead of capacitor C 2  is connected to ground. The other lead of resistor R 1  is in communication with the anode of diode D 1 .  
         [0027]     The output of inverter U 2 , labeled  103 , is in communication with one lead of resistor R 3 . The opposite lead of resistor R 3  is in communication with the enable input of power switch Q 1 .  
         [0028]     Lastly, the cathode of diode D 1  is in communication with the input signal  12  and with one lead of resistor R 4 . The other lead of resistor R 4  is in communication with the enable input of power switch Q 2 . The output of power switch Q 2  is in communication with solenoid  20 .  
         [0029]     The electrical operation of the circuit now will be described with respect to the topology described above.  
         [0030]     Assume signal input  12  is in its low state, in which its voltage is at or near 0 volts. This low voltage forces power switch Q 2  to be disabled, effectively disconnecting its input from its output. In this condition, the output signal  13  is disabled, with no voltage being applied to it by circuit  10 . In addition, the low state of input signal  12  causes current to flow through diode D 1  and resistor R 1 , thereby draining the charge from capacitor C 2 . At steady state, the voltage at the input to inverter U 2  can be expressed as:  
         [0031]     V=0.7V+(12V−0.7V)*R 1 /(R 1 +R 2 ), where 0.7V is the forward voltage drop across diode D 1 .  
         [0032]     This voltage  102  at the input of the inverter is sufficiently low to guarantee that the output of inverter U 2  will be in the high state, which causes power switch Q 2  to be enabled, thereby passing the voltage at its input, 12V, to its output. Since this voltage is much higher than the output of voltage regulator U 1 , diode D 2  does not conduct. Thus, although power switch Q 2  is disabled, its input is being supplied with 12V while in the off state. The states of the various voltages in the circuit at this point are shown in  FIG. 2 , at time  200 .  
         [0033]     When the input signal  12  switches from 0 volts to 12 volts, power switch Q 2  is enabled, thereby passing the voltage at its input to its output. As previously described, its input will be 12 volts when the power switch is first enabled. This is shown at time  201  in  FIG. 2 .  
         [0034]     The high voltage of input signal  12  causes diode D 1  to stop conducting current, thereby eliminating the discharge path for capacitor C 2 . Since diode D 1  is no longer conducting, capacitor C 2  begins charging, as it receives current from the input voltage via resistor R 2 . As the capacitor charges, the voltage at the input to inverter U 2  increases, at a rate determined by the values of R 2  and C 2 . The charge rate is calculated to be sufficiently long so as to ensure that the higher voltage is applied to the solenoid long enough to bring it fully into the “set” position, including possible mechanical bounce and other phenomena. A charge rate equal to, or greater than, this value is preferable. When the voltage reaches a sufficiently high level, the output of inverter U 2  will become low, thereby disabling power switch Q 1 . Since power switch Q 1  is disabled, it no longer supplies the 12 volts signal to its output. Since this voltage is no longer present, diode D 2  conducts, allowing the output of the voltage regulator U 1  to be placed at the input of power switch Q 2 . Since power switch Q 2  is enabled, this lower voltage flows directly to solenoid  20 . This is depicted at time  202  in  FIG. 2 .  
         [0035]     The circuit will remain in this state until the input signal  12  transitions again. When input signal  12  transitions back to the low state, the power switch Q 2  will immediately turn off, since it has been disabled, as shown at time  203  in  FIG. 2 . Diode D 1  will begin conducting current, thereby discharging capacitor C 2 . The rate of discharge is determined by the values of R 1  and C 2 , and will typically be selected to allow rapid discharge of the capacitor while observing the maximum load current rating of the device that is driving the input  11 . When the capacitor is sufficiently discharged, the input of inverter U 2  is be sufficiently low to cause the output of inverter U 2  to transition to its high state, thereby enabling power switch Q 1 . This allows the input voltage  11  to be delivered to the input of power switch Q 2  in preparation for the next transition of input signal  12 . This is shown at time  204  in  FIG. 2 .  
         [0036]     While this embodiment utilizes two different voltage levels to set and hold the solenoid, the invention is not limited to only this embodiment. For example, replacing the two voltage levels with two different current sources is within the skill of the art and would achieve the same result.  
         [0037]     The invention described herein is used in a pharmaceutical fluid dispensing system in which a sterile liquid is measured and dispensed with high accuracy. A representative system is shown in  FIG. 3 . This system uses a pair of pinch valves to measure liquid volume in a disposable component. These pinch valves are driven by solenoids. Timing of the pinch valves is critical to the application, as it determines the liquid volume. Even small fluctuations can upset the volume to be dispensed. Since solenoid timing is sensitive to the applied voltage, a constant nominal voltage must be applied to activate the valve solenoid. However, since temperature also affects solenoid timing, self-heating of the valves has to be minimized when in the active state. Thus, dual voltage operation becomes necessary.  
         [0038]     Since accuracy of valve activation by the solenoid is the overriding criterion, it is imperative that a stable supply voltage is present when needed. Ramp-up delay cannot be tolerated.  
         [0039]     In actual implementation of this invention, it has been demonstrated that valve heating can be maintained at a sufficiently low level without any negative impact on valve timing due to voltage switching.  
         [0040]     Referring to  FIG. 3 , there is generally shown at  110  a pharmaceutical fluid dispensing system. System  110  includes a fluid chamber  112 , which is filled from the fluid source  118 , via supply line  116 . A level controller  122  monitors the level of fluid in the chamber  112 , and if the level falls below a predetermined threshold, a controller (not shown) opens supply valve  120  by actuating supply solenoid  121 .  
         [0041]     Chamber  112  contains an outlet  124  and an inlet  138 . The controller (not shown) actuates solenoid  131 , which in turns opens outlet solenoid  130 . Drain tube  126  is in communication with fill tube  136  and drain valve  128 . Fill tube  136  forms a closed loop between inlet  138 , chamber  112  and outlet  124 , thus eliminating the need for venting. The Drain valve  128  controls the precision release of pharmaceutical fluid and is controlled by drain solenoid  129 , which is activated by the controller (not shown). Because of the level of precision required, drain solenoid  129  and supply solenoid  131  are driven by the present invention as described in reference to  FIG. 1 . In the preferred implementation, supply valve  130  and drain valve  128  are integrated with their respective solenoids  131  and  129  in the form of electrically actuated valves.  
         [0042]     In the present implementation, this invention is used to drive up to eight valves independently, requiring only one power supply and one regulator. It is a feature of this invention that timing of the voltage switching is independent for each circuit when more than one solenoid has to be operated. Any number of solenoids can be driven by multiplying the circuit accordingly.  
         [0043]     Related patents are U.S. Pat. Nos. 5,680,960 and 5,480,063 by Denis Keyes et al, describing a volumetric fluid dispensing apparatus, the disclosures of which are hereby incorporated by reference.