Abstract:
A power clamping circuit with temperature compensation is disclosed. The power clamping circuit, for a system voltage, includes a first diode, a resistor with a positive temperature coefficient, a second diode, a comparator including a negative input terminal coupled to an anode of the first diode and a positive input terminal coupled to the resistor with the positive temperature coefficient, a transistor including a gate coupled to an output terminal of the comparator, a drain coupled to the system voltage and a source coupled to the ground, a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a power clamping circuit with temperature compensation, and more particularly, to a power clamping circuit capable of generating a system voltage with a substantially zero temperature coefficient via adjusting a resistance ratio. 
     2. Description of the Prior Art 
     A traditional power clamping circuit may be a single Zener diode, or composed of several cascaded transistors. Please refer to  FIG. 1A  and  FIG. 1B , which are schematic diagrams of two types of power clamping circuits  10  and  15 . As shown in  FIG. 1A , a cathode of a Zener diode VZ is coupled to a system voltage V BAT , and an anode of the Zener diode VZ is coupled to a ground to form a reverse bias on the Zener diode VZ. As well known in the art, when the reverse bias, i.e. the system voltage V BAT , is greater than a breakdown voltage of the Zener diode VZ, a breakdown current is generated on the Zener diode, and the breakdown current flows to the ground to decrease the reverse bias to be lower than the breakdown voltage. As a result, as long as the breakdown voltage of the Zener diode VZ is properly chosen, the system voltage V BAT  may be limited to be lower than the breakdown voltage to achieve power clamping. 
     Similarly, as shown in  FIG. 1B , the power clamping circuit  15  is composed of transistors M 1 -M M , when the system voltage V BAT  is greater than a sum of threshold voltages V 1 -V M  of the transistors M 1 -M M , the transistors M 1 -M M  are turned on to decrease the system voltage V BAT  to be lower than the sum of the threshold voltages V 1 -V M  to achieve power clamping. 
     However, the above traditional power clamping circuits are both susceptive to temperature. Thus, the breakdown voltage of the Zener diode varies with the temperature. Moreover, the threshold voltages V 1 -V M  of the transistor M 1 -M M  increase as the temperature decreases, i.e. a negative temperature coefficient. When the temperature is high, the transistors M 1 -M M  are easily turned on to perform the power clamping to the system voltage V BAT . In other words, the system voltage V BAT  may be much lower when the temperature is high, which may reduce an operating efficiency of a system load. Therefore, there is a need to improve the prior art to mitigate temperature influence on the power clamping circuit. 
     SUMMARY OF THE INVENTION 
     It is therefore an object of the present invention to provide a power clamping circuit with temperature compensation. 
     The present invention discloses a power clamping circuit with temperature compensation for a system voltage, including a first diode having an anode and a cathode, the cathode coupled to a ground, for generating a voltage with a negative temperature coefficient, a resistor with a positive temperature coefficient, a second diode having an anode coupled to the resistor with the positive temperature coefficient and a cathode coupled to the ground, a comparator having a negative input terminal coupled to the anode of the first diode and a positive input terminal coupled to the resistor with the positive temperature coefficient, a transistor having a gate coupled to an output terminal of the comparator, a drain coupled to the system voltage and a source coupled to the ground, a first resistor coupled to the system voltage, a second resistor coupled between the first resistor and the resistor with the positive temperature coefficient, a third resistor coupled between the first resistor and the anode of the first diode, a fourth resistor coupled between the positive input terminal of the comparator and the ground, and a fifth resistor coupled between the negative input terminal of the comparator and the ground. 
     These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1A  is a schematic diagram of a traditional power clamping circuit. 
         FIG. 1B  is a schematic diagram of another traditional power clamping circuit. 
         FIG. 2  is a schematic diagram of a power clamping circuit according to an embodiment of the present invention. 
         FIG. 3  is a schematic diagram of the system voltage of the power clamping circuit in  FIG. 2  corresponding to different temperatures. 
     
    
    
     DETAILED DESCRIPTION 
     Please refer to  FIG. 2 , which is a schematic diagram of a power clamping circuit  20  according to an embodiment of the present invention. As shown in  FIG. 2 , the power clamping circuit  20  includes resistors R 1 -R 4 , R 1 ′ and R 3 ′, diodes D 1  and D 2 , a comparator  200  and a transistor  202 . The resistors R 1   1 , R 3 ′ have the same resistances of the resistors R 1 , R 3 , respectively. The comparator  200  may be an operational amplifier and may further include a power-OK unit  204  for ensuring an operation of the comparator  200  to avoid wrong action when a system voltage V BAT  is relative low. Resistors have positive temperature coefficients, and diodes have negative temperature coefficients. Thus, a voltage or a current signal with a combination of positive and negative temperature coefficients may be obtained by cascading a resistor with a diode. In such a situation, the resistor R 2  is cascaded to the diode D 1  and coupled to a positive input terminal of the comparator  200 , such that the positive input terminal of the comparator  200  receives a voltage V p  having a combination of positive and negative temperature coefficients. The resistor R 1 ′ and the diode D 2  are coupled to a negative input terminal of the comparator  200 , such that the negative input terminal of the comparator  200  receives a voltage V N  having a combination of positive and negative temperature coefficients. 
     As a result, by properly selecting resistances of the resistors R 1 -R 4 , R 1 ′, R 3 ′ and emitter areas of the diode D 1 , D 2 , the positive and negative coefficients of the voltages V P  and V N  may be balanced or canceled, and the comparator  200  may compare the voltage V P  with the voltage V N  to perform power clamping. When system voltage V BAT  is greater than a clamping voltage, the voltage V OUT  may be used for turning on the transistor  202 , such that an overcurrent I BAT  on the system voltage V BAT  flows through the transistor  202  to the ground to decrease the system voltage V SAT , which achieves power clamping. 
     Noticeably, the power clamping circuit  20  is designed based on a bandgap circuit. Since the bandgap circuit has a feedback characteristic, the transistor  202  may be automatically turned on and off as the temperature and system voltage V SAT  varies, so as to reach automatic power clamping. The following description illustrates the operation of the power clamping circuit  20  via detailed current and voltage analysis. 
     Assume that the resistor R 2  has a cross voltage V BE , the diode D 1  has a cross voltage V D , and the voltage V P  is a sum of the cross voltages V BE  and V D , i.e. V P =V BE +V D . Also assume that there are currents I 1 -I 4  respectively flowing through the resistors R 1 -R 4 . According to the Ohm&#39;s Law, the currents I 1  and I 2  may be written as: 
     
       
         
           
             
               
                 
                   
                     
                       I 
                       1 
                     
                     = 
                     
                       
                         
                           V 
                           BE 
                         
                         + 
                         
                           V 
                           D 
                         
                       
                       
                         R 
                         1 
                       
                     
                   
                   , 
                   
                     
                       I 
                       2 
                     
                     = 
                     
                       
                         V 
                         BE 
                       
                       
                         R 
                         2 
                       
                     
                   
                 
               
               
                 
                   ( 
                   1 
                   ) 
                 
               
             
           
         
       
     
     In general, input impedances of the positive and negative input terminals of the comparator  200  are both much greater than the resistances of the resistors R 1 -R 4 , R 1 ′ and R 3 ′, thus, there is no current flowing into the positive and negative input terminals of the comparator  200 , which makes the current I 3  on the resistor R 3  separately flow through the resistors R 1  and R 2  to the ground, i.e. I 3 =I 1 +I 2 . Furthermore, the resistor R 4  is coupled between the system voltage V BAT  and the resistors R 3  and R 3 ′, such that the current I 4  on the resistors R 4 , separately flows through the resistors R 3  and R 3 ′. By properly selecting the resistances of the resistors R 1 -R 3 , R 1 ′ and R 3 ′, the current I 4  may evenly flow through the resistors R 3  and R 3 ′, i.e. I 4 =2(I 1 +I 2 ). 
     As a result, assuming that the system voltage V BAT  of the power clamping circuit  20  is substantially equal to a clamping voltage V REF , i.e. V BAT ≅V REF , and the clamping voltage V REF  may be written as the following formula:
 
 V   REF   ≅V   D   +V   BE   +I   3   R   3   +I   4   R   4   (2)
 
     Substitute I 3 =I 1 +I 2  and I 4 =2(I 1 +I 2 ) into formula (2) and rewrite the clamping voltage V REF :
 
 V   REF   ≅V   D   +V   BE +( I   1   +I   2 )( R   3 +2 R   4 )  (3)
 
     Then, substitute currents I 1  and I 2  of the formula (1) into formula (3) and rewrite the clamping voltage V REF : 
     
       
         
           
             
               
                 
                   
                     
                       V 
                       REF 
                     
                     ≅ 
                     
                       
                         V 
                         D 
                       
                       + 
                       
                         V 
                         BE 
                       
                       + 
                       
                         
                           
                             
                               V 
                               D 
                             
                             + 
                             
                               V 
                               BE 
                             
                           
                           
                             R 
                             1 
                           
                         
                         · 
                         
                           ( 
                           
                             
                               R 
                               3 
                             
                             + 
                             
                               2 
                               ⁢ 
                               
                                 R 
                                 4 
                               
                             
                           
                           ) 
                         
                       
                       + 
                       
                         
                           
                             V 
                             BE 
                           
                           
                             R 
                             2 
                           
                         
                         · 
                         
                           ( 
                           
                             
                               R 
                               3 
                             
                             + 
                             
                               2 
                               ⁢ 
                               
                                 R 
                                 4 
                               
                             
                           
                           ) 
                         
                       
                     
                   
                   ⁢ 
                   
                     
 
                   
                   ⁢ 
                   
                     
                       V 
                       REF 
                     
                     ≅ 
                     
                       
                         
                           V 
                           D 
                         
                         ⁡ 
                         
                           ( 
                           
                             1 
                             + 
                             
                               
                                 
                                   R 
                                   3 
                                 
                                 + 
                                 
                                   2 
                                   ⁢ 
                                   
                                     R 
                                     4 
                                   
                                 
                               
                               
                                 R 
                                 1 
                               
                             
                           
                           ) 
                         
                       
                       + 
                       
                         
                           V 
                           BE 
                         
                         ⁡ 
                         
                           ( 
                           
                             1 
                             + 
                             
                               
                                 
                                   R 
                                   3 
                                 
                                 + 
                                 
                                   2 
                                   ⁢ 
                                   
                                     R 
                                     4 
                                   
                                 
                               
                               
                                 R 
                                 1 
                               
                             
                             + 
                             
                               
                                 
                                   R 
                                   3 
                                 
                                 + 
                                 
                                   2 
                                   ⁢ 
                                   
                                     R 
                                     4 
                                   
                                 
                               
                               
                                 R 
                                 2 
                               
                             
                           
                           ) 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   4 
                   ) 
                 
               
             
           
         
       
     
     As can be seen from formula (4), the clamping voltage V REF  is a combination of the cross voltages V D  and V BE , wherein the cross voltage V BE  has a positive temperature coefficient T UBE  and the cross voltage V D  has a negative temperature coefficient T VD . Percentages of the cross voltage V D  and V BE  in the clamping voltage V REF  may be adjusted by selecting the resistances of the resistors R 1 -R 4 , so as to compensate the temperature coefficients T UBE  and T VD  of the clamping voltage V REF . In other words, the clamping voltage V REF  with the substantially zero temperature coefficient may be obtained by summing the cross voltage V D  and V BE  with proper percentages. The temperature relation in formula (4) can be rewritten as: 
     
       
         
           
             
               
                 
                   
                     
                       ( 
                       
                          
                         
                           T 
                           VD 
                         
                          
                       
                       ) 
                     
                     ⁢ 
                     
                       ( 
                       
                         1 
                         + 
                         
                           
                             
                               R 
                               3 
                             
                             + 
                             
                               2 
                               ⁢ 
                               
                                 R 
                                 4 
                               
                             
                           
                           
                             R 
                             1 
                           
                         
                       
                       ) 
                     
                   
                   ≅ 
                   
                     
                       ( 
                       
                          
                         
                           T 
                           VBE 
                         
                          
                       
                       ) 
                     
                     ⁢ 
                     
                       ( 
                       
                         1 
                         + 
                         
                           
                             
                               R 
                               3 
                             
                             + 
                             
                               2 
                               ⁢ 
                               
                                 R 
                                 4 
                               
                             
                           
                           
                             R 
                             1 
                           
                         
                         + 
                         
                           
                             
                               R 
                               3 
                             
                             + 
                             
                               2 
                               ⁢ 
                               
                                 R 
                                 4 
                               
                             
                           
                           
                             R 
                             2 
                           
                         
                       
                       ) 
                     
                   
                 
               
               
                 
                   ( 
                   5 
                   ) 
                 
               
             
           
         
       
     
     Rearrange formula (5): 
     
       
         
           
             
               
                 
                   
                     
                        
                       
                         T 
                         VD 
                       
                        
                     
                     
                        
                       
                         T 
                         VBE 
                       
                        
                     
                   
                   ≅ 
                   
                     
                       1 
                       + 
                       
                         
                           
                             R 
                             3 
                           
                           + 
                           
                             2 
                             ⁢ 
                             
                               R 
                               4 
                             
                           
                         
                         
                           R 
                           1 
                         
                       
                       + 
                       
                         
                           
                             R 
                             3 
                           
                           + 
                           
                             2 
                             ⁢ 
                             
                               R 
                               4 
                             
                           
                         
                         
                           R 
                           2 
                         
                       
                     
                     
                       1 
                       + 
                       
                         
                           
                             R 
                             3 
                           
                           + 
                           
                             2 
                             ⁢ 
                             
                               R 
                               4 
                             
                           
                         
                         
                           R 
                           1 
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   6 
                   ) 
                 
               
             
           
         
       
     
     Assuming that a resistance ratio K 1  to be 
               K   1     =         R   3     +     2   ⁢     R   4           R   2             
and a resistance ratio K 2  to be
 
                 K   2     =         R   3     +     2   ⁢     R   4           R   1         ,         
and formulas (4) and (6) can simplify as the following:
 
     
       
         
           
             
               
                 
                   
                     V 
                     REF 
                   
                   ≅ 
                   
                     
                       
                         V 
                         D 
                       
                       ⁡ 
                       
                         ( 
                         
                           1 
                           + 
                           
                             K 
                             1 
                           
                         
                         ) 
                       
                     
                     + 
                     
                       
                         V 
                         BE 
                       
                       ⁡ 
                       
                         ( 
                         
                           1 
                           + 
                           
                             K 
                             1 
                           
                           + 
                           
                             K 
                             2 
                           
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   7 
                   ) 
                 
               
             
             
               
                 
                   
                     
                        
                       
                         T 
                         VD 
                       
                        
                     
                     
                        
                       
                         T 
                         VBE 
                       
                        
                     
                   
                   ≅ 
                   
                     
                       1 
                       + 
                       
                         K 
                         1 
                       
                       + 
                       
                         K 
                         2 
                       
                     
                     
                       1 
                       + 
                       
                         K 
                         1 
                       
                     
                   
                 
               
               
                 
                   ( 
                   8 
                   ) 
                 
               
             
           
         
       
     
     In practice, the temperature coefficient T VD  of the diode D 1  is substantially 10 times the temperature coefficient T VBE  of the resistor R 2 , i.e. |T VD |≅10|T VBE |, substitute the value into formula (8) and rearrange to know that K 2 =9K 1 +9. A threshold voltage of the diode D 1 , i.e. the cross voltage V D , is 0.7V, the cross voltage V BE  is 0.055V. Use the above values in formula (7) to obtain the clamping voltage V REF :
 
 V   REF ≅0.7(1 +K   1 )+0.055(1 +K   1   +K   2 )=1.25+1.25 ·K   1   (9)
 
     Noticeably, as can be seen from formula (9), the clamping voltage V REF  may be adjusted to a voltage equal or greater than 1.25V via adjusting the resistance ratio K 1 . Assuming that the system voltage V BAT  of the power clamping circuit  20  is 5V (i.e. V BAT =V REF =5V) and the calculated resistance ratio K 1 =3, K 2 =36, the resistances of the resistor R 1 -R 4  can be further calculated as shown in the Table: 
     
       
         
               
               
               
             
               
               
               
             
           
               
                   
               
               
                   
                 Resistor 
                 Resistance (Unit: K ohm) 
               
               
                   
               
             
             
               
                   
               
             
          
           
               
                   
                 R1 
                 96 
               
               
                   
                 R2 
                 8 
               
               
                   
                 R3 
                 64 
               
               
                   
                 R4 
                 112 
               
               
                   
               
             
          
         
       
     
     Then, use the resistances in the power clamping circuit  20  and simulate an output voltage, or the system voltage, of the power clamping circuit  20  corresponding to different temperatures. Please refer to  FIG. 3 , which is a schematic diagram of the system voltage V BAT  of the power clamping circuit  20  corresponding to different temperatures. As shown in  FIG. 3 , when the temperature increases from −40 degrees Celsius to 150 degrees Celcius, the system voltage V BAT  keeps around 4.94-4.96V, which is close to the predetermined 5V, and the system voltage V BAT  varies only within 0.02V, or a 0.4% voltage variation. As a result, the power clamping circuit  20  may perform voltage stabilization to the system voltage V BAT  regardless of the varying temperature to effectively achieve power clamping. 
     To sum up, the traditional power clamping circuit is deeply influenced by the temperature, and thus fails voltage stabilization under the varying temperature. In comparison, the power clamping circuit the of present invention adjusts the percentages of the positive and negative temperature coefficients voltage in the clamping voltage via properly selecting specific resistance ratios, to mitigate the temperature influence on the power clamping circuit. Furthermore, the resistance ratio is further used for determining the clamping voltage of the power clamping circuit, which broadens an application range of the power clamping circuit to suit for different requirements of different power systems as well. 
     Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.