Abstract:
A photosensor for a display device includes a light receiver, a reset unit, and a sample unit. The light receiver is used for receiving ambient light to generate a photovoltage. The light receiver includes a first transistor and a first conversion unit that transforms the output of the first transistor into the photovoltage. The reset unit is used for providing an initiated reference voltage in response to a reset signal and includes a second transistor and a third transistor that are connected with each other, where the first conversion unit is discharged through the third transistor to obtain the initiated reference voltage when the second transistor is turned on. The sample unit is used for outputting the photovoltage in respond to a sample signal, the sample unit comprising a fourth transistor in respond to the sample signal and a second conversion unit that transforms the output of the fourth transistor into the photovoltage.

Description:
CROSS REFERENCE TO RELATED APPLICATION 
     This application claims priority of application No. 097105669 filed in Taiwan R.O.C on Feb. 19, 2008 under 35 U.S.C. §119; the entire contents of which are hereby incorporated by reference. 
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The invention relates to a photosensor, particularly to a photosensor that is provided in a display device to measure the intensity of ambient light. 
     2. Description of the Related Art 
     It has been suggested that an ambient light sensor is provided in a display device to measure the intensity of ambient light and correspondingly adjust the light intensity of a light source built in the display device. Thereby, optimum display contrast can be achieved and power consumption is allowed to be reduced. 
       FIG. 1  shows an equivalent circuit diagram of a conventional photosensor, and  FIG. 2  shows an exemplary timing chart of input signals for the photosensor  100  shown in  FIG. 1 . Referring to both  FIG. 1  and  FIG. 2 , the photosensor  100  includes a sensor transistor Q 1 , a selection transistor Q 2 , a current-generating transistor Q 3 , an output transistor Q 4 , and a storage capacitor C 1 . The photosensor outputs a sensor current Iout whose magnitude depends on the amount of received ambient light. The sensor transistor Q 1  is supplied with a first voltage VDD and a second voltage VGG. When the selection signal SELECT is in a high level, the selection transistor Q 2  is turned on to electrically connect the sensor transistor Q 1  and the storage capacitor C 1  with the first voltage VDD. At this time, the sensor transistor Q 1  does not generate any photocurrent and the storage capacitor C 1  is initiated to be charged with the first voltage VDD. Then, when the read signal READ is in a high level, the output transistor Q 4  is turned on and outputs the first voltage VDD in response to the read signal READ. On the other hand, when the selection signal SELECT is in a low level, the selection transistor Q 2  is turned off to disconnect the sensor transistor Q 1  and the storage capacitor C 1  from the first voltage VDD. Accordingly, the storage capacitor C 1  begins storing electrical charges to generate the photovoltage that is applied to the current-generating transistor Q 3 . Hence, the magnitude of the sensor current Iout depends on the difference between the photovoltage and the first voltage VDD. Further, when the read signal READ is in a high level, the output transistor Q 4  is turned on and outputs the photovoltage whose magnitude is in proportion to the sensor current Iout. 
     However, according to the above design, the current-generating transistor Q 3  is subjected to a long-term negative bias to cause a shift in the threshold voltage of the transistor Q 3  to damage the transistor Q 3 . Besides, since the voltage at node n 1  is set as the first voltage VDD during each reset operation, the difference between the photovoltage and the first voltage VDD (serving as a reference voltage) is quite small. 
       FIG. 3  shows an equivalent circuit diagram of another conventional photosensor  200 . Referring to  FIG. 3 , the photosensor  200  includes a sensor circuit  202 , a reference voltage generating circuit  204  and a processor  206 . The sensor circuit  202  includes a sensor transistor Q 1 , a reset transistor Q 2 , a switching transistor Q 3  and two capacitors C 1  and C 2 . The reference voltage generating circuit  204  includes a sensor transistor Q 4 , a reset transistor Q 5 , a switching transistor Q 6  and two capacitors C 3  and C 4 . The sensor transistor Q 1  is supplied with a first voltage VDD and a second voltage VGG, and the two capacitors C 1  and C 2  are connected to a third voltage VDC. The photosensor  200  is enabled by a gate driver (not shown). Specifically, when the reset transistor Q 2  is turned on to perform a reset operation, the switching transistor Q 3  is turned on by the output of a first stage of the gate driver to obtain a reference voltage Δ V 1  for the switching transistor Q 3 . Then, after the sensor transistor Q 1  receives ambient light for some time, the switching transistor Q 3  is turned on by the output of a last stage of the gate driver to obtain a photovoltage Δ V 2  for the switching transistor Q 3 . According to the above design, the reset operation allows for a competently large difference between the photovoltage and the reference voltage. However, such design requires two distinct circuits, the sensor circuit  202  for generating the photovoltage and the reference voltage generating circuit  204  for generating the reference voltage, to cause a considerable number of constituting components and high fabrication costs. 
     BRIEF SUMMARY OF THE INVENTION 
     The invention relates to a photosensor for a display device having comparatively less constituting components, a wide sensing range, and an improved operation life. 
     According to an embodiment of the invention, a photosensor for a display device includes a light receiver, a reset unit, and a sample unit. The light receiver is used for receiving ambient light to generate a photovoltage whose magnitude is in proportion to the amount of the ambient light received by the light receiver. The light receiver includes a first transistor and a first conversion unit that transforms the output of the first transistor into the photovoltage. The reset unit is used for providing an initiated reference voltage in response to a reset signal. The reset unit includes a second transistor and a third transistor that are connected with each other, the control terminal of the second transistor being connected to the reset signal and the control terminal of the third transistor being connected to the first conversion unit, where the first conversion unit is discharged through the third transistor to obtain the initiated reference voltage when the second transistor is turned on. The sample unit is used for outputting the photovoltage in respond to a sample signal, the sample unit comprising a fourth transistor in respond to the sample signal and a second conversion unit that transforms the output of the fourth transistor into the photovoltage. 
     According to another embodiment of the invention, a photosensor for a display device includes a sensor circuit, a reference voltage generating circuit, and a processing unit. The sensor circuit includes a first light receiver for receiving ambient light to generate a photovoltage whose magnitude is in proportion to the amount of the ambient light received by the first light receiver, the first light receiver comprising a first transistor and a first conversion unit that transforms the output of the first transistor into the photovoltage; a first reset unit for providing an initiated reference voltage in response to a reset signal and comprising a second transistor and a third transistor that are connected with each other, the control terminal of the second transistor being connected to the reset signal and the control terminal of the third transistor being connected to the first conversion unit, wherein the first conversion unit is discharged through the third transistor to obtain the initiated reference voltage when the second transistor is turned on; and a first read unit for outputting the photovoltage in respond to a first read signal and comprising a fourth transistor in respond to the first read signal and a second conversion unit that transforms the output of the fourth transistor into the photovoltage. The reference voltage generating circuit includes a second light receiver being shielded from ambient light, the second light receiver comprising a fifth transistor and a third conversion unit that transforms the output of the fifth transistor into the reference voltage; a second reset unit for providing an initiated reference voltage in response to a second reset signal and comprising a sixth transistor and a seventh transistor that are connected with each other, the control terminal of the sixth transistor being connected to the second reset signal and the control terminal of the seventh transistor being connected to the third conversion unit, where the third conversion unit is discharged through the seventh transistor to obtain the initiated reference voltage when the sixth transistor is turned on; and a second read unit for outputting the reference voltage in respond to a second read signal and comprising a eighth transistor in respond to the second sample signal and a fourth conversion unit that transforms the output of the fourth transistor into the reference voltage. The processing unit is used for receiving the photovoltage and the reference voltage to generate an output signal in respond to the difference between the photovoltage and the reference voltage. 
     According to the above embodiments, during each reset operation of the photosensor, the voltage level in a storage capacitor is reduced to the threshold voltage of the third transistor by the auto-zero discharge operation of the reset circuit and then gradually increased by the reception of ambient light. Thereby, a considerable difference between the output photovoltage and the reference voltage is obtained. Further, since the output photovoltage and the reference voltage are both fetched from a same circuit, the constituting components and layout areas are decreased to reduce fabrication costs. Further, the sensor transistor typically operates within a negative bias portion of a transistor operation graph, since the current characteristics are better as the sensor transistor operates within this portion. However, in case the sensor transistor is negatively biased for a long time, it is liable to cause a shift in its threshold voltage to damage the sensor transistor. In comparison, according to the above embodiment, since the gate bias signal triggers one time per frame, the sensor transistor is alternately subjected to a positive bias (positive voltage VGH) and a negative bias (photovoltage) to effectively avoid the threshold voltage shift. 
     Other objectives, features and advantages of the present invention will be further understood from the further technological features disclosed by the embodiments of the present invention wherein there are shown and described preferred embodiments of this invention, simply by way of illustration of modes best suited to carry out the invention. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  shows an equivalent circuit diagram of a conventional photosensor, and 
         FIG. 2  shows an exemplary timing chart of input signals for the photosensor shown in  FIG. 1 . 
         FIG. 3  shows an equivalent circuit diagram of another conventional photosensor. 
         FIG. 4  shows an equivalent circuit diagram of a photosensor according to an embodiment of the invention, and 
         FIG. 5  shows an exemplary timing chart of input signals for the photosensor shown in  FIG. 4 . 
         FIG. 6  shows a curve diagram illustrating variations in the voltage level of the first capacitor. 
         FIG. 7  shows a schematic diagram of a processing unit according to an embodiment of the invention. 
         FIG. 8  shows an equivalent circuit diagram of a photosensor according to another embodiment of the invention, and 
         FIG. 9  shows an exemplary timing chart of input signals for the photosensor shown in  FIG. 8 . 
         FIG. 10  shows an equivalent circuit diagram of a photosensor according to another embodiment of the invention. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings which form a part hereof, and in which are shown by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology, such as “top,” “bottom,” “front,” “back,” etc., is used with reference to the orientation of the Figure(s) being described. The components of the present invention can be positioned in a number of different orientations. As such, the directional terminology is used for purposes of illustration and is in no way limiting. On the other hand, the drawings are only schematic and the sizes of components may be exaggerated for clarity. It is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the present invention. Also, it is to be understood that the phraseology and terminology used herein are for the purpose of description and should not be regarded as limiting. The use of “including,” “comprising,” or “having” and variations thereof herein is meant to encompass the items listed thereafter and equivalents thereof as well as additional items. Unless limited otherwise, the terms “connected,” and variations thereof herein are used broadly and encompass direct and indirect connections, couplings, and mountings. Similarly, “adjacent to” and variations thereof herein are used broadly and encompass directly and indirectly “adjacent to”. Therefore, the description of “A” component “adjacent to” “B” component herein may contain the situations that “A” component directly faces “B” component or one or more additional components are between “A” component and “B” component. Also, the description of “A” component “adjacent to” “B” component herein may contain the situations that “A” component is directly “adjacent to” “B” component or one or more additional components are between “A” component and “B” component. Accordingly, the drawings and descriptions will be regarded as illustrative in nature and not as restrictive. 
       FIG. 4  shows an equivalent circuit diagram of a photosensor  10  according to an embodiment of the invention, and  FIG. 5  shows an exemplary timing chart of input signals for the photosensor  10  shown in  FIG. 4 . According to this embodiment, the photosensor  10  is provided in a display device (not shown) to measure the intensity of ambient light, and thus a gate driver IC may serve as a voltage source for the photosensor  10 . Referring to  FIG. 4 , the photosensor  10  includes a first transistor T 1 , a second transistor T 2 , a third transistor T 3 , a fourth transistor T 4 , a fifth transistor T 5 , a first capacitor C 1 , a second capacitor C 2 , and a third capacitor C 3 . The gate of the first transistor T 1  is connected to an initiated scan signal STV, its drain is connected to a first voltage, and its source is connected to a second voltage and the first capacitor C 1 . For example, the first voltage and the second voltage may be a positive voltage VGH and a negative voltage VGL, respectively. The gate of the second transistor T 2  is connected to a reset signal RESET, its drain is connected to the source of the first transistor T 1 . The drain of the third transistor T 3  is connected to the source of the second transistor T 2 , its source is connected to the negative voltage VGL, and its gate is connected to the source of the first transistor T 1  and the first capacitor C 1 . The gate of the fourth transistor T 4  is connected to a sample signal SAMPLE, its drain is connected to the first capacitor C 1 , and its source is connected to the second capacitor C 2 . The gate of the fifth transistor T 5  is connected to a read signal READ, its drain is connected to the source of the first transistor T 1  and the first capacitor C 1 , and its source is connected to the third capacitor C 3 . 
     The first transistor T 1  has a light-sensitive layer (not shown) that is capable of generating electrical charge carriers upon receiving ambient light. The electrical charge carriers move to form photocurrent I as a result of the voltage difference between the drain and the source of the first transistor T 1 , and the magnitude of the photocurrent I is in proportion to the amount of received ambient light. Referring to both  FIG. 4  and  FIG. 5 , when the initiated scan signal STV is in a high level, the first transistor T 1  is turned on and the positive voltage VGH charges the first capacitor C 1  through the first transistor T 1 . Next, when the reset signal RESET is in a high level, the second transistor T 2  is turned on and the third transistor T 3  is also turned on to discharge the electrical charges stored in the first capacitor C 1  through the third transistor T 3 . Hence, the voltage level of the first capacitor C 1  is reduced to be the same or almost the same as the threshold voltage of the third transistor T 3 . Then, when the read signal READ is in a high level, the fifth transistor T 5  is turned on and the output of the fifth transistor T 5  is transformed to the voltage difference of the third capacitor C 3 . Therefore, a reference voltage Vref that equals the threshold voltage of the third transistor T 3  is fetched from the third capacitor C 3 . Since each manufactured transistor T 3  has its respective threshold voltage as a result of fabrication tolerances, the above design that uses the threshold voltage of a third transistor T 3  as a reference voltage Vref allows for an optimum reference voltage Vref for the photosensor  10  without influenced by the inherent distinctions of different transistors T 3 . On the other hand, when the reset signal RESET is in a low level, the second transistor T 2  is turned off and the voltage level of the first capacitor C 1  is gradually increased since the photocurrent I flows into the first capacitor C 1 , with the reference voltage Vref continually kept at a fixed value. 
     Hence, when the sample signal SAMPLE is in a high level, the fourth transistor T 4  is turned on and the output of the fourth transistor T 4  is transformed to a voltage difference of the second capacitor C 2 . Thereby, a photovoltage Vout that varies in relation to the reception of ambient light and equals the voltage level of the first capacitor C 1  charged by the photocurrent I is fetched from the second capacitor C 2 . 
       FIG. 6  shows a curve diagram illustrating variations in the voltage level of the first capacitor C 1 . From  FIG. 6 , it can be clearly seen that the second transistor T 2  cooperates with the third transistor T 3  to perform an auto-zero discharge operation. In that case, the voltage level of the first capacitor C 1  that at first equals the positive voltage VGH is reduced to be the same or almost the same as the threshold voltage of the third transistor T 3 , with the threshold voltage serving as a fixed reference voltage Vref. Then, the voltage level of the first capacitor C 1  is gradually increased accompanying with the reception of ambient light. Finally, a voltage difference Δ V between the photovoltage Vout and the reference voltage Vref is sampled and then output. As shown in  FIG. 7 , a processing unit  12  receives the output photovoltage Vout and the reference voltage Vref to generate an output signal corresponding to a difference between them. Specifically, the processing unit  12  includes an amplifier  14  and an analogue-to-digital converter (ADC)  16 . The voltage difference Δ V between the photovoltage Vout and the reference voltage Vref is amplified by the amplifier  14  and transformed into digital luminous control signals by the ADC  16 , and the brightness of a backlight is adjusted according to the luminous control signals. Thereby, optimum display contrast and reduced power consumption are achieved. 
     According to the above embodiment, during each reset operation of the photosensor  10 , the voltage level in a storage capacitor is reduced to the threshold voltage of the third transistor T 3  by the auto-zero discharge operation of the reset circuit and then gradually increased by the reception of ambient light. Thereby, a considerable difference between the output photovoltage and the reference voltage is obtained. Further, since the output photovoltage and the reference voltage are both fetched from a same circuit, the constituting components and layout areas are decreased to reduce fabrication costs. Further, the sensor transistor (first transistor T 1 ) typically operates within a negative bias portion of a transistor operation graph, since the current characteristics are better as the sensor transistor operates within this portion. However, in case the first transistor T 1  is negatively biased for a long time, it is liable to cause a shift in its threshold voltage to damage the first transistor T 1 . In comparison, according to the above embodiment, since the gate bias signal triggers one time per frame, the first transistor T 1  is alternately subjected to a positive bias (positive voltage VGH) and a negative bias (photovoltage) to effectively avoid the threshold voltage shift. 
       FIG. 8  shows an equivalent circuit diagram of a photosensor  20  according to another embodiment of the invention, and  FIG. 9  shows an exemplary timing chart of input signals for the photosensor  20  shown in  FIG. 8 . Referring to both  FIG. 8  and  FIG. 9 , in this embodiment, the read signal READ is connected to both the gate of the fifth transistor T 5  and the source of the third transistor T 3 , so the third transistor T 3  is allowed to be turned off when the read signal READ is in a high level. 
       FIG. 10  shows an equivalent circuit diagram of a photosensor  30  according to another embodiment of the invention, and the timing chart of input signals for the photosensor  30  is similar to that shown in  FIG. 9 . Referring to  FIG. 10 , the photosensor  30  includes a sensor circuit  32 , a reference voltage generating circuit  34 , and a processing unit  36 . The sensor circuit  32  includes a first transistor T 1 , a second transistor T 2 , a third transistor T 3 , a fourth transistor T 4 , a first capacitor C 1  and a second capacitor C 2 . The input terminal of the first transistor T 1  is connected to a positive voltage VGH, its control terminal is connected to an initiated scan signal STV, and its output terminal is connected to the first capacitor C 1 . The input terminal of the second transistor T 2  is connected to the output terminal of the first transistor T 1 , and the control terminal of the second transistor T 2  is connected to a reset signal RESET. The input terminal of the third transistor T 3  is connected to the output terminal of the second transistor T 2 . The control terminal of the third transistor T 3  is connected to the first capacitor C 1 , and the output terminal of the third transistor is connected to a negative voltage VGL. The input terminal of the fourth transistor T 4  is connected to the first capacitor C 1 , its control terminal is connected to the read signal READ, and its output terminal is connected to the second capacitor C 2 . The reference voltage generating circuit  34  includes a fifth transistor T 5 , a sixth transistor T 6 , a seventh transistor, a eighth transistor T 8 , a third capacitor C 3 , and a fourth capacitor C 4 . The connection of constituting components of the reference voltage generating circuit  34  is similar to that of the sensor circuit  32 , thus not explaining in detail here. The major difference lies in that an additional light blocking member BM is provided in the reference voltage generating circuit  34  to shield the fifth transistor T 5  from the illumination of ambient light. In comparison, the first transistor T 1  of the sensor circuit  32  is illuminated by ambient light to generate a photovoltage whose magnitude is in proportion to the received light amount. Hence, the sensor circuit  32  outputs the photovoltage Vout whose magnitude is in proportion to the amount of receiving ambient light, and the reference voltage generating circuit  34  outputs a fixed reference voltage Vref. The processing unit  36  receives the photovoltage Vout and the reference voltage Vref to generate an output signal in proportion to their voltage difference. As shown in  FIG. 7 , the processing unit  36  may include an amplifier  14  and an analogue-to-digital converter (ADC)  16 . In this embodiment, the second transistor T 2  and the third transistor T 3  of the sensor circuit  32  similarly response the reset signal RESET to perform an afore-mentioned auto-zero discharge operation so as to provide an initiated photovoltage. Further, the sixth transistor T 6  and the seventh transistor T 7  of the reference voltage generating circuit  34  similarly response the reset signal RESET to perform an auto-zero discharge operation so as to provide an initiated reference voltage. 
     The foregoing description of the preferred embodiments of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form or to exemplary embodiments disclosed. Accordingly, the foregoing description should be regarded as illustrative rather than restrictive. Obviously, many modifications and variations will be apparent to practitioners skilled in this art. The embodiments are chosen and described in order to best explain the principles of the invention and its best mode practical application, thereby to enable persons skilled in the art to understand the invention for various embodiments and with various modifications as are suited to the particular use or implementation contemplated. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents in which all terms are meant in their broadest reasonable sense unless otherwise indicated. Therefore, the term “the invention”, “the present invention” or the like does not necessarily limit the claim scope to a specific embodiment, and the reference to particularly preferred exemplary embodiments of the invention does not imply a limitation on the invention, and no such limitation is to be inferred. The invention is limited only by the spirit and scope of the appended claims. The abstract of the disclosure is provided to comply with the rules requiring an abstract, which will allow a searcher to quickly ascertain the subject matter of the technical disclosure of any patent issued from this disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Any advantages and benefits described may not apply to all embodiments of the invention. It should be appreciated that variations may be made in the embodiments described by persons skilled in the art without departing from the scope of the present invention as defined by the following claims. Moreover, no element and component in the present disclosure is intended to be dedicated to the public regardless of whether the element or component is explicitly recited in the following claims.