Abstract:
In a bus driver for driving a bus having an input terminal for receiving an input signal and an output terminal connected to the bus, a switching element is provide between the output terminal and the second power supply terminal, and the switching element is controlled by a voltage at the input terminal. A diode and a resistor are connected in series between the first power supply terminal and the output terminal. The diode is arranged in a forward conduction direction with respect to the first and second power supply terminals.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a bus driver for a data processing system. 
     2. Description of the Related Art 
     In a data processing system, a plurality of packages each including a semiconductor integrated circuit are inserted into a back panel. The packages share buses formed on the back panel. In this case, each of the packages has a bus driver and a bus receiver. 
     A prior art bus driver includes an open drain type metal oxide semiconductor (MOS, or more broadly, metal insulating semiconductor (MIS)). This will be explained later in detail. 
     However, since the prior art bus driver per se does not include a noise removing circuit, a large ringing effect is generated in the bus. Therefore, it takes a long time to converge the ringing effect, which substantially increases the propagation delay time of signals from the bus driver to its respective bus receivers. 
     SUMMARY OF THE INVENTION 
     It is an object of the present invention to reduce the ringing effect in a bus driver, thus substantially reducing the signal propagation delay time. 
     According to the present invention, in a bus driver for driving a bus having an input terminal for receiving an input signal and an output terminal connected to the bus, a switching element is provided between the output terminal and the second power supply terminal, and the switching element is controlled by a voltage at the input terminal. A diode and a resistor are connected in series between the first power supply terminal and the output terminal. The diode is arranged in a forward conduction direction with respect to the first and second power supply terminals. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The present invention will be more clearly understood from the description as set forth below, as compared with the prior art, with reference to the accompanying drawings, wherein: 
     FIG. 1 is a block circuit diagram illustrating a prior art data processing system; 
     FIG. 2 is a circuit diagram of the bus driver of FIG. 1; 
     FIG. 3 is an equivalent circuit diagram of the data processing system of FIG. 1; 
     FIG. 4 is a timing diagram showing the received signals at the bus receivers of FIG. 1; 
     FIG. 5A is a circuit diagram illustrating a first embodiment of the bus driver according to the present invention; 
     FIGS. 5B and 5C are circuit diagrams illustrating modifications of the bus driver of FIG. 5A; 
     FIG. 6A is a circuit diagram illustrating a second embodiment of the bus driver according to the present invention; 
     FIGS. 6B and 6C are circuit diagrams illustrating modifications of the bus driver of FIG. 6A; 
     FIG. 7A is a circuit diagram illustrating a third embodiment of the bus driver according to the present invention; 
     FIGS. 7B and 7C are circuit diagrams illustrating modifications of the bus driver of FIG. 7A; 
     FIG. 8A is a circuit diagram illustrating a fourth embodiment of the bus driver according to the present invention; 
     FIGS. 8B and 8C are circuit diagrams illustrating modifications of the bus driver of FIG. 8A; 
     FIG. 9A is a circuit diagram illustrating a fifth embodiment of the bus driver according to the present invention; 
     FIGS. 9B and 9C are circuit diagrams illustrating modifications of the bus driver of FIG. 9A; 
     FIG. 10A is a circuit diagram illustrating a sixth embodiment of the bus driver according to the present invention; 
     FIGS. 10B and 10C are circuit diagrams illustrating modifications of the bus driver of FIG. 10A; and 
     FIG. 11 is a timing diagram showing the effect of the present invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Before the description of the preferred embodiments, a prior art bus driver will be explained with reference to FIGS. 1,  2 ,  3  and  4 . 
     In FIG. 1, which illustrates a prior art data processing system, packages  100 - 1 ,  100 - 3 ,  100 - 4 , . . . ,  100 - 7  are inserted into a back panel  200  by connectors  101 - 1  and  101 - 2 . In this case, a package  100 - 2  is not inserted into the back panel  200  intentionally. Thus, the packages  100 - 1 ,  100 - 3 ,  100 - 4 , . . . ,  100 - 7  share a bus  201  formed on the back panel  200 . 
     One bus driver  102  is mounted on each of the packages  100 - 1 ,  100 - 3 ,  100 - 4 , . . . ,  100 - 7 . The bus driver  102  is connected via a signal line  103  and the connector  101 - 1  to the bus  201 . Also, one bus receiver (not shown) is mounted on each of the packages  100 - 1 ,  100 - 3 ,  100 - 4 , . . . ,  100 - 7 . The bus receiver is connected via a signal line (not shown) and the connector  101 - 2  to a bus (not shown) formed on the back panel  200 . 
     In FIG. 2, which is a circuit diagram of the bus driver  102  of FIG. 1, the bus driver  102  is formed by an open drain type MOS transistor having a gate for receiving an input voltage V in , a grounded source and a drain for generating an output voltage V out . That is, the bus driver of FIG. 2 does not have a noise removing circuit. 
     In FIG. 3, which is an equivalent circuit diagram of the system of FIG. 1, the spacing between the packages depends upon the height of heat sinks of semiconductor integrated devices mounted thereon. For example, the spacing between the packages  101 - 1  and  101 - 2  (in this case, the package  101 - 2  is removed) is 1.4 inches; the spacing between the packages  101 - 2  and  101 - 3  is 2.0 inches; the spacing between the packages  101 - 3  and  101 - 4  is 1.8 inches; the spacing between the packages  101 - 4  and  101 - 5  is 1.8 inches; the spacing between the packages  101 - 5  and  101 - 6  is 2.0 inches; and the spacing between the packages  101 - 6  and  101 - 7  is 1.0 inches. Also, the length of a styb  103  of each of the packages is 1 inch. Further, a pull-up resistor R formed on the back panel  200  is connected to the connector  101 - 1  of each of the packages  101 - 1  and  101 - 7 . 
     In FIG. 3, when the input voltage V in  of the bus driver  102  included in the package  101 - 3  is switched from high to low, the voltages at the bus receivers at the packages  101 - 1 ,  101 - 3 ,  101 - 4 , . . . ,  101 - 7  are obtained as shown in FIG.  4 . As shown in FIG. 4, a large ringing effect is generated in each of the voltages of the bus receivers since the bus driver  102  does not have a noise removing circuit. That is, it takes longer than 40 ns to converge the voltages at the bus receivers. This substantially increases the signal propagation delay time. 
     In FIG. 5A, which illustrates a first embodiment of the bus driver according to the present invention, the bus driver includes a MOS transistor  1  as a switching element having a gate connected to an input terminal IN for receiving an input voltage V in , a drain connected to an output terminal OUT for generating an output voltage V  out , and a source connected to the ground terminal GND. Also, the bus driver includes a noise removing circuit formed by a diode  2 -A and a resistor  3 - 1 . In this case, an anode of the diode  2 -A is connected to the output terminal OUT, and a cathode of the diode  2 -A is connected to an end of the resistor  3 - 1 . Also, a positive voltage V P  such as 1.5V is applied to the other end of the resistor  3 - 1 . 
     In FIG. 5B, which illustrates a first modification of the bus driver of FIG. 5A, series-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  5 A. 
     In FIG. 5C, which illustrates a second modification of the bus driver of FIG. 5A, parallel-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  5 A. 
     The bus drivers of FIGS. 5B and 5C operate in the same way as the bus driver of FIG.  5 A. In this case, the forward current of the diodes  2 -B is a little smaller than that of the diode  2 -A, while the forward current of the diodes  2 -C is a little larger than that of the diode  2 -A. 
     In FIG. 6A, which illustrates a second embodiment of the bus driver according to the present invention, a resistor  3 - 2  is added to the elements of the bus driver of FIG.  5 A. That is, the resistor  3 - 2  is connected between the anode of the diode  2 -A and the output terminal OUT. The bus driver of FIG. 6A operates in the same way as the bus driver of FIG.  5 A. 
     In FIG. 6B, which illustrates a first modification of the bus driver of FIG. 6A, series-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  6 A. 
     In FIG. 6C, which illustrates a second modification of the bus driver of FIG. 6A, parallel-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  6 A. 
     The bus drivers of FIGS. 6B and 6C operate in the same way as the bus driver of FIG.  6 A. In this case, the forward current of the diodes  2 -B is a little smaller than that of the diode  2 -A, while the forward current of the diodes  2 -C is a little larger than that of the diode  2 -A. 
     In FIG. 7A, which illustrates a third embodiment of the bus driver according to the present invention, the resistor  3 - 1  of FIG. 6A is not provided. The bus driver of FIG. 7A operates in the same way as the bus driver of FIG.  5 A. 
     In FIG. 7B, which illustrates a first modification of the bus driver of FIG. 7A, series-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  7 A. 
     In FIG. 7C, which illustrates a second modification of the bus driver of FIG. 7A, parallel-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  7 A. 
     The bus drivers of FIGS. 7B and 7C operate in the same way as the bus driver of FIG.  7 A. In this case, the forward current of the diodes  2 -B is a little smaller than that of the diode  2 -A, while the forward current of the diodes  2 -C is a little larger than that of the diode  2 -A. 
     In FIG. 8A, which illustrates a fourth embodiment of the bus driver according to the present invention, the bus driver includes a bipolar transistor  1 ′ instead of the MOS transistor  1  of FIG.  5 A. The bipolar transistor  1 ′ has a base connected to the input terminal IN, a collector connected to the output terminal OUT, and an emitter connected to the ground terminal GND. The bus driver of FIG. 8A operates in the same way as the bus driver of FIG.  5 A. 
     In FIG. 8B, which illustrates a first modification of the bus driver of FIG. 8A, series-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  8 A. 
     In FIG. 8C, which illustrates a second modification of the bus driver of FIG. 8A, parallel-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  8 A. 
     The bus drivers of FIGS. 8B and 8C operate in the same way as the bus driver of FIG.  8 A. In this case, he forward current of the diodes  2 -B is a little smaller than that of the diode  2 -A, while the forward current of the diodes  2 -C is a little larger than that of the diode  2 -A. 
     In FIG. 9A, which illustrates a fifth embodiment of the bus driver according to the present invention, a resistor  3 - 2  is added to the elements of the bus driver of FIG.  8 A. That is, the resistor  3 - 2  is connected between the anode of the diode  2 -A and the output terminal OUT. The bus driver of FIG. 9A operates in the same way as the bus driver of FIG.  8 A. 
     In FIG. 9B, which illustrates a first modification of the bus driver of FIG. 9A, series-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  9 A. 
     In FIG. 9C, which illustrates a second modification of the bus driver of FIG. 9A, parallel-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  9 A. 
     The bus drivers of FIGS. 9B and 9C operate in the same way as the bus driver of FIG.  9 A. In this case, the forward current of the diodes  2 -B is a little smaller than that of the diode  2 -A, while the forward current of the diodes  2 -C is a little larger than that of the diode  2 -A. 
     In FIG. 10A, which illustrates a sixth embodiment of the bus driver according to the present invention, the resistor  3 - 1  of FIG. 9A is not provided. The bus driver of FIG. 10A operates in the same way as the bus driver of FIG.  8 A. 
     In FIG. 10B, which illustrates a first modification of the bus driver of FIG. 10A, series-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  10 A. 
     In FIG. 10C, which illustrates a second modification of the bus driver of FIG. 10A, parallel-connected diodes  2 -B are provided instead of the diode  2 -A of FIG.  10 A. 
     The bus drivers of FIGS. 10B and 10C operate in the same way as the bus driver of FIG.  10 A. In this case, the forward current of the diodes  2 -B is a little smaller than that of the diode  2 -A, while the forward current of the diodes  2 -C is a little larger than that of the diode  2 -A. 
     Assume that the bus driver of FIG. 5A is applied to the data processing system of FIGS. 1 and 3. In this case, when the input voltage V in  of the bus driver of FIG. 5A included in the package  101 - 3  is switched from high to low, the voltages at the bus receivers at the packages  101 - 1 ,  101 - 3 ,  101 - 4 , . . . ,  101 - 7  are obtained as shown in FIG.  11 . As shown in FIG. 11, the ringing effect generated in each of the voltages of the bus receivers is reduced, since the bus driver of FIG. 5A has a noise removing circuit formed by the diode  2 -A and the resistor  3 - 1 . Therefore, it takes less than 20 ns to converge the voltages at the bus receivers. This substantially decreases the signal propagation delay time. 
     As explained hereinabove, according to the present invention, the signal propagation delay time can be reduced.