Abstract:
A liquid crystal display device includes: a plurality of gate lines and a plurality of data lines crossing the plurality of gate lines that define the plurality of pixel regions that define a plurality of pixel regions on a first substrate; a plurality of thin film transistors each residing in a pixel region, wherein the plurality of thin film transistors are symmetrically formed with respect to a central gate line and wherein paired transistors reside on opposite sides of the central gate line; and a black matrix including a first portion overlying the central gate line and the paired transistors, a second portion overlying the plurality of thin film transistors, and an additional part that is integral with the second portion and renders the black matrix symmetrical with respect to the first portion.

Description:
[0001]     This application claims the benefit of Korean Patent Application No. 2004-62382, filed on Aug. 9, 2004, which is hereby incorporated by reference.  
       BACKGROUND  
       [0002]     1. Technical Field  
         [0003]     The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an LCD device and a method of fabricating the LCD device.  
         [0004]     2. Description of the Related Art  
         [0005]     Presently, LCD devices are being developed as the next generation of display devices because of their light weight, thin profile, and low power consumption. In general, an LCD device is a non-emissive display device that displays images using a refractive index difference utilizing optical anisotropy properties of a liquid crystal material that is interposed between an array (TFT) substrate and a color filter substrate. Among the various type of LCD devices commonly used, active matrix LCD (AM-LCD) devices have been developed because of their high resolution and superiority in displaying moving images. The AM-LCD device includes a thin film transistor (TFT) in each pixel region as a switching device, a pixel electrode in each pixel region, and a second electrode used for a common electrode.  
         [0006]      FIG. 1  is a schematic cross sectional view of an LCD device according to the related art. In  FIG. 1 , an LCD panel  1  includes upper and lower substrates  5  and  22  arranged to face each other with a liquid crystal layer  14  interposed therebetween. A color filter layer  7  and a common electrode  18  overlie an inner surface of the upper substrate  5 , in which the common electrode  18  functions as an electrode for applying an electric field to the liquid crystal layer  14 . The color filter layer  7  includes red, green and blue color filters  7   a ,  7   b  and  7   c  for passing only a specific wavelength of light, and a black matrix  6  that is disposed at the boundary between the red, green and blue color filters  7   a ,  7   b  and  7   c  and shields light from a region in which alignment of the liquid crystal layer  14  is uncontrollable. On an inner surface of the lower substrate  22 , a gate line  13  and a data line  15  cross the gate line  13  to define a pixel region P. A TFT T, which functions as a switching device, is disposed at crossing of the gate line  13  and the data line  15 . The TFT T includes a gate electrode  32  connected to the gate line  13 , a semiconductor layer  34  over the gate electrode  32 , a source electrode  36  connected to the data line  15 , and a drain electrode  38  spaced apart from the source electrode  36 . A pixel electrode  17  is connected to the TFT T. For example, the pixel electrode  17  is made of a transparent conductive material such as indium tin oxide (ITO).  
         [0007]     A portion of the gate line  13  is utilized for a first capacitor electrode (not shown). A second capacitor electrode  30  is formed with the same material as the data line  15 . The first capacitor electrode, the second capacitor electrode  30  and a gate insulating layer  33  interposed therebetween constitute a storage capacitor C ST . Here, the second capacitor electrode  30  is connected to the pixel electrode  17  to be applied to a signal of the pixel electrode  17 .  
         [0008]     A structure of the storage capacitor C ST  may be variously modified.  
         [0009]     In addition, a backlight unit  50  is disposed under the LCD panel  1 . The backlight unit  50  includes a cold cathode fluorescent lamp  52  as a fluorescent lamp, a lamp housing  54  covering the cold cathode fluorescent lamp  52 , a light guide panel  56  that converts light from the cold cathode fluorescent lamp  52  into a plan light, a reflector (not shown) under the light guide panel  56  to reflect light toward the LCD panel  1 , a diffusion sheet (not shown) diffusing light from the light guide panel  56 , first and second prism sheets (not shown) controlling a direction of the light for the first diffusion sheet, a protection sheet (not shown) protecting the sheets therebelow.  
         [0010]     However, the LCD panel  1  is increasingly being manufactured as a light-weight, slimly-model, shaped mode, for example, such that a light emitting diode is suggested instead of the cold cathode fluorescent lamp  52  as the light source of the backlight unit  50 .  
         [0011]     The light emitting diode can emit red, green and blue colors and can be manufactured as a small, slim and a light-weight device.  
         [0012]     In addition, a field sequential color (FSC) driving method is suggested to obtain a high image quality with respect to an LCD device using a backlight unit having the mentioned light emitting diode emitting the red, green and blue colors. This FSC driving method may be defined such that red, green and blue colors are sequentially embodied and mixed with a time interval among the red, green and blue colors, thereby improving brightness in comparison with the related art driving method. Actually, in the FSC driving method, inputting data and the response speed of the liquid crystal material should be faster than the driving method according to the related art, which will increase brightness. However, there is a limitation to increasing brightness because the on-time of the backlight unit, except for inputting data and response time of the liquid crystal material, is limited.  
         [0013]     To overcome these limitations, a tiling driving method, which is defined such that the LCD panel is independently driven in accordance with partitioned portions, is suggested.  
         [0014]      FIG. 2  is a schematic plan view of an LCD device applying a tiling driving method according to the related art.  
         [0015]     As shown in  FIG. 2 , an LCD device  70  includes an active area A 1  displaying a picture and a driving area A 2  in a periphery with the active area A 1 . The LCD device  70  is partitioned top, bottom, right and left portions with respect to central line CL. Accordingly, as first and second source integrated circuit boards  72   a  and  72   b  are disposed in both the top and bottom portions and first and second gate integrated circuit boards  74   a  and  74   b  are disposed in the left portion, they are independently driven by the partitioned portions.  
         [0016]     More specifically, the first and second gate integrated circuit boards  74   a  and  74   b  in the top and bottom portions with respect to the central gate line (not shown) are independently driven and scanning of the gate lines is begun from the central gate line. Here, top and bottom pixels of the central gate line are sequentially driven simultaneously.  
         [0017]     As explained above, when the LCD panel is independently driven by the partitioned portions the inputting time of the data is reduced. Therefore, the response time and on-time of the backlight unit have an enough margin due to the reduction of inputting time.  
         [0018]     Consequently, the LCD device applying the FSC driving method using partitioned driving can obtain high brightness.  
         [0019]      FIG. 3  is an expanded plan view of a substrate of a FSC type LCD device applied a tiling driving method according to the related art.  
         [0020]     As shown in  FIG. 3 , a plurality of gate lines  82  and  82   a  and a plurality of data lines  84  cross the plurality of gate lines  82  and define a plurality of pixel regions P on a substrate  80 . For example, the substrate  80  is made of a transparent insulating material. A plurality of thin film transistors T, T 1  and T 2  are formed at crossing points of the plurality of gate lines  82  and  82   a  and the plurality of data lines  84  and are symmetrically formed with respect to a central gate line  82   s  of the plurality of gate lines  82  and  82   a . Each of the plurality of thin film transistors T, T 1 , T 2  includes a gate electrode  86 , a semiconductor layer  88 , a source electrode  90  and a drain electrode  92 .  
         [0021]     Here, the first and second thin film transistors T 1  and T 2  of the plurality of thin film transistors T, T 1  and T 2  are connected to the central gate line  82   a . Each of a plurality of pixel electrodes  94  is connected to the each of the plurality of the drain electrodes  92 . In other words, the first and second thin film transistors T 1  and T 2  adjacent to the central gate line  82   a  are all connected to the central gate line  82   a . Therefore, the first and second thin film transistors T  1  and T 2  are simultaneously driven using the central gate line  82   a . Simultaneously, scanning signals are sequentially applied to top and bottom portions of the LCD panel  1  with respect to the central gate line  82   a.    
         [0022]     A black matrix  96  is formed over the plurality of thin film transistors T, T 1  and T 2  to correspond to the plurality of gate lines  82 ,  82   a , the plurality of data lines  84  and the plurality of thin film transistors T, T 1  and T 2 . The black matrix  96  is formed to prevent leakage current by shielding the plurality of thin film transistors from irradiation of the incident light. In addition, the black matrix  96  is formed to prevent a light leakage from the backlight unit by shielding an interval space between the plurality of pixel electrodes  94  and the plurality of gate and data lines  82 ,  82   a  and  84 .  
         [0023]     That is, the black matrix  96  includes a first portion  96   a  corresponding to the first and second thin film transistors T 1  and T 2  and a second portion  96   b  corresponding to one of the plurality of thin film transistors except the first and second thin film transistors T 1  and T 2 . In other words, the black matrix  96  has different sizes corresponding to the plurality of thin film transistors T, T 1  and T 2  with respect to the central gate line  82   a  such that the first portion  96   a  is bigger than the second portion  96   b . Since the black matrix  96  has different portions between a portion of the central gate line  82   a  and a portion of the other gate lines  82  except the central gate line  82 , it occurs as an image quality defect, such as a moiré phenomenon, and an image quality problem in that the central gate line  82   a  is prominently shown. More specifically, the moiré phenomenon may be defined as an interference pattern, such as a ripple pattern, having a bigger period than an origin size when at least one pattern having a period in a space view.  
         [0024]     Consequently, the moiré phenomenon of the interference pattern adjacent to the central gate line  82   a  due to a size difference between the first and second portions  96   a  and  96   b  of the black matrix  96  may occur, thereby reducing the image quality of the display.  
       BREIF SUMMARY  
       [0025]     Accordingly, the present invention is directed to an LCD device and a method of fabricating the LCD device that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.  
         [0026]     An object of the present invention is to provide an LCD device having a high image quality by preventing a moiré phenomenon and a problem such that the central gate line is prominently shown when an image of the LCD device is displayed.  
         [0027]     Another object of the present invention is to provide a method of fabricating an LCD device having a high image quality by preventing a moiré phenomenon and a problem such that the central gate line is prominently shown when an image of the LCD device is displayed.  
         [0028]     Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.  
         [0029]     To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a liquid crystal display device includes: a plurality of gate lines and a plurality of data lines crossing the plurality of gate lines to define a plurality of pixel regions on a first substrate; a plurality of thin film transistors at crossing points of the plurality of gate lines and the plurality of data lines, wherein the plurality of thin film transistors are symmetrically formed with respect to a central gate line of the plurality of gate lines, and wherein two groups of the plurality of thin film transistors are adjacent to the central gate line and are connected to the central gate line; a plurality of pixel electrodes connected to the plurality of thin film transistors, each of the plurality of pixel electrodes residing in each of the pixel regions; and a black matrix including a first portion overlapping the plurality of gate lines and the plurality of data lines, a second portion overlapping the plurality of thin film transistors, and a part that is integral with the first portion and renders the black matrix symmetrical with respect to the central gate line.  
         [0030]     In another aspect, a method of fabricating a liquid crystal display device includes: forming a plurality of gate lines having a plurality of gate electrodes on a first substrate, wherein the first substrate has a plurality of pixel regions, wherein each of the plurality of gate electrodes are formed in each of the plurality of pixel regions, wherein two groups of the plurality of gate electrodes are adjacent to and directly connected to the central gate line; forming a plurality of data lines crossing the plurality of gate lines; forming a plurality of source electrodes connected to the plurality of data lines and a plurality of drain electrodes spaced apart from the plurality of source electrodes, wherein each of the plurality of gate electrodes, the plurality of source electrodes and the plurality of drain electrodes constitutes one of a plurality of thin film transistors, and wherein two groups of the plurality of thin film transistors adjacent to the central gate line are connected to the central gate line; forming a plurality of pixel electrodes connected to the plurality of thin film transistors, each of the plurality of pixel electrodes connected to the each of the plurality of drain electrodes; and forming a black matrix including a first portion overlapping the plurality of gate lines and the plurality of data lines and a first portion corresponding the plurality of thin film transistors, wherein a part is integral with the first portion and renders the black matrix symmetrical with respect to with respect to the central gate line.  
         [0031]     In yet another aspect, a liquid crystal display device includes: a plurality of gate lines and a plurality of data lines crossing the plurality of gate lines that define the plurality of pixel regions that define a plurality of pixel regions on a first substrate; a plurality of thin film transistors each residing in a pixel region, wherein the plurality of thin film transistors are symmetrically formed with respect to a central gate line and wherein paired transistors reside on opposite sides of the central gate line; and a black matrix including a first portion overlying the central gate line and the paired transistors, a second portion overlying the plurality of thin film transistors, and an additional part that is integral with the second portion and renders the black matrix symmetrical with respect to the first portion.  
         [0032]     It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0033]     The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.  
         [0034]      FIG. 1  is a schematic cross sectional view of an LCD device according to the related art.  
         [0035]      FIG. 2  is a schematic plan view of an LCD device applied a tiling driving method according to the related art.  
         [0036]      FIG. 3  is an expanded plan view of a substrate of a FSC type LCD device applied a tiling driving method according to the related art.  
         [0037]      FIG. 4  is a schematic cross sectional view of a FSC type LCD device applied a tiling driving method according to the present invention.  
         [0038]      FIG. 5  is a schematic plan view of a FSC type LCD panel applying a tiling driving method according to the present invention.  
         [0039]      FIGS. 6A  to  6 F are schematic plan views in accordance with a fabricating process of an LCD device according to the present invention.  
         [0040]      FIGS. 7A  to  7 F are schematic cross sectional views taken along lines VII-VII of  FIGS. 6A  to  6 F, respectively. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0041]     Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or the like parts.  
         [0042]      FIG. 4  is a schematic cross sectional view of a FSC type LCD device applying a tiling driving method according to the present invention.  
         [0043]     In  FIG. 4 , an LCD panel LP includes a first substrate  100 , a second substrate  200  facing the first substrate  100 , and a liquid crystal layer  150  interposed therebetween. A backlight unit  350  is disposed under the LCD panel LP. A gate line  104  is formed on an inner surface of the first substrate  100 , a data line  116  crosses the gate line  104  to define a pixel region P. A thin film transistor T is connected to the gate line  104  and to the data line  116  at crossing point thereof, and a pixel electrode  122  is connected to the thin film transistor T in the pixel region P. In addition, a first capacitor electrode (not shown) resides in a portion of the gate line  104 , and a second capacitor electrode  118 , formed of the same material as the data line  116 , and a gate insulating layer  106  constitute a storage capacitor C ST .  
         [0044]     A black matrix  204  is formed on an inner surface of the second substrate  200  and corresponds to the gate line  104 , the data line  116 , and the thin film transistor T except the pixel region P. A color filter layer  206  is formed on the inner surface of the second substrate  200 , more specifically, the color filter layer  206  includes red, green and blue color filters  206   a ,  206   b  and  206   c . Each of the red, green and blue color filters  206   a ,  206   b  and  206   c  is disposed in the pixel region P. A common electrode  208  is formed over the color filter layer  206  and the black matrix  204 .  
         [0045]     A light emitting diode  300  is disposed under the LCD panel LP and a diffusion plate  301  is disposed between the light emitting diode  300  and the LCD panel LP. Specifically, the diffusion plate  301  includes a first diffusion plate  302  over the light emitting diode  300  and a second diffusion plate  304  over the first diffusion plate  302 .  
         [0046]     Although not shown, first and second gate integrated circuit boards are disposed at first and second areas in a periphery with an active area, respectively. First and second data integrated circuit boards may be disposed at third and fourth areas crossing the first and second areas in a periphery with an active area, respectively. The LCD device is independently driven by each of the first to fourth areas.  
         [0047]     It is noted that the black matrix  204  includes a first portion overlapping the gate line  104  and the data line  116  and a second portion overlapping the thin film transistors T and a part integral with the first portion that renders the black matrix  204  symmetrical with respect to the central gate line  104   a . In other words, a formation portion of the black matrix  204  has a uniform size with respect to whole area of the LCD panel LP and is not depended on a formation position of the thin film transistor T.  
         [0048]      FIG. 5  is a schematic plan view of a FSC type LCD panel applying to a tiling driving method according to the present invention.  
         [0049]     As shown in  FIG. 5 , a plurality of gate lines  104  and  104   a  and a plurality of data lines  116  cross the plurality of gate lines  104  to define a plurality of pixel regions P on a first substrate  100 . For example, the first substrate  100  includes a transparent insulating material. A plurality of thin film transistors T, T 1  and T 2  are formed at crossing points of the plurality of gate lines  104  and  104   a  and the plurality of data lines  116  and are symmetrically formed with respect to a central gate line  104   a  of the plurality of gate lines  104  and  104   a . Each of the plurality of thin film transistors T, T 1  and T 2  includes a gate electrode  102 , a semiconductor layer  108 , a source electrode  112  and a drain electrode  114 .  
         [0050]     More specifically, first and second thin film transistors T 1  and T 2  of the plurality of thin film transistors T, T 1  and T 2  adjacent to the central gate line  104   a  are connected to the central gate line  104   a . A plurality of pixel electrodes  122  are connected to the plurality of thin film transistors T, T 1  and T 2 , each of the plurality of pixel electrodes  122  is formed in each of the pixel regions P.  
         [0051]     Scanning signals are sequentially applied to two groups of the plurality of gate lines  104  and  104   a  with respect to the central gate line  104   a.    
         [0052]     A black matrix  204  overlaps the plurality of gate lines  104  and  104   a  and the plurality of data lines  116  including an interval between the plurality of pixel electrodes  122  and the plurality of gate and data lines  104 ,  104   a  and  116  to shield leakage light from the backlight unit (not shown). In addition, the black matrix  204  overlaps the plurality of thin film transistors T, T 1  and T 2  to prevent a leakage current that causes mis-driving.  
         [0053]     More specifically, the black matrix  204  includes a first portion overlapping the plurality of gate lines  104  and the plurality of data lines  116  and a second portion overlapping the plurality of thin film transistors T and a part AP that is integral with the first portion and renders the black matrix  204  symmetrical with respect to the plurality of thin film transistors T, and with respect to the plurality of the gate lines  104  and the central gate line  104   a.    
         [0054]     Because the black matrix  204  is formed as a uniform structure that does not depend on the position of the plurality of thin film transistors T, T 1  and T 2 , the moiré phenomenon caused by the visibility of the central gate line  104   a  is solved, thereby providing an LCD device having high image quality.  
         [0055]     Here, the black matrix  204  may be formed on the first substrate  100  or a second substrate (not shown) facing the first substrate  100 .  
         [0056]      FIGS. 6A  to  6 F are schematic plan views in accordance with a fabricating process of an LCD device according to the present invention.  
         [0057]      FIGS. 7A  to  7 F are schematic cross sectional views taken along lines VII-VII of  FIGS. 6A  to  6 F, respectively.  
         [0058]     In  FIGS. 6A and 7A , a plurality of gate lines  104  and  104   a  and a plurality of gate electrodes  102  connected to the plurality of gate lines  104  and  104   a  are formed by depositing and patterning a conductive metallic material such as aluminum (Al), Al alloy, chromium (Cr), molybdenum (Mo), tungsten (W), and titan (Ti) on a first substrate  100  having a plurality of pixel regions P. Each of the plurality of gate electrodes  102  is disposed in each of the plurality of pixel regions P. Since the plurality of gate electrodes  102  are symmetrically formed with respect to the central gate line  104   a  of the plurality of gate lines  104  and  104   a , the central gate line  104   a  has two gate electrodes  102  oriented in opposite directions toward each of the plurality of pixel regions P.  
         [0059]     Further, a gate insulating layer  106  is formed by depositing an inorganic insulating material such as silicon nitride and silicon oxide on an entire surface of the first substrate  100 .  
         [0060]     In  FIGS. 6B and 7B , a semiconductor layer  107  having an active layer  108  and an ohmic contact layer  110  is formed by sequentially depositing an intrinsic amorphous silicon layer and a doped amorphous silicon layer on the gate insulating layer  106  over the plurality of gate electrodes  102 .  
         [0061]     In  FIGS. 6C and 7C , a plurality of data lines  116  cross the plurality of gate lines  104 , a plurality of source electrodes  112  connect to the plurality of data lines  116 . A plurality of drain electrodes  114 , spaced apart from the plurality of source electrodes  112 , are formed by depositing and patterning a conductive metallic material such as Al, Al alloy, Cr, Mo, W, Ti and copper (Cu) over the semiconductor layer  107 . Each of the plurality of gate electrodes  102 , the plurality of source electrodes  112  and the plurality of drain electrodes  114  constitutes each of a plurality of thin film transistors T. First and second thin film transistors T 1  and T 2  adjacent to the central gate line  104   a  are connected to the central gate line  104   a.    
         [0062]     Next, a first portion of the active layer  108  between the source electrode  112  and the drain electrode  114  is exposed by removing a second portion of the ohmic contact layer  110  corresponding to the first portion of the active layer  108 . The exposed portion of the active layer  108  is defined as a channel CH.  
         [0063]     In  FIGS. 6D and 7D , a passivation layer  120  is formed by depositing an inorganic insulating material and coating an organic insulating material, such as a benzocyclobutene (BVB) and an acrylic resin, over the plurality of thin film transistors T. Next, a drain contact hole  121  is formed to expose a portion of the drain electrode  114  in the passivation layer  120 .  
         [0064]     In  FIGS. 6E and 7E , a plurality of pixel electrodes  122  are formed by depositing a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO) on the passivation layer  120  in the plurality of pixel regions P. Each of the plurality of pixel electrodes  122  are connected to the each of the plurality of drain electrodes  114  through each of the plurality of drain contact holes  121 .  
         [0065]     In  FIGS. 6F and 7F , a black matrix  204  is formed over the plurality of thin film transistors T, T 1  and T 2  and includes a first portion overlapping the plurality of gate lines  104  and  104   a  and the plurality of data lines  116 , a second portion corresponding the plurality of thin film transistors T, T 1  and T 2 , and a part AP that is integral with the first portion and renders the black matrix  204  symmetric with respect to the plurality of thin film transistors T and with respect to the plurality of the gate lines  104  and the central gate line  104   a.    
         [0066]     As shown in  FIG. 7F , the black matrix  204  may be formed on a second substrate  200  facing the first substrate  100 . In this case, the black matrix  204  having the first and second portions is formed on an inner surface of the second substrate  200 . A color filter layer  206  is formed on the black matrix  204  and includes red, green and blue color filters  206   a ,  206   b  and  206   c , respectively, formed in accordance with the plurality of pixel regions P.  
         [0067]     Next, a common electrode  208  is formed over an entire surface of the second substrate  200  having the black matrix  204  and the color filter layer  206 .  
         [0068]     However, the black matrix  204  may be formed on the first substrate  100  having the plurality of gate lines  104 , the plurality of data lines  116 , and the plurality of thin film transistors T.  
         [0069]     The black matrix  204  according to the present invention includes a first portion overlapping the plurality of gate lines and the plurality of data lines, a second portion corresponding the plurality of thin film transistors T, T 1  and T 2 , and a part AP that is integral with the first portion and renders the black matrix  204  symmetrical with respect to the plurality of thin film transistors T and with respect to the plurality of the gate lines  104  and the central ate line  104   a , thereby improving image quality preventing a moiré phenomenon and image defects caused by the visibility of the central gate line  104   a.    
         [0070]     It will be apparent to those skilled in the art that various modifications and variations can be made in the liquid crystal display devices of the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention covers the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.