Abstract:
A circuit and method for emulating a component in a circuit are shown that control a current controlled oscillator with a first current that is proportional to a square of a load current of the component and also charge and discharge a high precision capacitor using the current controlled oscillator. The oscillations of the current controlled oscillator are counted to obtain a count value, which is transformed to a transformed current signal using a predetermined transfer function. The transformed current signal is subtracted from the first current that controls the current controlled oscillator. The transformed current signal is subtracted from a second current that is proportional to a square of the load current to determine whether the count value is incremented or decremented responsive to the oscillations of the current controlled oscillator.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS  
       [0001]     This application claims the benefit of U.S. Provisional Patent Application No. 60/696,138 filed Jul. 1, 2005, herein incorporated by reference in its entirety for all purposes. 
     
    
     FIELD OF INVENTION  
       [0002]     The present invention relates to emulation of a component of a circuit. More particularly, it relates to hardware emulation of a transfer function for a circuit component.  
       BACKGROUND OF THE INVENTION  
       [0003]     Emulation circuits exist for emulating the characteristics of a component, such as a wire designed to carry high current loads. For example, an emulation circuit may be used to emulate the heating of a wire under a current load in order to generate a trip signal. The emulation circuit is often used to monitor the thermodynamics of a wire under a variable current load in order to identify abnormal conditions. A typical approach to modeling the thermal dynamics of a component, e.g. wire heating due to current, is to use a resistor capacitor (RC) time constant.  
         [0004]      FIG. 1  is a circuit diagram illustrating one example of an emulation circuit that emulates the effect of a load current I LOAD  on a wire connected to node X. This emulation circuit, typically referred to as an I 2 T timer, uses an RC time constant to set a threshold for an overload trip signal. In this example, resistor R and capacitor C are coupled to node X. I LOAD  charges capacitor C and resistor R discharges capacitor C to obtain the RC time constant response characteristic. Comparator COMP compares the voltage level generated at node X to a reference voltage in order to generate a trip signal TRIP if the voltage level exceeds the threshold determined by reference voltage V REF .  
         [0005]     The current I LOAD  is a sample of the actual load current applied to the component to be emulated. For example, I LOAD  may be a fractional representative sample of the actual load current that is squared, e.g. K*I 2 , and applied to the RC combination. The voltage at the RC combination is, therefore, representative of the power in the load. The transfer function for the thermal dissipation of the load is emulated through the selection of the RC time constant. For example, a thermal time constant of five seconds may be emulated using a RC combination of a 1 microfarad capacitor and a 5 mega-ohm resistor, which are generally large high-precision components.  
         [0006]     Though large high-precision resistors are available, their effective resistance is often distorted by factors as humidity, induction or printed circuit board (PCB) surface leakage. Further, the electro-static discharge (ESD) diodes typically provided for the protection of integrated circuits (ICs) effect the resistive accuracy due to diode leakage at high temperatures. Also, large value precision capacitors are not readily available and those that are available are typically physically large. In addition, some types of high value capacitors, such as tantalum or electrolytic capacitors, have high levels of leakage, which also degrades the accuracy of an associated RC time constant. All of these factors are exacerbated for system components that may be required to operate in extreme environmental conditions, e.g. −55 to +125° C. temperature range, as well as widely varying humidity levels.  
       SUMMARY OF THE INVENTION  
       [0007]     In an embodiment of a circuit for emulating a component in a circuit, the circuit includes a first current mirror circuit that has an input for receiving a load current and first and second outputs. The current mirror circuit is configured to generate first and second current signals at the first and second outputs, respectively, responsive to the load current, where the first and second current signals are proportional to a square of the load current. A first comparator has a first input coupled to the first output of the current mirror circuit, a second input for receiving a first reference voltage, and an output for generating an up/down signal responsive a voltage at the first input compared to the reference voltage. A counter has an up/down control input coupled to the output of the first comparator, a clock input, and an output for outputting a count value of the counter. A transfer function circuit has an input for receiving the count value of the counter and an output for generating a third current signal. The transfer function circuit is configured to generate the third current signal responsive to the count value modified by a predetermined transfer function. An absolute value circuit has an input and an output, where the input of the absolute value circuit is electrically coupled to the first output of the first current mirror circuit. A current controlled oscillator circuit has a first input coupled to the output of the absolute value circuit, a second input coupled to an external interface terminal for electrical connection to a capacitor, and an output coupled to the clock input of the clock circuit. The oscillator is configured to generate a clock signal at its output that has a frequency that is determined by the capacitor coupled to the second input of the oscillator and a current present at the first input of the oscillator. A second current mirror circuit has an input coupled to the output of the transfer function circuit, a first output coupled to the input of the absolute value circuit, and a second output coupled to the first input of the first comparator. The second current mirror circuit is configured to generate fourth and fifth current signals that are proportional to the third current signal at the first and second outputs, respectively.  
         [0008]     An embodiment of a method for emulating a component in a circuit calls for controlling a current controlled oscillator with a first current that is proportional to a square of a load current of the component as well as charging and discharging a high precision capacitor using the current controlled oscillator. The method also involves counting the oscillations of the current controlled oscillator to obtain a count value and transforming the count value to a transformed current signal using a predetermined transfer function. The method further sets forth subtracting the transformed current signal from the first current that controls the current controlled oscillator. Still further, the method recites subtracting the transformed current signal from a second current that is proportional to a square of the load current to determine whether the count value is incremented or decremented responsive to the oscillations of the current controlled oscillator. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0009]     Certain embodiments of the invention are described with reference to the following figures, wherein:  
         [0010]      FIG. 1  is a circuit diagram that illustrates an example of a conventional emulation circuit;  
         [0011]      FIG. 2  is a functional block diagram illustrating an embodiment of an emulation circuit;  
         [0012]      FIG. 3  is a functional block diagram illustrating one exemplary embodiment of the transfer function circuit of  FIG. 2 ; and  
         [0013]      FIG. 4  is a functional block diagram illustrating another exemplary embodiment of the transfer function circuit of  FIG. 2 . 
     
    
     DETAILED DESCRIPTION OF THE EMBODIMENTS  
       [0014]     In an emulator in accordance with the present invention, a long time constant is obtained by utilizing a current controlled oscillator that is controlled by a current that is proportional to the square of the load current in a component being emulated. The current controlled oscillator includes a small high precision capacitor that is charged and discharged by the oscillations thereby multiplying the value of the capacitor for purposes of emulating a large time constant. A digital timer circuit is used to simulate a large time constant using the small high precision capacitor and small current levels.  
         [0015]      FIG. 2  is a functional block diagram illustrating one exemplary embodiment of an emulator circuit according to the present invention. A load current I IN  is input to a current mirror  110  that generates three corresponding currents I 1 , I 2  and I 3  that are preferably proportional to the square of the input load current I IN , e.g. I 1 =K*I IN   2 . Current I 1  enters node N 1 , current I 2  enters node N 2 , and current I 3  enters node N 3 . I 2  is input to comparator  112 , which compares the voltage at node N 2  to a reference voltage V REF  and outputs to circuit node N 4  an UP/DOWN signal that controls the direction of counting in counter  130 , where a low logic voltage level at the output of comparator  112  corresponds to a downward count direction.  
         [0016]     Currents I 3  and I 7  are subtracted at the input to an absolute value circuit  114 , which outputs a current I 4  that reflects the absolute magnitude of the difference between currents I 3  and I 7 . Current I 4  drives current controlled oscillator  120 , which is coupled to external high precision capacitor CAP through interface terminal PIN. Oscillator  120  outputs a frequency signal FREQ at node N 6  that is proportional to current I 4  and to the value of the high precision capacitor CAP, which is charged and discharged by the oscillator. FREQ, in turn, drives a clock input CLK of counter  130 .  
         [0017]     Counter  130  generates a count value that increments or decrements responsive to the clock frequency FREQ received from oscillator  120  under control of the UP/DOWN signal produced by comparator  112 . In this example, counter  130  is an eight bit counter that produces a trip signal TRIP when it reaches a value of 128 and outputs an eight bit COUNT signal to transfer function circuit  150 . Transfer function circuit  150  implements a transfer function, such as f(x) or f(e x ), that is applied to the COUNT value in order to produce a current I 6 . The transfer function implemented by transfer function circuit  150  shapes the response of the circuit. In one example, the function implemented is f(e x ) and the circuit implements an exponential response to the input current load. Other examples of possible transfer functions or models include a linear transfer function or a squared function.  
         [0018]     Transfer function circuit  150  outputs a current I 6  at node N 9 , which is input to current mirror  160 . Current mirror  160  produces two currents I 7  and I 8  that are proportional to the current I 6 . I 7  feeds back to node N 3  and the input to absolute value circuit  114 . Current I 7  is subtracted from current I 3  at node N 3  such that the current driving oscillator  120  steadily decreases, in a steady state, as the value of the counter increases and decreases the rate at which the counter changes. The oscillation frequency slows and eventually stops when I 3 =I 7 . This results in the count value of counter  130  tracking the magnitude of the input current I IN . If the input current changes, then I 3 ≠I 7  and oscillation resumes. In one embodiment shown in  FIG. 3 , DAC  240  generates a reference current at node N 7  that is related to the maximum load current in a manner proportional to the maximum count of counter  130 , e.g. Iref=Imax*1/128.  
         [0019]     Similarly, current I 8  output by current mirror  160  feeds back to node N 2  and the input to comparator  112 , where it is subtracted from current I 2 . The result of the subtraction of I 8  from I 2  determines the direction of count for counter  130 . When I 2 &gt;I 8 , then the output of comparator  112  causes counter  130  to count up. When I 8 =I 2 , e.g. the count value reflects the magnitude of the input current, then the output of comparator  112  goes low, which causes counter  130  to count down. At steady state, the count may tend to increment above and decrement below an average count value. When the load current I IN  increases, then I 2 &gt;I 8 , the output of comparator  112  goes high, I 3 &gt;I 7 , oscillator  120  begins to oscillate, and the result is that the counter increments the count value until I 3 =I 8 . Similarly, if the load current drops, then I 2 &lt;I 8 , the output of comparator  112  goes low, I 3 &lt;I 7 , the oscillator begins to oscillate, and counter  130  decrements until the count value until I 3 =I 8 .  
         [0020]     The example of  FIG. 2  also includes overload detection circuitry that detects a current overload and, responsive thereto, causes the TRIP signal to be activated. Comparator  180  receives current I 1  from current mirror  110 . Current source  182  generates a reference current I 12 , which is subtracted from current I 1  at node N 1  and is the overload threshold. The output of comparator  180  controls switch  184 , which is interposed current mirror  160  and node N 3  and can cut off current I 7 .  
         [0021]     When current I 1  exceeds reference current I 12 , which represents an overload condition, then the voltage at node N 1  rises and exceeds reference voltage V REF  causing the output of comparator  180  to go active thereby opening switch  184 . With switch  184  open, current I 7  is cut-off from node N 3  and is no longer subtracted from I 3 . This results in the output of comparator  112  being forced high, oscillator  120  to oscillate rapidly, and the count value of counter  130  to quickly increment to the trip value, which activates the TRIP signal. In this way, the TRIP signal may be used to rapidly trip a circuit breaker to protect the emulated circuit from the overload current. Further, the output OLST of comparator  180  may be used as an overload detection signal for data collection and alarm signaling purposes, for example.  
         [0022]     Note that counter  130  tracks the cumulative integration of the current waveform, where the count reflects the total waveform width of various overload currents, e.g. spikes, and other changes in the input current I IN . However, when comparator  180  detects an overload condition, the overload count proceeds from the current count value. Consequently, if a current overload is of short duration and/or the pre-overload current level was relatively low, then the TRIP value may not be reached and no TRIP signal is generated. For example, this scenario may apply where a low load current has persisted for a substantial period of time, which results in a low count value in counter  130 , followed by a short duration overload that does not drive the count high enough to reach the TRIP value. In such a situation, the cumulative load on the emulated circuit, e.g. a wire, is not so great as to merit tripping a circuit breaker.  
         [0023]      FIG. 3  is a functional block diagram illustrating one exemplary embodiment of the transfer function circuit  150  of  FIG. 2 . DAC  240  generates an analog current I 5  at node N 7  that corresponds to the digital count value that it receives from counter  130 . I 5  is input to function generator  250 , which is an analog circuit that implements an exponential transfer function, in this example, of f(e x ). For example, function generator  250  may be a translinear implementation circuit that is well known in the art.  
         [0024]     Note that a status register may be interposed, for example, between the counter  130  and DAC  240  in order to capture the counter value for use in reporting current levels. For example, the status register may be software readable in an overall system, such that the count value in the status register is read and displayed or stored. See the discussion regarding  FIG. 4  below.  
         [0025]     Optionally, the output of comparator  112  also controls multiplexor (MUX)  270 , which selects between two reference currents I 9  and I 10  provided by current sources  272  and  274  respectively. This option permits for different transfer functions to be implemented for rising and falling currents. In the example of  FIG. 3 , this is implemented by inputting two different gain control currents I 9  and I 10 , supplied by current generators  272  and  274  respectively, into multiplexor  270  and using the up/down control signal generated by comparator  112  to control the MUX  270 . Thus, in this example, when the load current I IN  is increasing, MUX  270  passes current I 9  to node N 8  as the gain control current I 11  to function generator  250 . When load current I IN  is decreasing, then MUX  270  passes current I 10  to function generator  250 . In this manner, for example, a circuit that heats up at a faster rate than it cools down may be emulated. Note that his feature permits the speed of the response to be adjusted without changing the capacitor in the circuit. Note that, in this example, gross control of the transfer function may be obtained by selection of the value of capacitor CAP, while fine control of the transfer function may be obtained through adjustments to the current I 11 .  
         [0026]      FIG. 4  is a functional block diagram illustrating another exemplary embodiment of the transfer function circuit  150  of  FIG. 2 . In this example, the transfer control function is performed digitally through the use of read only memory (ROM)  350 , which is coupled to DAC  340 . ROM  350  receives the COUNT value from counter  130  of  FIG. 2  and implements a transfer function, e.g. f(x) in this example, through a look-up table. Also, in this example, an optional software readable status register  330  is coupled to counter  130  of  FIG. 2 .  
         [0027]     All references, including publications, patent applications, and patents, cited herein are hereby incorporated by reference to the same extent as if each reference were individually and specifically indicated to be incorporated by reference and were set forth in its entirety herein.  
         [0028]     The use of the terms “a” and “an” and “the” and similar referents in the context of describing the invention (especially in the context of the following claims) are to be construed to cover both the singular and the plural, unless otherwise indicated herein or clearly contradicted by context. Recitation of ranges of values herein are merely intended to serve as a shorthand method of referring individually to each separate value falling within the range, unless otherwise indicated herein, and each separate value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g., “such as”) provided herein, is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention unless otherwise claimed. No language in the specification should be construed as indicating any non-claimed element as essential to the practice of the invention.  
         [0029]     Preferred embodiments of this invention are described herein, including the best mode known to the inventors for carrying out the invention. It should be understood that the illustrated embodiments are exemplary only, and should not be taken as limiting the scope of the invention.