Abstract:
An oscillator arrangement having a resonator and a drive circuit which is connected to a connecting terminal of the oscillator is disclosed. In one embodiment, the oscillator includes
       a current source circuit is connected between a terminal for a first supply potential and the connecting terminal of the resonator and supplies the connecting terminal with a current source current which varies periodically at an oscillator frequency.       
 
     A current sink circuit is connected between the connecting terminal of the resonator and a second supply potential, where
       the current sink circuit draws a current sink current from the connecting terminal, said current sink current varying periodically at the oscillator frequency and being negatively fed back to the current source current.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
   This Utility Patent Application claims priority to German Patent Application No. DE 103 45 234.6-35, filed on Sep. 29, 2004, which is incorporated herein by reference. 
   FIELD OF THE INVENTION 
   The present invention relates to an oscillator arrangement. 
   BACKGROUND 
   Oscillator circuits—whose basic principle is based on the oscillator circuit described in Tietze, Schenk: “Halbleiter-Schaltungstechnik” [Semiconductor Circuitry], 11th edition, Springer Verlag, page 914, FIG. 14.19—are known generally. 
   Such a known arrangement will first of all be explained with reference to  FIG. 1  in order to assist understanding of the invention explained below. The oscillator circuit includes a resonator Q 1 , particularly a crystal resonator, which is connected between a terminal K 1  and a connection for a negative supply potential VSS or reference-ground potential. A variable capacitor Cs is connected in series with the resonator Q 1  for the purpose of setting or trimming the resonant frequency. 
   A drive circuit having a current source circuit  10  with positive feedback is provided for the purpose of exciting the resonator, the current source circuit  10  being connected between a positive supply potential VDD and the terminal K 1 . In addition, the drive circuit comprises a current sink Iq 1  which is connected between the terminal K 1  and the negative supply potential VSS and is used to set a basic current that is supplied by the current source circuit  10 . 
   The current source circuit  10  includes a first transistor M 1  which, in the example, is in the form of an NMOS transistor and whose load path is connected in series with a first resistor R 1  between the positive supply potential VDD and the first terminal K 1 , a capacitor C 1  being in parallel with the first resistor R 1 . This first transistor M 1  is operated with positive feedback to a current Iosc flowing into or out of the resonator Q 1 , as will be explained below. Provided for this purpose is a second transistor M 2  which, in the example, is likewise in the form of an NMOS transistor whose control connection is connected to a node that is common to the load path of the first transistor M 1  and the first resistor R 1 . The load path of this second transistor M 2  is connected in series with a second resistor R 2  and is connected to the positive supply potential VDD via this second resistor R 2 . A second capacitor C 2  is in parallel with this second resistor R 2 , the drive connection of the first transistor M 1  being connected to a node that is common to the load path of the second transistor M 2 , the second capacitance C 2  and the second resistor R 2 . 
   The second transistor M 2  is part of an amplifier circuit which is in the form of a differential amplifier and, in addition to the second transistor M 2 , comprises a third transistor M 3  whose load path is connected in series with a third resistor R 3  in parallel with the series circuit including the second transistor M 2  and the second resistor R 2 . A node that is common to the load paths of the second and third transistors M 2 , M 3  is connected, via a second current source Iq 2 , to the negative supply potential VSS. For the purpose of setting the operating point of the differential amplifier and the third transistor M 3 , a fourth resistor is connected between the positive supply potential VDD and the drive connection of said third transistor, and a third current source Iq 3  is connected between the drive connection of said third transistor and the negative supply potential VSS. 
   In the steady state, the resonator Q 1  draws a periodic current Iosc whose frequency corresponds to the resonator&#39;s resonant frequency and whose DC component is zero. 
   In the circuit arrangement having the current source  10 , the differential amplifier M 2 , M 3  and the setting circuit R 4 , Iq 3 , the latter are matched to one another in this case in such a manner that, in the case of an oscillator current Iosc=0, the drive potentials P 2 , P 3  for the second and third transistors M 2 , M 3  are identical when the current I 1  flows through the first transistor M. This matching is effected by dimensioning the first and fourth resistors. The second and third resistors are usually the same size. 
   The way in which the invention described works is explained below. 
   To this end, the case in which the oscillator current Iosc is equal to zero will be considered first of all. In that case, the current I 1  supplied by the current source flows through the first resistor R 1 , said current giving rise to a voltage drop
 
 U 1= I 1· R 1  (1)
 
across this resistor. The drive potential P 2  on the drive connection of the second transistor M 2  is then
 
 P 2= VDD−U 1= VDD−I 1 ·R 1  (2).
 
   A current I 21  which gives rise to a voltage drop U 2  across the second resistor R 2  flows through the second transistor M 2 , said voltage drop determining the drive potential P 1  for the first transistor M 1 , for which
 
 P 1= VDD−U 2  (3).
 
   If a current Iosc now flows, in the direction indicated, from the terminal K 1  into the resonator Q 1 , the current flowing through the first transistor M 1  rises by this current drawn by the resonator Q 1 . As a result, the voltage drop U 1  across the first resistor R 1  rises, and the drive potential P 2  for the second transistor M 2  falls. This limits the second transistor M 2 , as a result of which the current flowing through the resistor R 2  falls and the voltage drop U 2  across this resistor R 2  decreases. This increases the drive potential P 1  for the first transistor M 1 , as a result of which the transistor M 1  is turned on in order to increase the current flowing into the resonator Q 1 . 
   If, by contrast, a current flows from the resonator Q 1  into the terminal K 1 , the current flowing through the first transistor M 1  is reduced by the current Iosc provided by the resonator Q 1 . As a result, the voltage drop U 1  across the first resistor R 1  falls, and the drive potential P 2  for the second transistor M 2  rises. This turns on the second transistor M 2 , as a result of which the current flowing through the resistor R 2  rises, and the voltage drop U 2  across this resistor R 2  increases. As a result, the drive potential P 1  for the first transistor M 1  falls, as a result of which this first transistor M 1  is limited to the previous operating point in order to increase the current flowing from the resonator Q 1  into the terminal K 1 . 
   In summary, the current source arrangement  10  is thus operated with positive feedback to the current which is drawn by the resonator and varies periodically at the resonant frequency. 
   The capacitors C 1 , C 2  which are connected in parallel with the first and second resistors R 1 , R 2  are dimensioned in such a manner that the oscillator is stimulated to oscillate at its fundamental frequency but not at harmonics of the resonant frequency. Changes in the currents flowing through the first and second transistors M 1 , M 2 , at a frequency above the resonant frequency, are filtered out by these capacitors C 1 , C 2  and can thus change the respective drive potentials P 1 , P 2  for the transistors M 1 , M 2  to a lesser extent. 
   The following is true for an input impedance Zinl of the drive circuit at the terminal K 1 :
 
 Z in=1/gm1− Z 1· Z 2·gm2/2  (4),
 
where gm 1  denotes the transconductance, i.e., the ratio of the output current to the applied voltage, of the first transistor M 1  at the operating point at which the transistor is operated. gm 2  accordingly denotes the transconductance of the second transistor. Z 1  denotes the impedance of the parallel circuit including the first resistor R 1  and the first capacitor, and Z 2  denotes the impedance of the parallel circuit including the second resistor R 2  and the second capacitor C 2 . Referring to the equivalent circuit diagram which is likewise illustrated in  FIG. 1 , this input impedance is illustrated as a series circuit including a negative resistance and an inductance.
 
   Interference may occur in such an oscillator arrangement when radio-frequency noise signals (EMI signals) are injected into the circuit at the terminal K 1  and are superimposed on the oscillator current Iosc. 
   In order to increase the robustness of such an oscillator arrangement with respect to radio-frequency noise signals, it is possible to increase the basic current I 1  of the first current source Iq 1 . However, such a procedure is not suitable for oscillator arrangements which are used in systems that have been optimized for a low power consumption. 
   SUMMARY 
   The present invention provides an oscillator arrangement having increased robustness with respect to radio-frequency noise signals. 
   This aim is achieved by means of an oscillator arrangement in accordance with the features of claim  1 . The subclaims relate to advantageous refinements of the invention. 
   The oscillator arrangement comprises a resonator, preferably a crystal resonator having a connecting terminal, and a drive circuit for the resonator, said drive circuit being connected to the connecting terminal. The drive circuit comprises a current source circuit, which is connected between a terminal for a first supply potential and the connecting terminal of the resonator and supplies the connecting terminal with a current source current which varies periodically at the oscillator frequency, and a current sink circuit which is connected between the connecting terminal of the resonator and a second supply potential. The current sink circuit is designed to draw a current sink current from the connecting terminal, said current sink current varying periodically at the oscillator frequency and being negatively fed back to the current source current. 
   In comparison with conventional drive circuits having a static current sink, this drive circuit having the current source circuit (which is operated with positive feedback to the oscillator current) and the current sink circuit (which is operated with negative feedback to the current source circuit) produces an increased oscillator current. This is because, if the resonator in this arrangement draws current, the current drawn by the current sink is reduced, as a result of which a higher current than in conventional drive circuits flows from the current source to the resonator. If current flows from the resonator into the drive circuit, the current drawn by the current sink increases, as a result of which a higher current than in conventional drive circuits flows from the resonator into the drive circuit. In summary, the increased oscillator current results in a higher signal-to-noise ratio and thus increased robustness with respect to noise signals. 
   One embodiment provides for the current source circuit to have a first transistor whose load path is connected in series with a first load between the terminal for the first supply potential and the oscillator terminal K 1 . This first transistor is cross-coupled to a second transistor whose load path is connected in series with a second load to the terminal for the first supply potential and which is driven on the basis of a flow of current through the first load. In this case, the first transistor is driven on the basis of a flow of current through the second load. 
   The current sink circuit has a transistor whose load path is connected between the terminal K 1  and the second supply potential and whose drive connection is coupled to the drive connection of the second transistor in order to be operated in synchronism with the second transistor and thereby in a push-pull manner with respect to, or with negative feedback to, the first transistor in the current source circuit. 
   The drive connection of the transistor in the current sink circuit is preferably coupled capacitively to the drive connection of the second transistor by means of a capacitor connected between the drive connections. 
   In one embodiment, the second transistor is part of a differential amplifier having a third transistor whose load path is connected in series with a third load to the first supply potential, a load connection of the second transistor and a load connection of the third transistor being jointly connected to the second supply potential via a current source. For the purpose of setting an operating point for the current sink transistor, this embodiment provides an amplifier, one input of which is preferably connected to the drive connection of the second transistor via a low-pass filter, the other input of which is connected to the drive connection of the third transistor, and the output of which is connected to the drive connection of the current sink transistor. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate the embodiments of the present invention and together with the description serve to explain the principles of the invention. Other embodiments of the present invention and many of the intended advantages of the present invention will be readily appreciated as they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts. 
       FIG. 1  illustrates an oscillator arrangement (based on the prior art) having a resonator and a drive circuit for the resonator. 
       FIG. 2  illustrates an exemplary embodiment of an inventive oscillator arrangement having a resonator and a drive circuit for the resonator. 
       FIG. 3  illustrates a test arrangement for ascertaining the influence of noise signals on the inventive oscillator arrangement. 
       FIG. 4  illustrates the maximum power of noise signals (which are coupled to the oscillator terminal in the arrangement illustrated in  FIG. 3 ) tolerated by the oscillator arrangement plotted against the frequency. 
       FIG. 5  illustrates improvements in the robustness of the inventive oscillator arrangement in comparison with a known oscillator arrangement. 
   

   DETAILED DESCRIPTION 
   The oscillator arrangement illustrated in  FIG. 2  comprises a resonator Q 1 , preferably a crystal resonator Q 1 , which is connected between a connecting terminal K 1  and a second supply potential VSS or reference-ground potential. In the exemplary embodiment, a capacitor Cs which is used to trim the resonant frequency of the resonator Q 1  and is preferably variable is in series with this resonator Q 1 . A drive circuit for the oscillator comprises a current source circuit  10  which is connected between a terminal for a first supply potential or positive supply potential VDD and the oscillator connecting terminal K 1 . The drive circuit furthermore comprises a current sink circuit  20  which is connected between the oscillator connecting terminal K 1  and the second supply potential VSS. 
   The current source circuit  10  shown in the example corresponds, in terms of its design, to the current source circuit  10  explained with reference to  FIG. 1  and, in the steady state of the oscillator arrangement, is designed to supply the oscillator terminal K 1  with a current which varies periodically at the oscillator frequency. To this end, the drive circuit  10  comprises a transistor M 1  which is connected in series with a load R 1 , C 1  between the first supply potential VDD and the oscillator connecting terminal K 1 , is turned on to an operating point (that is set at Iosc=0) during positive half-cycles of the oscillator current Iosc—when the current is thus flowing in the direction indicated in  FIG. 2 , and which, during negative half-cycles of the oscillator current Iosc, is limited to the operating point that is set. In order to drive the first transistor M 1  with positive feedback to the oscillator current Iosc, a second transistor M 2 —whose load path is connected in series with a load R 2 , C 2  between the terminal for the positive supply potential VDD and a current source Iq 2 —is provided. The load which is connected in series with the first transistor M 1  comprises a parallel circuit comprising a first resistor R 1  and a first capacitor C 1 . The load which is connected in series with the load path of the second transistor M 2  comprises the parallel circuit comprising a second resistor R 2  and a second capacitor C 2 . 
   The second transistor M 2  is part of a differential amplifier comprising a third transistor M 3  which is connected in series with a third resistor R 3  between the positive supply potential VDD and the current source Iq 2  that is likewise part of the differential amplifier. The first and second resistors R 2 , R 3  are the same size. In order to set the operating point of this differential amplifier, the control connection of the third transistor M 3  is connected, via a resistor R 4 , to the positive supply potential VDD and, via a current source Iq 3 , to the negative supply potential VSS. 
   The control connection of the second transistor M 2  is connected to a node which is common to the load path of the first transistor M 1  and the load R 1 , C 1 , and the control connection of the first transistor M 1  is connected to a node which is common to the load path of the second transistor M 2  and the second load R 2 , C 2 . 
   The current sink circuit  20  comprises a fourth transistor M 4  whose load path is connected between the oscillator terminal K 1  and the negative supply potential VSS. This fourth transistor GM 4  is operated with negative feedback to the first transistor M 1  in the current source circuit  10  and, in the exemplary embodiment, is coupled, for this purpose, to the control connection of the second transistor M 2  which, as has already been explained, is likewise operated with negative feedback to the first transistor M 1  in order to operate the first transistor M 1  with positive feedback to the oscillator current Iosc. The control connection of the fourth transistor M 4  and the control connection of the second transistor M 2  are capacitively coupled by means of a capacitive voltage divider having a first capacitor C 3  and a second capacitor C 4 , said voltage divider being connected between the control connection of the second transistor M 2  and the negative supply potential VSS, and the control connection of the fourth transistor M 4  being connected to the center tap of said voltage divider. In this case, the fourth capacitor C 4  is preferably formed by the gate-source capacitance (inevitably present) of the fourth transistor M 4  which, in the example, is in the form of an NMOS transistor. At the customary oscillator frequencies and with the turning-on and limiting operations—that take place at the same frequency—of the transistors M 1 , M 2 , the capacitive coupling explained causes the fourth transistor M 4  to be operated in synchronism with the second transistor M 2 . 
   The way in which this circuit arrangement works is explained below. 
   In the case of an oscillator current Iosc=0, the transistors M 1 -M 4  in the drive circuit are at their respective operating point, on the basis of which they are turned on or limited during positive or negative half-cycles of the oscillator current Iosc. In order to set the operating point of the fourth transistor M 4  in the current sink circuit  20 , there is a transconductance amplifier A 1  whose inputs are connected to the inputs of the differential amplifier in the current source circuit  10 , one of the inputs being connected to the drive connection of the second transistor M 2  via a low-pass filter LP. This transconductance amplifier A 1  sets the operating point of the fourth transistor M 4  in such a manner that, in the case of an oscillator current Iosc=0, the first transistor M 1  has a current flowing through it which causes the drive potential P 2  (which is dependent on this flow of current) for the second transistor M 2  to correspond to the drive potential P 3  for the third transistor M 3 . In this case, the output impedance of this transconductance amplifier A 1  is of such a magnitude that drive signals which are injected into the drive connection of the fourth transistor M 4  by the drive connection of the second transistor M 2  via the capacitive voltage divider are not distorted or corrupted. 
   During a positive half-cycle of the oscillator current Iosc, the first transistor M 1  is turned on to its operating point in the manner explained, while the second transistor M 2 , and thus also the fourth transistor M 4  that is coupled to this second transistor M 2 , are limited to the respective operating point when Iosc=0. This reduces the current flowing through the fourth transistor M 4 , thus resulting in an increased oscillator current Iosc, since the current supplied by the current source circuit  10  is not influenced by the limitation of the fourth transistor M 4 . 
   It should be assumed that, when Iosc=0, a current I 1  flows through the first and fourth transistors M 1 , M 4 . If, during a positive half-cycle of the oscillator current Iosc, the first transistor M 1  is turned on in such a manner that a current I 1 +ΔI 1  flows through the latter and a current I 1 −ΔI 1  flows through the fourth transistor M 4  on account of its limitation, this results in an oscillator current Iosc=2·ΔI 1 . Under the same conditions, only an oscillator current Iosc=ΔI 1  would be drawn by the resonator in the oscillator circuit based on the prior art (shown in  FIG. 1 ) having a static current sink. The inventive drive circuit thus considerably increases the oscillator current Iosc for unchanged power consumption. This increase in the oscillator current Iosc results in an increased signal-to-noise ratio and the latter results in increased robustness with respect to radio-frequency noise signals. 
   For the sake of completeness, it should be mentioned that, during the negative half-cycle of the oscillator current Iosc, the first transistor M 1  is limited in the manner explained above, and the fourth transistor M 4 , which is operated with negative feedback, is turned on. As a result, the fourth transistor M 4  accepts a higher current than in the state when Iosc=0, thus resulting in an increased oscillator current Iosc in comparison with the prior art. 
   In summary, providing a current sink circuit which is operated with negative feedback to the current source circuit makes it possible, for the same power consumption of the drive circuit, to considerably increase the oscillator current and thus to considerably improve the robustness with respect to radio-frequency noise signals. 
   The following is true for the input impedance Zin of the drive circuit illustrated in  FIG. 2 : 
   In this case, Z 1  is the impedance of the first load, that is to say of the parallel circuit comprising the first resistor R 1  and the first capacitor C 1 , Z 2  is the impedance of the second load, gm 4  is the transconductance of the fourth transistor M 4  at its operating point when Iosc=0, and k=C 3 /(C 3 +C 4 ) is the capacitive voltage divider ratio of the voltage divider formed from the capacitors C 3 , C 4 . The capacitance value of the first capacitor C 1 , which is in series with this capacitive voltage divider, is preferably considerably smaller than the capacitance value of the capacitor C 3  which couples the fourth transistor M 4  to the second transistor M 2 . 
   The considerable improvement in the robustness—with respect to noise signals—of the drive circuit illustrated in  FIG. 2  in comparison with the known drive circuit shown in  FIG. 1  was verified using an experiment, the test set-up of which is shown in  FIG. 3 . 
   In this case, the drive circuit is shown in the form of the small-signal equivalent circuit diagram which comprises a series circuit comprising the negative resistance Rosc 2  determined in the above equation and the inductance Losc 2 . 
   A radio-frequency signal was injected into the oscillator terminal K 1  via a capacitor having a capacitance of 1 pF. This signal was provided by a signal generator having an output impedance of 50 ohms, the power of this radio-frequency signal having been increased until the oscillator arrangement no longer operated at the desired frequency. 
   Curve  2  in  FIG. 4  illustrates these maximum tolerated noise signal power levels plotted against the frequency for the oscillator arrangement based on the prior art and curve  1  shows them for the inventive oscillator arrangement. This clearly shows that, particularly for noise signals in a range between 0.5 and 2 GHz, the inventive oscillator arrangement tolerates considerably higher noise signal power levels than an oscillator arrangement based on the prior art. 
     FIG. 5   a  illustrates the difference between curve  2  and curve  1 , that is to say the difference between the noise signal power levels tolerated by the inventive oscillator arrangement and those tolerated by the oscillator arrangement based on the prior art, for the respective frequency. 
     FIG. 5   b  illustrates part of the curve in  FIG. 5   a  for the frequency range between 10 and 50 MHz.