Abstract:
A power supply circuit includes: an anti-electromagnetic interference circuit configured to receive input alternating current power and to output filtered alternating current power; a rectifier circuit configured to rectify the filtered alternating current power; a current correction circuit configured to perform passive power factor correction on the rectified alternating current power; a single-ended flyback converter circuit coupled to the output of the current correction circuit; and a dimming control circuit coupled between the output of the single-ended flyback converter circuit and a light load, wherein the current correction circuit is configured to control a waveform of the rectified alternating current power to follow a current output to the light load in order to provide passive power factor correction.

Description:
CROSS-REFERENCE TO RELATED APPLICATION(S) 
       [0001]    This application claims priority to Chinese Patent Application No. 201521028180.0, filed in the State Intellectual Property Office of the People&#39;s Republic of China on Dec. 11, 2015 and priority to Chinese Utility Model Patent Application No. 201510917091.X, filed in the State Intellectual Property Office of the People&#39;s Republic of China on Dec. 11, 2015, the entire disclosures of which are incorporated herein by reference. 
       BACKGROUND 
       [0002]    1. Field 
         [0003]    Aspects of embodiments of the present invention relate to power electronics, more specifically power electronics having high power factor and low standby power consumption. 
         [0004]    2. Related Art 
         [0005]    One comparative design of a single-ended flyback converter circuit cannot achieve power factor greater than 0.7. Another comparative design includes active power factor correction (APFC) and a single-stage or a double-stage single-ended flyback converter circuit, but this circuit also has limitations and may be unable to meet energy efficiency standards such as no-load power consumption of less than 0.1 W. Therefore, comparative circuit designs may not be able to meet various power consumption design requirements imposed by current standards (e.g., California Energy Commission standards for efficiency of portable luminaries and U.S. Department of Energy (DOE) Level VI standards). 
       SUMMARY 
       [0006]    Aspects of embodiments of the present invention are directed to a single-ended flyback converter circuit with passive power factor correction (PPFC) circuit capable of achieving no-load power consumption less than 0.1 W, and the power efficiency of greater than 81.81%. 
         [0007]    According to one embodiment of the present invention, a power supply circuit includes: an anti-electromagnetic interference circuit configured to receive input alternating current power and to output filtered alternating current power; a rectifier circuit configured to rectify the filtered alternating current power; a current correction circuit configured to perform passive power factor correction on the rectified alternating current power; a single-ended flyback converter circuit coupled to the output of the current correction circuit; and a dimming control circuit coupled between the output of the single-ended flyback converter circuit and a light load, wherein the current correction circuit is configured to control a waveform of the rectified alternating current power to follow a current output to the light load in order to provide passive power factor correction. 
         [0008]    The current correction circuit may include: a first discharge circuit including a first electrolytic capacitor coupled in series with a first diode and a first node between the first electrolytic capacitor and the first diode; a second discharge circuit including a second electrolytic capacitor coupled in series with a second diode and a second node between the second electrolytic capacitor and the second diode, the first discharge circuit and the second discharge circuit being coupled in parallel across an output of the rectifier circuit; and a third diode coupled between the first node and the second node. 
         [0009]    The single-ended flyback converter circuit may include: a power supply controller; an output transformer coupled to the power supply controller; a secondary transformer coupled to the output transformer; an optocoupler coupled between the power supply controller and the secondary transformer; and a dimming control circuit coupled to the secondary transformer and configured to provide dimming control. 
         [0010]    The single-ended flyback converter circuit may further include: an RCD snubber circuit coupled between the current correction circuit and the output transformer and coupled to the power supply controller. 
         [0011]    The RCD snubber circuit may include: a first resistor; a second resistor; a capacitor; and a diode, wherein the first resistor, the second resistor, and the capacitor are coupled in parallel between the current correction circuit and a cathode of the diode of the RCD snubber circuit, and wherein an anode of the diode of the RCD snubber circuit is coupled to the power supply controller. 
         [0012]    The dimming control circuit may include: a three-terminal integrated voltage regulator; a dimming controller coupled to the three-terminal integrated voltage regulator; a MOS transistor; and a load output terminal. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0013]    The accompanying drawings, together with the specification, illustrate exemplary embodiments of the present invention, and, together with the description, serve to explain the principles of the present invention. 
           [0014]      FIG. 1  is a block diagram of energy-saving circuitry according to one embodiment of the present invention; 
           [0015]      FIG. 2  is circuit diagram illustrating an anti-electromagnetic interference circuit and the rectifier circuit according to one embodiment of the present invention; 
           [0016]      FIG. 3  is a circuit diagram illustrating a current correction circuit according to one embodiment of the present invention; 
           [0017]      FIG. 4  is a circuit diagram illustrating a single-ended flyback converter circuit according to one embodiment of the present invention; 
           [0018]      FIG. 5  is a circuit diagram illustrating a dimming control circuit according to one embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0019]    In the following detailed description, only certain exemplary embodiments of the present invention are shown and described, by way of illustration. As those skilled in the art would recognize, the invention may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. 
         [0020]    Referring to the block diagram of  FIG. 1 , a high power factor, ultra low standby power consumption energy-saving circuit includes, starting from an input terminal, sequentially connected blocks from an anti-electromagnetic interference (EMI) circuit  10 , a rectifier circuit  20 , a current correction circuit  30  (which may be considered a power factor correction or PFC circuit, and which may perform passive power factor correction or PPFC on the input power), a single-ended flyback converter circuit  40 , a dimming control circuit  50 , where the output of the dimming control circuit  50  is connected to a load  70  (e.g., a light emitting diode light bulb), where the PPFC by the current correction circuit  30  controls the input current to follow output waveform changing circuit in order to reduce the output current waveform distortion. 
         [0021]    As shown in  FIG. 2 , in one embodiment of the present invention, the input terminal of the anti-electromagnetic interference circuit  10  is connected to AC power through terminals IN 1  and IN 2 , where fuse F 1  is connected between the two input terminals IN 1  and IN 2 . A capacitor C 1  is coupled in parallel with resistors RL 1 , RL 2  and in series with inductance L 1  to form an RLC (or RC) filter circuit, and the output of the filter circuit  10  is connected to a rectifier circuit  20  (e.g., terminals labeled  1  and  3 ), which includes a full bridge rectifier circuit D 1 , which has output terminals  2  and  4 . 
         [0022]    As shown in  FIG. 3 , according to one embodiment of the present invention, the PPFC by the current correction circuit  30  includes a first discharge circuit and a second discharge circuit coupled in parallel between the output terminals  2  and  4  of the rectifier circuit  20  and between the input terminals A and B of the converter circuit  40  (e.g., the current correction circuit  30  has outputs connected to the input terminals A and B of the converter circuit  40 ), where a first discharge circuit includes an electrolytic capacitor C 2  connected in series with a diode D 2  (e.g., the diode D 2  is directly connected to the capacitor C 2 ), and where the second discharge circuit includes an electrolytic capacitor C 16  connected in series with a diode D 4  (e.g., the capacitor C 16  is directly connected to the diode D 4 ). A first node n 1  is between the electrolytic capacitor C 2  and the diode D 2  of the first discharge circuit, and a second node n 2  is between the electrolytic capacitor C 16  and diode D 4 . A diode D 3  connects (e.g., is directly connected to) nodes n 1  and n 2  between the first discharge circuit and the second discharge circuit. 
         [0023]    After the input power is rectified by the rectifier circuit  20 , the rectified positive half cycle current is input through the capacitor C 2 , the diode D 3 , and the capacitor C 16 , thereby charging the two capacitors C 2  and C 16 . After reaching a positive half cycle peak, the capacitor C 2  and the auxiliary discharge diode D 2 , together with the rear-stage circuit, form a discharge circuit, and the capacitor C 2  discharges until the voltage drops to 1/2 VCC (VCC defined as the total voltage across two fully charged capacitors C 2  and C 16 ), at which time capacitor C 2  stops discharging, but, at this time, capacitor C 16  and diode D 4  and the rear-stage circuit form a discharge circuit, capacitor C 16  starts discharging. As such, the current correction circuit  30  discharges two capacitors alternately, so that the input current waveform can be continuous, in order to reduce the current distortion, and thereby achieve a power factor greater than 0.7. 
         [0024]    In addition to the above discussion, embodiments of the present invention are also directed to a whole circuit proving a high power factor through the application of PPFC specific programs by the current correction circuit  30  and a single-ended flyback converter circuit  40  which are combined to form a control circuit core. 
         [0025]    A comparative design of a single-ended flyback converter circuit with low PFC generally cannot achieve a power factor greater than 0.7 and therefore cannot meet certain regulatory standards. For example, the California Energy Commission (CEC) 2015 Appliance Efficiency Regulations (July 2015, CEC-400-2015-021), which require the power factor for portable LED luminaries and portable luminaries with LED light engines with integral heat sink, labeled or sold for residential use, to be greater than or equal to 0.70 (see California Code of Regulations, Title 20 §1605.3(n)(3), Table N-2). Another comparative circuit design of a single-stage or double-stage single ended flyback converter circuit includes an active power factor correction (APFC) circuit. Although this arrangement can achieve high power factor correction, the minimum power requirements of such a circuit are around 0.2-0.3 W, and therefore these circuits cannot achieve less than 0.1 W of power consumption in a no-load state, and therefore cannot meet certain energy efficiency standards (e.g., the above CEC Regulations or the U.S. Department of Energy (DOE) Level VI energy efficiency standards). 
         [0026]    A circuit according to embodiments of the present invention uses PPFC to achieve high power factor correction and also uses the current correction circuit  30  which has low loss (e.g., far less than 0.1 W, and, in the ideal state, can be considered to have no loss). At the same time, the rear stages do not need to end with a power factor corrected single ended flyback converter circuit  40 , due to high resistance and very low static losses. After the circuit starts, there is substantially no energy consumed under no load conditions. Therefore, it is possible to achieve, under no-load conditions, a load loss of less than 0.1 W, coupled by the current correction circuit  30  providing PPFC, the total loss provided by the current correction circuit is less than 0.1 W, and therefore embodiments of the present invention can meet the energy efficiency standards such as the Level VI standards of the U.S. Department of Energy and the California Energy Commission regulations for portable luminaries. 
         [0027]    Referring to  FIG. 4 , the single ended flyback converter circuit  40  according to one embodiment of the present invention includes a power supply controller IC 1  coupled to an output terminal of the output transformer T 1 , optocoupler IC 2 , and peripheral basic electronic components. The output transformer T 1  is connected, through secondary transformer T 2 , to dimming control circuit  50 , which provides the working voltage of the dimming control circuit  50  and the driving voltage of the load  70 . The output is fed back to output transformer T 1  (e.g., through the power supply controller IC 1 ) via optocoupler IC 2 , which provides optical isolation between the output and the primary side of the output transformer T 1  (and the power supply controller IC 1 ). The single ended flyback converter circuit  40  is coupled to the output of the current correction circuit  30  via input terminals A and B (e.g., the single ended flyback converter circuit  40  receives input power from the current correction circuit  30 ). 
         [0028]    In addition, the single-ended flyback converter circuit  40  also includes a resistor capacitor diode (RCD) snubber circuit  60  configured to absorb voltage spikes, where the RCD snubber circuit  60  is connected between the output terminal of the PPFC  30  and the input end (or primary side) of the output transformer T 1 , and is also connected to the power supply controller IC 1 . 
         [0029]    The RCD snubber circuit  60  includes resistor R 5 , resistor R 6 , capacitor C 6 , and diode D 5 , where resistor R 5 , resistor R 6 , and capacitor C 6  are connected in parallel between the output terminal of the current correction circuit  30  and the cathode of diode D 5 , where the anode of diode D 5  is connected to the power supply controller IC 1 . 
         [0030]    As shown in  FIG. 5 , according to one embodiment of the present invention, the dimming control circuit  50  includes the sequentially connected blocks including a 3-terminal integrated voltage regulator IC 3 , a dimming controller IC 4 , and a metal oxide semiconductor (MOS) transistor Q 1  coupled to the load output terminal SIP 2 , along with peripheral basic electronic parts. The three-terminal positive regulator (or three-terminal integrated voltage regulator) IC 3  converts the power VCC to the working voltage required by the dimming controller IC 4  (e.g., 5V) and through the conduction arising from the control of the MOS transistor Q 1  by the dimming controller IC 4 , the load output of the power supply to the light (e.g., an LED light bulb) is supplied through the load output terminal SIP 2 . 
         [0031]    While the present invention has been described in connection with certain exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims, and equivalents thereof.