Abstract:
In the case where a game controller is provided with plural elements for obtaining outputs by changes in resistance values, currents also flow through some of the elements not detected, increasing current consumption. Also, the number of input lines to a CPU increases, putting a heavy load on the CPU. Plural variable resistors each comprising a resistance member and an elastically deformable element are connected to common fixed resistors, and midpoints between the variable resistors and the fixed resistors are connected to an A/D converting circuit as common output paths. Connection parts connected to the variable resistors are switched in order to a ground potential, whereby voltage outputs based on changes in resistance values of the variable resistors can be obtained in order from the common output paths.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    1. Field of the Invention  
           [0002]    The present invention relates to a detector provided with plural input means for obtaining output by changes in resistance values, and more particularly to a detector that switches outputs from the plural input means with a simple circuit construction.  
           [0003]    2. Description of the Prior Art  
           [0004]    Some recent game controllers have switches that provide outputs changing in an analog fashion according to changes in push pressure, in addition to ON-OFF switches. By using this type of controllers, for example, in a car race game, game operations such as car speed adjustment can be performed with adjustment of the pushing force onto a pushbutton.  
           [0005]    Input means capable of changing output by changing the push pressure are, for example, those that are provided with resistance members on a substrate thereof and have elastically deformable contacts facing the resistance members, wherein the contacts are made of a material having a lower resistivity than the resistance members. Pushing a pushbutton to press the contact against the resistance member causes resistance values to change corresponding to changes in a contact area between the contact and the resistance member.  
           [0006]    The input means generally reduce influence of output fluctuations due to changes in environment temperature, and resistance value variations at manufacturing time by connecting an element for changing resistance values and a fixed resistor in series using the contact and delivering a potential at a midpoint between them as an output value, as shown in FIGS. 6 and 7.  
           [0007]    [0007]FIGS. 6 and 7 show circuit configurations of a detector provided with the plural input means.  
           [0008]    Input means  1   a ,  1   b ,  1   c , . . . , and  1   n  have variable resistors VR 1 , VR 2 , VR 3 , . . . , and VRn individually connected in series with fixed resistors R 1 , R 2 , R 3 , and Rn, wherein the variable resistors VR 1 , VR 2 , VR 3 , and VRn each comprise the resistance member and the contact. A common source voltage Vcc is applied to the ends of the fixed resistors R 1 , R 2 , R 3 , . . . , and Rn of the input means  1   a ,  1   b ,  1   c , . . . , and  1   n , and the ends of the variable resistors VR 1 , VR 2 , VR 3 , . . . , and VRn are grounded together. Each input means has an output part P 1 , P 2 , P 3 , . . . , or Pn at a midpoint between the variable resistor and the fixed resistor, and an output from the output part is converted into a digital value by an A/D converter  2  before being presented to the CPU.  
           [0009]    In the detector shown in FIG. 7, signals obtained from the output parts P 1 , P 2 , P 3 , . . . , and Pn at the midpoints are switched in order by a switching means  3  comprised of active elements before being presented to the A/D converter and the CPU.  
           [0010]    As shown in FIG. 6, in the detector in which all the output parts P 1 , P 2 , P 3 , . . . , and Pn of the input means  1   a ,  1   b ,  1   c ,  1   d , . . . , and  1   n  are converted by the A/D converter  2  before being presented to the CPU, each of the output parts P 1 , P 2 , P 3 , . . . , and Pn must be subjected to A/D conversion in parallel. Accordingly, the A/D converter  2  must be expensive so that plural input signals can be subjected to A/D conversion in parallel, and the CPU is also heavily loaded for data processing because plural outputs having been subjected to A/D conversion are inputted at the same time.  
           [0011]    In the detector shown in FIG. 7, since outputs from the output parts P 1 , P 2 , P 3 , . . . , and Pn are switched in order by the switching means  3  comprised of active elements before being presented to the A/D converter and the CPU, an A/D converter supporting one-line outputs can be used, with the result that the circuit can be configured at a low cost, and since one-line outputs are switched and inputted to the CPU, loads on the CPU can be reduced.  
           [0012]    However, in the detectors shown in FIGS. 6 and 7, in all of the input means  1   a ,  1   b ,  1   c , . . . , and  1   n , since a source voltage is applied at all times and other ends are grounded, currents keep flowing through all the input means, consuming a large amount of current.  
           [0013]    In the detector shown in FIG. 7, since the number of channels switched by the switching means  3  must be the same as the number of the input means  1 ,  1   b ,  1   c , . . . , and  1   n , a switching element with a complicated structure must be used as the switching means  3 . Also, the switching means  3  must switch a large number of channels and the switching of the switching means  3  is performed in multiple stages, with the result that the CPU is more heavily loaded to control the switching.  
         SUMMARY OF THE INVENTION  
         [0014]    The present invention has been made to solve the above-described problems and provides a detector that, when the plural input means are provided, can reduce current consumption and lessen control loads by decreasing the number of switched channels.  
           [0015]    A detector of the present invention is provided with plural input means each of which has an element changing in resistance value and a fixed resistor connected in series with each other, a midpoint between the element and the fixed resistor being defined as an output part, wherein one of the plural input means is held at a predetermined potential, a switching means is provided for switching in order other ends of the input means to a low potential, and an output from the output part of the input means switched to the low potential by the switching means is detected.  
           [0016]    According to the present invention, since plural input means are placed in order into a low potential and outputs from input means placed into the low potential are detected in order, no undesired current flows through input means detecting no output, contributing to saving power consumption.  
           [0017]    There is provided a common output path connected in common to the output parts of the plural input means, and it is desirable that an output from an input means switched to a low potential in the other end thereof is detected through the common output path.  
           [0018]    Providing output path commons to plural input means reduces the number of output lines provided to an A/D converter and the like, and enables use of an A/D converter with fewer lines. If the common output paths are switched to provide an output to the CPU, since the number of common output paths is reduced, the number of channels to be switched can be reduced.  
           [0019]    In the plural input means provided with the common output paths, preferably, a fixed resistor common to the individual elements of the input means is connected in series, the end of the fixed resistor is held at the predetermined potential, and the respective ends of the elements are switched to the low potential by the switching means.  
           [0020]    By using fixed resistors common to plural elements as described above, the number of parts can be reduced.  
           [0021]    For example, the present invention may be configured as follows: outputs from the input means are detected; a control part constituting the switching means is provided; and the control part switches in order the other ends of the input means to the low potential and switches the other ends thereof not placed into the low potential to high impedance.  
           [0022]    In this way, switching to a low potential and output detection are carried out by a common control part (CPU) whereby a circuit configuration can be simplified. The switching means for switching to the low potential and the output detecting means may be formed in separate systems.  
           [0023]    The elements changing in resistance value have a resistance member and a contact that has a lower resistivity than the resistance member and contacts the resistance member while deforming elastically, and resistance values of the resistance member change according to changes in a contact area between the resistance member and the contact.  
           [0024]    The elements may have other configuration if they are those that can change in resistance value. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0025]    Preferred embodiments of the present invention will be described in detail based on the followings, wherein:  
         [0026]    [0026]FIG. 1 is a schematic circuit diagram showing a first embodiment of a detector of the present invention;  
         [0027]    [0027]FIG. 2 is a circuit block diagram of the first embodiment;  
         [0028]    [0028]FIG. 3 is a perspective view showing the structure of an input means of the first embodiment;  
         [0029]    [0029]FIG. 4 is a schematic circuit diagram showing a second embodiment of the detector of the present invention;  
         [0030]    [0030]FIG. 5 is a circuit block diagram of the second embodiment;  
         [0031]    [0031]FIG. 6 is a circuit diagram of a conventional detector; and  
         [0032]    [0032]FIG. 7 is a circuit diagram of another conventional detector. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0033]    [0033]FIG. 1 is a schematic circuit diagram showing a first embodiment of a detector of the present invention; FIG. 2 is a circuit block diagram of the first embodiment; and FIG. 3 is a perspective view showing the structure of input means.  
         [0034]    In this detector, an operation part  10  shown in FIG. 1 is provided with three input parts,  10   a ,  10   b , and  10   c . The input parts  10   a ,  10   b , and  10   c  each are provided with two input means.  
         [0035]    [0035]FIG. 3 shows the structure of the input part  10   a , which is one of the three input parts  10   a ,  10   b , and  10   c . The input part  10   a  is provided with elements  10   a   1  and  10   a   2  constituting two input means. One element  10   a   1  is provided with a resistance member  14   a  formed on a substrate, and a contact  19   a  facing the resistance member  14   a , while the other element  10   a   2  is also provided with a resistance member  14   b , and a contact  19   a  facing the resistance member  14   b . The resistance members  14   a  and  14   b  are carbon films and the contacts  19   a  and  19   b  are made of rubber, an elastically deformable material, into which carbon black is mixed. The contacts  19   a  and  19   b  are set to a lower resistivity than the resistance members  14   a  and  14   b.    
         [0036]    In the input part  10   a , the contacts  19   a  and  19   b  are secured to a pushbutton, and when the pushbutton is pushed, the contact  19   a  or  19   b  is brought into contact with the resistance member  14   a  or  14   b . When the pushbutton is further pushed with a changed push pressure, a contact area between the contact  19   a  and the resistance member  14   a  changes, thereby changing the resistance value of the element  10   a l. The same is also true for the element  10   a   2  comprising the contact  19   b  and the resistance member  14   b.    
         [0037]    In the input part  10   a , a common fixed resistor  15  is connected in series with the elements  10   a l and  10   a   2 . This means that there are provided two input means, one comprising the element  10   a l and the fixed resistor  15  and the other comprising the element  10   a   2  and the fixed resistor  15 . In FIG. 1, the elements  10   a l and  10   a   2  are designated by variable resistors VR 1  and VR 2 , and the fixed resistor  15  is designated by R 1 .  
         [0038]    As shown in FIG. 1, the fixed resistor  15  is connected to a source voltage Vcc via a conductive pattern  18 . The resistance member  14   a  of the element  10   a l is guided to a selection line G 1  for switching to a low potential (e.g., ground potential) via a conductive pattern  16   a , and the resistance member  14   b  of the element  10   a   2  is guided to a selection line G 2  for switching to a low potential via a conductive pattern  16   b.    
         [0039]    A midpoint pattern  17  between the resistance members  14   a  and  14   b  of the elements  10   a l and  10   a   2  and the fixed resistor  15  serves as an output part, and the midpoint pattern  17  forms an output path S 1  common to the elements  10   a l and  10   a   2 .  
         [0040]    In the input part  10   a , when the selection line G 1  goes into a low potential (ground potential) and the selection line G 2  goes into high impedance, a voltage output corresponding to a change in the variable resistor VR 1  of the element  10   a l can be obtained from the common output path S 1 . The voltage output at this time is Vcc×{VR 1 /(VR 1 +R 1 )}. Conversely, if the selection line G 2  goes into a low potential (ground potential) and the selection line G 1  goes into high impedance, a voltage output corresponding to a change in the variable resistor VR 2  of the element  10   a   2  can be obtained from the common output path S 1 . The voltage output at this time is Vcc×{VR 2 /(VR 2 +R 1 )}.  
         [0041]    Other input parts  10   b  and  10   c  shown in FIG. 1 also have the same structure. The elements  10   a l,  10   b   1 , and  10   c   1  are connected to the common selection line G 1 , and the elements  10   a   2 ,  10   b   2 , and  10   c   2  are connected to the common selection line G 2 . The ends of the fixed resistors R 1 , R 2 , and R 3  are set to the common source voltage Vcc. The common output paths S 1 , S 2 , and S 3  extend from the input parts  10   a ,  10   b , and  10   c , respectively.  
         [0042]    As shown in FIG. 2, the selection lines G 1  and G 2  are respectively connected to an I/O port  11 , which is connected to a CPU  13 . The common output paths S 1 , S 2 , and S 3  are inputted to an A/D converter  12  for conversion into digital signals. The digital signals are inputted to the CPU  13 . In this embodiment, the CPU  13  functions as a switching means that switches in order the selection lines G 1  and G 2  to a low potential, in conjunction with the I/O port  11 , and further the CPU  13  functions as a detecting part that detects outputs from the common output paths S 1 , S 2 , and S 3 .  
         [0043]    The I/O port  11  has a tri-state system in which the selection lines G 1  and G 2  can be set to a high level (hereinafter referred to as H) state, a low level (hereinafter referred to as L) state, and a high impedance state (hereinafter referred to as Hi-z), which is an open state.  
         [0044]    Next, the operation of the detector will be described.  
         [0045]    As shown in Table 1, the I/O port  11  is controlled by the CPU  13  functioning as a switching means so that the selection lines G 1  and G 2  are switched in a timesharing mode to a low potential (Low: e.g., ground potential) and high impedance (Hi-z), respectively, and then the selection lines G 1  and G 2  are switched to high impedance and a low potential, respectively.  
         [0046]    When the selection line G 1  is at a low potential and the selection line G 2  is at high impedance, a current flows through one element  10   a   1 ,  10   b   1 , and  10   c   1  of each of the input parts  10   a ,  10   b , and  10   c , and the fixed resistors R 1 , R 2 , and R 3 . However, no current flows through other elements  10   a   2 ,  10   b   2 , and  10   c   2 .  
         [0047]    Consequently, a voltage output determined by a voltage dividing ratio between the variable resistor VR 1  and the fixed resistor R 1  of the element  10   a   1  is obtained from the common output path S 1 , and in the same way, from the common output paths S 2  and S 3 , voltage outputs determined by voltage dividing ratios between the elements  10   b   1  or  10   c   1 , and the fixed resistors are respectively obtained.  
         [0048]    Next, when the selection line G 1  is switched to high impedance and the selection line G 2  is switched to a low potential, from the common output paths S 1 , S 2 , and S 3 , voltage outputs determined by voltage dividing ratios between the elements  10   a   2 ,  10   b   2 , or  10   c   2 , and the fixed voltages R 1 , R 2 , or R 3  are respectively obtained.  
                                             TABLE 1                                       OUTPUT DATA                    COMMON   COMMON   COMMON       I/O PORT       OUTPUT PATH   OUTPUT   OUTPUT       G1   G2   S1   PATH S2   PATH S3               Low   Hi-z   10a1   10b1   10c1       Hi-z   Low   10a2   10b2   10c2                  
 
         [0049]    More specifically, by alternately switching the two selection lines G 1  and G 2  to a low potential in a timesharing mode, outputs from two input means are alternately presented to each of the three common output paths S 1 , S 2 , and S 3 , and an output from the three elements  10   a   1 ,  10   b   1 , and  10   c   1 , and an output from the three elements  10   a   2 ,  10   b   2 , and  10   c   2  are alternately presented to the CPU  13 .  
         [0050]    As shown in FIG. 2, voltage outputs obtained from the common output paths S 1 , S 2 , and S 3  are converted into digital values by the A/D converter  12 , and the digital values are presented to the CPU  13 , and are detected and processed by the CPU  13 . That is, the CPU  13  can supervise all of the six elements  10   a   1 ,  10   a   2 ,  10   b   1 ,  10   b   2 ,  10   c   1 , and  10   c   2 , and can recognize how strongly the contact of a particular element is pushed in.  
         [0051]    In FIG. 2, since three output paths are provided to detect the status of a total of six elements, the A/D converter  12  is sufficiently available if it is capable of conversion processing for the three output paths, so that an inexpensive A/D converter  12  can be used. Since input to the CPU  13  is also made through only three lines, the number of input ports used in the CPU  13  can be saved, relieving the CPU  13  from loads.  
         [0052]    In the embodiment shown in FIG. 2, for example, at the respective times when the selection line G 1  is placed into a low potential or the selection line G 2  is placed into a low potential, the three common output paths S 1 , S 2 , and S 3  may be switched in a timesharing mode to provide outputs to the CPU  13 . More specifically, by switching the switching means so as to place the selection line G 1  into a low potential, outputs from the elements  10   a   1 ,  10   b   1 , and  10   c   1  are presented in order to the CPU  13 , and by switching the switching means so as to place the selection line G 2  into a low potential, outputs from the elements  10   a   2 ,  10   b   2 , and  10   c   2  are presented in order to the CPU  13 . In this case, a means for switching three channels may be placed between the A/D convert  12  and the common output paths S 1 , S 2 , and S 3 .  
         [0053]    In the above-described detector, when one of the selection lines G 1  and G 2  is placed into a low potential, since the other is placed into high impedance, a current flows alternately through three of the elements  10   a   1 ,  10   a   2 , and so forth each comprising a contact and a resistance member. Accordingly, no current flows through elements not detected, contributing to reducing current consumption.  
         [0054]    [0054]FIG. 4 is a schematic circuit diagram showing a second embodiment of the detector of the present invention, and FIG. 5 is a block diagram of the circuit.  
         [0055]    In the detector shown in FIG. 4, the input part  10  d is provided with plural elements  10   d   1 ,  10   d   2 , . . . , and  10   d   6 . The elements are structurally identical with the elements  10   a   1  and  10   a   2  shown in FIG. 3, and comprise a resistance member having a high resistance and an elastically deformable contact having a lower resistivity than the resistance member. In FIG. 4, variable resistors of the elements are designated by VRa, VRb, VRc, . . . , and VRf.  
         [0056]    In the input part  10   d , a common fixed resistor Ra is connected in series with the elements  10   d   1 ,  10   d   2 , . . . and  10   d   6 . Therefore, there are provided six input means, such as an input means with the element  10   d   1  and the fixed resistor Ra connected in series, an input means with the element  10   d   2  and the fixed resistor Ra connected in series, an input means with the element  10   d   3  and the fixed resistor Ra connected in series, and so forth.  
         [0057]    One end of the fixed resistor Ra is set to the source voltage Vcc. The ends of the elements  10   d   1 ,  10   d   2 , and  10   d   6  are respectively connected to selection lines Ga, Gb, Gc, . ., and Gf to a low potential. Output parts at midpoints between the elements  10   d   1 ,  10   d   2 , . . . , and  10   d   6 , and the fixed contact Ra are connected to a common output path Sm.  
         [0058]    As shown in FIG. 5, the selection lines Ga, Gb, Gc, . . . , and Gf are connected to an operation part  10 A and an I/O port  11 A, and the common output path Sm is inputted to the A/D converter  12 A.  
         [0059]    In this embodiment, the CPU  13 A performs switching control so that, in the I/O port  11 A, the selection lines Ga, Gb, Gc, . . . , and Gf are switched in order to a low potential (e.g., ground potential), when other selection lines go into high impedance. When the selection line Ga goes into a low potential, a current flows through the fixed resistor Ra and the element  10   d   1 , and no current flows through other elements. A voltage output of Vcc×{VRa/(VRa+Ra)} is obtained from the common output path Sm. This is switched in order in a timesharing mode in the elements  10   d   1 ,  10   d   2 , . . . , and  10   d   6 , and its output is presented to the A/D converter  12 A through one line and is converted to a digital value before being processed in the CPU  13 A.  
         [0060]    In this embodiment, since a current flows through only one element in order and no current flows through any other element, current consumption can be reduced even when there are three elements. Also, since only one line is available as the common output path Sm, the A/D converter  12 A can employ a converting circuit for one line and only one line is used as an input port of the CPU  13 A, with the result that the CPU  13 A is not so heavily loaded.  
         [0061]    In the present invention, in the detectors shown in FIGS. 6 and 7, the elements may be switched in order to a low potential (ground potential) at the ground side thereof. In FIG. 7, switching to a low potential and switching by the switching means  3  may be synchronized so that output from an element through which a current flows when placed into a low potential is switched by the switching means  3  before being presented to the CPU. In FIGS. 6 and 7, switching in order to a low potential has the effect of reducing current consumption.  
         [0062]    As has been described above, in the detector of the present invention, since the ends of plural input means are switched in order to a low potential, no undesired current flows through elements other than an element switched to the low potential. Consequently, current consumption can be reduced. Also, by providing output paths common to plural input means, input lines to an A/D converter and a control part can be decreased. Also, by sharing a fixed resistor, the number of parts can be reduced.