Abstract:
A high-voltage Schottky diode including a deep P-well having a first width is fanned on the semiconductor substrate. A doped P-well is disposed over the deep P-well and has a second width that is less than the width of the deep P-well. An M-type guard ring is formed around the upper surface of the second doped well, A Schottky metal is disposed on an upper surface of the second doped well and the N-type guard ring.

Description:
FIELD OF THE DISCLOSURE 
       [0001]    The disclosure relates to semiconductor diodes, and more specifically, the disclosure relates to a Schottky diode. 
       BACKGROUND 
       [0002]    Applying a metal layer to a surface of a doped semiconductor material, e.g., a layer enriched or depleted of carrier charges, creates a contact region having properties comparable to a pn-j unction in a semiconductor material. The common name for this metal-semiconductor contact region is a Schottky diode. The ability of Schottky diodes to substantially restrict current flow to one direction is a property heavily relied upon in the manufacture and design of integrated circuits. When forward biased, a Schottky diode is in an “on” state and current flows through the diode. When the diode is reverse biased, a Schottky diode is in an “off” state and ideally will, hot allow current to flow. However, Schottky diodes are not ideal, and thus experience a small amount of reverse leakage current, which flows back through the diode when the diode should not be conducting current. 
         [0003]    Reverse leakage is detrimental to the performance of a circuit and results in a loss of power in the circuit. A portion of the reverse leakage current arises from the physical junction interaction between the Schottky metal, or Schottky barrier, and an adjacent semiconductor material Regardless of its source, reverse leakage current induces undesirable characteristics in the operation of an electronic device, reducing efficiency. 
         [0004]    The breakdown voltage of a Schottky diode is the maximum amount of reverse voltage that may be applied to the diode before the diode begins to breakdown aid experiences an exponential increase in reverse leakage current. The ability to apply a greater reverse voltage to a Schottky diode without the diode breaking down (greater breakdown voltage) enables the diode to be integrated into circuits for higher voltage applications, e.g., applications haying voltage levels that exceed a few volts. 
         [0005]    Accordingly, a Schottky diode for high-voltage applications with low reverse leakage current is desired. 
       SUMMARY OF THE INVENTION 
       [0006]    In some embodiments, a Schottky diode comprises a semiconductor substrate and a deep P-well formed on the semiconductor substrate. The deep P-well has a first width. A doped P-well is disposed over the deep P-well and has a second width. The second width is less than the first width. An N-type guard ring is formed around the upper surface of the doped P-well. A Schottky metal is disposed on an upper surface of the doped P-well. 
         [0007]    In some embodiments, a Schottky diode comprises a deep P-well having a depth of approximately 2 μm formed in a semiconductor substrate. A P-well is formed over and contacts the deep P-well The P-well has a width dimension that is less than a width dimension of the deep P-well. An N-type guard ring is formed in an upper surface of the P-well. A Schottky metal is disposed over and contacts the P-well and the N-type guard ring. 
         [0008]    In some embodiments, a method comprises the steps of forming a deep P-well over a semiconductor substrate and forming a doped P-well over the deep P-well. The doped P-well has a width that is less than a width of the deep P-well. The method includes forming an N-type guard ring around an upper surface of the doped P-well and disposing a Schottky metal on the upper surface of the doped P-well. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0009]      FIG. 1  illustrates a cross-sectional view of a high-voltage Schottky diode. 
           [0010]      FIG. 2  is a top view of the high-voltage Schottky diode as shown in  FIG. 1 . 
           [0011]      FIG. 3  is a graph with several plots of leakage current density versus voltage of a reversed biased high-voltage Schottky diode at various operating temperatures in accordance with the embodiment shown in  FIG. 1 . 
           [0012]      FIG. 4  is a graph with several plots of current density versus voltage of a forward biased high-voltage Schottky diode in accordance with the embodiment shown in  FIG. 1 . 
       
    
    
     DETAILED DESCRIPTION 
       [0013]    With reference to  FIGS. 1 and 2 , an improved Schottky diode  100  is now described.  FIG. 1  illustrates a cross-sectional view of a Schottky diode  100 , and  FIG. 2  is a top view of the Schottky diode  100  illustrated in  FIG. 1 . High voltage (HV) Schottky diode  100  is formed on a semiconductor substrate  102  and includes a deep P-well  104  formed above the semiconductor substrate  102 . In one embodiment, deep P-well  104  has a depth of approximately 2 μm, a width of approximately 8.8 μm and a doping concentration of approximately 1.6e16 (cm −3 ). 
         [0014]    Substrate  102  may be any of a variety of substrate materials, including a silicon substrate, a Group III-V compound substrate, a silicon/germanium (SiGe) substrate, a silicon-on insulator (SOI) substrate, or the like. An N-type buried layer (NBL) (not shown), which acts as a barrier layer between the semiconductor substrate  102  and the layers above the substrate forming the Schottky diode  100 , may be formed on the upper surface of semiconductor substrate  102 . 
         [0015]    Deep P-well  104  may be doped with any suitable P-type dopant such as, for example, boron, gallium, aluminum, or any Group III element. A high-voltage P-well (HVPW)  106  is formed between high-voltage N-wells (HVNW)  108  over deep P-well  104 . In one embodiment, HVPW  106  has a width of approximately 1.6 μm to approximately 2.4 μm and a doping concentration of approximately 1.6e16 (cm −3 ) of boron, gallium, or any suitable P-type dopant. HVNW  108  may have a width of approximately 3.2 μm and have a doping concentration of approximately 1.6e16 (cm 3 ). HVNW  108  may be doped with a suitable N-type dopant such as arsenic, phosphorus, antimony, or other Group V element. At the upper surface of HVPW  106  are doped N+ regions  110 . Doped N+ regions  110  may also be doped with a suitable N-type dopant until they have a doping concentration of about 1e19 (cm −3 ) to about 1e20 (cm −3 ). In some embodiments, doped N+ regions  110  may have a width of approximately 0.44 μm, although one skilled in the art will understand that doped N+ regions  110  may have other dimensions. 
         [0016]    A Schottky barrier  112  is disposed on top of HVPW  106  and may extend from HVPW  106  across the doped N+ regions  110  to HVNW  108 . In one embodiment, the Schottky barrier  112  has a width of approximately 6 μm and a length of approximately 85 μm as best seen in  FIG. 2 . The doped N+ regions act as a guard ring to reduce leakage from the Schottky junction between HVPW  106  and Schottky barrier  112 . Schottky barrier  112  may be formed from any suitable metal or combination of metals such as Al, Mo, W, Pt, Pd, Ag, An, Ti, Ni, NiFe, or Co. In some embodiments, a combination of Ti and Co is used as Schottky metal  112 . 
         [0017]    HVPW  114  is disposed above N-type semiconductor substrate  102  and adjacent to HVNW  108  and deep P-well  104 . A doped P+ region  118  is formed at the upper surface of HVPW  114 . Doped P+ region  118  may have a doping concentration of about 1e19 (cm −3 ) to about 1e20 (cm −3 ) and P+ regions may be doped with any suitable P-type dopant. In some embodiments, HVPW  114  has a width of approximately 4 μm although one skilled in the art will understand that HVPW  114  may have other widths. 
         [0018]    HVNW  116  is formed above semiconductor substrate  102  and adjacent to HVPW  114 . A doped N+ region  120  is formed at die upper surface of HVNW  116  and may serve as an electrical contact to connect to other circuit elements. Doped N+ region  120  may have a doping concentration of about 1e19 (cm −3 ) to about 1e20 (cm −3 ). In some embodiments, HVPW  114  and HVNW  116  have doping concentrations of approximately 1e16 (cm −3 ), however, other doping concentrations may be used, insulating or dielectric regions  122  are formed at the upper surfaces of HVNW  114  and HVPW  116 , Insulating regions  122  may include a layer of tetraethyl orthosilicate (TEGS), silicon nitride (SiN), silicon oxynitride (SIGN), silicon carbide (SiC), silicon dioxide (SiO 2 ), or the like. 
         [0019]    In operation, the contact surfaces between Schottky barrier  112  and the HVPW  106  of Schottky diode  100  will pinch off and prevent current from flowing between the two regions  120 , as do the contact surfaces between HVNW  108  and deep P-well  104  when a reverse voltage is applied to Schottky diode  100 . The guard ring formed by N+ regions  110  also serves to limit the amount of current which flows through Schottky diode  100  when reverse biased.  FIG. 2  illustrates several plots of the reverse leakage current through Schottky diode  100  at operating temperatures of −40 C, 25 C, 85 C, 125 C, and 150 C; As shown in  FIG. 3 , the Schottky diode has a reverse leakage current density of approximately 1e-10 A/μm 2  and a breakdown voltage of −55 volts when operating at room temperature. When a forward voltage is applied to Schottky diode  100 , current flows through HVPW  106 .  FIG. 4  illustrates plots of the forward leakage current density through Schottky diode  100  at operating temperatures of −40 C, 25 C, 85 C, 125 C, and 150 C. As shown in  FIG. 4 , the current density through Schottky diode  100  quickly increases when a forward voltage is applied to the diode. 
         [0020]    The Schottky diode  100  may be fabricated by performing a series of ion implantations. For example, photoresist may be deposited over a dielectric layer, which is then patterned. The exposed regions of the dielectric layer may then be etched to form a mask over the semiconductor substrate  102 . The exposed regions of the semiconductor substrate are implanted with an N-type dopant to form the HVNWs  108 ,  116 . The mask may be removed and another dielectric layer may be formed over the substrate  102 . Photoresist may again be deposited over the dielectric layer and developed. The dielectric, layer may be etched to form a mask. P-type dopants such as, for example, boron, gallium, aluminum, or any Group  111  element may be implanted to form HVPWs  106 ,  114 . The mask is then removed. 
         [0021]    The deep P-well  104  may be formed by depositing and patterning a dielectric layer to form a mask. The exposed areas are then implanted with a P-type dopant. In some embodiments, the deep P-well is formed using a high energy implantation of approximately 2000 KeV. The mask for the deep P-well is removed and the mask for forming the N+ regions  110 ,  120  is formed. With tire mask in place, the N+ regions  110 ,  120  are formed by implanting an N-type dopant. The mask is removed once the N+ regions  110 ,  120  have been formed, and a mask is fanned for the P+ regions  118 . The P+ regions are formed by implanting a Ptype dopant in the P+ regions  118 . Once the P+ regions  118  have been formed, the mask is removed and the Schottky barrier is then formed over the N+ regions  110 , the HVPW  106 , and a portion of the HVNW  108 . 
         [0022]    Although the invention has been described in terms of exemplary embodiments, it is not limited thereto. Rather, the appended claims should be construed broadly, to include other variants and embodiments of the invention, which may be made by those skilled in the art without, departing from the scope and range of equivalents of the invention.