Abstract:
A current switch (30) includes a switching transistor (Q1) having a collector electrode for coupling to a first voltage source (Vcc), an emitter electrode, and a base electrode for receiving a control signal (V IN1 ). Switching transistor (Q1) is responsive to the control signal (V IN1 ) to turn on to produce a collector current (I CQ1 ). A bias circuit (26) is coupled to the emitter electrode of the switching transistor (Q1) for causing the collector current (I CQ1 ) of the switching transistor (Q1) to have a predetermined value. The bias circuit includes first and second transistors (Q3 and Q4) having base electrodes coupled in common. The first transistor (Q3) has a collector electrode coupled to the emitter electrode of the switching transistor (Q1) and an emitter electrode for coupling to a second voltage source (Vss). The second transistor has a collector electrode for coupling to a current source (24) and an emitter electrode for coupling to the second voltage source (Vss). A third transistor (Q6) has a collector electrode coupled to the emitter electrode of the switching transistor (Q1), a emitter electrode coupled to the base electrode of the first transistor (Q3), and a control electrode coupled to the collector electrode of the second transistor (Q4). The third transistor (Q6) reduces the dependance of the collector current (I CQ1 ) on the β of the switching transistor (Q1) to make the collector current (I CQ1 ) less sensitive to process variations.

Description:
FIELD OF THE INVENTION 
     This invention relates generally to semiconductor devices and, more particularly, to current switches having bipolar switching transistors. 
     BACKGROUND OF THE INVENTION 
     Transistors are often used in switching circuits to perform a current switching function in order to selectively supply current to loads in response to control signals. In such switching circuits, the switching transistors typically having a current path coupled between a load and a bias network that includes a constant current source. The control electrode of each switching transistor receives a control signal to selectively turn that switching transistor on to switch a current determined by the bias network to the associated load. 
     In presently available current switches in which the switching transistors are bipolar transistors, the current switched to a load is dependent upon the switching transistor&#39;s current gain β. Since β varies significantly as a result of process variations, the value of the current switched to the load is also subject to process variations. The complete elimination of all process variations is extremely difficult. As a result, β can typically be guaranteed only to be within a fairly broad range thus making it impossible to predict with a high degree of accuracy what the value of the switched current will actually be. 
     This inability to switch a known, very accurate current is undesirable in a wide variety of devices, such as oscillators using current ramping techniques, accurate clock duty cycle control circuits, and transconductance amplifiers, that require accurate current switching capability. 
     Accordingly, a need exists for a current switch having bipolar switching transistors that has reduced sensitivity to process variations and can switch a predetermined current with a high degree of accuracy. 
     SUMMARY OF THE INVENTION 
     Generally, and in one form of the invention, a current switch includes a switching transistor having a collector electrode for coupling to a first voltage source, an emitter electrode, and a base electrode for receiving a control signal. The switching transistor is responsive to the control signal to turn on to produce a collector current. The current switch also includes a bias circuit for causing the collector current to have a predetermined value when the switching transistor is on. The bias circuit includes first and second transistors having base electrodes coupled in common, the first transistor having a collector electrode coupled to the emitter electrode of the switching transistor and an emitter electrode for coupling to a second voltage source, the second transistor having a collector electrode for coupling to a current source and an emitter electrode for coupling to the second voltage source. The bias circuit also includes a third transistor having a collector electrode coupled to the emitter electrode of the switching transistor, an emitter electrode coupled to the base electrode of the first transistor, and a base electrode coupled to the collector electrode of the second transistor. 
     In another form of the invention, a field effect transistor is used as the third transistor with its drain coupled to the emitter of the switching transistor, source coupled to the base of the first transistor, and gate coupled to the collector of the second transistor. 
     An advantage of the invention is that as a result of the third transistor, the current switched by the switching transistor has a reduced dependence on the β of the switching transistor when compared with the current switched by conventional current switch circuits. The reduction in β dependence results in a switched current that is much less sensitive to process variations and can therefore be predicted with a very high degree of accuracy. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     In the drawings: 
     FIG. 1 is an electrical schematic diagram of a prior art current switching circuit; 
     FIG. 2 is an electrical schematic diagram of a current switching circuit according to a first embodiment of the invention; 
     FIG. 3 is an electrical schematic diagram of a current switching circuit according to a second embodiment of the invention; 
     FIG. 4 is an electrical schematic diagram of a current switching circuit according to a third embodiment of the invention; and 
     FIG. 5 is an electrical schematic diagram of a current switching circuit according to a fourth embodiment of the invention. 
     Corresponding numerals and symbols in the different figures refer to corresponding parts unless otherwise indicated. 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     FIG. 1 shows a conventional integrated circuit current switch 10 having a differential pair of identical bipolar NPN switching transistors Q1 and Q2. Transistor Q1 has a base electrode coupled to input terminal 12 to receive input signal V IN1  and a collector electrode coupled to a first voltage source Vcc through load 16. Transistor Q2 has a base electrode coupled to input terminal 14 to receive input signal V IN2  and a collector electrode coupled to voltage source Vcc through load 18. 
     Input signals V IN1  and V IN2  selectively have either a first state or a second state. Transistor Q1 is turned on in response to the first state of signal V IN1  to switch a collector current I CQ1  to load 16 and turned off in response to the second state of signal V IN1  to prevent current flow to load 16. Transistor Q2 is turned on in response to the first state of signal V IN2  to switch a collector current I CQ2  to load 18 and turned off in response to the second state of signal V IN2  to prevent current flow to load 18. Input signals V IN1  and V IN2  may be chosen so as to permit only one of transistors Q1 and Q2 to be on at any one time or to permit transistors Q1 and Q2 to be on simultaneously. 
     The emitter electrodes of transistors Q1 and Q2 are coupled in common to the collector electrode of transistor Q3 of a bias circuit 19 that determines the value of collector currents I CQ1  and I CQ2  that will be switched to loads 16 and 18 when transistors Q1 and Q2 are turned on. Bias circuit 19 includes transistors Q3 and Q4 having emitter electrodes coupled to second voltage source Vss through resistors 20 and 22, respectively. The base electrodes of transistors Q3 and Q4 are coupled to the emitter electrode of transistor Q5. The collector electrode of transistor Q5 is coupled to voltage source Vcc. The collector electrode of transistor Q4 and base electrode of transistor Q5 are coupled to voltage source Vcc through constant current source 24. Current source 24 produces a known, very accurate constant reference current I 0 . 
     Transistors Q3, Q4 and Q5 form a current mirror in which the collector current of Q4, I CQ4 , is mirrored by the collector current of Q3, I CQ3 . The emitter area of Q5 is the same as the emitter area of Q4. The emitter area of Q3 is scaled to be n times the size of the emitter area of Q4, where n may be any number but is typically greater than one. Resistor 22 is also n times the value of resistor 20. The emitter area and resistor scaling results in I CQ3  being n times as large as I CQ4 . 
     In the following analysis, I CQN  is the collector current, I EQN  is the emitter current, I BQN  is the base current, and β QN  is the current gain of a transistor QN, where N is a number identifying a particular transistor; n is the emitter scaling factor. Since current switch 10 is an integrated circuit, all bipolar transistors have substantially the same values of β. 
     When it is desired to switch current only to load 16, V IN1  has the first state and V IN2  has the second state so that Q1 is on and Q2 is off. 
     Since the transistor Q5 of the current mirror is bipolar: 
     
         I.sub.CQ4 =I.sub.0 -I.sub.BQ5                              1. 
    
     Since I BQ5  ≈I EQ5  /(β Q5 ): 
     
         I.sub.CQ4 ≈I.sub.0 -I.sub.EQ5 /(β.sub.Q5)     2. 
    
     Since I EQ5  =I BQ3  +I BQ5  and I BQ3  =nI BQ4  : 
     
         I.sub.CQ4 ≈I.sub.0 -(nI.sub.BQ4 +I.sub.BQ4)/(β.sub.Q5)≈I.sub.0 -I.sub.BQ4 (n+1)/(β.sub.Q5)                                     3. 
    
     Since I BQ4  ≈I.sub.) /β Q4  : 
     
         I.sub.CQ4 ≈I.sub.0 -I.sub.0 (n+1)/β.sub.Q4 (β.sub.Q5)≈I.sub.0 [1-(n+1)/β.sub.Q4 β.sub.Q5 ]4. 
    
     Since β Q4  ≈β Q5  : 
     
         I.sub.CQ4 ≈I.sub.0 [1-(n+1)/β.sup.2 ]         5. 
    
     For typical values of β and where n is less than β (n is typically only a fraction of β), the value of (n+1)/β 2  is very small and the error introduced in I CQ4  by neglecting its dependence on β, that is, by neglecting the portion -I 0  (n+1)/β 2 , is negligible. Therefore, in the following analysis of current switch 10, it will be assumed that: 
     
         I.sub.CQ4 =I.sub.0                                         6. 
    
     Since Q3 mirrors Q4 and is emitter-scaled by a factor of n: 
     
         I.sub.CQ3 =nI.sub.CQ4 =nI.sub.0                            7. 
    
     Since Q1 is on and Q2 is off: 
     
         I.sub.EQ1 =I.sub.CQ3 =nI.sub.0                             8. 
    
     Since the sum of currents at a node of 0: 
     
         I.sub.CQ1 =I.sub.EQ1 -I.sub.BQ1                            9. 
    
     Since the I BQ1  ≈I EQ1  /β Q1  : 
     
         I.sub.CQ1 ≈I.sub.EQ1 -I.sub.EQ1 /β.sub.Q1 ≈I.sub.EQ1 (1-1/β.sub.Q1)≈nI.sub.0 (1-1/β.sub.Q1)  10. 
    
     As seen in equation 10, in current switch 10 of FIG. 1 a portion of the switched current or current through load 16, I CQ1 , is dependent upon β Q1 . Since the process variations typically encountered in integrated circuit manufacturing can result in significant, unpredictable changes in β, that portion of the switched current I CQ1  of current switch 10 dependent upon β Q1 , -nI 0  /β Q1 , is also unpredictable. 
     FIG. 2 shows an integrated circuit current switch 30 according to a first embodiment of the invention. Current switch 30 is identical to current switch 10 of FIG. 1 with the exception that an additional transistor Q6 is provided. Transistor Q6 has a collector electrode coupled to the collector electrode of transistor Q3, an emitter electrode coupled to the base electrode of transistor Q3, and a base electrode coupled in common with the base electrode of transistor Q5. The emitter of transistor Q6 is the same size as the emitter of transistor Q3. 
     Elements Q3, Q4, Q5, Q6, 20, 22, and 24 form a bias circuit 26 which causes collector currents I CQ1  and I CQ2  to have predetermined values when transistors Q1 and Q2 are on. Transistor Q6 provides β compensation for switching transistors Q1 and Q2 to permit them to switch currents I CQ1  and I CQ2 , respectively, that are substantially less dependent on β and therefore much less sensitive to process variations as demonstrated by the following analysis. 
     When it is desired to switch current only to load 16, V IN1  has the first state and V IN2  has the second state so that Q1 is on and Q2 is off. 
     Since the transistor Q5 of the current mirror is bipolar: 
     
         I.sub.CQ4 =I.sub.0 -(I.sub.BQ5 +I.sub.BQ6)                 11. 
    
     Since I BQ5  ≈I EQ5  /(β Q5 ) and I BQ6  =nI BQ5  : 
     
         I.sub.CQ4 ≈I.sub.0 -(I.sub.EQ5 +nI.sub.EQ5)/β.sub.Q5 12. 
    
     Since I EQ5  =I I   BQ4   
     
         I.sub.CQ4 ≈I.sub.0 -(I.sub.BQ4 +nI.sub.BQ4)/(β.sub.Q%)≈I.sub.0 -I.sub.BQ4 (n+1)/(β.sub.Q5)                                     13. 
    
     Since I BQ4  ≈I 0  /≈ Q4  : 
     
         I.sub.CQ4 ≈I.sub.0 -I.sub.0 (n+1)/≈.sub.Q4 (β.sub.Q5)≈I.sub.0 [1-(n+1)/β.sub.Q4 β.sub.Q5 14. 
    
     Since β Q4  ≈β Q5  : 
     
         I.sub.CQ4≈I.sub.0 [1-(n+1)/β.sup.2 ]          15. 
    
     The error in I CQ4  relative to I 0  is the same as in FIG. 1. Therefore, for typical values of β and n, the value of (n+1)/β 2  is very small and the error introduced in I CQ4  by neglecting its dependence on β is negligible. Therefore, in the following analysis of current switch 30, it will be assumed that: 
     
         I.sub.CQ4 =I.sub.0                                         16. 
    
     Since Q3 mirrors Q4 and is emitter-scaled by a factor of n: 
     
         I.sub.CQ3 =nI.sub.CQ4 =nI.sub.0                            17. 
    
     Since the sum of currents at a node is 0: 
     
         I.sub.EQ1 =I.sub.CQ3 +I.sub.CQ6                            18. 
    
     Since I CQ6  ≈I EQ6  and since I EQ6  =I BQ3  : 
     
         I.sub.EQ1 ≈I.sub.CQ3 +I.sub.BQ3                    19. 
    
     Since I BQ3  =I CQ3  /β Q3  : 
     
         I.sub.EQ1 ≈I.sub.CQ3 +I.sub.CQ3 /β.sub.Q3 ≈I.sub.CQ3 (1+1/β.sub.Q3)                                       20. 
    
     Since the sum of currents at a node is 0: 
     
         I.sub.CQ1 =I.sub.EQ1 -I.sub.BQ1                            21. 
    
     Since I BQ1  ≈I EQ1  /β Q1  : 
     
         I.sub.CQ1 ≈I.sub.EQ1 -I.sub.EQ1 /≈.sub.Q1 ≈I.sub.EQ1 (1-1/β.sub.Q1)                    22. 
    
     Substituting for I EQ1  from equation 20: 
     
         I.sub.CQ1 ≈I.sub.CQ3 (1+1/β.sub.Q3)(1-1/β.sub.Q1) 23. 
    
     Since β Q3  ≈β Q1  : 
     
         I.sub.CQ1 ≈I.sub.CQ3 (1-1/β.sup.2)            24. 
    
     Substituting for I CQ3  from equation 17: 
     
         I.sub.CQ1 ≈nI.sub.0 (1-1/62 .sup.2)                25. 
    
     As seen in equation 25, in current switch 30 of FIG. 2 the portion of the switched current or current through load 16, I CQ1 , dependent upon β is only -nI 0  /β 2 . Comparing equations 25 and 10, it can be seen that the portion dependent upon β in current switch 30 of FIG. 2 is substantially less than the dependent portion, -nI 0  /β, in current switch 10 of FIG. 1. 
     Current switch 30 can also switch currents to loads 16 and 18 simultaneously, if so desired. In this situation, V IN1  and V IN2  have the first state so that Q1 and Q2 are on. 
     Since Q1 and Q2 are on and are identical transistors: 
     
         I.sub.CQ1 =I.sub.CQ2 ≈nI.sub.0 (1-1/β.sup.2)/2 26. 
    
     As seen in equation 26, in current switch 30 of FIG. 2 the portion of the switched currents or currents through loads 16 and 18, I CQ1  and I CQ2 , dependent upon β is -nI 0  /2β 2 . This is substantially less than the β dependent portion, -nI 0  /2β, that would result in current switch of FIG. 1 if both Q1 and Q2 were on. 
     An advantage of the invention is that the switched current of current switch 30 is substantially less dependent on β than that of current switch 10 of FIG. 1. As a result of the reduced β dependence, the switched current of current switch 30 is much less sensitive to process variations than that of current switch 10 of FIG. 1 and can be predicted with a very high degree of accuracy. 
     FIG. 3 shows an integrated circuit current switch 32 according to a second embodiment of the invention. Current switch 32 is identical to current switch 30 of FIG. 2 with the exception that NPN transistors Q5 and Q6 are replaced with n-channel field-effect transistors (FETs) Q7 and Q8. Transistor Q8 is n times larger than transistor Q7, where n is the emitter area scaling factor between transistors Q3 and Q4. The base electrodes of transistors Q3 and Q4 are coupled to the sources of transistors Q7 and Q8. The drain electrode of transistor Q7 is coupled to voltage source Vcc. The gate electrodes of transistors Q7 and Q8 are coupled to voltage source Vcc through constant current source 24. The drain electrode of transistor Q8 is coupled to the collector electrode of transistor Q3. 
     Elements Q3, Q4, Q7, Q8, 20, 22, and 24 form a bias circuit 34 which causes collector currents I CQ1  and I CQ2  to have predetermined values when transistors Q1 and Q2 are on. Transistor Q8 provides β compensation for differential pair transistors Q1 and Q2 in the same manner transistor Q6 of FIG. 2 does as demonstrated by the following analysis in which I DQN  is the drain current and I SQN  is the source current of a transistor QN, where N is a number identifying a particular transistor. 
     When it is desired to switch current only to load 16, V IN1  has the first state and V IN2  has the second state so that Q1 is on and Q2 is off. 
     The gate current of transistor Q7 is negligible (Note that since Q7 is an FET, there is no -I 0  (n+1)/β 2  contribution to I CQ4 ), therefore: 
     
         I.sub.CQ4 =I.sub.0                                         27. 
    
     Since Q3 mirrors Q4 and is emitter-scaled by a factor of n: 
     
         I.sub.CQ3 =nI.sub.CQ4 =nI.sub.0                            28. 
    
     Since the sum of currents at a node is 0: 
     
         I.sub.EQ1 =I.sub.CQ3 +I.sub.DQ8                            29. 
    
     Since I DQ8  =I SQ8  and since I SQ8  =I BQ3  : 
                                                                I EQ1  =I CQ3  +I BQ3                                      30. 
     Since I BQ3  =I CQ3  /β Q3  : 
     
         I.sub.EQ1 =I.sub.CQ3 +I.sub.CQ3 /β.sub.Q3 =I.sub.CQ3 (1+1/β.sub.Q3)                                       31. 
    
     Since the sum of currents at a node is 0: 
     
         I.sub.CQ1 =I.sub.EQ1 -I.sub.BQ1                            32. 
    
     Since I BQ1  ≈I EQ1  /β Q1  : 
     
         I.sub.CQ1 ≈I.sub.EQ1 -I.sub.EQ1 /β.sub.Q1 ≈I.sub.EQ1 (1-1/β.sub.Q1) 
    
     Substituting for I EQ1  from equation 20: 
     
         I.sub.CQ1 ≈I.sub.CQ3 (1+1/β.sub.Q3)(1-1/β.sub.Q1 34. 
    
     Since β Q3  ≈β Q1  : 
     
         I.sub.CQ1 ≈I.sub.CQ3 (1-1/β.sup.2)            35. 
    
     Substituting for I CQ3  from equation 17: 
     
         I.sub.CQ1 ≈nI.sub.0 (1-1/β.sup.2)             36. 
    
     As seen in equation 36, in current switch 32 of FIG. 3 the portion of the switched current or current through load 16, I CQ1 , dependent upon βis only -nI 0  /β 2 . Comparing equations 36 and 10, it can be seen that the portion dependent upon β in current switch 32 of FIG. 3 is substantially less than the dependent portion, -nI 0  /β, in current switch 10 of FIG. 1. 
     Current switch 32 can also switch currents to loads 16 and 18 simultaneously, if so desired. In this situation, V IN1  and V IN2  have the first stet so that Q1 and Q2 are on. 
     Since Q1 and Q2 are on and are identical transistors: 
     
         .sub.CQ1 =I.sub.CQ2 ≈nI.sub.0 (1-1/β.sup.2)/2 
    
     As seen in equation 37, in current switch 32 of FIG. 3 the portion of the switched currents or currents through loads 16 and 18, I CQ1  and I CQ2 , dependent upon β is -nI 0  /2β 2 . This is substantially less than the β dependent portion, -nI 0  /2β, that would result in current switch 10 of FIG. 1 if both Q1 and Q2 were on. 
     FIG. 4 shows an integrated circuit current switch 36 according to a third embodiment of the invention. Current switch 36 is a PNP transistor implementation of the current switch 30 of FIG. 2. Switch 36 includes a differential pair of identical bipolar PNP switching transistors Q9 and Q10. Transistor Q9 has a base electrode coupled to input terminal 12 to receive input signal V IN1  and a collector electrode coupled to first voltage source Vss through load 16. Transistor Q10 has a base electrode coupled to input terminal 14 to receive input signal V IN2  and a collector electrode coupled to voltage source Vss through load 18. 
     Input signals V IN1  and V IN2  selectively have either a first state or a second state. Transistor Q9 is turned on in response to the second state of signal V IN1  to switch a current to load 16 and turned off in response to the first stat of signal V IN1  to prevent current flow to load 16. Transistor Q10 is turned on in response to the second state of signal V IN2  to switch a current to load 18 and turned off in response to the first state of signal V IN2  to prevent current flow to load 18. Input signals V IN1  and V IN2  may be chosen so as to permit only one of transistors Q9 and Q10 to be on at any one time or to permit transistors Q9 and Q10 to be on simultaneously. 
     The emitter electrodes of transistors Q9 and Q10 are coupled in common to the collector electrodes of transistors Q11 and Q14 of a bias circuit 38 that causes collector currents I CQ9  and I CQ10  to have predetermined values when transistors Q9 and Q10 are on. Bias circuit 38 includes transistors Q11 and Q12 having emitter electrodes coupled to second voltage source Vcc through resistors 20 and 22, respectively. The base electrodes of transistors Q11 and Q12 are coupled to the emitter electrode of transistor Q13. The collector electrode of transistor Q13 is coupled to voltage source Vss. The collector electrode of transistor Q12 and base electrode of transistor Q13 are coupled to voltage source Vss through constant current source 24. Current source 24 produces a very accurate, constant reference current I 0 . 
     Transistors Q11, Q12 and Q13 form a current mirror in which the collector current of Q12, I CQ12 , is mirrored by the collector current of Q11, I CQ11 . The emitter area of Q13 is the same as the emitter area of Q12. The emitter area of Q11 is scaled to be n times the size of the emitter area of Q12, where n may be any number but is typically greater than one. Resistor 22 is n times the value of resistor 20. The emitter area and resistor scaling results in I CQ11  being n times as large as I CQ12 . 
     Transistor Q14 has an emitter electrode coupled to the base electrode of transistor Q11 and a base electrode coupled in common with the base electrode of transistor Q13. The emitter of transistor Q14 is the same size as the emitter of transistor Q11. Transistor Q14 provides β compensation for differential pair transistor Q9 and Q10 in a manner similar to transistor Q6 of FIG. 2 as demonstrated by the following analysis. 
     When it is desired to switch current only to load 16, V IN1  has the second state and V IN2  has the first state so that Q9 is on and Q10 is off. 
     Neglecting the -I 0  (n+1)/β 2  contribution to I CQ4  for the reasons given with respect to equation 16 above: 
     
         I.sub.CQ12 =I.sub.0                                        38. 
    
     Since Q11 mirrors Q12 and is emitter-scaled by a factor of n: 
     
         I.sub.CQ11 =nI.sub.CQ12 =nI.sub.0                          39. 
    
     Since the sum of currents at a node is 0: 
     
         I.sub.EQ9 =I.sub.CQ11 +I.sub.CQ14                          40. 
    
     Since I CQ14  ≈I EQ14  and since I EQ14  =I BQ11  : 
     
         I.sub.EQ9 ≈I.sub.CQ11 +I.sub.BQ11                  41. 
    
     Since I BQ11  =I CQ11  /β Q11  : 
     
         I.sub.EQ9 ≈I.sub.CQ11 +I.sub.CQ11 /β.sub.Q11 ≈I.sub.CQ11 (1+1/β.sub.Q11)                  42. 
    
     Since the sum of currents at a node is 0: 
     
         I.sub.CQ9 =I.sub.EQ9 -I.sub.BQ9                            43. 
    
     Since I BQ9  ≈I EQ9  /β Q9  : 
     
         I.sub.CQ9 ≈I.sub.EQ9 -I.sub.EQ9 /β.sub.Q9 ≈I.sub.EQ9 (1-1/β.sub.Q9)                                       44. 
    
     Substituting for I EQ9  from equation 42: 
     
         I.sub.CQ9 ≈I.sub.CQ11 (1+1/β.sub.Q11)(1-1/β.sub.Q9) 45. 
    
     Since β Q11  ≈β Q9  : 
     
         I.sub.CQ9 ≈I.sub.CQ11 (1-1/β.sup.2) 
    
     Substituting for I CQ11  from equation 39: 
     
         I.sub.CQ9 ≈nI.sub.0 (1-1/β.sup.2) 
    
     As seen in equation 47, in current switch 36 of FIG. 4 the portion of the switched current or current through load 16, I CQ9 , dependent upon β is only -nI 0  /β 2 . Comparing equations 47 and 10, it can be seen that the portion dependent upon β in current switch 36 of FIG. 4 is substantially less than the dependent portion, -nI 0  /β, in current switch 10 of FIG. 1. 
     Current switch 36 can also switch currents to loads 16 and 18 simultaneously, if so desired. In this situation, V IN1  and V IN2  have the second state so that Q1 and Q2 are on. 
     Since Q1 and Q2 are on and are identical transistors: 
     
         I.sub.CQ1 =I.sub.CQ2 ≈nI.sub.0 (1-1/β.sup.2)/2 48. 
    
     As seen in equation 48, in current switch 36 of FIG. 4 the portion of the switched currents or currents through loads 16 and 18, I CQ1  and I CQ2 , dependent upon β is -nI 0  /2β 2 . This is substantially less than the β dependent portion, -nI 0  /2β, that would result in current switch 10 of FIG. 1 if both Q1 and Q2 were on. 
     FIG. 5 shows an integrated circuit current switch 40 according to a fourth embodiment of the invention. Current switch 40 is identical to current switch 30 of FIG. 2 with the exception that transistors Q15, Q16, and Q17 are added. Transistor Q15 has a collector electrode coupled to the emitter electrodes of transistors Q1 and Q2, an emitter electrode coupled to the collector electrode of transistor Q3, and a base electrode coupled to the base electrode of transistor Q16 and the emitter electrode of transistor Q17. The collector electrode of transistor Q17 is coupled to voltage source Vcc. The base electrode of transistor Q17 and the collector electrode of transistor Q16 are coupled to voltage source Vcc through current source 24. The emitter electrode of transistor Q16 is coupled to the collector electrode of transistor Q4. Transistor Q3, Q4, Q5, Q15, Q16, and Q17 form a cascode current mirror. Transistor Q15, Q16, and Q17 have the same emitter areas as transistors Q3, Q4, and Q5, respectively. 
     Elements Q3, Q4, Q5, Q6, Q15, Q16, Q17, 20, 22, and 24 form a bias circuit 42 which causes collector currents I CQ1  and I CQ2  to have predetermined values when transistors Q1 and Q2 are on. Transistor Q6 provides β compensation for switching transistors Q1 and Q2 to permit them to switch currents I CQ1  and I CQ2 , respectively, that are substantially less dependent on β  and therefore much less sensitive to process variations as demonstrated by the following analysis. 
     When it is desired to switch current only to load 16, V IN1  has the first state and V IN2  has the second state so that Q1 is on and Q2 is off. 
     Neglecting the -I 0  (n+1)/β 2  contribution to I CQ6  for the reasons given with respect to equation 16 above: 
     
         I.sub.CQ16 =I.sub.0                                        49. 
    
     Since Q15 mirrors Q16 and is emitter-scaled by a factor of n: 
     
         I.sub.CQ15 =nI.sub.CQ16 =nI.sub.0                          50. 
    
     Since the sum of currents at a node is 0: 
     
         I.sub.EQ1 =I.sub.CQ15 +I.sub.CQ6                           51. 
    
     Since I CQ5  ≈I EQ6  and since I EQ6  =I BQ3  : 
     
         I.sub.EQ1 ≅I.sub.CQ15 +I.sub.BQ3                 52. 
    
     Since I BQ3  =I CQ3  /β Q3  and I CQ3  =I EQ15  : 
     
         I.sub.EQ1 ≈I.sub.CQ15 +I.sub.EQ15 /β.sub.Q3   53. 
    
     Since I EQ15  =I CQ15  +I BQ15  and I BQ15  =I CQ15  /β Q15   
     
         I.sub.EQ1 ≈I.sub.CQ15 +[I.sub.CQ15 +I.sub.CQ15 /β.sub.Q15 ]/β.sub.Q3                                           54. 
    
     Since β Q15  ≈β Q3  : 
     
         I.sub.EQ1 ≈I.sub.CQ15 (1+1/β+1/β.sup.2)  55. 
    
     Since the sum of currents at a node is 0: 
     
         I.sub.CQ1 =I.sub.EQ1 -I.sub.BQ1                            56. 
    
     Since I BQ1  ≈I EQ1  /β Q1  : 
     
         I.sub.CQ1 ≈I.sub.EQ1 -I.sub.EQ1 /β.sub.Q1 ≈I.sub.EQ1 (1-1/β.sub.Q1)                                       57. 
    
     Substituting for I EQ1  from equation 55: 
     
         I.sub.CQ1 ≈I.sub.CQ15 (1-1/β.sub.Q1)(1+1/β.sup.2) 58. 
    
     Since β Q1  ≈β of all other transistors: 
     
         I.sub.CQ1 ≈I.sub.CQ15 [(1+1/β.sup.2)-(1/β+1/β.sup.2 +1/β.sup.3)]≈I.sub.CQ15 (1-1/β.sup.3)   59. 
    
     Substituting for I CQ15  from equation 50: 
     
         I.sub.CQ1 =nI.sub.0 (1-1/β.sup.3)                     60. 
    
     As seen in equation 60, in current switch 40 of FIG. 5 the portion of the switched current or current through load 16, I CQ1 , dependent upon β is only -nI 0  /β 3 . Comparing equations 60 and 10, it can be seen that the portion dependent upon β in current switch 40 of FIG. 5 is substantially less than the dependent portion, -nI 0  /β, in current switch 10 of FIG. 1. 
     Current switch 40 can also switch currents to loads 16 and 18 simultaneously, if so desired. In this situation, V IN1  and V IN2  have the first state so that Q1 and Q2 are on. 
     Since Q1 and Q2 are on and are identical transistors: 
     
         I.sub.CQ1 =I.sub.CQ2 ≈nI.sub.0 (1-1/β.sup.3)/2 61. 
    
     As seen in equation 61, in current switch 40 of FIG. 5 the portion of the switched currents or currents through loads 16 and 18, I CQ1  and I CQ2 , dependent upon β is -nI 0  /2β 3 . This is substantially less than the βdependent portion, -nI 0  /2β, that would result in current switch 10 of FIG. 1 if both Q1 and Q2 were on. 
     N-channel field effect transistors (FETs) could be substituted for bipolar transistors Q5 and Q6. N-channel field effect transistors could also e substituted for bipolar transistors Q15 and Q16 in which case transistor Q17 would be replaced with a conductor shorting the gate and drain of the n-channel field effect transistor replacing Q16. In addition, current switch 40 could be implemented with PNP transistors instead of NPN transistors or a combination of PNP transistors and p-channel field effect transistors. 
     An advantage of the invention, as demonstrated by each of the embodiments of FIGS. 2-5, is the ability of a current switch having bipolar switching transistors to switch a current that is substantially less dependent on β than the current switched by the conventional current switch of FIG. 1. The substantial reduction in β dependence results in a switched current that is much less sensitive to process variations and can therefore be predicted with a very high degree of accuracy. 
     A few preferred embodiments have been described in detail hereinabove. It is to be understood that the scope of the invention also comprehends embodiments different from those described, yet within the scope of the claims. 
     For example, the number of switching transistors and associated loads may be greater than two or less than two. In addition, instead of being fully integrated, the circuit may be implemented in discrete components. 
     While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.