Abstract:
An extensible filter structure is disclosed allowing realizable effective filtering over many decades in frequency. Multiple devices operating with mismatched frequency ranges can be multiplexed together with or without switching.

Description:
TECHNICAL FIELD 
       [0001]    The systems described below generally relate to an adaptor for different razor systems. More particularly, the adapter allows for a razor handle of one type of docking interface to be coupled with a cartridge of a different type of docking interface. 
       BACKGROUND 
       [0002]    Conventional wideband switching networks have been designed to steer signals through appropriate narrower band filters. Each filter is accessed individually according to the switch settings. As the number of filters increases, the switching losses increase correspondingly. 
         [0003]    Conventional diplexer structures are not generally considered to have acceptable performance over a wide frequency band (greater than one decade in frequency). Some cascaded diplexers can allow realizable concurrent frequency selective filtering over 4 decades in frequency. 
         [0004]    Networks that combine bandpass filters into a broader band common port exist. One example is a log periodic antenna that combines multiple band pass antenna elements into a broader contiguous frequency band in parallel along a transmission line. Antenna multicouplers typically use several bandpass filters in parallel to combine several radios to a single antenna. The parallel arrangement means the undesired resonances are not decoupled from the output. 
         [0005]    The novel filter network arrangement disclosed, allows multiple filters to be accessed concurrently. Additionally, switching may be embedded inside the filter network, avoiding the cascaded switching losses. 
       SUMMARY 
       [0006]    In accordance with one embodiment, an electrical circuit comprises a first diplexer and a second diplexer. The first diplexer comprises a first low pass filter and a first high pass filter. The first low pass filter comprises a first input and a first output. The first low pass filter defines a first low pass cutoff frequency. The first high pass filter comprises a second input and a second output. The first high pass filter defines a first high pass cutoff frequency and the first and second inputs are directly electrically coupled together. The second diplexer comprises a second low pass filter and a second high pass filter. The second low pass filter comprises a third input and a third output. The second low pass filter defines a second low pass cutoff frequency. The second high pass filter comprises a fourth input and a fourth output. The second high pass filter defines a second high pass cutoff frequency. The first output, the third input, and the fourth input are directly electrically coupled together. The first low pass cutoff frequency and the first high pass cutoff frequency are substantially the same. The second low pass cutoff frequency is less than the first low pass cutoff frequency. The second high pass cutoff frequency is less than the first high pass cutoff frequency. The second low pass cutoff frequency and the second high pass cutoff frequency are substantially the same. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]    It is believed that certain embodiments will be better understood from the following description taken in conjunction with the accompanying drawings in which: 
           [0008]      FIG. 1  is a schematic block diagram depicting an electrical circuit having a plurality of diplexers, in accordance with one embodiment; 
           [0009]      FIG. 2  is a schematic block diagram depicting an electrical circuit having a plurality of diplexers, in accordance with another embodiment; 
           [0010]      FIG. 3  is a schematic block diagram depicting an electrical circuit having a plurality of diplexers and terminated filters, in accordance with one embodiment; 
           [0011]      FIG. 4  is a schematic view depicting one example of the electrical circuit of  FIG. 3 ; 
           [0012]      FIG. 5  is a schematic block diagram depicting an electrical circuit having a plurality of diplexers and A/D converters, in accordance with one embodiment; 
           [0013]      FIG. 6  is a schematic block diagram depicting an electrical circuit having a plurality of diplexers and A/D converters, in accordance with one embodiment; 
           [0014]      FIGS. 7-16  depict different plots depicting the frequency response of the electrical circuit of  FIG. 6  based upon different switching conditions; and 
           [0015]      FIG. 17  is a schematic block diagram depicting a conventional diplexer arrangement. 
       
    
    
     DETAILED DESCRIPTION 
       [0016]    In connection with the views and examples of  FIGS. 1-16 , wherein like numbers indicate the same or corresponding elements throughout the views, an electrical circuit  20  is illustrated in  FIG. 1  and is shown to include a first diplexer  22  and a second diplexer  24  that are electrically connected together such that they can be considered “cascaded”. The first diplexer  22  comprises a low pass filter  26  and a high pass filter  28 . The low pass filter  26  comprises an input  30  and an output  32  and defines a low pass cutoff frequency. The high pass filter  28  comprises an input  34  and an output  36  and defines a high pass cutoff frequency that is substantially the same as the low pass cutoff frequency of the low pass filter  26 . The inputs  30 ,  34  of the low and high pass filters  26 ,  28  are directly electrically coupled together. The second diplexer  24  comprises a low pass filter  38  and a high pass filter  40 . The low pass filter  38  comprises an input  42  and an output  44  and defines a low pass cutoff frequency. The high pass filter  40  comprises an input  46  and an output  48  and defines a high pass cutoff frequency that is substantially the same as the low pass cutoff frequency of the low pass filter  38 . The output  36  of the high pass filter  28  of the first diplexer  22  is directly electrically coupled with each of the inputs  42 ,  46  of the respective low and high pass filters  38 ,  40  of the second diplexer  24 . One example of a conventional diplexer is illustrated in  FIG. 17 . 
         [0017]    The low pass cutoff frequency of the low pass filter  38  of the second diplexer  24  can be less than the low pass cutoff frequency of the low pass filter  26  of the first diplexer  22 . The low pass cutoff frequency of the low pass filter  38  of the second diplexer  24  can be less than the low pass cutoff frequency of the low pass filter  26  of the first diplexer  22 . The high pass cutoff frequency of the high pass filter  40  of the second diplexer  24  can be less than the high pass cutoff frequency of the high pass filter  28  of the first diplexer  22 . It is to be appreciated that the high pass and low pass filters  26 ,  28 ,  38 ,  40  can be complementary and cascaded in a particular manner to achieve a network of filters capable of combining or separating bandlimited signal paths to or from a common broader bandwidth signal path. Separated signal paths can be switched and then recombined to a common signal path thus allowing individual control of each bandlimited signal path between a single input and output. 
         [0018]    If a desired diplexer design becomes sufficiently complex, any of a variety of methods can be employed to dampen undesired resonances. For example, realizable, non-ideal inductors and capacitors can be constructed so that undesired resonances fall well above the cutoff frequency of the filter in which they are used. These resonances can compromise the broadband performance of the filters if they are used in an externally switched network. These resonances above cutoff inside the network are successively suppressed behind low pass filters having successively higher cutoff frequencies moving toward the outside of the network. If properly designed, the only resonances measureable will be from diplexer closest to the outside of the network. This allows the designer to make the undesired resonances as high as needed. Computer simulations have demonstrated flybacks above 100 GHz on a filter built into an integrated circuit. The filter provides controlled selectivity down to 0 Hz. Additionally or alternatively resonances from the interactions between sufficiently complex diplexers can be suppressed by internal filters having their own terminations. These internally terminated filters can be connected to the diplexer outputs or be knitted into the diplexer&#39;s high pass and low pass ladder structure by sharing a ladder component. Their cutoff frequencies can be well above or below the band of the respective signal path to which they are connected so they cause very little effective loss to the desired signal paths. 
         [0019]      FIG. 2  illustrates an electrical circuit  120  according to another embodiment that includes a first diplexer  122 , a second diplexer  124 , and a third diplexer  150  that are provided in a cascaded arrangement. The first and second diplexers  122 ,  124  can be similar to or the same as the first and second diplexers  22 ,  24  illustrated in  FIG. 1 . The third diplexer  150  can be similar to or the same as either of the first and second diplexers  22 ,  24  illustrated in  FIG. 1 . A low pass cutoff frequency of a low pass filter  152  of the third diplexer  150  can be less than a low pass cutoff frequency of a low pass filter  138  of the second diplexer  124 . A high pass cutoff frequency of a high pass filter  154  of the third diplexer  150  can be less than a high pass cutoff frequency of a high pass filter  140  of the second diplexer  124 . The low pass cutoff frequency of the low pass filter  152  and the high pass cutoff frequency of the high pass filter  154  can be substantially the same. It is to be appreciated that any quantity of diplexers can be cascaded together similar to  FIGS. 1 and 2 . 
         [0020]      FIG. 3  illustrates an electrical circuit  220  according to another embodiment that includes a first diplexer  222  and a second diplexer  224  that are provided in a cascaded arrangement. The first and second diplexers  222 ,  224  can be similar to or the same as the first and second diplexers  22 ,  24  illustrated in  FIG. 1 . The electrical circuit  220  however can include a first terminated low pass filter  256 , a second terminated low pass filter  258 , a first terminated high pass filter  260 , and a second terminated high pass filter  262 . The first terminated low pass filter  256  can be electrically coupled to an output  236  of a high pass filter  228  of the first diplexer  222 . The first terminated high pass filter  260  can be electrically coupled to the interconnection between an output  232  of a low pass filter  226  of the first diplexer  222  and inputs  242 ,  246  of respective low and high pass filters  238 ,  240  of the second diplexer  224 . The second terminated low pass filter  258  can be electrically coupled to an output  248  of a high pass filter  240  of the second diplexer  224 . The second terminated high pass filter  262  can be electrically coupled to an output  244  of a low pass filter  238  of the second diplexer  222 . The first terminated low pass filter  256  can have a cutoff frequency that is less than the cutoff frequency of the high pass filter  228  of the first diplexer  222 . The first terminated high pass filter  260  can have a cutoff frequency that is higher than the cutoff frequency of the low pass filter  226  of the first diplexer  222 . The second terminated low pass filter  258  can have a cutoff frequency that is less than the cutoff frequency of the high pass filter  240  of the second diplexer  224 . The second terminated high pass filter  262  can have a cutoff frequency that is higher than the cutoff frequency of the low pass filter  238  of the second diplexer  224 . 
         [0021]    Singly terminated filters, such as the first and second terminated low pass filters  256 ,  258  and the first and second terminated high pass filters  260 ,  262 , can be an optimized class of filters for the high pass and low pass filters that constitute the diplexers. Singly terminated filters can be designed to be driven from either a voltage or current source. Singly terminated filters can consist of series and shunt inductors and capacitors that are arranged in alternating fashion in a two port ladder network. A voltage source can be connected to the singly terminated filter using a series inductor or capacitor. A current source can be connect to the singly terminated filter using a shunt inductor or capacitor. A voltage sourced singly terminated filter can have a high impedance resisting the flow of current in its rejection band and can allow power to flow from the source to a resistive termination in its passband. A current sourced singly terminated filter can have a low impedance resisting the production of a voltage in its rejection band and can allow power to flow from the source to a resistive termination in its passband. Singly terminated high and low pass filters can be designed to be voltage sourced with a series inductor or capacitor and can have equivalent cutoff frequencies that are connected in parallel. Each filter therefore can present a high impedance in its rejection band while combining at, above and below the cutoff frequency to provide a resistive impedance to the common connected source. 
         [0022]      FIG. 4  illustrates an example of the first diplexer  222  of the electrical circuit  220  of  FIG. 3 . The low pass filter  226 , the high pass filter  228 , the first terminated low pass filter  256 , and the first terminated high pass filter  260  are shown to each be formed of a variety of resistors, inductors, and/or capacitors. The capacitor  261  of the low pass filter  226  and the inductor  263  of the high pass filter  228  can be utilized by the first terminated low pass filter  256  and the first terminated high pass filter  260 , respectively (thus effectively sharing a component) which can minimize the complexity of the electrical circuit  220 . The second diplexer  224  can also be similarly configured to have a shared capacitor and inductor. 
         [0023]      FIG. 5  illustrates an electrical circuit  320  according to another embodiment that includes a plurality of diplexers  322   a,    322   b , . . .  322   n  that are provided in a cascaded arrangement. The plurality of diplexers  322   a,    322   b , . . .  322   n  can be similar to or the same as the first and second diplexers  22 ,  24  illustrated in  FIG. 1 . A plurality of analog to digital (A/D) converters  364   a ,  364   b , . . .  364   n  can be electrically coupled to respective high pass filter outputs  336   a ,  336   b , . . .  336   n.  The low pass output having the lowest cutoff frequency (e.g.,  332   n ) can also be electrically coupled to the A/D converter  364   n.  The A/D converters  364   a,    364   b , . . .  364   n  can create a composite channelized A/D converter covering a greater band than an individual A/D converter. It is to be appreciated that, in some embodiments, digital to analog (D/A) converters can be used in lieu of the A/D converters  364   a,    364   b , . . .  364   n.  In some embodiments, the high pass filter outputs  336   a,    336   b , . . .  336   n  as well as the low pass output having the lowest cutoff frequency (e.g.,  332   n ) can be additionally or alternatively connected to frequency mixers creating a channelized down converter that allows a significant multiplication factor over the effective bandwidth of conventional technologies. 
         [0024]      FIG. 6  illustrates an electrical circuit  420  according to another embodiment that includes a plurality of diplexers  422   a,    422   b , . . .  422   n  that are provided in a cascaded arrangement. The plurality of diplexers  422   a,    422   b , . . .  422   n  can be similar to or the same as the first and second diplexers  22 ,  24  illustrated in  FIG. 1 . However, a plurality of matching diplexers  470   a ,  470   b , . . .  470   n  can be provided that are electrically attached in a cascading arrangement. The plurality of matching diplexers  470   a,    470   b , . . .  470   n  can be connected to the plurality of diplexers  422   a,    422   b , . . .  422   n  by coupling each high pass filter output of one of the diplexers  422   a ,  422   b , . . .  422   n  with a corresponding high pass filter output of one of the matching diplexers  470   a ,  470   b , . . .  470   n  with two port switches (indicated by ‘x’). In particular the two port switches from the second port of the high pass filters of the diplexers  422   a,    422   b , . . .  422   n  can be coupled with the two port switches from the second port of the high pass filters of the matching diplexers  470   a,    470   b , . . .  470   n.  The last low pass filter from the plurality of diplexers  422   a,    422   b , . . .  422   n  and the last low pass filter from the plurality of diplexers plurality of matching diplexers  470   a ,  470   b , . . .  470   n  can also be connected together with two port switches. The two port switches can set such that the network response can be a low pass, high pass, band pass, band reject, or any combination allowed by the number of diplexers in cascade. It is to be appreciated that embedded switching can allow those signals falling at the crossover frequency to be routed entirely to either of the two channels above or below the crossover depending on the switch state. Without switching, signals falling at the crossover frequency are routed equally between the signal paths above and below the crossover. 
         [0025]      FIGS. 7-16  illustrate different plots depicting the frequency response of the electrical circuit  420  of  FIG. 6  based upon different switching conditions. 
         [0026]    It is to be appreciated that the electrical circuits ( 20 ,  120 ,  220 ,  320 ,  420 ) described above can be utilized in a variety of different electrical applications. In accordance with one example, the electrical circuits described above (or a derivation thereof) can be used for high fidelity reception of signals in a densely occupied electromagnetic environment. Practical active radio circuits have a limited dynamic range. This dynamic range is usually sufficient for fiber, coax or twisted pair guided waves absent competing/interfering energy. However that dynamic range is often insufficient for acceptable operation in a densely occupied (multi-user) electromagnetic environment. It is not uncommon to encounter undesired radio energy a billion times (90 dB) stronger than the signal of interest. These active circuits include amplifiers, oscillators, frequency mixers, modulators and demodulators. As analog to digital (A/D) converter and digital to analog converter (D/A) technologies advance they are becoming more integral to radio circuitry. The demand to receive and transmit data at increasingly higher rates requires radios to operate with correspondingly increased instantaneous bandwidth. A/D and D/A converters, along with digital signal processing, are key to enabling operation with increased instantaneous bandwidth. Practical active radio circuits, and in particular A/D and D/A converters require frequency selective filtering to achieve a dynamic range sufficiently for acceptable operation in a densely occupied (multi-user) electromagnetic environment. Filtering is also required for A/D and D/A converters to avoid frequency aliasing resulting from the discrete time sampling. 
         [0027]    In accordance with another example, the electrical circuits described above (or a derivation thereof) can be used for coupling radio devices having mismatched frequency coverage such as, for example, in the case of one broadband antenna to multiple bandlimited radios, multiple bandlimited antennas to a single broadband radio, multiple bandlimited antennas to multiple bandlimited radios, and/or harnessing multiple A/D and D/A converters to a common broadband input or output. 
         [0028]    In accordance with yet another example, the electrical circuits described above (or a derivation thereof) can be used as an anti-alias and reconstruction filter for converting signals between continuous and discrete time systems. 
         [0029]    The foregoing description of embodiments and examples of the disclosure has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure to the forms described. Numerous modifications are possible in light of the above teachings. Some of those modifications have been discussed and others will be understood by those skilled in the art. The embodiments were chosen and described in order to best illustrate the principles of the disclosure and various embodiments as are suited to the particular use contemplated. The scope of the disclosure is, of course, not limited to the examples or embodiments set forth herein, but can be employed in any number of applications and equivalent devices by those of ordinary skill in the art. Rather, it is hereby intended the scope of the invention be defined by the claims appended hereto.