Abstract:
Methods and apparatus regulate the output of a switching device to a voltage near that of saturation. In the preferred embodiment, this is accomplished for a small period of time during activation before and/or after device saturation. The switching device drive requirement is then measured to attain the regulated voltage. Measurement of the drive requirement during the small period of time correlates to switching driver current, being reliant on the finite gain of the switching device.

Description:
REFERENCE TO RELATED APPLICATION 
     This application is a continuation of U.S. patent application Ser. No. 10/916,128 filed Aug. 11, 2004, which claims priority from U.S. Provisional Patent Application Ser. No. 60/494,247, filed Aug. 11, 2003. The entire content of both applications are each incorporated by reference herein. 
    
    
     FIELD OF THE INVENTION 
     This invention relates generally to switching power drivers and, in particular, to a technique excessive current and fault conditions are detected efficiently and without significant cost. 
     BACKGROUND OF THE INVENTION 
     Switching power drivers offer far greater efficiency than their analog counterparts, due to saturated operation at all times. Particularly because of saturated operation, however, instances of excessive current flow must be externally detected in order to avoid damage. 
     Hall-effect devices used for this purpose increase system cost considerably. Series load-sensing resistors impact not only cost, but efficiency itself, the prime reason for use of switching drivers. 
     A need therefore exists for a technique whereby switching driver current and fault conditions are detected efficiently and without significant cost. 
     SUMMARY OF THE INVENTION 
     The present invention is directed to methods and apparatus for regulating the output of a switching device to a voltage near that of saturation. In the preferred embodiment, this is accomplished for a small period of time during activation before and/or after device saturation. The switching device drive requirement is then measured to attain the regulated voltage. Measurement of the drive requirement during the small period of time correlates to switching driver current, being reliant on the finite gain of the switching device. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  shows a preferred embodiment of the present invention in a low-side driver configuration; and 
         FIG. 2  shows voltage and current waveforms for the circuit of  FIG. 1  during normal operation with increasing driver current. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring now to  FIG. 1 , pulsewidth controller  101  issues positive-going pulses to assert one of either switching device  105  or  106 , in a manner known in the art. Switching device  105 , when so asserted, sources current to the control input of switching device  107 , activating it. Switching device  106 , when so asserted, sinks current to the control input of switching device  107 , deactivating it. Switching device  107 , when activated, sinks current through load resistance  108 . 
     When neither switching device  105  nor  106  are activated by pulsewidth controller  101 , amplifier  102  outputs a voltage through resistor  104  to switching device  107 , so as to cause the output voltage of switching device  107  to approach that of reference voltage  103 . Resistor  104  prevents destruction of amplifier  102  by either switching device  105  or  106 . Reference voltage is assumed to be extremely small. When neither switching device  105  nor  106  are activated, switching device  107  then can be seen to sink a current approaching its saturated maximum. Switching device  107  dissipation during this condition does not appreciably increase over that in saturation. 
     When neither switching device  105  nor  106  are activated, NOR gate  111  activates transmission gate  109 , which charges capacitor  112  to the voltage output by amplifier  102 , through resistor  110 . When either switching device  105  or  106  are subsequently activated, NOR gate  111  disables transmission gate  109 , preserving the previous capacitor  112  voltage. The voltage  113  resultant of the circuitry described above remains representative of the drive requirement of switching device  107 , when approaching current saturation. Voltage  113  is then related to switching device  107  current by switching device  107  transconductance at its present output current, so is an approximation of switching device  107  output current. Window comparisons of current approximation voltage  113  can now be made to ascertain load faults, as commonly done in the art. 
     Referring now to  FIG. 2 , trace  201  and  202  show control inputs of switching devices  105  and  106 , respectively, of  FIG. 1 . Trace  203  shows resultant voltage at the output of switching device  107  presented to load  108 , of  FIG. 1 . Trace  204  shows current approximation voltage  113  and trace  205  shows current through load  108 , both of  FIG. 1 . Note that the resistance of load  108  is gradually decreased throughout  FIG. 2 , resulting in increasing current when switching device  107  is activated. 
     At time marker  206 , switching device  106  deactivation is seen in trace  202 , resulting in decreased voltage from switching device  107  (seen in trace  203 ) and increasing current approximation voltage  113  (seen in trace  204 ) as switching device  107  begins to sink current. Voltage  113  in trace  204  slowly increases with load current seen in trace  205 , until switching device  105  is asserted, as seen in trace  201  at time marker  207 . In that transmission gate  109  is now deactivated by NOR gate  111 , voltage  113  seen in trace  204  remains static until time marker  208 . At time marker  208 , switching device  105  deactivation is seen in trace  201 , which, through the action of transmission gate  109 , causes current approximation voltage  113  seen in trace  204  to rise, indicating the increased switching device  107  current indicated in trace  205 . At time marker  209 , the transmission gate  109  is again deactivated by NOR gate  111 , allowing capacitor  112  to retain the previous current approximation voltage, as seen in trace  204 . A similar set of control pulses is seen in traces  201  and  202  at time markers  210 , 211 , 212 , and  213 , resulting in similar current approximation voltage  113  changes seen in trace  204 . Note that the increase in current, as seen in trace  205 , results in increased current approximation voltage  113  seen in trace  204 . 
     Although saturation of switching device  107  of  FIG. 1  is desirable for maximum efficiency, it is anticipated that the technique described herein will find use without the switching device  107  saturated state enforced by switching device  105 . 
     Although shown using a single switching device, the present invention will find use with complementary drivers, or multiple-voltage drivers, such as multi-reference switching amplifiers. An additional benefit to the present invention in these configurations is the possible avoidance of V+&gt;Ground or Ground&gt;V+ transitions. Imposition of an intermediate voltage state between these two extremes can be used to mitigate shoot-through currents which commonly plague H-bridge output stages. It is anticipated that the current measurement afforded by the present invention will be used to adaptively adjust specific output switching device timing so as to entirely avoid either shoot-through current or dead time between sinking and sourcing drivers. When driving inductive loads, snubber circuits would thus become unnecessary. 
     Whereas transconductance or current gain of practical switching devices is rarely linear through broad current ranges, linearization of the current approximation voltage generated herein is anticipated. 
     Although voltage-driven MOSFET switching devices are shown herein, it is observed that the current invention functions equally well with current-driven switching devices, and affords either voltage or current representation of output switching device current. 
     The circuitry shown herein is shown in simplified form to better illustrate the specific technique employed. Use of additional sample/hold circuitry, differential error amplification, and orchestrated timing delays are anticipated for their potential improvements on circuit operation. Although use of static comparison references is shown herein, the use of dynamic references, which detect changes in load current, are anticipated.