Abstract:
An emitter has a rapid thermal process (RTP) formed emission layer of SiO 2 , SiO x N y  or combinations thereof. The emission layer formed by rapid thermal processing does not require electroforming to stabilize the film. The RTP grown films are stable and exhibit uniform characteristics from device to device.

Description:
FIELD OF THE INVENTION  
         [0001]    The invention is in the microelectronics field. The invention particularly concerns emitters and devices incorporating emitters.  
         BACKGROUND OF THE INVENTION  
         [0002]    Emitters have a wide range of potential applicability in the microelectronics field. An emitter emits electrons in response to an electrical signal. The controlled emissions form a basis to create a range of useful electrical and optical effects. Prior conventional emitters include spindt tip cold cathode devices.  
           [0003]    The geometry of cold cathode spindt tip emitters presents a barrier to size reduction. As the size of a spindt tip device is reduced, the spindt tip becomes more susceptible to damage from contaminants in a vacuum ionized from the emissions from the tip. The ionized contaminants are attracted to the spindt tip and collide with it, thereby causing damage. A vacuum space around the spindt tip therefore requires an increasingly high vacuum to avoid the potential damage caused by ionized contaminants. For similar reasons, the tip geometry is also a barrier to incorporation of emitters with integrated circuits.  
           [0004]    Flat emitters are comparably advantageous because they present a larger emission surface that can be operated in lower vacuum environments. Flat emitters include a dielectric emission layer that responds to an electrical field created by other portions of the device. Flat emitters are tunneling emission devices. An electric field proximate the surface of the emission layer narrows a width of a potential barrier existing at the surface of the emission layer. This allows a quantum tunnelling effect to occur, whereby electrons cross through the potential barrier and are emitted from the material.  
           [0005]    Flat emission layers formed by low temperature chemical vapor deposition or room temperature sputter/evaporation techniques are potentially unstable. Specifically, such layers often have electrical characteristics that change with time. In addition, layers formed by such processes must be conditioned, e.g., through electro-forming processes. Even with conditioning, significant variation in device performance is possible. Electro-forming is also a time consuming process.  
         SUMMARY OF THE INVENTION  
         [0006]    An emitter has a rapid thermal process (RTP) formed emission layer of SiO 2 , SiO x N y  or combinations thereof. The emission layer formed by rapid thermal processing does not require electro-forming to stabilize the film. The RTP grown films are stable and exhibit uniform characteristics from device to device.  
           [0007]    A particular preferred emitter of the invention includes a RTP formed emission layer formed on a silicon or polysilicon substrate. The RTP formed emission layer is within an area defined by an oxide layer on the silicon or polysilicon substrate. A particularly preferred embodiment emission layer is a combination SiO 2  and SiO x N y  layer, having approximately 20 Å SiO 2  and 30-130 Å SiO x N y . 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0008]    [0008]FIG. 1 is a schematic representation of a preferred embodiment emitter of the invention;  
         [0009]    [0009]FIG. 2 is block diagram of a preferred embodiment emitter formation process usable to form the exemplary preferred embodiment emitter of FIG. 1;  
         [0010]    [0010]FIG. 3 is a block diagram of a preferred embodiment device having an emitter and a target medium;  
         [0011]    [0011]FIG. 4 is a block diagram of a preferred embodiment integrated circuit;  
         [0012]    [0012]FIG. 5 is a block diagram of an alternative preferred embodiment display; and  
         [0013]    [0013]FIGS. 6A and 6B illustrate a preferred embodiment memory device. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0014]    The present invention concerns an emitter including a rapid thermal process formed emission layer of SiO 2 , SiO x N y  or combinations thereof. The emission layer is formed on a silicon or polysilicon substrate in an area defined by an oxide, e.g., a field oxide. This emission layer provides advantages in a device formation process, as well. The rapid thermal process used in forming devices including an emission layer according to the invention produces stable dielectric films that exhibit consistent characteristics when formation process conditions are maintained. A vacuum condition of approximately 10 −5  Torr is a sufficient operational condition for a preferred embodiment emitter.  
         [0015]    The invention will now be illustrated with respect to a preferred embodiment emitter and representative devices incorporating the preferred embodiment emitter. In describing the invention, particular exemplary devices, formation processes, and device applications will be used for purposes of illustration. Dimensions and illustrated devices may be exaggerated for purposes of illustration and understanding of the invention. A single emitter illustrated in conventional fashion by a two dimensional schematic layer structure will be understood by artisans to provide teaching of three-dimensional emitter structures. The teachings of the invention are readily incorporated into conventional integrated circuit formation processes, as will also be appreciated by artisans.  
         [0016]    Referring now to FIG. 1, a preferred embodiment emitter  10  of the invention is shown in a two-dimensional schematic cross section. The preferred embodiment emitter  10  is a metal-insulator-semiconductor (MIS) device including a flat emission area defined by a thin metal layer  12  formed over a RTP emission layer  14 . The emission layer  14  is formed in an area defined by an oxide layer  15 , e.g., a field oxide. The RTP emission layer is formed of SiO 2 , SiO x N y  or combinations thereof. A N++ silicon or polysilicon substrate  16  is an electron supply source for the emitter  10 , and acts as the emitter anode. A field is applied to stimulate emissions through the emission layer  14  when an appropriate voltage is applied to a metal contact structure  18 . In the emitter  10 , the metal contact structure  18  is shown in a preferred form as a multilayer contact of Au and Ta. The separate layers  20  and  22  may, for example, form part of a circuit interconnect pattern in an integrated circuit into which the emitter  10  is incorporated. Application of a voltage to the metal contact structure  18  establishes an electric field between the substrate  16  and the thin metal layer  12 , which acts as a cathode.  
         [0017]    The nature of the emissions and required operational conditions to produce emissions will depend upon the thickness of the emission layer  14 . A preferred emission layer is a combination layer having a 20 Å SiO 2  layer and a SiO x N y  layer in the approximate range of 30-130 Å. Designers applying the invention will understand that thinner layers reduce the tunneling resistance of the layer and produce emissions at lower voltages. However, a point is reached when the layer becomes too thin and dielectric breakdown is possible. The lower limit for thinness is also affected by dielectric strength of the material. The RTP formed emission layers of the invention are stable, high quality dielectrics. To the extent that quality may be optimized in the RTP growth process, thinner layers may be found to produce sound dielectrics. Designers will also understand that an optimized thickness produces maximum emission efficiency. If the emission layer is too thin, high leakage current and electric shorting are possible, while if is too thick, the emission current will be greatly reduced. Increasing the thickness of the emission layer  14  will increase its tunneling resistance. At a certain point, the tunneling resistance will be larger than desirable. The ultimate upper thickness limit, though, is also application specific. A willingness to allow higher voltages will permit the use of thicker layers. In sum, when lower voltages are critical, thinner layers produce emissions at lower voltages. When higher voltages are possible, thicker layers produce increased emissions. The thin metal layer  12  is formed of a metal or alloy and in a thickness to provide a sufficient electron field. On the other hand, the thickness is limited to permit electron emissions to escape from the emission layer  14 . A preferred thin metal layer  12  is a Pt layer of approximately 50-100 Å. Alternate preferred materials are Au, Ta, and combinations of Pt, Au or Ta. In addition to platinum, gold, and tantalum, other metals including molybdenum, iridium, ruthenium, chromium, or other refractive metals and alloys may be used. Similar possibilities exist for the metal contact structure  18 .  
         [0018]    Emitters of the invention are formed with an RTP process that is amenable to the incorporation of the invention into circuits and integrated circuit device applications. FIG. 2 is a block diagram showing the steps of a preferred embodiment method of the invention. The process steps of FIG. 2 begin with an appropriate silicon or polysilicon substrate, e.g., a N++ doped silicon wafer. The process steps, while discussed with respect to a single device may be carried out for the simultaneous production of one or many devices. Artisans will also appreciate that the steps of FIG. 2 illustrate significant steps of the preferred process, and ancillary processes may be carried out in practice along with the steps illustrated in FIG. 2.  
         [0019]    In step  24 , an oxide is used to define an emission area. The oxide serves to isolate the emission area from other devices. The manner of forming and patterning the oxide is a matter of design choice. Once the emission area is formed, in step  26 , a rapid thermal process is used to form the emission layer. The emission layer may be formed as a single layer of SiO 2  or SiO x N y . The emission layer may also be formed as multiple layers, such as a layer of SiO 2  followed by a layer of SiO x N y . The emission layer of the invention formed by rapid thermal processing produces a high quality layer, whose crystal structure is excellent and stable. No ancillary step is required in the formation of the emission layer, e.g., there is no need for electro-forming processing. Metal contact structures are then formed. For example, a metal lift-off step  28  is followed by a metal deposition step  30 , and a lift-off step  32 . Optionally, there may be additional metal layers formed by similar steps after isolation steps, as in well known processes for forming multiple layers of metal interconnect patterns in an integrated circuit. The thin metal cathode is formed, for example, by a deposition step  34  with an isolation photo patterning step  36  and metal etch step  38  to pattern the thin metal.  
         [0020]    As mentioned, potential uses of an emitter according to the invention, such as the emitter  10  of FIG. 1 are wide-ranging due to the general utility of emissions as a basis for electrical and electrooptical effects. Further, emitters of the invention are easily incorporated into integrated circuit fabrication techniques. A few particularly preferred applications of the emitter will now be discussed.  
         [0021]    [0021]FIG. 3 is an exemplary diagram of a preferred application of an emitter where a target medium receives focused emissions. In this application, the emissions  40  from an emitter  42  of the invention are focused by an electrostatic focusing device or lens  44 , exemplified as an aperture in a conductor that is set at predetermined voltage that can be adjusted to change the focusing effect of the lens  44 . Those skilled in the art will appreciate that lens  44  can be made from more than one conductor layer to create a desired focusing effect. The emissions  40  are focused by the lens  44  into a focused beam onto a target anode medium  46 , which might be a memory or display medium, for example. The anode medium is set at an anode voltage V a . The magnitude of V a  will depend on the intended use and the distance from the anode medium  46  to the emitter  42 . For example, with the anode medium being a recordable medium for a storage device, V a  might be chosen to be between 500 and 1000 Volts. The lens  44  focuses the electron emission  40  by forming an electric field  48  in response to voltage V 1  within its aperture. By being set at a proper voltage difference from V e , the electrons emitted from the emitter  42  are directed to the center of the aperture and then further attracted to the anode medium  46  to form the focused beam.  
         [0022]    In another preferred embodiment, the anode medium  46  is a display medium. The focusing of the beam onto the anode medium then produces an effect to stimulate a visual display.  
         [0023]    [0023]FIG. 4 is an exemplary embodiment of an integrated circuit  58  that includes at least one integrated emitter  60 , but preferably a plurality of integrated emitters  60  arranged in an array. An emitter control circuit  62  is integrated onto the integrated circuit  58  and used to operated the at least one integrated emitter  60 . Emitters  60  of the invention are thus incorporated into an integrated circuit, which is possible by virtue of the nature of the present emission layer.  
         [0024]    [0024]FIG. 5 is another alternative embodiment of a display application using an integrated emitter  64  of the invention. In this embodiment, a plurality of emitters  64  is formed in an integrated circuit  66 . Each of the emitters  64  emits electrons. An anode structure  68  having multiple pixels  70  forming a display  72  receives the emitted energy. The pixels  70  are preferably a phosphor material that creates photons when struck by emissions from emitters  64 .  
         [0025]    A particular preferred memory device is shown in FIGS. 6A and 6B. The memory device includes integrated emitters  74 . In this exemplary embodiment, an integrated circuit (IC)  76  including a plurality of integrated emitters  74  has a lens array  78  of focusing mechanisms aligned with the integrated emitters  74 . The lens array  78  is used to create a focused beam  80  that is used to affect a recording surface, media  82 . Media  82  is applied to a mover  84  that positions the media  82  with respect to the integrated emitters  74  on IC  76 . Preferably, the mover  84  has a reader circuit  86  integrated within. The reader  86  is shown as an amplifier  88  making a first ohmic contact  90  to media  82  and a second ohmic contact  92  to mover  84 , preferably a semiconductor or conductor substrate. When a focused beam  80  strikes the media  82 , if the current density of the focused beam is high enough, the media is phase-changed to create an affected media area  94 . When a low current density focused beam  80  is applied to the media  82  surface, different rates of current flow are detected by amplifier  88  to create reader output. Thus, by affecting the media  82  with the energy from the emitter  74 , information is stored in the media using structural phase changed properties of the media. An exemplary phase-change material is In 2 Se 3 . Other phase change materials are known to those skilled in the art.  
         [0026]    While a specific embodiment of the present invention has been shown and described, it should be understood that other modifications, substitutions and alternatives are apparent to one of ordinary skill in the art. Such modifications, substitutions and alternatives can be made without departing from the spirit and scope of the invention, which should be determined from the appended claims.  
         [0027]    Various features of the invention are set forth in the appended claims.