Abstract:
A photovoltaic device with increased efficiency and a method for making the same. The present invention provides a photovoltaic device including: a transparent substrate; a transparent conductive electrode layer disposed on the transparent substrate; an n-type layer disposed on the transparent conductive electrode layer; a chalcogen absorber layer disposed on the n-type layer; a p-type molybdenum trioxide (MoO3) interlayer disposed on the chalcogen absorber layer; and a conductive layer disposed on the interlayer. A photovoltaic device having a superstrate configuration with the order of the layers reversed is also provided. The present invention further provides methods for making the photovoltaic devices according to the present invention.

Description:
TECHNICAL FIELD OF THE INVENTION 
       [0001]    The present invention relates to photovoltaic cells. More particularly, the present invention relates to chalcogen-based photovoltaic cells. 
       BACKGROUND OF THE INVENTION 
       [0002]    Solar panels employ photovoltaic cells to generate current flow. When a photon hits a photovoltaic cell, the photon may be transmitted through, reflected off, or absorbed by the photovoltaic cell if the photon energy is higher than the material band gap value. This generates an electron-hole pair and sometimes heat, depending on the band structure. 
         [0003]    A photovoltaic cell can be described in terms of its open circuit voltage (V oc ), short circuit current (J sc ) and fill factor (FF). Fill factor is the ratio of the maximum power point (P m ) divided by the open circuit voltage (V oc ) and short circuit current (J sc ): 
         [0000]    
       
         
           
             
               F 
                
               
                   
               
                
               F 
             
             = 
             
               
                 
                   P 
                   m 
                 
                 
                   
                     V 
                     oc 
                   
                    
                   
                     J 
                     sc 
                   
                 
               
               . 
             
           
         
       
     
         [0000]    The fill factor is directly affected by the values of the cell&#39;s series and shunt resistance. Increasing the shunt resistance (R sh ) and decreasing the series resistance (R s ) will lead to a higher fill factor, thus resulting in greater efficiency, and pushing the cells output power closer towards its theoretical maximum. 
         [0004]    There are many different materials used to fabricate photovoltaic cells such as CIGS (copper indium gallium selenide), CZTS (copper zinc tin sulfide), or organic polymers. Elemental selenium is the first semiconductor material to be used in a photovoltaic device by Charles Fritts in 1873. However, the initial efficiency was below 1%. Over the years, the best Se cell reported to date has only reached an efficiency up to 5.1% with the structure of: Glass/TiO 2 /Se/Au. 
       SUMMARY OF THE INVENTION 
       [0005]    One aspect of the present invention provides a photovoltaic device. The photovoltaic device includes: a transparent substrate; a transparent conductive electrode layer disposed on the transparent substrate; an n-type layer disposed on the transparent conductive electrode layer; a chalcogen absorber layer disposed on the n-type layer; a p-type molybdenum trioxide (MoO3) interlayer disposed on the chalcogen absorber layer; and a conductive layer disposed on the interlayer. 
         [0006]    The present invention further provides a method for fabricating a photovoltaic device. The method includes the steps of: forming a transparent conductive electrode on a transparent substrate; forming an n-type layer on the transparent conductive electrode layer; forming a chalcogen absorber layer on the n-type layer; forming a p-type molybdenum trioxide (MoO3) interlayer on the chalcogen absorber layer; forming a conductive layer on the p-type interlayer; and annealing at a temperature, pressure, and length of time sufficient to form the structure of the photovoltaic device. 
         [0007]    Another aspect of the present invention provides another photovoltaic device. This photovoltaic device includes: a transparent superstrate; a conductive layer disposed on the transparent superstrate; a p-type molybdenum trioxide (MoO3) interlayer disposed on the conductive layer; a chalcogen absorber layer disposed on the p-type molybdenum trioxide (MoO3) interlayer; an n-type layer disposed on the chalcogen absorber layer; and a transparent conductive electrode layer disposed on the n-type layer. 
         [0008]    The present invention also provides another method for fabricating a photovoltaic device. This method includes the steps of: forming a conductive layer on a transparent superstrate; forming a p-type molybdenum trioxide (MoO3) interlayer on the conductive layer; forming a chalcogen absorber layer on the p-type molybdenum trioxide (MoO3) interlayer; forming an n-type layer on the chalcogen absorber layer; forming a transparent conductive electrode layer on the n-type layer; and annealing at a temperature, pressure, and length of time sufficient to form the structure of the photovoltaic device. 
         [0009]    A more complete understanding of the present invention, as well as further features and advantages of the present invention, will be shown through the following detailed description and drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS 
         [0010]      FIG. 1  is a cross-sectional diagram illustrating a transparent conductive electrode layer formed on a substrate according to an embodiment of the present invention. 
           [0011]      FIG. 2  is a cross-sectional diagram illustrating an n-type layer formed on the transparent conductive electrode layer according to an embodiment of the present invention. 
           [0012]      FIG. 3  is a cross-sectional diagram illustrating a chalcogen absorber layer formed on the n-type layer according to an embodiment of the present invention. 
           [0013]      FIG. 4  is a cross-sectional diagram illustrating a p-type molybdenum trioxide (MoO3) interlayer formed on the chalcogen absorber layer according to an embodiment of the present invention. 
           [0014]      FIG. 5  is a cross-sectional diagram illustrating a conductive metal layer formed on the p-type interlayer according to an embodiment of the present invention. 
           [0015]      FIG. 6  is a cross-sectional diagram illustrating a photovoltaic device in a superstrate configuration according to an embodiment of the present invention. 
           [0016]      FIG. 7  is a scanning electron micrograph (SEM) image of a photovoltaic device according to an embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
       [0017]    Some preferred embodiments will be described in more detail with reference to the accompanying drawings, in which the preferred embodiments of the present invention have been illustrated. However, the present invention can be implemented in various manners, and thus should not be construed to be limited to the embodiments disclosed herein. On the contrary, those embodiments are provided for the thorough and complete understanding of the present invention, and to completely convey the scope of the present invention to those skilled in the art. 
         [0018]    Referring to  FIGS. 1-5 , an exemplary methodology for fabricating an improved photovoltaic device with a high work function interlayer is shown. To begin the process, as shown in  FIG. 1 , a substrate  102  is provided. Suitable substrate materials include, but are not limited to, glass, plastic, ceramic and metal foil (e.g., aluminum, copper, etc.) substrates. 
         [0019]    As will be described in detail below, it has been found that employing a reflective back contact on the substrate  102  aids in increasing the efficiency of the device. A reflective back contact can be created by forming the back contact, in the manner described below, on a planar substrate (glass or metal foil substrate) or on a polished substrate. Thus, it may be desirable at this stage to polish the substrate, especially in the case of a plastic or ceramic substrate. Polishing of the substrate  102  may be carried out using any mechanical or chemical mechanical process known in the art. 
         [0020]    A transparent conductive electrode layer  104  is then formed on the substrate. During operation, the transparent conductive electrode layer  104  is used as an electrode for low resistance electrical contacts without blocking light. According to an exemplary embodiment of the present invention, the transparent conductive electrode  104  is formed from a transparent conductive material, such as fluorine doped tin oxide (FTO), indium doped tin oxide (ITO), aluminum doped zinc dioxide (ZnO2:Al), or fluorine doped tin dioxide (SnO 2 :F). The techniques for forming a transparent conductive electrode from these materials would be apparent to one of skill in the art and thus are not described further herein. 
         [0021]    In  FIG. 2 , according to an exemplary embodiment of the present invention, an n-type layer  106  is formed on the transparent conductive electrode layer  104 . The n-type layer  106  can be a material such as titanium dioxide or zinc dioxide. The n-type layer  106  can be formed by depositing the respective n-type layer material on the transparent conductive electrode layer using vacuum evaporation, chemical bath deposition, electrochemical deposition, atomic layer deposition, successive ionic layer absorption and reaction (SILAR), chemical vapor deposition, sputtering, spin coating, doctor blading, physical vapor deposition or any other suitable technique that would be apparent to one of skill in the art. The n-type layer  106  can have a thickness ranging from about 2 nm to about 200 nm with a preferred thickness of about 30 nm to about 60 nm. During operation, the n-type layer  106  serves as the electron selective layer to collect electrons. 
         [0022]    In  FIG. 3 , according to an exemplary embodiment of the present invention, a chalcogen absorber layer  108  is formed on the n-type layer  106 . The chalcogen absorber layer can be any chalcogen such as sulfur, selenium, tellurium or any combination thereof. In various embodiments of the present invention, highly pure selenium (99.999%) is the preferred chalcogen used. The chalcogen absorber layer  108  can be deposited through vacuum evaporation, chemical bath deposition, electrochemical deposition, atomic layer deposition, successive ionic layer absorption and reaction (SILAR), chemical vapor deposition, sputtering, spin coating, doctor blading, physical vapor deposition or any other suitable technique that would be apparent to one of skill in the art. The chalcogen absorber layer  108  has a thickness from about 25 nm to about 200 nm with a preferred thickness of about 80 nm to about 120 nm. 
         [0023]    Optionally, a tellurium adhesion layer (not shown) may be deposited on the n-type layer  106  before deposition of the chalcogen absorber layer  108 . The thickness of the tellurium adhesion layer is very small, for example, about 1 nm and improves the adhesion between the n-type layer  106  and the chalcogen absorber layer  108 . 
         [0024]    In  FIG. 4 , according to an exemplary embodiment of the present invention, a p-type molybdenum trioxide (MoO 3 ) interlayer  110  is formed on the chalcogen absorber layer  108 . The p-type molybdenum trioxide (MoO 3 ) interlayer  110  can be deposited through vacuum evaporation, chemical bath deposition, electrochemical deposition, atomic layer deposition, successive ionic layer absorption and reaction (SILAR), chemical vapor deposition, sputtering, spin coating, doctor blading, physical vapor deposition or any other suitable technique that would be apparent to one of skill in the art. The thickness of the p-type molybdenum trioxide (MoO 3 ) layer  110  is from about 2 nm to about 200 nm with a preferred thickness of about 20 nm to about 60 nm and an optimal thickness of about 20 nm. 
         [0025]    In  FIG. 5 , according to an exemplary embodiment of the present invention, a conductive layer  112  is deposited on the p-type interlayer  110 . The conductive layer  112  can be: (1) carbon materials such as graphite, graphene, nanotubes; (2) metals and their alloys such as gold, silver, copper, platinum, palladium; Zn, Ni, Co, Mo, Fe V, Cr, Sn, W, Mo, Ti, Mg; and (3) conductive oxides such as fluoride doped tin oxide (FTO), indium doped tin oxide (ITO) and aluminum doped zinc oxide (ZnO:Al). The conductive layer  112  can be deposited through vacuum evaporation, chemical bath deposition, electrochemical deposition, atomic layer deposition, successive ionic layer absorption and reaction (SILAR), chemical vapor deposition, sputtering, spin coating, doctor blading, physical vapor deposition or any other suitable technique that would be apparent to one of skill in the art. The thickness of the conductive layer  112  is preferably from about 2 nm to about 200 nm. The device is annealed at a temperature, pressure, and length of time sufficient to form the structure of the photovoltaic device. 
         [0026]    With regard to the p-type molybdenum trioxide (MoO 3 ) interlayer, the work function of a metal is the minimum energy needed to remove an electron from a solid to a point in the vacuum immediately outside the solid surface. Here, the p-type molybdenum trioxide (MoO 3 ) interlayer has a work function of ˜5.3 eV. In photovoltaic cells, increasing the work function of the conductive layer correlates positively to an increase in open circuit voltage (V oc ) and short circuit current (J sc ). The conductive layer and the p-type molybdenum trioxide (MoO 3 ) interlayer effectively accomplishes this as shown in Table 1. 
         [0027]    The photovoltaic device according to the present invention produces higher efficiency (Eff), fill factor (FF), open circuit voltage (V oc ), and short circuit current (J sc ) as compared to traditional photovoltaic devices that use highly pure chalcogen absorber layer. As shown below, in Table 1, the present invention has higher efficiency (Eff), fill factor (FF), open circuit voltage (V oc ), and short circuit current (J sc ) using different transparent conductive oxides (FTO, ITO) and n-type layers (TiO 2 , ZnO) as compared to traditional photovoltaic devices that use highly pure chalcogen absorber layers. The data of the aged device was taken at least one month after the initial measurement and shows a further increase in efficiency (Eff), open circuit voltage (V oc ), and short circuit current (J sc ). 
         [0000]    
       
         
               
               
               
               
               
             
           
               
                 TABLE 1 
               
               
                   
               
               
                   
                     Efficiency (%) 
                     Fill Factor (%) 
                     V OC  (mV) 
                 J SC    
       (     mA     cm   2       )       
 
               
               
                   
               
             
             
               
                 FTO/TiO2/Se/Au 
                 4.65 
                 50.5 
                 728 
                 12.6 
               
               
                 FTO/TiO2/Se/MoO 3 /Au 
                 6.85 
                 60.6 
                 866 
                 13.1 
               
               
                 FTO/TiO2/Se/MoO 3 /Au, aged 
                 7.27 
                 60.2 
                 875 
                 13.8 
               
               
                 FTO/ZnO/Se/Au 
                 4.81 
                 50.5 
                 748 
                 12.7 
               
               
                 FTO/ZnO/Se/MoO 3 /Au 
                 5.90 
                 59.1 
                 755 
                 13.2 
               
               
                 ITO/ZnO/Se/Au 
                 4.35 
                 49.6 
                 672 
                 13.1 
               
               
                 ITO/ZnO/Se/MoO 3 /Au 
                 6.08 
                 59.0 
                 758 
                 13.6 
               
               
                   
               
             
          
         
       
     
         [0028]    In  FIG. 6 , another embodiment of the present invention is shown where a superstrate is used instead of a substrate. The method for fabricating the superstrate configuration of the present invention includes: forming a conductive layer  112  on a transparent superstrate  102 ; forming a p-type molybdenum trioxide (MoO3) interlayer  110  on the conductive layer  112 ; forming a chalcogen absorber layer  108  on the p-type molybdenum trioxide (MoO3) interlayer  110 ; forming an n-type layer  106  on the chalcogen absorber layer  108 ; forming a transparent conductive electrode layer  104  on the n-type layer  106 ; and annealing at a temperature, pressure, and length of time sufficient to form the structure of the photovoltaic device. Furthermore, the optional tellurium adhesion layer (not shown) can be deposited on the p-type molybdenum trioxide (MoO 3 ) layer  110  before deposition of the chalcogen absorber layer  108 . The materials and thickness of the layers for the superstrate configuration of the present invention are the same as the substrate configuration. 
         [0029]      FIG. 7  shows a scanning electron micrograph of the device structure of the present invention. The embodiment shown in  FIG. 7  is the substrate configuration of the present invention where the substrate used is glass material. In this embodiment, the transparent conductive layer is fluorine doped tin oxide, the n-type layer is titanium dioxide, the chalcogen absorber layer is selenium, and gold is used as the conductive layer. The optional tellurium adhesion layer was not used in forming the device shown in  FIG. 7 . 
         [0030]    Although illustrative embodiments of the present invention have been described herein, it is to be understood that the invention is not limited to those precise embodiments, and that various other changes and modifications may be made by one skilled in the art without departing from the scope of the invention.