Abstract:
Apparatus and method for performing entirely digital timing recovery for high bandwidth radio frequency communications. The received digital data source can be sampled from any (minimum 2×) non-integer oversampled transmitted data. This method re-samples the data through interpolation and phase adjustment. The output phase error adjusts the receiver&#39;s Analog-to-digital Convertor sampling clock to improve synchronization with the transmitter&#39;s Digital-to-analog Convertor clock phase, thus improving transmitted symbol recovery.

Description:
STATEMENT OF GOVERNMENT INTEREST 
       [0001]    The invention described herein may be manufactured and used by or for the Government for governmental purposes without the payment of any royalty thereon. 
     
    
     BACKGROUND OF THE INVENTION 
       [0002]    This invention relates generally to timing recovery of higher order modulated radio frequency communications, and, more specifically, to such radio frequency communications systems wherein the digital-to-analog and analog-to-digital conversion oversampling frequencies required to properly synchronize phase becomes excessively expensive due to the bandwidth requirements associated with a radio frequency waveform or lack of frequency tunability. This invention also relates to the field of digital interpolation of non-coherent sampled signals. 
         [0003]    The Digital-to-analog convertor (DAC) samples at a specific, typically rising, edge of a clock that is as close in phase to the modulation clock as possible. To assist in determining the phase of the clock without a known sequence (non-data aided) transmitted, communications systems typically oversample the signal and perform analog recovery loops or digital timing recovery schemes. The majority of digital timing recovery schemes require a minimum oversampling of twice (though some require 4×) the symbol rate. Furthermore, these techniques further restrict oversampling to an integer multiple. Many system requirements (desired throughput, bit error rate, bandwidth) drive derived requirements that may preclude component selection (analog filters due to pass bands, digital boards with inadequate clock frequencies, etc.). Ultimately, the choice of available hardware may prevent the transmitter-receiver pair from operating with an integer multiple sampling factor. Decimal oversampling at the transmitter would render many digital timing recovery techniques useless. In addition, many timing recovery schemes are not suited for higher order modulations, i.e. 16-Quadrature Amplitude Modulation (16-QAM), as they rely on zero crossings for phase error calculations and sampling adjustments. 
         [0004]    An optimal solution to the timing recovery of received signals is a reconfigurable, all digital scheme capable of analyzing and adjusting incoming symbols oversampled at any decimal value at or above 2×. Feedback can be given to the Analog-to-Digital convertor&#39;s clock via a numerical controlled oscillator, but results shown for 16-QAM recovery compensate on a free-running clock without feedback. The prior art has been able to isolate each of these parameters independently, but has failed to optimize for all parameters at once without expansive processing. Specifically, the prior art still either uses analog recovery loops prone to component tolerances or complex (memory and processing intensive) interpolation and decimation schemes. 
         [0005]    In “A BPSK/QPSK Timing-Error Detector for Sampled Receivers,” a digital timing recovery scheme is proposed that has served as the basis for many digital synchronization techniques. This requires integer multiple oversampling of a Binary Phase Shift Keying or Quadrature Phase Shift Keying modulation; both of which do not apply to the problem this invention intends to solve. 
         [0006]    In U.S. Pat. No. 5,495,203, a QAM demodulator with non-integer sampling is used to interpolate, and then decimate an incoming signal. The resampled signal is fed into a control loop to recover the data rate and continuously tunes interpolation and decimation until locked to the intended data. A limitation to this approach, potentially, is the complexity of the interpolation and decimation values to approximate oversampling rates needed. 
         [0007]    In U.S. Pat. No. 5,878,088, a variable symbol timing recovery scheme is proposed with two stage interpolation and decimation controlled by multiplexors and based on the phase error within the control loop. This allows the system to increase or decrease the level of granularity needed to estimate the QAM symbol data and adjust a numerically controlled oscillator as needed. However, this invention may be affected by excessive delay and control overhead to synchronize the varying interpolation and decimation stages. 
         [0008]    In U.S. Pat. No. 6,295,325, an arbitrary oversampling timing recovery loop is proposed. The invention is capable of taking any symbol data rate and oversample by an integer multiple. The flexibility of the oversampling is convenient, but a situation where the oversampling frequency is not an integer multiple of the symbol data rate is an issue. 
         [0009]    In U.S. Pat. No. 6,854,002, an analog high speed interpolation apparatus is proposed, allowing for low latency corrections of the oversampling of a received signal within a timing recovery loop. While a promising invention, the necessity for complex and expensive analog components is a limiting factor. 
         [0010]    In U.S. Pat. No. 7,149,265, a timing recovery loop is proposed with reconfigurable non-integer oversampling. A configurable number of parallel elements examine whether a delay is occurring from the previous sample (within the same element) and if a shift is found within that sampling cycle (element-to-element) and adjust a counter to numerically control incoming samples. This invention requires the sample rate to be a rational number p/q where the number of parallel elements, N, is an integer factor of q. This restricts the selection of p and q, thus the selection of the sampling frequency, which may be limited to the system hardware. 
       OBJECTS AND SUMMARY OF THE INVENTION 
       [0011]    It is therefore an object of the present invention to provide an apparatus and method that overcomes the prior art&#39;s dependency on highly specialized and high complexity ADC and DAC component pairs and processes therein to perform up-sampling at integer multiples of the system&#39;s symbol rate to enable digital timing recovery. 
         [0012]    It is a further object of the present invention to eliminate DAC sampling frequency configuration to properly oversample a system&#39;s symbol rate. 
         [0013]    It is still a further object of the present invention to provide an apparatus and method wherein an entirely digital timing recovery scheme adjusts DAC sampling, eliminating phase error noise introduced by analog components. 
         [0014]    It is yet still a further object of the present invention to provide an apparatus and method that is capable of decimal oversampling factors without extensive interpolation and decimation components or logic. 
         [0015]    An additional object of the present invention is to provide a means to recover symbols transmitted through higher order modulations (i.e., 16-QAM). 
         [0016]    Briefly stated, the present invention achieves these and other objects through the digital calculation of phase error from sampled data and manipulation of clock phase driving the ADC. Initially, the phase, which drives the moment when the ADC samples the incoming analog signal, will be unsynchronized with the transmitter DAC phase. As the digital timing recovery executes, the phase error (difference between the desired phase and the current sampling phase at the receiver) is calculated based on previous samples. A positive trend in symbol magnitude indicates sampling is occurring too late; therefore, the phase of the sampling clock should be shifted to the left. Conversely, a negative trend indicates sampling is occurring too early and the sampling clock phase should be shifted to the right. This process is continually updating phase as necessary to track phase drift caused by system components or environment impairments. 
         [0017]    To achieve timing recovery within a higher order modulation system (i.e.: 16-QAM) with non-integer oversampling, an efficient calculation of the phase error must occur from a digital data source. For proper execution of this process, a precise sampling rate must be known of both the transmitter and receiver. There are no requirements on the two values, but it is recognized the exact decimal ratio may not be realizable within hardware (i.e.: a Field Programmable Gate Array). This is in contrast to the prior art, which either requires integer values and limits the system to integer oversampling or utilizes large interpolation and decimation values at the receiver to operate on a subset of non-integer oversampling scenarios. Furthermore, the majority of prior art operates within binary modulated systems. Nothing in the prior art proposes the flexibility of the present invention. 
         [0018]    Therefore, it is accurate to say that the present invention (1) can ensure recovery of a received oversampled waveform as prior art requires to achieve the same; (2) can ensure recovery of a received higher order modulated waveform as prior art requires to achieve the same; and (3) can ensure recovery of a received non-integer oversampled, higher order modulated waveform directly from ADC digital samples while reducing requirements on DAC and ADC sampling frequencies. As such, the present invention represents a significant departure from prior art methods. 
         [0019]    According to an embodiment of the invention, apparatus for performing digital timing recovery comprises: software or an FPGA or similar parallel signal processing chip, a DAC capable of sufficiently sampling the digital data stream and an ADC capable of sufficiently sampling the received waveform. 
         [0020]    The above and other objects, features and advantages of the present invention will become apparent from the following description read in conjunction with the accompanying drawings, in which like reference numerals designate the same elements. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0021]      FIG. 1  is a block diagram representation of the major portions of the invention. 
           [0022]      FIG. 2  is a block diagram representation of the timing recovery scheme whereby in-phase and quadrature-phase samples are used for error detection. 
           [0023]      FIG. 3  is block diagram representation of the timing recovery scheme whereby in-phase samples are used for error detection. 
           [0024]      FIG. 4  is block diagram representation of the timing recovery scheme whereby quadrature-phase samples are used for error detection. 
           [0025]      FIG. 5  is a representation of (a) the phase error tracking of the system, (b) comparing the instantaneous Error Vector Magnitude (EVM) of corrected samples for the proposed solution and prior art (Gardner) for an integer oversampled case and (c) comparing the instantaneous Error Vector Magnitude (EVM) of corrected samples for the proposed solution and prior art (Gardner) for a non-integer oversampled case. 
           [0026]      FIG. 6  is a comparison of output EVM for perfect synchronization, utilizing in-phase and quadrature-phase samples for proposed phase error calculation ( FIG. 2 ), utilizing in-phase samples only for proposed phase error calculation ( FIG. 3 ) and utilizing quadrature-phase samples only for proposed phase error calculation phase error calculation ( FIG. 4 ). 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0027]    Referring to  FIG. 1 , the key components of the invention include the digital data source  100 , the timing recovery system  200  and the interpolation (symbol update)  300 . The digital data source is assumed to be the analog-to-digital convertor sampling the radio frequency input from the receiver antenna at a sampling rate F samp  and has no bearing on the invention. The timing recovery system is broken down further into the buffering of incoming data  201 , the update gain (learning factor)  202 , the timing recovery logic  203  and Lowpass filter  204 . 
         [0028]    Still referring to  FIG. 1 , the digital data source  100  consists of in-phase (I) and quadrature-phase (Q) components  101  and  102 , respectively. These symbols are buffered a minimum ┌N┐ samples, where 
         [0000]    
       
         
           
             N 
             = 
             
               
                 F 
                 samp 
               
               
                 F 
                 sym 
               
             
           
         
       
     
         [0000]    and F sym  is the system symbol rate. The buffered arrays for I  210  and Q  211  are inputs to the timing recovery logic  203  as well as the update gain  202  and phase error  213 . The output of the timing recovery logic is the phase error  213 , which is filtered by a Lowpass filter  204  to remove extremes in phase variability. This value is fed into the interpolation block  300  where incoming I  101  and Q  102  values are recalculated. The updated values at  310  and at  311  are the recovered I and Q symbols, respectively. These are further processed as needed in  400  in standard digital communications processes not discussed in this invention. 
         [0029]    Referring to  FIG. 2 , which describes the timing recovery logic, the buffered I  210  and Q  211  samples are evaluated by the signum function  220  such that: 
         [0000]    
       
         
           
             
               s 
                
               
                 ( 
                 x 
                 ) 
               
             
             = 
             
               { 
               
                 
                   
                     
                       1 
                       , 
                       
                         
                             
                         
                          
                         
                             
                         
                       
                        
                       
                         
                           if 
                            
                           
                               
                           
                            
                           x 
                         
                         &gt; 
                         0 
                       
                     
                   
                 
                 
                   
                     
                       
                         - 
                         1 
                       
                       , 
                       
                         
                             
                         
                          
                         
                             
                         
                       
                        
                       
                         
                           if 
                            
                           
                               
                           
                            
                           x 
                         
                         &lt; 
                         0 
                       
                     
                   
                 
                 
                   
                     
                       0 
                       , 
                       
                         
                             
                         
                          
                         
                             
                         
                       
                        
                       
                         
                           if 
                            
                           
                               
                           
                            
                           x 
                         
                         = 
                         0 
                       
                     
                   
                 
               
             
           
         
       
     
         [0030]    This results in arrays being output at  230  and at  231 , respectively. The previously calculated phase error  213  is fed into the index calculation logic  221  to determine the sampling indices for the start (t s ), center (t c ) and end (t e ) of the incoming symbol within the arrays at  230  and at  231 . The indices are calculated as follows: 
         [0000]    
       
         
           
             
               t 
               c 
             
             = 
             
               1 
               + 
               
                 k 
                 · 
                 N 
               
               + 
               
                 N 
                 2 
               
               + 
               
                 φ 
                 0 
               
             
           
         
       
       
         
           
             
               t 
               s 
             
             = 
             
               
                 t 
                 c 
               
               - 
               
                 N 
                 2 
               
             
           
         
       
       
         
           
             
               t 
               e 
             
             = 
             
               
                 t 
                 c 
               
               + 
               
                 N 
                 2 
               
             
           
         
       
     
         [0031]    where k is a counter of which symbol is being sampled within the buffer and φ 0  is the previous symbol phase error present at  213 . The three real-valued numbers calculated within index calculation logic  221  form array at  232  which are fed into sampling blocks  222 . Here, the arrays at  230  and at  231  are interpolated and sampled (approximately) at sampled indices—to the best ability of the host hardware—to form I  233  and Q  234  samples respectively. Each of the I and Q samples are combined in  223  to form a three element complex array output at  235  consisting of start (x s ), center (x c ) and end (x e ) symbols defined as: 
         [0000]        x   s   =x   I ( t   s )+ jx   Q ( t   s ) 
         [0000]        x   c   =x   I ( t   c )+ jX   Q ( t   c ) 
         [0000]        x   e   =x   I ( t   e )+ jx   Q ( t   e ). 
         [0032]    Still referring to  FIG. 2 , the three element complex array output at  235  of the I-Q combiner  223  is fed into the phase error calculator  224  to determine the amount and direction (early or late) of phase offset within this sampling iteration. The current phase offset output at  236  is calculated by: 
         [0000]      Δ φ   =             {x   e   −x   s }*    x   c   
 
         [0033]    where          {•} is the real portion of a complex number and  •  is the complex conjugate. Finally, the previous phase offset at  213 , current phase offset at  236  and update gain at  212  are fed into the phase adjustment block  225 . If the difference between previous phase offset at  213  and current phase offset at  236  is above a system defined threshold T, the phase adjustment at  213  is adjusted accordingly to yield an output at  237 , i.e.: 
         [0000]    
       
         
           
             
               adjusted 
                
               
                   
               
                
               phase 
                
               
                   
               
                
               offset 
                
               
                   
               
                
               237 
             
             = 
             
               { 
               
                 
                   
                     
                       
                         
                           
                             
                               
                                 previous 
                                  
                                 
                                     
                                 
                                  
                                 phase 
                                  
                                 
                                     
                                 
                                  
                                 offset 
                                  
                                 
                                     
                                 
                                  
                                 213 
                               
                               + 
                               
                                 update 
                                  
                                 
                                     
                                 
                                  
                                 gain 
                                  
                                 
                                     
                                 
                                  
                                 212 
                               
                             
                             , 
                           
                         
                       
                       
                         
                           
                             
                               if 
                                
                               
                                   
                               
                                
                               current 
                                
                               
                                   
                               
                                
                               phase 
                                
                               
                                   
                               
                                
                               offset 
                                
                               
                                   
                               
                                
                               236 
                             
                             &lt; 
                             
                               - 
                               T 
                             
                           
                         
                       
                     
                   
                 
                 
                   
                     
                       
                         
                           
                             
                               
                                 previous 
                                  
                                 
                                     
                                 
                                  
                                 phase 
                                  
                                 
                                     
                                 
                                  
                                 offset 
                                  
                                 
                                     
                                 
                                  
                                 213 
                               
                               - 
                               
                                 update 
                                  
                                 
                                     
                                 
                                  
                                 gain 
                                  
                                 
                                     
                                 
                                  
                                 212 
                               
                             
                             , 
                           
                         
                       
                       
                         
                           
                             
                               if 
                                
                               
                                   
                               
                                
                               current 
                                
                               
                                   
                               
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                               phase 
                                
                               
                                   
                               
                                
                               offset 
                                
                               
                                   
                               
                                
                               236 
                             
                             &gt; 
                             T 
                           
                         
                       
                     
                   
                 
                 
                   
                     
                       
                         
                           
                             
                               previous 
                                
                               
                                   
                               
                                
                               phase 
                                
                               
                                   
                               
                                
                               offset 
                                
                               
                                   
                               
                                
                               213 
                             
                             , 
                           
                         
                       
                       
                         
                           
                             
                               if 
                                
                               
                                   
                               
                                
                               
                                  
                                 
                                   current 
                                    
                                   
                                       
                                   
                                    
                                   phase 
                                    
                                   
                                       
                                   
                                    
                                   offset 
                                    
                                   
                                       
                                   
                                    
                                   236 
                                 
                                  
                               
                             
                             &lt; 
                             T 
                           
                         
                       
                     
                   
                 
               
             
           
         
       
     
         [0034]    The output of this calculation becomes the new previous phase offset  213  value identified in  FIG. 1 ,  FIG. 2 ,  FIG. 3  and  FIG. 4  for the next incoming symbol. 
         [0035]    If hardware resources cannot be given to complete the calculations within  FIG. 2 , a simplified process that requires calculations within I samples or Q samples can be implemented, demonstrated within  FIG. 3  and  FIG. 4 , respectively. There is a potential penalty in tracking latency, which results in higher Error Vector Magnitude (EVM) values when utilizing only I or Q samples. An example test shown in  FIG. 6  demonstrates no negative effects on EVM for N=2 oversampled system. 
         [0036]    Referring to  FIG. 3 , which describes the timing recovery logic, the buffered I  210  samples are evaluated by the signum function  220  such that: 
         [0000]    
       
         
           
             
               s 
                
               
                 ( 
                 x 
                 ) 
               
             
             = 
             
               { 
               
                 
                   
                     
                       1 
                       , 
                       
                         
                             
                         
                          
                         
                             
                         
                       
                        
                       
                         
                           if 
                            
                           
                               
                           
                            
                           x 
                         
                         &gt; 
                         0 
                       
                     
                   
                 
                 
                   
                     
                       
                         - 
                         1 
                       
                       , 
                       
                         
                             
                         
                          
                         
                             
                         
                       
                        
                       
                         
                           if 
                            
                           
                               
                           
                            
                           x 
                         
                         &lt; 
                         0 
                       
                     
                   
                 
                 
                   
                     
                       0 
                       , 
                       
                         
                             
                         
                          
                         
                             
                         
                       
                        
                       
                         
                           if 
                            
                           
                               
                           
                            
                           x 
                         
                         = 
                         0 
                       
                     
                   
                 
               
             
           
         
       
     
         [0037]    This results in an array at  230 . The previously calculated phase offset at 213 is fed into the index calculation logic  221  to determine the sampling indices for the start (t s ), center (t c ) and end (t e ) of the incoming symbol within the array at  230 . The indices are calculated as follows: 
         [0000]    
       
         
           
             
               t 
               c 
             
             = 
             
               1 
               + 
               
                 k 
                 · 
                 N 
               
               + 
               
                 N 
                 2 
               
               + 
               
                 φ 
                 0 
               
             
           
         
       
       
         
           
             
               t 
               s 
             
             = 
             
               
                 t 
                 c 
               
               - 
               
                 N 
                 2 
               
             
           
         
       
       
         
           
             
               t 
               e 
             
             = 
             
               
                 t 
                 c 
               
               + 
               
                 N 
                 2 
               
             
           
         
       
     
         [0000]    where k is a counter of which symbol is being sampled within the buffer and φ 0  is the previous symbol phase offset at  213 . The three real-valued numbers calculated within  221  form the array at  231  which are fed into sampling block  222 . Here, the array at  230  is interpolated and sampled (approximately) at sampled indices—to the best ability of the host hardware—to form a three element real-valued array of I samples at  232  consisting of start (x s ), center (x c ) and end (x e ) symbols defined as: 
         [0000]        x   s   =x   I ( t   s ) 
         [0000]        x   c   =x   I ( t   c ) 
         [0000]        x   e   =x   I ( t   e ). 
         [0038]    Still referring to  FIG. 3 , the output of the sampler  232  is fed into the phase error calculator  223  to determine the amount and direction (early or late) of phase offset within this sampling iteration. The phase error at  233  is calculated by: 
         [0000]    
       
         
           
             
               Δ 
               φ 
             
             = 
             
               
                 ( 
                 
                   
                     x 
                     e 
                   
                   - 
                   
                     x 
                     s 
                   
                 
                 ) 
               
               · 
               
                 ( 
                 
                   
                     x 
                     c 
                   
                   - 
                   
                     Δ 
                     x 
                   
                 
                 ) 
               
             
           
         
       
       
         
           
             
               Δ 
               x 
             
             = 
             
               
                 
                   x 
                   e 
                 
                 - 
                 
                   x 
                   s 
                 
               
               2 
             
           
         
       
     
         [0000]    Finally, the previous phase offset at  213 , current phase offset at  233  and update gain at  212  are fed into the phase adjustment block  224 . If the difference between the previous phase offset at  213  and the current phase offset at  233  is above a system defined threshold T, the phase offset at  213  is adjusted accordingly to yield a new phase offset at  234 , i.e.: 
         [0000]    
       
         
           
             
               adjusted 
                
               
                   
               
                
               phase 
                
               
                   
               
                
               offset 
                
               
                   
               
                
               234 
             
             = 
             
               { 
               
                 
                   
                     
                       
                         
                           
                             
                               previous 
                                
                               
                                   
                               
                                
                               phase 
                                
                               
                                   
                               
                                
                               offset 
                                
                               
                                   
                               
                                
                               213 
                             
                             + 
                           
                         
                       
                       
                         
                           
                             
                               update 
                                
                               
                                   
                               
                                
                               gain 
                                
                               
                                   
                               
                                
                               212 
                             
                             , 
                           
                         
                       
                     
                   
                   
                     
                       
                         if 
                          
                         
                             
                         
                          
                         current 
                          
                         
                             
                         
                          
                         phase 
                          
                         
                             
                         
                          
                         offset 
                          
                         
                             
                         
                          
                         233 
                       
                       &lt; 
                       
                         - 
                         T 
                       
                     
                   
                 
                 
                   
                     
                       
                         
                           
                             
                               previous 
                                
                               
                                   
                               
                                
                               phase 
                                
                               
                                   
                               
                                
                               offset 
                                
                               
                                   
                               
                                
                               213 
                             
                             - 
                           
                         
                       
                       
                         
                           
                             
                               update 
                                
                               
                                   
                               
                                
                               gain 
                                
                               
                                   
                               
                                
                               212 
                             
                             , 
                           
                         
                       
                     
                   
                   
                     
                       
                         if 
                          
                         
                             
                         
                          
                         current 
                          
                         
                             
                         
                          
                         phase 
                          
                         
                             
                         
                          
                         offset 
                          
                         
                             
                         
                          
                         233 
                       
                       &gt; 
                       T 
                     
                   
                 
                 
                   
                     
                       
                         previous 
                          
                         
                             
                         
                          
                         phase 
                          
                         
                             
                         
                          
                         offset 
                          
                         
                             
                         
                          
                         213 
                       
                       , 
                     
                   
                   
                     
                       
                         if 
                          
                         
                             
                         
                          
                         
                            
                           
                             current 
                              
                             
                                 
                             
                              
                             phase 
                              
                             
                                 
                             
                              
                             offset 
                              
                             
                                 
                             
                              
                             233 
                           
                            
                         
                       
                       &lt; 
                       T 
                     
                   
                 
               
             
           
         
       
     
         [0039]    The output of this calculation becomes the new phase offset at  213  value identified in  FIG. 1 ,  FIG. 2 ,  FIG. 3  and  FIG. 4  for the next incoming symbol. 
         [0040]    Referring to  FIG. 4 , which describes the timing recovery logic, the buffered Q  211  samples are evaluated by the signum function  320  such that: 
         [0000]    
       
         
           
             
               s 
                
               
                 ( 
                 x 
                 ) 
               
             
             = 
             
               { 
               
                 
                   
                     
                       1 
                       , 
                     
                   
                   
                     
                       
                         if 
                          
                         
                             
                         
                          
                         x 
                       
                       &gt; 
                       0 
                     
                   
                 
                 
                   
                     
                       
                         - 
                         1 
                       
                       , 
                     
                   
                   
                     
                       
                         if 
                          
                         
                             
                         
                          
                         x 
                       
                       &lt; 
                       0 
                     
                   
                 
                 
                   
                     
                       0 
                       , 
                     
                   
                   
                     
                       
                         if 
                          
                         
                             
                         
                          
                         x 
                       
                       = 
                       0 
                     
                   
                 
               
             
           
         
       
     
         [0000]    This results in an array at  330 . The previously calculated phase error at  213  is fed into the index calculation logic  321  to determine the sampling indices for the start (t s ), center (t c ) and end (t e ) of the incoming symbol within an array at  330 . The indices are calculated as follows: 
         [0000]    
       
         
           
             
               t 
               c 
             
             = 
             
               1 
               + 
               
                 k 
                 · 
                 N 
               
               + 
               
                 N 
                 2 
               
               + 
               
                 φ 
                 0 
               
             
           
         
       
       
         
           
             
               t 
               s 
             
             = 
             
               
                 t 
                 c 
               
               - 
               
                 N 
                 2 
               
             
           
         
       
       
         
           
             
               t 
               e 
             
             = 
             
               
                 t 
                 c 
               
               + 
               
                 N 
                 2 
               
             
           
         
       
     
         [0000]    where k is a counter of which symbol is being sampled within the buffer and φ 0  is the previous phase offset at  213 . The three real-valued numbers calculated within index calculation  321  form an array at  331  which are fed into sampling block  322 . Here, the array at  330  is interpolated and sampled (approximately) at sampled indices—to the best ability of the host hardware—to form a three element real-valued array of Q samples at  332  consisting of start (x s ), center (x c ) and end (x e ) symbols defined as: 
         [0000]        x   s   =x   Q ( t   s ) 
         [0000]        x   c   =x   Q ( t   c ) 
         [0000]        x   e   =x   Q ( t   e ). 
         [0041]    Still referring to  FIG. 4 , the output of the sampler  332  is fed into the phase error calculator  323  to determine the amount and direction (early or late) of phase offset within this sampling iteration. The phase error at  333  is calculated by: 
         [0000]    
       
         
           
             
               Δ 
               φ 
             
             = 
             
               
                 ( 
                 
                   
                     x 
                     e 
                   
                   - 
                   
                     x 
                     s 
                   
                 
                 ) 
               
               · 
               
                 ( 
                 
                   
                     x 
                     c 
                   
                   - 
                   
                     Δ 
                     x 
                   
                 
                 ) 
               
             
           
         
       
       
         
           
             
               Δ 
               x 
             
             = 
             
               
                 
                   x 
                   e 
                 
                 - 
                 
                   x 
                   s 
                 
               
               2 
             
           
         
       
     
         [0000]    Finally, the previous phase offset at  213 , current phase offset at  333  and update gain at  212  are fed into the phase adjustment block  324 . If the difference between the previous phase offset at  213  and the current phase offset at  333  is above a system defined threshold T, the previous phase offset at  213  is adjusted accordingly to yield a new phase offset at  334 , i.e.: 
         [0000]    
       
         
           
             
               adjusted 
                
               
                   
               
                
               phase 
                
               
                   
               
                
               offset 
                
               
                   
               
                
               334 
             
             = 
             
               { 
               
                 
                   
                     
                       
                         
                           
                             
                               previous 
                                
                               
                                   
                               
                                
                               phase 
                                
                               
                                   
                               
                                
                               offset 
                                
                               
                                   
                               
                                
                               213 
                             
                             + 
                           
                         
                       
                       
                         
                           
                             
                               update 
                                
                               
                                   
                               
                                
                               gain 
                                
                               
                                   
                               
                                
                               212 
                             
                             , 
                           
                         
                       
                     
                   
                   
                     
                       
                         if 
                          
                         
                             
                         
                          
                         current 
                          
                         
                             
                         
                          
                         phase 
                          
                         
                             
                         
                          
                         offset 
                          
                         
                             
                         
                          
                         333 
                       
                       &lt; 
                       
                         - 
                         T 
                       
                     
                   
                 
                 
                   
                     
                       
                         
                           
                             
                               previous 
                                
                               
                                   
                               
                                
                               phase 
                                
                               
                                   
                               
                                
                               offset 
                                
                               
                                   
                               
                                
                               213 
                             
                             - 
                           
                         
                       
                       
                         
                           
                             
                               update 
                                
                               
                                   
                               
                                
                               gain 
                                
                               
                                   
                               
                                
                               212 
                             
                             , 
                           
                         
                       
                     
                   
                   
                     
                       
                         if 
                          
                         
                             
                         
                          
                         current 
                          
                         
                             
                         
                          
                         phase 
                          
                         
                             
                         
                          
                         offset 
                          
                         
                             
                         
                          
                         333 
                       
                       &gt; 
                       T 
                     
                   
                 
                 
                   
                     
                       
                         previous 
                          
                         
                             
                         
                          
                         phase 
                          
                         
                             
                         
                          
                         offset 
                          
                         
                             
                         
                          
                         213 
                       
                       , 
                     
                   
                   
                     
                       
                         if 
                          
                         
                             
                         
                          
                         
                            
                           
                             current 
                              
                             
                                 
                             
                              
                             phase 
                              
                             
                                 
                             
                              
                             offset 
                              
                             
                                 
                             
                              
                             333 
                           
                            
                         
                       
                       &lt; 
                       T 
                     
                   
                 
               
             
           
         
       
     
         [0042]    The output of this calculation becomes the new phase offset  213  value identified in  FIG. 1 ,  FIG. 2 ,  FIG. 3  and  FIG. 4  for the next incoming symbol. 
         [0043]    Referring to  FIG. 5 , plot a) displays an example test run of proposed solution tracking an approximate 
         [0000]    
       
         
           
             π 
             5 
           
         
       
     
         [0000]    receiver phase offset. For comparison, plot b) displays the EVM output of the proposed solution (lighter line) and a typical Gardner implementation (darker line) for the same receiver phase offset. Plot c) showcases the ability of the proposed solution to successfully track an 
         [0000]    
       
         
           
             
               5 
               1.412 
             
             ≈ 
             3.54 
           
         
       
     
         [0000]    oversampled signal without losing lock. 
         [0044]    Referring to  FIG. 6 , the four constellation plots represent the received symbol values in terms of I and Q amplitudes. The lighter dots indicated the desired symbol locations for perfect symbol recovery. The darker dots are the values with the respective recovery scheme. In a), the best (genie) sample location was selected to minimize EVM the best for the incoming data; in b) the proposed method for timing recovery utilizing I and Q samples together is given; in c) and d), the proposed method for timing recovery utilizing I samples only and Q samples only, respectively is given. In this case, no penalty is realized for utilizing the real or imaginary samples exclusively. 
         [0045]    Having described preferred embodiments of the invention with reference to the accompanying drawings, it is to be understood that the invention is not limited to those precise embodiments, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope or spirit of the invention as defined in the appended claims.