Abstract:
An enhanced P-code channel (60) for use in a GPS receiver (10) to simultaneously track L1 and L2 comprises a P-code clock generator (62) for generating two code clocks. The first code clock associates with L1 and the second associates with L2. The code clocks have the same frequency but different phases from one another. Circuitry (64) and (66) generate and store a plurality of P-code chips. A first circuit (68, 70) selects and updates P-code chips from the stored P-code chips that are in phase with the L1 code clock. A second circuit (72 and 74) selects and updates P-code chips from the P-code chips and phased with the L2 code clock.

Description:
TECHNICAL FIELD OF THE INVENTION 
     This invention relates to Global Positioning System (GPS) receivers and more particularly a method for enhancing a single receiver channel for processing a plurality of L-band signals. 
     BACKGROUND OF THE INVENTION 
     The NAVSTAR Global Positioning System (GPS) is used to determine exact geographic position (i.e. latitude, longitude, and height above the earth) as well as the exact velocity and time of stationary or moving objects. The navigation receiver calculates position, and time by determining distance to a series of satellites. The navigation receiver calculates velocity by determining doppler frequency shift of the satellite signals. 
     The NAVSTAR GPS receiver must receive signals generated from the satellite about 11,000 miles away. Each GPS satellite transmits a 6-watt signal. The satellite and receiver, therefore, employs spread spectrum techniques to differentiate the signal from the noise. This is essential since at the antenna the GPS signal is typically about 20 dB below ambient cosmic noise. &#34;Spread spectrum&#34; means that the frequency or instantaneous phase of the signal being transmitted changes as a function of time. Using spread spectrum signal processing techniques, the receiver can track the spread spectrum signal coming from the satellite by estimating a duplicate image of the signal. A precise match of the satellite&#39;s spread spectrum signal produces a potential signal processing gain of up to 53 decibels. 
     Each satellite generates two spread spectrum signals centered around separate frequencies. The L1 channel is centered about 1575.42 MHz, and has course/acquisition-(C/A-) code and precision- (P-) code modulated on it. C/A-code has a 1.023 MHz chipping rate with a band width of about 2 MHz, and P-code has a 10.23 MHz chipping rate with a bandwidth of about 20 MHz. The L2 channel is centered around 1227.6 MHz and only has P-code modulated on it. 
     For some applications it is desirable to track both L1 and L2. A position can be derived from just the C/A-code or P-code on the L1 band. However, there is ionospheric delay that unpredictably affects the perceived range to the satellite from the receiver. These errors can be corrected by tracking both L1 and L2 and by measuring the difference in the range that is perceived by the receiver on these L-bands. In this manner, the ionospheric errors can be reduced and the navigation solution can be made more accurate by a few meters. In addition, tracking both L bands simultaneously provides more anti-jamming immunity for operation in hostile environments. 
     The easiest way to track L1 and L2 is with an independent tracking loop for each channel. In all implementations to date, either a single channel is multiplexed between L1 and L2 to reduce hardware requirements or an additional complete hardware channel is provided. This either compromises performance and increases software complexity or increases hardware. In either case, this capability adds significant cost to the receiver. 
     For some operational scenarios, it may also be desirable to be able to switch between having two independent tracking loops and having one tracking loop with a phase delta between L1 and L2. Two independent loops will be used in hostile environments where there is a good possibility of losing either L1 or L2. 
     As an example of the problem, consider the situation of navigating above 80° latitude north. Above 80° latitude, the Northern Lights and sun spot activity in the north pole make the ionosphere so active that there is the need for frequent L1 and L2 calculations to maintain GPS system accuracy. Using present systems, performing these frequent L1 and L2 calculations makes it is necessary to add additional hardware channels to the receiver. This increases space and cost for each receiver, and increases processor throughput and software complexity. Computer resources to support the increased number of hardware channels forces the user to make some performance compromises. If a system existed that can track L1 and L2 without the penalty of additional hardware, increased computer throughput and increased software complexity it would have value for the GPS user community. 
     In known systems, it has been necessary to use two channels to track both L1 and L2. The same P-code information is transmitted on the L1 and L2 bands. However, the receiver sees a phase shift between the two signals because of ionospheric delay. The amount of delay is a function of the level of the ionospheric influence. Therefore, if it were possible to use the fact that this information is related, then it may not be necessary to use two wholly independent channels for tracking L1 and L2. 
     Accordingly, a need exists in the art for a system and method of tracking both L1 and L2 in a GPS receiver without resorting to two distinct hardware channel receivers or time sharing a single channel. 
     A further need exists in the art for such a receiver designed in a way so as to minimize power consumption and size. 
     A further need exists in the art for method and system of providing a GPS receiver which allows for both single and double looped processing of L1 and L2 interchangeably. This allows for selecting between the high jamming immunity of tracking L1 and L2 independently or the processor throughput savings of tracking L1 and L2 together. 
     SUMMARY OF THE INVENTION 
     Accordingly, the present invention provides inventive subject matter which overcomes the problems associated with ionospheric delay in Global Positioning System (GPS) receivers. In particular, the present invention provides a single enhanced precision code (P-code) channel for use in a GPS receiver that can simultaneously track L1 and L2 from a single satellite. 
     The enhanced P-code channel includes a single P-code clock generator for generating two code clock signals (L1 and L2) with the same frequency but a different phase. A P-code generator uses one of the P-code clocks to generate a continuous P-code data stream. Circuitry then stores a plurality of the most recently generated P-code chips. A counter and multiplexer circuit is then used to maintain a constant P-code stream (which may be delayed from the output of the P-code generator) by using one of the P-code clocks. In addition, carrier generation and mixing circuitry, code delay shift registers and mixing circuitry, and multiple pre-detection accumulators exist to allow for the simultaneous tracking of L1 and L2 signals. 
     A technical advantage of the present system is that, by enhancing a single P-code channel, it is possible to obtain the benefit of independent L1 and L2 tracking loops within a GPS system without the penalty of having two independent hardware channels for this purpose. 
     Another technical advantage of the present invention is that it is possible to gain the benefit of tracking L2 in addition to L1 to reduce error introduced by ionospheric delay, without the additional processor throughput requirements of tracking L2 independently. 
     Yet another technical advantage of the present invention is that it permits making continual L1 and L2  calculations without the need for additional computing and support equipment. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     A more complete understanding of the present invention may be acquired by referring to the detailed description and claims when considered in connection with the accompanying drawings in which like reference numerals indicate like features wherein: 
     FIG. 1 is a block diagram of a GPS receiver that may use the enhanced L1/L2 channel of the present invention; 
     FIG. 2 is a block digram of a typical C/A- and P-code channel for use in a GPS receiver for receiving L1 and L2. 
     FIG. 3 is a block diagram of a preferred embodiment of the enhanced P-code channel for tracking L1 and L2 for GPS applications; 
     FIG. 4 is a block diagram representing the P-code clock generator according to a preferred embodiment of the present invention; 
     FIG. 5 provides a comparison chart between a typical and enhanced P-code channel for tracking L1 and L2 of the present invention. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     The preferred embodiment of the present invention is best understood by referring to the FIGUREs wherein like numbers are used for like corresponding parts of the various components. 
     To understand the present invention, it is best to understand the environment of the preferred embodiment. For this purpose, FIG. 1 provides a simple block diagram of a Global Positioning System (GPS) navigation receiver. The system of FIG. 1 is described in more detail in U.S. patent application Ser. No. 07/662,585, filed Feb. 28, 1991 to John P. Volpi et al and assigned to Texas Instruments Incorporated entitled &#34;System and Method for Digital Navigation Satellite Receiver&#34;, now abandoned and U.S. patent application Ser. No. 07/663,968, filed Feb. 28, 1991 to L. J. Lapadukal Leonard LaPadula III, et al, also assigned to Texas Instruments Incorporated, entitled &#34;Method and System for Multi-Channel and Search Global Position System Signal Processor&#34; both filed on Feb. 28, 1991, and are hereby expressly incorporated by reference in their entirety. 
     FIG. 1 is a simple block diagram of the whole receiver. A single RF path amplifies and down-converts the L1 or L2 signal to an intermediate frequency (IF). The receiver performs analog-to-digital conversion before any GPS signal processing takes place. After the signal is digitized, the signal is processed in three signal processing chips (SPC). The SPCs perform all the GPS hardware signal processing. 
     Referring more particularly to FIG. 1, there is shown receiver 10 which utilizes antenna 12 feeding into preamp assembly 14. Antenna preamp assembly 14 feeds into L1/L2 frequency selector 16 which sends signals to L-band down conversion 18. These components all operate under the control of reference oscillator 20 and frequency synthesizer 22. Reference oscillator 20 and frequency synthesizer 22 provide oscillation for L-band down conversion 18. Output from L-band down conversion 18 is a second IF that goes into an analog-to-digital converter (A/D) with automatic gain control (AGC) circuit 24. The output of this A/D circuit is then channelized to code and carrier wipe off in circuits 26, 28 and 30. This is where the remote signal transmitted by the GPS satellite is compared and matched with the receiver&#39;s estimate of the remote signal. 
     The outputs of signal processing circuits, 26, 28 and 30 are shown as signals 32 into processor computer 34. Processor computer 34 provides signals 36 to signal processing circuit 26, 28 and 30 to direct the circuits to change their code and carrier estimates, as well as for general control of the circuits. 
     Each signal processing circuit 26, 28 and 30, uniquely and completely generates carrier estimates, code estimates, base band pre-detection estimates and contains all the correlators for signal processing as well as provides autonomous signal search capability for two satellites. Each channel also has the capability to simultaneously track both the C/A-code and P-code. Where ever used herein, the term P-code shall include P(Y)-code. 
     FIG. 2 shows now a typical method to perform pre-detection integration in single C/A- and P-code channel 37. This channel 20 can only track L1 C/A- and P-code or L2 P-code. Carrier generator 36 generates a complex estimate of the incoming GPS carrier. Carrier mixer 38 wipes off the incoming carrier. P-code clock generator 40 and P-code generator 42 generate an estimate of P-code and C/A- code clock generator 44 and C/A-code generator 46 generate an estimate of the C/A-code. P-code delay shift register 48 and C/A-code delay shift register 50 generate a plurality of P-code and C/A-code phases 1/2-chip apart, respectively. Finally, code is wiped off in P-code mixers 52 and C/A-code mixers 54. Pre-detection integration is then, performed using an integrate circuit 56. 
     Six correlators are shown so the P-code and C/A-code can be tracked simultaneously (three for P-code and three for C/A-code). In addition it is possible to dedicate all six correlators to C/A-code using correlator switches 58 for search modes of operation. This is done so that C/A-code can be found more quickly in typical search operations. 
     For some applications of GPS, it is desirable to be able to track L1 and L2 simultaneously. Hardware aside, the easiest way to do this is with an independent 
     tracking loop for L1 and L2. By enhancing the previously described channel 37, it is possible to get the benefit of independent L1 and L2 tracking without the penalty of having two independent channels. For some operational scenarios, it also may be desirable to be able to switch between having two independent tracking loops and having one tracking loop with a phase delta between L1 and L2. Two independent loops would be used in hostile environments where there is a good possibility of losing either L1 or L2. One tracking loop may be desirable for less processor throughout when there is no threat of losing the main L-band. Within a P-code receiver such as that of FIG. 1, the present invention allows this operational flexibility. For these purposes, FIG. 3 describes an enhanced single P-code L1/L2 channel that may be used to enhance the capability of signal processing circuits 26, 28 and 30. 
     FIG. 3 shows an enhanced L1/L2 channel 60 according to the present invention. The modified P-code clock generator 62 generates two P-code clocks with same frequency and independent phase, one for L1 and one for L2. The modified P-code clock generator 62 also detects which of these clock lead. The leading clock is used to clock P-code generator 64. Each new P-code chip is stored in the next location of the P-code circular buffer 302. P-code clock generator 62 is used to increment the L1 and L2 P-code chip counters 68 and 70, respectively. Whenever the L1 P-code chip counter, 68, is incremented, 16-to-1 MUX 70 passes the next P-code chip stored in the P-code circular buffer 66 to the L1 P-code delay shift register 76. The L2 P-code chip counter 72 and 16-to-1 MUX 74 are implemented and work in exactly the same manner as the L1 P-code chip counter 68 and 16-to-1 MUX, 70. Thus, from one P-code generator 64 two P-code outputs, one for L1 and one for L2, go to code delay shift registers, 76 and 78, respectively. This represents a considerable savings in circuitry because P-code generator 64 comprises numerous gates and additionally requires significant computer processing capability to support its operation. Although the preferred embodiment requires a separate carrier generator for each signal frequency, carrier generators for L1 and L2 are easy to build and do not consume nearly as much power as would a second complete channel. 
     The enhanced L1/L2 channel 60 of FIG. 3 provides maximum operational flexibility with minimal additional circuitry. Circuits which are not changed from the previously described typical C/A- and P-code channel include the P-code generator 64, C/A-code clock generator 44, and C/A-code generator 46. The carrier generators, 80 and 82, and carrier mixers, 84 and 86 are the same as the previously shown carrier generator 36 and carrier mixer 38, except that L1 carrier generator 80 is always configured to generate an L1 carrier and the L2 carrier generator 82 is always configured to generate an L2 carrier. Also, the code delay shift registers, 76,78 and 88, code mixers, 90, 92 and 94, the pre-detection integration circuitry 96, and correlator switches 98 and 100 are implemented and function such as the code delay shift registers 48 and 50, coder mixers, 52 and 54, the pre-detection integration circuitry 56 and the correlator switches 58 shown in the typical C/A- and P-code channel 37 of FIG. 2. The only difference being that there is an extra set of P-code delay shift registers 78, P-code mixers 92 and correlator switches 100 and that the pre-detection integration circuitry 332 supports three additional correlators. This is done to accommodate the extra three correlators required to track L2 P-code. 
     Unique to the enhanced channel is a modified P-code clock generator 62, a P-code circular buffer 66, two P-code chip counters, 68 and 72, and two 16-to-1 multiplexers (MUX), 70 and 74. 
     FIG. 4 shows a high level block diagram of the modified P-code clock generator 62. This circuit is a unique modification of the low-powered digital oscillator detailed in co-pending application entitled &#34;Method and Systems for a Multi-Channel Global Position System Signal Processor&#34;. Circuitry to determine which clock leads is not shown. One approach to determine the leading clock is to extend the P-code chip counters 68 and 74 an extra two bits and compare the counter values to see which clock leads. 
     The circuit operation of the modified P-code clock generator 62, is basically the same as the code clock generator described in the previously mentioned co-pending U.S. Patent Applications. The modification is that there are two separate 16-bit P-code clock phase words 112 and 114, one for determining the phase of the L1 P-code clock and the other for determining the phase of the L2 P-code clock. Since initial P-code clock phase only affects the 13 most significant bits of the 32-bit P-code clock generator adder/accumulator, the 19 least significant bits of the adder/accumulator 122 are common to both the L1 and the L2 P-code clock. The frequency word 116 is also common to both the L1 and L2 P-code clock. Along with the two separate P-code clock phase words, 112 and 114 are two 13-bit adder/accumulators 118 and 120 one for L1 P-code clock and one for L2 P-code clock, which together with the 19-bit adder/accumulator 122 make up two separate 32-bit adder/accumulators capable of generating carriers to the two state machines 124 and 126 with the same frequency but different phase. The state machine and carry delay circuits 124 and 126 are exactly the same as described in the previously mentioned co-pending U.S. Patent Applications. 
     FIG. 5 shows the estimated difference between a typical single L-band channel and the enhanced L1/L2 channel of the present invention. An enhanced channel requires only 42% additional circuitry over a normal channel and provides the performance benefit and software reduction of two completely independent channels for tracking L1 and L2 simultaneously. 
     The cost of the enhanced channel is considerably less than the 42% when overhead circuitry such as channel timing and control, processor interface and search specific circuits are included in the gate count estimates. Also note that for this specific example, that the enhanced channel has three additional correlators. This provides approximately a 50% improvement in search speed. As a result of the enhanced P-code channel of the present invention, there is provided an apparatus and method for significantly increasing GPS system receiver channel flexibility without a significant increase in circuitry or software complexity. 
     Although this description describes the invention with reference to the above specific embodiments, the claims, and not this description, limit the scope of the invention. Various modifications or the disclosed embodiment, as well as alternative embodiments of the invention, will become apparent to persons skilled in the art upon reference to the above description. Therefore, the appended claims will cover such modification that follow up in the true scope of the invention.