Abstract:
A method of forming an integrated deep and shallow trench isolation structure comprises depositing a hard mask on a film stack having a plurality of layers formed on a substrate such that the hard mask is deposited on a furthermost layer from the substrate, imprinting a first pattern into the hard mask to define an open end of a first trench, imprinting a second pattern into the hard mask to define an open end of a second trench, and etching into the film stack the first trench to a first depth and the second trench to a second depth such that the first trench and the second trench each define a blind aperture in the surface of the film stack.

Description:
FIELD OF THE INVENTION 
     The present invention relates to a method of manufacturing integrated deep and shallow trench isolation structures. More particularly, the present invention relates to a method of manufacturing simultaneously filled integrated deep and shallow trench isolation structures using an imprinted hard mask. 
     BACKGROUND OF THE INVENTION 
     When several semiconductor devices are provided on a chip, it is required to isolate them from each other in order to suppress parasitic capacitances. Shallow trench isolation is known, whereby trenches are etched into the surface of the semiconductor layer structure in which the devices are formed. However, for high performance bipolar applications, shallow trench isolation is not sufficient to suppress parasitic capacitances. To improve the isolation characteristics, the integration of deep trenches in addition to shallow trench isolation is required in structures formed on silicon on insulator substrates. This is especially beneficial, but not limited to cases where the structures are formed on silicon on insulator substrates. The same applies where the structures are formed from bulk silicon. 
     Integrated sequences for combined deep and shallow trench isolation have been disclosed in which the deep trench is formed first and then filled with a resist plug, upon which shallow trenches are subsequently patterned. However, the known methods of forming integrated deep and shallow trench isolation structures are not suitable for very deep trenches. This is because either the number of deep trenches per unit area or the depth of the deep trenches needs to be limited, in order to avoid insufficient filling with resist before the shallow trench pattern is formed. 
     SUMMARY OF THE INVENTION 
     The present invention has been devised with the foregoing in mind. The present invention provides a method of forming an integrated deep and shallow trench isolation structure, comprising depositing a hard mask on a multilayer structure (designated herein as a film stack) having a plurality of layers grown on a substrate such that the hard mask is formed on an uppermost layer relative to the substrate, imprinting a first pattern into the hard mask to define an open end of a first trench and imprinting a second pattern into the hard mask to define an open end of a second trench, and etching into the film stack the first trench to a first depth and the second trench to a second depth. 
     Preferably, the film stack is formed by growing a silicon oxide layer on a substrate and depositing a silicon nitride layer on silicon-on-insulator (SOI) or bulk silicon substrate wafers. Ideally, a blind end of the first trench should be provided in the buried oxide layer and a blind end of the second trench should be provided in the silicon layer, in the case where a silicon-on-insulator substrate is used. In this case, the first trench is then a deep trench and the second trench is a shallow trench. In the case where bulk silicon substrate applications are employed, the open end of the second trench is much deeper relative to the open end of the first trench. Before the trenches are formed, the hard mask can be deposited on the nitride layer, which is the top layer in the film stack. In this method, the deep trench can be formed before the shallow trench or the shallow trench can be formed first. 
     Alternatively, the hard mask can also comprise a first portion and a second portion. The first pattern can then be created on the first portion of the hard mask to define the open end of the first trench and then the second pattern can be created on the second portion of the hard mask to define an open end of the second trench. 
     The first trench and the second trench can be lined with a third oxide layer. The first trench and the second trench can then be filled with an insulating material, for example silicon oxide or undoped polysilicon. This method eliminates the need for extra resist filling to enable shallow trench patterning. It also avoids insufficient filling with resist. Furthermore, this method only requires a single sequence to simultaneously fill and planarize the deep and shallow trenches. The nitride layer can be removed after a final planarization step. 
     When imprinting the patterns for the trench openings in the hard mask, the second pattern can either be imprinted relative to the first pattern such that the open end of the second trench is isolated from the open end of the first trench; or such that the open end of the second trench is coincident with the open end of the first trench; or such that the open end of the second trench bounds the open end of the first trench. Therefore, this method allows full flexibility in the layout of the trenches. Deep and shallow trenches can either be integrated such that the deep trenches are isolated, semi-isolated or shallow trench bounded within the same device layouts. The method also allows design of pure shallow trench areas and areas with a high density of deep trenches (deep trench arrays). 
     The present invention also provides an integrated deep and shallow trench isolation structure comprising a film stack having a plurality of layers, a first trench defining a blind aperture in the surface of the film stack and having a first depth, and a second trench defining a blind aperture in the surface of the film stack and having a second depth. 
    
    
     
       DESCRIPTION OF THE VIEWS OF THE DRAWING 
       Further advantages and characteristics of the invention ensue from the description below of the preferred embodiments and from the accompanying drawings, in which: 
         FIG. 1  is a schematic side view of a cross-section of a film stack according to first and second embodiments of the invention; 
         FIG. 2  is a schematic side view of a cross-section of a film stack according to a third embodiment of the invention; 
         FIG. 3  is a schematic side view of a cross-section of a first stage of formation of the film stack according to a first embodiment of the invention; 
         FIG. 4  is a schematic side view of a cross-section of a first stage of formation according to a second embodiment of the invention; 
         FIG. 5  is a schematic side view of a cross-section of a first stage of formation according to a third embodiment of the invention; 
         FIG. 6  is a further stage of formation according to a first embodiment of the invention; 
         FIG. 7  is a further stage of formation according to a second embodiment of the invention; 
         FIG. 8  is a further stage of formation according to a third embodiment of the invention; 
         FIG. 9  is a further stage of formation according to a first embodiment of the invention; 
         FIG. 10  is a further stage of formation according to a second embodiment of the invention; 
         FIG. 11  is a further stage of formation according to a third embodiment of the invention; 
         FIG. 12  is a further stage of formation according to a third embodiment of the invention; 
         FIG. 13  is a further stage of formation according to a first embodiment of the invention; 
         FIG. 14  is a further stage of formation according to a second embodiment of the invention; 
         FIG. 15  is a further stage of formation according to a third embodiment of the invention; 
         FIG. 16  is a further stage of formation according to a first embodiment of the invention; 
         FIG. 17  is a further stage of formation according to a second embodiment of the invention; 
         FIG. 18  is a further stage of formation according to a third embodiment of the invention; 
         FIG. 19  is a further stage of formation according to first and second embodiments of the invention; 
         FIG. 20  is a further stage of formation according to a third embodiment of the invention; 
         FIG. 21  is a further stage of formation according to first and second embodiments of the invention; 
         FIG. 22  is a further stage of formation according to a third embodiment of the invention; 
         FIG. 23  is a further stage of formation according to first and second embodiments of the invention; 
         FIG. 24  is a further stage of formation according to a third embodiment of the invention; 
         FIG. 25  is a further stage of formation according to first and second embodiments of the invention; 
         FIG. 26  is a further stage of formation according to a third embodiment of the invention; 
         FIG. 27  is a further stage of formation according to first and second embodiments of the invention; 
         FIG. 28  is a further stage of formation according to a third embodiment of the invention; 
         FIG. 29  is a filling stage according to first and second embodiments of the invention; 
         FIG. 30  is a filling stage according to a third embodiment of the invention; 
         FIG. 31  is a schematic side view of a cross-section of a structure with filling material etched from all areas without trenches according to first and second embodiments of the invention; 
         FIG. 32  is a schematic side view of a cross-section of a structure with filling material etched from all areas without trenches according to a third embodiment of the invention; 
         FIG. 33  is a schematic side view of a cross-section of a planarizing stage according to first and second embodiments of the invention; 
         FIG. 34  is a schematic side view of a cross-section of a planarizing stage according to a third embodiment of the invention; 
         FIG. 35  is a schematic side view of a cross-section of a finished isolation structure according to first and second embodiments of the invention and; 
         FIG. 36  is a schematic side view of a view of a cross-section of a finished isolation structure according to a third embodiment of the invention. 
     
    
    
     DETAILED DESCRIPTION 
     In  FIG. 1  a film stack  10  is provided on a substrate  11  and comprises a first buried oxide layer  12  underneath a silicon layer  13 . An initial oxide layer  14  is provided on the silicon layer  13  and a nitride layer  15  is provided on the initial oxide layer  14 . A hard mask  16  is deposited on the top surface of film stack  10 . The same film stack  10  shown in  FIG. 1  is used for the first and second embodiments of the invention. 
       FIG. 2  shows a film stack  10  used for a third embodiment of the invention. The structure of the substrate  11  buried oxide layer  12 , silicon layer  13 , initial oxide layer  14  and initial nitride layer  15  of the film stack  10  is the same as that used in the first embodiment. However, instead of the hard mask  16 , the third embodiment has a first hard mask  17  deposited on the surface of the nitride layer  15 . 
       FIGS. 1 ,  3 ,  6 ,  9 ,  13 ,  16 ,  19 ,  21 ,  23 ,  25 ,  27 ,  29 ,  31 ,  33  and  35  relate to the first described embodiment;  FIGS. 1 ,  4 ,  7 ,  10 ,  14 ,  17 ,  19 ,  21 ,  23 ,  25 ,  27 ,  29 ,  31 ,  33  and  35  relate to the second described embodiment; and  FIGS. 2 ,  5 ,  8 ,  11 ,  12 ,  15 ,  18 ,  20 ,  22 ,  24 ,  26 ,  28 ,  30 ,  32 ,  34  and  36  relate to the third described embodiment. In all embodiments, the growth of the thin initial oxide layer  14  acts as stress relief for the subsequent deposition of the initial nitride layer  15 . The function of the buried oxide layer  12  under the silicon layer  13  is to isolate the device from the substrate  11 . The thickness of the silicon layer  13  can vary from 1 micrometer to more than 8 micrometers depending on the application. The thickness of the buried oxide layer  12  is typically in the range between 0.1 micrometers and 0.5 micrometers. In the case where a silicon-on-insulator substrate is used, the depth of the deep trenches is limited by the buried oxide layer  12 . When bulk silicon is used, the depth of the trenches can vary depending on application requirements. The thickness of the hard mask layers  16  and  17  depends on the required depth of the trenches that are to be etched into the film stack  10 . The hard mask  16  used in the first and second embodiments is relatively thicker than the first hard mask  17  used in the third embodiment. All mask layers should preferably be formed from an oxide. 
     In  FIGS. 3 ,  4  and  5 , the first stage of formation is shown for the first, second and third embodiments, respectively. A first pattern is created in a resist  19 . The pattern in the resist  19  defines the first trench openings  20  and  21 . In the first embodiment the openings  20  are for deep trenches so that the deep trench openings are formed first. In the second and third embodiments shallow trench openings  21  are formed first. Deep trenches can either be designed to be isolated (not guarded by a shallow trench), semi-isolated (asymmetrically guarded by a shallow trench only on one side) or shallow trench bounded (guarded by a shallow trench on both sides). Any combinations of these layout types are allowed within the same device.  FIG. 6  shows a second etching stage according to the first embodiment. The pattern in the resist  19 , which defines the openings  20  of the deep trenches is transferred into the underlying film stack  10  by means of plasma etching. In the first embodiment, the complete film stack consisting of an initial oxide  14 , initial nitride  15  and hard mask  16  is removed selectively from the top silicon layer  13  to form deep trench openings  20 . The deep trenches  22  are formed in the film stack  10  as blind apertures such that the blind end of each deep trench  22  is located in one of the layers of the film stack  10  and the open end of a trench is located, in the initial stages of etching, in the resist  19  provided on the hard mask layer  16 . At this stage of etching, the blind ends of the deep trenches  22  are formed in the silicon layer  13  in the first embodiment. 
     In a second etching stage according to the second embodiment, as shown in  FIG. 7 , only a partial shallow trench  23  is etched. The shallow trench  23  is etched partially into the hard mask layer  16  such that the blind end of the shallow trench  23  is located in the hard mask layer  16  at this stage and the open end of the shallow trench  23  is located in the resist  19  provided on the hard mask layer  16 . The hard mask loss in the structure of the second embodiment is designed such that later etching of deep trenches will safely remove the remaining hard mask film in the shallow trench region with limited loss of the initial nitride layer  15  below. 
     In a second stage of etching according to the third embodiment shown in  FIG. 8 , the complete film stack consisting of an initial oxide  14 , initial nitride  15  and hard mask  16  is removed selectively from the top silicon layer  13  to form a shallow trench  23 . At this stage of etching, the blind end of the shallow trench  23  is located in the silicon layer  13  and the open end of the shallow trench  23  is located in the resist  19  provided on the hard mask layer  16 . 
     In  FIGS. 9 ,  10  and  11 , a further stage of etching is shown according to the first, second and third embodiments, respectively. The remaining photoresist  19  from the initial imprinted pattern of the trench openings is removed using conventional ash and wet clean techniques in all three embodiments. 
       FIG. 12  shows the insertion of a second hard mask  18 , which is only employed in the third embodiment. The second hard mask  18  is deposited on the surface of the first hard mask  17  and also lines the trench over the initial nitride layer  15 , the initial oxide layer  14  and the silicon layer  13 . The first hard mask  17  and the second hard mask  18  adopt approximately the same total thickness as the hard mask  16  used on the first and second embodiments. The thickness of the additional hard mask  18  depends on the amount of consumption of the hard mask during deep trench formation. The first hard mask  17  and the second hard mask  18  are preferably made of the same material but they may also be made from different materials. 
     In  FIGS. 13 ,  14  and  15 , which show a further stage of formation according to the first, second and third embodiments, respectively, a second resist pattern is created in the resist. The second resist pattern defines openings for the other type of trenches (shallow trench openings  21  in the first embodiment and deep trench openings  20  in the second and third embodiments). For shallow trench bounded deep trenches  29 , the shallow trench opening  21  overlaps the deep trench opening  20  on both sides. For isolated deep trenches  30 , a minimum spacing to the next shallow trench opening is maintained and the shallow trench opening  21  does not overlap the isolated deep trench opening  20 . For semi-isolated deep trenches  28 , the shallow trench opening  21  overlaps the deep trench opening  20  on one side while not overlapping the deep trench opening  20  on the other side. All three configurations—shallow trench bounded deep trenches  29 , isolated deep trenches  30  and semi-isolated deep trenches  28  are provided in a single structure in all three embodiments. 
     In  FIGS. 16 to 18  the second resist pattern is now transferred into the upper film stack  10  by means of plasma etching for all three embodiments. In the first embodiment, the hard mask  16  is partially etched to a certain extent with high selectivity to the exposed silicon layer  13  in the existing deep trench openings  20 . In the second embodiment and the third embodiment the remaining film stack is completely etched through with high selectivity to silicon in the silicon layer  13 . High selectivity to silicon is desirable but not necessarily required. 
     In  FIGS. 19 and 20 , the structure for the first ( FIG. 19 ), second ( FIG. 19 ) and third ( FIG. 20 ) embodiments is shown after the second resist pattern has been removed by conventional ash and wet clean techniques. In the second and third embodiments it is possible to keep the resist pattern during the subsequent deep trench etch step. 
     Deep trenches  22  are etched into the silicon layer  13  with high selectivity to the hard masks  16 ,  17  and  18 . This takes place for all three embodiments, the first and second embodiments being shown in  FIG. 21  and the third embodiment being shown in  FIG. 22 . In the case where a silicon-on-insulator substrate is used for the substrate  11 , the buried oxide layer  12  acts as a stopping layer and defines the depth of the deep trenches  23  such that the blind ends of the deep trenches are now located in the buried oxide layer  12 . Ideally, the initial nitride layer  15  can be used as an etch stop in the shallow trench regions such that the hard mask film  16  or  17  and  18  is safely removed completely while still leaving enough of the initial nitride  15  to safely stop in the trenches (as shown in  FIG. 19  for the first and second embodiments). 
     The process can also be designed to stop within the hard mask film instead, if required. Because the initial nitride has already been removed in shallow trench areas in the third embodiment, the deep trench etch has to stop within the hard mask in this case. Resist  19  can still be present during the deep trench etch process. The remaining resist  19  can be removed by ashing at an intermediate state of etching before exposing the hard mask or it can be fully consumed by the etching process itself. This can occur in the second and third embodiments without limiting the flexibility of the trench layout. In the first embodiment the deep trench etching operation allows the presence of the resist  19  only if isolated and semi-isolated deep trenches are not included in the layout. In the third embodiment shown in  FIG. 22 , the formation of a spacer  24  at the edge of a shallow trench  23  starts to take place when etching the deep trenches  22 . This particular spacer  24  will remain part of the isolation structure until the completion of the isolation process sequence. 
     Once the deep trenches  22  are etched to the target depth such that the blind end of each deep trench  22  is provided in the buried oxide layer  12  and all photoresist has been removed from shallow trench areas  23 , another etch process with inverse selectivity requirement is applied to remove the remaining upper film stack layers (nitride  15  and initial oxide  14 ) from the shallow trench regions  23 , while not significantly removing any of the silicon layer  13 . The thicker hard mask provided on top of the active device areas prevents unwanted loss of the nitride layer  15  and remains thick enough to withstand the subsequent shallow trench etch operation. This is shown in  FIG. 23  for the first and second embodiments, and in  FIG. 24  for the third embodiment. 
     In  FIGS. 25 and 26  etching of the silicon layer  13  to the targeted shallow trench depth is shown for the first and second embodiments in  FIG. 25  and for the third embodiment in  FIG. 26 . The shallow trench depth is selectively etched to the hard mask  16  and  17  and this completes the shape formation of the integrated deep and shallow trench structures. For compatibility with existing shallow trench planarization schemes it is desirable to have the initial nitride layer  15  still protected by a minimum leftover portion of the hard mask  16  or  17  from all etching processes at this stage. 
     A thin oxide liner  25  is then grown on the exposed surfaces of the silicon layer  13 , as shown in  FIG. 27  for the structure according to the first and second embodiments and in  FIG. 28  for the structure according to the third embodiment. 
     After this step of liner oxidation, the integrated deep and shallow trenches are simultaneously filled with an oxide insulation filling material  26 . This is shown in  FIG. 29  for the first and second embodiments and in  FIG. 30  for the third embodiment. Several deposition methods for filling the trench structures are known in the art that are suitable for this application, for example HDP or chemical vapor deposition (SACVD or APCVD). Also combined deposition and reflow procedures can be used to fill the structures. After deposition, the filling material can then be stabilized during a furnace operation. 
       FIGS. 31 and 32  illustrate the structures of the first and second embodiments, and the third embodiment, respectively, after pattern and etch operations in the active silicon areas are used to relax planarization requirements. The filling material  26  has been etched from all areas without trenches to reduce the total amount of oxide to be removed during a subsequent planarization process. This etch operation stops on the surface of the nitride layer  15  and will automatically remove any hard mask film left over, except for the spacer  24  provided in the third embodiment.  FIGS. 33 and 34  show the device with a flat surface after planarization has taken place. 
     In  FIGS. 35 and 36 , which show the finished isolation structure of the first and second embodiments, and the third embodiment, respectively, the nitride layer  15  has been stripped from the surface of the device. It can be seen that formation of the spacer  24  in the third embodiment shown in  FIG. 36  is independent of formation of the deep trenches  22 . The spacer  24  will protect the interface between the oxide layer  14  and the silicon layer  13  from being attacked during subsequent cleaning steps with hydrofluoric acid. Thus a reduced complexity in the filling of the deep and shallow trenches and increased layout flexibility of the trenches on the device are provided. 
     Although the invention has been described hereinabove with reference to specific embodiments, it is not limited to these embodiments and no doubt alternatives will occur to the skilled person that lie within the scope of the invention as claimed.