Abstract:
A communication system for an HDMI communication interface CEC channel includes a communication module for receiving messages via the CEC channel, a processing unit for processing the received messages and an oscillator for driving the communication module. When the interface is in an active mode, the system is operative to activate the timer upon detection of the start of transmission of a first message, detect the initial bit of the first message, reconstruct and process the first message, and switch the interface from the active mode to standby by deactivating the oscillator. When the interface is in standby, the system is operative to switch the interface to the active condition by activating the oscillator and the timer when the start of a transmission of a second message is detected, detect the initial bit of a transmission of the second message, and reconstruct and process the second message.

Description:
RELATED APPLICATION 
       [0001]    The present application claims priority of Italian Patent Application No. TO2009A000600 filed Jul. 31, 2009, which is incorporated herein in its entirety by this reference. 
       FIELD OF THE INVENTION 
       [0002]    The present invention relates to devices that use control channels, such as for example the control channel “Consumer Electronics Control” (CEC) of a high-definition multimedia interface (HDMI). The invention has in particular been developed for the purpose of detecting correctly the start of a transmission on the CEC channel when the device is in standby. 
       DESCRIPTION OF RELATED ART 
       [0003]    High-definition multimedia interface (HDMI) is a completely digital commercial standard for the interfacing of audio and video signals. In particular, the HDMI standard specifies the “Consumer Electronics Control” (CEC) channel, which enables communication of control signals between interconnected components, for example devices of the “home theatre” type. In particular, the standard envisages that all the devices are connected together with an HDMI bus, in which a single device (for example a remote control) can control operation of a plurality of devices. For example, the user can control turning-on and/or turning-off of the devices with a key of the remote control of a television set. 
         [0004]    In order to be able to acknowledge a command received from another device, the device must remain activated. This causes an additional consumption because the communication interface of the device remains supplied, with the device in the standby condition. 
         [0005]    However, the standard on the HDMI-CEC channel does not provide any specification on the limitations of consumption or techniques for reduction of consumption, even though the energy consumption in the standby condition is a fundamental parameter that all manufacturers have to consider. For instance, the compliance with the last version of the Energy Star guidelines imposes the need to meet severe constraints. 
       SUMMARY OF THE INVENTION 
       [0006]    The object of the invention is to reduce the consumption of the HDMI interface in the standby condition, otherwise keeping the performance of the system unaltered. 
         [0007]    With a view to achieving the aforesaid object, the subject of the invention is a communication system for the CEC channel of an HDMI communication interface which is switchable between an active condition and a standby condition. The system includes a communication module for receiving messages from the CEC channel, wherein the communication module includes a timer, a processing unit for processing the received messages, and an oscillator for driving the communication module. When the interface is in the active condition, the system is configured for activating the timer when the beginning of a transmission of a first message is detected on the CEC channel, detecting the transmission start bit of the first message via the timer using a first plurality of reference values, reconstructing and processing the first message, and detecting the presence of other remaining activities to be performed and, in the absence of other remaining activities, switching the interface from the active condition to the standby condition by means of a deactivation of the oscillator. When the interface is in the standby condition, the system is operative for switching the interface from the standby condition to the active condition when the beginning of a transmission of a second message is detected on the CEC channel by activating the timer and the oscillator, detecting the transmission start bit of the second message via the timer using a second plurality of reference values, wherein the second reference values are different from the first reference values, and reconstructing and processing the second message. 
         [0008]    The invention also regards the corresponding communication method, as well as a computer program product, that can be loaded into the memory of at least one computer and comprises parts of software code that can execute the steps of the method when the product is run on at least one computer. As used herein, the reference to such a computer program product is understood as being equivalent to the reference to a computer-readable means containing instructions for control of the computer system in order to co-ordinate implementation of the method according to the invention. Reference to “at least one computer” is evidently intended to highlight the possibility for the present invention to be implemented in a modular and/or distributed form. 
         [0009]    Further advantageous characteristics of the invention form the subject of the annexed dependent claims. 
         [0010]    The claims form an integral part of the technical teaching provided herein in relation to the invention. 
         [0011]    In one embodiment, it is envisaged that the oscillator of the HDMI communication interface is deactivated when the device (i.e., the HDMI communication interface) goes into standby. 
         [0012]    In one embodiment, the standby condition is activated when the communication interface has executed or processed the operations requested and no other activities to be performed are envisaged. 
         [0013]    In one embodiment, the oscillator of the interface is reactivated in an asynchronous way (i.e., when start of a transmission on the CEC channel is detected. 
         [0014]    In one embodiment, the start of a transmission also activates a timer. In particular, this timer can be used for detecting the start of a transmission, i.e., the initial bit of a transmission, correctly. 
         [0015]    In one embodiment, the timer is compared with a first plurality of reference values (i.e., a first reference value for the duration of the low period of the bit and a first reference value for the duration of the bit time) when the interface is turned on and functions normally (i.e., when the interface is not in standby), and with a second plurality of reference values (i.e., a second reference value for the duration of the low period of the bit and a second reference value for the duration of the bit time) when the interface is in standby, with the second reference values different from the first reference values. 
         [0016]    This enables reduction in the consumption of the interface in the standby condition, guaranteeing that the initial bit of a transmission is detected correctly, even though some milliseconds elapse until the oscillator is reactivated. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0017]    The invention will now be described, purely by way of non-limiting example with reference to the annexed drawings, wherein: 
           [0018]      FIG. 1  shows an example of waveform of the initial bit of a transmission on the CEC channel according to the HDMI standard; 
           [0019]      FIG. 2  is a block diagram of an embodiment of a communication interface for the CEC line of an HDMI device; and 
           [0020]      FIG. 3  shows details of the communication interface of  FIG. 2 . 
       
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
       [0021]    In the ensuing description, various specific details are illustrated aimed at providing an in-depth understanding of the embodiments. The embodiments can be obtained without one or more of the specific details, or with other methods, components, materials, etc. In other cases, well-known structures, materials, or operations are not illustrated or described in detail so as not to render various aspects of the embodiments obscure. 
         [0022]    Reference to “an embodiment” or “one embodiment” in the framework of this description is aimed at indicating that a particular configuration, structure or characteristic described in relation to the embodiment is included in at least one embodiment. Hence, phrases such as “in an embodiment” or “in one embodiment” that may be present in different points of this description do not necessarily refer to one and the same embodiment. Furthermore, particular conformations, structures, or characteristics can be combined in an adequate way in one or more embodiments. 
         [0023]    The references used herein are only adopted for reasons of convenience and hence do not define the sphere of protection or the scope of the embodiments. 
         [0024]      FIG. 1  shows an example of waveform of the initial bit (start bit) of a transmission on the CEC line according to the HDMI standard. 
         [0025]    In particular, in the HDMI standard it is envisaged that the change from the logic level ‘1’ to the logic level ‘0’ indicates the start of a transmission and hence also the start of the initial bit or “start bit” of the transmission. 
         [0026]    Subsequently, the CEC line changes again from the logic level ‘0’ to the logic level ‘1’. In the HDMI standard it is envisaged that this change occurs at the instant t 1 =3.7 ms, with a tolerance of +/−0.2 ms. This means that the change can occur between the instant t 1,min =3.5 ms and the instant t 1,max =3.9 ms. The total duration of the start bit is typically t 2 =4.5 ms, after which the other bits of the transmission follow. 
         [0027]      FIG. 2  shows an embodiment of a communication system  10  for a CEC line of an HDMI communication interface. 
         [0028]    In the embodiment considered, the interface  10  comprises a processing unit  102 , for example a CPU, which manages the communication of the HDMI interface at a high level, i.e., at a level of commands and messages of the HDMI-CEC type. 
         [0029]    In the embodiment considered, there is also provided a communication module  110  that manages the communication on the CEC line at a low level, i.e., the transmission and/or reception of the HDMI-CEC messages on the CEC line. 
         [0030]    For example, when the CPU  102  requests transmission of an HDMI-CEC message, the module  110  converts the message into a sequence of bits that is transmitted on the CEC line in compliance with the HDMI standard. The module  110  can also generate at the end of the transmission an interrupt  24  that is transmitted to the CPU  102 . 
         [0031]    Instead, when the module  110  detects a transmission on the CEC line, the module  110  reconstructs the corresponding HDMI-CEC message and, at the end of reception, signals the HDMI-CEC message to the CPU  102 . For example, for detecting the start bit, a timer  112  can be used. Also in this case, the module  110  can, at the end of reception, generate an interrupt  24  transmitted to the CPU  102 . 
         [0032]    In the ensuing embodiments, the processing unit  102  can manage at least one command of turning-on and one command of turning-off of the device. 
         [0033]    When the interface  10  receives a turning-off command, the CPU  102  instructs the device to turn off and sets the interface  10  in standby. 
         [0034]    In the embodiment considered, the CPU  102  transmits a standby signal  20  to a block  104  that manages a supply network  106  and an oscillator  108 . For example, the oscillator  108  can drive both the processing unit  102  and the communication module  110 . 
         [0035]    The inventors have found that consumption during the standby mode can be reduced significantly if the block  104  deactivates the supply of the rest of the device and furnishes supply only to the interface  10 . The consumption can be reduced further if the block  104  deactivates also the oscillator  108 . 
         [0036]    In the embodiment considered, the interface  10  is reactivated if the CEC line indicates the start of a transmission. In particular, in the ensuing embodiments the communication module  110  generates an asynchronous signal of reactivation (wake-up)  22  when the start of a transmission is detected. 
         [0037]    For example, the wake-up signal  22  can be generated when the device is in standby and when the CEC line changes from the logic level ‘1’ to the logic level ‘0’. For example, the check can be made via an AND gate  110   a  that has as input the CEC line inverted and the standby signal  20 . 
         [0038]    In the embodiment considered, the wake-up signal  22  drives the block  104 . In this way, the block  104  can reactivate the oscillator  108 , enabling normal operation of the communication module  110 . Furthermore, the wake-up signal  22  can also drive the processing unit  102  to reactivate it if necessary. 
         [0039]    In one embodiment, the block  104  reactivates the supply of the rest of the device only when the block  104  receives a request from the CPU. For example, the CPU  102  can annualise first the message received and reactivate the supply only if the message is effectively a turning-on command. 
         [0040]    The inventors have noted that in this type of interface  10  malfunctioning may be encountered. 
         [0041]    To detect the start bit correctly, the communication module  110  monitors the CEC line and checks whether the logic level remains at ‘0’ during the period between 0 ms and t 1,min =3.5 ms and becomes ‘1’ before the instant t 1,max =3.9 ms. 
         [0042]    For example, in one embodiment, the timer  112  is always activated by the trailing edge of the CEC line and proceeds up to the next trailing edge, when the timer is automatically reset and reactivated to evaluate the next bit. During count, the module  110  keeps track of the count value of the timer  112  present at the rising edge of the CEC line, and of the end-of-count value. These two values are compared with the ones requested by the communication standard to evaluate the type of datum received (i.e., start bit, zero, 1, error bit, or datum not valid) within the tolerance margins envisaged. 
         [0043]    However, from when there is detection of the start of a transmission to when the oscillator  108  restarts to enable proper operation of the module  110  there may elapse a time interval (for example, even of the order of milliseconds) such that the module  110  cannot manage to verify properly whether the start bit changes the logic level between t 1,min =3.5 ms and t 1,max =3.9 ms. 
         [0044]    The inventors have also noted that, at least in principle, this problem could be tackled in the following ways:
       avoiding turning off of the oscillator  108 ; or   causing the communication module to verify only whether the logic level changes for the first bit, without verifying the exact moment of the change.       
 
         [0047]    The first solution implies an additional consumption, whereas the second solution can cause the communication module not to detect the start bit correctly, thus causing possible errors in the detection of the ensuing bits. 
         [0048]    In one embodiment considered herein, the communication module uses different temporal criteria for detecting the start bit, for example change from the logic level ‘0’ to the logic level ‘1’. In particular, when the interface  10  is functioning normally, operation is according to standard time rates, as illustrated with reference to  FIG. 1 , whereas, when the interface  10  exits the state of standby, operation is with modified time rates. 
         [0049]      FIG. 3  shows a corresponding circuit that can be implemented within the communication module  110 . 
         [0050]    In the embodiment considered, a timer  112  is provided, activated with the start of a transmission on the CEC line, i.e., with the start of the start bit. When the interface functions normally, the count value of the timer  112  is compared with standard reference values  112   a  (for example, representative count values for t 1,min =3.5 ms and t 1,max =3.9 ms) , whilst in conditions of standby the timer  112  is compared with modified reference values  112   b.    
         [0051]    In one embodiment, the module  110  uses for the modified reference values  112   b  count values that represent t 1,min =3.5 ms−Twk max , where Twk max  is the time required for reactivation of the interface  10 , and t 1,max =3.9 ms−Twk min , where Twk min  is the minimum time required for reactivation of the interface  10 . 
         [0052]    For example, in the embodiment considered a control module  114  is provided that drives a multiplexer  116  for selecting the standard reference values or the reference values modified as a function of the standby signal  20  received from the CPU  102 . 
         [0053]    In the embodiment considered, the control module  114  also guarantees that the reference values remain stable when the timer  112  has been activated. In fact, the standby signal is typically asynchronous, and once the system has been reactivated, the value of the standby signal usually returns to the logic level ‘0’. Hence, a driving of the multiplexer  116  directly via standby signal  20  could cause the reference values to return to the standard values  112   a  envisaged for normal operation. 
         [0054]    In one embodiment, the reference values change from the modified values  112   b  to the standard values  112   a  when the control module  114  has detected the start bit at exit from the standby mode. 
         [0055]    The inventors have noted that the foregoing operations can also be implemented via software in existing systems. The CPU  102  can in fact change the contents of the registers that contain the reference values for the timer  112  before the standby mode is activated. Subsequently, once the interface  10  has been reactivated, the CPU  102  could again write the standard reference values in the registers. 
         [0056]    Of course, without prejudice to the principle of the invention, the details of construction and the embodiments may vary widely with respect to what has been described and illustrated purely by way of example, without thereby departing from the scope of the present invention, as defined by the ensuing claims.