Abstract:
Apparatus and method for a power converter with feed-forward voltage compensation to enable a PFC circuit are proposed. A voltage divider and a feedback unit output a compensation voltage and a feedback voltage in response to an input voltage and an output voltage, respectively. The feedback voltage is compensated by the compensation voltage through an operation unit. A comparator activates the PFC circuit within a predetermined input power range based on the already compensated feedback voltage. The proposed power converter can always activate the PFC circuit before the input power reaches 75 W regardless of any variation of the input voltage.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The present invention relates to a power converter with feed-forward voltage compensation for enabling a power factor correction (PFC) circuit and a method thereof and, more particularly, to a power converter capable of activating a PFC circuit under the same input power condition and a method thereof.  
         [0003]     2. Description of Related Art  
         [0004]     According to the international standard IEC1000-3-2, the PFC circuit has to be activated to perform the power factor correction and boost procedure before the input power of a power converter with a PFC circuit reaches 75 W. In order to achieve the object of power saving, it is necessary for a power converter with a PFC circuit to close the action of the PFC circuit under a light load. The use of a PFC circuit is a well-known art in the field of the power converters. The PFC circuit is used to reduce the current harmonic at the power source of power converters so as to make the power factor of the input power of the power converters close to 1. Moreover, the PFC circuit also has the function of boosting voltage.  
         [0005]      FIG. 1  is a circuit diagram of a conventional power converter with a PFC circuit. A power converter  1  comprises a PFC circuit  10 , a power stage  20 , a feedback unit  30  and a comparator  40 . The PFC circuit  10  comprises a PFC converter  102 , a PFC controller  104  and a bus capacitor C B . The power stage  20  comprises a PWM converter  202  and a PWM controller  204 .  
         [0006]     The PFC converter  102  is controlled by the PFC controller  104  of the PFC circuit  10  in response to an input voltage V IN . A bus voltage V BUS  is built on the bus capacitor C B  after the power factor correction and boost procedure are finished. The PWM converter  202  in the power stage  20  is to convert the bus voltage V BUS  to an output voltage V OUT  for a load.  
         [0007]     As shown in  FIG. 1 , the feedback unit  30  receives a feedback voltage V FB  in proportional to the load of the power stage  20 . The feedback voltage V FB  has a higher level under a heavy load and the feedback voltage V FB  has a lower level under a light load. At the output of the power converter  1 , the feedback voltage V FB  and the input power increase once the load gradually rises from a light load to a heavy load. Under the requirement of the international standard IEC1000-3-2, the power converter  1  has to activate the PFC circuit  10  before the input power of the power converter  1  reaches 75 W.  
         [0008]     The negative input of the comparator  40  receives a reference voltage V T , and positive input of the comparator  40  receives the feedback voltage V FB . The comparator  40  can be implemented by a hysteresis comparator. When the load of the power converter  1  is larger than the upper limit of the hysteresis range of the comparator  40 , the comparator  40  generates a control signal S C  in a high-level to drive the PFC controller  104 . The PFC controller  104  generates a PFC drive signal S PFC  in a high-level to the PFC converter  102 , which then activates the power factor correction and boost procedure. Meanwhile, the input voltage V IN  stored at the bus capacitor C B  instantaneously rises to a high DC level, and the feedback voltage V FB  drops relatively. When the load of the power converter  1  decreases and the feedback voltage V FB  drops to below the lower limit of the hysteresis range of the comparator  40 , the comparator  40  then outputs a control signal S C  in a low-level to drive the PFC controller  104 . The PFC controller  104  generates a PFC drive signal S PFC  in a low-level to the PFC converter  102 , which then closes the power factor correction and boost procedure.  
         [0009]     Reference is made to  FIG. 1  again. When the power switch Q in the power stage  20  is on, the energy W IN  stored in the magnetizing inductance L P  of the transformer T can be represented by,  
               W   IN     =         1   2     ×     L   P     ×     I   P   2       =       P   IN     ×     T   S                 (   1   )             
 
 wherein the primary-side switching current I P  flowing through the primary side of the transformer T can be represented by,  
               I   P     =         V   IN       L   P       ×     t   on               (   2   )             
 
 The feedback voltage V FB  will influence the primary-side switching current I P  under the normal load. The magnitude of the primary-side switching current I P  depends on the load. Therefore, the feedback voltage V FB  is in proportional to the magnitude of the load. The output power increases and the feedback voltage V FB  has a higher level under the heavy load. The output power decreases and the feedback voltage has a lower level under the light load. 
 
         [0010]     The maximum input power P IN  is obtained by substituting (2) into (1),  
               P   IN     =           L   P       2   ×     T   S         ×     I   P   2       =         V   IN   2     ×     t   on   2         2   ×     L   P     ×     T   S                   (   3   )             
 
 In Equations (1) to (3), t on  is on-time of a PWM control signal V PWM  when the power switch Q is on, and T S  is the switching period of the PWM control signal V PWM . 
 
         [0011]     The conventional power converter  1  controls the PFC circuit  10  by means of the feedback voltage V FB  and the hysteresis range of the comparator  40  to perform the power factor correction and boost procedure. When the feedback voltage V FB  rises to the upper limit of the hysteresis range, the PFC circuit  10  performs the power factor correction and boost procedure. The PFC circuit  10  closes the power factor correction and boost procedure once the feedback voltage V FB  drops to the lower limit of the hysteresis range. The feedback voltage V FB  has a lower level when the input voltage V IN  is high (V H ). The PFC circuit  10  usually activates the power factor correction and boost procedure only when the input power of the power converter  1  is larger than 75 W.  
         [0012]      FIG. 2  is a curve showing the relation between the input voltage and the input power of a conventional power converter  1  when the PFC circuit is activated. From Equation (3), we know that the input power P IN  of the power converter  1  is in proportional to the square of its input voltage V IN . Therefore, the power converter  1  has to reach a larger input power P INH  to control the PFC circuit  10  to enabling the boost procedure once the load is heavy and the input voltage V IN  (V H ) is high.  
         [0013]     Because the conventional power converter  1  activates the PFC circuit  10  only when the input power is larger than 75 W under the conditions of high input voltage V H  (larger than 180 Vac) and heavy load (larger than 150 W). Hence, the requirement of the international standard IEC1000-3-2 cannot be satisfied.  
       SUMMARY OF THE INVENTION  
       [0014]     An object of the present invention is to provide a power converter with feed-forward voltage compensation for enabling a PFC circuit and a method thereof, in which a complementary relation is accomplished between feedback voltage and input voltage so that the power converter can always enable the PFC circuit to perform the power factor correction and boost procedure before the input power reaches 75 W regardless of any variation of the input voltage.  
         [0015]     The power converter of the present invention comprises a PFC circuit, a power stage, a feedback unit, a voltage divider, an operation unit and a comparator. The PFC circuit generates a bus voltage in response to an input voltage. The power stage outputs an output voltage in response to the bus voltage. The feedback unit outputs a feedback voltage in response to the output voltage. The voltage divider generates a compensation voltage in response to the input voltage. The operation unit and the comparator operate the feedback voltage, the compensation voltage and a reference voltage to produce a control signal for controlling the PFC circuit to perform power factor correction and boost procedure.  
         [0016]     Besides, the present invention also provides a method for a power converter with feed-forward voltage compensation to enable a PFC circuit. The method comprises the steps of: generating a compensation voltage in response to an input voltage; generating a feedback voltage in response to an output voltage; providing a reference voltage; operating the reference voltage, the compensation voltage and the feedback voltage to generate a control signal; and enabling said PFC circuit in response to the control signal to perform power factor correction and boost procedure before the input power reaches 75 W. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0017]     The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawing, in which:  
         [0018]      FIG. 1  is a circuit diagram of a conventional power converter with a PFC circuit;  
         [0019]      FIG. 2  is a curve showing the relation between the input voltage and the input power of a conventional power converter with a PFC circuit when the PFC circuit is activated;  
         [0020]      FIG. 3  is a circuit diagram according to a first preferred embodiment of the present invention;  
         [0021]      FIG. 4  is a circuit diagram according to a second preferred embodiment of the present invention; and  
         [0022]      FIG. 5  is a curve showing the relation between the input voltage and the input power of a power converter with a PFC circuit of the present invention when the PFC circuit is activated. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0023]      FIG. 3  is a circuit diagram according to a first preferred embodiment of the present invention. As shown in  FIG. 3 , a power converter  2  of the present invention comprises a PFC circuit  10 , a power stage  20 , a feedback unit  30 , a voltage divider  50 , an operation unit  60  and a comparator  40 . The PFC circuit  10  outputs a bus voltage V BUS  in response to an input voltage V IN . In the PFC circuit  10 , a PFC controller  104  is controlled by a control signal S C  generated on the output of the comparator  40 . When the control signal S C  is enabling, the PFC controller  104  outputs a PFC drive signal S PFC  in a high-level to a PFC converter  102  for controlling the PFC converter  102  to perform the power factor correction and boost procedure. The bus voltage V BUS  will be built in proportional to the input voltage V IN  on a bus capacitor C B . The power stage  20  controls the switching of a power switch Q through a PWM control signal V PWM  generated by a PWM controller  204  so that a PWM converter  202  can convert the bus voltage V BUS  to an output voltage V OUT .  
         [0024]     The feedback unit  30  is used to provide a feedback voltage V FB  in proportional to the output voltage V OUT . In this embodiment, the feedback unit  30  generates the feedback voltage V FB  in response to the output voltage V OUT  of the power stage  20 . The feedback unit  30  is further coupled to the PWM controller  204 . The PWM controller  204  can adjust the PWM control signal V PWM  to control the switching of the power switch Q in response to the feedback voltage V FB .  
         [0025]     The voltage divider  50  generates a compensation voltage V RMS  in response to the input voltage V IN . The voltage divider  50  receives the input voltage V IN  from the power converter  2  to obtain the compensation voltage V RMS  by means of feed-forward voltage compensation. The compensation voltage V RMS  has a higher level under the condition of a high input voltage V H . The compensation voltage V RMS  has a lower level under the condition of a low input voltage V L .  
         [0026]     The operation unit  60  outputs a first threshold voltage V C  in response to the compensation voltage V RMS  and the feedback voltage V FB  or a reference voltage V T . The operation unit  60  can be implemented by an adder or a subtractor. In this embodiment, the operation unit  60  is formed by an adder. Therefore, the first threshold voltage V C  is obtained by the sum of the feedback voltage V FB  and the compensation voltage V RMS .  
         [0027]     The comparator  40  is connected to the operation unit  60 . The positive input of the comparator  40  is connected to the output of the operation unit  60  to receive the first threshold voltage V C , and the negative input of the comparator  40  is connected to the reference voltage V T . The comparator  40  compares the reference voltage V T  with the first threshold voltage V C . The comparator  40  generates a control signal S C  once the first threshold voltage V C  is larger than the reference voltage V T . The control signal S C  can enable the PFC circuit  10  to perform the power factor correction and boost procedure. In consideration of practical circuit application, the comparator  40  can be implemented by a hysteresis comparator to allow the reference voltage V T  to have a hysteresis range.  
         [0028]     Under the condition of equal input power, when the input voltage V IN  is higher, the power converter  2  has a larger compensation voltage V RMS  but the reference voltage V T  keeps a constant. Because the first threshold voltage V C  generated is higher through the adder operation of the operation unit  60 , only a smaller feedback voltage V FB  is required to reach the upper limit of the hysteresis range of the comparator  40 . The comparator  40  outputs the control signal S C  for enabling the PFC converter  102  to perform the power factor correction and boost procedure in response to the first threshold voltage V C  related to the feedback voltage V FB . When the input voltage V IN  is lower, the compensation voltage V RMS  is also lower. Therefore, a larger feedback voltage V FB  is required to reach the upper limit of the hysteresis range of the comparator  40  for enabling the PFC converter  102  to perform the power factor correction and boost procedure. When the first threshold voltage V C  is smaller than the lower limit of the hysteresis range, the comparator  40  outputs the control signal S C  for disabling the PFC converter  102  to close the power factor correction and boost procedure.  
         [0029]     Reference is made to  FIG. 3  and  FIG. 5  is a curve showing the relation between the input voltage and the input power of a power converter of the present invention when the PFC circuit is activated. The present invention uses the compensation voltage V RMS  to compensate the feedback voltage V FB  so that the first threshold voltage V C  generated by the operation unit  60  can keep within a stable range. Therefore, the input power P INH  for a high input voltage V H  to activate the PFC converter  102  to perform the boost procedure is approximately equal to the input power P INL  for a low input voltage V L  to activate the PFC converter  102  to perform the boost procedure, hence improving the drawback in the prior art that the PFC circuit  10  cannot be activated to perform the power factor correction and boost procedure before the input power reaches 75 W under the condition of a high input voltage V H .  
         [0030]     Reference is made to  FIG. 3  and  FIG. 4  is a circuit diagram according to a second preferred embodiment of the present invention. The major difference between the second preferred embodiment and the first preferred embodiment is the operation unit. The operation unit is implemented by a subtractor in the second preferred embodiment. The connection relations between the operation unit  60   a,  the comparator  40  and the feedback unit  30  are also different. In the second preferred embodiment, the operation unit  60   a  is coupled to the voltage divider  50  to receive the compensation voltage V RMS  and coupled to the reference voltage V T . The operation unit  60   a  outputs a second threshold voltage V TH  for building the hysteresis range of the comparator  40 . The second threshold voltage V TH  is the difference value between the reference voltage V T  and the compensation voltage V RMS .  
         [0031]     The negative input of the comparator  40  is coupled to the operation unit  60   a  to receive the second threshold voltage V TH , and the positive input of the comparator  40  is coupled to the feedback unit  30  to receive the feedback voltage V FB . The control signal S C  is to enable the PFC circuit  10  to perform the power factor correction and boost procedure once the feedback voltage V FB  is larger than the upper limit of the hysteresis range of the comparator  40 . The control signal S C  is to disable the PFC circuit  10  to close the power factor correction and boost procedure once the feedback voltage V FB  is smaller than a lower limit of the hysteresis range of the comparator  40 .  
         [0032]     Reference is made to  FIG. 4  again. Under the condition of equal input power, when the input voltage V IN  is high (V H ), the power converter  2   a  has a large compensation voltage V RMS  but the reference voltage V T  is constant. Because the second threshold voltage V TH  generated is smaller through the subtractor operation of the operation unit  60   a,  only a smaller feedback voltage V FB  is required to reach the upper limit of the hysteresis range of the comparator  40 . The comparator  40  outputs the control signal S C  for enabling the PFC converter  102  to perform the power factor correction and boost procedure in response to the second threshold voltage V TH  related to the feedback voltage V FB . When the input voltage V IN  is low (V L ), the compensation voltage V RMS  is small but the reference voltage V T  is constant. Because the second threshold voltage V TH  generated is larger through the subtractor operation of the operation unit  60   a,  a higher feedback voltage V FB  is required to reach the upper limit of the hysteresis range of the comparator  40  for enabling the PFC converter  102  to perform the power factor correction and boost procedure.  
         [0033]     To sum up, the power converter of the present invention makes use of feed-forward voltage compensation to improve the drawback in the prior art that the difference of the input power P IN  between the lower input voltage V L  and the higher input voltage V H  for enabling the PFC converter  102  is too much. Moreover, this compensation method can activate the PFC circuit  10  before the input power is larger than 75 W even under the conditions of higher input voltage V H  (larger than 180 Vac) and heavy load (larger than 150 W). The requirement of the international standard IEC1000-3-2 can thus be met.  
         [0034]     Although the present invention has been described with reference to the preferred embodiment thereof, it will be understood that the invention is not limited to the details thereof. Various substitutions and modifications have been suggested in the foregoing description, and other will occur to those of ordinary skill in the art. Therefore, all such substitutions and modifications are intended to be embraced within the scope of the invention as defined in the appended claims.