Abstract:
A method of manufacturing a semiconductor device includes preparing a semiconductor element including a main surface over which a wiring layer is formed, forming a seed layer over the main surface, forming a resist layer over the main surface such that the resist layer covers the seed layer, removing a part of the resist layer by exposing and developing the resist layer, in which a part of the wiring layer is exposed from the removed part of the resist layer, forming a plurality of conductive posts electrically connected to the wiring layer at the removed part of the resist layer, forming a solder layer at each top of the plurality of conductive posts, removing a residual resist layer over the main surface, removing an area other than an area which overlaps with the seed layer, and melting the solder layer and forming a surface shape.

Description:
[0001]    The present application is a Continuation Application of U.S. patent application Ser. No. 12/926,642, filed on Dec. 1, 2010, which is a Divisional Application of U.S. patent application Ser. No. 12/153,878, filed on May 27, 2008, which is based on and claims priority from Japanese patent application No. 2007-139971, filed on May 28, 2007, the entire contents of which are incorporated herein by reference. 
     
    
     BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The present invention relates to a semiconductor element and a method of manufacturing a semiconductor element. 
         [0004]    2. Description of the Related Art 
         [0005]    Conventionally, a three-dimensional mounting technology involving stacking semiconductor elements has been proposed along with the miniaturization and high-density mounting of semiconductor devices. 
         [0006]    A semiconductor element used for the three-dimensional mounting technology includes a conductive post portion protruding from the surface of a semiconductor substrate (for example, see JP 2002-280407 A). 
         [0007]    In JP 2002-280407 A, when a semiconductor element is three-dimensionally mounted, a molten solder is disposed between the conductive post portion (first metal layer) and a bonding portion (for example, electrode) formed on a semiconductor substrate of another semiconductor element, and then the conductive post portion and the bonding portion formed on the semiconductor substrate of the another semiconductor element are bonded. 
         [0008]    However, when such a semiconductor element is three-dimensionally mounted, the molten solder may flow out from between the conductive post portion and the bonding portion. In some cases, the molten solder which is flowing out may come into contact with an adjacent conductive post portion, thereby causing a short circuit. Moreover, the contact of the molten solder with an insulating layer of the surface of the semiconductor element may also cause the generation of an electrical parasitic capacitance. 
         [0009]    In order to solve the problems, there is proposed a method involving arranging a gap material for holding a predetermined interval formed between semiconductor elements to be stacked (see JP 2005-123601 A). 
         [0010]    There is also proposed a method involving forming a projecting portion protruding higher than a post electrode on the surface near the post electrode of a semiconductor element (see JP 2005-150299 A). 
         [0011]    In addition, as shown in  FIG. 7 , there is proposed a method involving forming, on a semiconductor element body  101  made of silicon of a semiconductor element  100 , a columnar first terminal  102  protruding from the semiconductor element body  101 , and, on the first terminal  102 , a mushroom-like second terminal  103  (see JP 2005-347678 A). 
         [0012]    Note that, in JP 2005-347678 A, there is a description that the mushroom-like second terminal  103  is formed so as to protrude from the semiconductor element body  101  as shown in  FIG. 8 . 
         [0013]    The present inventor has recognized that the conventional technologies have the following problems. 
         [0014]    In JP 2005-123601 A and JP 2005-150299 A, the gap material and the projecting portion are provided, which increases the number of materials and also requires production processes for providing the gap material and the projecting portion. As a result, the production processes become complicated and sufficient production stability cannot be obtained. 
         [0015]    In JP 2005-347678 A, the semiconductor element  100  includes the second terminal  103 . The second terminal  103  has a mushroom-like shape and has a recessed portion  103 A recessed in a direction substantially orthogonal to a protruding direction of the second terminal  103 . Consequently, the strength of the second terminal  103  is liable to be weak and the semiconductor element of JP 2005-347678 A has an insufficient production stability. 
         [0016]    Further, in the case where the second terminal  103  is provided on the columnar first terminal  102  protruding from the semiconductor element body  101 , the structure becomes complicated and the production stability of the semiconductor element becomes more insufficient. 
       SUMMARY 
       [0017]    According to an aspect of the present invention, there is provided a semiconductor element including: a semiconductor substrate; and a conductive post portion protruding from the semiconductor substrate, in which the conductive post portion has a distal end surface curved in a substantially arc shape, and is free from a recessed portion recessed in a direction intersecting with a protruding direction of the conductive post portion on an outer surface extending from a distal end to a proximal end on a semiconductor substrate side. 
         [0018]    In this case, it is sufficient if the conductive post portion be free from the recessed portion which is recessed in the direction intersecting with the protruding direction of the conductive post portion on the outer surface extending from the distal end to the proximal end thereof. For example, the conductive post portion may be formed in a substantially hemispherical shape. Moreover, in the case where the conductive post portion includes a first portion having the distal end surface which is curved in an arc shape and a second portion extending from a periphery of the distal end surface of the first portion to the semiconductor substrate side, the second portion may be formed in a non-curved shape. Alternatively, the second portion may be formed in a tapered shape or reverse tapered shape so that the side surface of the second portion may be inclined against the surface of the semiconductor substrate at a substantially constant angle. 
         [0019]    According to the present invention, the conductive post portion has the distal end surface which is curved in a substantially arc shape. Accordingly, when the semiconductor element of the present invention and another semiconductor element or a substrate are connected with each other, a distance between a peripheral portion of the distal end surface of the conductive post portion and a bonding portion provided to the another semiconductor element or the substrate becomes wider. 
         [0020]    In the case where the semiconductor element of the present invention is connected with the another semiconductor element or the substrate, the conductive post portion is connected with the bonding portion of the another semiconductor element or the like through molten solder. The molten solder can be accommodated in a space defined between the bonding portion and the peripheral portion of the distal end surface of the conductive post portion. This prevents the molten solder from flowing out up to the side of the bonding portion. 
         [0021]    In addition, such a semiconductor element of the present invention has an excellent production stability. 
         [0022]    Specifically, as described above, the present invention allows the molten solder to be accommodated in the space defined between a bonding portion of another semiconductor element or the like and the peripheral portion of the distal end surface of the conductive post portion. As a result, the gap materials and the projecting portions, which have been conventionally employed, are unnecessary. Therefore, the number of materials for a semiconductor element is prevented from increasing, and further the production processes can be simple, thereby obtaining a semiconductor element having an excellent production stability. 
         [0023]    In the semiconductor element  100  shown in  FIG. 7 , the recessed portion  103 A is formed on the outer surface extending from the distal end of the second terminal  103  to the proximal end of the first terminal  102 . 
         [0024]    Also in the semiconductor element shown in  FIG. 8 , the recessed portion  103 A is formed on the outer surface extending from the distal end of the second terminal  103  to the proximal end of the first terminal  102 . 
         [0025]    In the case where the recessed portion is formed as described above, the strength of the terminal is liable to be weak, and thus the semiconductor element of JP 2005-347678 A has an insufficient production stability. 
         [0026]    In contrast, the semiconductor element of the present invention is not formed with the recessed portion which is recessed in the direction intersecting with the protruding direction of the conductive post portion on the outer surface extending from the distal end to the proximal end on the semiconductor substrate side. Accordingly, the strength of the conductive post portion can be ensured, and thus the semiconductor element has an excellent production stability. 
         [0027]    In addition, these days there are demands for miniaturization of conductive post portions in semiconductor elements. In the case where the shape of the conductive post portion in which the recessed portion is not formed is employed as in the present invention, the strength of the conductive post portion can be ensured, thereby facilitating the miniaturization thereof. 
         [0028]    According to another aspect of the present invention, there is provided a semiconductor element including: a semiconductor substrate; and a conductive post portion protruding from the semiconductor substrate, in which: the conductive post portion has a distal end surface and is provided to the semiconductor substrate so that the distal end surface is curved in a substantially arc shape; the conductive post portion is provided thereon with a solder layer covering the distal end surface; and the solder layer at a top of the distal end surface is thicker than the solder layer at other portion. 
         [0029]    When the conductive post portion and an electrode formed on a substrate (or another semiconductor element) on which the former semiconductor element is mounted are bonded, making the solder layer gradually increased in thickness from the peripheral portion of the distal end surface of the conductive post portion toward the top of the distal end surface of the conductive post portion allows the solder to be reliably prevented from flowing out from the peripheral portion of the distal end surface of the conductive post portion toward the side of the conductive post portion, even in the case where the solder existing at the top of the conductive post portion flows out toward the peripheral portion side of the distal end surface of the conductive post portion. 
         [0030]    The semiconductor element described above can be manufactured by the following method. 
         [0031]    Specifically, according to still another aspect of the present invention, there is provided a method of manufacturing a semiconductor element including: a semiconductor substrate; a conductive post portion protruding from the semiconductor substrate; and a solder layer provided on the conductive post portion, the method including the steps of: forming on the semiconductor substrate the conductive post portion having a distal end surface curved in a substantially arc shape by electrolytic plating; forming the solder layer on the distal end surface of the conductive post portion; and reflowing the solder layer to form the solder layer which has the thickest portion at a top of the distal end surface of the conductive post portion. 
         [0032]    According to the present invention, there are provided a semiconductor element which can be bonded satisfactorily with another semiconductor element or a substrate and has an excellent production stability, and a method of manufacturing a semiconductor element. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0033]    The above and other objects, advantages and features of the present invention will be more apparent from the following description of certain preferred embodiments taken in conjunction with the accompanying drawings, in which: 
           [0034]      FIG. 1  is a sectional view showing a semiconductor element according to an embodiment of the present invention; 
           [0035]      FIGS. 2A to 2D  are sectional views showing production processes of a semiconductor element; 
           [0036]      FIGS. 3A to 3D  are sectional views showing production processes of the semiconductor element; 
           [0037]      FIG. 4  is a sectional view showing a state in which semiconductor elements are stacked; 
           [0038]      FIG. 5  is a sectional view showing a semiconductor element according to a modification of the present invention; 
           [0039]      FIG. 6  is a sectional view showing a state in which semiconductor elements are stacked; 
           [0040]      FIG. 7  is a sectional view showing a semiconductor element of a conventional technology; and 
           [0041]      FIG. 8  is a schematic view showing a semiconductor element of the conventional technology. 
       
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
       [0042]    Hereinafter, an embodiment of the present invention will be described with reference to the drawings. 
         [0043]    First, a description will be made of outlines of a semiconductor element  1  of this embodiment. 
         [0044]    As shown in  FIGS. 1 and 4 , the semiconductor element  1  of this embodiment includes a semiconductor substrate  11  and a conductive post portion  121  protruding from the semiconductor substrate  11 . 
         [0045]    The conductive post portion  121  is provided to the semiconductor substrate  11  without forming, on the outer surface extending from the distal end to the proximal end on the semiconductor substrate  11  side, a recessed portion which is recessed in a direction intersecting with a protruding direction of the conductive post portion  121 . 
         [0046]    Further, a distal end surface of the conductive post portion  121  is curved in a substantially arc shape. 
         [0047]    Next, a detailed description will made of the semiconductor element  1 . As shown in  FIG. 1 , the semiconductor element  1  includes the semiconductor substrate  11  and a post  12  provided on the semiconductor substrate 
         [0048]    On the semiconductor substrate  11 , there are formed multiple conductive through-hole portions (through-hole electrodes)  111  passing through the semiconductor substrate  11 . The multiple through-hole electrodes  111  are arranged at predetermined pitches. 
         [0049]    Each of the through-hole electrode  111  includes conductors such as copper, tungsten, and polysilicon, and may include materials different from those of the conductive post portion  121 . 
         [0050]    A wiring layer  112  (layer including wiring and an insulating layer) is formed on one surface of the semiconductor substrate  11 . 
         [0051]    An insulating layer  113  is formed on the other surface of the semiconductor substrate  11  on which the wiring layer  112  is not formed. The insulating layer  113  is provided with an opening and an electrode  14  which is arranged so as to bury the opening therein. 
         [0052]    There are provided multiple electrodes  14 , each of which is connected with each of the through-hole electrodes  111 . 
         [0053]    There are multiple posts  12  which are arranged on the semiconductor substrate  11 , each of which is connected with each of the through-hole electrodes  111  via the wiring layer  112 . 
         [0054]    The post  12  is used for connection between the semiconductor element  1 , and another semiconductor element  1 , a substrate  3 , or the like (see  FIG. 4 ). 
         [0055]    The post  12  includes the conductive post portion  121  and a solder layer  122 . 
         [0056]    The conductive post portion  121  is mounted on the semiconductor substrate  11  so as to protrude therefrom. The conductive post portion  121  is a bonding portion which is bonded by the solder of the solder layer  122  when bonding the semiconductor element  1  to another semiconductor element  1  or the like. 
         [0057]    The conductive post portion  121  is curved over the entire surface with the distal end surface thereof forming an arc shape. The conductive post portion  121  is provided to the semiconductor substrate  11  without forming, on the outer surface extending from the distal end to the proximal end on the semiconductor substrate  11  side, a recessed portion which is recessed in a direction intersecting with a protruding direction of the conductive post portion  121 . 
         [0058]    Further, the conductive post portion  121  does not include an eaves portion projecting in a direction substantially parallel to the substrate surface of the semiconductor substrate  11 . 
         [0059]    In this embodiment, in a cross section of the conductive post portion  121  orthogonally intersecting with the substrate surface of the semiconductor substrate  11 , the outline thereof extends from the distal end to the proximal end without having an inflection point. 
         [0060]    Also, in this embodiment, the conductive post portion  121  protrudes from the semiconductor substrate  11  without forming a constriction therein. 
         [0061]    In this embodiment, the distal end surface of the conductive post portion  121  corresponds to the entire surface facing a bonding portion (electrode  14 ) of another semiconductor element  1  or the like when the semiconductor element  1  is bonded to another semiconductor element  1  or the like. 
         [0062]    The conductive post portion  121  includes a first portion  12 IA having the distal end surface and a second portion  121  B extending from the periphery of the distal end surface of the first portion  121 A toward the semiconductor substrate  11  side in a columnar shape. (See  FIG. 3D .) 
         [0063]    The first portion  121 A is curved over the entire surface so as to assume an arc whose top is approximately at the center of the distal end surface of the first portion  121 A, that is, so as to have a substantially arc shape. In this embodiment, the distal end surface of the first portion  121 A has a substantially spherical shape. 
         [0064]    The first portion  121 A is connected with the semiconductor substrate  11  through the periphery of the distal end surface. Specifically, in this embodiment, the first portion  121 A is connected with the semiconductor substrate  11  through the periphery of the distal end surface, that is, the second portion  121 B extending from the periphery of the distal end surface toward the semiconductor substrate side. 
         [0065]    The second portion  121 B has a cross section having a substantially rectangular shape which orthogonally intersects with the substrate surface of the semiconductor substrate  111 . In this embodiment, the second portion  121 B has a substantially columnar shape. 
         [0066]    In this embodiment, the second portion  121 B has a cross section having a substantially rectangular shape, but the shape of second portion  121 B is not limited thereto. The second portion  121 B may have a reverse tapered shape gradually increased in diameter or a tapered shape gradually reduced in diameter from the proximal end on the semiconductor element  111  side toward the distal end of the first portion  121 A. 
         [0067]    A width dimension of the proximal end of the second portion  121 B in a direction along the substrate surface of the semiconductor substrate  11  is the same as that of the through-hole electrode  111  in the direction along the substrate surface of the semiconductor substrate  11 . Alternatively, the width dimension of the proximal end of the second portion  121 B is larger than that of the through-hole electrode  111 . 
         [0068]    The conductive post portion  121  as described above includes a conductive material having a higher melting point than that of the solder layer  122 , such as a metal material. For example, the conductive post portion  121  includes copper or nickel. 
         [0069]    The solder layer  122  covers the distal end surface of the conductive post portion  121 . In this embodiment, the solder layer  122  covers the entire distal end surface of the conductive post portion  121 . 
         [0070]    The solder layer  122  is formed along the distal end surface of the conductive post portion  121  and formed with the surface curved in a substantially arc shape. 
         [0071]    The solder layer  122  is thickest at the top of the conductive post portion  121  and becomes thicker from the periphery of the distal end surface of the conductive post portion  121  toward the top of the distal end surface thereof. 
         [0072]    As a material of the solder layer  122 , a Pb-free solder such as Sn—Ag based solder, Sn—Bi based solder, or Sn—Zn based solder may be used. As the solder layer  122 , a solder containing Pb such as Sn/95Pb or Sn/ 63 Pb may be used. 
         [0073]    Multiple number of the posts  12  as described above are provided on a seed layer  13  formed on the wiring layer  112  of the semiconductor substrate  11  so as to cover the entire surface of the seed layer  13 . 
         [0074]    The seed layer  13  is directly formed on the wiring layer  112  of the semiconductor substrate  11 . A width dimension of the seed layer  13  is equal to or larger than that of the through-hole electrode  111  of the semiconductor substrate  11 . 
         [0075]    Examples of the seed layer  13  include a layer containing a metal such as Cu or Ti. 
         [0076]    Next, a description will be made of a method of manufacturing the above semiconductor element  1  with reference to  FIGS. 2 and 3 . 
         [0077]    The method of manufacturing the semiconductor element  1  includes the steps of: forming on the semiconductor substrate  11  the conductive post portion  121  which has a distal end surface curved in a substantially arc shape and is free from a recessed portion which is recessed in a direction intersecting with a protruding direction of the conductive post portion  121  on the outer surface extending from the distal end to the proximal end on the semiconductor substrate  11  side by electrolytic plating; forming the solder layer  122  on the distal end surface of the conductive post portion  121 ; and reflowing the solder layer  122  to form the solder layer  122  which has the thickest portion at the top of the distal end surface of the conductive post portion  121 . 
         [0078]    Details of the method will be described below. 
         [0079]    As shown in  FIG. 2A , the seed layer  13  covering the wiring layer  112  located on the surface of the semiconductor substrate  11  is formed by sputtering. 
         [0080]    Next, as shown in  FIG. 2B , a photoresist  2  is applied so as to cover the seed layer  13 . The photoresist  2  is then exposed and developed to selectively remove the photoresist  2  as shown in  FIG. 2C . Specifically, the photoresist  2  arranged at a position corresponding to that of the through-hole electrode  111  is removed. 
         [0081]    Then, the conductive post portion  121  is formed ( FIG. 2D ). The conductive post portion  121  is formed by electrolytic plating. Specifically, the electrolytic plating is performed by immersing the semiconductor substrate  11  on which the photoresist  2  is formed in a plating solution containing a metal such as Cu or Ni, constituting the conductive post portion  121 . In this case, various additives are appropriately added in the plating solution. For example, polyethylene glycol is added as the additive. 
         [0082]    The conductive post portion  121  formed as described above is curved so as to assume an arc whose top is approximately at the center of the distal end surface thereof. In this embodiment, the distal end surface is curved in a substantially arc shape. 
         [0083]    Subsequently, a solder constituting the solder layer  122  is plated on the conductive post portion  121  ( FIG. 3A ). The thickness of the solder on the conductive post portion  121  is substantially uniform in this example. 
         [0084]    Next, the photoresist  2  is removed as shown  FIG. 3B . 
         [0085]    Then, as shown in  FIG. 3C , the seed layer  13  is selectively removed. Specifically, an exposed part of the seed layer  13  on which the conductive post portion  121  is not formed is removed by etching. 
         [0086]    As shown in  FIG. 3D , the semiconductor substrate  11  and the post  12  are subjected to heat treatment and reflow is performed under predetermined conditions. Various conditions for reflow are appropriately adjusted and therefore the surface of the solder layer  122  is curved in a substantially arc shape and the top of the conductive post portion  121  has the largest thickness. Further, the solder layer  122  is gradually increased in thickness from the periphery of the distal end surface of the conductive post portion  121  toward the top of the distal end surface thereof. 
         [0087]    Through the above steps, the semiconductor element  1  can be obtained. 
         [0088]    The semiconductor element  1  thus obtained is three-dimensionally stacked as shown in  FIG. 4  to constitute a semiconductor device. 
         [0089]    Specifically, the solder layer  122  of the post  12  provided to the semiconductor element  1  is molten to bond an electrode  14  of another semiconductor element  1  or the substrate  3  therewith, applied with pressure, and stacked. 
         [0090]    The substrate  3  is provided on the surface thereof with the insulating layer  113  and he electrode  14  is provided to an opening of the insulating layer  113 . 
         [0091]    Effects of the present invention will be described below. 
         [0092]    The semiconductor element  1  protrudes from the semiconductor substrate  11  and includes the conductive post portion  121  having a distal end surface curved in a substantially arc shape. Accordingly, when the semiconductor element  1  is stacked on the substrate  3  or another semiconductor element  1 , a distance between the semiconductor element  1  and the substrate  3  or a distance between the electrode  14  of another semiconductor element  1  and the peripheral portion of the distal end surface of the conductive post portion  121  becomes wider. 
         [0093]    When the post  12  of the semiconductor element  1  and the electrode  14  of another semiconductor element  1  or the substrate  3  are bonded with each other, the solder layer  122  is molten to perform bonding, in which the molten solder can be accommodated in a space defined between the electrode  14  and the peripheral portion of the distal end surface of the conductive post portion  121 . 
         [0094]    Therefore, the molten solder layer  122  can be prevented from flowing out toward the adjacent post  12  or from being attached to the insulating layer  113 . 
         [0095]    The above-mentioned shape of the conductive post portion  121  can suppress flowing out of the molten solder layer  122 , so the gap materials and projecting portions conventionally employed are unnecessary. Therefore, the number of materials for the semiconductor element  1  is prevented from increasing and further the production processes can be simple, thereby obtaining the semiconductor element  1  having an excellent production stability. 
         [0096]    Further, in the case of providing the gap materials or projecting portions as in the conventional technologies, the gap materials or projecting portions may inhibit flow of a resin when the semiconductor element  1  is stacked and then sealed by the resin, whereby a void may occur in the resin. 
         [0097]    On the other hand, this embodiment does not require the gap materials or projecting portions, thereby preventing occurrence of the void in the resin when the semiconductor element  1  is sealed by the resin. 
         [0098]    In a conventional semiconductor element shown in  FIG. 7 , a recessed portion  103 A is formed on the outer surface extending from a distal end of a second terminal  103  to a proximal end of a first terminal  102 . 
         [0099]    Also in a semiconductor element shown in  FIG. 8 , the recessed portion  103 A is formed on the outer surface extending from the distal end of the second terminal  103  to the proximal end of the first terminal  102 . 
         [0100]    In the case where the recessed portion is formed as described above, the strength of the terminal is liable to be weak and the semiconductor element of JP 2005-347678 A has an insufficient production stability. 
         [0101]    In contrast, the semiconductor element  1  of the present invention is not formed with the recessed portion which is recessed in the direction intersecting with a protruding direction of the conductive post portion  121  on the outer surface extending from the distal end to the proximal end on the semiconductor substrate  11  side. Accordingly, the strength of the conductive post portion  121  can be ensured and thus the semiconductor element  1  has an excellent production stability. 
         [0102]    In addition, these days there are demands for miniaturization of conductive post portions in semiconductor elements. In the case where the shape of the conductive post portion  121  in which the recessed portion is not formed is employed as in this embodiment, the strength of the conductive post portion  121  can be ensured, thereby facilitating the miniaturization thereof. 
         [0103]    Further, in this embodiment, the conductive post portion  121  does not include an eaves portion projecting in a direction substantially parallel to the substrate surface of the semiconductor substrate  11 , which leads to a simpler shape of the conductive post portion  121 . 
         [0104]    Also, the width dimension of the proximal end of the conductive post portion  121  in a direction along the substrate surface of the semiconductor substrate  11  is equal to or larger than that of the through-hole electrode  111  in the direction along the substrate surface of the semiconductor substrate  11 . Therefore, compared with the semiconductor element shown in  FIG. 8 , the conductive post portion  121  can be firmly fixed to the semiconductor substrate  11 . 
         [0105]    In this embodiment, the solder layer  122  is thickest at the top of the distal end surface of the conductive post portion  121 . That is, the solder layer  122  is thinner in a region excluding the top of the distal end surface of the conductive post portion  121  than the top of the distal end surface of the conductive post portion  121 . Therefore, when the semiconductor element  1  and another semiconductor element  1  or the like are bonded with each other, flowing out of the solder toward the side of the conductive post portion  121  can be suppressed. 
         [0106]    In particular, when the post  12  and the electrode  14  are bonded to each other, making the solder layer  122  gradually increased in thickness from the peripheral portion of the distal end surface of the conductive post portion  121  toward the top thereof allows the solder to be reliably prevented from flowing out from the peripheral portion of the distal end surface of the conductive post portion  121  toward the side of the conductive post portion  121 , even in the case where the solder existing on the top of the conductive post portion  121  flows out toward the peripheral portion side of the distal end surface of the conductive post portion  121 . 
         [0107]    In the case where the semiconductor element  1  is preserved for a long period of time, the metal constituting the conductive post portion  121  may be diffused to the solder layer  122 . Due to the diffusion of the metal constituting the conductive post portion  121 , the surface composition of the solder layer  122  may be changed. However, the solder layer  122  is thickest at the top of the conductive post portion  121 , so a change of the surface composition of the solder layer  122  can be suppressed at the top of the conductive post portion  121 . 
         [0108]    In this embodiment, the conductive post portion  121  includes a metal containing Cu, Ni, or the like, so melting of the conductive post portion  121  can be reliably prevented when the solder layer  122  is molten. 
         [0109]    In this embodiment, the conductive post portion  121  is formed by electrolytic plating. By appropriately adjusting the additives of the plating solution, the conductive post portion  121  can be curved over the entire surface with the distal end surface thereof in a substantially arc shape. That is, by appropriately adjusting the additives of the plating solution, the conductive post portion  121  can be formed easily. 
         [0110]    Note that the present invention is not limited to the above-mentioned embodiment and includes modification, improvement, and the like in the range in which an object of the present invention can be achieved. 
         [0111]    For example, in the above embodiment, the post  12  of the semiconductor element  1  is formed on the wiring layer  112 , but the position of the post  12  is not limited thereto. For example, the post  12  may be directly formed on the other surface of the semiconductor substrate  11  on which the wiring layer  112  is not formed as in the case of a semiconductor element  4  shown in  FIG. 5 . 
         [0112]    In the semiconductor element  4 , the insulating layer  113  is formed on the wiring layer  112 . The electrode  14  is provided to an opening formed on the insulating layer  113  and is connected with the wiring layer  112 . 
         [0113]    Other components of the semiconductor element  4  are the same as those of the semiconductor element  1  of the above embodiment. 
         [0114]    The semiconductor element  4  as described above is stacked as shown in  FIG. 6 . 
         [0115]    In the semiconductor element  4  as shown in  FIGS. 5 and 6 , the same effects as in the embodiment can be achieved. 
         [0116]    Note that, in semiconductor element  4 , the conductive post portion  121  of the post  12  may be integrated with the through-hole electrode  111 . 
         [0117]    Further, in the embodiment, the solder layer  122  is thickest at the top of the conductive post portion  121 , but the thickness of the solder layer  122  is not limited thereto and may be uniform. 
         [0118]    Also, in the embodiment, the conductive post portion  121  includes copper or nickel, but the components of the conductive post portion  121  are not limited thereto and may include other metals. 
         [0119]    However, in the case where the conductive post portion  121  includes copper or nickel as in the embodiment, the conductive post portion  121  can be easily formed by electrolytic plating. That is, by adjusting the additives in the plating solution, the distal end surface of the conductive post portion  121  is curved in a substantially arc shape by electrolytic plating. Therefore, the conductive post portion  121  having the distal end surface can be easily formed. 
         [0120]    Although the present invention has been described above in connection with several preferred embodiments thereof, it is apparent that the present invention is not limited to above embodiments, but may be modified and changed without departing from the scope and spirit of the invention.