Abstract:
A method of etching a polysilicon layer comprising the following steps. A polysilicon layer is formed over a structure and the polysilicon layer is etched using at least a C 2 F 6  etching process to form an etched polysilicon layer having a vertical profile.

Description:
FIELD OF THE INVENTION  
       [0001]     The present invention relates generally to semiconductor fabrication and more specifically to etching poly films.  
       BACKGROUND OF THE INVENTION  
       [0002]     Polysilicon comprises a critical layer in semiconductor designs and its etched profile must be as vertical as possible. Some technology poly films have posted high dosage implanted levels for device requirements, but is difficult to control the vertical profile in etch chambers for higher implant level poly films.  
         [0003]     Although bias power and bombardment gas, for example HBr, are used to control the etched poly film profile in etch chamber designs, sometimes this isn&#39;t sufficient and so-called necking issues persist.  
         [0004]     U.S. Pat. No. 6,214,736 B1 to Rotondaro et al. describes a silicon processing method employing a plasma process which produces an undamaged and uncontaminated silicon surface by consuming silicon by continuous oxidation through a surface oxide layer and a simultaneous etch of the exposed silicon oxide surface.  
         [0005]     U.S. Pat. No. 6,284,574 B1 to Petrarca et al. describes a structure and process for facilitating the conduction of heat away from a semiconductor device.  
         [0006]     U.S. Pat. No. 6,133,156 to Langley describes an anisotropic etch method.  
       SUMMARY OF THE INVENTION  
       [0007]     Accordingly, it is an object of one or more embodiments of the present invention to provide an improved method of etching polysilicon films to achieve vertical-etch profiles.  
         [0008]     Other objects will appear hereinafter.  
         [0009]     It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a polysilicon layer is formed over a structure and the polysilicon layer is etched using at least a C 2 F 6  etching process to form an etched polysilicon layer having a vertical profile. The etched polysilicon layer having an upper surface.  
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0010]     The present invention will be more clearly understood from the following description taken in conjunction with the accompanying drawings in which like reference numerals designate similar or corresponding elements, regions and portions and in which:  
         [0011]     FIGS.  1  to  3  schematically illustrate a preferred embodiment of the present invention.  
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT  
       [0000]     Initial Structure— FIG. 1   
         [0012]     As shown in  FIG. 1 , a structure  10  includes an overlying dielectric film  12  that is preferably comprised of polysilicon, doped polysilicon or amorphous silicon and is more preferably polysilicon as will be used for illustrative purposes hereafter. Polysilicon film  12  has a thickness of preferably from about 1500 to 3000 Å and more preferably from about 1800 to 2000 Å.  
         [0013]     Structure  10  is preferably a silicon substrate and is understood to possibly include a semiconductor wafer or substrate, active and passive devices formed within the wafer, conductive layers and dielectric layers (e.g., inter-poly oxide (IPO), intermetal dielectric (IMD), etc.) formed over the wafer surface. The term “semiconductor structure” is meant to include devices formed within a semiconductor wafer and the layers overlying the wafer.  
         [0014]     A patterning masking layer  14  may be formed over polysilicon film  12 . Masking layer  14  is preferably comprised of photoresist or an oxide mask and is more preferably photoresist.  
         [0000]     Etching of Polysilicon Layer  12 — FIG. 2   
         [0015]     As shown in  FIG. 2 , polysilicon layer  12  is patterned using an etch process  16  employing C 2 F 6  gas at preferably from about 10 to 90 sccm and more preferably from about 10 to 40 sccm under the following further conditions: 
        total pressure: preferably from about 4 to 25 mTorr and more preferably from about 8 to 20 mTorr;     temperature: preferably from about 50 to 70° C. and more preferably from about 63 to 67° C.;     time: preferably from about 20 to 80 seconds and more preferably from about 30 to 60 seconds;     bias power: preferably from about 80 to 200 W and more preferably from about 80 to 150 W;     Cl 2  gas: preferably from about 10 to 100 sccm and more preferably from about 10 to 40 sccm;     HBr gas: preferably from about 100 to 250 sccm and more preferably from about 150 to 200 sccm;     He gas: preferably from about 50 to 150 sccm and more preferably from about 80 to 120 sccm;     O 2  gas: preferably from about 0 to 5 sccm and more preferably from about 0 to 3 sccm; and     source power: preferably from about 200 to 400 W and more preferably from about 250 to 350 W.        
 
         [0025]     The ratio of C 2 F 6 :Cl2 is preferably from about 1:8 to 2:3.  
         [0026]     Etch process  16  is preferably a two step process, that is a first step consisting of a C 2 F 6 -containing etch step to achieve a high dosage implanted polysilicon film/layer  12 ′ structure and a second step consisting of a Cl 2 -containing etch step to solve C 2 F 6  polymer rich issue, i.e. C 2 F 6  gas will produce much polymer residue. The second step Cl 2 -containing etch step uses an endpoint mode type to prevent substrate  10  damage issue.  
         [0027]     The second step Cl 2 -containing etch step employing a Cl 2 , He, HBr and O 2 -containing gas to prevent chamber polymer condition over high issue, i.e. a high chamber polymer is not good. The higher polymer condition, taper profile is generated easily as opposed to the desired vertical profile.  
         [0028]     Polysilicon layer  12  may be patterned using, for example, patterned masking layer  14  as a mask as shown in  FIG. 2 .  
         [0029]     As shown in  FIG. 2 , as polysilicon layer  12  is etched to formed etched polysilicon layer  12 ′, passivation ions, i.e. those ions that would form polymer on the film/layer  12  surface to generate vertical profile, are implanted into the polysilicon layer  12  as at  20  to form a passivation layer portion  18  within etched polysilicon layer  12 ′.  
         [0030]     The passivation ions are preferably C 2 F 6 , C 4 F 8  or CF 4  and are more preferably C 2 F 6 .  
         [0031]     Passivation layer portion  18  has a passivation ion concentration of preferably from about 100 to 100,000 atoms/cm 3  and more preferably from about 1000 to 10,000 atoms/cm 3  and is from about 100 to 1000 Å thick and is more preferably from about 300 to 800 Å thick.  
         [0032]     Passivation layer portion  18  extends preferably from about 100 to 1000 Å and more preferably from about 300 to 800 Å beneath the upper surface  19  of the patterned polysilicon layer  12 ′ 
         [0033]     This passivation of polysilicon layer  12  during the C 2 F 6  etch process  16  achieves a vertical profile of etched polysilicon layer  12 ′ as shown in  FIGS. 2 and 3 .  
         [0000]     Further Processing— FIG. 3   
         [0034]     As shown in  FIG. 3 , any patterned masking layer  14  is removed and the structure is cleaned as necessary. Further processing may then proceed.  
       ADVANTAGES OF THE PRESENT INVENTION  
       [0035]     The advantages of one or more embodiments of the present invention include the use of C 2 F 6  gas to gain vertical profile in high dosage implanted poly film.  
         [0036]     While particular embodiments of the present invention have been illustrated and described, it is not intended to limit the invention, except as defined by the following claims.