Abstract:
A comparator with two thresholds includes a two-threshold latch in which one input and one output respectively form an input and an output of the comparator. The latch has a first node between a first power supply terminal and the output of the latch. The comparator also includes a first negative feedback loop acting on the first node for setting the first threshold of the comparator as a function of a first power supply potential. The first threshold is also a function of a first reference potential that is stable.

Description:
FIELD OF THE INVENTION  
         [0001]    The invention relates generally to a comparator with two switching thresholds. Such a device is commonly called a hysteresis trigger, and hereinafter in this document, it shall simply be called a trigger.  
         BACKGROUND OF THE INVENTION  
         [0002]    Such a trigger provides an output signal OUT at the output indicating the logic value of an analog input signal IN. The signal OUT is equal to the power supply potential VDD (corresponding to a logic one) when the signal IN rises to an upper threshold VH, and the signal OUT is equal to zero when the signal IN descends to a lower threshold VB (FIG. 1).  
           [0003]    A trigger of this kind is used, for example, to make an input terminal of an electronic circuit immune to noise. In this case, the trigger is used to filter the noises present at the input terminal, and thus makes it possible to obtain a filtered logic signal that can be more easily exploited than a non-filtered input signal.  
           [0004]    More specifically, the present invention relates to a comparator with two thresholds VH, VB comprising a latch with two switching thresholds. One input IN and one output OUT of this latch respectively form an input and an output of the comparator. The latch also includes a first midpoint or node A 1  and/or a second midpoint or node A 2 . A 1  is located between a first power supply terminal and the output OUT of the comparator. A 2  is located between a second power supply terminal and the output OUT of the comparator. The comparator also comprises a first negative feedback loop and/or a second negative feedback loop. The first negative feedback loop acts on the first midpoint A 1  to set the threshold VH of the comparator as a function of a first power supply potential VDD. The second negative feedback loop acts on the second midpoint A 2  to set the threshold VB of the comparator as a function of a second power supply potential GND.  
           [0005]    An example of such a trigger is shown in FIG. 2. It has two P-type transistors T 11 , T 12  and two N-type transistors T 13 , T 14 . A 11  four transistors are series-connected between a power supply terminal to which the first power supply potential VDD is applied, and a terminal to which the second power supply potential GND (or ground potential) is applied. The input signal IN of the trigger is applied to the common gates of the transistors T 11 , T 12 , T 13  and T 14 .  
           [0006]    The transistors T 11  to T 14  together form the latch that produces a logic signal, which is the inverse of the signal IN, at the common drain (point M) of the transistors T 12  and T 13 . The prior art trigger also has two transistors T 21 , T 22  and an inverter I. The inverter I is connected between the point M common to the transistors T 12 , T 13  and an output terminal of the trigger at which the signal OUT is produced. The transistor T 21  is a P-type transistor. Its source is connected to the common point A 2  of the transistors T 11  and T 12 , and the potential GND is applied to the drain of transistor T 21 , whose gate is connected to the point M. The transistor T 22  is an N-type transistor. Its source is connected to the common point A 1  of the transistors T 13  and T 14 , and the potential VDD is applied to the drain of transistor T 22 , whose gate is connected to the point M.  
           [0007]    The transistor T 22  forms the first negative feedback loop and the transistor T 21  forms the second negative feedback loop of the output of the trigger at the latch defined by the transistors T 11  to T 14 . When there is no negative feedback (i.e., in the absence of the transistors T 21 , T 22 ), the potentials at the points A 2  and A 1  are left floating and the latch has two switching thresholds VH and VB, both equal to VDD/2. The negative feedback loop formed by the transistor T 22  has the effect of lowering the value of the threshold VB, and the negative feedback loop formed by the transistor T 21  has the effect of raising the value of the threshold VH. In one example, for a power supply potential VDD of about 5.5 V, the potential VB is in the range of 2.5 V and potential VH is in the range of 3.75 V. The hysteresis Δ of the trigger, given by the relationship Δ=VH−VB, is thus in the range of 1.25 V. In general, a trigger is sized so as to obtain the highest possible hysteresis value, giving greater immunity to noise.  
           [0008]    The changes in the thresholds VB, VH and in the hysteresis value Δ of the trigger as a function of the potential VDD are shown in FIG. 4 in small, thick dashes (the temperature is constant and equal to 25° C.). The thresholds VB and VH increase logically with the potential VDD. VB and VH increase approximately linearly as a function of VDD. This is perfectly acceptable since the noise level (in terms of absolute value) to be filtered by a trigger depends on the level of the input signals, and therefore, of the potential VDD. The mean value of VB, VH and of the hysteresis Δ on a given power supply zone also depends on the size (in terms of the gate width/length ratio) of the transistors T 11  to T 14 .  
           [0009]    The changes in the thresholds VB, VH and in the hysteresis value Δ of the trigger as a function of the temperature is shown in FIG. 5 in small, thick dashes (VDD=4.5 V constant). The potential VH falls slightly with the temperature. In the example of FIG. 5, it falls by approximately −0.05 V in a 200° C. range. The potential VB rises slightly more markedly. In the example of FIG. 5, it rises by approximately +0.15 V in a 200° C. range.  
           [0010]    [0010]FIGS. 4 and 5 also show the drawbacks of prior art triggers, such as that of FIG. 2. The hysteresis Δ of the trigger is indeed highly sensitive to the value of the power supply potential VDD (FIG. 4). The hysteresis is also sensitive to the temperature of use (see FIG. 5). This is especially inconvenient inasmuch as, when sizing the circuits of an electronic component that uses a trigger, the hysteresis Δ of the trigger is especially taken into account. Consequently, a same electronic component comprising a trigger, sized for a given potential VDD and a given operating temperature, cannot be used with different power supply potential and/or different temperatures of use. This naturally limits the utility of such components.  
           [0011]    Finally, the hysteresis is particularly low for low values of VDD. This is also troublesome inasmuch as it is increasingly being sought to use electronic components with low power supply potentials, namely components for which it is always sought to have a high hysteresis value Δ providing improved immunity to noise.  
         SUMMARY OF THE INVENTION  
         [0012]    In view of the foregoing background, an object of the invention is to provide a trigger whose hysteresis is not sensitive to the power supply potential VDD of the trigger.  
           [0013]    Another object of the invention is to provide a trigger whose hysteresis is not sensitive to temperature.  
           [0014]    Yet another object of the invention is to provide a trigger whose hysteresis is high for low values of the power supply potential.  
           [0015]    These and other objects, advantages and in accordance with the invention are provided by a comparator with two thresholds comprising a two-threshold latch of which one input and one output respectively form an input and an output of the comparator. The latch may also have a first midpoint and/or a second midpoint. The first midpoint may be located between a first power supply terminal and the output of the comparator. The second midpoint may be located between a second power supply terminal and the output of the comparator. The comparator may also have a first negative feedback loop and/or a second negative feedback loop. The first negative feedback loop acts on the first midpoint to set the threshold of the comparator as a function of a first power supply potential. The second negative feedback loop acts on the second midpoint to set the threshold of the comparator as a function of a second power supply potential.  
           [0016]    In a comparator of this kind, an essential object of the invention (namely not being sensitive to the power supply potential) is achieved by the fact that the first threshold is also a function of a first stable reference potential. By acting on the first threshold, the first reference potential modifies the effects of a variation of the first power supply potential and/or of the second power supply potential. Thus, as shall be seen more clearly below, by making an appropriate choice of the value of the first reference potential, it is possible to make the hysteresis value Δ of the trigger (Δ=VH−VB) independent of the value of the first power supply potential.  
           [0017]    Furthermore, as shall also be seen more clearly below, the use of the first reference potential, in addition to the first power supply potential, to drive the negative feedback of the comparator also affects the development of the hysteresis of the comparator as a function of the temperature and the development of the hysteresis for low values of the first power supply potential.  
           [0018]    Preferably, but not necessarily, the comparator may be symmetrical by making the second threshold dependent on both the second power supply potential and a second reference potential, which restricts or cancels out the effects of a variation of the first power supply potential and/or of the second power supply potential.  
           [0019]    The first threshold is, for example, the top or upper threshold and the first reference potential is chosen, for example, to be smaller than or equal to the first power supply potential (positive power supply potential). Preferably, the first reference potential is chosen such that the difference between the first power supply potential and the first reference potential is positive, and increases as a function of the first power supply potential. The influence (i.e., the limiting effect on the upper threshold) of the first reference potential thus increases with the first power supply potential. The second potential is, for example, the bottom or lower threshold and the second reference potential is chosen, for example, to be greater than or equal to the second power supply potential (ground potential).  
           [0020]    According to a preferred embodiment, the first negative feedback loop may comprise a first transistor, one source of which is connected to the first midpoint and one gate of which is connected to a source of a second transistor. The second transistor has a gate connected to the output of the comparator. The first power supply potential may be applied to the drain of the first transistor and the first reference potential is applied to the drain of the second transistor. With a negative feedback of this kind, setting a first reference potential lower than the first power supply potential at the gate of the first transistor increases the resistivity of the first transistor, and reduces the potential at the first midpoint accordingly. The upper threshold is then limited.  
           [0021]    The first negative feedback loop may be improved by the addition of a third transistor, a drain of which is connected to the gate of the first transistor and a gate of which is connected to the output of the comparator. The second power supply potential is applied to the source of the third transistor. The third transistor essentially has the effect, when the second transistor is off, of setting the potential at the gate of the first transistor at a value such that the first transistor is truly off. This averts any harmful effects related to the presence of a floating point in an integrated circuit. The second negative feedback loop may be made so as to be symmetrical with the first negative feedback loop, and has symmetrical effects. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0022]    The invention will be understood more clearly and other features and advantages shall appear from the following description of an exemplary mode of implementation of a comparator with two thresholds. The description must be read with reference to the appended drawings, of which:  
         [0023]    [0023]FIG. 1 is a graph showing the output signal OUT of a trigger as a function of the input signal IN according to the prior art;  
         [0024]    [0024]FIG. 2 is an electronic diagram of a trigger according to the prior art;  
         [0025]    [0025]FIG. 3 is an electronic diagram of a trigger according to the invention; and  
         [0026]    [0026]FIGS. 4, 5 are graphs showing the parameters of the triggers of FIGS. 2 and 3 as a function of the power supply potential and of the temperature. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0027]    The invention relates to a Schmidt trigger type of comparator with two thresholds. This comparator comprises (FIG. 2) a latch with four transistors T 11 , T 12 , T 13  and T 14 , a first negative feedback loop for modifying the lower switching threshold VB, and a second negative feedback loop for modifying the upper switching threshold VH of the trigger.  
         [0028]    According to the described mode of implementation (FIG. 3) of the invention, the first negative feedback loop comprises an N-type transistor T 22  and a P-type transistor T 33 . The source of the transistor T 22  is connected to the point A 1 , the gate of transistor T 22  is connected to the source of transistor T 33  whose gate is connected to the output of the inverter I. The power supply potential VDD is applied to the drain of transistor T 22 , and the second reference potential VREF  1  is applied to the drain of transistor T 33 .  
         [0029]    The second negative feedback loop has a P-type transistor T 21  and an N-type transistor T 31 . The source of the transistor T 21  is connected to the point A 2 , the gate of transistor T 21  is connected to the source of the transistor T 31  whose gate is connected to the output of the inverter I, i.e., to the output terminal of the trigger. The ground potential GND is applied to the drain of transistor T 21  and a second reference potential VREF 2  is applied to the drain of transistor T 31 .  
         [0030]    The reference potentials VREF 1 , VREF 2  are given by potential sources that are stable, especially as a function of the supply potential VDD and also preferably as a function of the temperature. VREF 2  is preferably fairly low and close to ground GND. In one example, VREF 2 =GND. VREF 1  is preferably fairly high and close to VDD and lower than VB. In one example, the value VREF 1 =2.4 V for VDD=2.5 V.  
         [0031]    The first negative feedback reaction according to the invention (FIG. 3) has the following effect. When OUT=0, especially when IN=0 or when IN increases from zero but is still below the upper triggering threshold VH of the trigger, transistors T 21  and T 31  are off and the point A 2  has a potential equal to VDD. Transistor T 33  is on and applies the potential VREF 1  to the gate of transistor T 22 .  
         [0032]    Since VREF 1  is lower than VDD but greater than VTN (the conduction threshold of the transistor T 22 ), transistor T 22  is on. However, transistor T 22  is more resistant than the transistor used as a negative feedback element in the prior art trigger (FIG. 2), and receives VDD at its gate instead of VREF 1 . Consequently, transistor T 22  dictates a potential at the point A 1  that is lower than the potential dictated at the same point in the prior art trigger. This has the effect of modifying the upper triggering threshold VH of the trigger.  
         [0033]    Since the potential VREF 1  is used to control T 22 , VREF 1  must be high enough (i.e., sufficiently close to VDD) to turn transistor T 22  on when transistor T 33  is on. Conversely, the greater the difference VDD−VREF 1 , the greater is the modification of the threshold VH as compared with the value that it would have had if VDD had been applied to the gate of transistor T 22 , with the potential VDD being kept constant. In one trigger according to the invention, the threshold VH depends especially on the potential VREF 1  and the potential VDD. Thus, if the trigger is used with potentials VDD of different values, it is possible, by choosing appropriate values of VREF 1 , to fully control the effect of VH on the variation in the potential VDD.  
         [0034]    The second negative feedback loop according to the invention (FIG. 3) has the following effect. It may be recalled that OUT is a logic signal that takes only two values 0 or VDD. When OUT=VDD, especially when IN=VDD or when IN decreases from VDD onwards but is still above the lower threshold VB, transistors T 22 , T 33  are off and the point A 1  is at a potential equal to the GND. Transistor T 31  is on and applies the potential VREF 2  to the gate of transistor T 21 .  
         [0035]    Since VREF 2  is fairly close to GND, transistor T 21  is on. Transistor T 21  on the contrary is more resistive than the transistor used as a negative feedback element in the prior art trigger (FIG. 2), and receives GND at its gate instead of VREF 2 . Consequently, transistor T 21  imposes a higher potential at the point A 2  than the potential imposed at the same point in the prior art trigger. This has the effect of modifying the lower triggering threshold VB of the trigger.  
         [0036]    Since the potential VREF  2  is used to command transistor T 21 , VREF 2  must be low enough (i.e., close to GND) to turn transistor T 21  on when T 31  is on. Conversely, the greater the difference in VREF 2 −GND, the greater the modification in the threshold VB relative to the value that it would have had if GND had been applied to the gate of transistor T 21 , with the potential VDD being kept constant. Thus, in the trigger according to the invention, the threshold VB depends especially on the potential VREF 2  and the potential VDD. Thus, if the trigger is used with potentials VDD of different values, it is possible by choosing appropriate values of VREF 2  to compensate for the effect on VB of the variation in the potential VDD.  
         [0037]    [0037]FIGS. 4 and 5 give an exemplary view, as a function of the potential VDD (FIG. 4, temperature of 25° C.) or of the temperature (FIG. 5, VDD=4.5 V), of the progress of the parameters of a prior art trigger according to FIG. 2 (curves in small, thick dashes) and a trigger according to FIG. 3 (curves shown in long, thin dashes) for appropriate values of the potentials VREF 1  and VREF 2 . VREF 2  has been chosen to be equal to GND, which is a constant value regardless of the value of VDD. VREF 1  is variable. In the examples, the following values have been chosen.  
                                                                   VDD:   1.8 V   2.5 V   4.5 V   5.5 V           VREF1:   1.8 V   2.4 V   3.1 V   3.4 V                      
 
         [0038]    Since VREF 2  has been chosen to be equal to GND, the threshold VB develops approximately in the same way, as a function of VDD, for a prior art trigger and for a trigger according to the invention.  
         [0039]    However, the effect of VREF 1  on the value of VH can be seen very clearly. For example, for VREF 1 =VDD=1.8 V, the threshold VH of the trigger according to the invention is greater than the threshold VH of the prior art trigger. In other words, choosing VREF 1  to be very close to VDD, or even equal to VDD raises the threshold VH, especially for the small values of VDD. This is particularly useful for triggers powered at low potentials VDD as it is thus possible to obtain high potentials VH for these triggers (in proportion relative to VDD).  
         [0040]    Inversely, for example, for VREF 1 =3.4 V and VDD=5.5 V, the potential VH of the trigger according to the invention is far lower than the potential VH of the prior art trigger. In other words, by choosing VREF 1  to be fairly distant from VDD (but sufficient to turn transistor T 22  on), the threshold VH is reduced for a given value of VDD.  
         [0041]    It is thus possible, by adjusting the value of VREF 1  as a function of VB, to reduce the slope of the curves VH=f (VDD) and ensure that VH develops in parallel to VB as a function of VDD. Since the hysteresis of the trigger is obtained by Δ=VH−BB, it follows that the hysteresis of the trigger is independent of VDD, as can be seen in FIG. 4. Preferably, VREF 1  is chosen such that the difference VDD−VREF 1  increases when VDD increases.  
         [0042]    If we now look briefly at the changes undergone by the parameters of the trigger according to the invention (FIG. 5, curves in long, thin dashes) as a function of the temperature, it is seen that, as compared with a known trigger (curves in short, thick dashes) the use of the potentials VREF  1 , VREF  2  makes it possible to: slightly reduce the slope of the curve VB as a function of the temperature T (variation of VB by 0.10 V instead of 0.15 V on a range of 203° C.), and sharply increase and reverse the slope of the curves VH as a function of T (variation of VH by +0.05 V instead of −0.05 V on a range of 200° C.).  
         [0043]    The trigger according to the invention can be improved by adding two transistors T 32  and T 34  as shown in dashes in FIG. 3. Transistor T 32  is a P-type transistor. Its drain is connected to the gate of transistor T 21 , its gate is connected to the output of the inverter I, and the potential VDD is applied to its source. Transistor T 32 , like transistor T 31 , is controlled by the signal OUT. Thus, since transistors T 31  and T 32  are of different types, one is on while the other is off. Transistor T 32  has the function of setting the potential of the gate of transistor T 21  when transistor T 31  is off and does not control the gate of transistor T 21 . Transistor T 32  thus makes it possible not to leave the gate potential of transistor T 21  in a floating state and to dictate a potential sufficiently high to ensure that transistor T 21  is off.  
         [0044]    Transistor T 34  is an N-type transistor. Its drain is connected to the gate of transistor T 22 . Its gate is connected to the output of the inverter I, and the potential GND is applied to its source. Transistor T 34 , like transistor T 33 , is controlled by the signal OUT. Thus, since transistors T 33  and T 34  are of different types, one is on while the other is off. Transistor T 34  has a function similar to that of transistor T 32 . When transistor T 31  is off, transistor T 34  sets the potential of the gate of transistor T 22  at a value low enough to ensure that transistor T 22  is off.