Abstract:
A method for measuring capacitance characteristics of a gate oxide in MOS transistor device. Capacitance characteristics of a gate oxide may be accurately, rapidly, and effectively obtain (e.g. in the form of a capacitance characteristics curve). A method may measure capacitance characteristics of a gate oxide using a characteristics measuring system using an impedance Z—phase angle θ method.

Description:
[0001]    The present application claims priority under 35 U.S.C. 119 and 35 U.S.C. 365 to Korean Patent Application No. 10-2005-0134153 (filed on Dec. 29, 2005), which is hereby incorporated by reference in its entirety. 
       BACKGROUND 
       [0002]    A MOS transistor may be a semiconductor device, which may be activated by a charge accumulated in a channel using a gate oxide. A method may measure capacitance characteristics of a gate oxide in a MOS transistor device. A method may measure capacitance characteristics by using capacitor measuring devices (e.g. a LCR meter) with a specific frequency and gate voltage. Gate leakage current and a dissipation factor may become relatively high due to a length of a gate being relatively short and/or a gate oxide being relatively thin. There may be complications in capacitance of a MOS transistor due to the thickness of a gate oxide being relatively thin. It may be relatively difficult to measure the capacitance characteristics of a gate oxide. 
       SUMMARY 
       [0003]    Embodiments relate to a method of measuring capacitance characteristics of a gate oxide in MOS transistor device. In embodiments, capacitance characteristics of a gate oxide may be accurately, rapidly, and effectively obtain (e.g. in the form of a capacitance characteristics curve). In embodiments, a method may measure capacitance characteristics of a gate oxide using a characteristics measuring system using an impedance Z—phase angle θ method. 
         [0004]    In embodiments, a method of measuring capacitance characteristics of a gate oxide in a MOS transistor device, may include at least one of: mounting a measurement object wafer in a probe station connected to a capacitance measuring unit and electrically connecting the measurement object wafer to the probe station; eliciting impedance-frequency and phase-frequency relation by measuring impedance and phase angle while setting up a wafer using a capacitance measuring unit using pre-adjusted gate voltage and changing frequency; and/or extracting gate capacitance using measured data. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0005]    Example  FIGS. 1   a  and  1   b  illustrate a characteristics measuring system which measures a MOS transistor device, in accordance with embodiments. 
       
    
    
     DETAILED DESCRIPTION 
       [0006]    Embodiments relate to a method of measuring capacitance characteristics of a gate oxide in a MOS transistor device. Embodiments relate to a measuring system configured to measure capacitance characteristics of a gate oxide in a MOS transistor device. In embodiments, an expression “on” may mean that something is formed directly on another thing or indirectly formed by intervening in another layer in case of disclosing the formation “on” respective layers. 
         [0007]      FIG. 1   a  illustrates a system which measures carrier density distribution of a MOS transistor device using an Automatic Test System in a Manual Test System, in accordance with embodiments. In embodiments, measurement and analysis procedures may be automated. In embodiments, mechanical operations (e.g. a procedure which loads a wafer pn a Probe Station in a Manual Test System may be manually performed and/or automated. 
         [0008]      FIG. 1   b  illustrates a system for measuring carrier density distribution of a MOS transistor device, in accordance with embodiments. In embodiments, a system may us an Automatic Test System in an automatic DC Parametric Test System. 
         [0009]    As illustrated in  FIGS. 1   a  and  1   b , wafer  10  (which may be a measurement target) may be positioned over chuck  21  inside probe station  20 . High frequency terminal  31  of capacitance measuring unit  30  (e.g. a LCR meter) may be connected to gate  11  of wafer  10 . Low frequency terminal  32  may be connected to substrate  12  of wafer  10 . Probe station  20  and capacitance measuring unit  30  may be connected to control computer  40 . 
         [0010]    Probe station  20  illustrated in  FIG. 1   a  may be connected to a measuring device using a probe. Probe station  20  of  FIG. 1   b  may use probe card  22 . Capacitance measuring unit  30  may use an automatic DC Parametric Test System. 
         [0011]    In embodiments, probe station  20  may be shielded from external influences using a dark box or a shielding box. A dark box or a shielding box may prevent measurement distortion caused by external light and/or electromagnetic waves. 
         [0012]    Embodiments relate to a method of measuring capacitance characteristics of a gate oxide in a MOS transistor device. Wafer  10  may be mounted inside of probe station  20 . Wafer  10  may be electrically connected to probe station  20  by either a probe or a probe card. Capacitance measuring unit  30  may deliver a pre-adjusted gate voltage Vg to gate  11 , in accordance with embodiments. Through delivery of gate voltage Vg, impedance-frequency and/or phase-frequency relation curves may obtained. 
         [0013]    In embodiments, Minimum ω min  of a frequency may be defined according to Equation 1, as follows. 
         [0000]    
       
         
           
             
               
                 
                   
                     
                       ω 
                       min 
                     
                     = 
                     
                       
                         1 
                         
                           
                             R 
                             P 
                           
                            
                           
                             C 
                             P 
                           
                         
                       
                        
                       
                         
                           
                             
                               R 
                               S 
                             
                             + 
                             
                               R 
                               P 
                             
                           
                           
                             
                               R 
                               P 
                             
                             + 
                             
                               3 
                                
                               
                                 R 
                                 S 
                               
                             
                           
                         
                       
                     
                   
                   , 
                 
               
               
                 
                   [ 
                   
                     Equation 
                      
                     
                         
                     
                      
                     1 
                   
                   ] 
                 
               
             
           
         
       
     
         [0014]    In Equation 1, R p  may denote a resistance voltage value of a gate oxide, R s  may denote a resistance voltage value of a substrate, and C p  may denote a capacitance of a gate oxide. 
         [0015]    The capacitance of a gate may be ascertained from impedance-frequency and/or phase-frequency relation curves, in accordance with embodiments. In embodiments, the capacitance of a gate may be ascertained using a parameter extraction tool. 
         [0016]    In embodiments, gate voltage Vg may be changed and an impedance-frequency and phase-frequency relation curve may obtained for the changed gate voltage Vg. A gate capacitance may be determined from impedance-frequency and/or phase-frequency relation curves of at least one gate voltage Vg, in embodiments. A gate capacitance may be elicited from an inversion region to an accumulation region by fitting data obtained through in impedance-frequency and/or phase-frequency relation curves. In embodiments, capacitance characteristics of a gate oxide may be determined from a gate capacitance. 
         [0017]    In embodiments, a method measures capacitance characteristics of a gate oxide in a MOS transistor device. In embodiments, relatively accurate data associated with capacitance characteristics of a gate oxide may be obtained (e.g. in a relatively short time) by utilizing characteristics measuring system using an impedance-phase angle method. In embodiments, statistic analysis corresponding to capacitance characteristics of a gate oxide may be performed. 
         [0018]    It will be apparent to those skilled in the art that various modifications and variations can be made to embodiments. Thus, it is intended that embodiments cover modifications and variations thereof within the scope of the appended claims.