Abstract:
A nuclear reactor power monitor utilizes radiation sensors, and a microprocessor implementing alpha-beta tracker equations. The use of alpha-beta tracker equations results in good noise suppression and fast follow capability. Therefore, alignment of the reactor power monitor is simplified and transients in the power level of a nuclear reactor can be detected.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates in general to power level monitors for nuclear reactors; and more particularly, to power level monitors which detect neutron emissions from a pressurized light water nuclear reactor. 
     2. Description of the Related Art 
     Several types of radiation detectors are used in the monitoring of nuclear reactors. One type detects gamma radiation from, e.g., power generation/cooling loops. Other radiation detectors sense the emission of neutrons from, e.g., the core barrel which surrounds the reactor. The neutron sensors are typically one of two types, the first type is used to detect infrequent emissions during low level operation of the reactor, such as during the start-up of the reactor in what is termed the source range. The second type of neutron sensors, for example dual uncompensated ionization chambers, such as WL-24156, manufactured by Westinghouse Industrial &amp; Government Tube Division, detect more frequent emissions of neutrons in intermediate and power ranges. 
     The signals output by the second type of neutron sensors include flow induced perturbations or &#34;nuclear noise&#34;, particularly in the power range, caused by vibration of the core barrel generated when water from the cooling loops enters the core barrel. 
     A prior art circuit for monitoring the power level of a nuclear reactor by detection of neutron emissions is illustrated in FIG. 1. The neutron sensors 10 are of the second type, described above, and output a current which indicates the number of neutrons detected during a sampling period. A current-to-voltage amplifier 15, such as an NM310 summing and level amplifier (part no. 3378C21), manufactured by Westinghouse Electrical Systems Division, converts the current signal to a voltage signal which is supplied to a rate/lag circuit 20, such as an NM311 power range rate circuit (part no. 3378C20), manufactured by Westinghouse Electrical Systems Division. The rate/lag circuit 20 is represented by an amplifier 25 having one input directly receiving the voltage from the current-to-voltage amplifier 15 and another input receiving the voltage signal filtered by an RC circuit comprising a variable resistor 30 and capacitor 35; however, a typical rate/lag circuit will include additional elements. 
     Proper adjustment or alignment of the prior art power level monitoring circuit illustrated in FIG. 1 requires the generation of known input signals, adjustment of the rate/lag circuit 20 by, e.g., changing the resistance of the variable resistor 30. Next, additional adjustments are made to circuits (not shown) which receive the output of the rate/lag circuit 20. In practice, the alignment of the rate/lag circuit 20 has been found to be quite difficult, sometimes requiring reiterative adjustment of the rate/lag circuit 20 and the following circuits. In addition, the noise filtering capability of prior art power level monitoring circuits has been limited to removing some high frequency signals. Also, the use of an RC network in the rate/lag circuit 20 results in relatively slow response for prior art power monitoring circuits, making quick detection of transients difficult. 
     SUMMARY OF THE INVENTION 
     An object of the present invention is to provide a power level monitor having noise reduction capability. 
     Another object of the present invention is provide a power level monitor capable of quick detection of transients in the neutron flux of a nuclear power reactor. 
     A further object of the present invention is to provide a power level monitor which is easily aligned. 
     Yet another object of the present invention is to provide a power level monitor which generates a prediction of the power level of a nuclear reactor. 
     The above objects are accomplished by a power level monitor including a neutron detector, a current-to-voltage amplifier, an analog/digital converter and a microprocessor. When neutrons are detected, the neutron detector outputs a signal which is amplified into an analog voltage by the current-to-voltage amplifier. The analog voltage is converted into a digital sample signal by the analog/digital converter that is supplied to the microprocessor which outputs signals indicating reactor power level, rate of change of the reactor power level and predicted reactor power level for a sampling period having a predetermined length. The signals output by the microprocessor are generated from the digital sample signal by converting the sample signal into a converted signal; multiplying the converted signal by a first constant to produce a first multiplied signal; multiplying the converted signal by a second constant divided by the length of the sampling period to produce a second multiplied signal; summing a prior rate of power level change signal produced during an immediately previous sampling period with the second multiplied signal to produce the current rate of power level change signal for the current sampling period; summing a prior power level signal produced during the immediately previous sampling period with the length of the sampling period multiplied by the prior rate of power level change signal produced during the immediately previous sampling period to produce a predicted power level signal; subtracting the predicted power level signal from the sample signal to produce the converted signal; and summing the converted and predicted power level signals to produce the current power level signal. 
     These objects together with other objects and advantages which will be subsequently apparent, reside in the details of construction and operation as more fully hereinafter described and claimed, reference being had to the accompanying drawings forming a part hereof, wherein like reference numerals refer to like parts throughout. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a block diagram of a prior art power level monitoring circuit; 
     FIG. 2 is a block diagram of a power level monitoring circuit according to the present invention; 
     FIG. 3A is a block diagram of the calculations performed by the microprocessor in the block diagram of FIG. 2; and 
     FIG. 3B is a block diagram of the Z-transform of the calculations illustrated in FIG. 3A. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     An embodiment of the present invention is illustrated in FIG. 2 and includes neutron sensors 10 and current-to-voltage amplifiers 15 similar to those used in the prior art circuit illustrated in Fig. 1. According to the present invention, both of the neutron sensors 10 may be connected to a single one of the current-to-voltage amplifiers 15, as indicated by the dashed line and as in the prior art circuit of FIG. 1, or each neutron sensor 10 may supply a current signal as the sole input to one of the current-to-voltage amplifiers 15. The analog voltage output by the current-to-voltage amplifiers 15 is supplied to an analog/digital converter 40 for input to a microprocessor 45. The analog/digital converter 40 and microprocessor 45 may be implemented on a single board computer such as an Intel 88/40. Depending on the particular analog/digital converter 40 and microprocessor 45 and monitoring system requirements, separate current-to-voltage amplifiers 15 may each be connected to separate analog-digital converters 40 or, as indicated by the dashed line, be connected to the same analog-digital converter on separate channels. Similarly, there may be one or more microprocessors 45 for each analog/digital converter 40. 
     Mere replacement of the analog circuits illustrated in FIG. 1 by the digital circuitry illustrated in FIG. 2, may simplify the alignment process and the speed with which the power level monitoring circuit responds to transients; however, there is no automatic reduction in noise. It is possible to reduce the effects of nuclear noise by proper selection of the algorithm performed by the microprocessor 45. 
     The selection of an algorithm is governed by several factors. First, the algorithm should be capable of reducing noise without total loss of the ability to detect transients. Secondly, power level monitoring circuits which operate in the power range of a nuclear reactor are required to supply a signal indicating rate of change of the power level, so that a &#34;trip&#34; can be generated when the rate of change has a magnitude above a specified value, i.e., indicating a sudden change in power, which may be a transient condition. 
     One algorithm which meets these requirements is defined by alpha-beta tracker equations which are commonly used in radar applications. Application of the alpha-beta tracker equations to processing in radar systems is described in J. A. Cadzow, Discrete-Time Systems, Prentiss-Hall, 1973, sections 2.6 (pages 63-66) and 8.11 (pages 272-278). Applying the equations described in Cadzow to the power level monitoring circuit illustrated in FIG. 2, the digital voltage output by the analog/digital converter 40 can be represented by f(k). The power level p(k), rate of change of power level p(k) and predicted power level p p  (k) are defined by equations (1)-(3) below. 
     
         p.sub.p =p(k-1)+T p(k-1)                                   (1) 
    
     
         p(k)=p.sub.p (k)-α[f(k)-p.sub.p (k)]                 (2) ##EQU1## 
    
     The power level p(k) is an estimate or smoothed output for the current sampling period in which the effects of noise have been reduced. The predicted power level p p  (k) is a prediction of the estimated power p(k) for the immediately following sampling period. The length of the sampling period is represented by T, α and β are constants which determine the dynamic response of the power level monitor. 
     The interrelationship of equations (1)-(3) is visually represented by the block diagram illustrated in FIG. 3. The input sample signal f(k) is converted by adder 110 and multiplied by constants α and β/T in multipliers 120 and 130. The resulting signals are input to adders 140 and 150, respectively. The outputs of adders 140 and 150 are supplied to registers 160, 170 and 180 which provide a delay of T. The output of register 160 is summed with the output of multiplier 130 to provide the rate of change of the power level p(k). The output of register 180 is multiplied by the length of the sampling period T in multiplier 190 prior to being summed with the output of register 170 in adder 200 to provide the predicted power level p p  (k). The predicted power level p p  (k) is multiplied by negative one so that it is subtracted from the sampled signal f(k) by adder 110 and is also summed with the output of multiplier 120 to produce the smoothed power level p(k). 
     Selection of appropriate values for the constants α and β is explained in Cadzow in section 8.11 (pages 272-278) using the Z-transform which is 8.11 (pages 272-278) using the Z-transform which is throughly discussed on pages 144-175 of Cadzow. The Z-transform of equations (1)-(3) are illustrated as a block diagram in FIG. 3B and appear below as equations (4)-(6). 
     
         P.sub.p (z)=z.sup.-1 p(z)+z.sup.-1 T P(z)                  (4) 
    
     
         P(z)=P.sub.p (z)+α[F(z)-P.sub.p (z)]                 (5) ##EQU2## 
    
     Since the outputs illustrated in FIG. 3B are all derived from a single input, the following transfer functions H 1  (z)-H 3  (z) can be defined. 
     
         P(z)=H.sub.1 (z)F(z)                                       (7) 
    
     
         P(z)=H.sub.2 (z)F(z)                                       (8) 
    
     
         P.sub.p (z)=H.sub.3 (z)F(z)                                (9) 
    
     Dividing both sides of equations (4)-(6) by the Z-transform F(z) of the input signal f(k), incorporating the transfer function relationships of equations (7)-(9) and rearranging the terms, results in the following equations (10)-(12). 
     
         z.sup.-1 H.sub.1 (z)+z.sup.-1 T H.sub.2 (z)-H.sub.3 (z)=0  (10) 
    
     
         H.sub.1 (z)-(1-α)H.sub.3 (z)=α                 (11) ##EQU3## Solving equations (10)-(12) for H.sub.1 (z)-H.sub.3 (z) results in the following equations (13)-(15). ##EQU4## The denominator polynomial which is common to all three of the fractions above is known as the characteristic equation which defines the system poles. Solving for the poles of the characteristic equation yields equation (16) below. ##EQU5## Assuming a critically damped system is desired, the term (β.sup.2 +α.sup.2 +2αβ-4β) is set to zero with the result that α=2√β-β. Substituting for in equations (13)-(15) produces the following equations (17)-(19). ##EQU6## Thus, a critically damped power monitor using alpha-beta tracker equations has a double pole of z=1-√β. 
    
     Implementation of an alpha-beta tracker power level monitor requires selection of a sampling period length T and a value for β, from which the value of α can be found. The sampling period length T will be determined by the speed of the neutron sensor 10, analog/digital converter 40, and the requirements of the equipment which receives the signals output by the microprocessor. 
     A discussion of how to select the value of β can be found on page 278 of Cadzow and in Benedict, T. R. and Bordner, G. W., &#34;Synthesis of an Optimal Set of Radar Track--While Scan Smoothing Equations,&#34; IRE Transactions on Automatic Control, Vol. AC-7, No. 4 (July, 1962) pages 27-32. The value of β affects the degree of noise reduction and system response speed. For applications such as data logging of the neutron flux in a nuclear reactor, a value of β equal to or very close to zero is preferable, because the effects of noise will be minimized. However, the response time will be very slow. Therefore, in neutron flux monitors which must generate trip signals, the value of β is increased (up to a maximum of 1) until statisfactory system response time is achieved. The amount of noise suppression provided by an alpha-beta tracker is reduced as β is increased; therefore, β should be selected to be as small as possible while meeting the system response time requirements. Once the value of has been selected, the value of α can be found as 2√β-β and a program for microprocessor 45 can be easily written from the block diagram in FIG. 3A. 
     When implemented, a power level monitor using alpha-beta tracker equations will provide noise suppression and &#34;fast follow&#34; capibility for responding to transients in the neutron flux. In addition, both the rate of power level change p(k) and a predicted next power level p p  (k) are automatically produced by the alpha-beta tracker equations. Also, alignment of such a power level monitor is considerably simplified due to the noise suppression capabilities of the alpha-beta tracker equations and the use of digital processing which eliminates the need for adjusting a variable resistor in a rate/lag circuit 20 as in the prior art. 
     The many features and advantages of the present invention are apparent from the detailed specification, and thus it is intended by the appended claims to cover all such features and advantages of the power level monitor which fall within the true spirit and scope of the invention. Further, since numerous modifications and changes will readily occur to those skilled in the art, it is not desired to limit the invention to the exact construction and operation illustrated and described, accordingly, all suitable modifications and equivalents may be resorted to, falling within the scope of the invention.