Abstract:
The electric charge transferred in a charge transfer phase from the pump capacitor to the tank capacitor is diminished by reducing the amplitude of the voltage swing on the transfer capacitor proportionally to the current to be supplied. This is done by limiting the maximum voltage on the pump capacitor to a certain value. This maximum value is calculated to make the voltage on the transfer capacitor reach a certain minimum voltage at the end of the charge transfer phase. A charge pump generator includes a driving circuit that isolates the pump capacitor when the voltage on it reaches the maximum value.

Description:
FIELD OF THE INVENTION  
       [0001]     The present invention relates to the field of charge pump generators and more particularly to a method of controlling a charge pump generator and a related charge pump generator with reduced low-frequency noise.  
       BACKGROUND OF THE INVENTION  
       [0002]     Charge pump voltage generators are largely used in many integrated circuits (ICs) for supplying the ICs at a pre-established voltage V NEG  that should remain constant as the current absorbed by the load varies. An example of a common charge pump voltage generator is shown in  FIG. 1 . The output voltage V NEG  is regulated via a comparator C OMP  that compares it with a stable reference (control) voltage V REF .  
         [0003]     The circuit of  FIG. 1  has operating phases in which the pump capacitor C P  is charged at a certain supply voltage VDD, alternated with operating phases in which the pump capacitor C P  is coupled in anti-parallel manner to the charge tank capacitor C T , that supplies the electronic circuit with a voltage V NEG  of opposite sign in respect to the charge voltage VDD. As long as the voltage V NEG  is smaller than the voltage V REF , the pump capacitor C P  remains coupled to the supply voltage VDD. When the voltage V NEG  exceeds the reference voltage V REF , the capacitor C P  charges the tank capacitor C T  when the clock signal CK assumes a logically active value, and is charged anew at the supply voltage VDD when the clock signal CK becomes logically null.  
         [0004]     In practice, this loop controls the duty cycle at a constant frequency when the charge current is above a certain threshold that depends upon the supply voltage, the on-resistances RON of the switches SW 1  and SW 2 , the pump capacitance C P  and the delay of the feedback line, constituted by the comparator and by the logic gates. T CK  being the period of the clock signal CK, and Q min  being the minimum charge transferred from the pump capacitor C P  to the tank capacitor C T , the load I load  must absorb a minimum current I min  given by the following equation:  
               I   min     =       Q   min       T   CK               (   1   )             
 
 to switch the switches SW 1  and SW 2  at each period of the clock signal CK. 
 
         [0005]     If the current I load  is smaller than the value I min , the charge transferred in a clock period from the capacitor C P  to the capacitor C T  is larger than that necessary for delivering this current for a clock period. The voltage V NEG  does not reach the threshold V REF  within the current period and the output of the AND gate remains null for more consecutive clock periods.  
         [0006]     This situation is undesirable because it generates switching noise in frequency intervals that should be as free as possible from noise for a correct operation of circuits supplied by the charge pump. Indeed, the switches SW 1  and SW 2  generate switching noise centered around the frequency of the clock signal, when they switch at each period of the clock signal CK, and at a smaller and smaller frequency if they do not switch for more consecutive clock periods. This consequent low frequency noise may disturb sensitive operation of circuits supplied by the charge pump.  
         [0007]     The published patent application US 2002/0105312 to Texas Instruments Inc. discloses a charge pump regulator with adjustable output current. In this device, the charging of the tank capacitor is regulated via switches with different on-resistances. A drawback of this approach is that the switches with low on-resistance occupy a relatively large silicon area.  
       SUMMARY OF THE INVENTION  
       [0008]     This invention provides a method of controlling a charge pump generator and a relative charge pump generator with a reduced low frequency switching noise and a reduced silicon area consumption.  
         [0009]     According to the method of this invention, the electric charge transferred in a charge transfer phase from the pump capacitor to the tank capacitor is diminished by reducing the amplitude of the voltage swing on the transfer capacitor proportionally to the current to be supplied. Preferably, this is done by limiting the maximum voltage on the pump capacitor to a certain value. This maximum value is calculated such to make the voltage on the transfer capacitor reach a certain minimum voltage at the end of the charge transfer phase.  
         [0010]     The method of this invention is implemented in a charge pump generator having a driving circuit that isolates the pump capacitor when the voltage on it reaches the maximum value. In so doing, the above mentioned problems of low-frequency switching noise are overcome without realizing switches of very low on-resistance, that require a relatively large silicon area. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0011]      FIG. 1  is a schematic diagram illustrating a charge pump generator in accordance with the prior art.  
         [0012]      FIG. 2  is a schematic diagram illustrating the control circuit of a charge pump generator in accordance with the present invention.  
         [0013]      FIG. 3  is a schematic diagram illustrating a charge pump generator of the present invention.  
         [0014]      FIG. 4  is a sample graph illustrating the operation of the charge pump generator of  FIG. 3 . 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0015]     Tto center the noise generated by the switches SW 1  and SW 2  at the frequency of the clock signal CK, the switches are switched at each clock period. As a consequence, if the current I load  absorbed by the load supplied by the charge pump generator diminishes, it is necessary to also diminish the value I min . This may be done only by reducing the minimum charge transferred from the pump capacitor C P  to the tank capacitor C T  proportionally to the current I load  absorbed by the circuit supplied by the charge pump, because the period of the clock signal T CK  is generally fixed by design specifications.  
         [0016]     Vcp START  being the voltage on the nodes of the pump capacitor at the instant in which the switches SW 1  and SW 2  are turned on, T loop  being the duration of the time interval in which the switches SW 1  and SW 2  are turned on in a clock period,  
                 Q   min     ≅           Vcp   START     -          V   neg              2   ·     R   ON         ·     T   loop         ⁢     
     ⁢     and   ⁢           ⁢   thus             (   2   )                 I   min     =         Q   min       T   CK       ≅           Vcp   START     -          V   neg              2   ·     R   ON         ·       T   loop       T   CK                   (   3   )             
 
 R ON  being the on resistance of the two identical switches SW 1  and SW 2 . 
 
         [0017]     The voltage V NEG , as the period T CK  of the clock signal, is fixed by design specifications. The ratio  
               T   loop       T   CK             (   4   )             
 
 may hardly be modified with sufficient precision. 
 
         [0018]     According to the method of this invention, the size of the two switches SW 1  and SW 2  need not be increased to reduce their on-resistance, as per the prior art approach. According to this invention, the voltage Vcp START  is reduced such to make the current I min  equal to the current I load  absorbed by the load. The charge Q min  transferred from the capacitor C P  to the capacitor C T  is 
 
 Q   min   =Q   START   −Q   END    (5) 
 
 Q START  and Q END  being the charge on the pump capacitor C P  at the beginning and at the end of the charge transfer phase. By imposing that the minimum current I min  be equal to the current absorbed by the load I load , the following equation holds:  
               I   load     =         Q   START     -     Q   END         T   CK               (   6   )             
 
         [0019]     Considering that the charge on the pump capacitor is proportional to the voltage on it and that the proportionality factor is the capacitance, C P , the following equation may be written:  
               Vcp   END     =       Vcp   START     -         I   load     ·     T   CK         C   P                 (   7   )             
 
 wherein Vcp END  is the voltage on the pump capacitor at the end of the transfer charge phase. Equation (7), together with equation (3), allows a determination of the values of the maximum and minimum voltage on the capacitor C P  as a function of the current absorbed by the load I load  and of the other parameters of the charge pump generator. 
 
         [0020]     According to this invention, a control circuit for a charge pump generator for establishing a maximum voltage Vcp START  on the pump capacitor C P  is depicted in  FIG. 2 . The circuit comprises a sensing amplifier (Sense) of the voltage on the pump capacitor that generates a signal V SNS  representing this voltage, including an operational amplifier A 0 , biased by a reference voltage V REF 2, and the resistors R 1  and R 2 . The signal V SNS  is sampled by the circuit “Sample and Hold” S/H when a sample and hold signal S/H is asserted, and a control logic circuit P.I.CONTROL generates a signal corresponding to the value Vcp START  as a function of the difference V ERR  between the voltage sampled at the end of the charge phase Vcp END  and the desired value Vcp ENDtarget . Finally, a comparator COMPARATOR compares the voltage Vcp currently on the pump capacitor with the value Vcp START , stopping the charging of the capacitor C P  via a logic signal STOP when the voltage on it Vcp reaches the maximum desired voltage Vcp START .  
         [0021]     When the logic signal STOP is asserted, the switches SW 3  and SW 4  are turned off and the charging phase of the pump capacitor C P  is stopped. By properly determining the voltage at the beginning of a new charge phase Vcp START  according to equation (3), the voltage on the capacitor C P  is exactly Vcp END  exactly when the regulated voltage surpasses the reference threshold V REF   1 .  
         [0022]     An embodiment of a charge pump generator of this invention, that includes the control circuit of  FIG. 2 , is shown in  FIG. 3 . The enabling signal PUMP of the switches SW 1  and SW 2  is generated as shown in  FIG. 1 , while the enabling signal CHARGE of the switches SW 3  and SW 4  is the logic NOR of the signal STOP and of the clock CK. In doing so, the enabling signal CHARGE of the switches that connect the pump capacitor C P  to the supply and to ground is disabled during a charging phase, started with a trailing edge of the clock CK as soon as the signal STOP becomes logically active.  
         [0023]     Results of simulations of the operation of the charge pump generator of the invention depicted in  FIG. 3  are shown in  FIG. 4 . The value of the threshold voltage V REF   1  of  FIG. 1  is set to −3V. When the clock signal switches at each active logic value, a charge transfer phase starts (schematically indicated in  FIG. 4  with the label POMPA), the voltage on the capacitor C P  diminishes because it transfers its charge on the tank capacitor C T , and the absolute value of the regulated voltage V NEG  increases.  
         [0024]     As soon as the regulated voltage becomes smaller than the threshold V REF   1 , set to −3V in the shown example, the comparator COMP of  FIG. 1  switches and opens the switches SW 1  and SW 2 . In this case the regulated voltage V NEG  is sustained only by the capacitor C T  and thus its absolute value decreases, while the voltage on the pump capacitor equals the voltage Vcp END .  
         [0025]     When the clock signal CK switches low, a charge phase is started. The regulated voltage is always sustained only by the tank capacitor C T  and thus its absolute value continues diminishing, while the switches SW 3  and SW 4  are closed and the pump capacitor C P  charges. When the voltage V CP  reaches the value Vcp START , the control circuit of  FIG. 2  of the charge pump generator of this invention opens the switches SW 3  and SW 4  and stops charging the pump capacitor.  
         [0026]     With the charge pump capacitor of this invention, the switching noise generated by the switches SW 1  and SW 2  remains substantially confined around the clock frequency, where it may be easily filtered without limiting the performances of the circuits supplied by the charge pump and without using purposely made low on-resistance switches, that occupy a relatively large silicon area.