Abstract:
A dimming mode selecting circuit ( 25 ) includes a switch circuit ( 251 ) and a compensation circuit ( 252 ). The switch circuit selects a first input voltage or a second input voltage according to an input signal. The compensation circuit connects to the switch circuit, for compensating voltage loss of the first input voltage or the second input voltage in the dimming mode selecting circuit, and outputting a first compensated input voltage or a second compensated input voltage according to the switch circuit. In the invention, the dimming mode selecting circuit combines a hysteresis circuit ( 250 ) with the compensation circuit, to make the input signal stably and the output signal reliably. The structure of the circuit is simple.

Description:
FIELD OF THE INVENTION 
   The present invention relates to electronic driving devices, and particularly to a device with a dimming mode selecting circuit for driving a light source module. 
   DESCRIPTION OF RELATED ART 
   Generally, discharge lamps are used as light sources of liquid crystal display (LCD) panels. With the increasing demand for better performance of an LCD panel, and particularly to a performance of adjusting brightness, dimming control functions for the light sources are developed. Normally, backlights not only are controlled by an internal dimming mode but also an external dimming mode. In the internal dimming mode, brightness of the LCD panel is adjusted according to predetermined values in a certain range, and in the external dimming mode, brightness of the LCD panel is adjusted according to requirements of users. 
     FIG. 5  is a circuit diagram of a conventional dimming mode selecting circuit. The conventional dimming mode selecting circuit includes a voltage source Vcc, a first input voltage terminal VA, a second input voltage terminal VB, a plurality of resistors R 11 , R 22 , R 33 , R 44 , R 55 , R 66 , R 77 , a plurality of transistors Q 11 , Q 22 , Q 33 , and a plurality of diodes D 11 , D 22 , D 33 , D 44 . 
   When an input signal Vin is a logic high level and is greater than the voltage source Vcc divided on the resistors R 44  and R 22 , the diode D 11  is off, and the transistors Q 22  and Q 33  are on, and the transistor Q 11  is off. Therefore, the first input voltage terminal VA outputs signals via the diode D 33 . Similarly, when the input signal Vin is a logic low level and is less than the voltage source Vcc divided on the resistor R 44  and R 22 , the diode D 11  is on, and the transistors Q 22  and Q 33  are off, and the transistor Q 11  is on. Therefore, the second input voltage terminal VB outputs signals via the diode D 44 . 
   The conventional dimming mode selecting circuit has a complex circuit structure with many components. In addition, the first input voltage terminal VA or the second input voltage terminal VB output signals via the diodes D 33  or D 44 , so that voltage loss on the diodes D 33  or D 44  can deteriorate dimming precision of a light source module. Furthermore, the input signal Vin is easily affected by noise so that output voltage is switched back and forth between terminals VA and VB causing unstable dimming modes. 
   SUMMARY OF INVENTION 
   A dimming mode selecting circuit includes a switch circuit and a compensation circuit. The switch circuit selects a first input voltage or a second input voltage according to an input signal. The compensation circuit is connected to the switch circuit, for compensating voltage loss of the first input voltage or the second input voltage in the dimming mode selecting circuit, and outputting a first compensated input voltage or a second compensated input voltage according to the switch circuit. 
   The dimming mode selecting circuit further includes a hysteresis circuit that is connected to the switch circuit, for converting the received input signal to a stable signal, and outputting the stable signal to the switch circuit. 
   A driving device for driving a light source module includes a converter circuit, a driving switch circuit, a transformer circuit, a PWM controller, and a dimming mode selecting circuit. The converter circuit converts a received signal to a direct current signal. The driving switch circuit is connected to the converter circuit, for converting the direct current signal to an alternating current signal. The transformer circuit is connected between the driving switch circuit and the light source module, for converting the alternating current signal to an appropriate signal. The PWM controller is connected to the driving switch circuit, for controlling the alternating current signal output from the driving switch circuit. The dimming mode selecting circuit is connected to the PWM controller, and includes a switch circuit and a compensation circuit. The switch circuit selects a first input voltage or a second input voltage according to the input signal. The compensation circuit is connected to the switch circuit, for compensating voltage loss of the first input voltage or the second input voltage in the dimming mode selecting circuit, and outputting a first compensated input voltage or a second compensated input voltage according to the switch circuit. 
   Other advantages and novel features will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings, in which: 

   
     BRIEF DESCRIPTION OF DRAWINGS 
       FIG. 1  is a block diagram of a driving device of an exemplary embodiment of the present invention; 
       FIG. 2  is a block diagram of a driving device of another exemplary embodiment of the present invention; 
       FIG. 3  is a block diagram of a dimming mode selecting circuit of  FIG. 1  and  FIG. 2 ; 
       FIG. 4  is a detailed exemplary circuit diagram of the dimming mode selecting circuit of  FIG. 3 ; and 
       FIG. 5  is a circuit diagram of a conventional dimming mode selecting circuit. 
   

   DETAILED DESCRIPTION 
     FIG. 1  is a block diagram of a driving device of an exemplary embodiment of the present invention. The driving device for driving a light source module  23  includes a converter circuit  20 , a driving switch circuit  21 , a transformer circuit  22 , a feedback circuit  24 , a dimming mode selecting circuit  25 , and a PWM controller  26 . The light source module  23  includes a plurality of lamps. 
   The converter circuit  20  converts a received signal to a direct current (DC) signal. The driving switch circuit  21  is connected to the converter circuit  20 , and converts the DC signal to an alternating current (AC) signal. The transformer circuit  22  is connected between the driving switch circuit  21  and the light source module  23 , and converts the AC signal to an appropriate signal to drive the light source module  23 . In the exemplary embodiment, the AC signal output from the driving switch circuit  21  is a rectangular-wave signal, and the appropriate signal output from the transformer circuit  22  is a sine-wave signal. The feedback circuit  24  is connected between the light source module  23  and the PWM controller  26 , for feeding back current flowing through the light source module  23  to the PWM controller  26 . The PWM controller  26  is connected to the driving switch circuit  21 , for controlling the AC signal output from the driving switch circuit  21 . 
   The dimming mode selecting circuit  25  is connected to the PWM controller  26 , for selecting a first input voltage or a second input voltage according to an input control signal Vin, and outputting a selected input voltage to the PWM controller  26 . The PWM controller  26  provides a control signal to the driving switch circuit  21 , to control the AC signal output from the driving switch circuit  21 , according to signals output from the feedback circuit  24  and the dimming mode selecting circuit  25 . Therefore, the PWM controller  26  controls the current flowing through the light source module  23 , and adjusts the brightness of the light source module  23 . 
   In the exemplary embodiment, the input signal Vin is an unstable logic high level or an unstable logic low level signal. The logic high level ranges from 2V to 5V, and the logic low level ranges from 0V to 0.8V. The first input voltage and the second input voltage indicate two different dimming modes. The first input voltage indicates an external dimming mode, the second input voltage indicates an internal dimming mode. 
     FIG. 2  is a block diagram of a driving device of another exemplary embodiment of the present invention. The driving device as shown in  FIG. 2  is substantially the same as that of in  FIG. 1 , except that the feedback circuit  24  is connected between the transformer circuit  22  and the PWM controller  26 , also for feeding back current flowing through the light source module  23  to the PWM controller  26 . 
     FIG. 3  is a block diagram of a dimming mode selecting circuit  25  of the driving device of  FIG. 1  and  FIG. 2 . The dimming mode selecting circuit  25  includes a hysteresis circuit  250 , a switch circuit  251 , and a compensation circuit  252 . 
   The hysteresis circuit  250  converts the received input signal Vin to a stable logic low level or a stable logic high level signal. The switch circuit  251  is connected to the hysteresis circuit  250 , for selecting the first input voltage or the second input voltage according to the stable signal output from the hysteresis circuit  250 . That is, the switch circuit  251  selects the external dimming mode or the internal dimming mode according to the stable signal. The compensation circuit  252  is connected to the switch circuit  251 , for compensating voltage loss of the first input voltage or the second input voltage in the dimming mode selecting circuit  25 . 
   In the exemplary embodiment, the voltage loss compensated by the compensation circuit  252  includes the voltage loss on electronic components when current flows therethrough, and the voltage loss on electronic components from external temperature change. 
     FIG. 4  is a detailed exemplary circuit diagram of the dimming mode selecting circuit  25  of  FIG. 3  of the invention. The hysteresis circuit  250  includes a voltage source Vcc, an over-voltage protecting diode D 1 , a comparator A 1 , a first resistor R 1 , a second resistor R 2 , a third resistor R 3 , and a fourth resistor R 4 . The comparator A 1  has a first pin, a second pin, a third pin, a fourth pin, and a fifth pin. 
   The first resistor R 1  is connected between the voltage source Vcc and the first pin of the comparator A 1 . The second resistor R 2  is connected between the first pin of the comparator A 1  and the ground. In the exemplary embodiment, the fourth resistor R 4  is a voltage divider resistor. One end of the fourth resistor R 4  is defined as an input of the hysteresis circuit  250  for receiving the input signal Vin. The other end of the fourth resistor R 4  is connected to the second pin of the comparator A 1 , for protecting the comparator A 1  from an over voltage signal. The third pin of the comparator A 1  is connected to the voltage source Vcc, and the fourth pin of the comparator A 1  is grounded. The third resistor R 3  is connected between the first pin and the fifth pin of the comparator A 1 , and the fifth pin of the comparator A 1  is defined as an output of the hysteresis circuit  250 . The over-voltage protecting diode D 1  has an anode and a cathode. The anode of the over-voltage protecting diode D 1  is connected to the second pin of the comparator A 1 . The cathode of the over-voltage protecting diode D 1  is connected to the voltage source Vcc, for also protecting the comparator A 1  from an over voltage signal. 
   In the exemplary embodiment, the first resistor R 1  and the second resistor R 2  form a divider circuit for dividing the voltage source Vcc and outputting the divided voltage to the first pin of the comparator A 1 . A first threshold voltage and a second threshold voltage are predetermined by the first resistor R 1 , the second resistor R 2 , the third resistor R 3 , the voltage source Vcc, and the comparator A 1 . The first threshold voltage is a high threshold voltage, and the second threshold voltage is a low threshold voltage. A difference between the first threshold voltage and the second threshold voltage is a hysteresis voltage. 
   When the input signal Vin changes from a logic low level to a logic high level, and if the input signal Vin is less than the first threshold voltage, the comparator A 1  outputs a logic high level. Contrarily, if the input signal Vin is greater than the first threshold voltage, the comparator A 1  outputs a logic low level. Even if the input signal Vin continues to increase, the comparator A 1  still outputs the logic low level. 
   When the input signal Vin changes from a logic high level to a logic low level, and the input signal Vin is greater than the second threshold voltage, the comparator A 1  outputs a logic low level. Contrarily, if the input signal Vin is less than the second threshold voltage, the comparator A 1  outputs a logic high level. Even if the input signal Vin continues to decrease, the comparator A 1  still outputs the logic high level. 
   Therefore, even if the input signal Vin varies, so long as it varies in a range of the hysteresis voltage, output of the comparator A 1  will be stable, and consequently, the hysteresis circuit  250  outputs a stable logic high level or logic low level signal to the switch circuit  251 . 
   The switch circuit  251  includes an isolating diode D 2 , an NPN transistor Q 1 , a fifth resistor R 5 , and a sixth resistor R 6 . The isolating diode D 2  has an anode and a cathode. The anode of the isolating diode D 2  is connected to a first input voltage terminal VA. The cathode of the isolating diode D 2  is connected to the output of the hysteresis circuit  250 , for avoiding current flowing back to the hysteresis circuit  250 . The firth resistor R 5 , the sixth resistor R 6  and the NPN transistor Q 1  form a digital transistor having an input, a first output, and a second output. One end of the fifth resistor R 5  is defined as the input of the digital transistor, which is connected to the output of the comparator A 1 , and the other end of the fifth resistor R 5  is connected to a base of the NPN transistor Q 1 . A collector of the NPN transistor Q 1  is defined as the first output of the digital transistor, which is connected to a second input voltage terminal VB. An emitter of the NPN transistor Q 1  is grounded, which is defined as the second output of the digital transistor. The sixth resistor R 6  is connected between the base and the emitter of the NPN transistor Q 1 . In the exemplary embodiment, the digital transistor has a high input impedance and a low output impedance, thereby not only reducing influence to a front-end circuit, but also increasing driving ability of a back-end circuit. 
   In the exemplary embodiment, when the switch circuit  251  receives a logic high level output signal from the hysteresis circuit  250 , the diode D 2  is turned off, and the NPN transistor Q 1  is turned on. Then, the second input voltage terminal VB is grounded via the NPN transistor Q 1 , and provides an appropriate voltage to the NPN transistor Q 1  to ensure the NPN transistor Q 1  works normally. Therefore, the first input voltage is output to the compensation circuit  252 . Contrarily, when the switch circuit  251  receives a logic low level output signal from the hysteresis circuit  250 , for example, the hysteresis circuit  250  outputs 0V, the diode D 2  is turned on, and the NPN transistor Q 1  is turned off. Since the first input voltage terminal terminal VA is connected to the output of the comparator A 1  via the diode D 2 , the second input voltage is output to the compensation circuit  252 . 
   The compensation circuit  252  includes a voltage source Vcc, a seventh resistor R 7 , a current limiting resistor R 8 , two NPN transistors Q 2 , Q 3 , and a PNP transistor Q 4 . An emitter of the PNP transistor Q 4  is defined as an output of the compensation circuit  252 . A base of the NPN transistor Q 2  is connected to the first input voltage terminal VA. An emitter of the NPN transistor Q 2  is connected to a base of the PNP transistor Q 4 . A collector of the NPN transistor Q 2  is connected to the voltage source Vcc. A base of the NPN transistor Q 3  is connected to the second input voltage terminal VB. An emitter of the NPN transistor Q 3  is connected to the base of the PNP transistor Q 4 . A collector of the NPN transistor Q 3  is connected to the collector of the NPN transistor Q 2 . The seventh resistor R 7  is connected between the voltage source Vcc and the emitter of the PNP transistor Q 4 , for protecting the output of the compensation circuit  252 . The current limiting resistor R 8  is connected between the base and a collector of the PNP transistor Q 4 , for protecting the PNP transistor Q 4 . 
   In the exemplary embodiment, the first input voltage is output to the PWM controller  26  via the NPN transistor Q 2  and the PNP transistor Q 4 . However, there is about 0.7V of voltage loss between the base and the emitter of the NPN transistor Q 2 . For example, when the first input voltage is 5V, voltage of the emitter of the NPN transistor Q 2  is 4.3V. Because the NPN transistor Q 2  and the PNP transistor Q 4  are a complementary pair of transistors with a voltage difference between the base and the emitter of the PNP transistor Q 4  of −0.7V, voltage output from the first input voltage via the NPN transistor Q 2  and the PNP transistor Q 4  is also 5V, that is, the first input voltage is output without any loss. 
   Similarly, the second input voltage is output to the PWM controller  26  via the NPN transistor Q 3  and the PNP transistor Q 4 . However, there is also about 0.7V voltage loss between the base and the emitter of the NPN transistor Q 3 . Because the NPN transistor Q 3  and the PNP transistor Q 4  are also a complementary pair of transistors, the PNP transistor Q 4  is used for compensating voltage loss of the second input voltage on the NPN transistor Q 3 . Therefore, voltage output from the second input voltage via the NPN transistor Q 3  and the PNP transistor Q 4  is not changed, that is, the second input voltage is output without any loss. 
   In addition, due to external temperature variation, the transistor is easily affected, particularly voltage difference between the base and the emitter of the transistor. In the exemplary embodiment, the NPN transistor Q 2  and the PNP transistor Q 4 , or the NPN transistor Q 3  and the PNP transistor Q 4  form a complementary circuit. When the external temperature varies, the voltage difference between the base and the emitter of the PNP transistor Q 4  vary accordingly. Therefore, the PNP transistor Q 4  compensates voltage loss on the NPN transistors Q 2  or Q 3  caused by the external temperature change such that the driving device is not affected. In the exemplary embodiment, output signal Vout of the dimming mode selecting circuit  250  is the selected first input voltage or the selected second input voltage. 
   In the exemplary embodiment, when the input signal Vin is an unstable logic low level signal, the hysteresis circuit  250  outputs a stable logic high level signal to the switch circuit  251  to turn on the NPN transistor Q 1 . Therefore, the first input voltage is output to the PWM controller  26  via the NPN transistor Q 2  and the PNP transistor Q 4 . That is, the driving device selects the external dimming mode. Contrarily, when the input signal Vin is an unstable logic high level signal, the hysteresis circuit  250  outputs a stable logic low level signal to the switch circuit  251  to turn off the NPN transistor Q 1 . Therefore, the second input voltage is output to the PWM controller  26  via the NPN transistor Q 3  and the PNP transistor Q 4 . That is, the driving device selects the internal dimming mode. 
   While various embodiments and methods of the present invention have been described above, it should be understood that they have been presented by way of example only and not by way of limitation. Thus the breadth and scope of the present invention should not be limited by the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalent.