Abstract:
Contacting an underlying region (e.g., doped silicon) through an access hole in an overlying dielectric layer (e.g., p-glass) formerly required flowing the dielectric to smooth the edges of the hole, so that aluminum would deposit smoothly into the hole. The present technique smoothes the side of the hole by forming a smoothing region on the sidewall. Improved aluminum coverage results, as well as allowing a smaller contact head, if desired. Improved contact resistance can be optionally provided by depositing a more conductive layer on the underlying layer prior to forming the sidewall.

Description:
BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to a technique for forming an electrical contact a conductor and an underlying region separated therefrom by a dielectric layer. 
     2. Description of the Prior Art 
     In the production of integrated circuits and other solid state devices, electrical contacts are required between an overlying conductive layer and an underlying region separated therefrom by a dielectric material. The overlying layer is typically a metal, and the underlying region is typically a doped semiconductor region, or another metal layer. Referring to FIG. 1, in one typical prior art technique, a silicon semiconductor material 10 has formed therein a doped region 11 which may be, for example, the source or drain of a field effect transistor. Formed thereon is dielectric layer 12, typically of a relatively low softening point (e.g., less than 1100° C. in the heating ambient used) glass. This dielectric layer typically has a thickness of less than 10,000 angstroms, and presently about 7,000 angstroms in one typical process. There is then formed in layer 12 an opening, also termed in the art a &#34;window&#34;, having a width d as indicated. The etching technique utilized to form the window frequently is anisotropic; that is, tending to remove material faster in the vertical direction as viewed as compared to the horizontal direction. This process thus forms vertical sidewalls as shown. For this purpose, reactive ion etching is frequently utilized. Since it is desired to deposit a conducting material in this window, the sidewalls typically need to be smoothed. This allows a continuous conducting layer of material to be deposited. In particular, aluminum is notorious for not forming a continuous layer when deposited over vertical sidewalls. 
     To provide for smoothing the sidewalls, the dielectric material of region 12 is typically a phosphosilicate glass (p-glass), a borosilicate glass, or a glass containing both phosphorous and boron. A heating step, typically 900° C. to 1100° C., then causes the sidewalls to flow, forming a smooth transition region 23, as indicated in FIG. 2. Referring to FIG. 3, an aluminum layer 34 is then deposited on the smoothed dielectric material, and makes a continuous contact to the doped region 11 as indicated. Subsequent steps can be used to pattern the conducting region 34 to obtain a desired conductor pattern. 
     One consequence of this smoothing technique is that it increases the distance required for the top of the contact, referred to as the &#34;head&#34; of the contact. As shown in FIG. 3, this distance d&#39; may be substantially greater than the distance d that initially defined the window. The increase of d&#39; as compared to d then limits the density with which adjacent devices can be packed into a given area. Frequently, the distance d is defined by the minimum size that the lithographic technique utilized can achieve. In some cases, it is desirable to form the contact such that this minimum geometry is preserved. One technique that avoids flowing the p-glass layer is by depositing low-resistivity polysilicon into the windows prior to aluminum deposition. The polysilicon then provides electrical conductivity even if the aluminum is discontinuous; see U.S. Pat. No. 4,291,322 coassigned with the present invention. However, in some cases even lower electrical contact resistance is desired. In other cases, it is desirable to avoid forming doped (low resistivity) polysilicon, especially as in CMOS circuitry, when two different dopant types (p-type and n-type) are required In other instances, it has been found that the aluminum coverage is typically not as good as is desired, even after flowing the p-glass material. That is, small gaps or discontinuities can still exist in aluminum layer 34 deposited on flowed dielectric 12 in FIG. 3. It is desirable to have an alternate technique for making contact to an underlying layer that is separated from a conductive layer by a dielectric region. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIGS. 1-3 illustrate a prior art technique for forming aluminum contacts to semiconductor material. 
     FIGS. 4-6 illustrate one embodiment of the present invention. 
     FIGS. 7-9 illustrate an alternate embodiment of the present invention. 
    
    
     SUMMARY OF THE INVENTION 
     I have invented a technique for making electrical contact to an underlying region through an overlying region of dielectric material. For illustrative purposes, the regions are referred to as &#34;overlying&#34; and &#34;underlying&#34;. In this technique, an opening is formed in the overlying dielectric material, and a smoothing material is conformally deposited at least in, and typically also around, the opening. Next, an anisotropic etching process substantially removes the deposited smoothing material, except in the sidewall portion of the opening. Finally, a conducting material is deposited inside the opening. The deposited smoothing material is typically a dielectric, for example, silicon dioxide, but can alternately be a conductive material. In an alternate embodiment, a material more conductive than that of the underlying region is deposited on the underlying region prior to depositing the smoothing material. This produces a contact structure having a more conductive layer located on the underlying region in the opening of the dielectric material. The more conductive layer has located on its periphery the smoothing region, which also contacts the sidewall of the opening. 
     DETAILED DESCRIPTION 
     The following detailed description relates to an improved technique for making electrical contact to an underlying region through dielectric material. Referring to FIG. 4, it is desired to make contact to doped region 41 in semiconductor material 40. The semiconductor material is typically a silicon substrate, or epitaxial layer formed thereon. Other semiconductor materials, including group III-V materials, are possible. A dielectric material 42 is formed over the region 40. Then an opening is produced in region 42, typically by an anisotropic (i.e., one-directional) etching technique that forms approximately vertical sidewalls as indicated. In some cases, the etching process may not be entirely anisotropic, but may produce sloping sidewalls. As used herein, the term &#34;vertical&#34; implies that the sidewalls are within ±20 degrees of being perpendicular to the surface fo the substrate; more typically, they are within ±10 degrees of being perpendicular. The slope may be in either direction, with a negative slope indicating undercut of the dielectric region by the window. The width of the opening (d) is typically about two micrometers for current generation integrated circuits, and is expected to be less than that for future generations. If desired, the opening as formed can have a width d that is equal to the minimum lithographic dimension. 
     Next, a material 43, referred to herein as the &#34;smoothing material&#34;, is conformally deposited on dielectric region 42. The conformal nature of this deposition implies that the smoothing material has approximately equal thickness over the underlying region 41, the sidewalls of the opening 44, and the surrounding dielectric material 42. In particular, note that the smoothing material 43 does not completely fill in the window, but rather follows the contours of the window. I recommend that the thickness of the smoothing material as deposited be from 0.4 to 1.5 as much as, and typically somewhat greater than one-half as much as, the thickness of the dielectric material. For example, a thickness of 4,000 angstroms for conformal smoothing material 43 is suitable for smoothing a two micrometer opening in a 7,000 angstrom thick dielectric region 42. 
     After thus depositing the smoothing material 43, it is then subjected to an anisotropic etching process, for example, a reactive ion etching process. The anisotropic etching implies that smoothing material is removed at a faster rate in the vertical direction as viewed in FIG. 4 as compared to the horizontal direction. As used herein with regard to removing the smoothing material, the term &#34;anisotropic&#34; means that the smoothing material is removed at least five times as fast in the vertical direction as in the horizontal direction with respect to the substrate surface. More typically, this ratio exceeds 10 to 1. The result is that the material 43 on the horizontal surfaces as viewed is substantially removed, whereas the smoothing material contacting the vertical sidewall of the window is not substantially removed. Not that the smoothing material is thus removed from the central portion of the underlying region in the opening. In addition, the top portion of the smoothing material contacting the vertical sidewall is etched to some degree. This produces the structure shown in FIG. 5, wherein smoothing region 45 adheres to the sidewall 44 of the opening in dielectric material 42. The smoothing region 45 thus has a non-vertical slope, having an angle typically greater than 20 degrees from the vertical to the substrate. This is as measured by a straight line approximation to the slope, from the upper corner to the lower inside corner of the smoothing region. This smoothing region then serves as a means for obtaining improves conductor coverage. For example, when aluminum (46) is deposited, it typically fills the opening without discontinuities, as indicated in FIG. 6. Note that the size of the contact top is now substantially defined by the distance d, which also defined the window opening. Hence, the contact is said to be &#34;headless&#34;. 
     The smoothing material is typically silicon dioxide. The conformal oxide deposition can be accomplished by decomposing tetraethoxysilane, Si (OC 2  H 5 ) 4 , at 650° in a low pressure chemical vapor deposition (LPCVD) reaction, according to principles known in the art. 
     A process suitable for the anisotropic etching of the oxide material is by reactive ion etching with 90% CHF 3  +10% O 2  at 65 micrometers pressure, at 1500 watts power, or by other methods known in the art. Finally, aluminum can be deposited in the window thus smoothed by sputtering from an aluminum target at 300° C. and at 1×10 -7  torr pressure (e.g., in a Varian 3180 sputter system), as is also known in the art. An aluminum thickness in the range of about 0.5 to 1.0 micrometers is typically used in present processes, with a wider range being possible. 
     While the use of silicon dioxide as a conformally deposited smoothing material has been illustrated above, other materials are possible. For example, silicon nitride can be conformally deposited. Alternately, a conductive material can be deposited as the smoothing material. That is, a metal or metal silicide can be conformally deposited and anisotropically etched to form the smoothing region 45. The use of a conductive material has the advantage of decreasing the contact resistance between the conducting layer 46 and the underlying region 41. This is because the contact area then includes both the areas contacted by smoothing region 45 and conducting layer 46 at the surface of underlying region 41. Note that the conducting layer itself physically contacts the underlying layer only over a diameter d&#34;, as shown in FIG. 5. This diameter has the advantage that it can be less than the minimum lithographic feature size if desired, allowing high-density circuitry to be obtained. However, in some cases the relatively smaller contact area provides a larger than desired contact resistance. 
     In another embodiment, the conformal smoothing layer 43 is polysilicon. The polysilicon can be made conductive, either p-type or n-type, corresponding to the conductivity type of underlying region 41, by implanting the appropriate dopant species in the polysilicon material after deposition. This can be followed by a heat treatment to further distribute the dopant evenly throughout the polysilicon, and activate the dopant. Alternately, techniques are known in the art for including a dopant species in polysilicon as it is being deposited. Thus, the smoothing region may be polysilicon doped to an appropriate level for reducing the contact resistance to a doped region 41. 
     In an alternate embodiment of the present technique, it is possible to still utilize a dielectric smoothing region while also obtaining reduced contact resistance. Referring to FIG. 7, the improved contact resistance is obtained by means of a conductive layer 76 that is deposited or otherwise formed on the underlying region 71 prior to the formation of the smoothing region (74), as discussed previously. The conductive layer 76 then provides a contact area to region 71 that is substantially equal to the area of the opening as formed. The subsequent process steps than can proceed substantially as before. For example, FIG. 8 shows the conductive layer (87), which is typically aluminum, as deposited. In FIG. 9 is shown as view of the contact window, wherein the conducting layer 87 has been patterned so as to remove the aluminum in regions exterior to the window opening. With the aluminum coverage now substantially coextensive with the window opening as formed, it is apparent that the contact is now headless. Note that the aluminum coverage can continue along the direction perpendicular to the plane of FIG. 9 as viewed. The good step coverage provided by the smoothing region 74 allows the aluminum to thus connect several underlying regions (71) together. It is apparent that conducting region 87 can serve as the bit line of a dynamic random access memory, or for numerous other purposes. 
     The formation of the conductive layer 76 can be facilitated by a technique that provides for selective metal deposition on doped region 71 while avoiding the metal deposition on dielectric 72. Such a technique is known for tungsten; see for example, &#34;Contact Resistance of LPCVD W/AL and PtSi/W/AL Metallization&#34;, S. Swirhun et al, IEEE Electron Device Letters, Vol. EDL-5, pp. 209-211 (1984). I recommend depositing the tungsten to a thickness of about 1,000 angstroms, using a non-oxidizing carrier gas (e.g., nitrogen ) to prevent the oxidation of the deposited tungstem. In an alternative method of achieving conductive layer 76, a conductive compound, for example a silicide, can be formed in situ at the surface of doped region 71. The conductive compound thus formed can include silicon derived from doped region 71. It is apparent that still other techniques are possible for selectively forming a conductive layer 76 at the bottom of the window prior to depositing the smoothing material. 
     One aspect of the present invention is that the dielectric material may be a flowable glass. Then, good step coverage, as over the gate of a field effect transistor, can be obtained by flowing the glass at an elevated temperature before forming the openings for the contacts of the present technique. The contact openings for the gate, source, and drain of a field effect transistor can then be formed and smoothed by the present technique. This can provide for the improved step coverage and small dimensions for contact windows formed by the present technique, while still smoothing and dielectrically isolating other features (e.g., a gate). 
     An additional layer can be provided between a glass layer and a semiconductor substrate. For example, a 1000 angstrom barrier layer of SiO 2  (not shown) can be grown or deposited on semiconductor layer (40) prior to depositing a glass layer (42). This barrier layer can then serve to prevent the migration of unwanted dopants (e.g., B or P) from the galss into the semiconductor region. Other barrier layer materials (e.g., Si 3  N 4 ) can alternately be used. Hence, the term &#34;overlying&#34; does not imply that the dielectric region necessarily contacts the underlying region, although that may be the case. 
     While the above description has been in terms of forming a contact to a doped region in silicon, it is apparent that the technique can be applied to doped regions in other semiconductor materials; for example, gallium arsenide and other III-V materials. Furthermore, the technique can be utilized in a &#34;double level metal&#34; technique, wherein it is desired to make contact between an overlying metal layer and an underlying metal layer. The dielectric separating the layers may be a flowable glass, or SiO 2 , or other material. The underlying region may be an electro-optic material, for example, lithium niobate, or a conductive pad formed thereon. Then, the conductive overlying layer that contacts the underlying region by the present technique can provide for the application of a control voltage to the electro-optic material. Still other applications are possible, as is apparent to a person of skill in the art.