Abstract:
A method and apparatus for detecting capacitive devices are disclosed. A circuit including two circuit paths is connected to an oscillator voltage source. Connecting a test capacitive device to a path of the circuit modifies the electric potential waveform at a point along the path. Passing the first circuit path through a reference comparator and the second circuit path through a phase-shifting comparator produces two output signals that are phase-shifted with respect to each other when the test capacitive device is functional. Analysis of the output signals allows detection or measurement of the test capacitive device.

Description:
TECHNICAL FIELD  
       [0001]     The invention relates generally to detection and measurement of electrical parameters and, more particularly, to capacitive device detection and measurement.  
       BACKGROUND  
       [0002]     Printed Circuit Cable Assemblies (PCCAs) for magnetic disc drives incorporate connection traces for micro-actuators. Manufacturers have added filter capacitors whose capacitances are as low as 100 picofarads to the connection traces in PCCAs. The presence of these capacitors must be detected during the PCCA assembly process.  
         [0003]     Detection and measurement of capacitive devices is normally performed by applying an alternating current signal to the capacitor being tested and measuring the phase difference between the applied voltage and the current drawn. This method is suboptimal for lower-capacitance capacitors because the difference in current caused by these capacitors is too small to be easily detected.  
       SUMMARY  
       [0004]     A new technique is needed for detecting capacitors that provides an easily detectable signal even when the capacitance of a test capacitive device is as low as 100 picofarads. It would also be desirable to provide a low-cost and easy-to-use technique for measuring very small capacitances.  
         [0005]     In general, the present disclosure is directed to a method and apparatus for detecting a capacitive device and, in particular, detecting a capacitive device by using a phase shift.  
         [0006]     In one aspect, the present disclosure is directed to a circuit for detecting a capacitive device. The circuit includes an oscillator that generates an output signal, wherein the output signal is substantially periodic; a first circuit path, connected to the output of the oscillator, that includes a first comparator; and a second circuit path, also connected to the output of the oscillator, that includes a second comparator. The oscillator and the comparators have parameters selected so that, when the capacitive device is electrically connected (i.e., connected either directly or indirectly through other circuit components) between the input of the second comparator and ground, the output of the second comparator is phase-shifted with respect to the output of the first comparator.  
         [0007]     In another aspect, the present disclosure is directed to a method of detecting a capacitive device including providing an oscillator that generates a substantially periodic signal, providing a first circuit path between the oscillator and the input of a first comparator, providing a second circuit path between the oscillator and the input of a second comparator, connecting the capacitive device between the input of the second comparator and ground, and detecting the capacitive device by comparing the phase of the output of the first comparator to the phase of the output of the second comparator.  
         [0008]     The techniques described in this disclosure provide advantages over prior techniques. For example, the signals produced by the comparators may be easier to detect than signals produced by other capacitor detection techniques. Moreover, the magnitude of the signals that permit detection of the capacitive device can be controlled by adjusting parameters of the circuits disclosed other than the capacitance of the capacitive device. In addition, the circuits disclosed can be constructed to be effective for capacitive devices having any capacitance.  
         [0009]     The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims. 
     
    
     BRIEF DESCRIPTION OF DRAWINGS  
       [0010]      FIG. 1  is a block diagram showing the operation of a capacitive device detector.  
         [0011]      FIG. 2  is a schematic diagram of a phase shift circuit that provides for detecting capacitive device.  
         [0012]      FIGS. 3A-3D  are graphs of four waveforms describing the voltage at various points of the phase shift circuit in  FIG. 2 .  
         [0013]      FIG. 4  is a schematic diagram of a phase shift circuit that provides for detecting multiple capacitive devices having varying capacitances.  
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0014]     Certain embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings. One skilled in the art will understand that certain features and positions of elements depicted in the figures can be altered or varied without conflicting with or deviating from the scope of the presently disclosed invention.  
         [0015]      FIG. 1  shows a block diagram that provides an overview of a capacitive device detector according to certain embodiments of the invention. An oscillator  100  supplies a periodic signal to a reference circuit path  110  and a phase shift circuit path  120 . The reference circuit path  110  includes a reference comparator  111  and may also include other components not shown in  FIG. 1 . The phase shift circuit path  120  includes a connection to a test capacitive device  121 , a phase-shifting comparator  122 , and possibly other components not shown in the figure. The signals from the reference circuit path  110  and the phase shift circuit path  120  are then compared using a technique for phase shift detection  130 . In some embodiments, additional processing  140  is employed to render the signal in a more useable format.  
         [0016]      FIG. 2  shows a schematic diagram illustrating a phase shift circuit that provides for detecting a test capacitive device  223 . The circuit includes an oscillator  200  connected to first and second circuit paths  210  and  220 . In the embodiment shown in  FIG. 2 , the oscillator  200  includes a Schmitt trigger  202 , a resistor  201  electrically connected between the input and output of the Schmitt trigger  202 , and a capacitor  203  electrically connected between the input of the Schmitt trigger  202  and ground. This type of oscillator is an astable multivibrator that produces a characteristic square wave signal. The period of the signal generated by the oscillator  200  is determined by the magnitudes of the resistor  201  and the capacitor  203 .  
         [0017]     A Schmitt trigger is a double-threshold comparator that exhibits hysteresis—the output of the trigger depends on both the magnitude of the input and the magnitude of the output. The output of a Schmitt trigger is a digital output—the trigger selects a high or a low output depending on the thresholds of the trigger, the electric potential of the input, and the output. In a non-inverting Schmitt trigger, for example, the output may switch from low to high if and only if the input signal reaches a first, higher threshold while the output is low. In such a comparator, the output may switch from high to low if and only if the input signal reaches a second, lower threshold while the output is high. The use of one or more Schmitt triggers in certain embodiments of the invention is meant to be exemplary only. Other types of comparators may also properly be used in alternative embodiments.  
         [0018]     The two circuit paths  210  and  220  of the phase shift circuit may include Schmitt triggers  212  and  222 . Preferably, the threshold voltages, shown in  FIG. 3B  at  321  and  322 , of the Schmitt triggers  212  and  222  are substantially equal. The circuit paths  210  and  220  include resistors  211  and  221  between the Schmitt triggers  212  and  222  and the oscillator  200  having substantially equal resistances. The first Schmitt trigger  212  provides a reference output against which the output of the second Schmitt trigger  222  can be compared. In some embodiments, the circuit paths  210  and  220  are configured such that, when no test capacitor  223  is electrically connected to the input of the second circuit path&#39;s Schmitt trigger  222 , the signals at the outputs of both Schmitt triggers  212  and  222  are substantially the same.  
         [0019]     When a test capacitive device  223  is added to the second circuit path  220 , between the input of the second Schmitt trigger  222  and ground, for example, the signal at the input of the second Schmitt trigger  222  becomes an exponential charge and discharge waveform. As the capacitance of the test capacitive device  223  increases, the period between the beginning of the change or discharge cycle and the point where the waveform reaches a threshold voltage increases. This period produces a phase shift in the output of the second Schmitt trigger  222  when compared to output of the first Schmitt trigger  212 .  
         [0020]     In the embodiment shown in  FIG. 2 , an XOR logic gate  230  accepts the outputs of the reference Schmitt trigger  212  and the phase-shifting Schmitt trigger  222 . The XOR gate  230  outputs a high signal if and only if the gate&#39;s input signals are unequal. If the first input signal remains at a constant phase, then a phase shift in the signal at the second input of the XOR gate, introduced by the presence of a test capacitive device, causes the output of the gate to have a combined duty cycle that is proportional to the capacitance of the test capacitive device.  
         [0021]     In the embodiment shown in  FIG. 2 , a low-pass filter  240  is electrically connected to the output of the logic gate  230 . The low-pass filter  240  averages the signal at the logic gate&#39;s output. Thus, the output electric potential is proportional to the combined duty cycle of the gate&#39;s output. The difference between the output electric potential when a test capacitive device  223  is present and the potential when the capacitive device  223  is absent is sufficiently large to be inexpensively measured, even when the capacitance of the test capacitive device  223  is as low as 100 picofarads. The embodiment shown in  FIG. 2  provides one simple way of interpreting the output of the logic gate  230 . Other techniques for interpreting the output of the comparators  212  and  222  and/or the logic gate  230  are also within the scope of this disclosure.  
         [0022]      FIGS. 3A-3D  show graphs of four exemplary electric potential waveforms at various points of interest in the phase shift circuit shown in  FIG. 2 . These waveforms are plotted with the assumption that the output of the oscillator  200  is substantially a square wave signal.  FIG. 3A  is a waveform of the electric potential at the output of the first (reference) Schmitt trigger  212 .  FIG. 3B  is a waveform of the electric potential at the input of the second (phase shifting) Schmitt trigger  222  when a test capacitive device  223  is connected between the input of the Schmitt trigger  222  and ground.  FIG. 3C  is a waveform of the electric potential at the output of the phase shifting Schmitt trigger  222 .  FIG. 3D  is a waveform of the electric potential at the output of the XOR gate  230 , where the inputs of the XOR gate  230  are electrically connected to the outputs of the Schmitt triggers  212  and  222 .  
         [0023]     Both Schmitt trigger outputs have the same period  310  ( 7 ) as the period of the oscillator output. In some embodiments, the threshold voltages  321  and  322  (V t+  and V t− ) of the phase shifting Schmitt trigger  222  are selected so that both thresholds fall within the range of electric potentials reached by the charge and discharge waveform. In these embodiments, the electric potential waveform during the charging cycle in  FIG. 3B  is given by the equation: 
 
 v ( t )= V (1− e   −t/τ ).  (1) 
 
         [0024]     The electric potential waveform during the discharging cycle in  FIG. 3B  is given by the equation: 
 
 v ( t )= Ve   −t/τ .  (2) 
 
         [0025]     In these equations, t represents the time that elapses from the beginning of a charge or a discharge cycle until the electric potential crosses the high threshold  321  or the low threshold  322  of the phase shifting Schmitt trigger  222 . Meanwhile, r represents the charge and discharge cycle time constant, which is equal to the product of the resistance R of the resistor  221  in the second circuit path  220  and the capacitance C of the test capacitive device  223 . V represents the amplitude  320  of the charge and discharge waveform in  FIG. 2B , and it is approximately equal to the amplitude of the output of the oscillator  200 .  
         [0026]     The phase shift  323  of the rising edge (t SR ) is the time at which the charging cycle reaches the high threshold  321  (V, t+ ) of the phase shifting Schmitt trigger  222 . At that time, the electric potential at the input of the Schmitt trigger  222 , from equation 1, is: 
 
 V   t+   =V (1 −e   −t     SR/RC   ).  (3a) 
 
         [0027]     Solving for t SR  produces an expression for the phase shift  323  of the charging cycle:  
               t   SR     =       -   RC     ⁢           ⁢     ln   ⁡     (     1   -       V     t   +       V       )                 (     3   ⁢   b     )             
 
         [0028]     Following a similar procedure for the phase shift  324  of the falling edge t SF  by starting with equation 2 produces an expression for the falling phase shift  324  in terms of the negative threshold  322  (V t− ) of the phase shift Schmitt trigger  222 :  
               t   SF     =       -   RC     ⁢           ⁢   ln   ⁢           ⁢       V     t   -       V               (   4   )             
 
         [0029]      FIG. 3D  shows that the output of the XOR gate will have a combined duty cycle of t SR +t SF . When a low-pass filter, integrator circuit, or other averaging mechanism is attached to the output of the gate  230 , the output voltage V out  will be the time average of the duty cycle produced by the XOR gate  230 . An expression for V out  in terms of the output amplitude  330  of the XOR gate (V D ) is:  
               V   out     =         V   D     ⁡     (       t   SR     +     t   SF       )       T             (   5   )               
         [0030]     By substituting equations 3b and 4 into equation 5 and rearranging terms, an expression for the capacitance C of the test capacitive device  223  in terms of the measured output voltage V out  and known circuit parameters T, R, V D , V, V t+ , and V t−  is obtained:  
             C   =       -     V   out       ⁢     T       RV   D     ⁢     ln   ⁡     [       (     1   -       V     t   +       V       )     ⁢       V     t   -       V       ]                     (   6   )             
 
         [0031]      FIG. 4  is a schematic diagram illustrating an alternative phase shift circuit capable of detecting capacitive devices. Some embodiments incorporate a tester that determines whether the output voltage of the phase shift circuit falls within a range, signifying that a finctioning test capacitive device is connected to the circuit. Other embodiments translate the output voltage of the circuit into the capacitance of the test capacitive device, using the expressions derived above, for example.  
         [0032]     Some exemplary embodiments include SN74AHC14 CMOS Hex Schmitt Triggers for use in connection with an oscillator  400 , a reference comparator  410 , or a phase shifting comparator  420 . In some embodiments, use of CMOS comparator circuits is beneficial. CMOS circuits typically have high input resistance and do not have an input pull-up resistor, a feature found in some TTL circuits, that may interfere with the charge and discharge cycles of the oscillator and the comparators. In some embodiments, use of single-chip comparators is beneficial. Single-chip devices help ensure that the characteristics, such as the propagation delay, of the reference and phase-shifting comparators  410  and  420  are closely matched and that the potential shift caused by any mismatch is minimal.  
         [0033]     In the embodiment shown in  FIG. 4 , the input to the phase-shifting comparator  420  is electrically connected to a multiplexer  421 , which selects the capacitive device to be tested. Connection of the multiplexer  421  introduces additional parasitic and other capacitances to the input of the phase-shifting comparator  420 . The addition of a fixed capacitor  411  to the input of the reference comparator  410  may compensate for the increased capacitance at the input of the phase-shifting comparator  420 . The capacitance of the fixed capacitor  411  may be selected such that the phase of the reference comparator&#39;s output is shifted by a fixed amount so that when no test capacitive device is selected by the multiplexer  421 , the outputs of the comparators  410  and  420  will have the same phase.  
         [0034]     The embodiment in  FIG. 4  includes an oscillator  400  that incorporates a capacitor that is selectable through a multiplexer  401 . The multiplexer  401  allows the oscillator&#39;s capacitor to be selected so that the period of the oscillator&#39;s output is large enough to accommodate the charge and discharge cycles at the input of the phase-shifting comparator  420 . For example, selecting a period that is at least approximately ten times the product of the capacitance of the test capacitive device  223  and the resistance of the resistor  221  along the second circuit path  220  produces a more easily detectable phase shift in the output of phase-shifting comparator  420 . Making the oscillator&#39;s capacitor selectable through the multiplexer  401  allows adjustment of the oscillator&#39;s period so that detection and measurement of test capacitive devices having varying capacitances is possible.  
         [0035]     In the embodiment shown in  FIG. 4 , the output signal of the phase shift circuit is passed through a logic gate  430 , a low-pass filter  431 , and a buffer  432 . The buffer  432  may be, for example, an op amp buffer circuit that provides an output that is substantially equal to its input and that is substantially isolated from any devices or components electrically connected to the output of the buffer. In other embodiments, the output of the logic gate may be connected to an integrator circuit.  
         [0036]     Various embodiments of the invention have been described. These and other embodiments are within the scope of the following claims.