Abstract:
An amplifier circuit with improved turn-on transient operation includes a differential amplifier and a selectively variable reference generator for controlling the amplifier output during circuit turn-on. The amplifier is biased by a single power supply and its differential inputs are driven by a reference voltage from the reference generator and a single-ended input signal. Following circuit turn-on, the selectively variable reference voltage, generated by charging the bypass capacitor with a constant current source, charges in a linear manner from ground potential toward its final value of, typically, half of the power supply voltage. This allows improved turn-on transient operation to be realized, e.g. reduced &#34;pops&#34; and &#34;clicks&#34; upon circuit turn-on, while giving the user increased flexibility in selecting the sizes of the reference voltage bypass capacitor and the input signal coupling capacitor.

Description:
RELATED APPLICATIONS 
     This is a Continuation-In-Part of U.S. patent application Ser. No. 08/542,596, filed Oct. 13, 1995, and entitled &#34;Amplifier Circuit With Reduced Turn-On And Turn-Off Transients, now U.S. Pat. No. 5,642,074,&#34; and U.S. patent application Ser. No. 08/546,910, filed Oct. 23, 1995, and entitled &#34;Amplifier Circuit With Reduced Turn-On And Turn-Off Transients, now U.S. Pat. No. 5,648,742.&#34; 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to analog amplifier circuits, and in particular, to DC-powered, analog amplifier circuits for receiving DC- or AC-coupled input signals and producing DC- or AC-coupled output signals. 
     2. Description of the Related Art 
     Referring to FIG. 1, analog amplifiers, such as audio power amplifiers, are often required to operate from a single power supply. In some cases, this means the AC input signal (VIN) must be AC-coupled to the input of the amplifier circuit since the internal reference for the amplifier circuit is at a DC voltage between DC circuit ground and the power supply potential, e.g. at a value equal to one-half of the applied DC power supply voltage. This DC reference is established by a voltage source, often in the form of a resistive voltage divider (R 1  and R 2 ) with a bypass capacitor (C B ) for charging to and maintaining the DC reference voltage across the lower resistor. (In this particular circuit, as is often the case for audio power amplifiers, two serially cascaded inverting amplifiers are used in a bridge-tied-load (&#34;BTL&#34;) configuration to drive a load, e.g. a speaker, with a differential output signal.) 
     However, this type of circuit suffers from a problem due to the necessity of having an AC-coupled input. Upon application of DC power (V+) to this circuit, the bypass capacitor begins to charge, as does the input coupling capacitor (C C ) which is grounded at the input side by the output impedance of the grounded input signal source. This results in the two capacitors having, at any given points in time during their charging or discharging periods, different voltages across them. In turn, this causes a transient signal to appear across the load. For example, during initial circuit turn-on, the current for charging the input coupling capacitor flows form the output of the first amplifier through its feedback (R F1 ) and input (R I1 ) resistors. The resulting signal at the output of the first amplifier appears at the load in the &#34;negative&#34; portion (VOUT-) of the differential output signal, with the &#34;positive&#34; portion (VOUT+) applied by the second, cascaded inverting amplifier. This initial signal across the load is a turn-on transient which in the case of an audio power amplifier produces a &#34;click&#34; or &#34;pop&#34; from the speaker. (Similarly, during circuit turn-off, a turn-off transient produced by unequal discharging of the capacitors may produce a &#34;click&#34; or &#34;pop&#34; from the speaker as well.) 
     Similar turn-on and turn-off transients occur in single-ended load (&#34;SEL&#34;) circuits, i.e. those amplifier circuits in which a single-ended output signal is provided to a grounded load (e.g. either VOUT- or VOUT+ only) rather than a differential output signal to a load isolated from circuit ground. Indeed, whereas in a BTL configuration the outputs may track each other during startup and thereby avoid producing a &#34;pop,&#34; an SEL configuration will virtually always produce a &#34;pop&#34; unless the output bias reference is at DC ground. 
     Conventional amplifier circuits have been developed which address this &#34;pop&#34; problem in a number of different ways. One approach has been to avoid using single power supply circuits by biasing the amplifier circuit between equal positive and negative power supply voltages with the output driving a grounded load. This allows the input coupling capacitor to be eliminated, thereby eliminating the cause of the turn-on and turn-off transients. However, this requires a second power supply which increases system complexity and costs. Another approach has been to apply the single DC power supply voltage in a gradual manner to initiate the flow of DC bias currents within the amplifiers. However, this results in the amplifier circuit having an indeterminate state of operation during turn-on and turn-off. Further, turn-on and turn-off transients can still occur when power is removed and quickly reinstated as in when a system reset is performed. 
     Accordingly, it would be desirable to have an analog amplifier which can be operated with a single power supply and reduced DC power related transients. 
     SUMMARY OF THE INVENTION 
     An amplifier circuit for operating with a single power supply and a selectively variable reference voltage for reducing turn-on transients in accordance with the present invention significantly reduces transients in its output signal due to circuit turn-on while providing increased flexibility in the selection of values for the reference voltage bypass capacitor and the input signal coupling capacitor. Output signal transients during circuit turn-on are more easily predicted due to simpler relationships between circuit variables and the transient output signal waveform, and circuit turn on time can be decreased with less significant increases in output signal transients. 
     An amplifier circuit for operating with a single power supply and a selectively variable reference voltage for reducing turn-on transients in accordance with one embodiment of the present invention includes an amplifier and a reference generator. The amplifier is for biasing between a power supply voltage and a circuit ground, receiving a reference voltage having a selectively variable magnitude and receiving an input signal and in accordance therewith providing an output signal which is approximately equal to a sum of the reference voltage and a selected multiple of the input signal. The reference generator is coupled to the amplifier and is for providing the reference voltage, wherein during a first time period the reference voltage magnitude changes linearly from approximately circuit ground toward a fixed reference voltage magnitude, and during a second time period subsequent to the first time period the reference voltage remains at the fixed reference voltage magnitude. 
     In accordance with another embodiment of the present invention, the amplifier has a gain associated therewith which is controlled by a control signal, and the amplifier gain, in accordance with such control signal, causes the selected multiple of the input signal to be approximately zero during the first time period. 
     In accordance with still another embodiment of the present invention, the amplifier is further for operating in a plurality of modes of operation for providing the output signal, and such plurality of modes of operation is controlled by a control signal such that during the first time period reception of the input signal by the amplifier is disabled and the selected multiple of the input signal is approximately zero and further such that during the second time period the selected multiple of the input signal is enabled to be non-zero. 
     These and other features and advantages of the present invention will be understood upon consideration of the following detailed description of the invention and the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a schematic diagram of a conventional analog amplifier circuit for amplifying audio signals in a bridge-tied-load (&#34;BTL&#34;) configuration. 
     FIG. 2 is a schematic diagram of an analog amplifier circuit including features in accordance with one embodiment of the present invention. 
     FIG. 3 is a schematic diagram of an analog amplifier circuit including features in accordance with another embodiment of the present invention. 
     FIG. 4 is a schematic diagram of an analog amplifier circuit including features in accordance with still another embodiment of the present invention. 
     FIG. 5 is a schematic diagram of an analog amplifier circuit including features in accordance with yet another embodiment of the present invention. 
     FIG. 6 is a voltage-versus-time diagram for the charging of the primary reference voltage for the circuits of FIGS. 2-5. 
     FIG. 7 is a schematic diagram of an improved reference generator for use in an analog amplifier circuit in accordance with yet still another embodiment of the present invention. 
     FIG. 8 is a voltage-versus-time diagram for the charging of the primary reference voltage with the improved reference generator of FIG. 7. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     Referring to FIG. 2, an amplifier circuit 100 including features in accordance with one embodiment of the present invention includes a first amplifier 102, a second amplifier 104, a controller 106 and a reference generator 108. As discussed in more detail below, the first amplifier 102 has a controllable gain which is controlled by the controller 106. Based upon the values of two reference voltages provided by the reference generator 108, the controller 106 establishes the gain of the first amplifier 102. The amplifier circuit 100 is driven by an AC signal source 110 through a coupling capacitor 112 and drives a load 114, e.g. a speaker. The first amplifier 102 provides an output signal VOUT- which drives the input to the second amplifier 104 and the load 114. The second amplifier 104 is an inverting amplifier with a gain of unity and provides an output signal VOUT+ which is substantially equal in magnitude and inverse in phase to the first output signal VOUT-. These two output signals VOUT-, VOUT+ form the &#34;positive&#34; and &#34;negative&#34; phases of a differential output signal provided to the load 114. It should be understood, however, that in accordance with the following discussion and the present invention, the load 114 can, alternatively, be a grounded load (e.g. an ac-grounded load, or a de-grounded load which is capacitively coupled to the amplifier output) which is driven by only the output signal VOUT- from the first amplifier 102. (Although the following discussion is in terms of an inverting amplifier, it should be understood that the principles of the present invention are equally applicable to a noninverting amplifier as well.) 
     The first amplifier 102 includes an operational amplifier (Op-Amp) 116, an input resistor 118, a feedback resistor 120 and feedback switch 122 (discussed in more detail below), connected substantially as shown. Similarly, the second amplifier 104 includes an Op-Amp 124, an input resistor 126 and feedback resistor 128, connected substantially as shown. In accordance with well known Op-Amp principles, the two amplifiers 102, 104 are inverting amplifiers with their respective voltage gains determined by the ratios of their feedback resistors to their input resistors. As noted above, the second amplifier 104 has a gain of one (unity). Therefore, its input 126 and feedback 128 resistors have equal values (R I2  =R F2 ). The input 118 and feedback 120 resistors for the first amplifier 102 can be selected to provide the desired signal gain for the amplifier circuit. The controller 106 includes a voltage comparator 130. The reference generator 108 includes a first resistive voltage divider consisting of serially connected resistors 136, 138, a standby switch 142 and a bypass capacitor 140, plus a second resistive voltage divider consisting of two serially connected resistors 132, 134, all connected substantially as shown. 
     During initial turn-on of the amplifier circuit 100, the standby switch 142 is closed (per a standby control signal 143) and the power supply 101 voltage V+ is applied to the Op-Amps 116, 124, comparator 130 and reference resistors 136, 138, 132, 134. (The standby control signal 143 can also be used, as shown, to control the turn-on and turn-off of the Op-Amps 116, 124, e.g. in accordance with the technique disclosed in copending, commonly assigned U.S. patent application Ser. No. 08/168,448, entitled &#34;Click/Pop Free Bias Circuit&#34; and filed on Dec. 17, 1993, the disclosure of which is hereby incorporated by reference.) Accordingly, the primary reference voltage 141 across the bypass capacitor 140 is initially zero due to the initially discharged state of the bypass capacitor 140 and begins to charge toward its steady state value based upon the ratio of the lower resistor 138 to the sum of the resistors 136, 138. Meanwhile, however, the secondary reference voltage 133 is at its full value immediately, as determined by the ratio of the lower resistor 134 to the sum of the resistors 132, 134. (As discussed in more detail below, the secondary reference voltage 133 is typically selected to be slightly less than the fully charged value of the primary reference voltage 141.) The comparator 130 compares these two reference voltages 141, 133 and provides an output control signal 131 to the switch 122 in the first amplifier 102 based upon such comparison. 
     Initially, as long as the primary reference voltage 141 is less than the secondary reference voltage 133, the control signal 131 causes the feedback switch 122 to be in its closed, e.g. shorted, state, thereby bypassing the feedback resistor 120. The causes the first amplifier 102 to function as voltage follower with respect to its non-inverting input which receives the primary reference voltage 141. Therefore, its output voltage 117 is equal to its input voltage, i.e. the primary reference voltage 141. This results in equal voltages being applied to the inverting and non-inverting inputs of the second Op-Amp 124, thereby causing its output voltage 125 to also equal the primary reference voltage 141. Accordingly, the two output signals VOUT-, VOUT+ to the load 114 are equal, thereby resulting in a net zero differential signal to the load 114. 
     Eventually, the primary reference voltage 141 charges up to and surpasses the secondary reference voltage 133. The comparator 130 senses this and adjusts its output control signal 131 accordingly. When the primary reference voltage 141 exceeds the secondary reference voltage 133 the comparator control signal 131 causes the bypass switch 122 to operate in its open, e.g. high impedance, state, thereby no longer bypassing the feedback resistor 120. The amplifier circuit 100 is then configured for its normal, steady-state AC signal operation. The AC input signal 111, coupled through the coupling capacitor 112, is amplified by the amplifiers 102, 104 and applied to the load 114. 
     As should be understood from the foregoing discussion, with a virtually net zero differential signal applied across the load 114, virtually no turn-on transients are presented to the load 114. Similarly, it should be understood that where the load 114 is a grounded load and a single-ended output signal (i.e. either VOUT- or VOUT+) is applied thereto, virtually no turn-on transients occur. During turn-on, the output signal equals the primary reference voltage 141 which is initially zero and then subsequently a slowly charging DC voltage. 
     Referring to FIG. 3, an amplifier circuit 100a including features in accordance with another embodiment of the present invention includes those elements as described above for FIG. 2, with the exception that single-pole, single-throw (&#34;SPST&#34;) feedback switch 122 has been replaced by single-pole, double-throw (&#34;SPDT&#34;) feedback switch 144. Operation of this circuit 100a corresponds to that of the circuit 100 of FIG. 2 as described above, with the &#34;input&#34; state (resistors R I1  and R F1  connected together at the inverting input of Op-Amp 116) and &#34;feedback&#34; state (output and inverting input of Op-Amp 116 connected together) of feedback switch 144 corresponding to the above-described &#34;open&#34; and &#34;closed&#34; states of feedback switch 122, respectively. (In this circuit 100a the input R I1  and feedback R F1  resistors both affect the RC time constant for charging the input coupling capacitor C C , whereas in the circuit 100 of FIG. 2 the feedback resistor R F1  plays no role.) 
     Referring to FIG. 4, an amplifier circuit 100b including features in accordance with still another embodiment of the present invention includes those elements as described above for FIG. 3, with the addition of another SPST feedback switch 146 and an input-feedback resistor R IF  148. Operation of this circuit 100b corresponds to that of the circuit 100a of FIG. 3 as described above, with the open and closed states of feedback switch 146 coinciding with the input and feedback states of feedback switch 144, respectively. (In this circuit 100b the resistance of the input-feedback resistor R IF  is significantly less than the total resistance of the input R I1  and feedback R F1  resistors (0≦R IF  &lt;&lt;R I1  +R F1 ). Therefore, the RC time constant for charging the input coupling capacitor C C  is affected primarily by the input-feedback resistor R IF  with virtually no effect from the input R I1  and feedback R F1  resistors. 
     In should be understood that each of the above-discussed switches 142, 144, 146 can be realized in a number of different ways. For example, simple electromechanical relays can be used. Alternatively, solid state switches in the form of transistors can be used. For example, metal oxide semiconductor field effect transistors (MOSFETs) can be used in the form of pass gates or transmission gates (both of which are well known in the art) with the control signal 131 accordingly being a single-ended or differential signal, respectively. Further, the switch control signal 131 can simply be binary, e.g. with high and low voltage values, or, alternatively, a &#34;trapezoidally-shaped&#34; signal with slower, predetermined rise and fall times so as to cause the switches 142, 144, 146 to turn on and off in a slower, more controlled manner. This latter type of signal can be particularly advantageous when the switches 142, 144, 146 are solid state and it is desirable for the switches 142, 144, 146 to have a finite serial impedance associated therewith when transitioning between their full-on and full-off states. 
     Referring to FIG. 5, an amplifier circuit 100c including features in accordance with yet another embodiment of the present invention includes a first amplifier 102, a second amplifier 104, a controller 106 and a reference generator 108. As discussed in more detail below, the amplifiers 102, 104 have controllable modes of operation which are controlled by the controller 106. Based upon the values of two reference voltages provided by the reference generator 108, the controller 106 determines the mode of operation of each of the amplifiers 102, 104. The amplifier circuit 100c is driven by an AC signal source 110 through a coupling capacitor 112 and drives a load 114, e.g. a speaker. The first amplifier 102 provides an output signal VOUT- which drives the input to the second amplifier 104 and the load 114. The second amplifier 104 is an inverting amplifier with a gain of unity and provides an output signal VOUT+ which is substantially equal in magnitude and inverse in phase to the first output signal VOUT-. These two output signals VOUT-, VOUT+ form the &#34;positive&#34; and &#34;negative&#34; phases of a differential output signal provided to the load 114. It should be understood, however, that in accordance with the following discussion and the present invention, the load 114 can, alternatively, be a grounded load (e.g. an ac-grounded load, or a dc-grounded load which is capacitively coupled to the amplifier output) which is driven by only the output signal VOUT- from the first amplifier 102. (Although the following discussion is in terms of an inverting amplifier, it should be understood that the principles of the present invention are equally applicable to a noninverting amplifier as well.) 
     The first amplifier 102 includes an operational amplifier (Op-Amp) 116, an input resistor 118, a feedback resistor 120 and an input switch 154 (discussed in more detail below), connected substantially as shown. Similarly, the second amplifier 104 includes an Op-Amp 124, an input resistor 126, a feedback resistor 128 and an input switch 156 (discussed in more detail below), connected substantially as shown. In accordance with well known Op-Amp principles, the two amplifiers 102, 104 are inverting amplifiers with their respective voltage gains determined by the ratios of their feedback resistors to their input resistors. As noted above, the second amplifier 104 has a gain of unity. Therefore, its input 126 and feedback 128 resistors have equal values (R I2  =R F2 ). The input 118 and feedback 120 resistors for the first amplifier 102 can be selected to provide the desired signal gain for the amplifier circuit. The controller 106 includes a voltage comparator 130. The reference generator 108 includes a first resistive voltage divider consisting of serially connected resistors 136, 138, a standby switch 142 and a bypass capacitor 140, plus a second resistive voltage divider consisting of two serially connected resistors 132, 134, all connected substantially as shown. 
     During initial turn-on of the amplifier circuit 100c, the standby switch 142 is closed (per a standby control signal 143) and the power supply 101 voltage V+ is applied to the Op-Amps 116, 124, comparator 130 and reference resistors 136, 138, 132, 134. (The standby control signal 143 can also be used, as shown, to control the turn-on and turn-off of the Op-Amps 116, 124, e.g. in accordance with the technique disclosed in copending, commonly assigned U.S. patent application Ser. No. 08/168,448, entitled &#34;Click/Pop Free Bias Circuit&#34; and filed on Dec. 17, 1993, the disclosure of which is hereby incorporated by reference.) Accordingly, the primary reference voltage 141 across the bypass capacitor 140 is initially zero due to the initially discharged state of the bypass capacitor 140 and begins to charge toward its charged value based upon the ratio of the lower resistor 138 to the sum of the resistors 136, 138. Meanwhile, however, the secondary reference voltage 133 is at its full value immediately, as determined by the ratio of the lower resistor 134 to the sum of the resistors 132, 134. (As discussed in more detail below, the secondary reference voltage 133 is typically selected to be slightly less than the fully charged value of the primary reference voltage 141 so as to introduce some hysteresis into the thresholding action of the comparator 130.) The comparator 130 compares these two reference voltages 141, 133 and provides an output control signal 131 to the switches 154, 156 based upon such comparison. 
     Initially, as long as the primary reference voltage 141 is less than the secondary reference voltage 133, the control signal 131 causes the switches 154,156 to operate in their respective first states as shown in FIG. 5. With the first input switch 154 in its first state, one terminal of the input coupling capacitor 112 is connected to the non-inverting input of the first Op-Amp 116, thereby resulting in the coupling 112 and bypass 140 capacitors being effectively connected in parallel (with the other terminal of the input coupling capacitor 112 connected to circuit ground 103 through the output impedance of the input signal source 110). This causes the coupling 112 and bypass 140 capacitors to be charged together by the primary reference voltage 141 through resistor 136 and the first amplifier 102 to function as a voltage follower with respect to its non-inverting input which receives the primary reference voltage 141. Therefore, the output voltage 117 of the first Op-Amp 116 is equal to its input voltage, i.e. the primary reference voltage 141. 
     With the second input switch 156 in its first state, such switch 156 is in its open, or high impedance, state, thereby interrupting the connection between the output of the first Op-Amp 116 and the input resistor 126 of the second Op-Amp 124. This causes the second amplifier 104 to also function as a voltage follower with respect to its non-inverting input which also receives the primary reference voltage 141. Therefore, the output voltage 125 of the second Op-Amp 124 is equal to its input voltage, i.e. the primary reference voltage 141. Accordingly, the two output signals VOUT-, VOUT+ to the load 114 are equal, thereby resulting in a net zero differential signal to the load 114. 
     Alternatively, the second input switch 156 can be omitted since the gain of the second amplifier 104 is selected such that VOUT+ will be equal in magnitude and opposite in phase to VOUT-, thereby producing a net zero voltage across the load 114 anyway. 
     Eventually, the primary reference voltage 141 charges up to and surpasses the secondary reference voltage 133. The comparator 130 senses this and adjusts its output control signal 131 accordingly. When the primary reference voltage 141 exceeds the secondary reference voltage 133 the comparator control signal 131 causes the switches 154, 156 to operate in their respective second states. With the first input switch 154 in its second state, the terminal of the input coupling capacitor 112 previously connected to the non-inverting input of the first Op-Amp 116 is now connected to the input resistor 118 of the first Op-Amp 116. With the second input switch 156 in its second state, such switch 156 is in its closed, e.g. shorted, state, thereby providing the output signal 117 of the first amplifier 102 as the input signal to the second amplifier 104. The amplifier circuit 100c is then configured for its normal, steady-state AC signal operation. The two amplifiers 102, 104 operate as two serially cascaded, inverting amplifiers which receive the single-ended AC-coupled input signal 113 and amplify it to provide to the load 114 a differential signal formed by two output signals VOUT-, VOUT+ which are equal in magnitude and inverse in phase. 
     As should be understood from the foregoing discussion, with a virtually net zero differential signal applied across the load 114, virtually no turn-on transients are presented to the load 114. Similarly, it should be understood that where the load 114 is a grounded load and a single-ended output signal (i.e. either VOUT- or VOUT+) is applied thereto, virtually no turn-on transients occur. During turn-on, the output signal equals the primary reference voltage 141 which is initially zero and then subsequently a slowly charging DC voltage. 
     It should be understood that each of the above-discussed switches 142, 144, 146, 154, 156 can be realized in a number of different ways. For example, simple electromechanical relays can be used. Alternatively, solid state switches in the form of transistors can be used. For example, metal oxide semiconductor field effect transistors (MOSFETs) can be used in the form of pass gates or transmission gates (both of which are well known in the art) with the control signal 131 accordingly being a single-ended or differential signal, respectively. Further, the switch control signal 131 can simply be binary, e.g. with high and low voltage values, or, alternatively, a &#34;trapezoidally-shaped&#34; signal with slower, predetermined rise and fall times so as to cause the switches 142, 144, 146, 154, 156 to turn on and off in a slower, more controlled manner. This latter type of signal can be particularly advantageous when the switches 142, 144, 146, 154, 156 are solid state and it is desirable for the switches 142, 144, 146, 154, 156 to have a finite serial impedance associated therewith when transitioning between their full-on and full-off states. 
     Referring to FIG. 6, the above-discussed difference between the primary 141 and secondary 133 reference voltages can be better understood. As discussed above, during turn-on, the primary reference voltage 141a charges from an initial value of zero to a final value of V 2  which is determined by the ratio of its resistors 136, 138. At a point t 1  in time, the primary reference voltage 141a equals the secondary reference voltage 133 which has a value of V 1  as determined by the ratio of its resistors 132, 134. Ultimately, at a subsequent point t 2  in time, the primary reference voltage 141a reaches it final value V 2 . During the initial time interval between &#34;time 0&#34; (initial turn-on) and time t 1 , feedback switch 122 (FIG. 2) is in its closed state, feedback switch 144 (FIGS. 3 and 4) is in its feedback state, feedback switch 146 (FIG. 4) is in its closed state and input switches 154, 156 (FIG. 5) are in their first states, and subsequently, after time t 1 , feedback switch 122 is switched to its open state, feedback switch 144 is switched to its input state, feedback switch 146 is switched to its open state and input switches 154, 156 are switched to their second states, as discussed above. 
     Alternatively, one or both of the values R 1 , R 2  of the voltage divider resistors 136, 138 can be made to be variable in such a way as to make their ratio selectable. For example, another resistor with a switch (not shown) can be connected across the upper resistor 136 for switching in and then out of a parallel connection with such resistor 136, thereby causing the primary reference voltage 141a to initially charge toward a higher voltage value V 2 . At point t 1  in time when the primary reference voltage 141a equals the secondary reference voltage 133, the control signal 131 can be used to open the switch and cause the primary reference voltage 141a to cease charging and remain at some fixed value above the threshold voltage V 1  as determined by the ratio of the voltage divider resistors 136, 138 (i.e. without the added resistor in parallel with the upper resistor 136). 
     As should be understood from the foregoing, an amplifier circuit including features in accordance with the present invention can have a controllable gain for reducing turn-on transients. During an initial time period, following initial turn-on of the circuit, the circuit gain is controlled in such a manner as to cause the output to follow its slowly rising internal DC reference voltage. Once such a DC reference voltage reaches a predetermined value, the gain of the circuit is re-established for normal, steady-state signal operation. 
     Alternatively, and as should also be understood from the foregoing, an amplifier circuit including features in accordance with the present invention can have controllable modes of operation for reducing turn-on transients. During an initial time period, following initial turn-on of the circuit, the circuit gain is controlled in such a manner as to cause the output to follow its slowly rising internal DC reference voltage. Once such DC reference voltage reaches a predetermined value, the gain of the circuit is re-established for normal, steady-state signal operation. 
     Referring to FIG. 7, an improved reference generator 108a for use in an analog amplifier circuit (e.g. the analog amplifier circuits 100, 100a, 100b, 100c of FIGS. 2-5) in accordance with yet still another embodiment of the present invention includes a SPDT switch 150 and constant current source 152 interconnected as shown with the above-discussed resistors 136, 138 and bypass capacitor 140. The switch 150 is preferably controlled by the above-discussed control signal 131. Upon initial application of DC power V+ and when the control signal 131 indicates that the previously discharged reference voltage 141 has not yet charged to the desired value, the control signal 131 causes the switch 150 to be in its first state whereby the constant current source 152 charges the bypass capacitor 140 with a constant current I R  153. This causes the reference voltage 141 to charge in a linear manner toward its desired value (see FIG. 8). Once the reference voltage 141 has reached its desired value, i.e., after it has surpassed the secondary reference voltage 133 (FIGS. 2-5), the control signal 131 changes state and causes the switch 150 to switch to its second state whereby the voltage 139 across resistor R 2 , which is also equal to the desired value, is applied across the bypass capacitor 140 to maintain its charge state. 
     A significant advantage provided by this reference generator 108a is that, for a given set of values R 1 , R 2  for the voltage divider resistors 136, 138, control over any &#34;pop&#34; or &#34;click&#34; presented to the load is no longer dependent upon only the value of the bypass capacitor 140, but is also now dependent upon the current 153 provided by the current source 152 for charging the capacitor 140. Furthermore, with the bypass capacitor 140 charged in a linear manner, the threshold at which circuit turn-on is deemed effective can be more precisely controlled. By selecting an appropriate value of charging current 153 a lower valued bypass capacitor 140 can be used to achieve the desired reduction in DC power related transients across the load. For example, the charging current 153 can be set at a relatively large value so that the start-up time is reduced as compared to the start-up time resulting from the use of a reference generator 108 with resistive charging (FIGS. 2-5). This can be advantageous in applications where a faster turn on is desired but low-value resistors to generate the half-supply reference voltage 139 cannot be tolerated. While the resulting DC power related transients would still be relatively large in such cases, they would nonetheless be smaller than those resulting from the use of resistive charging at the same charge rate. 
     Another significant advantage provided by this reference generator 108a is that the use of this improved reference generator 108a results in more easily predictable and controllable charging waveforms throughout the amplifier circuit. Using a constant current source to charge the bypass capacitor causes the charging waveforms to follow lower order differential equations. Accordingly, the peak values of any DC power related transients are more easily predicted and the relationships of the various controllable variables involved in producing such waveforms are also simpler to understand and predict. 
     Using conventional circuit analysis techniques (e.g., Kirchoff&#39;s voltage and current laws and Thevenin&#39;s and Norton&#39;s theorems), it can be shown that, for a given start-up time, DC power related transients are reduced to approximately one-half of those which would otherwise result. For example, using the conventional amplifier circuit of FIG. 1, with R 1  =48 Kohms, R 2  =50 Kohms, R I1  =20 Kohms, R F1  =20 Kohms, C C  =0.4 μF, R LOAD  =8 ohms, C LOAD  =1000 μF and V+=5 volts (where R LOAD  and C LOAD  are the values of the resistance and capacitance of the load 114), the circuit turn-on time is approximately 1 second and the transient across the load is approximately 74 millivolts. However, using the same circuit except for the substitution of the improved reference generator 108a, with C B  =0.1 μF and I R  =0.27 μA, the peak voltage transient appearing across the load is approximately 35 millivolts. 
     Based upon the foregoing, it should be understood that the above-discussed features of an amplifier circuit in accordance with another embodiment of the present invention can include various combinations of the above-discussed features. For example, the improved reference generator 108a can be used advantageously in the amplifier circuits 100, 100a, 100b, 100c of FIGS. 2-5. Also, an additional bypass switch can be used for shorting across input resistor R I1  118 in the amplifier circuits 100, 100a, 100b of FIGS. 2, 3 and 4 so as to cause the input coupling capacitor C C  and bypass capacitor C B  to be charged (linearly) simultaneously by the current I R  from the current source 152. Alternatively, such bypassing of the input resistor R I1  118 in the circuit 100b of FIG. 4 can be achieved by making the input feedback resistor R IF  =0 ohms and by placing the switches 144, 146 in their appropriate states. Such bypassing is not necessary in the circuit 100c of FIG. 5 due to the action of the input switch 154. 
     The above-discussed amplifier circuits use two inverting amplifiers connected in series to generate the differential output signal for driving the load. However, it should be understood that other amplifier circuit configurations can be used in accordance with the principles of the present invention. For example, two amplifiers connected in parallel, one inverting and the other noninverting, can be used as well whereby the amplifiers share a common input signal and provide the two opposing phases of the differential output signal. 
     Various other modifications and alterations in the structure and method of operation of this invention will be apparent to those skilled in the art without departing from the scope and spirit of the invention. Although the invention has been described in connection with specific preferred embodiments, it should be understood that the invention as claimed should not be unduly limited to such specific embodiments. It is intended that the following claims define the scope of the present invention and that structures and methods within the scope of these claims and their equivalents be covered thereby.