Abstract:
A high power factor regulator circuit which includes a variable multiplier, permitting the high power factor regulator circuit to be used with a number of input line voltage levels. In one embodiment a comparator determines the multiplication or gain factor to be applied in a control loop by comparing the rectified AC input voltage to a predetermined threshold value.

Description:
FIELD OF THE INVENTION 
     The invention relates to high power factor circuits and especially to high power factor regulator circuits for power supplies which are intended to be used with various input voltages. 
     BACKGROUND OF THE INVENTION 
     Off-line switching power supplies convert an alternating current (AC) supply voltage to a direct current (DC) output voltage. The power factor for such an off-line switching power supply is defined as the ratio of the actual input power (actual input voltage times actual input current) to the root-mean-square (RMS) input power (RMS input voltage times RMS input current). Although ideally the power factor for such a supply should be equal to one, in practice, the power factor is generally much less than one. 
     This decrease in power factor occurs because, although the actual input voltage varies sinusoidally, the actual input current does not. The actual input current is distorted relative to the actual input voltage. This distortion of the current from a sinusoidal waveform is due to the fact that the actual input current is drawn by the rectifier and the filter of the power supply as a series of current pulses which occur at the peak of the input voltage waveform. These current pulses cause the actual input power to be less than the RMS input power, and result in power factor values for such systems typically to range from 0.5 to 0.7. 
     Various methods have been developed to restore the power factor near unity. Referring to FIG. 1, one method known to the prior art utilizes a boost converter 30 controlled by a pulse width modulator (PWM) 40. Although the boost converter 30 is shown having an inductor 60 and a diode 62, other forms of boost conversion are contemplated. An input voltage sensing circuit 80 measures the input rectified AC line voltage (V in ) 50 and derives an signal (V AC ) 54 from it. 
     FIG. 1A depicts an embodiment of an input voltage sensing circuit 80 utilizing two resistors as a voltage divider to provide a voltage which varies as the line voltage. It is also possible to utilize a single resistor to produce a current which varies as the line voltage. Still other embodiments are possible. 
     Similarly, an output voltage sensing circuit 90 measures the output voltage (V o ) 56 to produce a signal (V os ) 58. FIG. 1B depicts an embodiment of an output voltage sensing circuit 90 utilizing two resistors as a voltage divider. Still other embodiments are possible. The signal (V os ) 58 is compared to a reference voltage (V ref ) 100 by an amplifier 110 and, an error signal (V e ) 112 is generated. This error signal (V e ) 112 is multiplied by the signal (V AC ) 54 of input voltage sensing circuit 80 to generate a multiplier signal (V m ) 114. A amplifier 130 compares this multiplier signal (V m ) 114 to a signal (V i ) derived from the input current (I in ) 118, as measured by a current sensor 140, and generates a control signal (V c ) 142. 
     FIG. 1C depicts an embodiment of a current sensor 140 which uses a resistor to produce the voltage drop (V i ) which is proportional to the current (I in ). Still other embodiments, such as those using a transformer, are also possible. 
     This control signal (V c ) 142 governs the operation of the PWM 40 in a manner well known to one skilled in the art, and hence controls the switching of the boost converter 30 through switch 144. This control loop is such that the instantaneous input current (I in ) 118 is forced to follow the multiplier signal (V m ) 114 which contains both the waveform and amplitude information necessary for good power factor control and voltage regulation. 
     The multiplier signal (V m ) 114 is governed by the equation: 
     
         V.sub.m =k.sub.2 * V.sub.e * V.sub.AC, 
    
     where k 2  is a constant which includes all the linear gain terms in the control loop. 
     Since the input current (I in ) 118 is forced to follow the multiplier signal (V m ) 114, the input current (I in ) 118 is governed by the equation: 
     
         I.sub.in =k.sub.1 * V.sub.m 
    
     where k 1  is a constant which includes all the terms from the boost converter 30, the pwm 40 and the amplifier 130. 
     Substituting the defining equation for V m  into this equation yields the relationship: 
     
         I.sub.in =k.sub.1 * k.sub.2 * V.sub.e * V.sub.AC. 
    
     This result means that the circuit described will meet the basic requirement of generating a sinusoidal input current (determined by the term V AC ) and a constant output voltage (determined by the term V e ). 
     However, the overall performance of this circuit will be less than optimum because, when the circuit is operated under the conditions of a constant load, the circuit should deliver constant power, regardless of changes the input voltage. Further, since there is minimal power lost within the boost converter itself, the average input power should also remain relatively constant. 
     The constraint of delivering constant power when under constant load, for any value of RMS input line voltage, means that the circuit should compensate for an increase in the RMS input line voltage with a corresponding reduction of RMS input current. However, since, as shown above, the input current is governed by expression: 
     
         I.sub.in =k.sub.1 * k.sub.2 * V.sub.e * V.sub.AC 
    
     an increase in V AC  54, which is determined by the input RMS line voltage, will cause an increase in input current (I in ) 118, rather than a decrease, for constant values of k 1  and k 2 . Additionally, with this increase in current, the average input power does not remain constant, but will increase as the square of the input voltage (V in ), unless it is corrected by a compensating change in the error term (V e ). 
     With sufficient gain in the voltage feedback loop, the error voltage (V e ) can be forced to correct for this change in line voltage (V AC ) although only at significant cost in dynamic performance. Additionally, the use of gain for line voltage correction causes both the maximum output power limit and the AC gain of the voltage feedback loop to vary as V in   2 , making the trade-off between good dynamic performance and low input current distortion impossible to achieve over a wide range of line voltages. 
     The ability to use the power supply over a wide range of line voltages, is an important consideration in the design of power supplies since the variation in RMS line voltages throughout the world is, for example, from about one hundred volts in Japan to about 240 volts in Great Britain. Thus the ability of a circuit to achieve high power factor in the presence of such a range of input line voltages would permit a single off-line power supply design to be used in all locations throughout the world. 
     Thus it would be desirable to provide a circuit which achieves high power factor over a wide range of input line voltages. 
     SUMMARY OF THE INVENTION 
     The invention relates to a high power factor circuit which includes a variable multiplier, permitting the high power factor circuit to be used with various input line voltages. 
     In one embodiment a comparator determines the multiplication or gain factor to be applied in a control loop by comparing the rectified AC input voltage to a predetermined threshold value. 
     In another embodiment a comparator determines the multiplication or gain factor to be applied to an error signal derived from the output voltage by comparing the rectified AC input voltage to a predetermined threshold value. 
     In yet another embodiment a comparator determines the multiplication or gain factor to be applied to a signal derived from the input voltage by comparing the rectified AC input voltage to a predetermined threshold value. 
     In still yet another embodiment a comparator determines the multiplication or gain factor to be applied to a control signal derived from the multiplication of an error signal by a signal derived from the input voltage by comparing the rectified AC input voltage to a predetermined threshold value. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     These and further features of the invention will be better understood with reference to the preferred embodiment and the drawing in which: 
     FIG. 1 is a schematic diagram of an embodiment of a high power factor circuit known to the prior art, FIG. 1A is an embodiment of an input voltage sensing circuit, FIG. 1B is an embodiment of an output voltage sensing circuit, FIG. 1C is an embodiment of a current sensor; 
     FIG. 2 is a schematic diagram of an embodiment of a high power factor circuit constructed in accordance with the invention; 
     FIG. 3 is a graph of the input RMS current versus voltage characteristics of the embodiment of the invention shown in FIG. 2; 
     FIG. 4 is a schematic diagram of another embodiment of a high power factor circuit constructed in accordance with the invention; 
     FIG. 5 is a schematic diagram of yet another embodiment of a high power factor circuit constructed in accordance with the invention; and 
     FIG. 6 is a schematic diagram of still yet another embodiment of a high power factor circuit constructed in accordance with the invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     As described above, although there is a great variation in line voltages from country to country, typical line voltages worldwide cluster within two relatively narrow ranges; 80-130 V and 200-265 V. Further, at any one location the line voltages typically are held to a tolerance of about ±15% Therefore, a high power factor circuit which is usable in a large number of locations worldwide need not respond to dynamic input voltage changes of from 80-265 V, but need only be able to respond to relatively small changes in the RMS input voltage within either of these two ranges. An embodiment of such a high power factor circuit is depicted in FIG. 2. In brief overview, in this embodiment, a boost converter 30 provides an output voltage (V o ) 56 at an output terminal under the control of a PWM 40. The PWM 40 is in turn responsive to a control signal (V c ) 142 which is generated from the output voltage (V o ) 56, the input voltage (V in ) 50 and the input current (I in ) 118 as discussed previously. 
     However, in this embodiment, a comparator 150 compares a dc representation of the input voltage (V in ) 50 as generated through a filter 152 to a threshold value 160 and generates a switching signal (V sw ) 162 which is a function of whether the input voltage (V in ) 50 exceeds an arbitrarily assigned intermediate voltage value to which the threshold value 160 corresponds. It should be noted that in alternative embodiments filter 152 could be replaced by a peak detector or averaging circuit. The threshold value 160 is thus picked to represent an intermediate voltage value between the two ranges of interest. In one embodiment the threshold voltage is set to equate to a input voltage value (V in ) of substantially 170 V, a value intermediate between 80-130 V and 200-265 V, the two ranges of interest. Thus when the filtered input voltage exceeds the threshold value 160, the input voltage (V in ) 50 falls within the second range of line voltages. Conversely, when the input voltage (V in ) 50 is less than the threshold value 160, the input voltage (V in ) 50 falls within the first range of line voltages. 
     The switching signal (V sw ) 152 from the comparator 150 controls a switch 170 which is connected in parallel with an amplifier 180 having a gain, in this embodiment, of four. The gain of four is a result of the fact that the change in current is proportional to the square of the change in voltage. Thus to cover a range of voltage from 120 V to 240 V (a factor of two change in voltage), the current would need to change by a factor of four. Similarly, to cover a voltage range of 100 V to 300 V, a factor of three, the gain factor is nine. Thus the gain used is determined by the range of input voltages to be covered. 
     Amplifier 180, switch 170 and multiplier 120 constitute a multiplier circuit 122. In this embodiment the amplifier 180 and switch 170 are connected in series between amplifier 110 and multiplier 120. Thus, when the switch 170 is open, the error signal (V e ) 112 generated by amplifier 110 is multiplied by a gain of four by amplifier 180 prior to being multiplied by the signal (V AC ) 54 of input voltage sensing circuit 80. When the switch 170 is closed, the error signal (V e ) is shunted around the amplifier 180 and thereby fed directly to the multiplier 120. 
     Thus, because of the presence of the amplifier 180 and switch 170, the multiplier signal (V m ) is governed by the equations: 
     
         V.sub.m =4 * k.sub.2 * V.sub.e * V.sub.AC for V.sub.in &lt;threshold value 
    
     and 
     
         V.sub.m =k.sub.2 * V.sub.e * V.sub.AC for V.sub.in &gt;threshold value. 
    
     Again since the input current (I in ) 118 is forced to follow the multiplier signal (V m ), the input current (I in ) 118 is governed by the equation: 
     
         I.sub.in =k.sub.1 * V.sub.m 
    
     Substituting the defining equations for (V m ) 114 into this equation yields: 
     
         I.sub.in =4 * k.sub.1 * k.sub.2 * V.sub.e * V.sub.AC for V.sub.in &lt;threshold value 
    
     
         I.sub.in =k.sub.1 * k.sub.2 * V.sub.e * V.sub.AC for V.sub.in &gt;threshold value. 
    
     FIG. 3 depicts the input current versus the input voltage curve for these ranges. 
     Referring to FIG. 4, in another embodiment, a comparator 150 comparing the dc representation of the input voltage (V in ) 50 to an intermediate voltage value to which the threshold value 160 corresponds, generates a switching signal (V sw ) 162 as previously described. Also, as in the previous embodiment, the switching signal (V sw ) 162 from the comparator 150 controls a switch 170 connected in parallel with a amplifier 180. Again, in this embodiment amplifier 180, multiplier 120 and switch 170 constitute a multiplier circuit 122. However, in this embodiment, the amplifier 180 and the parallel switch 170 are connected in series between a multiplier 120 and a amplifier 130. In this embodiment, the signal (V AC ) 54 of a voltage sensing circuit 80 and the error signal (V e ) 54 from a amplifier 110 are multiplied together in multiplier 120 to generate a signal (V eAc ) 182 prior to being amplified by the amplifier 180. The result is the same as in the previous embodiment with the current (I in ) 118 being governed by the equations: 
     
         I.sub.in =4 * k.sub.1 * k.sub.2 * V.sub.e * V.sub.AC for V.sub.in &lt;threshold value 
    
     
         I.sub.in =k.sub.1 * k.sub.2 * V.sub.e * V.sub.AC for V.sub.in &gt;threshold value. 
    
     Referring to FIG. 5, in yet another embodiment, a comparator 150 again compares the dc representation of the input voltage (V in ) 50 to an intermediate voltage value to which the threshold value 160 corresponds, to generate a switching signal (V sw ) 162. The signal (V sw ) 162 from the comparator 150 again controls a switch 170 connected in parallel with a amplifier 180. As before, in this embodiment amplifier 180, multiplier 120 and switch 170 constitute a multiplier circuit 122. In this embodiment however the amplifier 180 and parallel switch 170 are connected in series between a multiplier 120 and the output terminal of a voltage sensing circuit 80. Thus in this embodiment, the signal (V AC ) 54 of the voltage sensing circuit 80 is multiplied by a factor of four by amplifier 180 to generate signal (V ACg ) prior to being multiplied in multiplier 120 by the error signal (V e ) 112 of a amplifier 110 to generate the multiplier signal (V m ) 114. Again the result is the same as in the previously described embodiments with the current being governed by the equations: 
     
         I.sub.in =4 * k.sub.1 * k.sub.2 * V.sub.e * V.sub.AC for V.sub.in &lt;threshold value 
    
     and 
     
         I.sub.in =k.sub.1 * k.sub.2 * V.sub.e * V.sub.AC for V.sub.in &gt;threshold value. 
    
     Thus, in all these circuits, the error term (V e ) is reduced to a small enough value that it can be readily corrected regardless of input line voltage value. Further, these embodiments provide high power factor for a variable input voltage using only a comparator and a switchable fixed gain amplifier. 
     It is possible to provide for more than one threshold value and gain by increasing the number of amplifiers 180 and comparators 150. FIG. 6 depicts a schematic of an embodiment of the comparator-switch-multiplier portion of the invention in which multiple comparators (250(1) through 250(n)) control respective switches (270(1) through 270(n)) to permit amplifiers (280(1) through 280(n)) to provide up to (n) times the gain of one amplifier 280 responding to (n) threshold values. In this embodiment an input signal (Sig in ), which could be V AC , V eAC , or V e  depending upon which of the previous embodiments of the invention is being used, is an input signal to the first of (n) amplifiers 280, connected in series. As before, each amplifier 280 is connected in parallel with a switch 270 controlled by a respective comparator 250. The input voltage (V in ) 50 is the input signal to one input terminal of each comparator 250. The second input of the first comparator 250(1) is the reference voltage threshold 160. The threshold voltage is also the input to a voltage divider 290 constructed of n resistors connected in series 291(1) through 291(n). The divided down voltages from the threshold voltage 160 (V T (1) through V T (n)) provide the second input to comparators 250(2) through 250(n). 
     When the input voltage (V in ) is below the lowest threshold, all the switches 270 are open and the gain is (n) times. As the input voltage increases above the respective threshold voltage (V T ) of each comparator 250, the comparator 250 causes its respective switch 270 to close and to shunt its respective amplifier 280, reducing the gain. When the input voltage increases above the threshold voltage 160 all the switches 270 are closed and the gain is reduced to one. Thus (n) gains, corresponding to (n) thresholds can be generated. It should be noted that it is also possible to perform this function with a variable gain amplifier. 
     Having showed the preferred embodiments, those skilled in the art will realize many variations are possible which will still be within the spirit and scope of the claimed invention. Therefore, it is the intention to limit the invention only as indicated by the scope of the claims.