Abstract:
In the case of magnetic head of magnetoresistance effect type whose breakdown voltage is as low as 0.3 V, it is impractical to ignore even a very small amount of static electricity that occurs during fabrication or use. In one embodiment, the desired magnetic head is produced by forming an SiO 2  layer on a silicon slider, thereby forming an SOI substrate; forming on the SOI substrate circuits to protect a TMR element from overvoltage and a read-write circuit; forming field effect transistors from an Si semiconductor layer (formed by reduction of the SiO 2  layer or epitaxial growth on the SiO 2  layer); forming three electrodes (source, gate, drain) on the Si semiconductor layer; forming a Schottky diode by Schottky contact (metal) with the Si semiconductor layer; forming overvoltage protective circuits of aluminum wiring on the SOI substrate; and forming a TMR element.

Description:
CROSS-REFERENCES TO RELATED APPLICATIONS  
       [0001]     This application claims priority from Japanese Patent Application No. JP 2003-432646, filed Dec. 26, 2003, the entire disclosure of which is incorporated herein by reference.  
       BACKGROUND OF THE INVENTION  
       [0002]     The present invention relates to a magnetic head of magnetoresistance effect type to be used for a magnetic disk drive and a process for production thereof. More-particularly, the present invention relates to a magnetic head of magnetoresistance effect type which includes a magnetoresistive element and an overvoltage protective circuit arranged together on a slider, and to a process for production thereof.  
         [0003]     A magnetic disk drive is usually provided with a magnetic head of magnetoresistance effect type which is a magnetoresistive element (such as MR element, MGR element, and TMR element). Unfortunately, the magnetoresistive element is easily broken on account of its low withstand voltage. Existing GMR (Giant Magnetoresistive) heads are broken at about 0.5 V and promising TMR (Tunneling Magnetoresistive) heads are broken at about 0.3 V. In other words, TMR heads are subject to electro-static destruction (ESD) resulting from static electricity (hundreds of mV) which occurs during fabrication or within the magnetic disk drive.  
         [0004]     A usual measure to cope with this situation is to connect a diode clamp circuit to the input of the preamplifier of the MR element. This diode clamp circuit prevents a voltage higher than 0.6 V from being applied across both terminals of the MR element or across the MR element and the ground after the wired components have been incorporated into the head stack assembly (HSA). The 0.6 V is the voltage drop (Vf) that occurs in the forward direction of the diode.  
         [0005]     Japanese Patent Laid-open No. 2002-358608 (pp. 4-5, FIG. 1) discloses a technology relating to protection from overvoltage. This technology is designed to protect the magnetic head from disturbing noise which might come in during fabrication, while keeping both high recording density and high response speed. The object is achieved in the following manner. A silicon layer held between insulating films is formed on the substrate. On this silicon layer are formed at least one diode clamp circuit and a recording-reading amplifier circuit. The clamp circuit electrically connects any two members selected from the first shield, the second shield, the first electrode, and the second electrode with each other, all of which constitute the magnetoresistive element, and the substrate.  
       BRIEF SUMMARY OF THE INVENTION  
       [0006]     In the case of TMR element whose breakdown voltage is as low as  0 . 3  V, it is impractical to ignore even a very small amount of static electricity that occurs during fabrication before the TMR element is incorporated into the HSA. It has been common practice to set the protecting voltage at  0 . 6  V for the TMR element incorporated into the HSA. This voltage, however, is too high. Moreover, the conventional clamp circuit is constructed such that clamping is performed by the diode in the electric circuit after current has passed through the inductance inherent to the wire connecting the TMR element and the preamplifier together. The disadvantage of this construction is that the actual clamping voltage increases by the product of inductance and current (due to static electricity). The invention disclosed in JP 2002-358608 mentioned above merely provides a protective circuit which does not work satisfactorily when the breakdown voltage approaches 0.3 V. Therefore, protection of TMR elements whose breakdown voltage is as low as 0.3 V requires a protective circuit which works accurately at a desired clamping voltage. Moreover, arranging a TMR element and a clamp circuit on a single AlTiC slider is disadvantageous from the standpoint of technology, performance, and production cost.  
         [0007]     It is a feature of the present invention to provide a magnetic head of magnetoresistance effect type which has a magnetoresistive element and an overvoltage protective circuit therefor arranged together on a slider.  
         [0008]     It is another feature of the present invention to provide a process for producing a magnetic head of magnetoresistance effect type which has a magnetoresistive element and an overvoltage protective circuit therefor arranged together on a slider.  
         [0009]     The first feature mentioned above is achieved by a magnetic head of magnetoresistance effect type which comprises a slider formed from silicon, an insulating layer formed on the slider, a read head having a magnetoresistive element formed on the insulating layer, and an overvoltage protective circuit for the magnetoresistive element formed on the insulating layer.  
         [0010]     In some embodiments, the insulating layer is an SiO 2  layer. The magnetoresistive element is a TMR (Tunneling Magnetoresistive) element. The protective circuit is a clamp circuit including Schottky diodes connected to both terminals of the magnetoresistive element. The protective circuit includes two Schottky diodes connected in parallel in two directions to the magnetoresistive element. The protective circuit includes field effect transistors connected in parallel to the magnetoresistive element. The magnetoresistive element is a TMR (Tunneling Magnetoresistive) element and the protective circuit is a clamp circuit including Schottky diodes connected to both terminals of the TMR element. The magnetoresistive element is a TMR (Tunneling Magnetoresistive) element and the protective circuit includes field effect transistors connected in parallel to the TMR element.  
         [0011]     The first feature mentioned above can also be achieved by a magnetic head of magnetoresistance effect type which comprises a slider formed from silicon, an insulating layer formed on side of the slider, a read head having a magnetoresistive element formed on the insulating layer, a write head formed on the upper part of the read head, and a protective circuit to protect the magnetoresistive element from overvoltage, the protective circuit being formed along the magnetoresistive element.  
         [0012]     In some embodiments, the insulating layer is an SiO 2  layer. The magnetoresistive element is a TMR (Tunneling Magnetoresistive) element. The protective circuit is a clamp circuit including Schottky diodes connected to both terminals of the magnetoresistive element. The protective circuit includes two Schottky diodes connected in parallel in two directions to the magnetoresistive element. The magnetoresistive element is a TMR (Tunneling Magnetoresistive) element, the write head is an inductive head and the protective circuit is a clamp circuit including Schottky diodes connected to both terminals of the TMR element. The protective circuit includes field effect transistors connected in parallel to the magnetoresistive element. The magnetoresistive element is a TMR (Tunneling Magnetoresistive) element and the protective circuit includes two Schottky diodes connected in parallel in two directions to the TMR element. The magnetoresistive element is a TMR (Tunneling Magnetoresistive) element and the protective circuit includes field effect transistors connected in parallel to the TMR element.  
         [0013]     The second feature mentioned above is achieved by a process for producing a magnetic head of magnetoresistance effect type. The process comprises providing a substrate having an insulating layer on one side of silicon wafer; forming a first wiring on the insulating layer; forming an Si layer on part of the insulating layer; forming on the Si layer a clamp circuit including Schottky diodes; forming wiring for the clamp circuit; forming on the insulating layer a magnetoresistive element adjacent to the clamp circuit; and connecting the magnetoresistive element and the clamp circuit to the first wiring.  
         [0014]     In some embodiments, the insulating layer is an SiO 2  layer. The magnetoresistive element is a TMR (Tunneling Magnetoresistive) element and a write head is laminated on the upper part of the TMR element.  
         [0015]     The second feature mentioned above can also be achieved by a process for producing a magnetic head of magnetoresistance effect type. The process comprises providing a substrate having an insulating layer on one side of silicon wafer; forming a first wiring on the insulating layer; forming an Si layer on part of the insulting layer; forming on the Si layer a shunt circuit including field effect transistors each having a source, gate, and drain; forming wiring for the shunt circuit; forming on the insulating layer a magnetoresistive element adjacent to the shunt circuit; and connecting the magnetoresistive element and the shunt circuit to the first wiring.  
         [0016]     The insulating layer is an SiO 2  layer. The magnetoresistive element is a TMR (Tunneling Magnetoresistive) element and a write head is laminated on the upper part of the TMR element.  
         [0017]     Embodiments of the present invention permit a magnetoresistive element and an overvoltage protective circuit therefor to be arranged together on a slider. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0018]      FIG. 1  is a partial sectional view showing the slider of the magnetic head of magnetoresistance effect type and the overvoltage protective circuit in one embodiment of the present invention.  
         [0019]      FIG. 2  is a sectional view showing the overvoltage protective circuit formed on the slider (Si wafer) in one embodiment of the present invention.  
         [0020]      FIG. 3  is a perspective view of the TMR head in one embodiment of the present invention.  
         [0021]      FIG. 4  is a perspective view showing a magnetic disk drive provided with a magnetic head assembly having the magnetic head of magnetoresistance effect type in one embodiment of the present invention.  
         [0022]      FIG. 5  is a circuit diagram of a clamp circuit with a Schottky diode.  
         [0023]      FIG. 6A  is a circuit diagram of one example of clamp circuits with temperature compensation taken into account.  
         [0024]      FIG. 6B  is a circuit diagram of one example of clamp circuits with temperature compensation taken into account.  
         [0025]      FIG. 6C  is a circuit diagram of-one example of clamp circuits with temperature compensation taken into account.  
         [0026]      FIG. 7A  is a circuit diagram showing one example of the overvoltage protective circuit with field effect transistors.  
         [0027]      FIG. 7B  is a circuit diagram showing one example of the overvoltage protective circuit with field effect transistors.  
         [0028]      FIG. 7C  is a circuit diagram showing one example of the overvoltage protective circuit with field effect transistors.  
         [0029]      FIG. 7D  is a circuit diagram showing one example of the overvoltage protective circuit with field effect transistors. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0030]      FIG. 4  shows a magnetic disk drive  10  in which is used the TMR head (Tunneling Magnetoresistive Head) embodied in an embodiment of the present invention. The magnetic disk drive  10  includes a boxy base  11 , a spindle motor (not shown) fixed thereto, a magnetic disk  13  which is attached to and turned together with the spindle  12  of the spindle motor, and a pivot  14  fixed to the base  11 . The pivot  14  rotatably supports an actuator  15 , which has an arm  16  to which a suspension  17  is attached. The suspension  17  has the TMR head  20  attached to the tip thereof through a gimbal (not shown). These arm  16 , suspension  17 , gimbal, and TMR head  20  constitute a mechanism called magnetic head assembly.  
         [0031]     To the other end of the actuator  15  is attached a coil (not shown), which, in combination with a magnetic circuit (not shown) fixed to the base  11 , constitutes a voice coil motor (VCM)  18 . VCM  18  rotates and drives the actuator  15  around the pivot  14 . The actuator  15  turns to make the TMR head  20  move in the radial direction of the magnetic disk  13  to the desired recording track of the magnetic disk  13 . The base  11  is provided with a ramp mechanism  19  on which the TMR head rests when it retracts from the magnetic disk  13 . The base  11  has on its side a connector  21  for interface with external units. The other sides of the base  11  are surrounded by a frame bumper  22  which protects the constituents from external shocks.  
         [0032]      FIG. 3  is a perspective view of the TMR head  20  embodied in the present embodiment as viewed from the flying surface. The TMR head  20  includes a slider (not shown), a lower magnetic shield layer  201  formed thereon, a nonmagnetic conductive metal film  202  formed thereon which functions as a lower electrode, and a TMR element  203  composed of an antiferromagnetic layer, a pinned magnetic layer, a barrier layer, and a free layer which are sequentially laminated on top of the other. The TMR element  203  has high-resistance soft magnetic film  204  formed at both ends thereof. On the TMR element  203  and one of the high-resistance soft magnetic film  204  is selectively laminated a nonmagnetic conductive film  205  which serves as an upper electrode. The nonmagnetic conductive metal films  202  and  205 , which are impermeable to magnetic flux, constitute a read gap. Adjacent to the high-resistance soft magnetic film  204  and the nonmagnetic conductive film  205  is formed an upper magnetic shield layer  206 .  
         [0033]     The TMR element  203  incorporated into the above-mentioned system functions as a read head which, when a sensing current is applied across the lower electrode  202  and the upper electrode  205  in the direction perpendicular to the film surface, detects the resistance change as electric signals which takes place in the TMR element  203  in response to the strength of external magnetic field.  
         [0034]     On the upper magnetic shield layer  206  is formed, with an insulating separating layer  207  placed thereunder, an inductive magnetic head (write head) for recording. The write head includes a lower magnetic layer  208  and an upper magnetic layer  211  (both constituting a magnetic circuit) formed on the separating layer  207 , an upper magnetic pole tip  212  formed at the end of the upper magnetic layer  211 , and a magnetic gap  209  formed between the lower magnetic layer  208  and the upper magnetic pole tip  212  of the upper magnetic layer  211 . The lower magnetic layer  208  and the upper magnetic layer  211  are magnetically connected to each other behind (not shown) so that they constitute a magnetic circuit having the magnetic gap  209  at its end. In addition, a conducting coil  210  is formed between the lower magnetic layer  208  and the upper magnetic layer  211  with an insulating layer interposed between them.  
         [0035]      FIG. 2  shows an overvoltage protective circuit embodied in the present embodiment, which is formed on a silicon slider  31 . On the silicon wafer is an SOI (Silicon on Insulator)  30  as a substrate. (The SOI substrate  30  is an SiO 2  layer  32  formed by oxidizing the surface of the silicon wafer  31 .) On the SiO 2  layer  32  are formed an overvoltage protective circuit to protect the magnetoresistive element (not shown) from overvoltage, together with a preamplifier for the read-write circuit (not shown). The overvoltage protective circuit includes a field effect transistor (PMOSFET)  33 , a field effect transistor (nMOSFET)  34 , and a Schottky diode  35 . The pMOSFET  33  is formed by reducing the SiO 2  layer  32  into an Si semiconductor layer (N-body). The (rtMOSFET)  34  is formed by reducing the SiO 2  layer  32  into an Si semiconductor layer (P-body). Alternatively, the Si semiconductor layer may be formed by epitaxial growth on the SiO 2  layer  32 , and the three electrodes of source, gate, and drain are formed later. The Schottky diode  35  may be formed from the Si semiconductor layer (N-body) formed as mentioned above and a Schottky contact (metal) in contact therewith. The metal should preferably be titanium so that the Schottky diode  35  has a voltage drop of 0.3 V in the forward direction. Incidentally, in the above-mentioned embodiment, the SiO 2  layer is formed by oxidizing the surface of the SOI substrate(or silicon wafer); however, the SiO 2  layer may be replaced by any other adequate insulating layer formed on the silicon wafer.  
         [0036]      FIG. 1  shows a part of the TMR element  203  which is formed, together with an ESD protective circuit (Schottky diode)  35 , on the SOI substrate  30 . The Schottky diode  35  and aluminum wiring  36  are formed first on the SOI substrate so that the TMR element  203  is not affected by heat applied to form the Schottky diode  35 . After that, the TMR element  203  is formed as mentioned above. Connection between the Schottky diode  35  and the TMR element  203  is accomplished by soldering or ultrasonic bonding  37 . Therefore, this embodiment of the present invention offers the advantage that the TMR element  203  is not affected by high temperatures (about 400° C.) involved in the aluminum wiring process.  
         [0037]     The embodiment shown in  FIG. 1  permits the TMR element  203  and the Schottky diode  35  (as the protective circuit) to be arranged horizontally on the SOI substrate  30 . However, it may be modified such that the TMR element  203  and the protective circuit  35  are arranged vertically.  
         [0038]     FIGS.  5  to  7  show some examples of the overvoltage protective circuits  33 ,  34 , and  35 .  FIG. 5  shows a clamp circuit in which Schottky diodes are connected parallel in two directions to the ends (RD+ and RD−) of the TMR element. The Schottky diode has a voltage drop (Vf) of 0.3 V in the forward direction.  
         [0039]      FIGS. 6A  to  6 C show some examples of circuits to keep Vf constant over a broad temperature range by temperature compensation. The circuit shown in  FIG. 6A  is designed to protect the TMR element at voltages greater than 0.3 V which is the difference between a pn-junction diode (Vf=0.6 V) and a Schottky diode (Vf=0.3 V). The fact that they have similar temperature coefficients is utilized to cancel their temperature characteristics when the ambient temperature changes. Two identical circuits are connected in two directions so that the desired effect is produced when either of a positive or negative pulse is applied to the terminal RD+ or RD−.  
         [0040]     The circuit shown in  FIG. 6B  has Schottky diodes connected in parallel to the TMR element in the backward bias direction. It produces the same effect as that shown in  FIG. 5  which has also Schottky diodes in the backward bias direction. It does not interfere with normal operation so long as Vf is 0.3 V at low temperatures and Vf does not become negative at high temperatures.  
         [0041]     The circuit shown in  FIG. 6C  is different from those shown above in that the pn-junction diode is replaced by a Schottky diode. This circuit offers the advantage that any metal is selected freely so that the resulting Schottky diode has a voltage difference (Vf) of 0.3 V. Moreover, it produces a better effect than those shown above in cancellation of temperature characteristics because it employs Schottky diodes of the same type.  
         [0042]      FIGS. 7A  to  7 D show some examples of circuits to shunt both terminals of the TMR element by means of one or two field effect transistors (nMOSFET) having a slightly high gate voltage. The circuit shown in  FIG. 7A  is designed to shunt both terminals of the TMR element at high speeds owing to an increase in the gate voltage by 0.6 V equivalent to Vf of the pn-junction diode. This provision is necessary because the source-follower (circuit to connect drain and gate, thereby skipping the diode) loses speed (due to rise in on-resistance) when the source voltage and gate voltage (=drain voltage) approach Vth (0.9 V) of the FET on-voltage during shunting.  
         [0043]     The circuit shown in  FIG. 7B  is similar to that shown in  FIG. 6B , except that it has a simplified protective circuit which works when a positive ESD pulse is applied to RD− or a negative ESD pulse is applied to RD+. However, the temperature characteristic of the diode does not matter because the bias direction is opposite to the ordinary one.  
         [0044]     The circuit shown in  FIG. 7C  differs from that shown in  FIG. 7A  in that the pn-junction diodes are replaced by Schottky diodes. It permits the resistance (on-resistance) of shunting to be changed according to the aimed value of bias voltage or the amount of over drive (corresponding to Vf) of the gate voltage.  
         [0045]     The circuit shown in  FIG. 7D  is similar to those shown in  FIGS. 6B and 7B , except that it has a simplified protective circuit which works when a positive ESD pulse is applied to RD− or a negative ESD pulse is applied to RD+. However, the temperature characteristic of the diode does not matter because the bias direction is opposite to the ordinary one.  
         [0046]     In the above-mentioned embodiment, the TMR element is used as the magnetoresistive element; however, it may be replaced by a GMR element or an MR element, as a matter of course.  
         [0047]     The above-mentioned embodiment of the present invention makes it possible to arrange a magnetoresistive element and an overvoltage protective circuit (ESD protective circuit) side by side on the slider. Moreover, it also makes it possible to place the ESD protective circuit closer to the magnetoresistive element than the preamplifier (or to place the point for clamping closer to the magnetoresistive element). This produces the effect of reducing the wiring length between the magnetoresistive element and the ESD protective circuit. This in turn makes it possible to accurately establish the clamping voltage at a desired value without being affected by the inductance of wiring. Moreover, since the ESD circuit is electrically isolated from the slider and each circuit is surrounded by SiO 2 , there is no possibility that static charge generated in the slider and each circuit flows into the ESD protective circuit through the wiring. This eliminates the limitation of potential when diodes are used. Moreover, the fact that there is no junction point with the Si wafer near the N layer contributes to low parasitic capacity and high switching operation.