Abstract:
The present invention provides a complementary metal-oxide-semiconductor (CMOS) image sensor structure and the potential reading method employing the same. The integration area composed of the photo diode and the photo gate is applied to receive the light emitted from the light source. The sensitivity is changed via the operation of controlling the gate voltage of the photo gate. Moreover, the variance of the potential is read many times. The characteristic of the potentials under different conditions in different times having the same dark current and fixed pattern noise is utilized. The dark current and the fixed pattern noise can be eliminated by calculating their difference. Higher sensitivity in low illumination and lower sensitivity in high illumination can be obtained by calculating their summation, so as to increase the dynamic range.

Description:
CROSS-REFERENCE TO RELATED APPLICATION  
         [0001]    This application claims the priority benefit of Taiwan application serial no. 90130290, filed Dec. 7, 2001.  
         BACKGROUND OF THE INVENTION  
         [0002]    1. Field of Invention  
           [0003]    The present invention generally relates to a complementary metal-oxide-semiconductor (CMOS) image sensor structure and the potential reading method employing the same, and more particularly, to a CMOS image sensor structure of the mixed integration area and the potential reading method employing the same.  
           [0004]    2. Description of Related Art  
           [0005]    The image has always been the easiest information representation method for people to receive information. Because of this, people have dedicated themselves to the study of image observation and image storing topics. Thus, the devices and the equipment related to the image are quite abundant and versatile, for example the color palm-coder, the surveillance black-white camera, the digital camera, the facsimile machine, and the medical sensor, . . . , etc. All of this image processing equipment unavoidably applies the image sensor element. Since the CMOS image sensor has variant advantages, such as the high stabilization, high sensitivity, low operating voltage, low consuming power, high resistance, and is not interfered by high magnetic, thus, it is applied widely in this equipment. Whereas, if the CMOS image sensor is compared with the charge couple device (CCD), although the CMOS image sensor is cost effective, and easily integrated with other control circuits, such as the analog to digital circuit and the digital signal processing circuit on a single chip, to achieve the objective of the System On a Chip (SOC), the CMOS image sensor has higher dark current, and thus can not be applied in the low illumination environment, and can neither have a very long exposure time.  
         SUMMARY OF THE INVENTION  
         [0006]    In the view of this, the present invention provides a CMOS image sensor structure of mixed integration area and the potential reading method employing the same to clear its dark current and fixed pattern noise. The CMOS image sensor structure and the method employing the same has higher sensitivity in low illumination, and lower sensitivity in high illumination, so as to increase the dynamic range.  
           [0007]    The present invention provides a CMOS image sensor structure of mixed integration area, wherein the CMOS image sensor structure of mixed integration area comprises an integration area, a reset transistor, a source-coupled transistor and an output selection transistor. The integration area is composed of the gate of the photo gate surrounded by the photo diode that is formed of the N type mixed surface on top of the P-well. The integration area is used to receive the light emitted from the light source, and react to the integration potential according to the intensity of the light source. The sensitivity can be changed by the operation of controlling the gate voltage of the photo gate. The reset transistor is used to reset the integration potential to the reset level. The source-coupled transistor is used to provide the output current of the integration potential to read the integration potential. The output selection transistor is used to select whether to read the integration potential. Each reset transistor, source-coupled transistor and output selection transistor is an N-MOS transistor.  
           [0008]    The present invention further provides a first potential reading method of the CMOS image sensor of mixed integration area, wherein the image sensor at least comprises an integration area and a reset transistor. The integration area is composed of the photo diode and the photo gate and is used to receive the light emitted from the light source, and reacts to the integration potential according to the intensity of the light source. The sensitivity can be changed by the operation of controlling the gate voltage of the photo gate. The reset transistor is used to reset the integration potential to the reset level. The potential reading method comprises the steps of: at first, electrically conducting the reset transistor to reset the integration potential to the reset level; then, closing the reset transistor; afterwards, applying voltage to the photo gate to activate the operation of the photo gate; again, reading the integration potential when the photo diode and the photo gate cooperate together; once again, electrically conducting the reset transistor to reset the integration potential to the reset level; then, closing the reset transistor; again, reading the integration potential when the photo diode operates individually; finally, reading the difference value between the integration potentials when the photo diode operates independently and the integration potential when the photo diode and the photo gate cooperate together to clear its dark current and the fixed pattern noise.  
           [0009]    The present invention further provides a second potential reading method of the CMOS image sensor of the mixed integration area, wherein the image sensor at least comprises an integration area and a reset transistor. The integration area is composed of the photo diode and the photo gate and is used to receive the light emitted from the light source, and reacts to the integration potential according to the intensity of the light source. The sensitivity can be changed by the operation of controlling the gate voltage of the photo gate. The reset transistor is used to reset the integration potential to the reset level. The potential reading method comprises the steps of: at first, electrically conducting the reset transistor to reset the integration potential to the reset level; then, closing the reset transistor and reading the reset potential; then, reading the integration potential when the photo diode operates independently; and calculating the difference between the reset level and the integration potential when the photo diode operates individually and use it as the first result value; then, applying the voltage to the photo gate to activate the operation of the photo gate; again, reading the integration potential when the photo diode and the photo gate cooperate together; afterwards, calculating the difference between the reset level and the integration potential when the photo diode and the photo gate cooperate together and using it as the second result value; finally, calculating the summation of the first result value and the second result value to provide higher sensitivity in the low illumination, and lower sensitivity in high illumination, so as to increase the dynamic range.  
           [0010]    As shown by the description above, by applying a CMOS image sensor structure of mixed integration area of the present invention, and combining it with the first potential reading method of the CMOS image sensor of mixed integration area provided by the present invention, since the integration potentials of both readings contain the same dark current and fixed pattern noise, by calculating the difference between the integration potentials the dark current and fixed pattern noise therein is able to be completely eliminated. Furthermore, if the second potential reading method of the CMOS image sensor of mixed integration area provided by the present invention is combined, the characteristic of the integration potential being saturated in high illumination when the photo diode and the photo gate cooperate together is utilized. Adding the integration potentials of two readings is able to provide higher sensitivity in low illumination, and lower sensitivity in high illumination, so as to increase the dynamic range. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0011]    The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention, and together with the description, serve to explain the principles of the invention. In the drawings,  
         [0012]    [0012]FIG. 1A schematically shows a structure of a conventional photo diode CMOS image sensor;  
         [0013]    [0013]FIG. 1B schematically shows a structure of a conventional photo gate CMOS image sensor;  
         [0014]    [0014]FIG. 2 schematically shows a structure of the CMOS image sensor of the mixed integration area of the preferred embodiment according to the present invention;  
         [0015]    [0015]FIG. 3A schematically shows the reading circuit diagram of the first potential reading method of the CMOS image sensor of mixed integration area of the preferred embodiment according to the present invention;  
         [0016]    [0016]FIG. 3B schematically shows the reading clock sequence diagram of the first potential reading method of the CMOS image sensor of mixed integration area of the preferred embodiment according to the present invention;  
         [0017]    [0017]FIG. 3C schematically shows the reading result graph of the first potential reading method of the CMOS image sensor of mixed integration area of the preferred embodiment according to the present invention;  
         [0018]    [0018]FIG. 4A schematically shows the reading circuit diagram of the second potential reading method of the CMOS image sensor of mixed integration area of the preferred embodiment according to the present invention;  
         [0019]    [0019]FIG. 4B schematically shows the reading clock sequence diagram of the second potential reading method of the CMOS image sensor of mixed integration area of the preferred embodiment according to the present invention;  
         [0020]    [0020]FIG. 4C schematically shows the reading result graph of the second potential reading method of the CMOS image sensor of mixed integration area of the preferred embodiment according to the present invention. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0021]    [0021]FIG. 1A schematically shows the structure of a conventional photo diode CMOS image sensor. FIG. 1B schematically shows the structure of a conventional photo gate CMOS image sensor. As shown in the diagrams, both structures of the conventional CMOS image sensor comprise an integration area  110  and  150 , a reset transistor  120  and  160 , a source-coupled transistor  130  and  170 , and an output selection transistor  140  and  180 . The reset transistor  120  and  160  is used to reset the integration potential of the integration area to the reset level. The source-coupled transistor  130  and  170  is used to provide the output current of the integration potential so as to read the integration potential. The output selection transistor  140  and  180  is used to select whether to read the integration potential. Whereas, the difference between them is that the integration area  110  of the photo diode CMOS image sensor is a photo diode, and the integration area  150  of the photo gate CMOS image sensor is a photo gate. Although both image sensors have their own pros and cons, neither of them can eliminate its dark current.  
         [0022]    [0022]FIG. 2 schematically shows a structure of the CMOS image sensor of mixed integration area of a preferred embodiment according to the present invention. As shown in the diagram, the structure of the CMOS image sensor of mixed integration area similarly comprises an integration area  210 , a reset transistor  250 , a source-coupled transistor  260 , and an output selection transistor  270 . The integration area  210  is composed of the gate of the photo gate  230  surrounded by the photo diode  220  and  240  that is formed of the N type mixed surface on top of the P-well. The integration area is used to receive the light emitted from the light source, and reacts to the integration potential according to the intensity of the light source. The sensitivity can be changed by the operation of controlling the gate voltage of the photo gate  230 . Similarly, the reset transistor  250  is used to reset the integration potential to the reset level. The source-coupled transistor  260  is used to provide the output current of the integration potential to read the integration potential. The output selection transistor  270  is used to select whether to read the integration potential. Each reset transistor  250 , source-coupled transistor  260  and output selection transistor  270  is an N-MOS transistor.  
         [0023]    [0023]FIG. 3A schematically shows the reading circuit diagram of the first potential reading method of the CMOS image sensor of mixed integration area of a preferred embodiment according to the present invention. FIG. 3B schematically shows its reading clock sequence diagram. FIG. 3C schematically shows its reading result graph. As shown in the reading clock sequence in FIG. 3B, there are two reset operations in one integration period. Wherein, in one reset operation, the voltage is not applied to the photo gate  230 , thus the photo gate  230  is deactivated, so as to obtain an integration potential difference of the lower sensitivity ΔV 1 =V res −V out1 =V s1 +V dark +V FPN , the integration potential will include the dark current V dark  and the fixed pattern noise V FPN  In the other reset operation, voltage 3.3 V is applied to the photo gate  230  to have it operate normally, so as to obtain an integration potential difference of the higher sensitivity ΔV 2 =V res −V out2 =V s2 +V dark +V FPN . This integration potential also includes the dark current V dark  and the fixed pattern noise V FPN . Thus, it is known that the dark current V dark  and the fixed pattern noise V FPN  herein can be completely eliminated as long as the difference value ΔV 2 −ΔV 1 =(V res −V out2 )−(V res −V out1 )=(V s2 +V dark +V FPN )−(V s1 +V dark +V FPN )=V s2 −V S1  is read. Moreover, the correlated double sampling circuit as shown in the graph of FIG. 3C does not have to be changed. The operation principle is that after the first reset operation, the voltage is applied to the photo gate to activate the operation of the photo gate. The transistor SH 1   310  and the transistor CL 1   320  are electrically conducted before the next reset operation. The transistor CL 1   320  is subsequently closed so the stride voltage of the capacitor C 1   330  V out2 =V res −(V s2 +V dark +V FPN ). After the next reset operation, the voltage is not applied to the photo gate, thus the operation of the photo gate is deactivated. Furthermore, the transistor SH 1   310  is closed before the next reset operation, so the stride voltage of the capacitor C 2   340  V out1 =V res −(V s1 +V dark +V FPN ) The output physically detected is the stride voltage of the capacitor C 2   340  subtracts the stride voltage of the capacitor C 1   330 , V out1 −V out2 =(V res −(V s1 +V dark +V FPN ))−(V res −V s2 +V dark +V FPN ))=V s2 −V s1 . This is the result value mentioned above.  
         [0024]    [0024]FIG. 4A schematically shows the reading circuit diagram of the second potential reading method of the CMOS image sensor of mixed integration area of a preferred embodiment according to the present invention. FIG. 4B schematically shows its reading clock sequence diagram. FIG. 4C schematically shows its reading result graph. As known from the reading clock sequence in FIG. 4B, there are two reset operations in one integration period. In one reset operation, the voltage is not applied to the photo gate  230 , thus the photo gate  230  is deactivated, so as to obtain an integration potential difference of the lower sensitivity ΔV 1 =V res −V out1 =V s1 . In the other reset operation, voltage 3.3 V is applied to the photo gate  230  to have it operate normally, so as to obtain an integration potential difference of the higher sensitivity ΔV 2 =V res −V out2 =V s2 . Since this integration potential has higher sensitivity, when the light source has higher illumination, the integration potential is reduced to 0V from the reset level, thus the saturation situation occurs. Therefore, the dynamic range is limited by the reset level. In order to improve the limitation of the dynamic range, it is required to calculate the summation of V s1 +V s2  as shown in FIG. 4C, so as to obtain the characteristic of having higher sensitivity in low illumination, and having lower sensitivity in high illumination. This method cannot utilize the original correlated double sampling circuit, thus the change as shown in FIG. 4A is required. The operation principle is that the transistor SH 2   410  and the transistor CL 2   420  are electrically conducted after the first reset operation and before the next reset operation. The transistor CL 2   420  is subsequently closed so the stride voltage of the capacitor C 3   430  is V out1 =V res −V s1 . After the next reset operation, the transistor SH 2   410  is closed, so the stride voltage of the capacitor C 4   440  is V res . The output physically detected is the stride voltage of the capacitor C 4   440  subtracts the stride voltage of the capacitor C 3   430  V res −(V res −V s1 )=V s1 . At this moment, the voltage is applied to the photo gate to activate the operation of the photo gate. The transistor SH 3   450  and the transistor CL 3   460  are electrically conducted before the next reset operation. Then, the transistor CL 3   460  is closed, so the stride voltage of the capacitor C 5   470  V out2 =V res −V s2 . The transistor SH 3   450  is closed after the next reset operation, so the stride voltage of the capacitor C 6   480  is V res . Therefore, the output physically detected is the stride voltage of the capacitor C 6   480  subtracts the stride voltage of the capacitor C 5   470  V res −(V res −V s2 )=V s2 . The expected result can be obtained from the summation of them.  
         [0025]    As shown in the description above, by applying a CMOS image sensor structure of mixed integration area of the present embodiment, combined with the first potential reading method of the CMOS image sensor of mixed integration area of the present embodiment, since the integration potentials of the two readings contain the same dark current and fixed pattern noise, by calculating the difference between the integration potentials, the dark current and fixed pattern noise therein is able to be completely eliminated. Furthermore, if the second potential reading method of the CMOS image sensor of mixed integration area of the present embodiment is used the characteristic that the integration potential is saturated in the high illumination when the photo diode and the photo gate cooperate together is utilized. Adding the integration potentials of the two readings can provide higher sensitivity in low illumination, and lower sensitivity in high illumination, so as to increase the dynamic range.  
         [0026]    Although the invention has been described with reference to a particular embodiment thereof, it will be apparent to one of the ordinary skill in the art that modifications to the described embodiment may be made without departing from the spirit of the invention. Accordingly, the scope of the invention will be defined by the attached claims not by the above detailed description.