Abstract:
A lateral light emitting diode comprises a layer stack disposed on one side of a substrate, the layer stack including a p-type layer, n-type layer, and a p/n junction formed therebetween. The LED may further include a p-electrode disposed on a first side of the substrate and being in contact with the p-type layer on an exposed surface and an n-electrode disposed on the first side of the substrate and being in contact with an exposed surface of an n +  sub-layer of the n-type layer.

Description:
CROSS-REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims priority to U.S. Provisional Application No. 61/294,126 filed Jan. 12, 2010 which is herein incorporated by reference in its entirety. 
     
    
     FIELD 
       [0002]    This invention relates to ion implantation of light emitting diodes (LEDs) and, more particularly, to ion implantation of light emitting diodes to affect current crowding and surface roughness. 
       BACKGROUND 
       [0003]    LEDs are built on a substrate and are doped with impurities to create a p-n junction. A current flows from the p-side, or anode, to the n-side, or cathode, but not in the reverse direction. Electrons and holes flow into the p-n junction from electrodes with different voltages. If an electron combines with a hole, it falls into a lower energy level and releases energy in the form of a photon. The wavelength of the light emitted by the LED and the color of the light may depend on the band gap energy of the materials forming the p-n junction. 
         [0004]    LED devices are typically formed by initially forming a stack of layers in which one or more layers are p-type semiconductors and one or more layers are n-type semiconductors, such that a p/n junction forms within the layer stack. The stack of layers may be formed on a planar insulating substrate in some cases. The insulating substrate in an LED may be, for example, sapphire. Vertical LED structures include a p-contact (electrode) on one side of the stack of layers while an n-contact is formed on the other side of the stack of layers. Lateral LED structures include a p-contact and n-contact on the same side of a substrate (or same side of a stack of layers). 
         [0005]      FIG. 1  illustrates a cross-section of a known lateral LED structure  100  formed using GaN as the semiconductor material. LED  100  includes a p-contact  102  that is used to contact p-GaN layer  104  on its exposed outer surface. An InGaN quantum well structure  106  is sandwiched between p-layer  104  and an n-GaN layer  108 . An exposed region of the n-GaN layer forms a mesa  122  that is recessed with respect to the surface of the p-GaN layer. LED  100  also includes an n-contact  110  that is formed on the same side of substrate  112  as the p-contact  102  on an exposed surface of n-GaN layer  108 . A buffer layer  114  is also formed to help match the substrate to the n-GaN layer  108 . 
         [0006]    The stepped structure of LED  100  in which a portion of the inner layer  108  has an exposed outer surface facing the same direction as the outer surface of p-layer  104  allows non-buried planar contacts to be formed on the same side of the layer stack  104 - 114 , in which the contacts  102 ,  110  are displaced laterally from one another along the x-direction as shown. Accordingly, although the current  116  travels across the p/n junction of LED  100  in z-direction normal to the P/N junction (a vertical direction for the LED orientation shown in  FIG. 1 ), the current must travel in a horizontal fashion (x-direction) generally parallel to the p/n junction between n-contact  110  and the region of the p/n junction  118 , which is formed between layers  104  and  108 . In the vicinity of contact  110  the current changes direction between a predominantly horizontal flow and a more vertical flow that exists immediately under at least the edge  120  of contact  110 . 
         [0007]    Such a lateral LED structure may therefore suffer from current crowding near the contacts, especially the re-contact, which degrades the LED performance. Current always takes a path of least resistance, which for the case of lateral LED structure  100  may be across or near the edge  120  of the contact  110 . Thus, the current may not spread under the entire contact length L. In one instance, the voltage may be highest at the contact edge and drop exponentially with distance from the contact. Such non-uniform current spreading near LED contacts results in localized joule heating and light emission. This may cause color binning, early saturation of light intensity, and a short LED device lifetime. 
         [0008]    Accordingly, it is desirable to provide improvements over present day LEDs. 
       SUMMARY 
       [0009]    In an embodiment, a lateral light emitting diode comprises a substrate supporting a layer stack that includes a p-type layer, n-type layer, and a p/n junction formed therebetween. The LED may further include a p-electrode disposed on a first side of the substrate and being in contact with the p-type layer, and an n-electrode disposed on the first side of the substrate and being in contact with an exposed surface of an n +  sub-layer of the n-type layer. 
         [0010]    In another embodiment, a method of forming a light emitting diode includes etching a portion of device structure comprising an n-type layer disposed towards a substrate, an outer p-type layer, and a p/n junction formed therebetween, so as to expose a portion of the n-type layer. The method also may include introducing dopants into an outer portion of the exposed n-type region so as to form an n +  outer layer. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0011]    For a better understanding of the present disclosure, reference is made to the accompanying drawings, which are incorporated herein by reference and in which: 
           [0012]      FIG. 1  is a cross-sectional view of a known LED structure; 
           [0013]      FIG. 2   a  is a top plan view of an embodiment of an LED; 
           [0014]      FIG. 2   b  is a perspective view of a portion of the LED structure of  FIG. 2   a;    
           [0015]      FIG. 3  is a perspective view of a first step in an embodiment of LED fabrication; 
           [0016]      FIG. 4  is a perspective view of another step in an embodiment of LED fabrication; 
           [0017]      FIG. 5   a  is a perspective view of a further step in an embodiment of LED fabrication; 
           [0018]      FIG. 5   b  is a perspective view of an alternative step in an embodiment of LED fabrication; 
           [0019]      FIG. 5   c  is a perspective view showing a portion of an LED after ion implantation according to an embodiment of LED fabrication; and 
           [0020]      FIG. 6  is a perspective view of an additional step in an embodiment of LED fabrication. 
       
    
    
     DETAILED DESCRIPTION 
       [0021]    To address some of the deficiencies in the aforementioned LEDs, embodiments are described herein that provide improved LED architecture and performance. LED device structures and their methods of formation are described herein in connection with an ion implantation of LEDs. However, the method can be used with other semiconductor manufacturing processes. A beam-line ion implanter, plasma doping ion implanter, or other ion implantation system known to those skilled in the art may be used in the embodiments described herein. Thus, the invention is not limited to the specific embodiments described below. 
         [0022]    LED performance is governed by internal quantum efficiency, light extraction efficiency, and packaging. The total LED efficiency is represented by the formula: 
         [0000]      η total =η internal +η electrical +η extraction +η packaging  
 
         [0000]    where η total  represents the total LED efficiency. η internal  represents the internal quantum efficiency and can be increased by improved crystal quality in the LED, such as using a substrate with a lower defect density. η internal  also may be increased by improving quantum well growth during the epitaxial growth process. η electrical  represents the electrical efficiency and can be increased by improving the crystal quality such that carrier mobility is improved. η electrical  also may be increased by having a more uniform current distribution without carrier overflow, heat generation, and improved ohmic contracts. η extraction  represents the extraction efficiency and may be increased by varying the LED structure, LED die shaping, surface texturing, the transparency of contacts, or reflective mirrors. η packaging  is the packaging efficiency and can be improved by using better phosphor conversion techniques. 
         [0023]    Embodiments described herein may provide improvements in at least η electrical  as well as η extraction  in lateral LEDs, leading to improvements in total LED efficiency. Some embodiments provide an improved lateral LED device structure that may be employed in LEDs based on III-V compound semiconductors. In various embodiments an improved GaN-based lateral LED is provided. In some embodiments, an improved n-contact arrangement is provided that may include an n +  doped region adjacent the n-contact. The terms “GaN based” or “GaN type,” as used herein, may refer to a family of materials related to the GaN compound semiconductor. These materials may include doped or undoped GaN, InGaN ternary compounds, quantum well structures such as alternating layers of InGaN/GaN materials, as well as other related compounds as known in the art. 
         [0024]    In one embodiment a method for forming a lateral LED includes etching a mesa in a GaN-based structure having a buried n-type GaN layer in order to form a mesa comprising an exposed mesa surface of n-doped GaN type material. The surface concentration of n-dopants in the n-doped mesa may be increased in a surface region of the mesa. In some embodiments, the level of n-type dopants is increased using ion implantation methods. 
         [0025]      FIGS. 2   a  and  2   b  are a top plan view and perspective view of an embodiment of a lateral LED  200 . Lateral LED  200  may be based on GaN or similar compounds in some embodiments. Consistent with known lateral LED structures, LED  200  has a pair of non-buried contacts  202 ,  210  on the same side (facing up in the figures) of LED  200 . Lateral LED may be formed such that upper contact  202  is a p-contact and recessed contact  210  is an n-contact. The contacts  202  and  210  may be laterally displaced from one another along the x-direction (and/or y-direction) thereby forming a lateral LED structure. 
         [0026]    In some embodiments, layer  204  may be p-GaN, layer  206  may be a known quantum well structure based on InGaN/GaN alternating layers (not separately shown) and layer  208  may be n-GaN. In some embodiments, a buffer layer  214  based on GaN-type material is provided between the n-GaN layer  208  and substrate  212 . 
         [0027]    In the embodiment of  FIGS. 2   a - 2   b , contact  210 , which may be an n-contact, is formed upon a mesa  222  that is recessed below the level of contact  202 . In some embodiments, the surface region  208   a  is a highly doped layer, such as an n +  GaN layer. The highly doped layer  208   a  may be formed using ion implantation, as described in more detail below. 
         [0028]    In operation, device  200  may emit light of a desired wavelength (range) according to known design considerations. For example, the wavelength of light emitted by LED  200  may be tuned by varying the thickness of alternating InGaN/GaN layer sequences used in quantum well layer  206 . For sake of illustration only, it may be assumed in the discussion to follow that contact  202  is a p-contact and contact  210  is an n-contact. 
         [0029]    The performance of LED  200  may be improved over conventional lateral LEDs because of the presence of highly doped layer  208   a . Current traveling between region A underneath p/n junction region  216  and region B located beneath n-contact  210  must enter a highly doped mesa  208   a  that abuts the entire lower interface of n-contact  210 . When the current enters into region  208   a , the current may spread out significantly because the layer  208   a  may present a much lower resistance than that in lightly doped regions  208   b  of n-layer  208 . After spreading out, the current may traverse between contact  210  and n-layer  208  over a large portion of the interface defined by the lower surface of contact  210 . Accordingly, current crowding may be reduced, leading to reduced localized joule heating, reduced color binning, and longer device lifetime. Moreover, the presence of a high concentration of active dopants at the interface  210   a  between contact  210  and n +  layer  208   a  may produce a low contact resistance in LED  200 . 
         [0030]      FIGS. 3-6  illustrate aspects of one particular embodiment of a method of forming lateral LEDs using ion implantation of a contact region. Other LED structures, both vertical and lateral, and other fabrication methods are possible. Thus, the embodiments disclosed herein are not limited solely to the embodiment of  FIGS. 3-6 . 
         [0031]      FIG. 3  is a perspective view of a first step in an embodiment of LED  220  fabrication. In various embodiments, the layers  204 - 208  may be based on GaN, and may be grown on a substrate  214 . In some embodiments, the layers  204 - 208  may be grown using epitaxial processes, such as using MOCVD, molecular beam epitaxy, atomic layer deposition, or other process. Layer  204  may be, for example, p-GaN and layer  208  may be n-GaN. Layer  206  may be a quantum well structure as discussed above. 
         [0032]    In embodiments of layer  208 , the layer thickness of n-GaN may be in the range of about 1-5 micrometers. 
         [0033]      FIG. 4  is a perspective view of another step in an embodiment of LED fabrication. After growth of layer stack  204 - 208 , a mesa  222  is formed in the structure  220   b  using, for example, dry etching and known lithography techniques to selectively etch a portion of layers  204 - 208 . In the embodiment shown, the entire thickness of each of layers  204  and  206  is etched away in one region corresponding to  204   a . In some embodiments, a top portion  224  of n-layer  208  may be etched away leaving a remaining portion corresponding to mesa  222 . 
         [0034]    In embodiments of the fabrication process, a remaining thickness of mesa  222  may be on the order of one micrometer thickness and in particular, about 1-3 micrometers. 
         [0035]      FIG. 5   a  is a perspective view of a further step in an embodiment of LED fabrication. At least one portion of the mesa  222  in the structure  220   c  may be implanted using ions  226  as described hereinbelow. Ion implantation may be used to improve current distribution and, consequently, η electrical . As noted above, this implantation process may improve current crowding in an LED fabricated according to the steps of  FIGS. 3-6 . Current crowding may be improved because, for example, an n +  region is created in the structure  208   a  and more electrons exist throughout the implanted region  208   a  of the structure  220   c . In some embodiments, the active carrier concentration of n-dopants in region  208   a  may be greater than about 1E19/cm 3 , while the active carrier concentration of n-dopants in layer  208  may be less than about 1E18/cm 3 . 
         [0036]    In various embodiments the implanting ions are n +  dopants for GaN, which may include group IV elements, such as C, Si, Ge, Sn, or Pb, or group VI elements such as O or Se. Implantation of ions into an n-GaN region of a GaN LED may cause increased carrier concentration at the top surface of the n-GaN region. This may improve current spreading. Further, the implanted profile in the n-GaN layer can be a box profile or a Gaussian profile. 
         [0037]    Implant energy and implant dose may depend on the base carrier concentration in layer  208 , but in various embodiments, the ion energy may range from about 100 eV to about 50 keV. In particular, the ion energy may be about 1-10 keV. In order to provide a low resistance region corresponding to mesa  208   a , the ion dose during implantation may be about 1E13-1E16/cm 2 , and more particularly may be about 5E14-5E15. In one particular embodiment the implant may be a low keV to high keV energy and approximately E13 to E15 cm −2  dose. In some embodiments of the invention, the ion range for ions implanted into mesa  222  may be about 1-20 nm. 
         [0038]    In some embodiments, the implantation step of  FIG. 5   a  may also roughen the surface of the structure  208   a , which improves η extraction . The roughened surface may be supplemented by using nanorods, photon crystal structures, patterned structures, or surface gratings. 
         [0039]    In some embodiments, the implantation step depicted generally at  FIG. 5   a  may involve multiple implants. In some embodiments, the multiple implants may involve chained implants in which the substrate supporting the LED device is not handled between implants. 
         [0040]    In various embodiments, as depicted at  FIG. 5   b , a non-zero angle of ion implantation may be used in addition to or instead of a substantially normal incidence implant as generally depicted in  FIG. 5   a . In some embodiments, the angled implant may be performed in steps, such as a chained implant sequence where vacuum around LED structure  220   c  is not broken between two or more implants. 
         [0041]    Angled implants of the walls or corners of the mesa  208   a  may be performed in one embodiment. As depicted in  FIG. 5   c , which illustrates a portion of structure  220   c , the lower portions of walls  230 ,  240  that surround mesa  208   a  may be implanted, forming implanted wall regions  224   b . These wall regions may extend into the n +  mesa  222  as illustrated in regions  224   c ,  224   d . These implanted regions may further improve current crowding/current spreading by providing additional low resistance regions for current traveling between contacts  202  and  210 . It is to be noted that the angled implants are only for regions  208   a  and  224   b , which are n-doped regions of the LED, such as n-GaN, and not for the entire walls  230  and  240 . 
         [0042]    In some embodiments, the sidewalls  230 ,  240  may be implanted with species such as O, N, and/or C for isolation purposes. 
         [0043]    In a substep of the implantation step of  FIG. 5   a  or  5   b , the structure  220   c  may be annealed after implantation in order to properly activate the implanted ions so that the implanted species become electron donors, thereby increasing the n-carrier concentration in mesa  222 . In some embodiments, the thickness of mesa  222  after annealing may be about 1-20 nm and the carrier concentration may be about 1E19/cm 3  or higher in mesa  222 . 
         [0044]    In some embodiments, the implanted mesa  222  may be annealed using laser annealing. The annealing may be in one shot or multiple shots in which exposure dose ranges from 200 mJ to 800 mJ. In some embodiments, a combination of a laser anneal (anneal # 1 ) and rapid thermal anneal (RTA) (anneal # 2 ) may be performed. The selection of temperature range of RTA anneal may be chosen based upon the prior Laser anneal step. The RTA temperature can range, for example, from 200° C. to 1200° C. In one embodiment of an n+ GaN mesa structure, a decrease in contact resistance may be produced, which may be greater than about 10%. The rough surface or damage on the structure  220   c  caused by the implanted ions also may enhance η extraction . This rough or damaged surface may be rich in vacancies. η extraction  may be improved because by creating random texturing, light is scattered such that more light is extracted. 
         [0045]      FIG. 6  is a perspective view of an additional step in an embodiment of LED fabrication. N-metal and p-metal are applied to form final LED structure  220   d . In some embodiments, the LED structure  220   d  may have improved current performance characteristics as described above with respect to LED  200 . In contrast, if the structure  220   d  was not implanted as seen in  FIG. 5   a , the structure  220   d  could experience current crowding during device operation in the n-layer region  208  of the structure  220   b  that lies between the n-metal contact  210  and p-layer  204 . 
         [0046]    In an alternate embodiment, the texturing and surface roughening of the structure  200  may be performed by or supplemented by wet chemical etching. 
         [0047]    The present disclosure is not to be limited in scope by the specific embodiments described herein. Indeed, other various embodiments of and modifications to the present disclosure, in addition to those described herein, will be apparent to those of ordinary skill in the art from the foregoing description and accompanying drawings. For example, the LED electrodes (contacts) of the disclosed embodiments, although generally depicted as rectangular, may have any convenient shape. Moreover, embodiments of other lateral LED materials systems, including other III-IV compounds besides GaN are possible. 
         [0048]    Thus, such other embodiments and modifications are intended to fall within the scope of the present disclosure. Furthermore, although the present disclosure has been described herein in the context of a particular implementation in a particular environment for a particular purpose, those of ordinary skill in the art will recognize that its usefulness is not limited thereto and that the present disclosure may be beneficially implemented in any number of environments for any number of purposes. Accordingly, the claims set forth below should be construed in view of the full breadth and spirit of the present disclosure as described herein.