Abstract:
A semiconductor package having a substrate including a die attach aperture and method for packaging a semiconductor die reduce or eliminate failures due to the “popcorn” effect caused by heating of water vapor during the manufacturing process. An aperture is provided in a substrate to permit die attach material to protrude to the outside of the semiconductor package, providing a path for the exit of water vapor from the die attach material during the manufacturing process. The popcorn effect is thereby eliminated, resulting in higher yields from the manufacturing process.

Description:
FIELD OF THE INVENTION  
         [0001]    The present invention relates generally to integrated circuit packaging and more specifically, to a method and assembly for packaging an integrated circuit to prevent de-lamination.  
         BACKGROUND OF THE INVENTION  
         [0002]    Semiconductor packages typically provide a hermitic package that completely protects a contained semiconductor from an external environment. Substrate carriers such as lead frame carriers, printed circuit boards and circuit tape have all been used to support one or more semiconductor dies in an enclosure.  
           [0003]    Typically, a semiconductor die is attached to a substrate by a die attach material. However, the interface between the semiconductor die and the die attach material and the interface between the die attach material and the substrate can be easily damaged due to a difference in thermal coefficient of expansion between the materials.  
           [0004]    A particular problem is generated by water remaining within the semiconductor package during the manufacturing process. The package is subjected to high temperatures during many of the manufacturing processes and is thereby vaporized. The vapor expands into any gaps or de-lamination in the die attach structure and accelerates the process of de-lamination (the so-called “popcorn” phenomenon). In extreme cases, the semiconductor die may crack, resulting in a broken package.  
           [0005]    De-lamination, popcorn phenomena and cracking mainly occur in substrate-based packages such as lead frame, printed circuit board, circuit film and circuit tape type packages. In particular, problems are generated in the solder re-flow process wherein conductive balls are fused to lands of the substrate using temperatures exceeding 200 degrees centigrade. The problem is further exacerbated by a preceding baking process performed to remove water from the semiconductor package. During the baking process, a heated encapsulant or die attach material is expanded and can easily absorb water, as the molecular structure of the heated material is larger than that of water, permitting absorption of water. Also, at these temperatures, water is vaporized causing emission of the water (flow of steam) through the material.  
           [0006]    The water inside the semiconductor package is removed by the baking process, but since the water vapor is blocked by the substrate, it does not flow out completely. The water that remains within the package is rapidly vaporized by the high temperature of the solder re-flow process, resulting in the above-described popcorn phenomenon, which causes the interface between the semiconductor die and the substrate to be damaged and crack the semiconductor die.  
           [0007]    Therefore, it would be desirable to provide a semiconductor package and method for packaging a semiconductor die that eliminate the popcorn phenomenon.  
         SUMMARY OF THE INVENTION  
         [0008]    The above stated objectives are achieved in a semiconductor package and method for packaging a semiconductor die. The semiconductor package includes a semiconductor die, a die attach material and a substrate. An aperture is provided in the substrate to permit die attach material to flow through the aperture to the back side of the substrate. Water vapor may thereby pass through the die attach material to the outside of the package, reducing or eliminating the popcorn phenomenon. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0009]    [0009]FIG. 1 is a sectional view illustrating a semiconductor package according to an embodiment of the present invention; and  
         [0010]    [0010]FIGS. 2A through 2I are cross-sectional views for explaining a method for manufacturing the semiconductor package of FIG. 1.  
     
    
       [0011]    The invention, as well as a preferred mode of use and advantages thereof, will best be understood by reference to the following detailed description of illustrative embodiments when read in conjunction with the accompanying drawings, wherein like reference numerals indicate like parts throughout.  
       DETAILED DESCRIPTION  
       [0012]    Referring to FIG. 1, a sectional view of a semiconductor package  100  according to an embodiment of the present invention is illustrated. A substrate  10 , having an approximately planar surface including an insulating layer  16  of predetermined thickness formed at the bottom surface of substrate  16 , is provided. An aperture  20   a  is formed through the center of insulating layer  16  and a plurality of electrically conductive patterns  18  are formed on the top surface of insulating layer  16  around the circumference of aperture  20   a.  A plurality of smaller apertures  20   b  are formed through insulating layer  16  around the circumference of aperture  20   a.  Small apertures  20   b    20  are arrayed in rows and columns in their plan view (not shown).  
         [0013]    Predetermined regions of electrically conductive patterns  18  are exposed at the bottom surface of insulating layer  16  by small apertures  20   b,  so that a plurality of lands  28  are formed. Insulating layer  16  may be any non-conductive material such as flexible tape, film, thermosetting resin or its equivalent.  
         [0014]    The area (or size) of aperture  20   a  is smaller than that of a semiconductor die  14  as described below. It is preferable that aperture  20   a  has an area of approximately 50-90% of the area of the semiconductor die. The area of aperture  20   a  is thus restricted to allow the semiconductor die  14  to be placed in the range from the upper part of the aperture  20   a  to the circumference of semiconductor die  14 . Conductive patterns  18  may be any conductive material such as aluminum (Al), copper (Cu), tungsten (W) or its equivalent.  
         [0015]    A protective layer  32  can be applied over the entirety of conductive patterns  18  excluding the portions of conductive patterns to which a set of conductive wires  22  are connected. Protective layer  32  protects conductive patterns  18  from the external environment. In an alternative embodiment, protective layer  32  is not applied to the conductive patterns  18 .  
         [0016]    A die attach material  26  having a predetermined thickness is applied to aperture  20   a  and the top surface of the insulating layer  16  around the circumference of the aperture  20   a . The die attach material  26  fills the entire aperture  20   a  and is applied up to a predetermined region of the top surface of protective layer  32  or insulating layer  16  around the circumference of aperture  20   a . In the present embodiment, the area of die attach material  26  is approximately the same as that of semiconductor die  14 . The bottom surface of die attach material  26  is flush with the bottom surface of substrate  10  (the bottom surface of insulating layer  16 ). The die attach material may be a conductive or nonconductive epoxy, adhesive or its equivalent.  
         [0017]    The bottom surface of semiconductor die  14  is attached to die attach material  26 , as provided. Semiconductor die  14  includes a plurality of bond pads  12  formed on top surface of semiconductor die  14 . Bond pads  12  and conductive patterns  18  are electrically connected to each other by conductive wires  22 . Conductive wire  22  may be any conductive material such as gold (Au), aluminum (Al), copper (Cu) or an equivalent.  
         [0018]    The top surface of substrate  10 , semiconductor die  14  and conductive wires  22  are encapsulated by an encapsulant  30  to protect them from the external environment. Encapsulant  30  may be an epoxy molding compound, “glob top” or an equivalent. A plurality of balls  24  (such as solder balls) are fused to each land  28  of substrate  10 . Balls  24  serve to connect the semiconductor package of the present invention to an external device.  
         [0019]    In the present embodiment, electrical signals from semiconductor die  14  are transmitted to an external device through bond pads  12 , conductive wires  22 , conductive patterns  18 , lands  28  and balls  24 . Electrical signals from the external device are transmitted to semiconductor die  14  through balls  24 , lands  28 , conductive patterns  18 , conductive wires  22  and bond pads  12 .  
         [0020]    Since the area of the aperture  20   a  is similar to that of semiconductor die  14  and die attach material  26  fills the entirety of aperture  20   a , water is easily emitted to the outside through die attach material  26 , which has a molecular structure larger than that of the water. Accordingly, the emission of water is maximized and water is easily emitted to the outside through die attach material  26 , thereby preventing the popcorn phenomenon and de-lamination between semiconductor die  14  and die attach material  26 , resulting in prevention of a cracking of semiconductor die  14 .  
         [0021]    FIGS.  2 A- 2 I are cross-sectional views that are used below to illustrate a method for manufacturing semiconductor package  100  of FIG. 1. Method according to embodiments of the present invention will be described in a stepwise manner with sequential reference to FIGS. 2A through 2I.  
         [0022]    Referring FIG. 2A, a step  110  of providing a substrate  10  is illustrated. Substrate  10 , including approximately planar insulating layer  16 , aperture  20   a  having a predetermined size formed through the center of insulating layer  16 , conductive patterns  18  formed on the top surface of insulating layer  16  around the circumference of the aperture  20   a , small apertures  20   b  formed through insulating layer  16  around the circumference of aperture  20   a , and lands  28  formed by exposing predetermined regions of conductive patterns  18  through the bottom surface of insulating layer  16  by small apertures  20   b,  is provided.  
         [0023]    In the present embodiment, aperture  20   a  has an area of approximately 50-90% of the area of semiconductor die  14  (FIG. 1). A protective layer  32  can be applied, in accordance with an alternative embodiment of the present invention, over the entirety of conductive patterns  18  excluding areas to which conductive wires  22  (FIG. 1) are connected.  
         [0024]    In an alternative embodiment, a carrier frame  36  can be coupled to the edge of the top surface of substrate  10 , to prevent the bending of substrate  10 . Accordingly, carrier frame  36  provides that substrate  10  will not be bent during the manufacturing of the semiconductor package.  
         [0025]    Referring next to FIG. 2B, a tape attach step  120  is illustrated. The lower part of aperture  20   a  is covered with a tape  34  by applying tape  34  on the bottom surface of substrate  10 .  
         [0026]    Referring now to FIG. 2C, a die attach material  26  applying step  130  is illustrated. Die attach material  26  is applied to aperture  20   a  and a portion of the top surface of insulating layer  16  around the circumference of aperture  20   a . Outflow of the die attach material  26  at the bottom surface of substrate  10  is prevented by tape  34 . The bottom surface of die attach material  26  is thereby made flush with the bottom surface of insulating layer  16 . The area of aperture  20   a  and the area of die attach material  26  formed on the upper part of substrate  10  are approximately the same as that of a semiconductor die  14  (FIG. 1).  
         [0027]    Referring next to FIG. 2D, a semiconductor die  14  bonding step  140  is illustrated. A semiconductor die  14  having bond pads  12  formed on top surface thereof is bonded to die attach material  26 . Die attach material  26  is hardened at a high temperature by a baking process after semiconductor die  14  is bonded. At this time, all of the water contained the die attach material  26  is emitted to the outside of the semiconductor package.  
         [0028]    Referring now to FIG. 2E, a tape removing step  150  is illustrated. Tape  34 , which was coupled to the bottom surface of the substrate  10  in step  120  is now removed. Tape  34  material may be any one of ultraviolet tape, adhesive tape or its equivalent. The adhesion capability of tape  34  is lost when ultraviolet radiation is applied. Thereafter, tape  34  is be easily detached.  
         [0029]    Referring next to FIG. 2F, a wire bonding step  160  is illustrated. Bond pads  12  of semiconductor die  14  and conductive patterns  18  are electrically connected by conductive wires  22 . Conductive wires  22  may be any one of aluminum (Al), gold (Au), copper (Cu) or an equivalent.  
         [0030]    Next, referring to FIG. 2G, an encapsulating step  170  is illustrated. The top surface of substrate  10 , semiconductor die  14  and conductive wires  22  are encapsulated by an encapsulant  30  in order to protect them from the external environment.  
         [0031]    Now, referring to FIG. 2H, a ball fusing step  180  is illustrated. Balls  24  are fused to each land  28  of substrate  10 . Conductive ball  24  serves to connect the semiconductor package to an external device.  
         [0032]    Finally, referring to FIG. 2I, a singulation step  190  is illustrated. Carrier frame  36  (FIG. 2H) located at the edge of the top surface of substrate  10  is removed. Carrier frame  36  is removed by cutting substrate  10  around at the circumference of encapsulant  30 . Carrier frame  36  serves to prevent the bending of the substrate  10  and ease handling of the semiconductor package. As bending is prevented by encapsulant  30  after the forming of encapsulant  30  and wherein carrier frame  36  is not required in the completed semiconductor package, carrier frame  36  may be removed.  
         [0033]    Therefore, in the methods for manufacturing the semiconductor package according to the present invention, water existing between semiconductor die  14  and die attach material  26  is rapidly emitted to the outside through aperture  20   a . Although aperture  20   a  is sealed by die attach material  26 , the water can also be easily emitted to the outside through aperture  20   a  and die attach material  26  owing to the large size of aperture  20   a.    
         [0034]    Since the molecular structure of the die attach material  26  is larger than that of the water, the water can easily emitted to the outside. Even in the case where the pressure and load of encapsulant  30  is concentrated on aperture  20   a  of substrate  10  during the encapsulating step, no cracks of the semiconductor die  14  occur, because hardened die attach material  26  fills the entire aperture  20   a . Since the semiconductor die  14  is strongly supported by the die attach material  26  filling aperture  20   a , semiconductor die  14  does not crack while the pressure and load of the encapsulant  30  is concentrated on aperture  20   a  and the center of the bottom surface of semiconductor die  14 .  
         [0035]    This disclosure provides exemplary embodiments of the present invention. The scope of the present invention is not limited by these exemplary embodiments. Numerous variations, whether explicitly provided for by the specification or implied by the specification, such as variations in structure, dimension, type of material and manufacturing process may be implemented by one of skill in the art in view of this disclosure.