Abstract:
A package structure having an MEMS element is provided, which includes: a protection layer having openings formed therein; conductors formed in the openings, respectively; conductive pads formed on the protection layer and the conductors; a MEMS chip disposed on the conductive pads; and an encapsulant formed on the protection layer for encapsulating the MEMS chip. By disposing the MEMS chip directly on the protection layer to dispense with the need for a carrier, such as a wafer or a circuit board that would undesirably add to the thickness, the present invention reduces the overall thickness of the package to thereby achieve miniaturization.

Description:
BACKGROUND OF THE INVENTION 
       [0001]    1. Field of the Invention 
         [0002]    The present invention relates to semiconductor packages, and, more particularly, to a semiconductor package having a MEMS (micro-electro-mechanical system) element. 
         [0003]    2. Description of Related Art 
         [0004]    MEMS elements have integrated electrical and mechanical functions and can be fabricated through various micro-fabrication technologies. A MEMS element can be disposed on a chip and covered by a shield or packaged with an underfill adhesive so as to form a MEMS package structure.  FIGS. 1A to 1D  show various types of MEMS package structures in the art. 
         [0005]      FIG. 1A  shows a MEMS package structure as disclosed by U.S. Pat. No. 6,809,412. Referring to  FIG. 1A , a chip  14  having a MEMS element  141  is disposed on a substrate  10  and electrically connected to the substrate  10  through a plurality of bonding wires  11 . Then, a glass lid  12  is disposed on the substrate  10  to cover the chip  14 , the MEMS element  141  and the bonding wires  11 . 
         [0006]      FIG. 1B  shows a MEMS package structure as disclosed by U.S. Pat. No. 6,303,986. Referring to  FIG. 1B , a glass lid  12  is disposed on a chip  14  so as to cover a MEMS element  141  of the chip  14 . Then, the chip  14  is disposed on a lead frame  10 ′ and electrically connected to the lead frame  10 ′ through bonding wires  11  Finally, an encapsulant  15  is formed to encapsulate the lead frame  10 ′, the bonding wires  11 , the glass lid  12  and the chip  14 . 
         [0007]    However, the carriers of the above-described structures (the substrate  10  of  FIG. 1A  and the lead frame  10 ′ of  FIG. 1B ) increase the thickness of the structures, thus adversely affecting miniaturization of the package structures. Therefore, carrier-free package structures were developed. 
         [0008]      FIG. 1C  shows a MEMS package structure as disclosed by U.S. Pat. No. 7,368,808. Referring to  FIG. 1C , a chip  14  having a plurality of conductive pads  140  and a MEMS element  141  is provided. A glass lid  12  having a plurality of through holes  120  is disposed on the chip  14  for covering the MEMS element  141 . Each of the through holes  120  has conductive pads  122  disposed on the two ends thereof. The conductive pads  122  on the lower ends of the through holes  120  electrically connect with the conductive pads  140  of the chip  14 , respectively, and the conductive pads  122  on the upper ends of the through holes  120  have solder balls  16  formed thereon so as for the chip  14  to be electrically connected to other electronic components. 
         [0009]      FIG. 1D  shows a MEMS package structure as disclosed by U.S. Pat. No. 6,846,725. Referring to  FIG. 1D , a chip  14  having a plurality of conductive pads  140  and a MEMS element  141  is provided, and the conductive pads  140  have solder bumps  142  disposed thereon. A glass lid  12  having a plurality of through holes  120  is disposed on the chip  14  for covering the MEMS element  141 . Each of the through holes  120  has conductive pads  122  disposed on the two ends thereof. The conductive pads  122  on the lower ends of the through holes  120  electrically connect with the solder bumps  142 , respectively, and the conductive pads  122  on the upper ends of the through holes  120  are used for electrically connecting the chip  14  to other electronic components. 
         [0010]    Although the last two above-described package structures eliminate the need of a carrier so as to achieve miniaturization, the cost for drilling through holes  120  in the lids  12  is quite high. Further, it is difficult to align the conductive pads  122  at the two ends of each of the conductive through holes  120  with a high degree of accuracy or stably secure the conductive pads  122  to the conductive through holes  120 , thus easily leading to poor electrical connection and accordingly reducing the reliability of electrical connection between the chip  14  and an external electronic component. 
         [0011]    Therefore, it is imperative to provide a package having a MEMS element so as to overcome the above-described drawbacks. 
       SUMMARY OF THE INVENTION 
       [0012]    Accordingly, the present invention provides a package having a MEMS element, which comprises: a protection layer having opposite first and second surfaces and a plurality of openings in communication with the first and second surfaces; a plurality of conductors formed in the openings of the protection layer, respectively; a plurality of conductive pads formed on the first surface of the protection layer and the conductors for electrically connecting the conductors; a MEMS chip disposed on and electrically connected to the conductive pads; and an encapsulant formed on the protection layer for encapsulating the MEMS chip, wherein the conductors are exposed from the second surface of the protection layer and the encapsulant. 
         [0013]    The present invention further provides a fabrication method of a package having a MEMS element, which comprises the steps of: providing a carrier; forming on the carrier a protection layer having opposite first and second surfaces in a manner that the protection layer is attached to the carrier via the second surface thereof and forming in the protection layer a plurality of openings in communication with the first and second surfaces for exposing portions of the carrier; forming a plurality of conductors in the openings of the protection layer, respectively; forming a plurality of conductive pads on the first surface of the protection layer and the conductors such that the conductive pads electrically connect the conductors, respectively; disposing a MEMS chip on the conductive pads so as to electrically connect the MEMS chip and the conductive pads; forming an encapsulant on the first surface of the protection layer for encapsulating the MEMS chip; and removing the carrier to expose the conductors from the second surface of the protection layer. 
         [0014]    In the above-described package and the fabrication method thereof, a plurality of solder balls can be disposed on exposed surfaces of the conductors, respectively. 
         [0015]    In the above-described package and the fabrication method thereof, a solder mask layer can be formed on the first surface of the protection layer and have a plurality of openings for exposing the conductive pads, respectively. 
         [0016]    Further, a plurality of conductive bumps can be disposed on the conductive pads or on the MEMS chip for electrically connecting the conductive pads and the MEMS chip. 
         [0017]    Through the step of removing the carrier, the present invention obtains a carrier-free package. Compared with the conventional art that requires a substrate or lead frame that increases the package thickness, the present invention reduces the overall thickness of the package so as to achieve miniaturization. Further, by forming the conductors in the protection layer, the present invention avoids a conventional drilling process so as to simplify the fabrication process and reduce the fabrication cost. 
         [0018]    Furthermore, since the package can be fabricated through wafer-level packaging without the need of a conventional substrate or lead frame, a lot of fabrication steps can be avoided so as to save fabrication time and reduce costs. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0019]      FIGS. 1A to 1D  are cross-sectional views showing various types of MEMS package structures in the prior art; and 
           [0020]      FIGS. 2A to 2I  are cross-sectional views showing a fabrication method of a package having a MEMS element according to the present invention, wherein FIG.  2 D′ shows another embodiment of  FIG. 2D , FIG.  2 F′ shows another embodiment of  FIG. 2E , FIG.  2 F″ shows another embodiment of FIGS.  2 F and  2 F′, and FIG.  2 H′ shows another embodiment of  FIG. 2H . 
       
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
       [0021]    The following illustrative embodiments are provided to illustrate the disclosure of the present invention and its advantages, these and other advantages and effects being apparent to those in the art after reading this specification. 
         [0022]    It should be noted that the drawings are only for illustrative purposes and not intended to limit the present invention. Meanwhile, indicators such as ‘up’, ‘down’, ‘a’ and so on are only used as a matter of descriptive convenience and not intended to have any other significance or provide limitations for the present invention. 
         [0023]      FIGS. 2A to 2I  show a fabrication method of a package having a MEMS element according to the present invention. 
         [0024]    Referring to  FIG. 2A , a carrier  20  is provided. A protection layer  21  having a first surface  21   a  and a second surface  21   b , is formed on the carrier  20  with the second surface  21   b  attached to the carrier  20 . In the present embodiment, the carrier  20  is a metal plate, and the protection layer  21  is made of a non-conductive material such as a dielectric material, a semiconductor material, a solder resist material, or an insulating material. 
         [0025]    Subsequently, a patterning process is performed including various steps, such as coating a resist layer, exposing and developing the resist layer so as to form a plurality of openings  210  in the protection layer  21  for exposing portions of the carrier  20 . The openings  210  are in communication with the first surface  21   a  and the second surface  21   b.    
         [0026]    Referring to  FIG. 2B , a plurality of conductors  22  is formed in the openings  210  of the protection layer  21  through electroplating or electroless plating. Each of the conductors  22  has an upper surface  22   a  and a lower surface  22   b . In the present embodiment, the conductors  22  are made of copper. 
         [0027]    Referring to  FIG. 2C , a plurality of conductive pads  23  are formed on the first surface  21   a  of the protection layer  21  and the upper surfaces  22   a  of the conductors  22  through electroplating or electroless plating and patterning such that the conductive pads  23  electrically connect with the conductors  22 , respectively. 
         [0028]    Referring to  FIG. 2D , a solder mask layer  24  is formed on the first surface  21   a  of the protection layer  21  and the conductive pads  23 , and a plurality of openings  240  are formed in the solder mask layer  24  corresponding in position to the conductive pads  23 . In the present embodiment, each of the openings  240  is solder mask defined so as to partially expose the corresponding conductive pad  23 . 
         [0029]    In another embodiment, referring to FIG.  2 D′, each of the openings  240 ′ is non-solder mask defined so as to expose the entire upper surface of the corresponding conductive pad  23  and a portion of the first surface  21   a  of the protection layer  21  around the periphery of the conductive pad  23 . 
         [0030]    Referring to  FIG. 2E , a plurality of conductive bumps  25  are formed on the conductive pads  23  in the openings  240  of the solder mask layer  24 , respectively. In the present embodiment, the conductive bumps  25  are made of gold or a solder material. 
         [0031]    Referring to  FIG. 2F , at least a MEMS chip  26  is disposed on the conductive bumps  25  so as to be electrically connected to the conductive pads  23  through the conductive bumps  25 . The MEMS chip  26  can be, for example, a gyroscope, an accelerometer or an RF element. 
         [0032]    Referring to FIG.  2 F′, in another embodiment, a plurality of conductive bumps  25 ′ are formed on the MEMS chip  26  such that the MEMS chip  26  can be disposed on the conductive pads  23  through the conductive bumps  25 ′. 
         [0033]    Alternatively, referring to FIG.  2 F″, the step of forming a solder mask layer as in  FIG. 2D  is omitted and the MEMS chip  26  is disposed on the conductive pads  23  through the conductive bumps  25  or  25 ′. 
         [0034]    Referring to  FIG. 2G  an encapsulant  27  is formed on the solder mask layer  24  for encapsulating the MEMS chip  26 . 
         [0035]    Referring to  FIG. 2H , the carrier  20  is removed such that the lower surfaces  22   b  of the conductors  22  are exposed from the second surface  21   b  of the protection layer  21 . Then, a singulation process is performed along a cutting line L as shown in  FIG. 2G  to obtain a package  2 . 
         [0036]    Referring to FIG.  2 H′, continuing from FIG.  2 F″, a package  2 ′ without the solder mask layer  24  is obtained. 
         [0037]    The present invention further provides a package  2 ′ having a MEMS element, which has a protection layer  21  having a first surface  21   a  and a second surface  21   b  and a plurality of openings  210  in communication with the first surface  21   a  and the second surface  21   b ; a plurality of conductors  22  formed in the openings  210 , respectively; a plurality of conductive pads  23  formed on the first surface  21   a  of the protection layer  21  and the conductors  22  for electrically connecting with the conductors  22 ; a MEMS chip  26  disposed on and electrically connected to the conductive pads  23 ; and an encapsulant  27  formed on the protection layer  21  for encapsulating the MEMS chip  26 , wherein the conductors  22  are exposed from the second surface  21   b  of the protection layer  21  and the encapsulant  27 . 
         [0038]    In another embodiment, the package  2  further has a solder mask layer  24  formed on the first surface  21   a  of the protection layer  21  and the solder mask layer  24  is formed with a plurality of openings  240 ′ for completely exposing the conductive pads  23  so as for the MEMS chip  26  to be disposed thereon. Alternatively, the openings of the solder mask layer  24  can be formed to partially expose the corresponding conductive pads  23 , respectively. Further, the encapsulant  27  is formed on the solder mask layer  24  such that the solder mask layer  24  is positioned between the encapsulant  27  and the protection layer  21 . 
         [0039]    In the packages  2 ,  2 ′, a plurality of conductive bumps  25  are disposed between the conductive pads  23  and the MEMS chip  26  for connecting the conductive pads  23  and the MEMS chip  26 . 
         [0040]    Furthermore, as shown in  FIG. 21 , a plurality of solder balls  28  can be disposed on the lower surfaces  22   b  of the conductors  22 , respectively, according to the practical need. 
         [0041]    Therefore, the present invention removes the carrier  20  to reduce the overall thickness of the packages  2 ,  2 ′ so as to achieve miniaturization. 
         [0042]    Further, by encapsulating the MEMS chip  26  with the encapsulant  27  and forming the conductors  22  in the protection layer  21 , the present invention avoids a conventional drilling process, thereby reducing the fabrication cost. 
         [0043]    The above-described descriptions of the detailed embodiments are intended to illustrate the preferred implementations according to the present invention but are not intended to limit the scope of the present invention. Accordingly, numerous modifications and variations completed by those with ordinary skill in the art will within the scope of present invention as defined by the appended claims.