Abstract:
A method of extracting an equivalent circuit of a T-type transmission circuit measures signals of the first and second terminals to obtain S parameters, converts the S parameters into Z parameters to generate a T-type circuit by using the Z parameters, obtains first to third lead line resistors and first to third lead line inductors in the T-type circuit based on the Z parameters corresponding to constants of the T-type circuit, subtracts the Z parameters corresponding to the T-type circuit from the Z parameters corresponding to all of the equivalent circuit to calculate the Z parameters of a π-type circuit, converts the Z parameters of the π-type circuit into the Y parameters, and calculates first to third coupling capacitances based on the Y parameters.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2007-225824, filed on Aug. 31, 2007, the entire contents of which are incorporated herein by reference. 
       BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The present invention relates to an apparatus and a method of extracting an equivalent circuit of a T-type transmission circuit having an AC current ground terminal, and first and second terminals for signal transmission. 
         [0004]    2. Related Art 
         [0005]    There are a number of known techniques related to an inductor model formed on a semiconductor substrate. Such known techniques relate to an equivalent circuit assuming a two-terminal structure having one input terminal and one output terminal (for example, refer to John R. Long and Miles A. Copeland, “Modeling of Monolithic Inductors and Transformers for Silicon RFIC Design”, MTT-S 1995 International Topical Symposium pp. 129-134). 
         [0006]    The above document discloses the following. When the inductor model is constructed, a large number of impedances of elements formed on a silicon substrate is actually measured with a network analyzer, or the like; the measured values are converted to four-terminal equivalent circuit parameters (i.e. Y parameter or Z parameter), or the like; and in consideration of a configuration of the equivalent circuit, equivalent circuit values (i.e. values of elements such as an inductor and a resistor used in the above equivalent circuit) of the equivalent circuit are extracted. 
         [0007]    Recently, the inductors are frequently utilized in a three-terminal structure. For example, the inductors are utilized in a structure having a center-tap in a Voltage Controlled Oscillator (VCO), and are utilized in a configuration for an ON-Chip transformer. In addition, there are increased needs to easily and accurately extract the equivalent circuit values of a three-terminal inductor as there are increased instances where an electromagnetic analysis is utilized to estimate the inductor characteristics. 
         [0008]    In an equivalent circuit value calculating method described in the above document, it is assumed that the two-terminal inductor is used. Therefore, this method can not be directly used to extract the equivalent circuit values of the three-terminal inductor, which is a significant problem. 
         [0009]    As a method for extracting the equivalent circuit value, there is a known method in which a measured value or an electromagnetic field analysis calculated value are used as a reference value, the equivalent circuit value is swept on a simulator, and a combination of values which are the closest to the measured value is obtained. This method, however, has a problem that the obtained result depends on an initial value utilized or an operator of the simulator, and it is not possible to accurately determine whether or not the obtained result is physically correct. 
         [0010]    In addition, there is a latest simulator having a program in which the circuit configuration and the equivalent circuit value which are the most suitable to the targeted S parameter are automatically combined to generate the equivalent circuit. It is not assured for the same reason as the above that a circuit designer can obtain significant information in a short period. 
       SUMMARY OF THE INVENTION 
       [0011]    According to one aspect of the present invention, a method of extracting an equivalent circuit of a T-type transmission circuit, 
         [0012]    the T-type transmission circuit having a ground terminal for an AC signal and first and second terminals for signal transmission, 
         [0013]    the equivalent circuit having a T-type circuit and a π-type circuit, 
         [0014]    the T-type circuit having:
       a first lead line constant part, one end of which is connected to the first terminal and which has a first lead line resistor and a first lead line inductor connected in series;   a second lead line constant part, one end of which is connected to the second terminal, the other end of which is connected to the other end of the first lead line contact part and which has a second lead line resistor and a second lead line inductor connected in series;   a third lead line constant part, one end of which is connected to the ground terminal, the other end of which is connected to the other end of the first lead line constant part and the other end of the second lead line constant part, and which has a third lead line resistor and a third lead line inductor connected in series,       
 
         [0018]    the π-type circuit having:
       a first impedance circuit generated by a first coupling capacitor and an eddy current loss which are connected in series between the first terminal and the ground terminal;   a second impedance circuit generated by a second coupling capacitance and an eddy current loss which are connected in series between the second terminal and the ground terminal; and   a third coupling capacitor connected between the first and second terminals, the method comprising:       
 
         [0022]    measuring signals of the first and second terminals to obtain S parameters; 
         [0023]    converting the S parameters into Z parameters to generate the T-type circuit by using the Z parameters; 
         [0024]    obtaining the first to third lead line resistors and the first to third lead line inductors in the T-type circuit based on the Z parameters corresponding to constants of the T-type circuit; 
         [0025]    subtracting the Z parameters corresponding to the T-type circuit from the Z parameters corresponding to all of the equivalent circuit to calculate the Z parameters of the π-type circuit; 
         [0026]    converting the Z parameters of the π-type circuit into the Y parameters; and 
         [0027]    calculating the first to third coupling capacitances based on the Y parameters. 
         [0028]    According to the other aspect of the present invention, an apparatus of extracting an equivalent circuit of a T-type transmission circuit, 
         [0029]    the T-type transmission circuit having a ground terminal for an AC signal and first and second terminals for signal transmission, 
         [0030]    the equivalent circuit having a T-type circuit and a π-type circuit, 
         [0031]    the T-type circuit having:
       a first lead line constant part, one end of which is connected to the first terminal and which has a first lead line resistor and a first lead line inductor connected in series;   a second lead line constant part, one end of which is connected to the second terminal, the other end of which is connected to the other end of the first lead line contact part and which has a second lead line resistor and a second lead line inductor connected in series;   a third lead line constant part, one end of which is connected to the ground terminal, the other end of which is connected to the other end of the first lead line constant part and the other end of the second lead line constant part, and which has a third lead line resistor and a third lead line inductor connected in series,       
 
         [0035]    the π-type circuit having:
       a first impedance circuit generated by a first coupling capacitor and an eddy current loss which are connected in series between the first terminal and the ground terminal;   a second impedance circuit generated by a second coupling capacitance and an eddy current loss which are connected in series between the second terminal and the ground terminal; and   a third coupling capacitor connected between the first and second terminals, the apparatus comprising:       
 
         [0039]    measuring signals of the first and second terminals to obtain S parameters; 
         [0040]    converting the S parameters into Z parameters to generate the T-type circuit by using the Z parameters; 
         [0041]    obtaining the first to third lead line resistors and the first to third lead line inductors in the T-type circuit based on the Z parameters corresponding to constants of the T-type circuit; 
         [0042]    subtracting the Z parameters corresponding to the T-type circuit from the Z parameters corresponding to all of the equivalent circuit to calculate the Z parameters of the π-type circuit; 
         [0043]    converting the Z parameters of the π-type circuit into the Y parameters; and 
         [0044]    calculating the first to third coupling capacitances based on the Y parameters. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0045]      FIG. 1  is a plan view illustrating an example of a transformer; 
           [0046]      FIG. 2  is a circuit diagram illustrating an example of an equivalent circuit of the transformer of  FIG. 1 ; 
           [0047]      FIG. 3  is a flowchart illustrating an example of a procedure for extracting each circuit constant in the circuit diagram of  FIG. 2 ; 
           [0048]      FIG. 4  is a diagram illustrating an example of a transmission circuit including the four-terminal Z parameter; 
           [0049]      FIG. 5  is a diagram illustrating an example of a T-type circuit using the three-terminal Z parameter; 
           [0050]      FIG. 6  is a graph illustrating a calculation result for first to third lead line resistors Rind_i; 
           [0051]      FIG. 7  is a graph illustrating a calculation result for first to third lead line inductors Lind_i; 
           [0052]      FIG. 8  is a diagram illustrating an example of a π-type circuit using the Y parameter; 
           [0053]      FIG. 9  is a graph illustrating a calculation result for first and second coupling capacitors Cox 1  and Cox 2 ; 
           [0054]      FIG. 10  is a graph illustrating a calculation result for third coupling capacitor Cox 3 ; 
           [0055]      FIG. 11  is a graph illustrating a calculation result for first and second eddy current loss resistors Rsi; 
           [0056]      FIG. 12  is a graph illustrating a calculation result for first and second eddy current loss capacitors Csi; 
           [0057]      FIG. 13A  is a graph of S 11  and S 22 ; 
           [0058]      FIG. 13B  is a graph of S 21  and S 12 ; and 
           [0059]      FIG. 14  is a diagram illustrating a calculation result and a measured value for the frequency characteristics of the Q value in the equivalent circuit. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0060]    An embodiment of the present invention will be described below with reference to the drawings. 
         [0061]    An equivalent circuit of a transformer having a center tap will be described below as an example of a T-type equivalent circuit. 
         [0062]      FIG. 1  is a plan view illustrating an example of a transformer. The transformer of  FIG. 1  is formed by using a spiral pattern  2 . The transformer of  FIG. 1  includes a first terminal A and a second terminal B for transmitting a signal, and an AC current ground terminal C (i.e. center tap). In  FIG. 1 , a part between the terminal A and the terminal C corresponds to a coil  3  of a primary side, and a part between the terminal B and the terminal C corresponds to a coil  4  of a secondary side. 
         [0063]    In the transformer of  FIG. 1 , an outside diameter is 200 μm, a width of a pattern  2  is 10 μm, a clearance between the patterns  2  is 4 μm, the number of turns is 6 in both of the primary side and the secondary side, structures of the primary side coil  3  and the secondary side coil  4  are symmetric, and the center tap is provided on a symmetric axis. 
         [0064]      FIG. 2  is a circuit diagram illustrating an example of the equivalent circuit of the transformer of  FIG. 1 . The equivalent circuit of  FIG. 2  is configured with a combination of a T-type circuit part  5  and a π-type circuit part  6 . 
         [0065]    The T-type circuit part  5  includes a first lead line constant part  11  one end of which is connected to the first terminal A and which includes a first lead line resistor Rind_ 1  and a first lead line inductor Lind_ 1  serially connected with each other, a second lead line constant part  12  one end of which is connected to the second terminal B and the other end of which is connected to the other end of the first lead line constant part  11  and which includes a second lead line resistor Rind_ 2  and a second lead line inductor Lind_ 2  serially connected with each other, and a third lead line constant part  13  one end of which is connected to a ground terminal and the other end of which is connected to the other end of the first lead line constant part  11  and the other end of the second lead line constant part  12  and which includes a third lead line resistor Rind_ 3  and a third lead line inductor Lind_ 3  serially connected with each other. 
         [0066]    The π-type circuit part  6  includes a first coupling capacitor Cox 1  and a first impedance circuit Zsub  1  due to an eddy current loss which are serially connected between the first terminal A and the ground terminal, a second coupling capacitor Cox 2  and a second impedance circuit Zsub  2  due to the eddy current loss which are serially connected between the second terminal B and the ground terminal, and a third coupling capacitor Cox 3  which is connected between the first terminal A and the second terminal B. 
         [0067]    The first impedance circuit Zsub  1  includes a first eddy current loss resistor Rs 1  and a first eddy current loss capacitor Cs 1  which are connected in parallel, and the second impedance circuit Zsub  2  includes a second eddy current loss resistor Rs 2  and a second eddy current loss capacitor Cs 2  which are connected in parallel. 
         [0068]      FIG. 3  is a flowchart illustrating an example of a procedure for extracting each circuit constant in the equivalent circuit of  FIG. 2 . The flowchart of  FIG. 3  is generally programmed to be executed by a computer. Alternatively, specific hardware may be provided which can execute the flowchart of  FIG. 3 . Otherwise, the flowchart of  FIG. 3  may be processed by dividing the processes into multiple apparatuses. 
         [0069]    A method will be described below based on the flowchart of  FIG. 3 , which extracts each circuit constant in the equivalent circuit of  FIG. 2 . First of all, the first and second terminals A and B of the transformer of  FIG. 1  are connected to a two-port network analyzer (not-illustrated), and the S parameter is measured (step S 1 ). 
         [0070]    Next, the measured S parameter is converted to the Z parameter, and the T-type equivalent circuit conversion is executed (step S 2 ). 
         [0071]    The T-type equivalent circuit conversion in step S 2  will be described in detail below. 
         [0072]      FIG. 4  is a diagram illustrating an example of a transmission circuit including the four-terminal Z parameter.  FIG. 5  is a diagram illustrating an example of the T-type circuit using the three-terminal Z parameter. In  FIG. 4 , the Z parameters are designated as Z 11 , Z 12 , Z 21 , and Z 22 , and in  FIG. 5 , the Z parameters are designated as Z 1 , Z 2 , and Z 3 . 
         [0073]    From  FIG. 4 , the following equations (1) and (2) are derived. 
         [0000]        v 1= Z 11· i 1 +Z 12· i 2   (1) 
         [0000]        v 2= Z 21· i 1+ Z 22· i 2   (2) 
         [0074]    From  FIG. 5 , the following equations (3) and (4) are derived. 
         [0000]        v 1= Z 1· i 1+ Z 3·( i 1+ i 2)   (3) 
         [0000]        v 2= Z 2· i 2+ Z 3·( i 1+ i 2)   (4) 
         [0075]    If the above equations (3) and (4) are modified, the following equations (5) and (6) are obtained. 
         [0000]        v 1=( Z 1+ Z 3)· i 1+ Z 3· i 2   (5) 
         [0000]        v 2=( Z 2+ Z 3)· i 2+ Z 3· i 1   (6) 
         [0076]    If the above equations (5) and (6) are compared with the above equations (1) and (2), the following equations (7) to (9) are obtained. 
         [0000]        Z 11= Z 1+ Z 3   (7) 
         [0000]        Z 12= Z 21= Z 3   (8) 
         [0000]        Z 22= Z 2+ Z 3   (9) 
         [0077]    If the above equation (8) is modified, Z 12 +Z 21 =2×Z 3  is derived, and the following equation (10) is obtained. 
         [0000]        Z 3=0.5×( Z 12+ Z 21)   (10) 
         [0078]    If the above equation (8) is substituted for the above equation (7), the following equation (11) is obtained. 
         [0000]        Z 11= Z 1+ Z 12(= Z 21)   (11) 
         [0079]    If this equation (11) is substituted for the above equation (10), the following equation (12) is obtained. 
         [0000]        Z 1= Z 11−0.5×( Z 12+ Z 21)   (12) 
         [0080]    If the above equation (10) is substituted for the above equation (9), the following equation (13) is obtained. 
         [0000]        Z 2= Z 22−0.5×( Z 12+ Z 21)   (13) 
         [0081]    Each value of the above equations (12), (13), and (10) is a result of the T-type equivalent circuit conversion. 
         [0082]    The T-type circuit including the Z parameters indicated in the above equations (12), (13), and (10) corresponds to the T-type circuit  5  of  FIG. 2 , and the following equations (14) to (16) are derived. 
         [0000]        Z 1= Rind   — 1+ jωLind   — 1   (14) 
         [0000]        Z 2= Rind   — 2+ jωLind   — 2   (15) 
         [0000]        Z 3= Rind   — 3+ jωLind   — 3   (16) 
         [0083]    As indicated in the above equations (14) to (16), real number components of Z 1 , Z 2 , and Z 3  correspond to the first to third lead line resistors Rind_i (i=1 to 3), and imaginary number components correspond to the first to third lead line inductors Lind_i. 
         [0084]    As described above, by calculating Z 1 , Z 2 , and Z 3  from the above equations (12), (13), and (10), it is possible to obtain the first to third lead line resistors Rind_i and the first to third lead line inductors Lind_i (step S 3 ). 
         [0085]      FIG. 6  is a graph illustrating a calculation result for the first to third lead line resistors Rind_i, and  FIG. 7  is a graph illustrating a calculation result for the first to third lead line inductors Lind_i. In  FIG. 6  and  FIG. 7 , a horizontal axis corresponds to a frequency. A horizontal axis of  FIG. 6  is the real number component of the above equations (14) to (16), and corresponds to the first to third lead line resistors Rind_i. A horizontal axis of  FIG. 7  is the imaginary number component of the above equations (14) to (16), and corresponds to the first to third lead line inductors Lind_i. 
         [0086]    Since a structure of the equivalent circuit of  FIG. 2  is symmetric, the first and second lead line resistors Rind_ 1  and Rind_ 2  become equal to each other, and the first and second lead line inductors Lind_ 1  and Lind_ 2  also become equal to each other. The calculation results for the first to third lead line resistors Rind_i and the first to third lead line inductors Lind_i vary according to the frequency. Thus, the optimum value is selected from the values which are calculated in as a low frequency as possible. It is desirable as a guide that the first to third lead line resistors Rind_i and the first to third lead line inductors Lind_i are calculated in a frequency area which is equal to or less than 1/1000 of a frequency fosc defined by the following equation (17). 
         [0000]    
       
         
           
             
               
                 
                   
                     f 
                     osc 
                   
                   = 
                   
                     1 
                     
                       2 
                        
                       
                           
                       
                        
                       π 
                        
                       
                         
                           
                             L 
                             ind_i 
                           
                            
                           
                             C 
                             
                               ox 
                                
                               
                                   
                               
                                
                               3 
                             
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   17 
                   ) 
                 
               
             
           
         
       
     
         [0087]    Since the first to third lead line inductors Lind_i and the third coupling capacitor Cox 3  are frequently unknown in advance, it is desirable, more specifically, to calculate the first to third lead line resistors Rind_i and the first to third lead line inductors Lind_i in the frequency area of 200 MHz or less. 
         [0088]    Next, by using the Z parameters Z 1 , Z 2 , and Z 3  indicated in the above equations (14) to (16), a Z matrix Z_tee of the T-type circuit part  5  is calculated (step S 4 ). Four components Ztee 11 , Ztee 12 , Ztee 21 , Ztee 22  of the Z matrix Z_tee are expressed as the following equations (18) to (20) by using the above equations (7) to (9). 
         [0000]        Ztee 11= Z 1+ Z 3=( Rind   — 1+ Rind   — 3)+ j ω( Lind   — 1+ Lind   — 3)   (18) 
         [0000]        Ztee 22= Z 2+ Z 3=( Rind   — 2+ Rind   — 3)+ j ω( Lind   — 2+ Lind   — 3)   (19) 
         [0000]        Ztee 12= Ztee 21= Rind   — 3+ jωLind   — 3   (20) 
         [0089]    Next, as indicated in the following equation (21), by subtracting the Z matrix Z_tee of the T-type circuit part  5  from a Z matrix Z_dut of the whole circuit of  FIG. 2 , a Z matrix Z_dut′ of the π-type circuit part  6  is calculated (step S 5 ). 
         [0000]        Z   —   dut′=Z   —   dut−Z   —   tee    (21) 
         [0090]    Next, the Z matrix Z_dut′ is converted to a Y matrix Y_dut′ (step S 6 ). 
         [0091]    The following relations are derived by using a four-terminal Y matrix. 
         [0000]        i 1= Y 11· v 1+ Y 12· v 2   (22) 
         [0000]        i 2= Y 21· v 1+ Y 22· v 2   (23) 
         [0092]    If the equations (22) and (23) are substituted for i 1  and i 2  of the above equations (1) and (2), the following equations (24) and (25) are obtained. 
         [0000]      ( Z 11· Y 11+ Z 12· Y 21−1) v 1+( Z 11· Y 12+ Z 12· Y 22) v 2=0   (24) 
         [0000]      ( Z 21· Y 11+ Z 22· Y 21−1) v 1+( Z 21· Y 12+ Z 22· Y 22−1) v 2=0   (25) 
         [0093]    In the above equations (24) and (25), the conditions, on which identities of v 1  and v 2  are derived, are the following equations (26) to (29). 
         [0000]        Z 11· Y 11+ Z 12· Y 21−1=0   (26) 
         [0000]        Z 11· Y 12+ Z 12· Y 22=0   (27) 
         [0000]        Z 21· Y 11+ Z 22· Y 21=0   (28) 
         [0000]        Z 21· Y 22+ Z 22· Y 22−1=0   (29) 
         [0094]    By designating the above equations (26) to (29) as simultaneous equations, the Y 11 , Y 12 , Y 21 , and Y 22  can be calculated. 
         [0095]    Here, the Y matrix Y_dut′ can be expressed by using three admittances Y 1 , Y 2 , and Y 3  which are connected other in a π-type (step S 7 ).  FIG. 8  is a diagram illustrating an example of the π-type circuit using the Y parameters. The following equations (30) and (31) are obtained from  FIG. 8 . 
         [0000]        i 1= Y 11· v 1+ Y 12· v 2   (30) 
         [0000]        i 2= Y 21· v 1+ Y 22· v 2   (31) 
         [0096]    If the above equations (30) and (31) are modified, the following equations (32) and (33) are obtained. 
         [0000]        i 1=( Y 1+ Y 3) v 1· Y 3· v 2   (32) 
         [0000]        i 2=− Y 3· v 1+( Y 2+ Y 3) v 2   (33) 
         [0097]    The following equations (34) to (36) are obtained from the above equations (32) and (33), and the above equations (30) and (31). 
         [0000]        Y 1= Y 11+0.5( Y 21+ Y 12)   (34) 
         [0000]        Y 2= Y 22+0.5( Y 21+ Y 12)   (35) 
         [0000]        Y 3=−0.5( Y 21+ Y 12)   (36) 
         [0098]    Next, the first to third coupling capacitors Coxi (i=1 to 3) are calculated based on the following equations (37) and (38) by using the three admittances Y 1 , Y 2 , and Y 3  (step S 8 ). 
         [0099]    An imaginary number component of a reciprocal of the admittance Yi is expressed by the following equation (37). 
         [0000]    
       
         
           
             
               
                 
                   
                     Imag 
                      
                     
                       ( 
                       
                         1 
                         
                           Y 
                           i 
                         
                       
                       ) 
                     
                   
                   = 
                   
                     
                       
                         - 
                         1 
                       
                       
                         ω 
                         · 
                         
                           C 
                           oxi 
                         
                       
                     
                     = 
                     
                       
                         - 
                         1 
                       
                       
                         2 
                          
                         
                           π 
                           · 
                           freq 
                           · 
                           
                             C 
                             oxi 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   37 
                   ) 
                 
               
             
           
         
       
     
         [0100]    The above equation (37) is modified to become the following equation (38), and the first to third coupling capacitors Coxi are obtained. 
         [0000]    
       
         
           
             
               
                 
                   
                     C 
                     oxi 
                   
                   = 
                   
                     
                       - 
                       1 
                     
                     
                       2 
                        
                       
                           
                       
                        
                       
                         π 
                         · 
                         freq 
                         · 
                         
                           Imag 
                            
                           
                             ( 
                             
                               1 
                               
                                 Y 
                                 i 
                               
                             
                             ) 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   38 
                   ) 
                 
               
             
           
         
       
     
         [0101]      FIG. 9  is a graph illustrating a calculation result for the first and second coupling capacitors Cox 1  and Cox 2 , and  FIG. 10  is a graph illustrating a calculation result for the third coupling capacitor Cox 3 . A horizontal axis of  FIG. 9  and  FIG. 10  corresponds to a frequency. As illustrated in such figures, calculation results of the first to third coupling capacitors Coxi vary according to the frequency. Thus, the maximum value is selected for the first and second coupling capacitors Cox 1  and Cox 2  in as a low frequency area as possible, and the maximum value is selected for the third coupling capacitor Cox 3  in as a high frequency area as possible. 
         [0102]    Next, the first and second impedance circuits Zsub  1  and Zsub  2  are calculated, which are serially connected to the first and second coupling capacitors Cox 1  and Cox 2  (step S 9 ). The first impedance circuit Zsub  1  is obtained by connecting the first eddy current loss resistor Rs 1  and the first eddy current loss capacitor Cs 1  in parallel, and is expressed by the following equation (39). The second impedance circuit Zsub  2  is obtained by connecting the second eddy current loss resistor Rs 2  and the second eddy current loss capacitor Cs 2  in parallel, and is expressed by the following equation (40). 
         [0000]    
       
         
           
             
               
                 
                   
                     Z 
                     
                       sub 
                        
                       
                           
                       
                        
                       1 
                     
                   
                   = 
                   
                     1 
                     
                       
                         1 
                         
                           R 
                           
                             s 
                              
                             
                                 
                             
                              
                             1 
                           
                         
                       
                       + 
                       
                         j 
                          
                         
                             
                         
                          
                         ω 
                          
                         
                             
                         
                          
                         
                           C 
                           
                             s 
                              
                             
                                 
                             
                              
                             1 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   39 
                   ) 
                 
               
             
             
               
                 
                   
                     Z 
                     
                       sub 
                        
                       
                           
                       
                        
                       2 
                     
                   
                   = 
                   
                     1 
                     
                       
                         1 
                         
                           R 
                           
                             s 
                              
                             
                                 
                             
                              
                             2 
                           
                         
                       
                       + 
                       
                         j 
                          
                         
                             
                         
                          
                         ω 
                          
                         
                             
                         
                          
                         
                           C 
                           
                             s 
                              
                             
                                 
                             
                              
                             2 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   40 
                   ) 
                 
               
             
           
         
       
     
         [0103]    From the above equations (39) and (40), the first and second eddy current loss resistors Rsi (i=1 and 2), and the first and second eddy current loss capacitors Csi (i=1 and 2) are calculated (step S 10 ). The first and second eddy current loss resistors Rsi (i=1 and 2), and the first and second eddy current loss capacitors Csi (i=1 and 2) are expressed by the following equations (41) and (42) respectively. 
         [0000]    
       
         
           
             
               
                 
                   
                     R 
                     si 
                   
                   = 
                   
                     1 
                     
                       real 
                        
                       
                         ( 
                         
                           1 
                           
                             Z 
                             subi 
                           
                         
                         ) 
                       
                     
                   
                 
               
               
                 
                   ( 
                   41 
                   ) 
                 
               
             
             
               
                 
                   
                     C 
                     si 
                   
                   = 
                   
                     
                       Imag 
                        
                       
                         ( 
                         
                           1 
                           
                             Z 
                             subi 
                           
                         
                         ) 
                       
                     
                     
                       2 
                        
                       
                           
                       
                        
                       π 
                        
                       
                           
                       
                        
                       freq 
                     
                   
                 
               
               
                 
                   ( 
                   42 
                   ) 
                 
               
             
           
         
       
     
         [0104]    As indicated in the above equations (41) and (42), the first and second eddy current loss resistors Rsi are real number components of the above equations (39) and (40), and the first and second eddy current loss capacitors Csi are imaginary number component of the above equations (39) and (40). 
         [0105]      FIG. 11  is a graph illustrating a calculation result for the first and second eddy current loss resistors Rsi, and  FIG. 12  is a graph illustrating a calculation result for the first and second eddy current loss capacitors Csi. In such figures, a horizontal axis corresponds to a frequency. As illustrated in such figures, while the calculation results for the first and second eddy current loss resistors Rsi and the first and second eddy current loss capacitors Csi largely vary, the calculation results are extracted in as a high frequency as possible. 
         [0106]    As described above, each circuit constant in the equivalent circuit of  FIG. 2  can be extracted. 
         [0107]      FIG. 13  is a graph illustrating a calculation result and a measured value of the S parameter of the equivalent circuit in which each circuit constant is extracted by the flowchart of  FIG. 3 , and  FIG. 13A  illustrates a graph of a reflection coefficient. Dots illustrate measured value of S 11  and S 22 , and solid lines illustrate the value extracted by the present invention and the simulation result when the equivalent circuit illustrated in  FIG. 2  is used. Because of the symmetrical configuration of the circuit illustrated in  FIG. 2 , both S 11  and S 22  are the identically same and traces of two perfectly match.  FIG. 13B  illustrates a graph of a transmission gain. Dots illustrate the measured value of S 12  and S 21 , and solid lines illustrate the value extracted by the present invention and a simulation result when the equivalent circuit illustrated in  FIG. 2  is used. By the same reason described in the explanation of  FIG. 13A , both S 12  and S 21  are the identically same and traces of two perfectly match. In  FIG. 13B , while the divergence may be imaged between S 12  and S 21 , the value to be compared is actually very small (at most, around 0.01), so that it is reasonable to ignore this divergence.  FIG. 14  is a diagram illustrating the calculation result and the measured value for the frequency characteristics of the Q value in the equivalent circuit. In  FIG. 13  and  FIG. 14 , the graph of the calculation result is illustrated by a solid line, and the measured value is illustrated by a dash line. 
         [0108]    As illustrated in  FIG. 13  and  FIG. 14 , the calculation result is close to the measured value, so that it is apparent that the accuracy of a modeling for extracting the equivalent circuit in the present embodiment is very high. 
         [0109]    As described above, in the present embodiment, the equivalent circuit as illustrated in  FIG. 2  is generated for the T-type transmission circuit with the three terminals such as the transformer having the center tap, this equivalent circuit is separately electromagnet field-analyzed in each of the π-type circuit part  6  and the T-type circuit part  5 , each circuit constant in the equivalent circuit is directly calculated without the optimization using the simulation, so that a variety of the T-type transmission circuits can be designed in a short time. Particularly, when adopting the equivalent circuit extracting method according to the present embodiment, it is possible to obtain the modeling accuracy which is extremely close to the measured value through a wide band from a direct current to a high frequency (i.e. around 20 GHz), to suppress the design error to be minimum, and to widely shorten a design term for a variety of semiconductor integrated circuits incorporating the T-type transmission circuit. By applying the present embodiment, it becomes possible to develop a process design kit for an inductor in a short time. 
         [0110]    In the above embodiment, while the equivalent circuit of the transformer having the center tap has been described as an example of the T-type transmission circuit, the present invention can be widely applied to a variety of the T-type transmission circuits with at least, the three terminals. 
         [0111]    At least a portion of functions performed by the above-mentioned equivalent circuit extracting method and equivalent circuit extracting apparatus may be constituted by at least one of hardware and software. When constituted by software, a program of executing at least a portion of the functions performed by the equivalent circuit extracting method and the equivalent circuit extracting apparatus is stored in a recording media such as a floppy disk or CD-ROM, and is loaded to a computer to execute its program. The recording media is not limited to a portable media such a magnetic disk or an optical disk, but a fixed recording media such as a hard disk drive or a memory may be used to store the program. 
         [0112]    The program of executing at least a portion of the functions performed by the equivalent circuit extracting method and the equivalent circuit extracting apparatus may be distributed via a communication line such as Internet. The program may be distributed via a wired line or a wireless line such as Internet at a state of encrypting, modulating or compressing the program, or may be distributed at a state of being stored in the recording media. 
         [0113]    Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.