Abstract:
A method of determining overlay accuracy, using visual inspection, of a first circuit pattern relative to a second circuit pattern. The first circuit pattern and the second circuit pattern are too large to be contained in a single reticle and are formed separately on an integrated circuit wafer and photo stitched together. A first overlay pattern is located adjacent to the first circuit pattern on a mask. A second overlay pattern is located adjacent to the second circuit pattern on a mask, preferably, but not necessarily, the same mask. The first overlay pattern and the second overlay pattern are located so that their images in the layer of developed photoresist will be adjacent to each other after the photoresist is exposed with the first and second circuit patterns and developed. Visual observation of the images of the first and second overlay patterns is then used to determine the overlay accuracy of the first circuit pattern relative to the second circuit pattern.

Description:
BACKGROUND OF THE INVENTION 
     (1) Field of the Invention 
     This invention relates to a pattern and method of using the pattern for the measurement of overlay accuracy of two patterns interconnected on a wafer using a photo stitch process. 
     (2) Description of the Preferred Embodiments 
     Chip sizes are often larger than the available reticle size used to expose patterns on the wafer. This requires interconnecting patterns on two different reticles using a photo stitch process. In a photo stitch process overlay accuracy is of great importance. Methods of measuring overlay accuracy and patterns used in the measurement of overlay accuracy are also important. 
     U.S. Pat. No. 5,701,013 to Hsia et al. describes a wafer metrology pattern integrating both overlay and critical dimension features. 
     U.S. Pat. No. 4,149,085 to Davis et al. describes a method and apparatus for performing automatic overlay measurements on semiconductor wafers. 
     U.S. Pat. No. 5,498,500 to Bae describes an overlay measurement mark and method of measuring an overlay error between multi patterns of a semiconductor device. 
     U.S. Pat. No. 5,300,786 to Brunner et al. describes an optical phase shift test pattern, monitoring system, and process. 
     SUMMARY OF THE INVENTION 
     As chip images become larger the circuit images become too large for a single mask reticle. In these cases it is necessary to divide the chip image into two separate reticles and expose them separately on an integrated circuit wafer. The images of each of the two separate reticles are then stitched together to make a single circuit image. Alignment of the images of the two separate reticles is of critical importance in forming a single circuit image from the two separate images. It is very desirable that the alignment of two images can be made easily using visual inspection of the images. 
     It is a principle objective of this invention to provide a pattern and method for determining the overlay accuracy of two images to be stitched together in a single chip. 
     This objective is achieved using a first overlay pattern adjacent to a first chip image on a mask and a second overlay pattern adjacent to a second chip image on a mask, preferably the same mask. When a layer of photoresist is exposed with the first and second chip images it is also exposed with the first and second overlay patterns. After the photoresist is developed, the first and second overlay patterns are visually inspected and the overlay accuracy in both the X and Y directions can be determined. 
     The first overlay pattern comprises a rectangular first center mark, a first number of rectangular first side marks having a width equal to a first distance to the left of the first center mark, and the first number of rectangular second side marks having a width equal to the first distance to the right of the first center mark. The second overlay pattern comprises a rectangular second center mark, the first number of rectangular third side marks to the left of the second center mark, and the first number of rectangular fourth side marks to the right of the center mark. The third side mark nearest the second center mark has a width equal to the first distance plus a second distance and the width of each successive third side mark increases by the second distance. The fourth side mark nearest the second center mark has a width equal to the first distance plus the second distance and the width of each successive fourth side mark increases by the second distance. 
     There is a rectangular third center mark located within the second center mark, wherein the top of the third center mark coincides with the top of the second center mark. There is a third distance between the bottom of the third center mark and the bottom of the second center mark. 
     The alignment accuracy in the X direction is determined by visually comparing the position of the image of the first side marks relative to the image of the third side marks and the position of the image of the second side marks relative to the image of the fourth side marks. The alignment accuracy in the Y direction is determined by visually comparing the distance between top of the image of the first center mark to the top of the image of the third side mark relative the image of the third distance. 
     Perfect alignment in the X direction is indicated when the right side of the image of each of the first side marks is co-linear with the right side of the image of one of the third side marks and the left side of the image of each of the second side marks is co-linear with the image of the left side of one of the fourth side marks. Perfect alignment in the Y direction is indicated when the distance between the image of the top of the first center mark and the image of the top of the third center mark is equal to the third distance. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 shows a top view of a mask showing two circuit patterns and two overlay patterns. 
     FIG. 2 shows a schematic view of an exposure and alignment system. 
     FIG. 3 shows a top view of a part of a wafer after the images of the two circuit patterns and two overlay patterns have been formed in a layer of photoresist. 
     FIG. 4 shows a top view of the first overlay pattern. 
     FIG. 5 shows a top view of the second overlay pattern. 
     FIG. 6 shows a top view of the image of the first overlay pattern and the second overlay pattern in a layer of photoresist showing perfect alignment in both the X and Y directions between the first and second circuit patterns. 
     FIG. 7 shows a top view of the image of the first overlay pattern and the second overlay pattern in a layer of photoresist showing misalignment between the first and second circuit patterns in the X direction and perfect alignment between the first and second circuit patterns in the Y direction. 
     FIG. 8 shows a top view of the image of the first overlay pattern and the second overlay pattern in a layer of photoresist showing perfect alignment between the first and second circuit patterns in the X direction and misalignment between the first and second circuit patterns in the Y direction. 
     FIG. 9 shows a top view of the image of the first overlay pattern and the second overlay pattern in a layer of photoresist showing misalignment in both the X and Y directions between the first and second circuit patterns. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Refer now to FIGS. 1-9 for a description of the preferred embodiment of the overlay pattern and method of overlay measurement of this invention. FIG. 1 shows a top view of a mask  50  having a first mask segment with first circuit pattern  52  and a second mask segment with a second circuit pattern  54 . These circuit patterns will be used to form a single chip which is too large to fit on a single mask segment. In order to monitor the overlay accuracy when images of the two circuit patterns are formed on a wafer a first overlay pattern  56  is located in the die sawing line adjacent to the right edge  53  of the first circuit pattern  52  and in line with the bottom edge  51  of the first circuit pattern  52 . A second overlay pattern  58  is located in the die sawing line adjacent to the right edge  57  of the second circuit pattern  54  and in line with the top edge  55  of the second circuit pattern  54 . Orthogonal X and Y directions are indicated in FIG.  1 . 
     The first circuit pattern  52 , the second circuit pattern  54 , the first overlay pattern  56 , and the second overlay pattern  58  are shown in the same mask in FIG. 1, although the first circuit pattern  52  and the first overlay pattern  56  will be exposed in one exposure step and the second circuit pattern  54  and the second overlay pattern  58  will be exposed in another exposure step. Those skilled in the art will readily recognize that the first circuit pattern  52  and the first overlay pattern  56  could be in one mask and the second circuit pattern  54  and the second overlay pattern  58  in another mask. Those skilled in the art will also recognize that the first overlay pattern  56  and the second overlay pattern could be located in the die sawing line adjacent to the left edge of the first circuit pattern  52  and the die sawing line adjacent to the left edge of the second circuit pattern  54 . Both the first overlay pattern and the second overlay pattern must both be located in the die sawing line adjacent to the right edge of the first and second circuit patterns, as in this example, or must both be located in the die sawing line adjacent to the left edge of the first and second circuit patterns so they will line up with each other when a layer of photoresist is exposed with both circuit patterns. 
     FIG. 2 shows a schematic diagram of an alignment and exposure system used to transfer the patterns from the mask  50  to a layer of photoresist  91  on an integrated circuit wafer  90 . The alignment and exposure system has a light source  80 , a condensing lens  82 , a mask holder  88  holding a mask  50 , an objective lens  84 , and a wafer holder  86  holding the wafer  90 . The mask holder  88  and the wafer holder  86  can be moved relative to each other so that the mask  50  can be aligned to the layer of photoresist  91  on the wafer  90 . After the mask and wafer are aligned the mask images are focussed on the layer of photoresist and the photoresist is exposed. 
     FIG. 3 shows a segment of the wafer  90  showing how the first circuit pattern  52 , the second circuit pattern  54 , the first overlay pattern  56 , and the second overlay pattern  58  fit together. The first overlay pattern  56  is located in the scribeline region of the first circuit pattern  52  and the second overlay pattern  58  is located in the scribeline region of the second circuit pattern  54 . The first overlay pattern  56  and second overlay pattern  58  are located so as not to interfere with the photo stitching of the first circuit pattern  52  and second circuit pattern  54 . Orthogonal X and Y directions are indicated in FIG.  3 . After the layer of photoresist has been exposed with the first circuit pattern  52 , the second circuit pattern  54 , the first overlay pattern  56 , and the second overlay pattern  58  the photoresist is developed and the overlay patterns are visually inspected to determine the overlay accuracy. 
     FIG. 4 shows a detailed view of the first overlay pattern. The first overlay pattern has a rectangular first center mark  10 ; a first  12 , a third  14 , and a fifth  16  rectangular side marks, each having a width equal to a first distance, to the left of the first center mark  10 ; and a second  11 , a fourth  13 , and a sixth  15  rectangular side mark also having a width equal to the first distance to the right of said first center mark. The first overlay pattern is symmetrical about a first centerline  18  which is parallel to the Y direction. In this example the image of the first distance in the developed photoresist is between about 0.8 and 1.2 micrometers. The distance between the right side of the first side mark  12  and the first center line  18  and between the left side of the second side mark  11  is a second distance  22 . The distance between the right side of the third side mark  14  and the first center line  18  and between the left side of the fourth side mark  13  is a third distance  24 . The distance between the right side of the fifth side mark  16  and the first center line  18  and between the left side of the sixth side mark  15  is a fourth distance  26 . In this example the image of the second distance  22  in the developed layer of photoresist is between about 3.0 and 3.6 micrometers, the image of the third distance  24  in the developed layer of photoresist is between about 5.0 and 6.0 micrometers, and the image of the fourth distance  26  in the developed layer of photoresist is between about 7.0 and 9.0 micrometers. Orthogonal X and Y directions are indicated in FIG.  4 . 
     FIG. 5 shows a detailed view of the second overlay pattern. FIG. 5 shows a second center mark  40  and a rectangular third center mark  32  located within the second center mark. The top of the second center mark  40  and the top of the third center mark  32 , indicated by a dashed line  60 , lie on the same line. The second overlay pattern is symmetrical about a second centerline  19 . The distance between the bottom of the second center mark  40  and the bottom of the third center mark  32  is a fifth distance  72 . In this example the image of the fifth distance  72  in a developed layer of photoresist is between about 0.8 and 1.2 micrometers. 
     FIG. 5 shows a seventh  42 , a ninth  44 , and an eleventh  46  side mark to the left of the second center mark  48  and an eighth  41 , a tenth  43 , and a twelfth  45  side mark to the right of the second center mark  40 . The width of the seventh side mark  42  and the eighth side mark  41  is the first distance  20  plus a sixth distance  30 . The width of the ninth side mark  44  and the tenth side mark  43  is the first distance  20  plus two times the sixth distance  30 . The width of the eleventh side mark  46  and the twelfth side mark  45  is the first distance  20  plus three times the sixth distance  30 . In this example the image of the sixth distance in a layer of photoresist is between about 0.08 and 0.12 micrometers. 
     The distance between the right side of the seventh side mark  42  and the second center line  19  and between the left side of the eighth side mark  41  and the second center line  19  is the second distance  22 . The distance between the right side of the ninth side mark  44  and the second center line  19  and the distance between the left side of the tenth side mark  43  and the second center line  19  is the third distance. The distance between the right side of the eleventh side mark  46  and the second center line  19  and between the left side of the twelfth side mark  45  and the second center line  19  is the fourth distance. 
     In this example the image of the second distance  22  in the developed layer of photoresist is between about 3.0 and 3.6 micrometers, the image of the third distance  24  in the developed layer of photoresist is between about 5.0 and 6.0 micrometers, and the image of the fourth distance  26  in the developed layer of photoresist is between about 7.0 and 9.0 micrometers. Orthogonal X and Y directions are indicated in FIG.  5 . 
     FIG. 6 shows the image in the layer of photoresist of the first  56  and second  58  overlay patterns for the case of perfect of the first circuit pattern relative to the second circuit pattern. As shown in FIG. 6, the center marks and the side marks in the first and second overlay patterns are located such that perfect alignment is indicated when, in the image in the layer of photoresist, the right sides of the first  12 , third  14 , and fifth  16  side marks are co-linear with the right sides of the seventh  42 , ninth  44 , and eleventh  46  side marks respectively; the left sides of the second  11 , fourth  13 , and sixth  15  side marks are co-linear with the left sides of the eighth  41 , tenth  43 , and twelfth  45  side marks respectively; and the distance  70  between the top of the first center mark  10  and the top of the third center mark  32  is the same as the fifth distance  72 , which is the distance between the bottom of the second center mark  40  and the bottom of the third center mark  32 . This condition can readily be detected by visual observation. 
     FIG. 7 shows the image in the layer of photoresist of the first  56  and second  58  overlay patterns for the case where the first circuit pattern is mis-aligned relative to the second circuit pattern in the X direction, but is perfectly aligned with the second circuit pattern in the Y direction. As shown in FIG. 7, in this case, in the image in the layer of photoresist, the right side of the second side mark  11  is co-linear with the right side of the eighth  41  side mark indicating a misalignment in the X direction equal to the sixth distance  30 . As shown in FIG. 7, in this case, in the image in the layer of photoresist, the distance  70  between the top of the first center mark  10  and the top of the third center mark  32  is the same as the fifth distance  72 , indicating perfect alignment in the Y direction. This condition can readily be detected by visual observation. 
     FIG. 8 shows the image in the layer of photoresist of the first  56  and  58  second overlay patterns for the case of perfect alignment of the first circuit pattern relative to the second circuit pattern in the X direction and misalignment of the first circuit pattern relative to the second circuit pattern in the Y direction. As shown in FIG. 8, the center marks and the side marks in the first and second overlay patterns are located such that, in the image in the layer of photoresist, the right sides of the first  12 , third  14 , and fifth  16  side marks are co-linear with the right sides of the seventh  42 , ninth  44 , and eleventh  46  side marks respectively and the left sides of the second  11 , fourth  13 , and sixth  15  side marks are co-linear with the left sides of the eighth  41 , tenth  43 , and twelfth  45  side marks respectively indicating perfect alignment in the X direction. As shown in FIG. 8, in the image in the layer of photoresist, the distance  70  between the top of the first center mark  10  and the top of the third center mark  32  is greater than the fifth distance  72 , indicating mis-alignment in the Y direction. This condition can readily be detected by visual observation. 
     FIG. 9 shows the image in the layer of photoresist of the first  56  and second  58  overlay patterns for the case of mis-alignment of the first circuit pattern relative to the second circuit pattern in both the X and Y directions. As shown in FIG. 9, in the image in the layer of photoresist, the right side of the second side mark  11  is co-linear with the right side of the eighth  41  side mark indicating a misalignment in the X direction equal to the sixth distance  30 . Also as shown in FIG. 9, in the image in the layer of photoresist, the distance  70  between the top of the first center mark  10  and the top of the third center mark  32  is greater than the fifth distance  72 , indicating mis-alignment in the Y direction. This condition can readily be detected by visual observation. 
     The orthogonal X and Y directions are shown in FIGS. 6-9. The examples described in this embodiment have three side marks to the right of the center marks and three side marks to the left of the center marks in both the first and second overlay patterns. Those skilled in the art will readily recognize that more or less than three side marks to the right of the center marks and more or less than three side marks to the left of the center marks can be used for the method of this invention. 
     While the invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the invention.