Abstract:
An LED driver described herein can determine whether it is operating in z soft-start process by comparing a first threshold value and a soft-start reference value. In the soft-start process, the inductor current and the LED driving current can be soft-started periodically to effectively avoid current overshoot. In addition, the end of the soft-tart operation can be controlled based on a comparison result of the first threshold value and the reference value of the soft-start, and without any external settings. Thus, the end of soft-start operation can automatically be determined with strong controllability.

Description:
RELATED APPLICATIONS  
       [0001]    This application claims the benefit of Chinese Patent Application No. 201210186820.5, filed on Jun. 6, 2012, which is incorporated herein by reference in its entirety. 
       FIELD OF THE INVENTION  
       [0002]    The present invention generally relates to an LED driver, and more particularly to an LED driver with a soft-start function. 
       BACKGROUND  
       [0003]    Traditional light-emitting diode (LED) drivers typically utilized a current control mode with relatively fast dynamic response and good regulation. However, LED driver circuits using this mode of operation may also need to use a soft-start circuit during an initial start up stage to control output voltage and inductor current to change relatively slowly. In this way, a relatively smooth start of the circuit can occur such that output voltage overshoot and surge current through the devices can be substantially prevented or minimized. 
       SUMMARY  
       [0004]    In one embodiment, a light-emitting diode (LED) driver, can include: (i) a soft-start control circuit, where when a first threshold value is less than a soft-start reference value, the LED driver is configured to operate in a soft-start process, where the soft-start reference value represents a desired output current of the LED driver, and where an inductor current of the LED driver is no greater than a second threshold value; (ii) where during a first time interval of the soft-start process, an LED driving current is configured to be maintained at a first current value, and an LED driving voltage rises in a slope-shape, where the first threshold value is maintained at a corresponding initial soft-start value of the first current value, and the second threshold value rises in a slope-shape; (iii) where during a second time interval of the soft-start process, the LED driving current is configured to rise in a slope-shape, and the LED driving voltage is configured to be maintained at an end state of the first time interval, where the first threshold value continues to rise in a slope-shape, and reaches a first final value at an end of the second time interval, and where the second threshold value is maintained at a second final value; and (iv) when the first threshold value is greater than the soft-start reference value, the LED driver is configured to operate in a normal operating state, and the LED driving current is substantially consistent with the desired output current. 
         [0005]    Embodiments of the present invention can advantageously provide several advantages over conventional approaches. For example, particular embodiments can provide an LED driver that can determine whether the LED driver is operating in a soft-start process by comparing a first threshold value and a soft-start reference value. During the soft-start procedure, an inductor current of the LED driver and the LED driving current can be soft-started to prevent overshoot. Other advantages of the present invention may become readily apparent from the detailed description of preferred embodiments below. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS  
         [0006]      FIG. 1  shows a voltage conversion circuit with a soft-start function. 
           [0007]      FIG. 2  shows a block diagram of a first example LED driver in accordance with embodiments of the present invention. 
           [0008]      FIG. 3  is an operating waveform diagram showing example first and second thresholds of  FIG. 2 . 
           [0009]      FIG. 4  shows a schematic diagram of a second example LED driver in accordance with embodiments of the present invention. 
           [0010]      FIG. 5  shows a schematic diagram of an example error amplifier of the LED driver of  FIG. 4 . 
           [0011]      FIG. 6  shows a schematic diagram of a third LED driver in accordance with embodiments of the present invention. 
           [0012]      FIG. 7  shows an example threshold value circuit of a LED driver in accordance with embodiments of the present invention. 
           [0013]      FIG. 8  is an operating waveform diagram showing an example operation of the threshold value circuit of  FIG. 7 . 
           [0014]      FIG. 9  shows another example of a threshold value circuit in an LED driver in accordance with embodiments of the present invention. 
           [0015]      FIG. 10  is an operating waveform diagram showing an example operation of the threshold value circuit of  FIG. 9 . 
       
    
    
     DETAILED DESCRIPTION  
       [0016]    Reference may now be made in detail to particular embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention may be described in conjunction with the preferred embodiments, it may be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents that may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set fourth in order to provide a thorough understanding of the present invention. However, it may be readily apparent to one skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, processes, components, structures, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present invention. 
         [0017]      FIG. 1  shows an example boost DC/DC converter and a logic control circuit. One example of such a structure can be found in Chinese patent application CN101841238A. During a start-up procedure, soft-start circuit  102  can generate a reference voltage for voltage feedback circuit  104  via a current source charging a capacitor. When detector circuit  106  (of logic control circuit  116 ) detects that an inductor current (e.g., via inductor current detect circuit  114 ) reaches a predetermined current, or a difference between a reference voltage generated by charging the capacitor and a feedback voltage generated by voltage feedback circuit  104  (e.g., via error amplifier circuit  112 ) reaches a predetermined voltage, a pulse-width modulated (PWM) signal of PWM circuit  108  can be dynamically adjusted by control circuit  110 , so that power switch S 1  of a main circuit can be turned off or on for at least one cycle. 
         [0018]    In this way, the inductor current can flow into the output. For example, the inductor current can decrease rapidly and begin to rise again from a relatively smaller value in the next cycle, so as to avoid inductor current overshoot. Also, after energy on the inductor is released via the output terminal, the output voltage may accelerate increasing to reduce a difference between the feedback voltage and the reference voltage. This can reduce the duty cycle of power switch S 1 , may slow the rise of the inductor current, and can&#39;t accelerate the rise of the output voltage. When the start-up procedure is over, the soft-start circuit can select a standard reference voltage as a reference voltage of voltage feedback circuit  104 . 
         [0019]    This particular example circuit can prevent the inductor current and output voltage from overshooting, but may still have some drawbacks. For example, during the soft-start procedure, since the power switch may be turned off or on for at least one cycle, there may be changes in the inductor current, and the circuit may be restarted. Also, while the end of the soft-start process may be controlled through an external start-up signal, the start-up ending may not be easy to control overall. 
         [0020]    In one embodiment, a light-emitting diode (LED) driver, can include: (i) a soft-start control circuit, where when a first threshold value is less than a soft-start reference value, the LED driver is configured to operate in a soft-start process, where the soft-start reference value represents a desired output current of the LED driver, and where an inductor current of the LED driver is no greater than a second threshold value; (ii) where during a first time interval of the soft-start process, an LED driving current is configured to be maintained at a first current value, and an LED driving voltage rises in a slope-shape, where the first threshold value is maintained at a corresponding initial soft-start value of the first current value, and the second threshold value rises in a slope-shape; (iii) where during a second time interval of the soft-start process, the LED driving current is configured to rise in a slope-shape, and the LED driving voltage is configured to be maintained at an end state of the first time interval, where the first threshold value continues to rise in a slope-shape, and reaches a first final value at an end of the second time interval, and where the second threshold value is maintained at a second final value; and (iv) when the first threshold value is greater than the soft-start reference value, the LED driver is configured to operate in a normal operating state, and the LED driving current is substantially consistent with the desired output current. 
         [0021]    Referring now to  FIG. 2 , shown is a schematic diagram of a first example LED driver in accordance with embodiments of the present invention. For example, the topology of a corresponding main circuit can be a boost circuit that can include inductor L, diode D, switch S M , and output capacitor C out . The LED driver for driving one of more LEDs  210  can also include error amplifier circuitry  206  and pulse-width modulation (PWM) control circuit  204 . Error amplifier  206  can compare LED current feedback signal FB against reference signal ref 1 , and an output signal thereby can charge a capacitor to obtain error signal V C . PWM control circuit  204  can receive error signal V C  and inductor current i L  of the LED driver (e.g., via inductor current detect circuit  202 ), and may accordingly output a PWM signal to control a duty cycle of power switch S M  in the main circuit. 
         [0022]    In order to prevent overshoot of inductor current i L  and the LED driving current, this particular example LED driver can include thresholds SST 1  and SST 2  (e.g., generated via threshold circuit  208 ), and a soft-start reference value. The soft-start reference value can characterize a desired output current of the LED driver. In this example, reference signal ref 1  may be configured as the soft-start reference value. For example, inductor current i L  can be no greater than threshold value SST 2 . Of course, more than two thresholds can also be generated by threshold circuit  208  in some cases. 
         [0023]      FIG. 3  is an operating waveform showing example thresholds SST 1  and SST 2 . For example, when threshold value SST 1  is less than the soft-start reference value, the LED driver may operate in a soft-start process, phase, mode, or state. In a first time interval (e.g., from time t 0  to time t 1 ) of the soft-start process, the LED driving current can be maintained at a first current value. For example, the first current value can correspond to and initial soft-start value V clmp  of threshold value SST 1 , and the LED driving voltage can rise in a slope-shape. Threshold value SST 1  can be maintained at initial soft-start value V clmp , and threshold value SST 2  can also rise in a slope-shape. 
         [0024]    During a second time interval (e.g., from time t 1  to time t 2 ) of the soft-start process, the LED driving current can continue to rise in a slope-shape, and the LED driving voltage can be maintained at an end state of the first time interval. Threshold value SST 1  can also continue to rise in a slope-shape, and may reach its final value at the end of the second time interval. Threshold value SST 2  can be maintained at its final value for the duration of the second time interval. When threshold value SST 1  is greater than the soft-start reference value, the LED driver circuit can be in a “normal” operating state, and the LED driving current can be substantially consistent with the desired output current reference. 
         [0025]    As can be seen from  FIG. 3 , during the first time interval, soft start for inductor current i L  can be carried out. Also, the output voltage at this stage may rise relatively slowly to avoid overshoot of the inductor current and the output voltage, and possible change of the LED current. During the second time interval, soft-start can be carried out for the LED driving current. Since the output voltage in the first time interval has reached a stable value, based on the voltage-current characteristic of the LED, when the LED driving current rises slowly, minor changes can be produced in the output voltage to avoid overshoot. 
         [0026]    In particular embodiments, during the process of soft-start, a phased soft-start can occur for the inductor current and the LED drive current. Thus, circuit output voltage, inductor current, and LED driving current overshoot can effectively be suppressed, and a continuous smooth start for the LED driver can be achieved. 
         [0027]    Referring now to  FIG. 4 , shown is a schematic diagram of a second example LED driver in accordance with embodiments of the present invention. For example, LED load  210  can be series-connected with resistor R to ground. An output at a common node of LED load  210  and resistor R can be configured as LED current feedback signal FB. Error amplifier (EA)  402  can amplify a relatively small error by comparing LED feedback signal FB and reference signal ref 1 , and/or by comparing LED feedback signal FB and threshold value SST 1 , to a provide an output current to charge capacitor C. 
         [0028]      FIG. 5  shows one example implementation of error amplifier  402 . In this particular example, error amplifier  402  can include current source I S1 , P-type MOS transistors MP 1 , MP 2 , and MP 3 , and current mirrors  502 ,  504 , and  506 . Reference signal ref 1  can be received by the gate of transistor MP 1 . Threshold value SST 1  can be received by the gate of transistor MP 2 , LED current feedback signal FB can be received by the gate of transistor MP 3 . Sources of transistors MP 1 , MP 2 , and MP 3  can connect together to receive the output current of current source I S1 , and drains of transistors MP 1  and MP 2  can connect together. 
         [0029]    Current mirrors  502  and  504  can each include two N-type MOS transistors, and current mirror  506  can include two P-type MOS transistors. When reference signal ref 1  is larger than threshold value SST 1 , the output current of current source I S1  may flow through transistor MP 2  rather than transistor MP 1 . From this, error amplifier  402  can convert the error between LED feedback signal FB and the lower value of reference signal ref 1  and threshold value SST 1  to the output current. When LED current feedback signal FB is larger than the lower value of reference signal ref 1  and threshold value SST 1 , current i 3  flowing through transistor MP 3  can be less than output current i 1  flowing through the connecting nude of drains of transistors MP 1  and MP 2 . 
         [0030]    Current i 1  can be mirrored through current mirror  502  to generate mirror current i′ 1 . Current i 3  can be mirrored through current mirror  504  to generate current i′ 3 , to further generate mirror current i″ 3  through the mirroring effect of current mirror  506 . The output of error amplifier  402  can be the difference between mirror currents i″ 3  and i′ 1 . When mirror current i″ 3  is less than mirror current i′ 1 , capacitor C can be discharged. When mirror current i″ 3  is greater than mirror current i′ 1 , capacitor C connected to the output of error amplifier  402  can be charged. 
         [0031]    Referring back to  FIG. 4 , error amplifier  402  can charge or discharge capacitor C to obtain error signal V C . Comparator  404  can compare error signal V C  and inductor current i L  (e.g., from inductor current detect circuit  202 ) to provide a signal to the reset terminal of RS flip-flop  406  to control turn-off of switch S M . The set terminal of RS flip-flop  406  can receive clock signal CLK to control turn-on of switch S M . Also, threshold value SST 2  can be used to clamp error signal V C . For example, diode D 1  can receive error signal V C  at its anode and threshold value SST 2  at its cathode. When error signal V C  is greater than threshold value SST 2 , diode D 1  can be turned on, and error signal V C  can be limited to threshold value SST 2 . 
         [0032]    In this particular example, the soft-start function of the LED driving current can be integrated into error amplifier  402 . By utilizing error amplifier  402  to effectively clamp LED current feedback signal FB, the LED driving current can rise slowly but may not to produce overshoot. Also, by utilizing diode D 1  to carry out a soft-start operation for error signal V C , the inductor current can also be assured to rise slowly and may not to produce overshoot. 
         [0033]    After transiting to the first final value at the end of the first time interval as shown in  FIG. 3 , threshold value SST 1  can be greater than reference voltage ref 1 , so the soft-start process can complete. When threshold value SST 2  is greater than error signal V C , diode D 1  can be turned off, which also completes its soft-start function. Thus in particular embodiments, the LED driver can end the soft-start operation automatically without external settings, and with strong controllability. Alternatively, a current source can be used to replace resistor R in series with LED load  210  to obtain LED current feedback signal FB. In addition, the main circuit of the LED driver can have a boost, buck, or any suitable topology. 
         [0034]    Referring now to  FIG. 6 , shown is a schematic diagram of a third example LED driver in accordance with embodiments of the present invention. This particular example LED driver can include error amplifier  602 , MOS transistor M 4 , resistor R 1 , and amplifier (AMP)  604 . LED load  210  can be series connected with MOS transistor M 4  and resistor R 1  to ground. The output at a common node of LED load  210  and MOS transistor M 4  can be configured as LED current feedback signal FB. 
         [0035]    For example, one implementation of amplifier  604  can be as shown in  FIG. 5 , except where the gate of P-type MOS transistor MP 1  can receive reference signal ref 2 , and reference signal ref 2  can be set as the initial soft-start value. Also, the gate of P-type MOS transistor MP 2  can receive threshold value SST 1 , and the lower value of reference signal ref 2  and threshold value SST 1  signal can be set as the setting signal. The gate of P-type MOS transistor MP 3  can receive the voltage drop as an input at the negative terminal of AMP  604 , where the voltage drop can be generated by current of MOS transistor M 4  flowing through resistor R 1 . The output signal of AMP  604  can adjust MOS transistor M 4  to control its negative input to track the lower value of reference signal ref 2  and threshold value SST 1 . 
         [0036]    As shown above in  FIG. 2 , an LED driver in particular embodiments can also include a threshold circuit  208  for generating the thresholds SST 1  and SST 2 . Referring now to  FIG. 7 , shown is one example threshold circuit in accordance with embodiments of the present invention. For example, threshold circuit  208  can include a ramp signal generating circuit used to generate a ramp signal to control operation of thresholds SST 1  and SST 2 . Threshold circuit  208  can also include a clamp circuit, where during the first time interval, threshold value SST 1  can be clamped at the initial soft-start value V clmp . During the second time interval, the threshold value SST 2  can be clamped at the second final value (see, e.g., value of SST 2  at the end of the second time interval in  FIG. 3 ). Also, at the end of the second time interval, threshold value SST 1  can be clamped to the first final value (see, e.g., value of SST 1  at the end of the second time interval in  FIG. 3 ). Also, a timing control circuit used to control operation timing of the ramp signal generating circuit and the clamp circuit. 
         [0037]    In the example of  FIG. 7 , the first final value and the second final value can be selected as chip supply voltage V DD , and initial start-up value V clmp  can be set as, e.g., ⅓ to ⅕ of the first final value according to practical requirements. The clamping circuit can include switch S 1 , switch S 2 , and diode D 2 . For example, switch S 1  can be connect between chip supply voltage V DD  and an output terminal of threshold value SST 1 , and switch S 2  can connect between chip supply voltage V DD  and an output terminal of threshold value SST 2 . 
         [0038]    The anode of diode D 2  can connect to the initial soft-start value V clmp , and the cathode of diode D 2  can connect to an output terminal of threshold value SST 1 . The ramp signal generating circuit can include ramp signal RMP 1  output at a common node of series-connected current source I S2  and capacitor C 1 , and can configured as threshold value SST 1 . Ramp signal RMP 2  output at a common node of series-connected current source I S3  and capacitor C 2  can be configured as threshold value SST 2 . 
         [0039]    The timing control circuit can include comparator  702 , comparator  704 , and switch S 3 . Switch S 3  can connect between the cathode of diode D 2  and ground. The inverting input terminal of comparator  704  can receive threshold value SST 1  and the non-inverting input terminal of comparator  704  can receive reference voltage REF 3 . The output OUT 2  of comparator  704  can control a switching operation of switch S 1 . The inverting input terminal of comparator  702  can receive threshold value SST 2  and the non-inverting input terminal can receive reference voltage REF 4 . The output OUT 1  can control switching operation of switches S 2  and S 3 . 
         [0040]      FIG. 8  is an example operation waveform diagram showing an example operation of the threshold circuit in  FIG. 7 . At the initial soft-start moment (e.g., time t 0 ), switches S 1  and S 2  are both off, and switch S 3  is on. Threshold value SST 1  can be clamped by diode D 2  at initial soft-start value V clmp , and current source I S3  can start charging capacitor C 2 . Threshold value SST 2  can follow the increasing ramp signal RMP 2  gradually until time t 1  (e.g., the end of the first time interval). Then, threshold value SST 2  can rise to a level of reference voltage REF 4 . Comparator  702  can output a low signal to control switch S 2  to turn on, and to control switch S 3  to turn off. 
         [0041]    Diode D 2  may stop clamping threshold value SST 1 , and current source I S2  can start charging capacitor C 1 . Threshold value SST 1  can follow the increasing ramp signal RMP 1  gradually, while threshold value SST 2  can be clamped to the second final value (e.g., the chip supply voltage V DD ) when switch S 2  turns on. At the end time of the second time interval (e.g., time t 2 ), first threshold value SST 1  can increase to reference voltage REF 3 , and comparator  704  can output a low signal to turn on switch S 1 . Then, threshold value SST 1  can be clamped to the first final value (e.g., the chip supply voltage V DD ). 
         [0042]    Though the threshold circuit in  FIG. 7  has a relatively simple structure, two capacitors used therein may occupy a relative larger chip area, resulting in possibly higher product costs. In order to solve this problem,  FIG. 9  shows another implementation of the threshold circuit. The difference between the implementations of  FIGS. 7 and 9  is that the ramp signal generating circuit may use only one capacitor in the implementation of  FIG. 9 . In the example of  FIG. 9 , the voltage at the common node of series-connected current source I S4  and capacitor C 3  may be configured as ramp signal RMP 3 . 
         [0043]    Correspondingly, the timing control circuit can include comparator  902 , flip-flops  904  and  910 , AND-gate  908 , delay circuit  906 , one-shot (OS) circuit  912 , and switches S 4  and S 5 . Switch S 4  can connect between an output of threshold value SST 1  and a common node of current source I S4  and capacitor C 3  via a diode. Switch S 5  can connect between a terminal of ramp signal RMP 3  and ground. The non-inverting input of comparator  902  can receive ramp signal RMP 3 , and the inverting input of comparator  902  can receive reference voltage reference REF 5 . The output of comparator  902  can connect to flip-flop  904 . When the output of comparator  902  is active, flip-flop  904  can keep switch S 2  on, while switch S 5  can also be turned on. The output of comparator  902  can be used as a clock signal CLK of flip-flop  904 . The D terminal of flip-flop  904  can connect to the chip supply voltage V DD , and the inverted output terminal of flip-flop  904  can connect to a control terminal of switch S 2 . 
         [0044]    The Q terminal of flip-flop  904  can output an “activated” signal. The activated signal can be input to AND-gate  908  and to control switch S 4  after being processed by delay circuit  906 . For example, the delay time of delay circuit  906  can be no less than a pulse width of output signal OUT 3  of comparator  902 . AND-gate  908  can also receive output signal OUT 3  from comparator  902 , and the output of AND-gate  908  can connect to flip-flop  910 . When the output signal of AND-gate  908  is active, flip-flop  910  can control the switch S 1  to be on. The output signal of AND-gate  908  can be clock signal CLK of flip-flop  910 , the D terminal of flip-flop  910  can connect to the chip supply voltage V DD , and the inverted output terminal of flip-flop  910  can connect to the control terminal of switch S 1 . 
         [0045]      FIG. 10  is an example operation waveform diagram showing an example operation of the threshold circuit of  FIG. 9 . At the initial start-up moment (e.g., time t 0 ), switches S 1 , S 2 , and S 5  are off, threshold value SST 1  can be clamped by diode D 2  at initial soft-start value V clmp , and current source I S4  can start charging capacitor C 3 . Threshold value SST 2  can follow the increasing ramp signal RMP 3  gradually until time t 1  (e.g., the end of the first time interval). Then, ramp signal RMP 3  can rise to a level of reference voltage REF 5 . Comparator  902  can output a high signal to control switch S 5  to turn on via one-shot circuit  912 . Thus, ramp signal RMP 3  can be pulled down, and the ramp signal generating circuit can be restarted. 
         [0046]    Also, the inverted output terminal of flip-flop  904  can output a low level as clock signal CLK becomes high, thereby controlling switch S 2  to turn on, and threshold value SST 2  can be clamped to the second final value (e.g., chip supply voltage V DD ). The Q terminal of flip-flop  904  can output a high level as the activated signal after a delay time determined by delay circuit  906 , to control switch S 4  to turn on, and threshold value SST 1  can follow slope signal RMP 3  to gradually increase. For example, the delay time of delay circuit  906  can be no less than a pulse width of the output signal of comparator  902 , in order to ensure that when output OUT 3  of comparator  902  is a low level, the signal provided to AND-gate  908  is a high level, and also to ensure that switch S 1  remains off, until the end of the second time interval (e.g., time t 2 ). Then, output OUT 3  of comparator  902  can turn to a high level again, the output of AND-gate  908  may also be a high level, thereby controlling the inverted output terminal of  910  flip-flop to output a low level signal to control switch S 1  to turn on. Then, threshold value SST 1  can be clamped to the first final value (e.g., the chip supply voltage V DD ). 
         [0047]    The foregoing descriptions of specific embodiments of the present invention have been presented through images and text for purpose of illustration and description of the start-up circuit and method. They are not intended to be exhaustive or to limit the invention to the precise forms disclosed, and obviously many modifications and variations are possible in light of the above teaching, such as the variable number of the current mirror and the alternatives of the type of the power switch for different applications. 
         [0048]    The embodiments were chosen and described in order to best explain the principles of the invention and its practical applications, to thereby enable others skilled in the art to best utilize the invention and various embodiments with modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.