Abstract:
A control circuit includes a controller that provides a master PWM signal indicative of a difference between a predetermined setpoint and a process signal. The control circuit also includes a PWM splitter circuit that receives the master PWM signal and provides a first PWM signal for a first switch and a second PWM signal for a second switch. The first PWM signal corresponds to a first portion of the master PWM signal and the second PWM signal corresponds to a second portion of the master PWM signal.

Description:
BACKGROUND OF THE INVENTION 
     This invention relates to control of pre-regulators in inverter-type power supplies and, more particularly, to a buck-boost controller in a pre-regulator of an inverter-type power supply. 
     In inverter-type power supplies, the input voltage is first rectified and then subjected to high frequency switching in an inverter section. The output of the inverter section is transformed to a desired voltage via a transformer and rectifier. The high frequency switching in the inverter section allows for increased efficiency and the volume and weight of the transformer can be considerably reduced. 
     Typically, it is desirable from a design standpoint to maintain the voltage at the input to the inverter section at a relatively constant voltage. Therefore, in order to operate the welder at a range of input voltages (e.g., 230 V to 575 V), a pre-regulator section may be added before the inverter section of the welding power supply. The pre-regulator is controlled such that the input voltage to the inverter section is maintained at a fixed voltage. 
     SUMMARY OF THE INVENTION 
     In an exemplary embodiment of the invention, a control circuit includes a controller that provides a master pulse-width-modulated signal indicative of a difference between a predetermined setpoint and a process feedback, and a PWM splitter to receive the master pulse-width-modulated signal and provide a first pulse-width-modulated signal to control a first switch and a second pulse-width-modulated signal to control a second switch. The first pulse-width-modulated signal corresponds to a first portion of the master pulse-width-modulated signal and the second pulse-width-modulated signal corresponds to a second portion of the master pulse-width-modulated signal. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The advantages, nature and various additional features of the invention will appear more fully upon consideration of the illustrative embodiment of the invention which is schematically set forth in the figures, in which: 
         FIG. 1  illustrates a block diagram of a power supply consistent with an exemplary embodiment of the present invention. 
         FIG. 2  illustrates an exemplary embodiment of the buck-boost circuit of the pre-regulator in the power supply shown in  FIG. 1 . 
         FIG. 3  is a block diagram of the exemplary buck-boost controller shown in  FIG. 2 . 
         FIG. 4  illustrates an exemplary PWM signal. 
         FIG. 5  is a circuit block diagram of the master PWM controller shown in  FIG. 3 . 
         FIG. 6  is a block diagram of the PWM splitter shown in  FIG. 3 . 
         FIG. 7  illustrates a three-stage power supply using a buck-boost controller that is consistent with the present invention. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     The present invention will be explained in further detail by making reference to the accompanying drawings, which do not limit the scope of the invention in any way. 
       FIG. 1  illustrates an exemplary embodiment of the present invention as applied to a three-phase power supply. However, exemplary embodiments of the present invention also include single-phase power supplies. Input terminals  5  receive a range of input voltages, e.g., from 115 volts rms to 575 volts rms. The input power signal is rectified by rectifier  10 , which, in this illustrative embodiment, comprises a diode-bridge. The rectified output is then sent to pre-regulator  20 . 
     Pre-regulator  20  is configured to provide a relatively constant pre-set voltage Vdc at the input of inverter  30  for the various input voltages. In this non-limiting exemplary embodiment, the output of the pre-regulator Vdc is set at 400 volts dc. A capacitor  25  may be used to store energy such that power flow to inverter  30  is un-interrupted as load varies. In the embodiment shown, the inverter  30  is a high-frequency switching circuit that converts the dc signal at its input to an ac signal. 
     The output of inverter  30  is converted by transformer  40  and output rectifier  50  to an appropriate voltage for the desired application. As an example,  FIG. 1  shows an application where the power supply is used as a dc welder. 
     As shown in  FIG. 2 , in an exemplary embodiment of the present invention the pre-regulator  20  may be configured as a buck-boost circuit. Pre-regulator  20  includes a buck switch  60 , a boost switch  62 , diodes  64  and  66  and an inductor  68 . The buck switch  60  and the boost switch  62  may be a solid-state switch such as, for example, an IGBT or a MOSFET, and these switches are controlled by buck-boost controller  100  in order to maintain the output of pre-regulator  20 , Vdc, at a desired setpoint. In a non-limiting embodiment, this setpoint for Vdc can be 400 volts dc. In other exemplary embodiments, the setpoint Vdc can be set higher or lower based on operational or desired parameters. 
     Buck-boost controller  100  receives an integrated signal Vcur-in representing the average input current to the welder from input current generator  300 . Because the input current to the welder pulsates when the pre-regulator  20  is operating in buck mode, the buck-boost controller  100  can experience instability due to sub-harmonic oscillations if the input current is used directly. To prevent this instability, an integrated signal Vcur-in representing the input current is generated by input current generator  300 . The input current generator  300  may use a related art configuration that uses a signal from the input current sensor  72  (shown with a dotted line). Preferably, the input current signal is synthesized using inductor current signal  76  prior to being integrated. Applicant&#39;s co-pending application filed on the same day as the present application and titled “Input Current Generating Scheme For Buck-Boost Controller” discloses an embodiment of input current generator  300  that synthesizes an input current signal using the inductor current and integrates the synthesized signal to generate the average input current to the welder. The entirety of Applicant&#39;s co-pending application, “Input Current Generating Scheme For Buck-Boost Controller,” is incorporated herein by reference. 
     Buck-boost controller  100  outputs a buck PWM signal  265  and a boost PWM signal  275  that are sent to buck switch  60  and boost switch  62 , respectively. These PWM signals, as the name implies, are pulse-width-modulated signals as illustrated in  FIG. 4 . A ratio of the ON time of these PWM signals to the period represents the duty-cycle of the PWM signal. A duty-cycle of 0% indicated that the PWM signal is OFF all the time, and duty-cycle of 100% indicates that the PWM signal is ON all the time. 
     As shown in  FIG. 3 , Buck-boost controller  100  comprises master PWM controller  110  and PWM-splitting circuit  120 . Master PWM controller  110  may be any standard, commercially available controller that provides a PWM signal. For example, in the illustrative exemplary embodiment, it is a boost-type power factor correction (PFC) controller. Master PWM controller  110  outputs a master PWM signal  115  that controls pre-regulator  20  such that its output voltage, Vdc, is at the desired setpoint. If controller  110  is also configured to perform PFC (as in the illustrative embodiment), then master PWM signal  115  will also control pre-regulator  20  such that the input current waveform matches the input voltage waveform. 
     To provide PFC control, master PWM controller  110  receives input voltage signal  70 , dc bus voltage signal  74  (i.e., Vdc) and Vcur-in as shown in  FIG. 5 . DC bus voltage signal  74  is sent to comparator  80  whose other input is a reference voltage corresponding to the desired setpoint. The output of comparator  80  is an error signal, Verr, corresponding to the deviation from setpoint of Vdc. The error signal, Verr, is one input (input A) to multiplier  82 . Multiplier  82  then modifies the error signal, Verr, using input voltage signal  70 . In the illustrative embodiment, multiplier  82  receives a sinusoidal reference signal (input B) and a feedforward signal (input C) based on the input voltage signal  70 , and outputs a modified error signal, MVerr, that is one input to current amplifier  84 . In the illustrative embodiment, the modified error signal, MVerr, equals A*B/C 2 . The other input to current amplifier  84  is Vcur-in. The current amplifier  84  acts as a standard amplifier and outputs a signal, ERR, that is proportional to the difference between the two inputs. The output of current amplifier  84  is compared to a “saw-tooth” wave signal from an oscillator by PWM comparator  86 . The output of PWM comparator  86  is master PWM signal  115 , which is a square wave whose duty-cycle is proportional to the output of current amplifier  84 . The operation of master PWM controller  110  is well known in the art and will not be discussed further. 
     Because the signal from master PWM controller  110  must be used to control both buck switch  60  and boost switch  62 , master PWM signal  115  must be split into two control ranges, one range for each switch. In an exemplary embodiment, the master PWM signal  115  range is split equally, i.e. one switch is operated from 0 to 50% duty-cycle on master PWM signal  115  and the second switch is operated from 50% to 100% duty cycle. In the illustrative, non-limiting embodiment, 0 to 50% duty-cycle on master PWM signal  115  is used to control buck switch  60  and 50 to 100% duty-cycle is used to control boost switch  62 . 
     However, in an embodiment, buck switch  60  and boost switch  62  will each receive a 0 to 100% PWM signal. In this embodiment, 0-50% on master PWM signal  115  must be converted to a 0 to 100% PWM signal for buck switch  60 . Similarly, 50 to 100% on master PWM signal  115  must be converted to a 0 to 100% PWM signal for boost switch  62 . To perform this conversion, master PWM controller  110  sends master PWM signal  115  to PWM splitter  120 . 
     As shown in  FIG. 6 , PWM splitter  120  includes algorithms that split master PWM signal  115  into buck PWM signal  265  and boost PWM signal  270 , which respectively control buck switch  60  and boost switch  62 . PWM splitter  120  includes a PWM-digital converter  200 , a PWM calculation module  220  and digital-PWM converters  260  and  270 . 
     PWM-digital converter  200  receives master PWM signal  115  and converts it into two digital values. One value (PERIOD) represents the period of PWM signal  115  and the other value (OFFTIME) represents the amount of time the PWM signal is at a value of zero. PWM-digital converter  200  comprises timer modules  205  and  210  to perform the conversion from a PWM signal to a digital value. 
     Timer module  210  inputs master PWM signal  115  and clock signal  215 . Timer module  210  measures the period of master PWM signal  115  by counting the number of pulses from clock signal  215  for one cycle of master PWM signal  115 , and the measured value is output as PERIOD. For example, timer module  210  may count the number of pulses from one rising edge of master PWM signal  115  to the next rising edge. The frequency of clock signal  115  is set much greater than that of the PWM signal  115  in order to provide an accurate value for PERIOD. 
     Similarly, timer module  205  inputs master PWM signal  115  and clock signal  215 . However, instead of counting the period, timer module  205  counts clock pulses during the time the PWM signal is at a value of zero for one period of the PWM signal. This digital value is output as OFFTIME. 
     OFFTIME and PERIOD are received by PWM-calc module  220 , which generates a digital control value (BUCK-DIG) for buck switch  60  and a digital control value (BOOST-DIG) for the boost switch  62 . Specifically, PWM-calc module  220  includes buck-calc module  221  and boost-calc module  222 . Buck-calc module  221  receives digital values PERIOD and OFFTIME and outputs digital control value BUCK-DIG using the following algorithm: 
     
       
         
               
               
             
           
               
                   
                   
               
             
             
               
                   
                 If OFFTIME &gt; (PERIOD / 2), 
               
               
                   
                   then BUCK-DIG = (PERIOD− OFFTIME) × 2, 
               
               
                   
                   else BUCK-DIG = PERIOD. 
               
               
                   
                   
               
             
          
         
       
     
     Boost-calc module  222  receives digital values PERIOD and OFFTIME and outputs digital control value BOOST-DIG using the following algorithm: 
     
       
         
               
               
             
           
               
                   
                   
               
             
             
               
                   
                 If OFFTIME &lt; (PERIOD / 2), 
               
               
                   
                   then BOOST-DIG = ((PERIOD / 2) − OFFTIME) × 2, 
               
               
                   
                   else BOOST-DIG = 0. 
               
               
                   
                   
               
             
          
         
       
     
     Digital-PWM module  260  receives the BUCK-DIG value, the PERIOD value and clock signal  215  and outputs buck PWM signal  265 . Similarly, digital-PWM module  270  receives the BOOST-DIG value, the PERIOD value and clock signal  215  and outputs boost PWM signal  275 . Buck PWM signal  265  and Boost PWM signal  275  respectively control buck switch  60  and boost switch  62 . 
     PWM splitter  120  discussed above may be implemented in a wide variety of digital devices, e.g., microcontrollers, programmable logic controllers, etc.). Accordingly, there is flexibility in choosing the device that is most economical. PWM splitter  120  can also be used with a wide variety of controllers that outputs a PWM signal, e.g., a buck-type PFC controller, a boost-type PFC controller, a simple buck controller, a simple boost controller, etc. Because the PWM signal splitting is implemented using algorithms in a digital controller, the inherent calibration errors of the prior art analog circuitry are not present. 
     The above exemplary embodiment is discussed using a two-stage power supply topology. However, consistent with the present invention, other power supply topologies may also be used. For example,  FIG. 7  shows a power supply  700  configured as a three-stage power supply. Stage I of power supply comprises a rectifier  710  and a pre-regulator  720 , which is a buck-boost type DC-DC converter. Pre-regulator  720  may optionally perform power factor correction. Stage II of power supply  700  is an isolated DC-DC converter  730  that converts the voltage on bus DC # 1  to a voltage appropriate for Stage III (DC # 2 ). The DC-DC converter  730  typically comprises an inverter, high-frequency transformer and rectifier circuit to perform the voltage conversion. Stage III may be a chopper circuit (chopper  740 ) that provides the appropriate waveforms used in welding. In  FIG. 7 , DC-DC converter  720  is controlled by a buck-boost controller  750  that uses input current generator  760 . The respective configurations of buck-boost controller  750  and input current generator  760  are consistent with the present invention as discussed above. 
     While the invention has been described in terms of various specific embodiments, those skilled in the art will recognize that the invention can be practiced with modification within the spirit and scope of the claims.