Abstract:
An equalizer in which an input signal is double differentiated without introducing phase shift. First and second differentiating circuits are provided at the input electrode and one of the output electrodes of a transistor. A further circuit is provided at the other transistor output electrode, the circuit having the same time constant as the time constant of the first differentiating circuit. Low pass filters and noise suppression may be included in embodiments particularly useful in video and audio recording and reproducing systems.

Description:
BACKGROUND OF THE INVENTION 
     The invention relates generally to equalizer circuits and more particularly to an equalizer providing double differentiation without introducing phase shift for all values of input frequency and equalization boost. 
     Equalizers for use in audio and video systems have been known variously as crispeners, aperture correctors, contour enhancers, shapers, and the like. Typically such circuits are employed to restore high frequency components to waveforms that have suffered loss or degradation of their high frequency information due to processing by bandwidth limited devices. For example, communications links and the record/playback process of magnetic tape and disc equipment often removes or suppresses the high frequency portions of the original signal. In terms of a reproduced television picture, loss of edge definition is the most apparent effect. Equalizers have therefore operated to modify the system degraded waveform in some manner in an attempt to bring it closer to its original form. 
     One well-known approach in equalizers restoring lost high frequency information is to combine with the main signal a supplemental signal having an amplitude related to the square of the signal frequency. For an input U i , the output is U o  = U i  (1 ± kω 2 ). Thus, for higher frequencies the output signal is boosted. 
     Such a correction is theoretically achievable by double differentiation. However, true double differentiation has heretofore been achieved only within narrow limits of input signal frequency. True differentiation is of the form 
     
         A(ω) = ωτ, 
    
     whereas the conventional differentiator circuit provides a transfer function of the form ##EQU1## This function approximates true differentiation only for small values of ωτ as seen in FIG. 1 which shows plots of A(ω) versus ωτ for true and conventional differentiation. 
     Double differentiation achieved by conventional differentiation circuits results in the function shown in FIG. 1. Beyond small values of ωτ, this function departs radically from the true double differentiation curve (ωτ) 2 . 
     Such conventional double differentiation techniques introduce significant phase shift, except at small values of ωτ. Many signal processing applications are extremely sensitive to phase shift, making such prior art techniques unacceptable. 
     SUMMARY OF THE INVENTION 
     In accordance with the teachings of the present invention, an equalizer is provided which introduces essentially no phase shift for all values of input signal frequency. 
     The heart of the invention is a single transistor stage having two differentiating circuits and a time constant compensating circuit. An output signal including the term kω 2  U i , where U i  is the input signal and k is an adjustable boost level, is achieved. 
     An output signal of the form U o  = U i  (1+kω 2 ) is provided by combining the high frequency boost signal with the input signal. 
     In one preferred embodiment a non-linear device for suppressing noise forms an integral part of one of the differentiating circuits. 
     Low pass filtering is optionally provided to shape the high frequency boost characteristic. 
     The inventive equalizer provides a symmetrical output for essentially any boost level and true double differentiation without phase shift for essentially any input frequency. 
     FIG. 2, for example, in (a) shows a square wave pulse that has suffered high frequency losses by a limited bandwidth process. In FIG. 2(b) the result of conventional differentiation on the pulse is seen. Conventional double differentiation produces the pulse shown in FIG. 2(c), having asymmetrical trailing and leading edges. FIG. 2(d), however, shows the pulse as processed by double differentiation without phase shift according to the present invention. The resulting waveform is essentially symmetrical. 
     These and other advantages and features of the invention will be further understood as the following description and drawings are read and understood. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1 is a series of curves showing conventional and actual single and double differentiation functions. 
     FIGS. 2(a) - 2(d) show the effect of conventional and actual single and double differentiation on a particular input waveform. 
     FIG. 3 is a functional block diagram of the general form of an equalizer according to the present invention. 
     FIG. 4 is a schematic diagram of one preferred embodiment of the invention including means for noise suppression. 
     FIG. 5 is a waveform useful in understanding the noise suppression effect of the circuit of FIG. 4. 
     FIG. 6 is a schematic diagram of another preferred embodiment of the invention including a low pass filter for rolling of the high frequency boost. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Referring now to the drawings and particularly to FIG. 3 which shows a functional generalized block diagram of an equalizer according to the present invention, an input signal U i  is applied to a block 2 providing the transfer function kω 2  and to a combiner 4. The output of block 2 is applied to an optional processing block 6 that provides non-linear processing and/or filtering. The two inputs to combiner 4 may be added or subtracted as desired, depending on the manner in which the input signal is to be modified. Alternately, the output signal U o  may be chosen to include only the output of blocks 2 or 6. 
     As will be understood from the following descriptions of the preferred embodiments, the functional block 2 comprises a single transistor stage having double differentiation and time constant compensation: a first differentiating circuit in the control electrode of the transistor; a second differentiating stage in one of the output electrodes; and a time constant compensation in the other of the output electrodes. Filtering and non-linear processing can be accomplished using some of the same circuit elements that provide the differentiation and time constant compensation. Also, the signal combining function can also be effectuated using some of the same circuit elements that provide differentiation or time constant compensation functions. 
     FIG. 4 shows a first preferred embodiment of the invention, having both non-linear processing and filtering in addition to the basic kω 2  transfer function. Although this embodiment is particularly adapted for use as a video signal crispener, the principles inherent in the embodiment are not so limited. 
     The input signal U i  is applied to a combiner 4 and to the base of an emitter follower input stage Q 1  which acts as a source of variable current to the parallel combination of L 1  and R 2  in response to the input voltage U i . The current from the collector develops a voltage across the parallel combination which can be adjustably fed to the base of Q 2  by adjusting the rider. The junction of L 1  R 2  opposite Q 1  is grounded. Inductor L 1  provides differentiation of the input signal and prevents any DC shift as R 2  is adjusted. Resistor R 1  is a load resistor connecting the emitter of Q 1  to the positive supply voltage. 
     The voltage U b2  at the base of amplifier Q 2  is ##EQU2## Thus, a first conventional differentiation of the input signal is provided at the control electrode or base of Q 2 . Amplifier stage Q 2  is the basic element of the equalizer which develops the kω 2  transfer function, as will be explained. 
     One of the Q 2  output electrodes, the emitter of Q 2 , is connected to the positive supply voltage through load resistor R 3 . Capacitor C 3  is connected between the junction of the Q 2  emitter and ground. R 3  and C 3  are effectively in parallel since the positive supply point is at AC ground. The parallel impedance of R 3  and C 3  is ##EQU3## R 3  and C 3  provide time constant compensation for the first differentiating circuit elements L 1  and R 2 . The values of the respective components are chosen to essentially provide the equality ##EQU4## 
     The collector circuit of Q 2  includes elements providing the second differentiation and providing filtering and non-linear processing. 
     The back-to-back diodes D 1  and D 2  provide non-linear processing. In this case, noise suppression is achieved because the diodes suppress the mid-portion of the waveform between plus and minus their reverse bias voltage ±v bc . This amplitude portion of the signal generally contains all of the noise as shown in FIG. 5. Thus, the noise is not boosted by the kω 2  function. 
     The arrangement of parallel inductor-resistor pairs on either side of diodes D 1  -D 2  assures that no bias is applied to the diodes. 
     The first inductor-resistor pair R 4  L 2  is connected between one of the output electrodes, the collector, of Q 2  and ground. The other pair L 3  R 5  is connected between the junction of D 1  -D 2  distant from the collector of Q 2  and ground. The former junction is further connected to the base of an output emitter follower Q 3  that has its collector connected to the positive supply and its emitter providing the output and connected to the negative supply through load resistor R 6 . 
     Inductors L 2  and L 3  provide the second differentiation. Preferably L 2  is smaller than L 3  so that the noise is boosted less prior to suppression by the diodes. Resistors R 4  and R 5  function to provide high frequency roll off of the boosted signal. 
     The voltage at the collector of Q 2  is ##EQU5## where Z c  and Z e  are the collector and emitter impedances, respectively. Or, ##EQU6## Thus, the output of the Q 2  stage is of the form 
     
         U.sub.c2 = αω.sup.2 U.sub.i. 
    
     The output of Q 3  is applied along with the input signal U i  to a combiner 4 to provide the output signal of the form 
     
         U.sub.o = (1 ± kω.sup.2)U.sub.i 
    
     Non-linear processing may also be provided by means other than back-to-back diodes D1-D2. For example, adjustable positions and negative threshold detectors can be used to adjustably remove the smaller amplitude signals. Such detectors, which are well-known in the art and which typically are active devices, can be located between the output of the Q 3  stage and combiner 4. In the event such threshold detectors are used, the diodes D1 and D2 are omitted and L 2  and L 3  and R 4  and R 5  are respectively combined. 
     FIG. 6 shows an alternative preferred embodiment, optionally having a low pass filter to roll off high frequency components to the extent desired by selecting the filter 3db point. Due to the judicious manner in which the components are configured no external combiner is required. Although this embodiment is particularly adapted for use as an audio signal crispener, the principles inherent in the embodiment are not so limited. 
     The input signal U i  is applied to an emitter follower Q 1  that acts as a source of variable current to develop a voltage across potentiometer R 2  that is responsive to the input signal. R 1  in series with R 2  acts as a load resistor along with R 2  and the far end of R 2  is connected to ground. 
     An RC differentiator circuit is connected between the rider of R 2  and the control electrode or base of Q 2  : capacitor C is in series between the rider and the base and resistor R is between the base and ground. The voltage at the base of the emitter follower Q 2  is ##EQU7## Thus, a first conventional differentiation of the input signal is provided to the base of Q 2 . Emitter follower amplifier stage Q 2  is the basic element of the equalizer which develop the kω 2  transfer function. 
     A second differentiation is provided by inductor L between one of the output electrodes, the collector of Q 2  and the emitter of Q 1 . Input signal U i  is also present at the collector of Q 2  because being a current source there is essentially no voltage drop in L. Thus the collector junction of Q 2  is a combining node of the input signal U i  and the boosted signal kω 2  U i . 
     Parallel resistor-capacitor R e  C e  between the other output electrode, the emitter of Q 2  and ground provide the time constant compensation for the RC differentiator. The values of the respective components are chosen to essentially provide the equality 
     
         RC = R.sub.e C.sub.e. 
    
     The voltage at the collector of Q 2  is thus (ignoring R c  and C c ): ##EQU8## 
     
         U.sub.c2 = U.sub.i (1+kω.sup.2 LC.sub.e) 
    
     Thus, the output of the Q 2  stage is of the form 
     
         U.sub.c2 = U.sub.i (1+αω.sup.2) 
    
     If desired, the elements R c  and C c  may be added to provide controllable low pass filtering. The elements L, C c  and R c  function as a Bessel or maximally flat filter in accordance with conventional filter theory. R c  acts as a termination for the filter. 
     The collector of Q 2  is connected to the base of an output emitter follower stage Q 3  which has its collector grounded and its output taken at the emitter. A load resistor connects the emitter to the positive supply. 
     Threshold detectors such as described in connection with FIG. 4 may also be used at the output of Q 3  of FIG. 6. 
     In both preferred embodiments the degree of ω 2  boosting is controlled by adjusting the potentiometer R 2 , thus changing the k-factor in the output transfer function. By selecting k and the 3db point of low pass filters, if used, the equalization shaping can be varied over a wide range as may be required for particular applications. 
     Various modifications of the preferred embodiments will be apparent to those of ordinary skill in the art. The invention is therefore to be limited only by the scope of the appended claims.