Abstract:
The present invention is to provide an optical receiver by which the avalanche photodiode (APD) can be protected from the self-breakdown when the signal light with excess power enters therein. The APD is biased by the DC/DC converter via the control circuit including a resistor and a variable current source connected in series to the resistor and in parallel to the APD. The resistor drops the bias voltage to the APD by the current provided from the variable current source. The controller adjusts the amount of the current flowing in the variable current source not to exceed the absolute maximum current for the APD. Accordingly, the multiplication factor of the APD is appropriately adjusted.

Description:
BACKGROUND OF THE INVENTION 
   1. Field of the Invention 
   The present invention relates to an optical receiver, in particular, relates to an optical receiver for the avalanche photodiode. 
   2. Related Prior Art 
   Optical communication often uses an avalanche photodiode (hereinafter denoted as APD) for a light-receiving device because the an APD has an intrinsic characteristic to multiply photo carriers and to output a photocurrent relatively larger than that of a PIN photodiode. Japanese Patent Application published as 2004-040239 has disclosed a method for controlling the photocurrent generated in the APD by controlling a bias voltage applied to the APD. 
   On the other hand, it is necessary that, when the optical communication system equips a fiber amplifier, an excess optical input power, such as over 0 dBm, enters the APD due to an optical surge or an operational miss handling. Receiving such excess optical power at the optical receiver, the APD generates excess carriers, which is equivalent to the excess photocurrent, and may be broken itself by this photocurrent. 
   SUMMARY OF THE INVENTION 
   Therefore, an object of the present invention is to provide an optical receiver, in which the APD installed therein can be protected from the self-breakdown with a simple configuration even when the light with excess power enters therein. 
   One aspect of the present invention relates to an optical receiver that receives an optical signal and outputs an electrical signal corresponding to the optical signal. The optical receiver comprises an avalanche photodiode (APD), an adjusting circuit, and a controller. The APD converts the optical signal into a photocurrent depending on a bias voltage applied thereto in a temperature. The adjusting circuit outputs the bias voltage by adjusting the DC voltage input thereto in accordance with a control signal. The adjusting circuit includes a resistor and a variable current source. The resistor is inserted between the APD and the DC voltage, and the variable current source is connected in serial to the resistor and in parallel to the APD. The variable current source outputs a control current to the resistor. Thus, the bias voltage may be lowered by the product of the resistor and the control current with respect to the DC voltage. The controller outputs the control signal to the adjusting circuit. The control signal depends on the photocurrent, the bias voltage, and the temperature. 
   The optical receiver of the invention may further comprise a current monitor, a voltage monitor, and a temperature monitor for monitoring the photocurrent, the bias voltage and the temperature of the APD, and for outputting a current monitored signal, a voltage monitored signal, and a temperature monitored signal to the controller, respectively. The controller may output the control signal in accordance with each current monitored signal, the voltage monitored signal and the temperature monitored signal. 
   The optical receiver of the invention may further include a processing unit, a memory, and a D/A converter in the controller. The memory may include a look-up-table that holds a relation of the control current against the photocurrent, the bias voltage, and the temperature. 
   Another aspect of the invention relates to a method for controlling a photocurrent output from an avalanche photodiode (APD) under a condition that a bias voltage is applied from a DC source through a resistor. The resistor, in addition to the photocurrent, leads a bypass current therethrough. The bypass current, which does not flow in the APD, is adjusted by the controller. The method comprises steps of (a) obtaining the photocurrent by a current monitor and adjusting the bypass current until the photocurrent becomes smaller than a maximum limit; (b) obtaining the bias voltage by the voltage monitor and adjusting the bypass current until the bias voltage becomes greater than a minimum voltage; (c) obtaining the bias voltage by the voltage monitor and adjusting the bypass current until the bias voltage becomes smaller than a maximum voltage; and (d) obtaining the photocurrent by the temperature monitor and adjusting the bypass current until the photocurrent becomes substantially equal to a reference current. 
   The APD is thus controlled in its photocurrent and the bias voltage applied thereto, the APD may be not only prevented from breaking by the photocurrent generated by itself but also show a frequency bandwidth enough for transmitting a high frequency optical signal over 10 Gbps. 
   The method of the present invention may further include, before the step for obtaining the photocurrent, a step for obtaining a latest temperature of the APD, and the maximum limit may reflect this latest temperature. The method of the present invention may further include, before the step for obtaining the bias voltage, a step for obtaining a latest temperature of the APD, and the minimum voltage or the maximum voltage may reflect this latest temperature. The method of the present invention may further include, before the step for obtaining the photocurrent at aforementioned step (d), a step for obtaining a latest temperature of the APD, and the reference current may reflect this latest temperature. Otherwise, the method may include, before the step for obtaining the photocurrent, a step for obtaining a latest temperature of the APD, and the maximum limit, the minimum and maximum voltages, and the reference current may reflect this latest temperature. 
   The reflection of the latest temperature may be carried out such that, a plurality of groups including the maximum limit of the photocurrent, the minimum and maximum voltage of the bias voltage, and the reference current is stored in a memory look-up-table combined with a temperature in advance to the process. In accordance with the latest temperature, the maximum limit, the minimum and maximum voltages, and the reference current are calculated by the interpolation/extrapolation of the plurality of grouped parameters. 
   Otherwise, the reflection of the latest temperature may be carrier out such that, a plurality of groups including the maximum limit of the photocurrent, the minimum and maximum voltages of the bias voltage, and the reference current is stored in a memory look-up-table combined with a temperature in advance to the process. Subsequently to the obtaining of the latest temperature, one group combined with the temperature nearest to the latest temperature may be selected from the memory look-up-table. 

   
     BRIEF DESCRIPTION OF DRAWINGS 
       FIG. 1  is a block diagram of the optical receiver according to the present invention; 
       FIG. 2  is a schematic view of the storage; 
       FIG. 3  is a schematic view showing the LUT (Look-Up-Table) of the invention; 
       FIG. 4  is a flow chart for adjusting the control current; 
       FIG. 5  shows a relation between the optical input level to the control current; 
       FIG. 6  shows a relation between the optical input level to the reverse bias voltage; 
       FIG. 7  shows a relation between the optical input level to the multiplication factor of the avalanche photodiode; and 
       FIG. 8  shows a relation between the optical input level to the current flowing in the avalanche photodiode. 
   

   DESCRIPTION OF PREFERRED EMBODIMENTS 
   Next, embodiments of the present invention will be described as referring to accompanying drawings. In the description, the same symbols or numerals will refer the same elements in drawings and description without overlapping explanation. 
     FIG. 1  is a block diagram of an optical receiver according to the present invention. The optical receiver  10  comprises a DC/DC converter  12 , a resistor  14 , a variable current source  16 , a photodiode module  18 , an amplifier  20 , and a controller  22 . These blocks will be described successively. 
   The DC/DC converter  12  is a power supply, by receiving DC voltage V0 from the outside, to output a DC voltage V1 in the output terminal  12   a  thereof by transforming the input voltage V0. The output voltage V1 is supplied to an avalanche photodiode  24 , which is denoted as APD hereinafter, in the photodiode module  18  to operate the APD in a reverse bias condition. A bias pass  15  connects the output terminal  12   a  to the cathode electrode of the APD  24 . 
   The resistor  14  and the variable current source  16  constitute a bias adjusting circuit  60 , which adjusts the reverse bias voltage supplied to the APD  24  via the bias pass  15 . One terminal of the resistor  14  connects to the output terminal  12   a  of the DC/DC converter  12 , while the other terminal thereof connects to the variable current source  16  via the node  42  on the bias pass  15 . The resistor  14  causes a voltage drop depending on a current flowing therethrough. This voltage drop may adjust the reverse bias voltage to the APD. The variable current source  16  controls the current flowing in the resistor  14 . Thus, the resistor  14  yields the voltage drop between terminals thereof depending on the control current I C  determined by the variable current source  16 . As described later in this specification, a control signal V C  sent to the variable current source  16  from the controller  22  determines the magnitude of the control current I C . 
   The photodiode module  18  builds in the APD  24  and a temperature sensor  26 . The DC/DC converter generates the output V 1  and the reverse bias voltage V A  is supplied to the APD  24  after adjusted by the bias adjusting circuit  60  to drive the APD  24 . The APD  24  receives an optical signal O IN  output from the optical waveguide  44  to generate a photocurrent I A , which alternates depending on the optical signal O IN . The temperature sensor  26 , which may be a thermistor, is arranged neighbor to the APD  24  to monitor a temperature of peripheral regions of the APD  24 . The temperature sensor  26  output a monitoring signal S T  to send it to the controller  22 . 
   The anode electrode of the APD  24  connects the amplifier  20 . In the present embodiment, the amplifier includes a trans-impedance amplifier  30  with a feedback resistor  32 . This trans-impedance amplifier  30  converts the photocurrent I A  generated by the APD  24  into a voltage signal E out  with an optimized conversion factor. When the optical signal O IN  is modulated, the optical receiver  10 , responding to this modulated optical signal O IN , outputs the electrical signal E OUT  including the transmitted data  46  and the clock synchronized to the data. 
   The amplifier  20  is not restricted to the trans-impedance amplifier  30 . One modification of the amplifier  20  may include a load resistor connected to the anode electrode of the APD  24  and a voltage amplifier that amplifies a voltage generated between terminals of this load resistor. 
   Between the node  42  and the cathode electrode of the APD  24  on the bias line  15  is inserted with a current monitor  27  that monitors the photocurrent I A  generated by the APD  24 . The current monitor  27  converts the photocurrent I A  into a corresponding voltage signal S I  to send it to the controller  22 . Japanese Patent Application published as 2004-040239, which has the same inventor with the present application, has disclosed a substantial example of the current monitor  27  that includes a current mirror circuit and a load resistor. 
   The controller  22 , as explained later in this specification, controls the voltage drop at the resistor  14  by adjusting the control current I C  output from the variable current source  16 . This voltage drop at the resistor reflects in the reverse bias voltage supplied to the APD  24 , and affects the multiplication factor thereof Accordingly, to adjust the control current I C  reflects in the characteristic of the APD  24 . The controller  22  comprises a CPU  34 , a memory  36 , an A/D converter  38 , and a D/A converter  40 . The memory  36  holds a program and a data for the CP  34  to control the bias voltage V A  to the APD  24 . The controller  22  operates by supplying the power V D  thereto from the outside of the receiver  10 . The CPU  34  first executes the program stored in the memory  36  to adjust the reverse bias voltage V A  for the APD  24 . The A/D converter  38  converts the monitored signal S T  for a temperature, the monitored signal S I  for the photocurrent, and the monitored signal S V  for the reverse bias voltage into corresponding digital values, and sends them to the CPU  34 . The D/A converter  40  converts the digital control signal generated by the CPU  34  into the corresponding analog signal V C , and sends it to the variable current source  16 . Thus, the control current I C  generated by the current source  16  varies in accordance with this analog signal V C . 
     FIG. 2  is a schematic diagram, i.e., the architecture, of the memory  36 , which comprises a Read-Only-Memory (ROM)  36   a  and a Random-Access-Memory (RAM)  36   b.  The ROM  36   a  stores a program  50  for control the APD  24  and a look-up-table (LUT)  52  used in this controlling, but the ROM  36   a  may keep other parameters and programs. The RAM  36   b  is the primary storage for the CPU  34  to execute the program  50 . Turning on the optical receiver  10 , the CPU  34  transfers the program stored in the ROM  36   a  into the RAM  36   b  and executes thus transferred program  50 . During the execution, the CPU  34  stores the signals, T A , I A , and V A , monitored by the temperature monitor  26 , the current monitor  27 , and the voltage monitor  28 , respectively, into the RAM  36   b.  These data are converted by respective signals S T , S I , and S V , into corresponding digital values by the A/D converted  38 . 
     FIG. 3  shows a schematic architecture of the LUT  52 . The LUT  52  stores a combination of the maximum control current I CMAX , the minimum voltage V MIN , the maximum voltage V MAX , and the reference current I REF  for various reference temperatures. The controller  22  controls the APD  24  in accordance with this LUT  52 . The present embodiment sets three reference temperatures, T 1 =0 C, T 2 =25 C, and T 3 =50 C. In  FIG. 3 , respective parameters, I CMAX , V MIN , V MAX , and I REF  add a numeral subscript corresponding to the temperature. The maximum control current I CMAX  means the current admitted to flow in the APD  24  when the APD  24  is put in its characteristic temperature. The maximum and the minimum voltage, V MAX  and V IMN , denote the maximum and minimum bias voltage V A  admitted to supply to the APD  24  when the APD  24  is put in its characteristic temperature. The reference current I ref  denotes the standard current to be flow in the APD  24  when the APD  24  is put in its characteristic temperature. 
   Referring to  FIG. 1  again, since the control current I C  together with the photocurrent I A  flows in the resistor  14 , the voltage drop            V due to this current becomes:
 
           V= ( I   A   +I   C )* R.   (1)
 
Thus, the voltage drop varies with the control current I C . The bias voltage V A  applied to the APD  24  becomes the output V 1  of the DC/DC converter  12  subtracted by this voltage drop          V:
 
 V   A   =V   1   −             V.   (2)
 
Thus, the bias voltage V A  varies with the voltage drop          V by the resistor. Accordingly, the controller  22  can adjust the bias voltage V A  applied to the APD  24  through the control signal V C . The photocurrent I A  flowing in the APD  24  increases as the multiplication factor increases, and the multiplication factor increases as the bias voltage V A  to the APD increases. Thus, to control the control current I C  results on the controlling of the photocurrent I A .

   A high frequency performance and a low noise characteristic may be compatible in the APD  24  to adjust the multiplication factor thereof via the applied bias voltage depending on average optical input power O IN , which is equivalent to the optical input level. For instance, it may be realizable to get both the wide bandwidth over 7 GHz and the high sensitivity to acquiring a smaller optical level by a superior low noise characteristic, which enables the optical receiver to be used in the high-speed optical communication at 10 Gbps with the acceptable error rate at quite low input level below −24 dBm. On the other hand, when the optical input level is high, to adjust the multiplication factor of the APD  24  through the bias voltage thereto may suppress the excess current flowing in the APD  24 . The controller  22  may execute such control mentioned above through adjusting the control current I C . 
   Next, the sequence for controlling the control current I C  will be described as referring to  FIGS. 4 to 8 .  FIG. 4  is a flow chart showing the control sequence of the control current I C . From  FIG. 5  to  FIG. 8  illustrate relations of the control current I C , the bias voltage V A , the multiplication factor M, and the photocurrent I A  to the optical input level, respectively.  FIG. 5  also shows the temperature dependence of the control current I C , denoted as  151 ,  152  and  153  in the figure, that is, the control current I C  when the temperatures T A  of the APD  24  is set to T 1 , T 2 , and T 3 . Similarly,  FIG. 6  includes the temperature dependence of the bias voltage V A ,  161 ,  162 , and  163 , when the temperature of the T A  is at T 1 , T 2 , and T 3 , respectively. But  FIG. 7  and  FIG. 8  show characteristics of the multiplication factor M and the photocurrent I A  at only one temperature. 
   As shown in  FIG. 9 , the sequence for controlling the control current I C  starts by turning on the power for the optical receiver  10  (at the step S 402 ). Turing on the optical receiver  10 , the controller  22  is supplied with the power V D  to start thereof. In the same time, the DC/DC-converter  12  is input with V 0 . 
   First, the controller operates the control current I C  such that an excess bias voltage is never supplied to the APD  24  at the step S 404 . The CPU  34  determines the maximum control current I CMAX  at the maximum operating temperature T MAX , for instance 50 C, and adjusts the control signal V C  such that the variable current source  16  generates this maximum control current I CMAX . The LUT  52  is preferable to hold the maximum control current I CMAX  at the upper limit temperature T MAX  in advance to the operation. In such case, the CPU  34  only fetches these parameters from the LUT  52  to execute the following steps. Without the LUT  52  storing these parameters therein, the CPU  34  may calculate the maximum control current I CMAX  at the upper limit temperature from the parameter at the other temperatures held in the LUT  52 . Adjusting the control signal V C  and generating the maximum control current I CMAX  at the upper limit temperature T MAX , a large voltage drop operates in the output V 1  of the DC/DC converter  12 , which enough drops the bias voltage supplied to the APD  24 . Consequently, the APD  24  is prevented from the excess bias voltage just after the turning on the power. 
   Next, the controller  22  receives the monitoring signal S T  from the temperature sensor  26 , which denotes the temperature T A  of the APD  24 , converts it to the corresponding digital parameter, and stores thus converted parameter into the parameter storing region  54  in the RAM  36   b  at the step S 406 . This parameter corresponds to the latest temperature of the APD  24 . Subsequently, the CPU  34  determines the maximum control current I CMAX  at the temperature T A , and adjusts the control signal V C  for the variable current source  16  to generate this maximum control current I CMAX  at the step S 408 . The determination of the I CMAX  at the temperature T A  may be carried by the interpolation or the extrapolation using a portion or all of the maximum control currents I CMAX1  to I CMAX3  and corresponding temperatures thereto, all of which are held in the LUT  52  and by using the latest temperature T A  of the APD  24 . Generating the maximum control current I CMAX  at the latest temperature T A  of the APD by the control signal V C , the bias voltage V A  supplied to the APD is set to the lowest value. Thus, the multiplication factor M of the APD  24  is adjusted in accordance with the latest temperature T A  thereof. 
   Subsequently, the CPU  34  receives the monitored signal S I  and S V  from the current monitor  27  and the voltage monitor  28 , respectively, converts these data into corresponding digital data of the photocurrent I A  and the bias voltage V A , and stores these parameters into the parameter storing region  54  in the RAM  36   b,  at the step S 410 . The CPU  34  continues the controlling of the APD  24  through the control current I C  using thus received photocurrent I A  and the bias voltage V A  shown as in  FIGS. 5 to 8 . Next, the sequence of the control will be described. 
   First, the CPU  34  compares the photocurrent I A  with the maximum photocurrent I AMAX  at the step S 412 . The maximum photocurrent I AMAX  may be included in the ROM  36   a  or the program may include it. The maximum photocurrent I AMAX  is determined from the viewpoint of the protection of the APD  24 . Generally, the maximum photocurrent I AMAX  is set to be not exceeding the absolute maximum current of the APD  24 , more preferably, smaller than a half of the absolute current. 
   When the CPU  34  decides that the photocurrent I A  exceeds the maximum photocurrent I AMAX , which condition is denoted as “NO” in the figure, the CPU  34  increases the control current IC to decrease the photocurrent I A  so as to be less than the maximum photocurrent I AMAX  at the S 414 . The CPU  34  may increase the control current by a predetermined magnitude, or may change the control current to the value (V 1 −V A )/R−I AMAX . Subsequently, the CPU  34  gets the photocurrent I A  and the bias voltage V A  through the current monitor  27  and the voltage monitor  28 , and compares the photocurrent with the maximum photocurrent I AMAX  at the step S 412 . Thus, the sequence from the step S 410  to the step S 414  is iterated until the photocurrent I A  becomes less than the maximum photocurrent I AMAX . 
   When the CPU  34  decides that the photocurrent I A  is less than the maximum photocurrent I AMAX  at the step S 412 , which is denoted as “YES” in  FIG. 4 , the CPU  34  compares the bias voltage V A  with the minimum voltage V MIN  at the latest temperature T A  of the APD  24 , at the step S 416 . In precise, the CPU  34  gets the monitored signal S T  from the temperature sensor  26 , and revises the parameter for the latest temperature held in the RAM  36   b.  The CPU  34  calculates the minimum voltage V MIN1  at the latest temperature T A  by the interpolation or the extrapolation using a portion or all of the minimum voltages, V MIN1  to V MIN3 , and corresponding temperatures thereto, all of which are held in the LUT  52 . The CPU  34  compares the bias voltage V A  with thus calculated minimum voltage V MIN . 
   When the CPU  34  decides that the bias voltage V A  is less than the minimum voltage V MIN  at the latest temperature T A , which corresponds to “NO” in  FIG. 4 , the CPU  34  decreases the control current I C  and increases the bias voltage V A  for the APD  24  to close to the minimum voltage V MIN . The CPU  34  may increase the control current I C  by a predetermined amount, or may change the control current to a value, (V 1 −V MIN )/R−I A . Subsequently, the CPU  34  gets the photocurrent I A  and the bias voltage V A  again at the step S 410 , and carries out the process after the step S 412 . Thus, the processes after the step S 410  is to be iterated until the photocurrent I A  becomes smaller than the maximum photocurrent I AMAX , and, at the same time, the bias voltage V A  becomes greater than the minimum voltage V MIN . 
   When the CPU  34  decides that the bias voltage is greater than the minimum voltage at the latest temperature T A , which corresponds to “YES” at the step S 416  in  FIG. 4 , the CPU  34  compares the bias voltage V A  with the maximum voltage V MAX  at the latest temperature T A , at the step S 418 . In precise, the CPU  34  gets the monitored signal S T  from the temperature sensor  26 , and rewrites the latest temperature T A  of the APD  24  set in the RAM  36   b.  The CPU  34  calculates the maximum voltage at the latest temperature T A  by the interpolation and the extrapolation using a portion or all of the maximum voltages, V MAX1  to V MAX3 , and corresponding temperatures thereto, which are held in the LUT  52 , and the latest temperature. The CPU  34  compares the bias voltage V A  with thus calculated maximum voltage V MAX . 
   When the CPU  34  decides that the bias voltage V A  exceeds the maximum voltage V MAX , which corresponds to “NO” at the step S 420  in  FIG. 4 , the CPU  34  increases the control current I C  to decrease the bias voltage V A  at the step S 422 . The CPU  34  may increase the control current I C  by a predetermined amount, or may change the control current I C  to a value, (V 1 −V MAX )/R−I A . Subsequently, the CPU  34  gets the photocurrent I A  and the bias voltage V A  again at the step S 410 , and carries out the process after the step S 412 . Thus, the processes after the step S 412  are to be iterated until the photocurrent I A  becomes smaller than the maximum photocurrent I AMAX , and, at the same time, the bias voltage V A  becomes greater than the minimum voltage V MIN . 
   When the CPU  34  decides that the bias voltage V A  is less than the minimum voltage V MAX  at the latest temperature T A , which corresponds to “YES” at the step S 420  in  FIG. 4 , the CPU  34  controls the control current I C  for the photocurrent I A  to close to the reference current I REF . In precise, the CPU  34  gets the monitored signal S T  from the temperature sensor  26 , and rewrites the latest temperature T A  of the APD  24  set in the RAM  36   b.  The CPU  34  calculates the reference current I REF  at the latest temperature T A  by the interpolation and the extrapolation using a portion or all of the reference currents, I REF1  to I REF3 , and corresponding temperatures thereto, which are held in the LUT  52 , and the latest temperature T A . The CPU  34  compares the photocurrent I A  with thus calculated reference current I REF  and adjusts the control current IC based on the comparison. For, instance, the CPU  34  increases the control current IC when the photocurrent I A  exceeds the reference current I REF , I A &gt;I REF , decreases the control current I C  in the case of I A &lt;I REF , and maintains the present status when I A =I REF . 
   Subsequently, the control sequence returns the step S 410 . Thus, the controller  22  adjusts the photocurrent I A  of the APD  24  below the maximum photocurrent I AMAX , and the bias voltage V A  over the minimum voltage V MIN  and below the maximum voltage V MAX , and the photo, thereafter the photocurrent I A  be equal to the reference current I REF . 
   Next, the sequence to adjust the control current IC will be further precisely explained as referring to  FIGS. 5 to 8 . These drawings divide the optical input level into four regions, A to D. As explained, the controller  22  adjusts the control current I C  depending on the photocurrent I A . The photocurrent I A  depends on the optical input level, consequently, the control current I C  is adjusted depending on the optical input level. In regions from A to C, where the photocurrent I A  is below the maximum photocurrent I MAX , the control current I C  is adjusted to convert the optical input signal O IN  into corresponding electrical output E OUT  with an acceptable conversion error. The controller  22 , as long as the bias voltage V A  is between the minimum voltage V MIN  and the maximum voltage V MAX , adjusts the control current to be substantially equal to the reference current I REF  by which the appropriate response of the APD  24  can be obtained. Accordingly, as shown in  FIG. 8 , the photocurrent I A  may be kept, in the region B, to the reference current I REF  even the optical input level varies. To get such response for the photocurrent I A , the controller  22  increases the control current I C  to decrease the bias voltage V A , and accordingly the multiplication factor M of the APD  24  in the region B as the optical input level increases, as shown in  FIGS. 5 to 7 . 
   As shown in  FIG. 6 , in a boundary between the region B and the region A, which corresponds to smaller input level, the bias voltage V A  reaches the maximum voltage V MAX . To maintain the condition I A =I REF  in the region A, the bias voltage V A  must be further increased, which results in a condition of the bias voltage V A  greater than the maximum voltage V MAX , and accordingly the multiplication factor M exceeds the maximum multiplication factor M MAX . However, an excess multiplication factor causes a less bandwidth. Therefore, the controller  22 , as explained hereinbefore, makes the bias voltage V A  close to the maximum voltage V MAX  by increasing the control current I C . Consequently, as shown in  FIG. 6  and  FIG. 7 , the bias voltage V A  may be maintained to the maximum voltage V MAX  so the multiplication factor M to the maximum M MAX  in the region A. Thus, the bandwidth necessary to the signal transmission may be secured. 
   The maximum multiplication factor M MAX  is preferably a value by which the necessary bandwidth for the predetermined transmission speed can be obtained. For instance, the bandwidth greater than 7 Gbps, which is necessary for the transmission at 10 Gbps, may be obtained in the multiplication factor M of the APD  24  smaller than 10. In such case, the maximum multiplication factor set by the sequence is preferably 10, and the maximum bias voltage V MAX  may be set depending on this maximum multiplication factor M MAX . 
   Referring to  FIG. 6  again, in a boundary between the region B and the region C, where the optical input level increases, the bias voltage V A  of the APD  24  reaches the minimum voltage V MIN . To maintain the condition of I A =I REF , the bias voltage V A  must be further decreased, which causes the bias voltage V A  smaller than the minimum voltage V MIN  and the multiplication factor M smaller than the minimum M MIN . In the case that the multiplication factor M becomes small in excessive, the bandwidth necessary to the signal transmission can not be secured. Therefore, as explained hereinbefore, the controller  22 , when the bias voltage V A  becomes smaller than the minimum V MIN , decreased the control current IC for the bias voltage V A  to close to the minimum V MIN . Accordingly, as shown in  FIG. 6  and  FIG. 7 , the bias voltage V A  may be kept constant to the minimum V MIN  in the region C, which also keeps the multiplication factor M the minimum M MIN . Thus, the bandwidth necessary to the signal transmission can be secured. 
   The minimum multiplication factor M MIN  is preferably a value by which the necessary bandwidth for the predetermined transmission speed can be obtained. For instance, the bandwidth greater than 7 Gbps, which is necessary for the transmission at 10 Gbps, may be obtained in the multiplication factor M of the APD  24  greater than 3. In such case, the minimum multiplication factor set by the sequence is preferably 3, and the minimum bias voltage V MIN  may be set depending on this minimum multiplication factor M MIN . 
   As shown in  FIG. 8 , the photocurrent I A  increases as the optical input level increases in the region C. In a boundary between the region C and the greater input level region D, greater than −5 dBm and smaller than 0 dBm in  FIG. 8 , the photocurrent I A  reaches the maximum photocurrent I AMAX . As explained hereinbefore, the controller  22 , when the photocurrent I A  becomes greater than the maximum photocurrent I MAX , increases the control current I C  for the photocurrent I A  to close to the maximum I MAX . Accordingly, as shown in  FIGS. 5 to 7 , the photocurrent I A  may be kept constant to the maximum I MAX  in the region D. A photocurrent exceeding the maximum photocurrent can be prevented. 
   Thus, the present invention is described as referring to embodiments and accompanying drawings thereto. However, the present invention is not restricted to those embodiments, and has a various modifications. For example, the embodiments calculate the parameters corresponding to the latest temperature of the APD by the extrapolation and the interpolation of values and corresponding temperatures thereto held in the memory. However, the decision of the control parameter is not restricted to those calculations. The LUT holds a plurality, for example more than three, of parameters and their corresponding temperatures. The CPU may fetch the combination of parameters from the memory their corresponding temperature is closest to the latest temperature and may use these parameters read from the memory for the adjusting of the control current I C . 
   Or, although the embodiment includes the DC/DC converter therein, the DC/DC converter may be installed outside the optical receiver.