Abstract:
The power converter of the invention relates to a small-sized highly efficient power converter for generating an a.c. voltage output of multiple levels with less harmonic content. In the power converter, a d.c. voltage source is separated into plural sections by series connected voltage dividing capacitors and multiple levels of a.c. output voltage are obtained from the divided d.c. voltage by on-off control of switching devices. The power converter has plural sets of the voltage dividing capacitors disposed separately adjacent to each switching devices, and series connection point of each set of the voltage dividing capacitors are connected to division points of the corresponding switching devices of each phase. The voltage dividing capacitors are connected with each other at their series connection points. Thereby, the arrangement makes wiring length short and equal between the switching devices and the voltage dividing capacitors for each phase and reduce a loss in the snubber circuit, resulting in an a.c. voltage output with less harmonic content.

Description:
This application is a continuation application of Ser. No. 08/044,493, filed Apr. 9, 1993, now abandoned, which is a continuation application of Ser. No. 07/760,069, filed Sep. 13, 1991, now abandoned. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention related to improvement of a power converter for converting a direct current to an alternating current or an alternating current to a direct current, and in particular to a construction technology suitable for size reduction of a power converter. 
     2. Description of the Related Art 
     Hitherto, an inverter referred to as a 3-level inverter is known as a kind of converter. Besides the high-potential point and low-potential point, a d.c. voltage source used for this 3-level inverter has an intermediate-potential point between the high-potential point and the low-potential point. This type of inverter is configured to select one potential level from three levels of potential at the high-potential point, low-potential point and intermediate-potential point by turning on and off of included switching devices, and to provide the selected potential at an a.c. terminal. Therefore, the 3-level inverter may raise the PWM switching frequency apparently, and then provide a.c. output with less harmonic content. 
     This type of 3-level inverter is disclosed in (1) JP-B-51-47848, (2) JP-B-53-14744, (3) JP-A-56-74088, (4) JP-A-56-115182, (5) JP-A-56-121374, (6) JP-A-57-177284, (7) JP-A-63-502953, (8) JP-A-64-34182, and (9) JP-A-1-198280, for example. 
     Inverters having relatively large capacities such as variable voltage variable frequency (VVVF) inverters are often arranged with switching arms for each phase in a linear arrangement relation. 
     In the above described conventional converter apparatus, however, wiring lengths from voltage dividing capacitors to switching devices of respective phases are long and unequal. The wiring inductance may cause excessive voltages in snubber circuits of respective switching devices or a certain device, resulting in problems of excessive voltage in snubber circuit of the switching devices, increase of snubber loss, and requirement of size increase in snubber circuits. Especially in large-capacity apparatuses, therefore, it is keenly demanded to make wiring short and uniform to the utmost. 
     An arrangement of d.c. filter capacitors is disclosed in JP-A-57-206279. The arrangement is a three-phase full-bridge inverter comprising switching devices in six arms, wherein a d.c. filter capacitor is disposed for each phase, thereby the wiring length is shortened between the d.c. filter capacitor and switching device of each phase to the utmost, resulting in reducing loss in the snubber circuits and in obtaining small size of the apparatus. 
     However, this prior art relates to a so-called 2-level inverter having only two levels in output phase voltage as the same levels as at the high-potential point and the low-potential point of the d.c. power source. And the capacitors thereof separately disposed for respective phases are used only for filtration. 
     SUMMARY OF THE INVENTION 
     It is an object of the present invention to provide a small-sized highly efficient power converter for generating multiple levels of a.c. output voltage wherein the d.c. voltage source is separated into a plurality of sections by series connected capacitors and multiple levels of a.c. output voltage are obtained from the d.c. voltage source by on-off control of switching devices. 
     It is another object of the present invention to provide a power converter generating a.c. voltage output with less harmonics. 
     A power converter in accordance with the present invention has plural sets of series connected voltage dividing capacitors disposed separately at the d.c. supply side of the converter, and serial connection points of the voltage dividing capacitors are connected to division points of switching devices of respective phases. 
     Further, a power converter in accordance with a second aspect of the present invention has voltage dividing capacitors disposed at the d.c. supply side and connected with each other at their serial connection points. 
     Since the length of wiring between the switching devices and the corresponding voltage dividing capacitors of each phase can be set so short owing to divisional disposition of the voltage dividing capacitors at the d.c. supply side, overcharge voltage of the snubber circuit induced by inductance of the wiring when a switching device turns off may be limited to a small value. Therefore, it is possible to reduce a loss in the snubber circuit, resultingly a small-sized power converter. 
     Further, owing to mutual connection of serial connection points of respective voltage dividing capacitors, induced harmonics caused by switching of the switching devices can be cancelled with harmonics of other phases, resulting in obtaining a capacitor voltage with a restricted pulsating voltage component. As a result, it is possible to further reduce the size because the resisting voltage of the devices may be limited to a low voltage, and it is also possible to reduce harmonics contained in the a.c. output. 
    
    
     BRIEF DESCRIPTION OF DRAWINGS 
     FIG. 1 shows a wiring diagram of a three-phase power converter of the invention; 
     FIG. 2 shows a wiring diagram of another three-phase power converter of the present invention, 
     FIG. 3 shows a wiring diagram of still another three-phase power converter of the present invention, 
     FIG. 4 shows a wiring diagram of a further three-phase power converter of the present invention, 
     FIG. 5 shows a wiring diagram of a still further three-phase power converter of the present invention, 
     FIG. 6 shows a wiring diagram of another three-phase power converter of the present invention, 
     FIG. 7 is an exterior oblique view showing an example arrangement of switching arms and voltage dividing capacitors commonly used for the converters shown in FIGS. 1 to 6, 
     FIG. 8 is a wiring diagram of a unit inverter commonly used for the converters of FIGS. 1 to 6, 
     FIG. 9 shows a wiring diagram of a further three-phase power converter of the present invention, 
     FIG. 10 is an exterior oblique view showing an example arrangement of the switching arms and the voltage dividing capacitors used for the converter shown in FIG. 9, and 
     FIG. 11 is an exterior oblique view showing another example arrangement of the switching arms and the voltage dividing capacitors used for the converter shown in FIG. 9. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. 
     The first example shown in FIG. 1 is an inverter having a bisected d.c. source and outputting three-phase a.c. voltage altering among three potential levels. 
     Referring to FIG. 1, numeral 1 denotes a d.c. voltage source such as a d.c. power source or an armature of a d.c. motor, and 2a, 2b and 2c denote a 3-level switching arm of phases a, b and c, respectively. Speaking of phase a, the arm of phase a comprises a group of switching devices G1a through G4a having a self-extinguishable function, rectifying devices D1a through D4a and auxiliary rectifying devices D5a through D6a, and the arm outputs a.c. voltage to a terminal Ta. The arms of the phases b and c also have the similar configuration. 3a, 3b and 3c respectively denote a voltage dividing capacitor dividing voltage at its intermediate point. Respective serial connection points (intermediate potential points) Oca, Ocb and Occ of the capacitors are connected to corresponding connection points Osa, Osb and Osc between auxiliary rectifying devices D5a and D6a, D5b and D6b, and D5c and D6c, which correspond dividing points or intermediate potential input points of the switching device groups. 
     P denotes a high-potential point, and N denotes a low-potential point of the d.c. voltage source. 
     Where Ed1 and Ed2 are the voltages across capacitors 31a and 32a of the phase a respectively, an a.c. output ea with 3-level voltage altering between the potential Ed1 at the high-potential point, the potential O at the intermediate point and the potential -Ed2 at the low-potential point can be led to the output terminal Ta by exercising on-off control upon the switching devices G1a through G4a as shown in the table 1 indicated below. Spa, Soa, Sna and Sa denote switching functions indicative of conduction states of respective switching devices by numerals 1, 0, and -1. When Ed1=Ed/2, the output voltage ea can be expressed by the following equation: ##EQU1## The waveform of the output voltage ea is formed by combining pulse voltages having magnitude Ed/2 (high potential), 0 (intermediate potential), and -Ed/2 (low potential) respectively. In general, Sa is subjected to pulse width modulation (PWM) control so that ea approaches to a sine wave. 
     
                       TABLE 1______________________________________          Switching         OutputSwitching state          function          voltageG1a  G2a     G3a    G4a  Spa   Soa  Sna  Sa    ea______________________________________On   On      Off    Off  1     0    0    1      Ed1Off  On      On     Off  0     1    0    0     0Off  Off     On     On   0     0    1    -1    -Ed2______________________________________ 
    
     In the converter of the embodiment, the voltage dividing capacitors are disposed at the d.c. input side individually for each phase. Therefore, these capacitors can be disposed near the group of switching devices, and the wiring length can be made short to the utmost. As a result, wiring inductance between voltage dividing capacitors and switching devices can be made small. Consequently, it becomes possible to restrict the resisting voltage of the switching devices and to reduce the size of snubber circuits (not illustrated in FIG. 1). 
     The power converter described above relates to a converter having three phases. It is a matter of course that similar effects are obtained even in multiple phases of two or more than three phases. 
     FIG. 2 shows another embodiment of the present invention. Excepting that connection points Oca, Ocb and Occ of voltage dividing capacitors associated with respective phases are connected to each other, the power converter shown in FIG. 2 is the same as in FIG. 1. Circuit operations of the case where connection points of voltage dividing capacitors are connected to each other will be discussed comparing to the case where the connection points are not connected. 
     Considering the case where the connection points are not connected, the following relation is obtained: ##EQU2## where term Ed represents output voltage of the d.c. voltage source, 
     term is current supplied from the d.c. voltage source, 
     term C capacitance of an individual voltage dividing capacitor of each phase, 
     Ct is a total capacitance combined with all of the voltage dividing capacitors (=3C/2), 
     isp is a sum total of currents ispa, ispb and ispc, and 
     io is a sum total of currents ioa, iob and ioc, and 
     where 
     currents ispa, ispb and ispc flow through the self-distinguishable switching devices, G1a, G1b and G1c, respectively, and 
     currents ioa, iob and ioc flow into connection points Oca, Ocb and Occ of voltage dividing capacitors, respectively. 
     A current icpa flowing into the upper capacitor of the voltage dividing capacitors of the phase a is expressed by the following equation: 
     
         i cpa=(i s-i sp=i o/2)/3+ioa/2                             (3) 
    
     Therefore, voltage vcpa of the upper voltage dividing capacitor of the phase a is described by the following equation: ##EQU3## 
     As evident from this equation, pulsation is caused in vcpa by ioa. In case PWM control is so exercised that the output voltage may become a sine wave, the current ioa may contain a large amount of the main component of the inverter output frequency (fundamental wave component) and the third order harmonic component, and hence the voltage at connection points of voltage dividing capacitors pulsates with these frequencies. 
     On the other hand, in case where the intermediate points of voltage dividing capacitors of respective phases are connected to each other, the voltage vcpa of the upper voltage dividing capacitor of phase a can be expressed by the following equation: ##EQU4## 
     In this case, the voltage vcpa depends upon the current io. Since io is the sum total of the currents ioa, iob and ioc flowing into intermediate points between voltage dividing capacitors, io does not contain other components than zero-phase-sequence currents of ioa, iob and ioc. Therefore, pulsation due to the fundamental component is removed. 
     The converter described in FIG. 2 has an additional effect of being applied with a stable voltage across voltage dividing capacitors as heretofore described, in addition to the effects of the embodiment of FIG. 1. Therefore, the converter may advantageously lower the resisting voltage of the devices and reduce harmonic components in the a.c. output. Further, by setting the connection impedance values equal between respective intermediate-potential points, harmonics can be surely cancelled. 
     FIG. 3 shows still another converter of the invention which is a modification of the converter of FIG. 2 by dividing the d.c. input voltage into three parts. Multi-level a.c. output voltage can be derived from stable voltages of the dividing capacitors depending on thus increased number of voltage division parts of the d.c. input voltage. 
     A further power converter of the invention has plural independent d.c. voltage sources connected in series, such as individual power sources 101 and 102 included in the d.c. power source 1 as shown in FIG. 4. The power converter may surely obtain an equal voltage allotment between the upper and lower voltage dividing capacitors by connecting the connection points of these d.c. voltage sources to the connection points of voltage dividing capacitors. 
     A still further power converter shown in FIG. 5 has impedance elements 41, 42 and 43 connected between the intermediate connection points of voltage dividing capacitors of respective phases together. The power converter may obtain more stable voltage of the dividing capacitors than that of FIG. 1. For example, if the impedance elements are capacitors with capacitance Co and coupled in star connection, the voltage vcpa of the upper voltage dividing capacitor of phase a can be expressed by the following equation: ##EQU5## 
     In this case, the fundamental wave component contained in the current flowing into the intermediate connection points of the voltage dividing capacitors is reduced by a factor of 2C/(2C+Co). Although the case where the impedance elements are coupled in star connection is described above, delta connection may be used instead. 
     Further, in an embodiment shown in FIG. 6, a stable d.c. voltage source can be established by a filter capacitor 5 disposed in parallel on the d.c. voltage input side. This arrangement of FIG. 6 is much effective in the case where the d.c. voltage source 1 produces d.c. voltage output including harmonics, such as an a.c. power source 11 with a rectifier circuit 12. FIG. 6 roughly shows a well know PWM converter comprising GTO thyristors denoted with numerals 121-124 and diodes denoted with numerals 125-128. 
     FIG. 7 is an exterior oblique view of an outfitting equipment for outfitting to a vehicle with the switching arms 2a, 2b and 2c and the voltage dividing capacitors 3a, 3b and 3c of respective phases commonly used for the embodiments of FIGS. 1 through 6. 
     FIG. 8 shows a unit inverter (power converting device) 6 for each phase. 
     That is to say, configurations of unit inverters for phases a, b and c in all the embodiments described in FIGS. 1-6 are perfectly identical, inclusive of voltage dividing capacitors. Therefore, a power converter having an arbitrary number of phases can be constructed by combining mass-produced unit inverters with d.c. terminals P, N and Oc and an a.c. terminal T. 
     FIG. 9 shows a further embodiment of a power converter of the present invention. Differing from the embodiment of FIG. 2, this power converter of three-phase three-level inverter is divisionally disposed with only two sets 3b and 3c of the voltage dividing capacitors. The intermediate connection points Ocb and Occ of respective voltage dividing capacitors and the intermediate voltage input points (division points of device groups) Osa, Osb and Osc of the switching arms 2a, 2b and 2c of respective phases are connected altogether. 
     FIG. 10 is an exterior oblique view illustrating an outfitting equipment of the switching arms 2a, 2b and 2c and the voltage dividing capacitors 3b and 3c used for the embodiment of FIG. 9. 
     That is to say, the switching arms 2a, 2b and 2c of respective phases are arranged in a linear arrangement relation, and the voltage dividing capacitors 3b and 3c are divisionally disposed at two positions between the switching arm 2a and the arm 2b of two phases and between the switching arm 2b and the arm 2c, respectively. 
     FIG. 11 is also an exterior oblique view illustrating another arrangement of an outfitting equipment of the switching arms 2a, 2b and 2c and the voltage dividing capacitors 3b and 3c for the embodiment of FIG. 9. 
     That is to say, the switching arms 2a, 2b and 2c of respective phases are arranged in a linear arrangement relation, and a bisected voltage dividing capacitors 3b and 3c are disposed at both ends thereof. 
     In configurations of FIGS. 10 and 11, though conditions of all switching device groups of three phases do not become perfectly identical, the effect of size reduction is superior to the prior art. 
     All embodiments heretofore described are related only to inverters. However, it is also possible to connect output terminals of these inverters to an a.c. power source via reactance elements and make them operate as self-excited converters for converting an alternating current to a direct current. In this case as well, similar effects to those used in inverters can be expected. 
     The capacitors may also be arranged at the top or bottom of the switching arms or at the front or rear if the arms according to the invention, while the capacitors 3a to 3c or 3b and 3c are described to be arranged between the switching arms 2a to 2c (FIG. 7 and 10, respectively) or arranged at the ends of the row of the arms (FIG. 11) in the embodiments described above. 
     The present invention may realize highly efficient power converters of rather small size for producing multi-level a.c. voltages derived from plural divided parts of input voltage from the d.c. source divided by voltage dividing capacitors. Further, the power converters may also provide a.c. outputs having reduced harmonic components.