Abstract:
An output circuit includes: a current source transistor connected between a high-potential-side power supply and an output terminal; a current sinking transistor connected between a low-potential-side power supply and the output terminal; a third transistor constituting a current mirror circuit together with the current source transistor; a fourth transistor connected with the third transistor to control a driving current of the current source transistor; and a fifth transistor supplying a current corresponding to a base potential of the current sinking transistor to the fourth transistor.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The present invention relates to an amplifier for a class-AB operation.  
         [0003]     2. Description of Related Art  
         [0004]     In recent years, a semiconductor device used in an electronic device has proceeded toward reduction in power supply voltage and power consumption. With this trend, an amplifier circuit incorporated in the semiconductor device has also proceeded toward reduction in power supply voltage and power consumption. Regarding a performance of the amplifier circuit, there is an increasing demand to expand an output voltage range and improve power efficiency despite of a low power supply voltage.  
         [0005]     As such circuit configuration that expands an output voltage range, an amplifier performing a rail-to-rail operation is adopted in some cases.  FIG. 4  is a circuit diagram showing the configuration of an output circuit using the amplifier performing a rail-to-rail operation. An output circuit  3  of  FIG. 4  includes two PNP transistors  301  and  302 , an NPN transistor  303 , a resistor  304 , and a constant current circuit  305 .  
         [0006]     As shown in  FIG. 4 , the input terminal  308  is connected with a base terminal of the transistor  303 . An input signal IN applied to the input terminal  308  drives the transistor  303 . A collector terminal of the transistor  303  is connected with a collector terminal of the transistor  302 . Further, the collector terminal of the transistor  303  is connected with an output terminal  309  of the output circuit  3 . In addition, the emitter terminal of the transistor  303  is grounded (GND). The transistor  303  is a current sinking transistor controlling an amount of current sunk from the output terminal  309 .  
         [0007]     On the other hand, an emitter terminal of the transistor  302  is connected with a power supply  306 . Further, a base terminal of the transistor  302  is connected with a base terminal of the transistor  301 . The transistor  302  is a current source transistor controlling an amount of current supplied from the output terminal  309  to the outside. Further, an emitter terminal of the transistor  301  is connected with a power supply  307  via the resistor  304 . Further, a base terminal of the transistor  301  is connected with a collector terminal. The collector terminal of the transistor  301  is grounded through the constant current circuit  305 . The transistor  301  and the transistor  302  constitute a current mirror circuit  306 .  
         [0008]     An output unit of the output circuit  3  is configured by a pure complementary circuit where the transistor  302  as the current source transistor is a PNP transistor and the transistor  303  as the current sinking transistor is an NPN transistor. Thus, it is possible to increase the maximum value of the output voltage Vout up to a power supply Vcc level and decrease the minimum value thereof down to a GND level.  
         [0009]     In the output circuit  3 , a current I 1  that is determined by the constant current circuit  305  is supplied to the transistor  301  of the current mirror circuit  306 , and current I 2  that flow a collector of the transistor  302  is output according to a predetermined mirror ratio. The current I 2  is held constant regardless of a level of the input signal IN. A current I 4  is supplied to an output load; the current I 4  corresponds to a difference between the current I 2  and a current I 3  flowing through a collector of the transistor  303 , which is controlled by the input signal IN. Then, an output voltage Vout is output. That is, since an idling current (I 2 ) kept constant flows in the output circuit regardless of the level of the input signal IN, this circuit is disadvantageous in that a power efficiency is low when no signal is input.  
         [0010]     As a circuit that can overcome the above problem, there has been known a class-B push-pull output circuit.  FIG. 5  is a circuit diagram showing the configuration of the class-B push-pull output circuit. A class-B push-pull output circuit  4  of  FIG. 5  includes NPN transistors  401  and  403 , aPNP transistor  402 , two diodes  404  and  405 , and a constant current circuit  406 .  
         [0011]     As shown in  FIG. 5 , an input terminal  408  is connected with a base terminal of the transistor  403 . An input signal IN applied to the input terminal  408  drives the transistor  403 . A collector terminal of the transistor  403  is connected with a cathode of the diode  405  and a base of the transistor  402 . An emitter terminal of the transistor  403  is grounded. An anode of the diode  405  is connected with a cathode of the diode  404 . An anode of the diode  404  is connected with the other end of the constant current circuit  406 , one end of which is connected with the power supply  407 , and with the base of the transistor  401 . The transistor  401  and the transistor  402  are commonly connected with the output terminal  409 , and a collector of the transistor  401  is connected with the power supply  407 . The transistor  402  is grounded (GND).  
         [0012]     In the class-B push-pull output circuit  4 , a current I 1  supplied from the constant current circuit  406  flows through the diodes  404  and  405 . This causes voltage drop, and a bias voltage is applied to the base terminals of the transistor  401  and the transistor  402 . If a signal is input to the input terminal  408 , an amount of the current I 2  flowing the collector of the transistor  403  changes. Then, current I 3   a  that corresponds a difference between the currents I 1  and I 2  drives the transistor  401 . And, current I 3   b  that corresponds a difference between the currents I 1  and I 2  drives the transistor  402 . After that, the output voltage Vout is changed.  
         [0013]     If no signal is input to the input terminal  408 , the transistor  403  is turned OFF. At this time, the current I 2  does not flow. In the class-B push-pull output circuit  4 , the transistors  401  and  402  operate only when a signal is input. Hence, its power efficiency is higher than the output circuit  3  of  FIG. 4 .  
         [0014]     However, in the configuration of the class-B push-pull output circuit  4 , there are voltage differences Vbe 1  and Vbe 2  on the GND side and the power supply side as viewed from the output terminal  409 , so an output voltage range is narrow. This results in a problem that sufficient output voltage can not be gained in case that a power supply voltage is low.  
         [0015]     To solve the aforementioned problems, the following publications are disclosed. According to a technique disclosed in Japanese Patent Translation Publication No. 11-507773, a base potential of a current sinking transistor is controlled by use of a control transistor transmitting an input signal. Further, a current source transistor is controlled through a transistor. The source side transistor and the current sinking transistor are turned ON/OFF in response to the input signal, making it possible to save current consumption and power consumption.  
         [0016]     According to a technique disclosed in Japanese Unexamined Patent Publication No. 2000-77955, a base potential of a current sinking transistor is controlled by use of a control transistor transmitting an input signal. Further, a current source transistor is controlled by use of a mirror transistor of the current sinking transistor. The source side transistor and the current sinking transistor are turned ON/OFF in response to the input signal, making it possible to save current consumption and power consumption.  
         [0017]     According to a technique disclosed in Japanese Unexamined Patent Publication No. 2003-69346, abase potential of a current sinking transistor is controlled by use of a control transistor transmitting an input signal. Further, a current source transistor is controlled through an idling current control unit. The source side transistor and the current sinking transistor are turned ON/OFF in response to the input of a signal, making it possible to save current consumption and power consumption.  
         [0018]     In the configuration disclosed in Japanese Patent Translation Publication No. 11-507773, however, if a potential of the control transistor increases, a gain transistor is turned OFF, and no current flows through the current source transistor, so output impedance becomes extraordinarily high. To adjust the impedance, a current should be continuously supplied from a constant current source. As a result, a current is consumed more than necessary.  
         [0019]     Further, in the configuration disclosed in Japanese Unexamined Patent Publication No. 2003-69346, the control of the idling current control unit is limited by a constant current source provided in the idling current control unit. To be specific, if the constant current source is set small, an output current of the current source transistor reduces, making it difficult to increase an input impedance of the current sinking transistor. Therefore, the constant current source can not be set small, and an idling current appears more than necessary. Further, it is necessary to insert an emitter follower circuit to an input signal path for increasing the input impedance.  
       SUMMARY OF THE INVENTION  
       [0020]     An output circuit according to an aspect of the present invention comprises: a first transistor connected between a high-potential-side power supply and an output terminal; a second transistor connected between a low-potential-side power supply and the output terminal; a third transistor constituting a current mirror circuit together with the first transistor; a fourth transistor connected with the third transistor and controls a drive current of the first transistor; a fifth transistor supplying a current corresponding to a base potential of the second transistor to the fourth transistor.  
         [0021]     An output circuit according to an aspect of the present invention comprises: a first transistor having a first terminal connected to a high-potential-side power supply and having a second terminal connected to an output terminal; a second transistor having a first terminal connected to a low-potential-side power supply and having a second terminal connected to the output terminal and having a base terminal connected to an input terminal; a fourth transistor having a second terminal connected to a base terminal of the first transistor; a fifth transistor having a first terminal connected to a first terminal of the fourth transistor and having a base terminal connected to the input terminal.  
         [0022]     The fifth transistor synchronous with the second transistor (current sinking transistor) controls the first transistor (current source transistor). Only when a signal is input, the first transistor and the second transistor are driven. Accordingly, current consumption is reduced to save power consumption. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0023]     The above and other objects, advantages and features of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:  
         [0024]      FIG. 1  is a circuit diagram showing the configuration of a class-AB output circuit according to an embodiment of the present invention;  
         [0025]      FIG. 2  is a circuit diagram showing the simplified configuration of the class-AB output circuit according to the embodiment of the present invention;  
         [0026]      FIG. 3  is a circuit diagram showing another mode of the embodiment of the present invention;  
         [0027]      FIG. 4  is a circuit diagram showing the configuration of a conventional output circuit; and  
         [0028]      FIG. 5  is a circuit diagram showing the configuration of a class-B push-pull output circuit. 
     
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0029]     The invention will be now described herein with reference to illustrative embodiments. Those skilled in the art will recognize that many alternative embodiments can be accomplished using the teachings of the present invention and that the invention is not limited to the embodiments illustrated for explanatory purposed.  
       First Embodiment  
       [0030]     Hereinafter, an embodiment of the present invention is described with reference to the accompanying drawings. In the following description, repetitive explanation is omitted.  
         [0031]     This embodiment is described in detail with reference to the accompanying drawings.  FIG. 1  is a circuit diagram showing the configuration of a class-AB output circuit  1  of this embodiment. The class-AB output circuit  1  includes four NPN transistors  101 ,  103 ,  104 , and  106 , four PNP transistors  102 ,  105 ,  107 , and  108 , and a constant current circuit  109 .  
         [0032]     As shown in  FIG. 1 , an input terminal  113  is connected to a base terminal of the transistor  106 . An input signal IN applied to the input terminal  113  drives the transistor  106 . Further, the input terminal  113  is also connected to a base terminal of the transistor  105 . Thus, the input signal IN drives the transistor  105  as well. A collector terminal of the transistor  106  and a collector terminal of the transistor  108  are connected with an output terminal  114 . An emitter terminal of the transistor  106  is grounded (GND). The transistor  106  is a current sinking transistor controlling an amount of current sunk from the output terminal  114 .  
         [0033]     An emitter terminal of the transistor  108  is connected to a power supply  112 . A base terminal of the transistor  108  is connected to a base terminal of the transistor  107 . The transistor  108  is a current source transistor controlling an amount of current supplied form the output terminal  114  to the outside. An emitter terminal of the transistor  107  is connected to a power supply  112 . A base terminal of the transistor  107  is connected to a collector terminal and to a collector terminal of the transistor  104 . The transistor  107  and the transistor  108  constitute a current mirror circuit  110 .  
         [0034]     On the other hand, an emitter terminal of the transistor  105  is connected with an emitter terminal of the transistor  104 . A collector terminal of the transistor  105  is grounded (GND). A base terminal of the transistor  104  is connected with a base terminal of the transistor  101 . A base terminal of the transistor  101  is connected with a collector terminal of the transistor  101 . An emitter terminal of the transistor  101  is connected with an emitter terminal of the transistor  102 . A collector terminal of the transistor  102  is connected with a base terminal of the transistor  102  and a base terminal of the transistor  103 . Further, a collector terminal of the transistor  102  is connected with a collector terminal of the transistor  103 . An emitter terminal of the transistor  103  is grounded (GND). The transistors  101 ,  102 ,  103 ,  104 , and  105  constitute the output control circuit  111 .  
         [0035]     A collector terminal of the transistor  101  is connected to the power supply  112  via the constant current circuit  109 . A collector terminal of the transistor  104  is connected with a collector terminal of the transistor  107 . In this way, the class-AB output circuit  1  of this embodiment is configured.  
         [0036]     Referring next to  FIG. 1 , a power efficiency and an output voltage range of the class-AB output circuit  1  of this embodiment are described. First, a base voltage (hereinafter referred to as “point-P voltage”) of the transistors  101  and  104  is considered, and a power efficiency of this embodiment is discussed. A potential of the point P is expressed by the following relational expression (1):  
                     Point   -     P   ⁢           ⁢   voltage       =       Vbe   ⁢           ⁢   1     +     Vbe   ⁢           ⁢   2     +     Vbe   ⁢           ⁢   3                   =       Vbe   ⁢           ⁢   4     +     Vbe   ⁢           ⁢   5     +     Vbe   ⁢           ⁢   6                     (   1   )             
 
         [0037]     As shown in  FIG. 1 , a current I 1  determined by the constant current circuit  109  flows the transistors  101 ,  102 , and  103 . Accordingly, Vbe of the transistors  101 ,  102 , and  103  is fixed. On the other hand, a current I 2  that is controlled by a voltage of an input signal IN flows the transistors  104  and  105 . Due to the current I 2 , Vbe 4  and Vbe 5  fluctuate. Likewise, a current I 4  that is controlled by a voltage of the input signal IN flows the transistor  106  as a current sinking transistor. Due to the current I 4 , Vbe 6  fluctuates. That is, an operating point of the transistor  106  varies depending on the input signal, and a value of the current I 4  is changed, which leads to an increase in Vbe 6 .  
         [0038]     At this time, as understood from the expression (1), Vbe 4  and Vbe 5  are changed oppositely from Vbe 6 . That is, if an amount of the sink current I 4  of the transistor  106  as a current sinking transistor is small due to the input signal IN, the source current I 3  of the transistor  108  as a current source transistor increases. In contrast, if an amount of I 4  is large, an amount of I 3  is reduced under the control. That is, unlike a conventional output circuit  3 , such an idling current that is held constant does not flow the current source transistor. Incidentally, an operation of the class-AB output circuit  1  is described in detail below.  
         [0039]     Next, an output voltage range of this embodiment is described. As shown in  FIG. 1 , in this embodiment, the collector terminal of the transistor  108  as the current source transistor is connected with the output terminal  114 . Further, the emitter terminal of the transistor  108  is connected with a power supply Vcc. The collector terminal of the transistor  106  as the current sinking side transistor is connected with the output terminal  114 . The emitter terminal of the transistor  106  as the current sinking side transistor is grounded (GND). That is, the collector terminals of the transistors  108  and  106  are connected with the output terminal  114 , and the emitter terminals of the transistors  108  and  106  are connected with the power supply Vcc and the GND terminal, respectively. Hence, an output voltage can range from a GND level to a power supply level.  
         [0040]     Referring to  FIG. 2 , an operation of the class-AB output circuit  1  of this embodiment is described in detail next. A circuit diagram of  FIG. 2  simplifies the circuit configuration of  FIG. 1  for explaining the operation of this embodiment. A class-AB output circuit  1   a  as the simplified circuit  1  includes two NPN transistors  104   a  and  106   a , two PNP transistors  105   a  and  108   a , and a battery  116   a . In  FIG. 2 , the constant current circuit  109  of  FIG. 1  is omitted. Further, diode-connected transistors  101  and  107  are simplified, and the transistors  102  and  103  are replaced by the battery  116   a.    
         [0041]     As shown in  FIG. 2 , an input terminal  113   a  is connected to a base terminal of the transistor  106   a . An input signal IN applied to the input terminal  113   a  drives the transistor  106   a . Further, the input terminal  113   a  is also connected to a base terminal of the transistor  105   a . The input signal IN drives the transistor  105   a  as well. A collector terminal of the transistor  106   a  and a collector terminal of the transistor  108   a  are connected with an output terminal  114   a . An emitter terminal of the transistor  106   a  is grounded. An emitter terminal of the transistor  108   a  is connected to a power supply  112   a . A base terminal of the transistor  108   a  is connected to a collector terminal of the transistor  104   a.    
         [0042]     On the other hand, an emitter terminal of the transistor  105   a  is connected to an emitter terminal of the transistor  104   a . A collector terminal of the transistor  105   a  is grounded (GND). The transistor  104   a  and the transistor  105   a  constitute an output control circuit  111   a . Incidentally, a base terminal of the transistor  104   a  is grounded (GND) via the battery  116   a.    
         [0043]     If a base current of the transistor  106   a  increases due to the input signal IN, a base potential of the transistors  105   a  and  106   a  increases. Here, a base potential of the transistor  104   a  is fixed by the battery  116   a . As the base potential of the transistors  105   a  and  106   a  increases, a difference between the potential and the base potential of the transistor  104   a  is decreased. Thus, a collector current of the transistor  104   a  reduces. As a result, a collector current of the transistor  108   a  reduces, and an output voltage Vout drops.  
         [0044]     Further, if the base current of the transistor  106   a  decreases due to the input signal IN, the base potential of the transistors  105   a  and  106   a  is reduced. Here, the base potential of the transistor  104   a  is fixed by the battery  116   a . As the base potential of the transistors  105   a  and  106   a  decreases, a difference between the potential and the base potential of the transistor  104   a  increases. Thus, the collector current of the transistor  104   a  increases. As a result, a collector current of the transistor  108   a  increases, and thus the output voltage Vout is raised.  
         [0045]     As described above, an output of the transistor  108   a  is controlled by the output control circuit  111   a , wherein input signal IN is applied to the transistor  105   a , and the transistor  104   a  works corresponding to the transistor  105   a . In other words, an output of the transistor  108   a  as the current source transistor is controlled based on a base voltage of the transistor  106   a  as the current sinking transistor.  
         [0046]     Abase current of the transistor  108   a  as the current source transistor is a collector current of the transistor  104   a  and flows to the GND terminal through the transistor  105   a . The input terminal  113   a  is connected to a base terminal of the transistor  105   a . Hence, an input impedance can be increased by controlling the base current of the transistors  105   a  and  106   a . That is, unlike the technique of Japanese Unexamined Patent Publication No. 2003-69346, it is unnecessary to supply a current using a constant current source or adopt an emitter follower circuit for the purpose of increasing an input impedance of a current sinking transistor.  
         [0047]      FIG. 3  shows another mode of this embodiment. In  FIG. 3 , a resistor  115  is inserted between the emitter terminal of the transistor  107  and the power supply Vcc of  FIG. 1  to thereby constitute a Wydler constant current circuit  116 . The other components are the same as those of  FIG. 1 , and thus description thereof is omitted here.  
         [0048]     As shown in  FIG. 3 , the source current I 3  can be increased by inserting the resistor  115 . This is because the resistor  115  is connected to an emitter terminal of the transistor  108  as the current source transistor and an emitter terminal of the transistor  107  as the current mirror circuit to thereby generate the source current I 3  amplified based on a resistance ratio with respect to the current I 2  flowing the transistor  107 .  
         [0049]     As described above, in the class-AB output circuit  1  of this embodiment, an idling current varies depending on a load. Therefore, as compared with the conventional output circuit  3  where an idling current does not vary depending on a load, current consumption can be saved, and a power efficiency can be improved.  
         [0050]     Further, the class-AB output circuit  1  of this embodiment can up the maximum value of the output voltage Vout to a power supply Vcc level and down the minimum value thereof a GND level. That is, the output voltage range can be expanded up to the power supply voltage level, making it possible to deal with reduction in operating voltage.  
         [0051]     Further, in the class-AB output circuit  1  of this embodiment, the transistor  105  is positioned between base terminal of the transistor  104  and the transistor  106 . Therefore, even if the base potential of the transistor  106  increases, a current flowing the transistor  104  is never entirely stopped. Thus, unlike the configuration of Japanese Patent Translation Publication No. 11-507773, it is unnecessary to supply a current for correcting an output impedance, so a power efficiency is improved.  
         [0052]     Further, the class-AB output circuit  1  of this embodiment uses the transistor  105  to increase an input impedance with respect to the current sinking transistor. Thus, unlike the configuration of Japanese Unexamined Patent Publication No. 2003-69346, it is unnecessary to supply a current using the constant current source or insert the emitter follower circuit. As a result, current consumption of the circuit is reduced, and the power efficiency can be improved. Incidentally, an offset voltage of an input operation stage can be also increased by increasing the input impedance.  
         [0053]     Further, in the class-AB output circuit  1  of this embodiment, if an input voltage of the input signal IN is lowered, control on a current of the transistor  108  as the current source transistor is not limited. That is, unlike the configuration of Japanese Unexamined Patent Publication No. 2003-69346, there is no fear that a constant current source for controlling an idling current limits an output voltage range. Hence, an output control can be executed with a wider range.  
         [0054]     As another mode of the this embodiment, if a large amount of source current I 3  is required in this embodiment, a current amount can be increased by increasing a channel area ratio between the transistors  107  and  108  constituting the current mirror circuit of  FIG. 1  instead of inserting the resistor  115  as shown in  FIG. 3 .  
         [0055]     It is apparent that the present invention is not limited to the above embodiment that may be modified and changed without departing from the scope and spirit of the invention.