Abstract:
There are provided an insulating film, a printed circuit board including the insulating film, and a method of manufacturing the printed circuit board. The insulating film includes a first insulating material; a second insulating material; and a metal thin film disposed between the first insulating material and the second insulating material.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
       [0001]    This application claims the benefit of Korean Patent Application No. 10-2014-0096672, filed on Jul. 29, 2014, entitled “Insulating Film, Printed Circuit Board Including the Same, and Method of Manufacturing the Printed Circuit Board” which is hereby incorporated by reference in its entirety into this application. 
       BACKGROUND 
       [0002]    The present disclosure relates to an insulating film, a printed circuit board using the insulating film, and a method of manufacturing the printed circuit board. 
         [0003]    A demand for miniaturization of materials applied to boards is also increasing because of lightweight, thin, short, and small electronic devices. As specifications of electronic devices such as high functionality, high speed, etc. become higher, importance of boards capable of performing further stable and efficient signal transmission is also increasing. For stable and efficient signal transmission of boards, importance of a function of shielding noise due to a high frequency is further increasing. A process of additionally forming a ground layer is performed so as to shield noise for providing a stable signal transmission of a board and low impedance. 
       RELATED ART DOCUMENT 
     Patent Document 
       [0004]    (Patent Document 1) Korean Patent No. 0274782 
       SUMMARY 
       [0005]    An aspect of the present disclosure may provide an insulating film capable of reducing the number of processes by omitting a process of additionally forming a ground layer, a printed circuit board including the insulating film, and a method of manufacturing the printed circuit board. 
         [0006]    Another aspect of the present disclosure may provide an insulating film capable of shielding signal noise, a printed circuit board including the insulating film, and a method of manufacturing the printed circuit board. 
         [0007]    Another aspect of the present disclosure may provide an insulating film capable of improving reliability of a signal transmission due to a reduction in a signal transmission distance, a printed circuit board including the insulating film, and a method of manufacturing the printed circuit board. 
         [0008]    According to an aspect of the present disclosure, an insulating film may include: a first insulating material; a second insulating material; and a metal thin film disposed between the first insulating material and the second insulating material. 
         [0009]    According to another aspect of the present disclosure, a printed circuit board may include: a board on which an inner layer buildup layer is formed; a first insulating layer formed on the inner layer buildup layer; a metal layer formed on the first insulating layer; a second insulating layer formed on the metal layer; a via formed to pass through the first insulating layer, the metal layer, and the second insulating layer and be in contact with an inner layer circuit layer of the inner layer buildup layer; and an insulating coating layer formed between the first insulating layer, the metal layer, and the second insulating layer and the via. 
         [0010]    The metal layer may be formed to be in contact with an entire one surface of the first insulating layer. 
         [0011]    The metal layer may be a ground layer. 
         [0012]    According to another aspect of the present disclosure, a method of manufacturing a printed circuit board may include preparing a board on which an inner layer buildup layer is formed; forming an insulating film comprising a first insulating material, a second insulating material, and a metal thin film disposed between the first insulating material and the second insulating material, on the inner layer buildup layer; forming a via hole in the insulating film to expose a part of an inner layer circuit layer of the inner layer buildup layer; forming an insulating coating layer on the insulating film and a side wall of the via hole; and forming a via formed in the via hole and contacting the exposed inner layer circuit layer. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0013]    The above and other aspects, features and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which: 
           [0014]      FIG. 1  is an exemplary diagram showing an insulating film according to an exemplary embodiment of the present disclosure; 
           [0015]      FIG. 2  is an exemplary diagram showing a printed circuit board according to an exemplary embodiment of the present disclosure; and 
           [0016]      FIGS. 3 through 10  are exemplary diagrams for explaining a method of manufacturing a printed circuit board according to an exemplary embodiment of the present disclosure. 
       
    
    
     DESCRIPTION OF EMBODIMENTS 
       [0017]    The objects, features and advantages of the present disclosure will be more clearly understood from the following detailed description of the exemplary embodiments taken in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant descriptions thereof are omitted. Further, in the following description, the terms “first,” “second,” “one side,” “the other side” and the like are used to differentiate a certain component from other components, but the configuration of such components should not be construed to be limited by the terms. Further, in the description of the present disclosure, when it is determined that the detailed description of the related art would obscure the gist of the present disclosure, the description thereof will be omitted. 
         [0018]    Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. 
         [0019]    Insulating Film 
         [0020]      FIG. 1  is an exemplary diagram showing an insulating film according to an exemplary embodiment of the present disclosure. 
         [0021]    Referring to  FIG. 1 , the insulating film  100  according to an exemplary embodiment of the present disclosure includes a first insulating material  110 , a second insulating material  130 , and a metal thin film  120 . 
         [0022]    According to an exemplary embodiment of the present disclosure, the first insulating material  110  and the second insulating material  130  are complex polymer resin usually used as an interlayer insulating material. For example, the first insulating material  110  and the second insulating material  130  may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. The first insulating material  110  and the second insulating material  130  may be formed in the form of a film. However, the materials forming the first insulating material  110  and the second insulating material  130  and the shapes in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulting materials and shapes used in a circuit board field may be applied to the first insulating material  110  and the second insulating material  130 . 
         [0023]    According to an exemplary embodiment of the present disclosure, the metal thin film  120  is formed between the first insulating material  110  and the second insulating material  130 . The metal thin film  120  may be formed of metal such as copper, silver, nickel, etc. In the exemplary embodiment of the present disclosure, the metal thin film  120  may be formed of copper. However, a material forming the metal thin film  120  is not limited to copper. That is, the material forming the metal thin film  120  may be possible if the material is a metal material having conductivity used in the circuit board field. 
         [0024]    As such, the insulating film  100  according to an exemplary embodiment of the present disclosure has a structure in which the first insulating material  110 , the metal thin film  120 , and the second insulating material  130  are sequentially stacked. In this regard, the metal thin film  120  of the insulating film  100  performs the same function as a ground layer of a board. That is, if the insulating film  100  according to an exemplary embodiment of the present disclosure is applied to the board, noise is shielded by the metal thin film  120 . Thus, a stable signal transmission between circuit patterns formed on the board may be possible. 
         [0025]    A thickness of the insulating film  100  according to an exemplary embodiment of the present disclosure may be adjustable. That is, the entire thickness of the insulating film  100  may be adjustable by adjusting a thickness of the metal thin film  120  according to a board to which the insulating film  100  is to be applied. 
         [0026]    Printed Circuit Board 
         [0027]      FIG. 2  is an exemplary diagram showing a printed circuit board according to an exemplary embodiment of the present disclosure. 
         [0028]    Referring to  FIG. 2 , the printed circuit board  200  according to an exemplary embodiment of the present disclosure includes a board  210 , an inner layer buildup layer, a first insulating layer  230 , a metal layer  240 , a second insulating layer  250 , a via  260 , an insulating coating layer  270 , an outer layer buildup layer, and a solder resist layer  290 . 
         [0029]    According to an exemplary embodiment of the present disclosure, the board  210  is complex polymer resin usually used as an interlayer insulating material. For example, the board  210  may manufacture a thinner printed circuit board  200  by employing prepreg. Alternatively, the board  210  may easily implement a fine circuit by employing ABF (Ajinomoto Build Up Film). In addition, the board  210  may use epoxy based resin such as FR4, BT (Bismaleimide Triazine), etc. but is not particularly limited thereto. The board  210  may be formed by using a copper clad laminate (CCL). The board  210  is configured as a single insulating layer in the exemplary embodiment of the present disclosure but the present disclosure is not limited thereto. That is, the board  210  may be configured as one or more insulating layers, a circuit layer, and a via. 
         [0030]    According to an exemplary embodiment of the present disclosure, the inner layer buildup layer may be formed on the board  210 . The inner layer buildup layer may include an inner layer circuit layer  220 . The inner layer circuit layer  220  may include an inner layer circuit pattern  221  and a via pad  222 . The inner layer circuit layer  220  is formed of a conductive material. For example, the inner layer circuit layer  220  may be formed of copper. However, a material forming the inner layer circuit layer  220  is not limited to copper. That is, the material forming the inner layer circuit layer  220  may be applied without restriction if the material is used as a conductive material for a circuit in the circuit board field. The inner layer buildup layer is configured as the inner layer circuit layer  220  of one layer in  FIG. 2  but the configuration of the inner layer buildup layer is not limited thereto. For example, the inner layer buildup layer may be formed as the inner layer circuit layers  220  of multi layers and inner layer insulating layers (not shown) formed between the inner layer circuit layers  220  for insulating the inner layer circuit layers  220  from each other. 
         [0031]    According to an exemplary embodiment of the present disclosure, the first insulating layer  230  is formed on the inner layer buildup layer. The first insulating layer  230  is formed of complex polymer resin usually used as an interlayer insulating material. For example, the first insulating layer  230  may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. However, the materials forming the first insulating layer  230  in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulting materials used in the circuit board field may be applied to the first insulating layer  230 . 
         [0032]    According to an exemplary embodiment of the present disclosure, the metal layer  240  is formed on the first insulating layer  230 . According to an exemplary embodiment of the present disclosure, the metal layer  240  is formed to contact an entire one surface of the first insulating layer  230 . Referring to  FIG. 2 , the metal layer  240  is continuously formed on the first insulating layer  230  except for a part in which the via  260  is formed. The metal layer  240  is formed of metal such as copper, silver, nickel, etc. In the exemplary embodiment of the present disclosure, the metal layer  240  may be formed of copper. However, a material forming the metal layer  240  is not limited to copper. That is, the material forming the metal layer  240  may be possible if the material is a metal material having conductivity used in the circuit board field. According to an exemplary embodiment of the present disclosure, the above-formed metal layer  240  is a ground layer. 
         [0033]    According to an exemplary embodiment of the present disclosure, the second insulating layer  250  is formed on the metal layer  240 . The second insulating layer  250  is formed of complex polymer resin usually used as an interlayer insulating material. For example, the second insulating layer  250  may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. However, the materials forming the second insulating layer  250  in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulting materials used in the circuit board field may be applied to the second insulating layer  250 . 
         [0034]    According to an exemplary embodiment of the present disclosure, the via  260  is formed to pass through the first insulating layer  230 , the second insulating layer  250 , and the metal layer  240 . According to an exemplary embodiment of the present disclosure, one surface of the via  260  is in contact with the inner layer circuit layer  220  of the inner layer buildup layer. Another surface of the via  260  is in contact with the outer layer circuit layer  280  of the outer layer buildup layer. The above-formed via  260  electrically connects the inner layer buildup layer and the outer layer buildup layer. According to an exemplary embodiment of the present disclosure, the via  260  may be formed of copper. However, a material forming the via  260  is not limited to copper. That is, the material forming the via  260  may be possible if the material is a conductive material used in the circuit board field. 
         [0035]    According to an exemplary embodiment of the present disclosure, the insulating coating layer  270  is formed between the first insulating layer  230 , the second insulating layer  250 , the metal layer  240 , and the via  260 . The insulating coating layer  270  is formed to insulate between the via  260  and the metal layer  240 . The insulating coating layer  270  prevents residues of the first insulating layer  230  and the second insulating layer  250  that occur when forming a via hole (not shown) for the via  260  or a defect caused by a burr. In this regard, the insulating coating layer  270  is not formed between the via  260  and the inner layer buildup layer or the outer layer buildup layer for an electrical connection between the via  260  and the inner layer buildup layer or the outer layer buildup layer. 
         [0036]    According to an exemplary embodiment of the present disclosure, the insulating coating layer  270  is formed of complex polymer resin usually used as an interlayer insulating material. For example, the insulating coating layer  270  may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. However, the materials forming the insulating coating layer  270  in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulting materials used in the circuit board field may be applied to the insulating coating layer  270 . 
         [0037]    According to an exemplary embodiment of the present disclosure, the outer layer buildup layer is formed on the second insulating layer  250  and the via  260 . The outer layer buildup layer includes the outer layer circuit layer  280 . The outer layer circuit layer  280  includes an outer layer circuit pattern  281  and an external connection pad  282 . 
         [0038]    According to an exemplary embodiment of the present disclosure, the external connection pad  282  is a component electrically connected to the outside through an external connection terminal, etc. For example, the external connection terminal may be a solder ball. 
         [0039]    According to an exemplary embodiment of the present disclosure, the outer layer circuit layer  280  is formed of a conductive material. For example, the outer layer circuit layer  280  may be formed of copper. However, a material forming the outer layer circuit layer  280  is not limited to copper. That is, if a material is used as a conductive material for a circuit in the circuit board field, the material may be applied to the outer layer circuit layer  280  without restriction. 
         [0040]    The outer layer buildup layer is configured as the outer layer circuit layer  280  of one layer in  FIG. 2  but the configuration of the outer layer buildup layer is not limited thereto. For example, the outer layer buildup layer may be formed as the outer layer circuit layers  280  of multi layers and outer layer insulating layers (not shown) formed between the outer layer circuit layers  280  for insulating the outer layer circuit layers  280  from each other. 
         [0041]    According to an exemplary embodiment of the present disclosure, the solder resist layer  290  is formed on the outer layer buildup layer. The solder resist layer  290  is formed to prevent solder from being coated on the outer layer circuit pattern  281  or oxidized when a soldering process is performed. The solder resist layer  290  is formed to surround the outer layer circuit pattern  281  and expose the outer connection pad  282 . For example, the solder resist layer  290  is formed of a heat resisting sheath material. 
         [0042]    The printed circuit board  200  according to an exemplary embodiment of the present disclosure shields signal noise since the metal layer  240  performs a function of a ground layer. Thus, a stable signal transmission is possible between a circuit pattern formed on the printed circuit board  200  and an electronic component (not shown) connected to the printed circuit board  200  later. In the printed circuit board  200  according to an exemplary embodiment of the present disclosure, the via  260  passes through the metal layer  240  and is directly connected to the inner layer circuit layer  220  and the outer layer circuit layer  280 . Thus, a signal transfer distance between the inner layer circuit layer  220  and the outer layer circuit layer  280  is reduced, thereby improving performance of a signal transmission. 
         [0043]    Method of Manufacturing a Printed Circuit Board 
         [0044]      FIGS. 3 through 10  are exemplary diagrams for explaining a method of manufacturing a printed circuit board according to an exemplary embodiment of the present disclosure. 
         [0045]    Referring to  FIG. 3 , the board  210  on which an inner layer buildup layer is formed is prepared. 
         [0046]    The board  210  according to an exemplary embodiment of the present disclosure is complex polymer resin usually used as an interlayer insulating material. For example, the board  210  may manufacture a thinner printed circuit board  200  by employing prepreg. Alternatively, the board  210  may easily implement a fine circuit by employing ABF (Ajinomoto Build Up Film). In addition, the board  210  may use epoxy based resin such as FR4, BT (Bismaleimide Triazine), etc. but is not particularly limited thereto. The board  210  may be formed by using a copper clad laminate (CCL). The board  210  is configured as a single insulating layer in the exemplary embodiment of the present disclosure but the present disclosure is not limited thereto. That is, the board  210  may be configured as one or more insulating layers, a circuit layer, and a via. 
         [0047]    According to an exemplary embodiment of the present disclosure, the inner layer buildup layer may be formed on the board  210 . The inner layer buildup layer may include the inner layer circuit layer  220 . The inner layer circuit layer  220  may include the inner layer circuit pattern  221  and the via pad  222 . The via pad  222  is in contact with and is electrically connected to a via that is formed later. 
         [0048]    According to an exemplary embodiment of the present disclosure, the inner layer circuit layer  220  is formed of a conductive material. For example, the inner layer circuit layer  220  may be formed of copper. However, a material forming the inner layer circuit layer  220  is not limited to copper. That is, the material forming the inner layer circuit layer  220  may be applied without restriction if the material is used as a conductive material for a circuit in the circuit board field. The inner layer buildup layer is configured as the inner layer circuit layer  220  of one layer in  FIG. 3  but the configuration of the inner layer buildup layer is not limited thereto. For example, the inner layer buildup layer may be formed as the inner layer circuit layers  220  of multi layers and inner layer insulating layers (not shown) formed between the inner layer circuit layers  220  for insulating the inner layer circuit layers  220  from each other. 
         [0049]    Referring to  FIG. 4 , the insulating film  100  is prepared. 
         [0050]    According to an exemplary embodiment of the present disclosure, the insulating film  100  includes the first insulating material  110 , the second insulating material  130 , and the metal thin film  120 . 
         [0051]    According to an exemplary embodiment of the present disclosure, the first insulating material  110  and the second insulating material  130  are formed of complex polymer resin usually used as an interlayer insulating material. For example, the first insulating material  110  and the second insulating material  130  may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. The first insulating material  110  and the second insulating material  130  may be formed in the form of a film. However, the materials forming the first insulating material  110  and the second insulating material  130  and the shapes in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulting materials and shapes used in a circuit board field may be applied to the first insulating material  110  and the second insulating material  130 . 
         [0052]    According to an exemplary embodiment of the present disclosure, the metal thin film  120  is formed between the first insulating material  110  and the second insulating material  130 . The metal thin film  120  may be formed of metal such as copper, silver, nickel, etc. In the exemplary embodiment of the present disclosure, the metal thin film  120  may be formed of copper. However, a material forming the metal thin film  120  is not limited to copper. That is, the material forming the metal thin film  120  may be possible if the material is a metal material having conductivity. 
         [0053]    As such, the insulating film  100  according to an exemplary embodiment of the present disclosure has a structure in which the first insulating material  110 , the metal thin film  120 , and the second insulating material  130  are sequentially stacked. 
         [0054]    Referring to  FIG. 5 , an insulating film ( 100  of  FIG. 4 ) is stacked on an inner layer buildup layer. 
         [0055]    According to an exemplary embodiment of the present disclosure, the insulating film ( 100  of  FIG. 4 ) is pressurized after being positioned on the inner layer circuit layer  220  of the inner layer buildup layer. 
         [0056]    According to an exemplary embodiment of the present disclosure, a first insulating material ( 110  of  FIG. 4 ) of the insulating film ( 100  of  FIG. 4 ) formed on the inner layer buildup layer is the first insulating layer  230  of the printed circuit board  200 . A second insulating material ( 130  of  FIG. 4 ) of the insulating film ( 100  of  FIG. 4 ) formed on the inner layer buildup layer is the second insulating layer  250  of the printed circuit board  200 . The metal thin film  120  of the insulating film ( 100  of  FIG. 4 ) is the metal layer  240  of the printed circuit board  200  and functions as a ground layer. 
         [0057]    Referring to  FIG. 6 , the via hole  261  may be formed. 
         [0058]    The via hole  261  according to an exemplary embodiment of the present disclosure may pass through the first insulating layer  230 , the metal layer  240 , and the second insulating layer  250  and expose the via pad  222  of the inner layer buildup layer. According to an exemplary embodiment of the present disclosure, the via hole  261  may be formed by using a Yag laser drill. However, a method of forming the via hole  261  is not limited to using the Yag laser drill. The via hole  261  may be formed by using one of a router and laser drill. 
         [0059]    Referring to  FIG. 7 , the insulating coating layer  270  is formed. 
         [0060]    The insulating coating layer  270  according to an exemplary embodiment of the present disclosure is formed in an inner wall of the via hole  261  and the via pad  222  exposed by the via hole  261 . The insulating coating layer  270  is formed to insulate the metal layer  240  and a via ( 260  of  FIG. 9 ) that is to be formed in the via hole  261  later. 
         [0061]    The insulating coating layer  270  according to an exemplary embodiment of the present disclosure is formed of complex polymer resin usually used as an interlayer insulating material. For example, the insulating coating layer  270  may be formed of epoxy based resin such as prepreg, ABF (Ajinomoto Build Up Film), FR4, BT (Bismaleimide Triazine), etc. However, the materials forming the insulating coating layer  270  in the exemplary embodiment of the present disclosure are not limited as described above. That is, any insulting materials used in the circuit board field may be applied to the insulating coating layer  270 . 
         [0062]    The above-formed insulating coating layer  270  prevents residues of the first insulating layer  230  and the second insulating layer  250  that occur when forming the via hole  261  or a reliability degradation due to a defect caused by a burr. 
         [0063]    Referring to  FIG. 8 , the insulating coating layer  270  formed in the via pad  222  is removed. According to an embodiment of the present disclosure, the insulating coating layer  270  formed in the via pad  222  is removed for an electrical connection between the via pad  222  and a via ( 260  of  FIG. 9 ) formed in the via hole  261  later. For example, the insulating coating layer  270  may be removed by using a CO2 laser drill. However, a method of removing the insulating coating layer  270  is not limited to using the CO2 laser drill. The insulating coating layer  270  may be removed by applying one of methods of removing an insulating material known in the circuit board field. Insulating residues of the via pad  222  may be removed by further performing a desmear process after removing the insulating coating layer  270  by using a laser drill, etc. 
         [0064]    Referring to  FIG. 9 , the via  260  and the outer layer buildup layer are formed. 
         [0065]    According to an exemplary embodiment of the present disclosure, the via  260  is formed inside the via hole  261 . That is, the via  260  is formed to pass through the first insulating layer  230 , the second insulating layer  250 , and the metal layer  240 . According to an exemplary embodiment of the present disclosure, one surface of the via  260  is in contact with the inner layer circuit layer  220  of the inner layer buildup layer. Another surface of the via  260  is in contact with the outer layer circuit layer  280  of the outer layer buildup layer. The above-formed via  260  electrically connects the inner layer buildup layer and the outer layer buildup layer. According to an exemplary embodiment of the present disclosure, the via  260  may be formed of copper. However, a material forming the via  260  is not limited to copper. That is, the material forming the via  260  may be possible if the material is a conductive material. 
         [0066]    According to an exemplary embodiment of the present disclosure, the outer layer buildup layer is formed on the second insulating layer  250  and the via  260 . The outer layer buildup layer includes the outer layer circuit layer  280 . The outer layer circuit layer  280  includes an outer layer circuit pattern  281  and an external connection pad  282 . In this regard, the external connection pad  282  is a component electrically connected to the outside through an external connection terminal, etc. For example, the external connection terminal may be a solder ball. 
         [0067]    According to an exemplary embodiment of the present disclosure, the outer layer circuit layer  280  is formed of a conductive material. For example, the outer layer circuit layer  280  may be formed of copper. However, a material forming the outer layer circuit layer  280  is not limited to copper. That is, if a material is used as a conductive material for a circuit in the circuit board field, the material may be applied to the outer layer circuit layer  280  without restriction. 
         [0068]    According to an exemplary embodiment of the present disclosure, the via  260  and the outer layer circuit layer  280  may be simultaneously formed by using plating resist (not shown) or etching resist (not shown). The via  260  and the outer layer circuit layer  280  may be individually formed. The via  260  and the outer layer circuit layer  280  according to an exemplary embodiment of the present disclosure may be formed by using methods of forming a circuit pattern and a via known to the circuit board field. 
         [0069]    In the exemplary embodiment of the present disclosure, the outer layer circuit layer  280  of one layer is formed in the via  260 . However, the outer layer buildup layer is configured as the outer layer circuit layer  280  of one layer but the configuration of the outer layer buildup layer is not limited thereto. For example, the outer layer buildup layer may be formed as the outer layer circuit layers  280  of multi layers and outer layer insulating layers (not shown) formed between the outer layer circuit layers  280  for insulating the outer layer circuit layers  280  from each other. 
         [0070]    In the related art, processes of forming an insulating layer, exposure, development, etching, and plating need to be performed so as to form a ground layer. However, according to an exemplary embodiment of the present disclosure, the ground layer may be formed by only stacking the insulating film  100  in which the metal thin film  120  is interposed without a separate process. Thus, the method of manufacturing the printed circuit board  200  using the insulating film  100  according to an exemplary embodiment of the present disclosure reduces the number of processes compared to the related art. The method of manufacturing the printed circuit board  200  using the insulating film  100  according to an exemplary embodiment of the present disclosure may save cost expense owing to the reduction in the number of processes. 
         [0071]    The above-formed printed circuit board  200  shields signal noise since the metal layer  240  performs a function of the ground layer. Thus, a stable signal transmission is possible between a circuit pattern formed on the printed circuit board  200  and an electronic component (not shown) connected to the printed circuit board  200  later. In the printed circuit board  200  formed according to an exemplary embodiment of the present disclosure, the via  260  passes through the metal layer  240  and is directly connected to the inner layer circuit layer  220  and the outer layer circuit layer  280 . Thus, a distance of a signal transmission between the inner layer circuit layer  220  and the outer layer circuit layer  280  is reduced, thereby improving performance of the signal transmission. 
         [0072]    Referring to  FIG. 10 , the solder resist layer  290  is formed. 
         [0073]    The solder resist layer  290  according to an exemplary embodiment of the present disclosure is formed on the outer layer buildup layer. The solder resist layer  290  is formed to prevent solder from being coated on the outer layer circuit pattern  281  or oxidized when a soldering process is performed. The solder resist layer  290  is formed to surround the outer layer circuit pattern  281  and expose the outer connection pad  282 . For example, the solder resist layer  290  is formed of a heat resisting sheath material. 
         [0074]    Although the embodiments of the present disclosure have been disclosed for illustrative purposes, it will be appreciated that the present disclosure is not limited thereto, and those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the disclosure. 
         [0075]    Accordingly, any and all modifications, variations or equivalent arrangements should be considered to be within the scope of the disclosure, and the detailed scope of the disclosure will be disclosed by the accompanying claims.