Abstract:
The invention relates to a method for operating an electronically controlled inverter, said method being characterized in that the inverter is controlled during the positive half-wave of the output alternating voltage in such a way that it operates as a step-up converter/step-down converter cascade, and during the negative half-wave of the output alternating voltage in such a way that it operates as a CUK converter.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
     This application is the US National Stage of International Application No. PCT/EP2005/005394, filed May 18, 2005 and claims the benefit thereof. The International Application claims the benefits of Austrian Patent application No. A994/2004 filed Jun. 8, 2004. All of the applications are incorporated by reference herein in their entirety. 
     FIELD OF INVENTION 
     The invention relates to a method for operating an electronically controlled inverter and to an arrangement for executing the method. 
     BACKGROUND OF THE INVENTION 
     Electronically controlled inverters are for example known from US-Z.: C. M. Penalver, et al “Microprocessor Control of DC/AC Static Converters”; IEEE Transactions on industrial Electronics, Vol. IE-32, No. 3, 1985, P. 186-191. They are used for example in solar power systems to transform the direct current created by the solar cells in such as way as to enable it to be fed into the public AC power network. Only in this way is a practically unrestricted use of solar-produced energy guaranteed. 
     One of the results of the plurality of applications for inverters has been the development of basic derivative types of step-up converters, step-up/step-down converters and step-down converters for specific applications. An article published in the periodical EDN dated 17 Oct. 2002 “Slave converters power auxiliary outputs”, Sanjaya Maniktala is cited here as an example in which different possible combinations of basic inverter types are described. 
     SUMMARY OF INVENTION 
     The object of the invention is to further develop the inverters known from the prior art. 
     In accordance with the invention the object is achieved with a method of the type mentioned at the start, in which the inverter is controlled during the positive half-wave of the output alternating voltage in such a way that it operates as a step-up converter/step-down converter cascade and in which the inverter is controlled during the negative half-wave of the output alternating voltage in such a way that it operates as a CUK converter. 
     The inventive combination of the functions of step-up/step-down converter and CUK converter result in an especially low-loss inverter which is thus highly efficient and is therefore particularly suited for use in solar systems. 
     It is advantageous for a single-phase inverter with two direct current terminals, two alternating current terminals and a number of semiconductor switches controlled by microcontrollers to be provided as an inverter. 
     It is advantageous for the inverter to include a first limiting choke, of which the first side is connected to the positive pole of a direct current source and of which the second side is connected via a first semiconductor switch to the negative pole of the direct current source, for the second side of the first choke to be connected via the series circuit of a second semiconductor switch and of a third semiconductor switch to the first terminal of a second choke of which the second terminal is connected to a first terminal of an alternating current output, for the connection of second and third semiconductor switch to be connected via a first capacitor and a fifth semiconductor switch to the second terminal of the alternating current output, for the negative pole of the direct current source to be connected to the second terminal of the alternating current output and for the connection of first capacitor and fifth semiconductor switch to be connected via a fourth semiconductor switch to the first terminal of the second choke. 
     It is also especially advantageous, during the positive half-wave of the output alternating voltage for the first, second, third and fourth semiconductor to be pulsed and the fifth semiconductor switch to be permanently switched on by means of microcontrollers, and for first and second semiconductor switches as well as third and fourth semiconductor switches to be switched in the opposing phase in each case and, during the negative half-wave of the output alternating voltage, for the first and fifth semiconductor switches to be switched pulsed in the opposing phase, and in this period for the second and the fourth semiconductor switches to be permanently switched on and the third semiconductor switch to be permanently switched off. 
     With an inverter for executing the inventive method it is useful for a microcontroller to be provided which is appropriately programmed for controlling the semiconductor switches. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The invention is explained in greater detail with reference to Figures. The Figures typically show: 
         FIG. 1  the circuit diagram of a typical inverter  FIG. 2  the circuit diagram of a typical inverter when MOSFETs are used. 
         FIGS. 3 ,  4 ,  5  and  6  current flow and switching states in a typical inverter during the positive half-wave of the output alternating current, 
         FIGS. 7 and 8  current flow and switching states in a typical inverter during the negative half-wave of the output alternating current, as well as 
         FIGS. 9 and 10  the timing of typical activation signals AS for the semiconductor switches. 
     
    
    
     DETAILED DESCRIPTION OF INVENTION 
     The inverter shown in the figures comprises a first limiting choke L 1 , of which the first side is connected to the positive pole of a direct current source U IN  and of which the second side is connected via a first semiconductor switch S 1  to the negative pole of the direct current source U IN .
         The second side of the first choke L 1  is connected via the series circuit of a second and of a third semiconductor switch S 2 , S 3  to the first terminal of a second choke L 2 , of which the second terminal is connected to a first terminal of an alternating current output U OUT . The connection of second and third semiconductor switch S 2 , S 3  is connected via a first capacitor Cc and a fifth semiconductor switch S 5  to the second terminal of the alternating current output U mains , a connection is also provided between the negative pole of the direct current source and the second terminal of the alternating current output and the common point of first capacitor C C  and fifth semiconductor switch S 5  is connected via a fourth semiconductor switch S 4  to the first terminal of the second choke L 2 . A second capacitor C i  is connected to the direct current source U IN  and a third capacitor C o  is connected to the alternating current output U OUT . Furthermore, the semiconductors S 1 , S 2 , S 3 , S 4  and S 5  are controlled by a microcontroller M.       

     When n-channel barrier layer MOSFETs are used as semiconductor switches S 1 , S 2 , S 3 , S 4 , S 5 , the direction of installation should be noted, indicated in  FIG. 2  by the diode symbol shown as a dashed outline. 
     In this embodiment of the invention the use of a diode D 1  is worthwhile, of which the function can however also be implemented by a corresponding activation of the semiconductor switches. 
     The semiconductor switches are activated by microcontrollers (not shown). 
     In this case, in accordance with the invention, the output alternating current of the first, second, third and fourth semiconductor switches S 1 , S 2 , S 3 , S 4  is pulsed during the positive half-wave and the fifth semiconductor switch S 5  is permanently switched on, with first and second semiconductor switches S 1 , S 2  and also third and fourth semiconductor switches S 3 , S 4  being switched in the opposing phase in each case. During the negative half-wave of the output alternating current first and fifth semiconductor switches S 1 , S 5  are switched pulsed in the opposing phase and the second and the fourth semiconductor switches S 2 , S 4  are permanently switched on. The third semiconductor switch S 3  is permanently switched off during this period. 
       FIG. 3  in this case shows the state in which the inverter accepts electrical energy from the direct current source U IN  during a positive half-wave of the output voltage. To this end the first semiconductor switch S 1  is closed and thereby a current path established between the positive pole of the direct current source U IN  via the first choke L 1  and the first semiconductor switch S 1 . 
     In this state the first choke L 1  stores energy, which, as shown in  FIG. 4 , is output after the opening of the first semiconductor switch S 1 , with the second and third semiconductor switches S 2 , S 3 , now closed via the second choke L to the alternating current output U OUT . 
     The circuit produced here runs from the positive pole of the direct current source U IN  via the first choke L 1 , the second and the third semiconductor switches S 2 , S 3  via the second choke L 2  to the alternating current output U OUT  and via the alternating current network to the negative pole of the direct current source U IN . The second choke L 2  stores energy in this case. At the same time the first capacitor C C  is charged as a result of the fact that the fifth semiconductor switch S 5  is also closed. 
     In the next switching process—as shown in FIG.  5 —the third semiconductor switch S 3  is opened and the fourth semiconductor switch S 4  is closed. 
     A circuit is formed via the second choke L 2 , the alternating current network U OUT , and the fifth and the fourth semiconductor switch S 5 , S 4 , with the second choke outputting the stored energy to the alternating current network U OUT . 
     At the same time a further circuit runs from the positive pole of the direct current source U IN  via the first choke L 1 , the second semiconductor switch S 2  via the first capacitor C C  and the fifth semiconductor switch S 5  to the negative pole of the direct current source U IN . 
     With the switching state shown in  FIG. 6  a switching cycle is concluded during the positive half-wave. 
     The first semiconductor switch S 1  is closed and thereby a current path is produced between the positive pole of the direct current source U IN  via the first choke L 1  and the first semiconductor switch S 1 . The inverter accepts electrical energy from the direct current source U IN . 
     Simultaneously the second choke L 2  issues energy to the alternating current network U OUT  since the corresponding circuit is still closed via the fifth and the fourth semiconductor switch S 5 , S 4 , which is only interrupted on opening of the fourth semiconductor switch S 4 , whereby the switching state shown in  FIG. 4  is also reached again. 
     The switching states during the negative half-wave of the output alternating current are now explained with reference to  FIG. 7  and  FIG. 8 . As can also be seen from  FIG. 9  and  FIG. 10 , the first and the fifth semiconductor switches S 1 , S 5  are switched pulsed in the opposing phase, the second and the fourth semiconductor switches S 2 , S 4  are permanently switched on and the third semiconductor switch (S 3 ) is permanently switched off. This means that in accordance with the invention the function of what is known as a CUK converter is executed during the negative half-wave of the output alternating current. 
       FIG. 7  shows the situation in which first, second and fourth semiconductor switch S 1 , S 2 , S 4  are closed and third and fifth semiconductor switch S 3 , S 5  are opened. A current path is formed between the positive pole of the direct current source U IN  via the first choke L 1  and the first semiconductor switch S 1 , and a second current path via the second choke L 2 , fourth semiconductor switch S 4 , first capacitor Cc, and also second and first semiconductor switch S 2 , S 1  and the output alternating current network U OUT . 
     In the next switching process—as shown in FIG.  8 —the first semiconductor switch S 1  is opened and the fifth semiconductor switch S 5  is closed in the opposing phase. 
     The circuits thus produced run on the one hand from the positive pole of the direct current source U IN  via the first choke L 1 , the second semiconductor switch S 2  via the first capacitor C C  and the fifth semiconductor switch S 5  to the negative pole of the direct current source U IN  and on the other hand via the second choke L 2 , the fourth and the fifth semiconductor switch S 4 , S 5 , the alternating current network U OUT . 
       FIG. 9  and  FIG. 10  each show the typical sequence of the activation signals for the semiconductor switches S 1 , S 2 , S 3 , S 4  and S 5  respectively, with the two Figures showing different conceivable switching variants during the period of the positive half-wave of the output alternating voltage.