Abstract:
A flexible circuit is populated with integrated circuits. Integrated circuits populated on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. In a preferred embodiment, the overall module profile does not, consequently, include the thickness of the substrate. Other embodiments may only populate one side of the flexible circuit or may only remove enough substrate material to reduce but not eliminate the entire substrate contribution to overall profile. The flex circuit may be aligned using tooling holes in the flex circuit and substrate. The flexible circuit may exhibit one or two or more conductive layers, and may have changes in the layered structure or have split layers. Other embodiments may stagger or offset the ICs.

Description:
RELATED APPLICATIONS 
     This application is a continuation-in-part of U.S. patent application Ser. No. 10/934,027, filed Sep. 3, 2004. U.S. patent application Ser. No. 10/934,027 has been incorporated by reference herein. 
    
    
     FIELD 
     The present invention relates to systems and methods for creating high density circuit modules. 
     BACKGROUND 
     The well-known DIMM (Dual In-line Memory Module) board has been used for years, in various forms, to provide memory expansion. A typical DIMM includes a conventional PCB (printed circuit board) with memory devices and supporting digital logic devices mounted on both sides. The DIMM is typically mounted in the host computer system by inserting a contact-bearing edge of the DIMM into a card edge connector. Systems that employ DIMMs provide, however, very limited profile space for such devices and conventional DIMM-based solutions have typically provided only a moderate amount of memory expansion. 
     There are several known methods to improve the limited capacity of a DIMM or other circuit board. In one strategy, for example, small circuit boards (daughter cards) are connected to the DIMM to provide extra mounting space. The additional connection may cause, however, flawed signal integrity for the data signals passing from the DIMM to the daughter card and the additional thickness of the daughter card(s) increases the profile of the DIMM. 
     Multiple die packages (MDP) are also used to increase DIMM capacity while preserving profile conformity. This scheme increases the capacity of the memory devices on the DIMM by including multiple semiconductor die in a single device package. The additional heat generated by the multiple die typically requires, however, additional cooling capabilities to operate at maximum operating speed. Further, the MDP scheme may exhibit increased costs because of increased yield loss from packaging together multiple die that are not fully pre-tested. 
     Stacked packages are yet another strategy used to increase circuit board capacity. This scheme increases capacity by stacking packaged integrated circuits to create a high-density circuit module for mounting on the circuit board. In some techniques, flexible conductors are used to selectively interconnect packaged integrated circuits. Staktek Group L.P. has developed numerous systems for aggregating CSP (chipscale packaged) devices in space saving topologies. The increased component height of some stacking techniques may alter, however, system requirements such as, for example, required cooling airflow or the minimum spacing around a circuit board on its host system. 
     What is needed, therefore, are methods and structures for providing high capacity circuit boards in thermally efficient, reliable designs that perform well at higher frequencies but still approach profile minimums. 
     SUMMARY 
     A flexible circuit is populated with integrated circuits. Integrated circuits populated on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. In a preferred embodiment, the overall module profile does not, consequently, include the thickness of the substrate. Other embodiments may only populate one side of the flexible circuit or may only remove enough substrate material to reduce but not eliminate the entire substrate contribution to overall profile. The flex circuit may be aligned using tooling holes in the flex circuit and substrate. The flexible circuit may exhibit one or two or more conductive layers, and may have changes in the layered structure or have split layers. Other embodiments may stagger or offset the ICs. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  depicts a contact-bearing first side of a flex circuit devised in accordance with a preferred embodiment of the present invention. 
         FIG. 2  depicts the second side of the flex circuit of  FIG. 1 . 
         FIG. 3  depicts a cross-sectional view of a module assembly devised in accordance with a preferred embodiment of the present invention. 
         FIG. 4  is an enlarged view of the area marked “A” in  FIG. 3 . 
         FIG. 5  is an enlarged view of a portion of one preferred embodiment. 
         FIG. 6  depicts an exemplar contact-bearing first side of a flex circuit devised in accordance with a preferred embodiment of the present invention. 
         FIG. 7  depicts the second side of the flex circuit of  FIG. 6 . 
         FIG. 8  depicts an exemplar substrate formed to be employed with the exemplar flex circuit depicted in  FIGS. 6 and 7 . 
         FIG. 9  depicts a view along the line A-A shown in  FIG. 8  with flex circuit  12  combined with substrate  14 . 
         FIG. 10  is another depiction of a relationship between flex circuit  12 , and a substrate  14  which has been patterned or window in accordance with a preferred embodiment. 
         FIG. 11  depicts exemplar substrate  14  employed in  FIG. 10  before being combined with populated flex circuit  12  as viewed along a line through windows  250  of substrate  14 . 
         FIG. 12  depicts from another perspective the substrate depicted in  FIG. 11 . 
         FIG. 13  depicts another embodiment having thinned portions of the substrate. 
         FIG. 14  depicts yet another embodiment of the present invention. 
         FIG. 15  depicts another embodiment of the invention having additional ICs. 
         FIG. 16  depicts yet another embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
       FIGS. 1 and 2  depict opposing sides  8  and  9 , respectively, of a preferred flex circuit  12  (“flex”, “flex circuitry”, “flexible circuit”) used in constructing a module according to an embodiment of the present invention. Flex circuit  12  is preferably made from one or more conductive layers supported by one or more flexible substrate layers as further described with reference to later Figs. The construction of flex circuitry is known in the art. The entirety of the flex circuit  12  may be flexible or, as those of skill in the art will recognize, the flexible circuit structure  12  may be made flexible in certain areas to allow conformability to required shapes or bends, and rigid in other areas to provide rigid and planar mounting surfaces. Preferred flex circuit  12  has openings  17  for use in aligning flex circuit  12  to substrate  14  during assembly. 
     ICs  18  on flexible circuit  12  are, in this embodiment, chip-scale packaged memory devices. For purposes of this disclosure, the term chip-scale or “CSP” shall refer to integrated circuitry of any function with an array package providing connection to one or more die through contacts (often embodied as “bumps” or “balls” for example) distributed across a major surface of the package or die. CSP does not refer to leaded devices that provide connection to an integrated circuit within the package through leads emergent from at least one side of the periphery of the package such as, for example, a TSOP. 
     Embodiments of the present invention may be employed with leaded or CSP devices or other devices in both packaged and unpackaged forms but where the term CSP is used, the above definition for CSP should be adopted. Consequently, although CSP excludes leaded devices, references to CSP are to be broadly construed to include the large variety of array devices (and not to be limited to memory only) and whether die-sized or other size such as BGA and micro BGA as well as flip-chip. As those of skill will understand after appreciating this disclosure, some embodiments of the present invention may be devised to employ stacks of ICs each disposed where an IC  18  is indicated in the exemplar Figs. 
     Multiple integrated circuit die may be included in a package depicted as a single IC  18 . While in this embodiment memory ICs are used to provide a memory expansion board or module, and various embodiments may include a variety of integrated circuits and other components. Such variety may include microprocessors, FPGA&#39;s, RF transceiver circuitry, digital logic, as a list of non-limiting examples, or other circuits or systems which may benefit from a high-density circuit board or module capability. Circuit  19  depicted between ICs  18  may be a memory buffer or controller. 
     The depiction of  FIG. 1  shows two pluralities of ICs  18  along side  8  of flex circuit  12 , the pluralities or sets of ICs being referenced in  FIG. 1  as IC R1  and IC R2 . Contact arrays are disposed beneath ICs  18  and circuits  19  to provide conductive pads for interconnection to the ICs  18 . An exemplar contact array  11 A is shown as is exemplar IC  18  to be mounted at contact array  11 A as depicted. The contact arrays  11 A that correspond to an IC row (e.g., IC R1 ) may be considered a contact array set. Between the rows IC R1  and IC R2  of ICs  18 , flex circuit  12  has two rows (C R1  and C R2 ) of module contacts  20 . When flex circuit  12  is folded as depicted in later  FIGS. 3 and 4 , side  8  depicted in  FIG. 1  is presented at the outside of module  10 . The opposing side  9  of flex circuit  12  ( FIG. 2 ) is on the inside in the configurations of  FIGS. 3 and 4 . Other embodiments may have other numbers of rows and there may be only one such row. 
       FIG. 2  depicts another two pluralities of ICs  18  along side  9  of flex circuit  12  referenced as IC R3  and IC R4 . Various discrete components such as termination resistors, bypass capacitors, and bias resistors may also be mounted on each of sides  8  and  9  of flex  12 . Such discrete components are not shown to simplify the drawing. Flex circuit  12  may also depicted with reference to its perimeter edges, two of which are typically long (PE long1  and PE long2 ) and two of which are typically shorter (PE short1  and PE short2 ) Other embodiments may employ flex circuits  12  that are not rectangular in shape and may be square in which case the perimeter edges would be of equal size or other convenient shape to adapt to manufacturing particulars. However, rectangular shapes for flex circuit  12  assist in providing a low profile for a preferred module devised with use of flex circuit  12 . 
       FIG. 1  depicts exemplar conductive traces  21  connecting rows C R1  and C R2  of module contacts  20  to ICs  18 . Only a few exemplar traces are shown to simplify the drawing. Traces  21  may also connect to vias that may transit to other conductive layers of flex  12  in certain embodiments having more than one conductive layer. Shown is a via  23  connecting a signal trace from circuit  19  to a trace  25  disposed on another conductive layer of flex  12  as illustrated by the dotted line of trace  25 . In a preferred embodiment, vias connect ICs  18  on side  9  of flex  12  ( FIG. 2 ) to module contacts  20 . Traces  21  and  25  may make other connections between the ICs on either side of flex  12  and may traverse the rows of module contacts  20  to interconnect ICs. Together the various traces and vias make interconnections needed to convey data and control signals to the various ICs. Those of skill will understand that the present invention may be implemented with only a single row of module contacts  20  and may, in other embodiments be implemented as a module bearing ICs on only one side of flex circuit  12  or with fewer or greater numbers of ICs  18  or rows of ICs  18 . 
       FIG. 3  is a cross section view of a module  10  devised in accordance with a preferred embodiment of the present invention. Module  10  is populated with ICs  18  having top surfaces  18   T  and bottom surfaces  18   B . Substrate  14  or support structure has first and second perimeter edges  16 A and  16 B appearing in the depiction of  FIG. 3  as ends. Substrate or support structure  14  typically has first and second lateral sides S 1  and S 2 . Flex  12  is wrapped about perimeter edge  16 A of substrate  14 , which in the depicted embodiment, provides the basic shape of a common DIMM board form factor such as that defined by JEDEC standard MO-256. Those of skill will recognize that transitting flex circuit  12  about support structure or substrate  14  as depicted separates a first set of CSPs from a second set of CSPs based upon which lateral side of substrate  14  with which the CSPs are then associated. 
     The inner pair of the four depicted ICs  18  pass through windows  250  in substrate  14  as shown in later Figs. in further detail and the inner ICs  18  are preferably attached to each other&#39;s upper surfaces  18   T  with a thermally conductive adhesive  30 . While in this embodiment, the four depicted ICs are attached to flex circuit  12  in opposing pairs, fewer or greater numbers of ICs may be connected in other arrangements such as, for example, staggered or offset arrangements they may exhibit preferred thermal characteristics. Further, while only CSP packaged ICs are shown, other ICs and components may be employed such as leaded devices. In a preferred embodiment, ICs  18  will be memory CSPs and various discrete components such as, for example, resistors and capacitors will also be mounted on flex circuit  12 . To simplify the drawing, the discrete components are not shown. 
     In this embodiment, flex circuit  12  has module contacts  20  positioned in a manner devised to fit in a circuit board card edge connector or socket and connect to corresponding contacts in the connector (not shown). While module contacts  20  are shown protruding from the surface of flex circuit  12 , other embodiments may have flush contacts or contacts below the surface level of flex  12 . Substrate  14  supports module contacts  20  from behind flex circuit  12  in a manner devised to provide the mechanical form required for insertion into a socket. In other embodiments, the thickness or shape of substrate  14  in the vicinity of perimeter edge  16 A may differ from that in the vicinity of perimeter edge  16 B. Substrate  14  in the depicted embodiment is preferably made of a metal such as aluminum or copper, as non-limiting examples, or where thermal management is less of an issue, materials such as FR4 (flame retardant type 4) epoxy laminate, PTFE (poly-tetra-fluoro-ethylene) or plastic. In another embodiment, advantageous features from multiple technologies may be combined with use of FR4 having a layer of copper on both sides to provide a substrate  14  devised from familiar materials which may provide heat conduction or a ground plane. 
       FIG. 4  is an enlarged view of the area marked ‘A’ in  FIG. 3 . Edge  16 A of substrate  14  is shaped like a male side edge of an edge card connector. While a particular oval-like configuration is shown, edge  16 A may take on other shapes devised to mate with various connectors or sockets. The form and function of various edge card connectors are well know in the art. In many preferred embodiments, flex  12  is wrapped around edge  16 A of substrate  14  and may be laminated or adhesively connected to substrate  14  with adhesive  30 . The depicted adhesive  30  and flex  12  may vary in thickness and are not drawn to scale to simplify the drawing. The depicted substrate  14  has a thickness such that when assembled with the flex  12  and adhesive  30 , the thickness measured between module contacts  20  falls in the range specified for the mating connector. In some other embodiments, flex circuit  12  may be wrapped about perimeter edge  16 B or both perimeter edges  16 A and  16 B of substrate  14 . In other instances, multiple flex circuits may be employed or a single flex circuit may connect one or both sets of contacts  20  to the resident ICs. 
       FIG. 5  is an enlarged view of a portion of one preferred embodiment showing lower IC  18   1  and upper IC  18   2 . In this embodiment, conductive layer  66  of flex circuit  12  contains conductive traces connecting module contacts  20  to BGA contacts  63  on ICs  18   1  and  18   2 . The number of layers may be devised in a manner to achieve the bend radius required in those embodiments that bend flex circuit  12  around edge  16 A ( FIG. 4 ) or  16 B, for example. The number of layers in any particular portion of flex circuit  12  may also be devised to achieve the necessary connection density given a particular minimum trace width associated with the flex circuit technology used. Some flex circuits  12  may have three or four or more conductive layers. Such layers may be beneficial to route signals for applications such as, for example, a FB-DIMM (fully-buffered DIMM) which may have fewer DIMM input/output signals than a registered DIMM, but may have more interconnect traces required among devices on the DIMM, such as, for example, the C/A copy A and C/A copy B (command/address) signals produced by an FB-DIMM advanced memory buffer (AMB). 
     In this embodiment, there are three layers of flex circuit  12  between the two depicted ICs  18   1  and  18   2 . Conductive layers  64  and  66  express conductive traces that connect to the ICs and may further connect to other discrete components (not shown). Preferably, the conductive layers are metal such as, for example, copper or alloy  110 . Vias such as the exemplar vias  23  connect the two conductive layers  64  and  66  and thereby enable connection between conductive layer  64  and module contacts  20 . In this preferred embodiment having a three-layer portion of flex circuit  12 , the two conductive layers  64  and  66  may be devised in a manner so that one of them has substantial area employed as a ground plane. The other layer may employ substantial area as a voltage reference plane. The use of plural conductive layers provides advantages and the creation of a distributed capacitance intended to reduce noise or bounce effects that can, particularly at higher frequencies, degrade signal integrity, as those of skill in the art will recognize. If more than two conductive layers are employed, additional conductive layers may be added with insulating layers separating conductive layers. Portions of flex circuit  12  may in some embodiments be rigid portions (rigid-flex). Construction of rigid-flex circuitry is known in the art. 
     With the construction of an embodiment such as that shown in  FIG. 5 , thermal energy will be urged to move between the respective ICs  18   1 . Thus, the ICs become a thermal mass sharing the thermal load. Flex circuit  12  may be particularly devised to operate as a heat spreader or sink adding to the thermal conduction out of ICs  18   1  and  18   2 . 
       FIG. 6  depicts an exemplar contact-bearing first side of a flex circuit devised in accordance with a preferred embodiment of the present invention. As those of skill will understand, the depiction of  FIG. 6  is simplified to show more clearly the principles of the invention but depicts fewer ICs  18  than would typically be presented on a flex circuit  12  devised for use in embodiments of the present invention. An embodiment with more ICs  18  is shown in  FIG. 1 . The principles of the present invention may, however, be employed where only one IC  18  is resident on a side of a flex circuit  12  or where multiple rows or sets of ICS are resident on a side of flex circuit  12 . 
       FIG. 7  depicts the second side of the flex circuit of  FIG. 6 .  FIG. 7 , in the interests of clarity, illustrates the embodiment with fewer ICs  18  than would typically be employed in an actual embodiment of the invention devised in accord with the principles described herein. 
       FIG. 8  depicts an exemplar substrate formed to be employed with the exemplar flex circuit depicted in  FIG. 7 . The second side  9  of flex circuit  12  shown in  FIG. 7  is folded about substrate  14  shown in  FIG. 8  to place ICs  18  into the windows  250  arrayed along substrate  14 . This results in ICs along rows ICR 3  and ICR 4  being disposed back to back within windows  250 . Preferably, a thermally conductive adhesive or glue is used on the upper sides of ICs  18  to encourage thermal energy flow as well as provide some mechanical advantages. Those of skill will recognize that in this embodiment, where  FIG. 6  depicts the first or, in this case, the outer side of the flex circuit once combined with substrate  14 , the flex circuit itself will have staggered mounting arrays  11 A on side  8  of flex circuit  12  relative to side  9  of flex circuit  12 . This is merely one relative arrangement between ICs  18  on respective sides of substrate  14 . 
       FIG. 9  depicts a view along the line A-A shown in  FIG. 8  with flex circuit  12  combined with substrate  14 . As shown in  FIG. 8 , ICs  18  which are on second side  9  (which in this depiction is the inner side with respect to the module  10 ) of populated flex circuit  12  are disposed in windows  250  so that the upper surfaces  18   T  of ICs  18  of row ICR 3  are in close proximity with the upper surfaces  18   T  of ICs  18  of row ICR 4 . Thus, these first and second groups of ICs (CSPs in the depiction) are positioned in the cutaway areas of the first and second lateral sides, respectively, of substrate  14 . In this case, the cutaway areas on each lateral side of substrate  14  are in spatial coincidence to create windows  250 . Those of skill will recognize that the depiction is not to scale but representative of the interrelationships between the elements and the arrangement results in a profile “P” for module  10  that is significantly smaller than it would have been without fitting ICs  18  along inner side  9  of flex circuit  12  into windows  250 . Profile P in this case is approximately the sum of the distances between the upper and lower surfaces of IC  18  plus 4× the diameter of the BGA contacts  63  plus 2× the thickness of flex circuit  12  in addition to any adhesive layers  30  employed to adhere one IC  18  to another. This profile dimension will vary depending upon whether BGA contacts  63  are disposed below the surface of flex circuit  12  to reach an appropriate conductive layer or contacts which typically are a part of flex circuit  12 . 
       FIG. 10  is another depiction of the relationship between flex circuit  12 , and a substrate  14  which has been patterned or windowed with cutaway areas. The view of  FIG. 10  is taken along a line that would intersect the bodies of ICs  18 . In  FIG. 10 , as those of skill will recognize, ICs  18  that comprise row or group ICR 3  are staggered relative to those that comprise row or group ICR 4  of second side  9  of flex circuit  12  when module  10  is assembled and flex circuit  12  is combined with substrate  14 . This staggering may result in some construction benefits providing a mechanical “step” for ICs  18  as they are fitted into substrate  14  and may further provide some thermal advantages increasing the contact area between substrate  14  and the plurality of ICs  18 . 
       FIG. 11  depicts exemplar substrate  14  employed in  FIG. 10  before being combined with populated flex circuit  12  as viewed along a line through windows  250  of substrate  14 . As depicted in  FIG. 11 , a number of cutaway areas or pockets are delineated with dotted lines and identified with references  250 B 3  and  250 B 4 , respectively. Those areas identified as  250 B 3  correspond, in this example, to the pockets, sites, or cutaway areas on one side of substrate  14  into which ICs  18  from ICR 3  of flex circuit  12  will be disposed when substrate  14  and flex circuit  12  are combined. Those pocket, sites, or cutaway areas identified as references  250 B 4  correspond to the sites into which ICs  18  from ICR 4  will be disposed. In alternate embodiments, there may be more than one row of ICs  18  disposed on a single side of substrate  14 . 
     For purposes herein, the term window may refer to an opening all the way through substrate  14  across span “S” which corresponds to the width or height dimension of packaged IC  18 , or it may also refer to that opening where cutaway areas on each of the two sides of substrate  14  overlap. 
       FIG. 12  depicts the substrate  14  previously depicted in  FIG. 11  along the line represented by C. Where cutaway areas  250 B 3  and  250 B 4  overlap, there are, as depicted, windows all the way through substrate  14 . In some embodiments, cutaway areas  250 B 3  and  250 B 4  may not overlap or in other embodiments, there may be pockets or cutaway areas only on one side of substrate  14 . Those of skill will recognize that cutaway areas such as those identified with references  250 B 3  and  250 B 4  may be formed in a variety of ways depending on the material of substrate  14  and need not literally be “cut” away but may be formed by a variety of molding, milling and cutting processes as is understood by those in the field. 
       FIG. 13  depicts another module having a thinned portion of substrate  14 . In this embodiment, substrate  14  has a first thickness  1  toward edge  16 A devised to provide support for an edge and surrounding area of module assembly  10  as may be needed for connection to a card edge connector. Above the portion of substrate  14  with thickness  1  is a portion  92  having thickness  2 . 
       FIG. 14  depicts another embodiment of the present invention. Depicted extension  112  of substrate  14  extends beyond the top of flex  12  and is shaped to provide additional surface area for convective cooling. Such shape may be achieved by methods such as, for example, milling or extrusion, which are both known in the art. Preferably, extruded aluminum is used for substrate  14  in this and similar embodiments. The embodiment depicted in  FIG. 14  employs two flex circuits  12 A and  12 B thus presenting an embodiment in which the flex circuit does not wrap about end  16 A of substrate  14 . The innermost ICs  18  are shown disposed in windows with their respective upper surfaces  18   T  connected with an adhesive  30  which is preferably thermally conductive. 
       FIG. 15  depicts another embodiment of the invention having additional ICs  18 . In this embodiment, four flex level transitions  26  connect to four mounting portions  28  of flex circuits  12 A 1 ,  12 A 2 ,  12 B 1 , and  12 B 2 . Each mounting portion  28  has ICs  18  on both sides. Flex circuitry  12  may also be provided in this configuration by, for example, having a split flex with layers interconnected with vias. As depicted, module  10  of  FIG. 15  exhibits eight (8) ICs  18  coincident with a single window site  250  in substrate  14 . Consequently, as those of skill will recognize, the possibilities for large capacity iterations of module  10  are magnified by such strategies and the same principles may be employed where the ICs  18  on one side of substrate  14  are staggered relative to those ICs  18  on the other side of substrate  14 . 
     Four flex circuits are employed in module  10  as depicted in  FIG. 15  and, although those embodiments that wrap flex circuit  12  about end  16 A of substrate  14  present manufacturing efficiencies, in some environments having flex circuitry separate from each other on respective sides S 1  and S 2  of substrate  14  may be desirable. 
       FIG. 16  depicts another embodiment in which flex circuit  12  connects ICs  18  fitted on respective sides into windows  250  and connected face to face with BGA contacts  63  facing each other on opposite sides of flex circuit  12  which is split at juncture  50  into flex circuits  12 S 1  and  12 S 2  that convey signals from ICs  18  to module contacts  20 . 
     One advantageous methodology for efficiently assembling a circuit module  10  such as described and depicted herein is as follows. In a preferred method of assembling a preferred module assembly  10 , flex circuit  12  is placed flat and both sides populated according to circuit board assembly techniques known in the art. Flex circuit  12  is then folded about end  16 A of substrate  14  as ICs  18  are fitted into respective cutout areas of substrate  14 . Tooling holes  17  may be used to align flex  12  to substrate  14 . Flex  12  may be laminated or otherwise attached to substrate  14 . 
     Although the present invention has been described in detail, it will be apparent to those skilled in the art that many embodiments taking a variety of specific forms and reflecting changes, substitutions and alterations can be made without departing from the spirit and scope of the invention. The described embodiments illustrate but do not restrict the scope of the claims.