Abstract:
An apparatus, method, and system for DC offset cancellation are provided herein. For instance, the apparatus can include a first commutating mixer switch and a second commutating mixer switch. The first commutating mixer switch can have a first input port configured to receive a first differential signal and a first differential output port. The second commutating mixer switch can have a second input port configured to receive a second differential offset signal and a second differential output port. The first and second differential output ports can be coupled to one another to provide a combined differential output signal.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application is a continuation of pending U.S. patent application entitled “DC Offset Calibration for a Radio Transceiver Mixer,” Ser. No. 11/414,296, filed May 1, 2006 (now allowed), which is a divisional of U.S. patent application entitled “DC Offset Calibration for a Radio Transceiver Mixer,” Ser. No. 09/858,812, filed May 15, 2001 (now U.S. Pat. No. 7,039,382), which are both incorporated herein by reference in their entireties. 
     
    
     BACKGROUND 
       [0002]    1. Field of Invention 
         [0003]    This invention relates in general to radio frequency (RF) transceivers and more particularly to mixers used in RF transceivers that provide DC offset calibration. 
         [0004]    2. Related Art 
         [0005]    An RF transceiver (transmitter/receiver) typically requires a frequency translation function, in which a signal is translated from one carrier frequency, ω 1 , to another frequency, ω 2 . The translation is carried out by what is known as a “mixer.” In effect, a mixer translates the center frequency, ω 1 , of a signal band, to a center frequency, ω 2 , by mixing the signal band with a local oscillator signal having a frequency of ω LO , where ω LO =(ω 1 −ω 2 . The mixing operation yields a first band centered around ω 2  and a second band centered around 2ω 1 −ω 2 . An appropriate filter is then typically employed to select the desired signal band centered around ω 2 . When ω 1 &gt;ω 2 , this operation is known in the art as downconversion mixing. On the other hand, when ω 1 &lt;ω 2 , the operation is known as upconversion mixing. 
         [0006]    Crols and M. S. J. Steyaert, “A 1.5 GHz Highly Linear CMOS Downconversion Mixer”,  IEEE J Solid - State Circuits,  vol. 30, pp. 736-742, July 1995 disclose a mixer design in which MOS transistors, operating in their linear region, are used as voltage-dependent resistors to modulate a signal. The impedance of the transistors in the linear region is controlled by the input signal to be modulated. Local oscillator signals are provided to the source/drain side of the transistors. There are certain weaknesses with this design, however. First, the linearity of the mixer is limited in that the impedance of the MOS transistors in the linear region become non-linear when the gate control voltage varies considerably. Second, the gain of the mixer is not well controlled, since it is difficult to match the impedance of the MOS transistors in the linear region to that of the resistor in the feedback loop of the amplifier. Finally, even if additional sets of MOS transistors are included for the DC offset cancellation path, mismatch of the transistors can be of a concern, especially if different signal path gains are to be implemented. 
         [0007]    A typical transceiver is subject to other known non-idealities, which can yield an undesirable output. One such non-ideality relates to a direct current (DC) component, which is often introduced into the input signal of an upconversion mixer. If the desired input signal is centered around DC, the extra DC component introduced into the input signal will corrupt the signal and degrade the signal quality. The DC component, after mixing with the local oscillator (LO), generates an undesired tone at ω LO  at the output of the mixer. 
         [0008]    Another example of non-ideality relates to LO feedthrough and self-mixing in a downconversion mixer, in which the LO signal is coupled into the input signal and subsequently is mixed with the LO itself in the mixer, producing an undesirable DC component. 
       BRIEF SUMMARY 
       [0009]    The present invention pertains to a mixer design for radio transceivers, which includes a calibration scheme for reducing DC offsets caused by various non-ideal effects in the transceiver. 
         [0010]    In a first aspect of the present invention a mixer for a radio transceiver comprises a commutating mixer switch having a first differential input port. The first differential input port includes a first terminal coupled to a first end of a first resistor and a second terminal coupled to a first end of a second resistor. Second ends of the first and second resistors are configured to receive a differential input signal. According to this aspect of the invention, a DC offset cancellation path may further comprise a third resistor having a first end coupled to the first terminal of the first differential input port, and a fourth resistor having a first end coupled to the second terminal of the first differential input port, such that second ends of the third and fourth resistors are configured to receive a DC calibration signal. 
         [0011]    In a second aspect of the invention, an image-reject mixer comprises a first commutating mixer switch having a first differential input port, a second differential input port for accepting a first local oscillator signal and a differential output port. A first resistor has a first end coupled to one of the terminals of the first differential input port of the first commutating mixer switch and has a second end. A second resistor having substantially the same resistance value as the first resistor has a first terminal coupled to the other terminal of the first differential input port and has a second end. A second commutating mixer switch has a first differential input port, a second differential input port for accepting a second local oscillator signal that is ninety degrees out of phase with the first oscillator signal and a differential output port. A third resistor having substantially the same resistance value as the first resistor has a first end coupled to one of the terminals of the first differential input port of the second commutating mixer switch and has a second end. A fourth resistor having substantially the same resistance value as the first resistor has a first end coupled to the other terminal of the first differential input port of the second commutating mixer switch and a second end. The second ends of the first and second resistors are configured to receive a first differential input signal, the second ends of the third and fourth resistors are configured to receive a second differential input signal that is ninety degrees out of phase with the first differential input signal, and the differential output port of the first commutating mixer switch is coupled to the differential output port of the second commutating mixer switch. 
         [0012]    In a third aspect of the present invention, an image-reject mixer comprises an in-phase commutating mixer switch, which receives a first resistively coupled differential input signal, and a quadrature phase commutating mixer switch, which receives a second resistively coupled differential input signal. The in-phase commutating mixer switch modulates the first resistively coupled input signal with a first local oscillator signal and the quadrature phase commutating mixer modulates the second resistively coupled input signal with a second local oscillator signal, which is ninety degrees out of phase with the first local oscillator signal. The in-phase commutating mixer switch has a differential output, which is coupled to a differential output of the quadrature commutating mixer switch. 
         [0013]    A further understanding of the nature and advantages of the inventions herein may be realized by reference to the remaining portions of the specification and the attached drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS/FIGURES 
         [0014]      FIG. 1  shows an exemplary image reject mixer, according to an embodiment of the present invention; 
           [0015]      FIG. 2  shows a commutating mixer switch, which can be used for each of the in-phase and quadrature phase commutating mixer switches in the image-reject mixer shown in  FIG. 1 ; 
           [0016]      FIG. 3A  shows the frequency spectrum of a baseband signal, which may be input into the exemplary image reject mixer shown in  FIG. 1 ; 
           [0017]      FIG. 3B  shows the frequency spectra of the output of the exemplary image reject mixer shown in  FIG. 1 , including a desired mixer output signal and a rejected image signal; 
           [0018]      FIG. 4A  shows the frequency spectrum of a baseband signal, which may be input into a modified version of the exemplary image reject mixer shown in  FIG. 1 ; 
           [0019]      FIG. 4B  shows the frequency spectra of the output of a modified version of the exemplary image reject mixer shown in  FIG. 1 , including a desired mixer output signal and a rejected image signal; and 
           [0020]      FIG. 5  shows an exemplary non-image reject mixer, according to an embodiment of the present invention; 
       
    
    
     DETAILED DESCRIPTION  
       [0021]    Referring to  FIG. 1 , there is shown an exemplary embodiment of an image reject mixer  10  according to an embodiment of the present invention. Resistors R 1  (each R 1  has the same resistance value) are configured to receive differential offset compensation signals, VI-dc and VQ-dc, and resistors R 3  (each R 3  has the same resistance value) are configured to receive main signals, VI-sig and VQ-sig, where “I” and “Q” indicate an in-phase channel and an quadrature phase channel, respectively. Unlike the prior art, with the use of the resistors, rather than reliance upon the on resistance of MOS transistors, the linearity of image-reject mixer  10  is superior. Resistors R 3  function to convert the signals VI-sig and VQ-sig into currents, and resistors R 1  function to convert VI-dc and VQ-dc into currents, which are summed at nodes  12 ,  14 ,  16  and  18 . Resistors R 1  are selected to provide a DC offset cancellation path. An in-phase commutating mixer switch  20  is configured to receive the differential current signal from nodes  12  and  14 , which are then modulated by an in-phase local oscillator signal, LO-I. Similarly, a quadrature phase commutating mixer switch  22  is configured to receive the differential current signal from nodes  16  and  18 , which are then modulated by a quadrature phase (i.e. 90 degrees out-of-phase) local oscillator signal, LO-Q. An exemplary embodiment of a commutating mixer switch, which can be used for each of the in-phase  20  and quadrature phase  22  commutating mixer switches, is shown in  FIG. 2 . 
         [0022]    As shown in  FIG. 1 , the differential outputs of in-phase  20  and quadrature phase  22  commutating mixer switches are connected together and input into an operational amplifier  24 . The positive end of the differential output of operational amplifier  24  is fed back to the inverting input of operational amplifier  24  and the negative end of the differential output of operational amplifier  24  is fed back to the non-inverting input of operational amplifier  24 . 
         [0023]    Each of the feedback loops of operational amplifier  24  contains a resistor R 2  (each R 2  has the same resistance value) and a MOS transistor M 5  (each M 5  has substantially the same physical and electrical characteristics). The gates of both MOS transistors M 5  are coupled to a power supply, VDD, so that they remain on and present themselves as resistive components. Also, the physical and material characteristics of both MOS transistors M 5  may be selected so that they provide an impedance match with the MOS transistors of commutating mixer switches  20  and  22  (e.g. MOS transistors M 1 -M 4  of the commutating mixer switch in  FIG. 2 ). Resistors R 2  in combination with resistors R 3  control the gain of the amplifier. Finally, an optional capacitor may be placed in parallel with each of the feedback loops containing the series combination of MOS transistor M 5  and resistor R 2  to form a first-order low-pass filter. 
         [0024]    Referring now to  FIG. 3A  there is shown an illustration of a signal band spectrum  300 , which may, for example, be mixed with (i.e. modulated by) the local oscillator signal, LO in the image reject mixer  10  in  FIG. 1 . FIG. B shows the output of the mixer, including a desired mixer output signal  310  and the rejected image signal  312 , which may be present due to non-perfect image rejection. 
         [0025]      FIGS. 4A and 4B  are similar to  FIGS. 3A and 3B  but correspond to a modified version (i.e. alternative embodiment) of the image reject mixer in  FIG. 1 , where the coupling of the differential output of quadrature phase commutating mixer switch  22  to the differential output of in-phase commutating mixer switch  20  is reversed such that the positive terminal of the differential output of quadrature phase commutating mixer switch  22  is coupled to the positive terminal of the differential output of in-phase commutating mixer switch  20  and the negative terminal of the differential output of quadrature phase commutating mixer switch  22  is coupled to the negative terminal of the differential output of in-phase commutating mixer switch  20 .  FIG. 4A  shows a diagrammatic illustration of a signal band spectrum  400 , which may, for example, be mixed with (i.e. modulated by) the local oscillator signal of the modified version of the image reject mixer in  FIG. 1 .  FIG. 3B  shows the output of the modified version of the image reject mixer in  FIG. 1 , including a desired mixer output signal  410  and the rejected image signal  412 , which may be present due to non-perfect image rejection. 
         [0026]    The mixer in  FIG. 1  is an image reject mixer. However, the present invention is not limited to image reject mixers. Indeed, the inventors of the present invention have contemplated that the DC offset calibration aspect of the present invention may apply to other non-image reject mixers just as well. Accordingly,  FIG. 5  shows an exemplary non-image reject mixer  50  having DC offset calibration, according to another embodiment of the present invention. Resistors R 4  (each R 4  has the same resistance value) are configured to receive a differential offset compensation signal, V-dc, and resistors R 5  (each R 5  has the same resistance value) are configured to receive a main signal, V-sig. Unlike the prior art, with the use of the resistors, rather than reliance upon the on resistance of MOS transistors, the linearity of mixer  50  is superior. Resistors R 5  function to convert main signal, V-sig, into currents, which are summed at nodes  52  and  54 . Resistors R 4  are selected to provide a DC offset cancellation path. A commutating mixer switch  56  is configured to receive the differential current signal from nodes  52  and  54 , which is then modulated by a local oscillator signal, LO. An exemplary embodiment of a commutating mixer switch, which can be used for commutating mixer switch  56 , is shown in  FIG. 2 . The differential output of commutating mixer switch  56  is coupled to the differential input of an operational amplifier  58 . The positive end of the differential output of operational amplifier  58  is fed back to the inverting input of operational amplifier  58  and the negative end of the differential output of operational amplifier  58  is fed back to the non-inverting input of operational amplifier  58 . Each of the feedback loops of operational amplifier  58  contains a resistor R 6  (each R 6  has the same resistance value) and a MOS transistor M 6  (each M 6  has substantially the same physical and electrical characteristics). The gates of both MOS transistors M 6  are coupled to a power supply, VDD, so that they remain on and present themselves as resistive components. Also, the physical and material characteristics of both MOS transistors M 6  may be selected so that they provide an impedance match with the MOS transistors of the commutating mixer switch  56  (e.g. MOS transistors M 1 -M 4  of the commutating mixer switch in  FIG. 2 ). Resistors R 6  in combination with resistors R 5  control the gain of the amplifier. Finally, an optional capacitor may be placed in parallel with each of the feedback loops containing the series combination of MOS transistor M 6  and resistor R 6  to form a first-order low-pass filter. 
         [0027]    As explained above, another non-ideality that may be present in radio transceivers, and which can produce an undesirable DC component, is LO self mixing. According to another aspect of the present invention, therefore, a mixer having DC offset calibration for compensating for a DC component attributable to LO self mixing is provided. Both  FIG. 1  and  FIG. 5  may be modified to provide exemplary circuits capable of providing compensation for LO self mixing. 
         [0028]    For example, the modification of  FIG. 1  would entail substituting VI-dc with VI-LO and VQ-dc with VQ-LO, where VI-LO and VQ-LO are derived from the local oscillator signals, LO-I and LO-Q, respectively. To determine the DC components attributable to LO self mixing, each of the differential inputs can shorted and the output of the mixer measured, with LO-I and LO-Q alternately applied to the commutating mixer switch  66 . Information provided by this measurement can be used to set the amplitude and/or phase of VI-LO and/or VQ-LO to compensate for any DC component added to the output due to LO self mixing. 
         [0029]    Modification of the non-image reject mixer shown in  FIG. 5  would be similar. In this case, V-dc would be replaced with V-LO. To determine the DC component attributable to LO self mixing, each of the differential inputs V-LO and V-sig are shorted and the output of the mixer is measured with the LO applied to the commutating mixer switch. Information provided by this measurement can then be used to set the amplitude and/or phase of V-LO, to compensate for any DC component added to the output because of LO self mixing. 
         [0030]    Although the invention has been described in terms of a preferred methods and structure, it will be obvious to those skilled in the art that many modifications and alterations may be made to the disclosed embodiments without departing from the invention. For example, a PMOS transistor may be substituted for any of the NMOS transistors used in the embodiments shown in the figures with only minor modifications required to the biasing scheme. Accordingly, these and other modifications and alterations are intended to be considered as within the spirit and scope of the invention as defined by the appended claims.