Abstract:
A system for testing over-current fault detection includes a first switch to connect a voltage to a load, a capacitor connected between the first switch and ground, a monitor circuit that monitors a current from the first switch to the load, and a microcontroller configured to detect an over-current fault condition based upon input from the monitor circuit. The microcontroller controls the state of the first switch to connect voltage to the load and verifies over-current detection based upon current generated during charging of the capacitor.

Description:
BACKGROUND 
       [0001]    The current invention is related to over-current fault detection, and in particular to a system and method for testing over-current fault detection in the field. 
         [0002]    Excitation circuits are often used to control the application of power to a load. These circuits include switches which can be enabled or disabled to provide or cut off power to a load respectively. Excitation circuits, especially in critical systems such as those for jet engines, need to have over-current fault detection circuitry. In critical systems with multiple loads, it is also important to be able to isolate the specific fault from affecting the remaining system by switching off the excitation to only the individual faulted load. 
         [0003]    An over-current fault is a fault in which there is an excess current flowing through a conductor. This excess current can be created by, among other things, a short-circuit fault in the load. Over-currents create excessive heat, which in turn creates a risk of fire or other damage to equipment. Therefore, it is necessary to detect over-current faults so that they can be handled and damage to the system can be prevented. 
         [0004]    In the past, over-current fault handling has been tested by applying an external fault to the system. Because of this, the over-current fault handling circuitry could not be tested in the field. Testing could only occur during times when an external fault could be applied to the system. Therefore, if any problems arose in the over-current detection circuitry during normal system operation, those problems would not be detected and thus, any over-current faults would go unregulated. Further, test equipment used to apply an external fault increases overhead and production test costs. 
       SUMMARY 
       [0005]    A system and method for testing over-current fault detection includes a first switch to connect voltage to a load; a capacitor connected between the first switch and ground; a monitor circuit that monitors current from the first switch to the load; and a microcontroller. The microcontroller is configured to detect an over-current fault condition based upon input from the monitor circuit, wherein the microcontroller controls the state of the first switch to connect voltage to the load and verifies over-current detection based upon current generated during charging of the capacitor. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0006]      FIG. 1  is a block diagram illustrating an embodiment of the present invention. 
           [0007]      FIG. 2  is a flow chart illustrating a method of testing over-circuit detection circuitry based upon an embodiment of the present invention. 
           [0008]      FIGS. 3A-3D  are charts illustrating a voltage of a capacitor, a high-side switch enable signal, a low-side switch enable signal, and an over-current signal over time according to an embodiment of the present invention. 
           [0009]      FIG. 4  is a flow chart illustrating a method of enabling a high-side switch according to an embodiment of the present invention. 
           [0010]      FIG. 5  is a flow chart illustrating an alternate method of enabling a high-side switch according to an embodiment of the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0011]    The present invention describes an excitation circuit with over-current fault detection that provides an ability to self-test the over-current fault detection in the field. In particular, the system includes high-side and low-side switches, a microcontroller, a difference amplifier, a comparator, a resistor, and a capacitor. The microcontroller contains logic to detect an over-current fault and control the high-side and low-side switches. Together, the resistor and capacitor act as a filtered current monitor during normal operation. During the over-current self test, the initial charging of the capacitor is used to force an over-current test condition. 
         [0012]      FIG. 1  is a block diagram illustrating an embodiment of excitation system  10 . System  10  includes microcontroller  12 , high-side switch  14 , low-side switch  16 , resistor  18 , capacitor  20 , over-current line  22 , high-side switch enable line  24 , low-side switch enable line  26 , voltage terminal  28 , reference voltage  30 , difference amplifier  32 , comparator  34 , external load  36 , monitor circuit  38 , and transient filter  40 . High-side switch  14  and low-side switch  16  are illustrated as metal-oxide semiconductor field effect transistors (MOSFETs), but may be implemented using any other known switching technology. Microcontroller  12  may be implemented using a field programmable gate array (FPGA). 
         [0013]    During normal system operation, high-side switch  14  and low-side switch  16  are used to excite external load  36 . High-side switch  14  is first enabled to provide a voltage to external load  36 . Low-side switch  16  is then enabled to excite external load  36  by providing a path to ground. Microcontroller  12  is programmed with digital logic to control the enablement of high-side switch  14  and low-side switch  16 . Microcontroller  12  may also be connected to receive instructions from a microprocessor such as a digital signal processor (DSP). 
         [0014]    Monitor circuit  38 , microcontroller  12 , and resistor  18  are used to detect an over-current fault during operation of system  10 . Monitor circuit  38  includes difference amplifier  32  and comparator  34  which are used to monitor current through resistor  18 . While illustrated using a difference amplifier and a comparator, monitor circuit  38  may be designed using any number of implementations capable of monitoring current through resistor  18  known in the art. Voltages on each side of resistor  18  are input into difference amplifier  32 . The output of difference amplifier  32  is input into comparator  34  and compared to a reference voltage  30 . Reference voltage  30  may be obtained from a supply voltage and set using, for example, a resistor voltage divider circuit. Reference voltage  30  is chosen such that it is less than the output of difference amplifier  32  if there is a larger than expected current through resistor  18 . Because reference voltage  30  is input into comparator  34  at the positive terminal, the output of comparator  34  will be active-low, meaning it will provide a logic zero to indicate an over-current condition. Alternate embodiments may be implemented such that the output of comparator  34  will be active-high. This output, on over-current line  22 , is input into microcontroller  12 . 
         [0015]    Microcontroller  12  includes transient filter  40  to handle any temporary spikes in current caused by, for example, a lighting strike on an aircraft. This way, systems do not need to be interrupted due to a false over-current detection for temporary spikes in current that can be expected during normal system operation. Because of this, microcontroller  12  waits a predetermined over-current fault time (T over-current ), such as 55 microseconds, before indicating an over-current fault condition. If the signal on over-current line  22  indicates an over-current condition for greater than T over-current , microcontroller  12  disables high-side switch  14  and indicates a detected over-current fault. This indication may be accomplished by setting a software readable bit, illuminating a light-emitting diode (LED), or providing any other type of indication of the fault. In separate embodiments, microcontroller  12  may also disable low-side switch  16  immediately upon detection of an over-current fault. 
         [0016]    Capacitor  20  is included in order to allow excitation system  10  to self-test the functionality of the over-current fault detection circuitry prior to normal system operation. To initiate a test, capacitor  20  must be discharged. Low-side switch  16  may be enabled for a short period of time in order to discharge capacitor  20 . Upon enablement of high-side switch  14 , capacitor  20  will charge. During charge-up, capacitor  20  initially acts as a short to ground which creates a large in-rush current through resistor  18  that exceeds the expected steady-state current drawn by external load  36  during normal operation. The circuit values of resistor  18  and capacitor  20 , and the scaling of monitor circuit  38  can be selected to ensure that an over-current condition is created through resistor  18  during charge-up of capacitor  20 . 
         [0017]    A test of the functionality of the over-current fault detection circuitry comprises enabling high-side switch  14  for a time greater than T over-current  when capacitor  20  is not yet charged. A successful test occurs if microcontroller  12  indicates an over-current fault during this time period. Following a successful test, high-side switch  14  may be enabled indefinitely, as described below, for normal system operation. If a fault is not detected, system  10  may disable, and then re-enable high switch  14  again for a time greater than T over-current . This process may be repeated a predetermined number of times. If an over-current fault has not been indicated after the process has been repeated the predetermined number of times, then the test has failed and proper action can be taken, such as alerting a technician so that the circuit may be repaired or replaced. 
         [0018]      FIG. 2  is a flowchart illustrating a method  90  for testing the functionality of the over-current fault detection of excitation system  10  according to an embodiment of the present invention. At step  92 , both high-side switch  14  and low-side switch  16  are disabled. At step  94 , low-side switch  16  is enabled for a short period of time to discharge capacitor  20 . In embodiments for which it is known that capacitor  20  is already discharged, step  94  may be omitted. At step  96 , high-side switch  14  is enabled for a time greater than T over-current , such as a time approximately 30% greater than T over-current . At step  98 , high-side switch  14  is disabled. At step  100 , it is determined if microcontroller  12  has detected an over-current fault. If an over-current fault has been indicated, method  90  proceeds to step  102 . If an over-current fault has not been indicated, method  90  proceeds to step  104 . At step  102 , a successful test is indicated. At step  104 , if steps  96  and  98  have been completed greater than a predetermined number of retry attempts (N), then method  90  proceeds to step  106  and microcontroller  12  indicates that the test has failed. Otherwise, method  90  returns to step  96 . Optionally, as illustrated by the dashed line in  FIG. 2 , method  90  can return to step  94  to ensure capacitor  20  is fully discharged for each of the predetermined number of retry attempts (N). The predetermined number of retry attempts (N) may be any number determined to be sufficient to indicate a failed test. 
         [0019]    Capacitor  20  has no charge when initially enabling high-side switch  14  for normal system operation. Normal system operation comprises keeping high-side switch  14  enabled indefinitely such that low-side switch  16  may be enabled and disabled to excite external load  36  as required by system  10 . Because enabling high-side switch  14  creates an over-current condition when capacitor  20  is not charged, the signal on high-side switch enable line  24  must be modulated on and off when enabling high-side switch  14  for normal system operation. Each high-side switch enable pulse must be less than T over-current  so as not to create a false over-current fault. The signal on high-side switch enable line  24  is pulsed until capacitor  20  is charged to a voltage such that enablement of high-side switch  14  for greater than T over-current  will not cause an over-current fault condition. High-side switch  14  then remains enabled for the rest of normal system operation so that capacitor  20  remains charged and external load  36  may be excited by enabling low-side switch  16  as necessary. 
         [0020]      FIG. 3A  is a chart illustrating the voltage of capacitor  20  during enablement of high-side switch  14  for normal system operation. The y-axis is the value of the voltage of capacitor  20 , and the x-axis is time. V max  is a value roughly equal to the input voltage on voltage terminal  28 . T on  is the amount of time the high-side switch is enabled for each pulse. T off  is the amount of time the high-side switch is disabled for each pulse. In the present embodiment, T on =T off . The value of T on  may be, for example, 20 microseconds. T on  must be less than T over-current  so as not to trigger an over-current fault. 
         [0021]      FIG. 3B  is a chart illustrating a value on high-side switch enable line  24  during enablement of high-side switch  14  for normal system operation. High-side switch  14  may be pulsed a predetermined number of times such that it is guaranteed that capacitor  20  will be fully charged. Although illustrated as 6 pulses, this predetermined number of pulses is determined based upon the voltage of voltage terminal  28 , the resistance of resistor  18 , the capacitance of capacitor  20 , and the internal resistance of high-side switch  14 . After this predetermined number of times, high-side switch  14  may be enabled indefinitely for normal system operation. 
         [0022]      FIG. 3C  is a chart illustrating the value on low-side switch enable line  26  during enablement of high-side switch  14  for normal system operation. Low-side switch enable line  26  is held low to disable low-side switch  16  until capacitor  20  is fully charged. Following enablement of high-side switch  14  for normal system operation, low-side switch  16  may be enabled and disabled at any time to excite external load  36  as required by system  10 . Low-side switch  16  is enabled by setting the signal on low-side switch enable line  26  high. 
         [0023]      FIG. 3D  is a chart illustrating the value on over-current line  22  during enablement of high-side switch  14  for normal system operation. When high-side switch  14  is enabled, as depicted in  FIG. 3B , the value on over-current line  22  goes low to indicate an over-current condition due to the in-rush current through capacitor  20 . When high-side switch  14  is disabled, the value on over-current line  22  goes high to indicate no over-current condition is present. Once capacitor  20  is charged to a high-enough value, the value on over-current line  22  remains high, indicating that no over-current condition is present due to in-rush current through capacitor  20 . 
         [0024]      FIG. 4  is a flowchart illustrating a method  140  of enabling high-side switch  14  for normal system operation. At step  142 , high-side switch  14  and low-side switch  16  are disabled. At step  144 , high-side switch  14  is enabled for T on . At step  146 , high-side switch  14  is disabled for T off . At step  148 , it is determined if high-side switch  14  has been pulsed a predetermined number of times (M) that ensures that capacitor  20  is sufficiently charged based on the given circuit characteristics of high-side switch  14 , resistor  18 , and capacitor  20 . If high-side switch  14  has been pulsed the predetermined number of times (M) then method  140  proceeds to step  150  and high-side switch  14  may be enabled indefinitely for normal system operation. If high-side switch  14  has not been pulsed the predetermined number of times (M), method  140  returns to step  144 . In the present embodiment, T on  is equal to T off . It may be advantageous in some systems to set the high-side switch disable time longer, for example, than the high-side switch enable time in order to further control or limit the average current into capacitor  20  and to limit the corresponding average circuitry power during the entirety of method  140 . 
         [0025]    Alternatively, the signal on over-current line  22  may be used as feedback to determine when high-side switch  14  may be enabled indefinitely for normal system operation. Once capacitor  20  is charged to a high enough level, an over-current condition will no longer be seen on over-current line  22  due to in-rush current through capacitor  20 . Therefore, while pulsing the enable signal for high-side switch  14 , microcontroller  12  may monitor the input from over-current line  22  to determine when capacitor  20  has been charged to a level such that the in-rush current will not create an over-current condition. If the signal on over-current line  22  is active-high when high-side switch  14  is enabled, microcontroller  12  will know that high-side switch  14  may be enabled indefinitely for normal system operation. Using over-current line  22  as feedback to determine when high-side switch  14  may be enabled indefinitely is useful in applications where load  36  or the conductor connecting power to load  36  has an unknown or varying capacitive element that adds to capacitor  20  and, therefore, makes it impractical to determine a pre-determined number of pulses as used by method  140 . 
         [0026]      FIG. 5  is a flowchart illustrating an alternate method  180  of enabling a high-side switch for normal system operation according to an embodiment of the present invention. At step  182 , high-side switch  14  and low-side switch  16  are disabled. Microcontroller  12  tracks the number of times high-side switch  14  has been enabled (p). At step  184 , high-side switch  14  is enabled for T on . At step  186 , it is determined if the signal on over-current line  22  has transitioned high. If it has, method  180  proceeds to step  188 . If it has not, method  180  proceeds to step  192 . At step  188 , it is determined if the number of times high-side switch  14  has been enabled (p) is less than a predefined minimum number of pulses it should take to charge capacitor  20  (P min ). If it is, method  180  proceeds to step  194  and indicates a circuit fault. If it is not, method  180  proceeds to step  190  and enables high-side switch  14  for normal system operation. At step  192 , it is determined if the number of times high-side switch  14  has been enabled (p) is greater than a predefined maximum number of pulses it should take to charge capacitor  20  (P max ). If it is, method  180  proceeds to step  194  and indicates a circuit fault. If it is not, method  180  proceeds to step  196 . At step  196  high-side switch  14  is disabled for T off  in order to not create a false over-current fault. Method  180  then returns to step  184 . In the present embodiment, T on  is equal to T off . It may be advantageous in some systems to set the high-side switch disable time longer, for example, than the high-side switch enable time in order to further control or limit the average current into capacitor  20  and to limit the corresponding average circuitry power for the entirety of method  180 . 
         [0027]    In this way, the present invention describes an over-current fault detection system that has an ability to self-test the over-current fault detection in the field. Although the present invention has been described with reference to preferred embodiments, workers skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the invention.