Abstract:
A power circuit includes a power source for providing electrical power and two driving transistors being disposed in parallel and receiving electrical power from the power source. Each of the two driving transistors includes a gate terminal, a source connection, and a kelvin source connection. The power circuit also includes a control voltage source having a first terminal and a second terminal. The control voltage source provides a control signal to the two driving transistors for determining driving currents through the two driving transistors. The first terminal is connected to the gate terminals of the two driving transistors, and the second terminal is connected to the kelvin source connections of the two driving transistors. The kelvin source connections of the two driving transistors are inductively coupled.

Description:
BACKGROUND 
       [0001]    Solid state power electronics have numerous industry applications such as automotive, illumination, electricity generation, and heavy machinery. These applications may expose the driving solid state power electronics to thousands of amperes of current and/or thousands of volts of voltage. Due to the large amount of driving current/voltage, the materials and designs of power electronics may differ drastically from conventional semiconductor devices. Common device structures include diode, metal-oxide-semiconductor field-effect transistor (MOSFET), bipolar junction transistor (BJT), thyristor, triac, and insulated-gate bipolar transistor (IGBT). Solid state power electronics may be built from semiconductor materials such as silicon, silicon carbide, gallium nitride, or other elemental or compound semiconductor materials. 
       SUMMARY 
       [0002]    Aspects of the disclosure provide a power circuit having a power source for providing electrical power and two driving transistors being disposed in parallel and receiving electrical power from the power source. Each of the two driving transistors includes a gate terminal, a source connection, and a kelvin source connection. The power circuit also includes a control voltage source having a first terminal and a second terminal. The control voltage source provides a control signal to the two driving transistors to activate the two driving transistors. The first terminal is connected to the gate terminals of the two driving transistors, and the second terminal is connected to the kelvin source connections of the two driving transistors. The kelvin source connections of the two driving transistors are inductively coupled. 
         [0003]    Aspects of the disclosure provide a voltage supply for providing electrical power, a current source for providing substantially constant current over a predetermined current range, a control voltage source, a first driving transistor having a first gate, a first source connection, and a first kelvin source connection, and a second driving transistor having a second gate, a second source connection, and a second kelvin source connection. The first gate and the first kelvin source connections are electrically connected to the control voltage source, and the second gate and the second kelvin source connections are electrically connected to the control voltage source. The invention includes means for inductively coupling the first and second source connections. 
         [0004]    Aspects of the disclosure provide a circuit having a direct current voltage supply, and two driving transistors being disposed in parallel and receiving electrical power from the voltage supply. Each of the two driving transistors includes a gate terminal, a source connection, and a kelvin source connection. The circuit includes a voltage source for providing a control signal to the two driving transistors, and includes a first terminal connected to the gate terminals of the two driving transistors, and a second terminal connected to the kelvin source connections of the two driving transistors. The inductance values of the source connections are configured to improve current balancing of the two driving transistors. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0005]      FIG. 1  illustrates an embodiment of a power circuit having balanced parallel devices. 
           [0006]      FIG. 2  illustrates an embodiment of the power circuit having balanced parallel devices, where the kelvin source inductors and source inductors are in a parallel configuration. 
           [0007]      FIG. 3 , illustrates another embodiment of the power circuit having balanced parallel devices, where the source inductors are in a parallel configuration with the coupled kelvin source inductors. 
           [0008]      FIG. 4 , illustrates yet another embodiment of the power circuit having balanced parallel devices, where the kelvin source inductors are in a parallel configuration with the coupled source inductors. 
           [0009]      FIG. 5  illustrates still another embodiment of the power circuit having balanced parallel devices, where the kelvin source resistors and source inductors are in a parallel configuration. 
           [0010]      FIG. 6 , illustrates an embodiment of the power circuit having balanced parallel devices, where the kelvin source resistors are in a parallel configuration with the coupled source inductors. 
           [0011]      FIG. 7  illustrates another exemplary embodiment of the power circuit having balanced parallel devices, where the parasitic coupled kelvin source inductors and coupled source inductors are in a parallel configuration. 
           [0012]      FIGS. 8 a - d    illustrate turn-on (a and b) and turn-off (c and d) behaviors of power circuits with (b and d) and without (a and c) balanced parallel devices. 
       
    
    
     DETAILED DESCRIPTION OF EMBODIMENTS 
       [0013]      FIG. 1  shows a power circuit  100  having parallel devices. In some implementations, the power circuit  100  includes a voltage source  102  and a current source  104 . The voltage  102  supplies electrical energy to the power circuit  100 , while the current source  104  provides a substantially constant supply current I D  toward a node  110 . A reverse diode  106  provides a current circulating path to emulate load current during turn-off. The supply current I D  may flow from the current source  104  toward a node  110  through a parasitic input inductor  108 . 
         [0014]    At the node  110 , in certain embodiments, the supply current I D  may be divided into drain currents I D1 , I D2 , which may be the same or different. Each drain current I D1 , I D2  flows through transistor drain inductors  120 ,  122 , respectively, into parallel driving transistors  140 ,  146 . While the driving transistors  140 ,  146  are shown as metal-oxide-semiconductor field-effect transistors (MOSFETs) in  FIG. 1 , other device structures are possible, such as bipolar junction transistor (BJT), thyristor, triac, high-electron-mobility transistor, junction field effect transistor, metal-semiconductor field effect transistor, and insulated-gate bipolar transistor (IGBT). In an exemplary embodiment, the driving transistors  140 ,  146  are parallel Silicon Carbide (SiC) MOSFETs. Alternatively, the driving transistors  140 ,  146  may be built from semiconductor materials such as silicon, germanium, gallium nitride, or other elemental or compound semiconductor materials. The driving transistors  140 ,  146  may be n-type MOSFETs. 
         [0015]    In some embodiments, the driving transistors  140 ,  146  may be disposed on two separate semiconductor substrates. The voltage source  102 , a control voltage source  164 , and the driving transistors  140 ,  146  disposed on separate circuit boards and interconnected with wires. Alternatively, the voltage source  102  and the control voltage source  164  may share a single circuit board. The control voltage source  164  may provide a control signal to the driving transistors  140 ,  146  to activate the driving transistors  140 ,  146 . 
         [0016]    In some implementations, the driving transistor  140  may include an intrinsic diode  144 , which is a parasitic circuit element formed between the drain terminal and body or source of the driving transistor  140 . Similarly, the driving transistor  146  may include an intrinsic diode  150  formed between the drain terminal and body or source of the driving transistor  146 . 
         [0017]    In exemplary embodiments, the control voltage source  164  is connected to the gate of the driving transistor  140  via an input inductor  162  and a gate inductor  142 . Similarly, the control voltage source  164  is connected to the gate of the driving transistor  146  via the input inductor  162  and a gate inductor  148 . The gate inductors  142 ,  148  and the input inductor  162  converge at a node  152 . 
         [0018]    In certain implementations, a common source current I DS1  flows through a common source inductor  160  toward a node  180 . At the node  180 , the common source current I DS1  splits into a source current I S1  and a kelvin source current I KS1 . The source current I S1  flows through a source inductor  172  toward a node  186 , and the kelvin source current I ks1  flows through a kelvin source inductor  168  toward a node  182 . Similarly, a common source current I DS2  flows through a common source inductor  166  toward a node  184 . At the node  184 , the common source current I DS2  splits into a source current I S2  and a kelvin source current I KS2 . The source current I S2  flows through a source inductor  174  toward the node  186 , and the kelvin source current I KS2  flows through a kelvin source inductor  170  toward the node  182 . The node  186  may be grounded. The common source current I DS1  may be similar in magnitude as the drain current I D1 , and the common source current I DS2  may be similar in magnitude as the drain current I D2 . 
         [0019]    In some embodiments, some of the inductors in the power circuit  100  may be parasitic inductors. Parasitic inductors may be metallic wires exhibiting inductance in the presence of electrical currents. Some of the inductors in the power circuit  100  may be non-parasitic inductors configured to exhibit a certain inductance value. An exemplary non-parasitic inductor may be an air core inductor or a ferromagnetic core inductor. The inductance value of an inductor may be tuned by changing the number of coils or the ferromagnetic material of the core. Exemplary ferromagnetic materials include elements such as Cobalt, Iron, and Nickel, compounds such as Iron(III) Oxide and Chromium (IV) Oxide, and alloys such as nickel-iron and Heusler alloy. Other ferromagnetic materials may also be used to alter the inductance value of an inductor. 
         [0020]      FIGS. 2-7  illustrate some embodiments of the power circuits for balancing parallel device switching current and power. Certain circuit elements have been removed to simplify the figures. Referring to  FIG. 2 , the power circuit  200  includes driving transistors  240 ,  246 , a control voltage source  264 , kelvin source inductors  268 ,  270 , and source inductors  272 ,  274 . A common source current I DS1  is split into a source current I S1  and a kelvin source current I ks1 , and a common source current I DS2  is split into a source current I S2  and a kelvin source current I ks2 . A difference in current flowing through the driving transistors  240 ,  246  may be approximated as: 
         [0000]        I   DS1   −I   DS2 =( I   S1   −I   S2 )+( I   KS1   −I   KS2 ), 
         [0000]    which can be expressed as: 
         [0000]    
       
         
           
             
               
                 
                   v 
                   
                     DS 
                      
                     
                         
                     
                      
                     1 
                   
                 
                 - 
                 
                   v 
                   
                     DS 
                      
                     
                         
                     
                      
                     2 
                   
                 
               
               = 
               
                 
                   
                     v 
                     
                       S 
                        
                       
                           
                       
                        
                       2 
                     
                   
                   - 
                   
                     v 
                     
                       S 
                        
                       
                           
                       
                        
                       1 
                     
                   
                 
                 = 
                 
                   
                     
                       L 
                       S 
                     
                      
                     
                       ( 
                       
                         
                           
                             dI 
                             
                               S 
                                
                               
                                   
                               
                                
                               2 
                             
                           
                           dt 
                         
                         - 
                         
                           
                             dI 
                             
                               S 
                                
                               
                                   
                               
                                
                               1 
                             
                           
                           dt 
                         
                       
                       ) 
                     
                   
                   = 
                   
                     
                       L 
                       S 
                     
                      
                     
                       ( 
                       
                         
                           
                             dI 
                             
                               KS 
                                
                               
                                   
                               
                                
                               2 
                             
                           
                           dt 
                         
                         - 
                         
                           
                             dI 
                             
                               KS 
                                
                               
                                   
                               
                                
                               1 
                             
                           
                           dt 
                         
                       
                       ) 
                     
                   
                 
               
             
             , 
           
         
       
     
         [0021]    where v DS1  and v DS2  are drain-to-source voltages across the driving transistors  240 ,  246 , v S1  and v S2  are the voltages at source terminals of the transistors  240 ,  246 , and L S  is an inductance value of the source inductors  272 ,  274 . The transistors common source current I DS1  and I DS2  can be approximately as: 
         [0000]        I   DS1   =g   FS ( v   GS1   −V   th1 ), and 
         [0000]        I   DS2   =g   FS ( v   GS2   −V   th2 ), 
         [0000]    where g FS  is the transconductance of the driving transistors  240 ,  246 , v GS1  and v GS2  are the gate-to-source voltages, and V th1  and V th2  are the threshold voltages. From the above equation, the difference between the drain-to-source voltages may be expressed as: 
         [0000]        V   DS1   −V   DS2   =V   S2   −V   S1   =v   GS1   −v   GS2   =V   th1   −V   th2 . 
         [0022]    The difference between the source currents I S1  and I S2  is: 
         [0000]    
       
         
           
             
               
                 I 
                 
                   S 
                    
                   
                       
                   
                    
                   1 
                 
               
               - 
               
                 I 
                 
                   S 
                    
                   
                       
                   
                    
                   2 
                 
               
             
             = 
             
               
                 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       2 
                     
                   
                   - 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       1 
                     
                   
                 
                 
                   L 
                   S 
                 
               
                
               t 
             
           
         
       
     
         [0000]    and
 
the difference between the kelvin source currents I KS1  and I KS2  is:
 
         [0000]    
       
         
           
             
               
                 
                   I 
                   
                     KS 
                      
                     
                         
                     
                      
                     1 
                   
                 
                 - 
                 
                   I 
                   
                     KS 
                      
                     
                         
                     
                      
                     2 
                   
                 
               
               = 
               
                 
                   
                     
                       V 
                       
                         th 
                          
                         
                             
                         
                          
                         2 
                       
                     
                     - 
                     
                       V 
                       
                         th 
                          
                         
                             
                         
                          
                         1 
                       
                     
                   
                   
                     L 
                     KS 
                   
                 
                  
                 t 
               
             
             , 
           
         
       
     
         [0000]    where L KS  is an inductance value of the kelvin source inductors  268 ,  270 . The difference in common source currents I DS1  and I DS2  may be expressed as a function of the threshold voltages, the kelvin source inductors  268 ,  270 , and the source inductors  272 ,  274 : 
         [0000]    
       
         
           
             
               
                 I 
                 
                   DS 
                    
                   
                       
                   
                    
                   1 
                 
               
               - 
               
                 I 
                 
                   DS 
                    
                   
                       
                   
                    
                   2 
                 
               
             
             = 
             
               
                 
                   ( 
                   
                     
                       I 
                       
                         S 
                          
                         
                             
                         
                          
                         1 
                       
                     
                     - 
                     
                       I 
                       
                         S 
                          
                         
                             
                         
                          
                         2 
                       
                     
                   
                   ) 
                 
                 + 
                 
                   ( 
                   
                     
                       I 
                       
                         KS 
                          
                         
                             
                         
                          
                         1 
                       
                     
                     - 
                     
                       I 
                       
                         KS 
                          
                         
                             
                         
                          
                         2 
                       
                     
                   
                   ) 
                 
               
               = 
               
                 
                   
                     
                       V 
                       
                         th 
                          
                         
                             
                         
                          
                         2 
                       
                     
                     - 
                     
                       V 
                       
                         th 
                          
                         
                             
                         
                          
                         1 
                       
                     
                   
                   
                     
                       L 
                       S 
                     
                     // 
                     
                       L 
                       KS 
                     
                   
                 
                  
                 
                   t 
                   . 
                 
               
             
           
         
       
     
         [0023]    Still referring to  FIG. 2 , in some embodiments, the difference in the common source currents I DS1 , I DS2  may be represented by the expression 
         [0000]    
       
         
           
             
               
                 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       2 
                     
                   
                   - 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       1 
                     
                   
                 
                 
                   
                     L 
                     S 
                   
                   // 
                   
                     L 
                     KS 
                   
                 
               
                
               t 
             
             , 
           
         
       
     
         [0000]    which may be reduced by reducing the difference in threshold voltages V th1  and V th2  or maximizing both L S  and L KS . A reduction in the difference in the common source currents I DS1 , I DS2  may improve the balance of switching current and power of the parallel driving transistors  240 ,  246 . 
         [0024]    In some embodiments, two transistors with significantly different threshold voltages may be utilized as parallel driving transistors. A screening process to pre-select transistors with similar threshold voltage values may be simplified or even eliminated by balancing the currents of parallel driving transistors using appropriate inductance values. 
         [0025]    Referring now to  FIG. 3 , which shows an exemplary embodiment of a power circuit  300  having balanced parallel devices. The power circuit  300  includes driving transistors  340 ,  346 , a control voltage source  364 , kelvin source inductors  368 ,  370 , and source inductors  372 ,  374 . In certain implementations, the kelvin source inductors  368 ,  370  may be magnetically coupled. Various methods of magnetic coupling are possible. The kelvin source inductor  368  may be disposed near the kelvin source inductor  370 . Alternatively, the inductance values of the kelvin source inductors  368 ,  370  may be amplified by adding additional inductors in series with the kelvin source inductors  368 ,  370  or by adding ferromagnetic materials between the kelvin source inductors  368 ,  370 . Other methods are possible. 
         [0026]    Still referring to  FIG. 3 , in some implementations, the difference in the common source currents (not shown) may be represented by the expression 
         [0000]    
       
         
           
             
               
                 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       2 
                     
                   
                   - 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       1 
                     
                   
                 
                 
                   
                     L 
                     S 
                   
                   // 
                   
                     ( 
                     
                       
                         L 
                         KS 
                       
                       + 
                       M 
                     
                     ) 
                   
                 
               
                
               t 
             
             , 
           
         
       
     
         [0000]    where V th1  and V th2  are threshold voltages of driving transistors  340 ,  346 , L S  is an inductance value of the source inductors  372 ,  374 , L KS  is an inductance value of the kelvin source inductors  368 ,  370 , t is time, and M is a magnetic coupling term. M, for example, may range from −L KS &lt;0&lt;L KS . The difference in common source currents may be minimized by reducing the difference in threshold voltages V th1  and V th2  or maximizing both L S  and (L KS +M). A reduction in the difference in the common source currents may improve the balance of switching current and power of the parallel driving transistors  340 ,  346 . 
         [0027]    Referring now to  FIG. 4 , which shows another exemplary embodiment of a power circuit  400  having balanced parallel devices. The power circuit  400  includes driving transistors  440 ,  446 , a control voltage source  464 , kelvin source inductors  468 ,  470 , and source inductors  472 ,  474 . In certain implementations, the source inductors  472 ,  474  may be magnetically coupled. Various methods of magnetic coupling are possible. The source inductor  472  may be disposed near the source inductor  474 . Alternatively, the inductance values of the source inductors  472 ,  474  may be amplified by adding additional inductors in series with the source inductors  472 ,  474  or by adding ferromagnetic materials between the source inductors  472 ,  474 . Other methods are possible. 
         [0028]    Still referring to  FIG. 4 , in some implementations, the difference in the common source currents (not shown) may be represented by the expression 
         [0000]    
       
         
           
             
               
                 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       2 
                     
                   
                   - 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       1 
                     
                   
                 
                 
                   
                     ( 
                     
                       
                         L 
                         S 
                       
                       + 
                       M 
                     
                     ) 
                   
                   // 
                   
                     L 
                     KS 
                   
                 
               
                
               t 
             
             , 
           
         
       
     
         [0000]    where V th1  and V th2  are threshold voltages of driving transistors  440 ,  446 , L S  is an inductance value of the source inductors  472 ,  474 , L KS  is an inductance value of the kelvin source inductors  468 ,  470 , t is time, and M is a magnetic coupling term. M, for example, may range from −L S &lt;0&lt;L S . The difference in common source currents may be minimized by reducing the difference in threshold voltages V th1  and V th2  or maximizing both (L S +M) and L KS . A reduction in the difference in the common source currents may improve the balance of switching current and power of the parallel driving transistors  440 ,  446 . 
         [0029]    Referring now to  FIG. 5 , which shows a further exemplary embodiment of a power circuit  500  having balanced parallel devices. The power circuit  500  includes driving transistors  540 ,  546 , a control voltage source  564 , kelvin source resistors  569 ,  571 , and source inductors  572 ,  574 . In certain implementations, the difference in the common source currents (not shown) may be represented by the expression 
         [0000]    
       
         
           
             
               
                 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       2 
                     
                   
                   - 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       1 
                     
                   
                 
                 
                   R 
                   KS 
                 
               
               + 
               
                 
                   
                     
                       V 
                       
                         th 
                          
                         
                             
                         
                          
                         2 
                       
                     
                     - 
                     
                       V 
                       
                         th 
                          
                         
                             
                         
                          
                         1 
                       
                     
                   
                   
                     L 
                     S 
                   
                 
                  
                 t 
               
             
             , 
           
         
       
     
         [0000]    where V th1  and V th2  are threshold voltages of driving transistors  540 ,  546 , L S  is an inductance value of the source inductors  572 ,  574 , R KS  is a resistance value of the kelvin source resistors  569 ,  571 , and t is time. The difference in common source currents may be minimized by reducing the difference in threshold voltages V th1  and V th2  or maximizing both R KS  and L S . The kelvin source resistors  569 ,  571  may be parasitic resistors, externally added resistors, or a combination of both. The resistance values of the kelvin source resistors  569 ,  571  may be increased, for example, by adding a ceramic resistor, a printed carbon resistor, a metal resistor, an alloy resistor, a metal-oxide resistor, or semiconductor resistor to the kelvin source resistors  569 ,  571 . A reduction in the difference in the common source currents may improve the balance of switching current and power of the parallel driving transistors  540 ,  546 . 
         [0030]    Referring now to  FIG. 6 , which shows yet another exemplary embodiment of a power circuit  600  having balanced parallel devices. The power circuit  600  includes driving transistors  640 ,  646 , a control voltage source  664 , kelvin source resistors  669 ,  671 , and source inductors  672 ,  674 . In certain implementations, the source inductors  672 ,  674  may be magnetically coupled. Various methods of magnetic coupling are possible. The source inductor  672  may be disposed near the source inductor  674 . Alternatively, the inductance value of the source inductors  672 ,  674  may be amplified by adding additional inductors in series with the source inductors  672 ,  674  or by adding ferromagnetic materials between the source inductors  672 ,  674 . Other methods are possible. 
         [0031]    Still referring to  FIG. 6 , in some implementations, the difference in the common source currents (not shown) may be represented by the expression 
         [0000]    
       
         
           
             
               
                 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       2 
                     
                   
                   - 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       1 
                     
                   
                 
                 
                   R 
                   KS 
                 
               
               + 
               
                 
                   
                     
                       V 
                       
                         th 
                          
                         
                             
                         
                          
                         2 
                       
                     
                     - 
                     
                       V 
                       
                         th 
                          
                         
                             
                         
                          
                         1 
                       
                     
                   
                   
                     
                       L 
                       S 
                     
                     + 
                     M 
                   
                 
                  
                 t 
               
             
             , 
           
         
       
     
         [0000]    where V th1  and V th2  are threshold voltages of driving transistors  640 ,  646 , L S  is an inductance value of the source inductors  672 ,  674 , R KS  is a resistance value of the kelvin source resistors  669 ,  671 , t is time, and M is a magnetic coupling term. M, for example, may range from −L S &lt;0&lt;L S . The difference in common source currents may be minimized by reducing the difference in threshold voltages V th1  and V th2  or maximizing both (L S +M) and R KS . The resistance values of the kelvin source resistors  669 ,  671  may be increased, for example, by adding a ceramic resistor, a printed carbon resistor, a metal resistor, an alloy resistor, a metal-oxide resistor, or semiconductor resistor to the kelvin source resistors  669 ,  671 . A reduction in the difference in the common source currents may improve the balance of switching current and power of the parallel driving transistors  640 ,  646 . 
         [0032]    Referring now to  FIG. 7 , which shows an exemplary embodiment of a power circuit  700  having balanced parallel devices. The power circuit  700  includes driving transistors  740 ,  746 , a control voltage source  764 , kelvin source inductors  768 ,  770 , and source inductors  772 ,  774 . In certain implementations, the source inductors  772 ,  774  may be magnetically coupled and the kelvin source inductors  768 ,  770  may be magnetically coupled. Various methods of magnetic coupling are possible. The source inductor  772  may be disposed near the source inductor  774 . Alternatively, the inductance values of the source inductors  772 ,  774  may be amplified by adding additional inductors in series with the source inductors  772 ,  774  or by adding ferromagnetic materials between the source inductors  772 ,  774 . Similarly, the kelvin source inductor  768  may be disposed near the source inductor  770 . Alternatively, the inductance values of the kelvin source inductors  768 ,  770  may be amplified by adding additional inductors in series with the kelvin source inductors  768 ,  770  or by adding ferromagnetic materials between the kelvin source inductors  768 ,  770 . Other methods are possible. 
         [0033]    Still referring to  FIG. 7 , in some implementations, the difference in the common source currents (not shown) may be represented by the expression 
         [0000]    
       
         
           
             
               
                 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       2 
                     
                   
                   - 
                   
                     V 
                     
                       th 
                        
                       
                           
                       
                        
                       1 
                     
                   
                 
                 
                   
                     ( 
                     
                       
                         L 
                         S 
                       
                       + 
                       
                         M 
                         S 
                       
                     
                     ) 
                   
                   // 
                   
                     ( 
                     
                       
                         L 
                         KS 
                       
                       + 
                       
                         M 
                         KS 
                       
                     
                     ) 
                   
                 
               
                
               t 
             
             , 
           
         
       
     
         [0000]    where V th1  and V th2  are threshold voltages of driving transistors  740 ,  746 , L S  is an inductance value of the source inductors  772 ,  774 , L KS  is an inductance value of the kelvin source inductors  768 ,  770 , t is time, M S  is a source magnetic coupling term, and M KS  is a kelvin source magnetic coupling term. M S , for example, may range from −L S &lt;0&lt;L S  and M KS  may range from −L KS &lt;0&lt;L KS . The difference in common source currents may be minimized by reducing the difference in threshold voltages V th1  and V th2  or maximizing both (L S +M) and (L KS +M). A reduction in the difference in the common source currents may improve the balance of switching current and power of the parallel driving transistors  740 ,  746 . 
         [0034]    While  FIGS. 1-7  illustrate embodiments of power circuits having two parallel driving transistors, more parallel driving transistors may be included in the power circuits. The methods described above for balancing parallel transistors switching current are similarly applicable to power circuits having more than two parallel driving transistors. 
         [0035]    Referring now to  FIGS. 8 a - d   , which illustrate turn-on ( 8   a  and  8   b ) and turn-off ( 8   c  and  8   d ) behaviors of power circuits with ( 8   b  and  8   d ) and without ( 8   a  and  8   c ) balanced parallel devices. In exemplary implementations, curves  802 ,  804  in  FIG. 8 a    may represent turn-on behaviors of unbalanced parallel transistors. Curves  806 ,  808  in  FIG. 8 b    show turn-on behaviors of balanced parallel transistors. Turning to  FIG. 8 c   , curves  822 ,  824  may represent turn-off behaviors of unbalanced parallel transistors. In  FIG. 8 d   , curves  826 ,  828  show turn-off behaviors of balanced parallel transistors. 
         [0036]    A number of implementations have been described. Nevertheless, it will be understood that various modifications may be made without departing from the spirit and scope of this disclosure. For example, preferable results may be achieved if the steps of the disclosed techniques were performed in a different sequence, if components in the disclosed systems were combined in a different manner, or if the components were replaced or supplemented by other components. The functions, processes and algorithms described herein may be performed in hardware or software executed by hardware, including computer processors and/or programmable circuits configured to execute program code and/or computer instructions to execute the functions, processes and algorithms described herein. Additionally, some implementations may be performed on modules or hardware not identical to those described. Accordingly, other implementations are within the scope that may be claimed.