Abstract:
A signal generating circuit includes a control voltage setting unit (CVSU) configured to set a control voltage for a chirp signal using voltage-frequency characteristics indicating characteristics of an output frequency versus voltage; a VCO configured to alter the frequency of its output signal by the control voltage; a quadrature demodulator configured to perform quadrature demodulation of the output signal of the VCO to generate an inphase signal and a quadrature signal orthogonal to each other; and a frequency detector configured to detect the frequency of the output signal of the VCO on the basis of the inphase signal and quadrature signal. The CVSU corrects the control voltage by using the voltage-frequency characteristics derived from relationships between the control voltage and the frequency of the output signal of the VCO. The VCO generates the chirp signal based on the control voltage corrected by the CVSU.

Description:
TECHNICAL FIELD 
       [0001]    The present invention relates to a signal generating circuit for generating a chirp signal. 
       BACKGROUND ART 
       [0002]    An FMCW (Frequency Modulated Continuous Waves) radar, which is capable of simultaneously measuring the distance and relative speed between the radar and a target object at high accuracy is widely used as an onboard radar. The system transmits a chirp signal as a continuous wave, receives a reflected wave from the target object, and measures the distance to the target object from the delay time of the reflected wave and the speed relative to the target object from a frequency shift. Here, the chirp signal refers to a signal subjected to the frequency modulation which varies the frequency with time. 
         [0003]    As a signal generating circuit in an FMCW radar device, for example, a signal generating circuit of a Patent Literature 1 is known. The signal generating circuit of the Patent Literature 1 comprises a modulation controller, a digital to analog converter (DAC), a low pass filter (LPF), a voltage controlled oscillator (VCO), a local signal generator, a difference frequency signal generator, an IF detector and an ADC (Analog to Digital Converter). The modulation controller comprises a lookup table (LUT) that records voltage-frequency characteristics (V-F characteristics) of the VCO. 
         [0004]    Next, the operation of the signal generating circuit at the time of generating the chirp signal will be described. The modulation controller obtains from the V-F characteristics of the LUT a control voltage that will linearize the time-frequency characteristics of the chirp signal, and outputs the control voltage to the DAC as a digital signal. 
         [0005]    The DAC converts the digital control voltage fed from the modulation controller into an analog control voltage, and outputs the analog control voltage to the LPF. 
         [0006]    The LPF eliminates a high-frequency component of the control voltage fed from the DAC, and smoothes the control voltage. Then the LPF outputs the control voltage to the VCO. 
         [0007]    The VCO, on the basis of the V-F characteristics it possesses, outputs a signal with the frequency corresponding to the control voltage in accordance with the control voltage fed from the LPF. 
         [0008]    As a result, the signal generating circuit generates the control voltage of the VCO on the basis of the V-F characteristics of the VCO, which the LUT possesses, and can generate the chirp signal subjected to the frequency modulation. 
         [0009]    Next, the operation of the signal generating circuit at the time of updating the LUT will be described. 
         [0010]    The VCO generates the chirp signal (f 1 ) in accordance with the control voltage. 
         [0011]    The local signal generator generates the local signal (f 2 ). 
         [0012]    The difference frequency signal generator outputs the IF (Intermediate Frequency) signal (f 1 −f 2 ), which is a difference frequency component between the output signal of the VCO and the local signal, from the output signal (f 1 ) of the VCO and the local signal (f 2 ) generated by the local signal generator. 
         [0013]    The IF detector outputs the IF detection signal to the ADC when the frequency of the IF signal becomes not greater than a specified IF detection frequency. That the frequency of the IF signal becomes not greater than the specified IF detection frequency occurs when f 1  is nearly equal to f 2 . Since the frequency f 1  varies with time, the timing at which f 1  is nearly equal to f 2  occurs. 
         [0014]    The ADC measures the control voltage (v 1 ) of the VCO at the timing when the IF detector outputs the IF detection signal, and outputs it to the modulation controller. This operation is carried out several times while varying the local frequency f 2 . 
         [0015]    From the variation of the control voltage v 1  while varying the local frequency f 2 , the modulation controller obtains the V-F characteristics of the VCO, and updates the V-F characteristics stored in the LUT. On the basis of the updated V-F characteristics, the modulation controller obtains the control voltage that will linearize the time-frequency characteristics of the chirp signal, and outputs the control voltage to the DAC as the digital signal. 
         [0016]    Thus, the signal generating circuit of Patent Literature 1 updates the V-F characteristics stored in the LUT using the local signal generator, difference frequency signal generator, and IF detector, and generates the chirp signal on the basis of the updated V-F characteristics. 
         [0017]    However, the circuit of Patent Literature 1 cannot compensate for the error of the chirp signal when the V-F characteristics of the VCO suddenly vary owing to the disturbance of the temperature or the like. The circuit must generate the chirp signal a plurality of times while varying the local frequency f 2  to obtain the V-F characteristics of the VCO, and cannot update the V-F characteristics of the VCO during that time. In other words, since the circuit of Patent Literature 1 can detect from a single chirp signal only one voltage value (V) and only one frequency value (F) corresponding to the voltage, it cannot obtain the V-F characteristics of the VCO unless it generates the chirp signal a plurality of times. 
       CITATION LIST 
     Patent Literature 
       [0000]    
       
         Patent Literature 1: Japanese Patent Application Publication No. 2011-247598. 
       
     
       SUMMARY OF INVENTION 
     Technical Problem 
       [0019]    The conventional signal generating circuit has a problem of being unable to compensate for the error of the chirp signal when the V-F characteristics of the VCO suddenly vary owing to disturbance. 
       Solution to Problem 
       [0020]    In accordance with the present invention, there is provided a signal generating circuit which includes: a control voltage setting unit configured to set a control voltage by using voltage-frequency characteristics indicating characteristics of an output frequency versus voltage; a voltage controlled oscillator configured to alter a frequency of an output signal in response to the control voltage; a quadrature demodulator configured to carry out quadrature demodulation of the output signal of the voltage controlled oscillator to generate an inphase signal and a quadrature signal which are orthogonal to each other; and a frequency detector configured to detect the frequency of the output signal of the voltage controlled oscillator on the basis of the inphase signal and the quadrature signal. The control voltage setting unit corrects the control voltage by using the voltage-frequency characteristics derived from relationships between the control voltage and the frequency of the output signal of the voltage controlled oscillator. The voltage controlled oscillator generates a chirp signal on the basis of the control voltage corrected by the control voltage setting unit. 
       Advantageous Effects of Invention 
       [0021]    The signal generating circuit in accordance with the present invention is configured in such a manner as to generate the inphase signal and the quadrature signal which are orthogonal to each other, by carrying out the quadrature demodulation of the output signal of the VCO, and to detect the frequency of the output signal of the VCO on the basis of the inphase signal and the quadrature signal, thereby deriving the V-F characteristics of the VCO. Accordingly, the signal generating circuit in accordance with the present invention is capable of compensating for the error of the chirp signal even if the V-F characteristics of the VCO change suddenly owing to disturbance. 
     
    
     
       BRIEF DESCRIPTION OF DRAWINGS 
         [0022]      FIG. 1  is a block diagram showing a configuration of a signal generating circuit of an embodiment 1; 
           [0023]      FIG. 2  is a block diagram showing a configuration of the MCU  180  of Embodiment 1; 
           [0024]      FIG. 3  is a flowchart showing the operation of the signal generating circuit of Embodiment 1; 
           [0025]      FIG. 4  is a flowchart showing the operation of the MCU  180  of Embodiment 1; 
           [0026]      FIG. 5  is a diagram showing update timings of V-F characteristics in the signal generating circuit of Embodiment 1 and in the signal generating circuit of the prior art (invention of Patent Literature 1); 
           [0027]      FIG. 6  is a diagram showing a chirp signal generated by the signal generating circuit of Embodiment 1; 
           [0028]      FIG. 7  is a block diagram showing a configuration of a signal generating circuit of an embodiment 2; 
           [0029]      FIG. 8  is a block diagram showing a configuration of the MCU  181  of Embodiment 2; 
           [0030]      FIG. 9  is a block diagram showing a configuration of a signal generating circuit of an embodiment 3; and 
           [0031]      FIG. 10  is a block diagram showing a configuration of the MCU  182  of Embodiment 3. 
       
    
    
     DESCRIPTION OF EMBODIMENTS 
     Embodiment 1 
       [0032]      FIG. 1  is a block diagram showing a configuration of a signal generating circuit of an embodiment 1. 
         [0033]    The signal generating circuit comprises a VCO (Voltage Controlled Oscillator)  100 , a DAC (Digital to Analog Converter)  105 , an LPF (Low Pass Filter)  110 , a frequency divider  115 , a multiplier  140 , a local oscillator  150 , an LPF  160 , an ADC (Analog to Digital Converter)  170 , and an MCU (Micro Controller Unit)  180 . In  FIG. 1 , v designates the control voltage of the VCO  100 , fvco designates the frequency of the output signal (output frequency) of the VCO  100 , and fxo designates the output frequency of the local oscillator  150 . In addition, IN_MCU designates an input signal to the MCU, and OUT_MCU designates the output signal from the MCU. 
         [0034]    The VCO  100  is a voltage controlled oscillator that outputs a signal with the frequency corresponding to the control signal output from the LPF  110 . For example, as the VCO  100 , an oscillator circuit is employed which is comprised of an active circuit with transistors and a tuned circuit based on a varactor diode. 
         [0035]    The DAC  105  is a circuit that converts the digital control signal output from a control voltage setting unit  130  into an analog control signal and outputs it. For example, as the DAC  105 , a ΔΣ-type DAC is employed which is comprised of a ΔΣ modulator and a comparator. 
         [0036]    The LPF  110  is a low pass filter that smoothes the analog control signal output from the DAC  105  by removing the high-frequency component of the analog control signal, and outputs the smoothed analog control signal to the VCO  100 . For example, as the LPF  110 , a filter circuit is employed which is comprised of a coil and a capacitor. 
         [0037]    The frequency divider  115  is a frequency divider that divides the frequency of the output signal of the VCO  100  by a division ratio N (N is a natural number), and outputs the signal obtained by the frequency division. For example, as the frequency divider  115 , a counter circuit is employed which is comprised of a flip-flop. 
         [0038]    The multiplier  140  is a multiplier that multiplies the signal output from the frequency divider  115  and the signal output from the local oscillator  150  which will be described later, and outputs the resultant signal. For example, the multiplier  140  is employed which is comprised of a frequency mixer composed of a diode and a transformer. 
         [0039]    The local oscillator  150  is a signal source that outputs to the multiplier  140  a reference signal for carrying out the frequency conversion. The local oscillator  150  is comprised of a crystal oscillator with accurate oscillation frequency. As the local oscillator  150 , a DDS (Direct Digital Synthesizer) can be employed as well. 
         [0040]    The LPF  160  is a filter that removes the high-frequency component from the signal output from the multiplier  140 , and outputs the signal whose high-frequency component is removed. For example, as the LPF, a filter circuit is employed which is comprised of a coil and a capacitor. 
         [0041]    The ADC  170  is a circuit that converts the analog signal output from the LPF  160  into a digital signal, and outputs the digital signal to the MCU  180 . 
         [0042]      FIG. 2  is a block diagram showing a configuration of the MCU  180  of the signal generating circuit of Embodiment 1. The MCU  180  is an integrated circuit (microcontroller unit) into which a computer system is incorporated. The microcontroller unit includes a CPU (Central Processing Unit), a memory, an input/output circuit, and a timer circuit. The MCU  180  comprises a control voltage setting unit  130 , a quadrature demodulator  200 , an LPF  210 , an LPF  211 , a phase detector  212 , and a frequency detector  214 . These components may be comprised of software operating on the MCU  180 , or comprised of an analog circuit or a digital circuit. 
         [0043]    The quadrature demodulator  200  is a circuit that carries out quadrature demodulation of the digital signal output from the ADC  170 , and generates an inphase signal and a quadrature signal orthogonal to each other. The quadrature demodulator  200  comprises a multiplier  202 , a multiplier  204 , a 90-degree phase shift distributor  208 , and a local oscillator  206 . 
         [0044]    The local oscillator  206  is an oscillator that outputs a signal of a fixed frequency. 
         [0045]    The 90-degree phase shift distributor  208  is a phase shift distributor that divides the output signal of the local oscillator  206  into two signals of a cosine wave and a sine wave with phases different by 90 degrees. 
         [0046]    The multiplier  202  is a multiplier that multiplies the output signal of the ADC  170  by the cosine wave, and outputs the resultant signal as the inphase signal. 
         [0047]    The multiplier  204  is a multiplier that multiplies the output signal of the ADC  170  by the sine wave, and outputs the resultant signal as the quadrature signal. 
         [0048]    The LPF  210  is a low pass filter that removes the high-frequency component of the output signal of the multiplier  202 , and outputs the signal whose high-frequency component is eliminated. 
         [0049]    The LPF  211  is a low pass filter that removes the high-frequency component of the output signal of the multiplier  204 , and outputs the signal whose high-frequency component is eliminated. 
         [0050]    The phase detector  212  is a circuit for detecting the instantaneous phase from the output signal of the LPF  210  and the output signal of the LPF  211 , which are orthogonal to each other. The instantaneous phase refers to the phase of the signal at each time when the phase of the signal varies with time (when the phase is a function of time). 
         [0051]    The frequency detector  214  is a circuit for carrying out the time derivative of the instantaneous phase output from the phase detector  212  so as to detect the instantaneous frequency. The instantaneous frequency is defined as the rate of change of the phase of the signal with respect to time in the signal whose frequency varies with time, and refers to the frequency with respect to each time. 
         [0052]    The control voltage setting unit  130  is a circuit which comprises the LUT (Look Up Table)  120  storing the V-F characteristics of the VCO  100 , and generates the control signal of the VCO  100  on the basis of the V-F characteristics stored in the LUT  120 . For example, the control voltage setting unit  130  is comprised of the memory of the MCU  180  and the input/output circuit of the MCU  180 . Incidentally, although the control voltage setting unit  130  comprises the internal LUT  120  here, the control voltage setting unit  130  can have any configuration as long as it can set the control signal of the VCO  100  by referring to the LUT  120 . For example, the control voltage setting unit  130  may be configured in such a manner as to comprise the LUT  120  outside, and to generate the control voltage by referring to the external LUT  120 . 
         [0053]    Next, the operation of the signal generating circuit when generating a chirp signal will be described.  FIG. 3  is a flowchart showing the operation of the signal generating circuit of Embodiment 1. Referring to  FIG. 3 , the operation of the signal generating circuit will be described. 
         [0054]    The control voltage setting unit  130  of the MCU  180  generates the control voltage of the VCO  100  for each time on the basis of the V-F characteristics of the VCO  100  stored in the LUT  120 , and outputs the control voltage to the DAC  105  (S 101 ). 
         [0055]    The DAC  105  converts the control voltage output from the control voltage setting unit  130  from the digital signal into the analog signal, and outputs the analog signal to the LPF  110  (S 102 ). 
         [0056]    The LPF  110  smoothes the output signal of the DAC  105  by removing the high-frequency component from the signal, and outputs the smoothed signal to the VCO  100  (S 103 ). 
         [0057]    On the basis of the V-F characteristics, the VCO  100  outputs the signal (cos(2Πf vco )t) with the frequency corresponding to the control signal output from the LPF  110  (S 104 ). Here, f vco  designates the frequency of the output signal of the VCO  100 . 
         [0058]    The frequency divider  115  divides the frequency of a part of the signal output from the VCO  100  by the division ratio N (N is a natural number), and outputs the frequency-divided signal (cos(2Πf vco /N)t)) to the multiplier  140  (S 105 ). Here, f vco /N designates the frequency of the output signal of the frequency divider  115 . 
         [0059]    The multiplier  140  multiplies the signal (cos((2Πf xo )t)) the local oscillator  150  outputs and the output signal (cos(2Πf vco /N)t)) of the frequency divider  115 , and outputs the signal undergoing the frequency conversion by the multiplication (S 106 ). Here, f xo  designates the frequency of the output signal of the local oscillator  150 . 
         [0060]    In this way, using the signal obtained by the frequency divider  115  and the output signal of the local oscillator  150 , the multiplier  140  converts the frequency of the output signal of the VCO  100  into the frequency the ADC  170  can capture, which will be described later. 
         [0061]    By the way, when carrying out the frequency conversion, the multiplier  140  can convert the frequency of the output signal of the VCO  100  as it is without using the frequency-divided signal. In this case, a PLL (Phase Locked Loop) circuit becomes necessary as the local oscillator  150 . This will increase the size of the circuit, and hence the configuration using the frequency divider  115  and multiplier  140  is preferable. 
         [0062]    The output signal (S) of the multiplier  140  is given by the following Expression (1). 
         [0000]    
       
         
           
             
               
                 
                   [ 
                   
                     Expression 
                      
                     
                         
                     
                      
                     1 
                   
                   ] 
                 
               
               
                 
                     
                 
               
             
             
               
                 
                   
                     
                       
                         S 
                         = 
                           
                          
                         
                           
                             cos 
                              
                             
                               ( 
                               
                                 
                                   ( 
                                   
                                     2 
                                      
                                     π 
                                      
                                     
                                         
                                     
                                      
                                     
                                       
                                         f 
                                         vco 
                                       
                                       / 
                                       N 
                                     
                                   
                                   ) 
                                 
                                  
                                 t 
                               
                               ) 
                             
                           
                           * 
                           
                             cos 
                              
                             
                               ( 
                               
                                 
                                   ( 
                                   
                                     2 
                                      
                                     π 
                                      
                                     
                                         
                                     
                                      
                                     
                                       f 
                                       xo 
                                     
                                   
                                   ) 
                                 
                                  
                                 t 
                               
                               ) 
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         = 
                           
                          
                         
                           0.5 
                            
                           
                             { 
                             
                               
                                 cos 
                                  
                                 
                                   ( 
                                   
                                     2 
                                      
                                     
                                       π 
                                        
                                       
                                         ( 
                                         
                                           
                                             
                                               f 
                                               vco 
                                             
                                             / 
                                             N 
                                           
                                           - 
                                           
                                             f 
                                             xo 
                                           
                                         
                                         ) 
                                       
                                     
                                      
                                     t 
                                   
                                   ) 
                                 
                               
                               + 
                               
                                 cos 
                                  
                                 
                                   ( 
                                   
                                     2 
                                      
                                     
                                       π 
                                        
                                       
                                         ( 
                                         
                                           
                                             
                                               f 
                                               vco 
                                             
                                             / 
                                             N 
                                           
                                           + 
                                           
                                             f 
                                             xo 
                                           
                                         
                                         ) 
                                       
                                     
                                      
                                     t 
                                   
                                   ) 
                                 
                               
                             
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   1 
                   ) 
                 
               
             
           
         
       
     
         [0063]    The LPF  160  removes the high-frequency component of the output signal of the multiplier  140 , and outputs the difference frequency signal which is the first term of Expression (1) (S 107 ). The difference frequency signal (Sdiff) is given by the following Expression (2). 
         [0000]      [Expression 2] 
         [0000]        S diff=cos(2Π( f   vco   /N−f   xo ) t )  (2)
 
         [0064]    Here, to simplify the Expression, the coefficient 0.5 is omitted. 
         [0065]    The ADC  170  converts the output signal of the LPF  160  from the analog signal into a digital signal (S 108 ), and outputs the digital signal to the quadrature demodulator  200  of the MCU  180  (S 109 ). 
         [0066]      FIG. 4  is a flowchart showing the operation of the MCU  180 . Referring to  FIG. 4 , the operation of the MCU  180  will be described. 
         [0067]    The local oscillator  206  outputs the local signal whose frequency is f LO  to the 90-degree phase shift distributor  208 , and the 90-degree phase shift distributor  208  distributes the local signal to the two signals with the 90-degree phase difference, and generates the cosine wave (cos(2Πf LO t)) and the sine wave (sin(2Πf LO t)) (S 201 ). 
         [0068]    The multiplier  202  multiplies the cosine wave (cos(2Πf LO t)) and the output signal (Sdiff) of the ADC  170 , and outputs the resultant signal to the LPF  210  as the inphase signal (S 202 ). The signal output from the multiplier  202  is given by the following Expression (3). 
         [0000]    
       
         
           
             
               
                 
                   [ 
                   
                     Expression 
                      
                     
                         
                     
                      
                     3 
                   
                   ] 
                 
               
               
                 
                     
                 
               
             
             
               
                 
                   
                     
                       
                         Si 
                         = 
                           
                          
                         
                           
                             cos 
                              
                             
                               ( 
                               
                                 
                                   ( 
                                   
                                     
                                       2 
                                        
                                       π 
                                        
                                       
                                           
                                       
                                        
                                       
                                         
                                           f 
                                           vco 
                                         
                                         / 
                                         N 
                                       
                                     
                                     - 
                                     
                                       f 
                                       xo 
                                     
                                   
                                   ) 
                                 
                                  
                                 t 
                               
                               ) 
                             
                           
                           * 
                           
                             cos 
                              
                             
                               ( 
                               
                                 
                                   ( 
                                   
                                     2 
                                      
                                     π 
                                      
                                     
                                         
                                     
                                      
                                     
                                       f 
                                       LO 
                                     
                                   
                                   ) 
                                 
                                  
                                 t 
                               
                               ) 
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         = 
                           
                          
                         
                           0.5 
                            
                           
                             { 
                             
                               
                                 
                                   
                                     cos 
                                     ( 
                                     
                                       
                                         2 
                                          
                                         
                                           π 
                                            
                                           
                                             ( 
                                             
                                               
                                                 
                                                   f 
                                                   vco 
                                                 
                                                 / 
                                                 N 
                                               
                                               - 
                                               
                                                 f 
                                                 xo 
                                               
                                               - 
                                               
                                                 f 
                                                 LO 
                                               
                                             
                                             ) 
                                           
                                         
                                          
                                         t 
                                       
                                       + 
                                     
                                   
                                 
                               
                               
                                 
                                   
                                     cos 
                                      
                                     
                                       ( 
                                       
                                         2 
                                          
                                         
                                           π 
                                            
                                           
                                             ( 
                                             
                                               
                                                 
                                                   f 
                                                   vco 
                                                 
                                                 / 
                                                 N 
                                               
                                               - 
                                               
                                                 f 
                                                 xo 
                                               
                                               + 
                                               
                                                 f 
                                                 LO 
                                               
                                             
                                             ) 
                                           
                                         
                                          
                                         t 
                                       
                                       ) 
                                     
                                   
                                 
                               
                             
                             } 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   3 
                   ) 
                 
               
             
           
         
       
     
         [0069]    The multiplier  204  multiplies the sine wave (sin(2Πf LO t)) and the output signal of the ADC  170  (Sdiff), and outputs the resultant signal to the LPF  211  as the quadrature signal. The signal output from the multiplier  204  is given by the following Expression (4). 
         [0000]    
       
         
           
             
               
                 
                   [ 
                   
                     Expression 
                      
                     
                         
                     
                      
                     4 
                   
                   ] 
                 
               
               
                 
                     
                 
               
             
             
               
                 
                   
                     
                       
                         Sq 
                         = 
                           
                          
                         
                           
                             cos 
                              
                             
                               ( 
                               
                                 
                                   ( 
                                   
                                     
                                       2 
                                        
                                       π 
                                        
                                       
                                           
                                       
                                        
                                       
                                         
                                           f 
                                           vco 
                                         
                                         / 
                                         N 
                                       
                                     
                                     - 
                                     
                                       f 
                                       xo 
                                     
                                   
                                   ) 
                                 
                                  
                                 t 
                               
                               ) 
                             
                           
                           * 
                           
                             sin 
                              
                             
                               ( 
                               
                                 
                                   ( 
                                   
                                     2 
                                      
                                     π 
                                      
                                     
                                         
                                     
                                      
                                     
                                       f 
                                       LO 
                                     
                                   
                                   ) 
                                 
                                  
                                 t 
                               
                               ) 
                             
                           
                         
                       
                     
                   
                   
                     
                       
                         = 
                           
                          
                         
                           0.5 
                            
                           
                             { 
                             
                               
                                 
                                   
                                     - 
                                     
                                       sin 
                                       ( 
                                       
                                         
                                           2 
                                            
                                           
                                             π 
                                              
                                             
                                               ( 
                                               
                                                 
                                                   
                                                     f 
                                                     vco 
                                                   
                                                   / 
                                                   N 
                                                 
                                                 - 
                                                 
                                                   f 
                                                   xo 
                                                 
                                                 - 
                                                 
                                                   f 
                                                   LO 
                                                 
                                               
                                               ) 
                                             
                                           
                                            
                                           t 
                                         
                                         + 
                                       
                                     
                                   
                                 
                               
                               
                                 
                                   
                                     sin 
                                      
                                     
                                       ( 
                                       
                                         2 
                                          
                                         
                                           π 
                                            
                                           
                                             ( 
                                             
                                               
                                                 
                                                   f 
                                                   vco 
                                                 
                                                 / 
                                                 N 
                                               
                                               - 
                                               
                                                 f 
                                                 xo 
                                               
                                               + 
                                               
                                                 f 
                                                 LO 
                                               
                                             
                                             ) 
                                           
                                         
                                          
                                         t 
                                       
                                       ) 
                                     
                                   
                                 
                               
                             
                             } 
                           
                         
                       
                     
                   
                 
               
               
                 
                   ( 
                   4 
                   ) 
                 
               
             
           
         
       
     
         [0070]    The LPF  210  removes the high-frequency component from the inphase signal Si, and outputs the inphase signal Si whose high-frequency component is removed to the phase detector  212  (S 203 ). The LPF  211  removes the high-frequency component from the quadrature signal Sq, and outputs the quadrature signal Sq whose high-frequency component is removed to the phase detector  212 . The signals Si and Sq whose high-frequency components are removed are given by the following Expression (5) and Expression (6), respectively. 
         [0000]      [Expression 5] 
         [0000]        Si= 0.5 cos(2Π( f   vco   /N−f   xo   −f   LO ) t )  (5)
 
         [0000]      [Expression 6] 
         [0000]        Sq=− 0.5 sin(2Π( f   vco   /N−f   xo   −f   LO ) t )  (6)
 
         [0000]    Here, Si designates the inphase signal (I signal) and Sq designates the quadrature signal (Q signal). 
         [0071]    The phase detector  212  divides the quadrature signal output from the LPF  211  by the inphase signal output from the LPF  210 , multiplies the division result by −1, and calculates the arctangent thereof. Thus, the phase detector  212  detects the instantaneous phase (S 204 ). 
         [0072]    The instantaneous phase (θ(t)) is given by the following Expression (7). 
         [0000]      [Expression 7] 
         [0000]      θ( t )=arctan(− Sq/Si )=2Π( f   vco   /N−f   xo   −f   LO ) t   (7)
 
         [0073]    The frequency detector  214  calculates the time derivative of the instantaneous phase, and detects the instantaneous frequency (S 205 ). The instantaneous frequency (fbb) is given by the following Expression (8). 
         [0000]      [Expression 8] 
         [0000]        f   bb =( d θ( t )/ dt )/2Π= f   vco   /N−f   xo   −f   LO   (8)
 
         [0000]    Here, N is the division ratio, f xo  is the frequency of the output signal of the local oscillator  150 , and f LO  is the frequency of the output signal of the local oscillator  206 . Since f bb , N, f xo , and f LO  are known, the frequency detector  214  can detect the output frequency (f vco ) of the VCO  100  (S 206 ). The frequency of the output signal of the VCO  100  is given by the following Expression (9). 
         [0000]      [Expression 9] 
         [0000]        f   vco =( f   bb   +f   LO   +f   xo )* N   (9)
 
         [0074]    Since the frequency detector  214  can detect the instantaneous frequency (f bb ) for each time, it can detect the output frequency (f vco ) of the VCO  100  for each time by Expression (9). Thus, the frequency detector  214  can detect the time variations of the output frequency (f vco ) of the VCO  100  from a single chirp signal. Thus, the frequency detector  214  can detect the time-frequency characteristics of the VCO  100 . This means that the frequency detector  214  can obtain the V-F characteristics of the VCO  100  from a single chirp signal. 
         [0075]    The control voltage setting unit  130  obtains the V-F characteristics of the VCO  100  from the time variations of the control voltage output to the DAC  105  and from the time-frequency characteristics detected by the frequency detector  214  (S 207 ). After that, the control voltage setting unit  130  updates the V-F characteristics stored in the LUT  120  to the V-F characteristics obtained at step S 207  (S 208 ). 
         [0076]    Next, on the basis of the V-F characteristics updated, the control voltage setting unit  130  corrects the control voltage of the VCO  100 , and outputs the corrected control voltage to the DAC  105  (S 209 ). Here, while the VCO  100  is outputting the chirp signal, the control voltage setting unit  130  can determine the control voltage of the next chirp signal. This is because since the frequency detector  214  can detect the instantaneous frequency from the instantaneous phase, the control voltage setting unit  130  can successively update the LUT  120  for each time. 
         [0077]    The DAC  105  converts the digital control voltage output from the control voltage setting unit  130  of the MCU  180  into the analog control voltage, and outputs to the LPF  110 . The LPF  110  smoothes the control voltage output from the DAC  105  by removing the high-frequency component from the control voltage. Then, the LPF  110  outputs the smoothed control voltage to the VCO  100 . 
         [0078]    The VCO  100  generates the chirp signal in response to the control voltage output from the LPF  110 . Here, since the control voltage is corrected on the basis of the updated V-F characteristics, the VCO  100  can generate the chirp signal at high linearity. 
         [0079]      FIG. 5  is a diagram showing the update timing of the V-F characteristics in the signal generating circuit of Embodiment 1 and in the signal generating circuit of the prior art (the invention in Patent Literature 1). Referring to  FIG. 5 , an effect of the signal generating circuit of Embodiment 1 will be described. In  FIG. 5 , the vertical axis shows the temperature of the signal generating circuit, and the horizontal axis shows the time. In  FIG. 5 , closed triangles show timings at which the signal generating circuit of the prior art updates the V-F characteristics, and closed circles show timings at which the signal generating circuit of Embodiment 1 updates the V-F characteristics. In addition, as shown in  FIG. 5 , since a sudden change occurs in the signal generating circuit from 10Δt to 20Δt, the V-F characteristics of the VCO  100  also change sharply during that time. Incidentally, the following description will be made on the assumption that both the signal generating circuit of Embodiment 1 and the signal generating circuit of the prior art generate the chirp signal at every Δt interval. 
         [0080]    Here, as already described in the paragraph [0014], the signal generating circuit of the prior art must generate the chirp signal a plurality of times to obtain the V-F characteristics. It is assumed here that the V-F characteristics are calculated from ten chirp signals. Then, since the chirp signal is generated at every Δt interval, the V-F characteristics are updated at every 10Δt. 
         [0081]    Thus, the signal generating circuit of the prior art must generate 10 chirp signals to obtain the V-F characteristics. Accordingly, from Δ10t to Δ20t in  FIG. 5  during which the temperature changes sharply, it cannot update the V-F characteristics, thereby being unable to compensate for the error of the chirp signal. 
         [0082]    In contrast with this, the signal generating circuit of Embodiment 1 can calculate the V-F characteristics from a single chirp signal as described before in the paragraph 
         [0083]    Thus, it can update the V-F characteristics at every Δt interval as shown in  FIG. 5 , thereby being able to compensate for the error of the chirp signal even while the temperature is varying (during the time from Δ10t to Δ20t in  FIG. 5 ). 
         [0084]      FIG. 6  is a diagram showing the chirp signal generated by the signal generating circuit of Embodiment 1, in which the vertical axis shows the frequency, and the horizontal axis shows the time. Solid lines denote the chirp signal generated by the signal generating circuit of Embodiment 1, and broken lines denote the chirp signal generated by the signal generating circuit of the prior art. It is found that the chirp signal indicated by the solid lines has higher linearity than that indicated by the broken lines. 
         [0085]    Incidentally, although an example is shown here in which the temperature varies as the disturbance, a signal generating circuit in accordance with the present invention can compensate for the error of the chirp signal even when the V-F characteristics of the VCO  100  varies owing to electromagnetic waves emitted from other equipment or owing to degradation over time of the VCO  100 . 
         [0086]    As described above, according to Embodiment 1, it is configured in such a manner as to carry out the quadrature demodulation of the output signal of the VCO  100  to generate the inphase signal and the quadrature signal orthogonal to each other; to detect the frequency of the output signal of the VCO  100  on the basis of the inphase signal and the quadrature signal; and to derive the V-F characteristics of the VCO  100 . Accordingly, even when the V-F characteristics of the VCO  100  change suddenly owing to the disturbance, the signal generating circuit in accordance with the present invention can derive the V-F characteristics of the VCO  100  every time the chirp signal is output, and can compensate for the error of the chirp signal. 
         [0087]    In addition, according to Embodiment 1, it is configured in such a manner as to update the V-F characteristics stored in the LUT  120  using the output signal of the VCO  100 . Accordingly, Embodiment 1 can compensate for the error of the chirp signal without stopping the output of the chirp signal. 
         [0088]    Furthermore, according to Embodiment 1, it is configured by employing the MCU  180  in such a manner as to integrally construct the quadrature demodulator  200 , LPF  210 , LPF  211 , phase detector  212 , frequency detector  214  and control voltage setting unit  130  as software on the MCU  180 . This makes it possible to reduce the size of the signal generating circuit. 
         [0089]    Incidentally, although an example is shown here in which the quadrature demodulator  200 , LPF  210 , LPF  211 , phase detector  212 , frequency detector  214  and control voltage setting unit  130  are integrally arranged on the MCU  180 , a configuration is also possible which employs discrete digital circuits or analog circuits. 
         [0090]    In addition, the quadrature demodulator  200 , LFF  210 , LPF  211 , phase detector  212 , frequency detector  214  and control voltage setting unit  130  can be formed by an FPGA (Field Programmable Gate Array). 
         [0091]    Although the signal generating circuit of Embodiment 1 is configured in such a manner as to convert the frequency of the output signal of the frequency divider  115  using the multiplier  140  and the local oscillator  150 , and to output the frequency converted signal to the ADC  170 , a configuration is also possible from which the multiplier  140  and local oscillator  150  are removed, when the frequency divider  115  can convert the frequency down to the frequency the ADC  170  is able to capture. 
         [0092]    Although the control voltage setting unit  130  is configured in such a manner as to set the control voltage using the LUT  120 , a configuration is also possible which sets the control voltage without using the LUT  120 . Thus, a configuration is also possible which does not store the V-F characteristics as a table, but obtains the V-F characteristics through computing processing at the time of setting the control voltage, and sets the control voltage. 
       Embodiment 2 
       [0093]    In Embodiment 1, the configuration is shown which removes the high-frequency components (unnecessary wave components) from the signals output from the quadrature demodulator  200  by using the LPF  210  and LPF  211 , and extracts the difference frequency components (desired wave components). In Embodiment 2, a configuration will be shown which extracts the desired wave component without using the LPF  210  or LPF  211 . 
         [0094]      FIG. 7  is a block diagram showing a configuration of the signal generating circuit of Embodiment 2. 
         [0095]    Incidentally, in  FIG. 7 , the same reference numerals as those of  FIG. 1  designate the same or like components and their description will be omitted. In  FIG. 7 , I designates the inphase signal output from the frequency divider  116 , and Q designates the quadrature signal output from the frequency divider  116 . In addition, IN_MCU_I designates the inphase signal input to the MCU  181 , IN_MCU_Q designates the quadrature signal input to the MCU  181 , and OUT_MCU designates the signal output from the MCU  181 . 
         [0096]    As compared with the configuration of Embodiment 1, the signal generating circuit of Embodiment 2 differs in that it comprises a frequency divider  116  for outputting the inphase signal and the quadrature signal instead of the frequency divider  115 , a multiplier  140   a  and a multiplier  140   b  instead of the multiplier  140 , an LPF  160   a  and an LPF  160   b  instead of the LPF  160 , an ADC  170   a  and an ADC  170   b  instead of the ADC  170 , and an MCU  181  instead of the MCU  180 . 
         [0097]    The multiplier  140   a  and multiplier  140   b  are the same as the multiplier  140 . The LPF  160   a  and LPF  160   b  are the same as the LPF  160 . The ADC  170   a  and ADC  170   b  are the same as the ADC  170 . 
         [0098]    The frequency divider  116  is a frequency divider that divides the frequency of the output signal of the VCO  100 , and outputs the frequency-divided signal as the inphase signal and quadrature signal. In other words, the frequency divider  116  is an oscillator with a quadrature demodulation function. 
         [0099]      FIG. 8  is a block diagram showing a configuration of the MCU  181  of the signal generating circuit of Embodiment 2. 
         [0100]    As compared with the configuration of Embodiment 1, the MCU  181  of Embodiment 2 differs in that it comprises a first quadrature demodulator  200   a  and a second quadrature demodulator  200   b  instead of the quadrature demodulator  200 , comprises an additional adder  213  and subtractor  216 , and omits the LPF  210  and LPF  211 . 
         [0101]    The first quadrature demodulator  200   a  and second quadrature demodulator  200   b  are the same as the quadrature demodulator  200 . 
         [0102]    The adder  213  is a circuit for adding two signals. The function of the adder  213  is implemented by software processing of the MCU  181 . Incidentally, the adder  213  may be comprised of an analog circuit or digital circuit. 
         [0103]    The subtractor  216  is a circuit for subtracting one signal from another signal. The function of the subtractor  216  is implemented by software processing of the MCU  181 . Incidentally, the subtractor  216  may be comprised of an analog circuit or digital circuit. 
         [0104]    Next, the operation of the signal generating circuit of Embodiment 2 will be described. 
         [0105]    Since the operations of the DAC  105 , LPF  110 , VCO  100  and local oscillator  150  are the same as those of Embodiment 1, their description will be omitted. 
         [0106]    The frequency divider  116  divides the frequency of the output signal of the VCO  100 , and outputs the frequency-divided signal as the inphase signal and the quadrature signal orthogonal to each other. 
         [0107]    The multiplier  140   a  multiplies the frequency-divided signal by the frequency divider  116  and the output signal of the local oscillator  150 , and outputs the signal whose frequency is converted by the multiplication. The multiplier  140   b  multiplies the frequency-divided signal by the frequency divider  116  and the output signal of the local oscillator  150 , and outputs the signal whose frequency is converted by the multiplication. 
         [0108]    The LPF  160   a  removes the high-frequency component of the output signal of the multiplier  140   a . The LPF  160   b  removes the high-frequency component of the output signal of the multiplier  140   b.    
         [0109]    The ADC  170   a  converts the output signal of the LPF  160   a  from the analog signal into the digital signal, and outputs the digital signal to the first quadrature demodulator  200   a  of the MCU  181 . The ADC  170   b  converts the output signal of the LPF  160   b  from the analog signal into the digital signal, and outputs the digital signal to the second quadrature demodulator  200   b  of the MCU  181 . 
         [0110]    The signal (IN_MCU_I) output from the ADC  170   a  is given by the following Expression (10). 
         [0000]      [Expression 10] 
         [0000]        Si =cos(2Π( f   vco   /N−f   xo ) t )  (10)
 
         [0111]    The signal (IN_MCU_Q) output from the ADC  170   b  is given by the following Expression (11). 
         [0000]      [Expression 11] 
         [0000]        Sq =sin(2Π( f   vco   /N−f   xo ) t )  (11)
 
         [0112]    The local oscillator  206   a  outputs the local signal whose frequency is f LO  to the 90-degree phase shift distributor  208   a . The 90-degree phase shift distributor  208   a  divides the local signal into two signals with the 90-degree phase difference, and generates a cosine wave (cos(2Πf LO t)) and a sine wave (sin(2Πf LO t)). 
         [0113]    The multiplier  202   a  multiplies the cosine wave (cos(2Πf LO t)) and the output signal (Si) of the ADC  170   a , and outputs the resultant signal (Sii) to the adder  213 . The signal Sii is given by the following Expression (12). 
         [0000]      [Expression 12] 
         [0000]        Sii= 0.5{cos(2Π( f   vco   /N−f   xo   −f   LO ) t +cos(2Π( f   vco   /N−f   xo   +f   LO ) t )}  (12)
 
         [0114]    The multiplier  204   a  multiplies the sine wave (sin(2Πf LO t)) and the output signal (Si) of the ADC  170   a , and outputs the resultant signal (Siq) to the subtractor  216 . The signal Siq is given by the following Expression (13). 
         [0000]      [Expression 13] 
         [0000]        Siq= 0.5{−sin(2Π( f   vco   /N−f   xo   −f   LO ) t +sin(2Π( f   vco   /N−f   xo   +f   LO ) t )}  (13)
 
         [0115]    The local oscillator  206   b  outputs the local signal whose frequency is f LO  to the 90-degree phase shift distributor  208   b . The 90-degree phase shift distributor  208   b  divides the local signal into two signals with the 90-degree phase difference, and generates a cosine wave (cos(2Πf LO t)) and a sine wave (sin(2Πf LO t)). 
         [0116]    The multiplier  202   b  multiplies the cosine wave (cos(2Πf LO t)) and the output signal (Sq) of the ADC  170   b , and outputs the resultant signal (Sqi) to the subtractor  216 . The signal Sqi is given by the following Expression (14). 
         [0000]      [Expression 14] 
         [0000]        Sqi= 0.5{sin(2Π( f   vco   /N−f   xo   −f   LO ) t −sin(2Π( f   vco   /N−f   xo   +f   LO ) t )}  (14)
 
         [0117]    The multiplier  204   b  multiplies the sine wave (sin(2Πf LO t)) and the output signal (Sq) of the ADC  170   b , and outputs the resultant signal (Sqq) to the adder  213 . The signal Sqq is given by the following Expression (15). 
         [0000]      [Expression 15] 
         [0000]        Sqq= 0.5{cos(2Π( f   vco   /N−f   xo   −f   LO ) t −cos(2Π( f   vco   /N−f   xo   +f   LO ) t )}  (15)
 
         [0118]    The adder  213  adds the signals Sii and Sqq, and outputs the addition signal to the phase detector  212 . The addition signal is given by the following Expression (16). Adding Sii and Sqq can cancel the unnecessary high-frequency component, and thus the low pass filter for removing the high-frequency component becomes unnecessary. 
         [0000]      [Expression 16] 
         [0000]        Sii+Sqq =cos(2Π( f   vco   /N−f   xo   −f   LO ) t )  (16)
 
         [0119]    The subtractor  216  subtracts the signal Siq from the signal Sqi, and outputs the difference signal to the phase detector  212 . The difference signal is given by the following Expression (17). Subtracting Siq from Sqi can cancel the unnecessary high-frequency component, and thus the low pass filter for removing the high-frequency component becomes unnecessary. 
         [0000]      [Expression 17] 
         [0000]        Sqi−Siq =sin(2Π( f   vco   /N−f   xo   −f   LO ) t )  (17)
 
         [0120]    Here, Expression (16) corresponds to the inphase signal described in Embodiment 1 (Expression (5)), and Expression (17) corresponds to the quadrature signal described in Embodiment 1 (Expression (6)). 
         [0121]    The operation after that, that is, the operations of the phase detector  212 , frequency detector  214  and control voltage setting unit  130  are the same as those of Embodiment 1, and hence their description will be omitted. 
         [0122]    The signal generating circuit of Embodiment 2 configured as described above can achieve the same effect as Embodiment 1 without using the LPF  210  and LPF  211 . This enables the MCU  181  to cut the computing processing of the LPF  210  and LPF  211 , thereby offering an advantage of being able to reduce the load of the computing processing of the MCU  181 . In particular, when the order of the filters of the LPF  210  and LPF  211  must be raised, the computing processing for the signals grows larger, and so the reduction effect of the load increases. 
       Embodiment 3 
       [0123]    The above-described Embodiment 1 shows a configuration which locates the quadrature demodulator  200  in the MCU  180 . Embodiment 3 shows a configuration which removes the quadrature demodulator  200  from the MCU  180 , and locates the quadrature demodulator  200  outside the MCU  180  as an analog circuit. 
         [0124]      FIG. 9  is a block diagram showing a configuration of the signal generating circuit of Embodiment 3. 
         [0125]    Incidentally, in  FIG. 9 , the same reference numerals as those of  FIG. 1  designate the same or like components, and their description will be omitted. In  FIG. 9 , IN_MCU_I designates the inphase signal input to the MCU  182 , IN_MCU_Q designates the quadrature signal input to the MCU  182 , and OUT_MCU designates the signal output from the MCU  182 . 
         [0126]    As compared with the configuration of Embodiment 1, the signal generating circuit of Embodiment 3 differs in that it comprises a quadrature demodulator  200  instead of the multiplier  140  and local oscillator  150 , an LPF  160   a  and an LPF  160   b  instead of the LPF  160 , an ADC  170   a  and an ADC  170   b  instead of the ADC  170 , and the MCU  182  instead of the MCU  180 . 
         [0127]      FIG. 10  is a block diagram showing a configuration of the MCU  182  of the signal generating circuit of Embodiment 3. 
         [0128]    As compared with MCU  180  of Embodiment 1, the MCU  182  of Embodiment 3 differs in that it does not comprise the quadrature demodulator  200 . 
         [0129]    Next, the operation of the signal generating circuit of Embodiment 3 will be described. 
         [0130]    As for the operations of the DAC  105 , LPF  110 , VCO  100 , and frequency divider  115 , since they are the same as those of Embodiment 1, their description will be omitted. 
         [0131]    The local oscillator  206  outputs the local signal whose frequency is f LO  to the 90-degree phase shift distributor  208 . The 90-degree phase shift distributor  208  divides the local signal into two signals with a phase difference of 90 degrees, and generates the cosine wave (cos(2Πf LO t)) and sine wave (sin(2Πf LO t)). 
         [0132]    The multiplier  202  multiplies the cosine wave and the output signal of the frequency divider  115 , and outputs the resultant signal to the LPF  160   a  as the inphase signal. The signal output from the multiplier  202  is given by the following Expression (18). 
         [0000]      [Expression 18] 
         [0000]        Si= 0.5{cos(2Π( f   vco   /N−f   LO ) t +cos(2Π( f   vco   /N+f   LO ) t )}  (18)
 
         [0133]    The multiplier  204  multiplies the sine wave and the output signal of the frequency divider  115 , and outputs the resultant signal to the LPF  160   b  as the quadrature signal. The signal output from the multiplier  204  is given by the following Expression (19). 
         [0000]      [Expression 19] 
         [0000]        Sq= 0.5{−sin(2Π( f   vco   /N−f   LO ) t +sin(2Π( f   vco   /N+f   LO ) t )}  (19)
 
         [0134]    The LPF  160   a  removes the high-frequency component of the output signal of the multiplier  202 . The signal whose high-frequency component is removed is given by the following Expression (20). 
         [0000]      [Expression 20] 
         [0000]        Si =cos(2Π( f   vco   /N−f   LO ) t )  (20)
 
         [0135]    The LPF  160   b  removes the high-frequency component of the output signal of the multiplier  204 . The signal whose high-frequency component is removed is given by the following Expression (21). 
         [0000]      [Expression 21] 
         [0000]        Sq =−sin(2Π( f   vco   /N−f   LO ) t )  (21)
 
         [0136]    The ADC  170   a  converts the output signal of the LPF  160   a  (Expression (20)) from an analog signal into a digital signal, and outputs the digital signal to the phase detector  212  of the MCU  182 . The ADC  170   b  converts the output signal of the LPF  160   b  (Expression (21)) from an analog signal into a digital signal, and outputs the digital signal to the phase detector  212  of the MCU  182 . 
         [0137]    As for the operations thereafter, that is, the operations of the phase detector  212 , frequency detector  214  and control voltage setting unit  130 , since they are the same as those of Embodiment 1, their description will be omitted. 
         [0138]    The signal generating circuit of Embodiment 3 with the foregoing configuration achieves the same advantages as Embodiment 1. Furthermore, since the signal generating circuit of Embodiment 3 comprises the quadrature demodulator  200  as the analog circuit outside the MCU  182 , it can carry out the quadrature demodulation at a speed higher than the configuration of carrying out the quadrature demodulation as the digital processing in the MCU. Thus, the present embodiment 3 can carry out the quadrature modulation and demodulation by the high-speed frequency-modulated signal. Furthermore, since the signal generating circuit of Embodiment 3 can obviate the necessity for the quadrature demodulator  200  in the MCU  180 , it can reduce the load of the digital processing in the MCU  182 . 
         [0139]    Incidentally, although a configuration using the MCU  182  is shown here, it is also possible to use the MCU  181  instead of the MCU  182 . 
       REFERENCE SIGNS LIST 
       [0140]      100 : VCO;  105  DAC;  110 ,  160 ,  160   a ,  160   b ,  210 ,  211 : LPF;  115 ,  116 : frequency divider;  120 : LUT;  130 : control voltage setting unit;  140 ,  140   a ,  140   b ,  202 ,  202   a ,  202   b ,  204 ,  204   a ,  204   b : multiplier;  170 ,  170   a ,  170   b : ADC;  180 ,  181 ,  182 : MCU;  200 ,  200   a ,  200   b : quadrature demodulator;  150 ,  206 ,  206   a ,  206   b : local oscillator;  208 ,  208   a ,  208   b:  90-degree phase shift distributor;  212 : phase detector;  213 : adder;  214 : frequency detector; and  216 : subtractor.