Abstract:
The present invention introduces methods and circuits to amplify audio signals for driving speakers. An additional feedback circuit is added in an audio amplifier to couple the amplifier stage and output stage of the audio amplifier. The feedback circuit turned off as long as output voltages of the audio amplifier are not near saturation. The feedback circuit is turned on to reduce audible noises if output voltages of the audio amplifier are near saturation.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
   This application claims priority to U.S. provisional patent application Ser. No. 60/620,149, filed on Oct. 18, 2004, which is hereby incorporated herein by reference. 
   TECHNICAL FIELD 
   The present invention relates generally to audio signal processing, and in particular, relates to a system that includes a Class D amplifier for audio signal amplification and other audio signal processing. 
   BACKGROUND INFORMATION 
   Class-D audio amplifiers are often used for audio amplification because of their power efficiency. Typically, the Class D audio amplifier is operated in the switch mode with minimized internal power consumption. It produces a rectangular wave at the output stage that is filtered before delivered to a load. The filtered signal wave is an amplified version of the input signal wave. Class D audio amplifiers are usually used for high power applications. For low power applications, Class A/B amplifiers are still popular. 
   When the input audio signal exceeds the audio amplifier&#39;s linear range, the output of the amplifier saturates. Oscillations at the audible band are often observed when the amplifier enters the saturation condition and exits the saturation condition, as indicated in  FIG. 3 . This may result in the “clipping” of audible noises. This problem is more severe in the class D audio amplifier because the switching power supply can skip switching cycles due to the minimum on and off time constraints. If the power supply skips sufficient cycles, the effective operation frequency may enter the audible frequency range and induce unexpected audible noises. 
   There are several known methods to resolve the problem. The first method is to limit the amplitude of the input signal with a clamping circuit. However, without information on the audio source&#39;s output impedance, this may not be practical and can degrade the audio signal quality. The second method is to add an automatic gain control (AGC) pre-amplifier before the input of the class-D audio amplifier. This AGC pre-amplifier limits the input signal amplitude to prevent the output saturation, but the implementation is rather complex and adds a significant cost. The limitation may get more severe for low frequency audio signals. The third method is to add a high-pass filter to limit the minimum audio frequency passing into the class-D amplifier, but may not solve the problem completely. 
   Accordingly, more improvements are needed to reduce audio noise near saturation in the class D audio amplifier. 

   
     BRIEF DESCRIPTION OF DRAWINGS 
     The following figures illustrate embodiments of the invention. These figures and embodiments provide examples of the invention and they are non-limiting and non-exhaustive. 
       FIG. 1  shows simplified schematic diagram of a BTL Class D amplifier with proposed anti-saturation circuit. 
       FIG. 2  is an example of the invention in a bridge tied load (BTL) Class D amplifier. 
       FIG. 3  shows output waveforms with and without the invention in the BTL Class D amplifier. 
   

   DETAILED DESCRIPTION 
   Embodiments of a system and method that uses an audio amplifier and accompanying circuitry to achieve highly efficient audio signal amplification and other audio signal processes are described in detail herein. In the following description, some specific details, such as example circuits and example values for these circuit components, are included to provide a thorough understanding of embodiments of the invention. One skilled in relevant art will recognize, however, that the invention can be practiced without one or more specific details, or with other methods, components, materials, etc. 
   The following embodiments and aspects are illustrated in conjunction with systems, circuits, and methods that are meant to be exemplary and illustrative. In various embodiments, the above problem has been reduced or eliminated, while other embodiments are directed to other improvements. 
   The present invention relates to circuits and methods of high efficient audio signal amplification. Proposed circuits in an audio amplifier can detect output voltages in near saturation states, and adjust the close-loop gain of an amplifier control stage of the amplifier to prevent output voltages from “clipping” and remove audio signal oscillations near saturation. 
     FIG. 1  is an embodiment of a simplified system according to the invention. The system comprises an amplifier control stage, AA, and an output stage, OO. 
   In the amplifier control stage AA, an audio input signal is coupled to an input node, VN, through a resistor, R 1 . Ground is coupled to an input node, VP, through a resistor, R 3 . VN and VP are coupled by a capacitor, Cs. VN is the negative input terminal for a comparator, CMP 1 , and VN is also the positive input terminal for a comparator, CMP 2 . VP is the positive input terminal for CMP 1 , and VP is also the negative input terminal for CMP 2 . The output signal of CMP 1  feeds back to VN through an adjustable resistor, R 2 . The output signal of CMP 2  feeds back to VP through another adjustable resistor, R 4 . 
   The amplifier control stage and the output stage are coupled at nodes SW 1  and SW 2 . In output stage, OO, a rectangular waveform at SW 1  is filtered by an inductor, Lf 1 , and a capacitor, Cf 1 , being coupled to ground, and then delivered to an output node, OUT 1 . A rectangular waveform at SW 2  is filtered by an inductor, Lf 2 , and a capacitor, Cf 2 , being coupled to ground, and then delivered to an output node, OUT 2 . The output stage OO further includes a speaker. 
   The output voltage of the system, the output voltage of CMP 1 , V out1 , and the output voltage of CMP 2 , V out2 , can be approximately expressed in the following equations: 
   Under conditions, R 1 =R 3 =R i , R 2 =R 4 =R f , 
   
     
       
         
           
             
               
                 
                   V 
                   VN 
                 
                 = 
                 
                   
                     
                       
                         R 
                         f 
                       
                       
                         
                           R 
                           i 
                         
                         + 
                         
                           R 
                           f 
                         
                       
                     
                     ⁢ 
                     
                       V 
                       in 
                     
                   
                   + 
                   
                     
                       
                         R 
                         i 
                       
                       
                         
                           R 
                           i 
                         
                         + 
                         
                           R 
                           f 
                         
                       
                     
                     ⁢ 
                     
                       V 
                       out1 
                     
                   
                 
               
             
             
               
                 ( 
                 1 
                 ) 
               
             
           
           
             
               
                 
                   V 
                   VP 
                 
                 = 
                 
                   
                     
                       R 
                       i 
                     
                     
                       
                         R 
                         i 
                       
                       + 
                       
                         R 
                         f 
                       
                     
                   
                   ⁢ 
                   
                     V 
                     out2 
                   
                 
               
             
             
               
                 ( 
                 2 
                 ) 
               
             
           
           
             
               
                 
                   V 
                   VN 
                 
                 = 
                 
                   V 
                   VP 
                 
               
             
             
               
                 ( 
                 3 
                 ) 
               
             
           
           
             
               
                 
                   V 
                   out 
                 
                 = 
                 
                   
                     
                       V 
                       out1 
                     
                     - 
                     
                       V 
                       out2 
                     
                   
                   = 
                   
                     
                       - 
                       
                         
                           R 
                           f 
                         
                         Ri 
                       
                     
                     ⁢ 
                     
                       V 
                       in 
                     
                   
                 
               
             
             
               
                 ( 
                 4 
                 ) 
               
             
           
         
       
     
   
   From Equations (4), the closed-loop gain of the amplifier is equal to (R f /R i ). In one embodiment of this invention, both R 2  and R 4  are adjustable if the output voltages at OUT 1  and OUT 2  are near saturation. Hence, the closed-loop gain of the amplifier is adjustable if the output signals at OUT 1  and OUT 2  are near saturation. 
   An example of embodiments is shown in a bridge tied load (BTL) Class D amplifier of  FIG. 2 . The system comprises a class D amplifier circuit A, and an output stage, O. 
   In the circuit A, an input signal is coupled to a node X 1  through a capacitor, C 1 , and a resistor R 1 . Ground is coupled to a node X 2  through a capacitor, C 2 , and a resistor R 2 . The capacitor, C 1 , is introduced to block DC components of input signal. The nodes, X 1  and X 2 , are coupled by a capacitor, C 3 . The signal at a node SW 1  is fed back to X 1  through a resistor, R 9 , connected to a grounded capacitor, C 9 , and through a resistor, R 5 . The signal at a node SW 2  is fed back to X 2  through a resistor, R 10 , connected to a grounded capacitor, C 10 , and through a resistor, R 7 . 
   In output stage, O, a rectangular waveform at SW 1  is filtered by an inductor, L 1 , and a capacitor, C 11 , which is coupled to ground, and then delivered to an output node, OUT 1 +. A rectangular waveform at SW 2  is filtered by an inductor, L 2 , and a capacitor, C 12 , which is coupled to ground, and then delivered to an output node, OUT 1 −. The output stage O is used to drive a load, such as a loudspeaker, SP 1 :A. A capacitor, C 13 , is connected in parallel with SP 1 :A and coupled between OUT 1 + and OUT 1 −. 
   In the upper half of A, the voltage signal at OUT 1 + is fed back to X 1  through two back-to-back “Zener” diodes, Q 1  and Q 3 , and a resistor, R 6 . And the minimum output voltage to turn on “Zener” diodes, Q 1  and Q 3  is |V1|. The feedback circuit through Q 1 , Q 3 , and R 6  is cut off as long as the absolute value of output voltage at OUT 1 + is less than |V1|. The close-loop gain of the amplifier A is equal to R f /R i . When the output voltage at OUT 1 + exceeds V 1  or less than −V 1 , Q 1  and Q 3  are turned on and the feedback circuit through Q 1 , Q 3 , and R 6  is connected. The close-loop gain of the upper half of A is reduced to R f ′/R i . R f ′ is the effective resistance of two parallel circuits. One of two parallel circuits is R 5  and R 9  in series with grounded C 9 . The other circuit is R 6 , Q 1 , and Q 3  in series. R f ′ is less than either (R 5 +R 9 ) or (R 6 +R Q1 +R Q2 ). As a result, the close-loop gain of the upper half of A is reduced when the output voltage at OUT 1 + exceeds V 1  or less than −V 1 . 
   In the lower half of A, the voltage signal at OUT 1 − is fed back to X 2  through two back-to-back “Zener” diodes, Q 2  and Q 4 , and a resistor, R 8 . And the minimum output voltage to turn on “Zener” diodes, Q 2  and Q 4  is |V1|. The feedback circuit through Q 2 , Q 4 , and R 8  is cut off as long as the absolute value of output voltage at OUT 1 − is less than |V1|. The close-loop gain of the lower half of A is also equal to R f /R i . When the output voltage at OUT 1 − exceeds V 1  or less than—V 1 , Q 2  and Q 4  are turned on and the feedback circuit through Q 2 , Q 4 , and R 8  is connected. The close-loop gain of the lower half of A is reduced to R f ″/R i . R f ″ is the effective resistance of two parallel circuits. One of two parallel circuits is R 7  and R 10  in series with grounded C 10 . The other circuit is R 8 , Q 2 , and Q 4  in series. R f ″ is less than either (R 7 +R 10 ) or (R 8 +R Q2 +R Q4 ). As a result, the close-loop gain of the lower half of A is reduced when the output voltage at OUT 1 − exceeds V 1  or less than −V 1 . Thus, the circuit produces clean output voltages without low frequency oscillations. 
   In present invention, an additional feedback circuit is introduced between an amplifier circuit and an output stage. The feedback circuit couples input terminals of the amplifier circuit and either the output terminals of the amplifier circuit or the output terminals of the output stage. It is normally turned off as long as the absolute value of output voltages is less than a preset value, |V1|. When the value of output voltages are over |V1| or near saturation condition, it is turned on. Since the additional feedback circuit is in parallel with an existing feedback circuit, the effective resistance of the feedback circuit is reduced once the additional feedback circuit is turned on. Hence, the closed-loop gain of the amplifier circuit is reduced when output voltages are near saturation. Output voltages have less gain and become more curved when the values of output voltage are over |V1| or near saturation. As a result, audio noises are greatly reduced or eliminated when output signals are near saturation. 
   The description of the invention and its applications as set forth herein is illustrative and is not intended to limit the scope of the invention. Variations and modifications of the embodiments disclosed herein are possible, and practical alternatives to and equivalents of the various elements of the embodiments are known to those of ordinary skill in the art. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the invention.