Abstract:
A ESD protective device is proposed, including a vertical bipolar transistor connected as a diode, in which the contacting of the collector layer is designed highly resistive. The arrangement, while having a space-saving construction, has an increased snap-back voltage.

Description:
FIELD OF THE INVENTION 
   The present invention relates to a protective device. 
   BACKGROUND INFORMATION 
   A protective device is described in German Patent Application No. 1 97 46 410.6, in which, in the case of electrostatic discharge (ESD), a vertically arranged transistor diode is switched through by a lateral punch-through effect. In the protective device described there, however, the snap-back voltage, i.e. the minimum voltage which has to be present between collector and emitter after breakdown so that the diode remains switched through, is limited to a value which is predetermined by the thickness of the layer of the semiconductor system&#39;s surface area, on which the protective device is mounted. 
   SUMMARY OF THE INVENTION 
   As compared to that, the protective device according to the present invention has the advantage, at constant breakthrough voltage, of an increased snap-back voltage, as a result of an highly resistive collector interface during the inactive state of the protective device. Thereby, circuits integrated into the semiconductor system can be protected from ESD pulses which are driven by higher voltages. If an integrated circuit is operated, for example, on 25 volt, the snap-back voltage of the protective element has to be greater than 25 volt, so that when an ESD pulse occurs, after discharge of the ESD pulse by the protective element, the operating voltage does not leave the protective element in a switched-through state. The arrangement according to the present invention makes possible the availability of an appropriate protective element in a space-saving manner, since it is no longer necessary, as it was up to now, to combine a plurality of protective elements in order to guarantee a sufficiently high snap-back voltage. 
   It is particularly advantageous to provide a sinker electrode which is used, on the one hand, to protect from parasitic currents, and with which, on the other hand, the snap-back voltage of the protective device realized by way of a vertically arranged transistor diode can be set in a controlled manner by the corresponding choice of the distance from the connecting layer. 

   
     BRIEF DESCRIPTION OF THE DRAWINGS 
       FIG. 1  shows a protective device which has already been described in the above cited, not yet published German patent application. 
       FIG. 2  shows an exemplary embodiment of the present invention. 
       FIG. 3  shows a current-voltage diagram. 
   

   DETAILED DESCRIPTION 
     FIG. 1  shows a cross sectional lateral view of a protective device which is arranged on a p-doped semiconductor substrate  30 . An n-doped surface area  52  is deposited epitactically on substrate  30 , a strongly n-doped, buried layer  54  being positioned between the surface area and the substrate. On surface  10  of surface area  52  a p-doped well  50  is inserted into which, again, a strongly p-doped region  40  is inserted, as well as a strongly n-doped region  56  immediately next to it, which are electrically connected to each other on the surface by a metallic emitter electrode  44 . An insulating oxide layer  100 , arranged on the surface, separates p-well  50  from a strongly n-doped connecting layer  42 , inserted next to it in the surface, which can be contacted electrically by a collector electrode  46 . Connecting layer  42  overlaps a strongly n-doped sinker electrode  540  inserted into surface area  52 , which, in turn, partially overlaps buried area  54 . The doping of p-well  50  typically lies in a range near 10 17  cm −3 . The n-doping of surface area  52  typically lies in a range near 10 5  cm −3 , and the doping of the strongly n-doped connecting layer  42  typically in a range near 10 19  cm −3 . 
   The blocking polarization of the pn junction between p-well  50  and surface area  52  is relevant to the application of such a device as ESD protection. The clearance between the p-well and connecting layer  42  is dimensioned such that the depletion layer in surface area  52 , growing with increasing blocking voltage, reaches connecting layer  42  before the breakdown voltage between p-well  50  and surface area  52  is reached. Thus, breakdown takes place between well  50  and connecting layer  42  as a consequence of the depletion-layer contact effect. 
     FIG. 2  shows an exemplary embodiment of the protective device according to the present invention. The same reference numerals as in  FIG. 1  denote the same or similar component parts, and are not described again in the following. Connecting layer  42  is positioned at a distance from well  50 ; the distance is marked as “y”. Connecting layer  42  is also positioned at a distance from sinker electrode  540 ; the corresponding distance is marked as “x”. In this case, x has a positive magnitude, that means, that connecting layer  42  and the sinker electrode do not overlap, but rather there exists a local minimum in the pattern of doping concentration along the surface of the sinker electrode and over to connecting layer  42 , and this minimum is formed by intermediate region  600 , which is a part of surface region  52 . 
   A transistor diode (three-layer diode) is formed from p-well  50  as base, which is short-circuited with strongly n-doped region  56  functioning as emitter via strongly p-doped region  40  and emitter electrode  44 , and from buried layer  54  as collector. The electrical interface of the collector via collector electrode  46  comes about by way of strongly n-doped connecting layer  42 . For application as ESD protection, the transistor diode is polarized in blocking direction, that is, for example, ground potential is applied to emitter electrode  44  and the positive potential of a terminal of an adjacent integrated circuit to be protected from electrostatic discharges is applied to collector electrode  46 . As long as the potential difference between the electrodes lies below the breakdown voltage, the transistor diode blocks (analogously to the arrangement in FIG.  1 ). Furthermore, connecting layer  42  is connected to the buried layer only in a very highly resistive manner, since each possible current path between the connecting layer and the buried layer proceeds through the surface region (which is weakly doped relatively to the buried layer and the connecting layer). However, this leads, in the case of a breakdown, to the transistor diode&#39;s having an increased snap-back voltage compared to the arrangement in FIG.  1 . The value of the snap-back voltage can be set by the distance x of the connecting layer from the sinker electrode, and it increases as x gets larger. The breakdown voltage is largely independent of the snap-back voltage, and it can also be selected by a corresponding dimensioning of distance y. 
   Sinker electrode  540  is not essential for the functioning principle of the arrangement, and can therefore be omitted. However, it is useful for delimiting the protective device from other circuits, and thereby preventing parasitic effects or leakage currents into the substrate. Corresponding devices as described in  FIG. 2  can also be realized using interchanged doping. 
     FIG. 3  shows a diagram of current I in arbitrary units between collector electrode  46  and emitter electrode  44  as a function of the electrical potential difference in volts between these electrodes. Curve x 0  characterizes an arrangement according to  FIG. 1 , curves x 2 , x 4 , x 8  and x 10  characterize the arrangement according to the present invention as in  FIG. 2 , the numbers after the x giving in each case the distance of connecting layer  42  from sinker electrode  540 . As soon as the voltage reaches a value of approximately 57 volt, all the arrangements become low-resistive in the blocking direction, the snap-back voltage being given by the relative minimum of the voltage after breakdown. In the case of the arrangement as in  FIG. 1 , the snap-back voltage is about 25 volt. For x greater than zero the snap-back voltage is increased, and the breakdown voltage remains largely the same, as mentioned before. For large x, differences are hardly recognizable, meaning that the borderline case of maximum snap-back voltage at exclusive variation of x is given by the omission of the sinker electrode. 
   The increased snap-back voltage is explained by the highly resistive interface of the buried layer with the connecting layer. Thus, the transistor function is actually impaired, which, however, is unimportant as far as its function as ESD protective element is concerned, since at switching through the equipment in blocking direction the surface region is overwhelmed by charge carriers and thus becomes low-resistive. This is supported by an additionally appearing avalanche effect between connecting layer and surface region, which generates additional charge carriers. Thus, the novel protective device has a strongly current-dependent resistance, which becomes low-resistive at the “right” point in time, i.e. at the time of the breakdown, that is, when the protective function is activated, in order to guarantee bleeding off an ESD pulse. At large distances between sinker electrode and connecting layer (8 or 10 micrometer) the avalanche effect clearly appears between the connecting layer and the surface region: The respective characteristic curves demonstrate a smaller increase in the high current region than in the case x=0, i.e. the high current resistance of the collector interface is then even lowered in comparison to an arrangement in which the buried layer is connected relatively low-resistively to the connecting layer via the sinker electrode.