Abstract:
A method for reducing an effect of a disturbance signal on an output of a dynamic system. The method includes generating an increment of the disturbance signal, and modifying an incremental signal input to the dynamic system based on the increment of the disturbance signal, thereby reducing the effect of the disturbance signal. According to one embodiment the method includes generating an increment by calculating a difference between two values sampled during consecutive sampling periods, wherein a first one of the two values is sampled during a first one of the consecutive sampling periods, and wherein a second one of the two values is sampled during a second one of the consecutive sampling periods, and wherein the two values are disturbances.

Description:
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH &amp; DEVELOPMENT 
     The invention described herein was made with Government support under Contract No. N00019-96-C-0176 awarded by the Department of Defense. The Government has certain rights to the invention. 
    
    
     BACKGROUND OF THE INVENTION 
     This invention relates generally to a dynamic system and more particularly to systems and methods for reducing an effect of a disturbance. 
     A dynamic system, such as a gas turbine, wind turbine, an engine, a motor, or a vehicle, has at least one input and provides at least one output based on the at least one input. However, the dynamic system is subjected to a plurality of disturbances, which are inputs to the dynamic system that have an undesirable effect on the at least one output. 
     BRIEF DESCRIPTION OF THE INVENTION 
     In one aspect, a method for reducing an effect of a disturbance signal on an output of a dynamic system is described. The method includes generating an increment of the disturbance signal, and modifying an incremental signal input to the dynamic system based on the increment of the disturbance signal. 
     In another aspect, a processor for reducing an effect of a disturbance signal on an output of a dynamic system is described. The processor is configured to generate an increment of the disturbance signal, and modify an incremental signal input to the dynamic system based on the increment of the disturbance signal. 
     In yet another aspect, a method for attenuating is provided. The method includes attenuating, across a range of frequencies, an impact of a disturbance on a dynamic system. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a block diagram of an exemplary system for reducing an effect of a disturbance. 
         FIG. 2  is a block diagram of an exemplary dynamic apparatus which may be used with the system shown in  FIG. 1 . 
         FIG. 3  is a block diagram of an alternative embodiment of a dynamic system which may be used with the system shown in  FIG. 1 . 
         FIG. 4  shows an embodiment of a plurality of plots that may be used for reducing an effect of a disturbance. 
         FIG. 5  shows a plurality of exemplary graphs that may be used in reducing an effect of a disturbance. 
         FIG. 6  is a block diagram of an exemplary dynamic disturbance rejection system (DDRS) that may be used with the system shown in  FIG. 1 . 
         FIG. 7  is a block diagram of an alternative embodiment of a DDRS, which may be used with the system shown in  FIG. 1 . 
         FIG. 8  illustrates a plurality of graphs showing system response illustrating an exemplary effect of basic control without dynamic disturbances. 
         FIG. 9  illustrates a plurality of graphs showing system response illustrating an exemplary effect of disturbance signals without applying the method of reducing an effect of a disturbance. 
         FIG. 10  illustrates a plurality of graphs showing system response illustrating an exemplary effect of disturbance signals and applying the method of reducing an effect of a disturbance. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       FIG. 1  is a block diagram of an exemplary system  10  that may be used to facilitate reducing an effect of a disturbance. In the exemplary embodiment, system  10  includes a controller  12 , a dynamic disturbance reduction system (DDRS)  14 , and a dynamic system  16 . As used herein, the term controller is not limited to just those integrated circuits referred to in the art as a controller, but broadly refers to a computer, a processor, a microcontroller, a microcomputer, a programmable logic controller, an application specific integrated circuit, and other programmable circuits. Moreover, examples of DDRS  14  include, but are not limited to, a controller, a computer, a processor, a microcontroller, a microcomputer, a programmable logic controller, an application specific integrated circuit, and other programmable circuits. An example of dynamic system  16  includes, but is not limited to, a water tank, a gas tank, an engine system, such as, an internal combustion engine, a diesel engine, or a gas turbine used in power plants or alternatively aircraft propulsion, and a vehicle. Examples of the vehicle include a car, an airplane, a truck, and a motorcycle. Dynamic system  16  can be a single-input-single-output (SISO) system or alternatively system  16  can be a multiple-input-multiple-output (MIMO) system. Dynamic system  16  may include a magnet, an electrical device, a mechanical device, and/or a chemical substance. Dynamic system  16  may be implemented in, but is not limited to being implemented in, aerospace industry, marine industry, paper industry, automotive industry, plastic industry, food industry, and/or pharmaceutical industry. 
     Controller  12  receives from a supervisory system, such as a person or supervisory computer, via an input device, a discrete controller input signal  18  or R k , which is a signal in a discrete time domain, and processes the input signal  18  or R k  to output a discrete controller output signal  20  or v k , which is a signal in the discrete time domain. The variable k is an integer. Each value of k represents a sampling period t s  described below. For example, k=1 represents a first sampling period and k=2 represents a second sampling period. Controller  12  receives controller input signal  18  from the person via an input device, or from a supervisory computer across a communication device, or from a supervisory algorithm in-situ with the discrete controller  12 . An example of the input device includes a mouse, keyboard, or any other analog or digital communication device. An example of a process performed by controller  12  on discrete controller input signal  18  includes integration, filtering, and/or determining a rate of change of information within discrete controller input signal  18 . An example of discrete controller input signal  18  includes a signal representative of a thrust demand, which is an amount of thrust, of a propulsion system and a power demand, which is an amount of power, of a power plant. Other examples of discrete controller input signal  18  include a signal representative of a rate of change of an altitude and a rate of change of speed. Examples of discrete controller output signal  20  include a signal representative of a rate of the thrust demand, a rate of change of the power demand, a rate of change of fuel flow, and a rate of change of an exhaust nozzle area. 
     DDRS  14  receives discrete controller output signal  20  and a discrete disturbance signal  22  or d k , which is a signal in the discrete time domain. DDRS  14  reduces an effect of discrete disturbance signal  22  on a dynamic system output signal  24  or y k , which is a signal in the discrete time domain, by generating a discrete DDRS output signal  26  or u k , which is a signal in the discrete time domain. Examples of discrete dynamic system output signal  24  include a signal representative of an engine pressure ratio (EPR) across an engine within dynamic system  16 , a thrust output by dynamic system  16 , a speed of dynamic system  16 , a power of dynamic system  16 , and/or an increase or decrease in a level of fluid within a fluid tank. Examples of discrete disturbance signal  22  include a signal representative of a flow of air, a flow of fuel, a flow of water, or a flow of chemical into dynamic system  16 , at least one environmental ambient condition, such as humidity or condensation, due to weather or an operating condition surrounding dynamic system  16 , a temperature or alternatively pressure of the atmosphere surrounding dynamic system  16 , a flow of energy from an actuator or alternatively an effector into dynamic system  16 , and/or a variable geometry, such as a plurality of variable stator vanes, a plurality of variable guide vanes, a plurality of variable by-pass ratios, which change basic physical relationships in dynamic system  16 . 
     A sensor, such as a position sensor, a flow sensor, a temperature sensor or a pressure sensor, measures a parameter, such as a position, a flow, a temperature or alternatively a pressure, of a sub-system, such as a tire or an engine, within dynamic system  16  to generate discrete disturbance signal  22 . Alternatively, discrete disturbance signal  22  can be estimated or calculated by an estimation algorithm executed by a controller. For example, discrete disturbance signal  22  can be a temperature calculated or estimated, by the estimation algorithm and the estimation algorithm calculates or estimates the temperature by using information from one or a combination of sensors including a speed sensor, a pressure sensor that senses a pressure at a location within or alternatively outside dynamic system  16 , and a plurality of temperatures sensors that sense temperatures at a plurality of locations in dynamic system  16 . It is noted that in an alternative embodiment, at least one of controller  12  and DDRS  14  are coupled to a memory device, such as a random access memory (RAM) or a read-only memory (ROM), and an output device, such as a display, which can be a liquid crystal display (LCD) or a cathode ray tube (CRT). 
       FIG. 2  is a block diagram of a dynamic apparatus  50 , which is an example of dynamic system  16 . In the exemplary embodiment, exemplary dynamic apparatus  50  is a Multiple-Input Multiple-Output (MIMO) dynamic apparatus that receives a plurality of discrete dynamic apparatus input signals  52  and  54 , receives a plurality of discrete dynamic apparatus disturbance signals  56  and  58 , and generates a plurality of discrete dynamic apparatus output signals  60  and  62  based on input signals  52  and  54  and/or disturbance signals  56  and  58 . Each discrete dynamic apparatus input signal  52  and  54  is an example of DDRS output signal  26  (shown in  FIG. 1 ). Moreover, each discrete dynamic apparatus disturbance signal  56  and  58  is an example of disturbance signal  22  (shown in  FIG. 1 ), and each discrete dynamic apparatus output signal  60  and  62  is an example of discrete dynamic system output signal  24 . It is noted that in an alternative embodiment, dynamic apparatus  50  receives any number of discrete dynamic apparatus input signals, and outputs any number of discrete dynamic apparatus output signals based on the discrete dynamic apparatus input signals and discrete dynamic apparatus disturbance signals. 
       FIG. 3  is a block diagram of an alternative embodiment of a dynamic system  16  that may be used with system  10  (shown in  FIG. 1 ). Dynamic system  16  includes an integrator  100  and a plant  102 . An example of plant  102  includes an engine, such as a turbine engine or a car engine, and/or an electronic commutated motor. Integrator  100  receives discrete DDRS output signal  26 , and integrates discrete DDRS output signal  26  to generate a discrete integrator output signal  104 . Plant  102  receives discrete integrator output signal  104  and generates discrete dynamic system output signal  24  based on output signal  104  and disturbance signal  22 . For example, a turbine engine outputs thrust based on a signal representing an amount of fuel flow to the turbine engine and based on its environmental operating conditions. As another example, a vehicle engine outputs rotations per minute (RPM) of a vehicle based on a signal representing an amount of fuel flowing to the vehicle engine and the conditions in which the vehicle is operating. 
     DDRS  14  describes or models dynamic system  16  as a set of continuous time nonlinear equations that may be represented as
 
 {dot over (x)}   t   =ƒ ( x   t   ,u   t   ,d   t )  (1)
 
 y   t   =h ( x   t   ,u   t   ,d   t )  (2)
 
     where x t  is a state of a portion, such as a level of fluid within the fluid tank, an engine speed, or an engine temperature, of dynamic system  16 , t is continuous time, {dot over (x)} t  is a derivative, with respect to the time t, of the state x t , u t  is a DDRS output signal, which is a continuous form of the discrete DDRS output signal u k , d t  is a disturbance signal, which is a continuous form of the discrete disturbance signal d k , and y t  is a dynamic system output signal  24 , which is a continuous form of the discrete dynamic system output signal y k . For example, u k  is generated by sampling u t , d k  is generated by sampling d t , and y k  is generated by sampling y t . In one embodiment, f and h are each a nonlinear function. An example of the state x t  is a temperature of the turbine engine and/or a temperature of the car engine. Other examples of the state x t  include a speed of a rotating mass, a pressure, an amount of heat, an amount of potential energy, and/or an amount of kinetic energy contained in an energy storing element or device located within dynamic system  16 . 
     DDRS  14  defines a nominal state value  x   t , which is a particular value of the state x t  at a reference time and defines an incremental state variable {tilde over (x)} t  for the state x t  as:
 
 x   t   =  x     t   +{tilde over (x)}   t .  (3)
 
     where {tilde over (x)} t  is an increment to the nominal state value  x   t . Similarly, DDRS  14  defines a nominal input value ū t , which is a particular value at the reference time of the DDRS output signal u t  and defines an incremental input variable ũ t  for the DDRS output signal u t  as
 
 u   t   =ū   t   +ũ   t .  (4)
 
     where ũ t  is an increment to the nominal input value ū t . Moreover, DDRS  14  defines a nominal output value, which is a particular value at the reference time of the dynamic system output signal y t , and defines an incremental output variable {tilde over (y)} t  for dynamic system output signal y t  as:
 
 y   t   =  y     t   +{tilde over (y)}   t .  (5)
 
     where {tilde over (y)} t  is an increment to the nominal output value  y   t . Additionally, DDRS  14  defines a nominal disturbance value  d   t , which is a particular value at the reference time of the disturbance signal d t , and defines an incremental disturbance variable {tilde over (d)} t  for disturbance signal d t  as:
 
 d   t   =  d     t   +{tilde over (d)}   t .  (6)
 
     where {tilde over (d)} t  is an increment to the nominal disturbance value  d   t . 
     DDRS  14  linearizes the function f represented by equation (1) by applying: 
     
       
         
           
             
               
                 
                   
                     
                       
                         
                           
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                     x   ~     t     ,       ∂   f       ∂     x   t                      x   _     t     ,       d   _     t     ,       u   _     t             
is a partial derivative of the function f, with respect to x t  and is evaluated at  x   t ,  d   t , and ū t ,
 
                   ∂   f       ∂     u   t                    x   _     t     ,       d   _     t     ,       u   _     t             
is a partial derivative of the function ƒ, with respect to u t  and is evaluated at  x   t ,  d   t , and ū t , and
 
                   ∂   f       ∂     d   t                    x   _     t     ,       d   _     t     ,       u   _     t             
is a partial derivative of the function ƒ, with respect to d t  and is evaluated at  x   t ,  d   t , and ū t .
 
     Moreover, DDRS  14  expands the function h represented by equation (2) by applying: 
     
       
         
           
             
               
                 
                   
                     
                       
                         
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is a partial derivative of the function h, with respect to x t  and is evaluated at  x   t ,  d   t , and ū t ,
 
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is a partial derivative of the function h, with respect to u t  and is evaluated at  x   t ,  d   t , and ū t , and
 
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is a partial derivative of the function h, with respect to d t  and is evaluated at  x   t ,  d   t , and ū t .
 
     DDRS  14  represents a change in the state x t  as a function of a change in DDRS output signal u t  and a change in the disturbance signal d t  by representing the derivative             of the incremental state variable {tilde over (x)} t  as a function of the incremental disturbance variable {tilde over (d)} t  and a function of the incremental input variable ũ t  as:
     
       
         
           
             
               
                 
                   
                     
                       
                         
                           
                             
                               
                                 
                                   
                                     
                                       
                                         
                                           
                                             
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     DDRS  14  derives equation (9) by making {tilde over ({dot over (x)} t  the subject of equation (7). Moreover, DDRS  14  represents a change in the dynamic system output signal y t  as a function of a change in the DDRS output signal u t  and a change in the disturbance signal d t  by representing the incremental output variable {tilde over (y)} t  as a function of the incremental disturbance variable {tilde over (d)} t  and a function of the incremental input variable ũ t  as: 
     
       
         
           
             
               
                 
                   
                     
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     DDRS  14  derives equation (10) by making {tilde over (y)} t  the subject of equation (8). 
     DDRS  14  substitutes 
                     x   _     .     t     =       f   ⁡     (         x   _     t     ,       u   _     t     ,       d   _     t       )       =   0       ,         
substitutes A c  instead of
 
                   ∂   f       ∂     x   t         ⁢     |         x   _     t     ,       d   _     t     ,       u   _     t           ,         
substitutes B cu  instead of
 
                   ∂   f       ∂     u   t         ⁢     |         x   _     t     ,       d   _     t     ,       u   _     t           ,         
and B cd  instead of
 
                 ∂   f       ∂     d   t         ⁢     |         x   _     t     ,       d   _     t     ,       u   _     t               
in equation (9) to generate:
 
     
       
         
           
             
               
                 
                   
                     
                       
                         x 
                         ~ 
                       
                       . 
                     
                     t 
                   
                   = 
                   
                     
                       
                         A 
                         c 
                       
                       ⁢ 
                       
                         
                           x 
                           ~ 
                         
                         t 
                       
                     
                     + 
                     
                       
                         B 
                         cu 
                       
                       ⁢ 
                       
                         
                           u 
                           ~ 
                         
                         t 
                       
                     
                     + 
                     
                       
                         B 
                         cd 
                       
                       ⁢ 
                       
                         
                           d 
                           ~ 
                         
                         t 
                       
                     
                     + 
                     
                       f 
                       . 
                     
                   
                 
               
               
                 
                   ( 
                   11 
                   ) 
                 
               
             
           
         
       
     
     It is noted that 
                   x   _     .     t     =   0         
when  x   t  is a constant, an equilibrium solution, or a steady state of the portion of dynamic system  16 . When  x   t  is a constant, regardless of the time t, ƒ(  x   t ,ū t ,  d   t ) is also a constant regardless of the time t of evolution of representation of dynamic system  16 , DDRS  14  derives  y   t  from equation (2) by applying:
     y     t   =h (   x     t   ,ū   t   ,  d     t )  (12) 
     Moreover, DDRS  14  substitutes  y   t  instead of h(  x   t ,ū t ,  d   t ) a matrix C instead of 
                   ∂   h       ∂     x   t         ⁢     |         x   _     t     ,       d   _     t     ,       u   _     t           ,         
a matrix D u  instead of
 
                   ∂   h       ∂     u   t         ⁢     |         x   _     t     ,       d   _     t     ,       u   _     t           ,         
and a matrix D d  instead of
 
                 ∂   h       ∂     d   t         ⁢     |         x   .     t     ,       d   _     t     ,       u   _     t               
of in equation (10) to generate:
   {tilde over (y)}   t   =C{tilde over (x)}   t   +D   u   ũ   t   +D   d   {tilde over (d)}   t   (13) 
     DDRS  14  generates a discrete time model of equation (11) by substituting {tilde over (x)} k  instead of {tilde over (x)} t , ũ k  instead of ũ t , {tilde over (d)} k  instead of {tilde over (d)} t  to generate:
 
 {tilde over (x)}   k+1   =A{tilde over (x)}   k   +B   u   ũ   k   +B   d   {tilde over (d)}   k   +F   k   (14)
 
     where DDRS  14  calculates a matrix A as being equal to I+A c t s , calculates a matrix B u  to be equal to B cu t s , a matrix B d  to be equal to B cd t s , F k  to be equal to f(  x   t ,ū t ,  d   t )t s , {tilde over (x)} k , an incremental discrete state, to be equal to a discrete form of {tilde over (x)} t , ũ k , an incremental discrete DDRS output signal  26 , to be equal to a discrete form of ũ t , and {tilde over (d)} k , an incremental discrete disturbance signal, to be a discrete form of {tilde over (d)} t , t s  is a sampling time or the sampling period, I is an identity matrix, and {tilde over (x)} k+1  is an incremental discrete state. Moreover {tilde over (x)} k+1  of equation (14) can also be represented as a difference between a discrete state x k+1  and x k , where x k+1  is a discrete state of the portion of dynamic system  16  sampled during a sampling period k+1 and is generated one sampling period after x k  is generated, and {tilde over (x)} k  is the incremental discrete state. A microprocessor or a controller samples x k  from x t  with the sampling period t s , samples y k  from y t  with the sampling period t s , samples u k  from u t  with the sampling period t s , and samples d k  from d t  with the sampling period t s . It is noted that d k , u k , x k , and y k  are samples that are sampled at the same time or during the same sampling period k. 
     Furthermore, DDRS  14  generates a discrete time model of equation (13) by substituting {tilde over (x)} k  instead of {tilde over (x)} t , ũ k  instead of ũ t , and {tilde over (d)} k  instead of {tilde over (d)} t  in equation (13) to generate:
 
 {tilde over (y)}   k   =C{tilde over (x)}   k   +D   u   ũ   k   +D   d   {tilde over (d)}   k   (15)
 
     where {tilde over (y)} k  is an incremental discrete dynamic system output signal of dynamic system  16 , where {tilde over (y)} k  is represented by a discrete form, y k =  y   k +{tilde over (y)} k , of the definition as provided in equation (5). If dynamic system  16  is a relative degree one system, DDRS  14  formulates a desired response of dynamic system  16  as being a first order desired response. The relative degree one system takes one sample period to change an output of dynamic system  16  based on an input to dynamic system  16 . For example, when an input to dynamic system  16  is u k , the relative degree one system outputs y k+1 , which is a dynamic system output signal that is output from dynamic system  16  one sample period after y k . is output from dynamic system  16 . DDRS  14  generates equations (16)-(25) based on the relative degree one system. A method similar to that of deriving equations (16)-(25) can be used to derive a plurality of equations for a dynamic system of any relative degree, such as degrees two thru twenty. One form of the first order desired response is an integrator which can be written as follows:
 
 {tilde over (y)}   k+1   −{tilde over (y)}   k   =t   s   {tilde over (v)}   k   (16)
 
     where {tilde over (y)} k+1  is a future incremental discrete dynamic system output from dynamic system  16  one sample after the current sample {tilde over (y)} k  is output from dynamic system  16 , {tilde over (v)} k  is an incremental discrete controller output signal obtained as a difference between the discrete controller output signal  v   k  and a nominal discrete controller output signal v k , which is a particular value of the discrete controller output signal v k  at the reference time. The relative degree one dynamic system is an example of dynamic system  16 . 
     DDRS  14  generates {tilde over (y)} k+1  from equation (15) as:
 
 {tilde over (y)}   k+1   =C{tilde over (x)}   k+1   +D   u   ũ   k+1   +D   d   {tilde over (d)}   k+1   (17)
 
     where {tilde over (d)} k+1 , can also be represented as a difference between d k+1  and d k , where d k+1  is a discrete disturbance signal input to dynamic system  16  during a sampling period k+1, and is generated one sampling period after d k  is generated, and ũ k+1  can also be represented as a difference between u k+1  and u k , where u k+1  is a discrete DDRS output signal output by DDRS  14  during a sampling period k+1, and is generated one sampling period after u k  is generated. DDRS  14  substitutes {tilde over (x)} k+1  from equation (14) and D u =0 for the relative degree one system into equation (17) to generate:
 
 {tilde over (y)}   k+1   =CA{tilde over (x)}   k   +CB   u   ũ   k   +CB   d   {tilde over (d)}   k   +CF   k   +D   d   {tilde over (d)}   k+1 .  (18)
 
     DDRS  14  further substitutes D u =0 and equations (15) and (18) into the first desired response, represented by equation (16), to generate:
 
 CA{tilde over (x)}   k   +CB   u   ũ   k   +CB   d   {tilde over (d)}   k   +D   d   {tilde over (d)}   k+1   +CF   k   −C{tilde over (x)}   k   −D   d   {tilde over (d)}   k   =st{tilde over (v)}   k   (19)
 
     DDRS  14  solves for ũ k  as
 
 ũ   k   =|CB   u | −1   {t   s   {tilde over (v)}   k +( C−CA ) {tilde over (x)}   k +( D   d   −CB   d ) {tilde over (d)}   k   −D   d   {tilde over (d)}   k+1   −CF   k }  (20)
 
     DDRS  14  defines x k =  x   k  within a relationship:
 
 x   k   =  x     k   +{tilde over (x)}   k   (21)
 
     to generate
 
{tilde over (x)} k =0  (22)
 
     where  x   k  is a nominal discrete state value, which is a particular value at the reference time of the discrete state x k . Equation (21) is a discrete form of the relation expressed by equation (3). 
     DDRS  14  substitutes 2{tilde over (d)} k  instead of {tilde over (d)} k+1  in equation (20) and substitutes equation (22) into equation (20) to generate:
 
 ũ   k   =|CB   u | −1   {t   s   {tilde over (v)}   k   −CF   k +(− D   d   −CB   d ) {tilde over (d)}   k }  (23)
 
     DDRS  14  generates the discrete DDRS output signal u k  as being:
 
 u   k   =u   k−1   +ũ   k   (24)
 
     where u k−1  is a discrete DDRS output signal output by DDRS  14  at k−1 and generated one sampling period before u k  is output by DDRS  14 , and ũ k  is a discrete form in the discrete time domain of ũ t . DDRS  14  substitutes equation (23) into equation (24), substitutes K 1  instead of |CB u | −1 t s  in equation (24), K 3  instead of −|CB u | −1  C in equation (24), and K d  instead of |CB u | −1 (−D d −CB d ) in equation (24) to generate:
 
 u   k   =u   k−1   +K   1   {tilde over (v)}   k   +K   3   F   k   +K   d   {tilde over (d)}   k   (25)
 
     DDRS  14  computes K d  at least one of before and during energization of dynamic system  16 . For example, DDRS  14  computes K d  on-line in real time while dynamic system  16  is being operated by a power source. As another example, DDRS  14  computes K d  off-line before dynamic system  16  is provided power by the power source. DDRS  14  changes u k  at the same time the disturbance signal d t  is input to dynamic system  16 . Accordingly, an impact of the disturbance signal d t  on dynamic system  16  is reduced. 
     As an alternative to formulating the first desired response, DDRS  14  formulates one form of a second order desired response as:
 
 {tilde over (y)}   k+2 −(1+α) {tilde over (y)}   k+1   +α{tilde over (y)}   k =(1−α) t   s   {tilde over (v)}   k   (26)
 
     where 
               α   =     (     1   -     ts   τ       )       ,         
τ is a time constant of dynamic system  16 , {tilde over (y)} k+2  is an incremental discrete dynamic system output signal, and {tilde over (y)} k+2  can also be represented as a difference between a dynamic system output signal y k+2  output by dynamic system  16  and y k+1 , where y k+2  is sampled during a sampling period k+2 and is generated one sampling period after y k+1  is generated. If dynamic system  16  is a relative degree two system, DDRS  14  formulates a desired response of dynamic system  16  as being the second order desired response. The relative degree two system takes two sample periods to change an output of dynamic system  16  based on an input to dynamic system  16 . For example, when an input to dynamic system  16  is u k , the relative degree one system outputs y k+2 , which is two sample periods after y k . DDRS  14  generates equations (26)-(34) based on the relative degree two system. The relative degree two system is an example of dynamic system  16 .
 
     DDRS  14  substitutes CB u =0 in equation (18) to output:
 
 {tilde over (y)}   k+1   =CA{tilde over (x)}   k   +CB   d   {tilde over (d)}   k   +CF   k   +D   d   {tilde over (d)}   k+1   (27)
 
     DDRS  14  generates {tilde over (y)} k+2  from {tilde over (y)} k+1  of equation (27) as being:
 
 {tilde over (y)}   k+2   =CA{tilde over (x)}   k+1   +CB   d   {tilde over (d)}   k+1   +CF   k+1   +D   d   {tilde over (d)}   k+2   (28)
 
     where {tilde over (d)} k+2  is an incremental discrete disturbance signal and can also be represented as a difference between a discrete disturbance signal d k+2  input to dynamic system  16  and d k+1 , where d k+2  is sampled during a sampling period k+2 and is generated one sampling period after d k+1  is generated, and F k+1  is generated during a sampling period k+1, which is one sampling period after F k  is generated. DDRS  14  substitutes equation (14) into equation (28) to generate:
 
 {tilde over (y)}   k+2   =CA{A{tilde over (x)}   k   +B   u   ũ   k   +B   d   {tilde over (d)}   k   +F   k   }+CB   d   {tilde over (d)}   k+1   +CF   k+1   +D   d   {tilde over (d)}   k+2   (29)
 
     DDRS  14  substitutes equations (15), (27), (29), and D u =0 into equation (26) to generate: 
     
       
         
           
             
               
                 
                   
                     
                       
                         CA 
                         2 
                       
                       ⁢ 
                       
                         
                           x 
                           ~ 
                         
                         k 
                       
                     
                     + 
                     
                       
                         CAB 
                         u 
                       
                       ⁢ 
                       
                         
                           u 
                           ~ 
                         
                         k 
                       
                     
                     + 
                     
                       
                         CAB 
                         d 
                       
                       ⁢ 
                       
                         
                           d 
                           ~ 
                         
                         k 
                       
                     
                     + 
                     
                       CAF 
                       k 
                     
                     + 
                     
                       
                         CB 
                         d 
                       
                       ⁢ 
                       
                         
                           d 
                           ~ 
                         
                         
                           k 
                           + 
                           1 
                         
                       
                     
                     + 
                     
                       CF 
                       
                         k 
                         + 
                         1 
                       
                     
                     + 
                     
                       
                         D 
                         d 
                       
                       ⁢ 
                       
                         
                           d 
                           ~ 
                         
                         
                           k 
                           + 
                           2 
                         
                       
                       ⁢ 
                       
                           
                       
                       ⁢ 
                       ⋯ 
                     
                     - 
                     
                       
                         ( 
                         
                           1 
                           + 
                           α 
                         
                         ) 
                       
                       ⁢ 
                       
                         { 
                         
                           
                             CA 
                             ⁢ 
                             
                               
                                 x 
                                 ~ 
                               
                               k 
                             
                           
                           + 
                           
                             
                               CB 
                               d 
                             
                             ⁢ 
                             
                               
                                 d 
                                 ~ 
                               
                               k 
                             
                           
                           + 
                           
                             CF 
                             k 
                           
                           + 
                           
                             
                               D 
                               d 
                             
                             ⁢ 
                             
                               
                                 d 
                                 ~ 
                               
                               
                                 k 
                                 + 
                                 1 
                               
                             
                           
                         
                         } 
                       
                     
                     + 
                     
                       α 
                       ⁢ 
                       
                         { 
                         
                           
                             C 
                             ⁢ 
                             
                               
                                 x 
                                 ~ 
                               
                               k 
                             
                           
                           + 
                           
                             
                               D 
                               d 
                             
                             ⁢ 
                             
                               
                                 d 
                                 ~ 
                               
                               k 
                             
                           
                         
                         } 
                       
                     
                   
                   = 
                   
                     
                       ( 
                       
                         1 
                         - 
                         α 
                       
                       ) 
                     
                     ⁢ 
                     
                       t 
                       s 
                     
                     ⁢ 
                     
                       
                         v 
                         ~ 
                       
                       k 
                     
                   
                 
               
               
                 
                   ( 
                   30 
                   ) 
                 
               
             
           
         
       
     
     DDRS  14  solves for ũ k  in equation (30) to output: 
     
       
         
           
             
               
                 
                   
                     
                       u 
                       ~ 
                     
                     k 
                   
                   = 
                   
                     
                       
                          
                         
                           CAB 
                           u 
                         
                          
                       
                       
                         - 
                         1 
                       
                     
                     ⁢ 
                     
                       { 
                       
                         
                           
                             ( 
                             
                               1 
                               - 
                               α 
                             
                             ) 
                           
                           ⁢ 
                           
                             t 
                             s 
                           
                           ⁢ 
                           
                             
                               v 
                               ~ 
                             
                             k 
                           
                         
                         + 
                         
                           
                             [ 
                             
                               
                                 
                                   ( 
                                   
                                     1 
                                     + 
                                     α 
                                   
                                   ) 
                                 
                                 ⁢ 
                                 CA 
                               
                               - 
                               
                                 CA 
                                 2 
                               
                               - 
                               
                                 α 
                                 ⁢ 
                                 
                                     
                                 
                                 ⁢ 
                                 C 
                               
                             
                             ] 
                           
                           ⁢ 
                           
                             
                               x 
                               ~ 
                             
                             k 
                           
                         
                         + 
                         
                           
                             [ 
                             
                               
                                 
                                   ( 
                                   
                                     1 
                                     + 
                                     α 
                                   
                                   ) 
                                 
                                 ⁢ 
                                 C 
                               
                               - 
                               CA 
                             
                             ] 
                           
                           ⁢ 
                           
                             F 
                             k 
                           
                         
                         - 
                         
                           
                             CF 
                             
                               k 
                               + 
                               1 
                             
                           
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           ⋯ 
                         
                         + 
                         
                           
                             [ 
                             
                               
                                 
                                   ( 
                                   
                                     1 
                                     + 
                                     α 
                                   
                                   ) 
                                 
                                 ⁢ 
                                 
                                   CB 
                                   d 
                                 
                               
                               - 
                               
                                 CAB 
                                 d 
                               
                               - 
                               
                                 α 
                                 ⁢ 
                                 
                                     
                                 
                                 ⁢ 
                                 
                                   D 
                                   d 
                                 
                               
                             
                             ] 
                           
                           ⁢ 
                           
                             
                               d 
                               ~ 
                             
                             k 
                           
                         
                         + 
                         
                           
                             [ 
                             
                               
                                 
                                   ( 
                                   
                                     1 
                                     + 
                                     α 
                                   
                                   ) 
                                 
                                 ⁢ 
                                 
                                   D 
                                   d 
                                 
                               
                               - 
                               
                                 CB 
                                 d 
                               
                             
                             ] 
                           
                           ⁢ 
                           
                             
                               d 
                               ~ 
                             
                             
                               k 
                               + 
                               1 
                             
                           
                         
                         - 
                         
                           
                             D 
                             d 
                           
                           ⁢ 
                           
                             
                               d 
                               ~ 
                             
                             
                               k 
                               + 
                               2 
                             
                           
                         
                       
                       } 
                     
                   
                 
               
               
                 
                   ( 
                   31 
                   ) 
                 
               
             
           
         
       
     
     When  x   t ,  d   t , ū t  and  y   t  are constant, with respect to the time t, then:
 
 F   k+1   =t   s ƒ(   x     k+1   ,ū   k+1   ,  d     k+1 )= F   k   (32)
 
     Equation (32) is calculated, by DDRS  14 , based on values of the derivative {dot over (x)} t  or an estimation algorithm that computes the derivative {dot over (x)} t  at the current sample x t . DDRS  14  substitutes {tilde over (d)} k+1 =2{tilde over (d)} k , {tilde over (d)} k+2 =3{tilde over (d)} k , and equation (32) into equation (31) to generate: 
     
       
         
           
             
               
                 
                   
                     
                       u 
                       ~ 
                     
                     k 
                   
                   = 
                   
                     
                       
                          
                         
                           CAB 
                           u 
                         
                          
                       
                       
                         - 
                         1 
                       
                     
                     ⁢ 
                     
                       { 
                       
                         
                           
                             ( 
                             
                               1 
                               - 
                               α 
                             
                             ) 
                           
                           ⁢ 
                           
                             t 
                             s 
                           
                           ⁢ 
                           
                             
                               v 
                               ~ 
                             
                             k 
                           
                         
                         + 
                         
                           
                             [ 
                             
                               
                                 
                                   ( 
                                   
                                     1 
                                     + 
                                     α 
                                   
                                   ) 
                                 
                                 ⁢ 
                                 CA 
                               
                               - 
                               
                                 CA 
                                 2 
                               
                               - 
                               
                                 α 
                                 ⁢ 
                                 
                                     
                                 
                                 ⁢ 
                                 C 
                               
                             
                             ] 
                           
                           ⁢ 
                           
                             
                               x 
                               ~ 
                             
                             k 
                           
                         
                         + 
                         
                           
                             [ 
                             
                               
                                 α 
                                 ⁢ 
                                 
                                     
                                 
                                 ⁢ 
                                 C 
                               
                               - 
                               CA 
                             
                             ] 
                           
                           ⁢ 
                           
                             F 
                             k 
                           
                           ⁢ 
                           
                               
                           
                           ⁢ 
                           ⋯ 
                         
                         + 
                         
                           
                             [ 
                             
                               
                                 
                                   ( 
                                   
                                     α 
                                     - 
                                     1 
                                   
                                   ) 
                                 
                                 ⁢ 
                                 
                                   CB 
                                   d 
                                 
                               
                               + 
                               
                                 
                                   ( 
                                   
                                     α 
                                     - 
                                     1 
                                   
                                   ) 
                                 
                                 ⁢ 
                                 
                                   D 
                                   d 
                                 
                               
                               - 
                               
                                 CAB 
                                 d 
                               
                             
                             ] 
                           
                           ⁢ 
                           
                             
                               d 
                               ~ 
                             
                             k 
                           
                         
                       
                       } 
                     
                   
                 
               
               
                 
                   ( 
                   33 
                   ) 
                 
               
             
           
         
       
     
     DDRS  14  substitutes K 5  as being |CAB u | −1 (1−α)t s , K 6  as being |CAB u | −1 [(1+α)CA−CA 2 −αC], K 7  as being |CAB u | −1 [αC−CA], K e  as being |CAB u | −1 [(α−1)CB d +(α−1)D d −CAB d ], {tilde over (x)} k =0, and equation (33) into equation (24) to output:
 
 u   k   =u   k−1   +K   5   {tilde over (v)}   k   +K   7   F   k   +K   e   {tilde over (d)}   k   (34)
 
     It is noted that {tilde over (x)} k =0 when  x   k =x k . 
     It is noted that in an alternative embodiment, if dynamic system  16  is of a relative degree n, DDRS  14  formulates an n th  order desired response of dynamic system  16 , where n is an integer greater than two. 
     DDRS  14  calculates the first, second, or alternatively the nth order desired response upon receiving a selection, via the input device, regarding a number, such as 1, 2 or alternatively n th , of a desired response. As an example, upon receiving from the person via the input device that a desired response has a first number, DDRS  14  applies an Euler&#39;s approximation to an integrator:
 
{dot over (y)} t =v t   (35)
 
     where v t  is a continuous form of v k . 
     to generate
 
 y   k+1   −y   k   =t   s   v   k   (36)
 
     DDRS  14  generates an incremental form of equation (36) to output the first order desired response. As another example, upon receiving from the person via the input device that a desired response is second order, DDRS  14  applies an Euler&#39;s approximation to a combination of an integrator and the first order desired response of dynamic system  16 . The combination is represented as:
 
τ ÿ   t   +{dot over (y)}   t   =v   t   (37)
 
     where {dot over (y)} t  is a derivative, with respect to the time t, of y t , and {tilde over (y)} t  is a derivative, with respect to the time t, of {dot over (y)} t . DDRS  14  applies an Euler&#39;s approximation to the combination to generate:
 
 y   k+2 −(1+α) y   k+1   +αy   k =(1−α) t   s   v   k   (38)
 
     DDRS  14  generates an incremental form of equation (38) to output the second desired response. 
       FIG. 4  shows an embodiment of a plurality of plots  300 ,  302 ,  304 , and  306  that may be used for reducing an effect of a disturbance. DDRS  14  calculates and may generate plot  300 , which is an example of d k  corresponding to the relative degree one system versus the time t. Moreover, DDRS  14  calculates and may generate plot  302 , which is an example of {tilde over (d)} k  plotted versus the time t and which is generated as a difference between d k  and d k−1 , where d k−1  is a discrete disturbance signal input to dynamic system  16  and measured by a sensor, such as a temperature or a pressure sensor, one sampling period before d k  is measured by the sensor. Moreover, DDRS  14  calculates and may generate plot  304 , which is an example of {tilde over (d)} k+1  plotted versus the time t and which is generated as a difference between d k+1  and d k , where {tilde over (d)} k+1  is an incremental discrete disturbance signal at k+1, where d k+1 1 is a discrete disturbance signal input to dynamic system  16  and measured by a sensor, such as a temperature or a pressure sensor, one sampling period before d k  is measured by the sensor. Additionally, DDRS  14  calculates and may generate plot  306 , which is an example of {tilde over (d)} k+2  plotted versus the time t and which is generated as a difference between {tilde over (d)} k+2  and {tilde over (d)} k+1 , where {tilde over (d)} k+2  is an incremental discrete disturbance signal at k+2, where d k+2  is a discrete disturbance signal input to dynamic system  16  and measured by a sensor, such as a temperature or a pressure sensor, one sampling period before d k+1  is measured by the sensor. 
       FIG. 5  shows a plurality of exemplary graphs  310  and  312  that may be used to facilitate reducing an effect of a disturbance. Graph  310  includes plots  302 ,  304 , and  306 , and graph  312  illustrates a plot of a ratio  314 , versus the time t, of plots  304  and  302 , and a ratio  316 , versus the time t, of plots  306  and  302 . DDRS  14  generates ratios  314  and  316 . It is noted that for the relative degree one system, the ratio  314  is two, and therefore, for the relative degree one system, {tilde over (d)} k+1 =2*{tilde over (d)} k . Moreover, it is noted that for the relative degree one system, the ratio  316  is three, and therefore, for the relative degree one system, {tilde over (d)} k+2 =3*{tilde over (d)} k . In an alternative embodiment, for the relative degree n system, DDRS  14  determines {tilde over (d)} k+n  from {tilde over (d)} k  in a similar manner in which {tilde over (d)} k+1  and {tilde over (d)} k+2  are determined from {tilde over (d)} k . 
       FIG. 6  is a block diagram of an exemplary DDRS  500 , which maybe used with system  10  (shown in  FIG. 1 ) as a replacement for DDRS  14 . Specifically, DDRS  500  may be used in system  10  to replace DDRS  14 . DDRS  500  includes a subtractor  502 , a plurality of adders  504  and  506 , a plurality of multipliers  508 ,  510 ,  512 ,  514 ,  516 , and  520 , and where K 1 , K 3 , and K d  are from equation (25). 
     Multiplier  508  receives the discrete disturbance signal d k  and multiples d k  with 1/z, which is an inverse z-transform, to output the discrete disturbance signal d −1 . Subtractor  502  receives the discrete disturbance signal d k  and the discrete disturbance signal d k−1 , subtracts the discrete disturbance signal d k−1  from the discrete disturbance signal d k  to output the incremental discrete disturbance signal {tilde over (d)} k . Multiplier  510  multiplies the incremental discrete disturbance signal {tilde over (d)} k  with K d  to output a multiplier output signal  518 . Multiplier  520  multiplies the derivative {dot over (x)} t  of the state x t  with t s  to output F k . Multiplier  514  receives F k  and multiplies F k  with K 3  to output a multiplier output signal  522 . Multiplier  512  receives v k  and multiplies v k  with K 1  to output a multiplier output signal  524 . Adder  504  receives multiplier output signals  518 ,  522 , and  524 , adds the multiplier output signals  518 ,  522 , and  524  to generate an adder output signal  526 , which is U k −U k−1  in equation (25) and is equal to Ũ k . Multiplier  516  receives u k  and multiplies u k  with 1/z to output u k−1 . Adder  506  adds Ũ k  and u k−1  to output u k . During initialization of DDRS  500 , an initial value, such as zero, of u k , is provided by the person to DDRS  14  via the input device. Upon receiving the initial value and Ũ k , adder  506  outputs additional values of u k . Dynamic system  16  receives u k  from DDRS  14  and u k  reduces an effect of d k  on y k . 
       FIG. 7  is a block diagram of an alternative embodiment of a DDRS  600 , that may be used with system  10  (shown in  FIG. 1 ) as a replacement for DDRS  14 . DDRS  600  includes subtractor  502 , adders  504 , and  506 , a plurality of multipliers  602 ,  604 , and  606 , and multipliers  508 ,  516 , and  520 . 
     Multiplier  602  multiplies the incremental discrete disturbance signal {tilde over (d)} k  with K e  to output a multiplier output signal  608 . Multiplier  606  receives F k  and multiplies F k  with K 7  to output a multiplier output signal  610 . Multiplier  604  receives v k  and multiplies v k  with K 5  to output a multiplier output signal  612 . Adder  504  receives multiplier output signals  608 ,  610 , and  612 , adds the multiplier output signals  608 ,  610 , and  612  to generate an adder output signal  614 , which is u k −u k−1  in equation (34) and is equal to ũ k . Dynamic system  16  receives u k  from DDRS  14  and u k  reduces an effect of d k  on y k . It is noted that K 1 , K 3 , K d , K 5 , K 7 , and K e  change based on a degree of dynamic system and based on other factors, such as the time constant τ. 
       FIG. 8  shows a plurality of exemplary graphs  700 ,  702 ,  704 ,  706 , and  708  including a plurality of exemplary outputs from dynamic system  16 . Graph  700  plots a disturbance signal  710  versus time t, graph  702  illustrates a plot of a disturbance signal  712  versus the time t, graph  704  represents a dynamic system output signal  714  versus time t and a desired response  716  of dynamic system  16  versus time t. Moreover, graph  706  illustrates a plot of a dynamic system output signal  718  versus time t and a desired response  720  of dynamic system  16  versus time t. Additionally, graph  708  illustrates a plot of a dynamic system output signal  722  versus time t and a desired response  724  of dynamic system  16  versus time t. When disturbance signals  710  and  712  are input to dynamic system  16  and no disturbance is applied to dynamic system  16 , dynamic system  16  generates dynamic system output signals  714 ,  718 , and  722 . Moreover, a difference between dynamic system output signal  714  and desired response  716  is small and dynamic system output signal  714  quickly converges to desired response  716 . Additionally, a coupling between desired response  720  and dynamic system output signal  718  is small, such as 9%-12%. Further, a coupling between desired response  724  and dynamic system output signal  722  is small, such as 9%-12%. 
       FIG. 9  illustrates a plurality of exemplary graphs  750 ,  752 ,  754 ,  756 , and  758 . Graph  750  illustrates a plot of a disturbance signal  760  versus the time t, graph  752  illustrates a plot of a disturbance signal  762  versus the time t, and graph  754  illustrates a plot of a dynamic system output signal  764  versus the time t and a desired response  766  of a dynamic system, which is not coupled to DDRS  14 , versus the time t. Moreover, graph  756  illustrates a plot of a dynamic system output signal  770  versus the time t and a desired response  768  of a dynamic system, which is not coupled to DDRS  14 , versus the time t. Additionally, graph  758  illustrates a plot of a dynamic system output signal  774  versus the time t and a desired response  772  of a dynamic system, which is not coupled to DDRS  14 , versus the time t. When disturbance signals  760  and  762  are input to a dynamic system, which is not coupled to DDRS  14 , the dynamic system generates dynamic system output signals  764 ,  770 , and  774 . Moreover, a dynamic system output signal  764  slowly converges to desired response  766 . Additionally, a coupling between desired response  770  and dynamic system output signal  770  is large, such as 38%-42%. Further, a coupling between desired response  772  and dynamic system output signal  774  is large, such as 38%-42%. 
       FIG. 10  illustrates a plurality of exemplary graphs  800 ,  802 ,  804 ,  806 , and  808 . Graph  800  illustrates a plot of a disturbance signal  810  versus the time t, graph  802  illustrates a plot of a disturbance signal  812  versus the time t, graph  804  illustrates a plot of a dynamic system output signal  814  versus the time t and a desired response  816  of dynamic system  16  versus the time t. Moreover, graph  806  illustrates a plot of a dynamic system output signal  818  versus the time t and a desired response  820  of dynamic system  16  versus the time t. Additionally, graph  808  illustrates a plot of a dynamic system output signal  822  versus the time t and a desired response  824  of dynamic system  16  versus the time t. When disturbance signals  810  and  812  are input to dynamic system  16 , dynamic system  16  generates dynamic system output signals  814 ,  818 , and  822 . Moreover, a difference between dynamic system output signal  814  and desired response  816  is small and dynamic system output signal  814  quickly converges to desired response  816 . Additionally, a coupling between desired response  820  and dynamic system output signal  818  is small, such as 7%-8%. Further, a coupling between desired response  824  and dynamic system output signal  822  is small, such as 7%-8%. It is evident from  FIGS. 8 and 10  that the coupling between desired response  820  and dynamic system output signal  818  is similar to that between desired response  720  and dynamic system output signal  718 , and the coupling between desired response  824  and dynamic system output signal  822  is similar to that between desired response  724  and dynamic system output signal  722  when no disturbance is present. 
     Technical effects of the herein described systems and methods for reducing an effect of a disturbance include reducing an effect of the discrete disturbance signal d k  on dynamic system output signal y k . The effect of the discrete disturbance signal d k  is reduced by generating an equation, such as equation (25) or (34), for the incremental discrete DDRS output signal Wk as a function of the incremental discrete disturbance signal {tilde over (d)} k , which is a change of a difference between the discrete disturbance signal d k  and the discrete disturbance signal d k−1  By generating ü k  as a function of {umlaut over (d)} k , changes, such as {umlaut over (d)} k , in the discrete disturbance signal d k  are considered in reducing the effect of the discrete disturbance signal d k  and DDRS  14  attenuates an impact of the discrete disturbance signal d k  over dynamic system  16  over a broad frequency range, such as ranging from and including 0 hertz (Hz) to the closed loop bandwidth of the dynamic system. For systems such as gas turbine this range would be from 0 Hz to 4 Hz, for electrical systems this range would be from 0 Hz to 10 kilo hertz (KHz). Other technical effects of the systems and methods for reducing an effect of a disturbance include reducing coupling between a desired response of dynamic system  16  and dynamic system output signal  24 . Yet other technical effects include providing a quick convergence of a dynamic system output signal  24  to a desired response. It is noted that DDRS  14  does not wait to receive y k−1  to generate u k  and changes u k  at the same time or during the same sampling period as d k  is received by dynamic system  16 . Hence, an effect of d k  is reduced on dynamic system  16  before d k  enters and adversely affects dynamic system  16 . 
     While the invention has been described in terms of various specific embodiments, those skilled in the art will recognize that the invention can be practiced with modification within the spirit and scope of the claims.