Abstract:
A digital test system for generating a test signal in the form of an amplitude and/or phase modulated sinusoidal signal at a given carrier frequency is disclosed. Arbitrary amplitude and phase modulation functions may be selected and are provided to the system in the form of digitally encoded data streams. The system does not require a digital multiplier. A signal in the form of an unmodulated carrier signal may also be generated.

Description:
BACKGROUND OF THE INVENTION 
     The present invention relates generally to electronic test systems and more particular to systems for testing video components. 
     There is a growing need in the video electronics industry for test systems capable of providing a simulated color television video test signal. The luminous information of a color video signal represents shades of black and white, while the chrominance is represented by a color burst signal that establishes a phase reference together with a suppressed carrier quadrature modulation signal. The amplitude and phase of the suppressed signal deifnes a unique point and, hence, the color on a chromaticity diagram 
     Consistent, reliable, maintenance-free, analog instrumentation capable of producing a signal of this complexity is difficult to design and produce. An analog system requires balanced modulators that are inherently unstable. Additionally, subcarrier feed through and the need for critical phase stability and control are problems inherent in an analog implementation of a video tst system. 
     The video electronics industry is experiencing a trend toward the use of digital video systems and components. These systems require a test system capable of generating digitized test signals. One factor limiting the use of digital testing systems is the expense of including digital multipliers in the system. 
     SUMMARY OF THE INVENTION 
     The present invention is a system and method for generating a first digital signal that is a fixed amplitude sinusoidal signal at a given carrier frequency and a second digital signal that is a sinusoidal signal at the same given carrier frequency having time-varying amplitude and phase. These signals may be utilized to represent an arbitrary color television chroma test pattern, with the amplitude and phase representing polar coordinates encoding the magnitude and phase of the chrominance signal. 
     In one embodiment of the invention, two digital data streams, representing the amplitude, A(t), and phase, φ(t), of an arbitrary color television test pattern are accepted at a pair of input ports. An arccosine ROM look-up table is utilized to convert the amplitude digital data stream into a digital data stream representing the arc-cosine function of one-half the amplitude. A pair of digital adders is then utilized to generate digital data streams representing the sum and difference of the arc-cosine digital data stream and the phase digital data stream. 
     The outputof a digital counter is utilized to represent a constant frequency, linear phase digital data stream increasing linearly in time modulo N. the linear phase function is utilized to address a sinusoidal ROM look-up table with the output of the first sine ROM look-up table being the output signal corresponding to a sinusoidal function having a fixed carrier frequency. 
     The outputs from the first pair of digital adders are routed to corresponding inputs of a second pair of digital adders while the linear phase digital data stream is directed to a second input of each digital adder. The outputs from each one of the second pair of digital adders are utilized to address corresponding sinusoidal ROM look-up tables. The outputs from these sinusoidal ROM look-up tables are input to a fifth digital adder with the output of the fifth digital adder representing the second digital sinusoidal signal at the same given frequency as the first signal and having a time varying amplitude equal to A(t n ) and a time-varying phase equal to φ(t n ). 
     The present invention provides for the generation of a complex digital sinusoidal signal having an arbitrary time varying amplitude and phase. The system utilizes only ROM look-up tables and digital adders, which are low cost components. The system is adapted for use with digital video systems and components and requires no analog to digital or digital to analog conversion. However, digital to analog converters could be used at the outputs for generating analog equivalent signals. 
    
    
     BRIEF DESCRIPTION OF THE DRAWING 
     FIG. 1 is a schematic diagram of an embodiment of the present invention. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     The system generates a digital test signal of the form: 
     
         V(t.sub.n)=A(t.sub.n)·cos(Φ.sub.o t.sub.n +φ(t.sub.n)) (1) 
    
     where t n  represents the time at which the nth clock pulse of a system clock is generated. In general 
     
         t.sub.n =t.sub.o +nt.sub.c 
    
     where t o  is some arbitrary starting time, t c  is the clock interval, and n is an integer. 
     The amplitude A(t n ), and phase φ(t n ), elements are specified as arbitrary input digital data streams externally supplied to the system of the invention. These digital data streams may represent the time-varying amplitude and phase function of a color television test pattern. The system of the present invention processes these input digital data streams to produce a signal in the form of Equation 1. Additionally, a phase reference signal in the form of: 
     
         cos (ω.sub.o t.sub.n)                                (2) 
    
     is provided by the system, where ω o  is a given carrier frequency. 
     FIG. 1 is a schematic diagram of the invention. The system receives, at a test system input 10, a first digital data stream, A(t n )/2, having elements representing one-half the time-varying amplitude of a preselected color video test signal. Each amplitude value in the digital data stream may be represented by an m digit binary number. Similarly, a second digital data stream, φ(t n ), representing the time-varying phase of the color video test pattern is received at a second system input 12. All operations of the system are synchronized by a clock signal from a system clock 14. 
     The amplitude values in the first digital data stream are utilized to address an arc-cosine ROM look-up table 16 that has stored at each address corresponding to the value of elements, A(t n ), the value arc-cosine of A(t n )/2. The output from the arc-cosine ROM look-up table 16 is routed to a first addition input 18a of a first digital adder 18 and to a subtraction input 22a of a second digital adder 22. The input signal from the second input 12, corresponding to φ(t n ), is routed to a second plus input 18b of the first digital adder 18 and a first plus input 22b of the second digital adder 22. The output of the first digital adder 18 is given by the following equation: 
     
         θ(t.sub.n)=φ(t.sub.n)+cos.sup.-1 (A(t.sub.n)/2)  (3) 
    
     and the output of the second digital adder 22 is given by the equation: 
     
         ψ(t.sub.n)=φ(t.sub.n)-cos.sup.-1 (A(t.sub.n)/2)    (4) 
    
     A counter 30 is used to generate a linear ramp representing the term ω o  t n . The output from the first digital adder 18 is routed to a first addition input 34a of a third digital adder 34 while the output of the counter 30 is routed to a second addition input 34b of the third digital adder 34. Thus, the output of the third digital adder is equal to: 
     
         ω.sub.o t.sub.n +θ(t.sub.n)                    (5) 
    
     Similarly, the output from the second digital adder 22 is routed to a first input 40a of a fourth digital adder 40 while the output of the counter 30 is routed to a second addition input 40b of the fourth digital adder 40. Thus, the output of the fourth digital adder is equal to: 
     
         ω.sub.o t.sub.n +ψ(t.sub.n)                      (6) 
    
     The output signals from the third and fourth digital adders 34 and 40 are utilized to address second and third sinusoidal ROM look-up tables 50 and 52 that have stored at each address corresponding to the value of the input element a value equal to the cosine of the input element. Thus the output (V 1 ) of the secnd ROM look-up table 50 is given by: 
     
         V.sub.1 =cos (ω.sub.o t.sub.n +θ(t.sub.n))     (7) 
    
     and the output (V 2 ) of the third ROM look-up table 52 is given by: 
     
         V.sub.2 =cos (ω.sub.o t.sub.n +ψ(t.sub.n))       (8) 
    
     These output signals from the second and third ROM look-up tables 50 and 52 are routed to the addition inputs 54a and 54b of a fifth digital adder 54 with the output signal from the fifth digital adder 54 being equal to: 
     
         v(t)=cos (ω.sub.o t.sub.n +θ(t.sub.n))+cos (ω.sub.o t.sub.n +ψ(t.sub.n))                                  (9) 
    
     If the interval 0 to 2π is mapped on to the binary interval 0 to 2 m , then the values of the arguments and the cosine functions of equation (9) may be expressed as binary numbers modulo 2 m . Retaining the m least significant bits of the outputs from the third and fourth digital adders 34 and 40 will result in the sums (ω o  t n  +θ(t n )) and (ω o  t n  +ψ(t n )) modulo 2 m . 
     The output signal, modulo 2 m , from the counter 30 is utilized to address the first sinusoidal ROM look-up table 56 to provide a reference carrier output signal equal to cos (ω o  t n ). 
     Substituting the values of θ(t n ) and ω(t n ) from equations (5) and (6)into the expression of equation (9) and using the following trigonometric identity: 
     
         2 cos α cos β=cos (α+β)+cos (α-β) (11) 
    
     shows that v(t) is in the form of equation (1), which is the desired form. 
     The present invention is a generalized modulation synthesizer suitable to many testing applications. For example, the present system may be utilized to generate modulated signals having either angle or amplitude modulation. The system provides a first output in the form of a reference sinusoidal carrier having a given carrier frequency, ω o , and a second signal for establishing an amplitude and/or phase modulated sinusoidal signal at the given carrier frequency. The system outputs may be passed through digital to analog converters and low pass filters to generate analog signals for testing analog systems. These signals will generally be more stable than signals produced by an analog tester. Additionally, analog input signals may be converted to digital data streams by utilizing an analog to digital converter driven by the system clock, before being directed to the system inputs 10 and 12. 
     A further advantage of the invention is the capability of providing either angle only modulation (FM and phase) or amplitude only modulation (AM). 
     Amplitude only modulation is achieved by setting the data elements in the second bit stream, φ, equal to zero or a constant and varying the elements in the first bit stream, A, according to the desired AM function. 
     Similarly, FM or phase only modulation is achieved by setting the A n  s equal to a constant and varying the φ n  s according to the desired modulation function. 
     The foregoing is a detailed description of a preferred embodiment of the invention. Although specific circuit elements and system components have been described to illustrate and explain the invention, these details should not be interpreted as limiting the invention. In particular, the sinusoidal ROM look-up table may be replaced by any digital component that accepts an input element from an input digital data stream and generates an output element having a value equal to the cosine of an angle that is proportional to the value of the input element. 
     Additionally, in the embodiment described, a digital data stream with elements equal to A(t n )/2 is provided to the input of the arc-cosine ROM look-up table 16. Alternatively, the arc-cosine ROM look-up table could be programmed to accept elements equal to A(t n ) and provide elements equal to cos -1  (A(t n )/2) at its output. 
     Accordingly, the present invention is not intended to be limited except as defined by the appended claims.