Abstract:
An apparatus for transporting semiconductor wafers between processing steps that can also be used to support the wafers during various processing steps. The apparatus minimizes the obstruction of fluid flow in the process tank, reduces the amount of devices that will fail due to edge exclusion, and reduces processing times. In one embodiment, the apparatus is a wafer carrier comprising a wire frame having three load supporting members, the load supporting members having a plurality of wafer engaging elements adapted to support a plurality of wafers.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
     This Application claims the benefit of Provisional Application, 60/282,269, filed Apr. 6, 2001. 
    
    
     BACKGROUND OF THE INVENTION 
     1. Field of the Invention 
     The present invention relates to the fabrication of integrated circuits, and more particularly to a wafer carrier with a low profile that reduces fluid flow obstruction, decreases processing time, and increases wafer yields. 
     2. Description of Prior Art 
     Integrated circuit devices are produced on semiconductor wafers where each wafer can produce a multitude of integrated circuit devices. Two long standing goals of wafer processing are: (1) to increase the yield of properly functioning devices obtained from each wafer; and (2) to decrease wafer processing time. 
     In processing wafers, wafers are subjected to a multitude of different processing steps. Wafer carriers are used to transport the wafers to these different processing areas. Often, the wafers are not removed from the wafer carriers while the wafers are subjected to certain processing steps such as cleaning and drying steps. It is desirable to process wafers while in a wafer carrier not only because the wafer carrier provides support for the wafers, but also because doing so reduces handling of the wafers which can result in the undesirable outcomes of breaking and/or contaminating the wafers. It is well known in the art that contaminating a wafer will very likely reduce the yield of properly functioning devices obtained from a wafer. Thus, it is desirable to have a wafer carrier that can used to process the wafers. 
     While this is true, leaving wafers in a wafer carrier during processing can create a number of problems in of itself. For example, in processing wafers, it is known in the art that the presence of liquid on a wafer will decrease the yield of that wafer. However, because removing contaminants is crucial to obtaining properly functioning devices, wafers are subjected to a rinsing step. After rinsing, the liquid must be completely removed from the wafer surface or the affected devices will fail. Removal of this liquid is performed at a drying step. For the reasons stated above, the wafers are often in the same wafer carrier both during the rinsing step and the consecutive drying step. Often, despite going through the drying step, a certain amount of liquid will get trapped between the wafer and the wafer carrier at those points where the wafer contacts the wafer carrier. The greater the size of the contact area present between the wafer carrier and the wafers, the greater is the amount of liquid trapped. This trapped liquid is undesirable for two reasons. First, the area of the wafer that remains wet can not be used to make properly functioning devices. This is know in the art as edge exclusion and results in lower yields. Second, processing time will be increased because the more liquid that is trapped between the wafer carrier and the wafers, the longer it will take to substantially dry the wafers. Thus there is a need for a wafer carrier that reduces the area of contact between a wafer carrier and the wafers while still properly supporting the wafers. 
     Currently, there are no wafer carriers that effectively minimize the number and size of these contact points. Existing wafer carriers either have four supporting members that contact the wafers or the supporting members are designed so as to contact a substantial area of the wafers being supported thereby. 
     Another problem that arises in processing wafers while in a wafer carrier is that the wafer carrier can obstruct the flow of fluid over the wafer surfaces. The unobstructed flow of processing fluids over wafer surfaces is essential to efficient and effective wafer production. Depending on the particular processing step involved, obstructed fluid flow can result in contaminants not being removed from the wafer surfaces and/or increased processing times. These problems can arise in a number of processing steps, including rinsing and chemical treatment. Moreover, many of the processes necessitating fluid flow take place at elevated temperatures and in corrosive chemical environments. Thus there is a need for a wafer carrier that is as non-obstructive as possible with regard to fluid flow while remaining structurally sound during rigorous thermal cycling and chemical exposure. 
     Currently, plastic “wafer baskets” are used to carry and process wafers. Wafer baskets are bulky and are not fluidly dynamic. As such, these “wafer baskets” obstruct a substantial amount of fluid flow, resulting in increased processing times and/or decreased yields. 
     Yet another problem that arises in processing wafers in currently available wafer carriers is that the processing tanks must be large enough to accommodate not only the wafers, but also the additional size of the wafer carrier. This leads to bulkier tanks and processing equipment which is more expensive to both build and operate. Thus, there is a need for a structurally compact wafer carrier that can structurally support a plurality of wafers. 
     SUMMARY OF THE INVENTION 
     These needs and others are met by the present invention which is in one aspect a wafer carrier comprising a wire frame having three load-supporting members having wafer engaging elements. In another aspect, the invention comprises a method of processing wafers using the wafer carrier of the present invention. A still further aspect is a process tank which includes the wafer carrier of the present invention. The wafer engaging elements of the three load-supporting members are preferably parallelly aligned. The wafer engaging elements can be a plurality of saw-toothed profiles, grooves, or slots. Preferably, the wafer engaging elements are saw-toothed profiles having wafer contact edges. 
     Optionally, each load supporting member can have an elliptical cross section having a major thickness and a minor thickness. Each load supporting member can be oriented so that the major thickness of its elliptical cross section is aligned in the load bearing direction while the minor thickness of each load-supporting member is no more than about 0.5 inches. 
     Moreover, the three load supporting members can consist of a bottom support member and two side support members. Preferably, the major thickness and minor thickness of the bottom support member will be larger than the major thickness and minor thickness of the two side support members respectively, wherein the minor thickness of the bottom support member will be no more than about 0.5 inches. 
     Also the wafer carrier can have a width that is smaller than the diameter of the wafers being supported by the wafer carrier. Preferably the wafer carrier is chemically resistant and is adapted to withstand thermal cycling at temperatures of 1800° C. with no substantial creep deformation. The wire frame can be constructed of a fluoropolymer or can be constructed so as to have an inner core and an outer coating. The material of the inner core can be made of a fluoropolymer or can be selected from the group consisting of ceramic, polyetherketoneketones with carbon fiber, stainless steel, and polyetheretherketones. The outer coating can be made of a fluoropolymer or can be either a suitable perfluoralkoxy or a copolymer of ethylene and chlorotrifluoroethylene. Preferably, the wafer engaging elements are molded into the outer coating. 
     In another embodiment, the invention comprises a method of processing wafers using the above described wafer carrier. The process tank can be a drying tank, a rinsing tank, or a chemical treatment tank. 
     In yet another embodiment, the invention is a process tank comprises comprising the wafer carrier described above. The process tank can be a drying tank, a rinsing tank, or a chemical treatment tank. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a side elevational view of an embodiment of the present invention, a low profile wafer carrier. 
         FIG. 2  is a front view of the present invention, a low profile wafer carrier, supporting a wafer. 
         FIG. 3  is a view of a section of a load supporting member with saw-toothed profiles as wafer engaging elements. 
         FIG. 4  is a side view of a load supporting member with a wafer supported by wafer contact edges of the saw-toothed profiles. 
         FIG. 5  is a cross-sectional view of the load supporting member of  FIG. 4  taken along line V—V. 
         FIG. 6  is a cross-sectional view of a low profile wafer carrier supporting a wafer. 
         FIG. 7  is a cross-sectional view of a load supporting member constructed so as to have an inner core and an outer coating. 
     
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       FIG. 1  is a side elevational view of a wafer carrier  1  made according to the present invention. Wafer carrier  1  comprises wire frame  7  having three load supporting members  2 - 4  and lifters  5 . Lifters  5  have handles  8  attached at the end for moving wafer carrier  1 . In the illustrated embodiment, the three load supporting members  2 - 4  consist of bottom support member  3  and two side support members  2 ,  4 . Bottom support member  3  and the two side support members  2 ,  4  have a plurality of wafer engaging elements  6  connected thereto. As illustrated, wafer engaging elements  6  are saw toothed profiles. However, wafer engaging elements  6  can take on a variety of shapes such as slots or grooves. 
     Wafer engaging elements  6  of bottom support member  3  and the two side support members  2 ,  4  are positioned so that they are parallelly aligned. This parallel alignment allows wafer  9  to be inserted in wafer carrier  1  and supported by wafer engaging elements  6  in a substantially upright position (FIG.  2 ). Because there are a plurality of wafer engaging elements  6 , a plurality of wafers  9  can be supported by wafer carrier  1  at the same time (not illustrated). 
       FIG. 3  is a view of a section of bottom support member  3 . In the illustration, wafer engaging elements  6  are saw toothed profiles  6 . As illustrated, saw-toothed profiles  6  are shaped similar to four-sided pyramids. Each saw toothed profile  6  has wafer contacting edges  10 . Wafer contacting edges  10  are lines formed by the intersection of two of the pyramid&#39;s surfaces  11  of the saw-toothed profiles  6 . While  FIG. 3  illustrates load supporting member  3 , saw-toothed profiles  6  are constructed identically on the two side supporting members  2 ,  4 . 
     Referring to  FIGS. 2 and 4 , saw-toothed profiles  6  are positioned on bottom support member  3  so that when wafer  9  is inserted into wafer carrier  1 , wafer  9  is engaged and supported by saw-toothed profiles  6  in such a manner that the only part of wafer carrier  1  that contacts wafer  9  is the wafer contact edges  10  of the saw-toothed profiles  6 . As a result, there are only two contact points  12  formed between wafer  9  and bottom support member  3 . While  FIG. 4  illustrates how saw-toothed profile  6  are positioned on bottom support member  3 , the saw-toothed profiles  6  on the two side support members  2 ,  4  are positioned identically and engage and support wafer  9  similarly. Thus, because there are three load supporting members  2 - 4 , each wafer  9  supported by wafer carrier  1  has a total of exactly six contact points  12  with wafer carrier  1 . 
     Referring now to  FIG. 5 , bottom support member  3  has an elliptical cross section. As a result of having elliptical cross section, bottom support member  3  has a minor thickness  13  and major thickness  14 . While  FIG. 5  illustrates bottom support member  3 , the characteristics shown in  FIG. 5  apply equally to the two side support members  2 ,  4 . Thus, side support members  2 ,  4  also have elliptical cross sections and have a major thickness  14  and a minor thickness  13 . 
     Preferably, the minor thickness  13  of bottom support member  3  and side support members  2 ,  4  is no more than about 0.5 inches. While it is possible that the elliptical cross sections of bottom support member  3  and side support members  2 ,  4  are substantially equal in size, it is preferable that bottom support member  3  have a larger minor thickness  13  and major thickness  14  than the two side support members  2 ,  4 . This is because bottom support member  3  supports the majority of the wafer loading force. 
     Referring to  FIG. 6 , when wafer  9  is placed into wafer carrier  1  (FIG.  2 ), bottom support member  3  and side support members  2 ,  4  are oriented so that their major thicknesses  14  (not shown) are aligned in the load bearing direction. In the illustrated embodiment, because wafer  9  is circular, bottom support member  3  and side support members  2 ,  4  are oriented so that if a line AB were extended through each of the major thicknesses  14  ( FIG. 5 ) of bottom support member  3  and side support members  2 ,  4 , lines AB would be substantially perpendicular to tangent lines TT drawn from the point where bottom support member  3  and side support members  2 ,  4  contact wafer  9  respectively. 
     Moreover, bottom support member  3  and side support members  2 ,  4  are positioned so that the width W of wafer carrier  1  is less than the diameter D of wafers  9  being supported by wafer carrier  1  (FIG.  1 ). The width W of wafer carrier  1  is the distance between the outermost point of the two side support members  2 ,  4 . 
     Referring to  FIGS. 1 and 7 , wafer carrier  1  must be constructed so as to be chemically resistant and adapted to withstand thermal cycling at temperatures of 1800° C. with no substantial creep deformation. In order to achieve these goals while implementing the above described dimensional aspects, wire frame  7  can be constructed of a fluoropolymer. Preferably wire frame  7  is constructed so as to have an inner core  15  covered by an outer coating  16  wherein outer coating  16  overmolds all surfaces of wafer carrier  1 . Inner core  15  can be made of ceramic, polyetherketoneketones with carbon fiber, polyetheretherketones, or other comparable flouropolymers. Optionally, stainless steel can be used to construct inner core  15  or to provide additional structural support within inner core  15 . Outer coating  16  can be made of a perfluoralkoxy (preferably that which is sold under the trademark Dyneon PFA 6505HP or Teflon PFA 440HP), a copolymer of ethylene and chlorotrifluoroethylene (preferably that which is sold under the trademark Halar), or other comparable flouropolymers. 
     Also preferably, wafer engaging elements  6  are molded into outer coating  16 . 
     While the invention has been described and illustrated in detail, various alternatives and modifications will become readily apparent to those skilled in the art without departing from the spirit and scope of the invention.