Abstract:
The invention relates to circuit arrangements for operating lamps and to operating devices which contain such circuit arrangements. A first stage of a circuit arrangement according to the invention comprises a SEPIC known from the literature. The SEPIC provides a DC voltage which an inverter converts to a radiofrequency AC voltage for lamp operation. According to the invention, an electronic switch (S 1 ) acts both in the SEPIC and in the inverter. Two diodes (D 1 , D 2 ), which are connected into the supply line for the electronic switch (S 1 ), prevent the SEPIC and the inverter from influencing one another.

Description:
FIELD OF THE INVENTION  
       [0001]     The invention relates to circuit arrangements for operating lamps and to operating devices which contain such circuit arrangements. The term lamp in the present patent application encompasses apparatuses which are suitable for producing electromagnetic radiation having a wavelength of between 50 nanometers and 50,000 nanometers from electrical energy. Examples of such lamps are incandescent lamps, gas discharge lamps or light-emitting diodes. The present invention has the object of reducing costs by combining two stages of a circuit arrangement of this type.  
       BACKGROUND OF THE INVENTION  
       [0002]     Circuit arrangements for operating lamps which essentially comprise two stages are widely used. A rectified system voltage is fed to a first stage which makes available a DC voltage for a second stage, this DC voltage being referred to in the literature as the intermediate circuit voltage. One function of the first stage is to draw a system current from the system voltage which is as proportional as possible with respect to the system voltage.  
         [0003]     The second stage produces an AC output voltage from the intermediate circuit voltage, and this AC output voltage has a frequency which is substantially higher than the frequency of the system voltage. The AC output voltage is fed to a load circuit at a load circuit input. A lamp can be coupled to the load circuit. The load circuit essentially has the function of matching the AC output voltage to the requirements of the lamp. For example, the output impedance of the second stage or the amplitude of the AC output voltage needs to be matched to the lamp by means of a reactance network and/or a transformer.  
         [0004]     For the first stage, a SEPIC-type converter (Single-Ended Primary Inductance Converter) is known, for example, from the specification U.S. Pat. No. 6,690,122 (Weirich). The SEPIC is a converter which contains only a first electronic switch. The SEPIC has the advantage that it can provide an intermediate circuit voltage, whose value can be set to be either above or below the value of the amplitude of the system voltage.  
         [0005]     For the second stage, inverters having one or more electronic switches are known. The so-called half-bridge inverter which contains two electronic switches which are connected in series, the AC output voltage being applied to the junction of these two electronic switches, is widely known.  
         [0006]     Furthermore, inverters are known for the second stage which contain only one electronic switch, such as flux converters, flyback converters or inverse converters.  
         [0007]     The two-stage design of the circuit arrangement means a high degree of complexity as regards the number of electronic switches and the drive apparatuses required for them.  
       SUMMARY OF THE INVENTION  
       [0008]     It is the object of the present invention to provide a circuit arrangement for operating lamps and an operating device having such a circuit arrangement which is less complex than a two-stage circuit arrangement.  
         [0009]     This object is achieved by a circuit arrangement for operating lamps and an operating device having such a circuit arrangement which contains a SEPIC, the first electronic switch of the SEPIC also acting as an electronic switch for a downstream inverter. This is achieved by a first and a second diode which are each connected with their cathode to a first contact of the first electronic switch. The anode of the first diode is connected to a first node, to which, in the prior art, the first electronic switch is connected. The anode of the second diode is connected to a point in the inverter to which, in the prior art, a switch, connected to ground, of the inverter is referred. This point is generally the load circuit input.  
         [0010]     Owing to the first and the second diode, current both from the SEPIC and from the inverter can flow into the switch. However, no current can flow from the SEPIC to the inverter, or vice versa. The first electronic switch can thus have a function both in the SEPIC and in the inverter without the SEPIC and the inverter influencing one another. Although the first electronic switch acts both in the SEPIC and in the inverter, only one drive apparatus is required for the first electronic switch. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0011]     The invention will be explained in more detail below using exemplary embodiments with reference to drawings, in which: 
         FIG. 1  shows an exemplary embodiment of a circuit arrangement according to the invention having a half-bridge inverter, and      FIG. 2  shows an exemplary embodiment of a circuit arrangement according to the invention having a single-switch inverter (SSI).       
 
     
    
       [0014]     Below, electronic switches are referred to by the letter S, diodes by the letter D, capacitors by the letter C, inductors by the letter L and nodes by the letter N, in each case followed by a number. The same references are also used throughout below for identical and functionally identical elements in the various exemplary embodiments.  
       DETAILED DESCRIPTION OF THE INVENTION  
       [0015]      FIG. 1  shows an exemplary embodiment of a circuit arrangement according to the invention having a half-bridge inverter.  
         [0016]     The following paragraph describes the topology of the SEPIC contained in the circuit arrangement:  
         [0017]     A SEPIC-type converter which is contained in the circuit arrangement has an input E, which is referred to a ground and which can be connected to a rectified system voltage. Furthermore, the SEPIC has an input inductor L 11  which on one side is coupled to the input and on the other side is coupled to a first node N 1 . Furthermore, the SEPIC has a first electronic switch S 1  which is coupled, with a first contact, to the first node N 1  via a diode D 1  and, with a second contact, to the ground. Furthermore, the SEPIC has a first capacitor C 1  which is firstly coupled to the first node N 1  and secondly to a second node N 2 . Furthermore, the SEPIC has a third diode D 3  which is coupled with its anode to the second node N 2  and with its cathode to a plus potential +. Furthermore, the SEPIC has a second inductor L 12  which is connected between the second node N 2  and ground. Furthermore, the SEPIC has a second capacitor C 2  which is connected between the plus potential + and ground.  
         [0018]     The inductors L 11  and L 12  can be coupled, as is indicated by the dashed line. This coupling brings about ripple current compensation for an input current. This effect has been discussed many times in the literature.  
         [0019]     A load circuit having a load circuit input N 3  essentially comprises the series circuit comprising a third inductor L 3  and a fourth capacitor C 4 , which is connected between the load circuit input N 3  and ground. The series circuit comprising a lamp Lp and a fifth capacitor C 5  is connected between the junction between L 3  and C 4  and ground. The series circuit comprising L 3  and C 4  matches an output impedance of the inverter to the lamp Lp. A current is thus impressed on the lamp Lp. C 5  causes the current through the lamp Lp to have no DC component. The load circuit illustrated often serves the purpose of operating gas discharge lamps in the prior art.  
         [0020]     According to the invention, a first diode D 1  is connected between the first node N 1  and the first contact of the first electronic switch S 1  such that current can flow from the input inductor L 11  to the first electronic switch S 1 . Furthermore, according to the invention a second diode D 2  is connected between the first contact of the first electronic switch S 1  and the load circuit input N 3  such that current can flow from the load circuit to the first electronic switch S 1 .  
         [0021]     A second electronic switch S 2  is connected between the plus potential + and the load circuit input N 3 . S 2  forms, via D 2  and together with S 1 , a half-bridge inverter.  
         [0022]     In each case a generally known freewheeling diode D 4 , D 5  is connected in parallel with S 2  and between the load circuit input N 3  and ground. These freewheeling diodes can be dispensed with if they have already been integrated in the electronic switches S 1 , S 2 , as is the case with MOSFETs.  
         [0023]     In the exemplary embodiment, the load circuit input N 3  is connected to a snubber capacitor C 3 . This snubber capacitor serves the purpose of relieving the switching load on the electronic switches S 1 , S 2 . If no switching load relief is required, or the parasitic capacitances of the electronic switches S 1 , S 2  are sufficient for relieving the switching load, C 3  can be dispensed with. C 3  may be connected either to ground, as in the exemplary embodiment shown in  FIG. 1 , or to the plus potential +, as is shown in  FIG. 2 .  
         [0024]     The electronic switches S 1  and S 2  close and open alternately. A square-wave voltage thus results at the load circuit input. In order to open and close, the electronic switches require a drive apparatus which is not shown in  FIGS. 1 and 2 . A lamp current can be set by the frequency at which the switches open and close. The switch-on time for the two switches should be essentially the same during operation of gas discharge lamps in order to prevent electrophoresis effects.  
         [0025]     In summary, the operation of the exemplary embodiment shown in  FIG. 1  is explained below: the circuit arrangement contains a first stage which is realized as a SEPIC. The electronic switch S 1  acts as a switch for the SEPIC. The SEPIC is fed a rectified system voltage and makes available a DC voltage at C 2 . A half-bridge inverter comprising S 1  and S 2  converts this DC voltage to a square-wave voltage and makes it available to a load circuit.  
         [0026]     According to the invention, S 1  acts as a switch both for the SEPIC and for the half-bridge inverter. In order to prevent the SEPIC and the half-bridge from influencing one another, the diode D 1  according to the invention is connected between S 1  and the SEPIC, and the diode D 2  according to the invention is connected between S 1  and the half-bridge inverter.  
         [0027]      FIG. 2  illustrates an exemplary embodiment of a circuit arrangement according to the invention having a single-switch inverter (SSI). It differs from the exemplary embodiment shown in  FIG. 1  as follows:  
         [0028]     The freewheeling diodes D 4  and D 5  and the electronic switch S 2  are dispensed with. The snubber capacitor C 3  is connected to the plus potential +. A fourth inductor L 4  is connected between the plus potential + and the load circuit input N 3 .  
         [0029]     In  FIG. 2 , there is no half-bridge arrangement, but S 1  forms, together with L 4 , a single-switch inverter. Once S 1  has opened, the voltage at S 1  increases. If this voltage falls to zero before S 1  closes again owing to a resonant design for the circuit arrangement, S 1 , together with L 4 , can be classed as a Class E converter cell. In order to provide a resonant design, in particular the value of L 3  and C 3  is to be selected such that the abovementioned condition for the voltage at S 1  is maintained. Class E converter cells are known from the literature as low-loss converters.  
         [0030]     As in  FIG. 1 , the diodes D 1  and D 2  according to the invention allow S 1  to have a dual function. Firstly, it acts as a switch in the SEPIC, and secondly in the SSI.  
         [0031]     A clock ratio is defined on the basis of the period of time during which S 1  is switched on in relation to the period of time during which S 1  is switched off. On the basis of the clock ratio, both the intermediate circuit voltage and the current through a connected lamp can be set. An intermediate circuit voltage can advantageously be selected to be either above or below the peak value of the connected system voltage. It is possible to regulate the lamp current by the period of time during which S 1  is switched on depending on the current through the connected lamp.