Abstract:
An electronic material instrument includes a tone generator for synthesizing tones by using a number of time-division multiplexed (TDM) modules, an input unit for programming a connection configuration (tone synthesis algorithm) for the modules of each module pair, and a processing unit for converting the input program into control data for each module and transferring the control data to the tone generator. In one embodiment, each module pair is selectively operative in an addition mode, a phase mode or a ring modulation mode, independently of the modes selected for the other module pairs. It is thus possible to attain a tone synthesis desired by the user, and to make the best use of the capacity of the tone generator.

Description:
This application is a continuation of application Ser. No. 07/256,399, filed Oct. 11, 1988, now abandoned. 
    
    
     BACKGROUND OF INVENTION 
     This invention relates to electronic musical instruments and, more particularly, to a technology for designating how a tone generator synthesizes musical tones. 
     Electronic musical instruments with a tone generator for synthesizing musical tones using a plurality of waveform generation modules are known in the art. Such waveform generator modules can be connected to one another in various forms, and the entirety of the resultant connected structure specifies the way of synthesizing tones. 
     An electronic musical instrument disclosed in U.S. Pat. No. 4,554,857 (issued on Nov. 26, 1985) incorporates a set of tone synthesis algorithms each defining a connected structure of a plurality of waveform generator modules. Each tone synthesis algorithm has a uniquely assigned numerical value representing the name of the algorithm. A tone synthesis algorithm is specified by selecting an algorithm number by an input unit. The selected tone synthesis algorithm is executed by a tone generator having a plurality of time-division multiplexed (TDM) modules for the synthesis of a tone. 
     With this arrangement, the user can select a tone synthesis algorithm but can not program it, i.e., assemble a connected structure of the plurality of tone generator modules. Further, with the increase of the number of tone synthesis algorithms, it becomes difficult for the user to grasp the correspondence between numbers and tone synthesis algorithms. 
     Further, the tone generator used in the above system is basically of the frequency modulation (FM) type. Therefore, the output of a module is usable in only two alternatives, one for partial output of the tone generator, and the other for part of a phase signal input to the same or a different module. 
     U.S. patent application Ser. No. 002,121, filed on Jan. 12, 1987, concerning the assignee of this application discloses a tone generator with a plurality of TDM modules, which can utilize the output of each module in various ways, for instance, as part of a synthesized tone, an envelope input to a different module or part thereof or a phase input to a different module or part thereof. Therefore, the number Of tone synthesis algOrithms executable by the tone generator is extremely large and may readily exceed 100,000 for eight modules. The application, however, does not show any technique that permits the user to select or assemble a tone synthesis algorithm. 
     SUMMARY OF THE INVENTION 
     An object of the present invention is to provide an electronic musical instrument which allows the user to easily program a configuration of tone synthesis. 
     Another object of the invention is to provide an electronic musical instrument in which a tone generator can synthesize tones in various ways according to selected tone synthesis algorithms. 
     A further object of the invention is to provide an electronic musical instrument which permits the user to make the best use of the tone synthesis capacity of a tone generator having a plurality of time-division multiplexed modules. 
     In accordance with the present invention, there is provided an electronic musical instrument with a tone generator for synthesizing musical tones by using a plurality of time-division multiplexed waveform generator modules, which comprises input means for designating a connection structure of each pair of modules independently of the connection structures of other module pairs such that each module pair forms a tone synthesis unit, and processing means for generating control data for each module in response to the designation by the input means and for transferring the generated control data to the tone generator. 
     This arrangement has an advantage that the user can readily program a tone synthesis algorithm. Further, in contrast to the prior art, there is no need for the user to confirm the correspondence between numerical values and structures of a plurality of modules. 
     Preferably, the input means selects each module pair connection structure from: 
     (a) a mode in which the output of the first or former module in the pair is added to the output of the second or latter module in the pair; 
     (b) a mode in which the output of the former module is used as a phase signal to the latter module; and 
     (c) a mode in which the output of the former module is used as part of an envelope signal to the latter module. 
     There may be further provided display means which visually displays a connected structure of a plurality of modules in response to the designation by the input means. 
     The electronic musical instrument may further comprise additional input means for independently designating a connection structure of each pair of the tone synthesis units. 
     With this addition, the number of programmable tone synthesis algorithms is further increased, permitting the user to take full advantage of the tone generator capacity. 
     Preferably, additional input means selects a connection structure of each pair of tone synthesis units from: 
     (a) a mode in which the output of the preceding tone synthesis unit in the pair is used as at least part of a phase signal to the latter module in the succeeding tone synthesis unit in the pair; and 
     (b) a mode in which the output of the preceding tone synthesis unit in the pair is used as at least part of a tone to be output from the tone generator. 
     Module control data may contain phase distortion control data. In this relation, each module may include means for receiving a phase signal, means for modulating the received phase signal according to the phase distortion control data, sine wave memory means, means for accessing sine wave memory means by using the modulated phase signal, means for receiving an envelope signal and means for multiplying the received envelope signal by an output signal from the sine wave memory means. 
     The phase signal may be selected according to the module control data from a phase signal from basic parameter generator means, an output signal from the former module, an output signal of the previous tones synthesis unit and the sum of or difference between the output signal of the former module and the output signal from the previous tone synthesis unit. The envelope signal may be selected according to the module control data from an envelope signal from the basic parameter generator means and the sum of the output of the preceding module and the envelope signal from the basic parameter generator means. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The above and other objects, features and advantages of the invention will become more apparent from the following detailed description with reference to the accompanying drawings, in which: 
     FIG. 1 is a block diagram of an electronic musical instrument in accordance with the invention; 
     FIG. 2 is a block diagram of a tone generator LSI useful instrument; 
     FIG. 3 shows logical arrangement of a waveform generator for use in the tone generator; 
     FIG. 4 shows correspondence between operation codes and operations of the waveform generator; 
     FIG. 5 is a view of an input unit in a first embodiment; 
     FIG. 6 is a schematic diagram of the waveform generator in the first design, showing respective tone synthesis units; 
     FIG. 7 is a schematic diagram of the first tone synthesis unit in FIG. 6; 
     FIG. 8 shows correspondence between operation codes and respective modes of addition, phase and ring modulation of two consecutive modules; 
     FIG. 9 shows waveform synthesis registers storing instructions of tone synthesis provided by the input unit shown in FIG. 5; 
     FIG. 10 is a flow chart for generating operation codes for the waveform generator from the contents of the waveform synthesis registers; 
     FIG. 11 is a view of an input unit in a second embodiment; 
     FIG. 12 is a schematic diagram of the waveform generator in the second embodiment, showing respective tone synthesis units; 
     FIG. 13 is a schematic diagram of first two units in FIG. 12; 
     FIG. 14 shows correspondence between operation codes and the respective positions of the select switches in FIG. 13; 
     FIG. 15 shows waveform synthesis registers storing instructions of tone synthesis provided by the input unit shown in FIG. 11; and 
     FIG. 16 is a flow chart for generating operation codes for the waveform generator from the contents of the waveform synthesis registers shown in FIG. 15. 
    
    
     DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS 
     Now, an embodiment of the invention will be described with reference to the drawings. FIG. 1 is a block diagram of an electronic musical instrument incorporating the features of the invention. The states of a keyboard 1 and a switch section 2a, are monitored by CPU 3 to detect key-&#34;on&#34;, key-&#34;off&#34;, tone color selection, etc. Data concerning the selected tone color, edit, etc. are presented on a display section 2b by CPU 3. For the control of a tone generator LSI 6, the CPU 3 generates the necessary data using a ROM 4 and a RAM 5 and transfers the generated data to the tone generator LSI 6. The tone generator 6 uses an external RAM 7 as an operation buffer to generate tones. The generated tones are converted by a digital-to-analog converter (DAC) into analog signals, which are amplified by an amplifier 9 and sounded by a loudspeaker 10. 
     FIG. 2 shows a block diagram of the tone generator LSI 6. In this example, the tone generator LSI 6 has an 8-channel structure having 8 modules per channel. An interface/controller 11 provides an interface between CPU 3 and the tone generator LSI 6. It generates timing signals used in various parts of the tone generator LSI 6. Also, it decodes the data transferred from the CPU 3 and writes the decoded data in the external RAM 7 through an external RAM interface 16. An envelope and keycode generator 12 reads and writes data from and in the external RAM 7 via the external RAM interface 16 and generates and supplies envelope and keycode data to an exponential transformation and phase angle generation unit 13. The unit 13 performs exponential transformation of the supplied envelope and keycode data and accumulates the transformed keycode data (differential value of the phase) to generate the phase angle data. In the present example, the envelope and keycode generator 12 samples envelope and keycode data at a relatively low rate because it uses the external RAM 7. On the other hand, the waveform generator 15 samples tones at a high rate. For this reason, the exponential transformation and phase generator unit 13 carries out the rate conversion using an internal buffer (not shown). As a result, the exponential transformation and phase angle generation circuit 13 supplies the phase angle and envelope data to the waveform generator 15 at each channel and module time, maintaining synchronization with the waveform generator 15. An OC register 14 includes a memory for storing data (operation codes) for controlling the operation of the waveform generator 15 for each channel and module. The memory is updated via the interface/controller 11 every time an operation code is transferred from CPU 3. At each channel and module time of the waveform generator 15, the OC register 14 reads out a corresponding operation code from the internal memory and supplies it to the waveform generator 15. The waveform generator 15 selectively uses time-division multiplexed envelope and phase angle data supplied from the exponential transformation and phase angle generation circuit 13 according to time-division multiplexed operation code data for each channel and module provided by the OC register 14 to generate various tones. 
     FIG. 3 illustrates a logical arrangement of the waveform generator 15. A portion surrounded by the dashed rectangle indicates a waveform generator module 15M which operates on TDM basis. In the Figure, labeled E and ωt are time-division multiplexed envelope data and phase angle data supplied by the exponential transformation and phase angle generation circuit 13 at each channel and module time. The states of selectors XS, ES, TS and SS in the waveform module 15M are each controlled by operation codes provided from the OC register 14 at each channel and module time. The selection circuit XS is for selecting a phase angle used in the waveform module 15M. The phase angle selector XS selects the phase angle according to the operation code from: 
     (a) phase angle data generated by the exponential transformation and phase angle generation circuit 13; 
     (b) waveform output W -1  of an immediately preceding module; 
     (c) output R of temporary register 15-3; or 
     (d) sum of or difference between (b) and (c). 
     Designated by ES is an envelope selection circuit which selects; 
     (a) envelope data E generated by the exponential transformation and phase angle generation circuit 13 when the bit 3 of the operation code OC is &#34;0&#34;, and 
     (b) the past or accumulated waveform R&#39; from the temporary register 15-3 added to the envelope data E when the bit 3 of the operation code OC is &#34;1&#34;. 
     Designated by PD is a phase distortion/noise selection circuit which selects: 
     (a) no phase distortion when the bits 2 to 0 of the operation code OC is &#34;0&#34;, 
     (b) five progressive phase distortions when the value of the bits 2 to 0 is &#34;1&#34; to &#34;5&#34;, 
     (c) white noise when the value of the bits 2 to 0 is &#34;6&#34;, and 
     (d) the product of white noise and sinusoidal wave, i.e., pink noise, when the value of the bits 2 to 0 is &#34;7&#34;. 
     If no phase distortion is selected the waveform module 15M converts a phase selected by the phase angle selector XS into a sinusoidal wave at that phase using a SINROM 15-1 and multiplies it by an envelope selected by the envelope selector ES using a multiplier 15-2. The output of the multiplier defines the output W of the waveform module 15M. 
     TS is a circuit for selecting an input to the temporary register 15-3. TS selects the input according to the operation code from: 
     (a) waveform output W of the current module, 
     (b) output R of the temporary register, or 
     (c) sum of or difference between (a) and (b). 
     SS selects an input to an accumulator 15-4 which accumulates waveforms to form a tone to be supplied to DAC 8. 
     The input to the accumulator is either: 
     (a) the result of addition or subtraction of the waveform W of the current module to or from existing accumulated waveform, or 
     (b) existing accumulated waveform (without change). 
     Thus, the accumulator input selector SS controls whether to use the waveform output W of the current module as part of a tone to be output from the waveform generator 15. 
     FIG. 4 shows correspondence between operation codes and operations of the waveform module 15M. A suffix 1 in the Figure indicates an ordinal module number. For example, when the operation code OC is 0X (hexadecimal notation), the input to the accumulator 15-4 is the sum of whatever is in the accumulator Σ and waveform output W i-1  of the preceding module, while the phase angle input X 1  to the current module is given by the phase data ω i  t from the exponential transformation and phase angle generation circuit 13. 
     This invention concerns a technique of designating an operation mode of each TDM waveform module in a tone generator as exemplified by the waveform generator 15. By way of example, two embodiments will be described. 
     First Embodiment 
     In a first embodiment or design, a way of combining or interconnecting individual pairs of the modules can be designated using an input unit. There are three ways or modes of combination, i.e., addition mode, phase mode and ring modulation mode. Let E i  sin ω i  t, be the output waveform of module i. In the addition mode we obtain 
     
         E.sub.i sin ω.sub.i t+E(i+1) sin ω(i+1)t. 
    
     In the phase mode, the output waveform of the module i constitutes the phase of the next module i+1, so we have 
     
         E(i+1) sin (E.sub.i sin ω.sub.i t). 
    
     In the ring modulation mode, the output waveform of module i is added to the envelope E(i+1) produced by the exponential transformation and angle generation circuit 13 to define an envelope used in the waveform module i+1. Thus, we obtain 
     (E(i+1)1+E i  sin ω i  t) sin ω(i+1)t. 
     FIG. 5 shows an example of the input unit for designating the above three modes of combination. In the Figure, designated by 2b-1 is a display section. The waveform generator 15 synthesizes a tone using a total of eight modules. If two modules are called a line as a unit (tone synthesis unit), there are a total of four lines. The actual waveform generator 15 noted above can generate tones for eight channels each consisting of eight modules. The following description, however, assumes a single channel for the sake of brevity. Numerals 0 to 3 shown on the left side of the screen of the display 2b-1 represents line numbers. For example, line 0 is a combination of modules 0 and 1. The way of combining each pair of modules is displayed on the right side of the corresponding line number. A line is selected by a cursor key 2a-1, and the way of combination of the pair of modules (addition phase or ring modulation mode) is selected by a value key 2a-2. For example &#34;ADD&#34;, in the Figure, means that modules 0 and 1 are added together. The display section 2b-1 is part of the display 2b shown in FIG. 1. The keys 2a-1 and 2a-2 form part of the switch section 2a. 
     FIG. 6 schematically shows the waveform generator 15 when eight TDM modules of the waveform generator 15 are regarded as four tone synthesis units or lines L 0  to L 3 . 
     FIG. 7 shows the first tone synthesis line L 0 . The functions of the waveform generator 15 described in conjunction with FIG. 3 are shown here in a simplified form for the sake of explanation of the first design. For example, designated by 15-1 0  is SINROM 15-1 in the module 0, and 15-1 1  is SINROM 15-1 in the module 1. The output of E 0  is an envelope generated by the exponential transformation and phase angle generation circuit 13 (FIG. 2) at a time of module 0, and the output of E 1  is an envelope generated by the circuit 13 at a time of module 1. The other lines L 1  to L 3  are similarly arranged. The relation between the module 0 and 1 can be selected from three modes, i.e., &#34;addition&#34;, &#34;phase&#34; and &#34;ring modulation&#34; modes, by means of three select switches SW1 to SW3 shown in the Figure. 
     FIG. 8 shows correspondence between two operation codes OC0 and OC1 for the respective modules 0 and 1 and the select switches SW1 to SW3 in FIG. 7. OC0 and OC1 on the first row state that the two modules be added. In the case of OC0 and OC1 on the second row, the output of the preceding module (module 0) becomes the phase of the succeeding module (module 1). OC0 and OC1 on the third row indicates the ring modulation. 
     FIG. 9 shows waveform synthesis registers MD01, MD23, MD45 and MD67 set by the input unit shown in FIG. 5. These registers are provided in the RAM 5 shown in FIG. 1. The lowest two bits of each register specifies the relation between two modules. The CPU 3 in FIG. 1 generates each operation code from the contents of each register and transfers it to the OC register 14 of the tone generator LSI 6. 
     FIG. 10 shows a flow chart of generating operation codes OC as done by CPU 3. The CPU 3 checks the lowest two bits of each of the registers MD01, MD23, MD45 and MD67 in the steps S0, S4, S8 and S12. If the lowest two bits are &#34;00&#34; representing an addition, the CPU makes the operation code for the preceding module equal to &#34;00&#34; and the operation code for the succeeding module equal to &#34;00&#34; (steps S1, S5, S9 and S13). As is seen from FIGS. 4 and 8, with this combination of operation codes, the waveform generator 15 executes addition of two modules. When the lowest two bits are &#34;01&#34; representing a phase operation, the operation codes of the preceding and succeeding modules are respectively &#34;00&#34; and &#34;A0&#34; (steps S2, S6, S10 and S14). As a result, the waveform generator 15 selects the output of the preceding module as the phase input to the succeeding module. When the lowest two bits are &#34;1X&#34; (where X is a &#34;don&#39; t care&#34; bit) representing a ring modulation operation the operation codes of the preceding and succeeding modules are respectively &#34;00&#34; and &#34;88&#34; (S3, S7, S11 and S15). As a result, the envelope used in the succeeding module i+1 is given by 
     
         (E.sub.(i+1) +E.sub.i)sin ω.sub.i t 
    
     and the ring modulation is achieved. 
     Since there are three different ways of combining two modules, a total of eight modules reside in the tone generator, and each tone synthesis line is independent of the others, there are a total of 3 4  i.e., eighty one possible tone synthesis combinations. 
     In this manner, the first embodiment regards the eight TDM waveform modules provided in the waveform generator 15 as four different pairs of modules, and allows the connection structure of each module pair (line) to be selected using the input unit. 
     Second Embodiment 
     A second embodiment or design allows, in addition to the requirements of the first design, the waveform output of the current line to be used as either 
     (a) a phase input to the latter module of the next line or part of the input, or 
     (b) a tone. 
     By adding the selection (a), the module phase input may contain a plurality of frequency components, thus enriching tones generated. 
     FIG. 11 shows an input unit for use in the second design. As is seen from the screen of a display section 2b-1, it is possible to select both the relation of two modules constituting a line (i.e., either addition, phase or ring modulation) and the relation of the current line with the next. &#34;ON&#34; shows that the current line output is supplied to the input of the next line. &#34;OFF&#34; shows that the line output is not supplied as the input to the next line but is used as a tone. A cursor key 2a-1 selects a line number, or a value key 2b-1 selects the line-setting data. 
     FIG. 12 schematically shows the waveform generator 15 in the second design. The second design is the same as the first insofar as two consecutive modules are regarded as a single tone synthesis line but is different in that each line output can be input to the next line. 
     FIG. 13 shows an arrangement of the first and second tone synthesis line L 0  and L 1  in FIG. 12. 
     Select switches SW1 to SW 3 in the unit L 0  and select switches SW5 to SW7 in the unit L 1  serve to select module relation in each line from the addition, phase and ring modulation modes. Select switches SW4 and SW8, which are additionally provided in the second design, determine whether the line output is supplied to the next line or used as a tone. 
     In FIG. 13, if the select switch SW4 has its pole thrown to the left, the output α 0  of the line L 0  is supplied to the next line L 1 . The line L 1  provides 
     
         E.sub.3 sin (α.sub.0)+E.sub.2 sin ω.sub.2 t, 
    
     
         E.sub.3 sin (α.sub.0 +E.sub.2 sin ω.sub.2 t), and 
    
     
         (E.sub.3 +E.sub.2 sin ω.sub.2 t) sin (α.sub.0) 
    
     when the switches SW5, SW6 and SW7 are in the center, lower and left positions, in the upper, lower and right positions and in the center, upper and right positions, respectively. Generally, when the output α i/2-1  of the line i/2-1 is supplied to the next line 1/2, the output of the latter is either 
     
         E(i+1) sin (α.sub.i/2-1)+E.sub.i sin ω.sub.i t, 
    
     
         E(i+1) sin (α.sub.i/2-1 +E.sub.i sin ω.sub.i t), or 
    
     
         (E(i+1)+E.sub.i sin ω.sub.i t) sin (α.sub.i/2-1). 
    
     FIG. 14 shows correspondence between operation codes and positions of select switches SW1 to SW8. For example, when OC0=&#34;00&#34;, OC1=&#34;80&#34;, OC2=&#34;40&#34; and OC3=&#34;10&#34; as seen in the first row, the output of the first line L 0  is 
     
         E.sub.0 sin ω.sub.0 t+E.sub.1 sin ω.sub.1 t. 
    
     This output constitutes the phase input to the second line L 1 . The module 3 of L 1  provides 
     
         E.sub.3 sin (E.sub.0 sin ω.sub.0 t+E.sub.1 sin ω.sub.1 t). 
    
     This output is added to the output E 2  sin ω 2  t of the module 2 of the line L 1 . More specifically, this is read from FIGS. 3 and 4. With OC=&#34;00&#34; a waveform E 0  sin ω 0  t is generated by the module 0. This is supplied to the temporary register 15-3 in FIG. 3 (R=E 0  sin ω 0  t) with OC1 =&#34;80&#34;. Further, with OC1=&#34;80&#34; a waveform E 1  sin ω 1  t is generated by the module 1, and with OC2=&#34;40&#34; this waveform is added to the previous E 0  sin ω 0  t, the sum being supplied to the temporary register 15-3 (R=E 0  sin ω 0  t+E 1  sin ω 1  t). Further, with OC2=&#34;40&#34; a waveform E 2  sin ω 2  t is generated by the module 2, and with OC3=&#34;10&#34; the content E 0  sin ω  0  t+E 1  sin ω 1  t of the temporary resister 15-3 is supplied as phase input to the module 3. The module 3 provides an output E 3  sin (E 0  sin ω 0  t+E 1  sin ω 1  t), and with OC3=&#34;10&#34; the waveform E 2  sin ω 2  t from the module 2 is supplied to the accumulator 15-4 (Σ=E 2  sin ω 2  t). Although not shown in FIG. 14, the operation code OC4 of the next module is &#34;00&#34; (see FIG. 16 to be described later). Thus, the output of the module 3 is added to the waveform of the preceding module 2 and supplied to the accumulator 15-4 (Σ=E 2  sin ω 2  t+E 3  sin (E 0  sin ω 0  t+E 1  sin ω 1  t). 
     FIG. 15 shows waveform synthesis registers MD01, MD23, MD45 and MD67 which are altered by the input unit shown in FIG. 11. As in the first design, each lowest two bits designate the relation of two modules forming a line. Each bit 2 serves to determine whether the line output is to be provided as phase input to the next line or a tone. The CPU 3 generates operation codes for respective modules from these waveform synthesis registers MD01, MD23, MD45 and MD67 and transfers these codes to the OC register 14 of the tone generator. 
     FIG. 16 is a flow chart of generating operation codes as is done by the CPU 3. This will now be described in conjunction with some examples of tone synthesis. 
     The synthesis of E 2  sin ω 2  t+E 3  sin (E 0  sin ω 0  t+E 1  sin ω 1  t) has been described. In this case, MD01=&#34;04&#34;, and MD23=&#34;00&#34;. In the routine, OC0=&#34;00&#34;, OC1=&#34;80&#34;, OC2=&#34;40&#34;, OC3=&#34;10&#34; and OC4=&#34;00&#34; are generated through steps T1, T2, T3, T6, T33 and T34. 
     Now, synthesis of E 3  sin (E 2  sin ω 2  t+E 1  sin ω 1  t+E 0  sin ω 0  t) will be considered. In this case, MD01=&#34;40&#34;, and MD23=&#34;01&#34;. According to the routine, OC0=&#34;00&#34;, OC1 =&#34;80&#34;, OC2=&#34;40&#34;, OC3=&#34;70&#34; and OC4=&#34;00&#34; are generated (steps T1, T2, T3, T6, T33 and T35). The synthesis operation is the same as the first example up to OC2. In the next OC3, the phase input X 3  receives 
     
         W.sub.2 +R=E.sub.2 sin ω.sub.2 t+E.sub.1 sin ω.sub.1 t+E.sub.0 sin ω.sub.0 t. 
    
     Thus, the output W 3  of the module 3 is given by 
     
         E.sub.3 sin (E.sub.2 sin ω.sub.2 t+E.sub.1 sin ω.sub.1 t+E.sub.0 sin ω.sub.0 t). 
    
     This is supplied to the accumulator with the next operation code OC4=&#34;00&#34; stating 
     
         Σ=Σ+W.sub.3. 
    
     Now, the synthesis of (E 3  +E 2  sin ω 2  t) sin (E 1  sin ω 1  t +E 0  sin ω 0  t) will be considered. In this case, MD01=&#34;04&#34;, and MD23=&#34;02&#34;. The routine generates OC0=&#34;00&#34;, OC1=&#34;80&#34;, OC2=&#34;40&#34;, OC3=&#34;98&#34; and OC4=&#34;00&#34; (steps T1, T2, T3, T6, T33 and T36). This example is the same as the preceding examples up to OC2. With OC3=&#34;98&#34;, the output R (=E 1  sin ω 1  t+E 0  sin ω 0  t) of the temporary register 15-3 is selected as the phase input X 3  to the module 3, and E 3  +R&#39; (R&#39;=W 2  =E 2  sin ω 2  t) is selected as the envelope input. The module 3 provides (E 3  +E 2  sin ω 2  t) sin (E 1  sin ω 1  t+E 0  sin ω 0  t) which is then supplied to the accumulator 15-4 with OC4. 
     Now, when providing E 3  sin (E 2  sin ω 2  t+E 1  sin (E 0  sin ω 0  t)), MD01=&#34;05&#34; and MD23=&#34;01&#34;. Thus, the routine generates OC0=&#34;00&#34;, OC1=&#34;A0&#34;, OC2=&#34;80&#34;, OC3=&#34;70&#34; and OC4=&#34;00&#34; (steps T1, T2, T4, T6, T33 and T35). Up to OC2 this example is the same as the preceding examples. With OC3 
     
         X.sub.3 ←R+W.sub.2 
    
     is executed, and with OC4 
     
         Σ←Σ+W.sub.3 
    
     is executed, to obtain 
     
         W.sub.3 =E.sub.3 sin (W.sub.2 +R)=E.sub.3 sin (E.sub.2 sin ω.sub.2 t+E.sub.1 sin (E.sub.0 sin ω.sub.0 t)) 
    
     When providing (E 3  +E 2  sin ω 2  t) sin (E 1  sin (E 0  sin ω 0  t)), MD01=&#34;05&#34; and MD23=&#34;02&#34;. Thus, OC0=&#34;00&#34;, OC1 =&#34;A0&#34;, OC2=&#34;80&#34;, OC3=&#34;98&#34; and OC4=&#34;00&#34; are generated in the routine (steps T1, T2, T4, T6, T33 and T36). This example is the same as the preceding examples up to OC2. With OC3 
     
         X.sub.3 ←R(=E.sub.1 sin (E.sub.0 sin ω.sub.0 t)). 
    
     Then, 
     
         R&#39;←W.sub.2 (=E.sub.2 sin ω.sub.2 t) 
    
     and then 
     
         W.sub.3 ←(E.sub.3 +R&#39;) sin X.sub.3 
    
     are executed. With OC4 
     
         Σ←Σ+W.sub.3 
    
     is executed. Here we have 
     
         W.sub.3 =(E.sub.3 +E.sub.2 sin ω.sub.2 t) sin (E.sub.1 sin (E.sub.0 sin ω.sub.0 t)). 
    
     In any of the first three examples, the line L 0   performs addition, and in the latter two examples the line L 0  uses the module 0 output as the phase to the module 1. When the line L0 is in the ring modulation mode, MD01=&#34;06&#34;, and OC0=&#34;00&#34;, OC1=&#34;88&#34; and OC2=&#34;80&#34; (step T4). With OC0 
     
         X.sub.0 ←ω.sub.0 t 
    
     is executive, and with OC1 
     
         X.sub.1 ←ω.sub.1 t, 
    
     
         R←W.sub.0 (E.sub.0 sin X.sub.0 =E.sub.0 sin ω.sub.0 t) and 
    
     
         W.sub.1 ←(E.sub.1 +R) sin X.sub.1 
    
     are executed. Thus, we have 
     
         W.sub.1 =(E.sub.1 +E.sub.0 sin ω.sub.0 t) sin ω.sub.1 t. 
    
     This is then stored in R with OC2. Thereafter, the line L 1  is designated in the same way as in the above examples. Thus, R i, e., contents of the temporary register 15-3 are used in one of the following: 
     
         E.sub.3 sin R+E.sub.2 sin ω.sub.2 t, 
    
     
         E.sub.3 sin (R+E.sub.2 sin ω.sub.2 t) or 
    
     
         (E.sub.3 +E.sub.2 sin ω.sub.2 t) sin R. 
    
     For example, when synthesizing E 7  sin (E 5  sin (E 3  sin (E 1  sin ω 1  +E 0  sin ω 0  t)+E 2  sin ω 2  t)+E 4  sin ω 4  t)+E 6  sin ω 6  t, MD01=&#34;04&#34;, MD23=&#34;04&#34;, MD45=&#34;04&#34; and MD67=&#34;00&#34;. In the routine, OC0=&#34;00&#34;, OC1=&#34;80&#34;, OC2=&#34;40&#34;, OC3=&#34;90&#34;, OC4=&#34;40&#34;, OC5=&#34;90&#34;, OC6=&#34;40&#34; and OC7=&#34;10&#34; are generated as the operation codes (step T1, T2, T3, T6, T7, T8, T11, T12, T13, T16 and T17). Using suffix as module numbers of waveform generator 15M, respective functions of OC0 to 
     
         OC0: Σ←W.sub.7 +Σ, X.sub.0 ←ω.sub.0 t 
    
     
         OC1: R.sub.1 ←W.sub.0, X.sub.1 ←ω.sub.1 t 
    
     
         OC2: R.sub.2 ←W.sub.1 +R.sub.1, X.sub.2 ←ω.sub.2 t 
    
     
         OC3: R.sub.3 ←W.sub.2, X.sub.3 ←R.sub.2 
    
     
         OC4: R.sub.4 ←W.sub.3 +R.sub.3, X.sub.4 ←ω.sub.4 t 
    
     
         OC5: R.sub.5 ←W.sub.4, X.sub.5 ←R.sub.4 
    
     
         OC6: R.sub.6 ←W.sub.5 +R.sub.5, X.sub.6 ←ω.sub.6 t 
    
     
         OC7: Σ←W.sub.6, X.sub.7 ←R.sub.6 
    
     The final contents Σ of the accumulator 15-4 are Σ=W 7  +W 6  =E 7  sin X 7  +E 6  sin X 6  =E 7  sin R 6  +E 6  sin ω 6  t. Here, 
     
         R.sub.6 =W.sub.5 +R.sub.5 =E.sub.5 sin X.sub.5 +W.sub.4 =E.sub.5 sin R.sub.4 +E.sub.4 sin ω.sub.4 t, 
    
     where 
     
         R.sub.4 =W.sub.3 +R.sub.3 =E.sub.3 sin X.sub.3 +W.sub.2 =E.sub.3 sin R.sub.2 +E.sub.2 sin ω.sub.2 t, 
    
     where 
     
         R.sub.2 =W.sub.1 +R.sub.1 =E.sub.1 sin X.sub.1 +W.sub.0 =E.sub.1 sin ω.sub.1 t +E.sub.0 sin X.sub.0 =E.sub.1 sin ω.sub.1 t+E.sub.0 sin ω.sub.0 t. 
    
     Therefore, the final output is 
     
         E.sub.7 sin (E.sub.5 sin (E.sub.3 sin (E.sub.1 sin ω.sub.1 t+E.sub.0 sin ω.sub.0 t) +E.sub.2 sin ω.sub.2 t)+E.sub.4 sin ω.sub.4 t)+E.sub.6 sin ω.sub.6 t. 
    
     As has been shown, in the second design either the addition, phase or ring modulation mode can be selected for each module pair or line. It is also possible to make a selection as to whether the result of each line is used as the phase or partial phase input to the latter module of the next line or provided as a tone. The waveform generator 15 operates a total of eight TDM modules, so that 3 4  *2 3  =648 different tone synthesis combinations are possible. 
     While preferred embodiments of the invention have been described, various changes and modifications are obvious to a person having an ordinary skill in the art without departing from the scope of invention. For example, the display unit may provide a graphic representation of the connection structure of a plurality of modules. Thus, the scope of the invention should be defined solely by the appended claims.