Abstract:
An electronic device integrated in a chip of semiconductor material, and including a control unit, a signal-conversion unit, and a non-volatile memory unit, which are connected together via a main transmission line. The signal-conversion unit is designed to receive at an input an analog signal correlated to a voice signal, and to generate at an output a stream of appropriately compressed digital signals. The stream of compressed digital signals is stored in pre-set memory locations of the non-volatile memory unit according to the control signals generated by the control unit. During reproduction, the compressed digital signals stored in the non-volatile memory unit are supplied to the signal-conversion unit, which decompresses them and sends them to a speaker.

Description:
TECHNICAL FIELD  
         [0001]    The present invention refers to an electronic device for the recording/reproduction of voice data. The electronic device according to the invention further enables editing of recorded voice messages.  
         BACKGROUND OF THE INVENTION  
         [0002]    As is known, electronic devices of a discrete type available on the market for the recording/reproduction of voice data coming from a user. In detail, these known devices convert the voice data into analog signals, which, in turn, are converted into a plurality of digital signals. The plurality of digital signals is then stored in a memory, for example of the DRAM type, from which it is subsequently fetched to be re-converted into the analog signal, which is sent to a loudspeaker for reproduction of the original voice message.  
           [0003]    Also known are electronic devices of the integrated type for the recording/reproduction of voice data, which process directly the analog signal correlated to the voice message of the user, without converting it into the digital form. In particular, the analog signal is sampled at a pre-set sampling frequency, and the plurality of analog samples thus obtained is sequentially stored in an analog non-volatile memory. The plurality of analog samples is then sent to a loudspeaker for reproduction of the original voice message.  
           [0004]    Both these known devices present, however, the drawback that they require an increasingly higher circuit complexity, and consequently involve increasingly higher costs, as the storage capacity required for data storage increases. What has been said is particularly true in the case of discrete-type devices, in which an increasingly higher circuit complexity results in an increase in costs which is even higher than in an integrated system. In addition, known devices of a discrete type which use DRAM memories have rather high consumption levels, in that they must remain turned on all the time to prevent complete loss of the data stored in the DRAM memory itself.  
         SUMMARY OF THE INVENTION  
         [0005]    An embodiment of the present invention provides an electronic device for the recording/reproduction of voice data that overcomes the limitations and drawbacks described above with reference to the known art.  
           [0006]    The electronic device of the invention is integrated in a chip of semiconductor material and includes a control unit, a signal-conversion unit, and a non-volatile memory unit, which are connected together via a main transmission line. The signal-conversion unit is designed to receive at an input an analog signal correlated to a voice signal, and to generate at an output a stream of appropriately compressed digital signals. The stream of compressed digital signals is stored in pre-set memory locations of the non-volatile memory unit according to the control signals generated by the control unit. During reproduction, the compressed digital signals stored in the non-volatile memory unit are supplied to the signal-conversion unit, which decompresses them and sends them to a speaker. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0007]    The characteristics and advantages of the electronic device according to the invention will emerge clearly from the ensuing description of an example of embodiment, which is given simply to provide a non-limiting illustration, with reference to the attached drawings, in which:  
         [0008]    [0008]FIG. 1 is a block diagram of the electronic device for the recording/reproduction of voice data according to the invention; and  
         [0009]    [0009]FIGS. 2 and 3 present flow charts regarding operation of the device of FIG. 1.  
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0010]    The electronic device  1  has the function of recording and reproducing voice data, and is also able to erase and edit voice data. The electronic device  1 , shown in FIG. 1, is integrated in a chip  50  of semiconductor material and comprises a control unit  3 , implemented, for example, by means of a microprocessor or microcontroller, a signal-conversion unit  4 , and a non-volatile memory unit  5 . The units  3 ,  4  and  5  are connected together via a central bus  6 , through which data and instructions are exchanged between the various units in the form of digital signals. The central bus  6  can also include a bus arbiter  6   a  which co-ordinates access of the units  3 ,  4 ,  5  to the central bus  6  so as to prevent any conflict between the said units. This structure of the electronic device  1  means that the implementation of each unit is independent of the others.  
         [0011]    In greater detail, the control unit  3  includes a central processing unit (CPU)  7  which has logic, arithmetical and control functions; a read-only memory (ROM)  8 , which is available upon turning-on of the electronic device  1  and in which data and instructions used by the CPU  7  for managing operation of the electronic device  1  are permanently stored; and a random-access memory (RAM)  9  for temporary reading and writing of data and instructions. In detail, the RAM memory  9  is divided into two memory banks  10 ,  11 , each of which is in turn subdivided into a plurality of memory modules  12  that may be accessed individually. In particular, the memory modules  12  having lower addresses are designed for data storage, whilst the memory modules having higher addresses can be used for storage of programs for fetching instructions from the CPU  7 , or can remain available for data storage.  
         [0012]    The control unit  3  further comprises a first interface circuit  13 , which co-ordinates exchange of data and instructions between the control unit  3  and the central bus  6 , and is, for instance, implemented by means of a 16-bit direct-memory-access (DMA) circuit. The first interface circuit  13  is connected to the central bus  6  via a first local bus  14 . The control unit  3  may also include a second interface circuit  15 , of the serial type, which co-ordinates exchange of information and software between the control unit  3  itself and external devices or computers  45  for carrying out user applications.  
         [0013]    The control unit  3  may moreover be connected to an alphanumeric display unit  40  and to a keyboard  41 . By means of the latter, the user can supply to the electronic device  1  appropriate user commands via interrupt signals for selecting the desired function among those implemented by the device (recording, reproduction, erasure, editing).  
         [0014]    Again with reference to FIG. 1, the signal-conversion unit  4  comprises a third interface circuit  18  which co-ordinates exchange of data and instructions between the unit  4  itself and the central data bus  6 , to which the third interface circuit  18  is connected via a second local data bus  19 . The signal-conversion unit  4  further comprises a converter circuit  20 , which implements a data compression/decompression algorithm with adaptive differential pulse-code modulation (ADPCM), known in the literature, and first and second RAM buffers  21 ,  22 , which are connected to the central bus  6  via a third local bus  24 . The signal-conversion unit  4  uses the first and second RAM buffers  21 ,  22  alternately for data storage, so as to reduce the time of use of the central bus  6  and the data transfer time, as will be explained in greater detail in what follows. The converter circuit  20 , which is obtained, for example, by means of a wired digital circuit which implements an algorithm for digital compression of the voice signal or by means of a digital signal processor (DSP), has an input connected to a microphone  42  and an output connected to a loudspeaker  43 . The input is connected to the microphone  42  via an analog-to-digital converter and appropriate filters, whilst the output is connected to the loudspeaker  43  via a digital-to-analog converter and appropriate filters. The converters and filters are not shown in FIG. 1 because they are of a known type.  
         [0015]    In addition, the non-volatile memory  5  comprises a memory device  25  made, for example, by means of a flash EEPROM digital memory of the multilevel type, embedded in the chip  50 . The memory device  25  is connected to a fourth interface circuit  26 , which co-ordinates exchange of data and instructions between the non-volatile memory unit  5  and the central bus  6 , to which the fourth interface circuit  26  is connected via a fourth local data bus  27 . This interface circuit  26  moreover provides synchronization between the speed of the memory device  25  and the speed of the central bus  26 ; in addition, it adapts the format of blocks or packets of data exchanged between the converter circuit  20  and the memory device  25  and implements a strategy of recovery of commands lost or failed.  
         [0016]    As shown in FIG. 1, the memory device  25  is schematically divided into two memory areas  28 ,  29 . The first memory area  28  is made up of a plurality of memory locations  28   a  which are logically organized as a sequence of blocks having a pre-set dimension, for storage of the data coming from the signal-conversion unit  4 , whilst the second memory area  29  comprises a first sub-area  30  and a second sub-area  31 . In particular, in the first sub-area  30  is stored a list of addresses of the memory locations  28   a  that are free in the first memory area  28 , whilst in the second sub-area  31  is stored a pointer list for storing the sequence in which the memory locations  28   a  of the first memory area  28  are to be read during reproduction.  
         [0017]    The local buses  14 ,  19 ,  24  and  27  are hierarchically organized. In particular, the first local bus  14  and the third local bus  24  have a privileged access to the central bus  6  in that they guarantee connection with the CPU  7  and the converter circuit  20 .  
         [0018]    The operation of the electronic device  1  will now be described with reference to FIGS. 2 and 3.  
         [0019]    Initially (FIG. 2), the microphone  42  converts the voice messages coming from a user into analog signals and supplies the latter at input to the signal-conversion unit  4  (block  100 ). The converter circuit  20  compresses the analog signal received to a pre-set compression value via the ADPCM algorithm and generates a stream of digital signals (block  105 ). Alternatively, the converter circuit  20  may also implement different compression and decompression algorithms, for example CELP, MELP or LPC- 10 , which are also known in the literature. The compressed stream of digital signals is then divided into successive blocks or packets, of a fixed dimension, for example 1 kB (block  110 ). In particular, each block of digital signals corresponds to a portion of the original voice message having a duration of 1.024 seconds if the compression level used is 8 kbps, and a duration of 205 milliseconds if the compression level used is 40 kbps. This block organization of the original voice message makes it possible to erase or re-write portions of the message simply by eliminating or erasing and re-writing the associated blocks.  
         [0020]    Next, each block of digital signals is stored in the two RAM buffers  21 ,  22 . In detail, initially the blocks of digital signals are transferred to a first one the two RAM buffers  21 ,  22 , for example to the first RAM buffer  21  (block  115 ). If data transfer is not completed (output NO from block  120 ), when the first RAM buffer  21  is full (output NO from block  125 ) the control unit  3  issues a command for the signal-conversion unit  4  to switch between the first RAM buffer  21  and the second RAM buffer  22 , so as to transfer data to the second RAM buffer  22 , and at the same time a command to send, to the memory device  25 , the blocks stored in the first RAM buffer  21 , which is thus unloaded (block  130 ). If data transfer is not completed (output NO from block  135 ), when the second RAM buffer  22  is full (output NO from block  140 ) the control unit  3  issues a command for the signal-conversion unit  4  to switch between the second RAM buffer  22  and the first RAM buffer  21 , and to send the blocks stored in the second RAM buffer  22  to the memory device  25  (block  145 ). The cycle then proceeds in the way described above, returning to block  125  until the transfer of the blocks to the first RAM buffer  21  or to the second RAM buffer  22  terminates (output YES from block  120  or block  135 ), in which case the RAM buffer  21  or  22  used at that moment sends the remaining data to the memory device  25  (block  150  or block  155 ).  
         [0021]    Storage of the blocks inside the memory device  25  is managed by the control unit  3  according to the list which is stored in the first sub-area  30  and contains the addresses of the free memory locations  28   a ; in particular, storage may also be non-sequential.  
         [0022]    According to the table stored in the second sub-area  31 , the control unit  3  may also issue a command for fetching the desired blocks present inside the memory device  25 , as is shown in FIG. 3. In particular, initially the desired blocks are read by the memory device  25  (block  180 ) and are sent to the two RAM buffers  21 ,  22 , and then to the converter circuit  20  in a way similar to the one that has just been described. Next, the blocks received by the converter circuit  20  are re-united (block  200 ), decompressed (block  205 ), and sent to the loudspeaker  43  (block  210 ), which, at output from the electronic device  1 , reproduces the original voice message (block  215 ).  
         [0023]    The advantages that may be obtained with the electronic device  1  that has been described are illustrated in what follows. In the first place, the electronic device  1  has a greater storage capacity, given the same circuit complexity, and hence the same costs, as compared to the known devices previously described, thanks to integration, on one and the same chip  50 , of the converter circuit  20 , which carries out digital compression, and of the memory device  25 , which is of the non-volatile and multilevel type.  
         [0024]    In addition, the use of a non-volatile memory considerably reduces the consumption of the electronic device  1  as compared to the known device of the discrete type, in so far as it can be turned off without there being any loss of the data stored in the memory.  
         [0025]    Furthermore, the electronic device  1  is of a rather small size, and consequently can be used also in portable applications, such as watches, electronic notebooks, electronic pens, and the like.  
         [0026]    In addition, block storage of the voice message inside a non-volatile memory enables use of the electronic device  1 , even when the memory degrades and presents a reduced capacity. In this case, in fact, it is sufficient to mark as unusable the blocks corresponding to the faulty memory area, i.e., it is sufficient to reduce the total recording time of the electronic device  1 .  
         [0027]    Storage of the voice message in chained blocks, moreover, enables the electronic device  1  to edit the voice messages themselves.  
         [0028]    Finally, it is clear that numerous variations and modifications may be made to the electronic device described and illustrated herein, all falling within the inventive idea, as defined in the attached claims.  
         [0029]    In particular, although the invention has been described with particular reference to the case in which the memory device  25  is implemented by means of a multilevel flash EEPROM, it is equally applicable to other types of non-volatile memories, such as multilevel EPROMs or EEPROMs. In addition, the converter circuit  20  can be made employing any suitable technology.