Abstract:
An active pixel using a photodiode with multiple species of N type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N −  region formed within a P-type region. The N −  region is formed from an implant of arsenic and an implant of phosphorus. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.

Description:
REFERENCE TO PRIOR APPLICATION 
       [0001]    This application is a continuation of and claims priority to co-pending U.S. application Ser. No. 10/966,263, filed Oct. 15, 2004, entitled “Image Sensor Pixel Having Photodiode with Multi-Dopant Implantation.” 
     
    
     TECHNICAL FIELD 
       [0002]    The present invention relates to image sensors, and more particularly, to an image sensor that uses pixels having a photodiode formed from multiple dopants to form either the N type region (for a pnp photodiode) or the P type region (for an npn photodiode). 
       BACKGROUND INFORMATION 
       [0003]    Image sensors have become ubiquitous. They are widely used in digital still cameras, cellular phones, security cameras, medical, automobile, and other applications. The technology used to manufacture image sensors, and in particular CMOS image sensors, has continued to advance at great pace. For example, the demands of higher resolution and lower power consumption have encouraged the further miniaturization and integration of the image sensor. 
         [0004]    As the pixels become smaller, the surface area that can receive incident light is also reduced. The pixel typically has a light-sensing element, such as a photodiode, which receives incident light and produces a signal in relation to the amount of incident light. Thus, as the pixel area (and thus the photodiode area) decreases, the well capacity of the photodiode also becomes smaller. 
         [0005]    One prior art structure of a photodiode that has enhanced well capacity comprises a shallow N −  layer in a P-type region or substrate. A P +  pinning layer is then formed over the shallow N −  layer. This structure is known as a pinned photodiode and has relatively high well capacity, but sometimes at the expense of “dark current” performance and excess “hot pixel” defects. Moreover, by substituting a deeper N −  layer for the shallow N −  layer, a lower hot pixel defect density can be achieved, but this will also result in a lower well capacity that in turn limits signal to noise ratio performance. 
         [0006]    The present invention is directed towards a photodiode and pixel design that has high well capacity and with limited dark noise and hot pixel defect density. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0007]      FIG. 1  is a combination cross-sectional and schematic diagram of a prior art four transistor (4T) pixel which shows in detail a photodiode formed in a substrate. 
           [0008]      FIG. 2  is a combination cross-sectional and schematic diagram of a photodiode and pixel formed in accordance with the present invention. 
           [0009]      FIG. 3  is a combination cross-sectional and schematic diagram of the photodiode of  FIG. 2  showing the impurity profile of the N −  layer. 
           [0010]      FIG. 4  is a flow diagram showing a method of making a photodiode in accordance with the present invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0011]    In the following description, numerous specific details are provided in order to give a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that the invention may be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well known structures, materials, or operations are not shown or described in order to avoid obscuring aspects of the invention. 
         [0012]    Referenced throughout the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment and included in at least one embodiment of the present invention. Thus, the appearances of the phrase “in one embodiment” or “in an embodiment” in various places throughout the specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. 
         [0013]      FIG. 1  shows a combination cross-sectional and schematic view of a prior art active pixel that uses four transistors. This is known in the art as a 4T active pixel. However, it can be appreciated that the photodiode design of the present invention can be used with any type of pixel design, including but not limited to 3T, 4T, 5T, 6T, and other designs. Further, the photodiode design of the present invention may also be used in connection with charge coupled device (CCD) imagers. 
         [0014]    A photodiode  101 , outputs a signal that is used to modulate an amplification transistor  103 . The amplification transistor  103  is also referred to as a source follower transistor. In this embodiment, the photodiode  101  can be either a pinned photodiode or a partially pinned photodiode. A transfer transistor  105  is used to transfer the signal output by the photodiode  101  to a floating node  107  (N+ doped), which is adjacent to the gate of the amplification transistor  105 . The transfer transistor  105  is controlled by a transfer gate. 
         [0015]    In operation, during an integration period (also referred to as an exposure or accumulation period), the photodiode  101  generates charge (in response to incident light) that is held in the N −  layer  115 . After the integration period, the transfer transistor  105  is turned on to transfer the charge held in the N −  layer  115  of the photodiode  101  to the floating node  107 . After the signal has been transferred to the floating node  107 , the transfer transistor  105  is turned off again for the start of a subsequent integration period. 
         [0016]    The signal on the floating node  107  is then used to modulate the amplification transistor  103 . Finally, an address transistor  109  is used as a means to address the pixel and to selectively read out the signal onto a column bitline  111 . After readout through the column bitline  111 , a reset transistor  113  resets the floating node  107  to a reference voltage. In one embodiment, the reference voltage is V dd . 
         [0017]    As noted above, electrons are accumulated in the N −  layer  115  during the integration period. After the integration period, the electrons (signal) are transferred from the N −  layer  115  into the floating node  107  by applying a high voltage pulse to the transfer gate of the transfer transistor  105 . 
         [0018]    In the prior art, the N −  layer  115  is typically formed from a single species of “N type dopant”, such as arsenic or phosphorus. Arsenic, because of its lower diffusivity during ion implantation, tends to form a shallower, yet higher concentration doping profile. In contrast, phosphorus, because of its relatively higher diffusivity during ion implantation, tends to form a deeper, yet lower concentration doping profile. 
         [0019]    In accordance with the present invention, at least two (or more) types of dopants, such as arsenic and phosphorus, are used as dopants to form the N −  layer  115 . Thus, turning to  FIG. 2 , a first implantation of arsenic is performed to form arsenic implant region  203 . Then, a second implantation of phosphorus is performed to from phosphorus implant region  205 . Note that in this embodiment, the phosphorus implant region  205  substantially surrounds the arsenic implant region  203 . 
         [0020]    The embodiment described herein uses arsenic and phosphorus as one example of a pair of dopants because they are so commonly used in the current semiconductor manufacturing processes. However, it can be appreciated that different combinations of N type dopants may be used. The combination of dopants should have different relative diffusivities. For example, the combination of antimony (Sb) and phosphorus would be suitable. Still, nearly any combination of N type dopants (nitrogen, phosphorus, arsenic, antimony, or bismuth) would provide a benefit. 
         [0021]    Turning to  FIG. 3 , the arsenic implant region  203  is relatively shallow and has relatively low diffusivity. Thus, the dopant profile  303  of the arsenic implant region  203  is “high and narrow”. In contrast, the phosphorus implant region  205  is relatively deep and has relatively high diffusivity. Thus, the dopant profile  301  of the phosphorus implant region  205  is “low and wide”. In one embodiment, the arsenic implant is in the range 50 keV-250 keV, and more preferably 100 keV-180 keV. The corresponding phosphorus implant is 25 keV-125 keV, and more preferably 50 keV-90 keV. However, other implantation energies may be equally suitable. 
         [0022]    In this embodiment, the peaks of the dopant profiles  301  and  303  coincide, but it can be appreciated that the peaks need not be aligned. The arsenic implant region  203  tends to supply a high well capacity, while the phosphorus implant region  205  tends to grade to junction to provide low dark current and low hot pixel defect density. 
         [0023]    Turning to  FIG. 4 , a flow diagram illustrating a method of forming a photodiode in accordance with the present invention is shown. First, at box  401 , the arsenic is implanted into the P type substrate where the photodiode is to be formed. Then, at box  403 , phosphorus is implanted into the same region of the P type substrate. 
         [0024]    It should be noted that the above description and Figures illustrate the present invention as applied to a pinned photodiode. However, the advantages of the present invention may also be applied to non-pinned photodiodes. 
         [0025]    Furthermore, the above description and Figures illustrate the present invention as applied to a pnp pinned photodiode or simply a photodiode formed from an N type implant in a P type substrate. The advantages of the present invention may also be applied to an npn pinned photodiode or simply a photodiode formed from a P type implant in an N type substrate. In such an embodiment, the P type dopants is a combination of a dopant with a relatively high diffusivity, such as boron (B), and a dopant with a relatively low diffusivity, such as indium (In). 
         [0026]    It can be appreciated that different combinations of P type dopants may be used. It is important to choose the combinations of dopants such that they have different relative diffusivities. Nearly any combination of P type dopants (boron, aluminum, gallium, indium, and thallium) would provide a benefit. 
         [0027]    From the foregoing, it will be appreciated that specific embodiments of the invention have been described herein for purposes of illustration, but that various modifications may be made without deviating from the spirit and scope of the invention. Accordingly, the invention is not limited except as by the appended claims.