Abstract:
A fast transient response power converter is disclosed which makes use of a variable inductor to speed up the converter&#39;s output voltage response under fast transient conditions. The inductive element in a switching converter is replaced by two series or parallel inductive elements of which one has a smaller inductance value and the other has a larger inductance value. During the fast transient condition, the total inductance is greatly reduced to allow rapid current change during the transient condition.

Description:
FIELD OF THE INVENTION 
     The present invention relates to the field of switch mode power converters. 
     BACKGROUND OF THE INVENTION 
     Switching converter topologies are widely used as the major building block in high efficiency and lightweight power supplies such as those used in computer applications. A major shortcoming of switching converters, however, is its transient output response to a fast load change. Because most switching power converters include an output inductor, a switching power converter&#39;s transient response is inherently limited. For example, a typical buck converter comprises a power stage having a plurality of switches and an inductor-capacitor filter, and a feedback circuit. The feedback circuit monitors the converter output voltage and exerts pulse width modulation control over the switches. When there is a fast dynamic load change, the converter&#39;s ability to respond is limited by the feedback circuit and the power stage. The feedback circuits can be designed to respond quicker through traditional linear or non-linear approaches. The inherent response of the converter, however, is limited by the power stage and, in particular, the output inductor. 
     Some have attempted to improve upon the power converter&#39;s dynamic response by using an inductor with a small inductance value. This technique does improve the power converter&#39;s dynamic response because current flow can change much more quickly when a small indicator is used. This technique, however, is disadvantaged in that the use of a small inductor results in a ripple current during normal operation. High ripple current introduces high root mean square current in the converter switches and passive components and, as a result, increases the power loss. 
     Others have attempted to reduce power losses by using parallel switches to share the current, but this method increases the cost and complexity of the converters. Still others have attempted to improve upon the converter&#39;s transient response by increasing the converter&#39;s switching frequency. This technique is disadvantaged in that it induces excessive switching losses in the switches and excessive magnetic losses in the inductor core. Moreover, high frequency operation requires the use of high performance drive circuit which can further escalate the converter&#39;s cost. 
     Therefore, there remains a need for a method of providing a switching power converter with a fast transient response while minimizing the converter&#39;s power loss. 
     SUMMARY OF THE INVENTION 
     To improve upon the foregoing technology as disclosed in the current state-of-the-art, the present invention discloses an apparatus and method for improving the transient response of switching power converters. The present invention dramatically increases the rate of change of current through the converter&#39;s output inductor by causing the output inductor to enter a lower inductance state during transients while maintaining low current ripple at normal load by keeping the output inductor at a higher inductance state during steady state conditions. 
     The present invention provides many advantages over the presently known power conversion topologies. Not all of these advantages are simultaneously required to practice the invention as claimed, and the following list is merely illustrative of the types of benefits that may be provided, alone or in combination, by the present invention. These advantages include: (1) fast dynamic response; (2) low output inductor ripple current; (3) increased power efficiency; (4) lack of a need to operate at a high switching frequency; (5) adjustability to the load demands; (6) non-complex control method; and (7) applicability to most power converter topologies. 
     In accordance with the present invention, a power conversion topology is provided that includes input means for receiving input power, an output for providing regulated output power, and a variable inductance device coupled between the input means and the output. The variable inductance device has both a higher inductance state and a lower inductance state. The variable inductance device is controllable to switch between the higher inductance state and the lower inductance state. In one embodiment, the power converter further includes a control circuit that is operable to signal the variable inductance device to switch from one of the inductance states to the other inductance state. 
     In accordance with the present invention, the variable inductance device, in one embodiment, comprises a fixed component and a variable component in series with the fixed component. The variable inductance component optionally comprises a transformer having a plurality of windings magnetically coupled to each other wherein a first winding is coupled in series with the fixed inductance component. A second and third winding are each optionally coupled in series with a power source and a switch wherein the application of the power source to one of the second or third windings through the use of the switches has the effect of reducing the effective inductance of the variable inductance component. 
     In another embodiment, the variable inductance device comprises a lower inductance element, a switch coupled in series with the lower inductance element thereby forming a switch and lower inductance element series combination, and a higher inductance element coupled in parallel with the switch and lower inductance element series combination. The switch is operable to switch the variable inductance device between the lower inductance state and the higher inductance state by coupling or decoupling the lower inductance element in parallel to the higher inductance element. 
    
    
     BRIEF DESCRIPTION OF DRAWINGS 
     The present invention will become more apparent from the following description when read in conjunction with the accompanying drawings wherein: 
     FIG. 1 is a simplified equivalent circuit of a prior art Buck power converter; 
     FIGS. 2A-2D is a waveform diagram for the Buck converter circuit shown in FIG. 1 during a load transient; 
     FIG. 3 is a schematic diagram of a first embodiment of the present invention implemented in a Buck converter topology; 
     FIGS. 4A-4H is a waveform diagram showing the response of the first embodiment of the present invention when there is a fast transient increase in load current; 
     FIGS. 5A-5H is a waveform diagram showing the response of the first embodiment of the present invention when there is a fast transient decrease in load current; 
     FIG. 6 is a schematic diagram of a second embodiment of the present invention implemented in a Buck converter topology; 
     FIG. 7 is a schematic diagram of a third embodiment of the present invention implemented in a Buck converter topology; 
     FIG. 8 is a schematic diagram of a fourth embodiment of the present invention implemented in a Buck converter topology; 
     FIG. 9 is a schematic diagram of a fifth embodiment of the present invention implemented in a Buck converter topology; 
     FIGS. 10A-10H is a waveform diagram showing the response of the fifth embodiment of the present invention when there is a fast transient increase in load current; and 
     FIGS. 11A-11H is a waveform diagram showing the response of the fifth embodiment of the present invention when there is a fast transient decrease in load current; 
    
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     The discussion that follows describes embodiments of the present invention when incorporated into a buck power converter topology. It will be obvious to those skilled in the art that the present invention can also be applied to other power converter topologies such as a boost converter, a flyback converter, a forward converter, a push-pull converter, a resonant converter, a full bridge converter, a Cuk converter, a Sepic converter, a half bridge converter and other converter topologies. Referring now to the figures, FIG. 1 sets forth a prior art buck converter having two switches M 1  and M 2 , an output inductor L 1 , and an output capacitor C 1 . FIG. 2 illustrates the operation of a typical buck converter when there is a step increase in the load current, assuming that the feedback circuit  4  and the Pulse Width Modulation controller  6 , as shown in FIG. 1, are fast enough to change the duty cycles of the converter switches M 1  and M 2  to enable the inductor current in inductor L 1  to rise to a new average. The rate of inductor current increase is limited by the inductance of the output inductor L 1 . An inductor L 1  with low inductance allows for a fast rate of inductor current change in the converter. But, the converter will suffer from having a high ripple inductor current. An inductor L 1  with high inductance will reduce the ripple current in the converter but the inductor current will transition more slowly. The present invention provides a novel way of providing a fast inductor current rate change while at the same time providing a way of reducing the ripple current. 
     FIRST EMBODIMENT 
     FIG. 3 sets forth a schematic diagram of a first embodiment of the present invention incorporated into a power converter. This embodiment comprises a power circuit  110  and a control circuit  120 . The power circuit  110  includes a pair of input terminals  101  and  102 , which are connectable to a DC voltage source to receive input power, and an output capacitor C 101  for providing regulated DC output power to a load  107  coupled to the output capacitor C 101 . The power circuit  110  further includes a pair of switches M 101  &amp; M 102 , which in this embodiment arc represented by MOSFETs but alternatively could be any of a number of suitable devices such as BJTs, electromechanical, IGBTs, and semiconductor switches. The switches M 101  &amp; M 102  are controllable by the control circuit  120  to produce a series of alternating voltage pulses. 
     Coupled between the switches M 101  &amp; M 102  and the output capacitor C 101  is a magnetic circuit  130 . The magnetic circuit  130  comprises a comparatively lower inductance fixed inductor L 101  and a comparatively higher inductance variable inductance device  140 . The variable inductance device  140  operates at a steady inductance level during normal operation of power circuit  110  to provide sufficient inductance to allow power circuit  110  to operate with low ripple voltage. When there is a fast transient current in power circuit  110 , variable inductance device  140  is operable to function at a reduced inductance level, preferably close to zero inductance, thereby improving the transient response of the power circuit  110 . 
     The variable inductance device  140  shown in this first embodiment of the invention consists of a transformer T 101  having three windings W 101 , W 102  and W 103 . Winding W 101  is coupled in series with fixed inductor L 101  and is coupled between the input terminals  101  and  102  and the output capacitor C 101 . Windings W 102  and W 103  are magnetically coupled to winding W 101  and are each coupled to a voltage source Vi 101 . In the embodiment shown, windings W 102  and W 103  are coupled to the same voltage source but, alternatively, could be coupled to different voltage sources. The windings W 102  and W 103  are also coupled to bi-directional switches S 103  and S 104 . Bi-directional switches S 103  and S 104  are operable to control the connection of voltage source Vi 101  to windings W 103  and W 102 , respectively. Bi-directional switching S 103  and S 104  could be any number of suitable devices such as MOSFETs, BJTs, IGBTs, and semiconductor switches. 
     The control circuit  120  comprises two loops, a Pulse Width Modulation (PWM) loop  105  and a variable inductance control loop  115 . The PWM loop  105  includes a feedback block  104  which is coupled to a PWM block  106 . The feedback block  104  is operable to monitor the converter load voltage, and the PWM block  106  is operable to provide driving pulses to the switches M 101  &amp; M 102  in the power circuit  110 . 
     The variable inductance control loop  115  includes circuits that monitor the converter load voltage and produce driving signals for switches S 103  and S 104  in the power circuit  110 . The variable inductance control loop circuits, in the first embodiment, comprise a high pass filter B 101 , which is operable to monitor the converter load voltage, and two hysteresis comparators B 102  and B 103 , which arc coupled to switches S 104  and S 103 , respectively. 
     During steady state operation, the feedback block  104  generates signals to control the PWM controller  106  which, in turn, generates gate pulses to drive MOSFETs M 101  and M 102  to maintain a steady voltage across the load  107 . The steady state operation is the same as that of a conventional converter, except that the output inductor consists of two series inductors L 101  and W 101  instead of one inductor. In the first embodiment, inductor L 101  is a separate physical inductor from winding W 101 , however, alternatively inductor L 101  could be leakage inductance and integrated with transformer T 101  so that there would be no need for a separate physical inductor. Also during steady state operation, the switches S 103  and S 104  are opened. Consequently, the inductance of W 101  is high to keep the ripple current low. 
     When there is a fast transient increase in load current, the converter of FIG. 3 responds to the transient condition as illustrated by the waveforms shown in FIG.  4 . In the period between t10 and t11, the converter operates in steady state. At time t11 there is a step increase in load current as shown in FIG.  4 C. This leads to an output voltage drop as shown in FIG.  4 E. 
     When the output voltage drops below a threshold level V 1 , switch S 104  is switched on by the operation of filter B 101  and comparator B 102  thereby shorting voltage source Vi 101  to winding W 102 . As a result, the inductance of winding W 101  decreases and the equivalent inductance of inductors L 101  &amp; W 101  decreases to the inductance of inductor L 101 . The current through inductor L 101 , consequently is capable of rising rapidly as shown in FIG. 4D due to the decreased inductance. In the time period between t12 and t13 current flows through winding W 102  as well. This current consists of the reflected current from winding W 101  and magnetizing current resulting from voltage source Vi 101  being applied to winding W 102 . The magnitude of the current flowing through winding W 102  is dependent on the turns ratio of windings W 101  and W 102 . As a result of the increase in the current through inductor L 101  and the magnetizing current flowing through transformer T 101 , the output voltage increases. When the output voltage reaches a second voltage level V 2  at time t13, switch S 104  is turned off. 
     At time t13, switch S 104  is off and the current through winding W 102  falls to zero during the time period t13 to t14. When switch S 104  is off, the magnetizing current of transformer T 101  will be coupled to winding W 101 . At time t13, the current flowing through inductor L 101  and the magnetizing current flowing through winding W 101  may not necessarily be the same. The difference in current will charge up the stray capacitance of switch S 104  and create a voltage spike in winding W 101  during the time period between t13 and t14 as shown in FIG.  4 H. An energy absorption circuit such as a snubber circuit could be employed to guard against overvoltage in winding W 101 . Such an energy absorption circuit could alternatively be coupled to inductor L 101 , transformner T 101 , switch S 103  or switch S 104 . 
     After time t14 the equivalent series output inductance of power circuit becomes higher than it was during the transient period because, at time t14, the equivalent series output inductance includes the inductance of inductor L 101  and winding W 101 . The output inductor current cannot change as rapidly as when inductor W 101  is effectively at zero inductance. If the inductor current is sufficient to meet the load demands, the output voltage will rise and the PWM loop  105  will resume its normal pulse width modulation. It is possible, however, that the inductor current at time t14 may not be sufficient to meet the load current demands and, as a result, the output voltage may fall after switch S 104  has switched to an off-state at t14. In this case, the output voltage may decrease below the threshold level V 1  and switch S 104  may be switched to an on state again. If this happens, the cycle is repeated until the inductor current through L 101  is sufficient to meet the load current demands. Eventually, the output voltage will rise to a level so that normal pulse width modulation may resume. 
     When there is a fast transient decrease in load current, the converter responds to the transient condition as shown in FIG.  5 . During the time period between t20 and t21, the converter operates with a steady load current. At time t21, there is a step decrease in the load current as shown in FIG.  5 C. As a result, the output voltage rises as shown in FIG.  5 E. Even if the PWM loop  105  is fast enough to turn off MOSFET M 101  and turn on MOSFET M 102 , the current reduction in inductor L 101  will still be too slow because of the high combined inductance of inductor L 101  and winding W 101 . When the output voltage reaches a threshold level V 3  at time t22, filter B 101  and comparator B 103  triggers switch S 103  to switch to an on-state. As a result, winding W 103  is coupled to the voltage source Vi 101 , the inductance of winding W 101  effectively decreases to zero, and winding W 103  allows for a rapid decrease in output inductor current through W 101 . A magnetizing current is also generated in winding W 103 . 
     The reduction in output inductor current causes the output voltage to decrease until it reaches a threshold voltage level V 4  at time t23. At this time, switch S 103  is switched to an off state and the magnetizing current is transferred to winding W 101 . The magnetizing current may not match the current flow in inductor L 101  thereby causing a voltage spike across winding W 101  in the time period t23 to t24 as shown in FIG.  5 H. An energy absorption circuit such as a snubber circuit can be employed to avoid overvoltage in winding W 101 . An appropriate energy absorption circuit may be coupled, alternatively, to inductor L 101 , transformer T 101 , switch S 103  or switch S 104 . 
     In the time period after time t24, the output voltage gradually reduces to an appropriate level so that the PWM loop  105  resumes normal operation. It is possible, however, that the current through inductor L 101  may not have fallen sufficiently to prevent the output voltage from reaching voltage threshold level V 3  after time t24. In this case, the process will repeat until the inductor current is sufficiently reduced. 
     During steady state operation, the equivalent series inductance of the series inductors is the summation of the inductance. The inductor W 1  is designed to have a high enough inductance to minimize the ripple current thereby minimizing RMS current flowing through the switching elements and other components. The inductor L 101  is designed to have a low enough inductance to provide a fast rate of current charge when the inductor W 101  is shorted out during transient conditions. Transient conditions only exist for a short time and the converter spends most of its operating time in the steady state. Hence the converter will have a high ripple current only for a short duration and efficiency will not be seriously impaired. This invention is versatile and can be applied to most switching converters which use an output inductor. 
     As shown in the description of the first embodiment, the present invention provides a means to keep the output voltage of a converter within limits and is able to provide a fast transient response when faced with sudden load current changes. 
     SECOND EMBODIMENT 
     FIG. 6 sets forth a schematic diagram of a second embodiment of the present invention incorporated into a power converter. This embodiment differs from the first embodiment in that the auxiliary voltage source of the first embodiment is eliminated by the use of the input voltage source as the auxiliary voltage source. This second embodiment comprises a power circuit  210  and a control circuit  220 . 
     The power circuit  210  includes a pair of input terminals  201  and  202 , which are connectable to a DC voltage source to receive input power, and an output capacitor C 201  for providing regulated DC output power to a load  207  coupled to the output capacitor C 201 . The power circuit  210  further includes a pair of switches M 201  &amp; M 202 , which in this embodiment are represented by MOSFETs but, alternatively, could be any of a number of suitable devices such as BJTs, electromechanical switches, IGBTs, and semiconductor switches. The switches M 101  &amp; M 102  are controllable by the control circuit  220  to produce a series of alternating voltage pulses. Coupled between the switches M 201  &amp; M 202  and the output capacitor C 201  is a magnetic circuit  230 . The magnetic circuit  230  comprises a comparatively lower inductance fixed inductor L 201  and a comparatively higher inductance variable inductance device  240 . The variable inductance device  240  operates at a steady inductance level during normal operation of power circuit  210  to provide sufficient inductance to allow power circuit  210  to operate with low ripple voltage. When there is a fast transient current in power circuit  210 , variable inductance device  240  is operable to function at a reduced inductance level, preferably close to zero inductance, thereby improving the transient response of the power circuit  210 . 
     The variable inductance device  240  shown in this second embodiment of the invention consists of a transformer T 201  having three windings W 201 , W 202  and W 203 . Winding W 201  is coupled in series with fixed inductor L 201  and is coupled between the input terminals  201  and  202  and the output capacitor C 201 . Windings W 202  and W 203  are magnetically coupled to winding W 201  and are each coupled to the input voltage terminal  201 . The windings W 202  and W 203  are also coupled to bi-directional switches S 203  and S 204 . Bi-directional switches S 203  and S 204  are operable to control the connection of the input voltage source to windings W 203  and W 202 , respectively. 
     The control circuit  220  comprises two loops, a Pulse Width Modulation (PWM) loop  205  and a variable inductance control loop)  215 . The PWM loop  215  includes a feedback block  204  which is coupled to a PWM block  206 . The feedback block  204  is operable to monitor the converter load voltage, and the PWM block  206  is operable to provide driving pulses to the switches M 201  &amp; M 202  in the power circuit  210 . 
     The variable inductance control loop  215  includes circuits that monitor the converter load voltage and produce driving signals for switches S 203  and S 204  in the power circuit. The variable inductance control loop circuits, in the second embodiment, comprise a high pass filter B 201 , which is operable to monitor the converter load voltage, and two hysteresis comparators B 202  and B 203 , which are coupled to switches S 204  and S 203 , respectively. 
     The operation of the power circuit  210  and the control circuit  220  of the second embodiment is the same as the power circuit  110  and the control circuit  120  of the first embodiment. Appropriate turns ratio of windings in transformer T 201  are used. 
     THIRD EMBODIMENT 
     FIG. 7 sets forth a schematic diagram of a third embodiment of the present invention incorporated into a power converter. This embodiment differs from the first embodiment, primarily, in that the auxiliary voltage source of the first embodiment is eliminated by the use of the output voltage source as the auxiliary voltage source. In addition, two clamping diodes are employed to protect the switches from overvoltage. This third embodiment comprises a power circuit  310  and a control circuit  320 . 
     The power circuit  310  includes a pair of input terminals  301  and  302 , which are coimectable to a DC voltage source to receive input power, and an output capacitor C 301  for providing regulated DC output power to a toad  307  coupled to the output capacitor C 301 . The power circuit  310  further includes a pair of switches M 301  &amp; M 302 , which in this embodiment are represented by MOSFETs. The switches M 301  &amp; M 302  are controllable by the control circuit  320  to produce a series of alternating voltage pulses. 
     Coupled between the switches M 301  &amp; M 302  and the output capacitor C 301  is a magnetic circuit  330 . The magnetic circuit  330  comprises a comparatively lower inductance fixed inductor L 301  and a comparatively higher inductance variable inductance device  340 . The variable inductance device  340  operates at a steady inductance level during normal operation of power circuit  310  to provide sufficient inductance to allow power circuit  310  to operate with low ripple voltage. When there is a fast transient current in power circuit  310 , variable inductance device  340  is operable to function at a reduced inductance level, preferably close to zero inductance, thereby improving, the transient response of the power circuit  310 . 
     The variable inductance device  340  shown in this third embodiment of the invention consists of a transformer T 301  having three windings W 301 , W 302  and W 303 . Winding W 301  is coupled in series with fixed inductor L 301  and is coupled between the input terminals  301  and  302  and the output capacitor C 301 . Windings W 302  and W 303  are magnetically coupled to winding W 301  and are each coupled to the output voltage terminal  303 . The windings W 302  and W 303  are also coupled to bi-directional switches S 303  and S 304 . Bi-directional switches S 303  and S 304  are operable to control the connection of the output voltage source to windings W 303  and W 302 , respectively. Two diodes D 303  and D 304  are coupled to switches S 303  and S 304  respectively which clamp the switch voltagoes to the input voltage level. 
     The control circuit  320  comprises two loops, a Pulse Width Modulation (PWM) loop  305  and a variable inductance control loop  315 . The PWM loop  305  includes a feedback block  304  which is coupled to a PWM block  306 . The feedback block  304  is operable to monitor the converter load voltage, and the PWM block  306  is operable to putde driving pulses to the switches M 301  &amp; M 302  in the power circuit  310 . 
     The variable inductance control loop  315  includes circuits that monitor the converter load voltage and produce driving signals for switches S 303  and S 304  in the power circuit. The variable inductance control loop circuits, in the third embodiment, comprise a high pass filter B 301 , which is operible to monitor the converter load voltage, and two hysteresis comparators B 302  and B 303 , which are coupled to switches S 304  and S 303 , respectively. 
     The operation of the power circuit  310  and the control circuit  320  of the third embodiment is the same as the power circuit  110  and the control circuit  120  of the first embodiment. Appropriate turns ratio of windings in transformer T 301  are used. 
     FOURTH EMBODIMENT 
     FIG. 8 sets forth a schematic diagram of a fourth embodiment of the present invention incorporated into a power converter. This embodiment differs from the second embodiment, primarily, in that AND circuits IC 403  and IC 404  are added to ensure that the switching of switches S 403  and S 404  is coordinated with the switching of switches M 401  and M 402 . Also clamping clamping diodes D 403  and D 404  are added to clamp voltage spikes that may be generated in the winding W 401  as a result of a fast transient. This fourth embodiment also comprises a power circuit  410  and a control circuit  420 . 
     The power circuit  410  includes a pair of input terminals  401  and  402 , which are coimectable to a DC voltage source to receive input power, and an output capacitor C 401  for providing regulated DC output power to a load  407  coupled to the output capacitor C 401 . The power circuit  410  further includes a pair of switches M 401  &amp; M 402 , which in this embodiment are represented by MOSFETs M 401  and M 402 . The switches M 401  &amp; M 402  are controllable by the control circuit  420  to produce a series of alternating voltage pulses. 
     Coupled between the switches M 401  &amp; M 402  and the output capacitor C 401  is a magnetic circuit  430 . The magnetic circuit  430  comprises a comparatively lower inductance fixed inductor L 401  and a comparatively higher inductance variable inductance device  440 . The variable inductance device  440  operates at a steady inductance level during normal operation of power circuit  410  to provide sufficient inductance to allow power circuit  410  to operate with low ripple voltage. When there is a fast transient current in power circuit  410 , variable inductance device  440  is operable to function at a reduced inductance level, preferably close to zero inductance, thereby improving the transient response of the power circuit  410 . 
     The variable inductance device  440  shown in this fourth embodiment of the invention consists of a transformer T 401  having three windings W 401 , W 402  and W 403 . Winding W 401  is coupled in series with fixed inductor L 401  and is coupled between the input terminals  401  and  402  and the output capacitor C 401 . Two clamping diodes D 403  and D 404  are coupled to the node joining inductor L 401  and winding W 401 . Windings W 402  and W 403  are magnetically coupled to winding W 401  and are each coupled to the input voltage terminal  401 . The windings W 402  and W 403  are also coupled to bi-directional switches S 403  and S 404 . Bi-directional switches S 403  and S 404  are operable to control the connection of the output voltage source to windings W 403  and W 402 , respectively. 
     The control circuit  420  comprises two loops, a Pulse Width Modulation (PWM) loop  405  and a variable inductance control loop  415 . The PWM loop  405  includes a feedback block  404  which is coupled to a PWM block  406 . The feedback block  404  is operable to monitor the converter load voltage, and the PWM block  406  is operable to provide driving pulses to the switches M 401  &amp; M 402  in the power circuit  410 . 
     The variable inductance control loop  415  includes circuits that monitor the converter load voltage and produce driving signals for switches S 403  and S 404  in the power circuit. The variable inductance control loop circuits, in the fourth embodiment, comprise a high pass filter B 401 , which is operable to monitor the converter load voltage, and two hysteresis comparators B 402  and B 403 , which are coupled to AND gates IC 403  and IC 404  which, in turn, synchronize the switching of switches S 403  and S 404  with those of the main switches M 402  and M 401 , respectively. 
     The operation of the power circuit  410  and the control circuit  420  of the fourth embodiment is the same as the power circuit  210  and the control circuit  220  of the second embodiment except for the functionality changed due to the addition of the clamping diodes and the additional AND gates. 
     Diodes D 403  and D 404  clamp the voltage at the node joining inductor L 401  and winding W 401  during the transient when either switch S 403  or S 404  transition off. When these switches transition off, often there is a mismatch of current through winding W 401  before and after the turn off transient. This transient may generate voltage spikes which will be clamped by diodes D 403  and D 404  in order to recover the energy involved. 
     The addition of AND gate IC 403  ensures that switch S 403  is switched to an on state only when main switch M 402  is switched to an on state even in the presence of a transient load current change. When there is a transient decrease in load current, winding W 403  reduces the effective inductance of winding W 401  only if switch M 402  is switched to an on state to induce a decrease in current flow through inductor L 401 . This ensures the inductor current can decrease rapidly to meet the load demand. 
     The addition of AND gates IC 404  ensures that switch S 404  is switched to an on state only when main switch M 401  is switched to an on state even in the presence of a transient load current change. When there is a transient increase in load current, winding W 402  reduces the effective inductance of winding W 401  only if switch M 401  is switched to an on state to induce an increase of current flow through inductor L 401 . This ensures the inductor current can increase rapidly to meet the load demand. 
     FIFTH EMBODIMENT 
     FIG. 9 sets forth a fifth embodiment of the present invention incorporated into a power converter. In this embodiment, a different type of variable inductance device is employed. In this embodiment, the variable inductance device comprises a comparatively smaller inductor L 501  coupled in series with a switch S 503 , the combination being coupled in parallel with a comparatively larger inductor L 502 . The switch S 503  during normal operation of the converter is opened to isolate the small inductor L 501  from the converter. When there is a transient change in the load voltage, the switch S 503  is closed thereby coupling the small inductor L 501  in parallel with the large inductor L 502  and enabling fast current change. This fifth embodiment also comprises a power circuit  510  and a control circuit  520 . 
     The power circuit  510  includes a pair of input terminals  501  and  502 , which are connectable to a DC voltage source to receive input power, and an output capacitor C 501  for providing regulated DC output power to a load  507  coupled to the output capacitor C 501 . The power circuit  510  further includes a pair of switches M 501  &amp; M 502 , which in this embodiment are represented by MOSFETs M 501  and M 502 . The switches M 501  &amp; M 502  are controllable by the control circuit  520  to produce a series of alternating voltage pulses. 
     Coupled between the switches M 501  &amp; M 502  and the output capacitor C 501  is the variable inductance device  540  of this embodiment. The variable inductance device  540  operates at a high steady inductance level during normal operation of power circuit  510  to provide sufficient inductance to allow power circuit  510  to operate with low ripple voltage. When there is a fast transient current in power circuit  510 , variable inductance device  540  is operable to function at a reduced inductance level thereby improving the transient response of the power circuit  510 . 
     The variable inductance device  540  shown in this fifth embodiment of the invention consists of an inductor L 501  with a series switch S 503  coupled in parallel with inductor L 502 . Two voltage clamping diodes D 503  and D 504  are coupled to the node between switch S 503  and inductor L 501  to protect switch S 503 . 
     The control circuit  520  comprises two loops, a Pulse Width Modulation (PWM) loop  505  and a variable inductance control loop  515 . The PWM loop  505  includes a feedback block  504  which is coupled to a PWM block  506 . The feedback block  504  is operable to monitor the converter load voltage, and the PWM block  506  is operable to provide driving pulses to the switches M 501  &amp; M 502  in the power circuit  510 . 
     The variable inductance control loop  515  includes circuits that monitor the converter load voltage and produce driving signals for switch S 503 . The variable inductance control loop circuits, in the fifth embodiment, comprise a high pass filter B 501 , which is operable to monitor the converter load voltage, and two hysteresis comparators B 502  and B 503 . The output of the two hysteresis comparators B 502  and B 503  input to a logic circuit  525  comprising AND gates IC 503  and IC 504  and OR gate IC 505 . Logic circuit  525  is operable to synchronize the switching of switch S 503  with the switching of the main switches M 402  and M 401 . 
     During steady state operation, the feedback block  504  generates signals to control the PWM controller  506  which, in turn, generates gate pulses to drive MOSFETs M 501  and M 502  to maintain a steady voltage across the load  507 . The steady state operation is the same as that for a conventional converter having an output inductor L 502  and an output capacitor C 501 . Also during steady state operation, the switch S 503  is in an open state so that inductor L 501  does not affect the power conversion operation of the converter. Inductor L 502  has a high enough inductance to suppress excessive ripple current. This provides for high efficiency during steady load operation. Inductor L 501  has a considerably lower inductance than that of inductor L 502 . 
     When there is a fast transient increase in load current, the present converter responds to the transient condition as illustrated by the waveforms shown in FIG.  10 . In the period between t30 and t31, the converter operates in steady state. At time t31 there is a step increase in load current as shown in FIG.  10 C. This leads to an output voltage drop as shown in FIG.  10 E. When the output voltage drops below a threshold level V 11 , switch S 503  is switched on by the operation of filter B 501 , comparator B 502 , AND gate IC 504 , and OR gate IC 505 . As a result, inductor L 501 , which has a lower inductance, is connected in parallel with inductor L 502 . This reduces the overall converter inductance and, consequently, inductor current can rise rapidly as shown in FIG.  10 D. 
     In the time period between t32 and t33, current flows through inductor L 501  as well. This current causes the output voltage to increase. When the output voltage reaches a second voltage level V 12  at time t33, as shown in FIG. 10, switch S 503  is switched to an off state by the operation of filter B 501 , comparator B 502 , AND gate IC 504 , and OR gate IC 505 . Current flowing through inductor L 501  is diverted through diode D 504  and decreases until time t34. At time t34, diode D 504  turns off and the current through inductor L 501  diminishes to zero. 
     During the time period t32 to t34, the current in inductor L 502  rises. If the current rose enough to support the load demands from time t34 and beyond, the converter will resume normal pulse width modulation with switches M 501  and M 502 . If the current has not risen sufficiently to meet load demands, the output voltage will drop back to voltage level V 11  and the sequence will be re-initiatcd to boost the output voltage. Eventually, the output voltage will rise to a level so that normal pulse width modulation may resume. 
     When there is a fast transient decrease in load current, the converter of FIG. 9 responds to the transient condition as shown in FIG.  11 . During the time period between t40 and t41, the converter operates with a steady load current. At time t41, there is a step decrease in the load current as shown in FIG.  11 C. As a result, the output voltage rises as shown in FIG.  11 E. Even if the PWM loop  520  is fast enough to turn off MOSFET M 501  and turn on MOSFET M 502 , the current reduction in inductor L 502  is still too slow because of the high inductance of inductor L 502 . When the output voltage reaches a threshold level V 13  at time t42, switch S 503  is switched to an on state by the operation of filter B 501 , comparator B 503 , AND gate IC 503 , and OR gate IC 505 . As a result, inductor L 501  which has much smaller inductance is connected in parallel with inductor L 502 . This reduces the overall converter inductance and current can change rapidly as shown in FIG.  11 D. 
     During the time between t42 and t43, current increases in the negative sense through inductor L 501 . This current causes the output voltage to decrease until the output voltage reaches voltage level V 14  as shown in FIG.  11 E. When voltage level V 14  is reached, switch S 503  is switched to an off state by the operation of filter B 501 , comparator B 503 , AND gate IC 503 , and OR gate IC 505 . Current flowing through inductor L 501  is diverted through diode D 503  and reduced until time t44. At time t44 diode D 503  is turned off and current flowing through inductor L 501  diminishes to zero. 
     During time period t42 to t44, current flowing through inductor also decreases. If the inductor current has decreased enough to sufficiently reduce the output voltage at time t34 and beyond, the converter will resume normal pulse with modulation. If the inductor current has not decreased sufficiently, the output voltage will increase again to voltage level V 13  and the whole process will be re-initiated to step down the output voltage. 
     The present invention has been described with reference to a buck converter topology. It would be obvious, however, to those skilled in the art to apply the invention to other converter topologies such as a boost converter, a flyback converter, a forward converter, a push-pull converter, a resonant converter, a full bridge converter, a Cuk converter, a Sepic converter, a half bridge converter and other converter topologies, without departing from the spirit of the invention. A number of embodiments that have particular utility for fast transient applications in switching power converters have been described. The embodiments described herein are just a few of the embodiments that may be generated by those skilled in the art using the invention described herein. Having described in detail the preferred and alternate embodiments of the present invention, including preferred modes of operation, it is to be understood that the present invention could be carried out with different elements and steps. The preferred and alternate embodiments are presented only by way of example and arc not meant to limit the scope of the present invention which is defined by the following claims.