Abstract:
An integrated circuit is divided into a number of sub-circuits by isolation walls in the substrate. A conducting shield overlays every sub-circuit to form a grounded cage with the underlying substrate for trapping electromagnetic radiation generated inside the sub-circuit, and to prevent cross-talk between the sub-circuits.

Description:
BACKGROUND OF THE INVENTION  
         [0001]    (1) Field of the Invention  
           [0002]    This invention relates to integrated circuit (IC) structures, particularly to IC structures to reduce cross-talk.  
           [0003]    (2) Brief Description of Related Art  
           [0004]    The tendency in IC technology is to reduce the minimum resolution in an IC structure so as to increase the packing density. As the packing density increases, different sections of an IC are placed closer together. The close proximity of the sections may cause cross talks among each other, because the interconnections in one section may radiate electromagnetic waves which may be picked up by a neighboring section. The cross-talk can cause interference and/or oscillations. Such cross-talks are particularly serious in analog or mixed-signal ICs. One technique widely used in the IC structures is to build conducting walls around different sub-circuits SC 1 , SC 2  as shown in FIG. 1. A wall  12  is built to surround each sub-circuit and is grounded. Each circuit section may include circuit elements such as transistors, resistors, capacitors, etc. and interconnections (not shown). The wall serves as a shield to prevent lateral electromagnetic (EM) radiation of the circuit elements, particularly the interconnections due to RF current flow. However, the circuit interconnections can serve as antennas to propagate over the top of the IC chip and be picked up by a neighboring sub-circuit.  
           [0005]    Another technique widely used in IC design is to use differential pairs (amplifiers) and place the paired input and output wires of differential pairs close to each other, so that the currents in the paired wires run in opposite directions to cancel the radiation. Such a technique may impose restriction on circuit layout and has not proven to be very effective.  
         SUMMARY OF THE INVENTION  
         [0006]    An object of this invention is to minimize cross-talk due to EM interference. Another object of this invention is to prevent the radiation of EM wave over the top surface of any IC section. Still another object of this invention is to increase the flexibility in laying out integrated circuits.  
           [0007]    These objects are achieved by covering each sub-circuit with an electromagnetic shield. Any EM waves generated within that particular sub-circuit are trapped and prevented from radiating outside the trap. The walls of the shield are grounded. Thus, any neighboring sub-circuit is prevented from picking up any interference. 
       
    
    
     BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE INVENTION  
       [0008]    [0008]FIG. 1 shows a prior art IC structure to reduce cross-talks  
         [0009]    [0009]FIG. 2 a  shows the basic cross-section view of the shielded cage of the present invention; FIG. 2 b  shows the top view of the shielded cage.  
         [0010]    [0010]FIG. 3 shows the washer of the shielded cage.  
         [0011]    [0011]FIG. 4 shows the feed through for the shielded cage.  
         [0012]    [0012]FIG. 5 shows the shielded cage for sub-circuit with multi-layer interconnection.  
         [0013]    [0013]FIG. 6 shows a shielded interconnection.  
         [0014]    [0014]FIG. 7 shows the construction of a shielded cage for a BJT integrated sub-circuit.  
         [0015]    [0015]FIG. 8 shows the construction of a shielded cage for a CMOS integrated sub-circuit.  
         [0016]    [0016]FIG. 9 shows the construction of shielded cage for a BiCMOS integrated sub-circuit. 
     
    
     DETAILED DESCRIPTION OF THE INVENTION  
       [0017]    [0017]FIG. 2( a ) and FIG. 2( b ) show the basic structure of the present invention. FIG. 2( a ) shows the cross-sectional view of the structure. As in the prior art, conducting walls  12  are imbedded in the substrate to surround the substrates SC 1  and SC 2  separately. Separate conductive shields  13  cover over the respective sub-circuits SC 1 , SC 2 , as shown in the top view FIG. 2( b ). Thus, the sub-circuits are caged inside the surrounding walls  12  and the overhanging shields  13 . The cages are grounded and trap any EM waves generated in the sub-circuits, preventing the radiation of the EM waves outside the cage.  
         [0018]    [0018]FIG. 3 shows a second embodiment of the invention. A washer  14  is added to each cage between the imbedded wall  12  and the shield  13 . The washers serve as spacers to allow enough space for the interconnections and interleaving insulators.  
         [0019]    [0019]FIG. 4 shows a third embodiment of the present invention. Through-holes  16  are inserted in the washers  14  for leads connected outside the sub-circuits to feed through.  
         [0020]    [0020]FIG. 5 shows the cross-section view of a structure with multi-layer interconnections, M 1 , M 2 . More layers of interconnections and insulators can alternately be stacked over the substrate  10 .  
         [0021]    [0021]FIG. 6 shows a fourth embodiment of the present invention. In addition to caging of the sub-circuits, the interconnection between two sub-circuits can also be shielded. As shown, the interconnection between sub-circuit SC 1  and SC 2  is shielded by the sleeve comprising an imbedded wall  17  and cover  18 . Similar to the shields for the sub-circuits, the shielding wall  17  and cover  18  are also grounded.  
         [0022]    The processing of the shielding cages can be compatible with the conventional fabrication method for integrated circuits. The methods depend on whether the IC is based on a BJT, CMOS, BiCMOS or any other structure. FIG. 7 shows a basic BJT IC structure. FIG. 8 shows a basic CMOS IC structure. FIG. 9 shows a basic BiCMOS structure.  
         [0023]    [0023]FIG. 7 shows a cross-sectional view of the implementation of the concept for a typical bipolar (BJT) integrated circuit. The sub-circuit  21  on the p-type substrate  20  and an n-type well may include a vertical NPN BJT and a lateral PNP BJT. Other components such as diodes, resistors, capacitors etc. may be placed beside the transistors. The sub-circuit may include an isolation ISO to separate the NPN transistor and the lateral PNP transistor such as a p-type sinker diffusion, and be placed in the p-type substrate p sub . Such an isolation and the p-type substrate p sub  together form the bottom wall  22  of the EM cage. As to the sleeve-like washers  24  over the bottom wall  22 , the washer can be formed by stacking multiple layers of metallization. Only an additional metal shield  23  need be deposited over the bottom wall  22 . The shield should be the topmost metal layer of the interconnection system. If the topmost metal or poly-silicon layer is not used for interconnection, the shield can be formed without any extra metallization. Through-holes in washer  24  are provided as needed for interconnections between sub-circuits. The substrate  20  and the shield  23  are all grounded together.  
         [0024]    [0024]FIG. 8 shows a cross-section of the implementation for a CMOS integrated circuit.  
         [0025]    The sub-circuit  31  on substrate  30  may include an NMOS FET Mn in the p-substrate and PMOS FET Mp in an n-well n well  as shown. These wells are normally grounded or ac grounded, thus forming the bottom wall of the EM cage. Since the p-substrate and the n-well are self isolating, there is no need to add additonal side wall for the EM cage. The washer  34  over the bottom wall can be fabricated by stacking multiple metal layers. As in the BJT structure, at most only one extra metal shield  33  need be deposited over the bottom wall  32 . The shield  33  should be the top metal layer and is connected electrically by the sleeve-like washer  34  to ground. Through-holes in the washer  34  can be provided as needed for interconnections as described in FIG. 4.  
         [0026]    [0026]FIG. 9 shows a cross-sectional view of the implementation for a BICMOS integrated circuit. The subcircuit  41  on substrate  40  may comprise CMOS elements such as NMOS and PMOS, and bipolar elements such as NPN BJT transistors as well as other elements such as diodes, resistors, capacitors etc. fabricated on a p-type substrate p sub . The NPN bipolar transistor has n-type emitter n E , p-type base p B  and n-type collector n C . On the same p type substrate can be diffused with the source n S  and drain n D  of the NMOS FET. An n-type well is formed in the p-type substrate and diffused with p-type source p S  and drain p D  for the construction of an NMOS FET. The p-type substrate now can serve as the lower wall of the EM cage. The washer  44  can be fabricated by stacking multiple layers of metal. The top is shielded by the shield  43  and is electrically connected to the surrounding wall  42  by sleeve-like conducting washer  44  for complete enclosure and is grounded. Through-holes in the washer  44  may be provided wherever needed for interconnections between different sub-circuits.  
         [0027]    From the foregoing description in FIGS. 7, 8 and  9 , it can be seen that the fabrication of the EM cage is compatible with the fabrication of basic BJT, CMOS and BiCMOS IC structures. In most cases, at most one additional metal layer is needed. No additional area is needed to incorporate the shield, since it overlays over the bottom well While p-type substrates are used in these structures, dual structures using complementary conductivity type semiconductors can obviously be used.  
         [0028]    While the preferred basic embodiment of the invention have been described, it will be apparent to those skilled in the art that various modifications can be made in the embodiments without departing from the spirit of the present invention. All such modifications are all within the scope of this invention.