Abstract:
An integrated polysilicon fuse and diode and methods of making the same are provided. The integrated polysilicon fuse and diode combination may be implemented in a programmable cross point fuse array. The integrated polysilicon fuse and diode may be used in a random access memory (RAM) cell. The polysilicon diode may be isolated from a substrate and other devices, use less area on a substrate, and cost less to manufacture compared to other diodes.

Description:
FIELD OF THE INVENTION  
         [0001]    The present invention relates to integrated circuits, and more particularly to fuses and diodes.  
         BACKGROUND OF THE INVENTION  
         [0002]    Some CMOS integrated circuit processes have tried to form a one-time programmable element called a “poly fuse.” A poly fuse may comprise a Co, Ti or other metal layer formed on a polysilicon layer, such as a LPCVD poly film. The LPCVD poly film may be doped/implanted with a contaminant to lower the bulk resistivity. The metal layer is silicided with some of the poly layer, and the result is a silicided polysilicon layer (also called a “polysilicide”) over an unsilicided polysilicon layer.  
           [0003]    Some processes “program” a poly fuse by passing a sufficiently high current through the silicided polysilicon (fuse material). The current heats the silicide such that the temperature rises above a certain critical temperature where the silicide changes phase and increases in resistance. The change of phase may increase the density and be accompanied by a clustering or agglomeration of the silicided doped polysilicon molecules, which can form voids in the silicide layer, and thus increase the resistance substantially. The phase change may reduce one or more geometric dimensions of the silicided polysilicon. In some cases, the reduced dimensions may cause the silicided polysilicon film to separate at or physically move away from a junction of highest heat dissipation, which can be ascertained by post-processing physical analysis. The amount of silicide agglomeration may vary from fuse to fuse. The process of applying current to change the silicided polysilicon from a relatively low resistance state to a relatively high resistance state may be referred to as “programming” the fuse.  
         SUMMARY OF THE INVENTION  
         [0004]    The invention recognizes that a standard CMOS integrated circuit process does not have the capability of creating diodes that are sufficiently isolated from the substrate, unless additional mask and implant steps are added. The invention also recognizes that one-time programmable elements, such as silicided poly fuses, may be used as programmable elements in a wide range of integrated circuit applications.  
           [0005]    An integrated polysilicon fuse and diode circuit and methods of making the same are provided in accordance with the present invention. The integrated polysilicon fuse and diode combination described herein may be implemented in a programmable cross point fuse array. The integrated poly fuse and diode may advantageously be used in a nonvolatile, random access memory (RAM) cell/element. The poly fuse and diode described herein are less expensive to manufacture than other types of nonvolatile memory elements, such as FERAM and MRAM, which may require adding process steps to a standard CMOS process. As an example, the poly fuse and diode may be used to store a serial or part number of a device, such as a computer mouse.  
           [0006]    Compared to other types of diodes that may be used in a memory array with fuses as the memory element, the polysilicon diode described herein may be isolated from a substrate and from other devices, use less area on a substrate, and cost less to manufacture. 
       
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0007]    [0007]FIG. 1 illustrates one embodiment of a programmable cross point fuse array.  
         [0008]    [0008]FIG. 2 is a top view of one embodiment of a polysilicon fuse and a polysilicon diode that may be implemented in the fuse array of FIG. 1.  
         [0009]    [0009]FIG. 3A is a top view of one embodiment of the polysilicon fuse in FIG. 2.  
         [0010]    [0010]FIG. 3B is a top view of one embodiment of the polysilicon diode in FIG. 2.  
         [0011]    [0011]FIG. 4 illustrates an example of a voltage vs. current programming curve for a fuse with a diode, such as the fuse and diode in FIG. 2, and a voltage vs. current programming curve for a fuse without a diode. 
     
    
     DETAILED DESCRIPTION  
       [0012]    The CMOS process according to one embodiment of the invention may advantageously include all features or comply with all process conditions of a standard state-of-the-art 0.18, 0.13 CMOS process or other CMOS processes. These conditions may include rapid thermal anneal (RTA) conditions and silicidation temperatures and time periods to form transistors.  
         [0013]    Programmable Fuse Array  
         [0014]    [0014]FIG. 1 illustrates one embodiment of a programmable cross point fuse array  100 . The fuse array  100  comprises a row selector  101 , a plurality of row lines  112 A,  112 B, a column selector  110 , a plurality of column lines  114 A,  114 B, a plurality of polysilicon fuses (“poly fuses”), such as the fuse  104 , and a plurality of polysilicon diodes (“poly diodes”), such as the diode  106 . The row selector  101  comprises a plurality of row selection transistors, such as the transistor  102  for row  112 A. The column selector  110  comprises a plurality of column selection transistors, such as the transistor  116  for column  114 B. The column selector  110  may be coupled to a sensing circuit  108 . The column selector  110  may be used to program fuses at cross points and to sense programmed fuses at cross points.  
         [0015]    In general, the fuse array  100  in FIG. 1 may comprise any number of row lines, column lines, row selection transistors, column selection transistors, fuses and diodes. The fuse array  100  may comprise other elements (not shown) in addition to or instead of the elements shown in FIG. 1.  
         [0016]    In FIG. 1, a fuse  104  is in series with a diode  106  at a row-column cross point. The diode  106  is configured to isolate the fuse  104  from undesired current. If a fuse  104  is not “blown” during programming (i.e., silicided poly is not subjected to a current that causes a phase change), the fuse  104  and diode  106  are configured to couple the row line  112 A to the column line  114 B. The sensing circuit  108  may sense this row-column connection when the row selection transistor  102  and column selection transistor  116  are activated.  
         [0017]    If the fuse  104  is blown during programming (i.e., silicided poly experiences a phase change and possibly agglomeration), the relatively higher resistance of the blown fuse indicates that the row line  112 A should not be coupled to the column line  114 B. The resistances of blown fuses may vary considerably from one blown fuse to another blown fuse (this may be a result of different amounts of phase change and silicide agglomeration). In one embodiment, the resistance of the blown/programmed fuse is about more than 6 times higher than the resistance of the unprogrammed fuse.  
         [0018]    One advantage of the cross point fuse array  100  in FIG. 1 is having a transistor control an entire row or an entire column, rather than having programming transistors (e.g., NMOS transistors) control each cross point. Using a fuse  104  and diode  106 , instead of using a programming transistor, to control each cross point may reduce the complexity, cost of manufacturing and size of a cross point circuit.  
         [0019]    Polysilicon Fuse  
         [0020]    [0020]FIG. 2 is a top view of one embodiment of a polysilicon fuse  200  and a polysilicon diode  220  that may be implemented in the fuse array  100  of FIG. 1. The fuse  200  in FIG. 2 comprises a link  204  and two contact areas  202 A,  202 B with a plurality of contact plugs  203 A,  203 B (also called “contact pads”). The fuse  200  may be called a “poly fuse” and may be formed during a standard or modified CMOS integrated circuit process. Specifically, a Co, Ti or other metal layer is formed and silicided on a polysilicon layer in the shape of a “line” or link  204 . As a result, the link  204  of an unprogrammed fuse  200  comprises a silicided polysilicon (also called a “polysilicide”) layer, e.g., a TiSi 2  or CoSi 2 , over a remaining polysilicon layer.  
         [0021]    One contact area  202 A of the fuse  200  or the plugs  203 A of the contact area  202 A may be coupled to a row line  112  in the cross point fuse array  100  in FIG. 1. The other contact area  202 B may be proximate to a silicided N+ doped polysilicon area  206 , which is proximate to an N+ doped polysilicon area  224  of the diode  220 .  
         [0022]    The diode  220  has contact plugs/pads  203 C in area  208  such that the contact pads  203 A and  203 C may function together to supply current or test the voltage across the fuse  200  and diode  220 . Although  18  plugs/pads  203 C are shown in FIG. 2, there may be any suitable number of plugs/pads  203 C depending on the size of the area  208 . In one embodiment, the fuse  200  in FIG. 2 has contact plugs/pads  203 A and  203 B for testing the fuse  200  before and/or after programming. In another embodiment, the fuse  200  does not have contact plugs  203 B.  
         [0023]    [0023]FIG. 3A is a top view of one embodiment of the polysilicon fuse  200  in FIG. 2. In one embodiment, the link  204  in FIG. 3A is about 3 μm in length and about 0.4 μm in width, but other shapes and sizes may be used.  
         [0024]    Polysilicon Diode  
         [0025]    The diode  220  in FIG. 2 comprises a silicided N+ doped polysilicon area  206 , a N+ doped polysilicon area  224 , a silicide block  226 , a P+ doped polysilicon area  222  and a silicided P+ doped polysilicon area  208 . The diode  220  may be formed in a standard polysilicon layer of a CMOS process. For example, a polysilicon layer may be formed over a non-conductor or a standard “field oxide” layer, such as a silicon dioxide or nitride layer, which is formed over a substrate. P+ source and drain mask and implant steps of a CMOS process may form the P+ doped polysilicon area  222  of the diode  220 . Similarly, N+ source/drain mask and implant steps of the CMOS process may form the N+ doped polysilicon area  224  of the diode  220 . The underlying field oxide layer isolates or insulates the polysilicon diode  220  from the silicon substrate and other devices.  
         [0026]    The silicide block  226  of the diode  220  may comprise a thin layer of silicon nitride. The silicide block  226  is configured to block the formation of silicide in the region where the N+ and P+ implanted polysilicon areas  224 ,  222  are adjacent. The silicide formation (e.g., TiSi 2  or CoSi 2 ) of the fuse  200  should be blocked from the poly diode  220 , or else the silicide formation of the fuse  200  may short out the diode  220 .  
         [0027]    The diode  220  may be referred to as a “lateral” polysilicon diode because current flows laterally from the P+ doped polysilicon area  222  to the N+ doped polysilicon area  224 . In contrast, current usually flows vertically in most bulk silicon diodes, where the current can flow from the bottom of a diffused layer into the substrate (or into another diffused layer).  
         [0028]    [0028]FIG. 3B is a top view of one embodiment of the polysilicon diode  220  in FIG. 2. In one embodiment, the diode  220  in FIG. 3B is about 20 μm in length and the silicide block  226  is about 1.8 μm in width. In one embodiment, the poly lateral diode  220  has a width of 20 μm and behaves like a regular diode with a reverse bias breakdown voltage greater than about 6 V. In one embodiment, the breakdown voltage of the diode  220  should be higher than the power supply voltage.  
         [0029]    Programming the Fuse  
         [0030]    Some processes “program” a poly fuse by passing a sufficiently high current through the silicided polysilicon (fuse material). The current heats the silicide such that the temperature rises above a certain critical temperature where the silicide changes phase and increases in resistance. The change of phase may increase the density and be accompanied by a clustering or agglomeration of the silicided doped polysilicon molecules, which can form voids in the silicide layer, and thus increase the resistance substantially. The phase change may reduce one or more geometric dimensions of the silicided polysilicon. In some cases, the reduced dimensions may cause the silicided polysilicon film to separate at or physically move away from a junction of highest heat dissipation, which can be ascertained by post-processing physical analysis. The amount of silicide agglomeration may vary from fuse to fuse. The process of applying current- to change the silicided polysilicon from a relatively low resistance state to a relatively high resistance state may be referred to as “programming” the fuse.  
         [0031]    The power needed for programming a fuse may depend on the fuse configuration and any elements, such as a diode  220 , in series with the fuse.  
         [0032]    [0032]FIG. 4 illustrates an example of a voltage vs. current programming curve  404  for a fuse with a diode, such as the fuse  200  and diode  220  in FIG. 2, and a voltage vs. current programming curve  402  for a fuse without a diode. FIG. 4 demonstrates that adding a lateral poly diode  220  (FIG. 2) in series with a poly fuse  200  may increase the programming voltage from about 1.2 V to about 4.2 V (a difference of about 3 V) because of the series resistance of the polysilicon diode  220 . In this example, the resistance of the diode  220  is responsible for a 3-volt voltage drop across the diode  220 , which raises the programming voltage of the fuse  200  by 3 volts.  
         [0033]    After a poly fuse is programmed, the resistance of the programmed fuse may be about three to about ten times higher than the resistance of an unprogrammed fuse.  
         [0034]    The above-described embodiments of the present invention are merely meant to be illustrative and not limiting. Various changes and modifications may be made without departing from the invention in its broader aspects. The appended claims encompass such changes and modifications within the spirit and scope of the invention.