Abstract:
An array of signals is adapted and dithered by use of a weight signal, a gradient signal with a carrier at a first frequency and an orthogonal sequence signal with a carrier at a second frequency, the dithered signals are then operated on to extract an output signal, a gradient signal, and a weight signal, which gradient and weight signals along with a generated orthogonal sequence signal, are then fed back for use in the dithering process. The carriers at different frequencies provide separability of predetermined components during the operation.

Description:
BACKGROUND OF THE INVENTION 
     In adaptive signal processing, a variety of apparatus has been proposed for arriving at the desired signal output. In U.S. Pat. No. 4,236,158, issued Nov. 25, 1980, and entitled &#34;Steepest Descent Controller For An Adaptive Antenna Array&#34;, apparatus for producing a steepest descent control is disclosed. The steepest descent control is a very desirable method of achieving the required output signal, but the apparatus can be relatively expensive and complicated. A second type of control, known as an accelerated gradient control, is disclosed in an article entitled &#34;Improved Feedback Loop for Adaptive Arrays&#34;, Proceedings of the IEEE on Aerospace and Electronics Systems, Vol. AES-16, No. 2, March 1980, by R. T. Compton, Jr. Again, the accelerated gradient control can be relatively expensive. The cost of the above systems can be reduced in accordance with apparatus disclosed in U.S. Pat. No. 4,286,268, issued Aug. 25, 1981, entitled &#34;Adaptive Array with Optimal Sequential Gradient Control&#34;. In this patent many of the components are time-shared to substantially reduce the costs thereof. 
     The use of weight dithering in adaptive arrays has been suggested previously to achieve low cost implementation by eliminating IF hardware, at the expense of slower and often less stable convergence and narrower bandwidths. 
     DESCRIPTION OF THE PREFERRED EMBODIMENT 
     The present invention pertains to a method and apparatus for realizing optimal control in gradient and accelerated gradient relaxation in adaptive nulling systems by a weight dithering technique. The implementation can be digital, hybrid or analog and includes means coupled to receive a weight signal, a gradient signal and an orthogonal sequence signal for dithering input signals in accordance with the combined weight, gradient and orthogonal sequence signals and means coupled to the first means for separating components of the dithered signals to develop an output signal, a weight signal and a gradient signal. The separability of the components are further improved by impressing the gradient signal on a carrier of a first frequency and the orthogonal sequence signals on a carrier of a second frequency different than the first frequency. 
     It is an object of the present invention to provide new and improved adaptive signal processing apparatus. 
     It is a further object of the present invention to provide new and improved adaptive signal processing apparatus which is relatively low-cost to implement. 
     It is a further object of the present invention to provide adaptive signal processing apparatus which is especially advantageous in situations where recovery of the baseband is impractical. 
     These and other objects of this invention will become apparent to those skilled in the art upon consideration of the accompanying specifications, claims and drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     Referring to the drawings, 
     FIG. 1 is a simplified block diagram of steepest descent gradient controlled adaptive signal processing apparatus embodying the present invention; 
     FIG. 2 is a chart of circuit equivalents for mathematical notations utilized in FIG. 1; 
     FIG. 3 illustrates an example of orthogonal sequence signals utilized in FIG. 1; 
     FIG. 4 is a simplified block diagram of a modification of a portion of FIG. 1 to alter the apparatus to sequential gradient control; and 
     FIG. 5 is another modification of the apparatus of FIG. 1 to alter the apparatus to accelerated gradient control. 
    
    
     DESCRIPTION OF THE PREFERRED EMBODIMENTS 
     Throughout the various embodiments disclosed for the present invention the inputs to the adaptive signal processing apparatus will be disclosed as a main antenna and a plurality of secondary antennas, but it should be understood that this is simply a convenient operable embodiment and the adaptive signal processing apparatus could be utilized with a variety of signal arrays without detracting or altering, substantially, the operation thereof. Also, in the description of the various embodiments signals available at the output/input of various components will be set forth in the specification and marked in the drawings with an appropriate number contained in parenthesis for ease of identification. Similar signals will be marked with similar numbers throughout the various embodiments. A complete mathematical analysis of the steepest descent controller for adaptive signal processing apparatus is disclosed in the above identified U.S. Pat. No. 4,236,158 and any mathematics required in the present description which is not completed herein is incorporated by reference. Further, the following notations and definitions will be utilized throughout the present description. 
     s o  =scalar complex-valued signal at unweighted port 
     s=N-component complex-valued vector at weighted auxiliary ports 
     s c  =scalar complex-valued combined signal without dithering 
     γ=N-component complex-valued gradient vector 
     λ=scalar real-valued open-loop gain 
     w=N-component complex-valued weight vector 
     T s  =integration time 
     (1/T s )=desired signal bandwidth 
     Δ=N-component real valued dither signal vector 
     [δ 1 , δ 2 , . . . , δ N  ] T  with the following properties: ##EQU1## where δ is the amplitude of the square waves ##EQU2## I is the identity matrix of order N. 
     Referring specifically to FIG. 1, steepest descent gradient control adaptive signal processing apparatus is disclosed which apparatus is essentially a closed loop and, therefore, a description of the apparatus and operation thereof will begin at the output of a summation circuit 50 for convenience. The combined output signal provided by the summation circuit 50 is defined by the mathematical statement 
     
         s.sub.c =s.sub.c +s.sup.T Δe.sup.jω.sbsp.1.sup.t +βs.sup.T γe.sup.jω.sbsp.2.sup.t                        (1) 
    
     where 
     s c  =s T  w+s o  is the undithered output signal 
     and 
     Δ(t) is typically shown in FIG. 3. 
     The output signal from the circuit 50 is supplied through a lowpass filter 52 to an output terminal 53. The filter 52 removes the higher order terms and allows only the term s c , which is combined array output with no dithering, to appear at the output terminal 53. The output signal of the circuit 50 is also applied to both inputs of a multiplying circuit 55. Without loss of generality, this embodiment illustrates all signals originating at baseband, with dithered signals appearing offset at frequencies ω 1  and ω 2  chosen so that the spectra at the output of the multiplying circuit 55 after squaring of the individual components of the output are separable by filtering as will become apparent presently. The output signal from the circuit 55 is defined by the following mathematical statement. ##EQU3## 
     It will be noted by those skilled in the art that compact Hilbert space notations are utilized throughout this disclosure. According to such notations, given complex time functions X(t) and Y(t), define their inner product at time t by ##EQU4## where T s  is a desired integration time. 
     The self inner product &lt;X,X&gt; is usually denoted by metric notation ||X|| 2 . Also, the notation (X,Y) will represent the simple product X*(t)Y(t). 
     The signal from the complex multiplier circuit 55 is applied to a first input of 3 simple multiplier/mixer type circuits 57, 58 and 59. The mixer 57 has a second input 61 adapted to have a carrier at the frequency e -j ω.sbsp.1 t  applied thereto. The carrier applied to the terminal 61 mixes with the signal from the circuit 55 applied to the other input to remove the carrier from the fourth term of statement (2) above. The fourth term is, thus, reduced to baseband and applied to an input of a correlation circuit 63. An orthogonal sequence generator 65 supplies an orthogonal sequence signal, Δ(t), to a second input of the correlator 63. While the signal from the generator 65 might be any convenient orthogonal sequence, including sin/cosine, the particular signal utilized in this embodiment is illustrated in FIG. 3. It can be seen from FIG. 3 that the orthogonal sequence signal is composed of a plurality of individual square wave signals of different frequencies. The fourth term of statement (2) reduced to baseband, is correlated with the orthogonal sequence signal Δ, to yield ##EQU5## In equation (3) above the product δi(τ)δj(τ) is also defined to be a zero mean process, and acts like a chopper signal on the products s c  (τ)s i  (τ), so that the second term of equation 3 will be a zero average small perturbation on the first term of the equation, which form U.S. Pat. No. 4,236,158 is recognized as the gradient, γ. The effect of further integration of equation 3 will further reduce the size of the second term, making its effect negligible. 
     The second mixer 58 has a second input terminal 67 adapted to receive a carrier at a frequency e -j ω.sbsp.2 t . This carrier is mixed with the signal from the multiplier 55 to reduce the fifth term of equation 2 to baseband. The output of the mixer 58 is supplied through a lowpass filter 69 and a β amplifier 71 to the numerator input of a divider 75. Reducing the fifth term of equation 2 to baseband, filtering and amplifying/multiplying by β yields 
     
         β.sup.2 &lt;s.sub.c,s.sup.T γ&gt;                     (4) 
    
     Mixer 59 has a second inputer terminal 77 adapted to receive a carrier at frequency e -j ω.sbsp.2 t . Output of the mixer 59 is supplied through a lowpass filter 79 to a denominator input of the divider 75. The baseband, filtered third term of equation 2 yields 
     
         β.sup.2 ||s.sup.T γ||.sup.2( 5) 
    
     Note that in both the numerator and denominator the operator (·,·) followed by lowpass filtering in filters 69 and 79 is the analog equivalent of the inner product operator &lt;·,·&gt;, previously defined. Also, the effect of β is removed after multiplication in amplifier 71 and division in divider 75. Equation (4) divided by equation (5) equals the optimal gain, λ. Since the optimal gain, λ has been realized, and since the weight w is produced from the gradient, γ, this circuit must be a true realization of the steepest descent algorithm. 
     The optimal gain from the output of the divider 75 is applied to one input of a mixer 81. The gradient from the complex multiplier 63 is supplied to a second input of the mixer 81 and to one input of a mixer 83. The output of mixer 81 is supplied through integrators 85 to produce w which is the N component complex weight vector. A second input to mixer 83 is connected to a terminal 87, which is adapted to have a carrier βe j ω.sbsp.2 t  supplied thereto. The carrier modulated with the gradient is applied to one input of a summing circuit 89. The complex weight vector is supplied to a second terminal of the summing circuit 89. The orthogonal sequence signals are supplied to one input of a mixer 91. A second input of the mixer 91 has a terminal 93 connected thereto, which terminal 93 is adapted to receive a carrier e j ω.sbsp.1 t  thereon. The carrier modulated by the orthogonal sequence signal is supplied to a third input of the summing circuit 89. The signal at the output of the summing circuit 89 is a combination of the complex weight vector and dithering components, which signal is given by the expression 
     
         w=w+Δe.sup.jω.sbsp.1.sup.t +βγe.sup.jω.sbsp.2.sup.t                 (6) 
    
     The output signal from the summing circuit 89 is supplied to an input of a complex multiplier 95. The multiplier 95 also has N auxiliary antennas, represented by the single antenna 96, connected thereto and the output is supplied to the summation circuit 50. Similarly, a main antenna 97 supplies signals to the summation circuit 50. Thus, the signals from the secondary inputs, or auxiliary antennas, are adjusted in weight and dithered by orthogonal sequence signals and the gradient signal at different carrier frequencies so that desired components of the signal produced can be separated and operated upon to arrive at the weight and gradient signals. 
     Referring specifically to FIG. 2, a chart is illustrated including a list of three mathematical notations in a left hand column and the circuit equivalent for each of these notations in the right hand column. The first mathematical notation in the left hand column is a complex integrator such as integrator 85 in FIG. 1, having a plurality N inputs and providing a plurality N outputs. The equivalent is N simple integrators, 1 in each input line. The second notation is a complex multiplier, such as multiplier 95 in FIG. 1, for multiplying two N component inputs and providing a single output. In the circuit equivalent each of the inputs is divided into an in-phase and a quadrature component. All of the in-phase components of one input signal are multiplied by the in-phase components of the other signal and all of the quadrature components of one signal are multiplied by the quadrature components of the other signal. All of the products are then summed in a summation circuit to produce the single output. The third notation in the left hand column is a second multiplying circuit wherein an N component input is multiplied by a single input to produce an N component output, such as the multiplying circuit 63 in FIG. 1. In the circuit equivalent the N signals of the first input are each divided into an in phase and a quadrature component and each component of each signal is multiplied by the single signal from the other input. All of the products are low pass filtered to provide two N output signals. Thus, specific apparatus for obtaining the steepest descent realization in adaptive signal processing apparatus by dithering the weights is disclosed. It will be realized by those skilled in the art that many variations of the circuitry illustrated may be provided and that the apparatus illustrated is simply for exemplary purposes. 
     By requiring that the orthogonal sequence signals, Δ, consist of non-time-overlapping pulses, as illustrated in FIG. 4B, the system, in effect, estimates gradient values γ i  sequentially and in that case the apparatus of FIG. 1 represents the sequential gradient processor. Now, however, the gradient γ in FIG. 1 must be replaced by the modified gradient γ. This rather minor change to the apparatus of FIG. 1 is illustrated in FIG. 4. The apparatus of FIG. 4 is simply a replacement for the complex multiplier 63, remembering that the orthogonal sequence generator 65 produces the signal illustrated in FIG. 4B. Referring specifically to FIG. 4A, components which are similar to those in FIG. 1 are designated by a similar number and all of the numbers have primes added to indicate that it is a different embodiment. 
     The signal from the orthogonal sequence generator appears at a terminal 65&#39; where it is utilized to control a rotary switch 66&#39;, illustrated in simplified schematic form. Each output of the rotary switch 66&#39; is supplied through a low pass filter to the output with all of the outputs from the low pass filters representing the modified gradient, which is then applied to the mixers 81&#39; and 83&#39; as shown in FIG. 1. 
     An approximation to the accelerated gradient method of adaptive signal processing can be achieved by modifying the baseband term, s c , at the output of the summation circuit 50 in FIG. 1, from s c  to the value s c  -ks T  γ. In this case the new modified gradient can be written as ##EQU6## where γ is the usual gradient vector value and C is the N×N covariance matrix of the signal vector s. Note that here and hereinafter &lt;·,·&gt; is understood to operate over a period T s . 
     From (7), we see that 
     
         γ=(I+kC)γ                                      (8) 
    
     wherein I=unity matrix. 
     Hence 
     
         γ=(I+kC).sup.-1 γ                              (9) 
    
     provided the inverse exists. 
     Therefore, assuming the inverse exists, subtracting the term k s T  γ from the usual unperturbed value s c  should result in accelerated convergence, by noting that if k&lt;&lt;1, γ in equation 9 looks like the standard steepest descent gradient, while for k&gt;&gt;1, γ≈(kC) -1  γ, which is the optimal gradient direction in the accelerated gradient method. Note that the optimal gain will stabilize the loop for whatever value γ is used. 
     Referring specifically to FIG. 5, apparatus is illustrated for modifying the usual unperturbed value s c  from the summation circuit 50 in FIG. 1. The apparatus of FIG. 5 is designated with numbers having a double prime to indicate a different embodiment and components which are similar to the components in FIG. 1 are designated with similar numbers. The output from summation circuit 50&#34; is supplied through a low pass filter 52&#34; to an output terminal 53&#34;, as in FIG. 1. The output from the summation circuit 50&#34; is also supplied directly to a positive input of a summing circuit 72&#34;. In addition the output of the summation circuit 50&#34; is supplied to one input of a mixing circuit 73&#34;, a second input of which is connected to a terminal 74&#34; adapted to have the carrier e -j ω.sbsp.2 t  supplied thereto for reducing chosen components of the input signal to baseband in the output thereof. The output of the mixer circuit 73&#34; is supplied through a low pass filter 76&#34; to a negative or subtracting input of the summing circuit 72&#34;. The bandwidth of the lowpass filter 76&#34; is generally 1/T s  and the output signal from the lowpass filter 76&#34; will be k s T  γ. The output of the summing circuit 72&#34; is supplied to both inputs of a multiplying circuit 55&#34; to provide the square of the input signal, as in FIG. 1. Thus, the baseband term is modified as described above to provide the accelerated gradient method of adaptive signal processing. 
     Thus, several embodiments of adaptive signal processing apparatus are disclosed having weight dithered inputs with preselected carriers so that preselected components of the signals are separable for mathematical operations. In this fashion, the gradient and weight terms can be easily determined by utilizing the preselected and separable components. Because each of the separable components has a specific frequency signature, the components can be easily separated with relatively inexpensive and simple hardware. Therefore, the adaptive signal processing apparatus is relatively inexpensive, stable and, because of the various processing algorithms which can be incorporated, has relatively rapid convergence. Further, because all control information for weights is derived after combining and reduction to baseband, IF hardware (such as correlators) and multiple down-converters can be eliminated to further reduce the cost. 
     While we have shown and described specific embodiments of this invention, further modifications and improvements will occur to those skilled in the art. We desire it to be understood, therefore, that this invention is not limited to the particular forms shown and we intend in the appended claims to cover all modifications which do not depart from the spirit and scope of this invention.