Abstract:
A display panel includes a substrate, a plurality of data lines, a driver integrated circuit, and a plurality of connecting lines. The data lines of the display panel are disposed on a display area of the substrate for signal transmission. The driver integrated circuit is electrically connected to the data lines for providing driving signals required for panel operations. Each data line of the display panel is electrically connected to the driver integrated circuit via a corresponding connecting line. A first connecting line of the connecting lines includes a first section and a second section, wherein a thickness of the second section is substantially thinner than that of the first section.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The present invention relates to a display panel, and more particularly, to a display panel capable of reducing mismatching RC effect during signal transmission and method of manufacturing the same.  
         [0003]     2. Description of the Prior Art  
         [0004]     The progress of science and technology has led to small, effective, and portable intelligent information products becoming a part of our lives. Display devices play an important role because all intelligent information products, such as mobile phones, personal digital assistants (PDAs), or notebook computers, need display devices to be a communication interface. Because the liquid crystal display (LCD) panel is characterized by light weight, low power consumption, and low radiation, the LCD is a mature flat panel display technology. Due to the high vision quality requirements, the LCD is developed toward high quality, high resolution, and low price.  
         [0005]     Please refer to  FIG. 1 , which is a schematic diagram of a prior art LCD panel  10 . A display area  20  of the LCD panel  10  comprises a plurality of parallel data lines  12  and a plurality of parallel scanning lines  14 . The data lines  12  are perpendicular to and interlaced with the scanning lines  14 , and a pixel unit  16  is formed between each two adjacent data lines  12  and two adjacent scanning lines  14 . The data lines  12  of the LCD panel  10  are separated into a plurality of groups of data lines. Each of the groups of data lines receives signals via a corresponding source driver S 1 -S m . The scanning lines  14  of the LCD panel  10  are separated into a plurality of groups of scanning lines. Each of the groups of the scanning lines receives signal via a corresponding gate driver integrated circuit (IC) G 1 -G n . The source drivers S 1 -S m  and the gate driver ICs G 1 -G n  are positioned on a non-display area  30  of the LCD panel  10 . In order to enhance the image quality of the LCD panel, the number of the data lines of the LCD panel is usually increased. In order to reduce the cost of the LCD panel, the number of the source drivers is usually decreased. Therefore, in order to enhance the image quality of the LCD panel and to reduce the cost of the LCD panel, the number of data lines connected to a single source driver should be increased.  
         [0006]     Please refer to  FIG. 2 , which is an enlarged view of the source driver S 1  of the LCD panel  10 . There are a plurality of connecting pads  22  and connecting wires C 1 -C 2m  connected between the source driver S 1  and the data lines D 1 -D 2m . Therefore, the source driver S 1  is electrically connected to the data lines D 1 -D 2m . The connecting wires C 1 -C 2m  are linear wiring to connect with the source driver S 1  and the connecting pads  22 . As shown in  FIG. 2 , the lengths of the periphery connecting wires C 1  and C 2m  are greater than the length of the middle connecting wire C m . The greater the number of connecting wires C 1 -C 2m , the greater the difference between the periphery connecting wire C 1  or C 2m  and the middle connecting wire C m . Because the resistance of the connecting wire is directly proportional to its length, the resistance of the periphery connecting wire C 1  or C 2m  is greater than the resistance of the middle connecting wire C m . Therefore, the impedance of the periphery connecting wire C 1  or C 2m  while the source driver S 1  is outputting is greater than that of any other connecting wire C 2 -C 2m−1 . Due to the mismatching RC effect during signal transmission, the image quality of the LCD panel  10  is worsened.  
         [0007]     Please refer to  FIG. 3 , which is a schematic diagram of another prior art LCD panel  10 ′. In order to overcome the problem of mismatching RC effect, the middle connecting wire C m  has zigzag wiring to increase the resistance of the connecting wire C m  and to decrease the difference between the RC effect of the connecting wire C m  and RC effect of the periphery connecting wire C 1  or C 2m . However, because the number of data lines D 1 -D 2m  electrically connected to the source driver S 1  and the number of the connecting wires C 1 -C 2m  are large, the space for laying out the connecting wire C m  is limited. Therefore, even through the connecting wire C m  is zigzag wiring, the difference between the length of the connecting wire C m  and the connecting wire C 1  or C 2m  cannot be decreased effectively so that the difference between the RC effect of the connecting wire C m  and RC effect of the connecting wire C 1  or C 2m  is decreased slightly. In addition, the difference between the resistance of other connecting wires adjacent to the connecting wire C m , such as C m−2 , C m−1 , C m+1  or C m+2 , and the periphery connecting wire C 1  or C 2m  cannot be ignored. Because of the limited layout area, the connecting wire C m−2 , C m−1 , C m+1  or C m+2  is difficult to be made to zigzag when the connecting wire C m  is made to zigzag. In summary, the RC effect of the data lines and the connecting wire of the LCD panel  10 ′ cannot be reduced effectively, so the image quality of the LCD panel  10 ′ cannot be improved.  
       SUMMARY OF THE INVENTION  
       [0008]     According to the claimed invention, a display panel is disclosed. The display panel comprises a substrate having a display area, a plurality of wires positioned over the display area of the substrate for signal transmission, a driver integrated circuit electrically connected to the wires for providing driving signals required for operations of the display panel, and a plurality of connecting wires of which each is electrically connected to a corresponding one of the wires and the driver integrated circuit. A first connecting wire of the connecting wires includes a first section and a second section, and a thickness of the second section is substantially different from that of the first section.  
         [0009]     The present invention also discloses a method to manufacture a display panel. The method comprises setting up a plurality of wires for signal transmission over a display area of a substrate of the display panel, setting up a driver integrated circuit for providing driving signals required for operations of the display panel, and forming a first connecting wire for connecting one of the wires to the driver integrated circuit. The first connecting wire includes a first section and a second section, and a thickness of the second section is substantially thinner than that of the first section.  
         [0010]     These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0011]      FIG. 1  is a schematic diagram of a prior art LCD panel.  
         [0012]      FIG. 2  is an enlarged view of the source driver of the LCD panel shown in  FIG. 1 .  
         [0013]      FIG. 3  is a schematic diagram of another prior art LCD panel.  
         [0014]      FIG. 4  illustrates the layout of a driver circuit and wires of a first embodiment LCD panel according to the present invention.  
         [0015]      FIG. 5  is a cross-sectional diagram of the middle connecting wire of the first embodiment LCD panel.  
         [0016]      FIG. 6  illustrates the layout of a driver circuit and wires of a second embodiment LCD panel according to the present invention.  
         [0017]      FIG. 7  illustrates the layout of a driver circuit and wires of a third embodiment LCD panel according to the present invention. 
     
    
     DETAILED DESCRIPTION  
       [0018]     Please refer to  FIG. 4 , which illustrates the layout of a driver circuit and wires of a first embodiment LCD panel  40  according to the present invention. In the embodiment, the source driver IC S 1  and the data lines D 1 -D 2m  of the LCD panel  40  are used to explain how to perform a layout according to the present invention. Supposing that the source driver IC S 1  transmits signals to the data lines D 1 -D 2m , it is necessary to set up a plurality of connecting pads  42  and a plurality of connecting wires L 1 -L 2m  on the LCD panel  40  to electrically connect the data lines D 1 -D 2m  to the source driver IC S 1 . In the first embodiment, the connecting wires L 1 -L 2m  are linear wiring to connect the connecting pads  42  to the source driver circuit S 1 . The resistance R of the connecting wire L 1 -L 2m  can be described by: 
 
 R=σL/A  
 
         [0019]     wherein σ is a coefficient of resistance of the connecting wires L 1 -L 2m , L is a length of the connecting wires L 1 -L 2m , and A is a cross-sectional area of the connecting wires L 1 -L 2m .  
         [0020]     Because the lengths of the periphery connecting wires L 1  and L 2m  are greater than the length of the middle connecting wire L m  and the resistances of the connecting wires L 1 -L 2m  is directly proportional to their lengths, a halftone mask is used to form the connecting wires L 1 -L 2m  to reduce thickness of some sections of the connecting wires L 1 -L 2m  to reduce the differences of the resistances of the connecting wires L 1 -L 2m . In the first embodiment, some material of the sections B 1 -B t  of the shortest connecting wire L m  is removed by executing an exposure procedure using the halftone mask to thin the sections B 1 -B t  of the connecting wire L m . Therefore, the cross-sectional areas of the sections B 1 -B t  are less than that of the connecting wire L m , where the B 1 -B t  are indicated by dotted lines in  FIG. 4 . Because resistance of a connecting wire is inversely proportional to the cross-sectional area of the connecting wire, the difference between the resistance of the connecting wire L m  and the resistance of the peripheral connecting wire L 1  or L 2m  can be reduced by thinning the sections B 1 -B t  of the connecting wire L m . In addition, the number and the lengths of the sections B 1 -B t  are determined according to the difference between the resistance of the connecting wire L m  and the resistance of the peripheral connecting wire L 1  or L 2m .  
         [0021]     Please refer to  FIG. 5 , which is a cross-sectional diagram of the connecting wire L m  of the first embodiment LCD panel  40 . It indicates that the sections B 1 -B t  of the connecting wire L m  are thinned. Therefore, the resistance of the sections B 1 -B t  is greater than the resistance of other sections of the connecting wire L m , and the difference between the resistance of the connecting wire L m  and the resistance of the peripheral connecting wire L 1  or L 2m  is reduced.  
         [0022]     In the first embodiment, only some sections of the connecting wire L m  are thinned. However, in a second embodiment of the present invention, the resistances of some connecting wires are increased by thinning their sections. Please refer to  FIG. 6 , which illustrates the layout of a driver circuit and wires of a second embodiment LCD panel  60  according to the present invention. In the second embodiment, the source driver IC S 1  and the data lines D 1 -D 2m  of the LCD panel  60  are also used to explain how to perform the layout according to the present invention. In the embodiment, with the exception of the longest connecting wires L 1  and L 2m , all connecting wires L 2 -L 2m−1  include some thinned sections. The number and the lengths of the thinned sections of the connecting wires L 2 -L 2m−1  are determined according to the differences between the resistances of the connecting wires L 2 -L 2m−1  and the resistance of the peripheral connecting wire L 1  or L 2m . Therefore, N(L m )&gt;N(L m−1  or L m+1 )&gt;N(L m−2  or L m+2 )&gt; . . . &gt;N(L 2  or L 2m−1 ), where N(L m ) represents the number of thinned sections of the connecting wire L m , and N(L p  or L q ) represents the number of thinned sections of the connecting wire L p  or L q .  
         [0023]     Please refer to  FIG. 7 , which illustrates the layout of a driver circuit and wires of a third embodiment LCD panel  70  according to the present invention. In the second embodiment, the source driver IC S 1  and the data lines D 1 -D 2m  of the LCD panel  60  are used to explain how to perform the layout according to the present invention. In the third embodiment, the middle connecting wire L m  not only includes the thinned sections B 1 -B t , but also is a zigzag-shaped wiring. The resistance of the connecting wire L m , hence, is increased by thinning the sections B 1 -B t  and by elongating the connecting wire L m . Therefore, the difference between the resistance of the connecting wire L m  and the resistance of the peripheral connecting wire L 1  or L 2m  can be reduced more effectively when the number of connecting wires L 1 -L 2m  is large.  
         [0024]     Even though the source driver IC S 1  and the data lines D 1 -D 2m  of the LCD panels  40 ,  60 , and  70  are used to describe how to perform the layout according to the present invention, it should be noted that the present invention also can be adopted to wiring between the scanning lines and the gate driver ICs of the LCD panels. The number of the connecting wires, the number and the lengths of the thinned sections, and the number of the connecting wires including the thinned sections are not limited by the above embodiments. In addition, the source driver ICs and the gate driver ICs can be positioned on a non-display area of the substrate of the LCD panel or be positioned adjacent to the substrate via a flexible printed circuit (FPC) board.  
         [0025]     In contrast with the prior art LCD panel, the mismatching RC effect during signal transmission of the LCD panels  40 ,  60 , and  70  of the present invention is reduced by executing an exposure procedure using a halftone mask to thin some sections of longer connecting wire connected to driver ICs. Therefore, the connecting wires can be wired within a limited layout area so that the number of connecting wires coupled to each driver IC is increased. The image quality of the LCD panels can be improved effectively. Moreover, the resolution of LCD panels can be increased, and the cost of LCD panels can be reduced.  
         [0026]     Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.