Abstract:
The disclosure regards to drivers and driving methods for a LED string consisting of LEDs. The LED string and a current switch are coupled in series between a power line and a ground line. The power line is powered to regulate a signal representing a current passing through the LED string. An enable signal capable of switching the current switch is provided. Whether a predetermined event occurs is detected. When the predetermined event occurs, the enable signal is clamped to have a predetermined logic value, the current switch thereby being kept either open or short.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
       [0001]    This application claims priority to and the benefit of Taiwan Application Series Number 101136768 filed on Oct. 5, 2012, which is incorporated by reference in its entirety. 
       BACKGROUND 
       [0002]    The present disclosure relates generally to drivers and driving methods for light emitting diodes (LEDs). 
         [0003]    Superior in power conversion efficiency, compact product size, and life span, LEDs are broadly popular in the industries of house lighting and panel backlight. For example, a great number of LCD backlight panels are currently using LED modules for backlight, rather than CCFL modules that were commonly adopted several years ago. 
         [0004]      FIG. 1  demonstrates a LED driver  10  capable of being used in a backlight module. The LED driver  10  drives a LED string  12  consisting of LEDs connected in series. In the LED driver  10 , a booster  18  converts power source V IN  at a major power line to power source V OUT  at an output power line OUT. A LED string  12  and a current switch  22  are connected in series between the output power line OUT and a ground line GND. A power controller  14  periodically turns ON and OFF a power switch  16  to control the power conversion of the booster  18 . While powering the output power line OUT, the major purpose of the power controller  14  is to stabilize a feedback voltage V FB  at the feedback node FB, equivalently stabilizing the current flowing through the LED string  12  and the brightness of the LED string  12 . 
         [0005]    A dimming signal S DIM  is fed to the enable node EN of the power controller  14 . A level shifter  20  shifts the dimming signal S DIM  with a logic level of 5V to become a switch signal S MOSDIM  with a logic level of 12V. When the dimming signal S DIM  is 5V in voltage level, or “1” in logic, the current switch  22  is ON, performing a short circuit, and the power controller  14  periodically switches the power switch  16  to regulate the feedback voltage V FB . Accordingly, the LED string  12  illuminates stably. 
         [0006]    When the dimming signal S DIM  is 0V in voltage level, or “0” in logic, the current switch is OFF, performing an open circuit, and the power controller  14  constantly turns OFF the power switch  16 . As there is no power converted to power the LED string  12 , it darkens. 
         [0007]    The design of the LED driver  10  shall take several abnormal events, such as LED open, LED short, output over voltage, or flickering, to name a few, into consideration. For example, if power source V OUT  at an output power line OUT is over high, it might impose electric shock to careless operators or fire accident to environment, such that output over voltage should be prevented. 
       SUMMARY 
       [0008]    Embodiments of the present invention disclose a driver for driving a LED string consisting of LEDs. The driver has a current switch and a switched mode power supply. The current switch is connected in series with the LED string between a power line and a ground line. The switched mode power supply powers the power line to regulate a signal representing a current passing through the LED string. The switched mode power supply comprises an enable node and a clamping circuit. An enable signal at the enable node is capable of switching the current switch. When a predetermined event occurs the clamping circuit clamps the enable signal to have a predetermined logic value, the current switch thereby being kept either open or short. 
         [0009]    Embodiments of the present invention disclose a driving method for a LED string consisting of LEDs. The LED string and a current switch are coupled in series between a power line and a ground line. The power line is powered to regulate a signal representing a current passing through the LED string. An enable signal capable of switching the current switch is provided. Whether a predetermined event occurs is detected. When the predetermined event occurs, the enable signal is clamped to have a predetermined logic value, the current switch thereby being kept either open or short. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0010]    The invention can be more fully understood by the subsequent detailed description and examples with references made to the accompanying drawings, wherein: 
           [0011]      FIG. 1  demonstrates a LED driver in the prior art; 
           [0012]      FIG. 2  shows a system circuit to mimic the event when the LED driver of  FIG. 1  encounters an LED short event; 
           [0013]      FIG. 3  shows an LED driver to drive a LED string according to embodiments of the invention; 
           [0014]      FIG. 4  illustrates time diagrams for signals in  FIG. 3 ; 
           [0015]      FIG. 5  demonstrates another LED driver according to embodiments of the invention; 
           [0016]      FIG. 6A  and  FIG. 6B  shows two time diagrams; and 
           [0017]      FIG. 7  demonstrates a power controller according to embodiments of the invention. 
       
    
    
     DETAILED DESCRIPTION 
       [0018]      FIG. 2  shows a system circuit to mimic the event when the LED driver  10  of  FIG. 1  encounters an LED short event. In comparison with the LED driver  10  of  FIG. 1 , additionally in  FIG. 2  is a switch  24 , connected in parallel to the LED string  12 . As mentioned in the section of “background”, when the dimming signal S DIM  is “1” in logic, the current switch  22  is ON and the power controller  14  periodically switches the power switch  16 . In the meantime, if switch  24  suddenly switches to perform a short circuit, which imitates the happening of an LED short event when all the LEDs in the LED string  12  are all shorted, the feedback voltage V FB  rises quickly as being pulled by the power source V OUT , which could be as high as 100V. In case there is no strategy designed to encounter the LED short event, the power controller  14  suffers the over high feedback voltage V FB , and risks itself in overvoltage damages or fire accidents caused. Analogously, as feedback voltage V FB  rises, a large amount of current will pass through the current switch  22  and resister  26 , probably causing overheat damage or getting fire. 
         [0019]      FIG. 3  shows an LED driver  30  to drive the LED string  12  according to embodiments of the invention. Designed in the LED driver  30  has LED short protection, which prevents damages or risks caused by an LED short event from happening. The LED driver  30  has a switched mode power supply  32 , a dimming controller  34  and a current switch  22 . 
         [0020]    The dimming controller  34  has a resister  38  and a level shifter  20 . The resistor  38  is coupled between a dimming node DIM and an enable node EN of the power controller  36 , and the level shifter  20  between the enable node EN and a control node of the current switch  22 . In the occasions when the power controller  36  does not drive the enable node EN, the power controller  36  provides high input impedance to the enable node EN, and a dimming signal S DIM  at the dimming node DIM alone controls the power controller  36  and the current switch  22 . In other words, in these occasions, an asserted dimming signal S DIM , “1” in logic, enables the power controller  36  to cause power conversion for powering the output power line OUT, and turns ON the current switch  22 , while an deasserted dimming signal S DIM  disable the power controller  36  to interrupt the power conversion and turns OFF the current switch  22 . 
         [0021]    Nevertheless, in some occasions the power controller  36  does drive the enable node EN, clamping the enable signal S EN  to be either “1” or “0” in logic, based on different conditions. When the enable node EN is driven by the power controller  36 , due to the existence of the resistor  38 , the enable signal S EN  has, for controlling the current switch  22 , a higher priority than the dimming signal S DIM . In other words, when the power controller  36  drives the enable node EN, the logic levels of the enable signal S EN  and the dimming signal S DIM  might differ, and the current switch  22  is under the control of the power controller  36 . When the power controller  36  leaves the enable node to be high input impedance, the current switch  22  is under the control of the dimming signal S DIM , and both the enable signal S EN  and the dimming signal S DIM  share the same logic value. 
         [0022]    In one embodiment, when the enable signal S EN  is asserted, “1” in logic, the power controller  36  generates pulse-width-modulation (PWM) signal S DRV  at the driving node DRV, to periodically switch the power switch  16  for powering the output power line OUT and building up power source V OUT , to regulate the feedback voltage V FB . For example, the power controller  36  modulates the duty cycle of the PWM signal S DRV  to stabilize the feedback voltage V FB  at 0.3V, and to accordingly provide a substantially constant current for lighting the LED string  12 . At the same time, the asserted enable signal S EN , via the level-shifting provided by the level shifter  20 , turns ON the current switch  22 . 
         [0023]    When the enable signal S EN  is deasserted, “0” in logic, the power controller  36  makes pulse-width-modulation (PWM) signal S DRV  “0” in logic, to constantly turn the power switch  16  OFF, stopping the power conversion. At the same time, the deasserted enable signal S EN , via the level-shifting provided by the level shifter  20 , becomes the signal S MOSDIM  to turn OFF the current switch  22 . 
         [0024]    Included in the power controller  36  are a booster controller  39 , a comparator  40 , a SR flip-flop  42 , a clamping switch  44  and a timer  46 , where the latter five apparatuses construct a LED protection circuit. 
         [0025]    The comparator  40  detects the feedback voltage V FB , which equally represents the current flowing through the resistor  26  and the LED string  12 . During normal operation when no abnormal event happens and the LED string  12  is intended to illuminate, the feedback voltage V FB  is about 0.3V, less than 0.5V, such that, in logic, the output of the comparator  40  is “0”, the Q output of the SR flip-flop  42  “0”, causing the clamping switch  44  an open circuit. As the clamping switch  44  does not clamp the enable node EN to the ground line, the enable signal S EN  could have the same logic value with the dimming signal S DIM . 
         [0026]    As discussed previously, once an LED short event occurs to the LED string  12 , the feedback voltage V FB  rises from 0.3V, quickly. At the time when it exceeds 0.5V, the comparator  40  sets the SR flip-flop  42  and the fault signal S Fault  output from the SR flip-flop  42  becomes “1” in logic, turning ON the clamping switch  44  and clamping the enable node EN to the ground line. The enable signal S EN  becomes solidly “0”, irrespective of which logic value the dimming signal S DIM  is. As the enable signal S EN  is “0”, the booster controller  39  turns OFF the power switch  16 , and the level shifter  20  OFF the current switch  22 . Since the current switch  22  begins reducing the current flowing through the resistor  26 , the feedback voltage V FB  then drops, such that an over-high-voltage feedback voltage V FB  is avoided and damage therefrom is prevented. Accordingly, an LED short protection is performed. 
         [0027]    This LED short protection is not dismissed even when the feedback voltage V FB  drops down to 0.5V due to the turning OFF of the current switch  22 . It is because the fault signal S Fault  could still be “1”, as memorized by the SR flip-flop  42 , to continuously clamp the enable signal S EN  to “0” in logic. 
         [0028]    The power controller  36  periodically dismisses the LED short protection, though, to stop clamping the enable signal S EN . The timer  46  starts timing at the moment when the enable signal S EN  turns to “0” in logic, or when the falling edge of the enable signal S EN  occurs. Once the timer  46  finds that the disable time when the enable signal S EN  continuously stays in “0” exceeds a preset valid period T OUT , it turns the power-saving signal S PD  of its output from “0” to “1”, to reset the SR flip-flop  42 , to make the fault signal S Fault  “0” in logic, and to release the enable signal S EN  from being clamped by the clamping switch  44 . After then, the enable signal S EN  starts to follow the dimming signal S DIM , and the LED short protection is dismissed. In case that the dimming signal S DIM  is “1” in logic and the LED short event has not been resolved, once the enable signal S EN  is seemingly determined to be “1”, the timer  46  resets, the power-saving signal S PD  turns from “1” to “0”, and the feedback voltage V FB  starts rising up quickly due to the continuous existence of the LED short event. Once again the feedback voltage V FB  will exceed 0.5V to trigger the LED short protection. Therefore, the power controller  36  periodically activates and dismisses the LED short protection. Only if the LED short event is resolved and the timer  46  has reset the SR flip-flop  42  to dismiss the LED short protection, then the power controller  36  could be controlled by the dimming signal S DIM , operating in a normal condition. 
         [0029]      FIG. 4  illustrates time diagrams for signals in  FIG. 3 , including, from top to bottom, the dimming signal S DIM , the enable signal S EN , the feedback voltage V FB , a signal S LEDSHT  that controls switch  24  which could mimic the happening of an LED short event, the fault signal S Fault , the switch signal S MOSDIM  at the control node of the current switch  22 , the PWM signal S DRV  at the driving node DRV, and the power-saving signal S PD . 
         [0030]    Please refer to both  FIG. 3  and  FIG. 4 . At time t 0  when the dimming signal S DIM  turns from “0” to “1”, the PWM signal S DRV  periodically switches, with a cycle time, the power switch  16  ON or OFF, the switch signal S MOSDIM  turns ON the current switch  22 , and the feedback voltage V FB  starts approaching to 0.3V. 
         [0031]    At time t 1 , the signal S LEDSHT  turns from “0” to “1”, to mimic the happening of the LED short event. As a result, the feedback voltage V FB  rises abruptly from 0.3V. 
         [0032]    At time t 2  when the feedback voltage V FB  reaches 0.5V, the LED short protection is triggered. As analyzed previously, the SR flip-flop  42  turns the fault signal S Fault  from “0” to “1”, clamping the enable signal S EN  at “0” in logic, such that both the PWM signal S DRV  and the switch signal S MOSDIM  both become “0” in logic. Meanwhile, as the falling edge of the enable signal S EN  occurs, the timer  46  starts timing. Furthermore, as the current switch  22  becomes an open circuit, the feedback voltage V FB  begins dropping. 
         [0033]    At time t 3 , the timer  46  acknowledges, byway of its timing, that the disable time period when the enable signal S EN  is “0” has exceeded a preset valid period T OUT . In other words, the LED short protection expires. Therefore, the timer  46  asserts the power-saving signal S PD  to provide a timeout for the LED short protection. The Asserted power-saving sign S PD  resets the fault signal S Fault , releasing the clamping to the enable signal S EN  and dismissing the LED short protection. It is therefore the enable signal S EN  starts to follow the dimming signal S DIM . Since the LED short event has not been resolved as the signal S LEDSHT  is still “1”, the feedback voltage V FB  rises steeply. 
         [0034]    At time t 4 , the feedback voltage V FB  reaches 0.5V, similar with what happened at time t 2 . Therefore, the LED short protection is triggered once more. It can be concluded that if the LED short event is not resolved the power controller  36  will periodically activate and dismiss the LED short protection. 
         [0035]    At time t 5  when the LED short event is resolved by means of turning the signal S LEDSHT  to “0”, the LED short protection is not immediately dismissed because the LED short protection has not expired. The timer  46  finds the expiration of the LED short protection at time t 6 , such that the LED protection is dismissed and the power controller  36  recovers to the normal operations as it did prior to time t 1 . 
         [0036]    As shown in  FIG. 3 , the power controller  36  might have an oscillator  37  to decide the cycle time of the PWM signal S DRV  and the preset valid period T OUT . In one embodiment, the oscillator  37  decides that one cycle time is 33 micro-seconds, while the present valid period T OUT  is 10000 cycle times. 
         [0037]    When the enable signal S EN  is “1”, asserted, the booster controller  39  provides the PWM signal S DRV  to periodically switch, with a cycle time defined by the oscillator  37 , the power switch  16  ON and OFF, based on the feedback voltage V FB , as illustrated in the period between times t 0  and t 1  of  FIG. 4 . When the enable signal S EN  is “0”, deasserted, the booster controller  39  keeps the PWM signal S DRV  as being “0”, turning OFF the power switch  16 , as illustrated in the period between times t 2  and t 3 . In one case that the enable signal S EN  stays as being “0” for a very long time exceeding the preset valid time T OUT , it probably means that the dimming signal S DIM  is intended to be a constant “0” and to continuously darken the LED string  12 . Any power consumed when the LED string  12  constantly darkens is a waste, though. In one embodiment, the asserted power-saving signal S PD  sets the power controller  36  to operate in a power-saving mode, shutting down some circuits therein to reduce power consumption. For example, in the power-saving mode, the booster controller  39 , the oscillator  37 , or their combination are shut down to save power. Both the two time periods for deciding the entrance of the power saving mode and the expiration of the LED short protection respectively are the preset valid time T OUT  in length. This invention is not limited to, however. In another embodiment, the former is longer than the latter. 
         [0038]    Based on the previous teaching, the LED driver  30  of  FIG. 3  according to embodiments of the invention can beneficially obtain the following achievements. 
         [0039]    1. LED short protection: When the LED short event occurs the power controller  36  could timely switch off the power conversion, preventing the feedback voltage V FB  from being over high to cause any damage. 
         [0040]    2. Automatic recovery to normal operation after the LED short event vanishes: When the LED short protection expires the power controller  36  temporarily dismisses the LED short protection, and if the LED short event is not resolved this LED short protection resumes soon. A timeout of the LED short protection is thus provided. During the timeout, if the LED short event vanished, the power controller  36  automatically starts to operate normally, making the LED string  12  illuminate for example. Namely, the timeout of the LED short protection provides an opportunity for the power controller  36  to automatically recover to its normal operation if the LED short event is resolved. 
         [0041]    3. Power saving: The dimming signal S DIM , if having been deasserted for a long time enough, can render the power controller  36  to operate in a power-saving mode and reduce power consumption. 
         [0042]    The prior art taught in  FIG. 1  has an unrevealed problem: flickering. In view of the stabilization of the overall system and the reduction of switching loss, the bandwidth of the system response for the LED driver  10  cannot be very broad. Generally, the bandwidth of a system design locates at somewhere between 100 KHz to 300 KHz. This choice of the bandwidth also defines a minimum response delay time, which is how soon the system responds to a change of an input signal, such as the dimming signal S DIM , and the broader the bandwidth the shorter the minimum response delay time. In case that the Dim-ON time, the pulse width when the dimming signal S DIM  is “1”, is shorter than the minimum response delay time, the LED driver  10  cannot response quick enough to stabilize the current passing the LED string  12 . This unstable current could cause the LED string  12  to illuminate for a while and darken for another while, and the periodic switching between illuminating and darkening, if perceivable to humans&#39; eyes, is called as flickering, which is commonly unwelcome or forbidden for a lighting system. 
         [0043]      FIG. 5  demonstrates another LED driver  80  according to embodiments of the invention, for driving the LED string  12 , where the power controller  83  in the switched mode power supply  82  defines a minimum ON time to the LED string  12  to avoid the flickering. The minimum ON time is the minimum time that the LED string  12 , if once driven to illuminate, must last to illuminate. 
         [0044]    The power controller  83  includes a clamping circuit  84 , which comprises a rising-edge-triggered pulse generator  86  and a clamping switch  88 . When a rising edge of the enable signal S EN  occurs, meaning that it turns from “0” to “1” in logic, the rising-edge-triggered pulse generator  86  generates a pulse S PLS  with a pulse width of minimum duration T MIN-ON . This pulse S PLS  makes the enable signal S EN  clamped to be 5V in voltage level, or “1” in logic, for the minimum duration T MIN-ON  irrespective of the present logic value of the dimming signal S DIM . The pulse S PLS  vanishes after the minimum duration T MIN-ON  and the clamping switch  88  stops clamping the enable signal S EN , letting the enable signal S EN  follow the dimming signal S DIM . As indicated in the previous teaching, when the enable signal S EN  is asserted, “1” in logic, the LED string  12  illuminates. 
         [0045]    Two time diagrams are shown in  FIG. 6A  and  FIG. 6B , respectively, and the signals in each figure, from top to bottom, are the dimming signal S DIM , the pulse S PLS , and the enable signal S EN . In  FIG. 6A , even though the Dim-ON time of the dimming signal S DIM  is shorter than the minimum duration T MIN-ON  the duration when the enable signal S EN  is “1” is about the minimum duration T MIN-ON  defined by the pulse S PLS , because of the clamping provided by the clamping circuit  84 . In  FIG. 6B , the duration when the enable signal S EN  is “1” is about the same with the Dim-ON time of the dimming signal S DIM , which is longer than the minimum duration T MIN-ON . It can be concluded from  FIGS. 5, 6A and 6B  that the illumination of the LED string  12 , once starting, lasts at least the minimum duration T MIN-ON  which accordingly defines the minimum ON time of the LED string  12 . If the minimum duration T MIN-ON  is chosen to be longer than the minimum response delay time of the LED driver  10 , the flickering that occurs in the prior art could be avoided. 
         [0046]    In one embodiment, the minimum duration T MIN-ON  is two or three cycle times of the PWM signal S DRV . In other words, the minimum duration T MIN-ON  could be decided by the oscillator  37 . 
         [0047]    The LED short protection of  FIG. 3  and the minimum duration T MIN-ON  of  FIG. 5  could together be implemented in a power controller, as exemplified in  FIG. 7 . In an embodiment, the power controller  92  of  FIG. 7  replaces the power controller  36  in  FIG. 3 . Inside the power controller  92  are the clamping circuit  84  and LED short protection circuit  93 , both of which are explained and detailed in previous paragraphs with references to  FIG. 3  and  FIG. 5 , such that their explanations are omitted for brevity. In  FIG. 7 , the oscillator  37  defines one cycle time of the PWM signal S DRV , which could associate with the preset valid period T OUT  and the minimum duration T MIN-ON . 
         [0048]    While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.