Abstract:
A structure and a fabrication method for a nitride semiconductor device are provided so that the device has a lower defect density resulted from incompatible lattice constants between its constituent layers. The nitride semiconductor device contains a substrate, at least a first intermediate layer made of aluminum-gallium-indium-nitride (Al 1-x-y Ga x In y N) at least a second intermediate layer made of silicon-nitride (Si i N j ) or magnesium-nitride (Mg m N n ), and a nitride epitaxial layer. The second intermediate layer is used to form a mask so that the subsequent epitaxial growth would have a smaller defect density and a better epitaxial quality.

Description:
BACKGROUND OF THE INVENTION  
       [0001]     1. Field of the Invention  
         [0002]     The present invention relates to the nitride semiconductor device, and in particular to the epitaxial structure and fabrication method of the nitride semiconductor device.  
         [0003]     2. The Prior Arts  
         [0004]     According to prior arts, a conventional nitride semiconductor device such as a gallium-nitride (GaN) based light emitting diode (LED) has an epitaxial layer formed on top of a buffer layer, which in turn is formed on top of a substrate. Usually, the buffer layer within these conventional nitride semiconductor devices is formed by depositing aluminum-gallium-nitride (Al x Ga 1-x N, 1≧x≧0) or indium-gallium-nitride (In y Ga 1-y N, 1≧y≧0) under a low temperature (200-900° C.). The nitride epitaxial layer is then formed under a high temperature on the buffer layer. However, there is a huge difference between the substrate and the nitride epitaxial layer in terms of their lattice constants. This huge difference in the lattice structure causes the nitride epitaxial layer subsequently formed to have a defect density more than 10 10 /cm 3 . The nitride semiconductor device such as a GaN-based LED as fabricated has a poor resilience to electrostatic discharge, a short operation life, and inferior device characteristics.  
         [0005]     Accordingly, the present invention is directed to overcome the foregoing disadvantages of conventional nitride semiconductor devices according to prior arts.  
       SUMMARY OF THE INVENTION  
       [0006]     The present invention provides a structure and a fabrication method for a nitride semiconductor device so that the limitations and disadvantages from the prior arts can be obviated practically.  
         [0007]     The present invention utilizes appropriate intermediate layers to replace the conventional buffer layer. With the present invention, the nitride epitaxial layer is deposited on top of an intermediate layer made of either silicon-nitride (Si i N j , i, j≧0) or magnesium-nitride (Mg m N n , m, n≧0), which in turn is formed on top of another intermediate layer made of aluminum-gallium-indium-nitride (Al 1-x-y Ga x In y N x, y≧0, 1≧x+y≧0). The defect density of the nitride epitaxial layer can be reduced to below 10 10 /cm 3  within this structure. Both intermediate layers are formed by the metalorganic chemical vapor deposition (MOCVD) technique. For the intermediate layer made of Si i N j  (i, j≧0) or Mg m N n  (m, n≧0), ammonia (NH 3 ) and silane (SiH 4 ), or NH 3  and disilane (Si 2 H 6 ) are used to grow the Si i N j  (i, j≧0) during the MOCVD process. On the other hand, NH 3  and cyclopenta-dienyl-magnesium (CP 2 Mg) are used to grow Mg m N n  (m, n≧0) during the MOCVD process.  
         [0008]     The present invention&#39;s reduction of the defect density of the nitride epitaxial layer lies in the phenomenon that, when the Si i N j  (i, j≧0) or Mg m N n  (m, n≧0) intermediate layer is deposited on the A 1-x-y Ga x In y N (x, y≧0, 1≧x+y≧0) intermediate layer, the material Si i N j  or Mg m N n  forms a mask having a random, clustered pattern. The nitride epitaxial layer subsequently deposited grows from the exposed Al 1-x-y Ga x In y N (x, y≧0, 1≧x+y≧0) intermediate layer not covered by the Si i N j  (i, j≧0) or Mg m N n  (m, n≧0) mask, and then overflowed to the top of the mask, instead of directly from the top of the mask. A nitride epitaxial layer with lower defect density is thereby formed.  
         [0009]     The foregoing and other objects, features, aspects and advantages of the present invention will become better understood from a careful reading of a detailed description provided herein below with appropriate reference to the accompanying drawings. 
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0010]      FIG. 1  is a schematic diagram showing the structure of the nitride semiconductor device according to the first embodiment of present invention.  
         [0011]      FIG. 2  is a flow diagram showing the processing steps for forming the nitride semiconductor device as depicted in  FIG. 1 .  
         [0012]      FIG. 3  is a schematic diagram showing the structure of the nitride semiconductor device according to the second embodiment of present invention.  
         [0013]      FIG. 4  is a schematic diagram showing the structure of the nitride semiconductor device according to the third embodiment of present invention.  
         [0014]      FIG. 5  is a flow diagram showing the processing steps for forming the nitride semiconductor device as depicted in  FIG. 4 .  
         [0015]      FIG. 6  is a schematic diagram showing the structure of the nitride semiconductor device according to the fourth embodiment of present invention. 
     
    
     DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS  
       [0016]     In the following, detailed description along with the accompanied drawings is given to better explain preferred embodiments of the present invention. Please be noted that, in the accompanied drawings, some parts are not drawn to scale or are somewhat exaggerated, so that people skilled in the art can better understand the principles of the present invention.  
         [0017]      FIG. 1  is a schematic diagram showing the structure of the nitride semiconductor device according to the first embodiment of present invention.  FIG. 2  is a flow diagram showing the processing steps for forming the nitride semiconductor device as depicted in  FIG. 1 . As shown in  FIG. 1 , the nitride semiconductor device is formed by stacking a first intermediate layer  102 , a second intermediate layer  103 , and a nitride epitaxial layer  104 , sequentially in this order from bottom to top on a substrate  101 . The second intermediate layer  103 , when deposited, would form a mask having a random, clustered pattern on the first intermediate layer  102 . The nitride epitaxial layer  104  subsequent deposited then grows from the exposed first intermediate layer  102  not covered by the mask of the second intermediate layer  103 , and overflows to cover the top of the mask of the second intermediate layer  103 . The processing steps, as shown in  FIG. 2 , include: on the substrate  101 , forming the first intermediate layer  102  made of Al 1-x-y Ga x In y N (x, y≧0, 1≧x+y≧0) having a thickness between 5 Å and 10 Å by using a MOCVD process under a temperature between 200° C. and 1000° C. (step  201 ); forming the second intermediate layer  103  made of Si i N j  (i, j≧0) having a thickness between 5 Å and 100 Å by using NH 3  and SiH 4  (or using NH 3  and Si 2 H 6 ) in a MOCVD process under a temperature between 200° C. and 1000° C. on the first intermediate layer  102  (step  202 ); and forming a nitride epitaxial layer  104  by using a MOCVD process under a temperature between 700° C. and 1100° C. on the second intermediate layer  103  (step  203 ).  
         [0018]     The foregoing second intermediate layer  103  can also be made of Mg m N n  (m, n≧0) by using NH 3  and CP 2 Mg in the MOCVD process.  
         [0019]     When the second intermediate layer  103  is made of Si i N j  (i, j≧0) or Mg m N n  (m, n≧0), the material Si i N j  or Mg m N n  forms a mask having a random, clustered pattern on the first intermediate layer  102 . The nitride epitaxial layer  104  subsequently deposited then grows from the exposed first intermediate layer  102  not covered by the Si i N j  or Mg m N n  mask, and overflows to cover the top of the second intermediate layer  103 , instead of directly from the top of the second intermediate layer  103 . The nitride epitaxial layer  104  therefore has a lower defect density.  
         [0020]      FIG. 3  is a schematic diagram showing the structure of the nitride semiconductor device according to the second embodiment of present invention. As shown in  FIG. 3 , the nitride semiconductor device contains multiple first and second intermediate layers  102  and  103  stacked alternately upon each other between the substrate  101  and the nitride epitaxial layer  104 . More specifically, on the substrate  101 , the steps  201  and  202  as depicted in  FIG. 2  are performed in sequence to form the first pair of the first and second intermediate layers  102  and  103 . But before the step  203  is performed, the steps  201  and  202  are repeated at least once so that additional pairs of the first and second intermediate layers  102  and  103  are formed and stacked upon one another. Each of the first intermediate layers  102  is made of Al 1-p-q Ga p In q N (p, q≧0, 1≧p+q≧0) with a specific composition, and has a thickness between 5 Å and 10 Å. Similarly, each of the second intermediate layers  103  is made of Si a N b  (a, b≧0) or Mg c N d  (c, d≧0) with a specific composition, and has a thickness between 5 Å and 100 Å. At last, the step  203  is performed to form the nitride epitaxial layer  104  on top of the topmost second intermediate layer  103 .  
         [0021]     As in the first embodiment of the present invention, the Si a N b  or Mg c N d  of each of the second intermediate layer  103  forms a mask having a random, clustered pattern on the underlying first intermediate layer  102 . The next first intermediate layer  102  or the nitride epitaxial layer  104  subsequent deposited then grows from the exposed, underlying first intermediate layer  102  not covered by the Si a N b  or Mg c N d  mask, and then overflows to cover the top of the underlying second intermediate layer  103 . The next first intermediate layer  102  or the nitride epitaxial layer  104  therefore has a lower defect density.  
         [0022]      FIG. 4  is a schematic diagram showing the structure of the nitride semiconductor device according to the third embodiment of present invention.  FIG. 5  is a flow diagram showing the processing steps for forming the nitride semiconductor device as depicted in  FIG. 4 . As shown in  FIG. 4 , the nitride semiconductor device is formed by stacking a lower first intermediate layer  402 , a second intermediate layer  403 , an upper first intermediate layer  402 , and a nitride epitaxial layer  404 , sequentially in this order from bottom to top on a substrate  401 . The second intermediate layer  403 , when deposited, would form a mask having a random, clustered pattern on the lower first intermediate layer  402 . The upper first intermediate layer  402  subsequent deposited then grows from the exposed, lower first intermediate layer  402 , and overflows to cover the top of the mask of the second intermediate layer  403 . The upper first intermediate layer  402  is added to enhance the epitaxial quality of the nitride epitaxial layer  404 . The processing steps, as shown in  FIG. 5 , include: on the substrate  101 , forming the lower first intermediate layer  402  made of Al 1-s-t Ga s In t N (s, t≧0, 1≧s+t≧0) having a thickness between 5 Å and 10 Å by using a MOCVD process under a temperature between 200° C. and 1000° C. (step  501 ); forming the second intermediate layer  403  made of Si e N f  (e, f≧0) having a thickness between 5 Å and 100 Å by using NH 3  and SiH 4  (or using NH 3  and Si 2 H 6 ) in a MOCVD process under a temperature between 200° C. and 1000° C. on the first intermediate layer  402  (step  502 ); forming the upper first intermediate layer  402  made of Al 1-u-v Ga u In v N (u, v≧0, 1≧u+v≧0) having a thickness between 5 Å and 10 Å by using a MOCVD process under a temperature between 200° C. and 1000° C. on the second intermediate layer  403  (step  503 ); and forming a nitride epitaxial layer  404  through a common epitaxial technique under a temperature between 700° C. and 1100° C. on the upper first intermediate layer  402  (step  504 ).  
         [0023]     The foregoing second intermediate layer  403  can also be made of Mg g N h  (g, h≧0) by using NH 3  and CP 2 Mg in the MOCVD process.  
         [0024]      FIG. 6  is a schematic diagram showing the structure of the nitride semiconductor device according to the fourth embodiment of present invention. As shown in  FIG. 6 , the nitride semiconductor device contains multiple first and second intermediate layers  402  and  403  stacked alternately upon each other between the substrate  401  and the nitride epitaxial layer  404 . More specifically, on the substrate  401 , the steps  501 ,  502 , and  503  as depicted in  FIG. 5  are performed in sequence to form the lower first intermediate layer  402 , the second intermediate layer  403 , and the upper first intermediate layers  402 . But before the step  504  is performed, the steps  502  and  503  are repeated so that additional pairs of the second and first intermediate layers  403  and  402  are formed and stacked upon one another, and the topmost layer is the first intermediate layer  402 . Each of the first intermediate layers  402  is made of Al 1-w-z Ga w In z N (w, z≧0, 1≧w+z≧0) with a specific composition and has a thickness between 5 Å and 10 Å. Similarly, each of the second intermediate layers  403  is made of Si k N 1  (k, 1≧0) or Mg s N t  (s, t≧0) with a specific composition, and has a thickness between 5 Å and 100 Å. At last, the step  504  is performed to form the nitride epitaxial layer  404  on top of the topmost first intermediate layer  402 .  
         [0025]     In the third embodiment and the fourth embodiments of the present invention, the Si k N 1  (k, 1≧0) or Mg s N t  (s, t≧0) of each of the second intermediate layer  403  forms a mask having a random, clustered pattern on the underlying first intermediate layer  402 . The next intermediate layer  402  subsequent deposited then grows from the exposed, underlying first intermediate layer  402  not covered by the Si k N 1  or Mg s N t  mask, and overflows to cover the top of the second intermediate layer  403 . The next first intermediate layer  402  therefore has a lower defect density. Accordingly, the nitride epitaxial layer  404  formed on the topmost first intermediate layer  402  also has a lower defect density.  
         [0026]     Although the present invention has been described with reference to the preferred embodiments, it will be understood that the invention is not limited to the details described thereof. Various substitutions and modifications have been suggested in the foregoing description, and others will occur to those of ordinary skill in the art. Therefore, all such substitutions and modifications are intended to be embraced within the scope of the invention as defined in the appended claims.