Abstract:
A semiconductor device comprising: a substrate; a terminal on the substrate&#39;s first surface; a first electrode on the first surface connected to the terminal; an electronic element on the substrate&#39;s second surface; a second electrode connected to the electronic element; a groove on the second surface leading to the second electrode; a conductive portion inside the grove connected to the second electrode&#39;s rear face; a first wiring on the first surface connected to the first electrode; a second wiring connecting the first wiring and the terminal; a stress-absorbing layer between the substrate and terminal; a land connecting the first wiring and the second wiring, the land opening a part of the stress-absorbing layer and exposing the first wiring, the land being in a region surrounded by terminals, and the land being along a straight line connecting the centers of diagonal terminals, with the region between the terminals.

Description:
CROSS-REFERENCE TO RELATED APPLICATION 
       [0001]    This application is a continuation of U.S. patent application Ser. No. 12/237,750, which is a divisional of U.S. Pat. No. 7,495,331 issued Feb. 24, 2009, which claims priority to Japanese Patent Application No. 2005-168373, filed Jun. 8, 2005, the contents of which are incorporated herein by reference. 
     
    
     BACKGROUND 
       [0002]    1. Technical Field 
         [0003]    The present invention relates to a semiconductor device, a manufacturing method for a semiconductor device, an electronic component, a circuit substrate, and an electronic apparatus. 
         [0004]    2. Related Art 
         [0005]    Recently, electronic components including surface acoustic wave elements (hereinafter abbreviated as ‘SAW element’) as, for example, resonators and band filters are used in electronic apparatuses such as mobile telephones and television receivers. 
         [0006]    Japanese Unexamined Patent Application, First Publication No. 2002-290184 and Japanese Unexamined Patent Application, First Publication No. 2002-290200 disclose examples of techniques relating to electronic components including SAW elements. 
         [0007]    Japanese Unexamined Patent Application, First Publication No. 2002-290184 discloses a technique relating to an electronic component package in which a SAW element and an integrated circuit driving and controlling the SAW element are arranged in the same space. 
         [0008]    Japanese Unexamined Patent Application, First Publication No. 2002-290200 discloses a technique relating to an electronic component package in which a SAW element is packaged on a first substrate and an integrated circuit is packaged on a second substrate. 
         [0009]    Requests to miniaturize electronic apparatuses in which electronic components including SAW elements are packaged are being accompanied by requests to miniaturize electronic components including semiconductor devices and electronic apparatuses, on which electronic elements such as SAW elements are packaged. 
         [0010]    However, the configuration disclosed in Japanese Unexamined Patent Application, First Publication No. 2002-290184 is difficult to miniaturize, since the SAW element and the integrated circuit are arranged in parallel. 
         [0011]    Similarly, the configuration disclosed in Japanese Unexamined Patent Application, First Publication No. 2002-290200 is difficult to make thin (small), since the first substrate on which the SAW element is packaged, and the second substrate on which the integrated circuit is packaged, are superimposed. 
         [0012]    In addition to electronic components including SAW elements, there are also demands for smaller electronic components including electronic elements which require airtight sealing, such as crystal oscillators, and piezoelectric oscillators, and piezoelectric tuning-forks. 
       SUMMARY 
       [0013]    An advantage of some aspects of the invention is to provide a semiconductor device, a manufacturing method for a semiconductor device, an electronic component, a circuit substrate, and an electronic apparatus, which can be made smaller, thinner, and achieve higher performance. 
         [0014]    A first aspect of the invention provides a semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode. 
         [0015]    According to the semiconductor device of the first aspect of the invention, since the conductive portion is formed in the groove portion having a bottom face including at least part of the rear face of the second electrode, the second electrode and the electronic element can be electrically connected via the conductive portion. 
         [0016]    Furthermore, since the first electrode is electrically connected to the external connection terminal, the overall semiconductor device which can be connected to an external apparatus (e.g., a circuit substrate) and the similar, can be made smaller and thinner, and its performance can be increased. 
         [0017]    It is preferable that the semiconductor device of the first aspect of the invention further include: an interconnection formed on the first face of the semiconductor substrate and electrically connected to the first electrode and the external connection terminal; and a stress-absorbing layer formed between the semiconductor substrate and the external connection terminal. 
         [0018]    According to the semiconductor device of the first aspect of the invention, since the semiconductor device is provided with the interconnection by connecting the first electrode to the external connection terminal via the interconnection, the shape and arrangement of the external connection terminal can be set more freely. 
         [0019]    In addition, the stress-absorbing layer increases the reliability of the connection between the semiconductor device and external apparatuses and the similar. 
         [0020]    It is preferable that the semiconductor device of the first aspect of the invention further include: a metal film formed on the top face of the second electrode and including an identical material of the interconnection. 
         [0021]    In the semiconductor device of the first aspect of the invention, a material which is highly resistant to corrosion is generally used for the interconnection. 
         [0022]    Therefore, by forming the metal film from the identical material of the interconnection on the top face of the second electrode, corrosion of the top face of the second electrode can be prevented, and the generation of electrical malfunctions can be prevented. 
         [0023]    It is preferable that the semiconductor device of the first aspect of the invention further include: a connection electrode formed on the second face of the semiconductor substrate and electrically connected to the conductive portion. 
         [0024]    In the semiconductor device according to the first aspect of the invention, by providing the connection electrode electrically connected to the conductive portion (e.g., by forming a connection electrode corresponding to the electrode shape of the electronic element), the degree of freedom when designing the connection structure of the electronic element can be increased. 
         [0025]    A second aspect of the invention provides manufacturing method for a semiconductor device includes: preparing a semiconductor substrate including a first face and a second face on a side opposite to the first face; forming a first electrode on the first face of the semiconductor substrate; forming a second electrode having a top face and a rear face on the first face of the semiconductor substrate; forming on the first face of the semiconductor substrate an interconnection electrically connected to the first electrode; electrically connecting the first electrode to the interconnection by forming an external connection terminal connected to the interconnection on the first face of the semiconductor substrate; forming a stress-absorbing layer between the semiconductor substrate and the external connection terminal; forming a groove portion having a bottom face including at least part of the rear face of the second electrode, on the second face of the semiconductor substrate; forming an insulating film on side wall of the groove portion; and forming in the groove portion a conductive portion electrically connecting an electronic element to the second electrode. 
         [0026]    According to the manufacturing method for semiconductor device of the second aspect of the invention, since the groove portion is formed from the second face of the semiconductor substrate on which the second electrode is not formed, it becomes easier to form the conductive portion for electrically connecting to the second electrode. 
         [0027]    Since the conductive portion for electrically connecting to the second electrode is formed after forming the insulating film on the side walls of the grooves section, the conductive portion and the semiconductor substrate can be reliably insulated. 
         [0028]    This enables a voltage to be applied accurately from the second electrode to the electronic element via the conductive portion, whereby the electronic element can be driven reliably. 
         [0029]    It is preferable that, in the manufacturing method for the semiconductor device of the second aspect of the invention, photolithography and etching be used in the forming of the groove portion. 
         [0030]    According to the manufacturing method for semiconductor device of the second aspect of the invention, by using photolithography and etching, the groove portion can be precisely formed in the semiconductor substrate. 
         [0031]    It is preferable that the manufacturing method for the semiconductor device of the second aspect of the invention further include: forming a connection electrode electrically connected to the conductive portion, on the second face of the semiconductor substrate, and connection electrode and the conductive portion be formed in one operation. 
         [0032]    In the manufacturing method for semiconductor device according to the second aspect of the invention, by forming the connection electrode and the conductive portion in one operation, the semiconductor device can be manufactured efficiently and the manufacturing cost can be reduced. 
         [0033]    It is preferable that the manufacturing method for the semiconductor device of the second aspect of the invention further include: forming a plurality of semiconductor devices on the semiconductor substrate in one operation; dividing each of the semiconductor devices by cutting the semiconductor substrate; and obtaining a plurality of individual semiconductor devices. 
         [0034]    According to the manufacturing method for semiconductor device of the second aspect of the invention, a plurality of semiconductor devices are formed simultaneously on the substrate and the substrate is then cut into individual semiconductor devices, it is possible to reduce the manufacturing cost of the semiconductor device. 
         [0035]    A third aspect of the invention provides a electronic component includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode; and a sealing member sealing the electronic element. 
         [0036]    According to the electronic component of the third aspect of the invention, by forming the electronic element on the second face of the semiconductor substrate and electrically connecting the electronic element to the conductive portion, the second electrode can be electrically connected to the electronic element via the conductive portion. 
         [0037]    Furthermore, since the first electrode is electrically connected to the external connection terminal, the overall electronic component which can be connected to external apparatuses and the similar can be made smaller and thinner. 
         [0038]    Moreover, since the electronic element is sealed by the sealing member, the overall electronic component can be made smaller and thinner while enabling the electronic element to be driven reliably. 
         [0039]    It is preferable that, in the electronic component of the third aspect of the invention, the sealing member be spaced from the second face of the semiconductor substrate, and include a facing face facing the second face of the semiconductor substrate, and the electronic element is formed on the facing face. 
         [0040]    According to the electronic component of the third aspect of the invention, since the electronic element is formed on a facing face of the sealing member, the electronic element can be sealed by electrically connecting the electronic element to the conductive portion. 
         [0041]    Therefore, a sealed electronic component can be obtained with a simple configuration. 
         [0042]    It is preferable that the electronic component of the third aspect of the invention further include: a supporting substrate supporting the electronic element, and the sealing member spaced from the second face of the semiconductor substrate, and the supporting substrate be arranged between the sealing member and the semiconductor substrate. 
         [0043]    According to the electronic component of the third aspect of the invention, since the electronic element is formed on the supporting substrate, it is possible to electrically connect the electronic element and the conductive portion, while the supporting substrate supports the electronic element. 
         [0044]    This enables the electronic element to be driven reliably. 
         [0045]    It is preferable that the electronic component of the third aspect of the invention further include: a supporting substrate spaced from the second face of the semiconductor substrate and supporting the electronic element, and the sealing member seals the electronic element supported by the supporting substrate and include an electronic element electrode electrically connected to the electronic element. 
         [0046]    According to the electronic component of the third aspect of the invention, since the electronic element supported by the supporting substrate is sealed by the sealing member, the electronic element can be made smaller and thinner, and driven reliably, by connecting the electronic element electrode formed on the sealing member to the conductive portion. 
         [0047]    It is preferable that the electronic component of the third aspect of the invention further include: a connection electrode formed on the second face of the semiconductor substrate and electrically connecting the conductive portion to the electronic element. 
         [0048]    According to the electronic component of the third aspect of the invention, by forming a connection electrode which, for example, corresponds to the electrode shape of the electronic element, a reliably state of conduction can be obtained between the electronic element and the second electrode. 
         [0049]    A fourth aspect of the invention provides a circuit substrate on which the above described electronic component is packaged. 
         [0050]    According to the circuit substrate of the fourth aspect of the invention, it is possible to provide a circuit substrate on which a small and thin electronic component is packaged (e.g., a printed wiring board). 
         [0051]    Therefore, even if this circuit substrate is packaged in an electronic apparatus or the similar, an increase in the size of the electronic apparatus can be prevented. 
         [0052]    A fifth aspect of the invention provides an electronic apparatus in which the above described electronic component is packaged. 
         [0053]    According to the electronic apparatus of the fifth aspect of the invention, it is possible to provide an electronic apparatus in which a small and thin electronic component is packaged. 
         [0054]    This enables the electronic apparatus to be made smaller. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0055]      FIG. 1  is a cross-sectional view of a semiconductor device according to an embodiment of this invention. 
           [0056]      FIG. 2  is a plan view from the arrow A of the semiconductor device of  FIG. 1 . 
           [0057]      FIG. 3  is a plan view from the arrow B of the semiconductor device of  FIG. 1 . 
           [0058]      FIGS. 4A to 4C  are cross-sectional views of a manufacturing method for semiconductor device according to an embodiment of this invention. 
           [0059]      FIGS. 5A to 5C  are cross-sectional views of a manufacturing method for semiconductor device according to an embodiment of this invention. 
           [0060]      FIG. 6  is a cross-sectional view of a manufacturing method for semiconductor device according to an embodiment of this invention. 
           [0061]      FIG. 7  is a cross-sectional view of an electronic component according to an embodiment of this invention. 
           [0062]      FIG. 8  is a plan view of an electrode of the electronic component of  FIG. 7 . 
           [0063]      FIG. 9  is a cross-sectional view of an electronic component according to a second embodiment of this invention. 
           [0064]      FIG. 10  is a cross-sectional view of an electronic component according to a third embodiment of this invention. 
           [0065]      FIG. 11  is a cross-sectional view of an electronic component according to a fourth embodiment of this invention. 
           [0066]      FIG. 12  is a view of an electronic apparatus in which an electronic component of this invention is packaged. 
       
    
    
     DESCRIPTION OF EXEMPLARY EMBODIMENTS 
       [0067]    Embodiment of Semiconductor Device 
         [0068]    Subsequently, an embodiment of a semiconductor device of this invention will be explained with reference to  FIGS. 1 to 6 . 
         [0069]    As shown in  FIG. 1 , a semiconductor device  1  according to this embodiment includes a silicon substrate  10  (semiconductor substrate) and a connector  20 . 
         [0070]    The connector  20  is formed on a first face  10   a  of the silicon substrate  10 , and electrically connects a printed wiring board P (circuit substrate) to electrodes and interconnections formed on the first face  10   a . The printed wiring board P is an external apparatus. 
         [0071]    As shown in  FIG. 1 , a groove portion  11  is formed in a second face  10   b  which is on a side opposite to the first face  10   a  of the silicon substrate  10 . 
         [0072]    A bottom face of the groove portion  11  includes a rear face of a second electrode  23 . 
         [0073]    A conductive portion  12  is formed by filling the inside of groove portion  11  with a conductive material. 
         [0074]    An insulating film  13  is formed on side walls of the groove portion  11 , and electrically insulates the conductive portion  12  from the silicon substrate  10 . 
         [0075]    A rear face insulating layer  14  is formed on a top face of the second face  10   b  of the silicon substrate  10  in regions other than a region on which the groove portion  11  is formed. 
         [0076]    As shown in  FIG. 3 , rear face electrodes  15  (connection electrode) are formed on the rear face insulating layer  14 , and corresponds to electrodes of electronic elements, for example, surface acoustic wave (SAW) elements. 
         [0077]    The connector  20  includes a foundation layer  21  formed on the first face  10   a  of the silicon substrate  10 , a first electrode  22  and a second electrode  23  which are respectively formed in a plurality of predetermined regions of the foundation layer  21 , a first insulating layer  24 , and an interconnection section  30  formed on the first insulating layer  24 . 
         [0078]    The foundation layer  21  is formed from a conductive material such as silicon dioxide (SiO 2 ) and silicon nitride (Si 3 N 4 ). 
         [0079]    As materials of the first electrode  22  and the second electrode  23 , titanium (Ti), titanium nitride (TiN), aluminum (Al), copper (Cu), or an alloy of these can be used. 
         [0080]    The first insulating layer  24  is formed on the silicon substrate  10 , excepting the regions on which the first electrode  22  and the second electrode  23  are formed. 
         [0081]    While a plurality of electrodes may be formed in the silicon substrate  10  as shown in  FIG. 2 , only with respect to the first electrode  22  and the second electrode  23  are explained in this embodiment. 
         [0082]    The second electrode  23  may be covered by the first insulating layer  24 . 
         [0083]    An integrated circuit having a transistor and a memory element for example, is formed under the foundation layer  21 . 
         [0084]    This integrated circuit is electrically connected to the first electrode  22  and the second electrode  23 . 
         [0085]    As shown in  FIGS. 1 and 2 , the interconnection section  30  includes a first interconnection  31  (interconnection), a metal film  32 , a second insulating layer  33  (stress-absorbing layer), a second interconnection  34  (interconnection), and a third insulating layer  35 . 
         [0086]    The first interconnection  31  (interconnection) is electrically connected to the first electrode  22  formed on the first insulating layer  24 . 
         [0087]    The metal film  32  is formed on the top face of the second electrode  23 . 
         [0088]    The second insulating layer  33  (stress-absorbing layer) is formed over the first interconnection (interconnection)  31  and the metal film  32 . 
         [0089]    The second interconnection (interconnection)  34  is formed on the second insulating layer  33  and electrically connected to the first interconnection  31 . 
         [0090]    The third insulating layer  35  is formed on the second interconnection  34 . 
         [0091]    A part of the first interconnection  31  is exposed from the second insulating layer  33  to form a land section  36 . 
         [0092]    The land section  36  and the second interconnection  34  are electrically connected. 
         [0093]    Moreover, a bump (external connection terminal)  37  is formed on the second interconnection  34 , and the semiconductor device  1  is electrically connected via this bump  37  to the printed wiring board P. 
         [0094]    The third insulating layer  35  is formed on the second insulating layer  33  and the second interconnection  34 , excepting the region on which the bump  37  is formed. 
         [0095]    The first electrode  22  is electrically connected to the bump  37  via the first interconnection  31  and the second interconnection  34 . 
         [0096]    The second electrode  23  is formed on the foundation layer  21  formed on the first face  10   a  of the silicon substrate  10 . 
         [0097]    A part of the rear face of the second electrode  23  forms the bottom face of the groove portion  11 . 
         [0098]    Consequently, a rear face  23   a  of the second electrode  23  and a first end  12   a  of the conductive portion  12  are electrically connected inside the groove portion  11 . 
         [0099]    A second end  12   b  of the conductive portion  12  is electrically connected to the rear face electrode  15  formed in the second face  10   b  of the silicon substrate  10 . 
         [0100]    That is, the second electrode  23  is electrically connected to an electronic element formed in the second face  10   b  of the silicon substrate  10 . 
         [0101]    As examples of materials of the first interconnection  31  and the second interconnection  34 , gold (Au), copper (Cu), titanium (Ti), tungsten (W), titanium-tungsten (TiW), titanium nitride (TiN), nickel (Ni), nickel vanadium (NiV), chrome (Cr), aluminum (Al), and palladium (Pd) can be used. 
         [0102]    The structures of the first interconnection  31  and the second interconnection  34  may be single-layer structures of the above materials or laminated structures combining multiple layers. 
         [0103]    The first insulating layer  24 , the second insulating layer  33 , and the third insulating layer  35  are formed from resin (synthetic resin). 
         [0104]    Examples of materials for forming the first insulating layer  24 , the second insulating layer  33 , and the third insulating layer  35  can be used polyimide resin, silicon-modified polyimide resin, epoxy resin, silicon-modified epoxy resin, acrylic resin, phenol resin, benzocyclobutene (BCB), polybenzoxazole (PCB), or any material with insulating properties. 
         [0105]    The first insulating layer  24  may be formed from an insulating material such as silicon dioxide (SiO 2 ) and silicon nitride (Si 3 N 4 ). 
         [0106]    It is preferable that the material of the metal film  32  be the same as that of the first interconnection  31  and the second interconnection  34 . 
         [0107]    A metal such as Au, TiW, Cu, Cr, Ni, Ti, W, NiV, and Al can be used as the material for the metal film  32 . 
         [0108]    The metal film  32  may be laminated from these metals. 
         [0109]    It is preferable that the metal film  32  (at least one layer in the case of a laminated structure) be formed from a material with higher resistance to corrosion than the electrode, such as Au, TiW, and Cr. 
         [0110]    This prevents corrosion of the electrode and prevents generation of electrical malfunctions. 
         [0111]    Manufacturing Method for Semiconductor Device 
         [0112]    Subsequently, a manufacturing method for the semiconductor device  1  will be explained while referring to  FIGS. 4A to 5C . 
         [0113]    In this embodiment, a plurality of the semiconductor devices  1  are formed simultaneously in one operation on a single silicon substrate  100  (semiconductor substrate). 
         [0114]    Each of the  FIGS. 4A to 5C  below describes the formation of one semiconductor device  1 . 
         [0115]    Firstly, as shown in  FIG. 4A , the foundation layer  21  is formed on the first face  10   a  of the silicon substrate  10 . 
         [0116]    The first electrode  22  and the second electrode  23  are then formed on the foundation layer  21 . 
         [0117]    The first insulating layer  24  is then formed on the first electrode  22  and the second electrode  23 , and insulating material covering the first electrode  22  and the second electrode  23  is removed by a conventional method such as photolithography or etching. 
         [0118]    It is not absolutely necessary to remove the insulating material which covers the second electrode  23 . 
         [0119]    Next, the first interconnection  31  is formed on the first insulating layer  24  including the first electrode  22 , and the metal film  32  is formed on the top face of the second electrode  23 . 
         [0120]    The first interconnection  31  is formed by sequentially sputtering, for example, TiW and Cu, and then plating the Cu. 
         [0121]    The second insulating layer  33  is formed so as to cover the first interconnection  31  and the metal film  32 . 
         [0122]    The region corresponding to the land section  36  of the second insulating layer  33  is removed by a conventional photolithography method. 
         [0123]    A part of the first interconnection  31  is thereby exposed, the land section  36  is formed. 
         [0124]    The second interconnection  34  is formed on the second insulating layer  33  so as to connect to the land section  36 . 
         [0125]    The third insulating layer  35  is then formed so as to cover the second insulating layer  33  and the second interconnection  34 , excepting the region on which the bump  37  is formed on the second insulating layer  33  and the second interconnection  34 . 
         [0126]    As shown in  FIG. 4B , the sections of the silicon substrate  10  and the foundation layer  21  that correspond to the second electrode  23 , are removed by dry etching of the second face  10   b  of the silicon substrate  10  using a photoresist  40  as a mask. 
         [0127]    As shown in  FIG. 4C , the groove portion  11  is formed by etching from the second face  10   b  of the silicon substrate  10  to the rear face  23   a  of the second electrode  23  formed on the first face  10   a.    
         [0128]    In this embodiment, the photoresist  40  is used as a mask, there is no limitation on this, for example an SiO 2  film may be used as a hard mark, or a photoresist and a hard mask may be used together. 
         [0129]    The etching method is not limited to dry etching, it being acceptable to use wet etching, laser processing, or both of these. 
         [0130]    Subsequently, as shown in  FIG. 5A , the rear face insulating layer  14  and the insulating film  13  are formed on the second face  10   b  of the silicon substrate  10  and the inner walls of the groove portion  11 . 
         [0131]    The rear face insulating layer  14  and the insulating film  13  prevent generation of current leakage, corrosion of the silicon substrate  10  due to oxygen and water, and the similar. 
         [0132]    As materials of the rear face insulating layer  14  and of the insulating film  13 , tetraethyl orthosilicate (Si(OC 2 H 5 ) 4 : hereinafter TEOS) formed by using plasma-enhanced chemical vapor deposition (PECVD), namely PE-TEOS, and TEOS formed by using ozone CVD, namely O 3 -TEOS, and silicon dioxide (SiO 2 ) formed by using CVD, can be used. 
         [0133]    Other insulating materials may be used for the rear face insulating layer  14  and the insulating film  13 , even resin. 
         [0134]    The insulating film  13  formed on the rear face  23   a  of the second electrode  23  is removed by dry etching or laser processing to expose the rear face  23   a  of the second electrode  23  as shown in  FIG. 5B . 
         [0135]    The insulating film  13  remains on the side walls of the groove portion  11 . 
         [0136]    The inside of the groove portion  11  is plated using an electrochemical plating (ECP) method, a conductive material for forming the conductive portion  12  is deposited on the inner sides of the groove portion  11 , and the first end  12   a  of the conductive portion  12  is electrically connected to the exposed second electrode  23  on the rear face  23   a  of the second electrode  23 . 
         [0137]    Copper (Cu), for example, is used as the conductive material for forming the conductive portion  12 . 
         [0138]    Therefore, copper (Cu) is buried in the groove portion  11 . 
         [0139]    In this embodiment, the process of forming the conductive portion  12  includes, for example, a process of sputtering (laminating) TiN and Cu, and a process of plating the Cu. 
         [0140]    Alternatively, a process of sputtering (laminating) TiW and Cu, and a process of plating the Cu, may be included. 
         [0141]    The method for forming the conductive portion  12  is not limited to that mentioned above, a conductive paste, a molten metal, a metal wire, and the similar may be buried. 
         [0142]    The conductive portion  12  is buried inside the groove portion  11  in this embodiment. 
         [0143]    Instead of completely burying the conductive portion  12 , the conductive portion  12  may be formed on the inner walls of the groove portion  11  and be electrically connected to the rear face  23   a  of the second electrode  23 . 
         [0144]    As shown in  FIG. 5C , after forming the conductive portion  12 , the rear face electrode  15  which electrically connected to the conductive portion  12 , is formed on the second face  10   b  of the silicon substrate  10 . 
         [0145]    When forming the rear face electrode  15 , simultaneously with the conductive portion  12  may be formed. 
         [0146]    That is, the rear face electrode  15  and the conductive portion  12  may be formed in one operation. 
         [0147]    The bump  37  includes a lead-free solder for example, and is formed on the second interconnection  34  on the first face  10   a  of the silicon substrate  10 . 
         [0148]    When forming the bump  37 , a soldering ball may be packaged on the second interconnection  34  or a soldering paste may be printed onto the second interconnection  34 . 
         [0149]    By these processes, a plurality of semiconductor devices  1  can be simultaneously formed together on one silicon substrate  100 . 
         [0150]    As shown in  FIG. 6 , a dicing device divides each of the semiconductor devices  1  by cutting (dicing) the silicon substrate  100 . 
         [0151]    By forming the plurality of semiconductor devices  1  almost simultaneously on the silicon substrate  100  and dicing the silicon substrate  100  into the individual semiconductor devices  1 , a plurality of the semiconductor device  1  as shown in  FIG. 1  can be obtained. 
         [0152]    In this manner, the semiconductor device  1  can be manufactured efficiently and its manufacturing cost can be reduced. 
         [0153]    According to the semiconductor device  1  of this embodiment, by forming the conductive portion  12  inside the groove portion  11  as far as the second electrode  23 , the second electrode  23  and the electronic element can be electrically connected via the conductive portion  12 . 
         [0154]    Since the first electrode  22  and the bump  37  are electrically connected, it is possible to make the semiconductor device  1 , which can be connected to external devices and the similar, small and thinner, and increase its performance. 
       First Embodiment of Electronic Component 
       [0155]    Subsequently, a first embodiment of an electronic component  50 , in which an electronic element including a SAW element  60  (electronic element) is packaged on the semiconductor device  1 , will be explained with reference to  FIG. 7 . 
         [0156]    In each of the embodiments described below, parts which are identical with the configuration of the semiconductor device  1  according to the embodiment described above are represented by identical reference numerals and are not repetitiously explained. 
         [0157]    A semiconductor device  51  used in the electronic component  50  of this embodiment has the same configuration as the semiconductor device  1  described above, excepting that the rear face electrode  15  is not provided. 
         [0158]    As shown in  FIG. 8 , the electronic component  50  includes a piezoelectric film and a fork-type electrode  61  which touches the piezoelectric film. 
         [0159]    As shown in  FIG. 7 , the electronic component  50  is formed on the second face  10   b  of the silicon substrate  10 . 
         [0160]    The SAW element  60  is electrically connected to the second end  12   b  of the conductive portion  12 , and is formed directly on the second face  10   b.    
         [0161]    An integrated circuit including a transistor and a memory element, for example, is formed on the first face  10   a  of the silicon substrate  10 . 
         [0162]    The first end  12   a  of the conductive portion  12  is electrically connected to this integrated circuit via the second electrode  23 . 
         [0163]    Therefore, the SAW element  60  formed on the second face  10   b  of the silicon substrate  10  is electrically connected via the conductive portion  12  to the integrated circuit formed on the first face  10   a  of the silicon substrate  10 . 
         [0164]    The electronic component  50  includes a sealing member  52 . 
         [0165]    By arranging the SAW element  60  between the sealing member  52  and the second face  10   b  of the silicon substrate  10 , the SAW element  60  is sealed. 
         [0166]    While in this embodiment the sealing member  52  is made of a glass substrate, a silicon substrate may be used. 
         [0167]    The sealing member  52  is spaced from the second face  10   b  of the silicon substrate  10 . 
         [0168]    The peripheral edge of the second face  10   b  of the silicon substrate  10  is affixed to the peripheral edge of an inner face  52   a  of the sealing member  52  by an adhesive layer  53 . 
         [0169]    For example, a synthetic resin such as polyimide resin can be used as the material of the adhesive layer  53 . 
         [0170]    An internal space  55  enclosed by the second face  10   b  of the silicon substrate  10 , the inner face  52   a  of the sealing member  52 , and the adhesive layer  53  is substantially sealed (by an airtight seal), and the SAW element  60  is arranged in the internal space  55 . 
         [0171]    Manufacturing Method for Electronic Component 
         [0172]    Subsequently, a method for manufacturing the electronic component  50  will be explained. 
         [0173]    By performing a process similar to the method for manufacturing the semiconductor device  1  described above, the conductive portion  12  is formed, and the SAW element  60  is then formed on the second face  10   b  of the silicon substrate  10 . 
         [0174]    The process of forming this SAW element  60  includes a process of forming a piezoelectric film, a process of forming a fork-type electrode  61  touching the piezoelectric film such as shown in  FIG. 8 , and a process of forming a protective film. 
         [0175]    In addition, the process of forming the SAW element  60  includes a process of irradiating plasma or the similar onto the SAW element  60  and adjusting the frequency. 
         [0176]    As examples of materials used for the piezoelectric film, zinc oxide (ZnO), aluminum nitride (AlN), lithium niobate (LiNbO 3 ), lithium tantalate (LiTaO 3 ), and potassium niobate (KNbO 3 ) can be used. 
         [0177]    As a material of the fork-type electrode  61 , a metal including aluminum can be used. 
         [0178]    As the material of the protective film, Silicon dioxide (SiO 2 ), silicon nitride (Si 3 N 4 ), titanium nitride (TiN), and the similar, may be used. 
         [0179]    The SAW element  60  thus formed is electrically connected to the second end  12   b  of the conductive portion  12  on the second face  10   b  of the silicon substrate  10 . 
         [0180]    An adhesive for forming the adhesive layer  53  is provided on at least one of the second face  10   b  of the silicon substrate  10  and the inner face  52   a  of the sealing member  52 . 
         [0181]    A photosensitive polyimide adhesive or the similar can be used as the adhesive layer  53 . 
         [0182]    The silicon substrate  10  and the sealing member  52  are connected together with the second face  10   b  of the silicon substrate  10  and the inner face  52   a  of the sealing member  52  facing each other on opposite sides of this adhesive layer  53 . 
         [0183]    This obtains the electronic component  50  as shown in  FIG. 7 . 
         [0184]    The structure for sealing the SAW element  60  may be a vacuum seal achieved by making the internal space  55  a vacuum, a gas replacement seal achieved by replacing the atmosphere of the internal space  55  with a predetermined gas such as N 2 , Ar, and He, and the similar. 
         [0185]    When connecting the silicon substrate  10  and the sealing member  52 , metal protrusions may be formed along the peripheral edge of the second face  10   b  of the silicon substrate  10 , and a metal layer for affixing the metal protrusions may be formed on the inner face  52   a  of the sealing member  52 , the silicon substrate  10  and the sealing member  52  may be connected together via these metal protrusions and the metal layer. 
         [0186]    When a permeable glass is used as the sealing member  52 , after the sealing process, the frequency of the SAW element  60  can be adjusted by transmitting a laser or the similar through the glass. 
         [0187]    The bump made of a lead-free solder for example, is then packaged on the second interconnection  34  formed on the first face  10   a  of the silicon substrate  10 . 
         [0188]    When forming the bump  37 , a soldering ball may be packaged on the second interconnection  34  or a soldering paste may be printed onto the second interconnection  34 . 
         [0189]    In the manufacturing method of this electronic component  50 , in the same manner as the manufacturing method of the semiconductor device  1 , the electronic component  50 , the SAW element  60 , the sealing member  52 , and so on, are simultaneously formed together on the same silicon substrate (semiconductor substrate). 
         [0190]    The electronic component  50  is obtained by dividing individual electronic components  50  by using a dicing device  110  as in the manufacturing method of the semiconductor device  1 . 
         [0191]    This enables the electronic component  50  to be manufactured inexpensively. 
         [0192]    The manufactured electronic component  50  is packaged via the bump  37  on a printed wiring board P or the similar. 
         [0193]    In the electronic component  50  according to this embodiment, the SAW element  60  is formed on the second face  10   b  of the silicon substrate  10  and the second end  12   b  of the conductive portion  12  is connected to this SAW element  60 . 
         [0194]    In this case, by providing an integrated circuit for driving and for controlling the SAW element  60  on the first face  10   a  of the silicon substrate  10 , the SAW element  60  can be electrically connected to the integrated circuit via the conductive portion  12 . 
         [0195]    Therefore, the overall electronic component  50  can be made smaller and thinner while reliably sealing and driving the SAW element  60 . 
         [0196]    In addition, since SAW element  60  is sealed between the sealing member  52  and the second face  10   b , it is possible to realize smaller and thinner, to seal the SAW element  60 , and to drive the SAW element  60 . 
       Second Embodiment of Electronic Component 
       [0197]    Subsequently, a second embodiment of an electronic component  70 , in which an electronic element including a SAW element  71  is packaged on the semiconductor device  1  described above will be explained with reference to  FIG. 9 . 
         [0198]    In each of the embodiments described below, parts which are identical with the configuration of the semiconductor device  1  according to the above mentioned first embodiment are represented by identical reference numerals and are not repetitiously explained. 
         [0199]    The electronic component  70  of this embodiment differs from that of the first embodiment in that, instead of forming the SAW element  71  on the second face  10   b  of the silicon substrate  10 , the SAW element  71  is formed on the sealing member  52  which is spaced and is arranged separately from the second face  10   b  of the silicon substrate  10 . 
         [0200]    The SAW element  71  is formed on the inner face  52   a  (facing face) of the sealing member  52 . 
         [0201]    The inner face  52   a  is faced to the second face  10   b  of the silicon substrate  10 . 
         [0202]    The SAW element  71  includes a terminal  72  facing the second face  10   b  of the silicon substrate  10 . 
         [0203]    In a semiconductor device  73 , a rear face electrode  54  (connection electrode) is formed above the groove portion  11  in the second face  10   b  of the silicon substrate  10 . 
         [0204]    The rear face electrode  54  is electrically connected to the second end  12   b  of the conductive portion  12 . 
         [0205]    The rear face electrode  54  is formed at a position corresponding to the terminal  72  of the SAW element  71 . 
         [0206]    That is, the second electrode  23  is electrically connected to the SAW element  71  formed on the inner face (facing face)  52   a  of the sealing member  52  via the conductive portion  12  and the rear face electrode  54 . 
         [0207]    The sealing member  52  is, for example, a silicon substrate, a crystal substrate, and a substrate including silicon and diamond. 
         [0208]    A method for manufacturing the electronic component  70  will be explained. 
         [0209]    Firstly, the SAW element  71  is formed beforehand on the inner face  52   a  of the sealing member  52 . 
         [0210]    The rear face electrode  54  is formed on the second face  10   b  of the silicon substrate  10 . 
         [0211]    The terminal  72  is also formed. 
         [0212]    The silicon substrate  10  and the sealing member  52  are then connected via the adhesive layer  53  such that the rear face electrode  54  is electrically connected to the terminal  72 . 
         [0213]    This obtains the electronic component  70  as shown in  FIG. 9 . 
         [0214]    In the process of connecting the rear face electrode  54  to the terminal  72 , they may be pressed together by compressing the adhesive layer  53 . 
         [0215]    According to the electronic component  70  of this embodiment, since the SAW element  71  is formed on the sealing member  52  as a separate member from the silicon substrate  10 , the SAW element  71  is less liable to be affected by thermal stress and film stress applied to the silicon substrate  10 , obtaining superior characteristics. 
       Third Embodiment of Electronic Component 
       [0216]    Subsequently, a third embodiment of an electronic component  80 , in which an electronic element including a SAW element  81  is packaged on the semiconductor device  1  described above will be explained with reference to  FIG. 10 . 
         [0217]    The electronic component  80  according to this embodiment differs from the second embodiment in that, instead of forming the SAW element  81  on the second face  10   b  of the silicon substrate  10 , the SAW element  81  is formed on a supporting substrate  82 . 
         [0218]    The supporting substrate  82  is arranged between the second face  10   b  of the silicon substrate  10  and the sealing member  52  which is spaced from the second face  10   b  of the silicon substrate  10 . 
         [0219]    The SAW element  81  is formed on a face  82   a  of the supporting substrate  82  facing the second face  10   b  of the silicon substrate  10 . 
         [0220]    Moreover, a terminal  83  is formed on the SAW element  81  and faces the second face  10   b  of the silicon substrate  10  in the same manner as the electronic component  70  of the second embodiment. 
         [0221]    This terminal  83  is electrically connected to the rear face electrode  54 . 
         [0222]    According to the electronic component  80  of this embodiment, since the SAW element  81  is formed on the supporting substrate  82  which is a separate member from the silicon substrate  10 , the SAW element  81  is less liable to be affected by thermal stress and film stress applied to the silicon substrate  10 , obtaining superior characteristics. 
         [0223]    The supporting substrate  82  reliably supports the SAW element  81 , it is possible to electrically connect the SAW element  81  to the conductive portion  12 . 
       Fourth Embodiment of Electronic Component 
       [0224]    Subsequently, a fourth embodiment of an electronic component  90 , in which an electronic element including an AT oscillator (liquid crystal oscillator)  91  is packaged on the semiconductor device  1  will be explained with reference to  FIG. 11 . 
         [0225]    The electronic component  90  of this embodiment differs from that of the second embodiment in that the AT oscillator  91  is sealed by a sealing member  93  while being supported by a supporting substrate  92 . 
         [0226]    The supporting substrate  92  is spaced and is arranged separately from the second face  10   b  of the silicon substrate  10 . 
         [0227]    The AT oscillator  91  is formed on an inner face  92   a  of the supporting substrate  92  facing the second face  10   b  of the silicon substrate  10 . 
         [0228]    The AT oscillator  91  is sealed by the sealing member  93  made of a glass substrate which is provided between the supporting substrate  92  and the second face  10   b  of the silicon substrate  10 . 
         [0229]    An internal space  95  is enclosed by the inner face  92  of the supporting substrate  92  and an inner face  93   a  of the sealing member  93 , and sealed in an substantially airtight seal. 
         [0230]    An electronic element electrode  94  is provided on a face of the sealing member  93  which faces the second face  10   b  of the silicon substrate  10 . 
         [0231]    The electronic element electrode  94  covers the sealing member  93 . 
         [0232]    The electronic element electrode  94  and the rear face electrode  54  are electrically connected. 
         [0233]    That is, the second electrode  23  is electrically connected to the AT oscillator  91  via the conductive portion  12  formed on the silicon substrate  10  and the rear face electrode  54  formed on the second face  10   b  of the silicon substrate  10 . 
         [0234]    The peripheral edge of the second face  10   b  of the silicon substrate  10  and the peripheral edge of the supporting substrate  92  are sealed with a sealing resin  96 . 
         [0235]    The space between the second face  10   b  and the sealing member  93  is sealed by the sealing resin  96 . 
         [0236]    According to the electronic component  90  of this embodiment, since the AT oscillator is supported by the supporting substrate  92  and sealed by the sealing member  93 , the electronic element electrode  94  formed on the sealing member  93  can be electrically connected to the conductive portion  12 . 
         [0237]    This enables the electronic element to be made smaller and thinner, and drive reliably. 
         [0238]    Electronic Apparatus 
         [0239]      FIG. 12  is one example of an electronic apparatus including any one of the above mentioned electronic components  50 ,  70 ,  80 , and  90 , is a view of a mobile telephone  300 . 
         [0240]    By packaging the electronic components of this invention, which are made smaller and thinner while increasing their performance, the mobile telephone  300  can be miniaturized. 
         [0241]    The embodiments of the invention described above are not limited, it is possible to make various modifications without departing from the spirit or scope of the invention. 
         [0242]    For example, while the embodiment of the semiconductor device  1  described above includes the rear face electrode  15 , the electrode of the electronic component may be connected directly to the second end  12   b  of the conductive portion  12 . 
         [0243]    To facilitate the metal connections, the top faces of the rear face electrodes  15  and  54  connected to the SAW elements  60 ,  71  and  81  and the AT oscillator  91 , or the top face of the second end  12   b  of the conductive portion  12 , may be processed with metal or plated with a brazing filler metal (e.g., SnAg plating). 
         [0244]    In each of the above embodiments, in addition to the final process of dicing, the individual electronic components may be obtained by other appropriate processes (intermediate steps). 
         [0245]    Moreover, when glass substrates are used as the sealing members  52  and  93 , while the sealing members  52  and  93  consisting of these glass substrates can be diced (cut) by the dicing device  110  described in  FIG. 6 , they can also be diced by laser irradiation, or by another dicing method using dry etching or wet etching. 
         [0246]    While SAW elements are described as electronic elements of this invention in the first embodiment, the second embodiment, and the third embodiment, this is not limitative of the invention, and any element which requires a sealed structure can be used, e.g., crystal oscillators, piezoelectric oscillators, and piezoelectric tuning-forks. 
         [0247]    While the fourth embodiment describes an AT oscillator (liquid crystal oscillator), this is not limitative of the invention, and any element which requires a sealed structure can be used, e.g., a SAW element, a piezoelectric oscillator, and a piezoelectric tuning-fork. 
         [0248]    If necessary, the silicon substrate  10  may be thinned after forming the interconnection section  30  on it. 
         [0249]    A method for thinning the silicon substrate  10  will be explained. 
         [0250]    Firstly, an unillustrated glass plate is affixed to the first face  10   a  side of the silicon substrate  10  using an adhesive which can be peeled away by irradiation of ultraviolet light (UV light). 
         [0251]    This glass plate is part of what is termed a wafer support system (WSS), and, after supporting the silicon substrate  10  on the glass plate, the second face  10   b  of the silicon substrate  10  is processed by polishing, dry or wet etching, and so on, with the glass plate still affixed to it. 
         [0252]    This enables the silicon substrate  10  to be made thin.