Abstract:
Embodiments of the present invention are directed to provide a method and system for automatically applying artificial limits to display resolutions in a computing system to improve performance. Embodiments are described herein that automatically limits the display resolution of an application executing in a discrete graphics processing unit operating from configurations with limited means of data transfer to the system memory. By automatically limiting the resolution in certain detected circumstances, the rate of generated graphics data may be dramatically increased. Another embodiment is also provided which allows for the automatic detection of an application&#39;s initialization and pro-actively limiting the user-selectable resolutions in which the output of the application may be displayed in to a maximum resolution calculated for optimal performance. The application&#39;s termination is also detected, whereupon a comprehensive list of supported resolutions becomes available.

Description:
BACKGROUND 
     A graphics processing unit or “GPU” is a device used to perform graphics rendering operations in modern computing systems such as desktops, notebooks, and video game consoles, etc. Traditionally, graphics processing units are typically implemented as either integrated units or within discrete video cards. 
     Integrated graphics processing units are graphics processors that utilize a portion of a computer&#39;s system memory rather than having its own dedicated memory. Due to this arrangement, integrated GPUs (or “iGPUs”) are typically localized in close proximity to, if not disposed directly upon, some portion of the main circuit board (e.g., a motherboard) of the computing system. Integrated GPUs are, in general, cheaper to implement than discrete GPUs, but are typically lower in capability and operate at reduced performance levels relative to discrete GPUs. 
     Discrete or “dedicated” GPUs (or “dGPUs”) are distinguishable from integrated GPUs by having local memory dedicated for use by the GPU which they do not share with the underlying computer system. Commonly, discrete GPUs are implemented on discrete circuit boards called “video cards” which include, among other components, a GPU, local memory units, an interface with one or more communication buses and various output terminals. These video cards typically interface with the main circuit board of a computing system through an interface of a standardized expansion slot such as PCI Express (PCI-e) or Accelerated Graphics Port (AGP), upon which the video card may be mounted. In general, discrete GPUs are capable of significantly higher performance levels relative to integrated GPUs. However, discrete GPUs also typically require their own separate power inputs, and require higher capacity power supply units to function properly. Consequently, discrete GPUs also have higher rates of power consumption relative to integrated graphics solutions. 
     Some modern main circuit boards often include an integrated graphics processing unit as well as one or more additional expansion slots available to add a dedicated graphics unit. Each GPU can and typically does have its own output terminals with one or more ports corresponding to one or more audio/visual standards (e.g., VGA, HDMI, DVI, etc.), though typically only one of the GPUs will be running in the computing system at any one time. Alternatively, other modern computing systems can include a main circuit board capable of simultaneously utilizing two identical dedicated graphics units to generate output for one or more displays. 
     Some notebook and laptop computers have been manufactured to include two or more graphics processors. Notebook and laptop computers with more than one graphics processing units are almost invariably solutions featuring an integrated GPU and a discrete GPU. Portable computing devices with both integrated and discrete graphics processing solutions often offer a mechanism or procedure that enables the user to alternate usage between the particular solutions so as to manage performance and battery life according to situational needs or desired performance levels. Recently, the PCI Express expansion slot interface has become a dominant interface standard through which discrete GPUs are coupled to the main circuit boards of mobile computing devices. However, unlike PCI-e interfaces in other computing systems such as desktops, the PCI-e interface of a portable computing device is often of a reduced size and, naturally, of a reduced capacity. In a typical configuration, the PCI-e interface of any computing device comprises a plurality of links, with each link comprising a further plurality of “lanes,” and with each link being configured to independently couple to a peripheral device. The number of lanes in a link coupled to a peripheral device correlates with the bandwidth of the connection, and thus, couplings between a peripheral device and a link with larger amounts of lanes have greater bandwidth than couplings with links comprised of only single lanes. Traditionally, the number of links in a PCI-e interface of a portable computing device may be configured by the manufacturer in separate configurations to suit specific hardware implementations. 
     In a popular configuration, the links in a PCI-e interface of a portable computing device may be arranged in either of two combinations totaling up to four lanes. For example, implementations can comprise either a single link of four lanes (1×4), thereby offering relatively greater bandwidth for a coupled device. Alternatively, implementations may feature four separate links, with each link capable of being coupled to a separate device but limited to a single lane (4×1) with a correspondingly low bandwidth. Thus, whenever the PCI-e interface is coupled to one device, the single link (1×4) configuration may be optimal, but multiple devices require additional links that adversely impact the amount of bandwidth and throughput of each connection. 
     Unfortunately, since netbooks and laptops are often intended to be used with network connections, chipset manufacturers of computing devices that will include a discrete GPU will invariably manufacture circuit boards with PCI-e interfaces having four separate links of one lane each, one of which is occupied by a network controller (e.g., a network interface card). This results in the extremely inefficient configuration wherein only one link is coupled to the graphics processing unit, another link is coupled to the network controller, and the other two links remain unoccupied (or coupled to additional devices). While the bandwidth from a link with only one lane may be sufficient to run certain applications on certain devices, for usage in graphics processing a link having only a single lane is often insufficient and likely to drastically and adversely impact the performance of the discrete graphics processing unit. 
     According to typical graphics rendering processes, single units of images displayed to a user during a graphical sequence (e.g., a video) during the execution of an application are arranged as frames. Each frame is produced by sending graphics rendering instructions from the executing application to a GPU for rendering. Once a frame has completed rendering, the GPU will store the completed frame in one or more frame buffers. Generally, the size of a GPU&#39;s frame buffers is static and comprised in the local memory of the GPU. However, the size of the data contained in a rendered frame can often vary widely between applications. In general, higher resolutions are preferable for many applications. Higher resolutions also increase the size of the rendered frames. This may not be a concern when the application produces relatively simple graphical output (e.g., typical word processing applications). However, 3D gaming applications are generally graphically intensive and, when displayed at a sufficiently high resolution, a rendered frame may be large enough such that the remaining space available in the frame buffer may not be sufficient to store additional graphics resources (e.g., textures). 
     Typically, when the size of a rendered frame consumes a large amount of space in the frame buffer, those additional graphics resources may be stored in the system memory. The extra data is communicated (e.g., copied) to the system memory through the coupling communication bus (typically, the PCI-e bus). However, when the bandwidth of the PCI-e interface is limited, as in single lane link architectures, due to the limited speed of data transfer rates, transferring the data between the memory of the GPU and system memory when accessing the graphics resources will add considerably to the duration of the graphics rendering process. This can adversely affect the user&#39;s graphical experience by creating significant delays and severely crippling the rate at which scenes or images may be displayed to the user (e.g., the application&#39;s “frame rate”). In 3D gaming applications which can be extremely time sensitive, even slight delays can be a nuisance, with significant delays potentially becoming a significant problem. 
     SUMMARY 
     Embodiments of the present invention are directed to provide a method and system for automatically applying artificial limits to display resolutions in a computing system to improve performance. Embodiments are described herein that automatically limits the display resolution of an application executing in a discrete graphics processing unit operating from configurations with limited means of data transfer to the system memory. By automatically limiting the resolution in certain detected circumstances, the rate of generated graphics data may be dramatically increased. Another embodiment is also provided which allows for the automatic detection of an application&#39;s initialization and pro-actively limiting the user-selectable resolutions in which the output of the application may be displayed in to a maximum resolution calculated for optimal performance. The application&#39;s termination is also detected, whereupon a comprehensive list of supported resolutions becomes available. 
     One novel embodiment receives a list of display settings optimized for generating output from the application in the GPU of the current operating GPU in the system. The display settings are cached in the display driver of the display device and a display re-enumeration is forced through the operating system of the computing device, whereupon the pre-determined list of display settings is substituted for the original, more comprehensive list. Subsequently, the output generated by the GPU for the application and displayed in the display device will be displayed according to one set of settings in the pre-determined list of settings. In some embodiments, the user is prompted to select from the pre-determined list of settings. In alternate embodiments, the highest setting is automatically selected without user interaction. 
     Another embodiment monitors the initialization of an application in a computing system. Once an application&#39;s initialization is detected, a profile corresponding to the application is referenced to determine the memory usage requirements of the application. The memory of the current operating GPU is queried to determine the size of the frame buffer, and an optimal display resolution is calculated based on the memory usage and the size of the frame buffer. Output generated by the GPU for the application is subsequently displayed according to the optimal resolution. Once the application terminates, a full list of supported display resolutions in which graphical output may be generated is enabled. 
     Each of the above described novel methods and system feature the ability to provide improved graphical performance in situations where the size of a frame buffer may be inadequate to support extreme graphical resolutions and data transfer rates may be limited. In short, a system&#39;s graphical performance is more optimally and automatically configured based on prevailing circumstances. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
       The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention: 
         FIG. 1  depicts a flowchart of an exemplary method for limiting the display resolution in a display device for output of an application, in accordance with embodiments of the present invention. 
         FIG. 2  depicts a flowchart of an exemplary method for determining an optimal display resolution for generating graphical output of an application in a graphics processing unit, in accordance with embodiments of the present invention. 
         FIG. 3  depicts a block diagram exhibiting the flow of data in an exemplary computing system, in accordance with embodiments of the present invention. 
         FIG. 4  depicts an exemplary computing environment, in accordance with embodiments of the present invention. 
     
    
    
     DETAILED DESCRIPTION 
     Reference will now be made in detail to several embodiments. While the subject matter will be described in conjunction with the alternative embodiments, it will be understood that they are not intended to limit the claimed subject matter to these embodiments. On the contrary, the claimed subject matter is intended to cover alternative, modifications, and equivalents, which may be included within the spirit and scope of the claimed subject matter as defined by the appended claims. 
     Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the claimed subject matter. However, it will be recognized by one skilled in the art that embodiments may be practiced without these specific details or with equivalents thereof. In other instances, well-known processes, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects and features of the subject matter. 
     Portions of the detailed description that follow are presented and discussed in terms of a process. Although steps and sequencing thereof are disclosed in figures herein (e.g.,  FIGS. 1 and 2 ) describing the operations of this process, such steps and sequencing are exemplary. Embodiments are well suited to performing various other steps or variations of the steps recited in the flowchart of the figure herein, that not all of the steps depicted may be performed, or that the steps may be performed in a sequence other than that depicted and described herein. 
     Some portions of the detailed description are presented in terms of procedures, steps, logic blocks, processing, and other symbolic representations of operations on data bits that can be performed on computer memory. These descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. A procedure, computer-executed step, logic block, process, etc., is here, and generally, conceived to be a self-consistent sequence of steps or instructions leading to a desired result. The steps are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated in a computer system. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like. 
     It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the following discussions, it is appreciated that throughout, discussions utilizing terms such as “accessing,” “writing,” “including,” “storing,” “transmitting,” “traversing,” “associating,” “identifying” or the like, refer to the action and processes of a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical (electronic) quantities within the computer system&#39;s registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices. 
     Limiting Display Resolution 
     According to embodiments of the claimed subject matter, a method is provided for limiting the display resolution of graphical output in a computing system to achieve an optimal balance of performance and resolution given memory constraints of a graphics processing unit (e.g., a discrete GPU). According to typical graphics rendering processes, single units of images displayed to a user during a graphical sequence (e.g., a video) during the execution of an application are arranged as frames. Each frame is produced by sending graphics rendering instructions from the executing application to a command buffer of the GPU. The commands for rendering a frame are collected in a command buffer, and the instructions are delivered to the GPU to perform the requested operations. Once a frame has completed rendering, the GPU will store the data in one or more frame buffers until the frame is to be displayed in the display device. While the size of a GPU&#39;s frame buffers are static and comprised in its local memory, the size of the data contained in a rendered frame can vary widely, depending on the detail, size (e.g., resolution), and any features being included in the rendering of the frame. 
     Generally, the greater the resolution, the finer the details of a frame will be, and the greater the amount of space is available to display rendered objects. Naturally, a greater resolution also increases the size of a frame considerably; to the extent the size of the rendered frame may even limit the space remaining in the frame buffer of the GPU for other graphics resources. Often, a GPU&#39;s own local memory is supplemented with portions of the system memory which the GPU can use to temporarily store data as necessary. Thus, when the size of a frame consumes an excessive amount of the frame buffer, the remaining data corresponding to graphics resources may “spill” over and be stored in the system memory. The extra data is communicated (e.g., copied) to the system memory through the coupling communication bus (typically, the PCI-e bus). However, when accessing its own frame buffer, due to the position of the frame buffer in the GPU&#39;s local memory, access times (that is, the length of time it takes to read and write to the frame buffer) are very small. Unfortunately, the same does not necessarily hold true for accessing system memory. In particular, when the PCI-e interface is limited, as in single lane link architectures, due to the limited speed of data transfer rates, transferring the data between the memory of the GPU and system memory for each frame will add considerably to the overall graphics rendering process. 
     According to embodiments of the claimed subject matter, a computing system including one or more graphics processing units is provided. A user of the computing system may thus elect one of the graphics processing units to render the graphical output, corresponding to data produced by the computing system, which is then presented in a display device. In a typical embodiment, each of the graphics processing units interacts with the computing system through a driver operating in the computing system and each graphics processing unit has a specific, corresponding driver which communicates with the GPU through a bus in the computing system. 
     According to some embodiments, each of the graphics processing units may have specific (and possibly disparate) performance capabilities. These capabilities may be expressed as a plurality of characteristics that shape and configure the graphical output of the GPU as it is displayed by the display device. In a typical embodiment, these characteristics may include, but are not limited to, the resolution, pixel clock and bit depth of the output as displayed. In further embodiments, these characteristics are conveyed to the operating system executing on the computing system, whereupon they may be visible, selectable, and configurable by a user of the computing system. 
     The set of characteristics may be further organized by, for example, the operating system, into a plurality of discrete display modes. Each display mode may be collected and presented in a list of a graphical user interface (or other such arrangement) to the user, who is able to select one of the display modes to suit the user&#39;s needs or preferences. Generally, a user is able to select a display mode for the user interface of the operating system. This display mode is often maintained through the execution of many applications. In particular, applications with generally low graphical rendering intensities or needs. However, for applications with greater graphics processing needs, such as 3D gaming, a separate display mode may be selectable through the user interface of the application. This display mode can be different from the display mode of the operating system&#39;s user interface. When the application is presented in full display (e.g., is not windowed), the display will produce output according to the display mode selected for the application (which can be a default application). 
     In some embodiments, the selected display mode can be saved for the user, GPU, application, and/or display such that subsequent combinations of the user, the selected GPU, application, and/or the display device will cause the specific GPU to automatically produce graphical displays according to the display mode. Due to the disparity in performance capabilities and requirements, however, the list of display modes may not be consistent between all of the GPUs or for all of the applications in the system. That is, some display modes may not be offered by the drivers of a GPU as the display mode may exceed the capabilities of that GPU either generally, or for a specific application. Although multiple GPU systems are well suited to embodiments as described herein, for the purpose of brevity, unless otherwise specifically noted, usage of the term graphics processing unit, GPU, and corresponding features refer to the discrete graphics processing unit in a system. In particular, discrete graphics processing units with limited communication bandwidth with system memory. 
     Accordingly, the claimed subject matter is directed to a method for limiting the display resolution of graphical output in a computing system to achieve an optimal balance of performance and resolution given memory constraints. As presented in  FIG. 1 , a flowchart of an exemplary method  100  for automatically limiting the display resolution of output generated for an application by executing under specifically determined conditions is depicted, in accordance with embodiments of the present invention. Steps  101 - 109  describe exemplary steps comprising the method  100  in accordance with the various embodiments herein described. 
     In a typical application-rendering process, during an initialization of an application, the application will query the driver of the GPU performing graphics rendering operations for the application for a list of supported resolutions. However, the exported list of resolutions that are available to the application are not conventionally limited to the maximum performance that can be achieved by the GPU&#39;s memory alone. The exported list of resolutions seen by the application would include those resolutions that would leave sufficient space within the frame buffer such that other graphics resources could fit within the GPU&#39;s frame buffer as well as those resolutions that would produce frames of such size so as to render the remaining space in the frame buffer insufficient to store the graphics resources, requiring storage of those resources onto system memory. At step  101  of the method  100 , a plurality of pre-determined settings is received for an application executing in a computing device. 
     In one embodiment, the plurality of pre-determined settings may comprise a plurality of display resolutions which are limited to producing frames of output that would allow graphics resources to fit in the frame buffers of the current operating GPU. In some embodiments, the plurality of ore-determined settings is received by accessing a profile in a knowledge base of pre-programmed profiles for a plurality of applications. In still further embodiments, the pre-programmed profiles are parsed and the profile for a specific initializing application is located in the knowledge base of pre-programmed profiles and the profile for the specific application is referenced to derive a data structure, such as a table, of empirically derived “optimal” display resolutions corresponding to the rendering of graphical output for the application in the specific GPU unit (or model). 
     As defined for the purposes of the claimed subject matter, the optimized display resolutions for rendering graphical output for the application in a specific GPU model comprises filtering the comprehensive list of GPU supported display resolutions to derive a selection of GPU supported display resolutions in which the size of the frames of graphical output generated for the application will still allow the storage of graphics resources within the frame buffer(s) of the GPU. In further embodiments, these optimal display resolutions account for additional features, such as anti-aliasing, which may increase or decrease the size of the rendered frame. In still further embodiments, a single optimal resolution is the maximum resolution in which frames of graphical output can be generated for the application that still allows the storage of graphics resources within the frame buffer(s) of the GPU. 
     At step  103 , the plurality of pre-determined display resolutions received in step  101  are transmitted and cached in the display driver corresponding to the display device. At step  105 , a display re-enumeration of the display driver is “forced” (that is, is explicitly induced) to receive a list of display resolutions supported by the display device. According to typical embodiments, a display re-enumeration re-calibrates the list of display resolutions supported by the system. However, a display driver is generally incapable of inducing a display re-enumeration by itself. Accordingly, in one embodiment, the display re-enumeration is induced by making an application programming interface (API) call from the application to the operating system. In further embodiments, a routine API call may be equipped with a flag which, when received by the operating system, prompts a display re-enumeration. 
     Once the display re-enumeration is induced at step  105 , the pre-determined plurality of display settings received at step  101  is substituted for an actual comprehensive list of supported display resolutions and returned to the operating system as the list of supported display resolutions at step  107 . In one embodiment, the list of supported display resolutions received at step  107  in the operating system may be thereafter presented to the user, who is prompted to select from the list of supported display resolutions. The display resolution selected by the user is then set and subsequently, the graphical output generated for the application by the GPU is rendered and displayed according to the user-selected display resolution. In alternate embodiments, a default display resolution may be automatically selected from the list of supported display resolutions without the need for user interaction. In still further embodiments, the default display resolution is automatically set to the highest resolution (e.g., optimal resolution) in the list of supported display resolutions. 
     By automatically filtering a list of supported display resolutions to the display resolutions which would not produce frames of graphical output of sufficient size the addition of graphics resources would exceed the size of the frame buffer, excessive rendering times of graphical output for an application may be pro-actively avoided due to the limited rates of data transfer available to systems with reduced communication bus capabilities. Accordingly, the efficiency of generating graphical output for applications in such systems may be advantageously improved. 
     Determining an Optimal Display Resolution 
     Accordingly, the claimed subject matter is directed to a method for determining an optimal display resolution to limit the display resolution of graphical output in a computing system to achieve an optimal balance of performance and resolution given memory constraints. As presented in  FIG. 2 , a flowchart of an exemplary method  200  for automatically determining an optimal display resolution of output generated for an application by executing under specifically determined conditions is depicted, in accordance with embodiments of the present invention. Steps  201 - 215  describe exemplary steps comprising the method  200  in accordance with the various embodiments herein described. 
     At step  201 , an initialization of an application executing in a computing device is detected. Detecting the initialization of the application may comprise, for example, detecting the initialization of the application in the operating system of the computing device. In response to the detecting the initialization of the application, a profile corresponding to the application whose initialization is detected in  201  is referenced to determine the memory usage required by graphical output of the application. In one embodiment, the profile is specific to the application and stored in a plurality of profiles corresponding to a plurality of applications. In still further embodiments, the memory usage requirements for an application comprise the memory required to generate frames of graphical output according to a plurality of display resolutions and enabled features (e.g., anti-aliasing). According to one embodiment, the memory usage requirements may be pre-determined empirically and recorded in the profile as part of, or pre-packaged with, the software containing the driver(s) corresponding to the graphics processing unit. In still further embodiments, the data for determining memory usage of an application is stored within tables or like data structures in the profile corresponding to the application. 
     At step  205 , the graphics memory, that is, the memory disposed on the video card comprising the discrete graphics processing unit of embodiments discussed herein is queried to determine the size of the one or more frame buffers of the GPU subsystem. At step  207 , a maximum resolution for graphical output of the application whose initialization was detected in step  201  is calculated based on the memory usage determined in step  203  and the size of the frame buffer(s) determined in step  205 . In one embodiment, calculating the maximum resolution may comprise determining the highest resolution (including enabled features) whose memory usage (including other graphics resources) does not exceed the size of the frame buffer. At step  209 , the display resolutions that are greater than the maximum resolution determined at step  205  are removed from the list of supported resolutions. According to some embodiments, the maximum resolution derived at step  205  is automatically set as the resolution for graphical output produced for the application during the application&#39;s execution. In alternate embodiments, the user is presented a new list of resolutions that are supported by the GPU and do not exceed the maximum resolution derived at step  205 . The user may subsequently select from the new list of resolutions which will produce output that does not require storage in system memory. 
     At step  211 , termination of the application initiated in step  201  is detected. Once the application&#39;s termination is detected, the driver of the graphics processing unit is queried to determine a full list of supported resolutions at step  213 . In typical embodiments, these resolutions correspond to the supported resolutions in which the user interface of the operating system and other currently executing applications may be displayed in. Typically, for non 3D gaming applications, these resolutions may exceed the maximum resolution determined in step  205  for the application but, because of their reduced memory requirements, would not require storing textures and other resources in the system memory. Finally, at step  215 , the display of the user interface of the operating system (and other applicable, executing applications) is enabled to display according to the resolutions included in the entire list of supported resolutions determined at step  213 . In one embodiment, the actual resolution in which the user interface of the operating system is presented is the same resolution that was used prior to executing the application initialized in step  201 . According to these embodiments, the user is also able to alter the display resolution to any resolution comprised in the list of supported resolutions. 
     By automatically determining an optimal resolution to display rendered graphical output, resolutions may be determined for a process of limiting frame rates which would not produce frames of graphical output of sufficient size to exceed the size of the frame buffer. Accordingly, the benefits of avoiding excessive rendering times of graphical output for an application due to the limited rates of data transfer available to systems with reduced communication bus capabilities and improving the efficiency of generating graphical output for applications in such systems as described above may be enabled and/or extended. 
     Data Flow Chart 
     With reference now to  FIG. 3 , a data flow chart  300  of an exemplary system performing a method for limiting display resolution is depicted, in accordance with one embodiment. In a typical configuration, an application is initialized in an operating system ( 1 ). Once the application&#39;s execution is detected, the driver of the GPU performing the processing for rendered output is queried for a list of supported display resolutions ( 2 ). In one embodiment, the driver of the GPU may access a plurality of pre-programmed application profiles and select a profile corresponding to the executing application to determine the list of supported display resolutions. As described above, the list of supported display resolutions may be optimized to remove the display resolutions that would produce excessively large frames that would prohibit the storage of textures and other graphics resources in the frame buffers of the GPU. In still further embodiments, the driver of the GPU may access an application&#39;s profile to determine the memory usage requirements for the applications, including any enabled features. 
     In some embodiments, the frame buffer of the particular GPU may be queried to determine the size of the frame buffer ( 3 ). According to these embodiments, the maximum optimal resolution may be calculated from the size of the frame buffer and the memory usage requirements. Once the plurality of optimal supported display resolutions is determined, the list of the optimal supported display resolutions is cached in the driver of the display device ( 4 ). An API call is made from the application ( 5 ) to induce a display re-enumeration. In some embodiments, the list of display resolutions may be presented in the user interface ( 6 ), enabling the user to select from the list of display resolutions for graphical output of the application to be presented. Thereafter, graphical output of the application is rendered in the GPU ( 7 ) according to the display resolution selected in the user interface or automatically set according to the maximum optimal resolution. Once the graphical output is rendered, the frames are displayed in the display device ( 7 ) of the system. 
     Exemplary Computing Device 
     As presented in  FIG. 4 , an exemplary system upon which embodiments of the present invention may be implemented includes a general purpose computing system environment, such as computing system  400 . In its most basic configuration, computing system  400  typically includes at least one processing unit  401  and memory, and an address/data bus  409  (or other interface) for communicating information. Depending on the exact configuration and type of computing system environment, memory may be volatile (such as RAM  402 ), non-volatile (such as ROM  403 , flash memory, etc.) or some combination of the two. 
     Computer system  400  may also comprise an optional graphics subsystem  405  for presenting information to the computer user, e.g., by displaying information on an attached display device  410 , connected by a video cable  411 . According to embodiments of the present claimed invention, the graphics subsystem  405  may include an integrated graphics processing unit (e.g., iGPU  415 ) coupled directly to the display device  410  through the video cable  411  and also coupled to a discrete graphics processing unit (e.g., dGPU  417 ). According to some embodiments, rendered image data may be communicated directly between the graphics processing units (e.g., iGPU  415  and dGPU  417 ) via a communication bus  409  (e.g., a PCI-e interface). Alternatively, information may be copied directly into system memory (RAM  402 ) to and from the graphics processing units (e.g., iGPU  415  and dGPU  417 ) also through the communication bus  409 . In alternate embodiments, display device  410  may be integrated into the computing system (e.g., a laptop or netbook display panel) and will not require a video cable  411 . In one embodiment, the processes  100  and  200  may be performed, in whole or in part, by graphics subsystem  405  in conjunction with the processor  401  and memory  402 , with any resulting output displayed in attached display device  410 . 
     Additionally, computing system  400  may also have additional features/functionality. For example, computing system  400  may also include additional storage (removable and/or non-removable) including, but not limited to, magnetic or optical disks or tape. Such additional storage is illustrated in  FIG. 4  by data storage device  404 . Computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. RAM  402 , ROM  403 , and data storage device  404  are all examples of computer storage media. 
     Computer system  400  also comprises an optional alphanumeric input device  406 , an optional cursor control or directing device  407 , and one or more signal communication interfaces (input/output devices, e.g., a network interface card)  408 . Optional alphanumeric input device  406  can communicate information and command selections to central processor  401 . Optional cursor control or directing device  407  is coupled to bus  409  for communicating user input information and command selections to central processor  401 . Signal communication interface (input/output device)  408 , also coupled to bus  409 , can be a serial port. Communication interface  409  may also include wireless communication mechanisms. Using communication interface  409 , computer system  400  can be communicatively coupled to other computer systems over a communication network such as the Internet or an intranet (e.g., a local area network), or can receive data (e.g., a digital television signal). 
     Although the subject matter has been described in language specific to structural features and/or processological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.