Abstract:
Method and apparatus for data reception are provided, retrieving digital values transmitted through a cable. In a data receiver, an equalizer equalizes an input signal based on a boost value to generate an equalized signal, and a data extractor samples the equalized signal to extract output values from each symbol period. The data extractor detects signal quality of the equalized signal to adjust the boost value accordingly. An optimal time point is detected within one symbol period where an output value is an ensured valid, and variation rate of the optimal time point is counted as an inverse indicator of the signal quality.

Description:
CROSS REFERENCE TO RELATED APPLICATIONS 
       [0001]    This application claims the benefit of U.S. Provisional Application No. 60/916,581 filed on May 8, 2007. 
     
    
     BACKGROUND OF THE INVENTION 
       [0002]    1. Field of the Invention 
         [0003]    The invention relates to high speed cable links, and in particular, to adaptive data reception for signals transferred through a cable. 
         [0004]    2. Description of the Related Art 
         [0005]      FIG. 1  shows an eye diagram. Cables or conductive wires are widely used media for signal transmission, in which digital data are sequentially transmitted in symbol form. A symbol may be an application dependent waveform having predetermined amplitude and duration. For example, in  FIG. 1 , a symbol generated at the transmitter end may have amplitude V S  and data period T P . During the data period T P , a duration between time points t a  and t b  is referred to as the hold time T H , whereas the others setup time T S . A valid symbol value is only acquirable during the hold time T H  where the symbol amplitude is kept at a desirable level. For a high speed cable link, the symbol is transmitted through a cable and sampled at a receiver end. Ideally, the symbol received at the receiver end remains a proper waveform so that the original output value can still be correctly acquired by sampling the symbol within the hold time T H . Practically, however, a cable is equivalent to a low pass filter that reduces signal quality. Not only is amplitude decayed but time delay is induced to different extents at different frequency bands. Thus, a distorted symbol may cause a so-called data jitter, reducing the possibility to correctly sample an output value. Since the transition edges in a non-ideal cable are uncertain, the available hold time where correctness is ensured, is shortened. For example, the duration between time points t a ′ and t b ′ represents the hold time T H ′ being shortened due to data jitter. As the available hold time T H ′ is shortened, duration of uncertainty is increased and implementation of an accurate sampling mechanism becomes more difficult. 
         [0006]      FIG. 2  shows a conventional data receiver  200  at the receiving end of a cable. The data extractor  204  is designed to acquire output values #D OUT  from the input signal #D IN  that has passed through the cable (not shown). The input signal #D IN  may be distorted when passing through the cable, having data jitter that is difficult to reacquire output values therefrom. Thus, an equalizer  202  may be provided to equalize the input signal #D IN  before it is sent to the data extractor  204 . The equalization is a mathematical function that reverses the distortion effects induced by the cable, and the equalizer  202  is typically configured with a fixed boost value as a parameter for the mathematical function, thereby the distorted input signal #D IN  can be recovered from an equalized signal #D Q  having quality subsequently approximating to the original symbol. In this way, the correctness of output value #D OUT  obtained by the data extractor  204  can be efficiently improved. 
         [0007]    The distortion caused by different cables may vary. For example, the input signal #D IN  may feature different characteristics dependent on the frequencies, cable lengths and cable materials. Thus, if an equalizer  202  with fixed boost value is applied for unknown cable feature, under equalization or over equalization may consequently occur. Under equalization, in particular, often causes severe data jitter that greatly impacts efficiency of signal transmission. Therefore, an enhancement for the equalizer  202  is desirable. 
       BRIEF SUMMARY OF THE INVENTION 
       [0008]    An exemplary embodiment of a data receiver is provided, retrieving digital values transmitted through a cable. In which an equalizer equalizes an input signal based on a boost value to generate an equalized signal, and a data extractor samples the equalized signal to extract output values from each symbol period. The data extractor detects signal quality of the equalized signal to adjust the boost value accordingly. 
         [0009]    The data extractor may comprise a boost value generator for control of the boost value, by which the boost value is adjusted dynamically based on the signal quality detected by the data extractor. 
         [0010]    As soon as the data receiver is initialized in calibration mode, the boost value generator incrementally adjusts the boost value of the equalizer at a plurality of symbol periods. The data extractor analyzes signal quality of the equalized signal in response to the incremental adjustments. Upon signal quality improvement saturation at an optimal boost value level, the boost value generator stops the incremental adjustment, and the equalizer switches to normal mode and operates at the optimal boost value. 
         [0011]    The data extractor further comprises an over sampler, sampling the equalized signal for a plurality of symbol periods, and acquiring a plurality of sampled values per symbol period. A buffer is provided for storage of the sampled values. An edge detector detects transition edges of the equalized signal according to the sampled values, and asserts a location signal to indicate the location of transition edges per symbol period. A quality controller then analyzes the locations of transition edges, thereby one optimal sampled value is selected as an output value for each symbol period. As an example, the over sampler samples the equalized signal at five different time points during the symbol period to acquire five sampled values, thereafter, the quality controller selects one of the sampled values to be the output value, which is associated with a time point most closest to the center of the two transition edges within the symbol period. 
         [0012]    The quality controller analyzes variation rate of the time point as an inverse index of the signal quality of the equalized signal. Specifically, the quality controller detects whether the time point has changed since the last symbol periods, and the variation rate is obtained by counting the total amount of changes made to the time point within a long period. 
         [0013]    Another embodiment provides a data retrieval method implemented in the data receiver, and a detailed description is given in the following embodiments with reference to the accompanying drawings. 
     
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         [0014]    The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein: 
           [0015]      FIG. 1  shows a eye diagram; 
           [0016]      FIG. 2  shows a conventional data receiver  200  at the receiving end of a cable; 
           [0017]      FIG. 3  shows an embodiment of a data receiver  300  according to the invention; 
           [0018]      FIG. 4  shows an embodiment of sampling an equalized signal #D Q ; 
           [0019]      FIG. 5  is a more detailed embodiment of the data receiver  300  shown in  FIG. 3 ; and 
           [0020]      FIG. 6  shows another embodiment of the data receiver  300  shown in  FIG. 3 . 
           [0021]      FIG. 5  is a flowchart of the data retrieval method according to the invention. 
       
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
       [0022]    The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims. 
         [0023]      FIG. 3  shows an embodiment of a data receiver  300  according to the invention. The data receiver  300  comprises a data extractor  304  for sampling the equalized signal #D Q  and outputting an output value #D OUT . The data extractor  304  is also able to detect signal quality of the equalized signal #D Q  and accordingly adjust the boost value of equalizer  202 . In the embodiment, a boost value generator  412  is dedicated to provide the boost value. The boost value may be dynamically adjusted according to the signal quality detected by the data extractor  304 . 
         [0024]    The adjustment may be performed by various approaches. For example, the data extractor  304  may perform a calibration to directly determine an optimal boost value associated with the present cable. First, the boost value generator  412  recursively and incrementally issues various boost values to the equalizer  202  during an interval containing multiple symbol periods T P . The interval is used for calibration. The interval should contain sufficient symbol periods to get a meaningful result. In response to every incremental boost value, the data extractor  304  acquires corresponding quality information from the equalized signal #D Q . Basically, the estimated signal quality is proportional to the boost value, thus, the outcomes may organize a line of positive slope. When the signal quality is saturated no matter how the boost value increases, the boost value at the saturation point is deemed to be an optimal one. Hence, the boost value generator  412  stops the incremental adjustment, and the equalizer  202  switches to normal mode and operates at the optimal boost value. 
         [0025]    In  FIG. 3 , the data extractor  304  uses an over sampler  404  to sample the equalized signal #D Q , by which a plurality of sampled values #Ds may be acquired per symbol period T P . The sampled values #Ds are buffered in a buffer  406  for further analysis before an output value #D OUT  is determined. The buffer  406  has a capacity to store a plurality of sampled values #Ds correspondingly obtained from a plurality of consecutive symbol periods T P , and an edge detector  410  reads them to detect locations of transition edges of each symbol period T P . The equalizer  202  may use an inadequate boost value to equalize a distorted input signal #D IN , rendering an unstable equalized signal #D Q  in which transition edges rapidly change throughout consecutive symbol periods T P . The more edge uncertainty increases, the shorter the hold time T H ′ where an output value is ensured valid. The edge detector  410  may determine the transition edges by comparing amplitude levels of two consecutive time points. For example, two sampled values #Ds sampled before and after the transition edge may have significant amplitude difference. A transition edge can be deemed found when the amplitude difference between two consecutive sampled values #Ds exceeds a predetermined threshold. The edge detection may also be accomplished by various conventional approaches, however, it is assumed that those skilled in the Art are knowledgeable of these approaches, thus, detailed examples are not provided further. Thereafter, the edge detector  410  sends a location signal #edge to the quality controller  408 , providing location information of the transition edges of every symbol period T P  for further analysis. 
         [0026]    The quality controller  408  receives the location signal #edge, and accordingly selects one optimal sampled value #D as an output value #D OUT  of a symbol period T P . Specifically, the over sampler  404  is performing an over-sampling operation whereby the equalized signal #D Q  is sampled at different phases within each symbol period T P . For example, a symbol can be sampled at 5 different phases within one period to obtain 5 values of the equalized signal #D Q . According to the location signal #edge, the quality controller selects one of the sampled values #Ds to be the output value #D OUT , which is associated with a time point most close to the center of two transition edges within the symbol period T P . In other words, if the first and fifth sampled values #Ds are deemed to be on the transition edges, the third sampled value #Ds would be chosen to be the output value #D OUT . 
         [0027]    For the quality controller  408 , there is a current pointer P pointing to the optimal phase (or time point) within a sample period. The current pointer P could be determined by previous 4 sample periods (S 0 , S 1 , S 2 , and S 3 ). During the next 4 sample periods (S 0 ′, S 1 ′, S 2 ′, and S 3 ′), the quality controller  408  determines transition edges of the sample periods (S 0 ′, S 1 ′, S 2 ′, and S 3 ′). The quality controller  408  also checks whether the current pointer P is pointing to the middle of each sample period of the 4 sample periods (S 0 ′, S 1 ′, S 2 ′, and S 3 ′). If the pointer P is pointing to the left side of the middle point of a sample period, the quality controller  408  may determine that the pointer P should jump up to be more close to the middle point. Conversely, if the pointer P is pointing to the right side of the middle point of a sample period, the quality controller  408  may determine that the pointer P should jump down to be more close to the middle point. In this embodiment, the quality controller  408  determines a jump up or jump down every 4 sample periods. Jump ups or downs are represented by a pointer shift flag. The quality controller  408  records the total number of shifts (jump ups or downs) over a long period (1000 sample periods for example). The more the number, the more frequently the pointer shifts. Frequent pointer shifts means that the quality of the equalized signal is poor. The shifts should be as less as possible. By testing several transfer functions of the equalizer  202 , one can determine a best transfer function that results in minimum shifts. It means that the particular transfer function is the optimum choice to compensate the input signal D IN . 
         [0028]      FIG. 4  shows an embodiment of sampling an equalized signal #D Q . A plurality of consecutive symbol periods T P  is illustrated, in which distortions are represented as shadowed areas where sampled data is deemed invalid. Four sampled values #Ds are obtained correspondingly at five time points t 1  to t 4  in each symbol period T P , among which an optimal one would be selected as the output value #D OUT  (denoted as O 1  to O 4 ). In one symbol period T P , the time points t 1  to t 4  may be five equivalently distributed points. The output value #D OUT  tends to be the most central one within the white area of each symbol period T P . Other than that, amplitudes V 1  to V 4  of the output values #D OUT  O 1  to O 4  may also be considered as references for signal quality. Hence, the data extractor  304  sequentially receives and analyzes the equalized signals #D Q  and outputs corresponding output values #D OUT . Alternatively, the over sampler may comprise five different samplers each tracking a different phase in the symbol period T P . The embodiment does not limit the implementation of the over sampler  404 . 
         [0029]    The optimal sampling point for the sample period S 0  is t 3 , which is denoted by O 1 . However, the current pointer P may point to t 4 . The pointer P is pointing to the right side of O 1 . Therefore, for the sample period S 0 , it would be better to shift the current pointer P to t 3 , which is the optimal sampling point determined by the quality controller  408 . Similarly, for the sample period S 1 , it would be better to shift the current pointer P to t 3 , which is the optimal sampling point determined by the quality controller  408 . After checking 4 sample periods (S 0 -S 3 ), the quality controller  408  may determine to shift the current pointer P to t 3 , and then proceeds similar checking flow during the next 4 sample periods (S 0 ′-S 3 ′). Obtaining  5  sampling points for each sample period and checking 4 sample periods to decide to shift the current pointer are merely an example. One can determine the number of sampling points for each sample period and the number of sample periods to be checked according to different design requirements. 
         [0030]      FIG. 5  is a more detailed embodiment of the data receiver  300  shown in  FIG. 3 . With reference to  FIG. 5 , an input signal #D IN  is distorted because of cable transmission. An equalizer  504  is used to compensate the distorted input signal #D IN  and generates an equalized (compensated) signal #D Q . The equalizer  502  has several transfer functions for a boost value to select. The equalized signal #D Q  is determined by a selected transfer function. An over-sampling operation is performed by the K*N sampler  506 . In this embodiment K can be 4 and N can be 5. A sample period of the equalized signal #D Q  is sampled at 5 (K) different phases within a single period. 4 (N) consecutive sample periods (S 0 , St, S 2 , and S 3 ) will be sampled 20 times at 20 different phases. In this embodiment, 20 sampled values are produced before determining the quality of the equalized signal #D Q . However, the sampling number (K*N) is not a limitation. One can determine the sampling number depending on different design requirements. 
         [0031]    The frequency of the input signal #D IN  can be, for example, 1 G Hz. The clock frequency can be, for example, 100M Hz. A PLL or DLL module  514  can produce 20 sampling signals Fs, where each sampling signal Fs has a phase shift relative to another sampling signal. The 20 sampling signals Fs can be used by the K*N sampler  506  to sample 4 consecutive sample periods at 20 different phases and then produce 20 sampled values #D S . 
         [0032]    Subsequently, the 20 sampled values #Ds are input to a data pick up 508. The data pick up 508 can be a buffer, which is corresponding to the buffer  406  in  FIG. 3 . The 20 sampled values #Ds are then output as the output values #D OUT . 
         [0033]    A transition edge detection/shift decision module  510  also receives the 20 sampled values #Ds. The transition edge detection/shift decision module  510  determines the edges of the 4 consecutive sample periods. A current pointer P is stored in the transition edge detection/shift decision module  510 . The current pointer P is determined by previous 4 consecutive sample periods. The transition edge detection/shift decision module  510  also determines the optimal sampling point for each sample period based on the 20 sampled values and the edges. The transition edge detection/shift decision module  510  compares the optimal sampling points (denoted by O 1 -O 4  in  FIG. 4 ) with the current pointer P (pointing to t 4  in  FIG. 4 ) and then determines whether to shift the current pointer P to a new position (denoted by P′ hereafter). In the example given by  FIG. 4 , the current pointer P will shift left (jump down) to match the newly decided optimal sampling points O 1 -O 4 . The transition edge detection/shift decision module  510  sends shift instruction (up/down) to a digital loop filter &amp; data pick-up pointer adjustment module  512 . 
         [0034]    The transition edge detection/shift decision module  510  also sends shift instruction (up/down) to an equalizer controller  504 . Over a long period (1000 sample periods for example), the equalizer controller  504  accumulates the number of shifts (or jumps) of the current pointer P. The accumulated number of shifts denotes the quality of the compensation performed by the equalizer  502 . The more the accumulated number, the worse the compensation is. 
         [0035]    Then, based on the accumulated number, the equalizer controller  504  sends a boost value to the equalizer  502  to select another transfer function. The equalized signal #D Q  is determined by the newly selected transfer function and then a next round of quality determination process is performed. During the next 1000 sample periods, the quality of the newly selected transfer function will be examined to see whether the compensation is better. After certain rounds, a best compensation quality using an optimal transfer function of the equalizer  502  will be picked and the calibration is accomplished. The following input signal #D IN  can be compensated by the best transfer function the equalizer  504  could provide. 
         [0036]    The transition edge detection/shift decision module  510  and the digital loop filter &amp; data pick-up pointer adjustment module  512  are examples of the quality controller  408  shown in  FIG. 3 . The equalizer  202  is an example of the boost value generator  412 . 
         [0037]      FIG. 6  shows another embodiment of the data receiver  300  shown in  FIG. 3 . The embodiment is the same as that shown in  FIG. 5  except a transition edge detection module  610  and a shift decision &amp; digital loop filter &amp; data pick-up pointer adjustment module  612 . Part of the functions performed by the transition edge decision and shift decision/shift decision module  510  is moved to the shift decision &amp; digital loop filter &amp; data pick-up pointer adjustment module  612 . In this embodiment, the transition edge detection module  610  only takes care of transition edge determination and sends the edge information to the shift decision &amp; digital loop filter &amp; data pick-up pointer adjustment module  612 . 
         [0038]    The shift decision &amp; digital loop filter &amp; data pick-up pointer adjustment module  612  does most of the work, including shift of the current pointer P and data pick-up pointer adjustment. The transition edge detection module  610  and the shift decision &amp; digital loop filter &amp; data pick-up pointer adjustment module  612  do the same thing as the combination of the transition edge detection/shift decision module  510  and the digital loop filter &amp; data pick-up pointer adjustment module  512 . The transition edge detection module  610  and the shift decision &amp; digital loop filter &amp; data pick-up pointer adjustment module  612  are also examples of the quality controller  408  shown in  FIG. 3 . Any portions of functions can be separately or integrally performed by a specific module. This is merely variations of the invention. 
         [0039]    While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the Art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.