The Policy-gradient Placement and Generative Routing Neural Networks for Chip Design
Authors: Ruoyu Cheng
Xianglong Lyu
Yang Li
Junjie Ye
Jianye HAO
Junchi Yan
Venue: NeurIPS 2022 Accept (2022)
Keywords: Reinforcement learning
Machine learning
Combinatorial optimization
Electronic design automation

Abstract: Placement and routing are two critical yet time-consuming steps of chip design in modern VLSI systems. Distinct from traditional heuristic solvers, this paper on one hand proposes an RL-based model for mixed-size macro placement, which differs from existing learning-based placers that often consider the macro by coarse grid-based mask. While the standard cells are placed via gradient-based GPU acceleration. On the other hand, a one-shot conditional generative routing model, which is composed of a special-designed input-size-adapting generator and a bi-discriminator, is devised to perform one-shot routing to the pins within each net, and the order of nets to route is adaptively learned. Combining these techniques, we develop a flexible and efficient neural pipeline, which to our best knowledge, is the first joint placement and routing network without involving any traditional heuristic solver. Experimental results on chip design benchmarks showcase the effectiveness of our approach, with code that will be made publicly available.

The Policy-gradien Placement and Generative Routing Neural Networks for Chip Design
Ruoyu Cheng', Xianglong Lyu', Yang Li', Junjie Ye², Jianye Hao?, Junchi Yan Depaarment of Computer Science and Engineering, Shanghai Jiao Tong University
Huuawi Noah's Ark Lab
{roy srco__accout,kpp Exyly_lyu,mmiyali jynnuucch edu. (yejunjie4, haojianye) Aahiiaaneeuuweeii..... com
Abstract
Placement and routing are two critical yet time-consuming steps of chip design modern VLSI systems. Distinct from traditional heuristic solvers, this paper on one hand proposes an RL-based model for mixed-size macro placement, which differs from existing learning-based placers that often consider the macro by coarse grid-based mask. While the standard cells are placed via gradient-basse GPU acceleration. On the other hand, one-shot conditional generative routing generator
model, which is composed of special-designe and bi-discriminator, is devised to perform one-shot routing to the pins within each net, and the order of nets to route is adaptively learned. Combining these techniques, develop flexible neural pipeline, which to our best knowledge, is the first joint placement and routing network without involving any traditional heuristic solver. Experimental results on chip design benchmarks showcase the effectiveness of our approach. Source code will be made publicly available at: https:///githut. wtm./Tiinkaaa-SST/EED.....
Introduction
The scale of integrated circuits (ICs) has been enlarged dramatically, posing challenge to the existing Electronic Design Automation (EDA) technologies. The increasing circuit density raises additional issues for VLSI placers and routers the component size of modern VLSI design continues drop and on-chip connectivity becomes increasingly sophisticated. Due to growing on-chip connectivity, concentrated needs and restricted resources, modern designs are prone to congestion issues and wirelength minimization, which has become a critical task at every stage of the chip design process. Accordingly, placement and routing that physically arranges the locations and the routes of nets become more crucial in modern VISII systems, which are also very time-consuming.
The components of netlist, including macros and standard cells, mapped positions the chip layout by placement, with standard cells being basic logic cells (e.g. logic gates) and macros as functional blocks (e.g. SRAMs). Moreover, the increasingly extensive of intellectual property (IP) modules and pre-designed macro blocks make mixed-size placement an indispensable part of physical design. The goal of placement optimize power, performance, and area (PPA) metrics meanwhile obeying the constraints e.g. placement density and routing congestion. It is worth noting that, in this paper we address the global routing problem, while the detailed routing involves more physical constraints, and is beyond the scope of this paper.
Global routing, the other hand, creates routing channels inside layout based the placement assignment by connecting pins of positioned IC components to a net while adhering to technological
'The SJTU authors are also with MoE Key Lab of Artificial Intelligence, SJTU. Junchi Yan the correspon- dence author also with Shanghai AI Laboratory.
36th Conference on Neural Information Processing Systems (NcurIPS 2022).

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limits. It is tightly coupled with the placement task, as an excellent placement solution can result in better chip area utilization, timing performance, and routability etc. The objective of routing is to minimize total wirelength without violating the limits of congestion and critical timing.
Differing from the traditional leaming-frre solvers for placement and routing, learning- based models are recently explored and applied to (macro) placement [2] and routing [3], which are mostly based on reinforcement learning (RL). Like in vision, language and other domains, an end-to-end network is often welcomed for the possibility for global optimization of the whole system, while such pure neural networks for joint placement and routing remains unresolved in literature. In particular, there are two standing issues worth further study in this paper: i) the macros are of mixed-size with varying width/height [4], bringing difficulty to the discrete grid-based placement by (current reinforcement) learning; ii) the scale of grid size in routing dataset e.g. ISPD-07 [5] can be intractable for RL as currently its action has to be designed at the local grid point level rather than generate the whole routing across grids in one shot. In this paper, we aim to develop flexible (mixed-size friendly) approach. More ambitiously, we further aim to enable a pure neural pipeline with both learnable placement net and routing net. Specifically, the placement part is fulfilled by policy gradient based RL method for macros by considering their sizes, followed with gradient-based optimization for placing stand cells. The routing part involves conditional generative model to finish the routing across pins at net level. The highlights of this work are:
1) We propose an RL-based model for learning mixed-size macro placement, which differs from existing learning- based placers 2 7 that often consider the macro by coarse grid-based mask. As such, the placement results are more realistic and require less post-processing to resolve collision.
2) We propose conditional generative routing network to perform routing, in one-shot for each net. In contrast, existing RL-based solvers [6] need to perform routing step by step at grid point level within each net, in sequential and inefficient manner. Moreover, the order for nets to route is adaptively optimized by learning instead of a pre-fixed one as performed in existing routers.
3) Combining these techniques, we develop neural network- based pipeline for placement and routing, which to our best knowledge, is the first pure neural networks for placement and routing"
4) Experimental results on benchmarks show the relatively cost-efficiency (compared with RL-based routing solver 6 and competitive performance. Source code will be made publicly available.
2 Related Work
For the inter-discipline nature of this paper, we briefly introduce the necessary background and related work to properly position our work with different communities from EDA to machine learning. Due to page limit, classical methods for placement and routing are presented in Appendix A.
Learning- based Solvers for Placement. Machine learning has recently been introduced in placement which may help reduce the heuristics. 7 devises a cyclic framework between reinforcement learning (RL) and SA modules, in which the RL module alters the relative spatial sequence between circuit components, while SA searches the solution space based on RL initialization. Following the seminal work [ of learning sequential decision decision-making for macro placement, the method called DeepPlace in proposes joint learning technique for the placement and subsequent routing via RL.
Learning-based Solvers for Routing. The recent work g presents an attention trased RL method for obtaining pin order within each net (rather than net order in this paper which is of much larger size), followed by a classical pattern router. A DQN agent [6) is developed to decide on the routing direction on a grid graph at each step. It makes up a simple 12-element vector to represent the state of the environment. However, the model trained on synthesized 8 and 16x 16 grids, with no more than 50 nets that consist of 3 pins. To make the learning more scalable, two-page preliminary to-ge-t--mmae translation and uses a variational
work [9] formulates the routing of a net as an auto-encoder (VAE) [10] model to generate the result. However, the model is merely capable of handling a net with no more than three pins on a 64x64 grid. Compared with classic routing solvers, existing RL-based methods can be much more time-consuming making the end-to-end learning of
also aims to achieve learning of both placement and routing, while for fast routing to achieve fast rollout for fitness evaluation, it runs a heuristic uip-up and reroute algorithm while we for the first time make the whole pipeline learnable for both placement and routing.
"The recent work (2)

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both placement and routing nets very difficult. Moreover, compared with [ learning the pin order inside a net, we try to learn the order for routing the net level which new in literature.
Generative Models for Placement and Routing. There are emerging works on introducing gen- erative models for chip design. [1] proposes a generative adversarial network (GAN) [12 guided well generation framework to mimic experts' behavior from high-quality manually-craftee layouts. adopts GAN for generating wells and guides the placement in analog circuit layout synthesis. 14 proposes a generative model for the placement optimization of analog integrated circuit basic blocks. ThermGAN [5] treats the thermal map estimation problem as an ganggeggnerttion problem using the generative model. [66] uses GAN to predict the congestion heatmap to assist classical routers. The work [17] proposes a conditional GAN to solve the nulti-terminal path- aath-finding task. In [8] the generative models are udopted to synthesize diverse layout patterns. More broadly speaking, generative models have also been recently applied combinatorial optimization, specifically via a latent space learning and search scheme as done in CVAE-Opt [19]. In this paper, we adopt cGAN to generate routes in one shot for each net by regarding the layout to be routed as an image. To our best knowledge, no generative model has been successfully devised and applied to the pin routing problem for each net, which in fact involves complicated and constrained routing.
3 Methodology
Approach Overview. Given a netlist as input, the goal of placement to place the macros and standard cells on the chip canvas, idcally with a minimized overlapping areas. Based the placement results, routing is performed in general to minimize the total wirelength while not violating the constraints. For placement, scheme, and meanwhile optimize the net order for routing. For routing, we propose a conditional generative model obtain the routes in one-shot instead of performing sequential pin connection as done in previous learning- based 66] as well as classic routers 220 21. The stacking RL placement network and generative routing network can be learned via gradient back propagation in end-to-end manner, which meanwhile completes the whole task in line with the state-of-the-arr learning- basdd placement and routing solvers 2 J. Note our work is pure learning based in contrast 2 that still involves unlearnable classic routers in the whole pipeline. The pure neural architecture implies that our model has the potential enjoy higher capacity by using larger model for further improvement.
aim to flexibly and efficiently handle the mixed-size macros via an RL
3.1 Reinforcement Learning for Mixed-size Placement
natural idea for classical placers to address the mixed-size issue for placement to adopt a hierarchical approach based partitioning. However, it sacrifices the solution quality since each sub-problem is solved independently. Mcanwhile, DeepPlace as a tearning-based placer assumes that each macro only occupies one cell in the grid graph and ignores pre-placed macros, which leads to a severe overlap issue in the final placement result. This motivates us to extend the formulation of DeepPlace by considering the real size of macros well initial placement information. We still adopt [22) as the CNN backbone and GCN (23 as the GNN backbone which consists of three layers that contain 16, 32 and 16 feature channels. The policy network is updated by Proximal Policy Optimization (PPO) [24), in line with the effective setting adopted in (2]. The revised elements of the Markov Decision Processes (MDPs) for mixed-size placement are defined as:
State sy the state representation still consists of global image I portrayed the layout and netlist graph H contains detailed position of placed macros, except that the initial state of I is no longer zero matrix Inxn = O. Instead, our model preprocesses the positions of fixed macros in the dataset and sets my as 1 if (a. y) has already been occupied before placement.
Action az the action of RL agent is find the central of current macro, and position (Io. yo) is available all points p in the region R satisfy I, = 0, where R {(x.)) v) |x x 2 w } and h, w denote the height and width of the current macro respectively.
< 2 Vo
Reward re: to further control the overlap in the final placement, the reward at the end of episode a negative weighted sum of wirelength, routing congestion and overlapping area from the final solution: Rg - Lud d Leg X2 Lot as weighted by a and Xg-
3

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3.2 Conditional Generative Learning for Pin Routing in Net
The Global Routing Grid Protocol. In global routing, the physical chip is usually divided into rectangular areas, as shown in the left part of Fig. [ Each area is called global routing cell (Geell), which corresponds to a node U; E V in the grid graph G(V, E) on the right side. While each edge eij E represents the joint boundary between abutting Gcells v, and vy. For edge its capacity Ce is the allowed maximum number of wires that can cross e, and the usage ue is the actual number of wires that e has been assigned. The overflow Oe mar(0, Uh - ce) denotes the amount of wires beyond Ce. Each route conforms to the rectilinear Steiner tree structure 25
Grid-based Conditional Generative Routing. The overall routing task is composed of numer- ous nets whose routing can be independent to each other. A single net consists of a series of pins placed in the nodes of the grid graph. Thus in this paper, we mainly consider the routing over multiple pins in one net. Given single net, we formulate the one-net routing problem as the mapping from one-net routing image x to the corresponding route layout image y. where z contains three channels: 1) the locations of pins, 2) the availability of horizontal grid edges, and 3) the availability of vertical grid edges, and one channel for y. As to the output, the value of each pixel of y denotes the likelihood of whether this grid point belongs to the route or not. Hence, the synthesis of routes can also be viewed as binary classification of the pixels in y. The pixels whose likelihood higher than the threshold are subsequently collected to form the route. In case of disconnected routes, we apply maze routing to refine the outcomes. In the initial design of our model, we do not adopt the random noise 2, which mainly leads to producing fairly stochastic outputs, since the routing task barely requires stochasticity.
Gcell
boundary
edge
node
DIRITO
Figure I: A chip partitioned into global cells with mixed-size macros, and its grid graph layout.
Our routing model adopts the conditional generative adversarial framework, which has shown effectiveness in image generation. The generator is composed of a basic generator for the input size of 64 64 or below (the smaller ones are padded to 64 x 64) and an extension for the input size of larger than 64 x 64. The discriminator consists of two sub-discriminators to estimate routes from validity and realness perspectives. We, furthermore, design an enhanced loss to improve the performance of our model. The structure of the generative model is visualized in Fig
3.2.1 Layout Input-sizeAAaapting Generator
During routing, the physical chips are decomposed into Gcells in terms of various widths and heights as shown in Fig. [ causing the diversity of the scale of the corresponding grid graphs. To make it more tractable, we develop an input-size-adapting generator to handle various grid graphs
First, construct basic generator. Gbaze, solve grids not larger than 64 x 64 the chip is divided into 64x 64 tiles in the macro placement stage. The architecture proposed by (26) is partly adopted as the backbone of Gbaee. which has been proven successful in generative tasks. Our basic generator contains four components : 1) convolutional front-end, 2) a series of residual blocks, 3) transposed convolutional component, and 4) convolutional layer to generate the output.
Second, to handle larger grids, we establish another generator Giarge, which is composed by two sub-networks: Ginner and Gouter (G; and G., for simplicity). G; and G. are termed as the guiding network and the filling network, respectively. The guiding network consists the first three parts that Ghose owns. In contrast, the components of filling network are similar to Gboses and correspondingly we use G (k- = 1, 3, 4) to denote them. We feed the input grid to G., to obtain a feature map, and downsample the input grid to feed G; to acquire another feature map. G takes in the element- sum of these two feature maps and integrates the guiding information into G.. and the hybrid feature map then is converted into the output. The architecture of our generator is illustrated in Fig. lefft) We can further incrementally stack additional sub-networks on Glarge and model compression techniques be used to help keep the inner network neat. While training the networks, first pre-train the sub-networks separately, and then we jointly train them to fine-tune the whole network.
Remarks.
The CNN-based generator coincides with routing: 2-D neighborhood structure, translation equivariance and locality. Amid routing, chips are formulated as grids, which are further transformed into images. Routing also exhibits translation equivariance since translating whole net with the

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Spput-size-Wilaptiing Generator
Disscrimiinttr
Couneciviiyy
Renlness
Cpace (for grid graphs s 64 X64)
Standardd Layout
Standard Route
Counecivvry Decoler
Kzalness
Decader
Encoder
Resifel Blocks
Decoav
Decoder
Residuzl Blocks
Residmal
Blocks
Givver (for grid graphs > 64 x64)
Map
Down sampling
Cony
Encode:
Enender
d+
Resicual
Blocks
Deconr
Dexader
Route
Layou
Figure 2: Architecture of the proposed generative routing model using cGAN. Left Top: the standard generator to handle grid graphs layout as input no bigger than 64x64. We pad black pixels those smaller than 64x64. Left Bottom: the generator for larger grids. In the input layout, the red pixels represent pins, and the black blocks denote edges without capacity. We append Giarge to Gbase. and the two networks are jointy trained on large grids. The element-wise sum of the feature map of Glarge and the feature map from Ghase is fed to the residual blocks of Glarge as the input. Right: The architecture of the bi-discriminator with two branches for connectivity and realness scoring. These two branches are trained with connectivity labels and realness labels, respectively.
context will not change the routing result. Moreover, for each grid node, the convolution kernel gathers the information from locally adjacent vertices, especially those directly connected to it, to form local routing features. The holistic route is then produced. Rather than simply stacking layers to handle long-range dependencies, the well-trained guiding network provides global information equivalent to long-range dependencies.
3.2.2 Bi-Discriminator to Consider both Realness and Connectivity
Routing problems have an inherent constraint that all pins should be connected. Therefore we devise a discriminator evaluate the connectivity of the output. To effectively train the connectivity discriminator, we develop an algorithm to accurately figure out the connectivity of each fake and real route, and then employ the results labels. Connectivity alone is not sufficient evaluate the authenticity of the output, so we adopt another discriminator to estimate the realness of the output, as the original discriminator in GAN. Overall. the adversarial loss of our model can be expressed as
Cado Cado(G, (G, = Σ X (Ez,y [log (1 y)] Eg log(1 D2(2, G(z))))),
(1)
1=1.2
where Dj and D2 denote the connectivity discriminator and the realness discriminator, respectively, and X₁ and À represent the corresponding weights s.t. λι + À2 1. The discriminators share the convolutional front-end and stack of L = 3 convolutional and residual blocks, and then they make evaluations from different angles as depicted in the right part of Fig.
3.2.3 Enhanced Model Loss
With the cGAN objective mixed with a traditional loss, such as LI and L2 loss, training is inefficient most grid points easy negatives that cannot yield effective learning signals. In addition, tons of trivial negatives impair the training and give rise to a degraded model, and the output, thus, inclines to converge to empty route. To bridge the gap between easy negatives and scarce positives, apply the focal loss [27] and modify it to fit our task:
(FI(G) = -EE,,
N Σ a [ya(1 7 log + y:)9, log(1 - 9:)l
where 1,..., N represents grid points, and yi and respectively denotes the real and generated value corresponding grid point. We also incorporate the 1.2 loss into our objective to approach the real routes, and because it has been found beneficial to the synthesis [28] 29).

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(3) genertiive model for routing truined using
placement result from mixed-size agent
initial state
placement solution
Intermeiiate result routing solution
generative router
wirelength
(1) mixed size ugent places one macrr each step
(2) net ordering agent decides which net to youted next
placement and eedering model are optimized joinity in whole RL fronwwock
Figure 3: Our neural macro placement and routing pipeline. Given netlist input, mixed-size agent sequentially places macros on the chip layout. Generative router is then adopted to route the chosen by net order agent. Inspired by EM algorithm, we update generative router by placement result from mixed-size agent, then placement and net order agents are learned jointly in a whole reinforcement learning framework to minimize wirelength calculated by trained generative model.
The introduction of the connectivity discriminator improves the correctness of the results, but the same time, it may slightly increase the wirelength. Since the wirelength has an accurate theoretical lower bound, i.c. half-perimeter wirelength (HPWL) of the bounding box of net, we take the difference between the length of the generated route and the HPWL as regularization term to limit the wire length. We use (G) = E. (z))) h(=:)ll] represent the regularization term, where (z)) denotes the length of the generated route, and h(x) denotes the HPWL of the net.
The overall enhanced objective of our model gathers the above losses:
min (max Ludo Ludo (i) (FLCFL(G) + P12C12(G) + (G),
where JFL ML2 and j4, are defined the factors of LFL LL2 and Lr, respectively.
3.3 Neural Maero Placement and Routing Pipeline
Combining the RL-based model for learning mixed-size macro placement with one-shot generative routing network to perform routing as we introduce above, we propose pure neural pipeline for macro placement and routing. Fig. shows the flow of our mixed-size macro placer with adaptive reward function between coarse HPWL estimation to wirelength from the neural router. Given the circuit information, our mixed-sizz agent sequentially places the macros on the chip layout, after which the generative model for routing is adopted to connect the net chosen by net order agent and finally calculate wirelength as feedback. Inspired by EM algorithm, we first update the generative router using placement result from mixed-size agent (similar to E step), then placement and net order agents are learned jointly in whole reinforcement learning framework to minimize wirelength calculated by trained generative model (corresponding M step) following recursive pattern.
3.3.1 Reward Adaptation between Coarse HPWL and Router's WL
HPWL is a common metric for estimating the true wirelength decided by routing. our neural pipeline, however, we apply one-shot generative routing network to route all the nets directly, which reduces bias in the reward signal. Nevertheless, is worth noting that the untrained policy network for placement would start with random weights so that placement results are of low quality. As result, the distribution of pins in a single net will spread out, which is difficult for a generative model-based router produce accurate route layout images. To tackle this problem, we propose adaptive scheme to calculate wirelength for our placement agent, integrating HPWL and neural router's output simultaneously. We introduce scale two values and define the smoothed wirelength WL,:
WL, = A L,, + (1 - HPWL
(4)
where I. is the feedhack of neural router. each iteration, variable À is updated by function 1 0.01- Initially, À begins with 0 so that the wirelength is determined by HPW L that serves as a coarse reward signal. As the training proceeds, the feedback of neural router gradually becomes prominent factor to provide more accurate objective for the placement agent.
3.3.2 Learning Net Order to Route
The order in which nets are routed one of the most critical factors that affects the routing quality (3) Most classical routers determine the net order by heuristics, e.g., routing smaller nets earlier [3] due

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to the flexibility of finding free path. However, there are diverse definitions for "smaller net", none of which is proved to be optimal. What makes the situation worse, the complexity of real routing procedure requires us to change the net order dynamically, which is hard to implement in such complicated system. Fortunately, our neural router divides the routing task into a series of one-net routing problems and then solves them independently, making it convenient to learn the net order.
We build net order learning module upon the neural router by developing RL agent to determine which net to route next. Inspired by the structure of placement agent, the state of net order problem consists of routing image R as a representation of current routing layout, and graph G indicating the connectivity between nets. There are three channels of R: the locations of routed net, the capability of horizontal and vertical grid edges. Graph G is an edge-to-vertex dual of netlist graph H, whose vertices denote nets (i.e., hyperedges of H) and edges denote common cells between nets (i.c., nodes of H). Note that the state of placement and net ordering tasks are quite similar while both seek to minimize the total wirelength, we combine them into whole RL framework by adopting same policy network to generate feature embeddings for two tasks respectively. The united structure without heuristic solver reflects the strongly coupled relationship between placement and routing, which that merely applies router as a black box to calculate the reward.
differs from 2
Experiments
4.1 Protocols and Setup
Experiments are conducted on a server with RTX 3090 GPUs and AMD 3970X 32-Core CPU, and implemented by PyTorch. We term our whole approach for placement and routing as PRNet.
Benchmarks & Datasets. For placement, we validate our RI. agent for mixed-size macro placement using ISPD-2005 benchmark (32] after pre- pre-ppoccssingg. such that most fixed macros are exchanged for movable ones in line with (2). For routing Fl we choose the ISPD-07 [5] benchmarks to produce routing instances and use the routes generated by the strong classic router (33 training labels.
In the ISPD-07 benchmarks, some nets can contain up to hundreds of pins, but the average amount of pins in a single net is still about 4. In other words, massive nets contain no more than 4 pins. Therefore, the routing model should have sufficient ability to route the easy nets. From around 750K routing instances, we collect 30K 64 nets as the Route-small-4 dataset whose instance contains up to 4 pins, 80K 64x64 samples as Route-small, and 100K 128 x 128 samples as Route-large to evaluate the model's ability. Each of the three datasets is randomly divided into a training set (80%) and test set (20%). These three training sets are used to train generative routing models and pick up the best one according to their performance the test sets. Then we continue to train the best 64 64 model with additional 200K 64 64 instances and train the 128 128 model with additional 400K 128x 128 instances, which is used to perform experiments on the ISPD-98 routing benchmarks (34].
Training. To train the placement and net ordering RL agent, we use PPO 24] to update the policy network and Adam optimizer [35] is utilized with a learning rate of 2.5x 4, For training the routing models, we use Adam with learning rate of 1x100= 31 = 0.5, 832 = 0.999 and a weight decay of 0.01. We employ a batch size of 64. A linear learning rate decay is also applied.
Evaluation. In mixed-size placement, area to evaluate both methods while we introduce wirelength (WL) and routing congestion (RC) (36) in overall placement and routing. For routing, since there is little metrie for generative routing model, we introduce the metrics correctness rate (Crrt) and wirelength ratio (WLR) to evaluate the generated results of generative models on the datasets. CriRR signifies the ratio of the amount of connected overflow-free routes to the number of all routes, or in short the accuracy of generated result. WLR represents the ratio of the total wirelength of connected overflow-free routes to the total wirelength of the corresponding real routes. Lower WLR indicates that the route requires fewer wires. In the experiments on the ISPD-98 routing benchmarks, wirelength, overflow and runtime are used.
adopt HPWL. the proxy of wirelength and overlapping
4.2 Results on Mixed-size Placement
We compare the total wirelength together with overlapping area of our mixed-size approach with the state-of-the-art and open-sourced method called DeepPlace 2 as shown in Table I Both methods generate intermediate macro placement via RL, and then adopt gradient- based opumization placer
II fact we have limited choice for constructing our deep model training dataset, as there is little public dataset for training generative models for routing, and few classical routers are open-source.
7

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12000
12000
10000
20000
8000
0000
6000
0
2000
4000
6000
8000
10000
12000
2000 4000
6000
8000
10000
12000
(a) Result of DeepPlace 2
(b) Result our mixed-size placer.
Figure 4: Visualization of macro orange) /standard cell (in blue) placement by DeepPlace [2] and our mixed-size placer on circuit bighluel. Our placer tends to place large macros in the center of canvas to avoid overlapping. while they are close each other on the boundary for DeepPlace.
Table 1: Comparison on mixed-size placement task on the eight circuits from ISPD-2005.
Mixed-size technique (ours)
DeepPlace 2
Circuit
Cells
# Mov.
Wirelength.
Overlap Arcal,
Wirelength.
Overlap Arca..
adaptecl
21 KK
514
82783826
12606828
801 17232
66608273
adaptec2
255K
542
123307824
19485631
123265964
47085963
adaptee3
451K
710
232373680
58588016
241072304
140272759
adaptec4
234008876
73075220
236391936
169853555
highlue
278K
551
141020208
2041890
140435296
3519755
highlue2
558K
948
144803296
70702107
140465488
103663 199
bighlue3
1097K
1227
468632064
39664931
450633360
574956948
highlued
2177K
659
1001315712
67794270
951984128
87630042
ratio
1.000
1.0
0.987
3.9
as used in [37 to obtain complete placement solution. With only a slight increase of the total wirelength (within 1.3% difference on average), our mixed-size macro placer achieves approximately 4x reduction over DeepPlace on the overlapping area, stressing the importance of modeling macro's shape in state space. Moreover, the reduced overlapping area requires less post-processing to resolve collision, which facilitates improvement of wirelength in the long term. Examples of our mixed-size placer and DeepPlace circuit bigbluel visualized in Fig.
4.3 Results on Routing
Comparison of Generative Backbones. We compare our model with CVAE based router using CNN the backbone (9) and use CVA)*(CNN) to denote it. We then combine the CCNN) with a vanilla discriminator and our bi-discriminator to build CVAE* and CVAE*-beGAN,
following the idea of (38]. In addition, we implement a U-Net based cGAN following pix2pix [29 and use cGAN(U-Net*) to denote it. Then we remove the discriminator to obtain a U-Net [39 generator and define as U-Net* We further replace the discriminator of cGAN(U-Nett) with
our bi-discriminator. We also try to train the RL agent following the work of (). but it fails to converge after 2-week training. Table shoows the comparison results. The ResNet-based 440 models outperform the counterparts based on CVAE*(CNN) and U-Net*. Our model achieves approximately 2x correctness rate, 14.7% improvement of the wirelength on Route-small-4 and 2.4% on Route- small over (CNN. The vanilla cGAN discriminator slightly improves CVAE*(CNN) and U-Net* on one side while sacrificing the other side, and debases the ResNet generator. However, the bi-discriminator strengthens the generators except for the CCA)*
Ablation Studies. We conduct ablation experiments to investigate the contributions of the design choices in our model. In Table we compare the full version with ResNet-based cGAN, well as the pure ResNet generator. The ResNet generator outdoes the cGAN, but the bi-discriminator significantly improves the generator. Moreover, the enhanced loss improves the wirelength at the marginal expense of correctness. Appendix 1.3.1 contains further details of comparison among loss functions, and Appendix A.3.2 shows the effectiveness of the aoput--ize-adapting network.

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Table 2: Evaluation of different backbones w.r.t. correctness rate (CrrR) and wirelength ratio (WLR) for the routing on: Route-small and Koute-small. cGAN: the vanilla cGAN model with a single realness discriminator; beGAN: the bi-discriminator version. EL: enhanced loss in Eq.
Route-small-4
Route-small
router w/ different generative models
CmtR1
WLR
CrrR1
WLRI
CVAE 9
0.41410.000
1.1791008
0.397
1,04210.00
(GANCCN) CVAE -OGANCCN
=00K5
1.292
0.439=0021
1.315
0.474
1,525
00488=0007
#00122
U-Net" [39]
0.724
3,306110266
0.524
1.232
CGAN(U-Net*)
0.60220000
1. 1.0282000
0.532:0001
1,286220002
bcCAN(U-Net*)
0.7211.0012
1.134
0.552.10.0
1.10440006
ResNet 40
0.783
I. 1,0232000
0.594=20004
1.030=0007
(GAN(ResNet)
0.69820001
1.07310011
0.568
2.
bcGAN(ResNet)
104
1.035
0.738 10.000
1,03610002
heCIAN(ResNett-FFL (full version of our router)
0.814
1.010:0000
0.735=a010
1.018:00044
Table 3: Evaluation of wirelength (WL) and routing congestion (RC) for overall placement and routing pipeline on ISPD-05 benchmark. "GR": our generative router; "NOL" net order learning.
RL Placer lue. DeepPtace
bssed Placer GK
based Placer -NOL PKNer)
WLJ
RC1
WL.
RCL
WL]
adsttecl
61:49
56555
5060
10.464
5787
9.386
adagtec2
23659
46.278
23048
45.249
22977
35,504
adaptec3
201.54
62.751
29711
73.324
29462
43.207
adaptecd
47923
124.257
47406
121.455
46964
65.796
lightc1
7634
11,480
7365
12,391
7230
11.289
hightc2
16775
26.318
16603
45.945
16617
25.49H
Nibluc3
42550
67.124
41617
70.187
40509
64.964
highnee
15347
$4,903
15356
42.095
18283
24.233
Table 4: Evaluation of wirelength (WL) and runtime in seconds (Time) with three classical routers on
ISPD-98 routing benchmarks. Note that the overflow (OF) is all zero for all methods.
Our router
NTIU Roate 2.0 30
BoxRouter 2.0
41
FasRoute 3.0 42
Circuits
WL.1
Timo(s)]
WLJ
Time(s))
WL.1
Time(s)
WL.1
Timo(s),
ibant1
62337
59.2
62498
1.54
62659
33
64221
0.64
ibm02
170270
179.9
169881
3.15
171110
36
172223
0.85
ibm03
146362
194.6
146458
1.49
146634
18
146753
0.49
ibm04
165874
254.4
166452
3.81
167275
170146
2.7
Test Results. We test our conditional generative router the ISPD-98 benchmarks and compare the wirelength, overflow and runtime with three classical routers that perform best on ISPD-98 bench- marks. T the results. Our generative routing model presents competitive consequences on wirelength. while it takes a longer time to accomplish the routing task, compared with strong heuristic baselines (30] 4 42 Our model takes an image encoded from the whole grid with net as the input and sequentially solve each net in one-shot manner, while classical routers only consider the local area, which may obtain fewer wirelength yet consume more time. However, it is still much more efficient and easier to train than the RL-based router 6 in our empirical experience.
4.4 Comparison with Concurrent Version of Our Router and Other Classic Routers
By default, our generative router routes the nets sequentially (i.e. one net by one net) such that produces routes with lower wirelength and overflow. In another word, the batch size in the inference stage for the deep routing network is which is not common and does not release the computing advantage of GPU. To speed up our generative router, we set the batch size 16 in the inference stage to enable our router to run in a concurrent manner.
However, the concurrent version may degenerate the performance of the outputs wirelength and overflow. As illustrated in Fig. I in Appendix, the bounding box of netl overlaps with that of net2, and the bounding box of ned3 is far away from them. When routing these three nets concurrently, the routes of net1 and net2 may intersect with each other and cause conflict in the usage of routing capacity, which leads to overflow and makes routing harder for the rest of nets.
We first test our conditional generative routing model with each net routed sequentially (i.e. a batch size of 1) on the ISPD-98 benchmarks. In addition, we run our generative router with nets routed concurrently (a batch size of 16), which may trade wirelength and overflow for runtime, and we reimplement the post-processing module by C++. The sequential and concurrent variants of our

---

Table 5: Evaluation of wirelength (WL), overflow (OF) and runtime (Time) with three classical
routers on ISPD-98 routing benchmarks. Sequential denotes the variant of our router sequentially routing each net, while Concurrent represents the concurrently routing variant. Numbers including
WI., OF and time for the compared router are directly quoted from the paper BoxRouter [45] where
the hardware setting is 2.8 GHz Pentium-4 Linux machine with 2G RAM. Note ibm005 a trivial case as also pointed out in 45 due to the sufficient routing resources.
Circaits
Our rotter (Sequentia)
Our (Concurien)
I Labyiith 1.1
Pengshui 5.1
RoxRouter
WL.
OFL
Timetst)
WL4
OFL
Timecss)
WL]
DF]
Timelsi]
WL.
OF]
Time(s))
WL.
OFL
Timets)).
ihm01
62337
59.2
64094
17.6
75009
340
4.46
66006
180
65588
8.3
ihm02
170270
0
179.9
173391
25
27.1
1012566
571
7.34
178892
64
47.9
178759
33
34,1
ibm03
146362
0
194.6
148629
5
24.4
187345
258
8.66
152392
10
35.2
151299
0
16.9
ibm04
165874
254.4
168897
142
36.1
195856
947
21.88
173241
465
54.1
173289
309
23.9
ihm05
408421
189.9
420581
5.35
412197
409747
49.5
ibm06
278029
341618
495
14.01
33.0
generative routing model are defined as Sequential and Concurrent, respectively. We further compare the wirelength, overflow and runtime with three more classical routers, Labyrinth 1.1 [43, Fengshui 5.1 44 and BoxRouter
45 in Table The results of three classical routers are directly quoted from the paper BoxRouter [45). The experiments of classical routers are performed on 1.4GHz
PentiumlII workstation with Linux operating system, and our generative routers are performed on server with RTX 3090 GPUs and AMD 3970X 32-Core CPU. We also secure the source code of Labyrinth 1.1 and run on our machine where results are shown in Table 4 in Appendix, while the other two routers are not open-source and are difficult to reproduce.
Table [] shows the results. On the one hand, our sequential generative routing model outperforms the classical routers on wirelength and overflow, while it takes longer time, compared with strong heuristic baselines. On the other hand, our concurrent version dramatically speeds up the running (3.36 ~ 7.98 speedup) of generative routing model at the expense of total wirelength and overflow, and it still performs better than the three classical routers on wirelength and overflow, except the overflow on ibmr05 and the overflow of BoxRouter on ibm03 and ibm006. Modifyyng our algorithms and finding other techniques to cut down the runtime are still being explored.
4.5 Results of Overall Placement and Routing with Ablation Study on Net Order Learning
We compare our PRNetwith DeepPlace, along with an ablation study to verify the impact of net order learning. The circuits used for evaluation are the same as in mixed-size placement, and we concentrate on macros only for simplicity. Note that the real shape of macros is ignored and the grid-based mask is coarser in (2) hence the results shown in Table 3 are not identical to those in the original paper (2) For all test cases, our neural placement and routing pipeline outperforms the other two methods in terms of both wirelength (WL. and routing congestion (RC). The significant difference in routing congestion without net order learning indicates that net order agent is able to arrange the sequence of routing efficiently, especially on circuits adaptec3 and adaptec4. As a result, it is easy for every net to find free routing path while keeping away from congested area. In addition, training placement model with generative neural router in an end-to-end manner further improves the final wirelength, despite a little degradation of routing congestion if we discard the net order agent.
5 Conclusion and Outlook
We have presented a neural mixed-size placement and routing pipeline. The routing is achieved by one-shot generation of the whole path, with devised net order learning module to dynamically adjust the routing order. Experimental results show the effectiveness of our approach.
Limitation & potential negative impact. The conditional generative routing model is currently trained on the routes generated by the state-of-the-art classical router. Therefore, its performance may be limited by the trainer. Unsupervised/sseissuper negative side, Al-based placement and routing may cause the lose of jobs in EDA industry.
learning is possible alternatives. For its
Acknowledgement
This work was partly supported by National Key Research and Development Program of China A01000,0) National Natural Science Foundation of China (61972250, 1270033,, and Shanghai Municipal Science and Technology (Major) Project (2021 SHZDZXX102, 2251 1 1 1005100).
10

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12

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Checklist
1. For all authors...
(a) Do the main claims made in the abstract and introduction accurately reflect the paper's
contributions and scope? [Yes]
(b) Did you describe the limitations of your work? [Yes]
(c) Did you discuss any potential negative societal impacts of your work? [Yes] See
Appendix.
(d) Have you read the ethics review guidelines and ensured that your paper conforms to them? [Yes]
2. If you are including theoretical results...
(a) Did you state the full set of assumptions of all theoretical results? [N/A]
(b) Did you include complete proofs of all theoretical results? [N/A]
3. If you ran experiments..
(a) Did you include the code, data, and instructions needed to reproduce the main experi- mental results (either in the supplemental material or a URL)? [Yes] See Section
(b) Did you specify all the training details (e.g., data splits, hyperparameters, how they were chosen)? [Yes] See Section 4.1
(c) Did you report error bars (e.g., with respect to the random seed after running experi- ments multiple times)? [Yes]
(d) Did you include the total amount of compute and the type of resources used (c.g., type of GPUs, internal cluster, cloud provider)? [Yes] See Section 4.
4. If you are using existing assets (e.g., code, data, models) or curating/releasing new assets...
(a) If your work uses existing assets, did you cite the creators? [Yes]
(b) Did you mention the license of the assets? [Yes]
(c) Did you include any assets either in the supplemental material or as URL? [N/A]
(d) Did you discuss whether and how consent was obtained from people whose data you're 're using/curating? [N/A]
(e) Did you discuss whether the data you are using/curating contains personally identifiable information or offensive content? [N/A]
5. If you used crowdsourcing or conducted research with human subjects...
(a) Did you include the full text of instructions given to participants and screenshots, applicable? [N/A]
(b) Did you describe any potential participant risks, with links Institutional Review Board (IRB) approvals, if applicable? [N/A]
(c) Did you include the estimated hourly wage paid to participants and the total amount spent on participant compensation? [N/A]
13


Reviews:
[{"review_id": "YC90IbETJJZ", "reviewer": "Reviewer_KgYJ", "summary": "The paper proposes an RL-based model for mixed-size macro placement. The standard cells re placed via gradient-based GPU acceleration and a one-shot conditional generative routing model is devised to perform one-shot routing to the pins within each net. The paper is the first joint placement and routing network without involving any traditional heuristic solver.  ", "questions": "The reviewer feels this paper is only half-baked, not being sufficient for a publication. I would suggest improving several items before a resubmission:\n\n1. Address clearly which part is novel in this paper and which part is just an extension of an existing work. Add the joint placement and routing work in your related work and compare with their work properly. \n\n2. Improve the evaluation section by first, improving the wire length and density results to SoTA baselines like DeepPlace and Graph Placer [2]. \n\n3. Ablation on the decomposition of gains and help readers understand what part of the design contributes most to the improved wire length and density. For example, try to show the generative routing actually improves the performance compared to a more general approach using deep RL. \n\n[2] https://arxiv.org/abs/2004.10746", "limitations": "Yes.", "rating": 4, "confidence": 5, "soundness": 2, "presentation": 2, "contribution": 2, "strengths": "", "weaknesses": "", "quality": null, "clarity": null, "significance": null, "originality": null, "strengths_and_weaknesses": "Strengths:\n- Applying generative models for placement and routing is an interesting topic. Even though, generative models have been successfully applied to various domains, however, this work is novel because no generative models have been devised and applied to the pin routing problem before. \n\nWeaknesses:\n- The paper makes a false claim that this paper is the first one to address placement and routing end-to-end. But there is a prior work jointly optimizing placement and routing in NeurIPS 2021 [1]. Please correct the statement and add the citation in the related work. \n\n- The paper looks like an extension of an existing work combing placement and routing in an end-to-end fashion. The real novelty is in its generative model devised for the routing problem. This could lead to the bad logical order of the paper, where routing comes first while placement comes last. The EM algorithm is section 3.3 is almost a one sentence summary. If the EM algorithm is also part of the originality of this paper, the authors of this paper should provide more details and formulation for section 3.3. Also, logically, you should consider moving section 3.3 earlier. \n\n- There is a very limited set of comparisons to baselines. Only DeepPlace is compared against the proposed method. Table 1 wire length results look even worse than DeepPlace. Please explain why a worse wire length results would justify publishing the paper?\n\n[1] \"On Joint Learning for Solving Placement and Routing in Chip Design\", https://papers.nips.cc/paper/2021/file/898aef0932f6aaecda27aba8e9903991-Paper.pdf", "was_revised": false, "final_justification": "", "rebuttal": "", "claims_and_evidence": "", "methods_and_evaluation_criteria": "", "theoretical_claims": "", "experimental_designs_or_analyses": "", "relation_to_broader_scientific_literature": "", "essential_references_not_discussed": "", "other_strengths_and_weaknesses": "", "other_comments_or_suggestions": "", "questions_for_authors": "", "summary_of_paper": "", "summary_of_recommendation": "", "technical_quality": "", "clarity_of_presentation": "", "potential_impact": "", "robotics_focus": "", "quality_of_limitations": "", "questions_for_rebuttal": "", "reasons_to_accept": "", "reasons_to_reject": "", "questions_to_authors": "", "main_review": "", "summary_of_the_paper": "", "summary_of_the_review": "", "strength_and_weaknesses": "", "limitations_and_societal_impact": "", "review_text": "", "extra_scores": {"ethics_review_area": ""}, "extra_text": {}}, {"review_id": "SWLKzYe_Ww2", "reviewer": "Reviewer_wLLm", "summary": "This paper proposed a neural network-based pipeline for placement and routing of macros and standard cells in chip design. For placement, this paper proposed an RL-based model for learning mixed-size macro placement to reduce frequent collisions in previous methods. For routing, this paper proposed a conditional generative routing network with adaptive routing order to improve previous methods with fixed routing order. Experiments show that the proposed approach has lower overlap area, smaller wire-length and lower routing congestion than previous methods.", "questions": "1. Why incorporating macro size into the state can bring a significant reduction of overlapping areas? \n2. Does the fine grained state information in placer requires higher training costs?\n3. Due to the combinatorial nature of this problem, what is the scalability of the proposed approach? \n4. An estimate of the maximal number of circuit components can be tackled in a reasonable amount of time?", "limitations": "Yes.", "rating": 6, "confidence": 3, "soundness": 3, "presentation": 3, "contribution": 3, "strengths": "", "weaknesses": "", "quality": null, "clarity": null, "significance": null, "originality": null, "strengths_and_weaknesses": "Strengths:\n+ The chip design problem is an important and challenging one.\n+ The proposed approach is technically sound and brings performance improvement over previous approaches.\n\nWeaknesses:\n- The main novelty of the proposed approach is at the routing aspect. The extension of placement module over DeepPlace is very subtle by adopting a different state definition, and it's not clear how such minor extension leads to better performance observed in experiments.\n- Most evaluations of the proposed approach are divided into placement module and routing module as if two separate approaches are proposed. As the main targeted contribution is a joint design, I suggest to perform more evaluations of the proposed approach as a whole to compare with the best combination of existing placers and routers.\n- Error bars are not added for Table 1, Table 3 and Table 4.", "was_revised": false, "final_justification": "", "rebuttal": "", "claims_and_evidence": "", "methods_and_evaluation_criteria": "", "theoretical_claims": "", "experimental_designs_or_analyses": "", "relation_to_broader_scientific_literature": "", "essential_references_not_discussed": "", "other_strengths_and_weaknesses": "", "other_comments_or_suggestions": "", "questions_for_authors": "", "summary_of_paper": "", "summary_of_recommendation": "", "technical_quality": "", "clarity_of_presentation": "", "potential_impact": "", "robotics_focus": "", "quality_of_limitations": "", "questions_for_rebuttal": "", "reasons_to_accept": "", "reasons_to_reject": "", "questions_to_authors": "", "main_review": "", "summary_of_the_paper": "", "summary_of_the_review": "", "strength_and_weaknesses": "", "limitations_and_societal_impact": "", "review_text": "", "extra_scores": {"ethics_review_area": ""}, "extra_text": {}}, {"review_id": "6xpQ6uadwOQ", "reviewer": "Reviewer_YfL9", "summary": "The authors propose a pipeline of chip placement and routing based on machine learning methods. The pipeline consists of the following parts.\n1. An enhanced RL method for macro placement\n2. A conditional generative network for routing\n3. A net order learning method", "questions": "1. The authors claim that \"the method is the first joint placement and routing network without involving any traditional heuristic solver\" in the abstract. What are traditional heuristic solvers? I think there still exist heuristic methods in optimization-based standard cell placement (e.g., DREAMPlace), legalization, and detailed placement. The claim may be too strong. Moreover, I think the overall enhanced objective shown in Equation (3) still belongs to heuristic methods since it lacks of strict proof and does not guarantee solution quality.\n2. Table 4 only shows the results of 4 benchmarks. I do not find other results in appendix. Could the authors conduct experiments on all the benchmarks and report the results in the main body or appendix?\n3. Similarly, Table 3 only shows the results of 2 benchmarks. What about other benchmarks? If the authors do not report them, readers may think that the results are not ideal.\n4. The proposed routing method is \"one-shot\". I am confused by this term. Could the authors explain why they use this term?", "limitations": "The authors discuss the limitation and the social impact in A.2 and A.3, which is a great discussion.", "rating": 6, "confidence": 4, "soundness": 2, "presentation": 3, "contribution": 2, "strengths": "", "weaknesses": "", "quality": null, "clarity": null, "significance": null, "originality": null, "strengths_and_weaknesses": "Strengths\n1. The paper is well organized and developed.\n2. The method and experiments are reasonable and sound.\n\nWeaknesses\n1. There are too many hyperparameters in the proposed methods. It may be difficult for others to employ this method. What is the robustness of the method? How sensitive is the method if we modify these hyperparameters?\n2. The results in Table 1 are mixed. Namely, DeepPlace and the proposed method both present Pareto optimal results. It is better to show that the proposed method can achieve lower wirelength and smaller overlap at the same time.\n3. In Lines 108, and 109, the authors mention that \"the pure neural architecture of our model implies our model has the potential to enjoy higher capacity by using a larger model for further improvement\". This claim should be discussed in detail and verified in experiments.", "was_revised": false, "final_justification": "", "rebuttal": "", "claims_and_evidence": "", "methods_and_evaluation_criteria": "", "theoretical_claims": "", "experimental_designs_or_analyses": "", "relation_to_broader_scientific_literature": "", "essential_references_not_discussed": "", "other_strengths_and_weaknesses": "", "other_comments_or_suggestions": "", "questions_for_authors": "", "summary_of_paper": "", "summary_of_recommendation": "", "technical_quality": "", "clarity_of_presentation": "", "potential_impact": "", "robotics_focus": "", "quality_of_limitations": "", "questions_for_rebuttal": "", "reasons_to_accept": "", "reasons_to_reject": "", "questions_to_authors": "", "main_review": "", "summary_of_the_paper": "", "summary_of_the_review": "", "strength_and_weaknesses": "", "limitations_and_societal_impact": "", "review_text": "", "extra_scores": {"ethics_review_area": ""}, "extra_text": {}}, {"review_id": "4UBjEZkxvJ0", "reviewer": "Reviewer_NDGm", "summary": "This paper proposes a pure neural pipeline which is the first (to my knowledge) joint placement and routing network in literature without involving traditional heuristic solvers. Specially, a conditional generative routing network is utilized to perform routing in one shot and placement is performed by a policy gradient based RL method for macros while considering their sizes. To tackle the net order issue during routing, a net order agent is proposed to decide which net to be routed next. Experimental results on both placement and routing benchmarks show that the proposed joint networks outperform traditional separate pipeline, as well as those network with heuristic solvers.", "questions": "1. Why is the runtime of generative router notably slower than classical routers? Is there any way to improve the efficiency of the generative router?", "limitations": "The limitation is about the speed for generative routing (see my question part).", "rating": 8, "confidence": 4, "soundness": 3, "presentation": 3, "contribution": 4, "strengths": "", "weaknesses": "", "quality": null, "clarity": null, "significance": null, "originality": null, "strengths_and_weaknesses": "Strengths:\n+ This is an interesting work at the intersection between machine learning and EDA. I applaud the authors’ courage and efforts in this direction. The paper is clearly motivated and well written with informative background and technical description thus I believe both communities can learn from this work and this is a promising area worth for further efforts. \n+ The most impressive novelty lies in the achievement of the first pure neural pipeline for placement and routing owing to a critical design of generative routing. This is contrast to the previous work [Cheng and Yan NeurIPS’21] that adopts traditional routing solvers in network.\n+ There are additional techniques proposed in this paper, including handling the mixed-size macro and adaptive ordering of the net routing. The combination of these additional techniques makes the proposed network more effective.\n+ Experimental results are relatively comprehensive and well delivered. The performance is convincing on the public benchmark ISPD 2005.\n\nWeaknesses:\n- Despite the shown better performance in terms of wirelength, the proposed generative routing model has much longer runtime compared with classical heuristic solvers. I can image and understand that the classic heuristic solvers can be very fast by tailored and industry-level optimized C/C++ codes. The authors shall better discuss or provide more results on this weakness.\n\nOverall this paper has obvious merits regarding with novelty, and a weakness in terms of the routing speed. I am personally tolerant to the weakness because 1) deep learning for placement and routing is still in its infancy and there is still much space to improve the efficiency especially considering the classic routing algorithms are often carefully optimized using C/C++ at industry level; 2) generative models may be a promising direction (in one shot) for incorporating machine learning to the routing problem as the current idea of using reinforcement learning for routing can be even more unaffordable. Hence, I vote for accepting this paper. ", "was_revised": false, "final_justification": "", "rebuttal": "", "claims_and_evidence": "", "methods_and_evaluation_criteria": "", "theoretical_claims": "", "experimental_designs_or_analyses": "", "relation_to_broader_scientific_literature": "", "essential_references_not_discussed": "", "other_strengths_and_weaknesses": "", "other_comments_or_suggestions": "", "questions_for_authors": "", "summary_of_paper": "", "summary_of_recommendation": "", "technical_quality": "", "clarity_of_presentation": "", "potential_impact": "", "robotics_focus": "", "quality_of_limitations": "", "questions_for_rebuttal": "", "reasons_to_accept": "", "reasons_to_reject": "", "questions_to_authors": "", "main_review": "", "summary_of_the_paper": "", "summary_of_the_review": "", "strength_and_weaknesses": "", "limitations_and_societal_impact": "", "review_text": "", "extra_scores": {"ethics_review_area": ""}, "extra_text": {}}]

Author rebuttal:

Decision: Accept