A Graph Enhanced Symbolic Discovery Framework For Efficient Logic Optimization
Authors: Yinqi Bai
Jie Wang
Lei Chen
Zhihai Wang
Yufei Kuang
Mingxuan Yuan
Jianye HAO
Feng Wu
Venue: ICLR 2025 Poster (2025)
Keywords: Chip Design
Logic Optimization
Symbolic Regression
Knowledge Distillation
Primary area: neurosymbolic & hybrid AI systems (physics-informed, logic & formal reasoning, etc.)
TL;DR: We propose a graph enhanced symbolic discovery framework to discover high-performance, efficient and interpretable symbolic functions for efficient logic optimization..

Abstract: The efficiency of Logic Optimization (LO) has become one of the key bottlenecks in chip design. To prompt efficient LO, previous studies propose using a key scoring function to predict and prune a large number of ineffective nodes of the LO heuristics. However, the existing scoring functions struggle to balance inference efficiency, interpretability, and generalization performance, which severely hinders their application to modern LO tools. To address this challenge, we propose a novel data-driven circuit symbolic learning framework, namely CMO, to learn lightweight, interpretable, and generalizable scoring functions. The major challenge of developing CMO is to discover symbolic functions that can well generalize to unseen circuits, i.e., the circuit symbolic generalization problem. Thus, the major technical contribution of CMO is the novel Graph Enhanced Symbolic Discovery framework, which distills dark knowledge from a well-designed Graph Neural Network (GNN) to enhance the generalization capability of the learned symbolic functions. To the best of our knowledge, CMO is *the first* graph-enhanced approach for discovering lightweight and interpretable symbolic functions that can well generalize to unseen circuits in LO. Experiments on three challenging circuit benchmarks show that the *interpretable* symbolic functions learned by CMO outperform previous state-of-the-art (SOTA) GPU-based and human-designed approaches in terms of *inference efficiency* and *generalization capability*. Moreover, we integrate CMO with the Mfs2 heuristic---one of the most time-consuming LO heuristics. The empirical results demonstrate that CMO significantly improves its efficiency while keeping comparable optimization performance when executed on a CPU-based machine, achieving up to 2.5× faster runtime.

Published as a conference paper at ICLR 2025
A GRAPH ENHANCED SYMBOLIC DISCOVERY FRAME- WORK FOR EFFICIENT LOGIC OPTIMIZATION
Yinqi Bail,, Jie Wang Lei Chen', Zhihai Wang', Yufei Kuang', Mingxuan Yuan?,
Ji Hao Feng Wu'
"MoE Key Laboratory of Brain-inspired Intelligent Perception and Cognition,
University of Science and Technology of China
2 Noah's 's Ark Lab, Huawei Technologies
3 College of Intelligence and Computing, Tianjin University
ABSTRACT
The efficiency of Logic Optimization (LO) has become one of the key bottlenecks in chip design. To prompt efficient LO, previous studies propose using a key scor- ing function to predict and prune large number of ineffective nodes of the LO heuristics. However, the existing scoring functions struggle to balance inference efficiency, interpretability, and generalization performance, which severely hin- ders their application to modern LO tools. To address this challenge, we propose novel data-driven circuit symbolic learning framework, namely CMO, to learn lightweight, interpretable, and generalizable scoring functions. The major chal- lenge of developing CMO is discover symbolic functions that can well general- ize to unseen circuits, i.e., the circuit symbolic generalization problem. Thus, the major technical contribution of CMO the novel Graph Enhanced Symbolic Dis- covery framework, which distills dark knowledge from a well-designed graph neu- ral network (GNN) to enhance the generalization capability of the learned sym- bolic functions. To the best of our knowledge, CMO is the first graph-enhanced approach for discovering lightweight and interpretable symbolic functions that can well generalize to unseen circuits in LO. Experiments on three challenging cir- cuit benchmarks show that the interpretable symbolic functions learned by CMO outperform previous state-of-the-art (SOTA) GPU-based and human-designed ap- proaches in terms of inference efficiency and generulization capability. Moreover, we integrate CMO with the Mfs2 heuristic- of the most cons-conuuming LO heuristics. The empirical results demonstrate that CMO significantly improves its efficiency while keeping comparable optimization performance when executed on CPU-based machine, achieving up to 2.5x faster runtime.
INTRODUCTION
The modern chip design workflow has incorporated multiple Electronic Design Automation (EDA) tools to synthesize, simulate, test, and verify different circuit designs efficiently and reliably (Huang ct al. (021). Logic Optimization (LO) is one of the most important EDA tools in the front-end work- flow (Berndt et al. 2022 Pasandi et al. 2023). A key task in LO is Circuit Optimization, which aims to optimize circuits modeled by directed acyelic graphs-with
amnctionality-equiaaaee mations and reduced size and/or depth. It is crucial to well tackle the LO task as can significantly improve the Quality of Results (QoR), i.e., various metrics that evaluate the quality of designed chips, such as size, level, and edge (De Abreu et al., 2021 Bertacco et al. 1997). However, the LO task can be extremely hard to tackle as it is MPP--aaa problem (Micheli 1994 Farrahi & Sar- rafzadeh 1994). To approximately tackle the LO task, many effective LO heuristics such as Mrs2 (Mishchenko al. 2011), Resub (Brayton] 2006), and Rewrite (Bertacco et al.) 1997) have been developed. Specifically, these heuristics usually apply transformations to subgraphs rooted at each node-that is, the node-level transformations mannforrratiossssquenttilll for all nodes on the input circuit.
transfor-
'This work was done when Yinqi Bai was an intern at Huawei Noah's 's Ark Lab. Corresponding author. Email: jiewangx uustc..du.cn.

---

Published as a conference paper at ICLR 2025
The efficiency of LO heuristics in LO tools has become one of the key bottlenecks in chip design, thus significantly impacting the final circuit performance, power, area (PPA), and Time- to- to-Market Le., the overall duration for developing and commercializing new chips (Neto al. 2021 Sab-
bavarapu et al. 2014 Reddy et al. 2014). However, executing L.O heuristics can be highly time- consuming due to a large number of ineffective and redundant transformations. To prompt efficient LO, previous works propose a prediction and prune framework, which applies a key scoring function
to reduce a large number of ineffective node-level transformations (Li et al. 2023 Wang a
However, the existing scoring functions struggle to balance inference efficiency, interpretability, and generalization performance, which severely hinders their application to modern LO tools. First, (Wang et al.) proposes using a well-designed graph neural network (GNN) model (Kipf & Welling 2017 Shi et al. 2023) as the scoring function, which offers a promising approach to well tackle the 1. task. However, the limited inference efficiency of deep learning models leads to higher runtime costs for LO heuristics, as most current industrial LO tools are purely CPU-based. Moreover, the "black-box" nature of deep learning methods raises concerns among researchers about the reliability of deploying such models in practical applications. In contrast, (Li et al. 2023) proposes a human- designed hard-coded mathematical expression the scoring function, which aligns with human intuition and is thus regarded to be reliable. However, designing and developing these functions is extremely challenging as it requires extensive expert knowledge. Moreover, this function can- not achieve high generalization performance due to the lack of adoption of machine learning from existing data, which could significantly degrade the QoR of the optimized circuits.
To address the aforementioned challenges, we propose a novel data-driven circuit symbolic learning framework, namely CMO, which learns symbolic scoring function that combines the advantages of the two paradigms. An appealing feature of the CMO is its greater potential to discover lightweight and interpretable symbolic functions from a decomposed symbolic space. However, we found that the learned symbolic functions cannot generalize well to unseen circuits, i.e., the circuit symbolic generalization problem. The poor generalization performance could significantly degrade the op- timization performance compared to default heuristics. Thus, the major challenge of developing CMO is how to learn symbolic functions that can well generalize to unseen circuits.
To enhance generalization, the major technical contribution of CMO is the novel Graph Enhanced Symbolic Discovery (GESD) framework, which leverages a well-designed GNN to guide the gen- eration of symbolic trees. Specifically, GESD establishes a teacher-student framework in which the GNN functions as the teacher while a Monte-Carle Tree Search (MCTS) based symbolic learn- ing model serves the student. The core idea of GESI) is to utilize the teacher GNN's output, which encapsulates domain-invariant information crucial for circuit generalization (Wang et al.). to strategically guide the generation of the student symbolic trees. Consequently, GESD is adept at discovering symbolic functions with strong generalization capabilities. Experiments on the open- source and industrial benchmarks show that the symbolic functions learned by CMO outperform previous state-of-tte -fethh-rrt (SOTA) GPU-based and human- approaches in terms of inference efficiency and generalization capability. Moreover, we incorporate CMO with the Mfs2 heuristic- the most time-consuming one among commonly used LO heuristics. The empirical results on very large-scale circuits demonstrate that CMO achieves up to 2.5x faster runtime compared with the de- fault Mfs2 heuristic while keeping comparable optimization performance. Furthermore, our GESD learned symbolic functions are all concise expressions that exhibit good interpretability.
We summarize our major contributions as follows: (1) we propose novel circuit symbolic learn- ing framework, namely CMO, to learn efficient, interpretable, and generalizable symbolic functions that are reliable and simple to deploy in modern LO tools. (2) The major technical contribution of
CMO is the novel graph-enhanced symbolic discovery framework which employs a well-designed GNN to enhance the generalization capability of the learned symbolic functions. (3) To the best of our knowledge, CMO is the first graph-enhanced approach for discovering lightweight and in- terpretable symbolic functions that can well generalize to unseen circuits in LO. (4) Experiments demonstrate that the interpretable learned symbolic functions outperform previous SOTA GPU- based and human-designed approaches in terms of inference efficiency and generalization capability. Moreover, it significantly improves the efficiency of the Mfs2 heuristic with comparable optimiza- tion performance on a purely CPU-based machine, achieving up to 2.5x faster runtime.
2

---

Published as a conference paper at ICLR 2025
2
BACKGROUND
Inference Time Comparision
Generallzation performance compartson
Mothations for Foature Decomposition
80.90
11.M1
Accuracy (N)
con
251
Normalized Inforence Time
%
Top Metric
50%
Tp
Feature Categories
(a)
(b)
Figure 1: (a) The inference time of the GNN model is significantly larger than other approaches when executed on CPU-based machines. (b) The human-designed approach and existing SOTA symbolic learning approaches cannot generalize well to unseen circuits, i.e. the circuit symbolic generalization problem. while the GNN model exhibits good generalization capability. (c) The circuit node features exhibit separability without compromising the predictive performance.
The prediction and prune framework for LO Heuristics Many effective LO heuristics have been developed to tackle the LO task. These LO heuristics follow the same paradigm as shown in Figure S Specifically, they apply transformations to subgraphs rooted each node (i.e., the node-level transformations) sequentially for all nodes an input circuit. Note that the major differences among these heuristics lie the node-level transformation mechanism. Recently, (Wang et al.) found that large number of node-level transformations in many LO heuristics are ineffective. which makes applying these heuristics highly consumins., To address this challenge, (Wang et al.) proposes prediction and prune framework that incorporates a scoring function select those nodes with top & scores as predicted effective samples and avoid applying transformations on those ineffective samples to improve the efficiency of LO heuristics. However, the scoring function could significantly degrade the optimization performance compared to default heuristics when inaccurately classifying effective nodes in unseen circuits. Therefore, it essential for the scoring function to achieve high generalization performance for comparable optimization performance.
Monte Carlo Tree Search (MCTS) MCTS an effective method for sequential decision-making problems (Swiechowski al. 2023 Geng et 2024). It builds a search tree of possible states and uses stochastic simul lations to assess node values, allowing efficient exploration of complex decision spaces. The MCTS algorithm follows four steps: (a) Selection: The agent navigates through the search tree based on a policy until it reaches expandable node, new child node added to the tree. (c) Simulation: The agent runs simulations from the current node to terminal state. (d) Backpropagation: The results are used to update the statistics of nodes along the path to the root. To balance exploration and exploitation, MCTS always selects the action based on the Upper Confidence Bound for Trees (UCT) (ocsii & Szepesvári, 20061: UCT((s a) Q(s, a) + [[saa where ((s, a) is the average reward for action in state 8, (s) is the visit count of 8, and N(s a) is the count for choosing a in s.
expandable or terminal node. (b) Expansion: At an
In[](s)]
MOTIVATING RESULTS
Problem Challenge: Limitations For Existing Scoring Functions To learn scoring function that can accurately identify ineffective transformations for efficient LO. (Wang et al.)) proposes a well- designed graph neural network, i.e., COG. However, we observe two limitations that severely limit their wide application to modern LO tools:
Limited inference efficiency on CPUs, We compare the inference time of COG. the human- designed approach Effisyn (Li et al. 2023). and our symbolic discovery method GESD on CPU-based machine. The results Figure Tappporr
support the observation above.
The 'black nature' of the learned scoring function. Deep learning models like GNN are of- ten considered uninterpretable, which hinders a deeper understanding of the learned func- tions and raises safety concerns among researchers.
3

---

Published as a conference paper at ICLR 2025
To alleviate the two aforementioned limitations, a one-step further idea is to employ lighter mod- els. (Li et al.) 2023) proposes a human-designed nonlinear scoring function to replace the time- consuming GNNs. However, this method faces significant limitation:
The poor generalization performance. The results Figure Ib demonstrate that the human- designed approach struggles to achieve high generalization performance on the open-source and industrial benchmarks, which significantly degrades the QoR of the optimized circuits.
Therefore, how to find lightweight, interpretable, and generalizable scoring function is the key problem for efficient LO.
The Circuit Symbolic Generalization Problem in LO In this subsection, we first illustrate the motivation for symbolic discovery. Then we provide a detailed description of the circuit symbolic generalization problem in LO.
Technical Challenge:
Firstly, we found that lightweight and Specifically. we employ a state-of-the-e (SOTA) symbolic learning approach (Sun et al. 2023) on a widely-used benchmark. The results in Figure [ demonstrate that among all of the 15 circuits, the prediction recall of 14 circuits exceeds 99%, which further demonstrates the existence of high- performance symbolic functions. Moreover, the results in Figure Ta show that the learned symbolic functions are very efficient. Therefore, there exist lightweight and nigh--erffrmance symbolic func- tions in our LO task, which motivate our circuit symbolic learning framework.
symbolic functions exist the circuit data.
However, we found it challenging to learn symbolic function that can well generalize to unseen circuits from the training dataset. Specifically, we evaluate a well-designed GNN (Wang et al.) and two SOTA symbolic learning methods, i.e.. SPL (Sun et al. 2023) and DSR (Petersen et al. 2020) on the open-source and industrial benchmarks under the same generalization evaluation strategy (see Section 5). The results Figure Tb show that the predictive performance of the learned symbolic functions is significantly lower than that of the GNN, demonstrating the poor generalization capa- bilities existing symbolic learning approaches. Thus, the major challenge of developing CMO is to learn symbolic functions that can well tackle the circuit symbolic generalization problem.
METHOD
In this section, we first provide a detailed description of the novel data-driven circuit symbolic learning framework (CMO) (see Figure Then, we present our graph enhanced symbolic discovery (GESD) framework that can enhance the generalization ability of the learned symbolic functions via graph distillation (see Figure 3 Finally, demonstrate how deploy the learned lightweight and interpretable symbolic functions in modern LO tools.
4.1 THE DRTAED CIRCUIT SYMBOLIC LEARNING FRAMEWORK
As shown in Figure La and Figure lb found that existing GNN-based and human-designe ap- proaches struggle to balance inference efficiency, interpretability, and generalization performance. To address this problem, we propose novel data-driven circuit symbolic learning framework, namely CMO, to discover symbolic functions that combine the advantages of the two paradigms.
To generate the circuit dataset, we apply a LO heuristic optimize the circuit, which applies various node-level transformations to each node in the input circuit. For each node in the circuit, we generate a data pair (x,, where X; E Rd denotes the i-th node feature and y: E IR denotes the corresponding label. Specifically, if the node-level transformation is effective the node x,, then we set y/1 1. Otherwise, y/1 0. Given the LO heuristic and N samples, we generate a dataset D (x, yi I. and aim to find a lightweight and interpretable symbolic function from this dataset that can well generalize to unseen circuits.
Data Collection
Structural-Semantés Feature Decomposition Given an input circuit, we choose the node features that contain as much as possible information about the LO task. Therefore, we use the feature vec- tor employed in (Wang et al.).. which contains abundant structural and semantic (i.e., functionality) information of the circuit nodes (see Appendix E.4). However, the high dimensionality of the ap- plied features increases the search space and makes challenging discover lightweight symbolic functions that effectively capture information from the circuit data. To address this challenge, we propose structural semantic- feature decomposition mechanism, which separates the node features
4

---

Published as a conference paper at ICLR 2025
optimized node
node label
node labels
node features
node labels
Heuristic
node feature
node labels
semantic features
structural features
node labels
1. Data Collection for Symbolic Discovery
semantic
structural feature
semantic function learning
GESD structural function learning
Scor
score
ADD
Fvem
pcol
3. Feature Information Fusion
2. Btructura-Seeaane Feature Decomposition
Figure 2: Illustration the novel data-driven circuit symbolic learning Framework.
X; into structural (x."r) and semantic (x+em) components for symbolic discovery. The rationale behind this feature decomposition is based on a key observation the circuit features exhibit separa- bility without compromising the predictive performance of the scoring model as shown in Figure [c Specifically, we decompose the node features into structural and semantic components train the GNN model, and the results show that the GNN trained on decomposed features could achieve com- parable prediction performance to that trained default features. By applying this decomposition, the original sixty-nine feature variables are reduced to five structural features, thereby significantly shrinking the symbolic search space and enabling lightweight symbolic function discovery.
GESD for Symbolic Function Learning After decomposing the init feature into structural and se- mantic components, collect structural data Detr {x²"r M4 ) and semantic data D sem where x refers to structural node feature and x.em refers semantic node feature. To capture structural information, we employ our Graph Enhanced Symbolic Discovery (GESD) framework to learn mathematical symbolic function farr Rd R (see Section 4.2 as the values of structural features can be approximated as continuous data, making them suitable for con- tinuous mathematical symbolic regression. In contrast, learning mathematical functions for semantic information is challenging due to the discrete and binary nature of both feature values and labels. Thus, to capture semantic information, we formulate the semantic function as Boolean symbolic learning problem, i.e., employing our GESD framework to learn boolean function faem. B - B that can accurately identify the effective nodes, where B {0, 1} denotes the boolean domain.
{x,em y3 /
F Feature Information F Fusion After discovering the structural and functional symbolic functions, we get the score 8; for a node in unseen circuit using the following equation:
8;
+ w faem
(x:
sem)
(1)
w is a weight value in the range [0, 1] that balances the two types information. Due to limited space, please refer to Algorithm 3 for detailed explanation of the derivation process of s;.
4.2 GRAPH ENHANCED SYMBOLIC DISCOVERY FRAMEWORK
To address the circuit symbolic generalization problem (shown in Figure 1b we introduce the Graph Enhanced Symbolic Discovery (GESD) framework (see Figure 3 which incorporates the strong generalization capability of well-designed GNN model into our symbolic tree searching process. Note that both the structural and semantic functions follow the same symbolic discovery framework, differing only training details. Therefore, we provide the implementation details of the semantic symbolic learning process in Appendix E.3
Symbolic Operators In our task, we use an expression tree to express the symbolic functions. The mathematical operators used to generate the expression tree are {+--, -,, x, log, exp, sin, cos We didn't employ placeholders to generate constants while introducing an inner optimization loop generally requires higher training costs (Sun et al. 2023 Xu et al. 2024). Moreover, found that some complex operators like sin, cos could achieve high prediction performance for the five dimension structural features. Therefore,
the afonementioned operators.
5

---

Published as a conference paper at ICLR 2025
Repeat
Selection
Expansion
Simulation
Propagation
2=04 N 50
SLR
SUR
0 N=
Max UCT
Randomly Fick
Randomly
24
Pick
SIR
GNN
Simulation
7
0.1
Expression Tree
Distillation Loss
simulations
=
Reward
SIA
Y'P
p"
Reward
structural features
L Ltabel (o) ((-i) Lteacher Sp,
stn
exp log
Enhance symbolic function graph distillation
symbolic operators
Figure 3: Overview of GESD. GESD employs Monte Carlo Tree Search algorithm search in the large and discrete symbolic space. The major novelty of GESD is that we distill dark knowledge from well-designed GNN into the symbolic tree searching process, thus enhancing the generaliza- tion capability of the learned symbolic functions.
Generator of the Symbolic Tree Motivated by the strengths of Monte Carlo Tree Search (MCTS) in efficiently exploring large and complex symbolic spaces (Sun et al. 2023 Xu et al. 2024), we em- ploy MCTS generate symbolic trees. We define the state as the pre-order traversal of the current expression tree and action a as the symbolic operators or variables added to the state. Specifically, our MCTS includes four steps: selection, expansion, simulation, and propagation. (1) Selection. In the selection phase, our MCTS agent traverses the current expression tree and selects an action with the maximum UCT. To ensure the legalization of generated expressions, at the current state = [a1, ....... 0z). the MCTS agent masks out the invalid action for the current non-terminal node and on that basis selects a valid action action a1+1- (2) Expansion. Once the selection phase reaches expandable node- a node that not all of its children have been visited-ood our MCTS agent expands it by randomly selecting one of its unvisited valid children. (3) Simulation. Given the current state and the expanded node, we perform simulations by randomly selecting the next node until the expression tree completed. Specifically, we perform simulations and return maximum simulated reward rather than the average reward for Q( a) to find the unique optimal symbolic solution, which is a greedy search hcuristic different from traditional MCTS algorithm (Swicchowski et al. 2023). (4) Backpropogation After the simulation, we update the maximum rewards Q and visited time of nodes N along the path from the current node to the root. The search algorithm repeatedly cycles through the aforementioned steps until the stopping criterion is met.
Reward Function To evaluate the symbolic function projected from expression tree in the sim- ulation phase, we define a reward r based on the function and circuit data. Specifically, we define the reward as r [i- Here, L is the loss function shown in eq 2 To maintain the conciseness of the learned symbolic functions for high efficiency and good interpretability, we follow (Sun et al.) 2023) to incorporate a penalty factor into the reward. Specifically, y) denotes the penalty constant range in (0, 1) and n is the length of the pre-order traversal of the current expression tree.
n"
Enhancing the symbolic function via graph distillation Previous studies (Wang et al.) proposed a carefully designed, complex GNN model that effectively addresses the challenge of poor generaliza- tion caused by large distribution shifts in circuit domains. However, we found it hard for a symbolic function to capture this crucial generalization information, i.e., the circuit symbolic generalization problem (shown in Figure [b]. The main reason that, to maintain the simplicity the learned symbolic functions, we use node features as input instead of subgraphs, which inherently contain

---

Published as a conference paper at ICLR 2025
less innaiinnivvaraant information. To address this challenge, we establish teacher-student frame- work that distills the dark knowledge, i.., the generalization information, from the teacher GNN's s output to strategically guide the student symbolic tree generation. Specifically, we first train a GNN on the training dataset and then employ the prediction output (ý), the output of GNN (z), and true labels (y) to evaluate every complete expression tree. The evaluation metric is defined as
L XL y) + (1 Le
(2)
Llabel is introduced to incorporate label information, while Lteocher is used to bring in teacher knowledge, providing additional guidance for symbolic function learning. Different from previ- ous works which use KL-divergence for Leaacer (Zhang et al.) 2022) to learn the distribution of the teacher's output, we employ the mean squared error (MSE) to directly learn the generalization in- formation from the GNN. The key motivation lies in the discovery of a simple nonlinear mapping between circuit features and the GNN's output, which achieves a generalization performance com- parable to that of the GNN itself (see Figure 8). Moreover, note that the number of effective nodes is far fewer than ineffective nodes, which brings a severe imbalance between positive and negative samples in the circuit data. Therefore, 2017) as the Lstudent- Due to limited space, please refer to Appendix E.. for more implementation details of our graph distillation approach.
follow (Wang et al.) to leverage the focal loss (Lin al.)
4.3 THE DEPLOYMENT TO MODERN LO TOOLS
After the training process, we obtain pair of symbolic functions that score and prune the effective transformations. Intuitively, this symbolic function can be regarded as a data-driven version of the buman-designed function (Effisyn) in modern LO tools. Moreover, our learned symbolic functions are concise one-line functions that are easy and reliable for deployment. Thus, similar to Effisyn (Li let al. 2023), we directly compile the learned policy to lightweight shared object using simple script and then integrate it into the I.O tools package.
5 EXPERIMENT
We conduct extensive experiments to evaluate CMO, which have four main parts: Experiment 1. To demonstrate the superior performance of our CMO in terms of generalization performance and efficiency. Experiment 2. To demonstrate that our approach can not only prompt the efficiency of the Mfs2 heuristic but also improve the Quality of Results (QoR). Experiment 3. Perform carefully designed ablation studies to provide further insight into CMO. Experiment 4. To show the appealing features of CMO in terms of online inference efficiency and interpretability.
Benchmarks We evaluate CMO on two widely-used public benchmarks, EPFL. (Amarú et al. 2015) and IWLS (Albrecht 2005). and one industrial benchmark from an anonymous semiconductor com- pany. These benchmarks consist of 69 circuits in total, including very large-scale circuits with up to twenty million nodes. Due to limited space, we defer more details to Appendix D.I
Experimental setup Throughout all experiments, we use ABC (Brayton et al. 2010) as the backend LO framework. ABC is state-of- offte-of-thhearr open-source LO framework and is widely used in research of machine learning for LO (Pasandi et al. (023). Moreover, we choose the Mfs2 (Mishchenko et al.] 2011 of the most time-consuming LO heuristics-as -s the backend heuristic to optimize. The teacher graph learning model for symbolic distillation is a well-designed 2-layer graph convolutional neural network (GCNN) (Wang et al.).. Experiments are performed on a single machine that contains 32 Intel XconR B5-2667 v4 CPUs. More details are provided in Appendix E.I
Evaluation Metrics and Evaluated Methods Throughout all experiments, we evaluate our method in two separate phases, i.e., the offline and online phases. In the offline phase, we evaluate the prediction recall of the effective nodes. We empirically show that the QoR improves with increased prediction recall in Appendix C22 Thus, it is important to achieve high recall for comparable QoR with the default heuristics. Specifically, we present details as follows. (1) Evaluation metrics Under the prediction and prune framework (see Figure 5). we view the prediction task as a scoring task and predict nodes with top scores to be positive. Under this prediction, we define a top k accuracy metric by the fraction of true positive nodes that are predicted to be positive, i.e., prediction recall. We defer details on this metric to Appendix E.112 (2) Evaluated methods In the offline phase, we approach Effisyn
evaluate the well-designed GNN approach COG Wang et al). the numan--essggnn (Li et al.) 2023). and our CMO. COG a well-designed 2-layer graph convolutional neural network. Effisyn human-designed nonlinear function with key parameters manually derived from circuit
7

---

Published as a conference paper at ICLR 2025
Table 1: Our CMO achieves comparable prediction recall with the well-designed GNN, i.c. COG, and significantly outperforms the human-designed approach, i.e., Effisyn.
Open-source
Hyp
Multiplier
Square
DesPerf
Ethernet
Conmax
Circuits
Method
Recall
Recall f
Recall t
Recall
Recall
Recall t
COG Effisyn
0.99
0.97
1.00
0.74
0.68
0.92
0.94
0.44
0.46
0.51
0.32
0.68
CMO (Ours)
0.99
0.97
0.98
0.80
0.72
0.85
Very Large-scale & Industrial Circuits
Sixteen
Twenty
Cil
Ci2
Ci3
Ci4
Method
Recall
Recall f
Recall
Recall
Recall
Recall f
COG Effisyn
0.86
0.90
0.89
0.85
1.00
0.94
0.1
0.1
0.79
0.91
0.98
0.82
CMO (Ours)
0.86
0.85
1.00
1.00
0.99
0.96
Online Evaluation on Open-source Industiral Benchmarks
1.0
0.9
0.8
Normalizer alized Runtime
0.7
0.6
0.5
0.4
0.3
0.2
0.1
CMO-Mfs2 (Ours)
COG-Mfs2
Effisyn-Mfs2
0.0
Myp
Multiplier
Twenty
Figure 4: We compare our CMO with the COG and Effisyn on online runtime. The results demon- strate that our approach achieves significant runtime improvement with the baselines.
features. CMO is our proposed graph enhanced symbolic discovery framework. Moreover, we compare CMO with the other five lightweight baselines. The baselines include two state-of-the- art (SOTA) searching-basee SR approaches, two traditional lightweight ML models, and a Random approach. Please refer Appendix [2.2 for the implementation details of these baselines. In the Online phase, we evaluate the efficiency and QoR of CMO. Specifically, we present details as follows. (1) Evaluation metries terms of the efficiency of the heuristics, we use the runtime metric. In terms of QoR, we mainly use the optimized node, i.c., the number of the optimized circuit nodes, which has a significant impact on the final chip area. Moreover, we also use the depth (i.e.. level) of the optimized circuits, which is a proxy metric for the delay of the designed chip. (2) Evaluated methods the online phase, we introduce a new heuristic called X-Mfs2, which integrates the learned scoring function "X" into the default Mfs2 heuristic. In our experiments, "X" refers to the COG, Effisyn, the five lightewight baselines and our CMO.
Evaluation Strategy In real industrial scenarios, hope that the trained model generalize to many unseen circuits. Inspired by the leave-one-domain-our cross-validation strategy commonly used in previous literature (Wang al. 2022a),, design twelve leave-one-out datasets for evalu- ation. Specifically, given a benchmark, we construct a dataset by setting one circuit as the testing dataset, and the other circuits the training dataset. Please refer to D.2 for more details.
Experiment 1. Comparitive Evaluation In this subsection, we compare our CMO with state-of- the-art GaU-dased (COG) and human-designed (Effisyn) methods in terms of generalization perfor-
8

---

Published as a conference paper at ICLR 2025
Table 2: We compare the Default Mís2 heuristic with our 2CM0-Mfs2 heuristic with the hyperpa- rameter l set as 30%, 40% and 50% on open-source and industrial circuits. Optimized Nd denotes the node number (size) of circuits. and Lev denotes the level (depth) of circuits. We define an Improvement metric by ((Deault)
(oodfaat))-((uur where M.)) denotes the Nd, Lev, or Time.
Open-source Circuits
Hyp
Dosar
Medhad
Lev
Improvement
(Lev, %)
Time (4)
Impesvement (Time (%)
Optinized Nd.
Imsrrvveennn (Oprimised Nd.
Time (1)
Impeovement (Time, 1%)
Defanll (Mfx2
8259.00
$19.33
NA
90653.00
96.76
CMO-Mis
49
50.3
50910.00 D0
28.19
XCMD-Mix
5762.00
50.23
127.51
60.07
29392.00
30.16
17.96
2CM0-Mis (0.4,
$762.00
30.23
170:45
46.62
29175.67
2.50
Very Large scale Circalts
Stxtees
Tireniy
Mechod
Optinized Nd.
Improveeennt (Opaniized Nd, (6)
Time (5) 1
Impeovement: (Time, 9%)
Optimized Nd.
(Oprimized N4, %6)
Improvestent 7
Time (s) 1
Impeovementt
(Timme, 9%)
Delzuh (MS52
6017653.00
787864014
NA
76930089000
CMO-M622 (0.5, Ound
R729
-0.001
12001 27
59
7694445 00
<0,002
569K5
47.61
2CMO-M52 (0.3. Oun)
5434093.00
9.70
36425
$3.77
6877483 00
10.60 10.61
50736655
2CMO-MB2 (0.4. Ous)
5435745.00 00
9.70
46572.91
40,80
68771558.0
75956.18
Clrcults
Mechod
Lev
Improvement
Time (6)
Imprewennent (Time, 9%)
Oprimized No.
Improvementt (Oyrmmizod Nd.
Time (4)
Impreveemene
(Time: 1%)
Defuuli (MZ52)
47,00
NA
35
NA
99245.00
NA
78.07
NA
CMO M52 (0.5,
47,00
0U00
37.30
99245.00 00
0.00
41.59
2CMO M8s2 Oun)
45,00
4.26
142.96
20.73
942240.00
5.04
64.37
17.55
2CMO MX32 Ours)
45,00
4.26
177.04
1,84
93184.00
81.07
3.84
mance. The evaluation follows the proposed generalization strategy and is conducted on two widely used open-source benchmarks and one industrial benchmark. We use the offline prediction recall as the evaluation metrix. Results in Table shows that our CMO outperforms the GNN on half of the circuits in terms of the prediction recall, demonstrating the strong generalization capability of our CMO. Moreover, our CMO achieves an average improvement of 36% in prediction recall when compared to Effisyn. Additionally, CMO achieves prediction recall exceeding 85% across most test circuits, indicating can maintain applying most of the effective transformations. In the online phase, we mainly focus the efficiency of the X-Mfs2 heuristics. To ensure a fair comparison for efficiency, we maintain comparable optimization performance across all comparison methods. However, due to the significant prediction shift between Effisyn and our CMO shown in Table [] we have to adjust a higher k for Effisyn to achieve comparable optimization performance (see Ap- pendix C.3 for the optimization results). Thus, we maintain the top 50% accuracy for our CMO and COG and apply the top 70% for Effisyn. The results in Figure ssow that our CMO-Mfs2 signifi- cantly outperforms the baselines terms of efficiency. Specifically, our CMO achieves an average improvement of 21.05% and 15.07% over the COG and Effisyn on the open-source and industrial benchmarks. Overall, the offline and online results demonstrate that our CMO can not only achieve comparable prediction performance to the well-designes teacher GNN but also outperform all of the baselines in terms of heuristic efficiency. Due to limited space, we provide the online optimization results and more comparison results with other lightweight baselines in Appendix C.3
Experiment 2. Improving Efficiency and QoR of the LO heuristic this subsection, we con- duct experiments on six challenging circuits to demonstrate that our method can not only reduce runtime but also improve QoR, such as the sizes and depths of optimized circuits. The size and depth are critical metrics in chip design, as they are proxies for the final area and delay of chips. We first show that our CMO could improve the efficiency of the Mfs2 heuristic with comparable opti- mization performance. Specifically, the results in Table 2 demonstrate that our CMO significantly achieves an average runtime improvement of 44.07% with marginal node degradation. In particu- lar, our CMO achieves 2.5x faster runtime on the very large-scale circuit Sixteen (about 13 hours). Then, we can sequentially apply CMO-Mfs2 multiple times rather than once to improve the QoR (i.e.. 2CM0-MMs22 -M002.......... as the runtime of CMO-Mfs2 is significantly shorter than that of Default Mis2 heuristic. To achieve faster runtime, we set the hyperparameter is as 30% and 40% rather than 50% to achieve faster runtime. T shows that 2CM0-Mfs2 significantly reduces the size and depth of optimized circuits while achieving faster runtime compared with the Default Mfs2 heuristic. Specif- ically, 2CMO-MFS2 with & = 40% reduces the size/depth by 10.57% on average while reducing the runtime by 18.60% in certain real-wor world scenarios, then we can set k as a smaller value such as 30%. Table 2 shows that 2CM0-MFS Mfs22 with k = 30% reduces the size/depth by 10.36% on average with 35.85% runtime reduction on the open-soured and industrial circuits. In particular, our method achieves a significant reduction over the depth on Hyp, improving the level by 30. 23%. Overall, the results suggest that
the test circuits. Furthermore, suppose we want to achieve faster runtime
9

---

Published as a conference paper at ICLR 2025
efficient CMO-Mfs2 can significantly improve the QoR while achieving faster runtime, yielding a substantial economic value in chip design. Please refer to Appendix C.4 for more results.
Experiment 3. Ablation Study In this subsection, we conduct an ablation study to understand the indi- vidual contribution of each component of our CMO. To this end, we compare our CMO with its variants, i.e. CMO without GESD and CMO without SFD on two widely-used open-source benchmarks. The results in Table suggest the following two con- clusions. First, CMO without GESD significantly outperforms CMO without GESD and SFD in terms of offline prediction recall, demonstrating the impor- tance of structural- -emantic symbolic learning formulation. Second, CMO also significantly outper- forms CMO without GESD. This demonstrates that GESD can effectively distill a high-performance symbolic function from the teacher GNN. We defer detailed results in Appendix C.5
Table 3: The ablation study results.
Circuit
Multiplier
Square
Hyp
Method
Recall 1
Recall
Recall
CMD
0.96
0.98
0.99
CMO without GISD
0.91
0.96
0.67
CMO without SED and GESD
0.52
0,72
0.93
Circuit
DesPer
Ethernet
Conmax
Method
Recall 1
Recall
Recall
CMO
0,80
0.72
0.84
CMO without GESD
0.80
0.44
0.76
CMO without SFD and GESD
0.60
0.42
0:45
Experiment 4. Strengths for Deployment In this subsection, we conduct extensive experiments to demonstrate the appealing features of our CMO on high optimization performance, inference efficiency, and interpretability. Specifically, we present detailed analysis follows.
Inference Efficiency We compare the model inference time of our CMO with the GNN ap- proach and human-designed approach on open- source circuits and industrial circuits. Results in Vable@ddmoosttral that CMO learned scor- ing functions are extremely efficient on purely CPU-based machines, achieving a speedup of several hundred times compared to GNN. The efficiency comes from both the graph- independency inference and the concise sym- bolic functions. Moreover, while the human-designed scoring function demonstrates notable infer- ence efficiency, our method achieves superior speed as we learn a simpler scoring function.
Table 4: The model inference results show that our CMO are extremely efficient for inference compared to the other approaches when executed on CPU-based LO tools.
DosPer
Sisters
Tuerrty
C51
Cit
Mathad
Tinzes: 5
Tamaoo
Tinstel 1
Tinass
Timeral
Timets
CDG
178707
90,00
0.15
9.67
12.19
0.48
0.22
CMO (ÓuS))
0J6
6,65
436
4.66
0.7
0.06
Interpretability Compared to GNN, CMO generates concise symbolic function with better inter- pretability, enhancing simplicity and reliability for employment. We report the learned structural functions and boolean semantic functions in Table 16 We observed that 22, which represents the node level, is approximately positively correlated with the node scores, indicating its significance in ineffective node prediction. Furthermore, some critical hyperparameters in the traditional human- designed scoring function heavily rely on the node level (Li et al., 2023). The intuition behind the design of this scoring function is highly similar to the learned symbolic policies in Table [6] Thus, we believe our CMO can help researchers further understand and design effective scoring functions.
6 CONCLUSION
To enable efficient Logic Optimization (LO), previous studies propose to use scoring functions to predict and prune ineffective nodes in LO heuristics. However, existing functions struggle to balance inference efficiency, interpretability, and generalization performance. To address this, we propose CMO, a novel Circuit Symbolic Learning Framework that learns efficient, interpretable. and high- performance symbolic functions. The key contribution of CMO is a ing framework that distills dark knowledge from well-designed GNN to improve the generalization of learned functions. Extensive experiments on three challenging benchmarks show that the inter- pretable learned functions outperform previous SOTA GPU-based and human-designed methods in terms of efficiency and generalization. Moreover, CMO significantly improves the Mfs2 heuristic's efficiency with comparable optimization performance CPU-based machine, achieving up to 2.5x faster runtime.
symbolic learn-
REPRODUCIBILITY STATEMENT
In this study, to ensure the reproducibility of our approach, we provide key information from the main text and Appendix follows.
10

---

Published as a conference paper at ICLR 2025
1. Algorithm. We provide the architecture and pseudocode of our approach in Section f and Appendix E.5 Moreover, we will make our source code publicly available once the paper is accepted for publication.
2. Source Code. To facilitate the evaluation process and support thorough review, we have released our source code the following link: htttp:://iite.. ctt.tttee.comm/iiiiiiiio cmo emo.git)
3. Experimental Details. We provide experiment settings in Section 5 Jnnd Appendix E.1
7
ACKNOWLEDGEMENTS
The authors would like to thank all the anonymous reviewers for their insightful comments and valu- able suggestions. This work was supported by the National Key R&D Program of China under con- tract 2022ZD01 19801 and the National Nature Science Foundations of China grants U23A20388, 62021001 and 623B1022.
REFERENCES
Christoph Albrecht. Iwls 2005 benchmarks. 2005.
Luca Amarú et al. The epfl combinational benchmark suite. (CONF), 2015.
Augusto André Souza Berndt et al. A review of machine learning in logic synthesis. Journal of Integrated Circuits and Systems, 17(3):1-12, 2022.
Valeria Bertacco et The disjunctive decomposition of logic functions. In iccad, volume 97, pp- 78-82, 1997.
Luca Biggio, Tommaso Bendinelli, Alexander Neitz, Aurelien Lucchi, and Giambattista Parascan- dolo. Neural symbolic regression that scales. In International Conference on Machine Learning, pp. 936-9495 Pmir, 2021.
Alan Mishchenko Robert Brayton. Scalable logic synthesis using simple circuit structure. 6:15-22, 2006.
Alan Mishchenko Satrajit Chatterjee Robert Brayton and Xinning Wang Timothy Kam. Technology mapping with boolean matching, supergates and choices.
Robert Brayton et al. Abc: An academic industrial-strrt -trenngth verification tool. In Computer Aided Verification: 22nd International Conference, CAV 2010, Edinburgh, UK. July 15-19, 2010. Pro- ceedings 22, pp. 44-00. Springer, 2010.
Robert K Brayton. The decomposition and factorization of boolean expressions. ISCA-82, pp- 49-54, 1982.
Tianqi Chen and Carlos Guestrin. Xgboost: A scalable tree boosting system. In Proceedings of the 22nd acm sigkdd international conference knowledge discovery and data mining, pp. 785-794, 2016.
William J Cook, William Cunningham, William R Pulleyblank, and Alexander Schrijver. Combi- natorial optimization. Unpublished manuscript, 10:75 9375-93,111 1994.
Miles Cranmer, Alvaro Sanchez Gonzalez, Peter Battaglia, Rui Xu, Kyle Cranmer, David Spergel, and Shirley Ho. Discovering symbolic models from deep learning with inductive biases. Advances in neural information processing systems, 33: 13:1999-17742. 2020a.
Miles D. Cranmer, Alvaro Sanchez-Gonzaler Peter W. Battaglia, Rui Xu, Kyle Cranmer, David N. Spergel, and Shirley Ho. Discovering symbolic models from deep learning with inductive biases. CoRR, abs/2006. 1287, 2020b. URL httttt::/// arxiv. org//ogg/....... /000s.2200...2 11287
Stéphane Ascolii Samy Bengio, Josh Susskind, and Emmanuel Abbé. Boolformer: Symbolic regression of logic functions with transformers. arXiv preprint arXiv:2309.12200) 2023.
11

---

Published as a conference paper at ICLR 2025
Brunno A De Abreu, Augusto Berndt, Isac S Campos, Cristina Meinhardt, Jonata T Carvalho, Ma- teus Grellert, and Sergio Bampi. Fast logic optimization using decision trees. In 2021 IEEE International Symposium Circuits and Systems (ISCAS), pp. 1-5. IEEE, 2021.
Amir H Farrahi and Majid Sarrafzadeh. Complexity of the lookup-table minimization problem for fpga technology mapping. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 13(1 ((11))1319-133) 1994.
Zijie Geng, Xijun Li, Jie Wang, Xiao Li, Yongdong Zhang, and Feng Wu. A deep instance genera- tive framework for milp solvers under limited data availability. Advances in Neural Information Processing Systems, 36:26025-26044 2023a.
Zijie Geng, Shufang Xie, Yingce Xia, Lijun Wu, Tao Qin, Jie Wang, Yongdong Zhang, Feng Wu, and Yan Liu. De molecular generation via connection-aware motif mining. arXiv preprini 20236..
arXiv:2302.01129,
Zijie Geng, Jie Wang. Ziyan Liu, Siyuan Xu, Zhentao Tang, Mingxuan Yuan, HAO Jianye, Yong- dong Zhang, and Feng Wu. Reinforcement learning within tree search for fast macro placement. In Forty-first International Conference on Machine Learning, 2024.
Zijie Geng, Jie Wang, Xijun Li, Fangzhou Zhu, Jianye Hao, Bin Li, and Feng Wu. Differentiable integer linear programming. In The Thirteenth International Conference on Learning Represen- tations, 2025a. URL httpts:://ppteeeeeeeee
net wtttt//ooummidddPPCm.o
Zijie Geng, Jie Wang, Ziyan Liu, Siyuan Xu, Zhentao Tang, Shixiong Kai, Mingxuan Yuan, Jianye Hao, and Feng Wu. LaMPlace: Learning to optimize stage metrics in macro placement. In The Thirteenth International Conference on Learning Representations, 2025b. URL https:
//openzeview. wttp://wwwwe//ffooreeeee wetp:/orrrm..dd-/Lllsi..
Jianping Gou, Baosheng Yu, Stephen Maybank, and Dacheng Tao. Knowledge distillation: A
survey, International Journal of Computer Vision, 188-6)118-11819, 2021.
Arthur E Hoerl and Robert W Kennard, Ridge regression: applications to nonorthogonal problems. Technometrics, 12(1):69-82, 1970.
Abdelrahman Hosny, Soheil Hashemi, Mohamed Shalan, and Sherief Reda. Drills: Deep rein- forcement learning for logic synthesis. In 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 581-586. IEEE, 2020.
Guyue Huang et al. Machine learning for electronic design automation: A survey, ACM Transactions on Design Automation of Electronic Systems (TODAES), 26(5):1-46, 2021.
Bierre-Alexandrr Kamienny, Stéphane d' Ascoll, Guillaume Lample, and François Charton. End-to- end symbolic regression with transformers. Advances in Neural Information Processing Systems, 35:10269-10238 2022.
Brucek Khailany. Accelerating chip design with machine learning. Proceedings of the 2020 ACM/EEEE Workshop on Machine Learning for CAD, pp. 33-33, 2020.
Thomas N. Kipf and Max Welling. Semi-supervised classification with graph convolutional networks. In International Conference Learning Representations, 2017. URL https
//openreview.
Levente Kocsis and Csaba Szepesvári. Bandit based monte-carlo planning. In European conference on machine learning, pp. 282-293. Springer, 2006.
Bernhard H Korte, Jens Vygen, B Korte, and J Vygen. Combinatorial optimization, volume 1. Springer, 2011.
Yufei Kuang, Jie Wang, Yuyan Zhou, Xijun Li, Fangzhou Zhu, HAO Jianye, and Feng Wu. Towards general algorithm discovery for combinatorial optimization: Learning symbolic branching policy from bipartite graph. In Forty-first International Conference Machine Learning.
12

---

Published as a conference paper at ICLR 2025
Yufei Kuang, Jie Wang, Haoyang Liu, Fangzhou Zhu, Xijun Li, Jia Zeng, HAO Jianye, Bin Li, and Feng Wu. Rethinking branching on exact combinatorial optimization solver: The first deep symbolic discovery framework. In The Twelfth International Conference Learning Represen- tations, 2024.
Xijun Li, Fangzhou Zhu, Hui-Ling Zhen, Weilin Luo, Meng Lu, Yimin Huang, Zhenan Fan, Zirui Zhou, Yufei Kuang, Zhihai Wang, Zijie Geng, Yang Li, Haoyang Liu, Zhiwu An, Muming Yang, Jianshu Li, Jie Wang. Junchi Yan, Defeng Sun, 'ooo Zhong, Yong Zhang, Jia Zeng, Mingxuan Yuan, Jianye Hao, Jun Yao, and Kun Mao. Machine learning insides optverse ai solver: Design principles and applications, 2024.
Xing Li, Chen Lei, et al. Effisyn: Efficient logic synthesis with dynamic scoring and pruning. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD). IEEE, 2023.
Tsung- Yi Lin, Priya Goyal, Ross Girshick, Kaiming Hc, and Piotr Dollár. Focal loss for dense object detection. In Proceedings of the IEEE international conference on computer vision, pp-
2980-2988, 2017.
Haotian Ling, Zhihai Wang, and Jie Wang. Learning to stop cut generation for efficient mixed- integer linear programming. In Proceedings of the AAAI Conference on Artificial Intelligence, volume 38, pp. 20759-20761 2024.
Haoyang Liu, Jie Wang. Wanbo Zhang, Zijie Geng, Yufei Kuang, Xijun Li, Bin Li, Yongdong Zhang, and Feng Wu. MILP-studio: MILP instance generation via block structure decomposition. In The eiihty- Annual Conference on Neural Information Processing Systems, 2024a. URL fitts::/openreviiet www.:orummemteeeeeeemmm W43-:mmmm---W333II03
Haoyang Liu, Jie Wang, Zijie Geng, Xijun Li, Yuxuan Zong, Fangzhou Zhu, Jianye HAO, and Feng Wu. Apollo-MILP: An alternating prediction-correction neural solving framework for mixed- integer linear programming. In The Thirteenth International Conference on Learning Represen- tations, 2025.
net/ wttp://wwwwwweeeetteeeeeaaa www.moodddmdmotttma
Hongyu Liu, Haoyang Liu, Yufei Kuang, Jie Wang, and Bin Li. Deep symbolic optimization for combinatorial optimization: Accelerating node selection by discovering potential heuristics. In Proceedings of the Genetic and Evolutionary Computation Conference Companion, pp. 2067- 2075, 2024b.
Daniela Sánchez Lopera, Lorenzo Servadei, Gamze Naz Kiprit, Souvik Hazra, Robert Wille, and Wolfgang Ecker. A survey of graph neural networks for electronic design automation. In 202/ ACM/IEEE 3rd Workshop on Machine Learning for CAD (MLCAD), pp. 1-6. IEEE, 2021.
Giovanni De Micheli. Synthesis and optimization of digital circuits. McGraw- Hilll Higher Education, 1994.
Azalia Mirhoseini, Anna Goldie, Mustafa Yazgan, Joe Wenjie Jiang, Ebrahim Songhori, Shen Wang, Young-Joon Joong-Joon Lee, Eric Johnson, Omkar Pathak, Azade Nazi, et al. A graph placement methodol- ogy for fast chip design. Nature, 594(7862):207-212 2021.
Alan Mishchenko, Sungmin Cho, Satrajit Chatterjee, and Robert Brayton. Combinational and quential mapping with priority cuts. In 2007 IEEE/ACM International Conference on Computer- Aided Design, pp. 354-361. IEEE, 2007.
Alan Mishchenko, Robert Brayton, Jie-Hong R Jiang, and Stephen Jang. Scalable don't tt-care-based logic optimization and resynthesis. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 4(4):1-23, 2011.
Walter Lau Neto, Matheus Trevisan Moreira, Luca Amaru, Cunxi Yu, and Demere- Gaillar- don. Read your circuit: leveraging word embedding to guide logie optimization. In Proceedings of the 26th Asia and South Pacific Design Automation Conference, pp. 530-535,202
Michael O' Neill.. Riccardo poli, william b. langdon, nicholas f. mephee: field guide to genetic programming: Lulu. com, 2008, 250 pp, isbn 978- 178-1-4492-00033-4, 2009.
13

---

Published as a conference paper at ICLR 2025
Ghasem Pasandi, Sreedhar Pratty, and James Forsyth. Aisyn: Ai-driven reinforcement learning based logic synthesis framework. arXiv preprint arXiv:2302.06415, 2023.
Brenden K Petersen, Mikel Landajuela Larma, Terrell N Mundhenk, Claudio Prata Santiago, Soo Kyung Kim, and Joanne Taery Kim. Deep symbolic regression: Recovering mathematical expressions from data via risk-seeking policy gradients. In International Conference on Learning Representations, 2020.
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B Manske, Matheus Pontes, Leomar da Rosa, et al. Logic syn- thesis meets machine learning: Trading exactness for generalization. In 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 1026-1031. IEEE, 2021.
Basireddy Karunakar Reddy, Srinivas Sabbavarapu, and Amit Acharyya. new vlsi design automation methodology with reduced nre costs and time-to-market using the npn class represen- tation and functional symmetry. In 2014 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 177-180. IEEE, 2014.
Haoxing Ren and Jiang Hu. Machine Learning Applications in Electronic Design Automation. Springer Nature, 2023.
Srinivas Sabbavarapu, Karunakar Reddy Basireddy, and Amit Acharyya. A new dynamic library based ic design automation methodology using functional symmetry with npn class representation approach to reduce nre costs and time-to-market. 2014 Fifth International Symposium on Electronic System Design, pp. 115-119. IEEE, 2014.
Zhihao Shi, Xize Liang, and Jie Wang. Lmc: Fast training of gnns via subgraph sampling with provable convergence. In The Eleventh International Conference on Learning Representations, 2023. URL
net/
Zhihao Shi, Jie Wang, Fanghua Lu, Hanzhu Chen, Defu Lian, Zheng Wang, Jieping Ye, and Feng Wu. Label deconvolution for node representation learning on large-scale attributed graphs against learning bias. IEEE' Transactions on Pattern Analysis and Machine Intelligence, 46(12): 12733 11286, 2024. doi: 10.1 LL09//TAAM..2224445554444
Zhihao Shi, Jie Wang. Zhiwei Zhuang, Xize Liang, Bin Li, and Feng Wu. Accurate and scal- able graph neural networks via message invariance. In The Thirteenth International Confer- ence on Learning Representations, 2025. URL https:/ /ppnreeveeeeeeeeeeeeeeeeee / UgrFPhcmFp)
net/ / forum?ide
Fangzheng Sun, Yang Liu, Jian-Xun Wang, and Hao Sun. Symbolic physics learner: Discov- cring governing equations via monte carlo tree search. In The Eleventh International Confer- ence on Learning Representations, 2023. URL https: ftteps://openrvviie ew. net. htt//formmm?i
2TK3SefE8 Z.
Maciej Swiechowski, Konrad Godlewski, Bartosz Sawicki, and Jacek Mańdziuk. Monte carlo tree search: A review of recent modifications and applications. Artificial Intelligence Review, 56(3): 2497-2562, 2023.
Yijun Tian, Chuxu Zhang, Zhichun Guo, Xiangliang Zhang, and Nitesh Chawla. NOSMOG: Learn- ing noise-robust and structure-aware MLPs on graphs. In NewrIPS 2022 Workshop: New Frontiers in Graph Learning, 2022. URLLatttss://peeeeeeet
http:://ppppeeviieeeee net
wtwp:e/wwweeeeeooonneeeeee htt.:/ffruumieieee www.1/999----- 7hw-hHD
Jie Wang. Zhihai Wang. Xijun Li, Yufei Kuang, Zhihao Shi, Fangzhou Zhu, Mingxuan Yuan, Jia Zeng, Yongdong Zhang, and Feng Wu. Learning to cut via hierarchical sequence/set model for efficient mixed-integer programming. IEEE Transactions on Pattern Analysis and Machine Intel- ligence, pp. 1-17, 2024a. doi: 10. 10.109/TAAM.2004333777
Jindong Wang, Cuiling Lan, et al. Generalizing to unseen domains: survey on domain general- ization. IEEE Transactions on Knowledge and Data Engineering, 2022a.
Zhihai Wang. Lei Chen, Jie Wang, Yingi Bai, Xing Li, Xijun Li, Mingxuan Yuan, HAO Jianye, Yongdong Zhang, and Feng Wu. A circuit domain generalization framework for efficient logic synthesis in chip design. In Forty-first International Conference Machine Learning.
14

---

Published as a conference paper at ICLR 2025
Zhihai Wang, Jie Wang. Qi Zhou, Bin Li, and Houqiang Li. Sample-efficient reinforcement learning via conservative mosel-based actor-critic. Proceedings of the AAAI Conference on Artificial Intelligence, 36(8):6612-6220 Jun. 2022b. doi: wttp://aaaii.6....0000 URL
https://ojs. .ww.saaaaa.. wwr.aaaaa.....aaaaaaaaaaaaaaaeaa index http:/innddde/pp////pppppp http///ataaattteeieeeeeeeeeeeeee
Zhihai Wang, Xijun Li, Jie Wang, Yufei Kuang, Mingxuan Yuan, Jia Zeng, Yongdong Zhang, and
Feng Wu. Learning cut selection for mixeddinteeeer linear programming via hierarchical sequence model. In The Eleventh International Conference Learning Representations, 2023a. URL
https: www.r/vieppree.eeeeooee net/ Eorumiidd2obbpPPRRR. 4cb4P
Zhihai Wang. Taoxing Pan, Qi Zhou, and Jie Wang. Efficient exploration in resource-restricted reinforcement learning. Proceedings of the AAAI Conference on Artificial Intelligence. 37(8): 10279-10287, Jun. 2023b. doi: 10. 20.1609aaai..33777 33718.262244 htRp::ts::///// aaa /org/ index.php/ARe htt.//rrricleeeeee 2622
Zhihai Wang, Zijie Geng, Zhaojie Tu, Jie Wang, Yuxi Qian, Zhexuan Xu, Ziyan Liu, Siyuan Xu, Zhentao Tang, Shixiong Kai, al. Benchmarking end-to-end performance of ai-based chip place- ment algorithms. arXiv preprint arXiv:2407. 5026, 2024b.
Zhihai Wang, Jie Wang, Qingyue Yang, Yinqi Bai, Xing Li. Lei Chen, Jianye HAO, Mingxuan Yuan, Bin Li, Yongdong Zhang, and Feng Wu. Towards next-generation logic synthesis: A scalable neural circuit generation framework. In The Thirty-eighth Annual Conference on Neural Information Processing Systems, 2024c. URL https: /tttos://oeenrevle..eee www.ee/wwwweeeeeoorrmr.... forum? id
ZYNYhh3ocW
Zhihai Wang, Jie Wang, Dongsheng Zuo, Yunjie Ji, Xinli Xia, Yuzhe Ma, Jianye Hao, Mingxuan Yuan, Yongdong Zhang, and Feng Wu. A hierarchical adaptive multi-task reinforcement learn- ing framework for multiplier circuit design. In Forty-first International Conference on Machine Learning. PMLR, 2024d.
Zhihai Wang. Jie Wang, Xilin Xia, Dongsheng Zuo, Lei Chen, Yuzhe Ma, Jianye HAO, Mingxuan Yuan, and Feng Wu. Computing circuits optimization via model-based circuit genetic evolution. In The Thirteenth International Conference on Learning Representations, 2025. URL https:
Nan Wu, Yingjie Li, et al. Gamora: Graph learning based symbolic reasoning for large-scale boolean networks. arXiv preprint 2303:22000002266 2023.
Yilong Xu, Yang Liu, and Hao Sun. Reinforcement symbolic regression machine. In The Twelfth International Conference on Learning Representations, 2024. URL httttpss////epeeeeeee
JVUWWpP2C
Shichang Zhang, Yozen Liu, Yizhou Sun, and Neil Shah. Graph-less neural networks: Teaching old MLPs new tricks via distillation. In International Conference on Learning Representations, 2022. URL /
net/ wtt.:/orummmmdoooo/ wp. 400___6WP__P
A RELATED WORK
Learning-based Methods for Symbolic Discovery Several recent approaches utilize deep learn- ing for symbolic discovery. These methods generally fall into three categories-Exooluiionnn Pre- trained, and Searching- Genetic programming (GP) OO Neill 2009) one of the classic evolutionary symbolic regression methods, operating by mantainiin a population of expression "individuals" that evolve using evolutionary operations such as selection, crossover, and mutation. While GP can be effective, it tends to struggle with scalability for larger problems. In recent years, pre-trained symbolic regression methods have shown advantages in fast inference and have success- fully discovered large input (with up to twelve) symbolic functions (d' Ascoli et al. 2023 Biggio et al. 2021 Kamienny et al.) 2022). However, these methods are limited by high training costs and data generalization challenges. Unlike the methods mentioned above, the searching- based method explores the discrete symbolic operator space and finds the best function that maximizes the fitness of the given dataset. The mainstream symbolic regression frameworks are based on Monte Carlo
15

---

Published as a conference paper at ICLR 2025
tree search (Sun et al. 2023 Xu et al. 2024) and sequence prediction models such as RNN (Petersen et al. 2020). These methods have achieved state-of-the-ar performance on multiple benchmarks.
Symbolic Distillation from the Trained GNNs Motivated by the high expressive capacity but opaque nature of GNNs, previous studies have sought to distill interpretable symbolic functions from GNNs approximate their mapping functions. First, (Cranmer et al., (020aa) introduces framework that distills interpretable symbolic functions from trained GNNs for scientific discovery. This approach initially trains the neural network models and then utilizes a symbolic learning model to iteratively approximate both the message-passingg and aggregation functions with symbolic repre- sentations. However, (Kuang al.) found that distilling trained GNNs layer by layer often results in suboptimal performance. To address this, they propose learning interpretable symbolic policies directly from the general bipartite graph representation in an end-to-end manner. Nonetheless, the symbolic functions produced in this way can become complex, as they must map the relationships between graph inputs and outputs. In contrast, our work focuses on using only the node features as input to enhance inference efficiency and ensure better interpretability.
Machine Learning for Combinatorial Optimization Logic optimization, a critical component of logic synthesis in electronic design automation (EDA), fundamentally constitutes a combinatorial optimization problem. In recent years, the application of machine learning techniques to address combinatorial optimization challenges has emerged
prominent and actively researched area of
interest, particularly in the EDA domain (Korte et al. 2011 Cook et al. 1994 Wang et al.] 2023a 2024a 20226 2203bb] [L et al. 2024 Ling et al.] [0224] Geng al. 2023a 2025a b). This paradigm
shift is driven by the increasing complexity of modern integrated circuits and the limitations of tradi- tional heuristic-based approaches. Machine learning offers promising solutions through its ability to learn complex patterns from large-scale design data, enabling more efficient exploration of the solu- tion space and potentially leading better quality-of- (QoR) terms of power, performance, and area (PPA) optimization. Recent advancements in deep reinforcement learning and graph neu- ral networks have shown particular promise in tackling the intricate dependencies and constraints inherent in logic optimization problems (Geng et al. 2023b).
B MORE DETAILS ON THE BACKGROUND
Profitionnd Pruze
niginall firet
Fabsst ooblsseXX
Seriuplaciin
Opiniaaion For
Teus (olk
Ouipit OptnadCrat
Figure 5: The Prediction and Prune framework.
Logic Optimization (LO) Driven by Moore's law, the complexity of chip design has grown ex-
ponentially [Khailany] 2020 Lopera et al., 2021: Huang et al. 202T Mirhoseini et al. 2021 Ren & Hul 2023 Wang et al. 2025 2024c). To manage this complexity, chip design workflows have incorporated multiple Electronic Design Automation (EDA) tools to synthesize, simulate, test, and verify different circuit designs efficiently and reliably. Among these tools, LO tool-which aims to optimize the circuit represented by Boolean network-is one of the most important modules in the EDA tools. LO typically involves two stages: pre-mapping optimization and post-mapping optimization (Hosny et al. 2020 Ren & Hu 2023 Wang et al.) 2024d). During the pre-mapping optimization phase, LO heuristics such as Rewrite (Bertacco et al. 1997), 7 Resub (Brayton 2006), and Refactor (Brayton 1982) are used to improve the input circuit. Following this, in the technol- ogy mapping phase, the optimized logic circuit is mapped to the available technology library, e.g., a standard-cell netlist (Brayton & Kam) or k-input lookup tables (Mishchenko et al. 2007). Finally,
16

---

Published as a conference paper at ICLR 2025
the post-mapping optimization phase applies LO heuristics like Mfs2 (Mishchenko al. 201 to further refine and enhance the mapped circuit.
Logic Optimization heuristics To tackle the LO task, many researchers have developed rich set of
LO heuristics. For instance, researchers have developed Rewrite (Bertacco et al.. 1997) and Resub
[Brayton| 2006) for pre-mapping optimization, while Mfs2 (Mishchenko et al. 2011) is designed
for post-mapping optimization. These LO heuristics follow the paradigm as shown in Figure [5] Specifically, these heuristics traverse the Boolean network in a topological order from PIs to POs and apply transformations to subgraphs rooted at each node sequentially for all nodes. However, previous literature (Wang et al.) found that these heuristics can be highly toneccnnuinng due to a large number of ineffective transformations. To address this problem, we follow the new heuristics paradigm proposed by (Wang et al.) that can significantly improve the efficiency of L.O heuristics by learning a classifier to predict nodes with ineffective transformations and avoid applying trans- formations on these nodes. In this paper, we focus on optimizing the post-mapping operator Mfs2 MMischhenko et al. 201I). which stands out the most time-consuming one among all commonly used LO heuristics.
Circuit Representation In the LO stage, a circuit is usually modeled by Boolean network (Wang) (et al., 2024b). In this paper, we use the terms Boolean network and circuit interchangeably. A Boolean network is directed acyclic graph (DAG), where nodes correspond to Boolean functions and directed edges correspond to wires connecting these functions. A Boolean function takes the form f B B, where B {0, 1] denotes the Boolean domain. Given a node, its fanins nodes connected by incoming edges of this node, and its fanouts are nodes connected by outgoing edges of this node. The primary inputs (PIs) are nodes with no fanin, and the primary outputs (POs) are nodes with no fanout. The size of a circuit denotes the number of nodes in the DAG, The depth (level) of circuit denotes the maximal length of path from a PI to PO in the DAG. The size and depth of a circuit are proxy metrics for the area and delay of the circuit, respectively.
Symbolic Expression Tree for Learning Symbolic Functions Given a dataset D, symbolic learn- ing approaches aim to learn symbolic function If that best fits the dataset. To this end, symbolic functions are often represented by an algebraic expression tree, where internal nodes are operators and terminal nodes are input variables and/or constants (Sun et al. 2023 Liu et al.) 2024b; Kuang jet al., 2024 Liu et al. 2025 2024a). We assume 7 = [ Ti. is a pre-order traversal of such an expression tree. Each 7; is operator, input variable, or constant selected from library of pos- sible tokens and there is a one-to-one correspondence between an expression tree and its pre-order traversal. An expression tree is also used to express mathematical functions with operators such as [+-,, X, sin].
Graph Neural Network (GNN) Recently, many researchers have achieved remarkable success in applying Graph Neural Networks (GNNs) to extract abundant node information from circuit graphs (Wu et al., 2023 Shi al. 2025 2024). As far as we are aware, (Wang et al.) applies GNN to predict nodes with ineffective transformations for the LO task. The input of GNN is a heuristic- designed subgraph rooted as the node, and the output a continuous score ranging from 0 to 1 for the node. Based on the scores, nodes in circuits are ranked and the top k nodes are selected to be positive. However, despite achieving a high accuracy on ineffective node prediction, GNN heavily relies on a GPU for efficient inference while many EDA developers may not have access to high-end GPUs, which thus severely limits its application into purely CPU-based LO tools.
Graph-based Knowledge Distillation Knowledge Distillation (KD) aims to transfer knowledge from a large, complex teacher model to smaller, more efficient student model (Gou et al.) 2021). l. The main idea is that the student model mimics the teacher model in order to obtain competitive or even superior performance. Recently, Braph-based Knowledge Distillation has emerged as a sig- nificant research direction within KD research. This process involves distilling knowledge from Graph Neural Network (GNN), into a more lightweight student model, such as a Multilayer Per- ceptron (MLP) (Zhang et al. 2022 Tian al.] 2022) or symbolic functions (Cranmer et 2000bb) Kuang et al.). which only relies on node features as input. By eliminating the graph dependency during inference, this approach enables more efficient and faster student model while retaining the high predictive performance learned by the GNN.
17

---

Published as a conference paper at ICLR 2025
C ADDITIONAL RESULTS
C.I MORE MOTIVATING RESULTS
Existence of nigh-meeformance symbolic functions To ver- ify whether concise and high-performance symbolic fune- tions exist in our computational synthesis (LO) task, we apply the symbolic tree search algorithm to all valid cir- cuits-specificllly, those with effective nodes-in the EPFL. benchmark. In this evaluation, we utilize the top 50% accu- racy metric as the simulated rewards to gauge performance. As shown in Figure 6 an impressive 93.3% of the circuits (14 out of 15) achieve top 50% accuracy exceeding 99%. Fur- thermore, our analysis indicates that all learned symbolic func- tions are only short but also remarkably concise. This ob- servation suggests a strong potential for leveraging symbolic learning approaches in our LO task. indicating that such meth- ods could efficiently enhance performance while maintaining clarity and simplicity in the symbolic representations.
Top 50% Accuracy Distribution
Congente Aoco-152%
12.%
Figure 6: perhrrreffrm sym- bolic functions exist in the open- source benchmarks.
C.2 THE IMPORTANCE OF THE PREDICTION RECALL ON OPTIMIZATION PERFORMANCE
To analyze the relationship between the prediction recall of effective nodes and the optimization performance of heuristics, we evaluate the optimization performance of the Random method with different values of the hyperparameter k. Note that Random is baseline that randomly predicts score between [0, 1] for each node, and selects the top nodes to apply node-level transformations. Specifically, we report the recall and optimization performance (i.e., And Reduction) of Random with different values of T The results indicate that the value of & approximately linearly positively correlated with the recall, and the recall is approximately linearly positively correlated with the optimization performance as well. Therefore, to maintain the optimization performance of heuristics, the prediction recall of our model should be as high as possible.
C.3 MORE RESULTS FOR COMPARATIVE EVALUATION
Due to the significant Top 50% accuracy shift between Effisyn and our CMO shown in Table [ we have adjust a higher & for the Effisyn to achieve comparable prediction recall and thus compara- ble online optimization performance (shown in Table 5). Specifically, we choose as 70% for the Effisyn as too large k will bring higher time cost. Results shown in Table 6 demonstrate that our CMO achieves an average improvement of 21 21.05% compared to COG while maintaining compara- ble optimization performance (normalized And reduction is 0.92 versus 0.91). Additionally, when compared to Effisyn, our CMO shows an average improvement of 15.07% while preserving similar optimization performance across most circuits. Note that Effisyn exhibits very low optimization performance on two very large-scale circuits, even with & set to 70%. For these circuits,k may need be adjusted to 90% or higher, which would result in significantly increased time costs. Moreover, we compare our CMO with the other five lightweight baselines on open-source circuits. The re- that our CMO significantly outperforms these baselines both generalization performance and efficiency.
sults Tables T
C.4 MORE IMPROVING EFFICIENCY AND QOR RESULTS
In this subsection, we provide more results about the improving efficiency and QoR results in Table We first show that our CMO could improve the efficiency of the Mfs2 heuristic with comparable optimization performance. Specifically, the results in Table 2 demonstrate that our CMO signif- icantly achieves an average runtime improvement of 44.54% with marginal node degradation. In particular, our CMO achieves 2.5x faster runtime on the very large-scale circuit Sixteen (about 13 hours). Then, QoR (i.e., (CMO-Mfs2), as the runtime of CMO-Mfs2 is significantly shorter than that Default Mfs2 heuristic. To achieve faster runtime, we the hyperparameter 30% and 40% rather than
18
sequentially apply CMO-Mfs2 multiple times rather than once to improve the
18

---

Published as a conference paper at ICLR 2025
50% achieve faster runtime. Table shows that 2CM0-Mf62 significantly reduces the size and depth of optimized circuits while achieving faster runtime compared with the Default Mfs2 heuris- tic. Specifically, 2CMO-Mfs2 with k 40% reduces the size/depth by 5.82% average while reducing the runtime by 7.99% on the test circuits. Furthermore, suppose we want to achieve faster runtime in certain real-world scenarios, then can set k smaller value such 30%. Table shows that 2CMO-MBs2 with A = 30% reduces the size/depth by 5.60% on average with 26%1 runtime reduction on the open-source and industrial circuits. In particular, our method achieves significant reduction over the depth on Hyp. improving the level by 30.23%. Overall, the results sug- gest that our efficient CMO-Mfs2 can significantly improve the QoR while achieving faster runtime, yielding substantial economic value in chip design.
C.5 MORE ABLATION STUDY RESULTS
In this subsection, we provide more ablation combinations and corresponding results. Specifically, CMO without structural-semante feature decomposition denotes that we apply our graph distillation module directly to the original high-dimensional circuit data. The results in Table[]show that CMO without SFD outperforms CMO without SFD and GSD in terms of the offline prediction recall, indicating the robustness and ability of our graph distillation module.
C.6 MORE RESULTS OF STRENGTHS FOR DEPLOYMENT
In this subsection, provide results of our method's deployment strengths in terms of opti- mization performance and inference efficiency.
High Optimization Performance There many lightweight and interpretable models suitable for industrial deployment. Compared to these models, our symbolic discovery framework take advan- tage in achieving higher optimization performance. We compare CMO with five lightweight baselines on all of the test circuits. The results in outperforms all of the baselines in prediction recall. Specifically, it achieves an average improvement of 24% and 21% to the state-of th-the-art symbolic discovery approach SPL and powerful traditional machine learning approach XGBoost.
that our method significantly
More results for inference elficiency We provide detailed model inference time results for all test circuits. Table 10 demonstrates that the runtime the GNN model for COG is hundreds of times greater than that of CMO when executed on purely CPU-based machines. Additionally. results in Table IT show that the inference time of the GNN model accounts for up to 29% of the total end-to- end heuristic execution time, which significantly impacts the efficiency of LO heuristics. Therefore, while the graph-based machine learning model achieves optimization performance comparable to that of CMO, these methods are limited to deployment in modern CPU-based LO tools due to the high inference costs.
D DETAILS OF DATASETS USED IN THIS PAPER
D. DESCRIPTION OF THREE USED BENCHMARKS
We provide detailed statistics of the circuits from EPFL and IWLS in Tables and 13] respectively. Additionally, statistics for the very large-scale circuits and industrial circuits are shown in Tables [4] and 15 The industrial circuits consist of 27 circuits. In general, nodes correspond to logic gates and edges represent the wires connecting them. The fanins of node are the nodes supplying input to it, while the fanouts are the nodes that it drives. Primary inputs (PIs) are nodes without fanins, and primary outputs (POs) are subset of the network's 's nodes. Latches are specialized nodes in sequential circuits, and cubes represent subsets of input variables in Boolean functions. Lev refers to the depth of the DAG, measured by the maximum number of edges between PIs and POs.
D.2 DATASETS FOR EVALUATION ON OPEN-SOURCE BENCHMARKS
For each circuit and a given X heuristic, we collect the circuit dataset by applying the X heuristic to optimize the circuit and collecting the node features (x:) and labels {y: in We found that
19

---

Published as a conference paper at ICLR 2025
there are small number of circuits with effective nodes. We discard these circuits, as we can directly avoid applying transformations to these circuits without learning a model.
Specifically, using the leave-one-out evaluation strategy with the EPFL benchmark, construct three datasets for evaluation. One of the three circuit datasets-colleetedd from Hyp. Multiplier, and Square-served serves the testing dataset, while the remaining datasets used for training. Similarly, under the leave-one-out evaluation strategy with the IWLS benchmark, we create three datasets, selecting one of the four eircuit datasets from Ethernet, Conmax, and Desperf as the testing dataset and using the others for training. To foster the machine learning community in Logic Optimization, we will release the datasets once the paper is accepted for publication.
D.3 DATASETS FOR EVALUATION ON INDUSTRIAL CIRCUITS AND VERY LARGE-SCALE CIRCUITS
In terms of the industrial circuits, we report a statistical description of the training and testing circuits in Table 15 As shown in Tables 15 12 and 13 the industrial circuits consist of 27 industrial circuits, where the circuit sizes range from 2, 775 to 788, 288, which are much larger in size than open-source circuits. Using the leave-one-out evaluation strategy, evaluate method with 23 circuits for training and circuits for testing.
For very large-scale circuits (up to twenty million nodes), we provide detailed description in Table 14 Given the limited number of very large-scale circuits, we utilize circuits from the EPFL dataset outlined in Table [2] along with two additional very large-scale circuits to construct our datasets. Specifically, we adopt the following approach: (1) The Sixteen circuit is designated as the testing dataset, while the remaining circuits serve as the training dataset. (2) The Twenty circuit is the testing dataset, with the rest used for training. To support the machine learning community in Logic Optimization, we will release these datasets upon acceptance of the paper for publication.
D.4 VISUALIZATION OF THE CIRCUIT GRAPH
In the LO stage, circuit is usually modeled by a DAG. Common types of DAGs for LO include And-Inverter Graphs (AIGs) for pre-mapping optimization and K-Input Look-Up Tables (K-LUTss) for post-mapping optimization. In the pre-mapping optimization phase, an AIG is a DAG containing four types of nodes: the constant, Pls, POs, and two-input And (And2) nodes. A graph edge is either complemented or not. A complemented edge indicates that the signal is complemented. In the post-mapping optimization phase, a K-LUT is a DAG with nodes corresponding to Look-Up Tables and directed edges corresponding to wires. A Look-Up Table in K-LUT is digital memory that implements the Boolean function of the node. To further illustrate the circuit graph, we visualize the AIG, K-LUT look-up table, and the circuit optimization process of small circuit selected from IWLS2020 (Rai et al. 202T) in Figure 7
E DETAILS OF METHODS AND EXPERIMENTAL SETTINGS
E.1 DETAILS OF EXPERIMENTAL SETUP
E.1.1 OPTIMIZATION SEQUENCE FLOWS
Optimization Sequence Flows for Collecting Data and Evaluation In the industrial setting, we usually apply sequence of Logic Optimization (LO) heuristics to optimize an input circuit. Thus, we follow the setting throughout all experiments unless mentioned otherwise. Specifically, in terms of the Mfs2 heuristic, we apply the sequence of heuristics, i.e., sirash; deh; iC-C /2; mfs2 -W 4 -M 5000, to collect data and evaluate the performance of the Default Mfs2 heuristic and our CMO. Note that the optimization sequence flow is standard academic flow for evaluating the Default Mfs2 heuristic, which follows previous work (Mishchenko et al. 2011).
Optimization Sequence Flows for Evaluating 2CM0-Mfs2 To apply our CMO twice, apply the sequence of heuristics, i.e., strash; dch; if C 12; mfs2 -W -M 5000; strash; -f-C 12; mfs2 -W 4 -M 5000, to evaluate the performance of 2CMO. Note that the mfs2 heuristic is a posp-mapping optimization heuristic, whose input DAG is a k-input look-up table graph (K-LUTs). Moreover, the strash heuristic transforms the current circuit representation into an Anv-rrrer Graph (AIG) by
20

---

Published as a conference paper at ICLR 2025
Pre-mapping optimization phase
Node Number=24
Node Number=18
Heuristics
Resub
(a). Init AIG
(b). The optimized AIG
Post-mapping optimization phase
Heuristics
Mfs2
12
13
(c). Init K-Luts
(d). The optimized K-Luts
Visualization of the And-Inverter Graph (AIG) and K-Input Look-Up Tables (K-LUTs). In the pre-mapping circuit optimization phase, LO heuristics such resub, applied to optimize the AIG. In the post-mapping phase, LO heuristics such as mfs2, are used to optimize the K-LUTss
Figure 7:
one-level structural hashing. Then, the if (Mishchenko et al. 2007 heuristic maps an AIG into K-LUTs. Finally, the Mfs2 heuristic optimizes the input K-LUTs.
E.1.2 TOP K ACCURACY METRIC
The ineffective Node-Level Transformations problem in many LO heuristics- that is, the number of effective nodes far fewer than ineffective nodes-leads to an extreme class imbalance in the training dataset. Therefore, the learned classifiers always suffer from negative bias and thus 0.5 is an inappropriate threshold for evaluating whether sample is positive. To tackle this problem, we follow (Wang al.) to view the prediction task as scoring function. Specifically, nodes according to the prediction scores given by our learned symbolic functions and select the top k nodes. That is, the top & nodes are predicted positive, and the other nodes predicted negative. Then, the top k accuracy metric is defined by the recall, i.c., the fraction of true positive nodes that predicted be positive.
sort all the
1.1 IMPLEMENTATION OF THE TRAINING DETAILS
In our implementation, we configured the weight factor À between Lteacher and Lstudent as 0.5 to balance the objective functions. We averaged the results over three different random seeds during training. Additionally, regularization factor p 0.99 was employed to penalize excessive expres- sion length, encouraging more compact and interpretable solutions. The training process utilized Monte Carlo Tree Search (MCTS), running 10,000 episodes per iteration across 20 iterations. After training, the best-performing model on the training set from all 20 iterations was selected, ensuring both stability and optimal performance. After discovering structural and semantic functions from the training dataset, we fuse their scores by setting the w as the median of the structural features' outputs.
21

---

Published as a conference paper at ICLR 2025
E.2 IMPLEMENTATION OF THE BASELINES
In this part, we present detailed description of all the baselines used in this paper.
COG. COG is a well-designed 2-layer graph convolutional neural network that can achieve high optimization performance (Wang et al.). Specifically. it constructs a bipartite graph input and learns domain-invariant reprerreeettreeeeeeeeeeeennn representation to achieve high generalization capability.
Effisyn. Effisyn is a human-designed nonlinear symbolic function et al. 2023). Specifically, in human-designed symbolic scoring functions, experts manually design the structure the function and extract key parameters from training circuit data to form a complete symbolic scoring function. This process involves identifying relevant characteristics of the circuit and carefully selecting or engineering the symbolic terms that best capture the underlying behavior of the system. However, designing and developing these functions is extremely challenging as it requires extensive expert knowledge and manual tuning.
SPL. SPL (Sun et al., 20233 is search-based symbolic regression method that employs Monte Carlo tree search (MCTS) agent to explore optimal expression trees based on measurement data. SPL is one of the SOTA symbolic learning methods.
DSR. DSR (Petersen et al., 2020) leading deep learning- based symbolic learning method that employs gradient-based risk-seeking RL approach combined with recurrent neural network (RNN) to generate a probability distribution over expressions.
RidgeLR. RidgeLR (Hoerl& & Kennard 1970) is regularized version of linear regression that adds an L2 penalty to the loss function to prevent overfitting. This regularization term helps reduce the model's sensitivity to multicollinearity and large coefficients by shrinking them, making RidgeLR effective for regression tasks, especially when dealing with high- -igh-dimensional or highly correlated features. It is commonly used in regression problems where overfitting needs to be controlled.
XGBoost. XGBoost (Chen Guestrin 2016) is a machine learning algorithm that builds an ensem- ble of decision trees using gradient boosting, optimizing accuracy by iteratively correcting erross from previous trees. It includes regularization to prevent overfitting and is highly efficient, making it well-suited for both regression and classification problems, especially with large-scale and complex datasets.
Random. Random is baseline that randomly predicts a score between [0, 1] for each node, and selects the top k nodes as positive samples to apply node-level transformations.
E.3 IMPLEMENTATION OF THE SEMANTIC FUNCTION LEARNING PROCESS
Once decomposing the init feature into structural and semantic components, we collect structural data Datr {x:"h, y4 == and semantic data D Deem {xş"m y/ JN where x refers to structural node feature and x refers to semantic node feature. To capture structural information, we model it mathematical symbolic learning problem, the values of structural features be approxi- mated as continuous data, making them suitable for continuous mathematical symbolic regression. In contrast, learning mathematical functions for semantic information is challenging due the dis- crete and binary nature of both feature values and labels. Thus, we formulate the semantic function as a Boolean symbolic learning problem, i.e., learning a boolean function fsem Bd B that can accurately identify the effective nodes, where B f0. 1} denotes the boolean feature domain. Given the binary outputs of Boolean functions, we can select 0.5 as the classification threshold and model it directly classification problem. This significantly reduces the difficulty of symbolic function learning compared to treating as function regression problem.
we have discussed the details of the structural function learning process in Section 4.2 Here we give a detailed implementation of the semantic boolean function learning process. Specifically, the semantic function follows the same symbolic tree search paradigm as the structural function learning. However, the difference mainly lies in the symbolic operator and designed reward function. The symbolic operators include three basic logic operators and, or, not, which are always used to represent the mapping from binary values to binary values. Moreover, due to the binary nature of the boolean function's output, we can model it as classification problem and use 0.5 as the
22

---

Published as a conference paper at ICLR 2025
classification threshold. The loss function designed for the boolean function learning is:
TP L FP+TP AxPP DE 1 = 1111220.
1(p: 2 0.5)
(3)
Σ 1 =
The reason for the loss function is to let the scoring model identify more effective nodes. The term FPi is used as the regularization to prevent the boolean function predicts of the nodes as pos- itive. Once the boolean function accurately identifies all of the effective nodes, it could significantly improve the predictive performance of the final fusion symbolic functions.
Motivations for teacher loss
NN 10
Method
NN 16
GNN 128
0
20
40
60
80
100
Recall(%)
Figure 8:
use two simple multilayer perceptrons (MLP) to fit the relationship between the node features and the GNN's output. The results demonstrate that the MLP achieves comparable gener- alization performance to GNN.
E.4 MORE DETAILS ABOUT THE NODE FEATURE DESIGNED
As shown Table 17 the designed features for each node contain semantic information and struc- tural information. Specifically, for the Mfs2 heuristic, the semantic features designed with the truth table of the node (i.c., 6-inuut look-up table) (Wang et al.). Moreover, the structural feature five-dimension vector that contains structural information of the cireuit such fanin/fanout number and level of the node. Overall, the node feature for the Mfs2 heuristic is a 69-dimensional vector.
E.5 MORE DETAILS ABOUT THE GRAPH DISTILLATION APPROACH
We use equation 2 to evaluate every expression tree. Specifically, we use mean squared error and focal loss for the Tueucher and Lstudent- That is,
1
Lieacher
24 9.)²
(4)
and
L Lssuddnt = - aoy(1 (1 7)" log(U)
a)=a)"" log(1 5).
denotes the prediction output, denotes the soft output of GNN, and is the true labels. The motivation for the loss type of Lyacher mainly comes from an observation that there exists a simple nonlinear mapping relationship from the circuit feature to the output of GNN that achieves compa- rable generalization performance. Specifically, we found that we can use a simple MLP to greatly fit the mapping relationship from the cireuit feature to the output of GNN shown in Figure g
23

---

Published as a conference paper at ICLR 2025
Thus, MSE to directly learn information from the GNN outputs. Moreover, note that the number effective nodes far fewer than ineffective nodes, which poses a substantial challenge to the classification task. Therefore, we leverage the focal loss the Lteacher. which has been shown successful addressing the class imbalance for object detection tasks.
Discussions advantages From the perspective of distillation, approach allows for the dis- tillation of GNNs into simplified symbolic functions. This represents more thorough form of distillation compared to the conventional transformation from GNNs MLPs. By reducing GNNs to symbolic functions, we not only preserve the essential predictive capabilities but also enhance interpretability and reduce computational complexity. From the viewpoint symbolic learning, our symbolic search method leverages the design of fitness measures to discover symbolic functions with superior generalization capabilities. Unlike traditional machine learning models, which often strug- gle with overfitting and lack of interpretability. symbolic functions are derived through our method. offer a robust alternative. These functions designed effectively capture the underlying patterns in data, leading to better generalization in various applications.
24

---

Published as a conference paper at ICLR 2025
Algorithm The training process
Input:
Training dataset = (xi, yi 1=1i
Output: Semantic function frem, Structural function fetm;
Step 1: Separate the initial dataset D into structural data Derr
(x 34 h and semantic data
D sem {xxeemm U/ N
Step 2: Apply GESD (Algorithm to learn the structural function for from Dstri
Step 3: Apply GESD (Algorithm
to learn the semantic function foem from D sem'
Algorithm GESD
Input:
Training dataset D = {xi, Vi Trained GNN model faNN;
Output: Optimal function f":
1: for each episode do do
2: Selection: Initialize 80 = 0, 1 0;
3: while is expandable and t < mmax do
4: Choose ac+1 = arg max, (C) a);
5: Take action d+++1, observe s', N7;
6: 8++1 < 8 mark as visited, t + + 1;
7: end while
8: Expansion: Randomly take an unvisited path with action a, observe s';
9: S:+1 t s'; mark as visited, <- + 1;
10: Simulation: Fix the starting point 8t;
for each simulation do do while is non-terminal and < Imax do Randomly take an action a, observe s'; St41 < s';t 4 ++1
12:
14:
15:
end while
16:
if 81+1 forms complete expression tree then
17:
Project
18:
Calculate the function prediction [xx);
19:
Calculate the GNN prediction z (x)N((x;;
20:
Calculate the simulation reward:
17"
Te+1 AL (ÿ,y) (1 A) Lueachrr (v.
21:
end if
22:
end for
23:
Backpropagate the maximum simulation results and visited count;
24:
end for
Algorithm 3 The Inference process
Input:
Test dataset Drest = {Ni, y: j structural function ferr, semantic function faem; The scores for all nodes in Diesti
Output:
step 1: Separate the test dataset D Drest into structural data Datr = {x." 34 J and semantic data
D sem = [xxem. y/ )
step 2: Calculate the structural scores str with spt fstr (x:"t) and semantic scores sem with
s sem = f (x.em):
step 3: Calculate the weight Median(sttry.
step 4: Calculate the final scores s = str + w sem for all nodes Dtesti
25

---

Published as a conference paper at ICLR 2025
Table 5: We report the recall and optimization performance of the Mfs2 heuristic incorporated with Random models. And Reduction denotes the reduced number of nodes, i.e., optimization perfor- mance. Percent denotes the hyperparameter k, i.e., the percent of nodes to apply transformations.
Hyp
Multiplier
Percent
Recall
And Reduction (AR)
Percent
Recall
And Reduction (AR)
0.10
0.11
33.33
0.10
0.10
3.00
0.20
0.20
69.00
0.20
0.18
5.33
0.30
0.30
111.33
0.30
0.28
6.67
0.40
0,40
164.67
0.40
0.39
9.33
0.50
0.50
225.33
0.50
0.44
10.00
0.60
0.60
295.00
0.60
0.56
12.33
0.70
0.70
374.33
0.70
0.67
14.00
0.80
0.80
464.33
0.80
0.78
16.67
0.90
0.90
561.33
0.90
0.89
19.00
1.00
1.00
664.00
1.00
1.00
22.00
Desperf
Ethernet
Percent
Recall
And Reduction (AR)
Percent
Recall
And Reduction (AR)
0.10
0.10
114.67
0.10
0.11
6.00
0.20
0.21
210.33
0.20
0.18
8.00
0.30
0.31
318.33
0.30
0.29
10,00
0.40
0.41
421.33
0.40
0.38
13,00
0.50
0.50
529.67
0.50
0.47
15.00
0.60
0.60
657.67
0.60
0.56
16.33
0.70
0.70
790.00
0.70
0.67
21.00
0.80
0.80
904.67
0.80
0.79
26.67
0.90
0.90
1001.33
0.90
0.89
29.67
1.00
1.00
1118.00
1.00
1.00
38.00
Conmax
Square
Percent
Recall
And Reduction (AR)
Percent
Recall
And Reduction (AR)
0.10
0.10
95.00
0.10
0.11
0.00
0.20
0.20
188.00
0.20
0.19
0.00
0.30
0.30
251.00
0.30
0.28
0.33
0.40
0.40
330.67
0.40
0.38
1.33
0.50
0.50
411.67
0.50
0.48
2.33
0.60
0.59
493.33
0.60
0.56
3.00
0.70
0.69
557.67
0.70
0.65
3.67
0.80
0.78
625.00
0.80
0.75
4.33
0.90
0.90
718.67
0.90
0.89
6.67
1.00
1.00
782.00
1.00
1.00
8.00
26

---

Published as a conference paper at ICLR 2025
Table 6: We compare CMO with well-designed GNN COG and the human-designed approach Effisyn. Specifically,, we set the hyperparameter as 50% for COG and our CMO and 70% for Effisyn. And Reduction (AR) denotes the reduced number of nodes, i.e, optimization performance. Normalized AR denotes the ratio of the AR to that the default heuristic.
Hyp
Mulliplier
And Reduction (AR)
Normalized AR (4)
Method
Reducction (AR)
Nommllized AR
Time (s)
CDG
661.3 33
1.00
247.26
CUG
21 21.00
0.95
18.14
Elliyyn
662.00
1.00
270.50
Eflisyn
18.00
0.82
16.17
(Quns)
(Ouns)
Square
Desperf
Method
And Reduction (AR)
Normalized AR (+)
Method
Reducctoo (AR)
Nomallized AR
Time (s)
COG
8.00
1.00
16.11
COG
890.67
0.80
29.97
Efliyyn
1.00
0.15
16.73
Eflisyn
895.00
0.80
26.59
(Quns)
(Ouns)
Kthemet
Coemax
Method
And Reduction (AR)
Normalized AR
Time (4)
Method
And Reduccton (AR)
Nomallzed AR
Time (s)
CDG
27.33
0.72
20.01
COG
730.67
0.93
19.03
Effiynn
27.00
0.71
32.85
Eflisyn
704.00
0.90
25.29
(Quns)
(Ouns)
C12
Method
And Reduction (AR)
Normalized AR
Time (5)
Method
And Reduction (AR)
Normalized AR
Time (s)
CDG
9.67
0.81
327.05
COG
15.50
0.57
61.89
Effisyn
0:75
275.58
Effisyn
19.00
59.14
(Quns)
CMO (Ouns)
C13
C14
Method
And Reduction (AR)
Normalized AR
Time (5)
Mechod
And Reduction (AR)
Nommalized AR
Time (s)
CDG
1040.00
1.00
145.12
COG
98.00
0.99
161.19
Effisyn
1040.00
1.00
126.31
Effisyn
99.00
1.00
84.29
CMO (Quns)
1040.00
1.00
113,08
CMO (Ours)
96 96.00
109:42
Sixteen
Tweaty
Method
And Reduction (AR)
Normalized AR
Time
Mechod
And Reduction (AR)
Nommllize AR
Time (s)
CDG
1031 00)
0.94
61905 96
COG
1291 00)
0.95
86112
Effisyn
0.01
47078.07
Effisyn
9.00
73853,4 64
CMO (Oun)
1000000
0.91
32001.27
CMO (Ours)
1251
0.92
56965.94
Table 7: We present more ablations study results on open-source benchmarks.
Circuit
Hyp Recall f
Multiplier
Square
DesPerf
Ethernet
Conmax
Method
Recall f
Recall t
Recall
Recall
Recall
CMO
0.96
0.98
0.99
0.80
0.72
0.84
CMO without GSD
0.91
0.96
0.67
0.80
0.44
0.76
CMO without SFD
0.99
0.80
0.80
0.73
0.66
0.42
CMO without SFD and GSD
0.52
0.72
0.93
0.60
0.42
0.45
27

---

Published as a conference paper at ICLR 2025
Table 8: We compare our CMO with five lightweight baselines. The results demonstrate that our
approach outperforms all of the baselines in terms of generalization capability.
Hyp
Multiplier
Square
Desperf
Ethernet
Conamx
Method
Recall
Recall
Recall 1
Recall
Recall f
Recall f
SPL
0.93
0.52
0.72
0.60
0.42
0.45
DSR
0.20
0.11
0.46
0.76
0.72
0.88
XGBoost
0.91
0.86
0.46
0.79
0.33
0.68
RidgeLR
0.81
0.62
0.88
0.79
0.33
0.54
Random
0.50
0.44
0.48
0.50
0.47
0.50
CMO (Ours)
0.99
0.96
0.98
0.80
0.72
0.84
Sixteen
Twenty
Cil
Ci2
Ci3
Ci4
Method
Recall
Recall
Recall t
Recall
Recall t
Recall f
SPL
0.43
0.44
0.85
0.91
0.98
0.80
DSR
0.63
0.63
0.85
0.83
0.95
0.94
XGBoost
0.62
0.58
0.78
0.81
0.77
0.79
RidgeLR
0.79
0.84
0.85
0.95
0.71
0.37
Random
0.50
0.50
0.51
0.50
0.50
0.49
CMO (Ours)
0.86
0.85
1.00
1.00
0.99
0.96
Table 9: We compare our CMO with five lightweight baselines. The results demonstrate that our approach outperforms all of the lightweight baselines in terms of online heuristics efficiency and optimization performance.
Hyp
Mulippierr
(AR)
Nomalized AR
SPL.
659.33
0.99
234.88
SPL
20.67
0.91
15.63
DSR
$27.67
0.79
257 357.61
DSR
4.00
0.18
14.41
XGBoost
650.00
0.98
246.79
XGBoodt
20.00
14.28
RidgeLR
0.97
Ridgel
20.00
11.52
Random
374.33
0:57
228.51
Random
14.00
0.64
13.74
GESD (Ours)
661.00
1.00
213.39
GESD (Ours)
20.00
0.91
14.32
Square
Daserf
Method
And Reduction (AR)
Normalized AR
Time
Method
And Reduction (AR)
Nommalized AR
Time
DSR
1,00
0.13
20.63
DSR
865.00
0.77
26.42
XGBoest
1,00
0.13
19.73
XGBoost
1026.00
0.92
29.97
RidgeLR
3.00
0.38
14.90
RidgeLR
942.00
0.84
33.26
GESD (Ours)
7.33
0.92
12.54
GESD (Ours)
983.00
0.95
22.38
Method
And Reduction (AR)
Normalized AR
Time (5)
Method
And Reduction (AR)
Nomalized AR
Time (4)
SPL
17.67
0.46
32.39
SPL
681.67
0.87
25.25
28.
767.00
RidgeLR
18,00
0.47
34.49
RidgeLR
638 00
0.82
24.96
Random
21.00
0.55
28.96
Random
557.67
0.71
22.31
GESD (Ours)
GESD (Ours)
28

---

Published as a conference paper at ICLR 2025
Table 10: we report more results about the Model Inference Time. Note that all of the experiments tested on purely CPU-based machines.
Hyp
Multiplier
Square
Desperf
Ethernet
Conamx
Method
Time (s)
Time (s) 4
Time (s) 4
Time (s)
Time (s) 4
Time (s)
COG
16.730
3.415
2.383
6.238
2.771
3.557
Effisyn
0.152
0.015
0.010
0.056
0.018
0.023
CMO (Ours)
0.059
0.009
0.007
0.049
0.018
0.010
Sixteen
Twenty
Cil
Ci2
Ci3
Ci4
Method COG Effisyn
Time (s)
Time (s) 4
Time (s) 4
Time (s) |
Time (s) |
Time (s)
1377.657
1787.070
31.710
18.230
30.540
38.770
9.670
12.189
0.320
0.220
0.290
0.160
CMO (Ours)
4.156
4.956
0.170
0.060
0.140
0.160
Table 11: We present the inference times for the GNN model COG and its integrated LO heuristic, COG-Mfs2, on open-source and industrial circuits. Ratio denotes the proportion of the COG model's time accounted for by COG-Mfs2. The results demonstrate that the runtime of the GNN accounts up to 29.46% to that of COG-Mfs2, which significantly impacts the efficiency of the Mfs2 heuristic purely CPU-based LO tools.
Hyp
Multiplier
COG(time, s)
COG-Mis2((ime,s) s)
ratio(%)
COG(time, s)
COG-Mrs2(time,,, s)
ratio %
16.73
247.26
6.77
18.14
3,42
18.83
Square
Desperf
COG(time, s)
COG-Mis2(time,, s)
ratio(%)
COG(lime, s)
COG-Mis2(iime, s)
ratio (%)
2.38
16.11
14.79
6.24
29.97
20.82
Ethernet
Conmax
COG(time,
COG-M (OG-Mfs2(time,,) ratio(%)
COG(time, s)
COG-Mfs2(time,, s)
ratio(%)
2.77
20.01
13.85
3.56
19.03
18.69
Cil
Ci2
COG s)
COG-Mfs2(time,, s) ratio(%)
COG(time, s)
COG-Mfs2(time, s)
ratio %)
31.71
327.05
9.70
18.23
61.89
29.46
Ci3
Ci4
COG(time,
COG-Mfs2(time,,
ratio(%)
COG(time, s)
COG-Mti2(time,, s)
ratio (%)
30.54
145.12
21.04
38.77
161.19
24.05
29

---

Published as a conference paper at ICLR 2025
Table 12: A detailed description of circuits from the EPFL benchmark. Nodes denotes the sizes of circuits, and Lev denotes the depths of circuits.
Circuit
Pl
PO
Latch
Nodes
Edge
Cube
Lev
Adder
256
129
1020
2040
1020
255
Barrel shifter
135
128
3336
6672
3336
Divisor
128
128
57247
114494
57247
4372
Hypotenuse
256
128
214335
428670
214335
24801
Log2
32
32
32060
64120
323060
444
Max
512
130
2865
5730
2865
287
Multiplier
128
128
27062
54124
27062
274
Sin
24
25
0
5416
10832
5416
225
Square-root
128
64
0
24618
49236
24618
5058
Square
64
128
18486
36969
18485
250
Round-robin ariter
256
129
11839
23678
11839
87
Alu control unit
7
26
175
348
174
10
Coding-cavle
10
11
693
1386
693
16
Decoder i2c controller
8
256
304
608
304
3
147
142
1357
2698
1356
20
Int to float converter
11
260
520
260
Memory controller
1204
1230
47110
93945
47109
114
Priority encoder
128
978
1956
978
250
Lookahead XY router
60
30
284
514
257
54
Voter
1001
13758
27516
13758
70
Table 13: A detailed description of circuits from the IWLS benchmark. Nodes denotes the sizes of circuits, and Lev denotes the depths of circuits.
Circuit
PI
PO
latch
nodes
edge
cube
lev
aes_core des _area
259
129
530
20797
40645
24444
28
240
64
128
5005
9882
5889
35
des der-
234
64
8808
98463
180542
108666
28
ethernet
98
115
10544
46804
113378
72850
37
i2c mem_ctrl pci bridge32
19
14
128
1147
2299
1375
15
115
152
1083
11508
26436
14603
31
162
207
3359
16897
34607
23130
29
pei_conf_cyee @yyc_addr.de _ec
32
32
0
109
212
128
pei pei_spoci_eto ctrl
25
13
60
1271
2637
1557
19
sasc simple_spi
16
12
117
552
1148
766
10
16
12
132
823
1694
1089
14
spi steppermotordrive
47
45
229
3230
6904
4054
32
4
4
25
228
397
253
11
systemcaes
260
129
670
7961
18236
11648
44
systemedes
132
65
190
3324
6304
3791
33
tv80
14
32
359
7166
16280
9352
50
usb_funer
128
121
1746
12871
27102
16378
25
usb-phy
15
18
98
559
1001
638
12
vga_led
89
109
17079
124050
242332
146201
25
wb_conmax
1130
1416
770
29036
77185
39619
26
wb_dma
217
215
263
3495
7052
4496
26
30

---

Published as a conference paper at ICLR 2025
Table 14: A detailed description of two very large-scale circuits from the EPFL benchmark. Nodes denotes the sizes of circuits, and Lev denotes the depths of circuits.
Circuit PI
PO
Latch
Nodes
Lev
twenty
137
60
0
20732893
162
sixteen 117
50
0
6836
140
Table 15: A statsical description of 27 industrial circuits (23 training circuits and 4 testing circuits) from Huawei HiSilicon. Nodes denotes the sizes of circuits, and Lev denotes the depths of circuits.
Traning Circuits
PI
PO
Latch
Nodes
Lev
mean 8410.5
5978.682
0
104229.4
55.95455
max 59974
29721
788288
104
min
41
107
2775
18
Testing Circuits
PI
PO
Latch
nodes
lev
mean
18540.67
18015
356111.2
103.3333
max
42257
33849
0
655243
185
min
523
483
0
24778
40
Table 16: present structural and semantic scoring functions the industiral circuits to illus- trate the interpretability of CMO. Here represents node feature.
Cil
structural semantic
sin(x0 * I2 + zo cos
x1 11)/20
- A T20 x224) A - T63 A Ø26 A Ø47 x27)
Ci2
structural semantic
exp 03 cos (33) x0)) T3 + x2
(I32 A T56 A T36) ^ - (I'47 A - A x57)
Ci3
structural semantic
sin(xo cos (I:2 cos(
2z /21
(I52 V -265) A - 1 A x44)
Ci4
structural semantic
To cxp(x1) / cxp(x (x:2 ) sin (To + 133) + E3 (x26 A 262 ^ 03 A 235)
A -I A 032 A x26)
31

---

Published as a conference paper at ICLR 2025
Table 17: We provide our manually designed node features.
heuristic
Node features
Mfs2
Semantic information
Structure information
Input: 6-LUTs
Truth table of the node the node is 6-input LUT
Fanin number
Fanout number
(64-dimensional vector)
Level
LevelR
Node ID
Table 18: We compare the Default Mfs2 heuristic with our 2CM0-MEs2 heuristic with the hyperpa-
rameter l set as 30%, 40% and 50% on open-source and industrial circuits. Optimized Nd denotes the node number (size) of circuits, and Lev denotes the level (depth) of circuits. We define an Improvement metric by
M (Default) -M (Ours) where M-)) denotes the Nd, Lev, Time.
M (Dsfait))
Open-souree Clecaits
Hyp
Mulliplier
Method
Lev
Impeovement (Optiiized Nd, %
Time (6)
Improvemete (Time, (5)
Optinized Nd
(Opoiiized Nd, %)
Improvement ?
Time
Improvement (Time, 16)
Delaant (Mi-C)
8259.00 00
NA
$19.33
NA
7799 00
NA
23. Sk
CMD-MS (0.5, Ousi
8259.00 00
II
158.49
50.37
7801 00
-0.33
14.25
36.77
XCMD-Mis (0.3, Ous)
S762 00
30.23
127.51
61007
7661 D0
7:27
18.06
20.00
2CMD-Mis (0.4, Ous)
5782.00
30.23
170.45
46.62
7659 00
7.36
20.81
7.85
Open-source Ciecuits
Exhernet
Mathod
Optimized Nd.
Inpervement 7
(Lev, 5))
Time (4)
Ingrovement (Time, ())
Optimizud Nd
(Opemizzdd Nd, %6
Improsement
Time
Ingresement
(Time, %))
Dedani: (MES2) CMD Mrs (05, Ounsi
5701,00
NA
27.55
NA
13638.00 D0
NA
$4.48
NA
5901.67
0.01
12:54
$6.47
1 13645 00
-008
21.73
36.99
XCMD-MIs (0.3, Oun)
551866
3.26
15.04
45.42
13316.67
4.19
15.57
$4.84
2CMD MS (0.4, Ous)
5515.33
3,32
19.06
30,80
135 16.33
4,20
24,38
29.28
Open-snmrce Ciecaits
Disporr
Method
Optimized Nd
10ptimized Nd,
Time
(Tame, (5)
Optimized Nd.
(Oyiiizzd Nd,
Time
Ingrovenent
(Time. 16)
Defanit (MEC)
16809
NA
23:78
NA
30853.00
NA
36, 75
CMD-Mis (0.5. Ours)
16587.67
-0.46
15:27
35.81
309 10
-0.18
26 40
XCMD-Mis (0.5. Ouna
15723.3 3%
2,00
18:34
23.92
29192. 00
2.31
30.16
17.96
XCMD-Mis (0.4, Ouri
15665.67
2.08
21.65
8.95
29175.67
3,50
38.20
-3.92
very Large
Twenry
Optimized
(Oytimizoll
Time
Optimized
Improvemnnt (Ojeimizol Nil,
Time
Improsement
Dedaul:: (MG2) CMO MB2
601
NA
75754 (14
NA
7093089
NA
6018729
IU003
$9.38
7694455
0.002
56905
2CMD MB52 10.3, Our))
5434092
9.20
36425,
53.77
6877483
10.60
59786.35
45.02
X0M0-M622 Dus)
5435745
46572.91
6877158
75936.
Industrial Ciecuits
Cii
C12
Method
Lav
Imgrovenent
(L.vv, %))
Time
Imgrovement (Time.
Optimized Ni
Ingrosement (Optimized Nd, %)
Time
Inys ovementt (Time, (6)
Detank (M
47
NA
190.35
MA
99245
NA
7807
NA
CMD-Min (0.5, Oua)
47
0,000
113.05
37.30
99245
Q100
45.61
41.58
3CM0-M62 (0.3, Our)
45
4.36
142.96
20.73
94340
5.04
64 64-37
17.55
30MD-M62 (0.4, Ours)
45
4.36
177.04
1.84
93184
6.11
81.07
.3.84
Optimized Nd
Improvement (Optiiized
Improvement
No.
Inprovement (Optimized Nd, (6)
Time
Improvement (Time,
Defank 10.5. Ous)
196565
458.3
215708
201.43
Que)
194516
212.72
32


Reviews:
[{"review_id": "7CMOvN5w54", "reviewer": "Reviewer_s1pC", "summary": "This authors propose a novel data-driven circuit symbolic learning framework, CMO. It learns a symbolic scoring function balancing inference efficiency, interpretability, and generalization performance. While existing approaches often struggle with these trade-offs in modern circuit synthesis (CS) tools, CMO demonstrates superior capability in discovering lightweight and interpretable symbolic functions from a decomposed symbolic space. The major technical contribution of CMO is the Graph Enhanced Symbolic Discovery (GESD) framework, which employs a specially designed Graph Neural Network (GNN) to guide the generation of symbolic trees. CMO is the first graph-enhanced approach for discovering lightweight and interpretable symbolic functions that effectively generalize to unseen circuits in CS.", "questions": "Please check weakness", "limitations": "", "rating": 6, "confidence": 3, "soundness": 4, "presentation": 3, "contribution": 3, "strengths": "1. Overall, the proposed work is well-structured with a profound related work.\n2. This paper proposes a novel circuit symbolic learning framework to learn efficient, interpretable, and generalizable symbolic functions that are reliable and simple to deploy in modern CS tools.\n3. CMO is the first graph-enhanced approach for discovering lightweight and interpretable symbolic functions that can well generalize to unseen circuits in CS.  \n4. Extensive experimental results show the effectiveness of the proposed CMO over existing works.", "weaknesses": "The link between the two methods in sections 4.1 and 4.2 needs to be further elucidated, and it is not currently possible to visualize in the text the specific interrelationships between the two methods. For example, what is the role of si in section 4.1 in section 4.2 and what is the flow of the calculations for si.", "quality": null, "clarity": null, "significance": null, "originality": null, "strengths_and_weaknesses": "", "was_revised": false, "final_justification": "", "rebuttal": "", "claims_and_evidence": "", "methods_and_evaluation_criteria": "", "theoretical_claims": "", "experimental_designs_or_analyses": "", "relation_to_broader_scientific_literature": "", "essential_references_not_discussed": "", "other_strengths_and_weaknesses": "", "other_comments_or_suggestions": "", "questions_for_authors": "", "summary_of_paper": "", "summary_of_recommendation": "", "technical_quality": "", "clarity_of_presentation": "", "potential_impact": "", "robotics_focus": "", "quality_of_limitations": "", "questions_for_rebuttal": "", "reasons_to_accept": "", "reasons_to_reject": "", "questions_to_authors": "", "extra_scores": {}}, {"review_id": "nc3VUd7atd", "reviewer": "Reviewer_oLyS", "summary": "This paper studies the problem of circuit synthesis (CS) via graph-based methods that can generalize to unseen circuits. The proposed method, CMO, combines symbolic function learning with Graph Neural Networks.", "questions": "N/A", "limitations": "", "rating": 6, "confidence": 3, "soundness": 3, "presentation": 3, "contribution": 3, "strengths": "1. The paper is well-written with good introduction to the domain especially for ML-audience less familiar with hardware design.\n2. Choice of benchmarks and state-the-art heuristics seem to be solid with comprehensive evaluation.\n3. The proposed method achieves significant speedup while maintaining optimization performance on real circuits.", "weaknesses": "1. Theoretical justification and analysis are lacking – It seems combining GNN, MCTS, symbolic learning etc. leads to better results on these CS benchmarks, yet some deeper explanation and analysis can be provided to make the paper stronger.\n2. Some of the writings can be improved, e.g. “However, this approach cannot capture effective information from specific circuit distribution for higher generalization performance” – Is it due to the human-designed nature and lack of adoption of machine learning from existing data?\n3. Some technical errors, e.g. “Specifically, we use mean absolute error and focal loss” yet the equation (4) is an MSE loss.\n4. More circuit dataset descriptions, e.g. graph sizes, and graph visualizations would provide a more solid background for ML audience.", "quality": null, "clarity": null, "significance": null, "originality": null, "strengths_and_weaknesses": "", "was_revised": false, "final_justification": "", "rebuttal": "", "claims_and_evidence": "", "methods_and_evaluation_criteria": "", "theoretical_claims": "", "experimental_designs_or_analyses": "", "relation_to_broader_scientific_literature": "", "essential_references_not_discussed": "", "other_strengths_and_weaknesses": "", "other_comments_or_suggestions": "", "questions_for_authors": "", "summary_of_paper": "", "summary_of_recommendation": "", "technical_quality": "", "clarity_of_presentation": "", "potential_impact": "", "robotics_focus": "", "quality_of_limitations": "", "questions_for_rebuttal": "", "reasons_to_accept": "", "reasons_to_reject": "", "questions_to_authors": "", "extra_scores": {}}, {"review_id": "LlHvKnfwCZ", "reviewer": "Reviewer_kVA7", "summary": "This paper proposes a method called CMO to develop lightweight and generalizable scoring functions for ranking nodes in an AIG, aiming to enhance the efficiency and performance of logic optimization. The method is clearly introduced. The paper trains a GNN and uses an MCTS-based symbolic regression method to generate symbolic scoring functions, ensuring both inference efficiency and generalization. However, some experimental details remain unclear.", "questions": "1. Can CMO generalize to other logic optimization methods like Rewrite?\n2. Can a GNN trained on one dataset generalize to another dataset?\n3. How are the training dataset labels obtained?\n4. The presentation of experiments is confusing. Please clarify which is the main experiment and which are ablation studies.", "limitations": "", "rating": 8, "confidence": 4, "soundness": 3, "presentation": 2, "contribution": 2, "strengths": "The method is clearly introduced, with comprehensive experiments demonstrating the effectiveness and performance of CMO.", "weaknesses": "### Topic\nThe term \"circuit synthesis\" is not well-defined in the field of EDA, which may cause confusion. Based on the related works and experiments, this paper appears to focus on logic optimization.\n### Datasets\nThe labels of circuit datasets should be clarified. When mentioning node-level transformation, does it mean it is effective for the current step of logic optimization or for overall performance? Effectiveness in the current step may not translate to overall performance in logic optimization.\n### Experiments\nThe experiment part is somewhat confusing. The focus of logic optimization should be on time cost and node reduction during the online phase. The offline phase appears more like an ablation study. Experiments on generalization should be highlighted in the main part of the manuscript. Experiment 4 should showcase generalization compared to other baselines like COG, but why other SR methods? Is this an ablation study of the SR method used?\n### Generalization\nEPFL, IWLS, and an industrial-level dataset from Huawei HiSilicon are used to train the GNN. Are the datasets mixed to train a single GNN, or are three separate GNNs trained for each dataset?", "quality": null, "clarity": null, "significance": null, "originality": null, "strengths_and_weaknesses": "", "was_revised": false, "final_justification": "", "rebuttal": "", "claims_and_evidence": "", "methods_and_evaluation_criteria": "", "theoretical_claims": "", "experimental_designs_or_analyses": "", "relation_to_broader_scientific_literature": "", "essential_references_not_discussed": "", "other_strengths_and_weaknesses": "", "other_comments_or_suggestions": "", "questions_for_authors": "", "summary_of_paper": "", "summary_of_recommendation": "", "technical_quality": "", "clarity_of_presentation": "", "potential_impact": "", "robotics_focus": "", "quality_of_limitations": "", "questions_for_rebuttal": "", "reasons_to_accept": "", "reasons_to_reject": "", "questions_to_authors": "", "extra_scores": {}}]

Author rebuttal:

Decision: Accept (Poster)