text: # frama-c -wp -wp-steps 300 [...]
  [kernel] Parsing tests/wp_typed/user_init.i (no preprocessing)
  [wp] Running WP plugin...
  [wp] Loading driver 'share/wp.driver'
  [wp] [CFG] Goal init_exits : Valid (Unreachable)
  [wp] [CFG] Goal init_t1_exits : Valid (Unreachable)
  [wp] [CFG] Goal init_t2_v1_exits : Valid (Unreachable)
  [wp] [CFG] Goal init_t2_v2_exits : Valid (Unreachable)
  [wp] [CFG] Goal init_t2_v3_exits : Valid (Unreachable)
  [wp] Warning: Missing RTE guards
  [wp] 16 goals scheduled
  [wp] [Qed] Goal typed_init_t2_bis_v1_loop_assigns_part1 : Valid
  [wp] [Alt-Ergo 2.0.0] Goal typed_init_t2_bis_v1_loop_assigns_part2 : Unsuccess
  [wp] [Alt-Ergo 2.0.0] Goal typed_init_t2_bis_v1_loop_assigns_part3 : Unsuccess
  [wp] [Qed] Goal typed_init_t2_bis_v1_assigns_exit_part1 : Valid
  [wp] [Alt-Ergo 2.0.0] Goal typed_init_t2_bis_v1_assigns_exit_part2 : Unsuccess
  [wp] [Qed] Goal typed_init_t2_bis_v1_assigns_exit_part3 : Valid
  [wp] [Qed] Goal typed_init_t2_bis_v1_assigns_normal_part1 : Valid
  [wp] [Alt-Ergo 2.0.0] Goal typed_init_t2_bis_v1_assigns_normal_part2 : Unsuccess
  [wp] [Qed] Goal typed_init_t2_v1_loop_assigns_part1 : Valid
  [wp] [Alt-Ergo 2.0.0] Goal typed_init_t2_v1_loop_assigns_part2 : Unsuccess
  [wp] [Alt-Ergo 2.0.0] Goal typed_init_t2_v1_loop_assigns_part3 : Unsuccess
  [wp] [Qed] Goal typed_init_t2_v1_loop_assigns_2_part1 : Valid
  [wp] [Alt-Ergo 2.0.0] Goal typed_init_t2_v1_loop_assigns_2_part2 : Unsuccess
  [wp] [Alt-Ergo 2.0.0] Goal typed_init_t2_v1_loop_assigns_2_part3 : Unsuccess
  [wp] [Qed] Goal typed_init_t2_v1_assigns_part1 : Valid
  [wp] [Alt-Ergo 2.0.0] Goal typed_init_t2_v1_assigns_part2 : Unsuccess
  [wp] Proved goals:    7 / 16
    Qed:               7 
    Alt-Ergo 2.0.0:    0  (unsuccess: 9)
  [wp] Report in:  'tests/wp_typed/oracle_qualif/user_init.2.report.json'
  [wp] Report out: 'tests/wp_typed/result_qualif/user_init.2.report.json'
  -------------------------------------------------------------
  Functions           WP     Alt-Ergo        Total   Success
  init_t2_v1           3     -                 8      37.5%
  init_t2_bis_v1       4     -                 8      50.0%
  -------------------------------------------------------------
  