text: <acrn-config board="nuc6cayh" scenario="industry">
    <hv>
      <DEBUG_OPTIONS desc="Debug options for ACRN hypervisor, only valid on debug version">
          <RELEASE desc="Release build. 'y' for Release, 'n' for Debug.">n</RELEASE>
          <SERIAL_CONSOLE desc="The serial device which is used for hypervisor debug, only valid on Debug version.">/dev/ttyS0</SERIAL_CONSOLE>
          <MEM_LOGLEVEL desc="Default loglevel in memory">5</MEM_LOGLEVEL>
          <NPK_LOGLEVEL desc="Default loglevel for the hypervisor NPK log">5</NPK_LOGLEVEL>
          <CONSOLE_LOGLEVEL desc="Default loglevel on the serial console">3</CONSOLE_LOGLEVEL>
          <LOG_DESTINATION desc="Bitmap of consoles where logs are printed.">7</LOG_DESTINATION>
          <LOG_BUF_SIZE desc="Capacity of logbuf for each physical cpu.">0x40000</LOG_BUF_SIZE>
      </DEBUG_OPTIONS>
  
      <FEATURES>
          <RELOC desc="Enable hypervisor relocation">y</RELOC>
          <SCHEDULER desc="The CPU scheduler to be used by the hypervisor.">SCHED_BVT</SCHEDULER>
          <MULTIBOOT2 desc="Support boot ACRN from multiboot2 protocol.">y</MULTIBOOT2>
  	<RDT desc="Intel RDT (Resource Director Technology).">
              <RDT_ENABLED desc="Enable RDT">y</RDT_ENABLED>
              <CDP_ENABLED desc="CDP (Code and Data Prioritization). CDP is an extension of CAT.">n</CDP_ENABLED>
              <CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
              <CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
              <CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
              <CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
  	</RDT>
          <HYPERV_ENABLED desc="Enable Hyper-V enlightenment">y</HYPERV_ENABLED>
          <IOMMU_ENFORCE_SNP desc="IOMMU enforce snoop behavior of DMA operation.">n</IOMMU_ENFORCE_SNP>
          <ACPI_PARSE_ENABLED desc="Enable ACPI runtime parsing.">y</ACPI_PARSE_ENABLED>
          <L1D_VMENTRY_ENABLED desc="Enable L1 cache flush before VM entry.">n</L1D_VMENTRY_ENABLED>
          <MCE_ON_PSC_DISABLED desc="Force to disable software workaround for Machine Check Error on Page Size Change.">n</MCE_ON_PSC_DISABLED>
          <IVSHMEM desc="IVSHMEM configuration">
              <IVSHMEM_ENABLED desc="Enable Share Memory between VMs by IVSHMEM.">n</IVSHMEM_ENABLED>
              <IVSHMEM_REGION desc="the shared memory region name (starting with hv:/, size (in MB), and IDs of all VMs (separated by a colon) sharing this region, for example hv:/sharename,2,0:2"></IVSHMEM_REGION>
          </IVSHMEM>
      </FEATURES>
  
      <MEMORY>
          <STACK_SIZE desc="Capacity of one stack, in bytes.">0x2000</STACK_SIZE>
          <HV_RAM_SIZE desc="Size of the RAM region used by the hypervisor"></HV_RAM_SIZE>
          <HV_RAM_START desc="2M-aligned Start physical address of the RAM region used by the hypervisor."></HV_RAM_START>
          <LOW_RAM_SIZE desc="Size of the low RAM region">0x00010000</LOW_RAM_SIZE>
          <UOS_RAM_SIZE desc="Size of the User OS (UOS) RAM.">0x200000000</UOS_RAM_SIZE>
          <SOS_RAM_SIZE desc="Size of the Service OS (SOS) RAM.">0x400000000</SOS_RAM_SIZE>
          <PLATFORM_RAM_SIZE desc="Size of the physical platform RAM">0x400000000</PLATFORM_RAM_SIZE>
      </MEMORY>
  
      <CAPACITIES desc="Capacity limits for static assigned data struct or maximum supported resouce">
          <IOMMU_BUS_NUM desc="Highest PCI bus ID used during IOMMU initialization.">0x100</IOMMU_BUS_NUM>
          <MAX_IR_ENTRIES desc="Maximum number of Interrupt Remapping Entries.">256</MAX_IR_ENTRIES>
          <MAX_IOAPIC_NUM desc="Maximum number of IO-APICs.">1</MAX_IOAPIC_NUM>
          <MAX_PCI_DEV_NUM desc="Maximum number of PCI devices.">96</MAX_PCI_DEV_NUM>
          <MAX_IOAPIC_LINES desc="Maximum number of interrupt lines per IOAPIC.">120</MAX_IOAPIC_LINES>
          <MAX_PT_IRQ_ENTRIES desc="Maximum number of interrupt source for PT devices.">64</MAX_PT_IRQ_ENTRIES>
          <MAX_MSIX_TABLE_NUM desc="Maximum number of MSI-X tables per device. Please leave it blank if not sure.">16</MAX_MSIX_TABLE_NUM>
          <MAX_EMULATED_MMIO desc="Maximum number of emulated MMIO regions.">16</MAX_EMULATED_MMIO>
      </CAPACITIES>
  
      <MISC_CFG>
          <GPU_SBDF desc="Segment, Bus, Device, and function of the GPU.">0x00000010</GPU_SBDF>
          <UEFI_OS_LOADER_NAME desc="UEFI OS loader name.">\\EFI\\BOOT\\bootx64.efi</UEFI_OS_LOADER_NAME>
      </MISC_CFG>
    </hv>
  
    <vm id="0">
      <vm_type desc="Specify the VM type" readonly="true">SOS_VM</vm_type>
      <name desc="Specify the VM name which will be shown in hypervisor console command: vm_list.">ACRN SOS VM</name>
      <guest_flags desc="Select all applicable flags for the VM" multiselect="true">
          <guest_flag>0</guest_flag>
      </guest_flags>
      <clos configurable="0" desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
          <vcpu_clos>0</vcpu_clos>
      </clos>
      <memory>
          <start_hpa configurable="0" desc="The start physical address in host for the VM">0</start_hpa>
          <size configurable="0" desc="The memory size in Bytes for the VM">0x20000000</size>
      </memory>
      <os_config>
          <name desc="Specify the OS name of VM, currently it is not referenced by hypervisor code.">ACRN Service OS</name>
          <kern_type desc="Specify the VM name which will be shown in hypervisor console command: vm_list.">KERNEL_BZIMAGE</kern_type>
          <kern_mod desc="The tag for kernel image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline.">Linux_bzImage</kern_mod>
          <ramdisk_mod desc="The tag for ramdisk image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline."></ramdisk_mod>
          <bootargs configurable="0" desc="Specify kernel boot arguments">SOS_VM_BOOTARGS</bootargs>
      </os_config>
      <vuart id="0">
          <type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
          <base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address." readonly="true">SOS_COM1_BASE</base>
          <irq configurable="0" desc="vCOM1 irq">SOS_COM1_IRQ</irq>
      </vuart>
      <vuart id="1">
          <type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
          <base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">SOS_COM2_BASE</base>
          <irq configurable="0" desc="vCOM2 irq">SOS_COM2_IRQ</irq>
          <target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">2</target_vm_id>
          <target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
      </vuart>
      <pci_devs configurable="0" desc="pci devices list">
          <pci_dev desc="pci device"></pci_dev>
          <pci_dev desc="pci device"></pci_dev>
      </pci_devs>
      <board_private>
          <rootfs desc="rootfs for Linux kernel">/dev/sda3</rootfs>
          <bootargs desc="Specify kernel boot arguments">
          rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3
          i915.nuclear_pageflip=1 hvlog=2M@0xe00000 memmap=0x200000$0xe00000
          </bootargs>
      </board_private>
    </vm>
    <vm id="1">
      <vm_type desc="Specify the VM type" readonly="true">POST_STD_VM</vm_type>
      <guest_flags desc="Select all applicable flags for the VM" multiselect="true">
          <guest_flag>0</guest_flag>
      </guest_flags>
      <cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
          <pcpu_id>1</pcpu_id>
      </cpu_affinity>
      <clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
          <vcpu_clos>0</vcpu_clos>
      </clos>
      <epc_section configurable="0" desc="epc section">
          <base desc="SGX EPC section base, must be page aligned">0</base>
          <size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
      </epc_section>
      <vuart id="0">
          <type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
          <base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
          <irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
      </vuart>
      <vuart id="1">
          <type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
          <base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
          <irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
          <target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
          <target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
      </vuart>
    </vm>
    <vm id="2">
      <vm_type desc="Specify the VM type" readonly="true">POST_RT_VM</vm_type>
      <guest_flags desc="Select all applicable flags for the VM" multiselect="true">
          <guest_flag>0</guest_flag>
      </guest_flags>
      <cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
          <pcpu_id>2</pcpu_id>
          <pcpu_id>3</pcpu_id>
      </cpu_affinity>
      <clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
          <vcpu_clos>0</vcpu_clos>
          <vcpu_clos>0</vcpu_clos>
      </clos>
      <epc_section configurable="0" desc="epc section">
          <base desc="SGX EPC section base, must be page aligned">0</base>
          <size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
      </epc_section>
      <vuart id="0">
          <type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
          <base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
          <irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
      </vuart>
      <vuart id="1">
          <type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
          <base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM2_BASE</base>
          <irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
          <target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
          <target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
      </vuart>
    </vm>
    <vm id="3">
      <vm_type desc="Specify the VM type" readonly="true">POST_STD_VM</vm_type>
      <guest_flags desc="Select all applicable flags for the VM" multiselect="true">
          <guest_flag>0</guest_flag>
      </guest_flags>
      <cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
          <pcpu_id>0</pcpu_id>
          <pcpu_id>1</pcpu_id>
      </cpu_affinity>
      <clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
          <vcpu_clos>0</vcpu_clos>
          <vcpu_clos>0</vcpu_clos>
      </clos>
      <epc_section configurable="0" desc="epc section">
          <base desc="SGX EPC section base, must be page aligned">0</base>
          <size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
      </epc_section>
      <vuart id="0">
          <type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
          <base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
          <irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
      </vuart>
      <vuart id="1">
          <type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
          <base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
          <irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
          <target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
          <target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
      </vuart>
    </vm>
    <vm id="4">
      <vm_type desc="Specify the VM type" readonly="true">POST_STD_VM</vm_type>
      <guest_flags desc="Select all applicable flags for the VM" multiselect="true">
          <guest_flag>0</guest_flag>
      </guest_flags>
      <cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
          <pcpu_id>0</pcpu_id>
          <pcpu_id>1</pcpu_id>
      </cpu_affinity>
      <clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
          <vcpu_clos>0</vcpu_clos>
          <vcpu_clos>0</vcpu_clos>
      </clos>
      <epc_section configurable="0" desc="epc section">
          <base desc="SGX EPC section base, must be page aligned">0</base>
          <size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
      </epc_section>
      <vuart id="0">
          <type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
          <base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
          <irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
      </vuart>
      <vuart id="1">
          <type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
          <base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
          <irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
          <target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
          <target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
      </vuart>
    </vm>
    <vm id="5">
      <vm_type desc="Specify the VM type" readonly="true">POST_STD_VM</vm_type>
      <guest_flags desc="Select all applicable flags for the VM" multiselect="true">
          <guest_flag>0</guest_flag>
      </guest_flags>
      <cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
          <pcpu_id>0</pcpu_id>
          <pcpu_id>1</pcpu_id>
      </cpu_affinity>
      <clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
          <vcpu_clos>0</vcpu_clos>
          <vcpu_clos>0</vcpu_clos>
      </clos>
      <epc_section configurable="0" desc="epc section">
          <base desc="SGX EPC section base, must be page aligned">0</base>
          <size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
      </epc_section>
      <vuart id="0">
          <type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
          <base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
          <irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
      </vuart>
      <vuart id="1">
          <type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
          <base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
          <irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
          <target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
          <target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
      </vuart>
    </vm>
    <vm id="6">
      <vm_type desc="Specify the VM type" readonly="true">POST_STD_VM</vm_type>
      <guest_flags desc="Select all applicable flags for the VM" multiselect="true">
          <guest_flag>0</guest_flag>
      </guest_flags>
      <cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
          <pcpu_id>0</pcpu_id>
          <pcpu_id>1</pcpu_id>
      </cpu_affinity>
      <clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
          <vcpu_clos>0</vcpu_clos>
          <vcpu_clos>0</vcpu_clos>
      </clos>
      <epc_section configurable="0" desc="epc section">
          <base desc="SGX EPC section base, must be page aligned">0</base>
          <size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
      </epc_section>
      <vuart id="0">
          <type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
          <base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
          <irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
      </vuart>
      <vuart id="1">
          <type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
          <base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
          <irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
          <target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
          <target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
      </vuart>
    </vm>
    <vm id="7" configurable="1" desc="specific for Kata">
      <vm_type readonly="true" desc="Specify the VM type">KATA_VM</vm_type>
      <cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
          <pcpu_id>0</pcpu_id>
          <pcpu_id>1</pcpu_id>
      </cpu_affinity>
      <clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
          <vcpu_clos>0</vcpu_clos>
          <vcpu_clos>0</vcpu_clos>
      </clos>
      <epc_section configurable="0" desc="epc section">
          <base desc="SGX EPC section base, must be page aligned">0</base>
          <size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
      </epc_section>
      <vuart id="0">
          <type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
          <base configurable="0" desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
          <irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
      </vuart>
      <vuart id="1">
          <type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
          <base configurable="0" desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
          <irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
          <target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
          <target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">0</target_uart_id>
      </vuart>
    </vm>
  </acrn-config>
  