text: /**
   * This file is part of logisim-evolution.
   *
   * Logisim-evolution is free software: you can redistribute it and/or modify
   * it under the terms of the GNU General Public License as published by the
   * Free Software Foundation, either version 3 of the License, or (at your
   * option) any later version.
   *
   * Logisim-evolution is distributed in the hope that it will be useful, but
   * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   * for more details.
   *
   * You should have received a copy of the GNU General Public License along 
   * with logisim-evolution. If not, see <http://www.gnu.org/licenses/>.
   *
   * Original code by Carl Burch (http://www.cburch.com), 2011.
   * Subsequent modifications by:
   *   + College of the Holy Cross
   *     http://www.holycross.edu
   *   + Haute École Spécialisée Bernoise/Berner Fachhochschule
   *     http://www.bfh.ch
   *   + Haute École du paysage, d'ingénierie et d'architecture de Genève
   *     http://hepia.hesge.ch/
   *   + Haute École d'Ingénierie et de Gestion du Canton de Vaud
   *     http://www.heig-vd.ch/
   */
  
  package com.cburch.logisim.std.io;
  
  import com.cburch.logisim.data.AttributeSet;
  import com.cburch.logisim.fpga.designrulecheck.Netlist;
  import com.cburch.logisim.fpga.designrulecheck.NetlistComponent;
  import com.cburch.logisim.fpga.fpgagui.FPGAReport;
  import com.cburch.logisim.fpga.hdlgenerator.AbstractHDLGeneratorFactory;
  import com.cburch.logisim.fpga.hdlgenerator.HDLGeneratorFactory;
  import java.util.ArrayList;
  
  public class ButtonHDLGeneratorFactory extends AbstractHDLGeneratorFactory {
  
    @Override
    public ArrayList<String> GetInlinedCode(
        Netlist Nets,
        Long ComponentId,
        NetlistComponent ComponentInfo,
        FPGAReport Reporter,
        String CircuitName,
        String HDLType) {
      ArrayList<String> Contents = new ArrayList<String>();
      String Preamble = (HDLType.equals(VHDL)) ? "" : "assign ";
      String AssignOperator = (HDLType.equals(VHDL)) ? " <= " : " = ";
      String OpenBracket = (HDLType.equals(VHDL)) ? "(" : "[";
      String CloseBracket = (HDLType.equals(VHDL)) ? ")" : "]";
      for (int i = 0; i < ComponentInfo.NrOfEnds(); i++) {
        if (ComponentInfo.EndIsConnected(i)) {
          Contents.add(
              "   "
                  + Preamble
                  + GetNetName(ComponentInfo, i, true, HDLType, Nets)
                  + AssignOperator
                  + HDLGeneratorFactory.LocalInputBubbleBusname
                  + OpenBracket
                  + Integer.toString(ComponentInfo.GetLocalBubbleInputStartId() + i)
                  + CloseBracket
                  + ";");
        }
      }
      return Contents;
    }
  
    @Override
    public boolean HDLTargetSupported(String HDLType, AttributeSet attrs) {
      return true;
    }
  
    @Override
    public boolean IsOnlyInlined(String HDLType) {
      return true;
    }
  }
  