AN IMPROVED POWER FEEDBACK POWER FACTOR CORRECTION SCHEME FOR MULTIPLE LAMP OPERATION

Abstract: A ballast circuit for a single or multiple lamp parallel operation where at each lamp a condition may be controlled such that the amplitude of a resonant inductor current and an output voltage are almost constant in the steady state. The inventive circuit consists of a half-bridge of a DC storage capacitor, a DC blocking capacitor, power transistors which alternatively switch on and off and having 50 % duty ratio, and an LLC resonant converter having a resonant inductor and one or more resonant capacitors. The inventive circuit consists of an output transformer providing galvanic isolation for a double path type power feedback scheme. The output magnetizing inductance of the output transformer is utilized for power feedback circuit optimization and as a part of the LLC-resonant tank and is inserted right after the resonant inductor of the half-bridge circuit.

Description: An improved power feedback power factor correction scheme for multiple lamp operation The invention relates to power feedback circuits. More particularly, the invention relates to a double path type power feedback scheme circuit for multiple lamp parallel operation. Description of the Background of the Invention The low power factor (PF) of conventional electromagnetic compact fluorescent lamps (CFLs) is due to the fact that their voltage and current are not in phase and/or to the higher harmonic content in current waveform. Electronics in the electronic CFLs, as well as in all other electronic equipment, generate harmonic currents. Harmonic currents are closely related to a reduced PF and can disturb other equipment. Furthermore, a very high harmonic distortion on a utility network may reduce the performance of the transformers and could ultimately damage them. An electronic CFL has a typical power factor of between 0.5 and 0.6, but the current cannot be simply compensated for with a capacitor. Instead, a filter has to be introduced, either in the ballast of the lamp itself or somewhere in the electricity network. In countries where the International Electroctechnical Commission (TEC) standards are adopted, the lighting equipment must have a power factor better than 0.96 and a Total Harmonic Distortion (THD) below 33%. However an exception is made in the IEC lighting standards for equipment with a rated power of less than 25W. The single stage electronic ballast based on the power feedback principles has been disclosed and described in numerous patents, including U.S. Patent Number 5,404,082 in the names of A. F. Hernandez and G. W. Bruning, and entitled "High Frequency Inverter with Power-line-controlled Frequency Modulation," and U.S. Patent Number 5,410,221 in the names of C. B. Mattas and J.R Bergervoet, and entitled "Lamp Ballast with Frequency Modulated Lamp Frequency,". The type of ballast described in these patents has a lower parts count due to a modulation scheme imbedded in a power conversion process. These patents describe the conversion of a low frequency alternating current (AC) voltage source to a high frequency AC voltage source via a properly designed power feedback scheme. These patents further describe how a harmonic content of an input current can be limited within the International Electrotechnical Commission (IEC) specification while the output current crest factor remains acceptable. Topologically, the single stage power factor correction is achieved based on the power feedback to the node between the full-bridge rectifier output and the DC eleco cap. To date, all of the power feedback schemes are used for a single lamp and a two lamp series configurations, with and without dimming. It is important to point out that in such a class of applications the value of the resonant converter parameters L and C are fixed, even though the load current can be changed during the dimming process. Technically, this implies that the circuit resonant frequency is fixed while the quality factor (Q) is changed with the load. The quality factor Q may be described as the ratio of the resonant frequency to bandwidth. In the multiple lamp operation circuit 10, shown in Figure 1, lamps Rι p are connected in parallel, via ballasting capacitors p , respectively, due to the independent lamp operation (LLO) requirements. Lamps R ]p and blasting capacitors p are then connected in parallel to a transformer T 1 ; which in turn is connected in parallel to a capacitor C 3 . Capacitor C 3 is connected to diodes D 3ι D of the full-bridge rectifier represented by diodes D]-D 4 , and diodes Dι, D 2 are connected to a resonant inductor L \ , which in turn is connected to a diode D 5 . Diode D 5 is further connected to a drain terminal of a transistor Q , and the source terminal of transistor Q 2 is connected to a drain of a PNP transistor Q 3 . Gates of both transistors Qi and Q 2 are connected to a high voltage control integrated circuit 12. A first terminal of a resistor Ri is connected to the source terminal of the transistor Q 3 and with a first terminal of the capacitor C 3, a resistor R 2 and diodes D 3 and D 4 . The high voltage control integrated circuit 12 further connects in the middle of the connection of the source terminal of the transistor Q 3 and a first terminal of the resistor R,, individually to a capacitor C 2j and in the middle of the interconnection of the inductor L 2 and capacitor C3. The capacitor C 2 and the inductor L are serially interconnected. The inductor L 2 is further connected to the capacitor C 3 . A capacitor d is on a first side connected between a diode D 5 and the drain terminal of transistor Q 2 , and on the second side between diodes D 3j D and the resistor Ri. A drain terminal of the transistor Q, is connected in the middle of the inductor Li and the diode D 5 and the source terminal of the transistor Q is connected to a resistor R 2 , which is also connected in the middle of the diodes D 3 and D 4ι and the capacitor Ci . A power factor controller unit 14 is connected to the inductor Li , the gate of the transistor Q , in the middle of the connection of the source terminal of transistor Q and resistor R 2 , and in the middle of the connection of diode D 5 and capacitor Ci. In this configuration the resonant capacitance is strongly load dependent. This dependence with respect to 0 to 4 lamp combinations is shown in Figure 2a, where five distinct resonant frequency curves are charted on a voltage/frequency chart. Here, the zero lamp curve 20 represents a scenario in which no lamps are connected, the one lamp curve 22 represents a scenario in which one lamp is connected, the two lamp curve 24 represents a scenario in which two lamps are connected, the three lamp curve 26 represents a scenario in which three lamps are connected, and finally the four lamp curve 28 represents a scenario in which four lamps are connected. The respective frequency peaks of the curves 22, 24, 26 and 28 are 9.554215xl0 4 , 7.52929xl0 4 , 6.503028xl0 4 , and 5.843909xl0 4 Figure 2b shows the same five distinct resonant frequency curves, charted on a primary side resonant tank input phase/frequency chart. In this graph, the zero lamp curve 30 reaches a low phase point of -90, the one lamp curve 32 reaches a low phase point of - 23.360583, the two lamp curve 34 reaches a low phase point of -14.71952, and the three lamp curve 36 reaches a low phase point of -5.566823. Traditionally, the power feedback power factor correction circuits are limited to a fixed load operation. When the load changes, the input line power factor and current THD performance drop. Even more severe situation is that the DC bus voltage increases dramatically as the load decreases. Such DC bus voltage over boost usually leads to the damage of power switches if they are not substantially over designed. This problem is encountered during the development of a power feedback circuit for four lamp ballast circuits. In view of those variables and the sinusoidal input voltage, it would be advantageous to have a simple single stage electronic ballast circuit based on the power feedback scheme for multiple lamp operation. The ballast circuit of the invention is designed for a single or multiple lamp parallel operation, where at each lamp a condition may be controlled such that the amplitude output voltage are almost constant in the steady state. The present invention uses fewer high ripple current rated capacitors than the prior art while providing galvanic isolation. Furthermore, in addition to using smaller input filter sizes, the inventive circuit uses fewer fast reverse recovery diodes necessary for the prior art circuit schemes. In order for the inventive power feedback circuit to work with multiple lamp combinations under variable load conditions and without severe DC bus voltage over boost, the resonant tank is designed with an LLC type instead of the previously used LC type. Accordingly, the circuit switching frequency is changed for each lamp number condition. When a lamp number condition is settled, the circuit operates at a selected frequency without line frequency modulation content. The circuit of the invention comprises a DC storage capacitor, a DC blocking capacitor, a half-bridge of power transistors which alternatively switch on and off and having 50% duty ratio, and an LLC resonant converter having a resonant inductor, a output transformer, and one or more effective resonant capacitors. The circuit comprises an output transformer, which provides galvanic isolation for a double path type power feedback scheme. The output transformer produces magnetizing inductance utilized for power feedback circuit optimization and is inserted right after the resonant inductor of the half- bridge circuit. Furthermore, the circuit of the invention comprises an input line filter having an inductor and a capacitor for bringing an input current close to a sinusoidal waveform with low THD, a current rectifier comprising a plurality of diodes, a plurality of fast reverse recovery diodes, and a plurality of ballasting capacitors that contribute to a resonant capacitance and allows the use of fewer capacitors in the half-bridge circuit. The foregoing objects and advantages of the present invention may be more readily understood by one skilled in the art with reference being had to the following detailed description of a preferred embodiment thereof, taken in conjunction with the accompanying drawings wherein like elements are designated by identical reference numerals throughout the several views, and in which: Figure 1 is a schematic representation of parallel connection of multiple lamps via ballasting capacitors of the prior art, where resonant capacitance is strongly load dependent. Figure 2a is a chart showing voltage/frequency dependence for each of zero to four lamp combinations. Figure 2b is a primary side resonant tank input phase/frequency chart showing the dependence with respect to zero to four lamp combinations. Figure 3 is a schematic representation of the inventive ballast circuit. Figure 4 is a schematic representation of a simplified version of the inventive ballast circuit adapted for equivalent circuit load. Figure 5 is a schematic representation of a prior art circuit adapted for a single lamp application. Figure 6 is a schematic representation of another prior art circuit adapted for a single lamp application. Figures 7a, b and c are each a schematic representation of an equivalent inventive circuit where the amplitude of the resonant inductor current and the output voltage are almost constant in the steady state. Figures 8-11 are input and output voltage/frequency oscilloscope waveform charts for typical inventive circuit, showing the dependence with respect to one, two, three and four lamps. Figure 12 is a voltage, current/time oscilloscope waveform charts showing a set of switching waveforms of the inventive circuit shown in Figure 4 with respect to eight intervals depicted in Figures 13a-h. Figures 13a-h are each a schematic representation of an equivalent inventive circuit where the amplitude of the resonant inductor current and the output voltage vary in accordance with time intervals. Figure 3 shows the ballast circuit 40 of the present invention. The input terminal 44 of the circuit 40 is connected to a resonant inductor Lj, which is connected between diodes D 3 and Di of the full-bridge rectifier, represented by diodes D].D 4 . A capacitor Ci is connected between the resonant inductor L] and that inductor's connection to diodes D 3 and Di, and to the input terminal 45. The input terminal 45 further connects between diodes D and D 2 . Diodes Di, D 2 are connected to a diode D 5 , which is connected to a diode D 6 . The diode D 6 is in turn connected to a capacitor C 10 that is connected to a resonant sink circuit 42. The resonant sink circuit 42 comprises the transformer Ti connected on one side to inductor L 2 , which in turn is connected to a capacitor C 3> which is connected to the transistor Q . The transistor Q connects to the diode D , which connects to the second terminal of the transformer A capacitor C is connected between diodes D 5 and D on one side and between the transformer Tj and the inductor L 2 on the other side. A transistor Qi is connected to between the diode D 6 and the capacitor Cio on one side and the capacitor C 3 and the transistor Q 2 on the other side. A capacitor C 8 is connected to each terminal of the diode D . Each lamp Rψ of the multi lamp unit 46 is connected in series to capacitors C 4 .C 7 , and the lamp unit is then connected to the transformer Tj . Finally, the terminal of the transformer Ti that is connected to the diode D 7 is also connected to diodes D 3ι D . The simplified version of the circuit 40 adapted for the single lamp application is shown in Figure 4 and will be described below. The circuit 40 of the present invention uses fewer high ripple current rated capacitors than the prior art circuits shown in Figures 5 and 6, while providing galvanic isolation. One resonant inductor is contributed by the magnetizing inductance of the input transformer. By doing so, there is no need for an additional resonant inductor other than L 2 (Figure 3). With a properly designed LLC type resonant tank, the lamp current crest factor is improved without using the C y ι (Figure 5) which must be used in the prior art circuit 17 (Figure 5). Because the lamp ballasting capacitor may also act as a part of resonant capacitor, C p (Figure 5) can also be removed. Furthermore, in addition to using smaller input filter sizes, the inventive circuit uses fewer fast reverse recovery diodes 18 (Figure 6) necessary for the prior art circuit schemes, e.g., circuit 16 (Figure 6). More importantly, the inventive circuit may be used for multiple lamp operation such as 4-lamp operation. With reference to Figure 3, to achieve the above benefits the inverter circuit 40 includes a half-bridge with a LLC resonant converter. The half-bridge includes two power Metal-Oxide-Silicon Field-Effect Transistors (MOSFETs) Q, and Q 2 , the DC storage capacitor Cio and the DC blocking capacitor C 3 . One resonant inductor is L 2 . The resonant capacitors include capacitors C 2 , C 8 , and the equivalent capacitance of that circuit reflected by the load. The galvanic isolation transformer Ti is disposed between the resonant inductor L 2 and the diode D to create a proper load matching. Additionally, the magnetizing inductance of the isolation transformer contributes to the resonant tank with additional inductance. The difference between a single path type power feedback scheme and a double path type power feedback scheme is that in each high frequency switching cycle the full-bridge rectifier, represented by diodes Dι_D , conducts once for the single path type and twice for the double path type power feedback scheme. For the same power delivery capability, the double path type power feedback scheme has fewer current stresses in the resonant tank circuit 42. The resonant components are designed to set the resonant frequencies under certain operation conditions for each of the load cases. In order to achieve LLO, the voltage gain curves should reach and exceed certain required voltage levels, which are preferred to be kept almost constant at the multi lamp unit 46 via proper control. The invention further employs fast reverse recovery diodes D 5- D 7 . Figure 8a shows a square waveform curve 80 of voltage V gs (Figure 3) used to drive the lower power switch Q 2 (Figure 3). By alternatively switching power switches Q (Figure 3) and Q 2 (Figure 3) on and off with 50% duty ratio, the voltage V s (Figure 3) has a peak-to-peak amplitude V dc (Figure 3). Such voltage excites the resonant tank circuit 42 (Figure 3) and results in the input current i Lr (t) 15 (Figure 3) represented by the i Lr curve 82. Due to the resonant tank circuit 42 (Figure 3), the V p curve 84 of voltage V p (Figure 3) at point p (Figure 3) and the Vn curve 86 of voltage V n (Figure 3) at point n (Figure 3) are close to the sinusoidal waveform. Furthermore at each of the plurality of lamps, e.g., 1, 2, 3 and 4, a condition may be controlled such that the amplitude of the resonant inductor current i Lr (t) and the output voltage V 0 (t) (Figure 3) are almost constant in the steady state. With this condition, the high frequency operation of the inventive circuit may be described by components of an equivalent circuit as shown in Figures 7a. In that circuit the resonant inductor current is modeled as an ideal current source I Γ and the output voltage is reflected to the primary side and modeled as an ideal voltage source V pn . Further, the power feedback circuit 70 can be decomposed into two simpler power feedback circuits 72 and 74 (Figures 7b, c). In the first, high frequency circuit 72 (Figure 7b), as compared to the input line frequency, the voltage source V pn modulates the voltage at point m via the charging capacitor C 2 . This modulation causes the input current i (t) (Figure 7b) to be sinusoidaly shaped as represented by the curve 88 (Figure 8b). In the second circuit 74 (Figure 7c), the current source Ii r 15 charges/discharges the capacitor C 8 and shares the input current accordingly. It is important to note that there is a phase difference between the signals V pn (t) and Iu-(t). It is this phase difference that allows the rectifier circuit Dι.D to conduct current twice, makes the circuit 70 the double path type power feedback circuit. In each high frequency cycle, the double path type power feedback circuit 70 generates two small current pulses in the input line. The envelope of these small pulses follows a pseudo-sinusoidal shape. By using proper input line filter, for example the inductor Li and the capacitor d, the input current will become close to the sinusoidal waveform with a low THD, as represented by the curve 88 (Figure 8b). Figures 8-11 show the high frequency oscilloscope waveform curves representing voltages at different points in the circuit 40 (Figure 3). Specifically, Figures 8a, 9a, 10a, and 11a show the following waveform curves for the one, two, three, and four lamp configurations respectively: The gate dπve waveform curve 80 showing V gs (t) for the switch Q 2 (Figure 3); The resonant inductor current curve 82 for the current i) .(t) (Figure 3), The voltage waveform curve 84 for voltage V p (t) at point p 16 (Figure 3), and The voltage waveform curve 86 for voltage V n (t) at point n (Figure 3) Similarly, Figures 8b, 9b, 10b, and lib show the waveform curves 88 for the input line current I m (Figure 3); 90 for the output lamp current I lamp (Figure 3); 92 for the input voltage V ιn (Figure 3); and 94 for the voltage V dc (Figure 3), in a low frequency scale for the one, two, three, and four lamp configurations respectively As a further explanation, with reference to Figure 4, please consider the following functional descπption of a specific simplified embodiment circuit 50 of the present invention. By varying values of Ri and , all four lamp load states may be accounted for For example, if Ri and denote the equivalent impedance of one lamp and its associated ballasted capacitance, then for n-number of lamps the equivalent impedance becomes Rj/n and the equivalent seπes ballasting capacitance becomes n The input line voltage V m is a rectified sinusoidal waveform Because the line frequency, e.g., 60 Hz, is much lower than the circuit switching frequency, e.g , 43 kHz, the input line voltage V ln is assumed to be constant in high frequency cycles. Furthermore, a DC bus voltage πpple may be ignored due to the large capacitance of Cio With above assumptions, eight equivalent topological stages in each high frequency switching cycle may now be identified Switching waveforms of the circuit 50 having eight equivalent topological stages corresponding to time intervals [t j , . ( , +! )], where j=0,D,7, are presented in Figure 12. These equivalent topological stages are discussed below with the aid of Figures 13a-h Figure 13a shows the equivalent circuit duπng the first interval [to, ti] Starting from t 0 , both diodes D 5 and D 6 conduct current I s and I d6 , as shown by graphs 92 and 94 (Figure 12) respectively, however no charging current reaches the capacitor Cio (Figure 4) because diode D 7 (Figure 4) is off . Moreover, the capacitor C 8 (Figure 4) is prevented from being further charged. Duπng that interval, the line voltage source V delivers power directly to the load via loop II 100, while the resonant tank circuit 42 operates in a free wheeling mode in loop I 102. The current in the capacitor C 2 is the difference between the resonant tank 42 current I L in loop 1 102 shown as a graph 98 (Figure 12) and the input line current I DS in loop II 100 shown as a graph 98 (Figure 12) While the current i L is still in free wheeling state with the current direction indicated by loop 1 102, the MOSFET Qi is turned off 90 (Figure 12a), as shown in Figure 13b, during the interval [ , t 2 ], and the current is diverted to the MOSFET Q 2 . Please note that the MOSFET Q 2 may be turned on with zero voltage switching. With the charging of the DC bulk capacitor Cio via loop 1 104, the current i L in the resonant inductor L 2 , shown as the graph 98 (Figure 12), gradually diminishes to zero. When the zero point is reached, diode D is naturally turned off 94 (Figure 12) and the second interval [ti, t 2 ] terminates. Following the switch off 94 (Figure 12) of the diode D 6 during the third interval [t , t 3 ] shown in Figure 13c, the resonant inductor current i L , shown as the graph 98 (Figure 12), indicated by loop I 106, reverses direction and increases with the discharging of the capacitor C g . During this interval, along with further discharging of the capacitor C 8 , the voltage V p continuously drops, as shown by a graph 250 (Figure 12). This drop is followed by continuous charging of the capacitor C 2 while the line voltage source N, n delivers power directly to the load. After the voltage V n across the capacitor C 8 drops to zero 248 (Figure 12), as is shown in Figure 13d, the diode D 7 begins conducting current. During this, fourth interval [t 3 , t ], the resonant tank 42 current I L , shown as the graph 98 (Figure 12), in loop I 108 is further increased with the resonant frequency shown as a graph 240 (Figure 12) determined by the inductor L 2 , the capacitor C 8 (Figure 4), the capacitor , and the resistor Ri, turns ratio n and the magnetizing inductance L m of the output transformer. In the meantime, the current in the diode D 5 starts decreasing from its peak value, that is because voltage V p falls below zero, as shown in the graph 250 (Figure 12) and goes in to a negative swing. Figure 13e shows the resonant tank current I L flowing in loop 1 110 during the fifth interval [t , t 5 ]. At t , the MOSFET Q 2 is switched off. During this interval, the MOSFET Qi is turned on, as shown as a graph 120 (Figure 12a), which may be achieved with zero voltage switching (ZVS). As time reaches . 5 , the voltage V p reaches its minimum value, as shown in the graph 140 (Figure 12b) and the input current I D s approaches zero, as shown in a graph 122 (Figure 12a). With the upswing of the voltage V p , as shown in the graph 140 (Figure 12b), the voltage V m increases correspondingly, as shown in the graph 132 (Figure 12b), because C 2 is not being charged or discharged. At the same, as shown in Figure 13f, during the sixth time interval [t 5 , t ], the resonant inductor current I L is reduced to zero, as shown in the graph 128 (Figure 12a), and the diode D 7 stops conducting. When the voltage V m , as shown in the graph 132 (Figure 12b), is greater than the voltage V dc , during the seventh interval [t 6 , t ] as shown in Figure 13g, the diode D 6 begins conducting current, as shown in the graph 124 (Figure 12a),. Momentarily, the diode D 7 is switched on to help the voltage V m to charge the capacitor Cio via loop 1 112. At the same time the capacitor C 2 begins discharging to transfer the energy stored in the capacitor C 2 into the resonant inductor current i^ i.e., the electromagnetic energy. The current iL is then gradually built up from zero, as shown in the graph 128 (Figure 12a). While the capacitor C 2 is continuously discharging via loop II 114, during eighth interval [t 7 , t 8 ], shown in Figure 13h, the capacitor C 8 begins to charge via the loop I 112 with the DC bus capacitor Cio providing the charging current through a load branch. As a result, the voltage V p increases, as shown in the graph 140 (Figure 12b), and the voltage V m is kept greater than V dc , as shown in the graph 132 (Figure 12b). While the equivalent circuit 50 (Figure 4) holds true for each operating point of the sinusoidal input line voltage, the waveforms in Figures 12a, 12b and operating intervals in Figures 13a-h are shown for one typical operating point which may be around 80% of the input line peak voltage. At other operating points, the duration of each interval and even the number of intervals may vary; however, the circuit operating principles will remain the same. In each high frequency switching cycle from to to t 8 , there are two sections [to, t 2 ] and [t , t 5 ], where the circuit draws two current pulses from the line. The peak value of the pulses is low compared with a single pulse case of single path power feedback schemes. As a result, the resonant tank current is smaller and the associated losses are also smaller. While the invention has been particularly shown and described with respect to illustrative and preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departing from the spirit and scope of the invention that should be limited only by the scope of the appended claims.

Claims: CLAIMS: 1. Circuit arrangement for operating at least two lamps in parallel comprising - input terminals (44, 45) for connection to a supply voltage source that supplies a low frequency AC voltage, - rectifying means (D1-D4) coupled with the input terminals for rectifying the low frequency AC voltage, - buffer capacitor means (CIO) coupled to output terminals of the rectifying means, - a resonant inverter for generating a high frequency lamp current coupled to the buffer capacitor means and equipped with - at least one switching element (QI, Q2), - a control circuit coupled to a control electrode of the switching element for rendering the switching element alternately conducting and non-conducting, - a load circuit coupled to the switching element and comprising a resonant inductor (L2) and a resonant capacitor (C3), - power feedback means (D5, D6, D7, C2, C8) for drawing a current from the supply voltage source during a time interval in each period of the high frequency lamp current, characterized in that the load circuit further comprises a transformer (TI) having magnetizing inductance and comprising a primary winding and a secondary winding that is shunted by at least two series arrangements each comprising terminals for lamp connection and a lamp capacitor (C4, C5, C6, C7). 2. Circuit arrangement as in claim 1, wherein the resonant inverter is a half bridge circuit comprising two switching elements (QI, Q2). 3. Circuit arrangement as in claim 2, wherein the load circuit comprises a series arrangement that shunts one of the switching elements and comprises the resonant inductor (L2), the resonant capacitor (C3) and the primary winding of the transformer (TI). 4. Circuit arrangement as in claim 1, 2 or 3, wherein the power feedback means comprises a first unidirectional element (D6), coupled between a first output terminal of the rectifier and the buffer capacitor means (CIO), and a first circuit part (C2) connecting a first terminal m between the first output terminal of the rectifier and the first unidirectional element with a second terminal p in the load circuit. 5. Circuit aπangement as in claim 4, wherein the first circuit part comprises a first power feed back capacitor (C2). 6. Circuit arrangement as in claim 4 or 5, wherein the power feedback means comprises a second unidirectional element (D5) coupled between the first output terminal of the rectifier and the first terminal m. 7. Circuit arrangement as in claims 3 and 4, wherein the power feedback means comprises a third unidirectional element (D7) that is part of the series arrangement shunting one of the switching elements. 8. Circuit arrangement as in claim 7, wherein the third unidirectional element (D7) is shunted by a second circuit part (C8) comprising a second power feedback capacitor (C8).

Inventors: CHANG CHIN, CHANG, CHIN
Applicants: KONINKL PHILIPS ELECTRONICS NV, KONINKLIJKE PHILIPS ELECTRONICS N.V.
Application year: 2001
Main classification: H05B41
IPC codes: H05B41