Method of converting digital data

Abstract: The application presents a coding method for coding n-bit information words into m-bit codewords, e.g. 8/15-conversion. The m-bit codewords satisfy maximum and minimum run length constraints (d,k)=(2,10). Codewords are grouped in blocks of 3 to 7 bytes and three merging bits are inserted between blocks to minimize the running digital sum value (RDS) of the resulting data stream. The merging bits as are determined based on the RDS of the previous and next block of codewords.

Description: BACKGROUND OF THE INVENTION 1. Field of the invention The present invention relates to a method of modulation and demodulation for recording digital data to a recording or reproducing medium that can record or reproduce the digital data. In particular, the present invention relates to a method of data conversion suitable for recording the digital data to an optical record medium in high or low density, a method of record reproduction using the same, and an optical record medium recorded with the modulated data. 2. Description of the prior art A method of EFM (8/17 modulation) coding is provided as a method for recording digital data through encoding. A method of digital data modulation such as EFM or EFM plus is applied to record data, in particular, to an optical record medium or disk including CD, CD-R, CD-RW, DVD and so on. In recording the digital data to a recording medium such as optical record medium, a recording capacity is an important item to be considered. In other words, since the same disk can contain more information when information is recorded in high density, a recording density of digital data is determined according to the method of modulation. The EFM code in use for recording the digital data on a CD-type optical record medium has a Run Length Limited (RLL), in which d is 2 and k is 10, and a code rate corresponding to R=8/17. Referring to a coding method using the EFM code, an eight bit source code is converted to a fourteen bit d-restraint code word, which is attached with a three bit merging word. The three bit merging word is selected by an encoder to satisfy the minimum and maximum run lengths, the inherent codes for satisfying the maximum and minimum run lengths are not uniquely determined. Further, the merging word is selected so that power density is minimized in low frequency. US-A-5 151 699 discloses a data converting apparatus, which inserts DC control bits in an input data series to generate a redundant data series. Each DC control bit consists of bits. The apparatus determines the value of the DC control bits in such a way as to minimize the DC component of an output code series, which is obtained by subjecting the redundant data series to code conversion. The apparatus performs code conversion after inserting the determined DC control bits. Fig. 1 shows an example of a merging processor, in which eight user data bits are converted to fourteen channel bits using a look-up table, and to the end of the fourteen bits is attached with a merging bit satisfying three run length limitations. Since two zeros are necessarily present between two ones, '0' is necessarily present in the first merging bit position in the foregoing situation. Therefore, the merging bits can exist in three cases such as 000, 010 and 001. In this case, the encoder is adapted to select a merging bit having the lowest absolute value for a Running Digital Sum (RDS) at the end of a new code word, and accordingly 000 in the above situation. In an experiment about CD, when only two merging bits are used, compression of low frequency components (DC compression) is not sufficiently efficient. Therefore, when the number of merging bits is increased to three, margin of transition setting or omission in the merging bits is increased more. In general, a good method of compression about the low frequency components by a compensated merging method without providing a certain standard about a CD system. For example, compression can be executed through a look-ahead method since the minimization about the low frequency components in a short term does not always influence the minimization in a longer term. In this case, it is reported that performance improvement of 6 to 10dB is obtained. Meanwhile, the EFM plus code used in DVDs is a sliding block code capable of restraining the low frequency components in which the code rate is 8/16 and the RLL is (2, 10). The EFM plus code, which has the code rate higher than the previous EFM code about 6% as an advantage, is re-designed from the EFM code by replacing the 8/17 code rate with the 8/16 code rate and has the two merging bits instead of the merging bits of three bit. As described hereinbefore, the CD, CD-ROM, CD-V and the like are proposed as very successful media for storing MPEG video data and other various digital information. However, the storage capacity of about 680 Mbytes is not sufficient for the operation of a graphic-based computer or to store high-definition digital video programs. A DVD, which can be an expansion of the CDs, is a novel optical record medium with a storage capacity of at least 7 times of a typical CD. The increase of storage capacity is made through the quality elevation of a light source and an object lens. Besides, the storage capacity of the DVD is increased by totally re-designing a logical mode of the disk through use of more enhanced RS-PC and a record code called the EFM plus, in which the EFM plus has a code rate of 8/16 with (d,k)=(2,10) and is constituted by sliding-block codes for restraining low-frequency components. As described above, the code rate and the DC compression are very important factors in the high-density record of data and the reliability thereof when recording the digital data to the record medium, for example the optical record medium, and accordingly more various and improved methods are continuously required to satisfy the factors. SUMMARY OF INVENTION Accordingly, the present invention has been made to solve the foregoing problems of the related art. BRIEF DESCRIPTION OF THE DRAWINGS The objects, features and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings, in which: Fig. 1 illustrates a merging process in the EFM coding; Fig. 2 is a block diagram for illustrating a method of digital data modulation according to the invention; Fig. 3 is a graph for showing a DC compression when the unit m of one block is varied from 3 to 7 according to the invention; and Figs. 4A to 4F show digital data modulation code tables according to the invention. DETAILED DESCRIPTION OF THE INVENTION A method of converting digital data of the invention comprises the steps as specified in claim 1. Preferred embodiments are specified as subject matter of the dependent claims. A method of recording and reproducing digital data of the invention comprises the steps as specified in claim 5. Hereinafter more detailed description will be made for embodiments of the invention in reference to the accompanying drawings. Fig. 2 is a block diagram for illustrating a method of digital data modulation of the invention. First, merging bits are added in block unit in the invention, in which the blocks are defined as follows. In defining one input data block 201, m bytes are bound as one unit block. Herein, m means an input data bundle of at least 2 bytes, preferably 3 to 7 bytes. Each byte of the input data block is inputted into a modulation encoder 202 and encoded into a code word of 15 bit length by using an 8/15 conversion table (refer to Fig. 4). The result of encoding forms a data block of m X 15bit length (kth block). The 8/15 conversion table is used to convert the input data, in which the 8/15 conversion table is constituted to have the value of RDS variation as small as possible. As described before, Running Digital Sum 1 (RDS1) of the kth block is produced simultaneously with encoding each byte of the input data block. A merging bit selector 203 compares RDS1 of the kth block like this to RDS0 of the k-lth block to select the merging bit. In other words, when the kth block is produced in comparing RDS1 of the kth block to RDS0 of the k-lth block, the merging bit is selected from 000, 001, 010 and 100 so that RDS has the minimum value while the RLL does not violate run-length constraints. In this case, a merging bit of three bit is used, which is selected taking account of the RDSs of the present block and the next block. The encoded kth block is outputted (204) after previously outputting the merging bit selected like this, and simultaneously RDS0 up to the kth block is updated to prepare merging bit selection of the k+1th block. A series of processes like this are repeated to obtain modulated digital data. The modulated digital data are modulated in such a manner that the input data are bound to blocks with the minimum two bytes in unit, and a merging bit is added in a channel data block unit corresponding to each of the input blocks. In this case, the input data can be bound in three to seven byte unit to execute a merging process in block unit. Then, a modulation code having 0.5 to 0.5185 code rate can be obtained according to the block size (3 to 7 bytes) of the input data. Fig. 3 shows a DC control ability when varying the unit m of one block from three to seven. This shows a result (45:3 merging) in which the three bit input (24 bits) is 8/15 modulation-coded (45 bits) and then added with the merging bit, and the ability is -32dB at the frequency of 0.0001f c . Figs. 4A to 4F show an example of the 8/15(2,15) modulation table used in the method of digital data modulation of the invention, in which one conversion table is used for 256 inputs (1 byte) with a status number of four. As described before, the merging bit is added in block unit in modulating the digital data thereby incurring improvement of the DC compression ability and the code rate. When the merging bit is added in block unit in modulating the digital data, one block is preferably constituted by binding three to seven bytes. Therefore, the block is necessarily defined in byte number suitable for the environment of data processing. When an information expressing the number of bytes constituting one block or the number of data constituting a unit block of the added merging bits is recorded together in recording the modulation data, a merging process and a data decoding can be executed correctly for a corresponding block in decoding by using this recorded information. In other words, when the digital data are recorded through modulation encoding, n (n is an integer at least 2, for example 3 to 7) byte unit of process data or information is recorded together, a decoder can judge how many bytes constitute a corresponding block by using the information in block unit and accordingly perform data decoding and reproduction suitable thereto. According to the present invention as described hereinbefore, several input data are bound to define the block unit and the method of adding the merging bits in block unit is used in modulation of the digital data thereby improving the code rate and DC compression ability. - According to the method of data modulation of the invention, the modulated code of the 0.5 to 0.5185 code rate can be obtained according to the block size (3 to 7 bytes) of the input data. While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the invention.

Claims: A method of converting digital data, comprising the steps of: binding input digital data into unit blocks constituted by a plurality of bytes; modulation-coding each byte of the input data blocks by using a code conversion table; characterized by the further steps of producing an RDS (RDS1) for each encoded block, allocating three merging bits for a present block by evaluating the RDS (RDS1) of the present block and the RDS (RDS0) of the previous block for selection of the merging bits, wherein the RDS (RDS1) of the present block is compared to the RDS (RDS0) of the previous block to select the merging bits, so that the RDS of the present block has the minimum value without violating RLL restraints when the present input data block is produced, and outputting firstly the merging bits and secondly the present block. The method of claim 1, characterized in, that each of the input data blocks is constituted by binding three to seven bytes. The method of claim 1 or 2, characterized in, that 8/15 modulation-coding is performed. The method of one of the preceding claims, characterized in, that simultaneously to outputting the merging bits and the present block the RDS is updated to prepare merging bit selection of the next block. A method of recording and reproducing digital data employing the method of converting digital data of one of the preceding claims, characterized by the further steps of recording a byte-unit information expressing the number of the bytes constituting each of the data blocks together with data added with the merging bits after modulation-encoding; and performing data decoding for the corresponding block by using the recorded byte-unit information. The method of claim 5, characterized in, that each of the input data blocks is modulation-coded and decoded in the unit of three to seven bytes. The method of claim 5 or 6, characterized in, that the merging bits are selected from the merging bits of three bit so that the RDS value may be minimum while not violating the RLL restraints.

Inventors: LEE BO HYUNG, LEE JAE JIN, LEE JOO HYUN, SON HEUI GI, LEE, BO HYUNG, LEE, JAE JIN, LEE, JOO HYUN, SON, HEUI GI
Applicants: LG ELECTRONICS INC, LG ELECTRONICS INC.
Application year: 2001
Main classification: H03M5
IPC codes: G11B20, H03M7, H03M5