AN ACCURATE POWER DETECTION CIRCUIT FOR USE IN A POWER AMPLIFIER

Abstract: A power amplifier circuit for amplifying an input signal includes an amplifying transistor and a power detection circuit. The power detection circuit includes a circuit for generating a signal which is directly proportional to the power level in the amplifying transistor. This may be accomplished by generating a voltage proportional to the square of a current in the amplifying transistor and then averaging that voltage. In this manner, a more accurate indication of the power level in the amplifying transistor is obtained.

Description: An accurate power detection circuit for use in a power amplifier BACKGROUND OF THE INVENTION The invention is in the field of transistor amplifier circuits, and relates more particularly to power amplifier circuits and power detection circuits for such power amplifier circuits Amplifiers of this general type are frequently used m high-frequency RF amplifiers, such as those used in wireless communications apparatus, as well as in audio amplifiers and other applications In such amplifiers, particularly when used in RF applications, it is desirable to provide an indication of the power in the output stage In the pπor art, this function is typically accomplished by one of two techniques First, a directional coupler or voltage divider may be provided at the output of the power amplifier to sense a fraction of the signal applied to the load, and this sample signal is then used to indicate the power in the load The second technique used in the pπor art generates a sample of the current in the power amplifier by using a smaller transistor in parallel with the power transistor The sample current is then fed off-chip, where it is averaged and used to provide an approximate indication of the power in the load However, there are various drawbacks inherent in the prior-art solutions Thus, for example, directional couplers are bulky and lossy, resistive dividers are inefficient, and using a current sample as a measure of output power is relatively inaccurate Accordingly, it would be desirable to have a power detection circuit for a power amplifier circuit which is compact, efficient, easy to implement, and more accurate than prior-art power detection circuits SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a power detection circuit for use in a power amplifier circuit which is compact and efficient m design, easy to implement, and which provides a more accurate indication of amplifier power than pπor- art circuits In accordance with the invention, these objects are achieved by a new power detection circuit for use in a power amplifier circuit having an amplifying transistor, in which the power detection circuit includes a circuit for generating a signal which is directl) proportional to a power level in the amplifying transistor In a preferred embodiment of the invention, this is done by providing a circuit for generating a voltage proportional to the square of a current in the amplifying transistor and averaging this voltage to provide an indication of this power level in the amplifying transistor In a further preferred embodiment of the invention, a wireless communications device having an RF power amplifier circuit is provided with a power detection circuit for generating a signal which is directly proportional to the power level in the amplifying transistor In further preferred embodiments of the invention, the power detection circuit may be implemented using a simple MOS transistor configuration, or a trans near circuit using bipolar transistors which is more complex than the MOS circuit but which provides greater accuracy A power detection circuit in accordance with the present invention offers a significant improvement in that a particularly advantageous combination of features, including a compact and efficient design, and more accurate performance, can be obtained in an economical and easily-implemented configuration These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments descπbed hereinafter BRIEF DESCRIPTION OF THE DRAWING The invention may be more completely understood with reference to the following descπption, to be read in conjunction with the accompanying drawing, in which Fig 1 shows a simplified partially-block and partially-schematic diagram of a power amplifier circuit having a power detection circuit in accordance with the invention, Fig 2 shows a simplified schematic diagram of a power detection circuit in accordance with a first embodiment of the invention, and Fig 3 shows a schematic diagram of a power detection circuit in accordance with a second embodiment of the invention In the drawing, like reference numerals are generally used to designate like components DESCRIPTION OF THE PREFERRED EMBODIMENTS A power amplifier circuit 10 for amplifying an input signal NiN at an input terminal 12 is shown in simplified partially-block and partially-schematic form m Fig 1 The power amplifier circuit includes an amplifying transistor 14 for amplifying the input signal NiN provided to the base of the transistor 14 from the input terminal 12 through an input matching network 16 It should be noted that the power amplifier circuit may be used in vaπous applications, such as audio amplification, or RF amplification in such areas as wireless communication and internet connection, so that the input signal VIN may be either an audio or RF input signal The power amplifying transistor 14 is biased from the power supply voltage Vcc by a bias network 18 It is to be understood that circuit portions such as input matching network 16 and bias network 18 which are shown in block-diagram form can be implemented by vaπous known circuit configurations familiar to those of ordinary skill in this art, and are accordingly not descπbed in further detail herein The output circuit of power amplifier 10 is shown in simplified form as including a collector resistor 20 and an output matching network 22 for providing an output voltage Nouτ at output terminal 24 to supply power to a load symbolically illustrated by resistor 26 In accordance with the invention, a proportional sample of the current in the power amplifier transistor 14 is obtained by using a smaller transistor 28 having its base- emitter circuit connected in parallel with that of the power amplifying transistor 14 However, unlike pπor-art circuits, which utilize the output of transistor 28 directly to obtain a relatively inaccurate measure of power, the present invention uses a squaπng and averaging circuit 30, having its input coupled to the output of transistor 28, in order to generate a voltage which is proportional to the square of the current in sensing transistor 28, and then averaging this voltage Circuit 30 generates an output signal VDET at terminal 32 which is directly proportional to the power level in the amplifying transistor 14 and which is a substantially more accurate representation of this power level than can be obtained using the pπor-art technique, since the power level is proportional to the mean square of the current level in the amplifying transistor This technique permits the implementation of a power detection circuit which can be integrated on the same die as the power amplifier circuit and which can generate a voltage which is an accurate representation of the power in the amplifying transistor in a relatively simple manner A particularly simple and compact MOS implementation of the squaπng and averaging circuit 30 is shown in Fig 2 In this figure, sense transistor 28 has a base connection (as shown by the vertical dashed line) to the base of transistor 14, as shown more fully in Fig 1, and has its collector coupled to Vcc by a seπes connection of a resistor 34 and a diode-connected PMOS 36 The collector of sense transistor 28 is also coupled to the gate of a second PMOS transistor 38, with transistor 36 serving to generate a threshold voltage for transistor 38 and the current through resistor 34 generating a voltage applied to the gate of transistor 38 to generate a squared current in transistor 38 This squared current is passed through resistor 40 to generate a detector output voltage VDET at terminal 32 which is directly proportional to the power level in the amphfying transistor In order to provide the averaging function in circuit 30, a capacitor 42 is provided in parallel with resistor 40 to form a simple RC averaging circuit, so that the detector output voltage VDET IS an averaged signal which accurately represents the power level in the amplifying transistor It is to be understood, however, that other types of known averaging circuits may be employed A second embodiment of the power detection circuit, using a bipolar implementation with a transhnear circuit, is shown in Fig 3 This embodiment is less compact and more complex than the embodiment of Fig 2, but offers the additional advantage of still greater accuracy In this embodiment, sense transistor 28 has its base connected as in Figs 1 and 2, and has its collector coupled to a current mirror composed of bipolar transistors 44 and 46 connected in a conventional current-mirror configuration The collector of transistor 46 is connected both to a seπes connection of diodes 48 and 50 and to the base of transistor 52 The emitter of transistor 52 is connected to the base of transistor 54 and to the collector of transistor 56, which, in combination with transistor 58 and current source 60, forms a second current mirror Within the circuit as so far descπbed, diodes 48 and 50 and transistors 52 and 54 form a transhnear circuit configuration in which the sum of the voltages across the two diodes is equal to the sum of the voltages across the two base-emitter junctions of transistors 52 and 54, and in which the product of the currents m the two transistors is equal to the product of the current in the two diodes This results in the current in transistor 54 being proportional to the square of the current in sense transistor 28 divided by the current in transistor 52 Since the current in transistor 52 is substantially equal to the current provided by current source 60, the circuit output can be made more accurate, for example by selecting the value of current source 60 to compensate for temperature vaπations in the circuit The power detection circuit output signal VDET IS generated at terminal 32 by passing the current in transistor 54 through resistor 62, and a capacitor 64 is provided in parallel with resistor 62 to create a simple RC averaging circuit (although other types of averaging circuits may be employed) so that the output VDET represents an averaged signal which more accurately represents the power level in the amplifying transistor In this manner, the present invention provides a power detection circuit for a power amplifier circuit suitable for use in RF or audio amplifiers, in which an output is generated which is directly proportional to the power level in the amplifying transistor Circuits in accordance with the invention are compact, efficient, easily implemented and provide a signal which more accurately represents the power level in the amplifying transistor than do pπor-art circuits While the invention has been particularly shown and descπbed with reference to several prefeπed embodiments thereof, it will be understood by those skilled in the art that vaπous changes in form and detail may be made without departing from the spiπt or scope of the invention Thus, for example, different types of power amplifying circuits, sensing circuits, squaπng circuits and averaging circuits may be employed as appropπate, and alterations to the circuit configurations shown may be made to suit particular design requirements

Claims: CLAIMS 1 A power amplifier circuit (10) for amplifying an input signal (V^) and compπsmg an amplifying transistor (14) and a power detection circuit (28,30), said power detection circuit compπsing a circuit (30) for generating a signal (V DET ) which is directly proportional to a power level in said amplifying transistor (14) 2 A power amplifier circuit as in claim 1 , wherein said circuit (30) for generating a signal compπses a circuit for generating a voltage (V DET ) proportional to the square of a current m said amplifying transistor (14) 3 A power amplifier circuit as in claim 2, wherein said circuit for generating a signal further compπses a circuit (40,42) for averaging said voltage (V DET ) proportional to the source of the current in said amplifying transistor (14) 4 A power amplifier circuit as in claim 2, wherein said circuit for generating a signal compπses a sense transistor (28) having a control terminal connected in parallel with an input terminal of said amplifying transistor (14) and an output terminal, and an MOS transistor (38) having a control terminal coupled to said output terminal of said sense transistor (28) and an output terminal for providing said signal (V DET ) which is directly proportional to the power level in said amplifying transistor (14) 5 A power amplifier circuit as in claim 2, wherein said circuit (30) for generating a signal compπses a sense transistor (28) having a control terminal connected in parallel with an input terminal of said amplifying transistor (14) and an output terminal, and a transhnear circuit (48,50,52,54) compπsing bipolar transistors and having an input terminal coupled to said output terminal of said sense transistor and an output terminal (32) for providing said signal which is directly proportional to the power level in said amplifying transistor (14) 6. A wireless communications device having an RF power amplifier circuit (10) for amplifying an input signal and compπsing an amplifying transistor (14) and a power detection circuit (28,30), said power detection circuit compπsing a circuit for generating a signal (V DET ) which is directly proportional to a power level in said amplifying transistor (14). 7. A power detection circuit (28,30) for use in a power amplifier circuit (10) for amplifying an input signal and compπsing an amplifying transistor (14), the power detection circuit compπsing a circuit (30) for generating a signal (V DET ) which is directly proportional to a power level in the amplifying transistor (14). 8. A power detection circuit as m claim 7, wherein said circuit (30) for generating a signal compπses a circuit for generating a voltage proportional to the square of a current in said amplifying transistor (14) .

Inventors: LUO SIFEN, SOWLATI TIRDAD, LUO, SIFEN, SOWLATI, TIRDAD
Applicants: KONINKL PHILIPS ELECTRONICS NV, KONINKLIJKE PHILIPS ELECTRONICS N.V.
Application year: 2001
Main classification: H03F1
IPC codes: G01R21, H03F3