METHOD AND ARRANGEMENT FOR CONTROLLING A SYNCHRONOUS RECTIFIER IN A DC/DC CONVERTER

Abstract: To control a MOSFET (T2) used as a synchronous rectifier in a fly-back DC/DC converter and connected in series with a secondary winding of a tranformer (TR), the MOSFET (T2) being repetitively turned on and off in response to the turning off and on of a primary switch (T1) connected in series with a primary winding of the transformer (TR), means (C3, T5) are provided for detecting voltage transients across the MOSFET (T2) caused by reverse currents upon its turn-off, and for causing it to shorten at least its next on-period in response to the detection of such transients.

Description: METHOD AND ARRANGEMENT FOR CONTROLLING A SYNCHRONOUS RECTIFIER IN A DC/DC CONVERTER TECHNICAL FIELD The invention relates generally to DC/DC converters and more specifically to a method and an arrangement for controlling synchronous rectifiers in DC/DC converters. BACKGROUND OF THE INVENTION To rectify high frequency AC voltages in switched DC/DC converters, synchronous rectifiers in the form of MOSFETs are often used instead of diodes. Since the voltage drop across a MOSFET is lower than across a diode, the efficiency of converters with MOSFETs will be higher. However, since a MOSFET cannot be turned off instantaneously , its turn-off will not occur at exactly the same moment as the turn-on of a primary switch but a little later. This will cause reverse currents through the MOSFET, causing voltage transients to appear across the MOSFET. To eliminate these voltage transients, unique control signals are needed for the MOSFET to function properly. It is known to provide these control signals from the primary side of the converter, e.g. via an additional transformer. SUMMARY OF THE INVENTION The object of the invention is to bring about a method and an arrangement for controlling a MOSFET on the secondary side without any need of transferring control signals from the primary side of the converter. This is attained in accordance with the invention by detecting voltage transients across the MOSFET, caused by reverse currents when it is turned off, and in response hereto causing the MOSFET to shorten at least its next on-period in response to the detection of such transients. Hereby, the MOSFET will be controlled more accurately and no transients will appear. BRIEF DESCRIPTION OF THE DRAWING The invention will be described more in detail below with reference to the appended drawing on which Fig. 1 shows a fly-back DC/DC converter with an embodiment of a control arrangement in accordance with the invention, and Figs. 2A-2D are diagrams illustrating different signals in the embodiment in Fig. 1. DESCRIPTION OF THE INVENTION Fig. 1 shows a fly-back DC/DC converter with an embodiment of a control arrangement in accordance with the invention. The converter in Fig. 1 comprises a transformer TR having a primary winding connected in series with a primary switch Tl to output terminals of a schematically illustrated DC voltage source VI, and a secondary winding connected in series with a MOSFET T2 to an output capacitor C 1 for generating an output DC voltage. The MOSFET T2 is used as a synchronous rectifier and is controlled in accordance with the invention to improve the efficiency of the converter. In a manner known per se, the MOSFET T2 comprises a source S, a drain D, and a gate G as well as a body diode DI connected with its anode to the source S and with its cathode to the drain D of the MOSFET T2. In the embodiment shown in Fig. 1, the drain D of the MOSFET T2 is connected to the source S of the MOSFET T2 via a resistor Rl in series with a diode D2 and a capacitor C2. Also, the drain D is connected to the source S via a diode D3 in series with a capacitor C3. The interconnection point between the diode D2 and the capacitor C2 is connected to the collector of a transistor T3 whose emitter is connected to the gate G of the MOSFET T2 and to the emitter of a transistor T4 whose collector is connected to the source S of the MOSFET T2. The bases of the transistors T3 and T4 are interconnected and connected via a resistor R2 to the collector of the transistor T3. The interconnected bases of the transistors T3 and T4 are also connected to the collector of a transistor T5 whose emitter is connected to the source S of the MOSFET T2. The base of the transistor T5 is connected via resistor R3 in series with a capacitor C4 to the drain D of the MOSFET T2. The interconnection point between the resistor R3 and the capacitor C4 is connected via a resistor R4 to the collector of a transistor T6 whose emitter is connected to the interconnection point between the diode D3 and the capacitor C3 via a resistor R5 and whose base is connected to the interconnection point between the diode D2 and the capacitor C2. As mentioned above, the switch Tl is the so-called primary switch of the fly-back converter. When the switch Tl is on, magnetic energy is stored in the transformer TR. The voltage U across the secondary winding of the transformer TR is negative. When the primary switch Tl goes off, the voltage U will be positive and energy will be transferred via the MOSFET T2 to the output capacitor Cl . The transistors T3 and T4 are two emitter-followers that quickly can charge/discharge the gate G of the MOSFET T2. The transistor T5 turns the MOSFET T2 on and off via the emitter- followers T3 and T4. The transistor T5 is turned on and off by the capacitor C4. When the primary switch Tl turns on, the MOSFET T2 is still conducting, but the current through the MOSFET T2 reverses its direction when the voltage U starts to fall. The transistor T5 senses this change via the capacitor C4 and turns off the MOSFET T2. By charging the capacitor C4 via the resistor R4, the time when the transistor T5 turns on, i.e. when the MOSFET T2 turns off, can be varied. The transistor T6 senses the voltage difference between the voltage across the capacitor C3 and the voltage across the capacitor C2. The capacitor C3 is charged to the peak voltage of the voltage U including any transient emanating from a non-desired turn-off current from the MOSFET T2, while the capacitor C2 is charged to the voltage U excluding any transients since the resistor Rl filters out any transients. When the voltage difference between the capacitors C3 and C2 exceeds the base-emitter voltage of the transistor T6, the transistor T6 will conduct and via the resistor R4 set the off-time of the transistor T5, i.e. the on-time of the MOSFET T2, so that the voltage difference between the capacitors C3 and C2 will be smaller than a few volts after a number of switch cycles. With reference to Figs. 2A-2D, the operation of the converter illustrated in Fig. 1 will now be described in more detail. Fig. 2 A illustrates a couple of cycles of the voltage UT1 across the primary switch Tl. The primary switch Tl is supposed to be on from the beginning and is supposed to be turned off at times tl and tl ' and turned on at times t2 and t2 When the primary switch Tl is on, the capacitor C2 is charged via the resistor Rl in series with the diode D2, and the capacitor C3 is charged via the diode D3. At time tl when the primary switch Tl turns off, the body diode DI of the MOSFET T2 begins to conduct to charge the output capacitor C 1. In Fig. 2B, the source-drain voltage U S-D T2 of the MOSFET T2 is illustrated. Base current will be supplied to the transistor T3 via the resistor R2 and the gate G of the MOSFET T2 will be charged causing the MOSFET T2 to become saturated. Fig. 2C illustrates the gate-source voltage U G- sT2 of the MOSFET T2. At time t2, the primary switch Tl turns on again. When the voltage across the MOSFET T2 changes polarity at time t2 as illustrated in Fig. 2B, the transistor T5 becomes saturated via the capacitor C4 and the resistor R3, and the MOSFET T2 goes off. However, due to the fact that it takes some time to discharge the gate of the MOSFET T2 after that the transistor T5 is turned on, the MOSFET T2 will turn off a little late causing a reverse current to flow from the output capacitor Cl back into the transformer TR. This reverse current causes a voltage transient across the MOSFET T2 when the MOSFET T2 is off. That transient, which is illustrated in Fig. 2B at time t2, charges the capacitor C3 via the diode D3 to a voltage that is higher than the voltage across the capacitor C2, causing the transistor T6 to start conducting. The collector current from the transistor T6 then sets the time when the transistor T5 shall start to draw gate charge from the gate G of the MOSFET T2. Towards the end of the next off-period of the primary switch Tl, i.e. towards time t2 ', almost all gate charge has been drawn from the gate G of the MOSFET T2 before the primary switch Tl goes on again at time t2' as illustrated in Fig. 2C. When the primary switch Tl turns on at time t2', the MOSFET T2 is prepared, i.e. most of the gate charge has been drawn off and the MOSFET T2 is not fully conducting. Thus, no reverse current spike will appear across the MOSFET T2 at time t2' as apparent from Fig. 2B. Fig. 2D illustrates the base-emitter voltage U B-E T5 of the transistor T5. At time tl, the voltage change across the secondary winding of the transformer TR turns off the transistor T5 via the capacitor C4 and the resistor R3. Hereby, the gate G of the MOSFET T2 is charged via the resistor R2 and the transistor T3. Between times tl and t2, the base-emitter voltage U B - E T5 of the transistor T5 is reversed and, consequently, the transistor T5 is not conducting. When the primary switch Tl is turned on at time t2, the reverse voltage across the MOSFET T2 turns on the transistor T5 and turns off the MOSFET T2. Between times t2 and tl ', the base of the transistor T5 is forward biased. Therefore, the gate G of the MOSFET T2 is low and the MOSFET T2 is not conducting as apparent from Fig. 2C. For the next period, i.e. the time between tl 'and t2', the voltage difference between the capacitors C2 and C3 caused by to the transient appearing at time t2, turns on the transistor T6 causing the capacitor C4 to be discharged via the resistor R4. As a result, the transistor T5 will start conducting at a time tx before time t2 ' as indicated in Fig. 2D. Also at time tx, via the transistor T4, the transistor T5 will begin to draw gate charge out of the gate G of the MOSFET T2 to turn off the MOSFET T2 earlier than time t2'as illustrated in Fig. 2C. Thus, due to the earlier turn-off of the MOSFET T2, the transient or current spike that appeared at time t2 will not appear at time t2' as illustrated in Fig. 2B. However, should a current spike be present also at time t2', the MOSFET T2 will be turned off earlier towards the end of its next on-period. As should be apparent from the above, no control signals have to be transferred from the primary side of the converter to control the MOSFET on the secondary side.

Claims: CLAIMS 1. A method of controlling, in a fly-back DC/DC converter, a MOSFET (T2) used as a synchronous rectifier and connected in series with a secondary winding of a transformer (TR) for generating an output DC voltage, comprising repetitively turning the MOSFET (T2) on and off in response to the turning off and on of a primary switch (Tl) connected in series with a primary winding of the transformer (TR) to an input DC voltage source (VI), characterized by detecting voltage transients across the MOSFET (T2) caused by reverse currents upon its turn-off, and, in response hereto, causing it to shorten at least its next on-period in response to the detection of such transients. 2. An arrangement for controlling, in a fly-back DC/DC converter, a MOSFET (T2) used as a synchronous rectifier and connected in series with a secondary winding of a transformer (TR) for generating an output DC voltage, the MOSFET (T2) being repetitively turned on and off in response to the turning off and on of a primary switch (Tl) connected in series with a primary winding of the transformer (TR) to an input DC voltage source (VI), characterized by means (C3) for detecting voltage transients across the MOSFET (T2) caused by reverse currents upon its turn-off, and means (T5) for causing it to shorten at least its next on-period in response to the detection of such transients. 3. The arrangement according to claim 2, characterized in that said means for detecting comprises a capacitor (C3) that is adapted to be charged by the transients, and that said means for causing comprises a transistor (T5) that is adapted to sense the charging of the capacitor (C3) by the transients and in response hereto draw current from the gate (G) of the MOSFET (T2) before the primary switch (Tl) turns on.

Inventors: ASSOW BENGT, ASSOW, BENGT
Applicants: ERICSSON TELEFON AB L M, TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
Application year: 2001
Main classification: H02M3
IPC codes: H02M3, H02M7