UV-ENHANCED SILYLATION PROCESS TO INCREASE ETCH RESISTANCE OF ULTRA THIN RESISTS

Abstract: In one embodiment, the present invention relates to a method of processing an ultra-thin resist (16), involving the steps of depositing the ultra-thin resist (16) over a semiconductor substrate (12), the ultra-thin resist (16) having a thickness less than about 3,000 ANGSTROM ; irradiating the ultra-thin resist (16) with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin resist (16); and contacting the ultra-thin resist (16) with a silicon containing compound in an environment of at least one of ultraviolet light and ozone, wherein contact of the ultra-thin resist (16) with the silicon containing compound is conducted between irradiating and developing the utra-thin resist (16) or after developing the ultra-thin resist (16).

Description: UV-ENHANCED SILYLATION PROCESS TO INCREASE ETCH RESISTANCE OF ULTRA THIN RESISTS TECHNICAL FIELD The present invention generally relates to increasing the etch resistance of an ultra-thin resist. In particular, the present invention relates to silylating an ultra-thin resist which in turn increases its etch resistance. BACKGROUND ART In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve these high densities, there has been and continues to be efforts toward scaling down the device dimensions on semiconductor wafers. In order to accomplish such high device packing density, smaller and smaller features sizes are required. This includes the width and spacing of interconnecting lines and the surface geometry such as comers and edges of various features. Since numerous interconnecting lines are typically present on a semiconductor wafer, the trend toward higher device densities is a notable concern. The requirement of small features, such as metal lines, with close spacing between adjacent features requires high resolution photolithographic processes. In general, lithography refers to processes for pattern transfer between various media. It is a technique used for integrated circuit fabrication in which a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the resist, and an exposing source (such as optical light, X-rays, or an electron beam) illuminates selected areas of the surface through an intervening master template, the photomask, for a particular pattern. The lithographic coating is generally a radiation-sensitized coating suitable for receiving a projected image of the subject pattern. Once the image is projected, it is indelibly formed in the coating. The projected image may be either a negative or a positive of the subject pattern. Exposure of the coating through the photomask causes a chemical transformation in the exposed areas of the coating thereby making the image area either more or less soluble (depending on the coating) in a particular solvent developer. The more soluble areas are removed in the developing process to leave the pattern image in the coating as less soluble polymer. Projection lithography is a powerful and essential tool for microelectronics processing. However, lithography is not without limitations. Patterning features having dimensions of about 0.25 μm, 0.18 μm or less with acceptable resolution is difficult. This is because photoresist layers used in lithography typically have thicknesses on the order of 7,000 A and higher. Such relatively thick photoresist layers are not conducive to making small patterned dimensions with good resolution. Using relatively thin photoresists (such as less than about 5,000 A) enables the patterning of smaller and smaller dimensions. However, insufficient etch protection during semiconductor processing is associated with using thin photoresists. The relatively thin patterned photoresists simply do not protect underlying surfaces during etch steps. For example, corner rounding of layers underneath relatively thin photoresists is caused by insufficient etch protection and results in poor definition/resolution. In many instances the relatively thin patterned photoresists are removed during an etch procedure. As a result, it is often necessary to employ the use of hardmasks when using thin photoresists in subtractive semiconductor processing techniques. Improved lithography procedures providing improved resolution and improved etch resistance are therefore desired. DISCLOSURE OF THE INVENTION The present mvention generally provides methods that lead to improved etch resistance, improved cπtical dimension control and or improved resolution in patterned ultra-thin resists Smce it is possible to enhance the etch resistance of ultra- thin photoresists, the present invention provides improved methods for etchmg layers underneath patterned ultra-thm photoresists including metal layers The methods of the present invention make it possible to etch trenches, holes and other openings on the order of about 0 18 μm or less m size The methods of the present invention also make it possible to avoid the use of hardmasks when usmg ultra- thm photoresists As a result, the present invention effectively addresses the concerns raised by the trend towards the miniaturization of semiconductor devices In one embodiment, the present invention relates to a method of processing an ultra-thm resist, involving the steps of depositing the ultra-thin photoresist over a semiconductor substrate, the ultra-thm resist having a thickness less than about 3,000 A, irradiating the ultra-thm resist with electromagnetic radiation havmg a wavelength of about 250 nm or less, developing the ultra-thm resist, and contacting the ultra-thm resist with a silicon containing compound in an environment of at least one of ultraviolet light and ozone, wherem contact of the ultra-thm resist with the silicon contammg compound is conducted between irradiating and developmg the ultra-thm resist or after developing the ultra-thin resist In another embodiment, the present invention relates to a method of increasing the etch resistance of an ultra-thin resist, mvolvmg the steps of irradiating the ultra-thm resist with electromagnetic radiation havmg a wavelength of about 250 nm or less, the ultra-thm resist havmg a thickness less than about 3,000 A, developmg the ultra-thm resist, and contacting the ultra-thm resist with a silicon contammg compound to incorporate silicon atoms into the ultra-thm resist in at least one of under ultraviolet light and m an atmosphere compnsmg at least about 5% by weight ozone, wherein contact of the ultra-thin resist with the silicon contammg compound is conducted between irradiating and developmg the ultra-thm resist or after developing the ultra-thm resist In yet another embodiment, the present mvention relates to a method of patterning a semiconductor layer on a semiconductor substrate, involving the steps of depositing an ultra-thm photoresist over the semiconductor layer, the ultra- thin resist having a thickness less than about 3,000 A, irradiating the ultra-thm resist with electromagnetic radiation havmg a wavelength of about 250 nm or less, developmg the ultra-thm resist thereby exposing a portion of the semiconductor layer through an openmg m the ultra-thin resist, contacting the ultra-thm resist with a silicon contammg compound in an environment of at least one of ultraviolet light and ozone, wherein contact of the ultra-thm resist with the silicon contammg compound is conducted between irradiating and developing the ultra-thm resist or after developmg the ultra-thm resist, and etchmg the exposed portion of the semiconductor layer thereby patterning the semiconductor layer BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 illustrates m a cross-sectional view of a method according to one aspect of the present mvention Figure 2 illustrates in a cross-sectional view of a method accordmg to one aspect of the present invention Figure 3 illustrates in a cross-sectional view of a method accordmg to one aspect of the present invention Figure 4 illustrates in a cross-sectional view of a method accordmg to one aspect of the present invention Figure 5 illustrates in a cross-sectional view of a method according to one aspect of the present invention Figure 6 illustrates in a cross-sectional view of a method according to one aspect of the present invention Figure 7 illustrates m a cross-sectional view of a method accordmg to one aspect of the present invention Figure 8 illustrates in a cross-sectional view of a method accordmg to one aspect of the present mvention MODES FOR CARRYING OUT THE INVENTION The present invention involves etching extremely fine patterns usmg an ultra-thm resist having improved etch resistance The present invention more specifically involves silylating an ultra-thm resist under an ultraviolet (UV) light atmosphere or an ozone atmosphere which enables high resolution patterning of underlying layers havmg features on the order of about 0 18 μm or less, and even about 0 13 μm or less. The patterned and silylated an ultra-thm resist minimizes corner roundmg problems and insufficient etch protection commonly associated with thinning resists. As a result of the present mvention, etch resistance to at least one of wet, dry, gas, plasma, and liquid etchants is unproved Improved etch resistance permits the ultra-thm resists processed m accordance with the present invention to be used, without hardmasks, patterning metal lmes and other structures that require aggressive etchants Resolution and cπtical dimension control are also improved by the strengthened ultra-thm resists. An ultra-thm resist is initially provided over a semiconductor substrate The semiconductor substrate may include any suitable semiconductor material (one or more layers of semiconductor mateπals), for example, a monocrystalline silicon substrate Semiconductor substrates may include of one or more layers including substrate layers, diffusion regions, dielectnc layers such as oxides and nitrides, metal layers, devices, polysihcon layers, and the l ke (all of which are collectively termed semiconductor layers) The top layer of the semiconductor substrate serves as the underlying layer once an ultra-thm photoresist layer is formed thereover An ultra-thm photoresist layer is formed over the semiconductor substrate The ultra-thm photoresist is deposited over the semiconductor substrate using any suitable technique For example, the ultra-thin photoresist is deposited usmg conventional spm-coating or spin casting techniques Ultra-thm photoresists m accordance with the present mvention have a thickness of about 3,000 A or less In one embodiment, the ultra-thm photoresist layer has a thickness from about 200 A to about 3,000 A In another embodiment, the ultra-thm photoresist layer has a thickness from about 500 A to about 2,500 A (about 2,500 A or less) In yet another embodiment, the ultra-thm photoresist layer has a thickness from about 700 A to about 2,000 A (about 2,000 A or less) The ultra-thm photoresist layer has a thickness suitable for functioning as a mask for etchmg an underlymg layer and for forming patterns or openmgs in the developed ultra-thm photoresist layer that are about 0 18 μm or less Smce the ultra-thm photoresist layer is relatively thin compared with I-line photoresists and other photoresists, improved cπtical dimension control is realized Ultra-thm resists are typically processed usmg small wavelength radiation As used herem, small wavelength radiation means electromagnetic radiation having a wavelength of about 250 nm or less, mcludmg e- beams and X-rays In one embodiment, small wavelength radiation mcludes electromagnetic radiation havmg a wavelength of about 200 nm or less In another embodiment, small wavelength radiation mcludes extreme UV electromagnetic radiation havmg a wavelength of about 25 nm or less In yet another embodiment, small wavelength radiation mcludes extreme UV electromagnetic radiation havmg a wavelength of about 15 nm or less, mcludmg e-beams and X-rays Small wavelength radiation increases precision and thus the ability to improve cπtical dimension control and/or resolution Specific examples of wavelengths to which the ultra-thm photoresists are sensitive (undergo chemical transformation enabling subsequent development) include about 248 nm, about 193 nm, about 157 nm, about 13 nm, about 1 1 nm, about 1 nm, and e-beams Specific sources of radiation include KrF excimer lasers havmg a wavelength of about 248 nm, a XeHg vapor lamp havmg a wavelength from about 200 nm to about 250 nm, mercury-xenon arc lamps havmg a wavelength of about 248 nm, an ArF excimer laser havmg a wavelength of about 193 nm, an F 2 excimer laser having a wavelength of about 157 nm, extreme UV light having wavelengths of about 13 5 nm and/or about 11 4 nm, and X-rays havmg a wavelength of about 1 nm. In embodiments where the patterns or openmgs formed in the subsequently developed ultra-thm photoresist layer are from about 0 1 μm to about 0 15 μm, a 157 nm sensitive photoresist or a 193 nm sensitive photoresist is preferably employed In embodiments where the patterns or openmgs formed in the subsequently developed ultra-thm photoresist layer are about 0 1 μm or less, a 13 nm sensitive photoresist or an 11 nm sensitive photoresist (extreme UV photoresist) is preferably employed Positive or negative ultra-thm photoresists may be employed in the methods of the present invention General examples of ultra-thm photoresists include those containing a partially t-butoxycarbonyloxy substituted poly-p-hydroxystyrene, melamine-formaldehyde polymers, polyvinylpyrrohdone, polymethy soprenylketone, a novolak, a polyvinylphenol, polymers of hydroxystyrene and acrylate, methacrylate polymers or a mixture of acrylate polymers and methacrylate polymers Further specific examples mclude poly(p-tert- butoxycarbonyloxy-α-methylstyrene), poly(p-tert-butoxycarbonyloxystyrene), poly(tert-butyl p-vmylbenzoate), poly(tert-butyl p-isopropenylphenyloxyacetate), and poly(tert-butyl methacrylate) Photoresists are commercially available from a number of sources, mcludmg Shipley Company, Kodak, Hunt, Arch Chemical, Aquamer, JSR Microelectronics, Hoechst Celanese Corporation, and Brewer After the ultra-thm resist is deposited over a semiconductor substrate, the structure mcludmg the semiconductor substrate and ultra-thm resist is optionally heated Heating serves to promote removal of excess solvent employed to deposit the ultra-thm resist The ultra-thin resist layer is then selectively exposed to actinic radiation In particular, the ultra-thm resist layer is exposed to a pattern of radiation havmg a relatively small wavelength (for example, less than 250 nm), that is, selected portions of the ultra-thin resist layer are exposed to actmic radiation through a mask, leavmg the ultra-thm resist layer with exposed and unexposed portions Actmic radiation mcludes relatively small wavelength less than 250 nm and e-beams A number of exemplary wavelengths are descπbed above in connection with the ultra-thin resists Followmg an image-wise exposure to actmic radiation, the ultra-thin resist layer is silylated under a UV or ozone environment In one embodiment, silylation is conducted after an image-wise exposure and before development In another embodiment, silylation is conducted after development When silylation is conducted after an image- wise exposure and before development, the portions of the ultra-thm resist layer that remam after development are silylated (the exposed portions in positive ultra-thm resists and the unexposed portions m negative ultra-thm resists), thus, the ultra-thm resist layer is silylated m patterned manner In yet another embodiment, silylation is conducted after an image-wise exposure and before development and agam after development Such double silylation further increases the etch resistance of the ultra-thm resists Silylation involves contacting the ultra-thin resist with a silicon contammg compound m an UV or ozone environment in any suitable manner The silicon contammg compound is any chemical compound contammg a molecule of silicon that can be mcorporated mto an ultra-thm resist Silicon contammg compounds mclude silane and organosihcon compounds Organosihcon compounds include monofunctional organosilicon compounds, difunctional organosihcon compounds, and polyfunctional organosihcon compounds The silicon contammg compound(s) employed are in the form of at least one of a vapor and liquid Specific examples of silicon contammg compounds mclude silane, hexamethyldisilazane (HMDS), tπmethylsilyldiethylamine (TMSDEA), tnmethylsilyldimethylamme (TMSDMA), dimethylsilyldiethylamine (DMADEA), dimethylsilyldimethylamine (DMSDMA), tetramethyldisilazane (TMDS), tπmethylmethoxysilane (TMMS), tπmethylethoxysilane (TMES), tπmethylpropoxysilane (TMPS), tπmethylacetoxysilane (TMAS), bιs(dιmethylamιno)dιmethylsιlane (BDMADMS), bis(dimethylamino)methylsilane (BAMS), methyldimethylammoethoxysilane (MDAES), methyldimethoxysilane (MDMS), methyldiethyoxysilane (MDES), dimethyldimethoxysilane (DMDS), dimethyldiethoxysilane (DMES), and methyltπmethoxysilane (MTMS), and the like In one embodiment, one silicon contammg compound is employed In another embodiment, two or more silicon contammg compounds are employed In yet another embodiment, three or more silicon contammg compounds are employed The monofunctional organosihcon compound has one or more silicon atoms and a single hydrolyzable moiety bonded to a silicon atom The compound may thus contain a smgle silicon atom bonded to a smgle hydrolyzable moiety In cases involving a hydrolyzable moiety that has a valence of two or greater, the organosihcon compound may contain two or more silicon atoms bonded to a common hydrolyzable moiety that is the only hydrolyzable moiety m the compound The term "monofunctional" is used to denote that the reaction between the organosilane and the polymer results m silicon atoms each bearing only a smgle linkage to the polymer at the location of a readable group on the polymer, even if the organosihcon compound reactant contains more than one silicon atom Thus, the monofunctional organosihcon compound does not crosslink the resist polymer chains The di- or polyfunctional organosihcon compound has one or more silicon atoms and at least two hydrolyzable moieties. Upon reaction with the readable groups on the resist polymer, the organosihcon compound joins two or more of the readable groups, thereby crosslinking the polymer. The organosihcon compound may thus contain a single silicon atom bonded to two or more hydrolyzable moieties, or two silicon atoms joined by a non-hydrolyzable linkage but each bonded individually to a separate hydrolyzable moiety, or other variations. The term "di- or polyfunctional" is used to denote that the reaction between the organosihcon compound and the resist polymer results in a silicon atom crosslinking the polymer chains by simultaneously bonding to the locations of two or more readable groups on different chains. The term "hydrolyzable group" denotes any group that when bonded to a silicon atom can be cleaved from the silicon atom upon reaction of the organosihcon compound with the readable group on the resist polymer. Examples of such hydrolyzable groups are amino (-NH 2 ), alkylamino (-NHR, where R is alkyl), dialkylamino (-NRjR 2 , where R, and R 2 are independently alkyl), alkanoylamino (-NHC(O)R, where R is alkyl), alkoxy (-OR, where R is alkyl), and alkanoyloxy (-OC(O)R, where R is alkyl). Specific examples are dimethylamino, diethylamino, methoxy, ethoxy, propoxy, acetoxy, propionyloxy (-OC(0)C 2 H 5 ), and butyryloxy (-OC(0)C 3 H 7 ). The time that the silicon containing compound is contacted with the ultra-thin resist layer is sufficient to promote incorporation of a suitable amount of silicon atoms into the ultra-thin resist to improve the etch resistance thereof. In one embodiment, the silicon containing compound is contacted with the ultra-thin resist layer for a time from at least about 10 seconds, or from about 10 seconds to about 1 hour. In another embodiment, the silicon containing compound is contacted with the ultra-thin resist layer for a time from at least about 30 seconds, or from about 30 seconds to about 10 minutes. In yet another embodiment, the silicon containing compound is contacted with the ultra-thin resist layer for a time from at least about 50 seconds, or from about 50 seconds to about 3 minutes. The temperature at which the silicon containing compound is contacted with the ultra-thin resist layer is sufficient to promote incorporation of a suitable amount of silicon atoms into the ultra-thin resist to improve the etch resistance thereof. In one embodiment, the silicon containing compound is contacted with the ultra-thin resist layer at a temperature from about 50°C to about 250°C. In another embodiment, the silicon containing compound is contacted with the ultra-thin resist layer at a temperature from about 60 °C to about 200 °C. In yet another embodiment, the silicon containing compound is contacted with the ultra-thin resist layer at a temperature from about 70°C to about 180°C. In embodiments where the silicon containing compound is in the form of a gas/vapor, the pressure employed is sufficient to promote incorporation of a suitable amount of silicon atoms into the ultra-thin resist to improve the etch resistance thereof. In one embodiment, the silicon containing compound is contacted with the ultra-thin resist layer under a pressure from about 10 torr to about 800 torn In another embodiment, the silicon containing compound is contacted with the ultra-thin resist layer under a pressure from about 25 torr to about 500 torr. In embodiments where the silicon containing compound is in the form of a liquid, the pressure employed is typically ambient, but in the range of 100 torr to 1,000 torr. In embodiments where the silicon containing compound is in the form of a gas/vapor, the gas may further contain an inert gas. Inert gases include the noble gases, such as helium, neon, argon, krypton and xenon, and nitrogen In embodiments where the silicon contammg compound is in the form of a liquid, the liquid may further contain an inert liquid (inert to the incorporation of silicon atoms mto an ultra-thm resist) such as an organic solvent The silicon contammg compound is contacted with the ultra-thin resist layer m an UV or ozone environment In one embodiment, the silicon contammg compound is contacted with the ultra-thm resist layer under UV light In another embodiment, the silicon contammg compound is contacted with the ultra-thm resist layer under an ozone contammg atmosphere In yet another embodiment, the silicon contammg compound is contacted with the ultra-thm resist layer under UV light and an ozone contammg atmosphere UV light as used herem means light or electromagnetic radiation having a wavelength from about 5 nm to about 390 nm As the silicon contammg compound is contacted with the ultra-thm resist layer, UV light is directed at and/or above the structure contammg the semiconductor substrate and the ultra-thm resist layer Any suitable UV light source may be employed to irradiate the chamber in which silylation is performed The UV light may be continuous or intermittent An ozone contammg atmosphere contains at least about 5% by weight ozone (0 3 ) In another embodiment, the ozone contammg atmosphere contams at least about 10% by weight ozone In yet another embodiment, the ozone contammg atmosphere contams at least about 20% by weight ozone The ozone contammg atmosphere may additionally contain inert gases and or other gases that do not effect the incorporation of silicon atoms into the ultra-thm resist The ozone gas may be deπved from any suitable ozone source For example, ozone may be deπved from oxygen using an ozone generator Methods of making ozone are known in the art The ultra-thm photoresist layer is developed to provide a patterned ultra-thm photoresist The selectively exposed ultra-thm photoresist layer is developed by contact with a suitable developer that removes either the exposed or unexposed portions of the ultra-thm photoresist layer The identity of the developer depends upon the specific chemical constitution of the ultra-thm photoresist layer Typically, for example, an aqueous alkaline solution may be employed to remove unexposed portions of the ultra-thm photoresist layer Alternatively, one or more of dilute aqueous acid solutions, hydroxide solutions, water, organic solvent solutions may be employed to remove selected portions of the ultra-thin photoresist layer Optionally, the developed ultra- thm photoresist layer is washed before proceedmg In embodiments where silylation is conducted after development, or after development m addition to immediately after the image-wise exposure, the patterned ultra-thin photoresist layer is contacted by a silicon contammg compound in a UV or ozone environment The same conditions and components discussed above m connection with silylation are applicable here, and therefore, they are repeated While not wishing to be bound by any theory, it is believed that the UV or ozone environment accelerates incorporation of silicon atoms into the ultra-thm resist, which m turn, increases the etch resistance of the patterned ultra-thm resist In particular, the UV or ozone environment may induce decomposition of the silicon contammg compound m a manner that promotes incorporation of silicon atoms mto the ultra-thm resist The size of the cross-section of the exposed portion of the underlying layer of the semiconductor substrate is about 0 18 μm or less, mcludmg about 0 15 μm or less, about 0 13 μm or less and about 0 1 μm or less, dependmg upon the type of radiation employed Larger cross-sections are thus easily obtainable The present invention is now discussed in conjunction with the Figures Figures 1-5 illustrate one embodiment of the present invention while Figures 1, 2 and 6-8 illustrate another embodiment of the present invention The procedures descπbed m the Figures may be used with any suitable semiconductor technology mcludmg but not limited to NMOS, PMOS, CMOS, BiCMOS, bipolar, multi-chip modules (MCM) and III-IV semiconductors In one embodiment, referπng to Figure 1, a semiconductor structure 10 mcludmg a semiconductor substrate 12 havmg an underlymg layer 14 thereover is provided (underlying with respect to the subsequently descπbed ultra-thm resist layer) Semiconductor substrate 12 may include any suitable semiconductor mateπal (one or more layers of semiconductor mateπals), for example, a monocrystalline silicon substrate Semiconductor substrate 12 may additionally mclude of one or more layers mcludmg substrate layers, diffusion regions, dielectnc layers such as oxides and nitndes, devices, polysihcon layers, and the like Although shown as continuous, the underlying layer 14 may be contmuous or intermittent That is, underlymg layer 14 may cover all or portion of semiconductor substrate 12 The underlying layer 14 is typically a silicon based layer such as polysihcon, a dielectric layer, a metal layer, or a sihcide layer In this embodiment, the underlymg layer 14 is a conductive metal layer Specific examples of metal layers include one or more of aluminum, copper, gold, nickel, palladium, platmum, silver, tantalum, titanium, tungsten, zinc, aluminum-copper alloys, aluminum alloys, copper alloys, titanium alloys, tungsten alloys, titanium-tungsten alloys, gold alloys, nickel alloys, palladium alloys, platmum alloys, silver alloys, tantalum alloys, zmc alloys, and any other alloys thereof An ultra-thm photoresist layer 16 is then formed over the underlying layer 14 The ultra-thm photoresist is deposited over the underlymg layer 14 usmg any suitable technique, such as conventional spin- coatmg or spm castmg techniques The ultra-thin photoresist layer 16 has a thickness of about 1,000 A or less Smce the ultra-thin photoresist layer 16 is relatively thin compared with I-hne and other photoresists, improved resolution over I-hne photoresists is realized In this embodiment, the ultra-thin photoresist layer 16 is a positive type extreme UV photoresist Refernng to Figure 2, the ultra-thin photoresist layer 16 of the semiconductor structure 10 is then selectively exposed to actmic radiation (shown by the arrows) through a lithography mask 18 T e ultra-thm photoresist layer 16 is selectively exposed using electromagnetic radiation havmg a relatively small wavelength (for example, less than 250 nm) In this embodiment, electromagnetic radiation havmg a wavelength of about 13 nm and or 11 nm is employed Smce relatively small wavelengths are used, reflectivity concerns are minimized because larger wavelengths are more frequently associated with reflectivity problems The ultra-thm photoresist layer 16 is selectively exposed to radiation, that is, selected portions of the ultra-thm photoresist layer 16 are exposed to radiation (corresponding to the regions directly underneath the openings in the lithography mask) while other portions of the ultra-thin photoresist layer 16 are not exposed (corresponding to the regions directly underneath the lithography mask) Referπng to Figure 3, the ultra- thin photoresist layer 16 of the semiconductor structure 10 is silylated m an UV or ozone environment, that is, under at least one of UV light and an ozone contammg atmosphere In particular, silicon atoms are mcorporated into portions 20 of the ultra-thm photoresist layer 16 with the assistance of UV light and/or ozone. The depth of portions 20 may vary, ranging from about 2% of the thickness of the ultra-thin photoresist layer 16 to the entire or 100% of the thickness of the ultra-thin photoresist layer 16. In another embodiment, depth of portions 20 ranges from about 5% of the thickness of the ultra-thin photoresist layer 16 to about 50% of the thickness of the ultra-thin photoresist layer 16. The silylated portions 20 correspond to the portions of the ultra-thin photoresist layer 16 that remain on the semiconductor structure 10 after development. In this embodiment, silylation is conducted by contacting the semiconductor structure 10 with a gas containing about 20% by weight HMDS and about 80% by weight argon at a temperature of about 150°C for 110 seconds under 400 torr of pressure. The contact is conducted under UV light. Silylation improves the etch resistance of silylated portions 20 of the ultra-thin photoresist layer 16. Referring to Figure 4, the ultra-thin photoresist layer 16 of the semiconductor structure 10 is developed by contact with a suitable developer that removes the exposed portions of the ultra-thin photoresist layer 16 thereby exposing a portion of the underlying metal layer 14. In this embodiment, an aqueous tetramethylammonium solution may be employed to remove exposed portions of the ultra-thin photoresist layer 16. As a result of development, a trench 22 is formed in the ultra-thin photoresist layer 16. Instead of a trench, a contact hole or other pattern may be formed therein. The size of the cross-section of the exposed portion of the underlying metal layer 16 (opening 22 in the patterned ultra-thin photoresist 16) is about 0.18 μm or less, and in this embodiment, about 0.15 μm. Referring to Figure 5, the patterned ultra-thin photoresist layer 16 is used as a mask for selectively etching the underlying metal layer 16 to provide patterned underlying metal layer 16 having a trench 22 therein. Any suitable etch technique may be used to etch underlying metal layer 16. Dry or wet etching techniques may be employed. Wet etching involves contact with acid solutions at elevated temperatures. For example, solutions of phosphoric acid, nitric acid, acetic acid at temperatures from about 30°C to about 50°C may be employed. Dry etch techniques involve using chlorine based materials such as one or more of CCLt, BCI 3 , SiCL, and Cl 2 . In this embodiment, dry etching employing chlorine chemistry is used to remove the exposed portions of the underlying metal layer 16. Due to the enhanced etch resistance of the masking portions 20 of the ultra-thin photoresist layer 16, the ultra-thin photoresist layer 16 is not significantly damaged or degraded by the metal etch process. The size of the cross-section of opening 22 continues to remain the same or substantially the same as defined in connection with exposing portions of the underlying metal layer 16. Patterned ultra-thin photoresist layer 16 is then optionally removed from the semiconductor structure 10. In another embodiment, referring to Figure 1, a semiconductor structure 10 including a semiconductor substrate 12 having an underlying layer 14 thereover is provided. Semiconductor substrate 12 may include any suitable semiconductor material, for example, a monocrystalline silicon substrate. Semiconductor substrate 12 may additionally include of one or more layers including substrate layers, diffusion regions, dielectric layers such as oxides and nitrides, devices, polysihcon layers, and the like. Although shown as continuous, the underlying layer 14 may be continuous or intermittent. That is, underlying layer 14 may cover all or portion of semiconductor substrate 12. The underlying layer 14 is typically a silicon based layer such as polysihcon or amorphous silicon, a dielectric layer, a metal layer, or a suicide layer. In this embodiment, the underlying layer 14 is a silicon dioxide layer. An ultra- thin photoresist layer 16 is then formed over the underlying layer 14. The ultra-thin photoresist is deposited over the underlying layer 14 using any suitable technique, such as conventional spin- coating or spin casting techniques. The ultra-thin photoresist layer 16 has a thickness of about 1,200 A or less. Since the ultra-thin photoresist layer 16 is relatively thin compared with I-line and other photoresists, improved resolution over I-line photoresists is realized. In this embodiment, the ultra-thin photoresist layer 16 is a positive type deep UV photoresist. Referring to Figure 2, the ultra-thin photoresist layer 16 of the semiconductor structure 10 is then selectively exposed to actinic radiation (shown by the arrows) through a lithography mask 18. The ultra-thin photoresist layer 16 is selectively exposed using electromagnetic radiation having a relatively small wavelength (for example, less than 250 nm). In this embodiment, electromagnetic radiation having a wavelength of about 157 nm is employed. Since relatively small wavelengths are used, reflectivity concerns are minimized because larger wavelengths are more frequently associated with reflectivity problems. The ultra- thin photoresist layer 16 is selectively exposed to radiation; that is, selected portions of the ultra-thin photoresist layer 16 are exposed to radiation (corresponding to the regions directly underneath the openings in the lithography mask) while other portions of the ultra-thin photoresist layer 16 are not exposed (corresponding to the regions directly underneath the lithography mask). Referring to Figure 6, the ultra-thin photoresist layer 16 of the semiconductor structure 10 is developed by contact with a suitable developer that removes the exposed portions of the ultra-thin photoresist layer 16 thereby exposing a portion of the underlying metal layer 14. In this embodiment, an aqueous tetramethylammonium solution may be employed to remove exposed portions of the ultra-thin photoresist layer 16. As a result of development, an opening 22 is formed in the ultra-thin photoresist layer 16. Examples oof openings include trenches and contact holes and the like. The size of the cross-section of the exposed portion of the underlying metal layer 16 (opening 22 in the patterned ultra-thin photoresist 16) is about 0.18 μm or less, and in this embodiment, about 0.17 μm. Referring to Figure 7, the patterned ultra-thin photoresist layer 16 of the semiconductor structure 10 is silylated in an UV or ozone environment; that is, under at least one of UV light and an ozone containing atmosphere. In particular, silicon atoms are incorporated into portions 20 of the ultra-thin photoresist layer 16 with the assistance of UV light and/or ozone. The depth of portions 20 may vary, ranging from about 2% of the thickness of the ultra-thin photoresist layer 16 to the entire or 100% of the thickness of the ultra-thin photoresist layer 16. In this embodiment, silylation is conducted by contacting the semiconductor structure 10 with a gas containing about 15% by weight TMDS, about 15% by weight silane, about 20% ozone and about 50% by weight argon at a temperature of about 120°C for 95 seconds under 300 ton of pressure. Silylation improves the etch resistance of silylated portions 20 of the ultra-thin photoresist layer 16. Referring to Figure 8, the patterned ultra-thin photoresist layer 16 is used as a mask for selectively etching the underlying silicon dioxide layer 16 to provide patterned underlying silicon dioxide layer 16 having an opening 22 therein. Any suitable etch technique may be used to etch underlying silicon dioxide layer 16. Dry or wet etching techniques may be employed. Wet etch techniques involve using buffered HF. Dry etch techniques involve using fluorocarbons such as one of SF 6 , NF 3 , CF 4 , C 2 F 6 , CO, C F 8 and CHF 3 optionally with H 2 or 0 2 . In this embodiment, a dry etch using Ar and CHF 3 is employed. Due to the enhanced etch resistance of the masking portions 20 of the ultra-thin photoresist layer 16, the ultra- thin photoresist layer 16 is not significantly damaged or degraded by the silicon dioxide etch process. The size of the cross-section of opening 22 continues to remain the same or substantially the same as defined in connection with exposing portions of the underlying silicon dioxide layer 16. Patterned ultra-thin photoresist layer 16 is then optionally removed from the semiconductor structure 10. Although the invention has been shown and described with respect to a certain prefened embodiment or embodiments, it is obvious that equivalent alterations and modifications will occur to others skilled in the art upon the reading and understanding of this specification and the annexed drawings. In particular regard to the various functions performed by the above described components (assemblies, devices, circuits, etc.), the terms (including any reference to a "means") used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (i.e., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary embodiments of the invention. In addition, while a particular feature of the invention may have been disclosed with respect to only one of several embodiments, such feature may be combined with one or more other features of the other embodiments as may be desired and advantageous for any given or particular application. INDUSTRIAL APPLICABILITY The methods and systems of the present invention are useful generally in the field of lithography and semiconductor processing and may be specifically employed in at least one of the fields of microprocessor fabrication and memory device fabrication.

Claims: CLAIMS What is claimed is: 1. A method of processing an ultra-thin resist (16), comprising: depositing the ultra- thin resist ( 16) over a semiconductor substrate ( 12), the ultra-thin resist (16) having a thickness less than about 3,000 A; irradiating the ultra-thin resist (16) with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin resist (16); and contacting the ultra- thin resist ( 16) with a silicon containing compound in an environment of at least one of ultraviolet light and ozone, wherein contact of the ultra-thin resist (16) with the silicon containing compound is conducted between irradiating and developing the ultra-thin resist (16) or after developing the ultra-thin resist (16). 2. The method of claim 1 , wherein the ultra-thin resist ( 16) having a thickness less than about 2,000 A and the electromagnetic radiation comprises at least one of light having a wavelength about 248 nm, about 193 nm, about 157 nm, about 13 nm, about 11 nm, or about 1 nm, and e-beams. 3. The method of claim 1, wherein the silicon containing compound comprises at least one of silane, hexamethyldisilazane, trimethylsilyldiethylamine, trimethylsilyldimethylamine, dimethylsilyldiethylamine, dimethylsilyldimethylamine, tetramethyldisilazane, trimethylmethoxysilane, trimethylethoxysilane, trimethylpropoxysilane, trimethylacetoxysilane, bis(dimethylamino)dimethylsilane, bis(dimethylamino)methylsilane, methyldimethylaminoethoxysilane, methyldimethoxysilane, methyldiethyoxysilane, dimethyldimethoxysilane, dimethyldiethoxysilane, and methyltrimethoxysilane. 4. The method of claim 1 , wherein the silicon containing compound is contacted with the ultra- thin resist (16) at a temperature from about 50°C to about 250°C, under a pressure from about 10 ton to about 800 ton, and for a time from about 10 seconds to about 1 hour. 5. A method of increasing the etch resistance of an ultra-thin resist (16), comprising: irradiating the ultra-thin resist (16) with electromagnetic radiation having a wavelength of about 250 nm or less, the ultra-thin resist (16) having a thickness less than about 3,000 A; developing the ultra-thin resist (16); and contacting the ultra-thin resist (16) with a silicon containing compound to incorporate silicon atoms into the ultra-thin resist (16) in at least one of under ultraviolet light and in an atmosphere comprising at least about 5% by weight ozone, wherein contact of the ultra-thin resist (16) with the silicon containing compound is conducted between irradiating and developing the ultra- thin resist (16) or after developing the ultra-thin resist (16). 6. The method of claim 5, wherein the silicon containing compound comprises at least one of silane, hexamethyldisilazane, trimethylsilyldiethylamine, trimethylsilyldimethylamine, dimethylsilyldiethylamine, dimethylsilyldimethylamine, tetramethyldisilazane, trimethylmethoxysilane, trimethylethoxysilane, trimethylpropoxysilane, trimethylacetoxysilane, bis(dimethylamino)dimethylsilane, bis(dimethylamino)methylsilane, methyldimethylaminoethoxysilane, methyldimethoxysilane, methyldiethyoxysilane, dimethyldimethoxysilane, dimethyldiethoxysilane, and memyltrimethoxysilane. 7. The method of claim 5, wherein contact of the ultra-thin resist (16) with the silicon containing compound is conducted after developing the ultra-thin resist (16) under ultraviolet light. 8. The method of claim 5, wherein contact of the ultra- thin resist (16) with the silicon containing compound is conducted between irradiating and developing the ultra-thin resist (16) in an atmosphere comprising at least about 10% by weight ozone. 9. A method of patterning a semiconductor layer (14) on a semiconductor substrate (12), comprising: depositing an ultra-thin photoresist (16) over the semiconductor layer (14), the ultra-thin resist (16) having a thickness less than about 3,000 A; irradiating the ultra-thin resist (16) with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin resist (16) thereby exposing a portion of the semiconductor layer (14) through an opening (22) in the ultra-thin resist (16); contacting the ultra-thin resist (16) with a silicon containing compound in an environment of at least one of ultraviolet light and ozone, wherein contact of the ultra-thin resist (16) with the silicon containing compound is conducted between irradiating and developing the ultra-thin resist (16) or after developing the ultra-thin resist (16); and etching the exposed portion of the semiconductor layer (14) thereby patterning the semiconductor layer (14). 10. The method of claim 9, wherein the silicon containing compound comprises at least one of silane, hexamethyldisilazane, trimethylsilyldiethylamine, trimethylsilyldimethylamine, dimethylsilyldiethylamine, dimethylsilyldimethylamine, tetramethyldisilazane, trimethylmethoxysilane, trimethylethoxysilane, trimethylpropoxysilane, trimethylacetoxysilane, bis(dimethylamino)dimethylsilane, bis(dimethylamino)methylsilane, methyldimethylaminoethoxysilane, methyldimethoxysilane, methyldiethyoxysilane, dimethyldimethoxysilane, dimethyldiethoxysilane, and memyltrimethoxysilane.

Inventors: CHOO BRYAN K, PHAN KHOI A, RANGARAJAN BHARATH, SINGH BHANWAR, SUBRAMANIAN RAMKUMAR, TEMPLETON MICHAEL K, YEDUR SANJAY K, CHOO, BRYAN, K., PHAN, KHOI, A., RANGARAJAN, BHARATH, SINGH, BHANWAR, SUBRAMANIAN, RAMKUMAR, TEMPLETON, MICHAEL, K., YEDUR, SANJAY, K.
Applicants: ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.
Application year: 2001
Main classification: H01L21
IPC codes: G03F7, H01L21