METHOD FOR CALIBRATION OF AN ELECTRICAL LINEWIDTH MEASUREMENT SYSTEM, WAFER FOR BEING USED IN THE METHOD, AND ELECTRICAL LINEWIDTH MEASUREMENT CALIBRATION SYSTEM

Abstract: The calibration structure and wafer (300) includes a first straight line structure (501) having a first width, a second straight line structure (502) having a second width and third line structure (503) comprising a first line portion having the first width and a second line portion having the second width. By measuring the electrical resistance and using Ohm's law the line structures, the actual line widths are determined and the electrical linewidth measurement system is calibrated.

Description: Description Method for calibration of an electrical linewidth measurement system, wafer for being used in the method, and electrical linewidth measurement calibration system The invention relates to a method for calibration of an electrical linewidth measurement system, to a wafer for being used in the method, and to an electrical linewidth measurement calibration system. To control and optimize lithographic processes as used in semiconductor technology, the real width of the structures on a wafer has to be determined in a statistical way. This process control also has to cover the influence of changes in geometry, e.g. changes in width, presence of corners etc., on the lithographic process. Therefore, measurements are regularly performed on the defined structures. Defined means that a lithographic process, i.e. resist coating, exposure and development, is applied to delineate structures in a photosensitive material. The width of these structures can be determined using several techniques, such as Atomic Force Microscopy (AFM) , cross- sectional Scanning Electronic Microscopy (X-SEM) or top-down Scanning Electronic Microscopy (SEM) . However, these methods are time-consuming, which makes statistical process control very expensive or even not feasible. For X-SEM, the wafers have to be cleaved and are lost for further processing or re-use. These methods further require expensive tools for being performed. A cheaper and faster measurement technique is required in order to be able to control the lithographic process in a more industrial way. Therefore, the delineated structures are transferred into an underlying conductive layer using an etching technique. These patterned structures can be measured electrically, thereby determining their resistance. Using Ohm's law the width of the measured structure can be extracted from its resistance value. R a LLi.l a K .i, ( 1 ) d W m m wherein • R is a measured electrical resistance, • L is a known, i.e. predetermined, length of the straight line structure, • W m is an extracted width of the straight line structure, further also denoted as measured width, • p is a known, i.e. predetermined, resistivity of the patterned layer, i.e. the straight line structure, and • d is the thickness of the patterned layer. The width W m however extracted from the resistance value R differs from the real width M due to errors introduced for example by the electrical measurement set-up, the electrical measurement itself or by the patterning process. In order to determine the offset S, with 2 • S = M - W m , (2) the resistance R of a set of straight lines having the same length L is measured as a function of the designed linewidth ^ d esig ' • e . as drawn by the circuit designer on the screen (see offset curve 100 in Fig.lA). This method is not capable to obtain the real width M of the straight line structure as only the offset towards the designed values of the width is extracted. Fig. IB shows an example of a straight line structure 101 having the thickness d, a width W and a length L. The method for electrically determining the width of patterned structures described above uses only straight lines with different widths . It can not estimate the contribution of changes of width within one line. The offset between the measured value m and the designed width is determined by an extrapolation towards the end of the range of widths, which makes it an unstable result being very sensitive to the set of width values used. The real value of the width M can not be found since only the designed width can be taken into account The aim of the invention is to present structures and a method making use thereof to selfconsistently calibrate the electrical measurement set-up that is used in the control and optimization of lithographic processes as used in the semiconductor technology. This measurement method yields the real value M of the patterned structures and in parallel an accurate value for the offset introduced by the electrical measurement and the pattering process. Another advantage of this method is that the extracted value for the offset can be used to monitor differences in the lithographic and post-lithographic processing required to obtain electrically measurable patterned lines. Changes in this processing can be reflected in changes of the extracted value for the offset. Another advantage of the invention is that it only requires a limited set of structures. Another advantage of the present invention is that also the influence of the corner effects on the lithographic process can be determined from electrical measurements. This influence can then be corrected for in an optimization of the lithographic process. The method can be used to correlate the true width M, the measured width W and their difference 2S. Even if the measured width W is determined by e.g. AFM or SEM and the difference to the ELM measuring result is known as it is a parameter characterizing a certain technology, the true width M can not be extracted. If the measured width is measured and the true width M is determined, then the difference 2S can be used to optimize the patterning process. For the purpose of teaching of the invention, preferred embodiments of the method are described in the sequel. Features of the embodiments of the different aspects of the invention can be also combined. It will however be apparent to the person skilled in the art that other alternative and equivalent embodiments of the invention can be conceived and reduced to practice without departing from the true spirit of the invention. A method for calibration of an electrical linewidth measurement system comprises the following steps: • providing a calibration structure with a) a first straight line structure having a first width, b) a second straight line structure having a second width, wherein the second width is different from the first width, c) a third line structure comprising a first line portion having the first width and a second line portion having the second width, • determining an electrical resistance of the first straight line structure, • determining a measured width of the first straight line structure using the electrical resistance of the first straight line structure, • determining an electrical resistance of the second straight line structure, • determining a measured width of the second straight line structure using the electrical resistance of the second straight line structure, • determining an electrical resistance of the third line structure, • determining a measured width of the third line structure using the electrical resistance of the third line structure, • determining the first width, the second width and the third width using a) the measured width of the first straight line structure, b) the measured width of the second straight line structure, c) the measured width of the third line structure, • calibrating the electrical linewidth measurement system using the first width, the second width and the third width. Furthermore, a wafer is disclosed for being used in the above described method for calibration of an electrical linewidth measurement system, wherein the wafer comprises a calibration structure with • a first straight line structure having a first width, • a second straight line structure having a second width, wherein the second width is different from the first width, and • a third line structure comprising a first line portion having the first width and a second line portion having the second width. An electrical linewidth measurement calibration system comprises a processing unit which is adapted to execute the steps of the method described above for a calibration structure with a first straight line structure having a first width, a second straight line structure having a second width, wherein the second width is different from the first width, and a third line structure comprising a first line portion having the first width and a second line portion having the second width. The third line structure may be a straight line structure comprising the first line portion having the first width and the second line portion having the second width. One advantage of the present invention is the simple and thus cost-saving way for calibration of an electrical linewidth measurement system. Furthermore, the invention provides a very time-saving calibration of an electrical linewidth measurement system. According to a preferred embodiment of the invention, the measured width of the first straight line structure, the measured width of the second straight line structure and the measured width of the third line structure is determined using formulas according to Ohm's law. The measured width W m ]_ of the first straight line structure, the measured width m 2 of the second straight line structure and the measured width m 2 °f the third line structure can be determined using the following formulas: M w ml _= -P • — L l d Rι_ < ω _ L 2 Wl2 - • ^ d R 12 wherein • p is a predetermined resistivity of the line structure material, • d is the thickness of the line structure, • Li is the length of the first straight line structure, • L2 is the length of the second straight line structure, • Ri is the electrical resistance of the first straight line structure, • R2 is the electrical resistance of the second straight line structure, • Lχ2 is the length of the third line structure, and • R 12 i s the electrical resistance of the third line structure . The first width i, the second width M2 and the third width M12 can be determined using the following formulas: Ml = ml + ΔS , M 2 = w m2 + Δs 1 and Ml2 = w ml2 + ΔS, wherein ΔS is an offset value representing an additive device error. In other word, ΔS represents the error of the used measuring tool. According to a further preferred embodiment of the invention, the first width M and the second width M2 are determined further using the following formulas: i = W ml + 2 • S , M 2 = W m2 + 2 • S , ~ 12 • ( L2 • ml + L l • 2 ) + W m l • w m2 " ^12 w ml2 • ( 2 - w ml ) wherein Li = li - S, L 2 = I2 + S , L12 is the length of the third line structure, and S is representing the half of the error of the electrical measurement with respect to the physical width, and thus is representing the sheath thickness. Furthermore, at least two of the following straight line structures can have the same length: • the first straight line structure, • the second straight line structure, and/or • the third line structure. This embodiment of the invention further simplifies the calibration method. According to a further preferred embodiment of the invention, • the first line portion having the first width has the same length as the first straight line structure, and • the second line portion having the second width has the same length as the second straight line structure. In the wafer at least two of the following straight line structures can have the same length: • the first straight line structure, • the second straight line structure, and/or • the third line structure. Furthermore, the electrical linewidth measurement calibration system comprises a wafer including the calibration structure. In other words, in a first aspect of the invention a set of structures is presented for selfconsistently calibrating the electrical measurement set-up and to obtain the real value of the width M of the structures as determined by this electrical measurement. In one embodiment of the invention this set of structures contains two straight lines. The set of structures further contains one, optionally non-straight, structure optionally having a non-rectangular layout. The width of the third line structure or parts thereof are selected from the width of the two straight line structures. According to another embodiment of this aspect of the invention this set of structures comprises at least two straight line structures. This set of structures comprises also at least one non-straight structure having a non- rectangular layout. The width of this non-straight structure or parts thereof is selected from a finite set of discrete values. These discrete values being the widths of the straight line structures. In another embodiment of this aspect of the invention this set of structures comprises two subsets. A first subset of structures comprises at least one straight line structure. The second subset of structures comprises at least one non-straight structure having a non-rectangular layout. This structure can be decomposed into the structures contained in the first subset. In another aspect of the invention a method is presented to calibrate in a selfconsistent way the electrical measurement set-up and to determine the true value of the width M of the structures as determined by this electrical measurement. In a further embodiment of this aspect of the invention a measurement sequence is used. First, an electric resistance R]_ of a first straight line structure having a width Mi and first length is measured. From this electrical measurement a measured first width m is extracted preferably using Ohm's law. Then, an electric resistance R2 of a second straight line structure having the second width M2 and preferably, but not necessarily the same length is determined, i.e. measured. From this second electrical measurement a measured second width m 2 is extracted using Ohm's law. Finally, the resistance R12 of a third line structure is measured preferably also having the length. This third line structure is a non-straight structure as defined in another embodiment of the first aspect of the invention. From this third electrical measurement an equivalent width, further denoted as measured third width w m l 2' is extracted using Ohm's law. The measured third width m i2 is described as being equivalent because the width of this third structure is not constant and therefore, one can not determine a physical width for such a structure. In another embodiment of the invention a measurement sequence is used. First the resistance Ri, with i being an integer, of a first set of structures of straight lines comprising at least one straight line having a width Mi and known length Lj_, is measured. From this electrical measurement for each straight line a measured width W i can be extracted using Ohm's law. Finally the electrical resistance Rij , with i and j being integers, of a second set of structures of non-straight lines, comprising at least one non-straight line, is measured. The structures comprised in this second set of structures have known lengths Li j . This second set of non- straight structures is defined in another embodiment of the first aspect of the invention. From this electrical measurement an equivalent measured width W m ij is extracted using Ohm's law. This width m ij is described as being equivalent because the width of these structures is not constant and therefore one can not determine a physical width for such a structure. These electrical measurements yield a set of equations, using Ohm's law, describing the resistance of the structures of the first and second set as function of the known parameters, such as layer thickness d, layer resistivity p and length L and as function of the unknown parameters, i.e. the real width M and offset 2S. Since each structure of the second set can be decomposed into the structures of the first set, the resistance of each structure of the second set can be described as function of the width W m i of the structures of the first subset. From this set of equations the real value of the width Mi of the straight structures are calculated. The offset 2S representing the error of the electrical measurement with respect to the physical width, and thus representing the sheath thickness and the measurement set-up is calculated with the same set of equations. Thus, the electrical measurement and measurement set-up is calibrated. The range of width of the straight lines used can be limited so that an offset is obtained that is not dependent on the width. In another aspect of the invention a method is presented to measure changes in the lithographic and post-lithographic processing, required to obtain electrically measurable patterned lines. So this value can be used to monitor this type of changes or to compare different patterning processes. In another aspect of the invention a method is presented to determine the contribution of changes in geometry to the patterning process itself. The determined first width, the second width, the third width and preferably the determined error of the electrical measurement with respect to the physical width may be used for the layout design of an electronic circuit. Preferred embodiments of the invention will now be described in detail with reference to the accompanying drawings. Figure 1A and IB show a diagram showing the measured electrical resistance as a function of the inverse of the designed width, wherein the vertical stripes on the curve represent actual measurement points (Figure 1A) and an example of a straight line structure; Figure 2 shows an electron beam exposure system according to a preferred embodiment of the invention. Figures 3A to 3C show a wafer (Figure 3A) , a used module of the wafer (Figure 3B) and an enlarged view of a line structure (Figure 3C) according to an embodiment of the invention; Figure 4 shows a four-wire connection scheme used for measuring the linewidth according to a preferred embodiment of the invention; Figures 5A to 5C show a first straight line structure (Figure 5A) , a second straight line structure (Figure 5B) and a third line structure (Figure 5C) according to a first embodiment of the invention; Figures 6A to 6C show a first straight line structure (Figure 6A) , a second straight line structure (Figure 6B) and a third line structure (Figure 6C) according to a second embodiment of the invention; Figures 7A to 7D show further examples of a respective third line structure according to further embodiments of the invention; Figure 8 shows further examples of a third line structure according to further embodiments of the invention; Figure 9 shows a further example of a third line structure according to a further embodiment of the invention; Figure 10 shows further examples of a third line structure according to further embodiments of the invention; Figures 11A to 11C show measured and expected linewidths as a function of a number of features or their equivalent length (Figure 11A: features are bumps; Figure 11B: features are pinches; Figure 11C: features are pinches and bumps) ; Figure 12 shows a correlation between a measured and an expected width for different widths and poly-Si or amorph-Si; Figures 13A to 13D show a measured linewidth as a function of the number of bends for angles 28 (Figure 13A) , 45 (Figure 13B) and 90 (Figure 13C) and a measured linewidth as a function of the angle of bends (Figure 13D) ; Figure 14 shows a diagram illustrating the linearity of the ELM for a large range of linewidths compared to SEM; and Fig.2 shows an electron beam exposure system 200 including an electron source 201 and a Wehnelt cylinder 202 being arranged in the electron flow direction, in Fig.2 symbolized by an arrow 203. The electron source 201 has a negative electric potential of about 10 kV to 50 kV. An anode 204 has a hole in its center so that the electron beam 207 can pass through the hole. The anode 204 is put on mass potential. The Wehnelt cylinder 202 is used for focussing the electrons of the electron beam 207. Furthermore, condensator plates 205 are provided in the electron beam direction 203. The condensator plates 205 provide an electric field for fading out the electron beam 207. The electron beam 207 further passes an aperture 206 and a magnetic lense 208 formed by ring coils, wherein the aperture 206 and the magnetic lense 208 are arranged in the electron beam direction 203 after one another and after the condensator plates 205. Using further provided cylinder coils 209, 210 the electron beam 207 is refracted in the first direction (using first cylinder coils 209) and in the second direction (using second cylinder coils 210) . A further magnetic lense 211 is provided for focussing the electron beam 207 to a diameter of 0,01 to 0,5 μm in the writing plane. A surface of a wafer 212 is arranged in the writing plane and the wafer 212 is put on a laser controlled movable table 213. TM According to this preferred embodiment, a Leica VB6-HR as an electron beam exposure system 200 is used. In this context it should be mentioned that the wafer 212 with the calibration structure may also be produced using optical lithography methods. Furthermore, it is advantageous to use the same process for the calibration wafer as will be used for the target application wafer. Fig.3A shows the wafer 300 in further detail. A plurality of modules 301 is structured on the wafer 300. In this context it should be mentioned that the wafer 300 according to this embodiment is a test wafer used for calibration of the system. One example module 301 is shown in Fig.3B in an enlarged view. Each module 301 comprises a bonding pad configuration including 16 contacting pads 310. The bonding pad configuration is used for measuring during one probecard touchdown using an electrical linewidth measurement system which will further be described in detail. The electrical linewidth measurement system used for determination of a linewidth is based on the Electroglas TM TM Prober Horizon 4080X and the Keithley Parametric Tester S900B. An additional component for a precise voltage TM measurement is the Digital Multimeter Keithley 2010, which TM is connected to the Keithley Parametric Tester S900B. TM The Electroglas Prober Horizon 4080X is an automated wafer probing system. A wafer prober is used to measure electrical parameters of devices as well to control the front-end process steps. The wafer prober aligns each die on a wafer to pins on a probe card connected to a tester that measures electrical performance. Furthermore, the prober automatically realigns the wafer to the next die. On the prober, a TM Keithley probe card comprising 33 needles is installed, wherein the pins of the needles consist preferably of tungsten. TM The Keithley Parametric Tester S900B is a parametric test system for semiconductor process monitoring and device characterization. It comprises a personal computer based TM system controlled by the Keithley Test Environment Software Platform. ■ Furthermore, two Force Measurement Units 9621 are provided, which can be programmed to limit current while forcing voltage or to limit voltage while forcing current. In this context, it should be mentioned that according to this embodiment of the invention, a four-wire connection scheme 400 is used to measure the width of a line structure 401 comprising two contacting points 402, 403, as shown in Fig .4. A current source 404 is provided for forcing a test current ICD to the first contacting pad 402, the main body 405 of the line structure 401 and the second contacting pad 403. Furthermore, a voltmeter 406 is connected to the first contacting pad 402 via a first lead 407 and to the second contacting pad 403 via a second lead 408. The voltmeter is measuring a measured voltage " D- The main body 405 of the line structure 401 has a line length Lc, i.e. in general, the line structure has a line length Lc and a linewidth Mi. A measured sheet resistance is denoted with ps. Thus, a measured line resistance R D is calculated according to R CD = fe. (3) The linewidth W m i is determined by the following formula: L • pς R CD Each module 301 includes, as shown in Fig.3B, six structures, a first structure 316 formed by a so-called Van der Pauw structure and five straight line structures 311, 312, 313, 314, 315. Fig.3C shows an enlarged view of a symbolized straight line structure 312 being electrically connected to four contacting pads for being contacted to a current source and a voltmeter as described above in connection with Fig. . Fig.5A to Fig.5C show a set of straight line structures used for self-consistently calibrating an electrical measurement set-up and to obtain the real value of the width M of the straight line structures as defined by this electrical measurement according to a first embodiment of the invention. In one embodiment of this aspect this set of structures contains two straight lines 501, 502 as shown in Fig.5A and Fig.5B. In this context, straight means that the width Mi of the respective straight line structure i and its orientation do not change along its entire length Li or, in other words, the layout of this straight line structure is a rectangle. According to this embodiment, the straight line structures 501, 502 may have the same length L, so in the example given in Fig.5A and Fig.5B the length L of the first straight line structure 501 equals the length L of the second straight line structure 502. The two straight line structures 501, 502, however, have a different width Mi, M2 • This set of straight line structures also contains one preferably non-straight structure as a third line structure 503 having a non-rectangular layout. The third line structure 503 comprises a first line region 504 and a second line region 505. The width of the third line structure 503 or parts thereof are selected from the width Mi, M2 of the two straight lines 501, 502. In the example given in Fig.5C the width M12 of a region 504, 505 of the third line structure 503 can have either the value Mi or the value M2. This non-straight structure 503 is thus a combination of the two straight lines 501, 502. In the example given in Fig.5C the third line structure 503 thus has a width Mi for the first line region 504 with a length L 3a , a width M2 for the second line region 505 with a length L3k, wherein Mi < M2. According to this preferred embodiment of the invention, the total length L 3 (L3 = L3 a + 3 b ) of the non-straight line structure 503 is equal with the length Li of the first straight line structure 501 and the length L2 of the second straight line structure 502. Fig.βA to Fig.δC show a set of straight line structures used for self-consistently calibrating an electrical measurement set-up and to obtain the real value of the width M of the straight line structures as defined by this electrical measurement according to a second embodiment of the invention. The first straight line structure 601 and the second straight line structure 602 according to the second embodiment of the invention are the same compared with the first straight line structure 501 and the second straight line structure 502 according to the first embodiment of the invention. The third line structure 603 comprises a first line region 604, a second line region 605 and a third line region 606. The width of the third line structure 603 or parts thereof are selected from the width i, M2 of the two straight lines 601, 602. In the example given in Fig.δC the width 12 of a region 604, 605, 606 of the third line structure 603 can have either the value i or the value M2. This non-straight structure 503 is thus a combination of the two straight lines 601, 602. In the example given in Fig.δC the third line structure 603 thus has a width Mi for the first line region 604 with a length L3 a , a width M2 for the second line region 605 with a length ^ and again a width i for the third line region 606 with a length L3 C , wherein Mi < M2 • According to this second embodiment of the invention, the total length L 3 (L 3 = L3 a + L3 b +L 3C ) of the non-straight line structure 603 is equal with the length L of the first straight line structure 501 and the length L2 of the second straight line structure 502. Fig.7A to Fig.7D show further examples of a respective third line structure 700, 710, 720, 730 according to further embodiments of the invention. Fig.7A shows a third line structure 700 comprising a first region 701, a second region 702 and a third region 703, wherein the second region 702 has a width M2 of the second straight line structure and the first region 701 and the third region 703 have a width Mi of the first straight line structure, wherein i < M2. The second region 702 only extends over the first region 701 and the third region 703 on a first lateral side 704 of the third line structure 700; on the other lateral side 705 of the third line structure 700, the three regions 701, 702, 703 are aligned to each other. Fig.7B shows a third line structure 710 comprising a first region 711, a second region 712 and a third region 713, wherein the second region 712 has a width Mi of the first straight line structure and the first region 711 and the third region 713 have the width M2 of the second straight line structure, wherein Mi < M 2 . The second region 712 is formed by a pitch, thereby forming a recess on each lateral side 714, 715 of the third line structure 710. Fig.7C shows a third line structure 720 comprising a first region 721 and a second region 722, which are arranged to each other in an angle of 90°, thereby forming a rectangle. The first region 721 has the width Mi of the first straight line structure and the second region 722 has the width M2 of the second straight line structure. Fig.7D shows a third line structure 730 comprising a first region 731, a second region 732, a third region 733, a fourth region 734 and a fifth region 735. All regions have either the width Mi of the first straight line structure or the width M2 of the second straight line structure. The second region 732 is arranged to the first region 731 in an angle of 90°, thereby forming a first rectangle. The third region 733 is arranged to the second region 732 in an angle of 90°, thereby forming a second rectangle. The fourth region 734 is arranged to the third region 733 in an angle of 90°, thereby forming a third rectangle. The fifth region 735 is arranged to the fourth region 734 in an angle of 90°, thereby forming a fourth rectangle. The entire third line structure 730 thus has a U-form structure. According to this embodiment of the invention, each of the first region 731, the second region 732, the fourth region 734 and the fifth region 735 have the width Mi of the first straight line structure, whereas the third region 733 has the width M2 of the second straight line structure. In this context it should be mentioned, that the angle of 90° is only illustrative in this embodiment. Any angle may be used in the invention. Furthermore, it should be mentioned that in the third line structure at least once a change of its width has to occur according to the invention. In general, the width of the non-straight structure or parts thereof is selected from a finite set of discrete values. These discrete values being the widths of the straight lines This third line structure can usually be decomposed into the structures contained in the first subset, i.e. for example the first straight line structure and the second straight line structure. Generally, the structures in the second subset differ from a straight line due to changes in width, e.g. narrowing or widening the line, the presence of bulges along the line, parts of the structure oriented in another direction or a combination thereof. The width of this non-straight structure or parts thereof is selected from a finite set of discrete values. These discrete values being the widths of the straight lines of the first subset. In this context it should be mentioned that an arbitrary number of regions having the first width Mi and an arbitrary number of regions having the second width M2 may be provided, thereby forming a alternating linear or angled (e.g. rectangle) structure. To further illustrate this aspect of the invention, Fig.8 shows five different possibilities for a third line structure 312 of Fig.3C, namely • a first line 801 with one discrete bump 802, • a second line 803 with one discrete pinch 804, • a third line 805 with a predetermined number of alternating bumps 806 and pinches 807, • a fourth line 808 in a U-shape 809, thereby forming a bendy line, and • a fifth line 810 comprising a single width change 811 along the entire length of the line. In one embodiment of the invention, a measurement sequence is used as will further be described in detail. First the resistance Ri of the first straight line having the width Mi and length L is measured. From this electrical measurement a width W m ι is extracted using Ohm's law. Then the resistance R2 of the second straight line having width M2 and the same length L is measured. From this second electrical measurement a width m 2 is extracted again using Ohm's law. Finally the resistance R12 of the third line structure is measured having length L. This third line structure is a non-straight structure as described above. From this third electrical measurement an equivalent width Wm . 12 i s extracted using Ohm's law. This equivalent width W m i2 is described as being equivalent because the width of the third line structure is not constant and therefore one can not determine a physical width for such a structure. In Fig.5A to Fig.5C this embodiment is illustrated for the case where both straight lines have the same length L and the non-straight line has the same length L. This third line structure is composed of two parts: the first region 504 L having width Mi and length — , the second region 505 having L width M2 and length — . These three measurements yield the following equations in this example. It should be mentioned that the offset not only occurs along the vertical lines, but along all sidewalls of the line structure. R ι = ϋ (4) d • W L m l l ' R 2 = - P • — L 2^-, (5; d W m2 L L R 12 = ϋ P L = p. 2 + (6) w ml2 d w ml w m2 The first width Mi, the second width M2 and the third width M12 may be determined using the following formulas: Mi = W ml + ΔS (7) M2 = m 2 + ΔS, and (8) Ml2 = w ml2 + ΔS, (9) wherein ΔS is an offset value representing an additive device error. Alternatively or additionally, the first width Mi and the second width M 2 may be determined further using the following formulas : Ml = W mi + 2 • S (10) M 2 = W m2 + 2 • S (11) ~ w ml2 • fr2 ■ m ι + Li • W m2 ) + W ml • W m2 • L 12 S = (12) Wml2 • < m2 - W ml ) wherein Li = li - S , ( 13 ) L 2 = 1 2 + S , ( 14 ) • p is a predetermined resistivity of the line structure material, d is the thickness of the line structure, Li is the length of the first straight line structure, • L 2 is the length of the second straight line structure, • R]_ is the electrical resistance of the first straight line structure, • R2 is the electrical resistance of the second straight line structure, and • L12 is the length of the third line structure, • R12 is the electrical resistance of the third line structure. • S is representing the half of the error of the electrical measurement with respect to the physical width, and thus is representing the sheath thickness. From this set of equations the real value of the width of the two straight structures can be calculated, resulting the real values Mi, M 2 . The offset value 2 • S represents the error of the electrical measurement and the measurement set-up is calculated with the same set of equations. Using this set of equations, the electrical measurement and measurement set-up is self-consistently calibrated. The range of width of the straight lines used can be limited so that an offset is obtained that is not dependent on the width. For every measurement sequence a different set of structures can be used, each set of structures having its own limited range of width. In general, a measurement sequence is used. First the resistance Ri, with i being an integer, of a first set of straight line structures, i.e. of a first set of straight lines comprising at least one straight line having width Mi and known length Li, is measured. From this electrical measurement for each straight line a width m i can be extracted using Ohm's law. Finally, the resistance Ri , with i and j being integers (i ≠ j), of a second set of structures of non-straight lines, comprising at least one non-straight line, is measured. In this context it should be mentioned that the second set of structures may comprise an arbitrary number (at least one) of portions having the width Mi and an arbitrary number (at least one) of portions having the width Mj . The total length of the second set of structures is the total sum over the partial lengths having the width M and the width Mj . The structures comprised in this second set of structures have known lengths Li j . From this electrical measurement an equivalent width m ij is extracted using Ohm's law. This width W ij is described as being equivalent because the width of these structures is not constant and therefore one can not determine a physical width for such a structure. These electrical measurements yield a set of equations, using Ohm's law, describing the resistance of the structures of the first and second set as a function of the known parameters, such as layer thickness d, layer resistivity p and length L and as function of the unknown parameters, i.e. the real width M and offset 2 • S . Since each structure of the second set can be decomposed into the structures of the first set, the resistance of each structure of the second set can be described as a function of the width m i of the structures of the first subset. From this set of equations the real value of the width Mi of the straight structures can be calculated, yielding the real values Mi. The offset 2 • S represents the error of the electrical measurement and measurement set-up is calculated with the same set of equations. Thus, the electrical measurement and measurement set-up is calibrated. The range of width of the straight lines used can be limited so that an offset is obtained that is not dependent on the width. In another embodiment of the invention a method is presented to monitor the contribution of changes in the patterning process itself. When changing the lithographic and post-lithographic processing, which is required to obtain electrically measurable patterned lines, also the offset 2 ■ S can change. So this value can be used to monitor this type of changes or to compare different patterning processes. In one embodiment of the invention the contribution of the line edge roughness (LER) is determined applying a method of one of the other embodiments. Ideally, the patterned line has a rectangular cross-section. However, in practice, the cross-section of the patterned line varies in a random way along the line, as can been seen from the changes in width, shape or slope of the line. The range of variation can be controlled by the changes in the patterning process. By measuring at least two lines having a different range of variation, e.g. a difference in slope or a difference in the amount of line edge roughness, the contribution of this variation can be determined. In another embodiment of the invention a method is presented to determine the contribution of changes in geometry to the patterning process itself. In this embodiment of the invention a measurement sequence is used. First the resistance Ri, with i being an integer, of a first set of structures of straight lines comprising at least one straight line, i.e. having a rectangular layout, having width Mi and known length Li, is measured. Finally the resistance Rij, with i and j being integers, of a second set of structures of non-straight lines, comprising at least one non-straight line, is measured. This second set of non-straight structures contains structures that are composed of the structures comprised in the first set of structures. The length of such a non- straight structure is equal to the sum of the lengths of the composing straight structures. In this case both straight lines have the same length L and the non-straight line has a length 2L. The resistance Rij of the non-straight lines should be equal to the sum of the previously measured resistance of the composing rectangular structures. The deviation between the measured resistance Rij and the calculated resistance can be used to determine the effect of changes in geometry and to optimize the lithographic process. According to a further embodiment of the invention a measurement sequence is used. First the resistance Ri of the first straight line having width Mi and length Li is measured. From this electrical measurement a width W m ι is extracted using Ohm's law. Then the resistance R2 of the second straight line having width M2 and the same length L2 is measured. From this second electrical measurement a width m 2 is extracted using Ohm' s law. Finally the resistance R12 of the third structure is measured having length L]_2- This third structure is a non-straight structure as defined in another embodiment of the invention. From this third electrical measurement an equivalent width Wml2 i extracted using Ohm's law. This width m i2 is described as being equivalent because the width of this third structure is not constant and therefore one can not determine a physical width for such a structure. In Fig.9 this embodiment is illustrated. The third line structure 900 is composed of two parts 901, 902 having a designed length of respectively Li and Lj , while the total designed length is Lij . The lengths Li and Lj of the composing parts to be taken into account during electrical measurements differ from this designed length due to the offset S. This offset not only occurs along the vertical lines, but along all sidewalls of the line structure. R ± = P • U (15) d W,mi Rπ = (16) W- Itl] - W,mi (L- W,mi + L-i ,ιrrj< + W,mi W,m3 L S = iD ;i8) Wm, ij • ( m j - W m i) Mj = W m j + 2 • S , (20 ) L = li - S , (21 ) Lj = lj + S . ( 22 ) From this set of equations the real value of the width of the two straight line structures can be calculated, yielding the real values. The offset 2 • S represents the error of the electrical measurement and measurement set-up is calculated with the same set of equations as is done above. Thus, the electrical measurement and measurement set-up is self-consistently calibrated. The range of width of the straight lines used can be limited so that an offset is obtained that is not dependant on width. For every measurement sequence a different set of structures can be used, each set of structures having its own limited range of width. Table 1 shows measurements of 180, 150 and 130nm lines. The width of the pinch stands respectively for each line 100, 70 and 50nm and the length 500nm. Table 1: 180nm line 150nm line 130nm line measured expected measured expected measured expecte d no pinch 141.5 112.1 95.7 100 nm 140.5 140.3 105.1 111.5 86.6 95.4 pinch 70 nm 138.8 139.2 104.1 110.9 86.2 94.9 pinch 50 nm 132.1 137.3 104.1 109.6 85.0 94.0 pinch Fig.10 shows a SEM picture of 50 x 500 nm pinch on a 180 nm line. The columns "expected" give a value calculated from the equation; L _ L pinch L ~ L pinch ' ; r \ ^- -> ) Wexp ected W mpinch W* line wherein L is the entire length (60μm), pi nc h is the length of a pinch (500nm) and m ϋ ne and W^ ^h are numbers given by ELM measurements on lines without any feature, i.e. straigth lines. A comparison of the measured and expected values leads to the conclusion: there is no unexpected behaviour. According to the combination of widths there are constant deviations from the expected values. These are related to the printing quality, which was proved for each combination on top-down SEM. A confirmation to this conclusion is given also by the following measurements. To investigate whether a transition from higher to lower linewidth is influencing the resistance of the line, and to get an information about the material loss due to proximity effects, additional lines were designed and measured. These change the width once and have lengths of the both sections equivalent to the bumped and pinched lines. An illustration of the design is given in Fig.10. The graphs in Fig.llA, Fig.llB, Fig.llC show the measured equivalent linewidth W m as a function of the number of bumps (Fig.llA) and pinches (Fig.llB). The values calculated from measured linewidths of blank lines are denoted again as "expected values". These are very close to the measurements of lines with single change of two widths . The offset to the featured lines increases with increasing number of features. A reason for that could partly be the material loss due to proximity effects, but also the effect of shortening of the bumps, e.g. due to sidewall passivation. No difference was seen between the two substrates used. The graphs are based on measurements of lines composed of doped amorphous silicon. In Fig.llC bumped, pinched and alternating lines are plotted together against the number of bumps (for pinched lines: 120 minus number of pinches) . The first line 1101 and a second line 1102 represent the calculated (expected) value respectively for combinations 180nm bump and 70 and 50nm pinch. The deviation of the measurements from the expected values increases with increasing number of features. This is explained with the effect of shortening of the bumps due to sidewalls passivation, but also with material loss due to proximity effects. The trend of the measured linewidth against the expected width of these alternate lines is shown in a diagram 1200 of Fig.12. The squares represent structures printed on poly-Si, and the circles such on amorph-Si. No difference in the behaviour of both substrates was observed. A trend for decreasing measured linewidth values becomes perspicuous for combinations, which have more than 80nm difference in the width of bumps and pinches. These structures might play a key role for further calibration considerations . A further point of the linearity study was the influence of bends on the electrical properties of polysilicon conductive lines of widths between 70 and 150nm. It was assumed that such influence would increase with increasing bend angle. Therefore, in the design, bends of 28°, 45° and 90° were included. To determine a possible change in the resistance, lines with different number of bends were measured, where an additive dependence of the effect of each bend was expected. In Fig.l3A, Fig.l3B, Fig.l3C the measured linewidths are shown as a function of the number of bends. There is no increase of the resistance. In contrast to this the resistance decreases slightly, which is explained with an enlargement of the line in the corners. Both curves in Fig.l3D are plotted as a function of the angle for lines with 4 and 8 bends. There is no visible dependence of the resistance in regards to the bend angle. Lines on the wafer were inspected with SEM to check the patterning quality in areas with different bends. The shape of the corners was slightly influenced by proximity effects, whereby the additional material seems to be more than the missing one. Additionally to that a small difference in the linewidth between vertical and tilted lines was observed. Our conclusion after the measurement of bending lines is that bends do not influence the electrical properties of poly lines for linewidths down to 70nm. The small changes in the measured linewidth are most likely due to properties of the e-beam printing and subsequent processing. As explained above top-down CD-SEM is the main metrology tool in the lithography. In Fig.14, the results obtained according to the present invention are compared with the CD-SEM results. Such a comparison can show the capability of the ELM to be an independent metrology technique and also for sub 0.1 μm technology nodes. The SEM measurements were done on top-down CD-SEM system KLA 8100XP using the 70% and 90% derivative algorithms. The correlation between both measurement techniques can be seen in Fig.14, where the linewidths measured by SEM are plotted against the ELM values. List of reference numbers 100 offset curve 101 straight line structure 200 electron beam exposure system 201 electron source 202 Wehnelt cylinder 203 arrow 204 anode 205 condensator plate 206 aperture 207 electron beam 208 magnetic lense 209 cylinder coil 210 cylinder coil 211 further magnetic lense 212 wafer 213 laser controlled movable table 300 wafer 301 module 310 contacting pad 311 straight line structure 312 straight line structure 313 straight line structure 314 straight line structure 315 straight line structure 316 first structure 400 four-wire connection scheme 401 line structure 402 contacting point 403 contacting point 404 current source 405 main body of the line structure 406 voltmeter 407 first lead 408 second lead 501 first straight line structure 502 second straight line structure 503 third straight line structure 504 first region third straight line structure 505 second region third straight line structure 601 first straight line structure 602 second straight line structure 603 third line structure 604 first line region 605 second line region 606 third line region 700 third line structure 701 first region 702 second region 703 third region 704 first lateral side third line structure 705 second lateral side third line structure 710 third line structure 711 first region 712 second region 713 third region 714 first lateral side third line structure 715 second lateral side third line structure 720 third line structure 721 first region 722 second region 730 third line structure 731 first region 732 second region 733 third region 734 fourth region 735 fifth region 801 first line 802 bump first line 803 second line 804 pinch second line 805 third line 806 bump third line 807 pinch third line 808 fourth line 809 U-shape fourth line 810 fifth line 811 width change fifth line 900 third line structure 901 part third line structure 902 part third line structure 200 diagram

Claims: Claims 1. Method for calibration of an electrical linewidth measurement system, comprising the following steps: • providing a calibration structure with a) a first straight line structure having a first width, b) a second straight line structure having a second width, wherein the second width is different from the first width, c) a third line structure comprising a first line portion having the first width and a second line portion having the second width, • determining an electrical resistance of the first straight line structure, • determining a measured width of the first straight line structure using the electrical resistance of the first straight line structure, • determining an electrical resistance of the second straight line structure, • determining a measured width of the second straight line structure using the electrical resistance of the second straight line structure, • determining an electrical resistance of the third line structure, • determining a measured width of the third line structure using the electrical resistance of the third line structure, • determining the first width, the second width and the third width using a) the measured width of the first straight line structure, b) the measured width of the second straight line structure, c) the measured width of the third line structure, • calibrating the electrical linewidth measurement system using the first width, the second width and the third width. 2. Method for calibration of an electrical linewidth measurement system according to claim 1, wherein the measured width of the first straight line structure, the measured width of the second straight line structure and the measured width of the third line structure is determined using formulas according to Ohm's law. 3. Method for calibration of an electrical linewidth measurement system according to claim 2, wherein the measured width W m ι of the first straight line structure, the measured width W m of the second straight line structure and the measured width W m ι 2 of the third line structure are determined using the following formulas: d R 2 w ml2 β £ . £12- d Rl2 wherein • p is a predetermined resistivity of the line structure material, • d is the thickness of the line structure, • Li is the length of the first straight line structure, • L 2 is the length of the second straight line structure, • Ri is the electrical resistance of the first straight line structure, • R 2 is the electrical resistance of the second straight line structure, • L12 is the length of the third line structure, and • R12 is the electrical resistance of the third line structure. 4. Method for calibration of an electrical linewidth measurement system according to claim 3, wherein the first width Mi, the second width 2 and the third width M12 are determined using the following formulas: M 2 = W m2 + ΔS , and Ml2 = ml2 + Δ S , wherein ΔS is an offset value representing an additive device error. 5. Method for calibration of an electrical linewidth measurement system according to any of the claims 1 to 4, wherein the first width Mi and the second width M 2 are determined further using the following formulas: Ml = W ml + 2 • S , M 2 = W m2 + 2 • S, wherein i = li - S, L 2 = 1 2 + S , • L12 is the length of the third line structure, and • S is representing the half of the error of the electrical measurement with respect to the physical width, and thus is representing the sheath thickness. 6. Method for calibration of an electrical linewidth measurement system according to any of the claims 1 to 5, wherein at least two of the following straight line structures have the same length: • the first straight line structure, • the second straight line structure, and/or • the third line structure. 7. Method for calibration of an electrical linewidth measurement system according to any of the claims 3 to 5, wherein • the first line portion having the first width has the same length as the first straight line structure, and • the second line portion having the second width has the same length as the second straight line structure. 8. Method for calibration of an electrical linewidth measurement system according to any of the claims 1 to 7, wherein the determined first width, the second width and the third width are used for the layout design of an electronic circuit. 9. Method for calibration of an electrical linewidth measurement system according to the claims 5 and 8, wherein the determined error of the electrical measurement with respect to the physical width is used for the layout design of an electronic circuit. 10. Wafer for being used in a method for calibration of an electrical linewidth measurement system according to one of the claims 1 to 9, comprising a calibration structure with • a first straight line structure having a first width, • a second straight line structure having a second width, wherein the second width is different from the first width, and • a third line structure comprising a first line portion having the first width and a second line portion having the second width. 11. Wafer according to claim 10, wherein at least two of the following straight line structures have the same length: • the first straight line structure, • the second straight line structure, and/or • the third line structure. 12. Electrical linewidth measurement calibration system comprising a processing unit which is adapted to execute the following steps for a calibration structure with a first straight line structure having a first width, a second straight line structure having a second width, wherein the second width is different from the first width, and a third line structure comprising a first line portion having the first width and a second line portion having the second width: • determining an electrical resistance of the first straight line structure, • determining a measured width of the first straight line structure using the electrical resistance of the first straight line structure, • determining an electrical resistance of the second straight line structure, • determining a measured width of the second straight line structure using the electrical resistance of the second straight line structure, • determining an electrical resistance of the third line structure, • determining a measured width of the third line structure using the electrical resistance of the third line structure, • determining the first width, the second width and the third width using a) the measured width of the first straight line structure, b) the measured width of the second straight line structure, c) the measured width of the third line structure, • calibrating the electrical linewidth measurement system using the first width, the second width and the third width. 13. Electrical linewidth measurement calibration system further comprising a wafer including the calibration structure.

Inventors: JONCKHEERE RIK, RANGELOV VENTZESLAV, SARSTEDT MARGIT, JONCKHEERE, RIK, RANGELOV, VENTZESLAV, SARSTEDT, MARGIT
Applicants: IMEC, INFINEON TECHNOLOGIES AG, JONCKHEERE RIK, RANGELOV VENTZESLAV, SARSTEDT MARGIT, JONCKHEERE, RIK, RANGELOV, VENTZESLAV, SARSTEDT, MARGIT
Application year: 2001
Main classification: G01B
IPC codes: G01B7