SEMICONDUCTOR DEVICE

Abstract: There is disclosed a semiconductor device, which allows the ripple rejection characteristics to be improved and the operating voltage to be reduced. The semiconductor device comprises a power supply circuit (4a) arranged between an input terminal (1) and internal circuits so as to make a connection therebetween, said power supply circuit (4a) including a transistor Q 41 for supplying each of the internal circuits with a drive voltage and another transistor Q 44 for allowing a current to pass therethrough in response to a magnitude of a reference voltage supplied to a base thereof and a magnitude of the drive voltage supplied to an emitter thereof. A part of the circuit composed of transistors Q 42 , Q 43 and a resistor R 5 controls a current flowing through of the transistor Q 41 based on the current that has passed through the transistor Q 44 , so that the drive voltage could be set to a value higher than the reference voltage approximately by a magnitude of a forward voltage between the base and the emitter of the transistor Q 44 .

Description: FIELD OF THE INVENTION The present invention relates to a technology for improving the ripple rejection characteristics and for reducing a minimum operating voltage of a semiconductor device. DESCRIPTION OF THE PRIOR ART A typical semiconductor device formed into ICs has internally a large number of basic functional circuits, such as amplifier circuits, comparator circuits, and/or reference voltage generator circuits, with high integration density. An example of such semiconductor device is a regulator IC comprising an internal circuit with a configuration shown in the circuit diagram of Fig. 2. Referring to the circuitry of Fig. 2, a main current path of a transistor Q 1 of PNP type is connected in series between an input terminal 1 and an output terminal 2, and a base of the transistor Q 1 is connected to a ground via a main current path of a transistor Q 2 of PNP type. A resistor R 13 is arranged between the base and an emitter of the transistor Q 1 and resistors R 1 and R 2 are arranged as connected in series between the output terminal 2 and a ground. There are also configured a power supply circuit 4b, a reference voltage generator circuit 5, and an error amplifier circuit 6, in which the power supply circuit 4b is arranged between the input terminal 1 and a power supply terminal for the reference voltage generator circuit 5 and the error amplifier circuit 6 to connect them together. One of the input terminals of the error amplifier circuit 6 is connected to an output terminal of the reference voltage generator circuit 5, while the other input terminal of the error amplifier circuit 6 is connected to a junction point of the resistor R 1 and the resistor R 2 , and an output terminal of the error amplifier circuit 6 is connected to a base of the transistor Q 2 . Herein, the power supply circuit 4b, the reference voltage generator circuit 5 and the error amplifier circuit 6 are respectively configured as described below. An emitter of a transistor Q 41 of PNP type is connected to the input terminal 1, and a collector thereof is connected via a resistor R 8 and a diode D 43 to a ground. A resistor R 3 is arranged between a base of the transistor Q 41 and the input terminal 1, a main current path of a transistor Q 42 of NPN type is arranged between the base of the transistor Q 41 and a ground, and a diode D 41 is arranged between the base and the collector of the transistor Q 41 . A base of the transistor Q 42 is connected via a resistor R 4 to a control input terminal 3, thus to configure the power supply circuit 4b. Further, to the collector of the transistor Q 41 , which is a component of the power supply circuit 4b, are connected the respective emitters of transistors Q 51 and Q 52 , each being of PNP type. Respective bases of the transistors Q 51 and Q 52 are connected with each other, and a collector and the base of the transistor Q 51 are interconnected. Each collector of the transistors Q 51 and Q 52 is respectively connected to each collector of NPN type transistor Q 53 or Q 54 . Respective bases of the transistors Q 53 and Q 54 are connected with each other, and the collector and the base of the transistor Q 54 are interconnected. An emitter of the transistor Q 53 is connected via a series circuit composed of resistors R 10 and R 11 to a ground, and an emitter of the transistor Q 54 is connected to a junction point of the resistors R 10 and R 11 . A main current path of a transistor Q 55 whose base is in connection with a junction point of the resistor R 8 and the diode D 43 of the power supply circuit 4b is arranged as connected in parallel with a main current path of the transistor Q 53 , thus to configure the reference voltage generator circuit 5. Then, each of emitters of PNP type transistors Q 61 and Q 62 is connected to the collector of the transistor Q 41 , which is a component of the power supply circuit 4b. Respective bases of the transistors Q 61 and Q 62 are connected with each other, and a collector and the base of the transistor Q 62 are interconnected. Each of collectors of the transistors Q 61 and Q 62 is respectively connected to each collector of NPN type transistor Q 63 or Q 64 . Respective emitters of the transistors Q 63 and Q 64 are connected with each other, and a resistor R 12 is arranged between a common junction point of the respective emitters and a ground. A base of the transistor Q 63 is connected to the collector and the base of the transistor Q 54 which is a component of the reference voltage generator circuit 5, and a base of the transistor Q 64 is connected to a junction point of the resistors R 1 and R 2 . A junction point of the collectors of the transistors Q 61 and Q 63 is connected to the base of the transistor Q 2 , thus to configure the error amplifier circuit 6. In the circuitry of Fig. 2, which has been configured as described above, an increased level of a control signal applied to the control input terminal 3 turns on the transistors Q 42 and Q 41 . Thereby, a drive voltage from an external power source connected to the input terminal 1 is supplied via the transistor Q 41 of the power supply circuit 4b to each of the internal circuitries of the reference voltage generator circuit 5 and the error amplifier circuit 6. In the reference voltage generator circuit 5 supplied with the drive voltage, upon starting the circuit, at first the transistor Q 55 is turned on, and a current mirror circuit composed of the transistors Q 51 and Q 52 is made operative. Secondarily, another current mirror circuit composed of the transistors Q 53 and Q 54 is made operative, which has been supplied with the current from the transistors Q 51 and Q 52 , and in turn the transistor Q 55 is turned off as the transistor Q 53 is turned on. After that, the activated reference voltage generator circuit 5 would generate a reference voltage of about 1.25V, based on a band gap of the semiconductor material, at the positions of collector and the base of the transistor Q 54 . On the other hand, in the error amplifier circuit 6, which has been supplied with the drive voltage, at first the transistor Q 63 supplied with the reference voltage conducts, and thereby the transistors Q 2 and Q 1 conduct. As the transistor Q 1 has conducted, an electric power from the input terminal 1 is transmitted via the transistor Q 1 to the output terminal 2, and thus an output voltage is generated on the output terminal 2. The output voltage generated on the output terminal 2 is divided by the resistors R 1 and R 2 , which in turn is supplied to the base of the transistor Q 64 . Subsequently, the transistor Q 64 conducts to make operative the current mirror circuit composed of the transistors Q 61 and Q 62 . After that, the activated error amplifier circuit 6 would control the current flowing through the transistors Q 2 and Q 1 in response to the reference voltage supplied to the transistor Q 63 and the divided voltage supplied to the transistor Q 64 so as to regulate the magnitude of the output voltage to be constant. In such a circuitry as shown in Fig. 2, the reference voltage generator circuit 5 and the error amplifier circuit 6 are connected via the transistor Q 41 in on-state and the input terminal 1 to the external power source. Owing to this configuration, if a voltage supplied from the external power source fluctuates, the reference voltage generator circuit 5 and the error amplifier circuit 6 would be subject to a direct effect of the voltage fluctuation. In addition, there has been a problem that each of the transistors Q 51 , Q 52, Q 61 and Q 62 , each being of PNP type, arranged in the power source side of each of the circuits 5 and 6 tends to suffer from the Early effect seriously when a high voltage is applied, or that the transistors of PNP type are subject to the effects of variations in various conditions in the manufacturing processes, resulting in the characteristic value of each product to be varied widely. Because of these reasons mentioned above, the circuitry employing the configuration of Fig. 2 is especially subject to the effect of the voltage fluctuation, which has made it difficult to improve and homogenize the ripple rejection characteristics against the fluctuation in the input voltage to the semiconductor device. For such a circuitry as shown in Fig. 2, an attempt has been made to improve the characteristics by designing the power supply circuit with a configuration as shown in Fig. 3. Referring to the circuitry of Fig. 3, each of emitters of PNP type transistors Q 48 and Q 49 is connected to the input terminal 1. Respective bases of the transistors Q 48 and Q 49 are connected with each other, and a collector and the base of the transistor Q 48 are interconnected. A resistor R 9 and a main current path of a transistor Q 42 are arranged between the collector of the transistor Q 48 and a ground to be connected in series, and a base of the transistor Q 42 is connected via a resistor R 4 to the control input terminal 3. A collector of the transistor Q 49 is connected to a base of a NPN type transistor Q 410 , and a plurality of diodes D 44 -D 48 is arranged between the collector of the transistor Q 49 and a ground to be connected in series. Then, a collector of the transistor Q 410 is connected to the reference voltage generator circuit 5 and the error amplifier circuit 6, and a power supply circuit 4c has been thus configured. In the power supply circuit 4c configured as described above, an increased level of control signal applied to the control input terminal 3 brings the transistor Q 42 into on-state so as to activate a current mirror circuit composed of the transistors Q 48 and Q 49 . A part of the current passed through the main current path of the transistor Q 49 flows via the serially connected diodes D 44 -D 48 into the ground, while the potential at a point of the base of the transistor Q 410 is raised up by a forward voltage generated in the diodes D 44 -D 48 . Subsequently, the transistor Q 410 operates so that a combined value of a voltage at a point of the emitter thereof and a voltage between the base and the emitter thereof is made equal to a voltage at a point of the base thereof, and thus a drive voltage to be supplied to the reference voltage generator circuit 5 and the error amplifier circuit 6 is made almost equal to a magnitude determined by subtracting the voltage between the base and the emitter of the transistor Q 410 from the total of forward drop voltages generated in the diodes D 44 -D 48 . Thereby, even if the input voltage would fluctuate, the fluctuation in the drive voltage could be controlled so as to be smaller than that in the input voltage, so that the ripple rejection characteristics of the semiconductor device against the fluctuation in the input voltage could be improved and homogenized. It should be noted that, when a reference voltage generator circuit of band gap type similar to that shown in Fig. 2 is employed as a reference voltage generator circuit 5 of Fig. 3, a drive voltage to be supplied to the reference voltage generator circuit 5 is required to have a voltage value of approximately equal to or more than 1.8V. In the circuitry with the configuration shown in Fig. 3, this drive voltage is determined by the total of the forward voltage drops of the diodes D 44 -D 48 . A magnitude of the forward voltage drop of a diode element is about 0.7V per one element at ambient temperature of about 20°C. To make the drive voltage be 1.8V or more, with a voltage between the base and the emitter of the transistor Q 410 taken into account, four pieces of diode elements are needed. However, since a diode element has a temperature characteristic of about -2mV/C°, another piece of diode must be added to make the drive voltage not to drop under 1.8V over the range of operating temperature of the semiconductor device. Accordingly, the power supply circuit 4c shown in Fig. 3 should have the total of five or more diode elements connected in series. In such a case, a voltage to be supplied from the external power source to the semiconductor device is required to have a voltage value equal to or more than 3.5V, which is equivalent to the total of the forward voltage drops of the diodes D 44 -D 48 added with the voltage between the collector and the emitter of the transistor Q 49 . However, the current market requires a semiconductor device to have a minimum operating voltage value of 2.5V, which has not been achieved by the semiconductor device employing the power supply circuit 4c of Fig. 3 which requires to have a voltage value equal to or more than 3.5V. However, in a prior art semiconductor device, as disclosed in JP patent publication No. 10027027, a differential amplifier outputs a control voltage by differentially amplifying the voltage levels of a reference voltage and internal power-supply voltage. A PMOS receives the control voltage through its gate and supplies it to the internal power-supply voltage. Nevertheless, this prior art comprises PMOS transistors requiring high operating voltage value. Accordingly, an object of the present invention is to provide a semiconductor device, which makes it possible to improve the ripple rejection characteristics and to reduce the operating voltage as well. SUMMARY OF THE INVENTION The above object can be accomplished by the present invention which provides a semiconductor device receiving a supply of an input voltage to an input terminal from an external power source, generating a drive voltage from the input voltage in a power supply circuit, and supplying the drive voltage to an inner circuit including a reference voltage generator circuit generating a reference voltage, characterized in that it comprises a first transistor for supplying the drive voltage to the inner circuit, a main current path of the first transistor being connected between the input terminal and the inner circuit and a second transistor for allowing a current to pass therethrough in response to a magnitude of the reference voltage and a magnitude of the drive voltage, one end of a main current path of the second transistor being connected to the first transistor to receive the drive voltage, the other end of the main current path of the second transistor being connected to one end of a main current path of the third transistor, and a control terminal of the second transistor being connected to the reference voltage generator circuit to receive the reference voltage, the other end of the main current path of the third transistor being connected to a ground and to one end of a main current path of a fourth transistor, the other end of the main current path of the fourth transistor being connected to a control terminal of the first transistor such that the drive voltage is set higher than the reference voltage by a value of a forward voltage drop generated on a PN junction of the second transistor, by controlling the conduction of the first transistor due to a current passing through the main current path of the second transistor. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit diagram of a semiconductor device of an embodiment according to the present invention; Fig. 2 is an exemplary circuit diagram of a conventional semiconductor device; and Fig. 3 is another circuit diagram of a conventional semiconductor device with improved characteristics. DESCRIPTION OF THE PREFERRED EMBODIMENTS A power supply circuit is introduced into a semiconductor device between an input terminal and an internal circuit including a reference voltage generator circuit so as to be connected therewith. The power supply circuit comprises; a first transistor whose main current path is arranged between the input terminal and the internal circuit for supplying a drive voltage to the internal circuit; and a second transistor for allowing a current to pass therethrough, in response to a magnitude of the reference voltage supplied to a control terminal from the reference voltage generator circuit and a magnitude of the drive voltage supplied to one end of the main current path. In response to the current passed through the second transistor, a current flowing through the first transistor is controlled so as to set the drive voltage to be lower than the voltage applied to the input terminal but to be higher than the reference voltage outputted from the reference voltage generator circuit. In specific, the drive voltage is set to a value higher than the reference voltage by the amount of forward voltage of a semiconductor element, which is to be the second transistor. Fig. 1 shows a circuit diagram of a semiconductor device according to an embodiment of the present invention, which can improve the ripple rejection characteristics and reduce an operating voltage. The circuit shown in Fig. 1 comprises a power supply circuit 4a, which is configured as described below. It is to be noted that in Fig. 1 the same reference numerals designates the components similar to those shown in Figs. 2 and 3. An emitter of a transistor Q 41 is connected to an input terminal 1, and a resistor R 3 and a diode D 41 are respectively arranged between a base and the emitter and between a collector and the base of the transistor Q 41 . The base of the transistor Q 41 is connected to a collector of a transistor Q 42 , and an emitter of the transistor Q 42 is connected to a ground via a series circuit composed of a diode D 42 and a resistor R 5 . A base of the transistor Q 42 is connected to a control input terminal 3 via a resistor R 4 and further the base of the transistor Q 42 is connected to a collector of a transistor Q 43 of NPN type. A base of the transistor Q 43 is connected to the emitter of the transistor Q 42 , and an emitter of the transistor Q 43 is connected to a ground. The collector of the transistor Q 41 is connected to an emitter of a transistor Q 44 of PNP type, a collector of the transistor Q 44 is connected to an emitter of a transistor Q 45 of PNP type, and a collector of the transistor Q 45 is connected to a junction point of the diode D 42 and the resistor R 5 . Respective bases of two NPN type transistors Q 46 and Q 47 are connected with each other, and emitters thereof are connected respectively to grounds. A collector and the base of the transistor Q 46 is connected to each other and the collector of the transistor Q 46 is connected to a base of the transistor Q 45 . A collector of the transistor Q 47 is connected via a resistor R 7 to a base of the transistor Q 41 , and the base of the transistor Q 44 is connected via a resistor R 6 to a circuit point of a reference voltage generator circuit 5 where a reference voltage is obtained, thus to configure the power supply circuit 4a. It should be noted that the rest of the circuitry of Figs. 1 and 2 is the same with the circuitry of Fig. 2, except that in Fig. 1 a base of a transistor Q 55 for activating the reference voltage generator circuit 5 is connected to the emitter of the transistor Q 42 . In the circuit of the configuration as shown in Fig. 1, the power supply circuit 4a supplies the reference voltage generator circuit 5 and an error amplifier circuit 6 with a drive voltage in a manner as described below. As a level of a control signal applied to the control input terminal 3 are getting higher, the transistor Q 41 together with the transistor Q 42 conducts to supply the drive voltage from the power supply circuit 4a to the respective internal circuits of the reference voltage generator circuit 5 and the error amplifier circuit 6. Herein, the transistor Q 43 serves so as to stabilize a base current of the transistor Q 42 in response to a voltage generated on the series circuit composed of the diode D 42 and the resistor R 5 . Owing to the fact that the transistor Q 55 conducts immediately after the transistor Q 42 has conducted, the reference voltage generator circuit 5 starts to operate so as to generate a reference voltage of about 1.25V at the points of base and collector of the transistor Q 54 . This reference voltage is supplied to the error amplifier circuit 6, and at the same time, is also supplied via the resistor R 6 to the base of the transistor Q 44 of the power supply circuit 4a. Herein, when the drive voltage generated on the point of collector of the transistor Q 41 is to get higher than the predetermined voltage value, a current flow from the collector of the transistor Q 44 via the main current path of the transistor Q 45 into the resistor R 5 is increased. This raises a voltage between the terminals of the resistor R 6 and thereby the flow rate of the base current of the transistor Q 41 flowing through the transistor Q 42 is reduced. As a result, the voltage between the collector and the emitter of the transistor Q 41 is increased and thereby the drive voltage is controlled so as not to exceed said predetermined voltage value. It should be appreciated that the predetermined voltage value designated in the circuit of the configuration shown in Fig. 1 is almost equal to a total voltage value of the reference voltage supplied to the base of the transistor Q 44 added with the forward voltage between the base and the emitter of the transistor Q 44 . Since in the configuration of Fig. 1 the reference voltage is 1.25V and the forward voltage between the base and the emitter of the transistor Q 44 is approximately 0.65V, the drive voltage supplied to the reference voltage generator circuit 5 is to be set to a value of about 1.9V by the power supply circuit 4a. Even if the voltage supplied from an external power source fluctuates, the operation of said power supply circuit 4a for setting the drive voltage as described above can significantly reduce the effect of the fluctuation on the voltage supplied to the reference voltage generator circuit 5 and the error amplifier circuit 6. Accordingly it is turned out that the apparent ripple rejection characteristics of each circuit within a semiconductor device could be improved. In addition, with the drive voltage of 1.9V and the voltage between the collector and the emitter of the transistor Q 41 taking into account, the semiconductor device employing the circuit configuration shown in Fig. 1 can reduce a minimum operating voltage to about 2V, thus to accomplish the voltage reduction in the operating voltage. It should be noted that a current mirror circuit composed of the transistors Q 46 and Q 47 serves to correct the base currents of the transistors Q 44 and Q 45 . Further, in this operation, the transistor Q 41 shown in Fig. 1 has a function as a switch for turning on/off the drive voltage to be supplied to an internal circuit, such as the reference voltage generator circuit 5, in response to a level of a control signal applied to the control input terminal 3, as well as a function as a voltage control element for stabilizing the drive voltage. Furthermore, the part of circuit composed of the transistors Q 42 and Q 43 and the resistor R 5 has a function as a constant current circuit for providing a stable base current of the transistor Q 41 as well as a function as a control circuit for controlling the base current of the transistor Q 41 in response to a current signal entered from the transistor Q 44. Although in the embodiment of the present invention described above, the circuit diagram shown in Fig. 1 represents a configuration of series regulator as a whole, the present invention is not limited to this application but is applicable to other various semiconductors equipped with an internal circuit including a reference voltage generator circuit. Further, although the embodiment of Fig. 1 shows a semiconductor device with a configuration which comprises the control input terminal 3 and allows the operation thereof to be externally turned on/off, the semiconductor may have a configuration in which, for example, one end of the resistor R 4 is not connected to the control input terminal 3 but is connected to the input terminal 1 so as to prohibit the operation from being externally turned on/off. Still further, various modifications may be applied to the circuit configuration without departing from the spirit and scope of the present invention, including that the diode D 42 in the power supply circuit 4a may be omitted, and/or that the reference voltage generator circuit 5 may be designed with other configuration. As having been described above, a semiconductor device according to the present invention comprises a power supply circuit introduced between an input terminal and an internal circuit so as to be connected therewith, said power supply circuit including a first transistor for supplying the internal circuit with a drive voltage and a second transistor for allowing a current to pass therethrough in response to a magnitude of a reference voltage outputted from a reference voltage generator circuit and a magnitude of the drive voltage. Herein, the power supply circuit is characterized in that it controls a current flowing through the first transistor based on the current passed through the second transistor so that the drive voltage could have a magnitude higher than the reference voltage outputted from the reference voltage generator circuit by a magnitude of a forward voltage of a semiconductor element. Thereby, the operation of the power supply circuit for setting the drive voltage can significantly reduce the effect of the fluctuation in the supply voltage on the internal circuitry thus to improve the ripple rejection characteristics of the semiconductor device. Further, owing to the fact that the drive voltage is set to the value higher than the reference voltage by the magnitude of the forward voltage of the semiconductor element, an operating voltage of the semiconductor device could be also reduced. Therefore, according to the present invention, an innovative semiconductor device may be provided, which allows the ripple rejection characteristics to be improved and also the drive voltage to be reduced.

Claims: A semiconductor device receiving a supply of an input voltage to an input terminal (1) from an external power source, generating a drive voltage from said input voltage in a power supply circuit (4a), and supplying said drive voltage to an inner circuit (5, 6) including a reference voltage generator circuit (5) generating a reference voltage, a first transistor (Q 41 ) for supplying said drive voltage to said inner circuit (5, 6), a main current path of said first transistor (Q 41 ) being connected between said input terminal (1) and said inner circuit (5, 6); characterized in that it comprises and a second transistor (Q 44 ) for allowing a current to pass therethrough in response to a magnitude of said reference voltage and a magnitude of said drive voltage, one end of a main current path of said second transistor (Q 44 ) being connected to said first transistor (Q 41 ) to receive said drive voltage, the other end of the main current path of the second transistor (Q 44 ) being connected to one end of a main current path of a third transistor (Q 45 ), and a control terminal of said second transistor (Q 44 ) being connected to said reference voltage generator circuit (5) to receive said reference voltage, the other end of the main current path of the third transistor (Q 45 ) being connected to a ground and to one end of a main current path of a fourth transistor (Q 42 ), the other end of the main current path of the fourth transistor (Q 42 ) being connected to a control terminal of the first transistor (Q 41 ); such that said drive voltage is set higher than the reference voltage by a value of a forward voltage drop generated on a PN junction of said second transistor (Q 44 ), by controlling the conduction of said first transistor (Q 41 ) due to a current passing through said main current path of said second transistor (Q 44 ). A semiconductor device in accordance with claim 1, in which said reference voltage generator circuit (5) is of a band gap type.

Inventors: HOSONO RINYA, KIYA YUKINORI, KOUCHI TAKEYUKI, SOGABE TAKASHI, HOSONO, RINYA, KIYA, YUKINORI, KOUCHI, TAKEYUKI, SOGABE, TAKASHI, HOSONO, Rinya Saitama Plant, Toko, Inc., KIYA, Yukinori Saitama Plant, Toko, Inc., KOUCHI, Takeyuki Saitama Plant, Toko, Inc., SOGABE, Takashi Saitama Plant, Toko, Inc.
Applicants: TOKO INC, TOKO, INC.
Application year: 2000
Main classification: G05F1
IPC codes: G05F1, H01L27, H01L21