Wafer holding plate for wafer grinding apparatus and method for manufacturing the same.

Abstract: A wafer holding plate for a wafer grinding apparatus. The plate includes a substrate (B1) having a wafer adhering surface (6a) to which a semiconductor wafer is adhered by an adhesive. The wafer adhering surface includes a mirror-like surface portion and a groove pattern (10), which anchors the adhesive. When the plate is used for grinding wafers, the quality and accuracy of the finished wafers is greatly improved.

Description: The present invention relates to a wafer holding plate used for wafer grinding apparatuses and a method for manufacturing the same. Apparatuses for grinding the surface of a semiconductor wafer, such as a lapping machine or a polishing machine, are known in the prior art. A typical wafer grinding apparatus includes a table, which is fixed to a cooling jacket, and a wafer holding plate. The plate has a wafer adhering surface to which an adhesive, such as a thermoplastic wax, is applied. The adhesive attaches a semiconductor wafer to the plate. Since the wafer adhering surface is flat, the adhesive must be relatively thick to ensure adhesion of the semiconductor wafer. It is difficult to apply the adhesive uniformly. As a result, parallelism between the wafer adhering surface and the semiconductor wafer is not achieved, which causes the semiconductor wafer to be held obliquely. Therefore, it is difficult to achieve highly accurate grinding. Furthermore, if the surface of the plate is rough, the lands and pits of the plate surface are transferred to the rear surface of the wafer (the surface adhered to the plate) when the plate holding the wafer is pressed against a grinding surface. This decreases the accuracy and quality of the semiconductor wafer. Additionally, production efficiency decreases because wafers have to be reground to correct dimensions. EP-A-1020253 (prior art document according to Article 54(3)EPC) discloses a wafer holding plate having a roughness of 0.5µm to 1.5µm. It is an object of the present invention to provide a wafer holding plate for a wafer grinding apparatus that can manufacture a semiconductor wafer with high accuracy and high quality. To achieve the above object, the present invention provides a wafer holding plate used in a wafer grinding apparatus, including a wafer holding plate used in a wafer grinding apparatus including a substrate having a wafer adhering surface to which a semiconductor wafer can be adhered by an adhesive, characterised in that the wafer adhering surface has a groove pattern formed thereon and a surface roughness Ra of no greater than 0.1µm. Other aspects and advantages of the present invention will become apparent from the following description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention. The invention and preferred objects and advantages thereof, may best be understood by reference to the following description of the certain exemplifying preferred embodiments together with the accompanying drawings in which: Fig. 1 is a schematic diagram showing a wafer grinding apparatus according to an of the present invention; Fig. 2 is a schematic plan view showing a wafer holding plate of the apparatus of Fig. 1; Fig. 3 is a schematic cross-sectional view taken along line 3-3 in Fig. 2; Figs. 4(a) to 4(c) are schematic cross-sectional views illustrating the procedures for manufacturing the plate of Fig. 2; Fig. 5 is a schematic cross-sectional view showing a wafer holding plate not falling within the scope of the present invention; Figs. 6(a) to 6(d) are schematic cross-sectional views illustrating the procedures for manufacturing the plate of Fig. 5; Fig. 7 is a schematic cross-sectional view showing a wafer holding plate according to a second embodiment of the present invention; Fig. 8 is a schematic cross-sectional view showing a wafer holding plate according to a third embodiment of the present invention; and Figs. 9(a) to 9(c) are schematic cross-sectional views showing the procedures for manufacturing the plate of Fig. 5. In the drawings, like numerals are used for like elements throughout. Fig. 1 is a schematic view showing a wafer grinding apparatus 1 according to a first embodiment of the present invention. The wafer grinding apparatus 1 is a lapping machine for grinding a wafer slice. The wafer was sliced during a bare wafer process. Further, the wafer grinding apparatus 1 includes a round metal table 2, which is preferably made of stainless steel or the like. The table 2 has an upper surface, or grinding surface 2a, on which the semiconductor wafer 5 is ground. A grinding cloth (not shown) is adhered to the grinding surface 2a. The table 2 is fastened to a round cooling jacket 3 by bolts (not shown). The cooling jacket 3 is supported horizontally by a cylindrical rotary shaft 4. Coolant W circulates through a flow passage extending through the interior of the cooling jacket 3. The wafer grinding apparatus 1 has a plurality of (e.g., two) wafer holding plates 6 (also known as pusher plates, only one shown). Each of the wafer holding plates 6 is formed from a circular substrate B1. The substrate B1 has an upper surface 6b, the center of which is fixed to a pusher rod 7 of a drive apparatus (not shown). A wafer adhering surface 6a is on the opposite, lower side of the substrate B1 and faces the grinding surface 2a of the table 2. The pusher rod 7 supports the wafer holding plate 6 so that the wafer adhering surface 6a is parallel to the grinding surface 2a. Each pusher rod 7 rotates integrally with the associated plate 6 and moves vertically within a predetermined range. A plurality of semiconductor wafers 5 are adhered to the wafer adhering surface 6a of the plate 6 by a thermoplastic wax 8. The front surface of each wafer 5 faces the grinding surface 2a. The wafer grinding apparatus 1 presses the plate 6 against the grinding surface 2a with a predetermined force so that the wafers 5 contact the grinding surface 2a. It is preferred that the wafer holding plates 6 be formed from a sintered ceramic body. Further, it is preferred that the sintered ceramic body have a high density and be made of a material such as sintered ceramic silicide or sintered ceramic carbide. In the first embodiment, the wafer holding plates 6 are formed from a sintered silicon carbide (SiC) body. The preferred density of the sintered ceramic body is 2.7g/cm 3 or higher. It is more preferred that the density be 3.0g/cm 3 or higher and most preferred that the density be 3.1g/cm 3 or higher. This is because the thermal conductivity increases when the density of the sintered body increases. The preferred thermal conductivity is 30W/mK or higher. It is more preferred that the thermal conductivity be within the range of 80W/mK to 200W/mK. If the thermal conductivity is too low, it is difficult to keep the temperature of the sintered body uniform. A non-uniform temperature limits accuracy and quality and hinders manufacture of semiconductor wafers 5 that have a large diameter. On the other hand, it is difficult to find stable, inexpensive materials that have a thermal conductivity higher than 200W/mK. With reference to Figs. 2 and 3, the wafer adhering surface 6a is a mirror-like surface having a surface roughness Ra of 0.1µm or less. An anchoring groove pattern 10 is formed in the wafer adhering surface 6a. The anchoring groove pattern 10 includes a plurality of straight grooves 9. The grooves 9 are equally spaced from one another and arranged in a grid-like manner. In other words, the groove pattern 10 is formed by intersecting a plurality of the grooves 9 with each other. It is preferred that the grooves 9 occupy about 1% to 50% of the wafer adhering surface 6a. It is further preferred that the grooves 9 occupy about 1% to 20% of the adhering surface 6a. It is preferred that the width of the grooves be about 50µm to 500µm. If the width is less than 50µm, the wax 8 cannot be properly anchored to the adhering surface 6a. This makes it difficult to apply the wax 8 uniformly, which in turn, makes it difficult to improve wafer parallelism. On the other hand, if the width exceeds 500µm, the pits and lands formed by the grooves 9 may be transferred to the wafers 5 and affect the quality of the wafers 5. It is preferred that the grooves 9 have a depth of about 20µm to 100µm. If the depth of the grooves 9 is less than 20µm, the grooves 9 may not properly function as anchors. On the other hand, if the depth of the grooves 9 exceeds 100µm, pits and lands formed by the grooves 9 may be transferred to the wafers 5. A method for manufacturing the plates 6 will now be described. A plate-like substrate B1 is first prepared. The preferred embodiment uses "SC-850" which is a dense sintered silicon carbide body produced by IBIDEN KABUSHIKI KAISHA. The sintered body has a density of 3.1 g/cm 3 and a thermal conductivity of 150W/mK. The substrate B1 may be formed from a dense sintered ceramic body produced through a normal procedure during which a ceramic raw material forming step, a molding step, and a baking step are sequentially performed. The wafer adhering surface 6a of the substrate B1 is then ground to obtain a mirror-like surface, the surface roughness Ra of which is 0.1µm or less. The surface grinding is performed by using a hard silicon carbide grinding fixture. After the grinding process, the wafer adhering surface 6a is sandblasted. A mask 11 is used in the sandblasting to form the grooves 9. The sandblasting process will now be discussed with reference to Figs. 4(a) to 4(c). Before performing the sandblasting process, the mask 11, which is grid-like to conform with the groove pattern 10, is applied to the wafer adhering surface 6a. The mask 11 exposes the locations of the grooves 9 to abrasive grains 14 and protects other parts of the wafer adhering surface 6a from the abrasive grains 14. When a direct printing method is employed to form the mask 11, a photosensitive resin R1 is uniformly applied to the substrate B1. Ultraviolet rays are then irradiated toward the photosensitive resin R1 through a photomask 12 to selectively expose portions corresponding to the grooves 9 to the ultraviolet rays (Fig. 4(a)). An urethane or acrylic resin having photosensitivity may be used as the photosensitive resin R1. Subsequently, the photosensitive resin R1 is developed, washed, and dried. Afterward, the unexposed portions of the photosensitive resin R1 are removed to form slits 13 (Fig. 4(b)). When an indirect printing method is employed to form the mask 11, a film mask 11 having the slits 13 is positioned on and adhered to the wafer adhering surface 6a of the substrate B1. Regardless of the printing method, the mask 11 is required to have a thickness that can resist sandblasting. More specifically, it is preferred that the mask 11 have a thickness of 50µm to 300µm. During the sandblasting process, the abrasive grains 14 are blasted against the substrate B1 from a nozzle 15 (Fig. 4(c)). The conditions required for the sandblasting process will now be discussed. 1) Type of the abrasive grains 14: GC (can be altered to C, WA, or A) 2) Size of the abrasive grains 14: #180 to #1000 (selected from this range in accordance with the width and depth of the grooves 9) 3) Blasting pressure: 3.0kg/cm 2 to 5.0kg/cm 2 4) Distance between the nozzle 15 and the mask: 20mm to 150mm The blasted abrasive grains 14 etch the wafer adhering surface 6a and form the grooves 9, which have the predetermined width and depth at positions corresponding to the slits 13. After the sandblasting process, the mask 11 is removed and the wafer holding plate 6 is completed. The advantages of the first embodiment will now be discussed. (1) The wafer holding plate 6 is provided with the anchoring groove pattern 10 formed on the wafer adhering surface 6a. The groove pattern 10 functions as an anchor that causes the wax 8 to adhere the plate 6. This enables application of a thin, uniform layer of the wax 8 and improves the parallelism of the wafers 5. This produces high-quality, accurate semiconductor wafers 5. Further, the adhesiveness of the wax 8 does not decrease. This prevents various sizes of the semiconductor wafers 5 from being displaced or from falling off from the wafer holding plate 6 after the wafers 5 are ground. The portions of the wafer adhering surface 6a between the grooves 9 are mirror-like and finished to have a surface roughness Ra of 0.1µm. These portions do not transfer land and pits to the rear surface 5b of the wafers 5. Accordingly, corrections made to eliminate such transferred lands and pits are not required. This improves the manufacturing efficiency. (2) The density of the substrate B1 of each wafer holding plate 6 is 2.7g/cm 3 or more, and the substrate B1 is a dense sintered ceramic body having a thermal conductivity of 30W/mK or more. Accordingly, the binding between crystal grains is strong and the number of pores is relatively low in the wafer holding plates 6. Further, the wafer holding plates 6 are very corrosion-resistant. The dense sintered silicon carbide substrate B1 has high rigidity, a low coefficient of thermal expansion, and a high coefficient of thermal conductivity. Further, the wafer holding plates 6 resist thermal deformation and thermal shocks. Accordingly, the employment of the wafer holding plates 6 produces semiconductor wafers 5 with higher accuracy and quality. Further, wafers having larger diameters can be processed. (3) The grooves 9 of the groove pattern 10 have a width of 50µm to 200µm and a depth of 20µm to 100µm. This maximizes the anchoring effect of the groove pattern 10 and thus increases the accuracy and quality of the semiconductor wafers 5. (4) When manufacturing the wafer holding plates 6, after grinding, the wafer adhering surface 6a is blasted process with the mask 11 in place. The grinding reduces the surface roughness Ra of the wafer adhering surface 6a. The mask 11 blocks certain areas of the substrate B1 and forms a plurality of the narrow grooves 9 in an accurate and inexpensive manner. Further, the mask 11 protects the ground wafer adhering surface 6a from the abrasive grains 14. Thus, the surface roughness Ra of the areas other than the grooves 9 is unchanged by the sandblasting. Accordingly, the plates 6 are formed inexpensively and accurately. (5) The sandblasting process is employed to form the groove pattern 10. Therefore, a rotating tool such as a grindstone is not needed and the problems associated with such tools do not occur. By using the abrasive grains 14, which are far smaller than a grindstone, the narrow grooves 9 are formed relatively easily without increasing costs. Accordingly, the plates 6 can be manufactured in an inexpensive manner regardless of the size, shape, and number of the grooves formed on the wafer adhering surfaces 6a. Sandblasting is very effective when working with hard materials such as the substrate B1. Fig. 5 is a cross-sectional view showing a wafer holding plate 60 not falling within the scope of the present invention. The wafer holding plate 60 includes a substrate B1 having a mirror-like surface 60a. An anchoring groove pattern 10 is formed in the mirror-like surface 60a. The anchoring groove pattern 10 includes a plurality of generally V-shaped grooves 90. As shown in Figs. 5 and 6(d), the edges of the grooves 90 are curved. That is, the edges of the grooves 90 are not squared. Further, the grooves 90 each have a rounded bottom surface. In other words, the edges and the walls of each groove do not have angled surfaces where internal stress would concentrate. With reference to Figs. 6(a) to 6(d), the grooves 90 are formed by applying the mask 11 to the substrate B1 and sandblasting abrasive grains 14 from the nozzle 15 against the substrate B1. In this process, the amount of abrasive grains 14 blasted against a first portion of the substrate B1, which is located directly below the nozzle 15, is greater than that blasted against the portions adjacent to the first portion, or a second portion of the substrate B2. Accordingly, the first portion is etched at a faster speed than the second portion. Thus, the bottom of each groove 90 is formed at the location corresponding to the first portion as shown in Fig. 6(d). The abrasive grains 14 form edges that are curved and not squared. In other words, when the wafer adhering surface 6a is sandblasted, formation of the grooves 90 and the rounding of the groove edges are performed simultaneously. Here, the edges of the grooves 90 in the groove pattern 10 of each wafer holding plate 60 are rounded. Since the grooves 90 do not have squared edges, the groove edges are less likely to break. Accordingly, there are no places where particles are likely to break apart from the grooves 10. Therefore, lands and pits are not transferred to the wafers 5. Thus, the wafers 5 are neither scratched nor damaged. Since correction of transferred lands and pits is not needed, the manufacturing efficiency is improved. The formation and rounding of the grooves 90 are performed simultaneously. Accordingly, the grooves 90 having curved edges are formed within a short period of time. The plates 6 are thus formed inexpensively and efficiently. It should be apparent to those skilled in the art that the present invention may be embodied in many other specific forms. Particularly, it should be understood that the present invention may be embodied in the following forms. (1) The groove pattern 10 formed on the substrate B1 does not necessarily have to be grid-like. For example, the groove pattern 10 may be generally web-like, as shown in Fig. 7. The groove pattern 10 of Fig. 7 includes a plurality of concentric, circular grooves 9 and a plurality of radially extending grooves 9. As shown in Fig. 8, a plurality (e.g., five) of the web-like groove patterns 10 may be formed on the wafer adhering surface 17a of the wafer holding plate 17. The size of each groove pattern 10 is substantially the same as the outer dimensions of the semiconductor wafer 5 held on the pattern 10. (2) Other than the grid-like or web-like patterns, the groove pattern 10 may take any form that has a plurality of intersections. The groove pattern 10 may also be formed without intersections. (3) In addition to silicon carbide, silicon nitride (Si 3 N 4 ) or sialon may be used for the sintered ceramic silicide body from which the substrate B1 is formed. In this case, it is preferred that a body having a density of 2.7g/cm 3 be used. (4) In addition to silicon carbide, boron carbide (B 4 C) may be used for the sintered ceramic carbide body from which the substrate B1 is formed. In this case, it is preferred that a body having a density of 2.7g/cm 3 be used. (5) The substrate B1 may be formed from a material other than a sintered ceramic such as metal. (6) The grooves 9 may be formed through processes other than sandblasting. For example, the grooves 9 may be formed through a dry blasting process, such as shot blasting, or through a wet blasting process, such as liquid honing. (7) During manufacture of the plates 6, the blasting process may be performed to form the grooves before grinding the wafer adhering surface 6a. (8) In the illustrated embodiments, the wafer holding plate 6 is applied to a pusher plate of a lapping machine. However, the wafer holding plate 6 may also be applied to a polishing plate of a polishing machine. (9) As it is shown in Figs. 9(a) to 9(c), the formation and the rounding of the grooves 90A may be performed separately. The grooves 90A are first ground by a grindstone 18 in the wafer adhering surface 6a of the substrate B1. In this state, the grooves 90A have squared edges. The grooves 90A are then sandblasted so that the edges and bottom surface are rounded by abrasive grains. This removes the squared portions formed during grinding. In this case, the sandblasting process may be performed without the mask 11 as shown in Fig. 9(c) or with the mask 11. (10) In an embodiment not falling within the scope of the invention, the grooves 90 may be formed so that they have curved edges and flat bottoms. The present examples and embodiments are to be considered as illustrative and not restrictive.

Claims: A wafer holding plate used in a wafer grinding apparatus including a substrate (B1) having a wafer adhering surface (6a) to which a semiconductor wafer can be adhered by an adhesive, characterised in that the wafer adhering surface has a groove pattern (10) formed thereon and a surface roughness Ra of no greater than 0.1µm. The plate according to claim 1, characterised in that the substrate is formed from a body made of ceramic silicide or ceramic carbide, wherein the body has a density of at least 2.7g/cm 3 . The plate according to claim 1 or 2, characterised in that the substrate is formed from a body made of sintered silicon carbide, wherein the body has a density of at least 2.7g/cm 3 and a thermal conductivity of at least 30W/mK. The plate according to one of claims 1 to 3, characterised in that the groove pattern includes grooves (9) having a width of 50µm to 500µm. The plate according to one of claims 1 to 4, characterised in that the groove pattern occupies 1% to 20% of the wafer adhering surface.

Inventors: ISHIKAWA SHIGEHARU, JIMBO NAOYUKI, MISHIMA ATSUSHI, OKUDA YUJI, ISHIKAWA, SHIGEHARU, JIMBO, NAOYUKI, MISHIMA, ATSUSHI, OKUDA, YUJI, Ishikawa, Shigeharu, c/o Ibiden Co. Ltd., Jimbo, Naoyuki, c/o Ibiden Co. Ltd., Mishima, Atsushi, c/o Ibiden Co. Ltd., Okuda, Yuji, c/o Ibiden Co. Ltd.
Applicants: IBIDEN CO LTD, IBIDEN CO., LTD.
Application year: 2000
Main classification: B24B37
IPC codes: B24B41, B24C1, B24B37, B24C3, B24B7