LCD CONTROL CIRCUITRY

Abstract: A control circuit (50, 150) for a liquid display device (60) has LCD drivers (61, 62) incorporating respective memories and a programmable controller (70, 170) operatively connected between the drivers and an external microprocessor (100) across an external interface (11). The device may incorporate a transparent touch panel (80) overlying the display device (60). The interface (11) comprises intelligent serial and/or parallel connections incorporating data, control and clock lines. A device incorporating the control circuit has "sleep", "idle" and "active" modes, the drivers (61, 62) operating in the "idle" mode.

Description: LCD CONTROL CIRCUITRY The present invention relates to control circuitry for LCD display devices and especially to those with low-power requirements. Existing control circuits comprise a control chip and an associated memory, the chip being connected to relatively simple driver circuits for a LCD display. However, they consume a relatively large amount of power and are limited to the number of pixels they can control on a single display device. Also, they operate relatively slowly. The control chip can be moved outside the device, but this increases the complexity and cost of the external control required. The present invention seeks to overcome or reduce one or more of the above disadvantages. According to the present invention there is provided a control circuit for a liquid crystal display device comprising driver circuits for the device, each driver circuit having a respective memory section, characterised in that the control circuit further comprises a controller operatively connected between an external interface of the control circuit and the driver circuits. The presence of the controller provides the advantage of on-board intelligence, whereas the incorporation of memory sections in the driver circuits permits the display to be self-refreshing. This has important implications for power consumption. In preferred embodiments the controller is programmable, which enables an extremely flexible and useful device to be provided. In particular, in addition to providing control functions associated with the liquid crystal display device, the controller may also provide functions associated with a transparent touch panel overlying the display device and/or a separate keyboard and/or separate switches. The external interface may comprise a plurality of intelligent serial and or parallel connections. By reducing the number of input lines, less interference is caused to radio f equency signals. A liquid crystal device incorporating a control circuit as set out above may have sleep, idle and active modes. In the idle mode, the controller and the interface are "off but the LCD driver circuits are still operative. Such an arrangement has the advantage of further reducing power consumption and leads to a longer battery life. The contents of the memory sections of the driver circuits are preferably entered by a user/customer of the L.C.D. device. To this end, a customer's microprocessor, external to the control circuit, can communicate directly with the driver circuit memory sections. For example, the data entered by the user/customer may relate to the selection and configuration of graphic images or characters which may be shown by the display device. Preferred embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, of which: Fig. 1 is a block circuit diagram of a first prior art control circuit; Fig. 2 is a block circuit diagram of a second prior art control circuit; Fig. 3 is a block circuit diagram of a first control circuit in accordance with the present invention; and Fig. 4 is a block circuit diagram of a second control circuit in accordance with the present invention. Referring to the drawings, Fig. 1 shows a prior art LCD control circuit 10 connected via interface 11 to an external microprocessor 100. Graphic display panel 20 typically comprises 128 x 240 pixels which are driven at one edge by two MSM 5260 driver circuits 21, 22 and along a perpendicular edge by three MSM 5260 driver circuits, 23, 24, 25. The abbreviation COM refers to common rows of pixels and the abbreviation COL refers to columns of vertical pixels. The driver circuits are effectively "dumb" and typically consume 5 mA each. They are controlled by a display controller T6963 or HD44780 circuit 30 to which they are connected via standard drive output serial lines 32, 33. The circuit 30 typically consumes 15 mA and has a fixed program. It is associated with an 8K random access memory 31. Circuit 10 further includes a drive voltage circuit 40 and a backlight circuit 41. Interface 11 is 12-way, comprising 8 data bits, represented by bi-directional data bus lines DB0-DB7, and 4 control lines, including the clock function and a power connection. The data bus lines operate at a maximum rate of 5.5MHz. Circuit 10 has an overall power consumption exceeding 200mW. Fig. 2 shows a second prior art LCD control circuit 110 connected via interface 11 to external microprocessor 100. Graphic display panel 120 is driven by column and row drive circuits 123, 121 which each incorporate a RAM memory section. The contents of the memory sections are only held while the power is on. Interface 11 is 32-way comprising 16 address bits, 8 data bits and 8 control lines, including the clock function and a power connection. The overall power consumption of circuit 110 itself is less than 20mW but it has no internal controller. This means that circuit 110 behaves completely differently from circuit 10 and that external control has to be provided. Circuit 110 does not itself incorporate any intelligence or functionality. The prior art circuits of Figs. 1 and 2 constitute so-called embedded devices, that is they are limited to one type of application. In addition, the power consumption of the arrangement of Fig. 1 is increased because data transfer to the memories has to occur every time the display is refreshed. Moreover, in the arrangement of Fig. 2 external control, in particular memory control, has to be provided. Fig. 3 shows a liquid crystal display control circuit 50 of a graphics terminal in accordance with a first embodiment of the present invention. Graphic LCD display panel 60 has an i.e. HD 66523 driver circuit 61 at one edge and an i.e. HD66522 driver circuit 62 at a perpendicular edge. The circuits 61, 62 have four grey scales and each consume less than 2 mA. In the circuit 50, the controller 30 of prior art circuit 10 is replaced by a programmable integrated circuit 70 which may be constituted by a PIC16C64 device, which consumes less that 1 mA. Software associated with the control circuit 70 is provided by the manufacturer. Both circuits 61, 62 incorporate a respective RAM memory section as in circuit 110, but in circuit 50 they can be directly and remotely programmed by a user/customer solely by means of the data bus of the external microprocessor 100 so that panel 60 can indicate a desired display. In this respect, circuit 70 serves to forward communications between microprocessor 100 and circuits 61, 62 without change or to intelligently modify the data according to the internal program. Another distinguishing feature of circuits 61, 62 when in circuit 50 is that their memories are not cleared when the system is otherwise dormant. Circuit 70 has several memory blocks including a static block relating to functionality and a plurality of register blocks which are programmable by the user, for example to determine when the system is to be dormant. A data input buffer circuit is provided between the customer's microprocessor bus and the internal microprocessor bus of the circuit 50. As far as external microprocessor 100 is concerned, the connections to circuit 50 across interface 11 are substantially the same as those of the circuit 10 of Fig. 1, except that processing can now occur at a frequency of a maximum of 12MHz rather than the previous maximum of 5.5MHz. This enables the circuit to directly replace existing circuits without requiring any changes to the customer's electronic equipment; software changes, however, need to be made. In addition, the total current consumption is less than 5 mA which has important power supply implications, since the display circuit can be operated over telephone lines rather than requiring a battery or a mains connection. The electricity supply incorporates a circuit which transforms the line voltage into five different voltages required to operate the control circuit. Because of its low power requirement and its flexibility, the circuit of the present invention may be used with larger display panels e.g. up to 480 x 640 pixels. An advantage of the circuit of Fig. 3 is that it is not of the "embedded" type, i.e. it is not dedicated to a single application but can be programmed for a wide range of alternative uses. The control circuit 150 in accordance with a second embodiment of the present invention, is shown in Fig. 4 as an arrangement embedded in a touch panel display device. Circuit 150 comprises a programmable integrated circuit 170 which may be constituted by a PIC16LC874 device. It typically comprises two blocks, viz a static block with programmed functionality and a register block which a user can program, e.g. to determine the conditions under which control circuit 150 is to be dormant. Overlying the display panel 60 is a transparent touch panel input device 80 of the type which produces an output depending upon the location at which a user's finger or stylus contacts the panel. One exemplary application is as a so-called "palm-pilot" in a Personal Data Assistant device. The touch panel 80 may be supplemented or replaced by switches along an edge of the display panel 60, and/or by a keyboard. Indicators such as LEDs may also be provided to indicate different operational states. A light sensor may also be provided. The interface 1 1 may be 12-way parallel as with control circuit 10. Alternatively, it may be 5-way serial, viz two serial data lines and two control lines in addition to a clock input line. Such an arrangement is particularly advantageous in wireless communication applications because fewer wires produce less interference and can be more easily shielded. The overall power consumption of device 150 is less than 25mW. A display device incorporating circuit 150 may have three states, viz: active, idle and sleep. • In sleep mode, the LCD, the backlight, the LEDs, the light sensor are switched off, the clock of the PIC is stopped, and interface 11 is off. This is the lowest power mode of the device. • In idle mode, the LCD is active, but the backlight, the LEDs, the light sensor are switched off, the clock of the PIC is stopped, and the interface 11 is off. • In active mode the LCD is active, the backlight, the LEDs, the light sensor are controlled and can be switched on, and the clock of the PIC is running. The interface 11 is running, and the PIC send its status byte and checks for available command at no less than 20 ms intervals. The PIC wakes up from idle mode or sleep mode if either of the following wake-up events happens: • A key is pressed • The touch screen 80 or a separate switch is touched • A lid of the device is opened • An interrupt is received from the external microprocessor The PIC remains in idle or sleep mode at all other times. The ability to be in the most appropriate mode at any time leads to lower overall power consumption, and a longer operating life for battery-powered devices. Thus circuits in accordance with the present invention: - are electrically compatible with existing controller displays - are interface compatible with virtually all microprocessor architecture, - are expandable, consume lower power, especially compared to the device of Fig. 1, combine intelligence with self-refreshing memories for the display, offer enhanced pixel control, and offer an increased pixel count. The features of the embodiments of Figs. 3 and 4 may be interchanged as desired. The following table gives a power consumption comparison with existing display devices: Device 5 is of the type shown in Fig. 3 and has the following features: full Bit Map graphic control, 4 grey scale (from 32 total), blinking, inverse video, 2 sleep modes, SPI or 8 bit parallel, multiple window control, backlight control. Device 6 is of the type shown in Fig. 4 and has the following features: full Bit Map graphic control, 4 grey scale, 2 sleep modes, SPI or 8 bit parallel, multiple window control, 8 bit (512y x 512x point) analogue resistive touch decoder.

Claims: CLAIMS 1. A control circuit (50, 150) for a liquid crystal display device (60) comprising driver circuits (61, 62) for the device, each driver circuit having a respective memory section, characterised in that the control circuit further comprises a controller (70, 170) operatively connected between an external interface (11) of the control circuit and the driver circuits. 2. A control circuit (50, 150) according to claim 1, wherein the controller (70, 170) is programmable, 3. A control circuit (50, 150) according to claim 2, wherein means are provided for programming the controller (70, 170) to provide control functions associated with a touch panel (80) in addition to the liquid crystal device (60). 4. A control circuit (50, 150) according to claim 3, wherein the touch panel (80) is transparent and overlies the liquid crystal device (60). 5. A control circuit (50, 150) according to claim 2, wherein means are provided for programming the controller (70, 170) to provide control functions for a keyboard in addition to the liquid crystal device (60). 6. A control circuit (50, 150) according to any preceding claim, wherein the interface (11) comprises a plurality of intelligent serial and/or parallel connections. 7. A control circuit (50, 150) according to claim 6, wherein the input comprises two serial data lines, two control lines and a clock input line. 8. A liquid crystal device comprising a control circuit (50, 150) according to any preceding claim having at least one state (sleep, idle) in which the controller (70, 170) and the interface (11) are "off and a further state (active) in which the controller and the interface are running. 9. A liquid crystal device according to claim 8 having two states in which the controller (70, 170) and the interface (11) are off, in one of which (idle) the driver circuits (61, 62) continue to operate.

Inventors: HOW NICHOLAS JAMES, HOW, NICHOLAS, JAMES
Applicants: DENSITRON EUROP LIMITED, HOW NICHOLAS JAMES, DENSITRON EUROPE LIMITED, HOW, NICHOLAS, JAMES
Application year: 2000
Main classification: G09G3
IPC codes: G06F3, G09G3