METHOD AND APPARATUS FOR DETECTING SLOW AND SMALL CHANGES OF ELECTRICAL SIGNALS INCLUDING THE SIGN OF THE CHANGES, AND CIRCUIT ARRANGEMENT FOR THE EXACT DETECTION OF THE PEAK VALUE OF AN ALTERNATING VOLTAGE

Abstract: A method and electronic circuit for detecting slow and small changes of electrical signal including the sign of the changes, comprising the steps of switching the signal to be detected periodically to a capacitor and changing thereby its charge state taken in the previous period, examining the extent and sign of the decaying current pulse caused when said capacitor has been forced to take the new charge state, if the extent of this decaying current pulse is higher than a predetermined threshold limit, storing this fact and the sign of the change till the next period.

Description: Method and apparatus for detecting slow and small changes of electrical signals including the sign of the changes, and circuit arrangement for the exact detection of the peak value of an alternating voltage The invention relates to a method and apparatus for detecting slow and small changes of electrical signals including the sign of the changes, and circuit arrangement for the exact detection of the peak value of an alternating voltage. Under the term "electrical signals" a direct current voltage or quantities that can be represented by the measurement of direct current voltages are understood, such quantities are e.g. output signals of current or temperature probes. Direct current voltages can generally be measured with a required accuracy. There are, however, special tasks of measurements, wherein changes should be exactly detected, which are very low relative to the level of the direct current voltage, e.g. 10 "3 or 10 "4 times of the DC level, and such changes take place slowly, e.g. during a couple of hours. The difficulty of the task increases if the occurrence of such slow changes should be detected very fast that means less than a couple of minutes, and the detection time might be in the order of magnitude of 10 seconds. In case of such detection tasks conventional methods of measuring voltages cannot be used, since the useful signal is not higher than the accuracy of the measurements. Typically such a task is the determination of the end of charge moment in case of charging batteries. Especially, when the battery is charged intensively with a high charging current, the charging process should be finished as soon as the fully charged state has been reached, otherwise the battery might suffer an irreversible damage. Thew end of charge state is often indicated by a very low change of the battery voltage which can be below 1 mV, or such an indication can be the end of a similarly low decrease of the battery voltage. In the booklet of Motorola Inc. SG 73/D Rev. 17, 1998 of the Master Selection Guide series, an integrated battery charger circuit type MC 33340P is described that can detect the decrease of the battery voltage by a sensitivity of 4 mV. The required accuracy is much higher than this value, and it is not sufficient to detect the decrease of the voltage oniy, one has to determine the tendency of the change as well. The tendency means the determination whether the signal has decreased by a predetermined extent it has increased at least by that extent or it has remained unchanged i.e. the fluctuations have not exceeded the predeteraiined level. In case of very small changes of voltage signals there is no kind of reliable and accurate means available that would be able to detect the steepness of the changes or the persistence of an unchanged state of the signal. The knowledge of such parameters would be, however, desirable in several fields of the technique. In case if the signal to be monitored is not constituted by a direct current voltage but by a quantity that is repeated periodically like pulses, then the detection problem will be more difficult, smce no peak detector is known that could generate a direct current level from the pulsating electrical signal with the required accuracy. The non-linear components used for the detection have temperature- dependent properties which often fluctuate, and the direct current signal processing has both offset and drift errors. These side effects will not be negligible any more if such changes of the signal have to be determined, which are by orders of magnitude below the signal level. The object of the invention is to provide a method and an apparatus that makes possible both the safe detection of the slow and small changes of a direct current voltage and the determination of the tendency of the changes, wherein the changes are by three decimal orders of magnitude smaller than the DC level, and which has a circuit design that facilitates mass production. A further object of the invention is to provide a circuit arrangement that can carry out the peak detection of repetitive pulse signals without any fluctuation of the DC level and which has the required accuracy. These objectives have been achieved on the basis of the recognition that the voltage to be detected is used for charging a capacitor, then the capacitor is left alone and later it will be connected again to the voltage signal to be detected. If in the meantime the value of the voltage has changed, then depending on the sign of the change the capacitor will either be further charged or discharged, which is associated by a short transient, and this transient can be detected Based on this recognition accordmg to a first aspect of the invention an apparatus has been provided for detecting slow and small changes of electπcal signals including the sign of the changes, that compπses -a controlled switch connected m the path of the signal to be detected, -a capacitor connected with a first terminal to the switch and charged to the voltage of the signal, -an amplifier with an mput connected to second teπmnal of the capacitor and generating a pulse signal corresponding to the charge or discharge current of the capacitor and the pulse signal has a corresponding correct sign, -a window comparator with first and second reference voltages that determine a window, and the comparator has a signal mput connected to output of the amplifier for indicating whether the output signal of the amplifier lies m the range defined by the window or it has been crossed m negative or positive direction, -storage and logical units each having first and second storage means, and -a pulse generator connected to control mput of the controlled switch to make it closed for periodically repeated sampling peπods, and also connected to the storage and logical units, wherem the first storage means store the first logical state of the window comparator which state has been taken during said pulse signal, and a predetermined section of each pulse of said pulse generator reads such stored values of said first storage means mto said second storage means At a preferred embodiment the pulse generator has pulses with variable period tune In a further embodiment the amplifier compπses RC feedback elements complementing each of said chargmg or dischargmg pulse with a respective pulse of opposite sign, and the lengths of these pulses are m the same order of magnitude It is preferable, when the voltage wmdow of the wmdow comparator is adjustable to be symmetric relative to the base level of the output signal of the amplifier In a further embodiment the first storage means are constituted by a parr of bi- stables, having mputs gated by the m verted output of the other one m the pair, furthermore the bistables are reset by the leadmg edges of the sampling pulses of the pulse generator It is preferable if the second storage means are constituted by a pa r of bistables, and the storage therein occur under the effect of the rear edges of the sampling pulses of the pulse generator According to a second aspect of the mvention a circuit arrangement has been provided for the exact detection of the peak value of an alternating voltage, particularly for use with the above descπbed apparatus, and the circuit arrangement compπses: -two operational amplifiers both having a feedback, the first amplifier is arranged as a peak detector and has an mput connected to receive the alternating voltage to be detected, and an output coupled through an RC member to the mput of the second amplifier: -two controlled switches which are during repetitive sampling cycles m a fust state and at all other times m a second state; -an output capacitor connected through the first switch m its first state to the output of the second amplifier and bemg then charged to the value of the detected voltage, and connected m the second state of the first switch to the output of the circuit arrangement and holdmg the sampled voltage; wherem the second switch connects m the first state both the mput of the second amplifier and the capacitor in the RC member to the ground, and m the second state disconnects this path from the ground. For the sake of noise protection the circuit arrangement comprises a filter connected between the first amplifier and the input. In a further embodiment the feedback element of the second amplifier is a potentiometer. According to a further aspect of the invention a method has also been provided for detecting slow and small changes of electrical signals including the sign of the changes, that comprises the steps of switching the signal to be detected periodically to a capacitor and changing thereby its charge state taken in the previous period, examining the extent and sign of the decaying current pulse caused when said capacitor has been forced to take the new charge state, and if the extent of this decaying current pulse is higher than a predetermined threshold limit, storing both this fact and the sign of the change till the next period. At a preferable embodiment, depending on the accuracy how the steepness of the changes of the electrical signal should be determined, the time that elapses between subsequent sampling periods is adjusted. One of the most significant field of use is, when the signal to be examined is the voltage of a battery when being charged. The invention will now be described in connection with preferable embodiments thereof, wherein reference will be made to the accompanying drawings. In the drawing: Fig. 1 is a simplified circuit diagram of an exemplary embodiment of the detection circuit according to the invention; Fig. 2 shows the forms of the pulses of the pulse generator 9; Figs. 3 a to 3k show the time diagrams of the signals that can be measured at a few number of characteristic places of the detection circuit; and Fig 4 is the circuit diagram of a current detector. In the circuit shown in Fig. 1 the signal to be monitored is a direct current voltage, and its line is coupled to input terminal 1. A controlled switch 2, realized by a contact of relay 10 or by a high quality electronic switch, is connected m seπes with the mput terminal 1 The other wire of the switch 2 is connected to an arm of a capacitor 3 of precision design, and the other arm is connected to resistor 4 and to positive mput of a controlled amplifier 5 that compπses a feedback loop The output of the controlled amplifier 5 is coupled through a branch to its own negative mput. whereas the branch compπses a potentiometer 6 and an RC member, also connected to the negative mput The potentiometer 6 is adapted for adjustmg the amplification When a short unipolar voltage pulse is coupled to the positive mput of the controlled amplifier 5 and it decays, under the effect of the feedback a half- wave pulse will appear at the output that has an mverse phase relative to the pulse at the mput The output of the controlled amplifier 5 is connected to signal mput of a wmdow comparator 7 The width of the wmdow for cσmpaπson can be adjusted, two stabilized voltages -U R and -U R are used for this purpose, and their level can be changed by circuits not shown m Fig 1 A potentiometer 12 is used to adjust the DC wmdow to be symmetπc relative to the DC level at the signal mput The wmdow comparator 7 has two outputs, of which signal will appear on the one, that lies m the direction where the signal voltage has crossed the adjusted voltage limit. The outputs of the wmdow comparator 7 are coupled through respective AND gates 13 and 14 to wπte mputs of respective bistables 8a and 8b The second mputs of the AND gates 13, 14 are coupled to the inverted output of the other one of the bistables 8b and 8a. and the use of these gates has a stabilizing effect on the operation The common enable mput of the bistables 8a and 8b is coupled to output of a pulse generator 9, and this output controls additionally both the relay 10 that has the switch 2 and through an inverter 16 dynamic mput of two further bistables 1 la and l ib Wπte mputs of the bistables 1 1a and l ib are connected to outputs Q of the two first bistables 8a and 8b Outputs Q of the two second bistables 1 1a and l ib constitute outputs a and b of the apparatus A third output c is connected to output of an AND gate 15 that has mputs coupled to inverted outputs of the second bistables 11a and l ib The operation of the voltage detection apparatus accordmg to the invention is as follows The monitored device, e g a battery is coupled directly to the input terminal 1 The pulse generator 9 generates pulses with predetermined repetition frequency and with given duration In the exemplary embodiment the duration of the pulses is between about 100 and 500 msec, and the peπod time of the pulses can be adjusted between about 1 sec and 3 minutes Fig 2 shows the shape of the pulses of the pulse generator 9 The same pulses can be seen on Fig 3a, however, with a different time scale For the duration of the pulses the switch 2 is closed and connects the mput terminal 1 with the capacitor 3 Before the switch 2 was closed, the voltage on the capacitor 3 was equal with the voltage that prevailed at the mput terminal during the end of the previous pulse This is due to the fact that by the end of the closed state of the switch 2 the capacitor 3 is charged to the voltage present at the mput terminal 1 In case if this voltage has changed relative to the value taken during the last pulse, the capacitor 3 will be charged or discharged to this new voltage value, and its chargmg or dischargmg current will generate on the resistor 4 a decaymg positive or negative voltage pulse If the voltage has increased smce the last clock pulse, then the chargmg current transient will create an output signal that πses m positive direction then decays to zero This output signal is shown on Fig 3b The chargmg process of the capacitor of the RC member m the feedback branch generates a transient pulse with an opposite sign, and the voltage of the output signal will be as shown m Fig 3c The DC average of this output signal will be zero It is preferable if the time constants of the two subsequently occurring transients are chosen to be almost the same, smce that makes the signal compπsmg the two half waves close to symmetric. The use of the second half wave is significant from the pomt of view of the long-term stability of the DC component of the output signal The controlled amplifier 5 has an especially high mput impedance, therefore the load represented thereby is negligibly low and it cannot change the voltage of the capacitor 3 within a samplmg peπod. In case if at the mput terminal a decrease of voltage takes place relative to the previous state, then the capacitor 3 will be discharged to the new decreased level. Now the discharge current has an opposite sign with respect to the sign of the chargmg current at the previous case, thus a negative pulse appears on the resistance 4 with respect to the ground At the output of the controlled amplifier 5 a full wave voltage pulse appears that starts with a negative half wave The duration of the samplmg pulse shown on Fig. 2a is longer than the time constant of the RC member consisting of the capacitor 3 and the resistance 4, therefore by the end of the pulse the chargmg or dischargmg transient will have finished When the switch 2 opens, the capacitor 3 will retam its voltage, and owmg to its precision design this voltage will be accurately kept till the next pulse. The ratio of the penod time and the samplmg tune is substantially higher than the one deducible from Fig. 2, which has a distorted scale. As descnbed. the change of the voltage of the mput signal m a sampling period causes a voltage wave at the output of the controlled amplifier 5 Dependmg on the fact whether the mput voltage has mcreased or decreased, this voltage wave starts with a posmve or negaαve half wave The width of the voltage wmdow of the wmdow comparator 7 is adjusted by the threshold voltages of compaπson +Uκ and -U K to be substantially smaller than the amplitude of this wave. The comparation wmdow should by symmetπc to the output DC level of the controlled amplifier 5, and the symmetry can be adjusted by the potentiometer 12 Fig. 3 c mdicates that the positive threshold of compaπson +U is crossed twice by the voltage lead to the signal mput of the comparator 7 m the first half penod of the full wave. In accordance with this fact the upper output of the comparator 7 associated with the upper (positive) crossmg of the threshold a pulse shown m Fig. 3d will appear. In the second half peπod the voltage signal will cross twice the lower (negative) threshold of compaπson -U K , and at this time a pulse shown m Fig 3e will appear at the lower comparator output associated with the lower threshold crossmgs. The bistables 8a and 8b are reset by the leadmg 0-1 jump of the clock pulse, thus both of them will have a logical 1 value at their inverted outputs and zero value at the non-mveπed outputs The AND gates 13 and 14 are gated by the inverted output of the other one m the pair of bistables At the beginning of the clock pulse the inverted output of both bistables 8a and 8b will be m 1 state, the wntrng mto both bistables is possible In the exemplary case the signal at the mput terminal has changed, namely mcreased, which has a consequence that the wave starts with a positive half peπod. As a result of this a pulse will first appear at the upper output of the comparator 7 (Fig 3d), and the value 1 will be written m the bistable 8a Fig 3f shows the state of the AND gate 13 and Fig 3g shows the state of the AND gate 14 Fig 3h shows the logical value of the bistable 8a, and Fig. 3ι shows that of the bistable 8b When at the output of the controlled amplifier 5 the voltage enters the second half peπod of the wave signal, and a pulse appears at the lower output of the comparator 7 (Fig 3e ), no wnting will be allowed in the bistable 8b This is so because the inverted output of the other bistable 8a is m zero state that prohibits passage through the AND gate 14 At the end of the samplmg clock pulse the bistables 1 la and 1 lb react to the rear edge of the pulse and store the momentary states of the other bistables 8a and 8b, and this will be retained till the end of the next peπod. The bistable 11a will store the "one" state (Fig. 3j) and the bistable 1 lb will store the "zero" state (Fig. 3 k) From this principle it follows that a signal will appear at the output a if at the mput terminal the voltage has mcreased relative to the value taken during the pervious samplmg pulse The output b will have a signal if the mput voltage has decreased, finally, the output c will have a signal, if the mput voltage has not changed, i e it has remamed within the sensitivity threshold of the apparatus The rate of change of the voltage at the mput terminal 1 has expedient significant at a wide range of applications The sensitivity of the measurement of the rate of change can be adjusted within a wide range by means of changing the peπod tune of the samplmg pulses In a given configuration the circuit has a predetermined sensitivity threshold This can be e g 1 mV If the peπod time of the samplmg is chosen to 1 minute, then the sensitivity of the rate of change will be 1 mV/min. but m that case the data representing the new states will arπve m 1 minutes peπodicity If the task is constituted by the determination of the end of charge moment of a battery, and this condition is related to the fact when the earlier changing battery gets stabilized or constant, then the sensitivity of 1 mV/min is very high Such a condition can be applied at normal chargmg tasks In case of quick chargers the chargmg current can be so high that the 1 minute mterval will prove to be too long between two subsequent sensmg, smce an overcharging that can last till 1 minute might decrease the lifetime of the battery In that case the samplmg peπod should be shoπened, whereby the sensitivity for the end of charge will be smaller, but at the same tune the danger of overcharging the battery will practically be eliminated The fact that the chargmg process will be fimshed at a level slightly below the fully charged state has no sigmficance at fast chargers The solution accordmg to the invention can thus decide with a high sensitivity and accuracy that the voltage at the mput terrmnal has mcreased, decreased or has remamed unchanged relative to an earlier value This information has a particular sigmficance m delivering an end of charge signal m case of chargmg batteπes The circuit shown m Fig 1 can determme the change of voltage signals only In several fields of technique there are numerous tasks, m which the change of other characteπstics like temperature or current has to be detected In case if the examined parameter is a voltage or it can be converted to a voltage signal easily, as it is the case at sensmg temperature values, the circuit shown m Fig 1 can be used without any change In case, however, if the examined characteπstics is represented by the peak value of a pulsating signal sequence, the situation will not be easy anymore, because conventional ways of peak detection are associated with offset errors higher than the required sensitivity Such a peak detection task can be found at such chargmg processes of batteπes m which the change of the chargmg current should be detected or the moment should be known when the peak values have stabilized The chargmg current is constituted by a pulsatmg direct current, wherem the pulsation can be converted to a voltage pulse sequence by means of a conventional current-to-voltage converter Fig 4 shows a circuit capable of generating a duect current voltage representing the peak value of a pulsating current signal that has been converted first mto an alternating current The detection of the change of this direct current voltage can be solved by the circuit of Fig 1 The mput of the circuit is constituted by the secondary wmdmg of a current converter 20 which has a grounded terminal and another terminal connected through an integrating filter to active peak detector 1, that compπses an operational amplifier and a diode The output of the peak detector 21 is coupled through an RC filter to a amplifier 21 having a feedback loop compnsmg a feedback resistor by which the gam can be adjusted The ouφut of the amplifier 22 is coupled through a controlled switch 23 and to a capacitor 24 and to output terminal 25 of the circuit Between a branch of the second filter and the ground a second controlled switch 26 is provided The operation of the circuit is as follows From the alternating voltage proportional to the current to be examined, following a smoothing that eliminates any high frequency noise, the active peak detector 21 generates a pulsatmg direct current voltage Here the DC component of the level between the pulses will be zero, 1 e the rectified direct current voltage will not be superimposed on the forward voltage of the diode The pulses of the pulse generator 9 shown m Fig 1 operate the switches 23 and 26 and this takes place m synchrony with the switch 2 During the long mterval precedmg each samplmg pulse the switches 23 26 are m the position shown m Fig 4, I e the second filter is coupled to the mput of the amplifier 22, and the output of the amplifier 22 is coupled to the capacitor 24 The pulsatmg DC -voltage charges the capacitor in the second filter to the peak value, which appears at the output of the amplifier 22 so that the source impedance will be low and the capacitor 24 will be charged soon to this value Duπng the short samplmg peπod that follows the long interval the states of the switches 24 and 26 will be reversed, the capacitor 24 will be coupled to the output terminal 25 and its voltage truly preserves the earlier level representing the voltage to be detected The circuit shown m Fig 1 will sense the changes of this level as descπbed earlier The switch 26 connects the mput of the amplifier 22 and the capacitor m the second filter to the ground As a result of this the circuit will start m the next period from the zero level In the next long peπod this process will be repeated and the capacitor 24 will be charged agam to the peak of the alternating voltage The advantage of the circuit is that the output signal will be a direct current voltage that depends very accurately only on the peak value of the mput pulses, and this direct current voltage will not be loaded by any superimposed noise or alien component The high accuracy is the consequence of the standard zero state provided duπng the samplmg peπods

Claims: Clauns 1 Apparatus for detecting slow and small changes of electπcal signals mcludmg the sign of the changes, compπsmg -a controlled switch (2) connected m the path of the signal to be detected, -a capacitor (3) connected with a first terminal to the switch and charged to the voltage of said signal, -an amplifier (5) with an mput connected to second terminal of the capacitor (3) and generating a pulse signal coπespondrng to the charge or discharge current of the capacitor having corresponding proper sign, -a wmdow comparator (7) having first and second reference voltages (+Uκ, -UK) determining a wmdow, and a signal mput connected to output of the amplifier (5) for indicating whether the output signal of the amplifier lies m the range defined by the wmdow or it has been crossed m negative or positive directions, -storage and logical units each having first and second storage means (8, 11), and -a pulse generator (9) connected to control mput of the controlled switch (2) to make it closed for peπodically repeated samplmg peπods, and also connected to the storage and logical units, wherem said first storage means storing the logical state of the wmdow comparator (7) taken duπng said pulse signal with proper sign, and a predetermmed section of each pulse of said pulse generator readmg such stored values of said first storage means mto said second storage means 2 The apparatus as claimed m claim 1, wherem said pulse generator (9) has pulses with vaπable peπod time 3 The apparatus as claimed m claim 1, wherem the amplifier (5) compπses RC feedback elements complementmg each of said chargmg or dischargmg pulse with a respective pulse of opposite sign, and the tune of these pulses bemg m the same order of magnitude. 4 The apparatus as claimed m claim 1. wherem the voltage wmdow of said wmdow comparator H) bemg adjustable to be symmetric relative to the base level of the output signal of the amplifier (5). 5 The apparatus as claimed m claim 1, wherem said first storage means bemg a parr of bistables ( 8a. 8b), hav g mputs gated by the mverted output of the other one m the pair, furthermore said bistables bemg reset by the leadmg edges of the samplmg pulses of the pulse generator (9). 6 The apparatus as claimed m claim 1, wherem said second storage means bemg a pair of bistables (1 la, l ib), and the storage therem occurπng under the effect of the rear edges of said sampling pulses of the pulse generator (9). 7 Circuit aπangement for the exact detection of the peak value of an alternating voltage, particularly for use with the apparatus as claimed m claim 1, compπsmg: -two operational amplifiers (21, 22) both havmg a feedback, the first amplifier (21) is arranged as a peak detector and has an mput connected to receive the alternating voltage to be detected, and an output coupled through an RC member to the mput of the second amplifier (22); -two controlled switches (23, 26) bemg duπng repetitive samplmg cycles m a first state and all other tunes m a second state; -an otput capacitor (24) connected through said first switch (23) in its first state to the output of the second amplifier (22) and bemg then charged to the value of the detected voltage, and connected m the second state of the first switch (23) with output (25) of the circuit arrangement an holding the sampled voltage; wherem the second switch (26) m the first state connecting the mput of the second amplifier (22) and the capacitor in the RC member to the ground, and m the second state disconnecting this path to the ground. 8 The circuit arrangement as claimed m claim 7, compπsmg a filter connected between the first amplifier (21) and the mput. 9 The circuit arrangement as claimed in claim 7, wherem the feedback element of the second amplifier (22) is a potentiometer. 10. A method for detecting slow and small changes of electπcal signals including the sign of the changes, compπsing the steps of switching the signal to be detected peπodically to a capacitor and changmg thereby its charge state taken in the previous period, exarnining the extent and sign of the decaymg current pulse caused when said capacitor has been forced to take the new charge state, if the extent of this decaying current pulse is higher than a predetermmed threshold limit, storing this fact and the sign of the change till the next peπod. 11. The method as claimed in claim 10, wherein depending on the accuracy how the steepness of the changes of the electrical signal should be determined the time elapsed between subsequent sampling periods being adjusted. 12. The method as claimed m claim 10, wherem the signal to be examined being the voltage of a battery when bemg charged.

Inventors: FAZAKAS ANDRAS, FAZAKAS, ANDRAS
Applicants: FAZAKAS ANDRAS, FAZAKAS, ANDRAS
Application year: 2000
Main classification: G01R19
IPC codes: G01R19, G01R31