METHOD AND APPARATUS FOR CLEANING A SEMICONDUCTOR WAFER

Abstract: A method utilizing gaseous form of chemical cleaning fluids in conjunction with post-CMP scrubbing, thereby enhancing the cleaning efficiency of the chemicals. An additional advantage is that usage of chemical fluids would also be reduced. According to an embodiment of the present invention, a vapor generator introduces vapors of chemical solutions (e.g., hydrofluoric acid) to a sealed brush station during various cleaning steps for varying extents of time. The vapors interact with contaminants or defects on the wafer surface. Since these defects offer preferential sites for reaction or condensation of the vapors, the vapors selectively interact with these defects and contaminants. Hence, the cleaning efficiency of the chemical is enhanced. Because the cleaning process is performed within a sealed brush station, it is also possible to conserve the amount of chemicals being used. In an alternate implementation, the chemical vapors can also be introduced together with deionized water, if keeping the wafer surface wet is a requirement. The use of chemicals in a gaseous form also offer advantages from a flow control standpoint because precise control of chemical reaction on the wafer surface can be easily achieved.

Description: METHOD AND APPARATUS FOR CLEANING A SEMICONDUCTOR WAFER FIELD OF THE INVENTION The field of the present invention pertains to a method and apparatus for cleaning a semiconductor wafer in the semiconductor fabrication processing. More particularly, the present invention relates to a post CMP (chemical mechanical planarization) wafer cleaning method and apparatus using vapor scrubbing. BACKGROUND OF THE INVENTION Most of the power and usefulness of today's digital IC devices can be attributed to the increasing levels of integration. More and more components (resistors, diodes, transistors, and the like) are continually being integrated into the underlying chip, or IC. The starting material for typical ICs is very high purity silicon. The material is grown as a.single crystal. It takes the shape of a solid cylinder. This crystal is then sawed (like a loaf of bread) to produce wafers typically 10 to 30 cm in diameter and 250 microns thick. The geometry of the features of the IC components are commonly defined photographically through a process known as photolithography. Very fine surface geometries can be reproduced accurately by this technique. The photolithography process is used to define component regions and build up components one layer on top of another. Complex ICs can often have many different built-up layers, each layer having components, each layer having differing interconnections, and each layer stacked on top of the previous layer. The resulting topography of these complex ICs often resemble familiar terrestrial "mountain ranges," with many "hills" and "valleys" as the IC components are built up on the underlying surface of the silicon wafer. In the photolithography process, a mask image, or pattern, defining the various components is focused onto a photosensitive layer using ultraviolet light. The image is focused onto the surface using the optical means of the photolithography tool and is imprinted into the photosensitive layer. To build ever smaller features, increasingly fine images must be focused onto the surface of the photosensitive layer, e.g. optical resolution must increase. As optical resolution increases, the depth of focus of the mask image correspondingly narrows. This is due to the narrow range in depth of focus imposed by the high numerical aperture lenses in the photolithography tool. This narrowing depth of focus is often the limiting factor in the degree of resolution obtainable and, thus, the smallest components obtainable using the photolithography tool. The extreme topography of complex ICs, the "hills" and "valleys," exaggerate the effects of decreasing depth of focus. Thus, in order properly to focus the mask image defining sub-micron geometries onto the photosensitive layer, a precisely flat surface is desired. The precisely flat (e.g. fully planarized) surface will allow for extremely small depths of focus and, in turn, allow the definition and subsequent fabrication of extremely small components. Chemical-mechanical planarization (CMP) is the preferred method of obtaining full planarization of a wafer. It involves removing a sacrificial layer of dielectric material or metal using mechanical contact between the wafer and a moving polishing pad with chemical assistance from a polishing slurry. Polishing flattens out height differences since high areas of topography (hills) are removed faster than areas of low topography (valleys). CMP is the only technique with the capability of smoothing out topography over millimeter scale planarization distances leading to maximum angles of much less than one degree after polishing. Figure 1 shows a down view of a typical prior art CMP machine 100 and Figure 2 shows a side cut away view of the CMP machine 100. The CMP machine 100 is fed wafers to be planarized. The CMP machine 100 picks up the wafers with an arm 101 and places them onto a rotating polishing pad 102. The polishing pad 102 is made of a resilient material and is typically textured, often with a plurality of predetermined groves 103, to aid the polishing process. The polishing pad 102 rotates on a platen 104, or turn table, located beneath the polishing pad 102, at a predetermined speed. A wafer 105 is held in place on the polishing pad 102 and the arm 101 by a carrier ring 112 and a carrier 106. The lower surface of the wafer 105 (e.g., the "front" side) rests against the polishing pad 102. The upper surface of the wafer 105 is against the lower surface of the carrier 106 of the arm 101. As the polishing pad 102 rotates, the arm 101 rotates the wafer 105 at a predetermined rate. The arm 101 forces the wafer 105 into the polishing pad 102 with a predetermined amount of down force. The CMP machine 100 also includes a slurry dispense arm 107 extending across the radius of the polishing pad 102. The slurry dispense arm 107 dispenses a flow of slurry onto the polishing pad 102. The slurry is a mixture of de-ionized water and polishing agents designed to aid chemically the smooth and predictable planarization of the wafer. The rotating action of both the polishing pad 102 and the wafer 105, in conjunction with the polishing action of the slurry, combine to planarize, or polish, the wafer 105 at some nominal rate. This rate is referred to as the removal rate. A constant and predictable removal rate is important to the uniformity and performance of the wafer fabrication process. The removal rate should be expedient, yet yield precisely planarized wafers, free from surface topography. If the removal rate is too slow, the number of planarized wafers produced in a given period of time decreases, degrading wafer through-put of the fabrication process. If the removal rate is too fast, the CMP planarization process will not be uniform across the surface of the wafers, degrading the yield of the fabrication process. To aid in maintaining a stable removal rate, the CMP machine 100 includes a conditioner assembly 120. The conditioner assembly 120 includes a conditioner arm 108, which extends across the radius of the polishing pad 102. An end effector 109 is connected to the conditioner arm 108. The end effector 109 includes an abrasive conditioning disk 110 which is used to roughen the surface of the polishing pad 102. The conditioning disk 110 is rotated by the conditioner arm 108 and is translationally moved towards the center of the polishing pad 102 and away from the center of the polishing pad 102, such that the conditioning disk 110 covers the radius of the polishing pad 102, thereby covering nearly the entire surface area of the polishing pad 102 as the polishing pad 102 rotates. A polishing pad having a roughened surface has an increased number of very small pits and gouges in its surface from the conditioner assembly 120 and, therefore, produces a faster removal rate via increased slurry transfer to the surface of the wafer and from more effective application of polishing down force. Without conditioning, the surface of polishing pad 102 is smoothed during the polishing process and removal rate decreases dramatically. The conditioner assembly 120 re-roughens the surface of the polishing pad 102, thereby improving the transport of slurry and improving the removal rate. Thus, the action of the rough surface of the polishing pad 102, the chemical softening action of the slurry, and the abrasive action of the slurry combine to polish the wafer 105 such that topography over millimeter scale planarization distances is nearly completely smoothed away. Once CMP is complete, wafer 105 is removed from polishing pad 102 by arm 101 and is prepared for the next phase in the device fabrication process. However, prior to subsequent fabrication processing, wafer 105 must be cleansed of contaminants left over from the CMP process (e.g., particles of polishing pad 102, trace amounts of slurry /abrasives, metal ions, and the like). After the CMP process is complete, the surface of wafer 105 has to be cleaned in order to remove particles, metal ions, and other such contaminants. As is well known by those skilled in the art, it is very important that the contaminants left over from the CMP process be removed before wafer 105 proceeds through further fabrication processing. For example, the presence of contaminant particles can disrupt subsequent lithography, which can lead to, for example, broken lines, shorts, and the like. Currently, the most widely used post-CMP cleaning processes involve scrubbing the wafer surfaces with deionized (DI) water or other wet chemicals. In practice, scrubbing is carried out using solutions containing chemicals and, brushes made of polymer materials. A diagram of a scrubbing brush 300 being used on a semiconductor wafer 310 is shown in Figure 3. As depicted, scrubbing brush 300 rotates in the direction shown by arrow 301. As scrubbing brush 300 rotates, wafer 310 frictionally rotates (e.g., spins) beneath scrubbing brush 300 such that scrubbing brush 300 frictionally contacts the entire surface of wafer 310. The scrubbing brush 300 is advantageous in that it efficiently removes those contaminants which come within direct contact with scrubbing brush 300 as it frictionally moves across the surface of wafer 310. Scrubbing brush 300 may be a porous brush saturated with specifically tailored cleaning fluids. As illustrated in Figure 3, cleaning fluids flow into the scrubbing station 305 via inlet 320. The cleaning fluids are tailored in accordance with the materials comprising the surface of wafer 310 (e.g., metal lines covered with oxide, tungsten in oxide via plugs, copper, etc.). The chemicals contained within the cleaning fluid chemically interact with contaminants on the surface of wafer 310. The cleaning fluids react with the contaminants, yielding a reaction product. The reaction product is removed from the wafer surface by the wiping force of scrubbing brush 300 as well as the flow of the cleaning fluid. Used cleaning fluids for removing the reaction products and contaminants cannot be reused or recycled as they contain contaminants and reaction products. Thus, the conventional post-CMP cleaning methods require a large amount of cleaning fluids. Chemical cleaning fluids, which usually contain toxic substances, may be harmful to the environment even when properly disposed. The large amounts of chemical solutions required also drives up the cost of ownership in the fabrication of integrated circuit devices. Further, removal of contaminants that are stuck on the wafer surface requires a significant amount of pressure to be applied to the brush, thus increasing the risk of damaging the wafer surface. Therefore, what is needed is a method of post-CMP cleaning which requires lesser amount of chemical solutions and which does not increase the risk of damaging the wafer surface. In addition, as integrated circuit devices enter the sub-micron era, it is becoming more and more critical to ensure that the wafer surfaces are free of contaminants. While prior art scrubbing methods may effectively remove surface contaminants, it may not remove contaminants that are embedded in the surface of the wafer. Further, prior art scrubbing methods are not effectively in removing contaminants that are located on the backside of the wafer. Thus, what is also needed is a method and system that is more efficient in removing CMP contaminants and byproducts from the surface of a wafer after the completion of CMP processing. SUMMARY OF THE INVENTION Accordingly, the present invention provides a method utilizing chemical cleaning solutions in gaseous form in conjunction with post- CMP scrubbing, thereby enhancing the cleaning efficiency of the chemicals. Usage of chemical solutions would also be reduced. According to an embodiment of the present invention, a vapor generator introduces vapors of chemical cleaning solutions (e.g., hydrofluoric acid) into a sealed brush station during various cleaning steps for varying extents of time. The vapors interact with contaminants or defects on the wafer surface. Since defects of the semiconductor wafer offer preferential sites for reaction or condensation of the vapors, the vapors selectively interact with these defects and contaminants. Hence, the cleaning efficiency of the chemical is enhanced. Because the cleaning process is performed within a sealed brush station, it is also possible to conserve the amount of chemicals being used. In furtherance of one embodiment of the present invention, a chemically and mechanically planarized semiconductor wafer that has a oxide surface is placed within a sealed brushing station. Then, hydrofluoric acid (HF) vapor is released into the sealed brushing station. The HF vapor then etches a thin layer (<50A) of oxide, which contains embedded contaminants, from the wafer surface. The vapor also interacts with the backside of the wafer, facilitating the removal of backside contaminants without directly dispensing chemicals to the backside. After a certain pre-determined period of time, the vapor generator is switched off. A predetermined amount of solution or deionized water is then introduced through the brush on to the wafer surface to remove the contaminants or their reaction products with the vapor. The flow of solution will also help in prevention of the brush loading. In one embodiment, the time of vapor on and vapor off may vary depending on specific process requirements. In an alternate implementation, vapor of the chemical cleaning solution can also be introduced together with deionized water, if keeping the wafer surface wet is a requirement. The use of chemicals in a gaseous form also offer advantages from a flow control standpoint because precise control of chemical reaction on the wafer surface during post CMP cleaning can be easily accomplished. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention: Prior art Figure 1 shows a down view of a conventional CMP machine. Prior art Figure 2 shows a side view of the conventional CMP machine from Figure 1. Prior art Figure 3 shows a side view of a conventional scrubbing station. Figure 4 illustrates a wafer being cleaned according to the method of post CMP cleaning of the present invention. Figure 5 is a flow diagram illustrating steps of a post-CMP cleaning process according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the invention, a method and system for post-CMP wafer cleaning, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the preferred embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be obvious to one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well known methods, procedures, components, and circuits have not been described in detail as not unnecessarily to obscure aspects of the present invention. The present invention provides a combined etching and brush based semiconductor wafer cleaning method and system for efficiently removing CMP contaminants and byproducts from the surface of a wafer after the completion of CMP processing. The present invention provides for efficient post-CMP cleaning that does not risk damaging the surface of the wafer. The use of chemical vapors in removing a thin layer of the wafer surface effectively dislodges hard-to-remove contaminants, significantly reducing the amount of scrubbing that needs to be performed. As a result, the amount of chemical solution used and the cost of ownership of the CMP process, is lowered. Chemical-mechanical planarization (CMP) is the preferred method of obtaining full planarization of a semiconductor wafer containing devices for fabrication processing. The CMP process involves removing one or more layers of material (e.g., dielectric material, aluminum, tungsten, or copper layers, or the like) using both the frictional contact between the wafer and a moving polishing pad saturated with a polishing slurry and the chemical action of the slurry itself. Polishing through the CMP process flattens out height differences, since high areas of topography (hills) are removed faster than areas of low topography (valleys). The CMP process is the preferred technique with the capability of smoothing out topography over millimeter scale planarization distances leading to maximum angles of much less than one degree after polishing. The frictional contact with the surface of the polishing pad of the CMP machine, the chemical softening action of the slurry, and the abrasive action of the slurry that combine to polish a semiconductor wafer also combine to create large amounts of contaminants and polishing byproducts. These contaminants /byproducts (e.g., particles of polishing pad 102, trace amounts of slurry /abrasives, metal ions, and the like) are spread by the CMP process across the entire surface of the wafer. Some contaminants may even be embedded in the surface of the wafer. Once CMP is complete, the wafer is removed from the CMP machine and is prepared for the next phase in the device fabrication process. However, prior to subsequent fabrication processing, the wafer must be cleansed of contaminants /byproducts left over from the CMP process. It is very important that the contaminants left over from the CMP process be removed before the wafer proceeds through further fabrication processing. For example, the presence of contaminants particles can disrupt subsequent lithography processes, which can lead to, for example, broken lines, shorts, and the like. Conventional scrubbing methods as depicted in Figure 3 is advantageous in that it efficiently removes those contaminants which come within direct contact with scrubbing brush as it frictionally moves across the surface of wafer 310. However, one disadvantage of these conventional scrubbing mehods is that used cleaning fluids cannot be reused or recycled as they contain contaminants and reaction products. Thus, the conventional post-CMP cleaning methods require a large amount of cleaning fluids. Further, removal of contaminants that are stuck on the wafer surface requires a significant amount of pressure to be applied to the brush, thus increasing the risk of damaging the wafer surface. Accordingly, the present invention provides a system for and an improved method of post-CMP scrubbing using cleaning vapor. Figure 4 illustrates a scrubbing station 400 for cleaning a chemically and mechanically planarized semiconductor wafer 405 according to an embodiment of the present invention. As illustrated, wafer 405 is placed within a sealed chamber 440 of scrubbing station 400 that includes a scrubbing brush 430 and a cleaning fluid inlet 410. As the brush 430 rotates, wafer 405 also frictionally spins beneath the scrubbing brush 430 such that the scrubbing action removes contaminants on the front surface 450a of the water 405. Cleaning fluids are introduced via the fluid inlet 410 and may be tailored according to the materials that make up the surface of wafer 405 (e.g., metal lines covered with oxide, tungsten in oxide via plugs, copper, etc.). Significantly, as illustrated in Figure 4, scrubbing station 400 includes a vapor inlet 420 mounted within sealed chamber 440 through which vaporized cleaning fluid may be introduced at various stages of the scrubbing process for various periods of time. Vaporized cleaning fluid, in the present embodiment, is also tailored to the materials that make up the surface of the wafer 405. The use of vaporized cleaning fluid (e.g., vapor of hydrofluoric acid) is advantageous in that the etching action of the vaporized cleaning fluid is capable of removing a very thin layer of deposition from the front surface 450a and back surface 450b of the wafer 405 as well as contaminants attached thereon to form easily removable or gaseous reaction products. According to the present embodiment, the vaporized cleaning fluids interact with contaminants or defects found on the wafer surfaces 450a- 450b. Since these defects offer preferential sites for reaction or condensation of the vapors, the vapors selectively interact with these defects and contaminants. Hence, the cleaning efficiency of the chemical is enhanced. The use of vaporized cleaning fluids, when combined with the scrubbing action of the brush 430, significantly reduces the amount of scrubbing required. Less amount of scrubbing in turn reduces the risk of damaging the front surface 450a of the wafer 405. In addition, less amount of cleaning fluids will be required. In this way, post-CMP cleaning time and cost can be significantly reduced. It should be noted that, in the present embodiment, the vaporized cleaning fluid and the cleaning fluid may have different chemical constituents. An additional advantage of the present invention is that vaporized cleaning fluids can easily interact with the back surface 450b of the wafer 405, so the removal of backside contaminants is made easier without directly dispensing chemicals to the back surface 450b. The use of cleaning fluids in a gaseous form also offer advantages from a flow control standpoint because precise control of chemical reaction on the wafer surfaces 450a-450b can be easily achieved with gases. Figure 5 is a flow diagram illustrating steps of a post-CMP cleaning process according to an embodiment of the present invention. For the purpose of illustration, process 500 shows the steps involved in the operating process of a post oxide CMP cleaning system employing a scrubbing station (e.g., scrubbing station 400 of Figure 4). However, it should not be construed that the present invention is only applicable to post oxide-CMP cleaning processes. Rather, it should be apparent to those skilled in the art that various chemical vapors can be similarly introduced for different post CMP cleaning processes or surface cleaning applications. Process 500 begins at step 510, where a wafer is received for cleaning after the wafer has been processed in a CMP machine. As described above, chemical mechanical planarization involves the use of slurries and frictional contact with a polishing pad. The CMP process leads to large amounts of contaminants which must be removed from the surface of the wafer. At step 515, the wafer is placed within a sealed chamber of a scrubbing station (e.g., scrubbing station 400) of a post-CMP wafer cleaning system in accordance with the present invention. The scrubbing station preferably includes a scrubbing brush (e.g., brush 300), a cleaning fluid inlet (e.g., inlet 410) for introducing cleaning fluids, and a vapor inlet (e.g., inlet 420) for introducing vaporized cleaning fluids. At step 520, according to the present embodiment, vaporized cleaning fluid containing hydrofluoric acid (HF) is introduced into the sealed chamber of the scrubbing station. In the present embodiment, the amount of vapor introduced and the time the wafer is exposed to the vapor is controlled by a vapor generator. Vaporized cleaning fluid containing HF is used in the present embodiment because HF vapor is capable of etching a thin layer (less than 50 Angstroms thick) of oxide on the wafer surface. Surface contaminants which are stuck on the wafer surface will also be etched away together with the thin layer of oxide. The HF vapor will also interact with the backside of the wafer and remove contaminants therefrom without the direct dispensing chemicals to the backside. In other embodiments, chemical vapors of other cleaning solutions may be used depending on the surface composition of the wafer. In an alternate implementation, the chemical vapors can also be introduced together with deionized water, if keeping the wafer surface wet is a requirement. At step 525, cleaning fluid containing hyrdrofluoric acid is dispensed onto the wafer. In one embodiment, cleaning fluid may be introduced through the brush on to the wafer surface. The flow of solution will also help in the prevention of brush loading. In other embodiments, the cleaning fluid can include specialized cleaning solution containing various chemicals specifically tailored for the chemical makeup of the wafer surface or de-ionized water. Further, the cleaning fluid and the vaporized cleaning fluids (introduced at step 520) may have different chemical constituents. At step 530, the surface of the wafer is brushed using the scrubbing brush mounted within the sealed chamber. As described above, the scrubbing brush uses a wiping action to remove the contaminants on the surface of the wafer. Referring still to Figure 5, at step 535, contaminants are removed from the surface the wafer by the combined action of the brush and the flow of the cleaning fluid. As described above, because the wafer surface has been slightly etched with vaporized hydrofluoric acid to remove any contaminants that are stuck to the surface, less scrubbing action of the brush and a lower flowrate of cleaning fluid would be needed for effectively cleaning the wafer. The high efficiency cleaning action of the scrubbing station allows less pressure to be applied with the scrubbing brush in comparison to prior art cleaning methods. At step 540, the surface of a wafer is rinsed with de-ionized water. The rinse is to remove any remaining cleaning fluid leftover after the cleaning process. At step 545, the wafer is spun dry. Once the cleaning fluid has been rinsed away at step 507, the spin dry yields a completely clean wafer, free of all contaminants. At step 550, the completely clean wafer is removed from the cleaning assembly and sent from the post-CMP cleaning tool to the next step in the device fabrication process. Thus, the present invention provides a method and system for efficiently removing CMP contaminants and byproducts from the surface of a wafer after the completion of CMP processing. The present invention provides for efficient post-CMP cleaning that does not risk damaging the surface of the wafer. The present invention effectively cleans a post-CMP wafer surface of contaminants /byproducts without causing damage. The foregoing descriptions of specific embodiments of the present invention have been presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the invention to the precise forms disclosed, and obviously many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order best to explain the principles of the invention and its practical application, thereby to enable others skilled in the art best to utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.

Claims: CLAIMS What is claimed is: 1. A method of cleaning a semiconductor wafer, said method comprising the steps of: a) placing said semiconductor wafer within a sealed chamber; b) introducing a vaporized cleaning fluid into said sealed chamber wherein said vaporized cleaning fluid is adapted to interact with a surface of said semiconductor wafer and to react with contaminant particles attached to said surface; c) introducing a chemical cleaning solution into said sealed chamber; and d) scrubbing contaminant particles away from said semiconductor wafer with a brush adapted to contact said surface of said semiconductor wafer. 2. A method as recited in Claim 1 further including a step of spin drying said semiconductor wafer after said scrubbing step. 3. A method as recited in Claim 1 wherein said semiconductor wafer is a chemically and mechanically planarized semiconductor wafer. 4. A method as recited in Claim 3 wherein said chemically and mechanically planarized semiconductor wafer comprises an oxide layer. 5. A method as recited in Claim 4 wherein said vaporized cleaning fluid comprises vaporized hydrofluoric acid. 6. A method as recited in Claim 5 wherein said vaporized cleaning fluid is adapted to remove a thin layer of oxide from said semiconductor wafer. 7. A method as recited in Claim 6 wherein a thickness of said thin layer of oxide is less than 50 Angstroms. 8. A method as recited in Claim 1 further comprising a step of introducing de-ionized water onto said semiconductor wafer concurrently with said step (b). 9. A method as recited in Claim 1 wherein said contaminant particles comprise by-products of chemical mechanical planarization. 10. An apparatus for cleaning a semiconductor wafer, comprising: a) a sealed chamber for holding said semiconductor wafer; b) means for introducing a vaporized cleaning fluid into said sealed chamber wherein said vaporized cleaning fluid is adapted to interact with a surface of said semiconductor wafer and to react with contaminant particles attached to said surface; c) means for introducing said chemical cleaning solution into said sealed chamber; and d) means for scrubbing contaminant particles away from said semiconductor wafer. 11. An apparatus as recited in Claim 10 wherein said semiconductor wafer is a chemically and mechanically planarized semiconductor wafer. 12. An apparatus as recited in Claim 11 wherein said chemically and mechanically planarized semiconductor wafer comprises an oxide layer. 13. An apparatus as recited in Claim 12 wherein said vaporized cleaning fluid comprises vaporized hydrofluoric acid. 14. An apparatus as recited in Claim 13 wherein said vaporized cleaning fluid is adapted to remove a thin layer of oxide from said semiconductor wafer. 15. An apparatus as recited in Claim 14 wherein a thickness of said thin layer of oxide is less than 50 Angstroms. 16. An apparatus as recited in Claim 10 further comprising means for introducing de-ionized water into said sealed chamber concurrently with introduction of said vaporized cleaning fluid. 17. An apparatus as recited in Claim 10 wherein said contaminant particles comprise by-products of chemical mechanical planarization. 18. An apparatus as recited in Claim 10 wherein said means for introducing a vaporized cleaning fluid into said sealed chamber is a first inlet adapted to infroduce a vaporized cleaning fluid into said sealed chamber. 19. An apparatus as recited in Claim 10 wherein said means for introducing said chemical cleaning solution into said sealed chamber is a second inlet adapted to infroduce a chemical cleaning solution into said sealed chamber. 20. An apparatus as recited in Claim 10 wherein said means for scrubbing contaminant particles away from said semiconductor wafer is a brush adapted to contact said surface of said semiconductor wafer to scrub contaminant particles away from said semiconductor wafer.

Inventors: WELING MILIND GANESH, ZHANG LIMING, WELING, MILIND, GANESH, ZHANG, LIMING
Applicants: KONINKL PHILIPS ELECTRONICS NV, PHILIPS SEMICONDUCTORS INC, KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS SEMICONDUCTORS, INC.
Application year: 2000
Main classification: H01L21
IPC codes: B08B1, B08B3, H01L21