IMPROVED EFFICIENCY OF A MULTIPHASE SWITCHING POWER SUPPLY DURING LOW POWER MODE

Abstract: A multiphase power supply that minimizes losses during a low power model. In a particular embodiment, a multiphase power supply may include a plurality of switching regulators coupled in parallel with respect to one another. The multiphase power supply further comprises a phase control circuit coupled to each of the switching regulators. The phase control circuit is configured to generate a plurality of control signals for controlling the switching of the switching regulators so that they are out of phase with respect to one another. During the low power mode of operation of the microprocessor, the phase control circuit is configured to selectively suspend operation of a subset of switching regulators by removing or disabling at least one of the plurality of control signals to each of the subset of switching regulators.

Description: TITLE: IMPROVED EFFICIENCY OF A MULTIPHASE SWITCHING POWER SUPPLY DURING LOW POWER MODE BACKGROUND OF THE INVENTION 1 Technical Field The present invention relates to the field of power supplies, and more particularly to multiphase switching power supplies 2 Background Art Power supplies are used in various types of devices There are many specialized types of power supply circuits with vaπous advantages and disadvantages Microprocessors in computers may require a power supply circuit that regulates a high level of current while maintaining a high level of efficiency One such type of specialized power supply circuit is a switching regulator Switching regulators typically provide an output with a lower voltage than the unregulated input while at the same time providing an output with a higher current than the current drawn from the unregulated supply This is accomplished by a passive transistor that is constantly switching between the saturation mode and the nonconducting mode Because the passive transistor is either in saturation or not conducting, there is very low power dissipation A switching regulator therefore can regulate a high amount of current at a high efficiency rate A disadvantage with switching regulators is known as the "πpple effect " The ripple effect refers to πpples that are periodic variations in the output voltage that have to be smoothed out in order to generate a genuine DC current The ripple effect problem may be reduced or eliminated by coupling multiple switching regulators in parallel and operating them such that they are out of phase with respect to one another This configuration is known as a multiphase switching regulator A multiphase switching regulator typically produces a high current output with high efficiency while at the same time reducing πpple Consequently, a multiphase switching regulator is a popular choice for use in a power supply circuit where high levels of current and efficiency are desired Many microprocessors are configured to selectively operate in a low power mode of operation During low power mode, the microprocessor may be configured to power down certain functional blocks (e g those that are inactive) and/or reduce the frequency of its internal clock(s) Powering down certain portions of the microprocessor and or reducing clocking frequencies may advantageously reduce power consumption When the microprocessor returns to a normal mode of operation, the microprocessor draws relatively higher amounts of current Unfortunately, when the microprocessor is operating in low power mode, a multiphase switching regulator becomes more inefficient as a percentage of the total current generated This is because the transistors in the switching regulators continue to switch at the same frequency as during the normal mode of operation Since the transistors are switching at the same frequency, the capacitive losses associated with the switching are the same during the low power and normal modes of operation However, since less current is drawn during the low power mode of operation, the switching becomes more inefficient as a percentage of the total current generated Therefore, an improved multiphase power supply circuit is desired that will lower switching-related power losses during low power modes of operation DISCLOSURE OF INVENTION The problems outlined above may in large part be solved by a power supply that lowers power losses during a low power mode of operation. In one embodiment, a multiphase power supply mcludes a plurality of switching regulators coupled in parallel with respect to one another. Each switching regulator may operate concurrently, and each may be controlled out of phase with respect to one another. In a particular embodiment, each switching regulator may be a synchronous switching regulator. The multiphase power supply further mcludes a phase control circuit coupled to the plurality of switching regulators. The phase control circuit is configured to selectively suspend operation of at least one of the switching regulators dunng a low power mode of operation. The phase control circuit may further be configured to control the switching of the switching regulators so that they are out of phase with respect to one another. Vaπous embodiments of the multiphase power supply may advantageously allow for relatively high cuπent capabilities during a normal mode of operation, while minimizing losses during the low power mode of operation. By suspending operation of a subset of switching regulators during the low power mode of operation, capacitive switching losses associated with the transistors of the suspended switching regulators may be eliminated Therefore, overall efficiency of the power supply may be improved BRIEF DESCRIPTION OF DRAWINGS A better understanding of the present invention can be obtained when the following detailed description of the preferred embodiment is considered in conjunction with the following drawings, in which' Figure 1 illustrates a particular embodiment of a multiphase power supply; Figure 2 is a timing diagram illustrating the duty cycles of selected transistors of Figure 1 during a normal mode of operation; Figure 3 is a timing diagram illustrating reduced duty cycles of selected transistors of Figure 1 during a normal mode of operation, Figure 4 is a timing diagram illustrating the duty cycles of selected transistors of Figure 1 during a low power mode of operation; and Figure 5 illustrates another embodiment of a multiphase power supply While the invention is susceptible to vaπous modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the drawings and detailed description thereto are not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the present invention as defined by the appended claims MODE(S) FOR CARRYING OUT THE INVENTION Figure 1 illustrates a particular embodiment of a multiphase power supply 100. Multiphase power supply 100 comprises a plurality of synchronous switching regulators designated as 110A, HOB, HOC and HOD Synchronous switching regulators 110A-D may, individually or collectively be refeπed to as switching regulator 110 or switching regulators 110, respectively Switching regulators 110 are coupled to provide power to a microprocessor 160 at node 170 Multiphase power supply 100 further comprises a phase control circuit 150 coupled to each of switching regulators 110 It is important to note that different embodiments may comprise more or less than four switching regulators In the illustrated embodiment each switching regulator 110 includes a pair of transistors (e g , transistors 101 and 102, transistors 111 and 112, etc ) coupled between a power supply terminal Vcc and ground Each switching regulator 110 further includes a diode (e g , diodes 103, 113, etc ), an inductor (e g inductors 104, 114, etc ) and a capacitor (e g , capacitors 105, 115, etc ) It is noted that other specific circuit arrangements may be employed to implement each switching regulator 110 Phase control circuit 150 is configured to generate a plurality of control signals for controlling the states of the transistors in switching regulators 110 such that the switching regulators 1 10 operate out of phase with respect to one another In a particular embodiment, phase control circuit 150 may include a Semtech SCI 144 integrated circuit As will be described in further detail below, phase control circuit 150 also includes further circuitry to selectively suspend operation of a subset of switching regulators 110 during a low power mode of operation to thereby allow for improved efficiency Figures 2-4 illustrate aspects of the operation of multiphase power supply 100 Figures 2 and 3 are timing diagrams illustrating exemplary duty cycles associated with transistors 101, 111, 121 and 131 during a normal mode of operation Figure 4 is a timing diagram illustrating exemplary duty cycles associated with transistors 101, 111, 121 and 131 durmg a low power mode of operation Turning collectively to Figures 1 and 2, phase control circuit 150 activates (l e turns on) transistors 101,111,121 and 131, respectively, during different phases of operation During a first phase of operation ("phase 1 "), transistor 101 is turned on while transistors 11 1, 121 and 131 are turned off Since each switchmg regulator 110 is embodied as a synchronous regulator, when transistor 101 is turned on, transistor 102 is turned off (in response to a corresponding control signal from phase control circuit 150) Thus, durmg phase 1, current flows from Vcc through transistor 101 and inductor 104 to charge capacitor 105 Also dunng phase 1, transistors 111, 121 and 131 are turned off, and transistors 112, 122 and 132 are turned on Durmg the next phase of operation ("phase 2"), phase control circuit 150 turns off transistor 101 and turns on transistor 102 When transistor 102 is turned on and transistor 101 is turned off, current may continue to temporarily flow through mductor 104 to charge capacitor 105 since current flow through inductor 104 cannot change mstantaneously Transistor 102 provides a return path for this cuπent Also durmg phase 2, transistor 111 of switchmg regulator 110B is turned on and transistor 112 is turned off Consequently, similar to the previous discussion, capacitor 115 is charged by current flow from Vcc through transistor 111 Subsequent operations of switching regulators 510C and 510D durmg phases 3 and 4 are similar Phase control circuit 150 may be further configured to monitor the output voltage, Vout, at node 170 via a feedback control signal and adjust accordingly the duty cycle of transistors 101, 111, 121 and 131 to mamtain a constant voltage level Figure 3 illustrates an exemplary situation where the duty cycle of transistors 101, 111, 121 and 131 of Figure 1 is lessened due to, for example reduced current draw by microprocessor 160 The duty cycle of transistors 101, 111, 121 and 131 would mcrease relative to the example of Figure 2 if there were a decreased output voltage at node 170, I e , due to mcreased current draw by microprocessor 160 As stated previously, microprocessor 160 is configured to operate m a low power mode of operation Durmg such mode of operation, microprocessor 160 requires less cuπent The low power mode of operation may be controlled by, for example, a power management unit (not shown) which detects certain system inactivity, as desired Phase control circuit 150 is configured to selectively suspend operation of a subset of switchmg regulators 110 (e g switchmg regulators HOB, HOC and HOD) upon assertion of a low power mode control signal which mdicates that microprocessor 160 is cuπently operating m a low power mode The low power mode control signal may be received from the power management unit As depicted m Figure 4, m this embodiment, phase control circuit 150 suspends operation of switchmg regulator circuits 110B, 110C and 110D dunng the low power mode by removmg (or otherwise drivmg or disablmg) the control signals provided to the associated switchmg transistors 111, 112, 121, 122, 131 and 132 such that the transistors are held m an off state Durmg this mode, switchmg regulator 110A operates m its normal manner as described previously Figure 5 illustrates another embodiment of a multiphase power supply 500 Multiphase power supply 500 of Figure 5 differs from multiphase power supply 100 of Figure 1 in that transistors 102, 1 12, 122 and 132 have been omitted Thus, the switching regulators, e g 510A, 510B, 510C and 510D, of Figure 5 are not synchronous regulators A respective diode I e , diode 503, 513, 523 or 533, of each switchmg regulator 510 provides a return path for cuπent to flow when the associated transistor, l e , transistor 501, 511, 521 or 531, is turned off Various embodiments of the multiphase power supply may advantageously allow for relatively high cuπent capabilities during a normal mode of operation, while minimizing losses during the low power mode of operation By suspending operation of a subset of switching regulators during the low power mode of operation, capacitive switching losses associated with the transistors of the suspended switching regulators may be eliminated Therefore, overall efficiency of the power supply may be improved It is noted that while in the above described embodiments, a total of four switching regulators are depicted m each of the power supplies, other embodiments are possible where other numbers of switching regulators may be provided Similarly, while in the above described embodiments during the low power mode of operation all but one of the switching regulators is suspended from operation, other embodiments are possible where any number of switching regulators may be suspended Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated It is intended that the following claims be interpreted to embrace all such variations and modifications INDUSTRIAL APPLICABILITY This invention is applicable to power supplies

Claims: WHAT IS CLAIMED IS: A power supply compnsmg a first switchmg regulator circuit (110A), a second switchmg regulator circuit ( 11 OB), a phase control circuit (150) coupled to said first switchmg regulator circuit and to said second switchmg regulator circuit, wherem said phase control circuit is configured to generate a plurality of switchmg control signals for controlling switchmg of said first and second switchmg regulator circuits, characterized m that said phase control circuit is configured to selectively suspend operation of said second switchmg regulator in response to receiving a signal indicative of a low power mode of operation 2 A power supply compnsmg a first switchmg regulator circuit (110A), a second switchmg regulator circuit (110B), a third switchmg regulator circuit ( 110C) , a fourth switchmg regulator circuit (110D), a phase control circuit (150) coupled to said first switchmg regulator circuit, said second switchmg regulator circuit, said third switchmg regulator circuit and said fourth switchmg regulator circuit, wherein said phase control circuit is configured to generate a plurality of switchmg control signals for controlling switchmg of said first, second, third and fourth switchmg regulator circuits, characterized m that said phase control circuit is configured to selectively suspend operation of said second, third and fourth switchmg regulator circuits m response to receivmg a signal indicative of a low power mode of operation 3 The power supply as recited in either claim 1 or claim 2, wherem said phase control circuit (150) selectively suspends operation of said second switchmg regulator (HOB) circuit dunng said low power mode of operation by disablmg at least one of said plurality of control signals to said second switchmg regulator circuit 4 The power supply as recited in any of the preceding claims, wherem each of said first and second switching regulator circuits compnses a first transistor (101, 111) and a second transistor (102, 112), wherem said phase control circuit selectively activates and deactivates said first and second transistor with said control signals 5 The power supply as recited in any of the preceding claims, wherem said phase control circuit (150) selectively activates and deactivates said first and second switchmg regulator circuits so that said first and second switchmg regulator circuits are out of phase with respect to one another 6 The power supply as recited in any of the precedmg claims, wherem each of said first and second switchmg regulator circuits further compnses a capacitor (105, 115) coupled to receive charge from said first transistor m response to said first transistor being activated, and an mductor (104, 114) coupled to said capacitor to provide current to said capacitor in response to said first transistor being deactivated 7 The power supply as recited m either claim 1 or claim 2, wherem each of said first and second switchmg regulator circuits (510A, 51 OB) comprises a first transistor (501, 511), wherem said phase control circuit selectively activates and deactivates said first transistor 8 The power supply as recited in claim 7, wherem said phase control circuit (150) selectively activates and deactivates said first and second switchmg regulator circuits (510A, 510B) so that said first and second switchmg regulator circuits are out of phase with respect to one another 9 The power supply as recited in claim 8, wherem each of said first and said second switching regulator circuits further comprises a capacitor coupled to receive charge from said first transistor in response to said first transistor being activated, and an mductor coupled to said capacitor to provide cuπent to said capacitor m response to said first transistor bemg deactivated 10 A computer system comprising a microprocessor, a power supply as recited in any of claims 1-9 coupled to said microprocessor

Inventors: CHEN MARY, HERNANDEZ CARL, TRESSLER CHRIS, CHEN, MARY, HERNANDEZ, CARL, TRESSLER, CHRIS
Applicants: ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.
Application year: 2000
Main classification: H02M3
IPC codes: G05F1, H02M3