ABRASIVES FOR CHEMICAL MECHANICAL POLISHING

Abstract: A slurry for use in polishing a first material having a first hardness, wherein the first material overlies a second material having a second hardness, and the second hardness is greater than the first hardness, includes an abrasive that has a hardness which is greater than that of the first material but less than that of the second material. In a particular embodiment of the present invention copper overlying a copper diffusion barrier is polished with a slurry having an abrasive which is harder than copper but less hard than the copper diffusion barrier. Iron oxide, strontium titanate, apatite, dioptase, iron, brass, fluorite, hydrated iron oxide, and azurite, are examples of materials that are harder than copper but less hard than materials typically used as copper diffusion barriers in integrated circuits.

Description: ABRASIVES FOR CHEMICAL MECHANICAL POLISHING Background of the Invention Field of the Invention The present invention relates to the field of chemical mechanical polishing (CMP), and more specifically, to slurries and methods for chemical-mechanical polishing of metal. Background Advances in semiconductor manufacturing technology have led to the development of integrated circuits having multiple levels of interconnect. In such an integrated circuit, patterned conductive material on one interconnect level is electrically insulated from patterned conductive material on another interconnect level by films of material such as, for example, silicon dioxide. These conductive materials are typically a metal or metal alloy. Connections between the conductive material at the various interconnect levels are made by forming openings in the insulating layers and providing an electrically conductive structure such that the patterned conductive material from different interconnect levels are brought into electrical contact with each other. These electrically conductive structures are often referred to as contacts or vias. Other advances in semiconductor manufacturing technology have lead to the integration of millions of transistors, each capable of switching at high speed. A consequence of incorporating so many fast switching transistors into an integrated circuit is an increase in power consumption during operation. One technique for increasing speed while reducing power consumption is to replace the traditional aluminum and aluminum alloy interconnects found on integrated circuits with a metal such as copper, which offers lower electrical resistance. Those skilled in the electrical arts will appreciate that by reducing resistance, electrical signals may propagate more quickly through the interconnect pathways on an integrated circuit. Furthermore, because the resistance of copper is significantly less than that of aluminum, the cross-sectional area of a copper interconnect line, as compared to an aluminum interconnect line, may be made smaller without incurring increased signal propagation delays based on the resistance of the interconnect. Additionally, because the capacitance between two electrical nodes is a function of the overlap area between those nodes, using a smaller copper interconnect line results in a decrease in parasitic capacitance. In this way, replacing aluminum based interconnects with copper based interconnects provides, depending on the dimensions chosen, reduced resistance, reduced capacitance, or both. As noted above, copper has electrical advantages, such as lower resistance per cross-sectional area, the ability to provide for reduced parasitic capacitance, and greater immunity to electromigration. For all these reasons, manufacturers of integrated circuits find it desirable to include copper in their products. While advantageous electrically, copper is difficult to integrate into the process of making integrated circuits. As is known in this field, copper can adversely affect the performance of metal oxide semiconductor (MOS) field effect transistors (FETs) if the copper is allowed to migrate, or diffuse, into the transistor areas of an integrated circuit. Therefore copper diffusion barriers must be used to isolate copper metal from those transistor areas. Additionally, unlike aluminum based metal interconnect systems which are formed by subtractive etch processes, copper interconnects are typically formed by damascene metal processes. Such processes are also sometimes referred to as inlaid metal processes. In a copper damascene process, trenches are formed in a dielectric layer, a diffusion barrier layer is formed over the dielectric layer, including the trenches and a copper layer is formed over the diffusion barrier layer. Excess copper is then polished off leaving individual copper interconnect lines in the trenches. The removal of the excess copper is typically accomplished by chemical mechanical polishing (CMP). Portions of the barrier layer which reside on a top surface of the dielectric layer are also removed, typically by CMP. Although both copper and portions of the copper diffusion barrier may be removed by CMP, these materials typically have different physical properties which tend to make the conditions which are suitable for polishing one of the materials, less than optimal for polishing the other. Accordingly, there is a need for CMP methods, materials, and apparatus to polish combinations of layers such as, for example, copper and copper diffusion barriers. Brief Description of the Drawings Fig. 1 is a schematic cross-sectional view of a copper damascene structure. This structure represents a post-plating, pre-polishing state of fabrication. Fig. 2 is a schematic cross-sectional view of the copper damascene structure of Fig. 1 after polishing with a slurry in accordance with the present invention. Fig. 3 is a flowchart showing the operations in a process of polishing a first film of a first hardness which is disposed over a second film of greater hardness, in accordance with the present invention. Detailed Description Briefly, a slurry for use in polishing a first material having a first hardness, wherein the first material overlies a second material having a second hardness, and the second hardness is greater than the first hardness, includes an abrasive that has a hardness which is greater than that of the first material but less than that of the second material. Such a slurry may also useful for the case where a softer material overlies a hard material film, which in turn overlies a hard substrate, if the abrasive hardness strategy of the present invention provides a better selectivity to the hard substrate than to the hard material film, then both materials may be successfully removed from the substrate with the slurry of the present invention. A method and slurry for the chemical-mechanical polishing of copper are described in connection with an exemplary embodiment of the present invention. In the following description numerous specific details are set forth to provide an understanding of the present invention. It will be apparent, however, to those skilled in the art and having the benefit of this disclosure, that the present invention may be practiced with apparatus and processes that vary from those specified here. Terminology The terms, chip, integrated circuit, monolithic device, semiconductor device or component, microelectronic device or component, and similar terms and expressions, are often used interchangeably in this field. The present invention is applicable to all the above as they are generally understood in the field. The terms metal line, trace, wire, conductor, signal path and signaling medium are all related. The related terms listed above, are generally interchangeable, and appear in order from specific to general. In this field, metal lines are sometimes referred to as traces, wires, lines, interconnects or simply metal. The terms contact and via, both refer to structures for electrical connection of conductors from different interconnect levels. These terms are sometimes used in the art to describe both an opening in an insulator in which the structure will be completed, and the completed structure itself. For purposes of this disclosure contact and via refer to the completed structure. The expression, low dielectric constant material, refers to a material having a lower dielectric constant than silicon dioxide. Substrate, as used herein, refers to the physical object that is to be polished by means of the CMP process. A substrate may also be referred to as a wafer. Wafers, may be made of semiconducting, non-semiconducting, or combinations of semiconducting and non-semiconducting materials. Silicon wafers may have thin films of various materials formed upon them. These thin films may be polished with CMP processes. Other substrate materials such as GaAs, silicon-on-sapphire, or silicon on insulator (SOI) may be polished with CMP processes. Fig. 1 shows a cross sectional view of a copper damascene structure. An interlayer dielectric layer (ILD) is patterned to form ILD 102 on a surface of a wafer as illustrated in the figure. ILD 102 has a thickness represented by T| LD0 in Fig. 1. A copper diffusion barrier 104 is formed over the exposed surfaces of the wafer and ILD 102. Various materials may be used as the copper diffusion barrier. Examples of copper diffusion barriers include, but are not limited to, tantalum and tantalum nitride. Typically a copper seed layer is then formed on copper diffusion barrier 104. A complete copper layer 106 is then formed, typically by plating, over diffusion barrier 104. Conventional methods of copper polishing for integrated circuit manufacturing include using an alumina-based, or silica-based, slurry, typically at a pH equal to or less than 7.5. Abrasives such as alumina and silica have a hardness which is greater than that of copper, and greater than that of copper diffusion barriers such as tantalum and tantalum nitride. Slurries developed for copper CMP consist of two main constituents: the abrasive that provides the mechanical action (in combination with the pad and process parameters (e.g., pressure)); and the chemistry that maintains the pH for the process, establishes the redox potential, inhibits corrosion, improves selectivity, and so on. It is also possible for the abrasive to interact with chemistry through surface charge and surface radicals. It is well known that polishing can occur by fluid wear or by Hertzian indentation. In the latter mechanism, abrasive particles are dragged across the polish surface acting essentially as cutting tools. During CMP both wear and indentation occur. Which mechanism predominates depends on the film properties, process conditions, chemistry, and the polish pad. However, it is clear that for hard and relatively inert films, indentation predominates. For an abrasive particle to indent the surface of a film it must be harder that the film. The Moh's hardness is a relative hardness scale used primarily by the mineral industry. In this scale, a first material is harder than a second material if the first material scratches the second material. For example, diamond is harder than glass because diamond will scratch glass. The Moh scale is an ideal one to use for the indentation model. In accordance with the present invention, the hardness of the abrasive that should be used for a selective slurry, is that which is harder than the layer to be polished, but softer than the stopping layer. From Table 1 below, it is clear that to polish copper and stop on TaN, Ta, or SiOF, an abrasive should be used that has a Moh's hardness greater than 3.0 and less than 6.5. Moh hardness is a relative scale that is used for dry materials. CMP slurries are wet, and the hardness of the particle in the slurries may be slightly different than that of the dry numbers. Therefore the hardness range of 3.0 to 6.5 is considered an approximation. Many CMP applications require the polishing of a first layer of material and stopping on an underlying second layer made from a different material. This second layer is sometimes referred to as a polish stop layer. For such applications, slurries have been developed that primarily focus on adjusting chemistries to achieve these requirements. Embodiments of the present invention however, achieve these goals by adjusting the mechanical, rather the chemical, properties of the slurry by choosing an abrasive having a hardness that lies between that of the layer to be polished and the polish stop layer. Desirable attributes for a copper polish slurry are: high polish rate, low (or zero) copper etch rate, and high selectivity between the copper layer and the copper diffusion barrier layer. Alternatively, if the slurry has an adequate polish rate for the diffusion barrier, which typically underlies the copper, then the slurry should have a high selectivity to the inter-layer dielectric (ILD), which typically underlies the diffusion barrier, in order to permit continued polishing through the diffusion barrier and stopping on the ILD. A high selectivity between the copper and the copper diffusion barr er layer means that a slurry used for removal of copper by polishing with that slurry, should remove the copper without significantly polishing the underlying copper diffusion barrier layer. A copper polish slurry, in accordance with the present invention, meets these criteria for a desirable copper polish slurry. In particular, the inventive slurry includes an abrasive chosen such that the hardness of the abrasive is between that of copper and the copper diffusion barrier. Fig. 2 is a schematic cross-sectional view of the copper damascene structure of Fig. 1 after polishing with a slurry in accordance with the present invention. Table 1 , below, shows the relative hardness of various materials in the Moh's Hardness scale, and where available, in the Microhardness scale. TABLE 1 Slurry Example An exemplary slurry, in accordance with the present invention, for chemical mechanical polishing of copper disposed over a barrier layer such as for example tantalum or tantalum nitride, includes 2 to 4 wt. % hydrogen peroxide; a corrosion inhibitor such as 0.015 to 0.045 M benzotriazole; a buffer system to maintain the pH in a range between 3.5 and 7.0; and an abrasive in the range of 0.5 to 10 wt. %. In order to achieve the desired high polish selectivity between copper and the copper diffusion barrier the abrasive must have a hardness greater than that of copper and less than that of tantalum or tantalum nitride. Abrasive materials meeting the hardness requirements of the present invention include, but are not limited to, iron oxide (sometimes referred to as red rouge), strontium titanate, apatite, dioptase, iron, brass, fluorite, hydrated iron oxide (sometimes referred to yellow rouge), and azurite. A slurry in accordance with the present invention may include one or more of the abrasives listed above, and may include one or more abrasives meeting the hardness requirements described herein. Those skilled in the art will recognize that water is also an ingredient of most slurries, and is an ingredient of the exemplary slurry as well. Corrosion inhibitors which may be used as an alternative to benzotriazole include other forms of benzotriazole such as 5-methyl benzotriazole or 1 -methyl benzotriazole, however this list is not intended to be limiting, and other suitable corrosion inhibitors may be used. Examples of pH buffer systems include, but are not limited to, citric acid and potassium citrate; acetic acid and potassium citrate; and phosphoric acid and potassium phosphate. In one embodiment of the present invention a slurry includes 2 wt. % abrasive, 3 wt % H 2 O 2 , 0.03 M benzotriazole, 3.0 grams/liter citric acid, 3.0 grams/liter potassium citrate, and has a pH of 3.85. More particularly, the abrasive is a hydrated Fe 2 O 3 , with a particle size of 1 to 5 microns, available as FE-605 Yellow from Atlantic Equipment Engineers , 13 Foster Street, Bergenfield, NJ 07621. This example is provided simply to illustrate the present invention. Those skilled in the art will appreciate that a slurry formulated in accordance with the present invention may also include some reaction products of the various ingredients. Method Referring to Fig. 3, a general method in accordance with the present invention is described, wherein a first material overlying a second, harder material is removed by polishing. More particularly, a slurry is provided (block 302) to a polishing pad of a polishing apparatus. Such a polishing apparatus is typically a well-known CMP apparatus. The slurry contains an abrasive that is harder than a first material and less hard than a second material. A substrate having a first layer, and a second underlying layer thereon, is brought into contact with the polishing pad (block 304). The first layer is a material that is less hard than the abrasive in the slurry, and the second layer is a material that is harder than the abrasive. The first layer is then polished (block 306) in accordance with typical CMP practices of rotating the polishing pad and substrate while supplying slurry to the polishing pad and maintaining a down- force such that the substrate and polishing pad remain in contact and the desired polishing rate is achieved. When the first layer is removed, polishing substantially stops on the second layer (block 308) because the second layer is made of a material that is harder than the abrasive, and the slurry is formulated to rely primarily on the mechanical properties of the abrasive rather than the chemical properties of the slurry. A method of forming copper interconnect, in accordance with the present invention includes forming a dielectric layer over a substrate, the dielectric layer having trenches therein, forming a copper diffusion barrier in the trenches and on a top surface of the dielectric layer, depositing copper over the copper diffusion barrier, and polishing the copper with a slurry that includes an abrasive harder than copper and less hard than the copper diffusion barrier. In one embodiment of the present invention, the abrasive, or mixture of abrasives, are also less hard than the underlying dielectric layer. More particularly, in this illustrative embodiment of the present invention, the dielectric layer is primarily an oxide of silicon and the trenches are patterned by conventional photolithographic techniques. However, any method suitable for forming trenches may be used. The copper diffusion barrier may be any suitable material for substantially or completely preventing the diffusion of copper into the dielectric layer. Various materials, both electrically conductive and insulative have been used as copper diffusion barriers. Typical embodiments include conductive materials, such as, but not limited to, tantalum and tantalum nitride, as copper diffusion barriers. After the barrier layer is formed, a copper seed layer is typically formed on the barrier, and then copper is plated on. Subsequent to plating, the substrate, with the copper metal plated over the diffusion barrier, may be subjected to polishing in a chemical mechanical polishing (CMP) apparatus. Such CMP apparatus are known in this field. The substrate with copper metal thereon may or may not be subjected to an anneal operation prior to polishing. In accordance with the present invention, a slurry with a particular range of mechanical, or abrasive, properties, (such as described above) is provided to the CMP apparatus for the desired polishing operation. In particular, the slurry contains an abrasive having a hardness that is greater than the hardness of the copper, but less hard than the copper diffusion barrier. Exemplary polishing conditions may include a polish pressure of approximately 3.75 pounds per square inch (psi), a delta P of approximately 0.3 psi, pad revolutions per minute (rpm) of approximately 440, head rpm of approximately 9, a slurry flow of approximately 100 cubic centimeters per minute (ccm), and an FX-9, 80 mil pad from Freudenberg of Lowell, Massachusetts. Such a slurry and process may be used to remove, by polishing, copper and a TaN barrier layer and stop on the underlying interlayer dielectric. For, example a hydrated iron oxide (yellow rouge) abrasive is harder than copper but softer than both TaN and SiOF (although TaN is softer than SiOF), and is capable of removing the copper and the TaN since the removal rate for the TaN, although low compared to copper, is greater than that of SiOF. Methods and slurries in accordance with the present invention may be used with various interlayer dielectric materials. For example, even though SiO 2 has traditionally been the dielectric material used between interconnect levels on integrated circuits, various low-k dielectric materials, including but not limited to, SiOF may also be used with embodiments of the present invention. SiOF is believed to be less hard than SiO 2 . Likewise, TaN is believed to be less hard than Ta. The TaN typically used as a copper diffusion barrier may actually be thought of as a tantalum mixture of tantalum and nitrogen with the nitrogen content being on the order of 30 atomic %. This type of tantalum nitride is often formed by a reactive sputter operation. Conclusion Embodiments of the present invention provide slurries for chemical mechanical polishing of multi-layer films wherein a first layer overlies a second layer which is harder than the first layer. An advantage of embodiments of the present invention is that the abrasive property is used to provide high selectivity. A further advantage of embodiments of the present invention is that is polish rates for materials having different hardnesses can be tuned by selecting for use in a polish slurry, an abrasive having a hardness that lies between that of the materials to be polished. It will be apparent to those skilled in the art that a number of variations or modifications may be made to the illustrative embodiments described above. For example, various combinations, slurry pH, slurry delivery rate, pad rotation speed, pad temperature, and so on, may be used within the scope of the present invention. Other modifications from the specifically described apparatus, slurry, and process will be apparent to those skilled in the art and having the benefit of this disclosure. Accordingly, it is intended that all such modifications and alterations be considered as within the spirit and scope of the invention as defined by the subjoined Claims.

Claims: What is claimed is: 1. A method of forming interconnect, comprising: forming a dielectric layer over a substrate, the dielectric layer having trenches therein; forming a barrier in the trenches and on a top surface of the dielectric layer; depositing metal over the barrier; and polishing the metal with a slurry that includes an abrasive harder than the metal and less hard than the barrier. 2. The method of Claim 1 , wherein the dielectric layer comprises an oxide of silicon, and the barrier is electrically conductive. 3. The method of Claim 1 , wherein the dielectric layer comprises a fluorinated oxide of silicon, and the barrier is selected from the group consisting of tantalum, and tantalum nitride. 4. The method of Claim 1 , wherein the abrasive has a Moh's hardness between approximately 3.5 and 6. 5. The method of Claim 4, wherein the slurry has a pH between approximately 3.5 and 7. 6. The method of Claim 4, wherein the slurry contains approximately 0.5% to 10% by weight of the abrasive. 7. The method of Claim 1 , wherein the slurry contains an oxidizer comprising H 2 O 2 . 8. The method of Claim 1 , wherein polishing comprises chemical mechanical polishing. 9. The method of Claim 1 , wherein the dielectric layer comprises SiOF, the barrier layer comprises tantalum, depositing comprises plating, and the abrasive comprises one or more materials selected from the group consisting of iron oxide, strontium titanate, apatite, dioptase, iron, brass, fluorite, hydrated iron oxide, and azurite. 10. The method of Claim 9, wherein the slurry has a pH in the range of 3.5 to 11. A method of polishing a first film overlying a second film wherein the second film is harder than the first film, comprising: polishing the first film with a slurry comprising an abrasive having a hardness greater than a hardness of the first film and less than the hardness of the second film. 12. The method of Claim 11 , wherein the first film comprises copper and the second film is comprises a material selected from the group consisting of tantalum and tantalum nitride. 13. The method of Claim 12, wherein the abrasive comprises a material selected from the group consisting of iron oxide, strontium titanate, apatite, dioptase, iron, brass, fluorite, hydrated iron oxide, azurite, and combinations thereof. 14. The method of Claim 13, wherein the abrasive comprises approximately 0.5 to 10 wt.% of the slurry. 15. A slurry, comprising: an oxidizer; a corrosion inhibitor; a buffer system; and an abrasive; wherein the slurry is characterized by providing a high Cu polish rate, a low Cu etch rate, and a high selectivity to a Cu diffusion barrier when used for chemical mechanical polishing. 16. The slurry of Claim 15, wherein the Cu diffusion barrier comprises Ta. 17. The slurry of Claim 15, wherein the Cu diffusion barrier comprises TaN. 18. The slurry of Claim 15, wherein the abrasive is harder than Cu and less hard than the Cu diffusion barrier. 19. A slurry, comprising: an oxidizer; a corrosion inhibitor; a buffer system; and an abrasive; wherein the abrasive is harder than a Cu diffusion barrier, and less hard than a dielectric material. 20. The slurry of Claim 19, wherein the Cu diffusion barrier comprises a material selected from the group consisting of Ta and TaN; and the dielectric material comprises a material selected from SiO 2 and SiOF. 21. A slurry, comprising: an oxidizer; a corrosion inhibitor; a buffer system; and an abrasive; wherein the abrasive is harder than Cu, and less hard than a Cu diffusion barrier, and less hard than a dielectric material. 22. The slurry of Claim 21 , wherein the Cu diffusion barrier comprises a material selected from the group consisting of Ta and TaN; and the dielectric material comprises a material selected from the group consisting of SiO 2 and SiOF. 23. The slurry of Claim 22, wherein the abrasive comprises hydrated iron oxide. 24. A method of forming a damascene structure, comprising: forming trenches in an insulating layer disposed on a substrate, the trenches having a bottom surface and side surfaces; forming a barrier layer over a top surface of the insulating layer and over the bottom and side surfaces, the barrier layer having a first hardness; forming a layer of metal over the barrier layer; and removing the metal layer from over the that portion of the barrier layer that overlies the top surface of the insulating layer; wherein removing the metal layer comprises polishing the metal with a slurry having an abrasive that is harder than the metal and less hard than the barrier layer. 25. The method of Claim 24, wherein the metal comprises copper, the barrier layer comprises tantalum nitride, and the dielectric layer comprises a fluorinated oxide of silicon; and further comprising removing the barrier layer by polishing with the slurry. 26. The method of Claim 25, wherein the abrasive comprises a material selected from the group consisting of iron oxide, strontium titanate, apatite, dioptase, iron, brass, fluorite, hydrated iron oxide, and azurite. 27. A slurry for polishing copper overlying a barrier layer, comprising: water; hydrogen peroxide; a corrosion inhibitor; a pH buffer; and an abrasive; wherein the abrasive has a hardness between hardness of copper and a hardness of the barrier layer. 28. The slurry of Claim 27, wherein hydrogen peroxide comprises 2 to 4 wt. % of the slurry; and the abrasive comprises 0.5 to 10 wt. % of the slurry. 29. The slurry of Claim 28, wherein the corrosion inhibitor comprises 0.015 to 0.045 M benzotriazole. 30. The slurry of Claim 29, wherein the slurry has a pH in the range of approximately 3.5 to 7.

Inventors: CADIEN KENNETH C, FELLER A DANIEL, CADIEN, KENNETH, C., FELLER, A., DANIEL
Applicants: CADIEN KENNETH C, FELLER A DANIEL, INTEL CORP, CADIEN, KENNETH, C., FELLER, A., DANIEL, INTEL CORPORATION
Application year: 2000
Main classification: H01L21
IPC codes: C09G1, H01L21