Chip thermistor

Abstract: A chip thermistor (11) includes a layered structure having a thermistor element (12) and a substrate (16) stacked one above the other with an electrically insulating layer (17a) in between. Ther thermistor element (12) has a pair of surface electrodes (14, 15) on surfaces of a planar thermistor body (13), and a pair of outer electrodes, (18, 19) each on a corresponding one of mutually opposite end parts of this layered structure. Each of these outer electrodes (18, 19) is electrically connected to a corresponding one of the surface electrodes (14, 15). The pair of surface electrodes (14, 15) is preferably each formed so as to cover a major portion of one of the main surfaces of the thermistor body (13) and to reach the opposite main surface through one of its side surfaces, while in a mutually separated and electrically insulated relationship. The substrate (16) may preferably be another thermistor body.

Description: Background of the Invention This invention relates to a chip-type thermistor ("chip thermistor") which may be used for protection against an overcurrent. Chip thermistors include both positive resistance-temperature coefficient (PTC) thermistors and negative resistance-temperature coefficient (NTC) thermistors. A PTC chip thermistor may be incorporated into the circuit of an electronic device so as to generate heat when an overcurrent with intensity greater than a specified level flows therethrough, thereby increasing its resistance due to its positive resistance-temperature characteristic and keeping the intensity of the current flowing into the electronic device below a certain level. Fig. 2 shows a prior art PTC thermistor 1 comprising a thermistor element 5 having surface electrodes 3 and 4 formed on a planar PTC thermistor body 2, electrically insulating layers 6 formed on both main surfaces of the PTC thermistor element 5 so as to cover the surface electrodes 3 and 4, and outer electrodes 7 and 8 formed on both end surfaces of the PTC thermistor element 5 so as to be electrically connected to the surface electrodes 3 and 4. JP 63281402 discloses a chip thermistor with a layered structure having a thermistor element with a planar thermistor body having surfaces and a substrate stacked one above the other, said thermistor element having a pair of surface electrodes on the surfaces of the planar thermistor body; and a pair of outer electrodes each on a corresponding one of mutually opposite end parts of said layered structure, each of said outer electrodes being electrically connected to a corresponding one of said surface electrodes. The PTC thermistor 1, when used for protection against an overcurrent, for example, is required to have a low resistance value in order to reduce the power loss associated with a voltage drop. In general, however, the heat production from a PTC thermistor element increases if the resistance of its ceramic material is reduced. Since the insulating layer 6 of the PTC thermistor 1 is very thin, the heat from the PTC thermistor element 5 travels easily to the circuit board onto which the PTC thermistor 1 is mounted, having ill effects not only on the circuit board itself but also on peripheral devices near by. Summary of the Invention It is therefore an object of this invention in view of these problems to provide an improved chip thermistor capable of reducing the rise in the temperature of the circuit board onto which it is mounted. It is another object of this invention to provide such a chip thermistor capable of maintaining the strength of its planar thermistor element even if it is made thin in order to reduce its resistance. A chip thermistor embodying this invention, with which the above and other objects can be accomplished, may be characterized as comprising a layered structure having a thermistor element and a substrate stacked one above the other with an electrically insulating layer in between, the thermistor element comprising a planar thermistor body having surfaces and having a pair of surface electrodes on said surfaces, and a pair of outer electrodes each on a corresponding one of mutually opposite end parts of this layered structure, each of these outer electrodes being electrically connected to a corresponding one of the surface electrodes. The pair of surface electrodes is preferably each formed so as to cover a major portion of one of the main surfaces of the thermistor body and to reach the opposite main surface through one of its side surfaces, while in a mutually electrically insulated relationship. The substrate may preferably comprise another thermistor body. With an electrically insulating plate thus attached to the surface of the thermistor element facing a circuit board onto which it is to be mounted, the heat generated by the thermistor element is more effectively inhibited from being conducted to the circuit board. Brief Description of the Drawings The accompanying drawings, which are incorporated in and form a part of this specification, illustrate an embodiment of the invention and, together with the description, serve to explain the principles of the invention. In the drawings: Fig. 1 is a sectional view of a PTC chip thermistor embodying this invention; and Fig. 2 is a sectional view of a prior art PTC chip thermistor. Detailed Description of the Invention The invention is described next by way of an example. Fig. 1 shows a PTC chip thermistor 11 embodying this invention, comprising a layered structure having a PTC thermistor element 12 and a substrate 16 pasted together with an insulating layer 17a in between and outer electrodes 18 and 19 formed on end parts of this layered structure. The PTC thermistor element 12 is one obtained by forming by a method of thin-film technology a pair of surface electrodes 14 and 15 each comprising three layers respectively of Cr, monel and Ag on surfaces of a PTC thermistor body 13 which is planar and of dimensions 4.5mm x 3.2mm x 0.2mm. It is preferable that each angular edgejbetween a main surface and a side surface be rounded off such that the surface electrodes 14 and 15 can be of a uniform thickness where they attach themselves to the PTC thermistor body 13 over each edge and that there will be no discontinuity in the surface electrodes 14 and 15 causing an occurrence of incomplete conduction. As shown in Fig. 1, one of the surface electrodes ("first surface electrode" 14) covers a major portion of one of the main surfaces ("first main surface") of the PTC thermistor body 13 and passes over one of its side surfaces to cover a small portion of its other main surface ("second main surface"), and the other of the surface electrodes ("second surface electrode" 15) covers a major portion of its second main surface and passes over another of its side surfaces to cover a small portion of its first main surface such that the two surface electrodes 14 and 15 are in a mutually separated and insulated relationship. Since each of these surface electrodes 14 and 15 is thus formed over both main surfaces and one of the side surfaces of the PTC thermistor body 13, they each make a dependable contact with a corresponding one of the outer electrodes 18 and 19 on the both end surfaces of the PTC thermistor element 12 and are dependably insulated from the other one of the outer electrodes 18 and 19 although these outer electrodes 18 and 19 are formed so as to cover small portions of the main surfaces. The material of which the surface electrodes 14 and 15 may be comprised of does not limit the scope of the invention as long as they have a metallic base layer capable of forming an ohmic contact. This need not be Cr and may be Ni or Al, for example. Neither is the method of their formation intended to limit the scope of the invention. They may be formed by sputtering, by vapor deposition, or by printing and baking an electrically conductive paste. They may be of a layered structure with several layers. Electrically insulating layers 17a and 17b are formed all over on respective one of the main surfaces of the PTC thermistor element 12 by applying a paste of lead boro-silicate glass to a thickness of about 80µm and baking. The substrate 16 (which is essentially another PTC thermistor body without any surface electrode formed thereon) is pasted to the PTC thermistor element 12 with the insulating layer 17a in between. This is effected by superposing the substrate 16 (that is, a PTC thermistor body without electrode thereon) on one of the main surfaces of the PTC thermistor element 12 coated with a glass paste and then subjecting it to a baking process. Alternatively, a glass paste may be preliminarily applied entirely over one of the main surfaces of the substrate 16 before superposing it on top of the PTC thermistor element 12, the glass paste being thereafter subjected to a baking process. In addition to the insulating layers 17a and 17b shown in Fig. 1, other insulating layers may also be formed, say, on the remaining side surfaces of the PTC thermistor element 12 (towards and/or away from the viewer) except where the outer electrodes 18 and 19 are to be formed. If this is done, all four surfaces of the PTC thermistor element 12 except the end surfaces are completely covered with glass which is electrically insulating. The use of lead boro-silicate glass is not intended to limit the scope of the invention. Glass materials of other kinds, as well as resin materials, may be used as insulator. The outer electrodes 18 and 19 may be formed by applying an Ag paste on both end surfaces of the layered structure with the PTC thermistor element 12 and the substrate 16 stacked one on top of the other to a thickness of about 6µm and baking it at 500°C for 10 minutes and are electrically connected individually to the surface electrodes 14 and 15 on the PTC thermistor element 12. These outer electrodes 18 and 19 are required only to comprise a metallic material with a good soldering characteristic. They may be formed by providing an upper-layer film (say, of Sn) with a good soldering characteristic over a baked Ag layer. These layers may also be formed by sputtering, by vapor deposition, by printing and baking an electrically conductive paste, or by soldering. They may be of a layered structure with several layers. The PTC chip thermistor 11 thus structured is advantageous because, when it is mounted to a circuit board, the substrate 16 (which is a PTC thermistor body) attached to the circuit board serves to inhibit the conduction of heat generated by the PTC thermistor element 12 to the circuit board such that the unwanted rise in temperature of the circuit board can be prevented. Experiments were carried out by mounting samples of both PTC chip thermistors embodying this invention and prior art thermistors on a circuit board, applying a voltage to each and measuring the surface temperatures of the circuit board onto which they were mounted. With five samples of prior art thermistors, the measured surface temperatures of the circuit board were 130°C, 129°C, 125°C, 132°C and 126°C, the average temperature being 128°C. With five samples according to this invention, the measured surface temperatures were 100°C, 99°C, 102°C, 95°C and 100°C, the average temperature being 99°C. Thus, the difference between the average temperatures was as large as nearly 30°C between the samples of prior art thermistors and the thermistors embodying this invention. This experimental result clearly proves that a PTC chip thermistor according to this invention is capable of preventing the rise in the temperature of the circuit board on which it is mounted. It now goes without saying that many modifications and variations are possible within the scope of this invention as defined by the appended claims. For example, another substrate 16 may be attached to the top main surface of the PTC thermistor element 12 through a glass paste such that the PTC thermistor element 12 is sandwiched between two substrates 16. Although a PTC thermistor body (without electrodes formed thereon) was used as substrate in the example described above, what was referred to above as the substrate may be substituted by any insulator such as alumina such that a resistance greater than 10 6 Ω can be maintained between the outer electrodes 18 and 19. The invention is also applicable for the production of a negative resistance-temperature coefficient (NTC) thermistor.

Claims: A chip thermistor (11) comprising: a layered structure having a thermistor element (12) and a substrate (16) stacked one above the other with an electrically insulating layer (17a) in between, said thermistor element (12) comprising a planar thermistor body (13) having surfaces and having a pair of surface electrodes (14, 15) on said surfaces; and a pair of outer electrodes (18, 19) each on a corresponding one of mutually opposite end parts of said layered structure, each of said outer electrodes (18, 19) being electrically connected to a corresponding one of said surface electrodes (14, 15). The chip thermistor (11) of claim 1 wherein said planar thermistor body (13) has a first main surface and a second main surface which are opposite each other and side surfaces between said first main surface and said second main surface, wherein said pair of surface electrodes (14, 15) consists of a first surface electrode (14) and a second surface electrode (15) which are in a mutually electrically insulated relationship, said first surface electrode (14) being over a major portion of said first main surface and reaching a portion of said second main surface through one of said side surfaces, and said second surface electrode (15) being over a major portion of said second main surface and reaching a portion of said first main surface through another of said side surfaces. The chip thermistor (11) of claim 1 or 2 wherein said substrate (16) comprises an electrically insulating material. The chip thermistor (11) of claim 3 where said substrate (16) comprises alumina. The chip thermistor (11) of claim 3 where said substrate (16) comprises another planar thermistor body. The chip thermistor (11) of claim 1 or 2 wherein said thermistor body is a PTC thermistor body.

Inventors: ABE YOSHIAKI, HAGA TAKEO, ABE, YOSHIAKI, HAGA, TAKEO, Abe, Yoshiaki, c/o (A170) Intel.Prop.Dept., Haga, Takeo, c/o (A170) Intel.Prop.Dept.
Applicants: MURATA MANUFACTURING CO, MURATA MANUFACTURING CO., LTD.
Application year: 2000
Main classification: H01C1
IPC codes: H01C7, H05K3, H01C1