A method for controlling interfacial oxide at a polycrystalline/monocrystalline silicon interface

Abstract: A method of controlling the quantity and uniformity of distribution of bonded oxygen atoms at the interface between the polysilicon and the monocrystalline silicon consists in carrying out, after having loaded the wafer inside the heated chamber of the reactorand evacuated the chamber of the LPCVD reactor under nitrogen atmosphere, a treatment of the wafer with hydrogen at a temperature generally comprised between 500 and 1200°C and at a vacuum generally comprised between 0.1 Pa and 60000 Pa, and preferably at a temperature of 850°C ± 15°C and at a vacuum of 11000 Pa ± 2000 Pa, for a time generally comprised between 0.1 and 120 minutes, and most preferably between 0.5 and 1.5 minutes, in order to remove any and all the oxygen that may have combined with the silicon on the surface of the monocrystalline silicon during the loading inside the heated chamber of the reactor even if it is done under a nitrogen flux. After such a hydrogen treatment, another treatment is carried out substantially under the same vacuum conditions and at a temperature generally comprised between 700 and 1000°C with nitrogen protoxide (N 2 O) for a time generally comprised between 0.1 and 120 minutes, preferably between 0.5 and 1.5 minutes. The treatment with nitrogen protoxide (N 2 O) at such a vacuum and temperature conditions causes a relatively slow oxidation of the monocrystalline silicon and allows an effective control of the amount of oxygen at the interface and a great uniformity of distribution of it on the surface. The tunnel barrier characteristics in respect to the holes of the so created oxide film at the interface between the monocrystalline silicon and the polysilicon layer show an outstanding reproducibility.

Description: FIELD OF THE INVENTION The present invention relates to fabrication techniques of integrated semiconductor devices and in particular to fabrication techniques of poly-emitter bipolar devices. DISCUSSION OF THE PRIOR ART Bipolar devices with emitter of doped polycrystalline silicon (polysilicon), commonly referred to as poly-emitter bipolar devices, typically bipolar transistors, are very numerous in many integrated circuits designed for operating at radio frequency because they permit the making of exceptionally shallow emitter junctions and of self aligned structures with modern fabrication techniques. Moreover, poly-emitter bipolar transistors provide for a higher switching speed and a higher current gain (HFE), in common emitter configuration, substantially without increasing the base resistance, than their counterparts with a classical structure. It has been established that the latter property is tied to the presence of a very thin layer of silicon oxide (one or few mono-layers) at the interface between the monocrystalline silicon of the emitter area of the semiconductor substrate and the polysilicon layer deposited on it. [1] Several physical models have been devised to describe such an interface oxide layer as a tunnel barrier for holes, so justifying the increment of the current gain when the base current decreases. Distribution diagrams of holes in a poly-emitter device are depicted in Fig. 1, while the holes distribution in the polysilicon layer is depicted in Fig. 2. In the case depicted in Figs. 1 and 2, both the emitter resistance (R E ) as well as the current gain (HFE) depend strongly by the barrier characteristics of the oxide film at the interface. In general R E and HFE are proportional to the expression: e Aδ Bχ wherein δ and χ represent respectively the thickness and the highness of the barrier and A and B are constants. Naturally, for a standard thermal oxide, χ is about 0.6 eV for electrons and 1.1 eV for holes, but, in the case of the oxide that is presumed to be present at the interface between the monocrystalline silicon and the polysilicon upon detecting a certain amount of oxygen, per unit area these values appear to be markedly depressed because of the non stoichiometric form of such an interface oxide.. For this reason, the trade-off between the R E and HFE values depends on the barrier property of the interface film of oxidized silicon though the HFE shows an increasingly marked increase upon an increase of the amount or "thickness" of the interface oxide (or more precisely of the concentration of oxygen atoms per unit area). The main technical problem in fabricating this kind of integrated structures is represented by the difficulty of controlling the physical-chemical characteristics of the interface, in consideration of the commonly used techniques for depositing the polysilicon that typically are based on a low pressure chemical vapor deposition process (LPCVD). In poly-emitter bipolar devices, the presence at the interface of an amount of oxygen comprised between 1 and 2 10 15 oxygen atoms per cm 2 of interface area has been instrumentally measured by NRA (Nuclear Reaction Analysis). [2] The values of oxygen concentration at the interface, measured by NRA technique, are reported in Fig. 3 together with the measured values of HFE for different devices, in which the interface had been subjected to different process conditions. It emerges clearly that the values of HFE depend strongly on the amount of oxygen at the interface and that even small differences produce remarkable variations of the current gain. In order to obtain acceptable HFE values (100 ± 30), the oxygen concentration at the interface must be between 1 and 2 10 15 atoms/cm 2 . Nowadays, the fabrication processes may contemplate a treatment of the surface of the monocrystalline silicon in the emitter area with a diluted solution of hydrofluoric acid (commonly 1% by weight) before introducing the wafer in the polysilicon LPCVD reactor. Hydrogen passivation of the silicon surface by contacting it with hydrofluoric acid is effective in limiting a spontaneous re-oxidation of the silicon surface exposed to air at room temperature. Nevertheless, during the loading of the wafer inside the heated chamber of the LPCVD reactor and while evacuating the reactor, the monocrystalline silicon surface oxidizes freely determining a wide dispersion of the values of the current gain of the transistors so fabricated. A typical LPCVD reactor is depicted in Fig. 4. A typical LPCVD process for depositing a layer of polysilicon is illustrated in a general manner in the following table, though conditions of each of the 14 phases may be slightly different, depending on the type of device being integrated and on the fabrication technology. BOAT IN BOAT=60 35 cm/min T=620°C BOAT=5 25 cm/min BOAT IN 5 cm/min H1-N2=ON T1 t=3 min PRE-VACUUM H GATE=ON T2 t=4 min VACUUM GATE V=ON T3 t=4 min LEAK-CHECK GATE V=OFF T4 t=30 s VACUUM GATE V=ON T5 t=30 min TEMP-STAB 1 Low N2=200 sccm (flux measure) CONTROL: TC SPIKE N2 dil=200scm T6 t=30 min TEMP-STAB 2 Low N2=200 seem CONTROL: TC SPIKE N2 dil=200 scm T7 t=4 s PRE-DEP SiH4 US=OFF SiH4 D=36 sccm SiH4 I=44 seem N2 dil=200 scm T8 t=40 min DEPOSITION SiH4 US=ON SiH4 D=36 sccm SiH4 I=44 sccm N2 dil=200 scm T9 t=100 s POST DEP SiH4 US=OFF SiH4 D=0 seem SiH4 I=0 seem N2 dil=200 scm T10 t=5 min PURGE Low N2=200 seem N2 dil=250scm HOLD MANUAL START Low N2=200 sccm N2 dil=250scm T11 t=13 min VENT N2=5 slm BOAT OUT H1-N2=ON BOAT=25 cm/min In order to limit oxidation of the monocrystalline silicon surface during the loading inside the heated chamber of the reactor and during evacuation of the chamber, a common practice is to maintain the wafer in an atmosphere of inert gas, such as nitrogen (N 2 ), helium or argon during loading and evacuation. By introducing nitrogen (N 2 ) the availability of oxygen or of any other oxidant in the atmosphere inside the reactor may be greatly reduced thus preventing excessive oxidation of the silicon while heating up to the chamber's temperature. This well known technique for reducing the concentration of oxidant inside the chamber of the LPCVD reactor and eventually of the chamber's temperature when loading the wafers, tends to produce excessively low gain values of the transistors. To overcome this drawback, it has been proposed to "condition" the surface of the monocrystalline silicon wafer, before introducing it in the LPCVD reactor for depositing the polysilicon, by chemically oxidizing the silicon surface previously passivated by treatment with hydrofluoric acid, using hydrogen peroxide (H 2 O 2 ). This technique, even if it ensures the presence of an adequate amount of native oxide at the interface between the monocrystalline silicon and the polysilicon layer, produces an excessive dispersion of the current gain values (HFE). Moreover, the pre-oxidation treatment with H 2 O 2 requires sophisticated control devices because of the remarkable reactivity of silicon even at low temperature [2] . In fact, even if a residual hydrogen passivation of the surface of the monocrystalline silicon may be still found up to a temperature of about 300°C, it has been demonstrated that silicon begins to oxidize well before hydrogen passivation of its surface has completely disappeared. A thermal oxidation pre-treatment in presence of oxygen and/or steam of the monocrystalline silicon surface to prevent an uncontrolled oxidation during loading, heating and evacuating of the chamber of the LPCVD reactor of polysilicon deposition is not practicable because of the too fast kinetic of the thermal oxidation process that makes a precise control, for the extremely small amount of it that is required, almost impossible or at least extremely difficult. Moreover, the presence of an oxidizing atmosphere inside the LPCVD reactor itself would be hardly compatible with the silicon precursor compounds (SiH 4 ) from the point of safety. A method of controlling the interfacial oxide in polysilicon emitter bipolar transistor using an hydrogen prebake is described in : ABDUL-RAHIM ET AL: 'Improved control of polysilicon emitter interfacial oxide using a UHV-compatible LPCVD cluster tool' HIGH PERFORMANCE ELECTRON DEVICES FOR MICROWAVE AND OPTOELECTRONIC APPLICATIONS, 1997. EDMO. 1997 WORKSHOP ON LONDON, UK 24-25 NOV. 1997, NEW YORK, NY, USA, IEEE, US, pages 232-236, XP010275389 ISBN: 0-7803-4135-X It is evident the need and/or usefulness of an improved process in which the amount and uniformity of distribution of a native oxide at the interface between the emitter region of a monocrystalline silicon wafer and the polysilicon layer deposited thereon by a low pressure chemical vapor deposition technique may be effectively controlled. OBJECT AND SUMMARY OF THE INVENTION The process of the present invention solves excellently the above mentioned problems of controlling the quantity and uniformity of distribution of bonded oxygen atoms at the interface between the polysilicon and the monocrystalline silicon by carrying out, after having loaded the wafer inside the heated chamber of the reactor and evacuated the chamber of the LPCVD reactor under nitrogen atmosphere, a treatment of the wafer with hydrogen at a temperature generally comprised between 500 and 1200°C and at a vacuum generally comprised between 0.1 Pa and 60000 Pa, and preferably at a temperature of 850°C ± 15°C and at a vacuum of 11000 Pa ± 2000 Pa, for a time generally comprised between 0.1 and 120 minutes, and most preferably between 0.5 and 1.5 minutes. This treatment effectively removes substantially any and all the oxygen that may have combined with the silicon on the surface of the monocrystalline silicon during the loading inside the heated chamber of the reactor even if it is done under a nitrogen flux. After such a hydrogen treatment, another treatment is carried out substantially under the same vacuum conditions and at a temperature generally comprised between 700 and 1000°C with nitrous oxide (N 2 O) for a time generally comprised between 0.1 and 120 minutes, preferably between 0.5 and 1.5 minutes. It has been found that the treatment with nitrous oxide (N 2 O) at such a vacuum and temperature conditions causes a relatively slow oxidation of the monocrystalline silicon such to allow an effective control of the amount of oxygen at the interface and a great uniformity of distribution of it on the surface. The tunnel barrier characteristics in respect to the holes of the so created oxide film at the interface between the monocrystalline silicon and the polysilicon layer show an outstanding reproducibility. The invention is as defined in the attached claims, while it aspects and advantages will become even more evident through the following description of several embodiments and by referring to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 shows holes distribution diagrams in a poly-emitter device. Figure 2 shows the holes distribution in the polysilicon layer. Figure 3 shows the oxygen concentration values at the interface for different treatments and the corresponding values of HFE of the devices. Figure 4 is the scheme of a typical LPCVD reactor. Figure 5 shows SIMS profiles of oxygen and nitrogen at the interface between the monocrystalline silicon and the polysilicon that are obtained with the process of this invention. Figure 6 shows the spread of the values of HFE in the case of a known process and in the case of the process of the invention. Figure 7 shows the HFE values in function of the duration of the treatment with nitrogen protoxide for devices of different size. Figure 8 shows spread of HFE values in function of the duration of the treatment with nitrogen oxide for devices of different size. Figure 9 depicts for comparison purposes the HFE values in function of the duration of the treatment with hydrogen peroxide for devices of different size made according to a known technique. Figure 10 is a diagram of the variation of the emitter resistance RE in function of HFE for treatments with hydrogen peroxide and nitrogen oxide. Figures 11 and 12 compare the statistical dispersion of the values of HFE and of RE that are obtained with a hydrogen peroxide treatment of the prior art and with the nitrogen oxide treatment of the invention . DESCRIPTION OF EMBODIMENTS OF THE INVENTION The gist of the invention is to pre-oxidize the silicon in a N 2 O atmosphere instead of using hydrogen peroxide according to prior art. It has been found that by carrying out the treatment with N 2 O at a relatively low temperature, the silicon monocrystal is oxidized with a kinetic that is sufficiently slow and amenable to allow a precise control of the amount of oxygen at the interface after polysilicon deposition. A reduced kinetic and the "dilution" due to the concurrent presence of nitrogen at the interface together with oxygen, are the two factors that probably determine the outstanding reproducibility and relative uniformity of the characteristics of the fabricated devices. The possibility of using of nitrons oxide (N 2 O) for common nitration treatments instead of toxic nitrogen oxide (NO) is known, however such known treatments are generally carried out at a temperature above 1000°C. From the SIMS curves of analytical determination of the amounts of nitrogen and oxygen present on the surface of the treated silicon monocrystal of Fig. 5 a significative presence of nitrogen atoms along with oxygen atoms is confirmed. The concurrent presence of nitrogen seems to play a fundamental role in retarding oxidation of the silicon and the eventual formation of a film of oxide onto the silicon surface and in making the rate of such an oxidation process more uniform over the whole silicon surface. The reduced oxidation kinetic of the process of the invention has effects that may be best appreciated from the diagram of Fig. 6. The transistors made according to the method of the invention have highly reproducible HFE values. The current gain and relative spread characteristics in function of the duration of the pre-conditioning treatment with N 2 O of the surface of the monocrystalline silicon, for three different devices, indicated with D1, D2 and D16, having dimensions of respectively 1x8µm, 1x2µm and 2.6x8µm, respectively, are shown in Figs. 7 and 8. By modifying the duration of the N 2 O treatment it is possible to regulate in a relatively precise manner the value of HFE within a relatively wide range of values, substantially independently from the actual size of the devices. Moreover the dispersion of the values of current gain (spread) is contained within 10% range, for the three devices of different size. This is cannot be achieved even with the best known processes using a conditioning treatment (pre-oxidation) of the silicon wafer with hydrogen peroxide. The diagram of Fig. 9, of the current gain in function of the oxidation time for three devices of different sizes as those of D1, D2, D16, shows that the devices that were treated with hydrogen peroxide according to the known method show values of HFE that are clearly tied to the dimensions of the device. Moreover, as highlighted in Fig. 10, to such a variability of the value of HFE there is also a undesirable variability of the emitter resistance R E that is much more accentuated in the case of treatment with hydrogen peroxide than in the case of treatment with nitrogen oxide, according to the present invention. Looking at the diagrams of Figs. 11 and 12, it may be clearly noticed that the statistical dispersions (spread) of the current gain (HFE) values and of the emitter resistance values R E are definitely smaller for the pre-conditioning treatment of the silicon wafer surface according to the process of the invention. In fact, transistors realized according to the known method relying on a treatment with hydrogen peroxide, have current gains and emitter resistances with a statistical dispersion (spread) that may be up to 5 times greater than the statistical dispersion for transistors realized with the improved process of the invention.

Claims: A process for controlling the amount and the uniformity of distribution of oxygen atoms at the interface between an emitter region of the surface of a monocrystalline silicon wafer and a layer of polysilicon deposited thereon by a low pressure chemical vapor deposition technique, comprising the steps of cleaning and passivating said surface of the monocrystalline silicon by contacting it with a solution of hydrofluoric acid, rinsing and drying the wafer, loading the wafer inside a reactor for chemical vapor deposition, evacuating the reactor at a vacuum comprised between 0.1 Pa and 15000 Pa, raising the temperature inside the reactor and depositing said polysilicon, comprising the steps of keeping an atmosphere of a gas belonging to the group composed of nitrogen, argon and helium in the reactor during said evacuating and heating phases; passivating the silicon surface with hydrogen at a vacuum comprised between 0.1 Pa and 60000 Pa and at a temperature comprised between 500 and 1200°C, for a time comprised between 0.1 and 120 minutes; characterized by the steps of exposing the passivated silicon surface to an atmosphere of nitrons oxide (N 2 O) for a time comprised between 0.1 and 120 minutes at a vacuum comprised between 0.1 Pa and 60000 Pa and at a temperature comprised between 700 and 1000°C; lowering the temperature inside the reactor until reaching a value comprised between 500°C and 800°C before starting the deposition of polysilicon. The process of claim 1, characterized in that said treatment with nitrons oxide (N 2 O) is carried out under a vacuum of 11000 Pa and at a temperature of 850°C. The process of claim 1, wherein said solution of hydrofluoric acid is a 1% by weight aqueous solution of hydrofluoric acid. A process for fabricating semiconductor integrated devices comprising poly-emitter silicon transistors, characterized in that the formation of a polysilicon layer onto the emitter area of a monocrystalline silicon wafer of said bipolar transistors is carried out with a process as defined in claim 1.

Inventors: CALI DENISE, CAMALLERI CATENO MARCO, FERLA GIUSEPPE, LORENTI SIMONA, VASQUEZ PATRIZIA, CALI', DENISE, CAMALLERI, CATENO MARCO, FERLA, GIUSEPPE, LORENTI, SIMONA, VASQUEZ, PATRIZIA
Applicants: ST MICROELECTRONICS SRL, STMICROELECTRONICS S.R.L.
Application year: 2000
Main classification: H01L21
IPC codes: H01L21, H01L29