SOLID-STATE IMAGING DEVICE, METHOD FOR DRIVING THE SAME, AND IMAGE INPUT DEVICE

Abstract: In order to perform addition of the electric charges obtained from adjacent pixels in the same sensor row with a multiplexing structure type of solid-state image pick-up apparatus, a solid-state image pick-up apparatus of the present invention comprises: a first CCD register 10 that transfers electric charges acquired by a first light-receiving pixel row; a second CCD register 20 that transfers electric charges acquired by a second light-receiving pixel row; a multiplex section 30 that transfers the respective electric charges, transferred by the first CCD register 10 and second CCD register 20 toward a floating diffusion amplifier FD; and signal generation means 3 that in the case of alternately-output mode, applies signals in opposite phase to each other to a final stage of the first CCD register 10 and a final stage of the second CCD register 20, respectively, and, in the case of an add-and-output mode, applies to the final stage of the second CCD register 20 a signal for accumulating the electric charge until a transfer time when the electric charges to be added to each other are transferred by the second CCD register 20 comes.

Description: TECHNICAL FIELD The present invention relates to a solid-state image pick-up apparatus and to a driving method therefor, each in accordance with the precharacterizing parts of independent claims 1 and 2 and to an image input apparatus using the solid-state image pick-up apparatus. A solid-state image pick-up apparatus and a driving method therefor of that kind are disclosed in US-A-4,712,137. BACKGROUND ART An image input apparatus that is applied to a scanner or a copier uses a solid-state image pick-up apparatus having a linear sensor, and inputs an image, by scanning the read position of the solid-state image pick-up apparatus. There has in recent years been a strong demand for the improvement of read resolution, and the increase of read speed. Regarding the linear sensor as well, there has hitherto been developed the one that copes with such demand by using a plurality of sensor rows. For example, in the solid-state image pick-up apparatus comprising two rows of sensors, one of the sensor rows and the other of them are arranged so as to be displaced from each other by a half pitch of the pixels. The electric charges acquired by one of the sensor rows and the electric charges acquired by the other of them may be multiplexed and alternately outputted. Also, in case of outputting a signal obtained by adding the electric charges of pixels, the timing of a reset pulse signal for causing discharge of the electric charges of a floating diffusion amplifier that is electric-charge/voltage conversion means is controlled so that the electric charges acquired from the pixels by both of the sensor rows and alternately transferred to the floating diffusion amplifier may be added there to each other and outputted therefrom. However, when the addition of the electric charges is performed by the floating diffusion amplifier in the multiplexing structure type of solid-state image pick-up apparatus as described above, after the electric charges acquired by one of the sensor rows have been transferred to the floating diffusion amplifier, the electric charges acquired by the other thereof are transferred to be added there. Therefore, it is impossible to obtain the added output until the electric charges acquired by the other of the sensor rows has been transferred to the floating diffusion amplifier, with the result that a time period for the added output is shortened. Consequently, a problem is raised that signal processing in the succeeding stage will be difficult to perform. Moreover, as compared to the case where the electric charges acquired by both of the two sensor rows are alternately outputted, a cyclic period for obtaining the added output becomes delayed or lengthened. Accordingly, another problem is raised that the technique of adding the electric charges cannot cope with the demand for speedy signal processing in the subsequent stage. DISCLOSURE OF THE INVENTION The object of the present invention is achieved with the features of the claims. At a position before the final stage of the second charge transfer row there is performed accumulation, i.e. addition of the electric charges that have been transferred by the second charge transfer row. Also, while the further pulse signal is being applied to the final stage of the second charge transfer row. the electric charges that have been transferred by the first charge transfer row to the multiplex section are sent. Then, at an initial stage of the multiplex section, there is performed accumulation, i.e. addition of the electric charges that have been transferred by the first charge transfer row until a transfer time when the electric charges to be added to each other are transferred by the second charge transfer row comes. BRIEF DESCRIPTION OF DRAWINGS FIG. 1 is a schematic diagram illustrating a solid-state image pick-up apparatus according to an embidiment of the present invention. FIG. 2 is a schematic diagram illustrating a main part of a solid-state image pick-up apparatus according to an embodiment of the present invention. FIG. 3 is a timing chart illustrating the alternately-output mode. FIG. 4 is a timing chart illustrating the add-and-output mode. BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a solid-state image pick-up apparatus, a driving method therefor, and an image input apparatus according to the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram illustrating a solid-state image pick-up apparatus according to this embodiment; FIG. 2 is a schematic diagram illustrating a main part of the solid-state image pick-up apparatus according to this embodiment; and FIGS. 3 and 4 are timing charts illustrating a driving method of the solid-state image pick-up apparatus according to this embodiment. As illustrated in FIG. 1, the solid-state image pick-up apparatus of this embodiment comprises a first CCD register 10 and a second CCD register 20 that are each provided correspondingly to two sensor rows, i.e. a first light-receiving pixel row and a second light-receiving pixel row and a multiplex section 30 that, depending on the relevant output mode, transfers each of the electric charges that have been transferred from the first CCD register 10 and second CCD register 20. Transfer elements forming the first CCD register 10, second CCD register 20, and multiplex section 30 are each made so that the potential of part of the area on the side where electric charge is output may become higher than that of the remaining area. Also, the solid-state image pick-up apparatus of this embodiment comprises signal generation means 3 for supplying a pulse signal to the first CCD register 10, second CCD register 20, multiplex section 30, etc. with predetermined timings. This solid-state image pick-up apparatus has the two following output modes. One is an alternately-output mode in which the electric charge that has been individually acquired by respective two sensor rows is alternately transferred from the multiplex section 30, and then a floating diffusion amplifier FD that is connected thereto in the succeeding stage alternately outputs the signals correspond to the respective electrical charges. The other is an add-and-output mode in which, of the electric charges acquired by the two sensor rows, the ones obtained from adjacent pixels in the same sensor row are added together and then outputted. In other words, in this solid-state image pick-up apparatus, the first light-receiving pixel row and second light-receiving pixel row forming the two rows of sensors are arranged in a manner of being displaced by a half pitch of the pixel. Alternately outputting the respective electric charges acquired by the two rows of sensors in the alternately output mode enables reading an image with a resolution twice the pitch of pixels of one row with regard to the direction of the pixel row. On the other hand, in the add-and-output mode, the electric charges acquired from adjacent pixels in the same row are added to each other and the resulting signal is outputted. Therefore, reading of an image is performed with a resolution half the pitch of pixels of one row. However, because the already added electric charges are transferred to the floating diffusion amplifier FD, it is possible to obtain a signal output in which the electric charges of adjacent pixels are mutually added with the same timing as in the alternately-output mode. When performing changeover of the above-described output modes in the solid-stage image pick-up apparatus of the embodiment, it is arranged that a pulse signal can be independently impressed to a final stage of the second CCD register 20. In accordance with the timing of impressing the pulse signal to that final stage, changeover of the output modes is performed. Specifically, as illustrated in FIG. 2, in the solid-state image pick-up apparatus of this embodiment, the first CCD register 10 is alternately impressed with pulse signals consisting of Ø1 and Ø2, while the second CCD register 20 is alternately impressed with pulse signals of Ø2 and Ø1. Further, a pulse signal of Ø1' is independently impressed to the final stage of the second CCD register 20. In accordance with the output time when these pulse signals are outputted from the signal generation means 3, changeover between the alternately-output mode and the add-and- output mode is performed. A description will be given below of the output time of the pulse signals in each output mode. FIG. 3 is a timing chart in the case of the alternately-output mode. In the alternately-output mode, signals Ø1, Ø2 in opposite phases to each other are impressed to the first CCD register 10 and the second CCD register 20, respectively. Also, the same pulse signal Ø1' as the pulse signal Ø1 is impressed to the final stage of the second CCD register 20. As a result, the transfer of electric charges acquired from the first light-receiving pixel row that is performed by the first CCD register 10 and the transfer of electric charges acquired from the second light-receiving pixel row by the second CCD register 20 are alternately performed. Also, to the multiplex section 30, signals Ø3, Ø4 in opposite phases to each other are impressed. The signals Ø3, Ø4 each have a frequency twice that of the signals Ø1, Ø2. The electric charges obtained by the first light-receiving pixel row and the electric charges obtained by the second light-receiving, pixel row, which are alternately transferred from the first CCD register 10 and the second CCD register 20, are sequentially transferred toward the floating diffusion amplifier FD. This driving enables the following operation. During a time period in which a reset pulse signal ØRS is kept low in level from the stage at which the Ø3 has a low level and the Ø4 has a high level (until the reset pulse ØRS becomes high in level), a signal corresponding to one pixel of the first pixel row and a signal corresponding to one pixel of the second pixel row can alternately be outputted from the floating diffusion amplifier FD. On the other hand, FIG. 4 is a timing chart in case of the add-and-output mode. In the add-and-output mode, the signals Ø1, Ø2 in opposite phases to each other are impressed to the first CCD register 10 and the second CCD register 20, respectively. Also, the pulse signal Ø1' impressed to the final stage of the second CCD register 20 is made to have a high level only once during a time period in which the Ø1 has a high level consecutively twice. Specifically, in a time period indicated by the numeral 1 ○ in FIG. 4, the pulse signal Ø3 is made to have a high level, so that the electric charges corresponding to two adjacent pixels transferred from the first CCD register 10 according to the pulse signals Ø1, Ø2 are added to each other at a section (c) illustrated in FIG. 2. Thereafter, the Ø3 is made to have a high level -> low level -> high level (the Ø4 is made to have a low level -> high level -> low level). By doing so, it will be possible to transfer the previously added electric charges to a section (b) illustrated in FIG. 2. Also, in the time period indicated by the numeral 1 ○, the Ø1' is made to have a low level and the Ø1 is made to have a high level -> low level -> high level (the Ø2 is made to have a low level -> high level -> low level). By doing so, the electric charges corresponding to two adjacent pixels transferred from the second CCD register 20 are added to each other at a portion (d) illustrated in FIG. 2. On the other hand, in a time period indicated by the numeral 2 ○ in FIG. 4, the Ø3 is made to have a high level -> low level -> high level (the Ø4 is made to have a low level -> high level -> low level). By doing so, the resulting electric charge obtained by adding to each other the electric charges from two adjacent pixels that have been transferred from the first CCD register 10 to the portion (b) illustrated in FIG. 2 are transferred to a portion (a). Also, the Ø1' is made to have a low level -> high level (during this period of time the Ø3 is made to have a high level). By doing so, the resulting electric charges corresponding to two adjacent pixels transferred from the second CCD register 20, and mutually added at the portion (d) in FIG. 2 are transferred to the portion (c) illustrated in FIG. 2. Thereafter, the Ø3 is made to have a high level -> low level -> high level (the 04 is made to have a low level -> high level -> low level). By doing so, the electric charges obtained by adding to each other the electric charges from two adjacent pixels that have been transferred from the second CCD register 20 can be transferred to the portion (b) illustrated in FIG. 2. This driving enables finally the floating diffusion amplifier FD, to alternately output correspondingly to the time period 1 ○ and the time period 2 ○ two-pixel added signal for the first light-receiving pixel row and two-pixel added signal for the second light-receiving pixel row in the order above mentioned. The above-described solid-state image pick-up apparatus and its driving method are mainly applied to the image input apparatus such as a scanner or a copier. In this case, when a high resolution is required as in the case of taking a minute image, it is arranged to obtain the respective pixel outputs that have been acquired by the first light-receiving pixel row and the second light-receiving pixel row according to the previously described alternately-output mode. When there is a need to perform high-speed signal processing within a limited period of time as in the case of performing a pre-scan at the time of acquiring an image (reading for deciding the image size, the image area, etc.), it is arranged to alternately obtain the added output of adjacent two pixels of the first light-receiving pixel row and the added output of adjacent two pixels of the second light-receiving pixel row according to the previously described add-and-output mode. This makes it possible to cope with both the demands for high resolution and for high-speed processing by means of a single solid-state image pick-up apparatus. Additionally, in the above-mentioned embodiment, the description has been given of the case of using a line sensor in which a plurality of pixels are arranged in rows. However, even in case of an area sensor in which a plurality of pixels are arranged in an area form (in a matrix form), the invention can also be applied thereto. Further, in the timing chart of the add-and-output mode illustrated in FIG. 4, it is also possible to adopt a method of performing thinning of the reset pulse ØRS from twice to once. By this thinning, it also becomes possible to obtain an output of four pixel added electric charge in total that is obtained by adding the electric charges of two adjacent pixels in the same sensor row to those of two adjacent pixels in a different sensor row. INDUSTRIAL APPLICABILITY As described above, the solid-state image pick-up apparatus, the driving method therefor, and the image input apparatus according to the present invention have the following advantages. With the multiplexing structure type of solid-state image pick-up apparatus, addition of the electric charges from adjacent pixels in the same light-receiving pixel row can be performed through a simple pulse change. Moreover, it is possible to cope with changeover of the output mode without making the circuit wiring, etc. complex. Furthermore, with the use of a single solid-state image pick-up apparatus, it is possible to cope with the demands both high resolution and high-speed signal processing and satisfy a wide variety of needs. As a result, it is possible in turn to reduce the manufacturing cost of the solid-state image pick-up apparatus that can cope with the demands both for high resolution and high-speed signal processing.

Claims: A solid-state image pick-up apparatus comprising: a first charge transfer row (10) for transferring electric charges acquired by a first light-receiving pixel row (1); a second charge transfer row (20) for transferring electric charges acquired by a second light-receiving pixel row (2); a multiplex section (30) for transferring the respective electric charges transferred from the first charge transfer row (10) and second charge transfer row (20) toward an electric-charge/voltage conversion means (FD), and signal generation means (3) for supplying pulse signals ( 1 ,  2 ,  1' ,  3 ,  4 , RS) to said first charge transfer row (10) said second charge tranfer row (20), said multiplex section (30) and to said electric-charge/voltage conversion means (FD) with predetermined timings, respectively, said first light-receiving pixel row (1) and said second light-receiving pixel row (2) being displaced against one another by one half pitch of the pixels thereof, characterized in that said solid state-state image pick-up apparatus has an alternately-output mode in which the electric charges that have been individually acquired by each of the first and second light-receiving pixel rows (1, 2) are alternately transferred from the multiplex section (30) and then outputted, and an add-and-output mode in which of the electric charges acquired by the first and second light-receiving pixel rows (1,2) the ones obtained from adjacent pixels in the same light-receiving pixel row (1, 2) are added together and then outputted, and said signal generation means (3) being arranged and connected to said first and second charge transfer rows (10, 20) for in both output modes applying first and second pulse signals ( 1 ,  2 ) of opposite phase to each other alternately to said first and second charge transfer row (10, 20) and a further pulse signal ( 1' ) independently to the final stage of said second charge transfer row (20) and carrying out changeover between said alternately-output mode and said add-and-output mode in accordance with the timing of outputting said pulse signals, wherein for said alternately-output mode said signal generation means (3) applies said further pulse signal ( 1' ) identical with said first pulse signal ( 1 ) to said final stage of said second charge transfer row (20), and for said add-and-output mode, said signal generation means (3) applies said further pulse signal ( 1' ) having a high level only once during a time period in which the first pulse signal (1) has a high level consecutively twice for accumulating the electrical charges until a transfer times comes when the electrical charges to be added to each other are transferred by the second charge transfer row (20). A driving method for driving a solid-state image pick-up apparatus, comprising: a first charge transfer row ( 10) for transferring electrical charges acquired by a first light-receiving pixel row (1); a second charge transfer row for transferring electric charges acquired by a second light-receiving pixel row (2) and a multiplex section (30) for transferring the respective electric charges transferred from said first and said second charge transfer rows (10, 20) toward an electric-charge/voltage conversion means (FD) wherein said first light-receiving pixel row (1) and said second light-receiving pixel row (2) are displaced against one another by one half pitch of the, pixels thereof, characterized by following steps: applying first and second pulse signals ( 1 ,  2 ) of opposite phase to each other alternately to said first and second charge transfer rows (10, 20) and a further pulse signal ( 1' ) independently to the final stage of said second charge transfer row (20), changing over between an alternately-output mode in which the electric charges that have been individually acquired by each of the first and second light-receiving pixel rows (1, 2) are alternately transferred from the multiplex section (30) and then outputted, and an add-and-output mode in which of the electric charges acquired by the first and second light-receiving pixel rows (1, 2) the ones obtained from adjacent pixels in the same light-receiving pixel row ( 1, 2) are added together and then outputted, in case of said alternately output mode applying said further pulse signal ( 1' ) identical with said first pulse signal ( 1 ) to said final stage of said second charge transfer row (20), and in the case of said add-and-output mode applying said further pulse signal ( 1' ) having a high level only once during a time period in which the first pulse signal ( 1 ) has a high level consecutively twice for accumulating the electrical charges until a transfer time comes with which the electric charges to be added to each other are transferred by the second charge transfer row (20). An image input apparatus characterized by the use of the solid-state pick-up apparatus according to claim 1.

Inventors: AZUMA TOSHIAKI, NOGUCHI KATSUNORI, AZUMA, TOSHIAKI, NOGUCHI, KATSUNORI, AZUMA, Toshiaki, Sony Corporation, NOGUCHI, Katsunori, Sony Corporation
Applicants: SONY CORP, SONY CORPORATION
Application year: 2000
Main classification: H04N1
IPC codes: H01L27, H04N1, H01L21, H01L29, H04N5, H04N3