METHOD AND APPARATUS FOR DECREASING BLOCK WRITE OPERATION TIMES PERFORMED ON NONVOLATILE MEMORY

Abstract: A memory device comprises a controller (14) coupled to a host (12) and a nonvolatile memory unit (16) for controlling reading and writing information organized in sectors (34, 36) from and to the nonvolatile memory unit (16), as commanded by the host (12). The controller (14) maintains mapping of the sector information in an LUT stored in volatile memory the contents of which are lost if power is lost. Through the use of an address value and flag information maintained within each of the blocks of the nonvolatile memory unit (16), a block is re-written using a different number of write operation in various alternative embodiments of the present invention. The flag information is indicative of the status of the block such that during power-up, the controller (14) reads the address value and the flag information of a block and determines the status of the block and in accordance therewith finishes re-writing of the block, if necessary and updates the LUT accordingly.

Description: Specification METHOD AND APPARATUS FOR DECREASING BLOCK WRITE OPERATION TIMES PERFORMED ON NONVOLATILE MEMORY BACKGROUND OF THE INVENTION Cross Reference To Related Appiications This application is a continuation-in-part of a previously-filed application, entitled "SPACE 10 MANAGEMENT FOR MANAGING HIGH CAPACITY NONVOLATILE MEMORY", Application No. 09/283.728. filed on April 1 , 1999. the inventors of which are Petro Estakhri. Berhanu Iman and Min Guo and another previously-filed appiication, entitled " MOVING SECTORS WITHIN A BLOCK OF INFORMATION IN A FLASH MEMORY MASS STORAGE ARCHITECTURE". Application No. 09/264.340, filed on March 8. 1999. the inventors of which is are Petro Estakhri. Berhanu Iman and Ali Ganjuei, which is continuation of U.S. Patent 5.907.856, entitled "MOVING SECTORS WITHIN A BLOCK OF INFORMATION IN A FLASH MEMORY MASS STORAGE ARCHITECTURE " . The disclosure of both of these patent documents is incorporated by reference herein as though set forth in full. 20 Field of the Invention This invention relates to the field of digital systems employing non-volatile memory and particularly flash memory as mass storage for computers, digital cameras and the like. Description of the Prior Art 25 Recently, solid state memory has gained popularity for use in replacing mass storage units in various technology areas such as computers, digital cameras, modems and the like. For examole. in digital cameras, the use of solid state memory, such as flash memory, replaces conventional films. Flash memory is generally provided in the form of semiconductor devices (or chips) with s o each device made of a large number of transistor memory cells and each cell being individually programmable. The programming (or writing; and erasing of such a memory cell is limited to a finite number of erase-wπte cycles, which basically determmes the lifetime of the device. Furthermore, an inherent characteristic of flash memory cells is that they must be erased and verified for successful erase prior to being programmed. With the use of flash memory, however, the area of memory that once contained information must first be erased pπor to being re-programmed. In a flash memory device, wπte and erase cycles are generally slow and can significantly reduce the performance of a system utilizing flash memorv as its mass storage. In applications employing flash memory devices, such as personal computers and digital cameras, a host writes and reads information to the flash memory devices through a controller device, which is commonly m the form of a semiconductor device. Such information is organized m sectors with each sector including user data information and overheaα information. The user data portion of a sector is typically 512 bytes in length although other size sectors may be similarly employed. The controller, upon receiving sector information from the host, duπng a host- commanded wπte operation, writes the information to the flash memory devices in accordance with a predetermined sector organization. While the host may be accessing multiple sectors, each sector is written to the flash devices one at a time. Currently, m computers wherein large files such as commercial software and user programs are stored within flash memory and in digital cameras wherein large picture files are stored within flash devices, the files are written one sector at a time within flash. Due to the latency associated with each wπte operation, die performance of these systems when storing large quantities of information is limited. In stormg and/or retrieving a data file (data files may be any computer files including commercial software, user program, word processor software document, spread sheet file and the like), a computer ( or host) system provides what is referred to as the logical block address indicating the location of where the host believes the data file to exist within the mass storage. The host-provided address may be in the form of cylinder, head and sector (CHS), which is convened to a logical block address format upon receipt by the controller. The same applies to digital camera applications. The controller then translates the logical block address ( LB A) into a physical block address (PBA) and uses the latter to access the data file within flash memory. Each time a αata file is changed, the latest version of the file is stored :n an available (or unused') location within t he flash memoiy that is identified by a new physical location ( or new PBA) Upon using much of the free or available locations within the flash memory for updated files, an erase operation may be needed to make available " old ' locations for storage of additional information Since erase operations are time-consuming (as are wπte operations), there is a trade-off as to the frequency of performing erase operations to the time expended for searching for free locations within the flash memory as more and more locations are used pπor to the next erase operation Λ variety of different algorithms may be employed for determining when an erase operation! s) will take place and as a function thereof, where within the flash memory (mass storage) the next available free block is located for storing the data file The space manager umt of the controller device performs this function Information in the nonvolatile memory or flash memory is stored unαer the direction of the controller and it is done so in the form of sectors and a number of sectois aefine a block. A block may include 16. 32 or other number of sectors. But once blocks are determined to include a predeterminea number of sectors, this determined size defines each block Thus, information that is stored in nonvolatile memory is organized in blocks and each block is umαuely addressable by d e controller. Each block is further comprised of multiple sectors with each sector being defined by 512 bytes pius additional storage space for storing non-data information, such as flags, address and error coπection code (ECC) information. Although a sector may have data storage spaces other d an 512 bytes. In some prior art systems, during an erase operation, an entire block is erased whereas in other prior art systems, the sector may be erased Each sector within a block is uniquely addressable for reading and writing information from and to the nonvolatile memory A unique value is maintained within each block that contains sector information as a Virtual Logical Block Address (VLBA) for use in reconstructing the addressing or mapping information associated with the nonvolatile memory during power-up. This mapping information is the contents of a look-up- table maintained in volatile memory, as will now be further descπbed. The space manager unit of the controller device maintains a table of information regarding the location of the most recent data within the flash memory m addition to the location of information that is considered 'old' (information which has been siiDeiseded) and not yet erased and/or -defective ' (location can not be used for storing information due to some kind of defect) or used' (currently contains up-to-date information) This table of information is stored and updated in a volatile memory location such as RAM either within or outside of the controller device Each time information is accessed by the host, the space manager table is used to find out the location of the information that is to be written and/or read from the flash memory devices The problem with prior art methods and apparatus using nonvolatile memory devices is that when, for example, a block of information within a particular nonvolatile memory device is written to, there are many write operations associated therewith For example, currently, to wπte a block that includes 16 sectors, there are at least twenty write operations performed. 16 to wπte the sectors and 4 more to write non-sector information This substantially affects system performance because wπte operations performed on nonvolatile memory are generally time-consuming and each time a block is accessed, it must be moved to a different location within nonvolatile memorv which requires wnting of the block When bloci s are accessed over and over again, there are manv move operations requiring wπtmg of the block that take place Therefore, the need arises for a method and apparatus to efficiently perform wnting to a block of nonvolatile memory where the block include multiple sectors. SUMMARY OF THE INVENTION Briefly, a preferred embodiment of die present invention includes a solid state storage system and method for reducing the number of wπte operations when re-wntmg a block of infoimation that has been previously written by a host The system includes a controller coupled to a host and a nonvolatile memory umt for controlling reading and wnting of information organized in sectors from and to the nonvolatile memory unit, as commanded by the host. The controller maintains mapping of the sector information in an LUT stored in volatile memory the contents of which are lost if power is lost Tlirough the use of an address value and flag information maintained within each of the blocks of the nonvolatile memory umt, a block is re-wπtten using a different number of write operations in various alternative embodiments of the present invention The flag information is indicative of the status of the block such that during power-up. the controller reads the address value and the flag information of a block and determines the status of the blocl< ana in accordance therewith finishes re-wntmg of the block, if necessary and updates the LUT accoidingiy The foregoing and other objects, features and advantages of the invention will be apparent from the following detailed description of the preferred embodiments which made reference to the several figures of the drawing. IN THE DRAWING Fig. 1 shows a digital system in accordance with an embodiment of the present invention. Fig. 2 shows an example of the organization of a block within one of the flash devices of the flash memory unit as employed in the digital system of Fig. 1. Fig. 3 depicts an example of moving a block of information within one of the flash memory devices as it is reflected in the contents of the space manager block of Fig. 1. Figs. 4a-4i show the affects on the space manager block and the blocks of the flash memory device when a block is moved from one location of the flash memory unit to another in accordance with an embodiment of the present invention. Fig. 5 shows a flow chart of the steps performed during a write operation in accordance with an alternative embodiment of the present invention wherein 17 write operations are performed when re-writing a block. Figs. 6a and 6b show an example of the contents of nonvolatile memory in accordance with yet another embodiment of the present invention wherein 16 write operations are performed when re-writing a block. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to Fig. 1, a digital system 10. which may be a part of a computer (personal computer (PC)), digital camera and the like is shown in accordance with an embodiment of the present invention to include a host 12, a controller device 14 and a nonvolatile memory unit 16. The host 12 is shown to be coupled to read information from and write information to the memory unit 16 under the direction of the controller device 14. The memory unit 16, as depicted, is comprised of at least two nonvolatile memory devices in accordance with the present invention. Each of the nonvolatile memory devices is an integrated circuit (or semiconductor device, as commonly refened to by the industry). The nonvolatile memory devices may be flash, EEPROM (Electronically Erasable Programmable Read Only Memory) or other type of solid state memory. The host 12 is shown to communicate with the controller 14 tl rough host bus 18 and the conn oiler device 14 is shown coupled to the memory umt 16 through memorv signals 20 The controller device 14 is an integrated circuit (or semiconductor) shown to include a host mteiface circuit 22. a microprocessor circuit 24. a volatile storage umt 26 and a space manager/flash interface circuit 28 The host interface circuit 22 is for coupling the host 12 through host bus 18, which includes an address bus. a bi-directional data bus and control signals (not shown separately; Depending on the architecture of the host being employed, the host address and data busses may be compπsed of a single bus caπvmg both address and data information by multiplexing address and data signals onto the same bus It should be noted that the term bus as used herein includes multiple electncal conductors or signal lines The host bus 18 may be a PCMCIA interface, an ATA mteiface or other kinds of interlaces employed by the industry The host interface circuit 22 is shown coupled to the host bus 18 and is further shown to be coupled tlirough a microprocessor bus 30 to the microprocessor circuit 2 4 Microprocessor circuit 24 is further coupled to the space manager/flash interface circuit 28 through the microprocessor bus 30. which facilitates communication of address and data information and control signals therebetween. The microprocessor circuit 24 is coupled to read and wπte information to the volatile storage unit 26 tlirough a volatile storage bus 32 In one embodiment of the present invention, the microprocessor circuit 24 is an Intel 8051 processor and alternatively, the microprocessor unit 24 may be any general-purpose processor unit The volatile storage umt 26 is generally a read-access memory (RANI) for storing firmware code that is executed by the microprocessor circuit 24 Information between the host 12 and the controllei 14 is transfeπed tlirough the host bus 18 and information between the controller 14 and the memory unit 16 is coupled through the memory signals 20 The memory unit 16 is compπsed of two or more nonvolatile memory devices such as 34 and 36 The size of each of the nonvolatile memoiy devices 34 and 36 may vary depending on the application of the digital system 10 Nonetheless, tins size is generally referred to by bytes where each byte is 8 bits For example, in one application, the size of the nonvolatile memory unit 16 is 160MB (mega bytes) together with each flash or nonvolatile memory device being 32MB In another application, the size of the nonvolatile memory unit 16 is 80MB with each flash memory device being 16MB The nonvolatile memory devices 34 and 36 are of the memory type that preserve their contents even duπng a power- PAGE MISSING AT THE TIME OF PUBLICATION PAGE MISSING AT THE TIME OF PUBLICATION LBA and PBA LUT addressing, the reader is directed to a U S. application filed on March 31. 1997, entitled "Moving Sectors Withm a Block of Information in a Flash Memory Mass Storage Architecture", the inventors of which are Petro Estakhri. Bernanu Iman and Ali R Ganjuei and the disclosure of which is herein incorporated by reference as though set forth m full In PC applications, a block of information is typically a sector as employed in conventional hard disk drives, with each sector typically including space for 512 bytes of data- and additional space for overhead information, although other-sizeα sectors may be similarly employed Microprocessor 24 executes instructions in the form of program code from the volatile memory unit 26 (such as ROM (read-only memory) or RAM (read-and-wπte memory)) located either within or outside of the microprocessor 24 The microprocessor 24 further instructs the space manager control unit 38 to use the LBA. ongmated by a CHS value provided by the host, to find the next unused (or free; addressable storage block location available withm the memory unit 16 Duπng a host write operation, this unused block location is stored m the LUT and dunng a host read operation, this unused block location is read from the LUT The address value identifying the a location withm the memory unit 16. as stored withm the LUT. is refened to as a Virtual Physical Block Address (VPBA). The space manager control unit 38 may employ any one of a variety of algorithms to find the next available (or free) block located withm the flash memory devices. An example of a space manager is disclosed an earlier-issued patent. U S Pat. No 5,485,595, entitled " Flash Memory Mass Storage Architecture Incorporating Wear Level Technique Without Using Cam Cells", issued on January 16. 1996 with the mventors being Mahmud Assar. Petro Estakhri, Siamack Nemazie and Mahmood Mozaffan. the disclosure of which is herein incorporated by reference as though set forth in full. The reader is particularly directed to Figs. 1 1-13 and discussions regarding the same. In alternative embodiments, however, other space management methods and apparatus may likewise be employed by the present invention. The VLB A value is ultimately used to look up a VPBA value from the LUT. The LUT is compπsed of rows and columns with each row being addressed by a VLB A value. Dunng a read operation, the VLBA value is used to address a particular row of the LUT for retnevmg therefrom, the VPBA, which includes certain flag information. Duπng a wπte operation, the VLBA is used to address a particular row of the LUT for storing a VPBA value including certain flag information. The VPBA is ultimately translated to a Physical Block Address (PBA) for identifying a particular sector location withm the memory unit 16 The LBA value is coupled onto the microprocessor bus 30 by the microprocessor 24 for use by the space manager/flash interface 28 where it is translated to a VLBA address Four bits of sector indicates the use of 16 sectors per block since 2 to the power of 4 equals 16 The VLBA is deπved by masking the sector bits (the masked sector bits will be refened to as sector offset value), which this example include 4 bits The block and chip select information remain the same. The chip select bits are used to select a particular one of the plurality of nonvolatile memory devices included withm the memory unit 16, such as one of the devices 34 or 36 The block information identifies a particular block withm the selected nonvolatile memory device. The VLBA is also wπtten to the nonvolatile memory as the block is stored wntten or moved in the nonvolatile memorv That is. after writing ail of the sectors of a block, the VLBA is wntten in the last row of the block Alternatively, the VLBA may be wπtten to any of the other rows of the block This will be further explained with respect to the following figures Refemng now to Fig 2. a block 200 is shown to include 16 sectors eacn sector storage space 202 is used to store data and ECC information. It should be noted that in alternative embodiments, the block 200 may include other than 16 sectors For example, in a system having memory umt of capacity 128 Mbits. there may be 32 sectors used per block whereas using a capacity of 64 Mbit may require 16-sector blocks. In Fig. 2. each sector is stored in a row of storage space of the block 200 As shown m Fig 2, in the last row of the block 200. after the sector storage space 202. there is a VLBA field 204 for stonng the VLBA. a block status flag field 206 and a defect field 208 The block status flag field 206 is used for storing the status of the block 200 as will become clear with reference to later examples provided herein. The defect field 208 is used for stonng a flag indicating wnether or not the block 200 is defective In later examples, this field will be shown as 'GD' to indicate that the block is not defective although practically, there may be a byte (or 8 bits) dedicated to this field The block status flag field 206 also occupies a byte and the VLBA field 204 occupies 2 bytes The sizes of the fields 204-208 are design choices and mav be different than that stated herein Fig. 3 shows the contents of the space manager block 210 where one of the VLBA values (a row of the space manager being identified by a VLBA value) is '0020' m hexadecimal notation tor addressing the block ' 0220' in hexadecimal notation withm the flash memory unit and specifically within the flash device 214, m Fig. 3 As shown m Fig 3. the value '0220' is used as a VPBA value to point to a particular location withm the flash device 214 that is identified bv the PBA value 0220' The identified block is referenced by the 216 m Fig 3 withm the flash device 214 Withm the block 216. there is stored in the last row of the block, a VLBA value of " 0020' in hexadecimal notation in a VLBA field 218 This is so as to identify the block 216 as belonging to the VLBA '0020' such that when power is for some reason interrupted and then turned on agam and the contents of the space manager 210 are lost, the space manager contents may be nevertheless reconstructed from the information in the flash device 214. For example, when power is turned on, the last row of the block 216 is checked and particularly the VLBA field 218 is read Since the latter includes the value " 0020', the corresponding row to this VLBA value is reached in the space manager and a value of '0220' is piaceα in that row- In Fig. 3. each of d e blocks, such as block 216. 224 and a block 232 include a pluiahty of sectors, such as 16. 32 or any other number. 2 with N being an integer. Each sector includes data and ECC information In the block 216 m Fig 3. there is further stored, a block status flag field 220 and a defect field 222. which identify certain information legardmg the block 216 as discussed earlier hereinabove Further shown withm the flash device 214 is a block 224 having an address of '480' m hexadecimal The last row of the block 224 includes a VLBA field 226, which is shown to include the value ' 0020' due to a move of the contents of the block 216 to the block 22^. as will become apparent with respect to a later example. The block 224 further includes a block status flag field 228 and a defect field 230. The reason for showing the blocks 216 and 224 is to famihanze the reader with the concept of moving a block, such as the block 216, to another block with the flash device 214. such as the block 224. wnen the same block is accessed or re- written. Stated differently, when the same LBA or VLBA-identified location is being re-wπtten pπor to being erased (as the reader recalls, one of the characteristics of nonvolatile memory such as flash or EEPROM is that when it is written or programmed it need to be erased pnor to being re-wπtten or ie-Diogrammea. however, to avoid frequent erases, the inventors of the present invention and prior inventions have designed the system so as to use a different block ing the same VLBA when a re-wπte occurs;, the portion of the block that is being re-wπtten. 1 e the particular sectois of the block being re-wπtten. are first written to another olock that is identified bv the same VLBA but physically is in a different location withm the flash memory unit Next the sectors that were not re- written may be moved to the new blocκ and the previous block can then oe erased In Fig 3. for example, the VLBA-identified block, i e VLBA '0020'. first points to the block 2L6. block '0220 ' within the flash device 214 However, if that same VLBA-identified location, I e VLBA '0020', is re-wπtten by die host prior to the controller having an opportunity to erase the block 216. the latter block cannot physically or practically be re-programmed Thus, another block, 1 e block 224 is identified for the re-wnte The status of these bloc s becomes important in that at any given time, specially dunng power-up the controller must know which block is in use' and or includes 'old ' information and the like This kind of information is identified by the block status flag field of each of the blocks as earlier noted The operation of a move is perhaps best understood with an example, as shown m Figs 4a-4ι where the host re-wntes nme sectors identified bv LBAs 27-2F (m hexadecimal notation) In Fig 4a, the space manager 400 is shown to include the value 220' in a row identified by the VLBA 20' This row is shown because the sectors identified b\ LBA values 27-2F are withm the block addressed by VLBA '20' since, in the example of Figs -J-a-ii each block includes 16 sectors The coπespondmg block 220 is physically stored m the block 402 of d e flash device 214 at. which includes sixteen sectors with each sector having data and ECC information and the last row of the block including a VLBA field 404. a block status flag field 406 and a defect field 408 Because the block 402 has been previously wntten thereto by the host its block status flag field 406 includes a value, shown in Fig 4a. as zz ' 'zz is used here merely as a notation to denote that the block 402 is complete, I e designating the block 402 as "block complete ' In actuality, zz ' is a binary value, such as one byte, having a predetermined value that indicates 'block complete 'zz' and other similar nomenclature, such as xx' and "yy , are used throughout this patent document to discuss the status of the block status flag field whereas, m fact, thev lepresent a binary value The VLBA field 404 of die block 402 mciudes die value 20' to indicate the particular location within the space manager 400 to which the bloc 402 belongs When power is turned on, since the contents of the flash device 214 is preserved while the contents of the space manager 400 LUT is lost due to its volatile nature, the contents of the block 402 is used to reconstruct the space manager. In fact, the contents of all of the blocks within the flash memory unit is used to reconstruct the LUT of the space manager 400. In Fig. 4a. the contents of the VLBA field 404, which is '20', is used to point to a conesponding location, or row. identified by the VLBA 20 and to store the value '220' therein. The example of writing the LBA-identified sectors 27-2F continues in Fig. 4b where a free block is located by the space manager, as the block 410. The block 410. which is identified by the VPBA value '480', includes 16 sector storage spaces and a VLBA field 412, a block status flag field 414. and a defect field 416. The status of the block 402 remains the same but since the block 410 is free at this time, there is no valid data. ECC. or information in the fields 412, 414 and 416. In Fig. 4c, the block 410 is marked as being ' in use ' . This is done by writing an 'xx ' value in the field 414 and ' 0020' in field 412. Again, this is not actually an 'xx ' value, rather 'xx ' is used herein to denote a predetermined binary value indicating that the block 410 is ' in use ' . The marking of the block 10 as being ' in use ' requires a write operation of sector information that is other than data, i.e. 'overhead' information. Thus, marking of the block in Fig. 4c is the first 'overhead' writing that is done in this example. As the reader will note, there will be 3 overhead writes altogether such that there are 3 - 16 (sector writes) or 19 write operations performed altogether. Next, in Fig. 4d, the first sector that needs to be written, i.e. the sector identified by LBA 27H. is written, as shown by the sector 420 in d e block 410. The contents of the fields 412. 414 and 416 remain unchanged during this write operation. Again, the reader is reminded that this write operation is actually a re-write of the sector identified by LBA 27H. That is. the latter sector was written to previously in the block 402 having an address of '220' and is now being re -written by the host prior to erasure of d e block 402. Since the block 402 cannot be written over due to lack of erasure thereof a free block 410 is designated for storage of the new sector information. In Fig. 4e. after die sector 420 has been wπtten, the contents of the block status flag field 414 of the block 410 is modified to 'yy ' indicating that the block 410 is 'pending'. Ofi erwise. the remaining contents of the block 410 remains the same. This write operation is another 'overhead' write operation where no sector information is written. As the reader will note, this is the second overhead operation of the present example. In Figs. 4c through 4e. the VLBA field 412 remains the same, i.e. '20', because this is the VLBA location conesponding to the block 410 ever since d is PAGE MISSING AT THE TIME OF PUBLICATION PAGE MISSING AT THE TIME OF PUBLICATION At step 504. consider the case where the free block that is found b\ the space manager to be Block 1 At step 508. the VLBA field and the block status flag field in Block 1 are updated The block status flag field in Block 1 is programmed to 'yy ' for indicating the status of Block 1 as pending The write operation at step 508 is one wnte operation and it is the first 'overhead' write operation performed when writing Block 1, as commanded by the host It should be noted, as earlier discussed herein, that "yy " is actually a predetermined binary value Next, at step 506. there are 13 write operations performed, each wnte operation is for moving an LBA-identified sector from Block 0 to Block 1 For example, the contents of the sector identified by LBA 0 is read from Block 0 and wntten to the conesponding sector of Block 1 - LBA 0 of Block 1 The same is done for the remaining 12 sectors that are being transrened from Block 0 to Block 1 Finally, at step 510. the new information, i.e. the sector information identified by the host at LBAs 13-15, is wntten to Block 1 Note that this is not a transfer of like-sectors from Block 0 to Block 1 Rather, there is new sector information being wntten to Block 1 That is. since the LBAs 13-15 are being updated, the sector information in the sectors, identified by LBAs 13-15 in Block 0, neεα not be moved to Block 1 As the last sector, i ε. the sector identified by LBA 15. is being wntten. withm the same wnte operation, the blocκ status flag field in Block 1 is also modified to 'zz ' for indicating the status of Block 1 as being 'block complete Step 510 entails 3 more wnte operations thereby bnnging the total wπte operation count for a 16-sector block to 17 - sixteen data wnte operations and one overhead ' wnte operation. In this manner, the number of write operations is reduced thereby increasing system performance, particularly in applications where many wπte and re-wπte operations need be performed After the above steps in Fig. 5. the contents of Block 0 may be erased after which Block 0 is returned to the pool of 'free " or available plocks for further storage use In still another embodiment of the present invention, system performance is further improved by performing the same number of write operations as there are sectors within a block and no moie This is best understood by d e use of an example depicted m Figs 6a and 6b Fig 6a shows the status of the Block 0 in the nonvolatile memory umt 602 when wnting LBAs 5-15 for the fust time attei an erase operation and Fig 6b shows the status of Blocks 0 and 1 when re-wntmg LBAs 5-15 In Fig. 6a. when the host commands the controller to write sector information to locations identified by LBA 5-15. the controller determines whether or not e the sectors identified by LBA 5- 15 have been previously written. In this case, they will not have been and therefore a ' free " block is identified for such a wπte transaction. In this case, the ' free ' block is Block 0. Block 0 is comprised of 16 sectors. s0-sl5, with each sector having at least a data field and an ECC field. The first sector, sO. of Block 0 also includes a VLBA field 604 for storing VLBA information and_ the last sector. si 5. includes a block status flag field 606 for storing block status information. First, an " overhead " wnte operation is performed to wnte the appropriate VLBA value (this value is determined as described hereinabove with respect to earlier figures; in the VLBA field 604 of the first sector. sO Next, data and ECC is wπtten to each of the sectors identified by the LBA values 5-15. which requires 1 1 write operations and while writing the last sector. s l 5, the bloclc status flag field 606 is wntten to indicate ' zz or "block complete ' In Fig. 6b. assuming d e host commands the controller to wnte to the LBAs 5-15 again, the nonvolatile memory unit 602 is modified as follows. The controller determines that these LBAs have been previously written in Block 0. Thus, a 'free " block. Block 1. is located and mfoπnaπon the sector storage locations are identified by LBA 0-4, i.e. s0-s4. are moved from Block 0 to Block 1. When the first sector. sO. is being wntten by the controller, the VLBA is also written into the VLBA field 608 thus avoiding the need for an extra wnte operation. Next, new information, provided by the host, is wntten into the sectors s5-sl5 of Block 1 in sequential order and using 1 1 wnte operations. Wlule writing the last sector, si 5. d e block status flag is also written into the block status flag field 610 of the Block 1 , as zz ' to indicate 'bloc complete ' . As discussed earlier. " zz " is actually a binary value that is a bye in length. Accordingly, an entire block is written with only 16 write operations as there are no extra ' overhead ' write operations necessary. Thereafter, the contents of Block 0 is erased and Block 0 is returned to the pool of " free " blocks for further storage use. During power-up. as happens after an abrupt or typically power-down of the system, the contents of the LUT in the space manager is lost because the LUT is maintained in volatile memory, which looses its contents when no power is provided thereto. Accordingly, the controller must reconstruct the contents of the LUT during power-up so as to provide the requisite mapping between host-provided sector addresses and the addresses used to read and wnte information from and to the nonvolatile memory unit. During power-up, the controller performs two read operations for each block withm the nonvolatile memory unit in order to determine the status of the block. This is best understood by providing an example. Consider the case where a number of the sectors in Block 0 were being rewritten to Block 1 but the re-write and move of previously-written sectors was not yet completed before there was a power-down. Further consider that the VLBA 20 in the space manager, prior to power down, points to the Block 0. i.e. row 20 (in Hexadecimal notation) of the LUT includes an address identifying Block 0 in the nonvolatile memory unit. Because some of the sectors in Block 0 were undergoing a transfer to Block 1. the stams flag of Block 0 will indicate " zz ' or "block complete " and because the transfer of the sectors was not yet completed, the stams flag of Block 1 will indicate " FF 'FF. ' is the status of flash cells when they have not yet been programmed. As the reader recalls, in the case where only 16 write operations are required to re-write a block, the status flag is updated only when the last sector, i.e. sector 15. written. In this case, because not all of the sectors have yet been written to Block 1. the contents of the last sector thereof, i.e. sl5 of Block 1. will remain unprogrammed, or be at ' FFFF.... ' . During power-up, the controller reads the contents of the first sector, sO. in Block 1 to retrieve the VLBA value. In this case, the VLBA will be "20' (in Hexadecimal notation). Next, the controller reads the contents of the last sector, si 5. of Block 1. which will indicate that the status flag is " FF. " . This tells the controller that Block 1 was being written thereto but the write operation is not yet complete. It should be noted that d e VLBA field of Block 0 will include the same VLBA value as that of Block 1, i.e. '20'. The controller thus looks for the block within the nonvolatile memory unit to find the same VLBA as that included in Block 1 and finds Block 0 as having that same value, 20. Accordingly, die controller knows to transfer all sectors that have not yet been moved from Block 0 to Block 1. The controller knows which sectors to move according to the contents of die sectors because with respect to sectors that were previously written, their contents will be values other than "FFFF ' and with respect to sectors that were not yet written, their vaiues will be ail 'FFFF ' The sectors that need to be moved from Block 0 to Block 1 that have not yet been moved, will be transferred to Block 1 and the status flag field in Block 1 will be programmed as " zz ' or ' block complete ' The controller then updates Row " 20" m the LUT of the space manager to include the address of the Block 1 Although the present invention has been descπbed in terms of specific embodiments it is anticipated that alterations and modifications thereof will no douot become apparent to those skilled in the an It is therefore intended that the following claims be interpreted as covering all such alterations and modification as fall withm the true spirit and scope of _ the invention 1 0

Claims: CLAIMS What is claimed is: 1 A solid state storage system for use with a host and a nonvolatile memorv' unit, the host for 2 reading and writing digital information organized in sectors from and to the nonvolatile memory 3 unit the nonvolatile memory unit including one or more nonvolatile memory devices each nonvolatile memory device including at least one block having a plurality of sector storage spaces s for stonng the sector information, each sector storage space including storage space for stonng data 6 and oveinead information, comprising: n a controller device coupled between the host and the non olatile memory unit for re-wntmg s a particular group of sector information identified by the host, the particular group ot sector 9 information included withm a previously-written block of the nonvolatile memory unit, d e controller device for identifying a free bloc and configunng the free block to include at least two li sector storage spaces, a first sector storage space and a second sectoi stoiage space, the fust iector 2 stoiage space including a data storage field and an overnead storage field wherein the first 13 stoiage field includes an address field for stonng an address value identifying the free block, the 14 second sectoi storage space includmg a data stoiage field and an oveihead storage field wnerem the is second overhead storage field includes a flag field indicative ot the status of d e free block, the is controllei device for performing a wnte operation on the first sector storage space to wnte data in I- 1 the data stoiage field and the address value into the address field, the controller device for 18 perrorm g further wnte operations to write the particular group of sector information and for 19 performing yet further write operations to move sector information from the previously- wπtten 20 block into like-sector storage spaces withm the free block and upon wnting sector information to the 21 second storage space, the controller for modifying the contents of the flag field to indicate 22 completion of writing to the free block, 23 wherein the number of write operations during re-writing of a block is no more than the 24 numbei of sector storage spaces withm a block thereby mci easing the overall performance of the 25 system i 2 λ solid state stoiage system as lecited m claim 1 wheiein the addiess value is a Vutual 2 Logical Block Value (VLBA) identif ing the fieε blocic for use bv the controller device i 3 A solid state storage system as recited in claim 1 wherein completion of writing to the free 2 block is indicated by a binary value representing stams of the free block as being ' block complete " i - 1 A solid state storage system as recited in claim 1 wherein the controller device includes a 2 LooK-Up-Table (LUT) for storing mapping information between host-provided sector addresses and 3 blocks withm the nonvolatile m emor\ unit wherein conesponding sector storage locations are 4 located 5 A solid state storage system as recited in claim - 1 wherein during power-up. the contioller 2 device for reading the contents of the address field and the flag field and if according to the contents : of the flag field, no information has been programmed therein, the controller for using the contents * of the address field to determine the block from which sectors are being transferred and for s completing the transfer of the sectors to the free block and for modifying the LUT to reflect the 6 current conespondence between the address value and the free block i 6 A solid state storage system as recited in claim 1 wherein the fust sector storage space is the 2 first sector storage space of the free block. 7 A solid state storage system as lecited in claim 1 wherein the second sector storage space is 2 the last sector storage space of the free block. i 8 A solid state storage system for use with a host and a nonvolatile memory unit, the host for 2 reading and writing digital information organized m sectors from and to the nonvolatile memory 3 unit, the nonvolatile memory unit including one or more nonvolatile memory devices, each 4 nonvolatile memory device including at least one block having a plurality of sector storage spaces s for stonng the sector information, each sector storage space including storage space for storing data 6 and overhead information, comprising 7 a controller device coupled between the host and the nonvolatile memory unit for re-wntmg 3 sector information to a particular group of sector storage spaces identified by the host, the paiticuiai 9 group of sector storage spaces having been written thereto previously by the host, the controller 0 device for identifying a free block having a plurality of sector storage spaces and configuring one of i the sector storage spaces to include a status flag field for storing a status flag value indicative of the 2 status of the free block, the controller device for modif ing the stams flag value to indicate that the 3 free block is ' use , for writing sector information to one of the particular group of sector storage 4 spaces, for further modifying the stams flag value to indicate that the free block is 'pending' , for s writing sectoi information to the remainder of the particular group of sector storage spaces , for 6 performing write operations to transfer the contents of previously- wntten sector storage spaces that 7 are not being re-wntten to the free block and for further modifying the stams flag value to indicate 8 that the free block is 'block complete " . 9 wherein the number of write operations for re-wntmg a bloci is reduced to the number of 0 sector storage spaces withm a block plus three additional wnte operations thereby increasing the i overall performance of the system i 9 λ solid state stoia g e system as recited in claim 8 wherein the stams flag field is withm the 2 last sector stoiage space of the free block. i 10 A solid state storage system as recited m claim 8 wherein the controller device includes 2 means foi erasing the previously-written sector storage spaces i l l A. solid state storage system as recited m claim 8 wherein the free block further includes an 2 address field for storing address information identifying the free block withm the nonvolatile 3 memory unit 4 12 A solid state storage system as recited in claim 8 wherein the free block further includes a flag field indicative of whether or not the free block is defective 1 13 A method for reducing the number of write operations performed in a solid state storage 9 system foi re-wπting a block of information m nonvolatile memory, the solid state storage system 3 including a host for reading and wntmg digital information oi gamzed in sectors from and to the nonvolatile memory unit under the control of a controller device, the nonvolatile memory unit s including one or more nonvolatile memory devices, each nonvolatile memory device including at 6 least one block having a plurality of sector storage spaces foi stonng the sector information each 7 sector stoiage space including storage space for storing data and overhead information, the method 8 compπsmg 9 identifying a particular group of sector information a controller device coupled between the 0 host and die nonvolatile memory umt for re-wntmg a particular group of sector information, the ii particular group of sector information included withm a previously-written block of the nonvolatile 12 memory unit. 13 identifying a free block withm the nonvolatile memory unit foi storage of the particular 14 group of sector information. s configuring the free block to include at least two sector storage spaces, a fust sector storage is space and a second sector storage space the fust sector storage space including a data storage field i" and an overhead storage field, the first overhead storage field having an address field for storing an is addiess value identifying the free block, the second sector storage space includmg a data storage 19 field and an overhead storage field, die second overhead storage field having a stams flag field 20 indicative of the stams of the free block. 2i performing a wnte operation on the first sector storage space wherein data is wntten in the 22 data storage field and the address value is wπtten into die address field. 23 performing fuπher wnte operations wherein the particulai gioup of sector information is 24 written into the free block. 25 performing yet further write operations wherein sector information is moved from sector 26 storage spaces of the previously-wntten block into li e-sector storage spaces withm the nee block 27 and 28 upon writing sector information to the second storage space of the free block, modifying the 29 contents of the status flag field to indicate completion of writing to the free block 1 14 A solid state storage system for use with a host and a nonvolatile memorv unit, the host for 2 reading and wnting digital information organized m sectors from and to the nonvolatile memory 3 unit, the nonvolatile memory unit including one or more nonvolatile memory devices, each ■i nonvolatile memory device including at least one block having a plurality of sector storage spaces s for storing the sector information, each sector storage space including storage space for stonng data 6 and overhead information, comprising 7 a controller de\ ice coupled betw een the host and the nonvolatile memory unit for re-wntmg 8 sector information to a particular group of sector storage spaces identified by the host, the panicular 9 group of sector storage spaces having been wntten thereto previously by the host, the controller 10 device for identifying a free block having a plurality of sector storage spaces and configuring one of li the sector storage spaces to include a stams flag field for stonng a stams flag value indicative of the 12 status of the free block, the controller device for transfemng the contents of previously-wπtten 13 sector storage spaces to like-sector storage spaces withm the fiee blocic. for modif y ing the status .4 flag value to indicate that the stams of the free block is pending for writing sector information to is the particular group of sector storage spaces withm the free block and while writing to the last one 16 of the particular sector storage spaces, modifying the stams flag to indicate that the stams of the free 17 block is block complete. 18 wheiem the numbei of wπte operations for re-writing a block is reduced to the number of 19 sector stoiage spaces withm a block p s one additional wπte operation therepy increasing the 2 o overall peiformance of the svstem 1 15 A solid state storage system as recited in claim 14 wherein the stams flag field is with the 2 last sector storage space of the free block i 16 A solid state storage system as recited in claim 14 wherein the controller device includes 2 means for erasing the previously- written sector storage spaces i 17 A solid state storage system as recited m claim 14 wherein the fiee block further includes an 2 address field for storing address information identifvmg the fiee block withm the nonvolatile 3 memorv unit 18 A solid state storage system as recited in claim 14 wheiem the free block further includes a flag field indicative of whether or not the free block is defectπ e

Inventors: ESTAKHRI PETRO, IMAN BEHANU, ESTAKHRI, PETRO, IMAN, BEHANU
Applicants: ESTAKHRI PETRO, IMAN BEHANU, LEXAR MEDIA INC, ESTAKHRI, PETRO, IMAN, BEHANU, LEXAR MEDIA, INC.
Application year: 2000
Main classification: G11C16
IPC codes: G06F12, G11C16