METHOD AND APPARATUS TO ENCODE, AND DECODE ELECTRICAL SIGNALS, AUDIO SIGNALS, COMPUTER DATA SIGNALS, STATIC, AND DYNAMIC WEB DOCUMENTS FOR RECORDING, TRANSMISSION, RECEPTION, AND REGENERATION

Abstract: A computer, and electronic circuit implemented method and apparatus to encode, decode, compress, decompress, record, and transmit electrical signals, audio signals, computer data signals, and Hypertext Markup Language (HTML) static, and dynamic documents. A computer (8) is used to operate at sufficient speed to control and format the signals from translation devices (10, 3) for sequenced input to a signal compression modulator (17) for bandwidth compression and modulation. Within the signal concentrator (20), multiple encoded signals may be combined and output for further processing. For signal reception, an FM radio circuit (26, 30) can be used to provide signals for further processing. A signal decompression modulator (43) is used for bandwidth decompression and demodulation and provides a sequenced output to a computer (49). A computer (49) is also used to operate at sufficient speed to control and format the signals delivered to translation devices (51, 61). The output of the translation devices (51, 61) is provided for further processing and modulation.

Description: TITLE: METHOD AND APPARATUS TO ENCODE, AND DECODE ELECTRICAL SIGNALS, AUDIO SIGNALS, COMPUTER DATA SIGNALS, STATIC, AND DYNAMIC WEB DOCUMENTS FOR RECORDING, TRANSMISSION, RECEPTION, AND REGENERATION. BACKGROUND OF THE INVENTION Field of the Invention. This invention relates to the field of electronic signal encoding, and compression methods for signal recording, regeneration, transmission, and more particularly to methods and apparatus to encode, decode, compress, decompress, record, and transmit electrical signals, audio signals, computer data signals, and Hypertext Markup Language (HTML) static, and dynamic documents. Prior Art. In the United States (U S ) and Japan, television signals that contain video and audio information are presented in accordance with the National Television System Committee (NTSC) signal format standard, in Europe, the presentation standards used are the Phase Alternation Line (PAL), and SECAM formats HDTV and other standards are possible, but from this point on, only the U S standard will be used in discussion though other standards should be considered The NTSC signal comprising an analog amplitude modulated (AM) video signal carrier centered at 1 25 MHz, a color signal subcarrier centered at 3 58 MHz, and a frequency modulated (FM) audio signal carrier centered 4 5 MHz above the video signal carrier The (AM) video signal is extremely susceptible to noise which can corrupt and degrade the quality of a transmitted NTSC signal received and displayed by a television receiver In the U S , broadcast standards are maintained by the Federal Communications Commission (FCC) in coordination with the International Telecommunications Union (ITU), other radio standards are possible, but from this point on, only the U S standard will be used in discussion though other standards should be considered In the U S one common method to broadcast radio signals is to use frequency modulation (FM) of a carrier signal (FM) radio broadcast signals are inherently free of noise that can corrupt and degrade the quality of the signal when transmitted The standard primary (FM) radio broadcast signal carrier is frequency modulated with a maximum frequency deviation of 150 KHz and a total bandwidth of 200 KHz The standard (FM) radio broadcast stereo signal comprising a left plus right (L+R) audio signal with a frequency deviation of (0 to 15 KHz), a left minus right (L-R) difference audio signal with a frequency deviation of (23 to 53 KHz), and a pilot subcarrier signal with a frequency of (19 KHz) (FM) radio systems primarily transmit music and audio information but currently do not have the ability to transmit NTSC signals or high speed computer data signals above 20,000 bits per second Radio systems currently only transmit one audio signal on the primary (FM) signal Another method to broadcast radio signals is to use amplitude modulation (AM) of a carrier signal (AM) radio signals are extremely susceptible to noise which interferes, corrupts and degrades the quality of a transmitted signal. (AM) radio systems primarily transmit music and audio information but currently do not have the ability to transmit NTSC signals. Radio stations that broadcast their primary signal using (FM) can also broadcast a secondary signal that rides along "piggyback" on the primary signal. The "piggyback" signal is an auxiliary service called the Subsidiary Communications Authorization (SCA) used to broadcast to a select group of receivers who subscribe to receive this special broadcast. An (FM) radio station that uses stereo broadcast of the primary signal can also broadcast an SCA signal comprising an audio frequency deviation of (59.5 to 74.5 KHz). If a radio station does not use stereo broadcast (monaural) of the primary signal then it may also simultaneously broadcast a second SCA signal comprising an audio frequency deviation of (20 to 53 KHz). Applicant believes that radio systems currently only transmit one signal type at a time on a SCA signal. Networking technology has developed an interconnected network of computer systems commonly known as the Internet, and the World Wide Web (WWW). The Internet uses the Transmission Control Protocol/Internet Protocol (TCP/IP) standard as the means of transferring data between computers connected to the Internet. Other standards are possible, but from this point on, only the TCP/IP standard is used in discussion though other standards should be considered. It is believed that the Internet currently does not have the ability to transmit NTSC signals that are viewable at the full motion display rate as specified in the NTSC standard when viewed on any display monitor, this results in a low quality visual display compared to full motion NTSC display monitors. Applicant believes currently, Internet transmitted NTSC signals are for display on non-interlaced computer displays, and not for display on NTSC interlaced television monitors. A common format to encode and decode video, audio, and data signals for transmission, recording, and reception is to use computer algorithms for compression, and decompression to reduce the amount of data and bandwidth required to represent the signals. These algorithms are often used to transfer video, audio, and data over the Internet. Some of the most common algorithms in use are the Joint Photographic Expert Group (JPEG), Moving Pictures Expert Group (MPEG), MP3, MNP, International Telephone and Telegraph Consultative Committee (CCITT), LZW (V.42 bis), and Microsoft (MS-Audio). Other formats are possible, but from this point on, only the JPEG format will be used in discussion though other formats should be considered Currently, the use of algorithm compression techniques that are applied to video signals, and audio signals result in a type of stop and start, non-continuos motion (jerky) of visual displays, and audio signals It is believed that this result occurs because of the nature in which the signals are transmitted and the hardware used to receive, display, and regenerate the original signals Currently, with compression algorithms, the transmitted data is serially streamed to the receiving equipment storage device for buffering, but can result in a non-continuos stream due to the fact that the streamed information can become interrupted HTML documents are also called Web documents, and are among the most commonly transferred computer data signals on the Internet These Web documents can be static, where no graphics or text information is changed when they are displayed Also, the Web documents can be dynamic, where displayed graphics, text, and computer operations can change because small computer programs (such as Java applets, and Active-X applets) are attached to either the documents, data, or to both Other formats are possible such as XTML, and SGML but from this point on, only the HTML format will be used in discussion though other formats should be considered HTML documents are more commonly displayed on non-interlaced scan computer monitors, they can also be displayed on interlaced scan television monitors with the use of special (WEB-TV) receivers SUMMARY OF THE INVENTION Applicant believes that the invention is a method, and apparatus that provides a means to encode, decode, transmit, receive, record, and regenerate multiple signals of the above prior mentioned signal standards and formats In one transmission method, FM radio SCA broadcasting is used to transmit encoded signals to an SCA receiving apparatus The receiving apparatus uses a FM radio circuit, a computer, and a signal decompression modulator comprised of coupled Phase Locked Loop circuitry to decode transmitted encoded signals Applicant believes that this method, and apparatus provides a means to embed ("piggyback") multiple encoded signals onto various signal formats such as NTSC signals, audio, FCC radio, JPEG, HTML, and TCP/IP for immediate reception or later regeneration at a another time. Applicant believes that the method, and apparatus provides a means for FCC primary signals, and SCA radio signals to have multiple encoded NTSC signals, and HTML Web documents embedded that are unnoticed and unusable to a listener of the primary, and SCA signals, but can be used, and displayed by a person using the invention. Applicant believes that the method, and apparatus provides a means for recorded music signals to have multiple encoded NTSC signals, audio signals, and HTML Web documents embedded which are unnoticed while listening to the music signal, but can be regenerated and displayed by a person using the invention. Applicant believes that the transmission of audio signals through the Internet using standards such as MP3 is currently possible, but with the use of the described method, and apparatus, a means is provided to transmit multiple signals of encoded NTSC television signals, and HTML Web documents through the Internet that can be viewed with conventional television monitors, and computer monitors. Applicant believes that the method, and apparatus provides a means for multiple encoded signals of NTSC signals, HTML Web documents, computer data signals, and audio signals to be transmitted through the common plain ordinary telephone system (POTS), cable television systems, and cellular telephone systems using the invention. Other aspects of the present invention, will become evident from the detailed description of the invention. BRIEF DESCRIPTION OF DRAWINGS One embodiment of the invention is illustrated for example and not limitation in Fig. 1, Fig. 2 ,Fig. 3, Fig. 4, Fig. 5, and Fig. 6 of the accompanying drawings, in which like references indicate elements, and which: Fig. 1 is a general illustrated block diagram comprising the (encoding circuit ) and various signal encoding, and transmission aspects of the present invention. Fig. 2 is a general illustrated block diagram comprising the (decoding circuit) and various signal receptions, and decoding aspects of the present invention. Fig. 3 is an alternative embodiment illustrated block diagram comprising the (encoding circuit) and various signal receptions, and decoding aspects of the present invention This design drawing shows how one computer can combine the signals from multiple sources, and encode the separate signals with hardware connection and software within the computer The encoding of the multiple signals from the separate translation devices will allow the computer to decode the signals into there original form after reception Fig. 4, Fig. 5, and Fig. 6 are general illustrated block diagrams with prior art components removed DETAILED DESCRIPTION OF THE PRESENTLY PREFERRED EMBODIMENT OF THE INVENTION The presently preferred embodiment of the present invention is a method, and apparatus to encode, decode, compress, decompress, record, and transmit video, audio, computer data signals, and Hypertext Markup Language (HTML) static, and dynamic documents In the following description, for the purpose of explanation, specific details are set forth in order to provide an understanding of the present invention It will be evident to one skilled in the art that alternative forms of embodiment is possible The presently preferred embodiment of the present invention will now be described in connection with drawings Fig. 1, Fig. 2 and Fig. 3 The drawings show structures, and devices in block diagram form in order to avoid unnecessarily complicating the illustrations The preferred embodiment of the invention is shown in Fig 1 (encoding circuit), and in Fig 2 (decoding circuit) The encoding circuit of Fig 1, has an external signal input line (la) thereby providing signals of (0 to f^) hertz to lines (lb) and to (lc) Input line (lb) is coupled to provide input signals to a selectively tuned bandpass filter 2. Input line (lc) is coupled to provide input signals to a selectively tuned bandpass filter 9. The filters used in the presently preferred embodiment are made ordinary commercially available components Input signals provided by line 3 are coupled to a signal translation device 4 Digital signals on lines 5 provide the translated signal code (data sets) of the input signal from line 3 Line 6 provides a control signal between the signal translation device 4 and the computer 8 Line 6 signals are used to control the flow of signals on lines 5 to the computer 8 Input signals are provided by line 10 to a coupled signal translation device 11 The translation devices 4, and 11 may be any one of a plurality of commercially available devices capable of performing high speed signal translation Digital signals on lines 12 provide the translated signal code (data sets) of the input signal from line 10. Line 13 provides a control signal between the signal translation device 11 and the computer 8 The signals on line 13 are used to control the flow of signals on lines 12 to the computer 8 The computer 8 is comprising a Texas Instruments TMS320C5416 or TMS320C6211 may be used but any one of a plurality of commercially available devices capable of performing ultra-high speed machine instructions may also be used. The computer 8 executes computer instructions to control, format, parallel input data sets, and provides a sequenced data frame signal output onto line 15 The first buffer device 8a is within computer 8 into which formatted data sets are placed to format data frames. The buffer device 8a within computer 8 is random-access memory RAM, referred to as a "frame buffer" in which it temporarily stores data sets of information The sequenced data frame signal provided on line 15 by the computer 8 is coupled to the first input to the signal compression modulator circuit 17. The signal compression modulator circuit 17 comprising of dual Phase Locked Loops (PLL) circuits such as NE565- Phase Locked Loop coupled to the output of integral prescaler circuits such as cascaded dual SP8629 and a SP8660, or comprising direct frequency synthesis circuits such as the SP2002, although a plurality of commercially available devices capable of performing high speed signal synthesis, such as LMX2301 may be used Within the signal compression modulator circuit 17 the compressed signal bandwidth is used to modulate a selectable frequency with circuits comprising the NE565-PLL using Single Frequency Keying (SFK) or with circuits comprising Phase Shift Keying (PSK) which is output onto the coupled line 18, although a plurality of commercially available devices capable of performing SFK or PSK may be used. The computer 8 executes computer instructions to control, format, parallel input data sets, and provides a sequenced data frame signal output on line 16 The second buffer device 8b is within computer 8 into which formatted data sets are placed to format data frames The second buffer device 8b included within computer 8 comprising of random- access memory RAM, referred to as a "frame buffer" in which it temporarily stores data sets of information The sequenced data frame signal provided onto line 16 by the computer 8 is coupled to the second input to the signal compression modulator circuit 17 Within the signal compression modulator circuit 17 the compressed signal bandwidth is used to modulate a selectable frequency using Single Frequency Keying (SFK) or Phase Shift Keying (PSK) modulation and is output onto the coupled line 19 The signal compression modulator circuit 17 just described has used (SFK) or (PSK) for modulation but a number of alternative modulation techniques can also be used and should not be construed as a limitation on the invention The encoded signals from line 18, and line 19, are coupled to an operational amplifier mixer circuit comprising a filtering signal concentrator 20 The filtering signal concentrator 20 provides a means for signals from line 18, and line 19, and external signals from lines 21 to be combined, and to provide a signal with nonlinear distortion and noise products remove from the output on line 22 The encoded signals on line 22 are provided to one of many transmission sources, such as an FM broadcast radio station 24 for primary or SCA signal modulation The tapped line 23 provides a signal source to a plurality of other devices, such as computers, and signal recording devices The following discussion is for exemplification and should not be construed as a limitation of scope on the invention The decoding circuit of Fig. 2, comprising a signal receiving antenna input line 25 coupled to a FM radio receiver front-end tuner circuit 26 comprising the Waller 32SN2F1-30 although any of a plurality of commercially available tuner circuits capable of performing front-end FM signal processing may be used The front-end tuner 26 provides a 10 7 MHz FM Intermediate Frequency (FM-IF) signal onto line 27 Line 27 couples the signal from the FM front-end tuner 26 to the 10 7 MHz coupling capacitor filter circuit 28 Line 29 couples the signal from the 10 7 MHz capacitor filter circuit 28 to a FM-IF circuit 30 comprising the National Semiconductor LM3089 although any of a plurality of commercially available devices capable of performing FM-IF signal processing may be used The FM-IF circuit 30 is coupled to line 29 and provides a FM demodulated signal output onto a coupled line 31 The FM demodulated signal on line 31 contains the composite FM signals from a radio broadcast signal that was selected by signal tuning the FM radio receiver front-end tuner circuit 26 The composite FM signal on line 31 contains the FM radio stereo audio signals (L+R), and (L-R), and the frequency modulated SCA audio signals The filter circuit 32 is capable of being tuned to either the FM radio primary audio signals or the SCA audio signals The signals on line 31 are coupled to a filter circuit 32 and provides a FM composite SCA signals to the output on line 33 The FM composite SCA signals on line 33 are coupled to an SCA decoder circuit 34 The SCA decoder circuit 34 is comprising of a circuit of a PLL such as a 565-PLL and is coupled to line 33 The SCA decoder circuit 34 output is coupled to the line 35 The SCA signal on line 35 contains the encoded data frame signals that must be further decoded with additional circuits It will be known to a reader skilled in the art that the portions of the FM radio circuit just described are well known and that the items 25, 26, 28, 30, 32, and 34 are commonly practiced The FM radio description is to illustrate in detail one method of how encoded signals can be transmitted, and received to the described invention Line 35 couples the encoded signal input from the SCA decoder circuit 34 to a signal source switch 36. Line 38 couples the signal source switch 36 to the frequency selectable bandpass filter 40 Line 37 provides a external signal input to signal source switch 36 Line 41 provides a signal to the first input comprising of a signal decompression modulator circuit 43 to which it is coupled The sequenced encoded data frame signal provided on line 41 is coupled to bandpass filter 40 Line 41 is coupled to the first input comprising the signal decompression modulator circuit 43. The signal decompression modulator circuit 43 comprising of dual Phase Locked Loops (PLL) circuits such as the NE565-PLL circuit, and NE564-PLL circuit coupled with integral prescaler circuits within its feedback loop such as dual SP8629 and a SP8660, or comprising direct frequency synthesis circuits such as the SP2002, although a plurality of commercially available devices capable of performing high speed signal synthesis, such as LMX2301 may be used Within the signal decompression modulator circuit 43 the modulated signal provided from line 41 is demodulated using Single Frequency Keying (SFK) comprising circuits, such as the NE565-PLL or with circuits comprising (PSK) into the original sequenced encoded data frame signal. Line 44 is coupled to a computer 49 comprising a Texas Instruments TMS320C5416 or TMS320C6211 but any one of a plurality of commercially available devices capable of performing ultra-high speed machine instructions may also be used. The computer 49 executes computer instructions to control, format, parallel output data sets, and input sequenced encoded data frame signals from line 44 into a first buffer device 49a. Comprising the computer 49 is a sequencer circuit, and software code to provide the means to identify the first bit of a data frame signal that has been transmitted, after which identifying the subsequent data frame code is automatically completed. The first buffer device 49a is comprised within computer 49 and into which formatted data frames are placed to format data sets. The buffer device 49a within computer 49 comprising of random-access memory RAM, referred to as a "frame buffer" in which it temporarily stores data sets of information. The computer 49 provides a means to parallel output data set signals onto lines 50. The parallel data set signals provided on lines 50 by the computer 49 are coupled to the input of the signal translation device 51. The signal translation device 51 comprising the Texas Instruments TLC5602 converter is connected to digital signals on lines 50. A plurality of other commercially available devices capable of performing high speed signal translation may also be used. Line 52 provides a control signal between the signal translation device 51 and the computer 49. Line 52 signals are used to control the flow of signals on lines 50 to the signal translation device 51. The output of the translation device 51 is provided onto the coupled line 53. The NTSC video signal on line 53 is coupled to a television video modulator circuit input 55a. The television video modulator circuit 55 comprising of a TV video modulator such as the National Semiconductor LM2889. Line 57 provides the means to couple the NTSC video signal directly to the video input line of a television receiver 58a. Line 39 is coupled to a frequency selectable bandpass filter 45 and to output the selected frequency bandwidth onto line 46 to which it is coupled. Line 46 provides a signal to the second input of a signal decompression modulator circuit 43 to which it is coupled. The sequenced encoded data frame signal provided on line 46 by the bandpass filter 45 is coupled to the second input to the signal decompression modulator circuit 43 Within the signal decompression modulator circuit 43 the bandwidth of the demodulated data frame signal is output onto line 48 Line 48 is coupled to the computer 49 The computer 49 executes computer instructions to control, format, parallel output data sets, and input sequenced encoded data frame signals from line 48 into a second buffer device 49b The second buffer device 49b comprised within computer 49 and into which formatted data frames are placed to format data sets The buffer device 49b within computer 49 comprising of random-access memory RAM, referred to as a "frame buffer" in which it temporarily stores data sets of information The computer 49 is coupled to lines 59 The parallel data set signals provided on lines 59 by the computer 49 are coupled to the input of the signal translation device 61 The signal translation device 61 comprising the Texas Instruments TLC5602 converter is coupled to digital signals on lines 59. A plurality of other commercially available devices capable of performing high speed signal translation may also be used Line 60 provides a control signal between the signal translation device 61 and the computer 49 Line 60 signals are used to control the flow of signals on lines 59 to the signal translation device 61 The output of the translation device 61 is provided onto the coupled line 62 Line 62 is coupled to the television video modulator circuit input 55b Line 64 provides the means to couple to the audio input line of a television receiver 58b Line 54, and line 63 provide a tapped signal source to supply signals to external devices such as computers, and signal recording equipment The embodiment shown in Fig. 3 shows how one computer can combine the signals from multiple sources, and encode the separate signals with hardware connection and software within the computer providing one output data frame signal that contains the information from the multiple encoded signals The encoding of the multiple signals from the separate translation devices will allow the computer to decode the signals into there original form after reception The previously discussed component details of the encoding circuit also apply to Fig. 3 The television video modulator circuit 55 provides a composite NTSC signal output onto the coupled line 56 that is also coupled to the antenna of television receiver 58c The composite NTSC signal from line 56 contains both the video signal, and audio signal It will be known to a reader skilled in the art that the portions of the television video modulator circuit 55 just described are well known and that the items 55, and 58 are commonly practiced Throughout this detailed description of the invention, an encoded NTSC signal using SCA signal transmission and reception has been used to explain the details of the invention, to illustrate the flow of signals through circuits, and to describe the various resultant signals output from these circuits Evidently, various modifications, and changes can be made thereto without departing from the spirit and scope of the invention The drawings presented are to be regarded in illustrative rather than restrictive sense OPERATIONAL DESCRIPTION OF THE PRESENTLY PREFERRED EMBODIMENT OF THE INVENTION The operation of the presently preferred embodiment of the invention will now be described in connection with drawings Fig. 1, Fig. 2 and in Fig. 3 The drawings show structures, and devices in block diagram form in order to avoid unnecessarily complicating the illustrations The preferred embodiment of the invention is shown in Fig 1 (encoding circuit), and in Fig 2 (decoding circuit) The encoding circuit of Fig 1, has a signal input line (la) thereby providing a maximum input signal bandwidth of (0 to f max ) hertz to lines (lb) and to (lc) Input line (lb) is coupled to provide input signals to a selectively tuned bandpass filter 2. Input line (lc) is coupled to provide input signals to a selectively tuned bandpass filter 9. The bandpass filter 9 is set for a specific frequency bandwidth to bandpass The filters used in the presently preferred embodiment are made ordinary commercially available components Input signals provided by line 3 are coupled to a signal translation device 4 comprising a Texas Instruments TLC5510 converter to receive input signals and perform signal translation into coded signals of 256 eight-bit digitally coded signals of (00 to FF hexadecimal) The Nyquist Sampling Theorem says that if an analog signal is sampled at a minimum of [ 2 times (f max ) ] hertz per second, the samples at this rate can be used to perfectly regenerate the original signals (f) hertz over the bandwidth (zero to f ma ) hertz Digital signals on lines 5 provide the translated signal code (referred to as data sets) of the input signal (f max ) from line 3 Line 6 provides a control signal between the signal translation device 4 and the computer 8 Line 6 signals are used to control the flow of signals on lines 5 to the computer 8 Input signals (f max ) are provided by line 10 to a coupled signal translation device 11 comprising a Texas Instruments TLC5510 converter to receive signals and perform signal translation into coded signals of 256 eight-bit digitally coded signals of (00 to FF hexadecimal) The translation device 4 and device 11 provide a minimum translation rate output signal of [ 2 times f max ], and may be one of a plurality of commercially available devices capable of performing high speed signal translation Digital signals on lines 12 provide the translated signal code (data sets) of the input signal from line 10 Line 13 provides a control signal between the signal translation device 11 and the computer 8 The signals on line 13 are used to control the flow of signals on lines 12 to the computer 8 The computer 8 comprising a Texas Instruments TMS320C5416 or TMS320C6211 may be used but any one of a plurality of commercially available devices capable of performing ultra-high speed machine instructions may also be used The computer 8 executes computer instructions to control, format, parallel input data sets, and provides a sequenced data frame signal output onto line 15 The computer 8 provides a continuously sequenced data frame signal output onto line 15, and line 16 with a maximum bandwidth of ( D ), where [ D = (2 times f max ) times ( B+ C ) ], where (B) is the number of data set bits per cycle, and (C) is the number of data frame code bits appended to a data set per cycle The first buffer device 8a is comprised within computer 8 into which formatted data sets are placed to format data frames Data frame formatting by computer 8 is used to provide a method to synchronize the data sets during signal transmission so that the exact same data sets are recreated from the reception signal. The buffer device 8a within computer 8 is random-access memory RAM, is referred to as a "frame buffer" in which it temporarily stores data sets of information for data frame signal generation. Parkinson's Law corollary, says the ratio at which information can be transmitted depends of the bandwidth of the transmission media. For example, an FM radio SCA signal has an audio signal deviation bandwidth of approximately ( 59.5 to 74.5 KHz ), this results in a usable bandwidth of approximately ( 0 to 7.5 KHz ). Data transmission capacity is limited to the well known Shannon's Law that says the maximum capacity of a signal channel whose limitations are finite bandwidth and randomly distributed noise over the finite bandwidth is defined according to the formula C= W times Log 2 [1+ (P N) ] bits per second, where: (C) is the channel capacity in bits per second, (W) is the bandwidth of the channel in hertz, (P) is the power in watts of the signal through the channel, (N) is the power in watts of the noise out of the channel. As can be seen from the previously stated formulas, the bandwidth of the continuously sequenced data frame signals output onto line 15 and line 16 will need to have bandwidth reduction. Bandwidth reduction is achieved with the signal compression modulator circuit 17. The sequenced data frame signal provided on line 15 by the computer 8 is coupled to the first input to the signal compression modulator circuit 17. The signal compression modulator circuit 17 comprising of dual Phase Locked Loops (PLL) circuits such as NE565- Phase Locked Loop coupled to the output of integral prescaler circuits such as cascaded dual SP8629 and a SP8660, or comprising Direct Frequency Synthesis circuits such as the SP2002, although a plurality of commercially available devices capable of performing high speed signal synthesis, such as LMX2301 may be used. Within the signal compression modulator circuit 17 the original bandwidth of sequenced signals from line 15 is compressed by the prescalers modulus factor into one of several narrow frequency bandwidth ranges. Within the signal compression modulator circuit 17 the compressed signal bandwidth is used to modulate a selected frequency using Single Frequency Keying (SFK) or Phase Shift Keying (PSK) which is output onto the coupled line 18. Frequency Division Multiplexing (FDM) is bandwidth division of the transmission medium into logical channels over which multiple signals of information can be simultaneously transmitted Within the signal compression modulator circuit 17 (FDM) is used to subdivide the available transmission bandwidth of (0 to T maI ) hertz into multiple signal channels (N). and shall create multiple narrow frequency bandwidth's of [ (T max )/ N ] available for use with (SFK) or (PSK) modulation The computer 8 executes computer instructions to control, format, parallel input data sets, and provides a sequenced data frame signal output on line 16 The second buffer device 8b is comprised within computer 8 into which formatted data sets are placed to format data frames The second buffer device 8b included within computer 8 comprising of random-access memory RAM, is referred to as a "frame buffer" m which it temporarily stores data sets of information The sequenced data frame signal provided onto line 16 by the computer 8 is coupled to the second input to the signal compression modulator circuit 17 Within the signal compression modulator circuit 17 the original frequency bandwidth of sequenced signals from line 16 is compressed by the prescalers modulus factor into one of several narrow frequency bandwidth ranges Within the signal compression modulator circuit 17 the compressed signal bandwidth is used to modulate a selected frequency using Single Frequency Keying (SFK) or Phase Shift Keying (PSK) modulation and is output onto the coupled line 19 The signal compression modulator circuit 17 just described has used (SFK) or (PSK) for modulation but a number of alternative modulation techniques can also be used and should not be construed as a limitation on the invention The encoded signals from line 18, and line 19, are coupled to an operational amplifier mixer circuit comprising a filtering signal concentrator 20 The filtering signal concentrator 20 provides a means for signals from line 18, and line 19, and external encoded signals from line 21 to be combined, and to provide a signal with nonlinear distortion and noise products removed from the output on line 22 The encoded signals on line 22 are provided to one of many transmission sources, such as an FM broadcast radio station 24 for primary or SCA signal modulation The tapped line 23 provides a signal source to a plurality of other devices, such as computers, and signal recording devices The embodiment shown in Fig. 3 shows how one computer can combine the signals from multiple sources, and encode the separate signals with hardware connection and software within the computer providing one output data frame signal that contains the information from the multiple encoded signals. The encoding of the multiple signals from the separate translation devices will allow the computer to decode the signals into there original form after reception. The previously discussed component details of the encoding circuit also apply to Fig. 3. The following discussion is for exemplification and should not be construed as a limitation of scope on the invention. The decoding circuit of Fig. 2, comprising a signal receiving antenna input line 25 coupled to a FM radio receiver front-end tuner circuit 26 comprising the Waller 32SN2F1-30 although any of a plurality of commercially available tuner circuits capable of performing front-end FM signal processing may be used. The front-end tuner 26 receives and processes the FM broadcast signal that is carrier modulated on designated FCC channel frequencies of (88 to 108 MHz). The front-end tuner 26 provides a 10.7 MHz FM Intermediate Frequency (FM-EF) signal onto line 27. Line 27 couples the signal from the FM front-end tuner 26 to the 10.7 MHz coupling capacitor circuit 28. Line 29 couples the signal from the 10.7 MHz capacitor circuit 28 to a FM-IF circuit 30 comprising the National Semiconductor LM3089 although any of a plurality of commercially available devices capable of performing FM-IF signal processing may be used. The FM-IF circuit 30 processes the signal from line 29 and provides a FM demodulated signal output onto a coupled line 31. The FM demodulated signal on line 31 contains the composite FM signals from a radio broadcast signal that was selected by signal tuning the FM radio receiver front-end tuner circuit 26. The composite FM signal on line 31 contains the FM radio stereo audio signals (L+R), and (L-R), and the frequency modulated SCA audio signals. The filter circuit 32 is capable of being tuned to either the FM radio primary audio signals or the SCA audio signals. The signals on line 31 are coupled to a filter circuit 32 to provide only FM composite SCA signals to the output on line 33. The FM composite SCA signals on line 33 are coupled to an SCA decoder circuit 34. The SCA decoder circuit 34 is comprising of a circuit of a PLL such as a 565-PLL and decodes the FM composite SCA signals from line 33. The SCA decoder circuit 34 can be tuned to select either the FM primary signal or the SCA signal audio deviation frequencies The SCA decoder circuit 34 is frequency tuned to provide an SCA audio signal output onto the line 35 to which it is coupled The SCA signal on line 35 contains the encoded data frame signals that must be further decoded with additional circuits It will be known to a reader skilled in the art that the portions of the FM radio circuit just described are well known and that the items 25, 26, 28, 30, 32, and 34 is commonly practiced The FM radio description is to illustrate in detail one method of how encoded signals can be transmitted, and received to the described invention Line 35 provides an encoded signal input from the SCA decoder circuit 34 to a signal source switch 36 which provides a means to select the source of the input signal that will be provided onto line 38 Line 37 provides a external encoded signal input which can be from a plurality other sources comprising CD-rom, compact disk players, recorded music, and video with encoded signals embedded, and computer data signals The external input signals on line 37 have been described for exemplification and should not be construed as a limitation of scope on the invention Line 38 is coupled to a frequency selectable bandpass filter 40 and provides the signal to bandpass filter 40 to filter the undesired noise, aliasing signals, and to output the selected frequency bandwidth onto line 41 to which it is coupled Line 41 provides a signal to the first input comprising of a signal decompression modulator circuit 43 to which it is coupled The sequenced encoded data frame signal provided on line 41 by the bandpass filter 40 is coupled to the first input comprising the signal decompression modulator circuit 43. The signal decompression modulator circuit 43 comprising of dual Phase Locked Loops (PLL) circuits such as the NE565-PLL circuit, and NE564-PLL circuit coupled with integral prescaler circuits within its feedback loop such as dual SP8629 and a SP8660 thereby providing frequency multiplication, or comprising Direct Frequency Synthesis circuits such as the SP2002, although a plurality of commercially available devices capable of performing high speed signal synthesis, such as LMX2301 may be used Within the signal decompression modulator circuit 43 the modulated signal provided from line 41 is demodulated with circuits comprising the NE565-PLL circuit using Single Frequency Keying (SFK) or circuits using Phase Shift Keying (PSK) into the original sequenced encoded data frame signal Within the signal decompression modulator circuit 43 the bandwidth of the demodulated data frame signal is decompressed using the NE564-PLL circuit with coupled integral prescaler circuits into its original bandwidth range of D = [ (2 times f maϊ ) times ( B+ C ) ], and output onto line 44 Line 44 is coupled to a computer 49 comprising a Texas Instruments TMS320C5416 or TMS320C6211 but any one of a plurality of commercially available devices capable of performing ultra-high speed machine instructions may also be used The computer 49 executes computer instructions to control, format, parallel output data sets, and input sequenced encoded data frame signals from line 44 into a first buffer device 49a The first buffer device 49a comprised within computer 49 and into which formatted data frames are placed to format data sets The buffer device 49a within computer 49 comprising of random-access memory RAM, is referred to as a "frame buffer" in which it temporarily stores data sets of information The computer 49 provides a means to parallel output data set signals onto lines 50 The parallel data set signals provided on lines 50 by the computer 49 are coupled to the input of the signal translation device 51 The signal translation device 51 comprising the Texas Instruments TLC5602 converter is used to receive digitally coded signals (00 to FF hexadecimal), and to perform signal translation of digital signals on lines 50 into a NTSC video signal output A plurality of other commercially available devices capable of performing high speed signal translation may also be used Line 52 provides a control signal between the signal translation device 51 and the computer 49 Line 52 signals are used to control the flow of signals on lines 50 to the signal translation device 51 The output of the translation device 51 is provided onto the coupled line 53 The NTSC video signal on line 53 is coupled to a television video modulator circuit input 55a The television video modulator circuit 55 comprising of a TV video modulator such as the National Semiconductor LM2889 Line 57 provides the means to couple the NTSC video signal directly to the video input line of a television receiver 58a Line 39 is coupled to a frequency selectable bandpass filter 45 and provides the signal to bandpass filter 45 to filter the undesired noise, aliasing signals, and to output the selected frequency bandwidth onto line 46 to which it is coupled. Line 46 provides a signal to the second input of a signal decompression modulator circuit 43 to which it is coupled. The sequenced encoded data frame signal provided on line 46 by the bandpass filter 45 is coupled to the second input to the signal decompression modulator circuit 43. Within the signal decompression modulator circuit 43 the modulated signal provided from line 46 is demodulated using Single Frequency Keying (SFK) or (PSK) into the original sequenced encoded data frame signal. Within the signal decompression modulator circuit 43 the bandwidth of the demodulated data frame signal is decompressed into its original bandwidth range of D = [ (2 times f maϊ ) times ( B+ C ) ], and output onto line 48. Line 48 is coupled to the computer 49. The computer 49 executes computer instructions to control, format, parallel output data sets, and input sequenced encoded data frame signals from line 48 into a second buffer device 49b. The second buffer device 49b comprised within computer 49 and into which formatted data frames are placed to format data sets. The buffer device 49b within computer 49 comprising of random-access memory RAM, referred to as a "frame buffer" in which it temporarily stores data sets of information. The computer 49 provides a means to parallel output data set signals onto lines 59. The parallel data set signals provided on lines 59 by the computer 49 are coupled to the input of the signal translation device 61. The signal translation device 61 comprising the Texas Instruments TLC5602 converter is used to receive digitally coded signals (00 to FF hexadecimal), and to perform signal translation of digital signals on lines 59 into the NTSC audio signal output. A plurality of other commercially available devices capable of performing high speed signal translation may also be used. Line 60 provides a control signal between the signal translation device 61 and the computer 49. Line 60 signals are used to control the flow of signals on lines 59 to the signal translation device 61. The output of the translation device 61 is provided onto the coupled line 62. The NTSC audio signal on line 62 is coupled to the television video modulator circuit input 55b. Line 64 provides the means to couple the NTSC audio signal directly to the audio input line of a television receiver 58b. Line 54, and line 63 provide a tapped signal source to supply signals to external devices such as computers, and recording equipment. The television video modulator circuit 55 provides a composite NTSC signal output onto the coupled line 56 that is also coupled to the antenna of television receiver 58c. The composite NTSC signal from line 56 contains both the video signal, and audio signal, and is frequency modulated onto a NTSC channel frequency. It will be known to a reader skilled in the art that the portions of the television video modulator circuit 55 just described are well known and that the items 55, and 58 are commonly practiced. The television video modulator circuit 55 description illustrates in detail one method of how decoded signals can be transmitted, and received by television signal receivers. Throughout this detailed description of the invention, an encoded NTSC signal using SCA signal transmission and reception has been used to explain the details of the invention, to illustrate the flow of signals through circuits, and to describe the various resultant signals output from these circuits. Evidently, various modifications, and changes can be made thereto without departing from the spirit and scope of the invention. The drawings presented are to be regarded in illustrative rather than restrictive sense. Alternative Embodiments: The following descriptions are alternative methods for embodiment of the invention. 1. For Fig. 1, Line la) is eliminated and not used at all. 2. For Fig. 1, Line lb) is not coupled to line lc), and input signals are directly coupled to the corresponding input lines. 3. For Fig. 1, embodiment with the filtering signal concentrator removed, having a signal output from a point on line 18 with Line 18 coupled to line 19. 4. Other modulation methods such as Time Division Multiplexing (TDM), Statistical Time Division Multiplexing (STDM), Frequency Shift Keying (FSK), Quadrature Phase Shift Modulation (QPSK), Pulse Coded Modulation (PCM), Frequency Modulation (FM), Phase Modulation (PM), Pulse Width Modulation (PWM), Pulse Position Modulation (PPM), ), Code Division Multiplexing (CDM), Amplitude Modulation (AM), Quadrature Amplitude Modulation (QAM), and Trellis-coded modulation 5 Use of an Emitter-coupled logic (ECL) Device for high speed signal translation Conclusion, Ramifications, and Scope of Invention: The reader can see the method, and apparatus of the invention provides a new and highly useful means to encode, decode, compress, decompress, record, and transmit electrical signals, audio signals, computer data signals, and Hypertext Markup Language (HTML) static, and dynamic documents The invention provides a means to encode, decode, and embed multiple signals from a variety of signal formats onto prior art signals, whereby additional functionality is created The reader can see that using the invention in combination with prior art such as broadcasting, transmission, and recording , the invention provides a method, and apparatus to transmit and receive information and signals through means that were not previously possible The above descriptions contain many specificity's, these should not be construed as limitations on the scope of the invention, but rather as an exemplification of one preferred embodiment thereof Accordingly, the scope of the invention should be determined not by the embodiment (s) illustrated, but by the appended claims and their legal equivalents

Claims: What is claimed is 1) A computer, and electronic circuit implemented method, and apparatus to encode, compress, record, and transmit, NTSC signals, audio signals, computer data signals, and Hypertext Markup Language static, and dynamic documents comprising a) executing a first set of computer instructions within said computer to control, format, and parallel data set input, and sequence data frame signals as an output b) a first, and a second translation devices coupled to perform signal translation of signals comprising NTSC signals, audio signals, computer data signals, and HTML static, and dynamic documents into a digitally coded format c) a signal compression modulator circuit coupled to the sequenced output of said computer to perform signal compression, and modulation of said encoded signals comprising NTSC signals, audio signals, computer data signals, and HTML static and dynamic documents d) a multiple-input filtering signal concentrator coupled to the output of said signal compression modulator, and to a external signal sources, and is used to combine multiple signals into one signal output, and to remove harmonics, noise and intermodulation products from its output e) a tapped output line from said signal compression modulator circuit as a means for providing encoded signals comprising NTSC signals, audio signals, and computer data signals to external devices comprising primary FM signal transmission, recording devices, and other device usage 2) A computer, and electronic circuit implemented method, and apparatus to decode, decompress, record, receive, and regenerate NTSC signals, audio signals, computer data signals, and Hypertext Markup Language static, and dynamic documents comprising a) a first, and a second selectable frequency filters, coupled to the output of said SCA decoder to remove noise, and aliasing signals, and to receive and filter components of said encoded signals comprising NTSC signals, audio signals, computer data signals, and HTML static and dynamic documents. b) a signal decompression modulator circuit coupled to the filtered SCA decoder output and to the computer serial input to perform signal decompression, and demodulation of said encoded signals comprising NTSC signals, audio signals, computer data signals, and HTML static, and dynamic documents. c) executing a first set of computer instructions within said computer to control, format, and sequence data frame signals, and parallel data set output signals. d) a first, and a second translation devices coupled to the computer sequenced output to perform signal translation of said NTSC signals, audio signals, computer data signals, and HTML static, and dynamic documents. e) a means for external source of input signals from other devices comprising CD- roms, recorded signals, and other signal generators coupled to the first, and second input filters. f) a tapped output line from said signal translation devices as a means for providing decoded signals comprising NTSC signals, audio signals, and computer data signals to external devices comprising recording devices, transmission devices and other device usage. 3) The method and apparatus defined in claim 1 wherein a data sets are stored in a buffer comprising of a computer-readable medium prior to appending a framing code, and being sequentially placed to an output. 4) The method and apparatus defined in claim 2 wherein a data frames are stored in a buffer comprising of computer-readable medium prior to removing said framing codes, and said data sets being placed to a parallel output. 5) The method and apparatus defined in claim 1 wherein continuously translated signals are sequenced continuously into a dynamic signal compression modulator for bandwidth reduction, and modulation. 6) The method and apparatus defined in claim 2 wherein encoded signals are continuously demodulated, and decompressed, and then sequenced into dynamic signal translation devices for signal decoding. 7) The method and apparatus defined in claim 1 wherein multiple encoded signals are embedded or piggy-backed onto various signal formats comprising NTSC signals, FM primary signals, and SCA signals, JPEG, HTML static, and dynamic documents, audio signals, computer data signals, and TCP/IP for transmission, reception, recording, and regeneration. 8) The methods defined in claim 1 wherein a Single Frequency Keying or Phase Shift Keying is used as a means to modulate, and demodulate encoded signals. 9) The methods defined in claim 2 wherein a Single Frequency Keying or Phase Shift Keying is used as a means to modulate, and demodulate encoded signals. 10) The methods defined in claim 1 wherein a set of computer instructions within said computer are used to control, format, frame, organize, and sequence the computer output of digital signal representations comprising encoded signals, and translated signals for providing a means of embedding the digital signal representations onto other signals. 1 1) The methods defined in claim 2 wherein a set of computer instructions within said computer are used to control, format, frame, organize, and sequence the computer output of digital signal representations comprising encoded signals, and translated signals for providing a means of embedding the digital signal representations onto other signals 12) The methods defined in claim 1 wherein a set of computer instructions within said computer are used to control, format, frame, organize, and sequence the computer output of digital signal representations comprising encoded signals, and translated signals for providing a means of signal recording, and signal transmission of the digital signal representations 13) The methods defined in claim 2 wherein a set of computer instructions within said computer are used to control, format, frame, organize, and sequence the computer output of digital signal representations comprising encoded signals, and translated signals for providing a means of signal recording, and signal transmission of the digital signal representations 14) The methods defined in claim 1 wherein a Frequency Division Multiplexing is used as a means to subdivide the available audio signal deviation bandwidth of zero to f ma χ hertz into multiple narrow bands for signal transmission, and recording 15) The method and apparatus defined in claim 1 wherein a multiple-input filtering signal concentrator comprising an operational amplifier circuit is used to mix various encoded signals comprising NTSC signals, FCC radio signals, JPEG signals, HTML documents, audio signals, computer data signals, TCP/IP signals, and are thereby transmitted through primary FM signals, through SCA signals, through plain ordinary telephone systems, through cellular telephone systems, through cable television systems, broadcast television systems, through satellite systems, and through electric power transmission lines 16) The method and apparatus defined in claim 1 wherein the output signal line 18, and line 19 of signal compression modulator circuits from one or more encoding circuits are coupled to the inputs of a multiple-input filtering signal concentrator circuit providing an output line 22 cascade coupled to the input line 3, or line 10 of the signal translation device circuits of a second encoding circuit, thereby providing a means to produce multiple encoded signals within one narrow frequency bandwidth channel. 17) The method and apparatus defined in claim 2 wherein the multiple encoded output signals on line 53, or line 62 of a signal translation device circuit comprising a first decoding circuit is cascade coupled to the input line of a selectable frequency bandpass filter circuit comprising a second decoding circuit, thereby providing a means to produce multiple decoded signals on the output line 53, and line 62 of the signal translation device circuits from the second decoding circuit 18) The method and apparatus defined in claim 1 wherein a computer has the output lines of cascaded modulus-prescaler circuits or phase locked loop circuits configured for frequency bandwidth reduction coupled to the parallel input lines of the computer, and has the output lines of signal translation devices coupled to the input lines of the cascaded modulus-prescalers, thereby providing input signals to the computer with reduced frequency bandwidth. 19) The method and apparatus defined in claim 2 wherein a computer has the input lines of signal decompression circuits comprising phase locked loop circuits configured for frequency bandwidth expansion coupled to each parallel output line of the computer, and has the input lines of signal translation devices coupled to the output lines of the signal decompression circuits, thereby providing signals to the input of signal translation devices with expanded frequency bandwidth. 20) The method and apparatus defined in claim 1 wherein a circuit comprising an emitter- coupled logic device is used to perform high speed translation of signals from a parallel input format to serial output format instead of using a computer 8. 21) The method and apparatus defined in claim 2 wherein a circuit comprising an emitter- coupled logic device is used to perform high speed translation of signals from a serial input format to a parallel output format instead of using a computer 49. 22) The method and apparatus defined in claim 1 wherein a signal compression modulator circuit comprising a modulus-prescaler circuit coupled to a circuit providing frequency keying such as a phase locked loop circuit, thereby providing a means to modulate encoded signals. 23) The method and apparatus defined in claim 2 wherein a signal decompression modulator circuit comprising a phase locked loop circuit configured for frequency keying and provides a demodulated encoded signal output to the coupled input of a phase locked loop circuit configured for frequency multiplication, thereby providing a means for frequency bandwidth expansion.

Inventors: HAWKINS ROLAND CHARLES, HAWKINS, ROLAND, CHARLES
Applicants: HAWKINS ROLAND CHARLES, HAWKINS, ROLAND, CHARLES
Application year: 2000
Main classification: H04L
IPC codes: H04H20, H04N5