Method for forming a porous silicon dioxide film

Abstract: A method for forming an interlayer insulating film is disclosed. This method comprises the steps of: forming an underlying insulating film (105) on an object (104) to be formed; and forming a porous SiO 2 film (106) on said underlying insulating film (105) by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O 3 where the O 3 is contained in the source gas with first concentration that is lower than concentration necessary for oxidizing the TEOS. Alternative method for forming an interlayer insulating film is also disclosed. This method comprises the step of: forming an underlying insulating film (305) on an object (304) to be formed; performing Cl (chlorine) plasma treatment for the underlying insulating film (305); and forming a porous SiO 2 film (306) on the underlying insulating film (305) by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O 3 .

Description: BACKGROUND OF THE INVENTION The present invention relates to a method for forming an interlayer insulating film and, more particularly, to a method for forming an interlayer insulating film having a low dielectric constant, which is necessary for a highly-integrated semiconductor device. A progress in high integration regarding the semiconductor device in recent years has resulted in a narrower interval between wiring lines. As the narrowed interval between the wiring lines causes an increase in capacitance between the wiring lines, a request has been made for formation of an interlayer insulating film, which has a low dielectric constant. With recent progresses in high integration of an LSI device, the wiring line has been micronized and multilayered. There has also been an increase in capacitance between the wiring lines. Such an increase in capacitance has caused a great reduction in an operating speed. Thus, improvement in this regard has been strongly demanded. As one of improvement measures, a method for reducing capacitance between the wiring lines has been studied. This method uses an interlayer insulating film, which has a dielectric constant lower than that of SiO 2 currently used for an interlayer insulating film. Typical interlayer insulating films of low dielectric constants currently under study are 1 ○ an SiOF film, and 2 ○ an organic insulating film of a low dielectric constant. Description will now be made of these films. 1 ○ SiOF Film An SiOF film is formed by using source gas containing F and substituting Si-F bond for a portion of Si-O bond in SiO 2 . This SiOF film has a relative dielectric constant, which is monotonically reduced as concentration of F in the film increases. For forming such SiOF films, several methods have been reported (see p.82 of monthly periodical "Semiconductor World", February issue of 1996). Most promising among these methods is one for forming an SiOF film by using SiH 4 , O 2 , Ar and SiF 4 as source gases, and by a high-density plasma enhanced CVD method (HDPCVD method). A relative dielectric constant of an SiOF film formed by this method is in a range of 3.1 to 4.0 (varies depending on F concentration in the film). This value is lower than a relative dielectric constant 4.0 of SiO 2 , which has conventionally been used for the interlayer insulating film. 2 ○ Organic Insulating Film of Low Dielectric Constant As an insulating film which has a lower dielectric constant (3.0 or lower) compared with the SiOF film, an organic insulating film of a low dielectric constant is now a focus of attention. Table 1 shows a few organic insulating films of low dielectric constants, which have been reported, and respective relative dielectric constants and thermal decomposition temperatures thereof. Organic Insulating Film Relative Dielectric Constant Thermal Decomposition Temperature (°C) Note Flourine-containing resin 2.4 420 p.82 of monthly periodical "Semiconductor World", February issue of 1997 Cytop 2.1 400 p. 90 of monthly periodical "Semiconductor World", February issue of 1996 Amorphous telon 1.9 400 p. 91 of monthly periodical "Semiconductor World", February issue of 1996 However, the SiOF film is disadvantageous in that an increase in concentration of F in the film leads to a reduction in moisture absorption resistance. The reduced moisture absorption resistance poses a serious problem, because a transistor characteristic and adhesion of an upper barrier metal layer are affected. Peeling-off easily occurs in the organic insulating film of a low dielectric constant, because of bad adhesion with a silicon wafer or the SiO 2 film. Furthermore, the organic insulating film is disadvantageous in that heat resistivity is low since a thermal decomposition temperature is around 400 °C. The disadvantage of low heat resistivity poses a problem for annealing a wafer at a high temperature. EP-A-O 435 161 discloses a process for producing a semiconductor device, deposition of a CVD-SiO 2 film at a given first O 3 concentration according to a TEOS-O 3 reaction, which is followed by further deposition of a CVD-SiO 2 film at a second O 3 concentration higher than the first O 3 concentration according to the TEOS-O 3 reaction to form a CVD-SiO 2 film having a predetermined thickness and a surface little uneven. US-5, 614,270 discloses a SiO 2 layer grown by liquid phase deposition, which is subjected to an oxygen or hydrogen plasma treatment to enhance the physical and electrical properties thereof. SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for forming an interlayer insulating film of a low dielectric constant as defined in claim 1, which has good moisture absorption resistance and heat resistivity. In accordance with the method of the invention for forming an interlayer insulating film, first, porous SiO 2 film is formed on an object to be formed. This porous SiO 2 film is formed by using a Chemical Vapor Deposition method which employs source gases containing TEOS (tetraethoxy Silane) and O 3 , where the concentration of the 03 is lower than that necessary for oxidizing the TEOS. Accordingly, many voids are formed in the film. In other words, porosity is provided for the SiO 2 film foxmed in this manner. Therefore, a dielectric constant of the porous SiO 2 film is smaller than that of a usual SiO 2 film having no porosity. The method for forming the foregoing porous SiO 2 film is applied to a damascene process. According to the damascene process, a Cu (copper) wiring layer having small electric resistance can be formed. By combining the Cu (copper) wiring layer with the foregoing porous SiO 2 film, it is possible to provide a semiconductor device where a parasitic capacitance of a wiring line is small, and a data processing speed is fast. Fourthly, in accordance with the method of the present invention for forming an interlayer insulating film, after formation of the foregoing porous SiO 2 film, H (hydrogen) plasma treatment is performed. Accordingly, an Si-H bond is substituted for a dangling bond of Si in an Si-O bond in the surface of the void, and the surface of the void can be made stable. Therefore, incursion of moisture from the surface of the void can be prevented, and it is possible to form an interlayer insulating film which has good moisture absorption resistance. BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1A to 1G are cross-sectional views, each of which shows a method for forming an interlayer insulating film according to a first embodiment of the present invention; FIGS. 2A to 2L are cross-sectional views, each of which shows a method for forming an interlayer insulating film according to a second embodiment of the invention; DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, description will be made of the preferred embodiments of the present invention with reference to the accompanying drawings. (First Embodiment for illustration purposes only) FIGS. 1A to 1G are cross-sectional views, each of which illustrates a first embodiment of the present invention. First, as shown in FIG. 1A, a BPSG (borophosphosilicate glass) film 102 is formed on a silicon substrate 101. Then, after an aluminum film is formed on the BPSG film 102, an aluminum wiring layer 103 is formed by patterning the aluminum film. The silicon substrate 101, the BPSG film 102 and the aluminum wiring layer 103 formed in this manner constitute an object 104 to be formed. Then, as shown in FIG. 1B, an SiO 2 film 105 (underlying insulating film) is formed on the object 104 to be formed. This SiO 2 film 105 is formed by a plasma enhanced CVD method (plasma enhanced Chemical Vapor Deposition method), and SiH 4 and N 2 O are used as source gases. A film thickness of this SiO 2 film 105 is 100 nm. Subsequently, as shown in FIG. 1C, a porous SiO 2 film 106 is formed on the SiO 2 film 105 (underlying insulating film). This porous SiO 2 film 106 is formed by an atmospheric CVD method (atmospheric Chemical Vapor Deposition method). TEOS (tetraethoxy silane), O 3 of low concentration, and O 2 are contained in the source gas for the CVD method. Here, the O 3 of low concentration is defined as the O 3 having concentration that is lower than that necessary for oxidizing the TEOS. Specifically, the flow rate of the TEOS is 25 sccm and that of O 2 is 7.5 slm. And O 3 of 1 ∼ 2 % by flow rate ratio is contained in the O 2 . Furthermore, N 2 (nitrogen) with flow rate 1∼3 slm is also contained in the source gas. And the temperature of the silicon substrate 101 is maintained at 400 °C during the formation of SiO 2 film 106. Generally, in the case of the atmospheric CVD method which uses TEOS and O 3 as source gases, the following has been discovered for an SiO 2 film thereby formed. That is, as concentration of O 3 in the source gas is increased, oxidation of TEOS progresses faster on a wafer to form an SiO 2 film having flowability. Conversely, as concentration of O 3 is decreased, oxidation of TEOS is insufficient. Accordingly, if concentration of O 3 is low, many CH or OH radicals are left in an SiO 2 film formed on the wafer. Especially, if an underlying film is an SiO 2 film, an abnormal growth of an SiO 2 film having a rough surface occurs by employing O 3 of low concentration and TEOS. The porous SiO 2 film 106 is formed by utilizing the aforementioned abnormal growth of the SiO 2 film, and many voids are formed in the film. Then, as shown in FIG. 1D, H (hydrogen) plasma treatment is performed for the porous SiO 2 film 106. This H plasma treatment is performed by supplying H 2 of 600 scan to a chamber (not shown) and applying RF power to upper and lower electrodes (not shown) that is opposing each other in the chamber. And the RF power applied to the upper electrode has frequency of 13.56 MHz and power of 50 W. On the other hand, the RF power applied to the lower electrode has frequency of 400 kHz and power of 400W. Further, during undergoing the H plasma treatment , the pressure in the chamber is 0.1∼0.2 Torr and the temperature of the silicon substrate 101 is maintained at 400 °C. Still further, the time for the H plasma treatment is 60 sec. The H plasma treatment substitutes Si-H bonds for dangling bonds of Si in an Si-O bond in the surface of the void. Therefore, OH radicals and water are made to be hard to bond to the dangling bonds of Si, which improves the moisture absorption resistance of the film. Then, as shown in FIG. 1E, an SiO 2 film 107 is formed on the porous SiO 2 film 106. This SiO 2 film 107 is formed by an atmospheric CVD method, for which the source gas containing O 2 , O 3 , and TEOS are used. At this time, a flow rate of TEOS is 25 scan and that of O 2 is 7.5 slm. Further, O 2 contains O 3 of 5∼ 6 % by flow rate ratio, which is sufficient for oxidizing the TEOS. Accordingly, as described above, the SiO 2 film 107 has flowability. Thus, even if the SiO 2 film 106 formed below has convexity and concavity in the surface, the SiO 2 film 107 is formed to have a nearly smooth surface shape, and self-planarizing is carried out. Furthermore, N 2 (nitrogen) with flow rate 1∼3 is also contained in the source gas. And the temperature of the silicon substrate 101 is maintained at 400 °C during the formation of SiO 2 film 107. Subsequently, as shown in FIG. 1F, the SiO 2 film 107 and the porous SiO 2 film 106 formed above a convexity 103a of the aluminum wiring layer are polished to be planarized by a CMP method (Chemical Mechanical Polishing method). After completing the polishing, the SiO 2 film 105 (underlying insulating film) formed on the convexity 103a of the aluminum wiring layer and the porous SiO 2 film 106 formed in a concavity 103b of the same are exposed on the surfaces. Then, as shown in FIG. 1G, an SiO 2 film 108 (cover insulating film) is formed on the SiO 2 film 105 (underlying insulating film) formed on the convexity 103a of the aluminum wiring layer and on the porous SiO 2 film 106 formed in the concavity 103b of the same. This SiO 2 film 108 is formed by the plasma enhanced CVD method. Sources gases used at this time are SiH 4 and N 2 O, and a film thickness of the SiO 2 film 108 is 100 nm. The foregoing process of forming the SiO 2 films 105 (underlying insulating film), 106 and 108 (cover insulating film) results in formation, on the object 104 to be formed, of an interlayer insulating film of a low dielectric constant, which has good heat resistivity and moisture absorption resistance. That is, the SiO 2 film 106 has porosity, a dielectric constant thereof is 2.0 to 3.0. This value is smaller than a dielectric constant 4.0 of a usual SiO 2 film. Also, since the usual SiO 2 film 108 is formed on the porous SiO 2 film 106 , incursion of moisture into the SiO 2 film 106 can be prevented. Further, the H plasma treatment for the SiO 2 film 106 can improve the moisture absorption resistance of the film 106. Still further, the SiO 2 films 105, 106 and 108 have better heat resistivity compared to the organic insulating film of the prior art, because these films consist mainly of Si and O. (Second Embodiment) FIGS. 2A to 2L are cross-sectional views, each of which illustrates a second embodiment. The second embodiment is a case of applying the first embodiment to a damascene process. First, as shown in FIG. 2A, a BPSG (borophosphosilicate glass) film 202 is formed on a silicon substrate 201. After an aluminum layer is formed on the BPSG film 202 , an aluminum wiring layer 203 is formed by patterning the aluminum layer. Then, the silicon substrate 201, the BPSG film 202 and the aluminum wiring layer 203 constitute an object 204 to be formed. Subsequently, as shown in FIG. 2B, an SiO 2 film 205 (underlying insulating film) having a film thickness of 100 nm is formed on the aluminum wiring layer 203. This SiO 2 film 205 is formed by a plasma enhanced CVD method (plasma enhanced Chemical Vapor Deposition method), and SiH 4 and N 2 O are used as source gases. Then, as shown in FIG. 2C, an SiO 2 film 206 having a film thickness of 500 nm is formed on the SiO 2 film 205 (underlying insulating film). This SiO 2 film 206 is formed by an atmospheric CVD method (atmospheric Chemical Vapor Deposition method) for which the source gas containing O 2 , O 3 of low concentration, and TEOS (tetraethoxy silane) are used. Here, the O 3 of low concentration is defined as the O 3 having concentration that is lower than that necessary for oxidizing the TEOS. Specifically, the flow rate of the TEOS is 25 scan and that of O 2 is 7.5 slm. And O 3 of 1∼2 % by flow late ratio is contained in the O 2 . As described above in the first embodiment, since O 3 of low concentration is used, the SiO 2 film 206 is provided with porosity. Therefore, many voids are formed in the SiO 2 film 206. It should be noted that N 2 (nitrogen) with flow rate 1∼3 slm is also contained in the source gas. And the temperature of the silicon substrate 201 is maintained at 400 °C during the formation of SiO 2 film 206. Subsequently, as shown in FIG. 2D, H (hydrogen) plasma treatment is performed for the SiO 2 film 206. The process condition for the H plasma treatment is the same as explained in the first embodiment. Namely, it is performed by supplying H 2 of 600 scan to a chamber (not shown) and applying RF power to upper and lower electrodes (not shown) that is opposing each other in the chamber. And the RF power applied to the upper electrode has frequency of 13.56 MHz and power of 50 W. On the other hand, the RF power applied to the lower electrode has frequency of 400 kHz and power of 400 W. Further, during undergoing the H plasma treatment, the pressure in the chamber is 0.1∼0.2 Torr and the temperature of the silicon substrate 201 is maintained at 400 °C. Still further, the time for the H plasma treatment is 60 sec. The H plasma treatment substitutes Si-H bonds for dangling bonds of Si in an Si-O bond in the surface of the void. Therefore, OH radicals and water are made to be hard to bond to the dangling bonds of Si, which improves the moisture absorption resistance of the film. Subsequently, as shown in FIG. 2E, patterning is performed for the SiO 2 film 205 and 206 to form a damascene trench 207. This damascene trench 207 reaches the aluminum wiring layer 203 formed below the SiO 2 film 206. Then, as shown in FIG. 2F, an SiO 2 film 208 (second insulating film) is formed on the SiO 2 film 206 and on the side and bottom portions of the damascene trench 207. This SiO 2 film 208 is formed by a plasma enhanced CVD method, and SiH 4 and N 2 O are used as source gases. By the SiO 2 film 208 formed on the side portion of the damascene trench 207, Cu buried later in the damascene trench 207 can be prevented from being dispersed inside the porous SiO 2 film 206. Then, as shown in FIG. 2G, anisotropic etching is performed for the SiO 2 film 208 (second insulating film). While this etching eliminates the SiO 2 film 208 formed on the bottom portion of the damascene trench 207, the SiO 2 film 208 formed on the side portion of the damascene trench 207 is not eliminated in this etching. The remaining SiO 2 film 208 constitutes a sidewall insulating film on the side portion of the damascene trench 207. Subsequently, as shown in FIG. 2H, a Cu (copper)-plated film 209 is formed in the damascene trench 207 and on the SiO 2 film 206. The Cu-plated film 209 formed in the damascene trench 207 is used as a Cu wiring line. Then, as shown in FIG. 21, the Cu-plated film 209 formed on the SiO 2 film 206 is polished and eliminated by a CMP method (Chemical Mechanical Polishing method) . Accordingly, the Cu-plated film remains only in the damascene trench 207. Subsequently, as shown in FIG. 2J, a barrier metal TiN film 210 is formed above the damascene trench 207. Accordingly, Cu in the damascene trench 207 can be prevented from being dispersed in an SiO 2 film formed later above the damascene trench 207. Then, as shown in FIG. 2K, patterning is performed to leave a TiN film 210a formed above the damascene trench 207, and the TiN film 210 formed in the other portions is etched to be eliminated. Subsequently, as shown in FIG. 2L, an SiO 2 film 211 (cover insulating film) is formed on the SiO 2 film 206 and the TiN film 210a. This SiO 2 film 211 is formed by a plasma enhanced CVD method, and SiH 4 and N 2 O are used as source gases. The foregoing process results in formation, on the object 204 to be formed, of an interlayer insulating film of a low dielectric constant, which has good heat resistivity and moisture absorption resistance. That is, the SiO 2 film 206 has porosity, and a dielectric constant thereof is 2.0 to 3.0. This value is smaller than a dielectric constant 4.0 of a usual SiO 2 film. Also, since the usual SiO 2 film 211 (cover insulating film) is formed on the porous SiO 2 film 206, incursion of moisture into the SiO 2 film 206 can be prevented. Further, the H plasma treatment for the SiO 2 film 206 can improve the moisture absorption resistance of the film 206. Still further, the SiO 2 films 206 and 211 have better heat resistivity compared to the organic insulating film of the prior art, because these films consist mainly of Si and O.

Claims: A method for forming an interlayer insulating film, comprising the steps of: forming a porous SiO 2 film (206) on an object (204) to be formed by a Chemical Vapor Deposition that employs a source gas containing TEOS (tetraethoxy silane) and O 3 where the O 3 is contained in the source gas with a concentration of 1 ∼ 2 % by flow rate in the O 2 , which concentration is lower than concentration necessary for oxidizing the TEOS; forming a damascene trench (207) in said porous SiO 2 film (206) where the damascene trench (207) reaches said object (204) to be formed; farming a side wall insulating film on a side portion of said damascene trench (207); burying a metallic film (209) in said damascene trench (207); and forming a barrier metal film (210a) on said metallic film (209). A method according to one of claim 1, further comprising the steps of : forming an underlying insulating film (105, 205) on the object (104, 204) before forming the porous SiO 2 film (106, 206); and forming the porous SiO 2 film (106, 206) on the underlying insulating film (105, 205). A method according to claim 1, further comprising the step of: polishing a surface of the SiO 2 film (107) by a CMP method to planarize the surface. A method according to any one of claims 1 to 3, further comprising a step of: forming a cover insulating film (211) on the porous SiO 2 film (206) and the barrier metal film (210a) after formation of the barrier metal (210a). A method according to any one of claims 1 to 4 further comprising a step of: performing a hydrogen plasma treatment for the porous SiO 2 film (106, 206) after formation of the porous SiO 2 film (106, 206). A method according to any one of claims 1 to 5, wherein the object (104) includes a silicon substrate (101, 201).

Inventors: MAEDA KAZUO, MAEDA, KAZUO
Applicants: CANON SALES CO INC, SEMICONDUCTOR PROCESS LAB CO, CANON SALES CO., INC., SEMICONDUCTOR PROCESS LABORATORY CO., LTD.
Application year: 2000
Main classification: H01L21
IPC codes: C23C16, H01L21, H01L23