UNINTERRUPTIBLE POWER SUPPLIES WITH DUAL-SOURCING CAPABILITY AND METHODS OF OPERATION THEREOF

Abstract: An uninterruptible power supply (UPS) includes an AC power source (10), DC powersource (460) and a load (20). A rectifier circuit (410) is operative to selectively couple the AC source port to first (402a) and second (402b) voltage busses through a first inductance (L1). An inverter circuit (420) is operative to selectively couple the load port to the first and second voltage busses through a second inductance (12). A bidirectional DC source coupling circuit (430) is operative to couple the DC source to the first and second voltage busses to provide bidirectional power transfer therebetween, preferably such that a voltage at the DC source port is maintained in a substantially fixed proportion to first and second DC voltage at respective ones of the first and second voltage busses. The bidirectional DC source coupling circuit includes a tranformer (T1) having first and second inductively coupled windings (La, Lb), the first winding having a center tap coupled to the neutral bus. A switching circuit is operatively coupled the first winding to the first and second voltage busses. A rectifying circuit couples the first winding to the first and second voltage busses. A bidirectional DC-AC converter circuit is coupled between the second winding and the DC source port.

Description: UNINTERRUPTIBLE POWER SUPPLIES WITH DUAL-SOURCING CAPABILITY AND METHODS OF OPERATION THEREOF Reference to Parent Application The present application is a continuation-in-part of United States Patent Application Serial No. 09/374,180, filed August 13, 1999, the disclosure of which is herein incorporated by reference in its entirety. Field Of The Invention The present invention relates to electrical power devices and methods of operation thereof, and more particularly, to uninterruptible power supplies (UPSs) and methods of operation thereof. Background Of The Invention Uninterruptible power supplies (UPSs) are power conversion devices that are commonly used to provide conditioned, reliable power for computer networks, telecommunications networks, medical equipment and the like. UPSs are widely used with computers and similar computing devices, including but not limited to personal computers, workstations, mini computers, network servers, disk arrays and mainframe computers, to insure that valuable data is not lost and that the device can continue to operate notwithstanding temporary loss of an AC utility source. UPSs typically provide power to such electronic equipment from a secondary source, such as a battery, in the event that a primary alternating current (AC) utility source drops out (blackout) or fails to provide a proper voltage (brownout). Conventional UPSs may be classified into categories. Referring to Fig. 1 , a typical off-line UPS disconnects a load from a primary AC source 10 when the primary AC source fails or is operating in a degraded manner, allowing the load to be served from a secondary source such as a battery. The AC power source 10 is connected in series with a switch Si, producing an AC voltage across a load 20 when the switch S| is closed. Energy storage is typically provided in the form of a storage capacitor C s . The secondary power source, here a battery B, is connected to the load 20 via a low voltage converter 30 and a transformer T. When the AC power source 10 fails, the switch Si is opened, causing the load to draw power from the battery B. The low voltage converter 30 typically is an inverter that produces a quasi-square wave or sine wave voltage on a first winding Li of the transformer T from a DC voltage produced by the battery B. The first winding Li is coupled to a second winding L 2 of the transformer T connected across the load 20. When the AC power source is operational, i.e., when the switch Si is closed, the battery B may be charged using the low-voltage converter 30 or a separate battery charger circuit (not shown). A line interactive (LIA) UPS topology is illustrated in Fig. 2. Here, the transformer T has a third winding L 3 that may be connected in series with the load 20 using switches S 2 , S 3 to "buck" or "boost" the voltage applied to the load 20. As with the offline UPS topology of Fig. 1, when the AC power source 10 fails, the switch Si can be opened to allow the load 20 to run off the battery B. As illustrated in Fig. 3, a typical on-line UPS includes a rectifier 40 that receives an AC voltage from an AC power source 10, producing a DC voltage across a storage capacitor C s at an intermediate node 45. An inverter 50 is connected between the intermediate node 45, and is operative to produce an AC voltage across a load 20 from the DC voltage. As shown, a battery B is connected to the intermediate node 45 via a DC/DC converter 60, supplying auxiliary power. Alternatively, the DC/DC converter can be eliminated and a high-voltage battery (not shown) connected directly to the intermediate node 45. Each of these topologies may have disadvantages. For example, typical conventional on-line and LIA UPSs for 60 Hz applications use 60 Hz magnetic components (e.g., transformers and inductors) that are sized for such frequencies, and thus may be large, heavy and expensive. LIA UPSs often exhibit step voltage changes that can affect the performance of the load. Conventional off-line, LIA and on-line UPSs often use large storage capacitors, which tend to be bulky and expensive, in order to maintain an acceptable output voltage under heavy loading conditions. Moreover, because conventional UPSs are typically designed to operate in only one of the above-described off-line, LIA or on-line modes, sellers of UPSs may be required to maintain large inventories including several different types of UPSs in order to meet a variety of different customer applications. SL Summary of the Invention In light of the foregoing, it is an object of the present invention to provide improved uninterruptible power supplies (UPSs) It is another object of the present invention to provide UPSs that can be operated in a number of different modes. It is yet another object of the present invention to provide UPSs that can utilize smaller magnetic components and storage capacitors. These and other objects, features and advantages may be provided according to the present invention by UPSs which include a vaπable-boost rectifier circuit that selectively couples and AC source port to first and second voltage busses, a vaπable- buck inverter circuit that selectively couples the first and second voltage busses to a load port, and a bidirectional DC source coupling circuit that couples the first and second voltage busses to a DC power source, such as a battery, to provide bidirectional power transfer between the DC power source and the first and second voltage busses Preferably, the DC source coupling circuit provides inductive bidirectional power transfer between a DC source port at which the DC power source may be connected and the first and second voltage busses such that voltages at the first and second voltage busses and a voltage at the DC source port are maintained m a substantially fixed proportion to one another The bidirectional DC source coupling circuit can enable the DC source to either receive current when needed (e g , when the DC source requires charging) or provide current when needed (e g , when the vaπable-boost rectifier is unable to provide sufficient current to maintain a nominal voltage at the load port) According to an aspect of the present invention, power provided from the DC source can be combined with power from the AC source to provide a supplemented mode of operation that may be particularly advantageous for extending battery capacity duπng brownout conditions A control circuit may control the rectifier circuit, the inverter circuit and the DC source coupling circuit such that power is transferred to the load port pnmaπly from the AC source until power demand at the load port causes a current at the AC source port to reach a current limit When the power demand at the load port further increases, increasing power is transferred from the DC source port to the load port The rectifier and inverter circuits can also be controlled to provide charging of a battery at the DC source port through the DC source coupling circuit, while concurrently maintaining a nominal voltage at the load port. In particular, according to one embodiment of the present invention, an uninterruptible power supply (UPS) includes an AC source port configured to connect to an AC power source and a load port configured to connect to a load. A rectifier circuit is operative to selectively couple the AC source port to first and second voltage busses through a first inductance. An inverter circuit is operative to selectively couple the load port to the first and second voltage busses through a second inductance. A bidirectional DC source coupling circuit is operative to couple a DC power source to the first and second voltage busses to provide bidirectional power transfer therebetween. Preferably, the DC source coupling circuit provides inductive power transfer between a DC source port (at which a DC power source may be connected) and the first and second voltage busses such that a voltage at the DC source port is maintained in a substantially fixed proportion to first and second DC voltages at respective ones of the first and second voltage busses. According an embodiment of the present invention, the UPS includes a control circuit operative to generate a rectifier control signal and an inverter control signal responsive to at least a load voltage at the load port. The rectifier circuit is responsive to the rectifier control signal to control coupling of the AC source port to the first and second voltage busses. The inverter circuit is responsive to the inverter control signal to control coupling of the load port to the first and second voltage busses. According to another embodiment of the present invention, the AC source port includes a phase bus and a neutral bus, and the bidirectional DC source coupling circuit includes a balancer circuit coupled between the first and second voltage busses and operative to selectively couple the first and second voltage busses to the neutral bus through a transformer responsive to a balancer control signal. The control circuit is operative to generate the balancer control signal such that the first and second DC voltages are constrained to have substantially equal magnitudes. According to yet another aspect of the present invention, the control circuit is responsive to the voltage at the load port to control the rectifier circuit and the inverter circuit such that current at the AC source port varies up to a current limit to maintain the load voltage at the nominal voltage. When the current at the AC source port reaches the current limit, power may be transferred to the load port from both the AC source port and the DC source port to maintain the load terminal at the nominal 1 voltage. The control circuit may further be operative to limit the current at the AC source port. In one embodiment of the present invention, the rectifier circuit includes a first inductor having a first terminal coupled to the phase bus. A first switch is responsive to a first switch control signal to couple and decouple a second terminal of the first inductor and the first voltage bus, and a second switch is responsive to a second switch control signal to couple and decouple the second terminal of the first inductor and the second voltage bus. The inverter circuit includes a second inductor having a first terminal coupled to the load bus. A third switch is responsive to a third switch control signal to couple and decouple a second terminal of the second inductor and the first voltage bus. A fourth switch is responsive to a fourth switch control circuit to couple and decouple the second terminal of the second inductor and the second voltage bus. The control circuit is operative to generate the first, second, third and fourth switch control signals responsive to at least the load voltage at the load port. According to yet another aspect of the present invention, the bidirectional DC source coupling circuit includes a transformer having first and second inductively coupled windings, the first winding having first and second end taps, and a center tap coupled to the neutral bus. A switching circuit is operative to selectively couple the first end tap of the first winding to the first and second voltage busses. A rectifying circuit couples the second end tap of the first winding to the first and second voltage busses. A bidirectional DC-AC converter circuit is coupled between the second winding and the DC source port. The DC-AC converter circuit preferably includes a full bridge switching circuit that selectively couples first and second terminals of the DC source port to first and second taps of the second winding of the transformer. In another embodiment of the present invention, a UPS includes an AC source port configured to connect to an AC power source, the AC source port including a phase bus and a neutral bus. A DC source port is configured to connect to a DC power source. A load port is configured to connect to a load, and includes a load bus and the neutral bus. A first switching circuit is operative to selectively couple the phase bus to first and second voltage busses through a first inductance. A second switching circuit is operative to selectively couple the load bus to the first and second voltage busses through a second inductance. A transformer includes first and second inductively coupled windings, the first winding including a center tap coupled to the s ~ neutral bus. A third switching circuit is operative to selectively couple the first and second voltage busses to a first end tap of the first winding. A rectifying circuit is operative to rectifyingly couple a second end tap of the first winding to the first and second voltage busses. A DC- AC converter circuit is operative to selectively couple the DC source port to the second winding. According to method aspects of the present invention, power is selectively transferred power to a load from an AC source and a DC source. The AC source is selectively coupled to first and second voltage busses through a first inductance. The load is selectively coupled to the first and second voltage busses through a second inductance. The DC source is coupled to the first and second voltage busses to provide bidirectional power transfer between the DC source and the first and second voltage busses. Preferably, power is inductively transferred between the DC source and the first and second voltage busses to maintain a voltage at the DC source in a substantially fixed proportion to first and second DC voltages at respective ones of the first and second voltage busses. The first and second voltage busses are preferably selectively coupled to a neutral bus through a transformer such that the first and second DC voltages are constrained to have substantially equal magnitudes. According to one method aspect, the AC source port is selectively coupled to the first and second voltage busses such that current at the AC source varies up to a current limit to maintain the load voltage at the nominal voltage. When the current at the AC source port reaches the current limit and the voltage, power is transferred to the load port from both the AC source and the DC source to maintain the load voltage at the nominal voltage. Improved UPSs and methods of operation thereof may thereby be provided. Brief Description of the Drawings Figs. 1-3 are schematic diagrams of conventional uninterruptible power supplies (UPSs). Figs. 4-5 are schematic diagrams illustrating UPSs according to embodiments of the present invention. Fig. 6 is a schematic diagram illustrating a DC-AC converter circuit according to an embodiment of the present invention. Fig. 7 illustrates exemplary transistor switching patterns for the embodiments of Figs. 4 and 9. Figs. 8 and 9A-9C are waveform diagrams illustrating further exemplary operations of the UPS of Fig. 4. Fig. 10 is a schematic diagram illustrating a UPS according to another embodiment of the present invention. Detailed Description of Preferred Embodiments The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, like numbers refer to like elements. Fig. 4 is a schematic diagram illustrating an uninterruptible power supply (UPS) 400 according to an embodiment of the present invention. The UPS 400 includes a variable-boost rectifier circuit 410 that is configured to connect to an AC power source 10 at an AC source port 401. The variable-boost rectifier circuit 410 is operative to selectively couple a phase bus 401a of the AC source port 401 to first and second voltage busses voltage busses 402a, 402b via a first inductor Li, responsive to first and second switch control signals SWi, SW 2 generated by a control circuit 440 applied to first and second switching transistors Qi, Q 2 . The first and second voltage busses 402a, 402b are coupled to a neutral bus N by first and second capacitors Ci, C 2 . The UPS 400 further includes a variable-buck inverter circuit 420 that is operative to selectively couple the first and second voltage busses 402a, 402b to a load bus 403a of a load port 403 at which a load 20 is connected (here shown as including capacitance C L and generalized impedance Z L ) via a second inductor L 2 , responsive to third and fourth switch control signals SW 3 , SW 4 generated by the control circuit 440 and applied to third and fourth switching transistors Q 3 , Q . The UPS 400 also includes a DC source coupling circuit 430 that is operative to provide bidirectional power transfer between the first and second voltage busses 402a, 402b and a DC source port 431, here shown connected to a battery 460. The DC source coupling circuit 430 includes a balancer circuit 432 including switching transistors Q 5 , Q 6 that are responsive to fifth and sixth switch control signals SW 5 , SW ό generated by the control circuit 440. The balancer circuit 432 is operative to control the relative magnitudes of first and second DC voltages " V0, V 2 at the first and second voltage busses 402a, 402b based on the relative duty cycles at which the fifth and sixth transistors Qs, Qβ are operated, as descπbed in the aforementioned incorporated United States Patent Application Seπal Number 09/374,180. The DC source coupling circuit 430 also includes a transformer Ti having first and second inductively coupled windings L a , L b . A center tap of the first winding L a is connected to the neutral bus N A first end tap of the first winding L a is coupled to the switching transistors Q 5 , Q 6 of the balancer circuit 432 A second end tap of the first winding L a is connected to a rectifying circuit 434 including respective diodes Dl, D2 that connect the second end tap to respective ones of the first and second voltage busses 402a, 402b A bidirectional DC-AC converter circuit 436 is coupled between the DC source port 431 and the second winding L b It will be appreciated that the embodiment of Fig 4 represents an exemplary implementation, and that other circuit implementations fall within the scope of the present invention. For example, the switching functions of the transistors Qi, Q 2 , Q 3 , Q<» > Qs, Qό may be provided by a vaπety of switching devices including, but not limited to, bipolar transistors, field-effect transistors (FETs), metal oxide semiconductor FETs (MOSFETs), gate turn-on devices (GTOs), and the like The control circuit 440 may include vaπety of different components as well, and preferably includes components suitable for controlling the particular type(s) of switching devices used The functions of the rectifying circuit 434 may be achieved using transistor or other switching devices instead of the diodes Di, D 2 Fig 5 illustrates an exemplary implementation of the control circuit 440 of Fig 4 State inputs, including, for example, representations of the voltage V LOAD at the load port 403 and current I A c at the AC source port 401, are received by an analog to digital (A/D) converter 442 For example, the representation of the AC input current I^c rnay be generated using a current sensing device such as a current transformer (CT) (not shown), and the load voltage V LOAD rnay be obtained directly, or. more preferably, via buffeπng circuitry (not shown) that scales the load voltage V] OAD to a lower level suitable for input into the A/D converter 442 The A/D converter 442 samples and converts the state inputs into digital form for transmission to a microprocessor 444 or other computing device The microprocessor 444 implements a control algorithm based on the state inputs, producing digital dπver command signals that are applied to a dπver circuit 446 that produces the switch control signals SW,, SW 2 , SW 3 , SW 4 , SW 5 , SW 6 It will be appreciated that the control circuit 440 illustrated in Fig 5 is provided for illustrative purposes, and that a vaπety of other implementations may be used within the scope of the present invention For example, the dπver circuit 446 may include any of a vaπety of components, preferably components suitable for controlling the particular type(s) of switching devices used in the rectifier, inverter and balancer circuits 410, 420, 432 Functions of the control circuit 440 may be implemented in a number of different ways within the scope of the present invention For example, functions of the microprocessor 444 may be implemented using discrete logic circuits or programmable logic circuits such as programmable logic devices (PLDs) instead or in conjunction with a microcontroller, microprocessor or similar device Functions of the A D converter 442, the microprocessor 444 and the dπver circuit 446 may also be combined in one or more devices, such as an apphcation- specific integrated circuit (ASIC), special purpose microcontroller, or a hybπd microcircuit Still referπng to Fig 4, the control circuit 440 preferably is operative to control the inverter circuit 420 such that current can flow from the first and second voltage busses 402a, 402b to the load 20 or vice versa, thus making the inverter circuit 420 operate as a four-quadrant converter The control circuit 440 also preferably controls the rectifier circuit 410 such that is has similar four-quadrant operational characteπstics, except that different pulse-width modulation (PWM) patterns preferably are applied to the switching transistors Qi, Q of the rectifier circuit 410 than those applied to the switching transistors Q 3 , Q of the inverter circuit 420 The PWM patterns employed for the inverter circuit 420 preferably produce a voltage controlled, current limited output voltage, while the PWM patterns employed for the rectifier circuit 410 preferably provide a controlled current to and from the AC power source 10 The rectifier circuit 410 can be operated such that a current is produced that causes power flow into the UPS 400 from the AC power source 10, or such that a current is produced that causes power flow into the AC power source 10 from the UPS 400 The control circuit 440 preferably controls the balancer circuit 432 in a manner that constrains the magnitudes of first and second DC voltages V] , V 2 on the first and second voltaee busses 402a. 402b to be substantially equal This is achieved 1 by controlling respective first and second rates (e.g., duty cycles) at which the neutral bus N is connected to respective ones of the first and second voltage busses 402a, 402b through a portion of the first winding L a . Specifically, for the embodiment illustrated in Fig. 4, the switching transistors Q 5 , Qβ of the balancer circuit 432 are preferably operated at respective complementary 50% duty cycles, such that the first and second DC voltages Vi, V 2 are constrained to be substantially equal in magnitude. Fig. 6 illustrates an exemplary DC-AC converter circuit 436. A storage capacitor Cs is connected across the battery 460. Four switching transistors Q a , Q b , Q c , Q d are connected in a full bridge configuration between the second transformer winding L b and the battery 460. The transistors Q a , Q b , Q c , Q d are controlled by switch control signals SW a , SW b , SW C , SW d which may also be generated by the control circuit 440 of Fig. 4. Although the switch control signals SW a , SW b , SW C , SW d rnay be generated based on a variety of state inputs, such as a sensed voltage of the battery 460, as well as sensed voltages and currents elsewhere in the UPS 400 of Fig. 4, the transistors Q a , Q b , Q c , Q d preferably are operated such that they provide four quadrant conversion, allowing bidirectional power flow between the battery 460 and the second transformer winding L b . The transistors Q a , Q b , Q c , Q d are also preferably operated in synchronism with the transistors Q 5 , Q of the balancer circuit 432. In particular, as shown in Fig. 7, the transistors Q a , Q b , Q c , Qd, Qs, Qβ are preferably operated such that transistors Qa, Qd, Qs are "on" when transistors Q b , Q c , Qβ are "off, and vice versa. Proper selection of the turns ratio of the transformer Ti vis a vis the voltage characteristics of the battery 460 and the voltage envelope within which the first and second voltage busses 402a. 402b are operated can allow the UPS 400 to operate such that power transfer between the battery 460 and the first and second voltage busses 402a, 402b is effected depending on the charge state of the battery 460, the power demand at the load port 403, and the voltage V ΛC at the AC source port 401, as described in greater detail below. It will be appreciated that the embodiment of Fig. 6 represents an exemplary implementation, and that other circuit implementations fall within the scope of the present invention. For example, the switching functions of the transistors Q a , Q b , Q c , Q d may be provided by any of a number of different switching devices such as those described in relation to Fig. 4, controlled using any of a number of different control /o circuit implementations, such as ones similar to those descπbed for the switch control circuit 440 of Fig 5 Fig 8 is a waveform diagram illustrating exemplary operations for the UPS 400 of Fig 4 For purposes of the discussion of Fig 8, operation of the UPS 400 of Fig 4 will be descπbed m terms of the control of the functions of the transistors switches Qi, Q 2 , Q 3 , Q 4l , Qs, Qβ of the rectifier and inverter circuits 410, 420, and more particularly, m terms of the control of "duty cycles" at which the transistors are switched (modulated) As used herein, "duty cycle" generally refers to a percentage of time duπng a switching cycle peπod that a switch is in a "closed," i e , conductive, state Thus, for example, a switch that is maintained at a 50% duty cycle is intermittently "on" for half of a switching cycle, while a switch approaching a 100% duty cycle, e g , a 99% duty cycle, is on for nearly all of the switching cycle It will be understood that, as descπbed herein, the switches discussed may also operate at a 100% duty cycle, i e , be maintained in an "on" state throughout one or more switching cycles, or at a 0% duty cycle, i e , be maintained in an "off state throughout one or more switching cycles It will be appreciated that this duty cycle control may be achieved, for example, by application of appropπate control signals to appropπate switching components For example, m the embodiment of Fig 4, duty cycle control of the switching transistors Qj, Q 2 , Q 3 , Q , Qs, Qβ may be achieved by the control circuit 440 applying appropπate base dπve signals to the switching transistors Qi, Q 2 , Q 3 , Q 4 , Qs, Qδ It will be understood, however, that such duty cycle control may be achieved using any of a number of other switching devices and control signal generating circuits Preferably, each of the switching transistors Qi, Q 2 , Q 3 , Q , Q 5 , Qβ of Fig 4 is operated at a switching frequency that is relatively high with respect to the frequency of the AC input voltage V at which the UPS 400 operates More preferably, each of the switching transistors Qi, Q , Q 3 , Q , Qs, Qβ is operated at a switching frequency that is at least 10 times higher than the frequency of the AC input voltage V C , for an AC line frequency of 60Hz, a suitable switching frequency might be 20 kHz Using relatively high switching frequencies allows the magnetic components (e g , the inductors L], L 2 , L ) to be relatively small in size Low pass filteπng to produce a smoothed load voltage V O D mav be achieved by the combination of the output inductor L 2 and the capacitance It will be appreciated that the output capacitance // C L may be provided by the load 20, as illustrated in Fig 4, or may be incorporated m the UPS 400 Preferably, the three switching transistor pairs including the first and second transistors Qi, Q 2 , the third and fourth transistors Q 3 , Q 4 , and the fifth and sixth switches Qs, Qβ are operated in a "complementary" fashion For example, the second transistor Q 2 of Fig 4 is preferably generally constrained to be "off when the first transistor Qi is "on," and vice versa However, it will be appreciated that, generally, practical circuit implementations withm the scope of the present invention may be used in which the "complementary" switches are operated in an approximately or substantially complementary fashion For example, a switch pair may be operated in a "break before make" fashion, such that one of the switches in the pair is turned off slightly before the other switch in the pair is turned on In other circuit implementations, a slight amount of overlap of "on" peπods of switches of a complementary pair may be allowed, e g , a "make before break" mode of operation Techniques for providing such "make before break" and "break before make" operations are known to those of skill in the art, and will not be discussed in greater detail herein Referπng to Fig 8 in conjunction with Fig 4 , the rectifier circuit 410 and the DC source coupling circuit 430 are generally operated to produce first and second DC voltages Vi, V 2 at the first and second voltage busses 402a, 402b having sufficient magnitudes to enable the inverter circuit 420 to provide a nominal AC output voltage V LOAD at the load port 403 without discharging the battery 460 at the DC source port 431 Power preferably is pπmaπly supplied from the AC source port 401, and the first and second transistors Qi, Q 2 are modulated to maintain the first and second DC voltages Vi, V 2 An AC output at the load port 403 is obtained by action of the inverter circuit 410, which inverts the first and second DC voltages V], V? to produce the load voltage V LOAD If the first and second DC voltages Vι,V 2 are too high, the inverter circuit 420 can also provide a bucking function to provide a nominal voltage at the load port 403 through the action of the third and fourth transistors Q 3 , Q and the second inductor L 2 If the AC source voltage V ΛC is sufficiently high, the rectifier circuit 410 may not need to provide a boost to maintain the first and second DC voltages V], V 2 During a first half-cycle 810, the first and second transistors Qi, Q 2 can operate at substantially complementary duty cvcles approaching 100% and 0%, respectively Duπng a second half-cycle 810, the first and second transistors Qi, Q 2 can operate at substantially complementary duty cycles approaching 0% and 100%, respectively If the AC source voltage V A c falls, however, the duty cycles of the first and second transistors Qi, Q 2 can be vaπed to provide an appropπate boost to the first and second DC voltages Vi, V 2 Duπng the first half-cycle 810, the first and second transistors Qi, Q 2 are operated at respective complementary duty cycles sufficiently less than 100% and sufficiently greater than 0%, respectively, to provide an appropπate boost to maintain the first DC voltage Vj and, through the action of the balancer circuit 432, the second DC voltage V 2 Duπng the second half-cycle 820, the first and second transistors Qi, Q 2 are operated at respective complementary duty cycles sufficiently greater than 0% and sufficiently less than 100%, respectively, to provide an appropπate boost to maintain the second DC voltage V 2 and, through the action of the balancer circuit 432, the first DC voltage Vi Still referπng to Figs 4 and 8, under conditions m which the battery 460 is fully charged and power supplied at the AC source port 401 is sufficient to maintain a nominal voltage at the load port 403, a substantially zero net power flow occurs between the battery 460 and the first and second voltage busses 402a, 402b The magnitude of current induced in the second winding L b through the first winding L a by the balancer circuit 432 vanes throughout the cycle of the AC source voltage V A c, causing the battery current I B (shown in Fig 4) to fluctuate If the internal electromotive force (EMF) generated by the battery 460 is sufficient such that this current is effectively offset by currents flowing from the battery 460 through DC- AC converter circuit 436, the average current Iβ.av through the battery 460 is substantially zero, resulting in substantially zero net charge or discharge of the battery 460 However, if the battery 460 is less that fully charged, 1 e , if the internal EMF of the battery is low such that the battery acts to pull the voltage V D c at the DC source port lower, a net negative average battery current I B av g produced by the DC source coupling circuit 430 acts to maintain the voltage V DC at the DC source port 431. 1 e , charging current flows into to the battery 460 Conversely, if power demand at the load port 403 tπes to pull the first and second DC voltages Vj, V 2 lower, the DC source coupling circuit 430 acts to maintain the first and second voltages V], V 2 by drawing a positive average battery current I B a\g , transferπng power from the battery 460 to the first and second voltage busses 402a. 402b Accordingly, the DC source coupling circuit 430 acts to maintain the first and second DC voltages V,, Y0 (which /3 are constrained to be substantially equal in magnitude by the balancer circuit 432) in a substantially fixed proportion to the voltage V D c at the DC source port 431, by effecting appropriate power transfers therebetween. It will be understood that Fig 8 is provided for illustrative purposes, and that embodiments of the present invention can operate in any of a number of ways than those described with reference to Fig. 8. For example, although Fig. 8 illustrates generating a load voltage V LOA D having the same frequency as the AC source voltage V A C, the present invention is not limited to such same-frequency operation. Because the UPS 400 uses intermediate DC busses 402a, 402b to transfer power between the AC source port 401 and the load port 403, the AC source voltage V A c and the load voltage V LOAD can have different frequencies; for example, the AC source voltage V AC may be 50 Hz, while the generated load voltage VL OAD may be 60 Hz, or vice versa. The frequency of the load voltage V L O AD may be changed, for example, by varying the operations of the inverter circuit 420 from the operations described above, e.g., by modifying the rate at which duty cycles of the third and fourth transistors Q , Q are changed to provide the desired output frequency. The manner in which boost and/or buck is applied by the rectifier and inverter circuits 410, 420 may also be varied. For example, it may be desirable to elevate the first and second DC voltages Vj, V 2 at the first and second voltage busses 402 a, 402b to achieve accelerated battery charging. Under such conditions, the duty cycles of the first, second, third and fourth transistors Qi, Q 2 , Q 3 , Q 4 may be controlled such that the rectifier circuit 410 boosts the first and second DC voltages Vj, V 2 , while the inverter circuit 420 bucks the load voltage V LOAD to maintain a desired nominal load voltage, thus allowing power to flow from the first and second voltage busses 402a, 402b to the DC source port 431 while maintaining nominal voltage at the load 20. Figs. 9A-9C illustrate exemplary operations of the UPS 400 of Fig. 4 during a "brownout" condition, i.e., when the AC source voltage V AC falls to a point to where the AC source 10 can no longer meet the power demand at the load port 403. Referring to Figs. 9A-9C in conjunction with Fig. 4, as the AC source voltage V A c drops, the rectifier circuit 410 attempts to boost the first and second voltages \0, V 2 at the first and second voltage busses 402a, 402b by drawing increased current I Λ c from the AC source 10 (as shown, I A c represents a current magnitude for an AC current). A current limit I C may be determined by characteristics of the AC source 10. characteπstics of components of the rectifier circuit 410. and/or bv constraints imposed on operation of the rectifier circuit 410 by the control circuit 440 (e g , the control circuit 440 may act to limit current responsive to sensing the AC input current I AC ) AS the current I AC approaches the current limit I CL , increasing power may be drawn from the battery 460, i e , a positive battery current I B may be produced such that both the battery 460 and the AC source 10 are supplying power to the load port 403 If the AC input voltage V A c continues to decline, the AC input current I A c may eventually drop off to zero (not shown), as the AC source 10 may no longer be capable of supplying power, or the UPS 400 may activate an AC switch (not shown) to disconnect the AC source 10 from the rectifier circuit 410 Under such dropout conditions, power to the load port 403 may be exclusively provided by the battery 460, such that the UPS 400 changes from a battery-supplemented mode of operation to a battery-powered mode of operation After restoration of the AC source voltage V AC , the battery current I B (shown m Fig 4) may be reduced, and may even go negative as the UPS 400 attempts to replenish energy drawn from the battery 460 duπng the brownout peπod The above-descπbed operations may be particularly advantageous in extending battery capacity Many conventional UPSs go into an offline mode of operation under brownout conditions, i e , when the voltage of the AC power source (utility) drops below a nominal level, the UPS disconnects the AC power source and supplies the load solely from a battery, which can result in quick discharge of the battery The aspect of the present mvention described with reference to Figs 9A-9C aπses from the realization that a significant amount of power may still be available at the AC power source during a brownout, and that this power can be combined with power drawn from the battery to lessen the rate of discharge of the battery duπng such low-voltage conditions Thus, for example, a UPS according to the present invention may be capable of operating through longer brownout conditions than comparable conventional UPSs, and may preserve more battery capacity for continued operation if a brownout is followed by a total loss of the AC power source Although the circuit configurations and operations described with reference to Figs 4-8 and 9A-9C are preferred, other circuit configurations and operations fall within the scope of the present mvention For example. Fig 10 illustrates a UPS 400' according to an alternative embodiment of the present invention Like elements of Figs 4 and 10 are indicated by like reference numerals, and will not be discussed in detail in light of the preceding discussion of Fig 4 The UPS 400' differs from the UPS 400 of Fig. 4 in that the inductive DC source coupling circuit 430 of Fig. 4 is replaced with a direct DC source coupling circuit 430', here shown as conductors that directly couple a DC power source, here shown as batteries 460a, 460b, to the first and second voltage busses 402a, to provide bidirectional power transfer between the DC power source 460a, 460b and the first and second voltage busses 402a, 402b. The balancer circuit 432 of Fig. 4 is replaced with a balancer circuit 432' in which the fifth and six transistors Qs, Qβ selectively couple the first and second voltage busses 402a, 402b to the neutral bus N via a third inductor L 3 . In the drawings and specification, there have been disclosed typical preferred embodiments of the invention and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation, the scope of the invention being set forth in the following claims. i(o

Claims: THAT WHICH IS CLAIMED IS: 1 An uninterruptible power supply (UPS), compnsmg an AC source port configured to connect to an AC power source, a load port configured to connect to a load; a rectifier circuit that selectively couples the AC source port to first and second voltage busses through a first inductance, an inverter circuit that selectively couples the load port to the first and second voltage busses through a second inductance; and a bidirectional DC source coupling circuit operative to couple a DC power source to the first and second voltage busses to provide bidirectional power transfer between the DC power source and the first and second voltage busses 2 A UPS according to Claim 1 , further compπsing a DC source port configured to connect to a DC power source, and wherein the bidirectional DC source coupling circuit inductively couples the DC source port to the first and second voltage busses to provide bidirectional power transfer between the DC source port and the first and second voltage busses such that a voltage at the DC source port is maintained m a substantially fixed proportion to first and second DC voltages at respective ones of the first and second voltage busses 3 A UPS according to Claim 2, further compnsmg a control circuit operative to generate a rectifier control signal and an inverter control signal responsive to at least a load voltage at the load port, wherein the rectifier circuit is responsive to the rectifier control signal to control coupling of the AC source port to the first and second voltage busses, and wherein the inverter circuit is responsive to the inverter control signal to control coupling of the load port to the first and second voltage busses 4 A UPS according to Claim 3 wherein the AC source port compπses a phase bus and a neutral bus, wherein the bidirectional DC source coupling circuit compnses a balancer circuit coupled between the first and second voltage busses and operative to n selectively couple the first and second voltage busses to the neutral bus through a transformer responsive to a balancer control signal; and wherein the control circuit is operative to generate the balancer control signal such that the first and second DC voltages are constrained to have substantially equal magnitudes. 5. A UPS according to Claim 3, wherein the control circuit is responsive to the voltage at the load port to control the rectifier circuit and the inverter circuit such that current at the AC source port varies up to a current limit to maintain the load voltage at the nominal voltage, and such that, when the current at the AC source port reaches the current limit and the voltage, power is transfened to the load port from both the AC source port and the DC source port to maintain the load terminal at the nominal voltage. 6. A UPS according to Claim 5, wherein the control circuit is operative to limit the current at the AC source port. 7. A UPS according to Claim 3: wherein the AC source port comprises a phase bus and a neutral bus; wherein the load port comprises a load bus and the neutral bus; and wherein the control circuit is operative to control the rectifier circuit and the inverter circuit such that the phase bus is coupled to respective ones of the first and second voltage busses in a substantially complementary manner and such that the load bus is coupled to respective ones of the first and second voltage busses in a substantially complementary manner. 8. A UPS according to Claim 3: wherein the AC source port comprises a phase bus and a neutral bus; wherein the load port comprises a load bus and the neutral bus; and wherein the rectifier circuit comprises: a first inductor having a first terminal coupled to the phase bus; a first switch responsive to a first switch control signal to couple and decouple a second terminal of the first inductor and the first voltage bus; and IS a second switch responsive to a second switch control signal to couple and decouple the second terminal of the first inductor and the second voltage bus; wherein the inverter circuit comprises: a second inductor having a first terminal coupled to the load bus; a third switch responsive to a third switch control signal to couple and decouple a second terminal of the second inductor and the first voltage bus; and a fourth switch responsive to a fourth switch control signal to couple and decouple the second terminal of the second inductor and the second voltage bus; and wherein the control circuit is operative to generate the first, second, third and fourth switch control signals responsive to at least the load voltage at the load port. 9. A UPS according to Claim 8, wherein the control circuit operates the first and second switches at substantially complementary duty cycles, and wherein the control circuit operates the third and fourth switches at substantially complementary duty cycles. 10. A UPS according to Claim 2: wherein the AC source port comprises a phase bus and a neutral bus; wherein the load port comprises a load bus and the neutral bus; and wherein the bidirectional DC source coupling circuit comprises: a transformer having first and second inductively coupled windings, the first winding having first and second end taps and a center tap coupled to the neutral bus; a switching circuit operative to selectively couple the first end tap of the first winding to the first and second voltage busses; a rectifying circuit coupling the second end tap of the first winding to the first and second voltage busses; and a bidirectional DC-AC converter circuit coupled between the second winding and the DC source port. 1 1. A UPS according to Claim 10, wherein the switching circuit is operative to constrain the first and second DC voltages to be substantially equal. 12. A UPS according to Claim 10, further comprising a control circuit operative to generate first and second control signals, and wherein the switching circuit comprises: a first switch responsive to the first switch control signal to couple and decouple the first end tap of the first winding of the transformer and the first voltage bus; and a second switch responsive to the second switch control signal to couple and decouple the first end tap of the first winding of the transformer and the second voltage bus. 13. A UPS according to Claim 12, wherein the control circuit constrains the first and second switches to operate at substantially complementary duty cycles of approximately 50%. 14. A UPS according to Claim 10, wherein the DC- AC converter circuit comprises a full bridge switching circuit that selectively couples first and second terminals of the DC source port to first and second taps of the second winding of the transformer. 15. A UPS according to Claim 10, wherein the rectifying circuit comprises one of: first and second diodes connected between the second end tap of the first winding of the transformer and respective ones of the first and second voltage busses; or seventh and eighth switches connected between the second end tap of the first winding of the transformer and respective ones of the first and second voltage busses. 16. An uninterruptible power supply (UPS), comprising: an AC source port configured to connect to an AC power source, the AC source port including a phase bus and a neutral bus; a DC source port configured to connect to a DC power source: 0 a load port configured to connect to a load, the load port including a load bus and the neutral bus; first and second voltage busses; a first switching circuit that selectively couples the phase bus to the first and second voltage busses through a first inductance; a second switching circuit that selectively couples the load bus to the first and second voltage busses through a second inductance; a transformer including first and second inductively coupled windings, the first winding including a center tap coupled to the neutral bus; a third switching circuit that selectively couples the first and second voltage busses to a first end tap of the first winding; a rectifying circuit that rectifyingly couples a second end tap of the first winding to the first and second voltage busses; and a DC-AC converter circuit that selectively couples the DC source port to the second winding. 17. A UPS according to Claim 16, further comprising a control circuit operative to control the first and second switching circuits responsive to at least a load voltage at the load port. 18. A UPS according to Claim 17, wherein the control circuit is operative to control the third switching circuit such that first and second DC voltages at respective ones of the first and second voltage busses are constrained to have substantially equal magnitudes. 19. A UPS according to Claim 17, wherein the control circuit is responsive to the voltage at the load port to control the first and second switching circuits such that current at the phase bus varies up to a cunent limit to maintain the load voltage at the nominal voltage, and such that, when the cunent at the phase bus reaches the cunent limit, power is transfened to the load port from both the AC source port and the DC source port to maintain the load terminal at the nominal voltage. 20. A UPS according to Claim 19. wherein the control circuit is operative to limit the cunent at the phase bus. 21. A UPS according to Claim 17, wherein the control circuit is operative to control the first and second switching circuits such that the phase bus is coupled to respective ones of the first and second voltage busses in a substantially complementary manner and such that the load bus is coupled to respective ones of the first and second voltage busses in a substantially complementary manner. 22. A UPS according to Claim 17: wherein the first switching circuit comprises: a first inductor having a first terminal coupled to the phase bus; a first switch responsive to a first switch control signal to couple and decouple a second terminal of the first inductor and the first voltage bus; and a second switch responsive to a second switch control signal to couple and decouple the second terminal of the first inductor and the second voltage bus; wherein the second switching circuit comprises: a second inductor having a first terminal coupled to the load bus; a third switch responsive to a third switch control signal to couple and decouple a second terminal of the second inductor and the first voltage bus; and a fourth switch responsive to a fourth switch control signal to couple and decouple the second terminal of the second inductor and the second voltage bus; and wherein the control circuit is operative to generate the first, second, third and fourth switch control signals responsive to at least the load voltage at the load port. 23. A UPS according to Claim 22, wherein the control circuit operates the first and second switches at substantially complementary duty cycles, and wherein the control circuit operates the third and fourth switches at substantially complementary duty cycles. 24. A UPS according to Claim 22: wherein the third switching circuit comprises: ? a fifth switch responsive to a fifth switch control signal to couple and decouple the first end tap of the first winding of the transformer and the first voltage bus, and a sixth switch responsive to a sixth switch control signal to couple and decouple the first end tap of the first winding of the transformer and the second voltage bus, and wherein the control circuit is operative to generate the fifth and sixth switch control signals 25 A UPS according to Claim 24, wherein the control circuit constrains the fifth and sixth switches to operate at substantially complementary duty cycles of approximately 50% 26 A UPS according to Claim 16, wherein the DC-AC converter circuit compπses a full bndge switching circuit that selectively couples first and second terminals of the DC source port to first and second taps of the second winding of the transformer 27 A UPS according to Claim 16, wherein the rectifying circuit compnses one of first and second diodes connected between the second end tap of the first winding of the transformer and respective ones of the first and second voltage busses, or first and second switches connected between the second end tap of the first winding of the transformer and respective ones of the first and second voltage busses 28 A method of selectively transfernng power to a load from an AC source and a DC source, the method compnsmg the steps of selectively coupling the AC source to first and second voltage busses through a first inductance, selectively coupling the load to the first and second voltage busses through a second inductance, and Z3 bidirectionally coupling the DC source to the first and second voltage busses to provide bidirectional power transfer between the DC source and the first and second voltage busses. 29. A method according to Claim 28, wherein said step of bidirectionally coupling comprises the step of inductively coupling the DC source to the first and second voltage busses to provide bidirectional power transfer between the DC source and the first and second voltage busses such that a voltage at the DC source is maintained in a substantially fixed proportion to first and second DC voltages at respective ones of the first and second voltage busses. 30. A method according to Claim 29, further comprising the step of selectively coupling the first and second voltage busses to a neutral bus through a transformer such that the first and second DC voltages are constrained to have substantially equal magnitudes. 31. A method according to Claim 30, further comprising the steps of: selectively coupling the AC source port to the first and second voltage busses such that cunent at the AC source varies up to a cunent limit to maintain the load voltage at the nominal voltage; and when the cunent at the AC source port reaches the cunent limit and the voltage, transferring power to the load port from both the AC source and the DC source to maintain the load voltage at the nominal voltage. 32. A method according to Claim 29: wherein said step of selectively coupling the AC source comprises the step of selectively coupling a phase bus of the AC source to respective ones of the first and second voltage busses in a substantially complementary manner; and wherein said step of selectively coupling the load comprises the step of selectively coupling the load to respective ones of the first and second voltage busses in a substantially complementary manner. 33. A method according to Claim 30 wherein said step of bidirectionally coupling comprises the steps of: selectively coupling the neutral bus to the first and second voltage busses through a first portion of a first winding of a transformer having first and second inductively coupled windings; rectifyingly coupling the first and second voltage busses to the neutral bus through a second portion of the first winding of the transformer; selectively coupling first and second terminals of the DC source to first and second end taps of the second winding of the transformer. a

Inventors: JOHNSON ROBERT W, RADDI WILLIAM J, THOMMES JAMES, JOHNSON, ROBERT, W., RADDI, WILLIAM, J., THOMMES, JAMES
Applicants: POWERWARE CORP, POWERWARE CORPORATION
Application year: 2000
Main classification: H02J9
IPC codes: H02J9, H02M5