CONVERTER FOR THE CONVERSION OF AN INPUT VOLTAGE INTO AN OUTPUT VOLTAGE

Abstract: A converter for the conversion of an input voltage (Ui) between a first (1) and a second supply terminal (2) into an output voltage (U0), comprising switching means (S) which in operation are turned on and turned off alternately under control of a control signal (Vcntrl), an inductive element (T) serially connected with the switching means (S), a control circuit (CNTRL) for supplying the control signal (Vcntrl), and evaluation means (EVMNS) for evaluating a ringing voltage (US) across the switching means (S). The frequency of the control signal (Vcntrl) is approximately constant and is determined by an oscillator (OSC). The control circuit turns on the switching means (S) only when at the same time: the voltage (US) is smaller than the input voltage (Ui), and the derivative with respect to time of the voltage (US) is smaller than or equal to zero, and equals a reference value (RF).

Description: Converter for the conversion of an input voltage into an output voltage. The invention relates to a converter for the conversion of an input voltage between a first supply terminal and a second supply terminal into an output voltage, including switching means which in operation are turned on and turned off alternately under control of a switch control signal, an inductive element which together with the switching means forms a series arrangement coupled between the first supply terminal and the second supply terminal, a control circuit for the supply of the switch control signal, and evaluation means for the evaluation of a voltage across the switching means, which voltage exhibits ringing, and for the supply of an evaluation signal to the control circuit. Figure 1 shows such a converter and is known from United States Patent Specification 5,754,414. A primary winding of a transformer 12, together with a switching transistor 18, is coupled between a first supply terminal Vs and a second supply terminal GND so as to receive an input voltage Vs. The transformer 12 also has a secondary winding 30. A voltage supplied by the secondary winding 30 is rectified by means of a diode 32 and is subsequently smoothed by a smoothing capacitor 34, which results in an output voltage V 0 between an output terminal V 0 and the second supply terminal GND. The operation of the known converter is now explained with reference to Figures 1 to 3. Between the instants t 0 and ti the base voltage V b (with respect to the second supply terminal GND) of the switching transistor 18 is substantially 0 V, as a result of which the switching transistor 18 is not in conduction. Consequently, the collector V c (with respect to the second supply terminal GND) of the switching transistor 18 is substantially equal to the input voltage Vs. At the instant t \ the base voltage V b is increased to such an extent that the switching transistor 18 is driven into full conduction, as a result of which the collector voltage V c becomes substantially equal to 0 V. The voltage V b remains high till the instant t 2 . A direct consequence of this is that between the instant t ! and t 2 the voltage across the primary winding of the transformer 12 is substantially equal to the input voltage Vs, as a result of which energy is stored in the primary winding of the transformer 12. As a result of this, the stored energy is transferred to the secondary winding 30 and eventually, via the rectifier diode 32, to a load (not shown in the Figures), which load may be coupled between the output terminal V 0 and the second supply terminal GND. The abrupt turn-off of the switching transistor 18 at the instant t 2 causes a sudden increase of the collector voltage Vc as a result of the self-inductance of the primary winding. The collector voltage Vc right after the instant t 2 is therefore substantially higher than the input voltage Vs. Subsequently, the collector voltage Vc begins to decrease as indicated by the reference numeral 44 in Figure 2. From a given instant, indicated by the reference numeral 82, the collector voltage Vc starts ringing. It is to be noted that Figures 2 and 3 are shown in said United States Patent Specification in order to illustrate the operation of conventional converters. However, Figures 2 and 3 are now also used to illustrate the operation of the converter known from said United States Patent Specification. Thus, said United States Patent Specification states, as shown in Figures 2 and 3, that many conventional converters operate with a fixed switching frequency f. The switching frequency f is then low enough to achieve that at an instant t 3 , which corresponds to the instant ti, the collector voltage Vc exhibits hardly or no ringing, as a result of which at the instant t 3 the switching transistor 18 can be turned on again without the risk of the collector voltage Vc being much higher than the input voltage Vs, as a result of which the switching transistor 18 could be damaged. Moreover, at the instant that the collector voltage Vc has stopped ringing it can be ascertained that the energy transfer from the transformer 12 to the load has ceased. Since such conventional converters operate with a fixed switching frequency f which is so low that it is certain that at the instant t 3 the collector voltage Vc has stopped ringing, such conventional converters are not suitable for uses which require a high switching frequency f. For this reason, steps have been taken in the known converter as disclosed in said United States Patent Specification, to render the converter suitable for operation with a high switching frequency f. The essence is that the converter each time, i.e. also when the ringing frequency changes, adapts the switching frequency f in such a way that the switching transistor 18 is turned on at the first minimum of the ringing collector voltage V , which first minimum bears the reference numeral 84 in Figure 2. The energy transfer from the transformer 12 to the load has then not yet been completed. However, when it is born in mind that ringing does not arise until the instant at which the rectifier diode 32 is leaving the conductive state, it is evident that the major part of the energy has already been transferred to the load. The ringing frequency of the collector voltage Vc depends, for example, on the type of transformer used. For this reason, sard United States Patent Specification states that the switching frequency f of the converter should be variable and should automatically adapt itself so as to achieve that the instant t 3 , as shown in Figure 2, substantially coincides with the first minimum 84 of the ringing collector voltage Vc. Said United States Patent Specification therefore explicitly states that the conventional converters having a fixed switching frequency are unfavorable. This is because the switching transistor 18 then cannot always be turned on at the first minimum 84 of the ringing collector voltage Vc. A disadvantage of the known converter as described in said United States Patent Specification is that it is not suitable for uses where a substantially constant switching frequency is desirable. This may, for example, result in the switching frequency assuming a very high value, which may adversely affect the efficiency of the converter. It is an object of the invention to provide a converter which does not have the above-mentioned disadvantage. To achieve this, according to the invention, the converter defined in the opening paragraph is characterized in that the switch control signal has an approximately constant frequency which is determined by and substantially equal to the constant frequency of an oscillator signal supplied by an oscillator, and the control circuit turns on the switching means only when the evaluation signal indicates that the voltage across the switching means is smaller than the input voltage and when, in addition, a further evaluation signal supplied by the evaluation means indicates that the derivative with respect to time of the voltage across the switching means is smaller than or equal to zero and when, in addition, the derivative with respect to time of the voltage across the switching means is equal to a reference value. The evaluation signal guarantees that the switching means can never be switched on when the voltage across the switching means is higher than the input voltage. A further reduction of the voltage range of the voltage across the switching means where the switching means can be turned on is achieved by means of the further evaluation signal. This is particularly favorable when a negative value very close to the value zero is chosen for the reference value. After all, the aim is to turn on the switching means at an instant at which the voltage across the switching means exhibits a local minimum. However, electronic control circuits always require a certain response time. Allowance can then be made for this response time by selecting the reference value not to be zero but to be equal to a small negative value. Thus, in spite of the required response time, the switching means can yet be turned on at an instant at which the voltage across the switching means exhibits a local minimum. Apart from said three requirements to be met before the switching means are allowed to be turned on, there is another very important requirement, namely that the switch control signal has an approximately constant frequency which is dictated by and is substantially equal to the constant frequency of the oscillator signal supplied by the oscillator. The switching means can then be turned on only when the oscillator signal changes over from a first signal level, for example a low level, to a second signal level, for example a high level, the repetition rate of said change in level being (substantially) constant. The switching means are then turned on at the next local minimum that appears after said change in level has occurred. This local minimum can be, for example, the first, the second, the third etc. minimum. Thus, the switching means are not necessarily turned on at the first local minimum, which is in contradistinction to the known converter in accordance with the afore-mentioned United States Patent Specification. The possibility of choosing another local minimum at which the switching means are turned on is based on the recognition that the frequency of the ringing voltage is much higher than the frequency of the oscillator signal. Frequency variations on the voltage across the switching means then eventually result in variations in the selection of a local minimum, as a result of which the frequency of the converter remains substantially constant and is, in fact, determined by the frequency of the oscillator signal. The invention will now be described in more detail with reference to the accompanying drawings, in which: Figure 1 shows an electrical circuit diagram of a known converter as proposed in United States Patent Specification 5,754,414; Figures 2 and 3 show graphs for a further explanation of the electrical circuit diagram of Figure 1; Figure 4 shows an electrical circuit diagram of an embodiment of a converter in accordance with the invention; Figure 5 show a set of signal waveforms for a furthr xplanation of the embodiments shown in Figures 4 and 6; and Figure 6 shows an electrical circuit diagram of a further embodiment of a converter in accordance with the invention. In Figures 4 through 6 like parts or elements bear the same reference symbols. Figure 4 shows an electrical circuit diagram of a converter embodying the invention. The converter includes switching means S, i.e. a switch S which is alternately turned on and turned off under control of a switch control signal V cntr i, and an inductive element T, which in the present example comprises a transformer T having a primary winding Lp and a secondary winding Ls- The switch S and the primary winding Lp together form a series arrangement having ? first terminal connected to a first supply terminal 1 and having a second terminal connected to a second supply terminal 2 so as to receive an input voltage V ιn supplied by a voltage source VSRC. A first capacitor C p ι is a parasitic capacitance of the primary winding Lp. A second capacitor C p2 is a parasitic capacitance of the switch S. A rectifier diode D is coupled between a first terminal of the secondary winding Ls and a first output terminal 3. A second terminal of the secondary winding Ls is connected to a second output terminal 4. A smoothing capacitor C is coupled between the first output terminal 3 and the second output terminal 4. A load ZL is coupled between the first output terminal 3 and the second output terminal 4 so as to receive an output voltage U 0 . The converter further comprises a control circuit CNTRL for the supply of a switch control signal V cntr i to the switch S and evaluation means EVMNS for the evaluation of a voltage Us across the switch S. The evaluation means EVMNS supply an evaluation signal EV sgn ι, a further evaluation signal EV fsgn i, an oscillator signal Vosc, and a signal representative of a reference value RF to the control circuit CNTRL. The operation of the embodiment as shown in Figure 4 will be further clarified with reference to the set of signal waveforms I, II, III, IV and V shown in Figure 5. The reference value RF is assumed to be zero. Between an instant t 0 and an instant tj the switch control signal V cntr ι has such a high value that the switch S is closed. As a result of this, the voltage across the primary winding Lp is substantially equal to the input voltage Vj„. Between the instant to and the instant tj energy is stored in the primary winding Lp of the transformer T. At the instant t \ the switch control signal V cnt ri becomes substantially equal to zero volt, as a result of which the switch S opens. From the instant ti the energy stored in the primary winding Lp is transferred to the secondary winding Ls and is subsequently supplied to the load Z via the rectifier diode D. Approximately from an instant to the current through the rectifier diode D has become so small that the rectifier diode virtually functions as an open circuit. As a result, the transformer T is substantially in a no-load state from approximately the instant to, as a result of which a resonant circuit formed by the primary winding Lp and the parallel arrangement (via the voltage source VSCR) of the first capacitor C pl and the second capacitor C p2 is substantially undamped. As a result of this, the voltage Us across the switch S begins to oscillate. The first local minimum of the voltage Us appears at an instant t 3 . In the known converter the switch S would be closed again at the instant t 3 . However, this is not effected in the converter in accordance with the invention because the switch control signal V cn t r ι has an approximately constant frequency, which is determined by the oscillator signal Vosc- At an instant t 4 the oscillator signal Vosc changes from a low level to a high level. The oscillator OSC thus indicates that the switch S is basically allowed to close again. However, since the instant t 4 does not coincide with a local minimum at least one of the two signals, i.e. the evaluation signal EV sgn ι and the further evaluation signal EV fSgπ ι, has a low level. At an instant t 5 the evaluation signal EV sgn ι, the further evaluation signal EV fsgn ι as well as the oscillator signal Vosc for the first time all have a high level. At the instant t 5 (which corresponds to the first local minimum after the oscillator signal Vosc has assumed a high level) the switch S is therefore closed again so that again energy is stored in the primary winding Lp of the transformer T. If the frequency of the oscillating voltage Us changes owing to some cause, the converter can turn on the switch S again at another than the third local minimum of the oscillating voltage Us (as is shown in Figure 5). However, since the switch S can be turned on only after the oscillator signal Vosc has assumed a high level and since the frequency of the oscillating voltage Us is much higher than the frequency of the oscillator OSC, the switching frequency of the converter remains substantially constant. Figure 6 shows an electrical circuit diagram of a further embodiment of a converter in accordance with the invention. The converter includes a comparator CMP having an output connected to a first input of an AND gate AND, for the supply of the evaluation signal EV sgn ι. The comparator CMP has a positive input connected to the first supply terminal 1 and a negative input connected to the node common to the primary winding Lp and the switch S. As a result of this, the evaluation signal EV sgn ι only has a high level when the voltage Us is lower than the input voltage Vj n (see also the signal waveforms I and III in Figure 5). The converter further includes a differentiator DF having an input connected to the node common to the primary winding Lp and the switch S and having an output connected to a second input of the AND gate AND, for the supply of the further evaluation signal EV fsgn |. The further evaluation signal EV fsgn ι has a high level only when the derivative with respect to time of the voltage Us equals approximately zero (see also the signal waveforms I and II in Figure 5). The oscillator OSC supplies the oscillator signal Vosc to a third input of the AND gate AND. The switch control signal V cn tri has a high level only when all the inputs of the AND gate AND have a high level. The differentiator DF includes a first bipolar transistor Q having a collector and a base interconnected and having an emitter connected to the second supply terminal 2; a second bipolar transistor Q 2 having an emitter connected to the second supply terminal 2 and having a base connected to the base of the first bipolar transistor Qi; a third bipolar transistor Q 3 having an emitter connected to the collector of the first bipolar transistor Q and having a collector connected to the second input of the AND gate AND; a capacitive element C DF or capacitor C DF coupled between, on the one hand, the node common to the primary winding Lp and the switch S and, on the other hand, the emitter of the third bipolar transistor Q 3 ; a reference voltage source V F coupled between a base of the third bipolar transistor Q 3 and the second supply terminal 2; and a reference current source I R F coupled to the collector of the second bipolar transistor Q 2 and to a collector of the third bipolar transistor Q 3 . The differentiator DF operates as follows. The first and the second bipolar transistor Q and Q 2 together form a current mirror. A positive current through the capacitor C DF (i-e- towards the emitter of the third bipolar transistor Q 3 and the collector of the first bipolar transistor Q \ ) is reflected by the current mirror and consequently appears inverted at the output of the current mirror, which output is formed by the collector of the second bipolar transistor Q . A negative current through the capacitor C D F flows through the third bipolar transistor Q 3 (and not through the current mirror) and is therefore not inverted. As is shown in Figure 6, the differentiator DF in fact acts as a current rectifier. If the absolute value of the positive or the negative current through the capacitor C DF is smaller than the current supplied by the reference current source I RF the further evaluation signal EV fSgn | has a high level, and in other cases the further evaluation signal EV fsgn ι has a low level. The signal representative of the reference value RF and shown in Figure 4 is not shown in Figure 6. This is because in the differentiator DF, as is shown in Figure 6, the reference value RF is also determined by the differentiator DF. The further evaluation signal EV fs g n i is therefore also influenced by the reference value RF. The reference value RF can be adapted by adapting the current mirror ratio of the current mirror, which ratio is determined by the ratio between the emitter areas of the first and the second bipolar transistor Qi and Q 2. The voltage reference source V RF provides the d.c. bias for the third bipolar transistor Q 3 . The converter may alternatively be provided with a differentiator of another type. Moreover, a single coil may be used instead of a transformer T. The switch S may be realized for example by means of a MOS transistor, a bipolar transistor, a thyristor, or a relay. The converter may be incorporated in an integrated circuit or it may be formed by means of discrete components

Claims: CLAIMS: 1. A converter for the conversion of an input voltage (Uj) between a first supply terminal (1) and a second supply terminal (2) into an output voltage (U 0 ), including switching means (S) which in operation are turned on and turned off alternately under control of a switch control signal (V cntr ι), an inductive element (T) which together with the switching means (S) forms a series arrangement coupled between the first supply terminal (1) and the second supply terminal (2), a control circuit (CNTRL) for the supply of the switch control signal ( c n t ri), and evaluation means (EVMNS) for the evaluation of a voltage (Us) across the switching means (S), which voltage (Us) exhibits ringing, and for the supply of an evaluation signal (EV sgn ι) to the control circuit (CNTRL), characterized in that the switch control signal (N cntr i) has an approximately constant frequency which is determined by and substantially equal to the constant frequency of an oscillator signal (Vosc) supplied by an oscillator (OSC), and the control circuit (CΝTRL) turns on the switching means (S) only when the evaluation signal (EV sgn ι) indicates that the voltage (Us) across the switching means (S) is smaller than the input voltage (Uj) and when, in addition, a further evaluation signal (EV fSgn ι) supplied by the evaluation means (EVMΝS) indicates that the derivative with respect to time of the voltage (Us) across the switching means (S) is smaller than or equal to zero and when, in addition, the derivative with respect to time of the voltage (Us) across the switching means (S) is equal to a reference value (RF). 2. A converter as claimed in Claim 1 , characterized in that the reference value (RF) is approximately zero. 3. A converter as claimed in Claim 1 or 2, characterized in that the evaluation means (EVMΝS) comprise a comparator (CMP) having a first and a second input, which first and second input are coupled parallel to the inductive element (L), and having an output for the supply of the evaluation signal (EV sgn ι). 4. A converter as claimed in Claim 1, 2, or 3, characterized in that the evaluation means (EVMNS) comprise a differentiator (DF) adapted to differentiate the voltage (Us) across the switching means (S) and to supply the further evaluation signal (EV fSgn ι). 5. A converter as claimed in Claim 4, characterized in that the differentiator (DF) comprises a capacitive element (CDF) and the differentiator (DF) is adapted in a manner that a voltage (Uc) across the capacitive element (C) is substantially equal to the voltage (Us) across the switching means (S) in such a way that the current through the capacitive element (C DF ) is a measure of the derivative with respect to time of the voltage (Us) of the switching means (S).

Inventors: FRONEN ROBERT J, MOBERS ANTONIUS M G, STRIJKER JOAN W, FRONEN, ROBERT, J., MOBERS, ANTONIUS, M., G., STRIJKER, JOAN, W.
Applicants: KONINKL PHILIPS ELECTRONICS NV, KONINKLIJKE PHILIPS ELECTRONICS N.V.
Application year: 2000
Main classification: H02M3
IPC codes: H02M3