AN ARRANGEMENT FOR ENABLING TRIMMING ON A SUBSTRATE AND A METHOD OF PRODUCING A SUBSTRATE THAT ENABLES TRIMMING

Abstract: To enable trimming on a substrate (1) having discrete components (6) that are surface-mounted on the substrate and/or components (7) that are integrated in the substrate, a trimmable structure (9) is provided on the surface of the substrate for each component to be trimmed.

Description: AN ARRANGEMENT FOR ENABLING TRIMMING ON A SUBSTRATE AND A METHOD OF PRODUCING A SUBSTRATE THAT ENABLES TRIMMING TECHNICAL FIELD The invention relates generally to trimming and more specifically to functional trimming and/or component trimming on a substrate having components that are surface-mounted on the substrate and/or integrated in the substrate. BACKGROUND OF THE INVENTION Laser trimming of printed circuit patterns on the surface of a ceramic substrate is known per se. In some applications, there are strict requirements on the physical dimensions of the substrate. This has led to a design of so called LTCC substrates (Low Temperature Cofired Ceramic substrates) where some components such as resistors, inductors and capacitors are integrated on different layers of the substrate at the same time as there are surface-mounted components mounted on the surface of the substrate. From JP Patent Abstracts Nos. JP 02052494 A and JP 60194556 A, it is known to make a hole or a window in multilayer substrates in order to trim a component integrated on a layer in the substrate. The problem with making a hole or a window in the top layer is that too large an area is lost on the top layer where the surface space is very restricted. SUMMARY OF THE INVENTION The object of the invention is to enable trimming on a multilayer substrate where there are very strict requirements on the physical dimensions of the substrate and especially the top surface, without having to make holes or windows in the substrate in order to free part of the component to be trimmed. This is attained in accordance with the invention in that a trimmable structure connected to the component to be trimmed, irrespective of whether the component is surface-mounted or integrated in the substrate, is provided on the surface of the sub- strate for each component to be trimmed. Both functional trimming and component trimming can be accomplished in this way. BRIEF DESCRIPTION OF THE DRAWING The invention will be described more in detail below with reference to the appended drawing on which Fig. l schematically illustrates a multilayer substrate with a surface-mounted inductor and a first embodiment of a trimming structure in accordance with the invention, Fig. 2 schematically illustrates a multilayer substrate with a sur- face-mounted capacitor and a second embodiment of a trimming structure in accordance with the invention, Fig. 3 schematically illustrates a multilayer substrate with a surface-mounted chip resistor and a third embodiment of a trimming structure in accordance with the invention, and Fig. 4 schematically illustrates a multilayer substrate with a surface-mounted discrete component, a resistor integrated in the sub- strate, and a fourth embodiment of a trimming structure in accordance with the invention. DESCRIPTION OF THE INVENTION Fig. 1 schematically illustrates a multilayer substrate 1 in which a number of com- ponents 2a. 2b, 2c are integrated on different layers. On the surface of the substrate 1 , a discrete component in the form of an inductor 3 is mounted. In applications where the inductances of the inductors are of so low values that it is possible to implement the component as printed conductors in the ceramic substrate, most of the conductor pattern is on an inner layer where it does not affect the surface area of the substrate. To enable trimming of the inductance value, only a minimal portion of the inductor is located on the surface of the substrate in accordance with the invention. In applications where higher inductance values are required, surface-mounted inductors have to be used such as the inductor 3 schematically illustrated in Fig. 1. In accordance with the invention, the discrete inductor 3 is series-connected with a trimmable structure 4 printed on the surface of the substrate 1. In the embodiment in Fig. 1, the trimmable structure 4 comprises a conductor that is to be laser trimmed if necessary. Since the inductance values of commercially available discrete inductors are fixed, the trimmable structure 4 is selected in such a manner that is enables trimming of the difference between the commercially available fixed inductance values and the area of the trimmable structure on the top layer is designed so it minimizes the oc- cupied area. The trimming structure 4 in Fig. 1 can of course be used to laser trim also inductors integrated in the substrate 1. Thus. e.g. the component 2c in the substrate 1 in Fig. 1 can be an inductor integrated on a layer in the substrate 1. To enable trimming of the inductance value of the inductor 2c by means of the trimming structure 4, the inductors 2c and 4 are interconnected through a via hole 5 in the top layer of the substrate 1. Fig. 2 illustrates an embodiment of the substrate 1 in Fig. 1 with the components 2a, 2b and 2c. In the embodiment in Fig. 2. a discrete capacitor 6 is surface-mounted on the surface of the substrate 1. The capacitor 6 is supposed to be parallel-connected with a trimmable capacitor 7 having one electrode 8 integrated on a layer in the substrate 1 and its other electrode in the form of a trimming electrode 9 on the surface of the substrate 1. The trimming electrode 9 is connected in series with one of the electrodes of the surface-mounted discrete capacitor 6. By means of a trimming structure 9 which is in the form of a conductive area, it will be possible to laser trim the capacitances of the capacitors 6 and 7. The electrode 8 of the capacitor 7, integrated on a layer in the substrate 1 , is con- nected to the other electrode of the discrete capacitor 6 through a via hole 10 in the top layer of the substrate 1. Fig. 3 illustrates another embodiment of the substrate 1 with integrated components 2a. 2b and 2c. In the embodiment in Fig. 3. it is supposed that a discrete chip resistor 1 1 is mounted on the surface of the substrate 1. To enable trimming of the discrete resistor 11 , a trimmable structure in the form of a trimmable resistor 12 is printed on the surface of the substrate 1 and series- connected with the discrete resistor 1 1. As indicated in Fig. 3, the trimmable resistor 12 is connected to other components integrated in the substrate 1 on different layers. The trimmable resistor 12 is trimmed by means of conventional laser trimming. Fig. 4 illustrates a further embodiment of the substrate 1 with integrated components 2a, 2b and 2c. In the embodiment in Fig. 4. a discrete component 13 is mounted on the surface of the substrate 1. A resistor 14 has been printed on an inner layer of the substrate 1. To enable trimming of the resistor 14. a trimmable resistor 15 is printed on the surface of the substrate 1 and connected in series with the resistor 14 through a via hole 16 in the top layer of the substrate 1. To trim the resistance value of the resistor 14, laser trimming is used to trim the trimmable resistor 15. It should be obvious from the above, that trimming is easily facilitated using trimmable component structures as described above.

Claims: CLAIMS 1. An arrangement for enabling trimming of discrete components (3. 6, 1 1 , 13) that are surface-mounted on a substrate ( 1 ) and/or components (7, 14) that are integrated in the substrate ( 1 ), characterized in that a trimmable structure (4. 9. 12, 15) is provided on the surface of the substrate ( 1 ) for each component to be trimmed. 2. The arrangement as claimed in claim 1. wherein the component is a capacitor integrated in the substrate, characterized in that the trimmable structure is connected to one of the electrodes of the capacitor integrated in the substrate, and forms a trimmable capacitor connected in parallel with the capacitor integrated in the substrate. 3. The arrangement as claimed in claim 1, wherein the component is a surface- mounted capacitor (6), characterized in that the trimmable structure (9) is one electrode of a trimmable capacitor (7) whose other electrode (8) is integrated in the substrate (1), said trimmable capacitor being connected in parallel with the surface- mounted capacitor. 4. The arrangement as claimed in claim 1, wherein the component is an inductor (3) that is surface-mounted on and/or integrated in the substrate (1), characterized in that the trimmable structure (4) is a trimmable inductor connected in series with the inductor (3) that is surface-mounted on and/or integrated in the substrate. 5. The arrangement as claimed in claim 1, wherein the component is a resistor (11, 14) that is surface-mounted on and/or integrated in the substrate, characterized in that the trimmable structure ( 12. 15) is a trimmable resistor that is series-connected or parallel-connected with the resistor that is surface-mounted on and/or integrated in the substrate. 6. A method of producing a substrate having discrete components that are surface- mounted on the substrate and/or components that are integrated in the substrate, characterized by providing a trimmable structure on the surface of the substrate for each component to be trimmed to enable trimming thereof. 7. The method as claimed in claim 6 wherein the component is a capacitor surface- mounted on the substrate, characterized by connecting one of the electrodes of the capacitor to the trimmable structure and the other electrode of the capacitor to an electrode integrated in the substrate and adapted to form a trimmable capacitor to- gether with the trimmable structure. 8. The method as claimed in claim 6 wherein the component is a capacitor integrated in the substrate, characterized by connecting one of the electrodes of the capacitor to the trimmable structure to form a trimmable capacitor that is connected in parallel with the capacitor integrated in the substrate. 9. The method as claimed in claim 6. wherein the component is an inductor (3) that is surface mounted on or integrated in the substrate (1), characterized by connecting the trimmable structure (4) in series with the inductor that is surface mounted on or integrated in the substrate. 10. The method as claimed in claim 6, wherein the component is a resistor (11 , 14) that is surface-mounted on or integrated in the substrate (1), characterized by connecting the trimmable structure (12, 15 ) in series or in parallel with the resistor that is surface-mounted on and/or integrated in the substrate.

Inventors: OLOFSSON LARS-ANDERS, OLOFSSON, LARS-ANDERS
Applicants: ERICSSON TELEFON AB L M, TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
Application year: 2000
Main classification: H01C17
IPC codes: H01C17, H01G13, H05K1, H05K3