Magnetic memory cell

Abstract: A magnetic memory cell (40) includes data storage layer (50) having a shape which is preselected to provide at least three domain states wherein each domain state corresponds to a particular logic state and a particular orientation of magnetization in the data storage layer. The magnetic memory cell includes a reference layer (54) having a fixed orientation of magnetization which is defined by an angle of orientation () wherein the angle of orientation () is preselected to distinguish the domain states of the data storage layer (50).

Description: The present invention relates to magnetic memories; for example a multiple bit magnetic memory cell. A magnetic memory usually includes an array of magnetic memory cells. Typically, each magnetic memory cell uses magnetic fields to store a corresponding bit of information. A magnetic memory also usually includes an array of conductors which provide read and write access to the magnetic memory cells. Such an arrangement of a magnetic memory may be referred to as a magnetic random access memory (MRAM). Prior magnetic memory cells typically include a data storage layer and a reference layer. The reference layer is usually a layer of magnetic material in which the orientation of magnetization is fixed or "pinned" in a particular direction. The data storage layer is typically a layer of magnetic material in which the orientation of magnetization may be altered by the application of external magnetic fields. This usually occurs during write operations in which electrical currents are applied to the conductors of the magnetic memory to alter the orientation of magnetization in the data storage layer. Typically, the logic state of a prior magnetic memory cell depends on whether the orientation of magnetization in its data storage layer is parallel or anti-parallel to the orientation of magnetization in its reference layer. Parallel orientations usually cause a magnetic memory cell to be in a low resistance state while anti-parallel orientations usually cause a magnetic memory cell to be in a high resistance state. Typically, the logic state of a magnetic memory cell is is read by measuring its resistance. The present invention seeks to provide an improved memory cell. According to an aspect of the present invention there is provided a multiple bit magnetic memory cell as specified in claim 1. The preferred embodiment provides magnetic memory cells with the capability of storing more that one bit per cell. Such magnetic memory cell can increase the storage density of MRAMs and possibly reduce the overall per bit costs of magnetic memories and systems that employ magnetic memories. The preferred embodiment provides a multiple bit magnetic memory cell which includes a data storage layer having a shape which is preselected to provide at least three domain states wherein each domain state corresponds to a particular logic state of information in the magnetic memory cell and a particular orientation of magnetization in the data storage layer, wherein the shape is a square including four end regions and an interior region. The multiple bit magnetic memory cell includes a reference layer having a fixed orientation of magnetization which is defined by an angle of orientation wherein the angle of orientation is preselected to distinguish the domain states of the data storage layer. According to a second aspect of the present invention, there is provided a magnetic memory as claimed in claim 2. Other features and advantages of the preferred embodiments will be apparent from the detailed description that follows. An embodiment of the present invention is described below, by way of example only, with reference to the accompanying drawings, in which: Figure 1 illustrates the basic structure of a magnetic memory cell that provides multiple bits of storage; Figure 2 shows a top view of a reference layer of a multiple bit magnetic memory cell; Figures 3a-3d illustrate the four domain states of the data storage layer in one embodiment of a multiple bit magnetic memory cell; Figure 4 shows the relationship between the measured resistance of a multiple bit magnetic memory cell and the angle  of its reference layer for each of the domain states of its data storage layer; Figure 5 is a top view of a magnetic memory which includes an array of multiple bit magnetic memory cells. Figure 1 illustrates the basic structure of a magnetic memory cell 40 that provides multiple bits of storage. The magnetic memory cell 40 includes a data storage layer 50 and a reference layer 54. The magnetic memory cell 40 provides a set of at least three logic states which yield multiple bits of information storage. The logic states of the magnetic memory cell 40 correspond to the relative orientations of magnetization in the data storage layer 50 and the reference layer 54. The orientation of magnetization in the data storage layer 50 may be represented by a vector M1. The orientation of magnetization in the reference layer 54 may be represented by a vector M2. The orientation of magnetization M2 is fixed in a particular direction. The orientation of magnetization M1, on the other hand, changes depending upon the logic state of the magnetic memory cell 40. Each logic state of the magnetic memory cell 40 corresponds to a particular orientation of M1. The possible orientations of M1 are referred to as the domain states of the data storage layer 50. Thus, the logic state of the magnetic memory cell 40 depends on the domain state of the data storage layer 50. In addition, the domain state of the data storage layer 50 is manipulated by the application of external magnetic fields using conductors associated with the magnetic memory cell 40. In one embodiment, the data storage layer 50 accommodates four domain states, state 1 through state 4, which corresponds to logic states 0 through 3 of the magnetic memory cell 40. This yields 2 bits of information storage in one magnetic memory cell. The logic state of the magnetic memory cell 40 is determined by measuring its resistance. The resistance of the magnetic memory cell 40 differs according to the relative orientations of M1 and M2, i.e. the domain state of the data storage layer 50. The resistance of the magnetic memory cell 40 may be measured by applying a read voltage and measuring a resulting sense current. In one embodiment, the magnetic memory cell 40 includes a tunnel barrier 52 between the data storage layer 50 and the reference layer 54. This structure may be referred to as a spin tunneling device in that electrical charge migrates through the tunnel barrier 52 during read operations. This electrical charge migration through the tunnel barrier 52 is due to a phenomenon known as spin tunneling and occurs when a read voltage is applied to the magnetic memory cell 40. In an alternative embodiment, a giant magneto-resistive structure may be used in the magnetic storage device 40. Figure 2 shows a top view of the reference layer 54 of the magnetic memory cell 40. Also shown is the M2 vector which represents the fixed orientation of magnetization of the reference layer 54. The M2 vector forms an angle e with respect to an x axis. The orientation of magnetization M2 having the angle  may be realized using a variety of known techniques. For example, the reference layer 54 may be a permalloy layer such as nickel-iron (NiFe) which is coupled to an antiferromagnetic layer that pins the orientation of magnetization in the permalloy layer. The antiferromagnetic material may be iron-manganese (FeMn) or nickel-manganese (NiMn). Alternative materials for the antiferromagnetic material include NiO, TbCo, PtMn, and IrMn. The angle  of M2 may be accomplished by applying a strong magnetic field such as 1000 oersteds in a direction parallel to the desired M2 vector and heating the magnetic memory cell 40 to a high temperature such as 300 degrees C. The magnetic memory cell 40 is then cooled in the presence of this magnetic field to fix the orientation of magnetization in the antiferromagnetic material in a direction parallel to the desired angle . Magnetic exchange coupling between the annealed antiferromagnetic material and the permalloy material of the reference layer 54 pins M2 to the desired angle . Alternatively, the reference layer 54 may be a material with a high coercivity such as a cobalt-platinum alloy. A magnetic field of sufficient strength may be applied to the reference layer 54 to fix the orientation of magnetization M2 to the desired angle . The relatively high coercivity of the reference layer 54 would prevent switching of M2 in the presence of external magnetic fields that are applied during write operations to the magnetic memory cell 40. Figures 3a-3d illustrate the four domain states of the data storage layer 50 in one embodiment of the magnetic memory cell 40. A vector 60 which is parallel to the x direction represents an orientation of magnetization in the interior of the data storage layer 50. The vector 60 is parallel to what may be referred to as the easy axis of the data storage layer 50. A set of vectors 61-64 represent orientations of magnetization which are associated with the end regions of magnetic materials. The magnetizations represented by the vectors 61-64 are oriented in directions that are substantially parallel to the edges of the data storage layer 50. In prior magnetic memory cells, the dimensions d x and d y of a data storage layer are typically selected in order to minimize the fields in the end regions and maximize the magnetization that is along the easy axis. In such prior magnetic memory cells, d x is usually greater than d y which yields a rectangular shape with a long dimension along the easy axis. Rather than try to minimize the magnetization in the end regions, the present techniques make use of these magnetization in the end regions in order to obtain additional domain states in the data storage layer 50. Accordingly, the dimensions d x and d, are selected to be equal and form a square shape for the data storage layer 50. The four domain states of the data storage layer 50 are realized by manipulating not only the direction of the vector 60 along the easy axis but also by manipulating the directions of the vectors 61-64 in the end regions of the data storage layer 50 as shown. The square shape of the data storage layer 50 not only yields additional domain states but also enhances the density that may be obtained in an MRAM in comparison to that which may be obtained when using rectangular memory cells. This is so because for a given minimum feature size more square magnetic memory cells may be formed on a given substrate area than rectangular magnetic memory cells. Figure 3a illustrates the domain state 1 of the data storage layer 50 and shows the directions of the vectors 60-64. As shown, the orientation of magnetization M1 is a resulting vector of the vectors 60-64 and points in a +x, -y direction. Figure 3b illustrates the domain state 2 of the data storage layer 50. The orientation of magnetization M1 is a resulting vector of the vectors 60-64 and points in a +x, +y direction. Figure 3c illustrates the domain state 3 of the data storage layer 50. The orientation of magnetization M1 points in a -x, -y direction. Figure 3d illustrates the domain state 4 of the data storage layer 50. The orientation of magnetization M1 points in a -x, +y direction In one embodiment, the material parameters and the geometry of the data storage layer 50 are optimized so that the x and y components of M1 are equal in each of the domain states 1-4. This optimization depends on the magnetization distribution in the data storage layer 50, the film thickness of the data storage layer 50, the d x and d y dimensions, and the type of material selected for the data storage layer 50. In one embodiment, a permalloy layer such as nickel-iron may be used as the main body of the data storage layer 50 with a thin polarization enhancing film at the interface to the tunnel barrier 52. The resistance of the magnetic memory cell 40 depends on the relative orientations of M1 and M2. The orientation of M1 depends on the domain state of the data storage layer 50. The orientation of M2 is fixed and is defined by the angle . It is desirable to select the angle  so that a relatively equal change in resistance of the magnetic memory cell 40 is detected between changes in the domain states 1-4. Figure 4 shows the relationship between measured resistance of the magnetic memory cell 40 and the angle  for each of the domain states 1-4. A set of curves 81-84 represent calculations associated with the domain states 1-4, respectively. The curves 81-84 may be used to select an angle  at which there is an equal change in signal in going from one domain state to another. In an embodiment in which the x and y components of M1 are equal, the selected angle  is 26.6 degrees. Other angles are suitable. For example, angles that are 90 degrees relative to 26.6 degrees. In addition, less optimal angles may be chosen which do not yield equal changes in measured resistance between the domain states 1-4. A selection of 45 degrees for  results in a three state device. This yields fewer states but higher resistance changes between states which may be desirable in some applications. Figure 5 is a top view of a magnetic memory 10 which includes an array of magnetic memory cells comprising the magnetic memory cell 40 along with additional magnetic memory cells 41-43. The magnetic memory 10 also includes an array of conductors 20-21 and 30-31 that enable read and write access to the magnetic memory cells 40-43. The conductors 30-31 are top conductors and the conductors 20-21 are orthogonal bottom conductors. Each of the magnetic memory cells 40-43 has dimensions d x and d y . The logic states of the magnetic memory cells 40-43 are manipulated by manipulating the domain states of their respective data storage layers. These domain states are manipulated by applying electrical currents to the conductors 20-21 and 30-32. For example, an electrical current applied to the conductor 30 in the +x direction causes a magnetic field (H y+ ) in the data storage layer 50 in the +y direction according to the right-hand rule. An electrical current applied to the conductor 30 in the -x direction causes a magnetic field (H y- ) in the data storage layer 50 in the -y direction. Similarly, an electrical current applied to the conductor 20 in the +y direction causes a magnetic field (H x+ ) in the data storage layer 50 in the +x direction, while an electrical current applied to the conductor 20 in the -y direction causes a magmetic field (H x- ) in the data storage layer 50 in the -x direction. These induced magnetic fields H x+ , H x-1 , H y+ , and H y- may be used to alter the directions of the vectors 60-64, thereby changing the domain state of the data storage layer 50 and the logic state of the magnetic memory cell 40. A transition from domain state 1 to domain state 2 may be accomplished with the following procedure. First, apply an H x+ field in order to enable the magnetic memory cell 40. Next, apply an H y+ field to flip the vectors 62 and 64 from the -y to the +y direction. Next, remove the R y+ field. Finally, remove the H x+ field. Many other sequences of the magnetic fields H x+ , H x- , H y+ , and H y- may be used to switch the magnetic memory cell 40.

Claims: A multiple bit magnetic memory cell (40), comprising: data storage layer (50) having a shape which is preselected to provide at least three domain states wherein each domain state corresponds to a particular orientation of magnetization (M1) in the data storage layer (50)wherein the shape is a square including four end regions and an interior region; and reference layer (54) having a fixed orientation of magnetization (M2) which is defined by an angle of orientation () wherein the angle of orientation is preselected to distinguish the domain states of the data storage layer. A magnetic memory , comprising: array of magnetic memory cells (40) as claimed in claim 1; and a set of conductors (20, 21, 30, 31) that enables read and write access to the magnetic memory cells. A magnetic memory as in claim 2, wherein the sequence of external magnetic fields are applied by applying electrical currents to the conductors (20, 21, 30, 31). A magnetic memory as in claim 2 or 3, wherein the conductors (20, 21, 30, 31) include a set of top conductors (30, 31) and a set of bottom conductors (20, 21). A magnetic memory (10) as in claim 4, wherein the sequence of external magnetic fields are applied by applying an electrical current to one of the top conductors (30, 31) and then applying an electrical current to one of the bottom conductors (20, 21) or by applying an electrical current to one of the bottom conductors (20, 21) and then applying an electrical current to one of the top conductors (30, 31). A magnetic memory or multiple bit magnetic memory cell as in any preceding claim, wherein each domain state is defined by a resulting vector from a set of vectors which represent an orientation of magnetization in each end region and an orientation of magnetization in the interior region. A magnetic memory or multiple bit magnetic memory cell as in any preceding claim, wherein the angle of orientation () is selected to distinguish three or four domain states in the data storage layer (50). A magnetic memory or multiple bit magnetic memory cell as in any preceding claim, wherein the angle of orientation () is selected to yield a substantially equal change in a resistance of the magnetic memory cell (40) between domain states. A magnetic memory or multiple bit magnetic memory cell as in any preceding claim, wherein each of a set of logic states of the magnetic memory cell (40) corresponds to a particular one of the domain states of the data storage layer (50). A magnetic memory or multiple bit magnetic memory cell as in claim 9, wherein a particular logic state of the magnetic memory cell (40) is written by applying a sequence of external magnetic fields to cause the data storage layer (50) to switch between the domain states.

Inventors: BHATACHARYYA, BRUG JAMES A, BRUG, JAMES A.
Applicants: HEWLETT PACKARD CO, HEWLETT-PACKARD COMPANY
Application year: 1999
Main classification: G11C11
IPC codes: G11C11