APPARATUS FOR REPRODUCING INFORMATION FROM A RECORD CARRIER

Abstract: The invention relates to an apparatus for reproducing information from a record carrier. The apparatus comprises a read head (6) for reading marks representing the information from a track on the disc shaped record carrier (4). Further, an A/D converter (12, 34) is available for A/D converting the read signal with a specific clock frequency (fs), in response to a control signal (cs1). A bit recovery unit (130) is provided having an input coupled to the A/D conversion means, which bit recovery unit is adapted to retrieve a sequence of bits from the signal applied to its input, with a specific bit frequency (fb). A generator unit for deriving said control signal, as well as a generator for deriving said specific bit frequency is available. The generator unit for deriving said control signal comprises means (132; 134, 84) for deriving from the read signal the control signal which is indicative of the relative velocity of the read head with reference to the marks, so as to generate such specific clock frequency (fs) that roughly N samples per bit are supplied by the A/D conversion means (12, 34), irrespective of the relative velocity of the said at least one read head with reference to said marks.

Description: Apparatus for reproducing information from a record carrier. The invention relates to an apparatus for reproducing information from a record carrier. Such apparatuses are well known in the art. Reference is made in this respect to US Patent Spec. 5,569,912, document Dl in the list of related documents that can be found at the end of this description. The apparatus defined above may be for reading an optical disc, such as the CD or DVD, or may be for reading and writing a writable record carrier. In such an apparatus a reading head generates a read signal from a track on the record carrier, whilst the head is moving relative to the track with a specific velocity. The record carrier is aimed at being rotated during reproduction with a nominal rate inversely proportional to the radial position of the read head, so that an information signal with a substantially constant bitrate can be recovered from a record carrier recorded with a constant density. When information is to be retrieved from different parts of the disc the reading head is moved radially at high speed, called a jump, and the rotation rate has to be adapted correspondingly to achieve said specific velocity. The adaption of the rotation rate causes delays and requires a strong motor. The invention aims at providing a reproducing apparatus which is more versatile and is capable of reading information from the record carrier at various speeds. In accordance with the invention, the apparatus for reproducing information from a record carrier, which information comprises a sequence of bits being represented by marks in a track on the record carrier, comprises - reading means for reading marks from the track, the reading means comprising a read head for generating a read signal from said track, - A/D conversion means for A/D converting the read signal with a specific clock frequency, in response to a first control signal, - bit detector means having an input coupled to the A/D conversion means, which bit detector means is adapted to retrieve the sequence of bits from the signal applied to its input, with a specific bit frequency, and means for deriving said specific bit frequency, - output means for supplying the sequence of bits, - deriving means for deriving said first control signal, and is characterized in that the deriving means comprises means for deriving from the read signal a second control signal which is indicative of the relative velocity of the read head with reference to the marks, and means for outputting the first control signal in dependence of the second control signal. The invention has the effect that the A/D converter and further digital elements, such as an equalizer and bitdetector means, operate with a substantially fixed ratio between the specific clock frequency and the bit frequency. It is advantageous, that the first control signal is derived from a speed dependent parameter of the read signal itself, as the parameter in the read signal corresponds to the actual speed of the read head with respect to the recorded marks. This results in a reliable recovery of the bit frequency over a wide range of speeds, allowing a fast start of the data recovery following a jump. In addition the invention is advantageous in that the rotation rate may be adapted more slowly, which results is less strict requirements on the drive motor and the power consumption due to accelerating and braking the disc. When jumps are performed with short intervals the apparatus operates effectively with a substantially constant rate of rotation (Constant Angular Velocity, CAV), whereas when relatively large amounts of date are read the apparatus operates with a substantially constant linear velocity (CLV) of the head relative to the track, because the speed of rotation is slowly adapted according to the CLV speed range, i.e. inversely proportional to the radial position of the read head. This has the advantage, that the apparatus adapts itself to the type of application, i.e. having a short access time for applications with many random jumps and having a constant specific bit frequency when reproducing large amounts of information. A preferred embodiment is characterized in that the deriving means further comprises means for deriving a third control signal which has a relationship with the bit frequency, and in that the means for outputting the first control signal are arranged for outputting the first control signal in dependence of the second control signal and the third control signal. This results in that said ratio is controlled to be substantially a value N. This is realized by two control loops, one coarse control loop and a fine control loop. The coarse control loop generates the second control signal and controls the said specific clock fre- quency in such a way that the A/D converter supplies a substantially fixed number of N samples per bit to be detected, irrespective of the relative velocity of the read head with reference to the track. The fine control loop generates the third control signal and controls said specific clock frequency so as to correct for the deviation of the specific clock frequency, expressed in number of samples per bit, from the value of N samples per bit. As a result, although the means for deriving said specific bit frequency may have a small capture range, the apparatus will very quickly control towards the N samples per bit situation. These and other aspects of the invention will be apparent from and elucidated with respect to the embodiments described hereafter in the figure description, in which figures 1 and 2 show an embodiments of the apparatus, figure 3 shows an embodiment of the apparatus in more detail, figure 4 shows the addition of an output buffer to the apparatus of figure 3, figure 5 shows another embodiment of the A/D converter in the apparatus of figure 1 , 2 or 3 figure 6 shows an embodiment of the equalizer unit in the apparatus of figure 1, 2 or 3 figure 7 shows the magnitude characteristic as a function of frequency of the information signal read from the record carrier, for two different speeds of the record carrier during reproduction, figure 8 shows the filter curve of the equalizer unit as a function of frequency, for the same two different speeds of the record carrier, figure 9 shows the capture range of the phase locked loop in the apparatus of figure 3. Figure 1 shows an embodiment of the reproducing apparatus in accordance with the invention. The apparatus comprises a read head 6 for reading the information from a record carrier 4 via a radiation beam 42, such as a laser beam guided via an optical system and the marks in the track to a detector. An output of the read head 6 is coupled to an input of an A/D convener 12, which has an output 14. The A/D converter 12 samples the information read from a track on the record carrier 4 with a specific clock frequency (or sampling frequency) f s and supplies samples of the information signal with said specific clock frequency at its output 14. The record carrier 4 is rotated by a motor 48, which is controlled via a rotation control signal 46. The apparatus is generally provided with an equalizer unit 16. The equalizer unit 16 is however not strictly necessary for explaining the invention, so could be left out or substituted by other digital signal processing means for recovering the information signal. An input of the equalizer unit 16 is coupled to the output 14 of the A/D converter 12 and an output of the equalizer unit 16 is coupled to an input of a bit recovery unit 130. The bit recovery unit 130 comprises a generator circuit for generating the bit frequency f b , such as a PLL and a bit detector unit. The bit detector unit is adapted to retrieve a sequence of bits from the input signal, with a specific bit frequency f b . An output 26 of the bit recovery unit 130 is coupled to an output unit 101, which controls the output of data. Data may be requested by an external device or may be given out at a predetermined rate. Output unit 101 controls the rotation rate of the motor 48 via the rotation control signal 46 and the position of the read head via a control signal 56 such that the requested amount of data is retrieved. When no data is required the read head may be controlled to jump back one or more tracks. The apparatus further comprises velocity deriving means 132 for deriving from the information signal read from the record carrier a second control signal cs2 which is indicative of the relative velocity of the read head with reference to marks on the record carrier 4 representing the information signal. Said velocity may be derived from certain frequency components in the spectrum of the read signal. For a record carrier on which the marks comprise marks of different lengths, the velocity deriving means 132 are arranged for deriving the second control signal (cs2) in dependence of the average length of signal portions in the information signal corresponding to said marks. For example in the well known CD an channel code called EFM is used having marks of a runlength of 3 to 11, and an average runlength of 5. A similar channel code is used for DVD. The average runlength is a suitable indicator of said velocity. Alternatively the shortest and/or the longest marks may be identified in the read signal, and the respective lengths or their difference may be used as an indicator of the velocity. The second control signal cs2 is converted to control signal csl and coupled to a f s generator 34, which may be a Voltage Controlled Oscillator (VCO), for generating the specific clock frequency f s . The control signal cs2 may be combined with a third control signal cs3 supplied by the bit recovery unit 130 via a combination unit 84 for outputting the first control signal. The third control signal cs3 indicates the deviation of the number of samples per bit from a target value of number of samples per bit. Figure 2 shows a further embodiment of the reproducing apparatus in accordance with the invention. Like the embodiment described above with reference to Figure 1 the apparatus comprises a motor 48, a read head 6, an A/D converter 12, a bit recovery unit 130, an output unit 101, a f s generator 34 and optionally an equalizer unit 16 and/ or a combination unit 84. The apparatus further comprises distance deriving means 134, as a further embodiment of the velocity deriving means, for deriving from the read signal from the record carrier a second control signal cs2 which is indicative of the relative velocity of the read head with reference to servo marks in the track on the record carrier 4. Servo marks are detected in the read signal itself or derived from the read head via a different combination of detector signals, such as from a quadrant detector commonly used for deriving servo signals. The detection signal or servo signals are coupled to the input of the distance deriving means, either in analog form or after digitalization. From the servo signals the time interval between servo marks is determined by the distance deriving means 134. A velocity value is based on the known distance of servo marks on the respective type of record carrier and the measured time interval, and the velocity value is converted into control signal cs2. The control signal cs2 is outputted to the combination means 84 to be converted into control signal csl. The velocity value may be averaged to prevent sudden fluctuations of the control signals. The type of servo marks is dependent on the respective record carrier. The servo marks may be radial variations of the track position, usually called wobble, and/or headers and/or pre-pits and/or fine clock marks at a predetermined distance between said marks. Track wobble is commonly used in CD-R, in particular a modulation of the wobble is used to indicate address information. Headers are commonly used in discs for data storage, for example in DVD-RAM, in which the distance between headers is a predetermined number of bits. Pre-pits are used for servo control or header on writable discs, such as DVD-R, and also have a predetermined distance. Fine clock marks are a specific type of track variation used in combination with wobble, and having a significant different shape than the wobble, e.g. the fine clock marks have a relatively high spatial frequency whereas the other wobbles have a relatively low spatial frequency. In this case the distance deriving means 134 have wobble detection means and means for detecting the different shape of the fine clock marks. The number of bits between servo marks may also be dependent on the radial position on the disc. The actual number of bits is then calculated based on a radial position indicator, such as on a track number or a zone number, which may be retrieved from the headers or the modulated wobble. The distance deriving means are arranged for deriving the second control signal (cs2) in dependence of parameters of the servo signals corresponding to said marks indicating said distance. Figure 3 shows a detailed embodiment of the reproducing apparatus in accordance with the invention. The apparatus comprises a reading unit 2 for reading the information from a record carrier 4. The reading unit comprises at least one read head 6 and generally also a pre amplifier 8. An output of the reading unit 2 is coupled to an input 10 of an A/D converter 12, which has an output 14. The A/D converter 12 samples the information read from a track on the record carrier 4 with a specific clock frequency (or sampling) f s and supplies samples of the information signal with said specific clock frequency at its output 14. The apparatus is generally provided with an equalizer unit 16. The equalizer unit 16 is however not strictly necessary for explaining the invention, so could be left out or substituted by other digital signal processing means for recovering the information signal. An input 18 of the equalizer unit 16 is coupled to the output 14 of the A/D converter 12 and an output of the equalizer unit 16 is coupled to an input 22 of a bit detector unit 24. An output 26 of the bit detector unit 24 is coupled to an output terminal 28. The bit detector unit 24 is adapted to retrieve a sequence of bits from the signal applied to its input 22, with a specific bit frequency f b . The apparatus further comprises a generator circuit 30 for generating the bit frequency f b and a generator circuit 32 for generating the clock frequency f s . The generator circuit 32 is a phase locked loop and comprises a phase comparator 70, a loop filter 72 and a voltage controlled oscillator 74. A first input of the phase comparator 70 is coupled to the output of the equalizer unit 16 and a second input of the phase comparator 70 is coupled to the output of the oscillator 74. An output of the phase comparator 70 is coupled to an input of the loopfilter 72, which has an output coupled, via a signal combination unit 76 to an input of the oscillator 74. The output of the oscillator 74 is further coupled to a clock input of the bit detector 24. It should be noted that the generator circuits 30 and 32 function such that they generate frequencies f b and f s respectively, such that f s /f b =N, where N is a constant, not necessarily an integer constant, irrespective of the relative speed of the head 6 with reference to the track on the record carrier which is read out. The value N stands for the number of samples per bit, to be detected by the bit detector unit 24, and generated by the A/D converter 12. The A/D converter 12 converts the information signal read from the record carrier with said specific clock frequency f s , in response to a first control signal csl. In the present embodiment, this clock signal is generated by a voltage controlled oscillator 34, which is part of the loop 32 and supplies the clock frequency f s to a clock input 36 of the A/D converter 12. The clock frequency f s is also supplied to a clock input 80 of the equalizer unit 16 and to a converter 82. The converter 82 is in the form of a frequency divider and divides the frequency f s supplied to its input by N and supplies a frequency f s /N to its output. This output is coupled to another input of the signal combination unit 76. A drive motor 48 is provided for rotating the disc-shaped record carrier 4 in a direction indicated by the arrow 44. The motor is controlled by a control signal 46. The control signal 46 may be derived from the signal read by the read head based on information marks or servo marks on the record carrier. The control signal 46 may alternatively be based on the amount of data required, e.g. derived from a data buffer system as shown in Fig 4. The read head is positioned in radial direction by a radial control signal 56 generated in customary way. The apparatus is provided with a converter 60, which generates a second control signal cs2 in response to a parameter of the read signal. The second control signal cs2 is a measure of the relative velocity of the read head 6 with reference to the marks representing the information signal or servo information indicative of the position of the track on the disk, as described with reference to Figures 1 and 2. The second control signal cs2 is supplied to an input 82 of a signal combination unit 84. Via a second input 86 of the combination unit 84, a third control signal cs3 is supplied. This third control signal cs3 is the output signal of the loop filter 72 in the PLL 30. The apparatus may be further provided with convertor means 50 for deriving a fourth control signal (cs4), which is connected to the combination unit 84. The motor 48 may be provided with a tacho generator which supplies tacho pulses via the line 58 towards the converter 50. The convertor 50 also receives the position control signal 56, and converts the radial position and the rotation rate into a value of the fourth control signal (cs4) which is a measure of a nominal relative velocity of the read head with reference to the record carrier at said rotation rate and radial position. The nominal velocity may be calculated from the actual measured rotation rate and radial position, or may be set to a target value in the event of a jump to a different part of the track, the target value being based on the radial position and/or rotation rate on arrival. The combination unit (84) is arranged for outputting the first control signal also in dependence of the fourth control signal, e.g. by adding the signal to the second control signal (cs2). Alternatively combination unit 84 may be arranged for coupling the fourth control signal instead of the second control signal in dependence of a condition of the apparatus, such as in a period when no information signal is available from the read head or when the read head is moved radially across the tracks for accessing a different part of the track. The functioning of the apparatus will now be described in greater detail. It is assumed that the record carrier is driven at a specific rotation rate and radial position, resulting in a linear speed \ As a result, servo mark pulses are detected and supplied to the o converter 60, which generates a second control signal cs2 in response thereto. The second control signal cs2 is supplied to the oscillator 34 via combination unit 84 and results in the generation of a clock frequency f s , which is supplied to the A/D converter 12. In response thereto, the A/D converter 12 samples the information signal read from the record carrier such that roughly N samples per bit to be detected are generated. When the record carrier linear speed changes, either increases or decreases, the frequency of the servo pulses generated increases or decreases. As a result, the clock frequency f s increases or decreases. With an increased (decreased) record carrier speed, however, the information signal is read out with an increased (decreased) speed and this information signal is sampled with an increased (decreased) clock frequency f s , so that, in the end, again roughly N samples per bit to be detected are generated by the A/D converter 12, irrespective of the record carrier speed. The control loop, formed by the elements 48, 60, 34 thus constitutes a coarse control loop, such that at the output of the A/D converter 12, roughly a fixed number (N) of samples per bit to be detected is generated. N could, as an example be chosen equal to 3. The equalizer unit 16 also receives the clock frequency f s . Figure 6 shows an example of an embodiment of the equalizer unit 16, figure 7 shows an example of the magnitude characteristic Mj as a function of frequency, of the information signal read from the record carrier at said specific speed vi and figure 6 shows by the curve Hr the frequency characteristic of the equalizer unit 16 at said specific record carrier speed Vi . The magnitude characteristic M j has a certain magnitude Mj(f b ) the bit frequency f b . The delay elements denoted T in the equalizer unit of figure 6 are controlled by the clock frequency f s and realize a delay T which equals l/f s . With this delay, the equalizer unit 16 of figure 4 realizes the frequency characteristic Hi in figure 8. When changing the record carrier speed, such as decreasing the speed by a factor of 2, the magnitude characteristic of the signal read from the record carrier scales down by a factor of 2, so that it changes into the characteristic M 2 shown in figure 7. The magnitude M 2 (f b ') at the new bit frequency f b ', is equal to M,(f b ). Because of the control loop formed by the elements 48, 60 and 34, the clock frequency f s is changed (decreased) with the same ratio of 2. As a result, the delays in the equalizer unit of figure 6 change, in the sense that their delay increases by this same factor of 2. This results in the frequency characteristic H 2 in figure 8. This characteristic H 2 has thus been scaled down to the same extent as the magnitude characteristic M 2 of the information signal read from the record carrier. The functioning of the equalizer unit 16 is thus such that, again irrespective of the record carrier speed, the equalizer unit 16 correctly equalizes the signal read from the record carrier, under the control of the clock frequency f s generated by the oscillator 34. The converter unit 82 generates a control signal at its output which is supplied via the combination unit 76 to the oscillator 74 so as to position the oscillator unit 74 at the frequency f s /N. It should be noted that the PLL 30 controls the frequency of the oscillator 74 towards f b . The PLL 30, however, has a small capture range of, eg. 10 % smaller or larger than f b , see figure 9. Using the control signal, applied via the line 90 and the signal combination unit 76 to the VCO 74, this VCO 74 is quickly brought into the vicinity of f b , such as indicated by the line 92 in figure 7. Without the fine control, using the control signal cs3, to be described later, the VCO 74 will maintain the frequency value f b " and a disturbance, eg. caused by a variation in the speed of the record carrier will bring the frequency out of the capture range of the loop 30, as shown by the curve 92 in figure 9, so that the PLL 30 is out of lock. The phase comparator 70 and loopfilter 72, however, generate a control signal, which is the control signal cs3, which is a measure of the deviation of the frequency of the VCO 74 from the required bit frequency f b . It should be noted here, that the required bit frequency f b is not a fixed frequency value, but varies with varying record carrier speed. This control signal cs3 is supplied to the second input 86 of the signal combination unit 84. This control signal cs3 is a fine control signal and controls the frequency of the VCO 74 towards the required bit frequency f b . This is shown by the line 94 in figure 9. A disturbance, eg. caused by a variation in the speed of the record carrier, will result in a variation in the frequency of the VCO 74. This variation however is kept within the capture range of the loop 30, as shown by the curve 94 in figure 9, so that the PLL 30 remains in a locked situation. Figure 4 shows a buffer memory 100 that can be coupled to the output terminal 28 of the apparatus of figure 3. The buffer memory 100 functions as a FIFO memory. The sequence of bits detected by the bit detector 24 can be stored in the buffer memory with a specific frequency f^, which will equal the frequency f b , generated by the oscillator 74. The detected bits can be retrieved from the buffer memory 100 using a read out clock frequency f out . This frequency f out can be smaller or larger than f^. In the former case, the buffer memory 100 will gradually be filled with information, resulting in an overflow. In the latter case, the buffer will gradually be emptied, until no bits are available anymore for supply with the required rate of f out . In order to overcome these problems, the buffer memory 100 is provided with an output 102, at which output 102 a signal is available which is indicative of the filling degree of the buffer memory 100. This signal is converted into a control signal in a converter 104, and supplied to a motor control unit 106. The motor control unit 106 supplies drive signal 46 to the motors 48. When f out is larger than f^, the filling degree decreases. As a result, a control signal is generated such that the transport speed of the record carrier 4 is increased. When f out is smaller than f^, the filling degree increases. As a result, a control signal is generated such that the transport speed of the record carrier 4 is decreased. The coarse control loop via the elements 60, 82 and 34 as well as the fine control loop 30, via the elements 70, 72, 82 and 34 adapts itself automatically to the varying transport speed of the record carrier, as explained above. Figure 5 shows another embodiment of the A/D converter unit 12 of figure 1, 2 or 3. The A/D converter unit of figure 5 comprises an A/D converter 110, which receives a sampling frequency generated by an oscillator 112 via a clock input 114. The sampling frequency generated by the oscillator 112 can be higher than f s . The samples generated by the converter 110 are supplied to a down sampler, which down samples the signal supplied to its input 118 in response to the first control signal csl, applied to a control signal input 120. At its output 14, the information signal, sampled at the frequency f s will be available. It should be noted that the down sampler 116 can not only down sample the array of samples applied to its input 118, but can also, if required, carry out an interpolation, so as to obtain its output signal. Whilst the invention has been described with reference to preferred embodiments thereof, it is to be understood that these are not limitative examples. Thus, various modifications may become apparent to those skilled in the art, without departing from the scope of the invention, as defined by the claims. As an example, the control signal cs2 may be derived from synchronisation patterns recorded on the record carrier. Further, in an alternative embodiment, the third control signal cs3 could be generated in a way different from the way described above, namely, from the output 102 of the buffer memory 100. In this alternative embodiment, f out is eg. derived from the element 82, see figure 1, and equals f s /N. The control signal present at the output 102 of the buffer memory 100 is now a measure of the integral of f b -f s /N, and therefore a measure of the integral of the control signal cs 3 . Further, the record carrier may be a longimdinal record carrier, rectangular card- shaped or a disk type record carrier, of the magnetic, magneto-optical or the optical type. Further, the invention lies in each and every novel feature or combination of features. Related documents (Dl) USP 5,569,912 (PHN 14.875)

Claims: CLAIMS: 1. Apparatus for reproducing information from a record carrier (4) , which information comprises a sequence of bits being represented by marks in a track on the record carrier, the apparatus comprising - reading means (6,8) for reading marks from the track, the reading means comprising a read head (6) for generating a read signal from said track, - A/D conversion means (12,34) for A/D converting the read signal with a specific clock frequency (f s ), in response to a first control signal (csl), - bit detector means (130;24) having an input coupled to the A/D conversion means, which bit detector means is adapted to retrieve the sequence of bits from the signal applied to its input, with a specific bit frequency (f b ), and means (130;30) for deriving said specific bit frequency, - output means (101 ;28) for supplying the sequence of bits, - deriving means for deriving said first control signal, characterized in that the deriving means comprises means (132; 134) for deriving from the read signal a second control signal (cs2) which is indicative of the relative velocity of the read head with reference to the marks, and means (84) for outputting the first control signal in dependence of the second control signal. 2. Apparatus as claimed in claim 1, wherein the deriving means further comprises means (130; 70, 72) for deriving a third control signal (cs3) which has a relationship with the bit frequency, and wherein the means (84) for outputting the first control signal are arranged for outputting the first control signal in dependence of the second control signal and the third control signal. 3. Apparatus as claimed in claim 1 or 2 for reproducing information from a record carrier on which the marks comprise marks of different lengths, wherein the deriving means (132) are arranged for deriving the second control signal (cs2) in dependence of the average length of signal portions in the read signal corresponding to said marks. 4. Apparatus as claimed in claim 1, 2 or 3 for reproducing information from a record carrier on which the marks comprise servo marks indicative of a position of the read head relative to the record carrier or to the track, wherein the deriving means (134) are arranged for deriving the second control signal (cs2) in dependence of signal portions in the read signal corresponding to said servo marks. 5. Apparatus as claimed in claim 4, the servo marks comprising track variations and/or headers and/or pre-pits and/or fine clock marks at a predetermined distance between said marks, wherein the deriving means are arranged for deriving the second control signal (cs2) in dependence of signal portions in the read signal corresponding to said distance. 6. Apparatus as claimed in claim 5 for reproducing information from a discshaped record carrier, wherein the deriving means comprise means for calculating the predetermined distance in dependence of an indicator of a radial position of the read head, such as a track number. 7. Apparatus as claimed in any one of the claims 1, 2, 3, 4, 5 or 6 for reproducing information from a disc-shaped record carrier, wherein the deriving means comprises means (50) for deriving a fourth control signal (cs4) based on a rotation rate of the disc and a radial position of the read head, which fourth control signal is a measure of a nominal relative velocity of the read head with reference to the record carrier at said rotation rate and radial position, and wherein the means (84) for outputting the first control signal are arranged for outputting the first control signal also in dependence of the fourth control signal and/or arranged for coupling the fourth control signal instead of the second control signal in dependence of a condition of the apparatus, such as in a period when no read signal is available from the read head or when the read head is moved radially across the tracks for accessing a different part of the track. 8. Apparatus as claimed in any of the preceding claims, wherein the apparatus further comprises voltage controlled oscillator means (34) for generating said specific clock frequency in response to said first control signal (csl). 9. Apparatus as claimed in any of the claims 1 to 8, wherein the A/D conversion means further comprises a downsampler means (116) for generating sample values at said specific clock frequency in response to said first control signal (csl). 10. Apparatus as claimed in any of the claims 1 to 9, wherein digital equalizer filter means (16) are provided for carrying out an equalization step on the digitized read signal so as to obtain an equalized information signal, with said specific clock frequency. 11. Apparatus as claimed in any of the claims 1 to 10, wherein the deriving means is adapted to generate such first control signal that the specific clock frequency and the bit frequency are in a substantially fixed ratio N to each other, where N is a positive constant value. 12. Apparatus as claimed in claim 11, wherein the deriving means signal comprises coarse control signal generator means (60) for deriving a coarse control signal so as to generate such specific clock frequency (f s ) that roughly N samples per bit are supplied by the A/D conversion means (12), irrespective of the relative velocity of the said at least one read head with reference to the said track, and fine control signal generator means (30,70,72) for deriving a fine control signal (cs3) so as to correct for the deviation of the specific clock frequency, expressed in number of samples per bit, from the value of N samples per bit.

Inventors: VAN DEN ENDEN GIJSBERT J, VAN DEN ENDEN, GIJSBERT, J.
Applicants: KONINKL PHILIPS ELECTRONICS NV, PHILIPS SVENSKA AB, KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS AB
Application year: 1999
Main classification: G11B27
IPC codes: G11B19, G11B20, G11B27