Electronic equipment with external memory storing a correction program

Abstract: A data transfer unit (15) is connected with an external nonvolatile memory (16) storing a correction program and the like data, and it transfers the correction program, etc. of the external nonvolatile memory to an internal nonvolatile memory (14) upon detecting it having been connected with the external nonvolatile memory. The external nonvolatile memory is disconnected from the data transfer unit after completion of the data transfer. When a CPU unit (13) is reset thereafter, it transfers the correction program, etc. to a RAM unit (12), executes a program in a ROM unit (11), and also executes the correction program in the RAM unit upon reaching a correcting point stored in the RAM unit.

Description: FIELD OF THE INVENTION The present invention relates to electronic equipment provided with a microprocessor, such as a video tape recorder and the like apparatuses. BACKGROUND OF THE INVENTION In the past, most of electronic equipment have been such that various kinds of control are executed according to a program written in a microprocessor and a read-only memory unit. Fig. 5 shows an example of the electronic equipment of the prior art. A read-only memory unit 51 (hereinafter simply referred to as ROM 51) stores a program for operating a central processing unit 53 (hereinafter simply referred to as CPU 53). A random-access memory unit 52 (hereinafter simply referred to as RAM 52) is stored with a ROM correction data (hereinafter referred to as RCD) consisting of the following: (1) a program for correcting the program stored in the ROM 51; (2) a point of correction, which is a locative information of a point for initiating an execution of the correction program; and (3) a version number of the correction program. The CPU 53 executes the correction program stored in the RAM 52 when it reaches the point of correction (hereinafter simply referred to as correcting point), which is the locative information of a point for initiating an execution of the correction program in the RAM 52, while also executing the program stored in the ROM 51. An internal nonvolatile memory 54 (hereinafter simply referred to as memory 54) stores the RCD, and transfers the RCD to the RAM 52 according to a command of the CPU 53. The electronic equipment of the prior art constructed as foregoing operates in a manner which will be described hereinafter. Initially, the RCD is not stored in the memory 54. If the RCD is stored in the memory 54 under the above circumstance, the ROM 51 shall have a program in advance for proceeding with transferring the data to the RAM 52 in time with a resetting of the CPU 53. Since the RCD is not stored in the memory 54 in the case of the present example, no RCD is present for being transferred to the RAM 52. Therefore, the CPU 53 operates only in accordance with the program stored in the ROM 51. In case if any problem is found in the program stored in the ROM 51 after the electronic equipment is completed, the memory 54 is replaced with another nonvolatile memory stored with an RCD for correcting the problem. Hence, the CPU53 transfers the RCD stored in the replaced memory 54 to the RAM 52 in time with a resetting of the CPU 53. Therefore the CPU 53 executes the program in the ROM 51. The CPU 53 also executes the correction program in the RAM 52, when it reaches a correcting point stored in the RAM 52. In this way, the problem in the program stored in the ROM 51 can be corrected. Generally, the ROM 51 has a larger memory, and takes a longer lead-time as compared to the memory 54. Therefore, it is more expedient both in cost and time to replace the memory 54 than the ROM 51. Also, the removed memory 54 can be reused again, since it is rewritable (thereby reducing the cost). In the foregoing electronic equipment of the prior art, however, it is necessary that the equipment be disassembled for replacement of a component in order to correct the program stored in the ROM 51. It has been a problem of costing much labour for the above reason. Reference is made to EP-A-0458559, which describes a mask-programmable microprocessor of the kind incorporating a ROM containing its program and a program counter for sequentially addressing the ROM to read out the program. The processor is provided with a patch implementation module for use in correcting errors discovered in the ROM program. The patch implementation module comprises a first address register for containing an address in the ROM just before that of the start of the program fragment containing the error, a second address register containing the address of the start of an additional program fragment which corrects the error and which is entered in a RAM associated with the microprocessor, e.g. from non-volatile memory on power-up, and a comparator which is responsive to the program counter reaching the address in the first register to load the address in the second register into the program counter. The additional program fragment is therefore sequentially addressed in place of the erroneous one, and is then arranged to restore the microprocessor to its normal address sequence at a point beyond the erroneous program fragment. Although not directly relevant to the field of the present invention, reference is also made to IBM Technical Disclosure Bulletin, Vol. 29, No. 7, December 1986, p.2877-2878, "Circuits to allow cartridge hot-plugging". Circuitry is described for allowing a data cartridge (e.g. containing a program or data in a non-volatile memory) to be inserted or removed in a terminal without disrupting terminal operation. Buffer circuits are included to isolate the cartridge connector from the address/data/control busses to which it is logically connected. An interrupt is generated when the cartridge is inserted or removed. Reference is also made to JP-A-03 269 725 which describes automatic updating of a program by comparing the version numbers of a program for execution and a program for updating with each other, and performing the updating processing only if the version number of the updating processing is the larger. SUMMARY OF THE INVENTION Aspects of the invention are defined in the claims. In the preferred embodiment, if any problem is found in the program stored in the ROM unit after the electronic equipment is completed, an RCD for correcting the problem is prepared, and the RCD is stored in the external nonvolatile memory separate from the electronic equipment. The external nonvolatile memory is then connected to the connector equipped in the electronic equipment. The version number of the RCD is read from the external non-volatile memory, and is displayed together with the version number of the current program in the internal memory for comparison. The user can input a command, and the data transfer unit connected with the connector transfers the RCD stored in the external nonvolatile memory to the internal nonvolatile memory at a command of the CPU unit. In this way, the electronic equipment of the present invention composed as above can readily update the RCD in the internal nonvolatile memory without disassembling the equipment. The CPU unit is subsequently reset by unplugging and plugging the AC supply plug, or by turning off and on the power supply to the electronic equipment. The CPU unit transfers the RCD stored in the internal nonvolatile memory to the RAM unit by this resetting operation. The CPU unit executes the program in the ROM unit as well as the correction program in the RAM unit, as it reaches the correcting point stored in the RAM unit. The problem of the program stored in the ROM unit can be corrected in this manner. Accordingly, the electronic equipment of the present invention is able to make a correction of the program stored in the ROM unit easily without disassembling the equipment, as has been required with the prior art equipment. BRIEF DESCRIPTION OF THE DRAWINGS In the following, Figs. 3 and 4 illustrate specific embodiments of the invention; Figs. 1 and 2 illustrate other technical examples for additional information. Fig. 1 is a block diagram depicting a structure of electronic equipment of a first example; Fig. 2 is a block diagram depicting a structure of electronic equipment of a second example; Fig. 3 is a block diagram depicting a structure of electronic equipment of a third example (an embodiment of the present invention); Fig. 4 is a block diagram depicting a structure of electronic equipment of a fourth example (an embodiment of the present invention; and Fig. 5 is a block diagram depicting a structure of electronic equipment of the prior art. DESCRIPTION OF THE PREFERRED EMBODIMENTS Exemplary embodiments of the present invention will now be described by referring to the accompanied figures (Figs. 3 and 4). (First Example-Not forming part of the Invention) Fig. 1 is a block diagram depicting a structure of electronic equipment of a first example A ROM unit 11 (hereinafter simply referred to as ROM 11) stores a program for operating a CPU unit 13 (hereinafter simply referred to as CPU 13). A RAM unit 12 (hereinafter simply referred to as RAM 12) is stored with an RCD composed of a program for correcting the program in the ROM 11, a correcting point, and a version number of the correction program. The CPU 13 executes the correction program in the RAM 12 when it reaches a correcting point stored in the RAM 12, while executing the program of the ROM 11 at the same time. An internal nonvolatile memory 14 (hereinafter simply referred to as memory 14) stores the RCD, and transfers the RCD to the RAM 12 at a command of the CPU 13. When an external nonvolatile memory 16 (hereinafter simply referred to as memory 16) storing an RCD is connected to a connector 100, a transfer unit 15, which is also connected with the connector 100, transfers the RCD to the memory 14 by detecting the connection. The transfer unit 15 transfers the data only if the RCD is stored in the memory 16. The electronic equipment of the first example constructed as above operates in a manner, which is described hereinafter. An assumption is made that an RCD has not been stored initially in the memory 14. It is also assumed that the program in the ROM 11 originally includes a process for transferring an RCD to the RAM 12 in time with a resetting of the CPU 13, only if the RCD has been stored in the memory 14. Since the RCD is not stored in the memory 14 in this case, no RCD exists for being transferred to the RAM 12. Thus, the CPU 13 operates only in accordance with the program stored in the ROM 11. In case that any problem is found in the program stored in the ROM 11 after the electronic equipment is completed, an RCD for correcting the problem is prepared, and the RCD is stored in the memory 16 external of the electronic equipment. The memory 16 storing the RCD is then connected to the connector 100 of the electronic equipment. The transfer unit 15 connected with the connector 100 in the electronic equipment detects the connection of the memory 16, verifies whether or not the RCD is stored in the memory 16, and transfers the data in the memory 16 to the memory 14, when storage of the RCD is verified. The memory 16 is then disconnected upon completion of transferring the data from the memory 16 to the memory 14. A method adopted by the transfer unit 15 for detecting the connection of the memory 16 is now described. The transfer unit 15 is connected to the memory 16 and the memory 14 with an internal IC bus bar (hereinafter simply referred to as IIC bus). The transfer unit 15 serves as a master, and the memory 16 and the memory 14 function as slaves, so as to communicate with one another. As one of the characteristics of the IIC bus communication, each device is assigned with a slave address in order to distinguish the individuals in a plurality of the devices connected to a single bus bar. The memory 16 and the memory 14 are also assigned with slave addresses individually. The transfer unit 15 is able to communicate with the memory 16 and the memory 14 individually by designating the slave address for each of the devices. As another characteristic of the IIC bus communication, when the master transmits a slave address, a device that is assigned with that slave address returns an acknowledgement. The data are exchanged in this manner while confirming a certainty of the normal communication. Incidentally, the foregoing operation conforms to an existing standard for the IIC bus communication. Based on the foregoing, an operation of the transfer unit 15 for detecting the connection with the memory 16 is described hereinafter. The transfer unit 15 attempts to read the memory 16 at regular intervals. (since the transfer unit 15 sends a command for the reading operation along with the designated slave address of the memory 16 during these attempts, it never reads the memory 14 accidentally.) Nonetheless, no acknowledgement is returned to it from the memory 16, if the memory 16 is not connected. It is therefore known that the memory 16 is not connected. If the memory 16 is connected, an acknowledgement is returned immediately after the transfer unit 15 sends the slave address. Accordingly, the connection of the memory 16 is verified, and the data can be read subsequently thereafter. As has been described, detection of an acknowledgement returned form the slave device in the IIC bus can determine whether or not the memory 16 is connected. The CPU 13 is then reset by unplugging and plugging the AC supply plug, or by turning off and on the power supply to the electronic equipment. The CPU 13 transfers the RCD stored in the memory 14 to the RAM 12 by this resetting operation. Following the above, the CPU 13 executes the program in the ROM 11 and the correction program in the RAM 12, when it comes to the correcting point stored in the RAM 12. The problem of the program stored in the ROM 11 can be corrected in this manner. Thus, what has been described in the first example is the electronic equipment that is able to easily make a correction of the problem in the program stored in the ROM without disassembling the equipment, by simply connecting the detachable memory 16 storing an external RCD from the outside. In addition, the present method of correction is remarkably superior in respect of lead-time and maintainability, since it requires an extremely easy operation comprising: a first step of connecting an external memory stored with an RCD prepared in advance to the electronic equipment, and transferring the RCD to an internal memory; a second step of disconnecting the external memory from the electronic equipment; and a third step of unplugging and plugging the AC supply plug. As has been described, the first example provides with a noble effect of realizing superior electronic equipment with respect to the cost and maintenance. Although electronic equipment of the prior art has required one external memory storing an RCD for each of the electronic equipment to be corrected, the first example enables one external memory storing an RCD to correct a number of the electronic equipment. Although what has been described is an exemplar in that both the memory 16 and the memory 14 store a single RCD, they can function in the same manner even if they store a plurality of RCDs. (Second Example-Not forming part of the Invention) Fig. 2 is a block diagram depicting a structure of electronic equipment of a second example A ROM unit 21 (hereinafter simply referred to as ROM 21) stores a program for operating a CPU unit 23 (hereinafter simply referred to as CPU 23). A RAM unit 22 (hereinafter simply referred to as RAM 22) is stored with an RCD composed of a program for correcting the program in the ROM 21, a correcting point, and a version number of the correction program. The CPU 23 executes the correction program in the RAM 22 when it comes to. a correction point stored in the RAM 22, while executing the program of the ROM 21 at the same time. An internal nonvolatile memory 24 (hereinafter simply referred to as memory 24) stores the RCD, and transfers the RCD to the RAM 22 at a command of the CPU 23. When an external nonvolatile memory 26 (hereinafter simply referred to as memory 26) storing an RCD is connected to a connector 110, a transfer unit 25, which is also connected with the connector 110, detects the connection, passes an information of the connection to the CPU 23, and transfers the data to the memory 24 at a command of the CPU 23. The transfer unit 25 transfers the data only if the RCD is stored in the memory 26. A comparator unit 27 compares a version number of the correction program stored in the memory 26 and read through the transfer unit 25 with a version number of the correction program read from the memory 24, and delivers a result to the CPU 23. The electronic equipment of the second example constructed as above operates in a manner, which is described hereinafter. An assumption is made that corrections of the ROM 21 of this electronic equipment have previously been made several times in the manner as described in the first example, and the RCD has already been stored in the memory 24. It is also assumed that the program in the ROM 21 originally includes a process for transferring the RCD to the RAM 22 in time with a resetting of the CPU 23, if the RCD has been stored in the memory 24, in the same way as the first example. Let it be supposed that a new problem is found in the program stored in the ROM 21 of the electronic equipment. In the same way as the first example, an RCD for correcting the problem is prepared, and the RCD is stored in the memory 26 external of the electronic equipment. The memory 26 storing the RCD is then connected to the connector 110 of the electronic equipment. The transfer unit 25 connected with the connector 110 detects the connection of the memory 26, and send the fact to the CPU 23. Also, the transfer unit 25 reads a version of the correction program stored in the memory 26, and delivers it to the comparator unit 27. The comparator unit 27 compares the version of the correction program of the memory 26 received from the transfer unit 25 with a version of the correction program stored at that point of time in the memory 24, and delivers a result to the CPU 23. If the version of the correction program in the memory 24 is later than that of the memory 26, the CPU 23 orders the transfer unit 25 not to transfer the RCD in the memory 26 to the memory 24. On the contrary, the CPU 23 orders the transfer unit 25 to transfer the RCD in the memory 26 to the memory 24, if the version of the correction program in the memory 26 is later than that of the memory 24. The transfer unit 25 transfers the RCD in the memory 26 to the memory 24 pursuant to the order. Connection of the memory 26 to the electronic equipment is then disconnected upon completion of transferring the RCD to the memory 24. Subsequently, the problem of the program stored in the ROM 21 is corrected by executing-an operation similar to the first exemplary embodiment. As has been described, the second example provides with a favorable effect enabling a renewal of the ROM 21 with the latest correction program by preventing it from being overwritten with an older correction program due to a human error in the case of making corrections of the ROM 21 many times, in addition to the same effect as the first example enabling an easy corrections of the ROM 21. (Third Example-Forming part of the Invention) Fig. 3 is a block diagram depicting a structure of electronic equipment of a third example, as an embodiment of the present invention. A ROM unit 31 (hereinafter simply referred to as ROM 31) stores a program for operating a CPU unit 33 (hereinafter simply referred to as CPU 33). A RAM unit 32 (hereinafter simply referred to as RAM 32) is stored with an RCD composed of a program for correcting the program in the ROM 31, a correcting point, and a version number of the correction program. The CPU . 33 executes the correction program in the RAM 32 when it comes to a correction point stored in the RAM 32, while executing the program of the ROM 31 at the same time. An internal nonvolatile memory 34 (hereinafter simply referred to as memory 34) stores the RCD, and transfers the RCD to the RAM 32 at a command of the CPU 33. When an external nonvolatile memory 36 (hereinafter simply referred to as memory 36) storing an RCD is connected to a connector 120, a transfer unit 35, which is also connected with the connector 120, detects the connection, passes an information of the connection to the CPU 33, and transfers the data to the memory 34 at a command of the CPU 33. A comparator unit 37 compares a version number of the correction program stored in the memory 36 and read through the transfer unit 35 with a version number of the correction program read from the memory 34, and delivers a result as well as the version number of each of the correction programs to the CPU 33. A display unit 38 shows the version number of the correction program stored in the memory 36 and the version number of the correction program stored in the memory 34 according to a command of the CPU 33. An operation unit 39 orders the CPU 33 to transfer the RCD stored in the memory 36 to the memory 34. The electronic equipment of the third example constructed as above operates in a manner, which is described hereinafter. An assumption is made in the same manner as the second example, that the memory 34 has already stored an RCD, and that the program in the ROM 31 includes a process for transferring the RCD in the memory 34 to the RAM 32 when the CPU 33 is reset. Let it be supposed again that a new problem is found in the program stored in the ROM 31 of the electronic equipment, in the above case. In the same way as the second example, an RCD for correcting the problem is prepared, and the RCD is stored in the memory 36 external of the electronic equipment. The memory 36 storing the RCD is then connected to the connector 120 of the electronic equipment. The transfer unit 35 connected to the connector 120 detects the connection of the memory 36, and send the fact to the CPU 33. Also, the transfer unit 35 reads and delivers a version of the correction program stored in the memory 36 to the comparator unit 37. The comparator unit 37 compares the version of the correction program of the memory 36 received from the transfer unit 35 with a version of the correction program stored in the memory 34 at that point of time, and delivers a result as well as the version number of each of the correction programs to the CPU 33. The CPU 33 orders the display unit 38 to show the version number of the correction program stored in the memory 34 and the version number of the correction program stored in the memory 36. The display unit 38 shows them according to the command of the CPU 33. By referring to the display, a user verified the version of the existing correction program, and inputs a command for the CPU 33 to update version of the correction program by manipulating the operation unit 39, if he determines it necessary. The CPU 33 may accept the command received from the operation unit 39 only if the version of the correction program in the memory 36 is later than that of the memory 34, as a matter of course, and orders the transfer unit 35 to transfer the RCD in the memory 36 to the memory 34. Thus, the transfer unit 35 transfers the RCD in the memory 36 to the memory 34 pursuant to the order. Connection of the memory 36 to the electronic equipment is then disconnected when the RCD is transferred to the memory 34. Subsequently, the problem of the program stored in the ROM 31 is corrected by executing an operation similar to the second example. As has been described, the third example is able to prevent an overwriting with an older correction program by error in the same manner as the second example. Moreover, the user can determine whether or not to update the version (instead of making the determination and execution automatically), as he can confirm the version of the correction program stored at the point in time. Accordingly, it gives an advantage of avoiding an unnecessary renewal of version, in the case of a limited application such as an area where renewal is not necessary. (Fourth Example-Forming Past of the Invenlion) Fig. 4 is a block diagram depicting a structure of electronic equipment of a fourth exemple, as an embodiment of the present invention. A first ROM unit 41 (hereinafter simply referred to as 1st ROM 41) stores a program for operating a first CPU unit 43 (hereinafter simply referred to as 1st CPU 43). A first RAM unit 42 (hereinafter simply referred to as 1st RAM 42) is stored with an RCD composed of a program for correcting the program in the 1st ROM 41, a correcting point, and a version number of the correction program. The 1st CPU 43 executes the correction program in the 1st RAM 42 when it comes to a correcting point stored in the 1st RAM 42, while executing the program of the 1st ROM 41 at the same time. A second ROM unit 411 (hereinafter simply referred to as 2nd ROM 411) stores a program for operating a second CPU unit 413 (hereinafter simply referred to as 2nd CPU 413). A second RAM unit 412 (hereinafter simply referred to as 2nd RAM 412) is stored with an RCD composed of a program for correcting the program in the 2nd ROM 411, a correcting point, and a version number of the correction program. The 2nd CPU 413 executes the correction program in the 2nd RAM 412 when it comes to a correcting point stored in the 2nd RAM 412 while executing the program of the 2nd ROM 411 at the same time, and also stores the RCD delivered from the 1st CPU 43 into the 2nd RAM 412. An internal nonvolatile memory 44 (hereinafter simply referred to as memory 44) stores the RCDs corresponding to the program stored in the 1st ROM 41 as well as the program stored in the 2nd ROM 411. Further, the memory 44 transfers the RCD corresponding to the program stored in the 1st ROM 41 to the 1st RAM 42, and the other RCD corresponding to the program stored in the 2nd ROM 411 to the 2nd CPU 413 via the 1st CPU 43 at a command of the 1st CPU 43. When an external nonvolatile memory 46 (hereinafter simply referred to as memory 46) storing RCDs is connected to a connector 130 of the electronic equipment, a transfer unit 45 detects the connection, passes an information of the connection to the 1st CPU 43, and transfers the RCDs to the memory 44 at a command of the 1st CPU 43. A comparator unit 47 compares a version number for each of the correction programs stored in the memory 46 and read through the transfer unit 45 with a version number for each of the correction programs read from the memory 44, and delivers a result as well as the version of each of the correction programs to the 1st CPU 43. A display unit 48 shows the version number of each of the correction programs stored in the memory 46 and the version number of each of the correction programs stored in the memory 44 at a command of the 1st CPU 43. An operation unit 49 orders the 1st CPU 43 to transfer the individual RCDs stored in the memory 46 to the memory 44. The electronic equipment having a foregoing structure as depicted in Fig. 4 operates in a manner, which is described hereinafter. In the same manner as the third example, an assumption is made that the memory 44 has already stored the RCD. An assumption is also made that the program in the 1st ROM 41 includes a process for transferring the RCD corresponding to the 1st ROM 41 in the memory 44 to the 1st RAM 42, and the RCD corresponding to the 2nd ROM 411 to the 2nd CPU 413 via the 1st CPU 43, when the 1st CPU 43 is reset. Likewise, the program in the 2nd ROM 411 is assumed to include a process for transferring the RCD delivered from the 1st CPU 43 to the 2nd RAM 412. Let it be supposed once again that new problems are found in the program stored in the 1st ROM 41 and the program stored in the 2nd ROM 411 of the electronic equipment, in the above condition. In the same way as the third example, individual RCDs for correcting the problems are prepared, and the RCDs are stored in the memory 46 external of the electronic equipment. The memory 46 storing the RCDs is then connected to the connector 130 of the electronic equipment. The transfer unit 45 connected to the connector 130 detects the connection, and send the fact to the 1st CPU 43. Also, the transfer unit 45 reads and delivers a version of each of the correction programs stored in the memory 46 to the comparator unit 47. The comparator unit 47 compares the versions of the individual correction programs of the memory 46 received from the transfer unit 45 with the versions of the individual correction programs stored at that point of time in the memory 44, and delivers a result as well as the versions of the individual correction programs to the 1st CPU 43. Upon receipt of the information, the 1st CPU 43 orders the display unit 48 to show the versions of the individual correction programs in the memory 44 and the versions of the individual correction programs in the memory 46. The display unit 48 shows them according to the command of the 1st CPU 43. By referring to the display, a user verified the versions of the existing correction programs, and inputs a command for the 1st CPU 43 to update versions of the correction programs by manipulating the operation unit 49, if he determines it necessary. The 1st CPU 43 may accept the command received from the operation unit 49 only if the versions of the individual correction programs in the memory 46 are later than those of the memory 44, as a matter of course, and orders the transfer unit 45 to transfer the individual RCDs in the memory 46 to the memory 44. Thus, the transfer unit 45 transfers the individual RCDs in the memory 46 to the memory 44 pursuant to the order. Connection of the memory 46 to the electronic equipment is then disconnected when the individual RCDs are transferred to the memory 44. Following the above, the 1st CPU 43 is reset by unplugging and plugging the AC supply plug, or by turning off and on the power supply to the electronic equipment. The 1st CPU 43 transfers the RCD corresponding to the program stored in the 1st ROM 41 to the 1st RAM 42, and the other RCD corresponding to the program stored in the 2nd ROM 411 to the 2nd CPU 413, by this resetting operation. The 2nd CPU 413 also stores the RCD delivered from the 1st CPU 43 into the 2nd RAM 412. Subsequently, the 1st CPU 43 executes the program in the 1st ROM 41 and the correction program in the 1st RAM 42, when it comes to the correcting point stored in the 1at RAM 42. The problem of the program stored in the 1st ROM 41 can be corrected in this way. Similarly, the 2nd CPU 413 is able to make correction of the problem in the program stored in the 2nd ROM 411 by executing the program in the 2nd ROM 411 and the correction program in the 2nd RAM 412, when it comes to the correcting point stored in the 2nd RAM 412. As has been described, the fourth example is able to exchange the RCDs among a plurality of the CPUs by utilizing only one transfer unit and one internal memory connected to one of the CPUs, in addition to having the advantages stated in the third exemplary embodiment. The result is a noble effect capable of making correction of programs stored in a plurality of the ROMs that are not even connected to the internal memory.

Claims: A method of making correction of a problem of a program in a ROM unit provided in electronic equipment, the electronic equipment further comprising an internal non-volatile memory for storing a correction program for correcting the program stored in the ROM unit, the method comprising steps of: (1) connecting to the electronic equipment an external non-volatile memory storing a ROM correction data comprising a correction program for the program in said ROM unit, a correcting point, and a version number of the correction program; (2) verifying the connection of said external non-volatile memory, and a storage of the ROM correction data therein by a data transfer unit in said electronic equipment, and communicating the connection state to a CPU unit in said electronic equipment; (3) comparing a version number of the correction program stored in said external non-volatile memory with a version number of the correction program read from said internal non-volatile memory, and communicating the result thereof to said CPU unit; (4) displaying, in response to a command from said CPU unit, the version number of the correction program stored in said external non-volatile memory and the version number of the correction program stored in said internal non-volatile memory; (5) detecting a manual input command, and communicating the manual input command to said CPU unit; (6) ordering said data transfer unit to transfer the ROM correction data in said external non-volatile memory to said internal non-volatile memory in response to a command from said CPU unit; (7) resetting said CPU unit after completion of transferring the ROM correction data to said internal non-volatile memory; (8) transferring the ROM correction data stored in said internal non-volatile memory unit to a RAM unit within said electronic equipment by said CPU unit; and (9) executing the correction program in said RAM unit upon reaching the correcting point stored in said RAM unit. Electronic equipment comprising: (1) a ROM unit (31; 41) storing a program for operating a CPU unit (33; 43); (2) a RAM unit (32; 42) for storing ROM correction data comprising a correction program for correcting the program in said ROM unit (31; 41), a correcting point defining location information of a point wherefrom to initiate execution of said correction program, and a version number of said correction program; (3) a CPU unit (33; 43) for executing said correction program in said RAM unit (32; 42) when the executing position of the program stored in said ROM unit (31; 41) reaches said correcting point stored in said RAM unit; (4) an internal nonvolatile memory (34; 44) for storing said ROM correction data, and transferring said ROM correction data to said RAM unit (32; 42) at a command of said CPU unit (33; 43); (5) a data transfer unit (35; 45) configured for connection to a detachable external nonvolatile memory (36; 46) stored with said ROM correction data from the outside of the electronic equipment without requiring disassembly thereof, wherein said data transfer unit (35; 45) is configured to deliver to said CPU unit information of the data transfer unit (35; 45) having been connected with a said external nonvolatile memory (36; 46) upon detecting the connection, and to transfer said ROM correction data to said internal nonvolatile memory (34; 44) at a command of said CPU unit (33; 43); (6) a comparator unit (37; 47) for comparing a version number of the correction program stored in said external nonvolatile memory and read through said data transfer unit (35; 45) with a version number of the correction program read from said internal nonvolatile memory (34; 44), and delivering a result thereof to said CPU unit (33; 43); (7) a display unit (38; 48) for showing the version number of the correction program stored in said external nonvolatile memory and the version number of the correction program stored in said internal nonvolatile memory pursuant to a command of said CPU unit (33; 43); and (8) an operation unit (39; 49) for inputting a command for said CPU unit (33; 43) to transfer the ROM correction data stored in said external nonvolatile memory to said internal nonvolatile memory (34; 44). The electronic equipment according to claim 2, further comprising a plurality of combinations composed of the CPU units (43, 413, the ROM units (41, 411) and the RAM units (42, 412), and communication means whereby said units are able to exchange the ROM correction data with one another.

Inventors: HIROSE KOJI, SAKAI RYUICHI, HIROSE, KOJI, SAKAI, RYUICHI
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1999
Main classification: G06F11
IPC codes: G06F9