Luminance signal and chrominance signal separating circuit

Abstract: In a signal processing circuit for separating a color video signal into a luminance signal and a chrominance signal, whether the correlation relating to the high frequency component of luminance signal and chrominance signal of color video input signal is high or low before and after one horizontal scanning period is detected by a vertical correlation detecting circuit, and the presence or absence of correlation of the detected output signal in the horizontal scanning line is detected by a horizontal correlation detecting circuit. The output signal of the horizontal correlation detecting circuit before and after one horizontal scanning period is supplied into a logic circuit, and depending on the gate output signal obtained therein, the high frequency component of luminance signal and chrominance signal before and after one horizontal scanning period are processed in an operation processing circuit, and a chrominance signal is delivered. Furthermore, this chrominance signal can be obtained through a variable filter circuit capable of changing over the band pass characteristic depending on the output signal of the logic circuit.

Description: The present invention relates to a luminance signal and chrominance signal separating circuit for separating composite color video signal of NTSC color television system into luminance signal and chrominance signal. Such a separating circuit is already known from EP-A-0322890 which discloses a luminance signal and chrominance signal separating circuit comprising: a band pass filter for obtaining a first signal by passing a predetermined bandwidth of a color video signal, a first 1H delay circuit for delaying said first signal by one horizontal scanning period for obtaining a second signal, thereby taking out a chrominance signal from said first signal and second signal; a correlation detecting circuit for detecting the vertical correlation between said first signal and second signal; a second 1H delay circuit for delaying the output signal from said correlation detecting circuit by one horizontal scanning period; a first logic circuit for receiving the output signal from said correlation detecting circuit and the output signal from said second 1H delay circuit, and performing a logical operation; and an operation processing circuit for receiving said first signal and second signal, and taking out a chrominance signal from the difference between said first signal and second signal or from the first signal only, depending on the output signal of said first logic circuit. Document JP09037291A already discloses a 2-line YC (luminance/chrominance) separator circuit. From document JP04150595A it is already known to separate a luminance signal from a chrominance signal by cutting the output of different band-pass filters as the chrominance signals corresponding to the detection result of a correlation detection circuit, and supplying them to a first adder. A composite video signal of NTSC system is composed by superposing a chrominance signal on a luminance signal in an interleaving relation. It hence requires a process of separating the two signals, but if a chrominance signal component is mixed in the separated luminance signal, it appears as dot interference (caused by chrominance signal) on the screen, or if a luminance signal component is mixed in the chrominance signal, it results in cross color interference, and it is therefore ideal to separate them without causing such mixing. As a method of separating, recently, it is the mainstream to separate by a comb filter using a 1H (H being a horizontal scanning period) delay circuit. Fig. 6 is a schematic diagram showing an example of signal processing circuit for separating a composite video signal of a conventional NTSC color television system into luminance signal and chrominance signal (hereinafter called Y/C separation). In Fig. 6, a video signal 701 is entered, and is fed into a 1H delay circuit CCD HDL 702 of CCD (charge coupled device), and is delayed by a horizontal scanning period, and the 1H delayed signal is delivered from the 1H delay circuit 702 into a subtractor 703. In the subtractor 703, the input video signal 701 is also supplied, it is subtracted in relation to the 1H delayed signal. As known well, since the chrominance signal is inverted in phase, according to the principle of interleaving, in every adjacent scanning line, and therefore if the video signal has correlation between lines, the luminance signals are mutually canceled by the subtraction process, and the component of chrominance signal is separated as the output signal of the subtractor 703. On the other hand, the input video signal 701 is also supplied into a subtractor 704. The subtractor 704 is also provided with a chrominance signal obtained by passing the output signal of the subtractor 703 through a band pass filter circuit BPF 705, and therefore by subtracting this chrominance signal from the video signal 701, only the luminance signal is separated and obtained. This operating function is the principle of separation of luminance signal and chrominance signal by the known comb filter. However, since perfect separation is impossible in the position not having correlation between signals (between lines) before and after 1H, dot interference or cross color interference may occur. Accordingly, by detecting a signal not separated in a comb filter circuit, it is attempted to process so as to decrease such interference. That is, in the prior art in Fig. 6, the output signal of the subtractor 703 is supplied into a low pass filter LPF 711 and a band pass filter BPF 713, and a luminance signal component of lower frequency than the chrominance signal component is taken out from the LPF 711, and a chrominance signal component is taken out from the BPF 713. If there is no correlation in signal between lines, the luminance signal component is issued through the LPF 711, and is put into a YL correlation detecting circuit 712, and a signal showing absence of correlation is issued from the YL correlation detecting circuit 712. On the other hand, if the entered video signal has a chrominance signal, a chrominance signal component is issued from the BPF 713, and is put into a chrominance detecting circuit 714. This chrominance detecting circuit, if the chrominance signal component is entered, issues a signal showing its detection. Between thus obtained no-correlation detection signal and the detection signal of chrominance signal, the AND(logical operation) is calculated in an AND circuit 715. By the output signal of the AND circuit 715, switch operations of trap circuit 707. and switch circuit 706 are controlled. That is, if there is no correlation in signal between lines and a chrominance signal is present, a switch 708 of the trap circuit is closed, and the chrominance signal component superposed on the luminance signal is removed by the trap effect, so that the dot interference is lessened. At this time, the switch circuit 706 operates so that a chrominance signal may be directly obtained from the video input signal 701. However, since the chrominance signal is detected directly from the signal obtained from the output signal of the subtractor 703 in Fig. 6 through the BPF 713, if there is no correlation between lines, a luminance signal component is present in the output signal of the subtractor 703, and hence the precision of chrominance signal detection is lowered. Accordingly, depending on the pattern of the image, the Y/C separation may not be realized at high precision. To enhance the precision further, in a prior art, for example, the luminance signal obtained in the comb filter circuit is passed again through other comb filter circuit, and presence or absence of chrominance signal component contained in the luminance signal is detected (not shown in a drawing). In this case, however, one more 1H delay circuit for color video signal is needed, and the cost is increased. If there is no correlation in signal between lines, as mentioned above, since a luminance signal component is contained in the chrominance signal obtained from the output signal of the subtractor 703 in Fig. 6, it is passed through the band pass filter circuit BPF 705, and the cross color interference is lessened. Although such filter circuit can lessen the cross color interference in the narrower band characteristic, the transient characteristic of chrominance signal is impaired, and the response of chrominance signal is sacrificed in the signal high in correlation between lines and free from cross color interference. It is the object of the present invention to provide an improved luminance signal and chrominance signal separating circuit which overcomes the above problems. This object is met by the features of claim 1. According to the invention, whether the color video signal has a correlation before and after one horizontal scanning period, or not having correlation, by detecting the absence of correlation at high precision, the signal processing circuit capable of separating into luminance signal and chrominance signal can be presented. According to the present invention if there is no correlation in the color video signal between lines, absence of correlation can be detected at high precision, and in the absence of correlation, the separated chrominance signal is passed into the band pass filter circuit of narrow band, and the cross color interference on the screen is reduced, and if the correlation is high, by passing into the band pass filter circuit of wide band, deterioration of transient characteristic of chrominance signal can be prevented. According to the present invention, if there is no correlation in the color signal between lines, absence of correlation can be detected at high precision, and in the absence of correlation to the chrominance signal obtained through a conventional comb filter circuit, the chrominance signal is passed into the band pass filter circuit of narrow band, and the cross color interference on the screen is reduced, and if the correlation is high, by passing into the band pass filter circuit of wide band, deterioration of transient characteristic of chrominance signal can be prevented. Fig. 1 is a block diagram of a signal processing circuit for separating a color video signal into a luminance signal and a chrominance signal in an example of the principle of the invention. Fig. 2 is a block diagram showing an embodiment of the invention which is a specific circuit of the example shown in Fig. 1. Fig. 3 (a) to Fig. 3 (e) are parts of signal waveforms shown in the scanning line sequence for explaining the operating function of constituent elements in the case of input of signal free from correlation between lines in the example shown in Fig. 2. Fig. 4 is a block diagram of an example of a further embodiment of the invention. Fig. 5 is a table showing processing method of operation processing circuit in the block diagram of the example shown in Fig. 1. Fig. 6 is a block diagram of a conventional example explaining a prior art. Referring now to the drawings, embodiments of the invention are described below. Fig. 1 is a block diagram of a signal processing circuit for Y/C separation showing an example of the principle of the invention. In Fig. 1, when a video input signal 100 is fed in from an input terminal, it is supplied into a 1H delay circuit HDL 101, a BPF 102, and a subtractor 109. At this time, the signal passing through the HDL 101, that is, the video signal entered one horizontal scanning period before is supplied into a BPF 103. The output signal of the BPF 102 and the output signal of the BPF 103 are both supplied into a vertical correlation detecting circuit 104, and herein presence or absence of correlation of the two signals between lines is detected. For the ease of explanation of the operating function of the constituent elements shown in Fig. 1, an example of input of a known color bar signal is described below. In the case of the color bar signal, the correlation of luminance signals is high between signals of a certain horizontal scanning line and a next scanning line, and the chrominance signals are mutually inverted in phase according to the principle of interleaving. Suppose the signal of the line having this color bar signal is entered as a present signal and is supplied into the BPF 102, then the signal one line before the present signal passes through the HDL 101, and is supplied into the BPF 103. Therefore, the signals obtained from the BPF 102 and 103 are composed of higher frequency components of luminance signals (staircase waves) and chrominance signals mutually inverted in phase. The both signals are fed into the vertical correlation detecting circuit 104, and are detected for presence or absence of correlation between lines. In the case of the color bar signal, the detection signals (H) of correlation presence are successively issued, and the signals are sequentially transmitted to the horizontal correlation detecting, circuit 106. The horizontal correlation detecting circuit 105 is a circuit for detecting the correlation between a signal at a certain point on a horizontal scanning line, and a signal remote by the time of N (for example, N=4) times of the half wavelength of the color subcarrier signal. In the case of color bar signal, signals having high correlation continue, and the output signals of the horizontal correlation detecting circuit 105 are also continuous detection signals (H) of correlation presence. The output signal of the horizontal correlation detecting circuit 105 is supplied into a 1H delay circuit hdl 106 and a logic circuit 107. In the logic circuit 107, the output signal of hdl 106 is also supplied, and the logic operation (gating) is performed between the output signals from the horizontal correlation detecting circuit before and after one horizontal scanning period. Depending on the result, as shown in Fig. 5, processing in an operation processing circuit 108 is selected. In the color bar signal, the horizontal correlation detection signal continues to be the value of H for the period of nearly one line, and if the signal from next line is entered, the value is similarly H, so that the output signal by processing in the lowest stage in Fig. 5 is obtained from the operation processing circuit 108. That is, in this case, subtraction is performed between the signals supplied from the BPF 102 and 103. Therefore, the higher frequency components of the luminance signal are canceled to be nil, but the chrominance signals are mutually inverted in phase, and the amplitude is doubled as a result, and by reducing to 1/2 and issuing, a chrominance signal 112 of specified amplitude is obtained. Thus obtained chrominance signal is supplied into a subtractor 109. In the subtractor 109, the video input signal 100 is supplied, and as the chrominance signal is subtracted from this composite color video signal, a luminance signal 111 is obtained. Fig. 2 shows a specific example of an embodiment of the invention. The operating function of the constituent elements in Fig. 2 is described below by referring to an example of input of color bar signal same as in the explanation of Fig. 1. Same as in Fig. 1, an entered composite color video signal is supplied into a one-horizontal period (1H) delay circuit HDL 201, a band pass filter BPF 202, and a subtractor 218. Therefore, same as in the explanation of Fig. 1, in the case of a color bar signal, the signals delivered from the BPF 202 and BPF 203 are composed of higher frequency components of luminance signals equal in amplitude, and chrominance signals mutually inverted in phase but equal in amplitude. The both output signals are fed into an adder 204, and are summed up. As a result of summing up, the chrominance signals are canceled because they are equal in amplitude and are inverted in phase, and only the higher frequency components of luminance signals are left over. That is, having no chrominance signal, a signal of small amplitude is the output signal of the adder 204. The output signal of the adder 204 is supplied into a comparator 205, and is compared with a reference signal about amplitude. In this case, the amplitude of the output signal of the adder 204 is smaller than that of the reference signal. Herein, the output signal of the comparator 205 is set to issue an output of H when the reference signal is larger as a result of comparison, and output of L when smaller. Therefore, the output signal of the adder 205 is H, and the value of H continues in the case of color bar signal. The output signal of the comparator 205 thus continuous to be the value of H is sequentially passed into delay circuits DL 206, DL 207, DL 208, and DL 209 for delaying the signal by the time corresponding to half wavelength of color subcarrier as shown in the drawing. The output signals of the comparator 205 and delay circuits DL 206, DL 207 are applied respectively into input terminals of a three-input AND gate circuit 210. Similarly, the output signals of the delay circuits DL 207, DL 208, and DL 209 are applied to input terminals of a three-input AND gate circuit 211. As described above, in the case of color bar signal, since the output signal of the comparator 205 continues to be the value of H, the output signals obtained by passing this signal through DL 206, DL 207, DL 208, and DL 209 also continue to be the value of H. Therefore, the output signal of the AND gate circuit 210 receiving the output signals of the comparator 205 and DL 206, DL 207 is also the value of H. Similarly, the output signal of the AND gate circuit 211 receiving the output signals of the DL 207, DL 208, and DL 209 is also the value of H. The output signal of an OR gate circuit 212 receiving the output signals of the both AND gate circuits as input signals as shown in the diagram is also the value of H. Having a correlation to the input signal of next line, the value of the output signal of each constituent elements after the comparator is H, and hence the output signal of the OR gate circuit 212 is also the value of H. Consequently, a signal one line before obtained by passing the output signal of the OR gate circuit 212 through a 1H delay circuit hdl 106 is added to one input terminal of an AND gate circuit 214, and the output signal of the OR gate circuit 212 not passing through hdl 106 is added to other input terminal of negative logic of the AND gate circuit 214 as shown in the diagram, and the AND(logical operation) of the two input signals is calculated. The output signal of the OR gate circuit 212 and the signal one (horizontal scanning) line before passing through hdl 106 are both H, but since the former is entered into the input terminal of negative logic, the output signal of the AND gate circuit 214 is a value of L (zero; 0). This output signal is fed into a switch circuit 216. The switch circuit 216 is controlled of changeover action by the output signal from the AND gate 214, and when the output signal is L (0) as in this case, a signal obtained by inverting the phase of the output signal of the BPF 203 by a phase inverting circuit 215 is issued as an output signal, and in the case of H (1), the output signal of the BPF 202 is directly issued. Therefore, since the output signal of the AND gate circuit 214 is L (0), a signal obtained by inverting the phase of the output signal of the BPF 203 is obtained from the switch circuit 216 as output signal, and is supplied into an adder 217. At other input terminal of the adder 217, the output signal of the BPF 202 is directly supplied, and both input signals are summed up. The signal entered from the switch circuit 216 is a signal one line before the other input signal, and is inverted in phase, and therefore, in the case of a color bar signal, as a result of summing up, the luminance signals are canceled, and the chrominance signals are summed up and obtained as a double amplitude. Herein, by reducing the amplitude to half (1/2) in an amplitude adjusting circuit 219, a chrominance signal of desired amplitude is obtained. Thus obtained chrominance signal is supplied into a subtractor 218. In the subtractor 218, a video input signal 200 having a chrominance signal superposed on a luminance signal is supplied, and only the chrominance signal is subtracted, and a luminance signal only is taken out as an output signal of the subtractor 218. In the case of signals having no correlation between lines, the operating function in embodiment 1 is explained by referring to an example in Fig. 2. An example having no correlation between lines is explained by referring to signals as shown in Fig. 3 (a). Fig. 3 (a) shows waveforms sequentially showing signals in a part of the screen in the sequence of horizontal scanning lines, in which the luminance signal has a uniform level without change, and the chrominance signal has a single color in the upper part of the screen and is colorless in the lower half, and the signal in such screen are sequentially shown from the top in the sequence of horizontal scanning lines. That is, the chrominance signal is superposed in the upper three stages, and from the fourth stage and below, there is no chrominance signal, and only the luminance signal is present. It is hence evident that there is no correlation between the third stage signal and fourth stage signal. Suppose such signal to be the input video signal 200 in Fig. 2, when the signal in any one of the upper three stages is entered, in the case of an input of color bar signal, it is evident that the operation is same as in the operating function explained in the example in Fig. 2. Hence, a case of input of a fourth stage signal is explained. The fourth stage signal is a luminance signal of a constant level (direct-current component) without chrominance signal, and when this signal is entered in the band pass filter BPF 202 as video input signal, the signal is cut off, and does not pass (regarded as zero). Therefore, the input signal into the adder 204 is only the output signal (chrominance signal) obtained by supply of signal one line before (third stage) into the BPF 203. As explained in the example of color bar signal, if there is a correlation between signals before and after one horizontal scanning period, the chrominance signals entered from the BPF 202 and BPF 203 entered in the adder 204 cancel each other, whereas, in this case (between third stage signal and fourth stage signal), the chrominance signal entered from the BPF 203 is directly issued, and therefore the output signal of the adder 204 is large in amplitude, and it is compared with a reference signal in the comparator 205. As a result of comparison, since the reference signal is smaller, the value of L is issued as output signal. This value of L continues as long as the video input signal 200 is the fourth stage signal. In this period, therefore, the output signal of the comparator 205 and the output signals of the delay circuits DL 206, 207, 208, 209 are values of L, and the output signals of the AND gate circuits 210, 211 and OR gate circuit 212 are also values of L. The output signal of the OR gate circuit 212 is entered into the input terminal side of negative logic of the two-input AND gate circuit 214 as shown in the diagram, and the input signal from hdl 106 supplied into other input terminal is a signal one horizontal scanning period before (third stage), and is a value of H, and hence the output signal of the AND gate circuit 214 is a value of H (1). The output signal of the AND gate circuit 214 controls changeover action of the switch circuit 216. Since this output signal is a value of H (1), the output signal of the BPF 202 is obtained as an output signal of the switch circuit 216, and is supplied into one input terminal of the adder 217. In other input terminal of the adder 217, as shown in the diagram, the output signal of the BPF 202 is directly supplied without passing through the switch circuit, and in the adder 217, the output signal from the same BPF 202 is added, so that the value is doubled. Therefore, by reducing the amplitude of the output signal of the adder 202 to half (1/2) in the amplitude adjusting circuit, a chrominance signal of a required amplitude is obtained. This chrominance signal is supplied into the subtractor 218 same as mentioned above, and a signal corresponding to the chrominance signal is subtracted from the video input signal 200, and a luminance signal is obtained as the output signal of the subtractor 218. In the example of the fourth stage signal as video input signal, since chrominance signal is not superposed, it is evident that chrominance signal is not issued. The operating function of each constituent elements in the example in Fig. 2 is explained so far in relation to an example of input of signal having no correlation between lines as shown in the third stage and fourth stage in Fig. 3 (a), and Fig. 3 (b) shows a waveform (solid line) of output signal of comparator 205. The output signal waveform of the comparator 205 in the case of input of video input signal of second stage from the top in Fig. 3 (a) is shown in the highest stage in Fig. 3 (b), and the subsequent lines are shown sequentially. Similarly, corresponding to the line sequence, Fig. 3 (c) shows the waveform of output signal of OR circuit 212, Fig. 3 (d) shows the waveform of output signal of amplitude adjusting circuit 219 or chrominance signal extracting circuit 220, and Fig. 3 (e) shows the output signal waveform of subtractor 218. According to the embodiment of the invention, as described herein, absence of correlation of signals between lines can be detected at high precision, and signal processing for separating into luminance signal and chrominance signal can be done accurately, so that the problems in the prior art can be solved. In particular, as mentioned in the problems of the prior art, since two delay circuits of one horizontal scanning period for video signal are used for enhancing the precision of correlation detection, the cost is increased, but in the invention, as clear from the description of the example in Fig. 2, since the value of the signal processed from the comparator 205 until reaching the output signal of the AND gate circuit 214 is a binary value of either H (1) or L (0), the delay circuit hdl 106 of one horizontal scanning period can be realized by a very simple circuit element as compared with the delay circuit for color video signal such as HDL 201. Therefore, as compared with the prior art of enhancing the precision of correlation detection by using two delay circuits for color video signal, signal processing of high precision is realized at lower cost. A further embodiment of the invention is described below. In a prior art, the chrominance signal obtained from the comb filter circuit is passed a narrow band pass filter circuit for purpose of reducing the cross color interference occurring in the absence of correlation of signals between lines. Hence, the transient charateristics of the chrominance signal is impaired, even if there is high correlation of signals between lines. It is intended to solve the above problem in the following embodiment of the invention. As an example, a signal processing circuit for Y/C separation is shown in a block diagram in Fig. 4. In Fig. 4, constituent elements common to those in Fig. 2 are identified with same reference numerals, and their operating functions are also same as explained in Fig. 2, and hence their description is omitted or simplified. In Fig. 4, other constituent elements than AND gate circuit 221, narrow band pass filter circuit BPF 222, wide band pass filter circuit 223, and switch circuit 224 are coupled same as constituent elements in Fig. 2, and their operating functions are the same, so that input and output signals are also same. Therefore, when a signal high in correlation between lines such as the color bar signal explained in Fig. 2 is entered as video input signal 202, according to the same operating function as in Fig. 2, the output signals of the OR gate circuit 212 and 1H delay circuit hdl 106 are values of H (1). The output signals of the OR gate circuit 212 and 1H delay circuit hdl 106 are supplied same as in Fig. 2, that is, the former output signal is supplied into the input terminal of negative logic of the two-input AND gate circuit 214, and the latter is directly supplied into other input terminals, and they are also connected respectively to the AND gate circuit (logical product circuit) 221 having two input terminals of positive logic. When the video input signal is a signal of high correlation, since the values of output signals of OR gate circuit 212 and 1H delay circuit 106 are H (1), the output signal of the AND gate circuit 214 is L (0) as explained in the example in Fig. 2, and is supplied into the chrominance signal extracting circuit 220, while the output signal of the AND gate circuit 221 becomes H (1), and is supplied into the switch circuit 224. As explained in the example in Fig. 2, by the output signal of L (0) supplied, from the AND gate circuit 214, the chrominance signal passing through the comb line filter and delivered from the chrominance signal extracting circuit 220 is supplied into the switch circuit 224 through the narrow band BPF 222 and wide band BPF 223 in Fig. 4. The switch circuit 224 is controlled of switching function by the output signal of the AND gate circuit 221, and in the case of a signal high in correlation between lines, since the output signal of the AND gate circuit 221 is H (1), the chrominance signal passing through the wide band BPF 223 is the output signal as shown in the diagram. Therefore, as the required chrominance output signal, a signal passing through the wide band pass filter circuit excellent in transient characteristic is obtained, and the problems of the prior art can be solved. As an example of video input signal free from correlation between lines, the operation of constituent elements in the example in Fig. 2 is explained by using the signal as shown in Fig. 3 (a), and it can be also applied in the explanation of operating function in the example in Fig. 4. That is, since there is no correlation between lines between the third stage signal and four stage signal from the top in Fig. 3 (a), when the fourth stage signal is entered as video input signal, the output signal of the OR gate circuit 212 is L as explained above, whereas the output signal of the 1H delay circuit hdl 106 is a value of H. Therefore, the value of the output signal of the AND gate circuit 214 is L (0), whereas the value of the output signal of the AND gate circuit 221 is L (0). Since the output signal of the AND gate circuit 221 is a value of L (0), the output signal of the chrominance extracting circuit 220, passing through the narrow band BPF 222, is selected by the switch circuit 224 and is taken out as required chrominance signal. Thus, in the absence of correlation between lines, the effect of comb line filter is not exhibited, and the mixed luminance signal component is decreased by the narrow band pass filter circuit, so that the cross color interference can be lessened. In the embodiment shown in Fig. 4, constituent elements common to the chrominance signal extracting circuit in Fig. 2 explained in the first embodiment are shown in the chrominance signal extracting circuit 220, and the operating function is explained, and instead of the chrominance signal obtained from this chrominance signal extracting circuit 220, for example, in embodiment 2, the chrominance signal taken out from the conventional comb filter circuit may be supplied into the narrow band BPF 22 and wide band BPF 223. Thus, according to the invention, absence of correlation in signals between lines can be detected at high precision, and the signal processing for separating into luminance signal and chrominance signal can be executed adequately, so that a signal processing circuit solving the problems in the prior art can be presented. In particular, as compared with the method of enhancing the precision of detection of correlation by using two 1H delay circuits for color video signal as in the prior art, signal processing of high precision can be realized at a lower cost, because of using a 1H delay circuit for color video signal and a simple 1H delay circuit for binary data. Besides, as for color video signal high in the correlation between lines, a chrominance signal excellent in transient characteristic can be obtained, and as for a signal low in correlation, the cross color interference can be lessened, according to the signal processing circuit presented herein.

Claims: A luminance signal and chrominance signal separating circuit comprising: a first band pass filter (202) for obtaining a first signal by passing a predetermined band width of a color video signal, a first 1H delay circuit for delaying said color video signal by one horizontal scanning period; a second band pass filter (203) for obtaining a second signal by receiving the output signal from said first 1H delay circuit (101,201) and passing said predetermined band width of the delayed color signal, thereby taking out a chrominance signal from said first signal and second signal; a correlation detecting circuit (104,105) for detecting the vertical correlation and the horizontal correlation, said correlation detecting circuit having a vertical correlation detecting circuit (104) for detecting the vertical correlation of said first signal and second signal, and further having a horizontal correlation detecting circuit (105) for receiving the output signal from said vertical correlation detecting circuit (104) for detecting the horizontal correlation in the horizontal scanning period of the signal entered from the vertical correlation detecting circuit and for outputting an output signal (H,L) representative of the presence or absence of horizontal correlation; a second 1H delay circuit (106) for delaying the output signal from said correlation detecting circuit by one horizontal scanning period; a first logic circuit (107) for receiving the output signal from said correlation detecting circuit and the output signal from said second 1H delay circuit (106), and performing a logical operation; and an operation processing circuit (220,108) for receiving said first signal and second signal, and taking out a chrominance signal from the difference between said first signal and second signal or from the first signal only, depending on the output signal of said first logic circuit, wherein said first logic circuit (107) being formed of an AND gate circuit (214) having an input terminal of negative logic at a first end and an ordinary input terminal of positive logic at a second end, whereby the output signal of said correlation detecting circuit (101,102) is supplied into said input terminal of negative logic, and the output of said 1H delay circuit is supplied into the input terminal of positive logic.

Inventors: TAKETANI NOBUO, TAKETANI, NOBUO
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1999
Main classification: H04N9
IPC codes: H04N9