APPARATUS AND METHOD FOR IMPROVED DYNAMIC RANGE AND RESPONSE TIME IN A LOGARITHMIC AMPLIFIER

Abstract: A logarithmic amplifier (50) is provided with a calibration circuit (52) to allow for current measurement over a wide-dynamic range that includes extremely low current levels in a manner which mitigates or eliminates sensitivity to temperature. Calibration currents (IBias, IRef, Iboost) are generated by application of a series of voltage ramps of selectable slope to a capacitor (C2). This provides a set of known current levels selectable over a range of decades, for periodic calibration of the logarithmic amplifier (50). The selectable calibration currents can also be advantageously used to provide a fixed, known bias current to the input (-) of the logarithmic amplifier (50) to improve the response time of the amplifier (50) for measurement of small sensor currents (Isensor) on the order of 10-100 fA.

Description: APPARATUS AND METHOD FOR IMPROVED DYNAMIC RANGE AND RESPONSE TIME IN A LOGARITHMIC AMPLIFIER Background of the Invention Electrometers employ circuits which measure current over a wide range and at extremely low levels. For example, mass spectrometers employ current sensors having eight decades of coverage ranging from less than 0.1 pA to 10.0 //A. Feedback amplifiers are commonly employed to convert the sensed current measurement to a voltage measurement. The voltage is applied to an analog to digital (A/D) converter, the output of which is processed by a computer to generate a desired output. The most straightforward means for measuring current is an operational amplifier (hereinafter "op-amp") feedback configuration which employs a resistor R as a feedback element as shown in FIG. 1 A. The operational amplifier 30 includes a negative feedback terminal 32A, a positive feedback terminal 32B, and an output terminal 34. Resistor R is coupled across the output terminal 34 and negative feedback terminal 32A, thereby providing a feedback loop. The positive feedback terminal 32B is grounded as shown. In this manner, the output voltage V 0 is related to the input current I in according to the following relationship: * * *. (i) Such a configuration requires a large resistor R for measurement of small levels of current; however large resistors are a source for thermal noise. In addition, stray capacitance inherent in the op-amp 40 and resistor R in conjunction with a high value resistor R can lead to an impracticaliy-large time constant. The dynamic range of such a configuration is limited by the use of a single resistor R. When large current values are to be measured, a small value resistor R is required or else the voltage at the output V 0 will saturate, i.e., V 0 will match the source voltage levels applied to the op-amp 30. A resistor bank including resistors R_, R b , R c and physical switches S a , S b , S c provides selectable resistance levels. Such a configuration is undesirable, as switches with minimal leakage current are sophisticated and therefore expensive. A further limitation of this configuration is that it requires a high-resolution analog-to-digital converter 56 to obtain accurate low-level current measurements, in the case where few resistors are used in the resistor bank. An integrator amplifier as shown in Prior Art FIG. IB employs a capacitor C as the feedback element. This circuit integrates the input signal I ιn to provide an output voltage V 0 . In this embodiment, the relationship is characterized as: dV o I in dt C (2) As capacitor C charges, the voltage across the capacitor ramps upward or downward, depending on the direction of the applied current I ιn . The slope of the ramp dV 0 /dt varies with the level of applied input current I, n . The output voltage V 0 is measured for a predetermined time interval to provide the degree of the slope, and a corresponding input current I m is determined based on that value. A reset switch S periodically discharges the capacitor C to prevent saturation of the output voltage V 0 . The integrator embodiment mitigates the thermal noise problem; however it suffers from several limitations. A small capacitor C is required for small current measurement; for example, if measurements on the order of lpA are required, a small capacitor C, for example a lpA capacitor, is employed. Such a small capacitance is nearly equal to the parasitic capacitance of the op-amp 30, which varies with the input signal and is sensitive to temperature. This embodiment is further limited by leakage current through the op-amp 30 when the switch S is open. To achieve wide-dynamic range, a bank of capacitors are required, and therefore a switch is required to select a capacitance level. This introduces the imitations described above in the FIG. 1 A embodiment. The primary limitation of this embodiment lies in that field effect transistors (FETs) are commonly used for the reset switch S, which tends to introduce further leakage current, adversely affecting signal measurements. A logarithmic amplifier, as shown in Prior Art FIG. 1 C employs a diode D as -2- the feedback element for the op-amp 30. The transfer function for this embodiment is given by: V = — In (3) ° q v 7 * / where k is the Boltzman time constant, T is temperature in Kelvin, q is the electron charge, I jn is the input current, and I s is the reverse saturation current (diode- dependent, usually on the order of 10 "15 A). A second diode D, is included to allow for bipolar transmission. The logarithmic amplifier embodiment takes advantage of the logarithmic relationship between output voltage V 0 and input current I in introduced by the diodes D„ D 2 , to offer a significant improvement in dynamic range over the aforementioned embodiments. However, it suffers from the limitation of extreme temperature sensitivity, due to the dependence of the transfer function on T, but especially due to the exponential temperature-dependency of the reverse saturation current factor I s . For example, the temperature coefficient causes an output voltage V 0 variance at a rate of approximately -2. lmV/C° near room temperature. This results in a decade variance in V 0 when the operating temperature changes by 30°C. To avoid this problem, some have employed a differential log measurement to cancel the temperature dependency of I s , which provides a certain level of improvement. The temperature of the circuit can be stabilized; however, this is an expensive solution, which proves to be impractical for many applications. As illustrated in the schematic diagram of Prior Art Fig ID, others have employed a calibration technique which periodically provides a known reference current I ref to the amplifier 30, and measures the resulting output voltage V 0 . By taking data over a range of reference current levels I ref , a calibration chart can be generated and used to correct sensor measurements; thus, rendering the amplifier insensitive to temperature. To generate the known reference current values I ref , a switchable resistor bank 31 , including resistors R A , R B , R N , and corresponding switches S A , S B , S N , has -3- been employed in combination with a reference voltage source V ref . Such a configuration introduces leakage current at the switches S A , S B , S N , and, more significantly, generates a large reference current I ref error due to DC offset error at the op-amp 30, which can lead to excessive error when measuring low current levels. For example, when introducing reference current I ref levels on the order of lpA, to generate the lpA reference current, a 1GΩ resistor is required assuming an input voltage of 1 mV. Assuming a DC offset in the op-amp 30 of 1 mV (a common DC offset error in electrometer grade op-amps), this would lead to an error factor of 100 percent. Therefore, in this configuration, when the offset error of the op-amp 30 approaches the input voltage V ref , the resultant error in the input current I ref is significant, limiting performance of the circuit. Summary of the Invention The present invention is directed to an apparatus and method for current measurement over a wide-dynamic range that includes extremely low levels, in a manner which overcomes the limitations of the prior art. In particular, the present invention provides a logarithmic amplifier configuration which mitigates and/or eliminates sensitivity to temperature. Calibration currents are generated by application of a voltage ramp of selectable slope to a capacitor. This provides a range of known selectable current levels for periodic calibration of the logarithmic amplifier. The selectable current levels can also be advantageously used to provide a fixed bias current to the input of the logarithmic amplifier for improving the response time of the amplifier for small sensor current measurements. The present invention offers temperature-independent, accurate measurement of current over at least nine decades of coverage, for example lOfA-lOμA. No resistor banks, or capacitor banks are required. Furthermore, DC offset error introduced in the generation of reference current is greatly reduced or eliminated. In a first embodiment, the present invention is directed to an apparatus comprising a logarithmic amplifier for generating an output voltage as a logarithmic function of a reference current. An integrator amplifier generates a ramp voltage as a -4- function of input current received at an input. A capacitor coupled in series between the output of the integrator amplifier and the input of the logarithmic amplifier converts the ramp voltage to a reference current. When the reference current is applied to the logarithmic amplifier, a corresponding output voltage is generated. The output voltage is a logarithmic function of the reference current. In a first preferred embodiment, a series of known reference currents are generated by the integrator amplifier and capacitor. The reference currents are periodically applied to the logarithmic amplifier, for example following a significant temperature change. The corresponding set of output voltages are stored to provide a calibration function which characterizes the response of the logarithmic amplifier. In this manner, the response of the logarithmic amplifier is rendered insensitive to temperature. In a second preferred embodiment, the reference current generated by the integrator amplifier and capacitor is applied as a bias current and added to sensor current input at the logarithmic amplifier to improve the response time of the logarithmic amplifier. In a third preferred embodiment, a sequence of reference current steps are generated by the integrator amplifier and capacitor and periodically applied as a boost current to assist in the recovery of the circuit from periodic current spikes injected into the logarithmic amplifier when the integrator amplifier undergoes a reset operation. In a fourth preferred embodiment, the reference current generated by the integrator amplifier produces a known slew rate in the output voltage. A sensor current is applied to the reference current which modulates the slew rate. The sensor current is determined by monitoring the degree of modulation in slew rate. This embodiment is especially applicable to measurement of small sensor circuit values. Brief Description of the Drawings The foregoing and other objects, features and advantages of the invention will be apparent from the more particular description of preferred embodiments of the invention, as illustrated in the accompanying drawings in which like reference -5- characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. FIG. 1A is schematic representation of a prior art feedback amplifier employing a resistor R as a feedback element. FIG. IB is a schematic illustration of a prior art integrator amplifier employing a capacitor C as a feedback element. FIG. 1C is a schematic illustration of a prior art logarithmic amplifier employing a diode D as a feedback element. FIG. ID is a schematic illustration of a prior art technique for calibration of the logarithmic amplifier of FIG. 1C using known reference current values. FIG. 2 is a schematic representation of the logarithmic amplifier of the present invention employing a reference calibration current I ref . FIG. 3 is a calibration chart for the output voltage V 0 response of the logarithmic amplifier as a function of reference current I ref for a range of temperatures, in accordance with the present invention. FIG. 4 illustrates the calibration circuit of the present invention for generating reference current I ref . FIG. 5 illustrates an alternative means for generating an input current to the integrator amplifier in accordance with the present invention. FIG. 6 is a chart illustrating the respective behavior of voltages V 0l , V o2 , and current I ref in accordance with the present invention. FIG. 7 A is a chart illustrating the responses of output voltages V 0l , V o2 , and I ref as functions of time t, illustrating the application of bias current I bias to assist output voltage V o2 in recovering from a spike that results during a periodic transition in V 0l in accordance with the present invention. FIG. 7B illustrates the behavior of output voltage V o2 when permitted to settle without assistance from a boost current I boost , illustrating the effect of low levels of sensor input current on the slope of the V o2 recovery, for fine-resolution current sensing on the order of 10 fA in accordance with the present invention. FIG. 8 is a chart illustrating preferred steps for assisting recovery of output voltage V o2 in accordance with the present invention. -6- Detailed Description of Preferred Embodiments The present invention is directed to a method and apparatus for calibrating a logarithmic amplifier in a manner which mitigates and/or eliminates sensitivity to temperature. As an added benefit, the present invention improves sensitivity and response time for measurement of small sensor cwrent levels, i.e., on the order of lOfA. As illustrated in FIG. 2, the present invention includes a logarithmic amplifier 50 comprising an op-amp X, for example an electrometer-grade CMOS op-amp having a low bias current on the order of 1 Of A, and first and second diodes D,, D 2 . The logarithmic amplifier 50 generates an output voltage V 0 as a function of sensor current I sensor according to the exponential relationship of Equation 3 above. The present invention further includes a calibration circuit 52 for generating an accurate reference current I ref adjustable over a wide range of selectable levels, for example lpA, lOpA, ..., 100/.A- During a calibration sequence, the sensor current I sensor input is disengaged and the reference current I ref is activated. For each applied reference current level, the corresponding output voltage V 0 is recorded and stored. The result is a calibration chart 54 as shown in FIG. 3, representative of the behavior of the logarithmic amplifier as a function of varying operating temperature T. The chart is stored in memory as a set of discrete data points and employed to correct sensor current readings using well-known interpolation techniques. As the operating temperature T„ T 2 , T 3 of the logarithmic amplifier changes, the calibration curve 54 varies accordingly. The calibration data is then used to provide both temperature- independent and accurate sensor current I sensor measurements. By performing temperature calibrations periodically, for example, every five minutes, or alternatively at every significant temperature change, the system can achieve accurate current measurements continuously over a range of operating conditions. FIG. 4 is a schematic representation of a prefeπed calibration circuit 52 in accordance with the present invention. The circuit of FIG. 4 includes a standard logarithmic amplifier 50 including op-amp X 2 and diodes D„ D 2 . Absent the calibration circuit 52, the output voltage V o2 of the logarithmic amplifier 50 is a function of sensor current I sensor . The calibration circuit 52 generates a reference -7- current I ref which, as described above, is used to calibrate the logarithmic amplifier 50 to mitigate the effects of temperature sensitivity, and further, as will be described below, to provide a bias current for improving the system time response for measurement of small sensor current I sensor values. In a preferred embodiment, the calibration circuit 52 includes an integrator amplifier 51 formed by op-amp X, , including capacitor C, as a feedback element. A selectable input voltage V ιn is accurately generated by digital-to-analog (D/A) converter 58. The input voltage V ιn is applied to resistor R, to generate an input current I ιn which is, in turn, applied to the integrator amplifier 51. An output signal V 0l is generated at the output of the integrator amplifier 51 in the form of a ramp voltage which is characterized by the following equation: dV (4) dt C, R C λ In this manner, the ramp voltage at output V ol is controlled by selecting the input voltage V ιn provided by D/A converter 58. The integrator amplifier 51 is periodically reset by switch S, to prevent the ramp voltage V 0l from saturating at the level of the op-amp X, power source. Ramp current V 0] is, in turn, applied to capacitor C 2 to generate a reference current I ref . The reference current I ref is given by the following relationship: dV. V ( c. ^ K e f = C 2 c. *m . V i _2 dt c, " *ϊ c (5) 1 / In this manner, the reference current I ref is attenuated by the relationship of capacitor C 2 to capacitor C,. For example, if C 2 comprises a lOpF capacitor and C, comprises a O.Ol f capacitor, this would result in a scaling factor of 10 "3 . In other words, the integrator amplifier circuit 52, including op-amp X„ resistor R„ capacitor C„ and reset switch S,, operate at a current level I ιn that is 1000 times higher than reference current I ref . For example, to generate a lpA reference current I ref , the corresponding I m would be InA, so the leakage current in op-amp X, and reset switch S, is made -8- negligible by the circuit configuration of the present invention. In this manner, leaky switches are placed in a non-critical portion of the device, and not in the sensitive logarithmic amplifier 50. Furthermore, since no resistor is employed in providing the reference current I ref to the logarithmic amplifier 50, the DC offset of op-amp X 2 is irrelevant in the calculations; as is the DC offset of op-amp X„ since the voltage V ιn and resistor R, can be adjusted to optimize the offset voltage of X,. For this reason, a resistor bank 60 including resistors R^, R b ,R n and switches S a , S b , S n can be employed to increase the range of the D/A converter 58. Such a resistor bank 60 will have a minimal effect on the reference current I ref due to the attenuation described above. By filtering out DC offset error through capacitor C 2 and by providing the reference current I ref , DC offset in op-amp X 2 is minimized, and the logarithmic relationship between voltage V o2 and sensor current I sensor is maintained. Since the reference current I ref is generated from a voltage ramp, any DC offset error generated at op-amp X, is irrelevant. In addition, the reset switch S„ preferably a FET, has no adverse effects on the accuracy of the measurement, assuming a large attenuation ratio between capacitors C 2 and C,. When the reference current I ref is applied to the logarithmic amplifier 50, the relationship between V o2 and V m can be described as follows: ( r \ kT , kT ( \ = — In In i (6) \ *A In this manner, periodic calibration of the logarithmic amplifier 50 maintains the logarithmic relationship between V o2 and the sensor current I sensor over a range of operating temperatures and over wide dynamic range. FIG. 6 illustrates the behavior of the output voltage V 0l of the integrator amplifier 51 (see FIG.4) and output voltage V o2 of the logarithmic amplifier 52 as a result of two different applied input voltages V ιnl (dashed lines) and V ιn2 (solid lines). Following a periodic reset 102 of switch S,, capacitor C, begins to charge, causing a ramp 104 of output voltage V 0l . Note that the slew rate of the ramp 104 is a function of applied input voltage V ιnl , V ιn2 As the ramp voltage V 0l is applied to capacitor C2, a DC reference cuπent I ref 106 is generated. During application of the DC -9- reference current to the logarithmic amplifier 50, output voltage V o2 eventually settles to a voltage level 108. The rate of settling, or slew rate 110 caused by the charging of the parasitic capacitance of the diodes D„ D 2 , is dependent on the strength of the reference current I ref . In general, a larger applied reference current slews at a faster rate 110 and results in a higher output voltage level 108. At the onset of a reset 102, the capacitor C, is discharged at an extremely fast rate, causing an immediate upward slope 114 in output voltage V 0l of the integrator amplifier 52. This, in turn, causes a corresponding spike 112 in the reference current I ref , which causes a corresponding sudden adjustment 124 in output voltage V o2 . If the adjustment 124 is large, and the applied reference current I ref is relatively small, then it may take considerable time for the output voltage to settle. A technique for improving the settling time will be described below. In this manner, output voltage V 0l operates on capacitor C 2 to provide an accurate reference current I ref for characterizing the behavior of logarithmic amplifier 50. By generating a series of reference currents I ref , the calibration curve for the logarithmic amplifier 50 can be generated, and the system can operate accurately, independent of temperature. The reference current I ref is provided accurately, without the adverse impact of DC offset errors at op-amp X 2 . Any DC offset error introduced at op-amp X, is attenuated by a factor of one thousand, assuming the ratio C 2 /C, = 1000. Accordingly, an accurate calibration curve 54 as shown in FIG. 3 can be generated at regular periodic intervals for compensating for the temperature dependence of the logarithmic amplifier 50. As described above, the calibration curve comprises a discrete set of measured output voltages V o2 as a function of known applied reference currents I ref , for example generated from a plurality of decades of reference currents I ref , at a given temperature T. When sensor data I sensor is received and processed by the logarithmic amplifier 50, an output voltage V o2 is generated and applied, for example, to the two nearest data points on the calibration curve 54 (see FIG. 3). The corresponding current value is interpolated form the two nearest data points and is used as the sensor current measurement I sensor calibrated to the present operating temperature T. The present invention further confers the benefit of providing a bias current I bjas for improving the response time of the logarithmic amplifier 50 when measuring -10- low levels of sensor current I sensor . As explained above, the logarithmic amplifier 50 includes a stray parasitic capacitance inherent in the semiconductor junction of diodes D„ D 2 (see FIG. 4). In a typical system, this stray capacitance may be on the order of 2-3pF. State-of-the-art current measurement devices seek resolution on the order of 0. IpA, or less. The stray capacitance (assume 3pF) can be considered as a capacitor applied in parallel to diodes D„ D 2 . Assuming an input current of O.lpA applied to the logarithmic amplifier 50, it will take some time for the output voltage V o2 to settle, due to the relatively large stray capacitance of 3pF being charged by a relatively small O.lpA current. According to the logarithmic amplifier characterization curve, an input current of O.lpA, may correspond, for example, to an output voltage of 120 mV. Assuming that from a previous cycle, output voltage V o2 was set at 880 mV, the circuit must slew through approximately 1 volt for output voltage V o2 to settle at the proper voltage. With a relatively small input current of O.lpA and a relatively large stray capacitance of 3pF, this results in a 30 second time constant. This can present a problem in systems which require fast response. The present invention takes advantage of the calibration data (see FIG. 3) accurately calculated during a previous calibration sequence to provide a known bias current I bιas which is added to the sensor cuπent I sensor and applied to the logarithmic amplifier 50. The bias current I bιas can be accurately generated by the calibration circuit 52 at a level which is an order of magnitude higher than the sensor current ^ sensor to accelerate the charging of the stray capacitance of diodes D„ D 2 . This in turn decreases the settling time of output voltage V o2 . The resulting output voltage V o2 is applied to the calibration curve 54 to determine the combined currents of I sensor + I bιas . The known bias current I bιas is then subtracted from the combined current to give the calibrated sensor current I sensor . As an example, assume a sensor current I sensor of O.lpA and a bias current I bιas of IpA charging a stray capacitance of 3pF across a slew of 1 volt. This would result in a response time of 3 seconds instead of 30 seconds, conferring a ten-fold improvement in response time. In a preferred embodiment, the ratio of the bias current to the sensor current can approach 100:1 to confer nearly a one hundred fold improvement in response time. In this manner, the calibration circuit 52 is employed, not only to generate a -1 1- reference current I ref for periodic temperature calibration of the logarithmic amplifier 50, but also to confer the additional benefit of improving the response time of the logarithmic amplifier 50 when making small sensor current I sensor measurements. The present invention therefore provides an improved combination of resolution, dynamic range, and response time in the logarithmic amplifier. In an alternative embodiment, the calibration circuit further allows for selective resolution. For example, if the logarithmic amplifier of the present invention is applied to a mass spectrometer which analyzes a substance by atomic mass unit (amu), a look-up table can be provided in microprocessor memory to adjust the resolution depending on the amu of the substance being sensed. Scan speed is therefore a function of applied bias cuπent I bjas ; a faster speed reduces the resolution for amu measurements which are not critical to the scan. FIG. 7A illustrates a further advantage confeπed by the present invention. With reference to the circuit diagram of FIG. 4, during a measurement cycle beginning at time t 0 , the voltage V jn is set by the D/A converter 58, and consequently, voltage V o2 ramps downward 124 as shown. At time t„ the integrator amplifier 51 is reset 102 by switch S, to prevent saturation. The reset operation 102 generates a ramp 114 of a very steep positive nature between time t, and t 2 in output voltage V 0l . Accordingly, the resulting reference current I ref , which, for example, was previously on the order of -IpA from time t 0 to time t„ undergoes a spike 112 at time t, on the order of 100- 1000 / A which lasts until time t 2 . The spike 112, in turn, results in a corresponding spike 124 in the output voltage V o2 which could take an extremely long time to settle, for example 10 seconds, depending on the initial value of I ref . For example, if the initial reference current I ref is on the order of IpA (corresponding to an output voltage V o2 of 180 mV), it may take several seconds for V o2 to settle back to its original value, as shown by dashed line 117, due to the stray capacitance in the diodes D l5 D 2 as described above. In view of this, in a preferred embodiment of the present invention the calibration circuit 52 periodically generates a "boost" bias current I boost for assisting the logarithmic amplifier 50 and its corresponding output voltage V o2 in recovering from the spike 124, thereby greatly reducing on the settling time of voltage V o2 as a result of V 0] being reset. The boost current I boost is preferably applied in steps -12- according to the chart of FIG. 8, which provides a suggested series of boost current steps, and respective durations, for a small bias current levels ranging from IpA to 10 nA. Application of boost current in steps causes a corresponding rapid exponential decay in output voltage V o2 . In the example of FIG. 7A, a IpA bias current is desired, so according to the chart of FIG. 8, following a reset operation 102, the system controller generates an input voltage V jn step 101a suitable for causing a - lOOpA bias current step 113a for 50 msec duration. This is followed by a second applied voltage step 101b suitable for causing a -10 pA bias current step 113b for 50 msec duration; followed by application of an input voltage level 101c suitable for generating a -IpA bias current step. This technique of application of boost current rapidly charges the parasitic capacitance of the logarithmic amplifier 50 and therefore assists the output voltage V o2 in recovering rapidly according to corresponding exponential decay curves 115a, 115b, 115c, instead of according to decay curve 117. A sensor reading can then be taken following settling of the final step 115c with the benefit of a bias current I bias of -IpA. In this manner, a large boost current I boost can be temporarily applied to the integrator amplifier for rapid charging of the stray capacitance during measurement of small sensor current values. The stray capacitance of the logarithmic amplifier 50 can be used as an advantage for measuring extremely low sensor current levels, for example, sensor currents less than O.lpA. With reference to FIG. 7B, assuming that the spike 124 generated in the output voltage V o2 is permitted to settle naturally, without assistance from the additional boost current I boost in excess of the IpA bias current, as described above with reference to FIG. 7 A, the resulting slope, or slew, of the recovery curve 117a is proportionally affected by the sensor input current I sensor to increase the slew 117b of the recovery curve. The slew rate can be detected by a fast A D converter which periodically measures the voltage along the curve as a function of time. The difference in slew is indicative of the sensor current value. In this embodiment, a reset is provided by the arrival of current spike 112. This technique is analogous to an integrator amplifier which uses the parasitic capacitance of the diodes as a feedback capacitor. However, there is no reset switch in parallel with the parasitic capacitance, and therefore, there is no excessive leakage current associated therewith, as in the prior art. Therefore, accurate measurements at extremely low levels can be -13- realized, for example resolution on the order of lOfA. While this invention has been particularly shown and described with references to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. ■ 14-

Claims: Claims I claim: 1. An apparatus comprising: a logarithmic amplifier for generating an output voltage as a logarithmic function of reference current received at an input; an integrator amplifier for generating a ramp voltage at an output as a function of input cuπent received at an input; and a capacitor coupled in series between the output of the integrator amplifier and the input of the logarithmic amplifier for converting the ramp voltage to a reference current, which, when applied to the input of the logarithmic amplifier, causes the logarithmic amplifier to generate a corresponding output voltage which is a logarithmic function of the reference current. 2. The apparatus of Claim 1 further comprising means for generating the input current coupled to the input of the integrator amplifier. 3. The apparatus of Claim 2 wherein the means for generating the input current comprises a programmable voltage source in series with a resistor. 4. The apparatus of Claim 3 wherein the programmable voltage source comprises a programmable digital-to-analog converter. 5. The apparatus of Claim 3 wherein the resistor comprises a resistor bank of selectable resistance. 6. The apparatus of Claim 1 wherein the integrator amplifier comprises an operational amplifier and a feedback element comprising a second capacitor. The apparatus of Claim 6 further comprising a switch for periodically resetting the capacitor to prevent the operational amplifier from entering a -15- state of saturation. 8. The apparatus of Claim 1 wherein the logarithmic amplifier comprises an operational amplifier and a feedback element comprising at least one diode. 9. The apparatus of Claim 8 wherein the at least one diode comprises a diode pair configured to permit bipolar transmission of current. 10. The apparatus of Claim 1 wherein at least one known current value is applied to the integrator amplifier to generate at least one corresponding output voltage. 11. The apparatus of Claim 10 further comprising a controller for applying the at least one known current value and for recording the at least one corresponding output voltage. 12. The apparatus of Claim 11 wherein the controller is programmable to apply a plurality of current values over a plurality of decades. 13. The apparatus of Claim 11 wherein the controller stores the corresponding output voltages as a calibration chart which characterizes the behavior of the logarithmic amplifier at a temperature T. 14. The apparatus of Claim 13 further comprising a second controller for monitoring temperature T of the logarithmic amplifier and, in response to a temperature change, initiating a calibration sequence by sequentially applying a plurality of current values over a plurality of decades and storing the corresponding calibration chart. 15. The apparatus of Claim 11 further comprising a sensor input for receiving sensor current. •16- 16. The apparatus of Claim 15 wherein the controller is programmable for applying a known bias current value, combined with the sensor current, to the logarithmic amplifier to generate a total output voltage which coπesponds to the output voltage due to the sum of the bias cuπent and sensor current. 17. The apparatus of Claim 16 wherein the controller references a total cuπent coπesponding to the total output voltage and calculates sensor current from the difference between the known bias cuπent and the total cuπent. 18. The apparatus of Claim 11 further comprising a reset switch for periodically resetting the integrator amplifier. 19. The apparatus of Claim 18 wherein the controller is programmable for applying a boost cuπent to assist the apparatus in recovering from a reset sequence. 20. The apparatus of Claim 19 wherein the controller applies boost cuπent in selectable steps. 21. The apparatus of Claim 18 wherein a sensor cuπent is applied to the logarithmic amplifier in combination with the known cuπent value, and wherein the slew rate of the coπesponding output voltage is monitored such that the sensor cuπent level is determined based on degree of modulation that the sensor cuπent has on the output voltage slew rate. -17-

Inventors: CHO JEFFREY C, CHO, JEFFREY, C.
Applicants: MKS INSTR INC, MKS INSTRUMENTS, INC.
Application year: 1999
Main classification: G06G7
IPC codes: G01R19, G06G7, H03G7