Variable-gain multistage amplifier with broad bandwidth and reduced phase variations

Abstract: A programmable-gain multistage amplifier with broad bandwidth and reduced phase variations, comprising a differential input stage which is biased by a first current source and to which a differential voltage signal is fed, the stage being connected to a pair of diodes in which the cathode terminals are connected to respective bipolar transistors, which are biased by a second current source and in which the collector terminals are connected to load resistors, the differential output of the amplifier being provided at the collector terminals of the bipolar transistors, characterized in that it comprises two circuit branches, each of which is constituted by a bipolar transistor and by a third current source, which is respectively connected to the collector terminal and emitter terminal of the bipolar transistor, in which the base terminal receives the differential voltage signal and the collector terminal is connected to the cathode terminal of a respective one of the two diodes, the circuit branches being mutually connected by means of a pair of capacitors.

Description: The present invention relates to a variable-gain multistage amplifier with broad bandwidth and reduced phase variations. More particularly, the invention relates to a programmable-gain multistage amplifier which is suitable for providing variable-gain stages in which the control range must have a wide programmability scale with linearity characteristics expressed in dBs. It is known that analog multiplier structures, such as for example the Gilbert multiplier, an embodiment of which is shown in Figure 1, are used in the production of variable-gain stages. This circuit is of the fully differential type and entails the application of a differential signal IN- and IN+ which is converted from a voltage to a current so that the current in output from the bridge of the Gilbert cell is constituted by a static component due to the current provided by the current source Io plus a signal component due to the differential input voltage IN- and IN+ divided by the resistance R E . The component of the current due to the differential input voltage is due to the transconductance of the input stage composed of the bipolar transistors 1 and 2 and specifically: gm = gm/(1 + gm/R E ) where gm is the transconductance of the transistors 1 and 2. If now one assumes gm.R E to be much higher than 1, then gm is approximately equal to 1/R E . A variable control voltage Vc is applied between the base of a transistor 4 and the bases of transistors 3 and 5. By solving mathematically the appropriate circuit equations, the gain of the circuit of Figure 1 is found to be equal to: G = R L /R E . [1/(1 + e Vc'Vt )] where Vt is the threshold voltage of the transistors. This expression can be used to show that when converting the gain into dBs by means of logarithms, in order to have gain linearity it is necessary to use a suitable control voltage Vc. The maximum gain that can be obtained from the structure shown in Figure 1 is in any case R L /2/R E if the control voltage Vc is equal to 0. This entails the fact that the upper limit of the gain has a maximum value beyond which it is impossible to go; said value can be obtained by decreasing the voltage Vc to 0, i.e., if the Gilbert multiplier is balanced. Therefore, if one wishes to provide a high gain, the ratio between R L and R E must be given a high value, by increasing the value of the load resistor R L with respect to the resistor R E . In practical terms, this entails the fact that a very large parasitic pole is generated which is determined by the product of the resistance R L and of the parasitic capacitor C, so that an increase in gain is inevitably associated with a reduction in the band, and this is a severe drawback. Another known embodiment of a variable-gain amplifier is given in the prior documents JP 02260906A and JP 01032509A, which substantially discloses a circuit as shown in Figure 2, in which only half of the differential circuit is shown. Said figure illustrates a differential input stage to which a differential signal IN is fed; said differential input stage is connected to a diode (the complete differential circuit is obviously connected to a pair of diodes) Q3, whose cathode terminal is connected to the base terminal of a bipolar transistor Q4, in which the collector terminal is connected to the supply voltage by interposing a load resistor R L and the emitter terminal is connected to a current source I2. The input signal IN is fed to a bipolar transistor Q1, whose collector terminal is connected to the cathode terminal of the diode Q3 and whose emitter terminal is connected to a resistor R E , which is in turn connected to a current source 2I 1 . Parasitic capacitors C L are respectively connected between the collector terminal of the transistor Q4 and the resistor R L (parasitic capacitor C L ) and between the collector terminal of the transistor Q1 and the cathode of the diode Q3 (parasitic capacitor C P ). The voltage gain can be obtained from this circuit configuration and is given by: A v = Vout Vin = R 1 R E · I 2 I 1 which is obtained, as a first approximation, by ignoring the effect of the input transistor Q1. Frequency response is instead given by the chart shown in Figure 3, in which the first pole of the transfer function is equal to: 1/R L C L .2π while the second pole is determined mainly by the contribution of the parasitic capacitor C P to the node V 1 , plus all the limitations determined by the transistors Q1, Q4 and Q3. The aim of the present invention is therefore to provide a programmable-gain multistage amplifier which has a broad bandwidth and reduced phase variations. Within the scope of this aim, an object of the present invention is to provide a variable-gain amplifier which has a wide programmability range. Another object of the present invention is to provide a variable-gain amplifier which is highly reliable and relatively easy to manufacture at competitive costs. This aim, these objects and others which will become apparent hereinafter are achieved by a programmable-gain multistage amplifier with broad bandwidth and reduced phase variations, comprising a differential input stage which is biased by a first current source and to which a differential voltage signal is fed, said stage being connected to a pair of diodes in which the cathode terminals are connected to respective bipolar transistors, which are biased by a second current source, and in which the collector terminals are connected to load resistors, the differential output of said amplifier being provided at the collector terminals of said bipolar transistors, characterized in that it comprises two circuit branches, each of which is constituted by a bipolar transistor and by a third current source, which is respectively connected to the collector terminal and emitter terminal of said bipolar transistor, in which the base terminal receives said differential voltage signal and the collector terminal is connected to the cathode terminal of a respective one of said two diodes, said circuit branches being mutually connected by means of a pair of capacitors. Further characteristics and advantages of the invention will become apparent from the description of a preferred but not exclusive embodiment of the device according to the invention, illustrated only by way of non-limitative example in the accompanying drawings, wherein: Figure 1 is a circuit diagram of a conventional variable-gain amplifier (Gilbert bridge); Figure 2 is a circuit diagram of a second embodiment of a conventional variable-gain amplifier; Figure 3 is a Bode diagram of the frequency response of the amplifier of Figure 2; Figure 4 is a circuit diagram of a multistage amplifier according to the present invention; Figure 5 is a circuit diagram for small signals, derived from the circuit diagram of Figure 4; and Figures 6 and 7 are Bode diagrams of the amplifier of Figure 4. In the various figures, identical elements are designated by the same reference numerals. Accordingly with reference to Figures 4 to 6, the multistage amplifier according to the present invention comprises two input bipolar transistors Q1 and Q2, which constitute a differential input stage whose base terminals receive a differential input signal Vin and Vip. The input stage is biased by a first current source 2I 1 by means of a pair of resistors R E . The collector terminals of the transistors Q1 and Q2 are respectively connected to the cathode terminals of two diodes Q3, whose anode terminals are connected to the supply voltage. Two other bipolar transistors Q4 and Q5 are connected, by means of their base terminals, to the respective cathode terminals of the diodes Q3, have common-connected emitter terminals and have collector terminals which are connected to the supply voltage by means of resistors R L . The bipolar transistors Q4 and Q5 are biased by a second current source 2I 2 which is suitable to feed current to the respective emitter terminals of the transistors Q4 and Q5. The particularity of the invention is the fact that it has two further circuit branches, each of which is constituted by a bipolar transistor Q0 and by a third current source I 0 which are respectively connected to the collector terminal and emitter terminal of the bipolar transistor Q0. The differential voltage signal is fed to the base terminal of said transistor, and its collector terminal is connected to the cathode terminal of the corresponding diode Q3 of the pair of diodes Q3. Said circuit branches are mutually connected by means of a pair of capacitors C E . Parasitic capacitors C L are respectively present at the collector terminals of the transistors Q4 and Q5. Assuming now that the effect of the parasitic capacitors C L at the nodes V1 is negligible, and that the effect of the transistors Q0 and Q1 is also negligible, the transfer function is as follows: Vo (S) Vin = gm2 gm3 · R L · gm1 1+gm1R E · 1 + SC E ( 1 + gm1R E )/gm1 1 + SR L C L where gm0, gm1, gm2 and gm3 are the transconductances of the corresponding bipolar transistors Q0, Q1, Q2 and Q3. In the realistic case in which gm1.R E >>1, one obtains: H(S) = Vo (S) Vin = gm4 gm3 · R L R E · 1 + SC E R E 1 + SR L C L = R L R E · I 2 I 1 · 1 + SC E R E 1 + SR L C L A negative real zero (in addition to a pole) has thus been introduced at the frequency: 1 2π R E C E Accurate calculations determine the dependency of the zero on the current I 0 and therefore the frequency programmability of the zero introduced by means of the two additional circuit branches. Considering in this regard the circuit for small signals of Figure 5, one obtains: H(S) = Vo (S) Vin = gm1 gm4 R L gm3 (1+gm1R E ) · 1 + SC E (1+SR L C L ) · (gm1 + gm + gm1 gm R E gm1 gm (1 + S C E gm ) · (1 + S C 3 gm3 ) The poles and the zero are as follows: Z 1 = · gm C E · gm1 gm + gm1 + gm gm1 R E p 1 = gm C E P  = 1 R L C L P 2 = gm3 C 3 where, if the term gm1 gm + gm1 + gm gm1 R E is represented by α Z 1 = α P 1 = P 1 · gm1 gm + gm1 + gm gm1 R E = P 1 · 1 1 + gm ( 1 + gm1 R E gm1 ) Depending on the values of the current I 0 , it is possible to have two different conditions in the corresponding Bode diagrams of the amplitude, which are shown in Figures 6 and 7. Likewise, the presence of the zero and of the pole added by introducing the pair of above-described circuit branches also affects the Bode diagrams of the phase. In practice it has been observed that the variable-gain amplifier according to the invention fully achieves the intended aim and objects, since it allows to achieve a dB-linear gain whose value is determined exclusively by one or more currents which can vary at will, maintaining a broad bandwidth, since it is not necessary to act on the load resistors R L in order to increase the gain. The variable-gain amplifier thus conceived is susceptible of numerous modifications and variations, all of which are within the scope of the inventive concept. Finally, all the details may be replaced with other technically equivalent elements. Where technical features mentioned in any claim are followed by reference signs, those reference signs have been included for the sole purpose of increasing the intelligibility of the claims and accordingly such reference signs do not have any limiting effect on the interpretation of each element identified by way of example by such reference signs.

Claims: A variable-gain multistage amplifier with broad bandwidth and reduced phase variations, comprising a differential input stage (Q 1 , Q 2 ) which is biased by a first current source (2I 1 ) and to which a differential voltage signal (Vip, Vin) is fed, said stage being connected to a pair of diodes (Q 3 ) in which the cathode terminals are connected to the base of respective bipolar transistors (Q 4 , Q 5 ), which are biased by a second current source (2I 2 ) and in which the collector terminals are connected to load resistors (R L ), the differential output of said amplifier being provided at the collector terminals of said bipolar transistors, characterized in that it comprises two circuit branches, each of which is constituted by a bipolar transistor (Q 0 ) and by a third current source (I o ), which is respectively connected to the collector terminal and emitter terminal of said bipolar transistor, in which the base terminal receives said differential voltage signal and the collector terminal is connected to the cathode terminal of a respective one of said two diodes (Q 3 ), said circuit branches being mutually connected by means of a pair of capacitors (C E ). The variable-gain amplifier according to claim 1, characterized in that said second current source is connected to the emitter terminals of said transistors The variable-gain amplifier according to claim 1, characterized in that the emitter terminals of said bipolar transistors are connected to each other. The variable-gain amplifier according to claim 1, characterized in that said differential input stage comprises two bipolar transistors, resistors being connected to the respective emitter terminals of said bipolar transistors, said current source connected to the differential stage being connected to a node for mutually connecting said resistors of the stage. The variable-gain amplifier according to claim 4, characterized in that said differential voltage signal is fed to the base terminals of said bipolar transistors of the differential input stage.

Inventors: MARCHESE STEFANO, PISATI VALERIO, PORTALURI SALVATORE, SAVO ALESSANDRO, MARCHESE STEFANO,, PISATI VALERIO,, PORTALURI SALVATORE,, SAVO ALESSANDRO,
Applicants: ST MICROELECTRONICS SRL, STMICROELECTRONICS S.R.L.
Application year: 1999
Main classification: H03G1
IPC codes: H03G1