Switching internet traffic through digital switches having a time slot interchange network

Abstract: Apparatus and a method for interfacing between the Internet and the Telephone Network. A time slot interchange (TSI) is enhanced by the addition of a supplementary memory (211) for storing data for accumulating Internet packets. When a packet has been accumulated, the appropriate header is inserted into the packet under the control of a routing processor (213), and the packet can then be sent as a group of adjacent PCM samples over a connection to the Internet. In other embodiments, information is sent to the Internet over a direct data pipe for transmitting ATM cells or Ethernet packets. A Vocoder signal processor (301) can be inserted between the TSI memory (103), and the supplementary memory to convert PCM voice samples into vocoded voice samples for transmission over the Internet. A modem signal processor (201) can be interposed between the TSI memory and the supplementary memory to convert between analog data (representing for example, shift key analog signals) and binary data for transmission within packets over the Internet. Advantageously, existing TSI units can be used to interface with both the telephone plant and the Internet.

Description: Technical Field: This invention relates to the switching of connectionless data traffic through digital switches of the type used for switching voice traffic. Problem: In recent years, the volume of Internet traffic has grown tremendously. Much of this traffic originates, is switched through, or terminates in a telephone switching system having a digital time slot interchange switching network. These switches which are now pervasive through the modern public switched telephone network were designed initially to handle voice and circuit switched data traffic. Subsequently, many of these switches were adapted to handle integrated switched digital network (ISDN) traffic which combines switched voice, circuit switched data traffic, and some (D-channel) data switched data traffic. At this point, these switches are being adapted to handle data traffic required for serving Internet customers, traffic which when it enters the Internet backbone network, becomes connectionless. The arrangements available in the prior art for serving connectionless traffic in telephone type switching systems are not efficient. One such arrangement uses an adjunct processor connected from and to a time slot interchange (TSI) network via trunk circuits of the type used for communicating with distant switching systems. This arrangement is expensive in its use of time slots and requires a large amount of memory in addition to the memory provided within the TSI. In the prior art, connections through a telephone access switch are made directly to the Internet backbone network; this ties up a trunk to the Internet network for the duration of an Internet call. Another alternative is to use the type of packet switch unit added to digital switches in order to process the relatively small amount of data switched traffic of ISDN lines. Such units have inadequate capacity, and also require the use of extra time slots and extra memory in addition to the TSI memory. A first problem with the prior art, therefore, is that there is no efficient way of handling the connectionless data traffic of Internet type data traffic. Solution: The above problem is solved, and an advance is made over the prior art in accordance with our invention, defined in claim 1, wherein a processor means is directly tied to the memory of a TSI. This processor accumulates and transmits packets in a packet assembler-disassembler, and inserts output packets into an output buffer. In one embodiment of the Applicants' invention, the processor inserts output packets into a loopback buffer (normally used to write diagnostic patterns into the TSI memory); this processor, advantageously can access all time slots of the TSI since this is a fundamental characteristic of the TSI. The processor provides a centralized location for rate adaptation to allow slow rate Internet traffic to be adapted to fast rate transmission. The operations, administration, and maintenance (OA&M) arrangements for the processor can be readily combined with the OA&M arrangements of the switch. The higher reliability of a telephone switch can be used advantageously to provide similar high reliability of this Internet type traffic. The processor can readily access the subscriber data base, translations, and the subscriber line signaling information received in the switch. In accordance with one preferred embodiment of the Applicants' invention, a digital signal processor in the TSI is used to modulate/demodulate PCM signals generated using analog lines and modems prior to being accumulated in the packet assembler-disassembler. Advantageously, this eliminates the need for external modems, that require extra time slots, to condition the PCM signals. In accordance with Applicant's preferred embodiment, the routing processor has access to all egress links via the loopback buffer access to all memories of the TSI. Advantageously, the processor may be connected to any idle time slot. In a second embodiment of the Applicants' invention, the processor may be directly connected to data interfaces such as an ATM data interface that can be readily added to the TSI. In this embodiment, the Internet traffic is transmitted over a data network as a plurality of ATM cells. In accordance with a third embodiment of the Applicants' invention, the processor may be directly connected to an LAN Interface such as Ethernet that could be readily added to the TSI. In this embodiment, the Internet traffic is transmitted directly to resident server advantageously providing Intranet capabilities for subscribers. Brief Description of the Drawing: Fig. 1 is a diagram of a prior art time slot interchange and interface circuits; Figs. 2 and 3 are block diagrams of preferred embodiments of Applicants' invention for interfacing between the telephone plant and the Internet or other data network. Detailed Description: Figure 1 is from the prior art, and shows in simplified form how a time slot interchange works to switch, for example, telephone traffic. An existing time slot bus interface 101 interfaces with various line unit and trunk unit circuits which provide multiplexed pulse code modulation (PCM) input signals. The signals are placed in input line time slots 111 and input trunk time slots 113, and are stored in a static random access memory (SRAM) 103. The contents of the SRAM are sent to outgoing line time slots 121, and outgoing trunk time slots 123 to an existing outgoing time slot bus interface 105 for interfacing with the outgoing side of line and trunk units. It is to be understood that any time slot can be used for a line signal or for a trunk signal in terms of the basic operation of the TSI. Figure 2 shows the enhancements of Figure 1 necessary to implement Applicants' invention. The trunk time slots are sent as signals 203 directly to a RAM 211 for storing PCM signals and assembling and disassembling packets. Line time slots are sent to a modem signal processor 201 which converts analog PCM data to pure digital data for use by unit 211. The modem signal processor 201 also converts pure digital data from unit 211 into analog PCM type data for transmission to line time slots 121. The assembled or disassembled packet in RAM 211 is modified by routing processor 213 to have the correct data address. The routing processor 213 then loads the packet into the TSI outgoing Interface 105. In performing its routing, the routing processor consults an Internet address table 215. The Internet address table is populated and entries are cleared from that table in accordance with the well-known teaching of the prior art. In the second embodiment, the packets are loaded or unloaded from an ATM Interface 221 over a packet data pipe 223 instead of the trunk time slots. In the third embodiment, that can provide Intranet services, the packets are loaded or are unloaded from an Ethernet interface 221 instead of the trunk timeslots. Just as any time slot in the existing TSI can communicate with any other time slot, in this embodiment, any packet, ATM cell or time slot can communicate with any other packet, ATM cell or time slot. The ATM interface can be used for interfacing directly with an ATM network. The Ethernet interface can be used for communicating with a data server (e.g., data base, Gateway router, proxy server, or traffic measurements analyzer), and can be used for interfacing with another routing processor that is co-located in the same switch. In order to send a data stream to a selected time slot of an outgoing time slot interface 105 of a different slice of the TSI unit, the data stream is sent from interface 105 to the loopback interface 108 and thence to the incoming time slot bus interface 101. Inputs to interface 101 are automatically broadcast to all the SRAM units of the other slices of the TSI unit, from which the data stream can be sent to the selected time slot. In the prior art, the loopback interface 108 is only used as a diagnostic tool. Advantageously, this provides an inexpensive arrangement for accessing outgoing time slots of slices not equipped with a packet assembly/disassembly unit and routing processor, from a slice that is so equipped. Figure 3 illustrates routing voice traffic over an Internet network. The modem signal processor 201 is replaced by a vocoder signal processor 301 so that PCM voice can be converted into packetized voice which is a much more efficient way of carrying voice signals. The routing processor now processes the H.323 and TCP/IP protocol information, this processing encompasses call setup and teardown, datagram routing, and call control. The routing that is required is telephony routing rather than Internet routing, and this is accomplished by having the protocol processor 313 communicate with a switching module processor 315 for the purposes of digit analysis and routing of voice signals; the SMP 315 determines the destination address of the deactivation vocoder, and informs the routing processor of this address. The routing processor ensures that datagrams leaving that vocoder will be routed to the appropriate destination.

Claims: Apparatus for performing a digital switching function comprising: an incoming time slot bus interface (101); a memory (103) for storing PCM samples from said incoming time slot bus interface; and an outgoing time slot bus interface (105) for receiving samples stored in said memory; characterised in that : said apparatus further comprises an additional memory (211) for storing incoming PCM samples, and connected to a packet assembler-disassembler for performing a packet assembly-disassembly function and for transmitting output data samples to said memory; and a routing processor (213) for controlling said additional memory (211) and said packet assembler-disassembler wherein packetized traffic received from said incoming time slot bus interface (101) via said additional memory (211) are assembled into packets provided with a destination address supplied by said routing processor (213) for transmission via said additional memory (211) to said outgoing time-slot bus interface (105); wherein said incoming time slot bus interface (101), memory (103) for storing PCM samples and outgoing time slot bus interface (105) are on one slice of a time slot interchange (TSI) unit, the apparatus further comprising: a loopback interface (108) for broadcasting selected outgoing time-slots of active communications to memories of other slices of said TSI unit. The apparatus of Claim 1, further comprising: a modem signal processor (201) for converting between analog digital signals and binary signals received from and transmitted to said memory; said modem signal processor (201) connected to said additional memory (211) for storing said binary signals into said memory. The apparatus of Claims 1 or 2 wherein said additional memory (211) is connected via a data packet pipe (223) to a data network. The apparatus of Claim 3 wherein said data network is an asynchronous transfer mode (ATM) network. The apparatus of Claim 3 wherein said additional memory (211) is connected via a data packet pipe to an Ethernet interface (221) for communicating with another server co-located with said apparatus. The apparatus of Claims 1 and 2 further comprising an Internet address table (215) wherein said routing processor (213) uses information from said Internet address table (215) to formulate packet headers for packets assembled in said additional memory (211). The apparatus of Claim 1 further comprising a Vocoder signal processor (301) for accepting PCM voice samples from said memory (103) for storage as vocoded voice signals in said additional memory (211) wherein ones of voice channels received from said incoming time-slot bus interface (101) are transmitted as vocoded data samples to said outgoing time-slot bus interface (105). The apparatus of Claim 2 wherein said modem signal processor (201) is further suitable for rate conversion, by storing input binary signals at a different rate than the rate of converting said stored signals into modem outputs.

Inventors: BODNAR BOHDAN LEW, DUNN JAMES PATRICK, HERSE CONRAD MARTIN, TAMMARU ENN, BODNAR, BOHDAN LEW, DUNN, JAMES PATRICK, HERSE, CONRAD MARTIN, TAMMARU, ENN
Applicants: LUCENT TECHNOLOGIES INC, LUCENT TECHNOLOGIES INC.
Application year: 1999
Main classification: H04Q11
IPC codes: H04L12, H04Q11