Method and apparatus of canceling multi-channel echoes

Abstract: The magnitude processing circuit 607 non-linearly processes the received signal 2 and then outputs a non-linear processed signal. The delay processing circuit 300 further delays the non-linear processed signal and then outputs a delayed processed signal. The delayed processed signal is time-multiplexed with the non-linear processed signal. The multiplexed signal is used instead of the received signal 2. The adaptive filters 122 and 124 operate alternately with the non-linear processed signal or with the delayed processed signal obtained by non-linearly processing and then delaying the received signal 2 as the input signal. Adaptive filter coefficients can be obtained by using twice the number of conditions compared with the number is twice that for the case where only the received signal 2 is used as the input signal.

Description: BACKGROUND OF THE INVENTION The present invention relates to a method and an apparatus for canceling echoes in a system using plural received signals and a single or plural transmission signals. There are multi-channel echo canceling methods or apparatuses that remove echoes caused by received signals propagating through spatial acoustic paths in the system of transmitting plural received signals or a single or plural transmission signals. Two types of multi-channel echo canceling apparatuses including a cascade connection type and a linear coupled type have been proposed in the Technical Report of the Institute of Electronics, Information and Communication Engineers (IEICE) of Japan, Vol. 84, No. 330, pp. 7-14, CS-84-178 (hereinafter referred to as reference 1). According to reference (1), the cascade connection type is inferior to the linear coupled type in echo suppression capability caused by constitutional constraint. Here, the case where a linear coupled multi-channel echo canceling apparatus (echo canceller) is applied to a two-channel system, together with received signals and transmission signals, will be described below as a prior art. Fig. 19 shows a linear coupled multi-channel echo canceller. The first loudspeaker 3 reproduces the first received signal 1. The second loudspeaker 4 reproduces the second received signal 2. The first echo 5 which is generated as the signal propagating via spatial acoustic paths from the first loudspeaker 3 to the first microphone 9 and the second echo 6 which is produced as the signal propagating through spatial acoustic paths from the second loudspeaker 4 to the first microphone 9 are added to the first transmission signal 12 or the voice of the talker 11 received with the first microphone 9, so that a first mixed signal 14 is created. Similarly, the third echo 7 which is generated as the signal propagating the spatial acoustic paths from the first loudspeaker 3 to the second microphone 10 and the fourth echo 8 which is produced as the signal propagating through spatial acoustic paths from the second loudspeaker 4 to the second microphone 10 are added to the second transmission signal 13 or the voice of the talker 11 received with the second microphone 10, so that a second mixed signal 15 is created. In order to remove the echoes introduced into the first mixed signal 14, the first adaptive filter 121 receives the first received signal 1 and then creates an echo replica 125 corresponding to the first echo 5. The second adaptive filter 122 receives the second received signal 2 and then creates an echo replica 126 corresponding to the second echo 6. The first subtracter 129 subtracts the echo replicas 125 and 126 corresponding to the first echo 5 and the second echo 6, respectively, from the first mixed signal 14. The first and second adaptive filters 121 and 122 are controlled to minimize the output of the first subtracter 129. The output of the first subtracter 129 becomes the first output signal 16 of the echo canceller 100. In order to remove the echoes introduced into the second mixed signal 15, the third adaptive filter 123 receives the first received signal 1 and then creates an echo replica 127 corresponding to the third echo 7. The fourth adaptive filter 124 receives the second received signal 2 and then creates an echo replica 128 corresponding to the fourth echo 8. The second subtracter 130 subtracts the replicas 127 and 128 corresponding to the third echo 7 and the fourth echo 8 from the second mixed signal 15, respectively. The third and fourth adaptive filters 123 and 124 are controlled to minimize the output of the second subtracter 130. The output of the second subtracter 130 becomes the second output signal 17 of the echo canceller 100. In the multi-channel teleconferencing system being one of important applications for multi-channel echo cancellation, plural microphones receive voices of talkers. Hence, received signals by each microphone can be approximately regarded as signals with an attenuation and a delay each depending on the distance between the talker and the microphone. The mutual correlation between received signals in different channels becomes very high. Let us now assume that the second received signal 2 was generated as a delayed version of the first received signal 1, an echo path can be modeled as a finite impulse response filter, and an echo canceller uses linear combination with adaptive finite impulse response filters. It is now assumed that x 1 (n) is a first received signal 1 at the time n, x 2 (n) is a second received signal 2 at the time n, and d(n) is an echo introduced into the mixed signal 14. When the time differences between the first received signals 1 and the second received signals 2 is n d (natural number), X 2 (n) is expressed by: x 2 ( n ) = x 1 ( n - n d ) For simplification, let us now assume that all the spatial acoustic paths ranging from the first and second loudspeakers 3 and 4 to the first and second microphones 9 and 10 are equal in the impulse response length (N). The echo d(n) mixed in the mixed signal 14 is the sum of the echo 5 and the echo 6 and is expressed by: where h 1,j is an impulse response sample value of a spatial acoustic path ranging from the loudspeaker 3 to the microphone 9, h 2,i is an impulse response sample value of a spatial acoustic path ranging from the loudspeaker 4 to the microphone 9, and i is an integer value between 0 and N-1. When x 2 (n) is eliminated by substituting the equation (1) into (2), the following equation (3) is obtained: The echo replica d(n) hat created by each of the adaptive filters 121 and 122 is expressed by: where w 1,i (n) is the i-th filter coefficient of the adaptive filter 121 and w 2,i (n) is the i-th filter coefficient of the adaptive filter 122. When x 2 (n) is eliminated by substituting the equation (1) into the equation (4), the following equation (5) is obtained: The residual echo e(n) is expressed by: The condition of completely eliminating echoes from the equation (6) is expressed by: h 1, i = w 1, i ( n ) i = 0,···, n d - 1 h 1, i + h 2, i - n d = w 1, i ( n ) + w 2, i - n d ( n ) i = n d ,···, N -1 h 2, i = w 2, i ( n ) i = N - n d ,···, N - 1 The following expression is uniquely determined by equation (7). [1] w 1,0 ( n ),···, w 1- n d -1 ( n ) and w 2, N - n d ( n ),···, w 2, N -1 ( n ) However, it is clear that the following expression has an unlimited number of solutions. [2] w 1, n d ( n ),···, w 1, N -1 ( n ) and w 2,0, ···, w 2, N - n d -1 (n) Particularly the solutions of the following equation depend on values of n d . [3] w 1, n d ( n ),···, w 1, N -1 ( n ) and w 2,0, ···, w 2, N - n d -1 ( n ) That is, a change of n d caused by a shift of the talker' s position leads to a change of the solution. This means that the echo canceling capability is degraded even with no variations in echo path. This creates an obstacle to applications in actual environments. In these discussions, the adaptive filters 121 and 122 used to remove echoes mixed in the mixed signal 14 have been assumed. Similarly, this discussion is applicable to adaptive filters 123 and 124. In order to solve the above-mentioned problems, there is a multi-channel echo canceling method where adaptive filters, respectively corresponding one to one to mixed signals, create echo replicas in response to one received signal. Thus, one adaptive filter per channel can estimate echoes caused by signals propagating from a single sound source in plural paths. This method was proposed in the IEEE Proceedings of International Conference on Acoustics, Speech and Signal Processing, Vol. 2, 1994, pp. 245-248 (hereinafter referred to as reference 2). The multi-channel echo canceling method of the reference 2 can avoid indefinite solutions because one adaptive filter removes the echo generated in one channel. As a result, the adaptive filter coefficients are converged to optimum values which are uniquely determined. However, the reference 2 discloses evaluation results proving the fact that the echo suppression is degraded when the parameters determined by the environment in use such as the locations of microphones receiving the taker s voice are not within a certain range. Hence, a multi-channel echo canceller based on linear combination has to be used, by considering the use in a wide variety of environments. Based on the above-mentioned premise, there is a method of uniquely determining the adaptive filter coefficients, for a multi-channel echo canceller based on linear combination, where the received signal is delayed and then is alternately selected as a new received signal the delayed signal in place of the received signal. This method was proposed in Technical Report, the Institute of Electronics, Information and Communication Engineers of Japan, Vol. DSP97-1, 1997, pp. 1-8 (hereinafter referred to as reference 3). In this multi-channel echo canceling method, the number of conditions used to calculate adaptive filter coefficients is increased because of the introduction of the delayed received signals, therefore, indefinite solutions do not occur. As a result, the adaptive filter coefficients converge to optimum values which are uniquely determined. However, shift of the acoustic image may often be perceived when the received signal is switched between the original and its delayed version. In order to overcome such a problem, there is a method of correcting the magnitudes of signals in both channels when the received signal and the delayed received signal are switched. This method was proposed in the Proceedings of the 12-th digital signal processing symposium of the Institute of Electronics, Information and Communication Engineers of Japan, 1997, pp. 531-536 (hereinafter referred to as reference 4). Moreover, there is a method that can uniquely determine adaptive filter coefficients by applying non-linear processing to the received signals in both channels, instead of switching the received signal and the delayed received signal. This method was proposed in the Proceedings of the IEEE International Conference on Acoustic, Speech and Signal Proceeding, Vol. 1, 1997, pp. 303-306 (hereinafter referred to as reference 5). However, the method disclosed in reference 4 provides a slow convergence rate, compared with the multi-channel echo canceller based on linear combination. Moreover, the Proceeding of the IEEE International Conference on Acoustics, Speech and Signal Processing, Vol. 6, 1998, pp. 3677-3680 (hereinafter referred to as reference 6) discloses that the method in the reference 5 provides a slower convergence rate, compared with the method in reference 4. As described in detail by referring to Fig. 19, the conventional multi-channel echo canceling method and apparatus has the disadvantage in that the solutions to adaptive filter coefficients are indefinite and are not guaranteed to be equal to the solutions uniquely determined by the impulse responses in the echo paths. Moreover, in the method proposed in reference 3, a shift of an acoustic (or sound) image may often be perceived when the received signal or the delayed received signal is selected. Moreover, in the methods proposed in the references 4 and 5, the convergence is slow, compared with the conventional multi-channel echo canceling method or apparatus. JONCOUR, Y. and SUGIYAMA, A. "A stereo echo canceller with correct echo-path identification" Technical Report of the IEICE, DSP97-1, IE97-1, April 1997 (04-1997), pages 1-8, discloses a multi-channel echo cancelling method comprising preprocessing a selected one of a plurality of received signals. EP 0 841 799 A discloses a similar multi-channel echo cancelling method. SUMMARY OF THE INVENTION The object of the invention is to provide a multi-channel echo canceling method and apparatus with an excellent sound quality and a short convergence time, wherein the coefficient values of the adaptive filters are converged to correct values which are uniquely determined by the impulse responses of the echo paths. The invention solves this object with the features of claims 1 and 9. In the multi-channel echo canceling apparatus according to the present invention, received signals are non-linearly processed while one obtained by delaying a received signal is used as a new received signal. Specifically, the multi-channel echo canceling apparatus has magnitude processing circuits for non-linearly processing received signals and a delay processing circuit for delaying the received signal 2 and then supplying the delayed signal to adaptive filters and to a digital-to-analog converter (DAC). Furthermore, the multi-channel echo canceling apparatus non-linearly processes the received signals. The multi-channel echo canceling apparatus also uses a delayed received signal as a new received signal and applies magnitude correction to the other input signals. Specifically, the multi-channel echo canceling apparatus has a magnitude processing circuit for non-linearly processing the received signal, a delay processing circuit for delaying a non-linearly processed signal and then supplying the delayed signal to the adaptive filters 122 and 124 and the digital-to-analog converter, a magnitude processing circuit for non-linearly processing the received signal, and a magnitude compensating circuit for correcting the magnitude of the non-linearly processed signal and then supplying the corrected signal to the adaptive filters and the digital-to-analog converter. In the multi-channel echo canceling apparatus and or method according to the present invention, one received signal is filtered to create a supplement signal. The adaptive filter is operated using a new signal obtained by time-multiplexing an original received signal and the created supplement signal. A plurality of adaptive filters estimate echoes caused by propagating from one signal source in plural paths. For that reason, an increase in the number of conditions for solving adaptive filter coefficients makes solutions definite eliminating the existing problem of indefinite coefficients. Hence, the adaptive filter coefficients are converged to optimum values which are uniquely determined. Moreover, the multiplex parameters of the original received signal and the supplement signal are controlled based on the nature of the received signal while movement of the sound image caused by introducing the supplement signal is canceled in the magnitude correction process to the input signal. Hence, degradation of the sound quality of the audible received signal directly supplied to the loudspeaker is suppressed so that a good sound quality can be maintained. Moreover, the synergistic effect of introducing the non-linear processing and the supplement signal can shorten the convergence time. BRIEF DESCRIPTION OF THE DRAWINGS These and other objects, features and advantages of the present invention will become more apparent upon a reading of the following detailed description and drawings, in which: Fig. 1 is a block diagram of a multi-channel echo canceller according to a first embodiment of the present invention; Fig. 2 is a block diagram illustrating the configuration of the magnitude processing circuit 607 or 608; Fig. 3 is a block diagram illustrating a first configuration of the delay processing circuit 200; Fig. 4A and 4B are block diagrams illustrating the configuration of the filter 213; Fig. 5 is a block diagram illustrating the second configuration of the delay processing circuit 200; Fig. 6 is a block diagram illustrating the analysis circuit 221 according to a first example of the present invention; Fig. 7 is a block diagram illustrating the analysis circuit 221 according to a second example of the present invention; Fig. 8 is a block diagram illustrating the third configuration of the delay processing circuit 200; Fig. 9 is a block diagram illustrating the fourth configuration of the delay processing circuit 200; Fig. 10 is a graph plotting the time-varying of the coefficient c o (k) of the coefficient multiplier of the filter shown in Fig. 3; Fig. 11 is a block diagram illustrating the fifth configuration of the delay processing circuit 200; Fig. 12 is a block diagram illustrating the sixth configuration of the delay processing circuit 200; Fig. 13 is a block diagram illustrating a multi-channel echo canceller according to a second embodiment of the present invention; Fig. 14 is a block diagram illustrating a multi-channel echo canceller according to a third embodiment of the present invention; Fig. 15 is a block diagram illustrating the configuration of the filter 213 or 230 in the delay processing circuit 300; Fig. 16 is a block diagram illustrating the first configuration of the filter 213 or 230 in the magnitude compensating circuit 400; Fig. 17 is a block diagram illustrating the second configuration of the filter 213 or 230 in the magnitude compensating circuit 400; Fig. 18 is a block diagram illustrating a multi-channel echo canceller according to a fourth embodiment of the present invention; Fig. 19 is a block diagram illustrating a prior art multi-channel echo canceller based on Linear Combination. DESCRIPTION OF THE EMBODIMENTS Embodiments of the present invention will be described in detail below with reference to the Figs. enclosed. It is now assumed to use a two-channel acoustic echo canceller that has a first received signal, a second received signal, a first mixed signal and a second mixed signal. This acoustic echo canceller can remove acoustic echoes caused by received signals propagating from a loudspeaker to a microphone via a spatial acoustic path. Fig. 1 shows a multi-channel echo canceller with two received signals and two transmission signals, according to an embodiment of the present invention. This multi-channel echo canceller differs from the multi-channel echo canceller based on linear combination of Fig. 19 in that the non-linear processing circuit 610 and the pre-processing circuit 500 process the received signal 2 supplied to the adaptive filters 122 and 124. The first mixed signal 14 and the second mixed signal 15 are created in a similar manner to that of the multi-channel echo canceller based on linear combination shown in Fig. 19. In the non-linear processing circuit 610, the magnitude processing circuit 607 non-linearly processes the received signal 2 while the magnitude processing circuit 608 non-linearly processes the received signal 1. The first and the second received signals 1 and 2, which are non-linearly processed, are transferred to the processing circuit 500. If there is a slight difference between the received signals 1 and 2, the non-linear process enlarges it, thus, reducing the correlation between the received signals in these channels. This means that the adaptive filter coefficients are properly identified. However, as described earlier, the non-linear processing alone results in a slow convergence rate. For that reason, it is intended to further reduce the correlation between channels by additionally using the pre-processing circuit 500. The delay processing circuit 200 in the pre-processing circuit 500 processes the output of the non-linear processing circuit 610 and then transmits the delayed process signal to the adaptive filters 122 and 124 and the digital-to-analog converter (DAC) 19. Fig. 2 is a block diagram illustrating the configuration of the magnitude processing circuit 607 or 608. The magnitude processing circuit 608 consists of the coefficient multiplier 691 receiving the received signal 2 and the polarity detection circuit 692 receiving the received signal 1. The coefficient multiplier 691 multiplies the input signal, or the received signal 2, by α. The polarity detection circuit 692 outputs 1 when the polarity of the input signal is positive and 0 when the polarity of the input signal is negative. The multiplier 693 receives the output of the coefficient multiplier 691 and the output of the polarity detection circuit 692, and outputs the product to the adder 694. The adder 694 has the other input terminal receiving the received signal 1 without any change. That is, with respect to the n-th received signal samples x 1 (n) and x 2 (n), the adder 694 outputs either (x 1 (n) + αx 2 (n)) when the polarity of the n-th received signal sample x 1 (n) is positive and produces x 1 (n) when the polarity of the n-th received signal sample x 1 (n) is negative. The produced signal becomes the output signal of the magnitude processing circuit 608. Similarly, the magnitude processing circuit 607 produces (x 2 (n) + αx 1 (n)) when the polarity of the input signal is positive and produces x 2 (n) when the polarity of the input signal is negative. Since the other channel is used for non-linear processing, the variation from the original signal becomes large. Hence, reduction of the correlation between the channels can be large. Fig. 3 is a block diagram illustrating the configuration of the delay processing circuit 200. The magnitude processing circuit 607 inputs its output signal to one input terminal of the switch 210 and the filter 213 via the input terminal 201. The filter 213 filters the signal from the magnitude processing circuit 607 and then inputs the filtered signal to the other input terminal of the switch 210. In other words, the signal from the magnitude processing circuit 607 and the signal obtained by filtering the signal from the magnitude processing circuit 607 with the filter 213 are respectively supplied to the two input terminals of the switch 210. The frequency divider 212 inputs a control signal to the switch 210. The control signal is created by frequency-dividing the clock signal from the clock signal generator 211. Rectangular pulses with the period equal to the sampling period T of the received signal 2 are generated as the clock signal. Only for convenience in explanation, the clock signal generator 21 is shown in Fig. 3. Actually, it is rare to have a dedicated clock signal generator in the delay processing circuit 200. In this case, a common clock signal to the whole system is supplied to the frequency divider 212 from outside of the delay processing circuit 200. If the frequency divider 212 is a 1/M frequency divider for dividing the frequency of the input signal with a factor of 1/M, the frequency divider 212 alternately outputs a level of "1" and a level of "0" to the switch 210 with a period of MT/2. The switch 210 selects the signal from the magnitude processing circuit 607 or the output signal from the filter 213 in synchronicity with the leading edge of a rectangular pulse from the frequency divider 212 to transfer it to the output terminal 202. The signal delayed by the above-mentioned procedure is output as a pre-processed signal from the output terminal 202. Fig. 4A is a block diagram illustrating the configuration of the filter 213. Here, an L-tap FIR (Finite Impulse Response) filter is assumed as the filter 213. However, another type of a filter such as an IIR filter may also be used as the filter 213. Referring to Fig. 4A, the intput terminal 2130 receives the output signal from the magnitude processing circuit 607 of Fig. 1. The signal of the output terminal 2134 is supplied to the switch 210 of Fig. 3. The signal of the input terminal 2130 is input to the delay element 2131 1 and the coefficient multiplier 2132 0 . Each of delay elements 2131 1 , 2131 2 ,···,2131 L-1 is a unit delay element for delaying the input signal by one sample. The delay elements are connected in a cascade form to construct a tapped delay line with L taps. The coefficient multipliers 2132 0 , 2132 1 ,···, 2132 L-1 have coefficients c 0 , c 1 , ···, c L-1 , respectively. For L = 2, c 0 = 0 and c 1 = 1, the filter 213, for example, consists of only the delay element 2131 1 , as shown in Fig. 4B. For M = 1, that is, for the case where the frequency divider 212 of Fig. 3 does not divide the frequency, the embodiment of the present invention shown in Fig. 4B is equivalent to the method disclosed in the Technical Report of the Institute of Electronics, Information and Communication Engineers of Japan, Vol. DSP96-100, 1996, pp. 17-24 (reference 7). The reference 7 analytically shows that the adaptive filter coefficients are uniquely determined. Let us now consider M > 1. In this case, it is apparent that the number of conditionals for calculating the adaptive filter coefficients is the same as that for M = 1. Consequently, the adaptive filter coefficients can be uniquely determined. Even general cases, where the filter 213 cannot be expressed by L = 2, c 0 = 0 and c 1 = 1, can be handled in a similar manner. When the output of the filter 213 is equivalent to the input signal, that is, the filter 213 is expressed by L = 1 and c 0 = 1, the output of the delay processing circuit 200 depends on the status of the switch 210. Consequently, the number of conditionals for calculating adaptive filter coefficients is equal to the case where the filter 213 is expressed by L = 2, c 0 = 0 and c 1 = 1. Thus, the adaptive filter coefficients can be uniquely determined. Except for M = infinite, discontinuity occurs in the output of the switch 210 caused by the switching operation of the switch 210. This signal discontinuity is subjectively perceived as noise. The frequency of the noise is inversely proportional to the value of M. As M has a large value, it is more difficult to perceive the signal discontinuity, compared with M of a small value, however, the perception itself is unavoidable. The reference 3 discloses that the noise can be suppressed by time-varying coefficients c j (where j = 0, 1, ···, L-1) of the filter 213, together with an example of how to control the time-varying coefficients. As the coefficient update algorithm for the adaptive filters 121, 122, 123 and 124, the LMS algorithm is disclosed in the "Adaptive Signal Processing" , 1985, pp. 99-113, Prentice-Hall Inc., USA (hereinafter referred to as reference 8) and the normalized LMS (NLMS) algorithm is disclosed in "Adaptive Filters" , 1985, pp. 49-56, Kulwer Academic Publications, USA (hereinafter referred to as reference 9). It is now assumed that the adaptive filters 121 and 122 are controlled using the LMS algorithm with the same step sizes. The i-th coefficient of the adaptive filter 121 w 1,i (n+1) after the (n+1)-th adaptation is expressed by its value w 1,i (n) after the n-th adaptation, as follows: w 1, i ( n + 1) = w 1, i ( n ) + µ e 1 ( n ) x 1 ( n - i ) The i-th coefficient of the adaptive filter 122 w 2,i (n+1) after the (n+1)-th adaptation is expressed by its value w 2,i (n) after the n-th adaptation, as follows: w 2, i ( n + 1) = w 2, i ( n ) + µ e 2 ( n ) x 1 ( n - n d - i ) This is applicable to the coefficient adaptation of the adaptive filters 123 and 124. Fig. 5 is a block diagram illustrating the delay processing circuit 200 with the second configuration. The second configuration differs from the first configuration of Fig. 3 in that the delay processing circuit 200 has the analysis circuit 221 and the AND circuit 220, in addition to the frequency divider 212. In the first configuration of Fig. 3, the switch 210 changes its status every M samples. However, in the configuration of Fig. 5, the switch 210 changes its status according to the logical product of the output signal of the frequency divider 212 and the output signal from the analysis circuit 221. The analysis circuit 221 analyzes the output signal from the magnitude processing circuit 607. The analysis circuit 221 produces 1 when the analyzed result satisfies a predetermined condition and produces "0" when the analyzed result does not satisfy the predetermined condition, then, outputting it to the AND circuit 220. The frequency divider 212 supplies a control signal "0" or "1" to the AND circuit 220. The AND circuit 220 detects that the outputs from the analysis circuit 221 and the frequency divider 212 are identical, i.e. the time information coincides with a period of M samples and the analysis results of the input satisfy the predetermined condition simultaneously, and then outputs the signal to control the switching of the switch 210. Various methods may be considered to analyze the output of the magnitude processing circuit 607 with the analysis circuit 221. For example, upon focusing on the suppression of subjective noises due to signal discontinuity, variations in magnitude of the output signal of the magnitude processing circuit 607 may be detected. Fig. 6 shows the analysis circuit according to the first example. Referring to Fig. 6, the analysis circuit 221 consists of a delay element 2210, a subtracter 2211, an absolute value circuit 2212, a decision circuit 2213, and a memory 2214. The delay element 2210 and the subtracter 2211 receive the output signal from the magnitude processing circuit 607, that is, the input signal to the analysis circuit 221. The delay element 2210 delays the input signal by one sample period and then outputs the delayed signal to the subtracter 2211. The subtracter 2211 subtracts the output signal of the delay element 2210 from the output signal of the magnitude processing circuit 607 and then outputs the difference to the absolute value circuit 2212. The absolute value circuit 2212 obtains the absolute value of its input and outputs the result to the decision circuit 2213. The memory 2214 supplies a threshold value  to the decision circuit 2213. The decision circuit 2213 outputs 1" when the signal from the absolute value circuit 2212 is smaller than the threshold value and otherwise outputs "0" . The decision circuit 2213 outputs its output to the AND circuit 220 of Fig. 5. Namely, when variations in magnitude of the output signal of the magnitude processing circuit 607 are small, the switch 210 changes its status. Fig. 7 shows the analysis circuit 221 based on a post masking, according to the second example. The post masking is a phenomenon in which signal samples with a small magnitude following a certain signal sample cannot be perceived by a human' s ear. Post masking is described in detail in "Pcychoacoustics" by Zwicker, translated by Yamada, published by Nishmura Syoten, 1992, pp. 132-146 (reference 10). Referring to Fig. 7, the analysis circuit 221 consists of a group of delay elements 2215 0 , 2215 1 , ···, 2215 N-1 , a group of difference evaluation circuits 2216 0 , 2216 1 , ···, 2216 N-1 , and a control signal generator 2217. N is a positive integer. The magnitude processing circuit 607 outputs its output signal to the delay element 2215 0 and the difference evaluation circuit 2216 0 . Delay elements 2215 0 , 2215 1 , ···, 2215 N-1 form a tapped delay line which delays the supplied signal by one sample period. The difference evaluation circuit 2216 0 evaluates the difference between the output signal from the magnitude processing circuit 607 and the signal supplied from the delay element 2215 0 and outputs the result to the control signal generator 2217. Difference evaluation can be performed by subtracting the output signal from the magnitude processing circuit 607 from the signal supplied from the delay element 2215 0 . Then, "1" is output when the result is larger than a predetermined threshold value δ 0 . "0" is output when the result is smaller than the predetermined threshold value δ 0 . Moreover, by subtracting the absolute value of an output signal from the magnitude processing circuit 607 from the absolute value of a signal supplied from the delay element 2215 0 . "1" is output when the result is larger than a predetermined threshold value ε 0 and "0" is output when the result is smaller than a predetermined threshold value ε 0 . Similarly, each of the difference evaluation circuits 2216 0 , 2216 1 , ···, 2216 N-1 evaluates the difference between the signal supplied from the corresponding delay element and the output signal from the magnitude processing circuit 607 and then outputs the result to the control signal generator 2217. The control signal generator 2217 creates a control signal using evaluation results of difference supplied from the difference evaluation circuits. The control signal, for example, can be created based on a coincidence among the input signals from the difference evaluation circuits. That is, "1" is output for a coincidence while "0" is output for a non-coincidence. The majority of signals from the differential evaluation circuits may be used as a control signal. When "1" holds the majority, "1" is output. When "1" holds a minority, "0" is output. As another example, respective input signals may be multiplied by a predetermined independent constant. The sum of the multiplication results is compared with a predetermined threshold. When the sum is larger than the threshold value, "1" is output. Otherwise, 0" is output. It is apparent that the control signal generator 2217 may use a coincidence between respective multiplication results or their majority. In the above-mentioned procedure, when the magnitude of the output from the magnitude processing circuit 607 decreases below the past value, the switch changes its state. The reference 10 discloses pre-masking as a similar phenomenon to post masking. Pre-masking is a phenomenon in which signals with a small magnitude are masked by signals consecutive thereto, thus, are inaudible by a human' s ear. In order to detect pre-masking, the whole samples of the signal must be delayed. That is, delay elements must be inserted in the two input paths for the switch 210 shown in Fig. 5. In association with the insertion of delay elements, delay elements with a corresponding delay amount are inserted in the path for the received signal 1 before the adaptive filters 121 and 123 to adjust the delay of the received signal 1. The delay amounts of the delay elements depend on the time required for pre-masking detection. For example, at least a 2-sample delay is required to detect the pre-masking due to the signal delayed by 2 samples. In the calculation by the difference evaluation circuits 2216 0 , 2216 1 , ···, 2216 N-1 shown in Fig. 7, the outputs must be inverted. That is, "0" is output when "1" is to be originally output while "1" is output when "0" is to be originally output. This inversion allows pre-masking to be detected. In the above-mentioned procedure, the switch 210 changes immediately its state before the magnitude of the output signal of the magnitude processing circuit 607 increases. In the configuration of Fig. 5, at least for M sample, after the output signal of the frequency divider 212 does not match with the output of the analysis circuit 221, the switch 210 cannot change its state. That is, the switching period of the switch 210 is limited to an integer multiple of M. The delay processing circuit 200 may be constructed such that the switching period of the switch 210 is not limited to an integer multiple of M. Fig. 8 is a block diagram illustrating the delay processing circuit 200 with the third configuration. This configuration differs from the second configuration of Fig. 5 in that a new analysis circuit 222 is added instead of the frequency divider 212, the analysis circuit 221 and the AND circuit 220. In the configuration of Fig. 5, the switch 210 is controlled by the logical AND between the output of the frequency divider 212 and the output of the analysis circuit 221. However, in the configuration of Fig. 8, the analysis circuit 222 analyzes the output signal of the magnitude processing circuit 607 and then directly creates a control signal for the switch 210 using the analysis result and rectangular pulses. The rectangular pulses are supplied from the clock generation circuit 211 to the analysis circuit 222. The analysis circuit 222 performs basically the same analysis as the analysis circuit 221. The analysis circuit 222 can detect a variance in magnitude of the output signal from the magnitude processing circuit 607 or can perform analysis based on the pre/post masking. When the analysis result indicates that the output signal of the magnitude processing circuit 607 satisfies predetermined conditions and a predetermined sampling period (M 2 T) or more has passed from the immediate previous switching operation, the analysis circuit 222 outputs a control signal of "1". M 2 is a positive integer satisfying M 2 > 1. In other cases, the analysis circuit 222 outputs a control signal of "0" . The analysis circuit 222 outputs the control signal to the switch 210 to control the switching thereof. Specifically, the sampling period is evaluated by counting the rectangular pulses with a counter and then comparing the count with the value M 2 stored in a memory. If the count is equal to the value M 2 , it is judged that the sampling period (M 2 T) has passed. Thus, the analysis circuit 222 outputs "1" while the counter is reset. In order to suppress the subjective noise due to signal discontinuity, a case with time-varying of the coefficients c j (where j = 0, 1, ···, L-1) of the filter 213 has been explained for L = 2, using Fig. 3. However, the delay process circuit 200 without the switch 210 in Fig. 3, 5 or 8 may be used instead by suitably setting the coefficients c 0 (k) and c 1 (k). Fig. 9 is a block diagram illustrating the delay processing circuit 200 with the fourth configuration. The filter 230 receives the received signal 2 via the input terminal 201. The filter 230 filters the received signal 2 and outputs the filtered signal to the output terminal 202. The clock generation circuit 211 and the frequency divider 212 respectively input control signals to the filter 230. The clock generation circuit 211 generates rectangular pulses of a period equal to the sampling period T of the received signal 2. The frequency divider 212 supplies the control signal obtained by frequency-dividing the clock from the clock generation circuit 211. The filter 230 controls the time-varying coefficient based on the control signals. For L = 2 in Fig. 3, c 0 (k) is shown in Fig. 10. c 1 (k) is expressed by: c 1 ( k ) = 1 - c 0 ( k ) where i is an arbitrary natural number. c 0 (k) takes c 0 (0) and 0 alternately with a period of 2MT. Strictly, only the first JT and the last JT in a zero-valued range the value of c 0 (k) directly changes from c 0 (0) to 0 or from 0 to c 0 (0). Since c 1 (k) is given by the equation (10), either c 0 (k) or c 1 (k) is zero while the other is non-zero, almost over the whole period of time. That is, c 0 (k) and c 1 (k) are exclusive to each other. A similar switching operation to that of the switch 210 can be executed without the switch 210 of Fig. 3. It may be considered that L ≠ 2 corresponds to taps of the filter 230 connected in parallel. In other words, c 0 (k) and c 1 (k), c 2 (k), ···, c L-1 (k) are exclusive to each other. When one coefficient is zero, the other coefficients become non-zero. Each of c 1 (k), c 2 (k), ···, c L-1 (k) and the corresponding vale of J may respectively have a different value. Fig. 11 is a block diagram illustrating the delay processing circuit 200 with the fifth configuration. The filter 203 receives the output signal of the magnitude processing circuit 607 input via the input terminal 201. The filter 203 filters the output signal from the magnitude processing circuit 607 and then outputs the filtered signal to the output terminal 202. The filter 230 also receives the control signals from the clock generation circuit 211 and the AND circuit 220. The AND circuit 220 receives the signal from the analysis circuit 211 and the signal from the frequency divider 212. The clock generation circuit 211 generates rectangular pulses with a period equal to the sampling period T of the output signal from the magnitude processing circuit 607. The frequency divider 212 supplies a control signal to the AND circuit 220. The control signal is created by frequency-dividing the clock from the clock generation circuit 211. The analysis circuit 221 analyzes the output of the magnitude processing circuit 607 and then outputs "1" to the AND circuit 220 when the result of the analysis satisfies a predetermined condition and "0" to the AND circuit 220 when the result of the analysis does not satisfy the predetermined condition. As described earlier, the AND circuit 220 receives a control signal of "0" or 1 from the frequency divider 212. The AND circuit 220 detects that the output of the analysis circuit 221 is identical to the output of the frequency divider 212. That is, the time information coincides with the M sample periods and the analysis result on the input signal satisfies the predetermined conditions. Then, the AND circuit 220 outputs its output signal to the filter 230. The filter 230 controls the time-varying coefficients based on the control signals. Fig. 12 is a block diagram illustrating the delay processing circuit 200 with the sixth configuration. This configuration differs from the fifth configuration (described with Fig. 11) in that a new analysis circuit 222 is added instead of the frequency divider 212, the analysis circuit 221 and the AND circuit 220. That is, in the configuration of Fig. 11, the time-varying coefficients of the filter 230 are controlled by the logical AND between the output signals of the frequency divider 212 and the analysis circuit 221. However, in the configuration of Fig. 12, the analysis circuit 222 analyzes the output signal of the magnitude processing circuit 607. Then, the control signals for the filter 230 are directly created using the analysis result and the rectangular pulses supplied from the clock signal generation circuit 211 to the analysis circuit 222. The pre-processing circuit 500, which has the delay processing circuit 200 receiving the received signal 2, has been described by referring to Fig. 1. The pre-processing circuit 500 may have the delay processing circuit 200 which receives the received signal 1. Fig. 13 shows a multi-channel echo canceller with two channels for the received signals and two channels for the transmission signals, according to the second embodiment of the present invention. The second embodiment differs from the first embodiment of Fig. 1 in that the pre-processing circuit 500 and the non-linear process circuit 610 are exchanged in the order. As described earlier, the pre-processing and the non-linear processing are independently applied. Hence, the configuration in which the order of these processings is exchanged can provide similar effects. Next, a case where a new pre-processing circuit 510 is used, wherein the delay processing circuit 300 is applicable to the received signal 2 to create a delayed signal and the magnitude compensating circuit 400 is applicable to the received signal 1, will be described below. Fig. 14 shows a multi-channel echo canceller with two channels for the received signals and two channels for the transmission signals according to a third embodiment of the present invention. Unlike the first embodiment of Fig. 1, the delay processing circuit 300 delays the received signal 2 for the adaptive filters 122 and 124 and the magnitude compensating circuits 400 compensates the amplitude of the received signal 1 for the adaptive filters 121 and 123. Like the delay processing circuit 200, the delay processing circuit 300 processes the output signal of the magnitude processing circuit 607 to converge the coefficients to correct values. The magnitude compensating circuit 400 corrects the magnitude of the output signal of the magnitude processing circuit 608 to compensate the shift of the acoustic image in the acoustic space caused by the delay processing of the delay processing circuit 300. The delay processing circuit 300 corrects the magnitude of the output signal of the magnitude processing circuit 607 whenever the magnitude compensating circuit 400 performs magnitude correction. Likewise, the delay processing circuit 200, the delay processing circuit 300 and the magnitude compensating circuit 400 can be constructed in the configuration shown in Fig. 3, 5, 8, 9, 11 or 12. When the configuration of Fig. 3, 5 or 8 is used, the filter 213 is modified from that of Fig. 4. When the configuration of Fig. 9, 11 or 12 is used, the filter 230 is modified from that of Fig. 4. Fig. 15 is a block diagram illustrating the configuration of the filter 213 containing the delay processing circuit 300 with the configuration of Fig. 3, 5 or 8 and the configuration of the filter 230 containing the delay processing circuit 300 with the configuration of Fig. 9, 11 or 12. Here, it is assumed that the filter is an L-tap FIR filter. However, the filter may be in another type such as an IIR filter. Unlike the configuration of Fig. 4, the coefficient multipliers g 1 , g 2 , ···, g L-1 are inserted in cascade to the coefficient multipliers c 0 , c 1 , c 2 , .., c L-1 , (except c 0 ). This means that the coefficient multipliers c 0 , g 1 c 1 , .., g L-1 c L-1 are equivalently substituted for the coefficient multipliers c 0 , c 1 , c 2 , ···, c L-1 of Fig. 4. The operation of the circuit of Fig. 15 is equal to that of the circuit of Fig. 4. Hence, it is apparent that the use of the filters of Fig. 4 allow the coefficient values c 0 , c 1 , ···, c L-1 of the coefficient multipliers 2132 1 , 2132 2 , ···, 2132 L-1 to be replaced with the coefficient values g 1 c 1 , .., g L-1 c L-1 . Fig. 16 is a block diagram illustrating the configuration of the filter 213 having the magnitude compensating circuit 400 with the configuration of Fig. 3, 5 or 8 as well as the configuration of the filter 230 having the magnitude compensating circuit 400 with the configuration of Fig. 9, 11 or 12. Here, it is assumed that the filter is an L-tap FIR filter. However, the filter may be in another type such as an IIR filter. Unlike the configuration of Fig. 15, the delay elements 2132 1 , 2132 2 , ···, 2132 L-1 are not used. The filters shown in Figs. 15 and 16 operate complimentarily. That is, the shift of an acoustic image is corrected by a group of coefficient multipliers 2137i (i = 1, 2, ···, L-1) or a group of coefficient multipliers 2138 i (i = 1, 2, ···, L-1). The two groups correspond to each other. The principle of correcting a shift of the acoustic image caused by delay variations by magnitude correction is disclosed in "Medical Research Council Special Report" , No. 166, 1932, pp. 1-32 (reference 11) and "Journal of Acoustical Society of America" , Vol. 32, 1960, pp. 685-692 (reference 12) and "Journal of Acoustical Society of America" , Vol. 94, 1993, pp. 98-110 (reference 13). In the example of Fig. 13, since the output of the delay processing circuit 200 is delayed, the acoustic images of acoustic signals reproduced for the talker 11 by the loudspeakers 3 and 4 move toward the loudspeaker 3. In order to compensate for the shift, the magnitude of the signal radiated from the loudspeaker 4 in the acoustic space is increased while the magnitude of the signal radiated from the loudspeaker 3 in the acoustic space is decreased. According to the reference 13, in order to move the acoustic image by magnitude correction, with the total power of the received signals 1 and 2 maintained constant, the following equation must be held between the power P 1 (dB) and the power P 2 (dB), the powers of these signals. P 1 + P 2 = C where C is a positive constant. For the power of the received signal 1 and the power of the received signal 2 which are P 1 bar dB and P 2 bar dB respectively before the magnitude correction, the following equations must be satisfied: P 1 = P 1 - Δ P /2 P 2 = P 2 + Δ P /2 where ΔP/2 is a power correction value. For that reason, the coefficients g i and f 1 of the multipliers for correction corresponding to the filters shown in Figs. 15 and 16 can be determined by the equations (14) and (15). f i = 10 -Δ P i 40 g i = 10 Δ P i 40 where ΔP i is a power compensation coefficient required to compensate the received signal delayed by i samples. Fig. 17 illustrates another configuration of the filter of Fig. 16. In Fig. 16, a plurality of coefficient multiplier groups, each having coefficient multipliers serially connected, are connected in parallel. Referring to Fig. 17, the multiplier groups are integrated into one coefficient multiplier unit. The input signal is input to the input terminal 2130. The multiplier 2139 with a time varying coefficient c Σ multiplies the input signal by c Σ . The resultant product is output via the output terminal 2134. c Σ is expressed by the following equation. The delay processing circuit 300 applied to the received signal 2 and the magnitude compensating circuit 400 applied to the received signal 1 have been described by referring to Figs. 14 to 17. However, a similar description can be apparently applied to the delay processing circuit 300 used for the received signal 1 and the magnitude compensating circuit 400 used for the received signal 2. Fig. 18 depicts a multi-channel echo canceller with two channels for the received signals and two channels for the transmission signals, according to a fourth embodiment of the present invention. Like the relationship between Figs. 1 and 13, Fig. 18 shows the configuration where the pre-processing circuit 510 and the non-linear processing circuit 610 in Fig. 14 are exchanged in the order. According to the above-mentioned embodiments, echo cancellation for multi-channel teleconferencing systems has been discussed. However, a similar discussion can be applied to single-channel, multi-point teleconferencing systems being another application of multi-channel echo cancellation. In the single-channel, multi-point teleconferencing system, an attenuation and a delay are suitably added to the voice of a talker received by a single microphone such that the talker is localized at a desired position between the loudspeakers used on the receiver side. A plurality of such signals corresponding to the number of loudspeakers on the receiving side are created. When the number of loudspeakers on the receiving side is 2, the two signals, to which the attenuation process and the delay processing in the prior-art configuration shown in Fig. 19 are applied, respectively, correspond to the received signal 1 and the received signal 2. Hence, the embodiments of the present invention can be applied without any change. Here, an example where the received signal 1 and the received signal 2, the first mixed signal 14 and the second mixed signal 15 are used has been described. However, the present invention is applicable to the case where plural received signals and a single or plural transmission signals are used. In the examples, the received signal propagates from loudspeakers to a microphone via spatial acoustic paths and the acoustic echo received by the microphone is removed. However, the present invention is applicable to cancel echoes other than acoustic echoes, for example, echoes such as crosstalk. Moreover, examples where finite impulse response filters based on the LMS algorithm are used as the adaptive filters 121, 122, 123 and 124 have been described. However, the present invention can use an arbitrary type of adaptive filters. For example, when the finite impulse response filters based on the NLMS algorithm are used, the filter coefficient updates are expressed by: The sequential regression algorithm (SRA) (reference 8) and the RLS algorithm (reference 9) may also be used as the algorithm for adaptive filters. Infinite impulse response (IIR) adaptive filters may be used instead of the finite impulse response (FIR) adaptive filters. Moreover, the subband adaptive filters or transform-domain adaptive filters may be used. In the multi-channel echo canceling system according to the present invention, one received signal is filtered to create a supplement signal. Then, the adaptive filters are operated using a new received signal obtained by time-multiplexing the supplement signal with the original received signal. The adaptive filter operates in response to a signal obtained by multiplexing the original received signal with a new supplement signal. Thus, plural adaptive filters are not used to estimate echoes caused by signals propagating from one signal source via plural paths. Consequently, the number of conditional equations for adaptive filter coefficients and the problem does not occur that the solution becomes indefinite. This is because the conventional multi-channel echo canceller based on linear combination can use only the three conditionals in (7). However, the present invention can use six conditionals, that is twice the number in the prior art, so that the adaptive filter coefficients converge to optimum values which are uniquely determined. Moreover, according to the present invention, the multiplex parameter for the original received signal and the supplement signal is controlled based on the nature of the received signal. Meanwhile, the sound shift caused by the introduction of the supplement signal is canceled by correcting the magnitude of the input signals. Thus, the degradation in sound quality of the audible received signal directly supplied to the loudspeaker is suppressed, so that good sound quality can be maintained. Moreover, the convergence time can be shortened by a synergistic effect regarding the non-linear processing and reduction in correlation between the received signals due to the introduction of the supplement signal.

Claims: A multi-channel echo cancelling method suitable for a system having a plurality of received signals and a single or plural transmission signals, wherein a plurality of echoes are removed by subtracting a plurality of replicas from a plurality of mixed signals containing said plurality of echoes and said transmission signals, said plurality of echoes being caused by said plurality of received signals propagating in spatial acoustic paths or caused by crosstalks on transmission lines, said plurality of replicas corresponding to said plurality of echoes and being created by plural adaptive filters, said method comprising the steps of either: a) applying non-linear processing to said plurality of received signals, to obtain a plurality of non-linear received signals; and pre-processing a selected signal of said plurality of non-linear received signals to produce a new received signal; and inputting said new received signal and the remaining non-linear received signals to said adaptive filters for creating said plurality of replicas, or b) pre-processing a selected signal of said plurality of received signals to produce a new received signal; and non-linearly processing said new received signal and the remaining received signals to produce a plurality of non-linear received signals; and inputting said non-linear received signals to said adaptive filters for creating said plurality of replicas; wherein in each of said non-linear processing steps, a contribution from at least two input signals is used, either, in case a), at least two of said plurality of received signals, or, in case b), at least two of said plurality of received signals, or at least one of said plurality of received signals and said new received signal. A multi-channel echo cancelling method according to claim 1, wherein the pre-processing step comprises: filtering said selected signal to produce a processed signal; and time-multiplexing said selected signal with said processed signal to produce said new received signal. The multi-channel echo cancelling method defined in claim 2, wherein the steps of filtering and time-multiplexing comprise using plural time-varying coefficients with values of zero and values of non-zero. The multi-channel echo cancelling method defined in claim 2, wherein the period with which said selected signal and said processed signal are time-multiplexed is constant and longer than the sampling period of the signals to be multiplexed. The multi-channel echo cancelling method defined in claim 2, wherein the period with which said selected signal and said processed signal are time-multiplexed is longer than the sampling period of the signals to be multiplexed and changes depending on analysis results of the signals to be multiplexed. The multi-channel echo cancelling method defined in claim 1, further comprising the steps of: correcting the magnitude of said selected signal; and correcting the magnitudes of the remaining of said non-linear received signals to produce magnitude-corrected signals. The multi-channel echo cancelling method defined in claim 1, wherein each of said non-linear processing steps uses the contribution of two input signals and comprises the steps of multiplying one of said input signals by a constant according to the polarity of the other one of said input signals and then adding the product to said other one of said input signals. The multi-channel echo cancelling method defined in claim 2, further comprising the step of switching between said selected signal and said processed signal to implement said time-multiplexing. A multi-channel echo cancelling apparatus suitable for a system having a plurality of received signals and a single or plural transmission signals, wherein a plurality of echoes are removed by subtracting replicas from a plurality of mixed signals containing said plurality of echoes and said transmission signals, said plurality of echoes being caused by said plurality of received signals propagating in spatial acoustic paths or caused by crosstalks on transmission lines, said plurality of replicas corresponding to said plurality of echoes created by plural adaptive filters, said apparatus comprising: a plurality of adaptive filters (121-124), each respectively corresponding to each one of said spatial acoustic paths or to each one of said crosstalk paths between channels, each one of said adaptive filters adapted to create each one of said replicas in response to the same signal as the signal supplied to a corresponding path; and said apparatus comprising either a) a non-linear processing circuit (610) comprising a plurality of magnitude processing circuits (607, 608) adapted to non-linearly process said plurality of received signals, respectively, to generate a plurality of non-linear received signals; and a pre-processing circuit (500; 510) adapted to process a selected signal of said plurality of non-linear received signals to produce a new received signal and to supply the said new received signal and the remaining non-linear received signals to said plurality of adaptive filters (121-124); or b) a pre-processing circuit (500; 510) adapted to pre-process a selected signal of said plurality of received signals to produce a new received signal; and a non-linear processing circuit (610) comprising a plurality of magnitude processing circuits (607, 608) adapted to non-linearly process said new received signal and the remaining received signals to produce a plurality of non-linear received signals and then to supply the non-linear received signals to said plural adaptive filters (121-124); said apparatus further comprising a plurality of subtracters (129, 130) for subtracting said created replicas from said mixed signals; wherein each of said magnitude processing circuits (607, 608) is adapted to use a contribution from at least two input signals, either, in case a), at least two of said received signals, or, in case b), at least two of said plurality of received signals or at least one of said plurality of received signals and said new received signal. A multi-channel echo cancelling apparatus according to claim 9, wherein said pre-processing circuit (500; 510) is adapted to filter said selected signal to generate a processed signal, to perform time-multiplexing of said processed signal and said selected signal, and to output the resulting signal as said new received signal. The multi-channel echo cancelling apparatus defined in claim 9, wherein each of said magnitude processing circuits (607, 608) is adapted to use the contribution of two input signals and includes: a polarity detection circuit (692) adapted to detect the polarity of one of the input signals; a coefficient multiplier (691) adapted to multiply the other one of the input signals by a constant; a multiplier (693) adapted to multiply the output of said polarity detection circuit (692) by the output of said coefficient multiplier (691); and an adder (694) adapted to add the output of said multiplier (693) and the input signal. The multi-channel echo cancelling apparatus defined in Claim 10, wherein said pre-processing circuit (500; 510) comprises a switch (210) adapted to perform time-multiplexing of said selected signal and said processed signal. The multi-channel echo cancelling apparatus defined in Claim 12, wherein said pre-processing circuit (500; 510) comprises: a frequency divider (212) adapted to frequency-divide a reference clock to generate a frequency-divided clock having a period longer than the sampling period of the signals to be multiplexed; and a time-varying coefficient filter (213) with a plurality of time-varying coefficients; whereby the state of said switch (210) is changed with the frequency-divided clock being the output of said frequency divider (212) and said time-varying coefficients are controlled by said frequency-divided clock and said reference clock. The multi-channel echo cancelling apparatus defined in claim 12, wherein said pre-processing circuit (500; 510) comprises: a frequency divider (212) adapted to frequency-divide a reference clock to generate a frequency-divided clock having a period longer than the sampling period of the signals to be multiplexed; an analysis circuit (221) adapted to analyze said selected signal; an AND circuit (220) adapted to detect a coincidence of the frequency-divided clock, being the output of said frequency divider (212), and the output of said analysis circuit (221); and a time-varying coefficient filter (213) with a plurality of time-varying coefficients; whereby the state of said switch is changed with the output of said AND circuit (220) and said time-varying coefficients are controlled by the output of said AND circuit (220) and said reference clock. The multi-channel echo cancelling apparatus defined in Claim 12, wherein said pre-processing circuit (500; 510) comprises: an analysis circuit (222) adapted to analyze said selected signal; and a time-varying coefficient filter (213) with a plurality of time-varying coefficients; whereby the state of said switch (210) is changed with the output of said analysis circuit (222) and said time-varying coefficients are controlled by the output of said analysis circuit (222) and a reference clock. The multi-channel echo cancelling apparatus defined in Claim 9, wherein said pre-processing circuit (500; 510) comprises a time-varying coefficient filter (230) adapted to process said selected signal with a plurality of time-varying coefficients having zero and non-zero values. The multi-channel echo cancelling apparatus defined in claim 16, wherein said pre-processing circuit (500; 510) comprises: a frequency divider (212) adapted to frequency-divide a reference clock to generate a frequency-divided clock having a period longer than the sampling period of the signals to be multiplexed; whereby said time-varying coefficients are controlled by said frequency-divided clock, being the output of said frequency divider (212), and said reference clock. The multi-channel echo cancelling apparatus defined in Claim 16, wherein said pre-processing circuit (500; 510) comprises: a frequency divider (212) adapted to frequency-divide a reference clock to generate a frequency-divided clock having a period longer than the sampling period of the signals to be multiplexed; an analysis circuit (221) adapted to analyze said selected signal; and an AND circuit (220) adapted to detect a coincidence of the frequency-divided clock, being the output of said frequency divider (212), and the output of said analysis circuit (221); whereby said time-varying coefficients are controlled by the output of said AND circuit and said reference clock. The multi-channel echo cancelling apparatus defined in Claim 16, wherein said pre-processing circuit (500; 510) comprises: an analysis circuit (222) adapted to analyze said selected signal; whereby said time-varying coefficients are controlled by the output of said analysis circuit (222) and a reference clock. The multi-channel echo cancelling apparatus as defined in claim 9, wherein said pre-processing circuit (510) comprises a magnitude correction circuit (2137, 2138, 2139) adapted to correct the magnitude of said selected signal.

Inventors: SUGIYAMA AKIHIKO, SUGIYAMA, AKIHIKO
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1999
Main classification: H04M9
IPC codes: H04M9, H03H21, H04B3, H04M1