Data communication system and electronic control unit used therein

Abstract: In a data communication system in which many nodes are connected to a common data bus (L) so that each node can communicate with other nodes, a data frame to be transmitted from a node to other nodes includes a message (DATA, etc) having a variable length interposed between a signal (MESSAGE LENGTH) indicating the length of the message and a signal (EOM) indicating the end of the message in the frame. The message and the signals are coded according to a coding rule such as NRZ, and a bit stuffing rule is applied to the signal (MESSAGE LENGTH) indicating the length of the message and the message (DATA, etc) while another rule violating the bit stuffing rule is applied to the signal (EOM) indicating the end of the message. When the message length is changed due to noise or other causes in the course of data transmission, the signal (EOM) indicating the end of the message is clearly detected at a receiving end because it is coded according to a rule different from the rule applied to the message and other signals. Further, since the length of the message actually received at the receiving end can be compared with the signal indicating the length of the message, transmission error can be detected without fail.

Description: The present invention relates to a data communication system in which a plurality of electronic control units are connected to a common data bus, these units communicating with one another through the common data bus, and also relates to the electronic control unit used in the system, and more particularly relates to such a system suitable for use in an automotive vehicle. A data communication system of this kind has been known, in which a plurality of nodes each composed of an electronic control unit (ECU) for controlling, for example, operation of an engine or an instrument panel mounted on an automotive vehicle are connected to a common data communication bus and communicate with one another through the common data bus, as shown in FIG. 6. Each node (ECU) includes a central processing unit (CPU) for controlling electronic equipment and a communication control unit composed of a communication integrated circuit (IC) for formulating data to be transmitted and receiving data from other nodes, and a driver for transmitting and receiving data to and from the common data bus. The communication IC formulates data to be transmitted, upon receipt of information from the CPU, according to a predetermined coding rule. For example, the data are formulated according to the well known NRZ (Non-Return-to-zero) in which a signal level (HIGH or LOW) of a single bit is always kept constant and the well known bit stuffing rule in which a bit of a reverse level (stuff bit) is inserted in a bit stream when a certain number of the same level bits (for example, five bits) appears in series. The data are transmitted according to a certain transmission protocol, for example, the non-destructive Carrier Sense Multiple Access with Collision Detection (CSMA/CD). Under the non-destructive CSMA/CD, transmission of data from any one of the nodes starts when no data from other nodes is flowing on the common data bus to avoid data collision on the bus. However, this is not always possible when the data to be transmitted are congested. So, the data collision on the bus is always watched, and if it happens, data having a higher priority are permitted to flow on the bus while the transmission of data having a lower priority is brought to a halt. After a certain period of time, the transmission of the data brought to a halt is started again. This process is performed by bringing the signal level of the data having a higher priority to a dominant level (an active level which is HIGH or LOW according to the setting of the system). An example of a conventional frame format for data to be transmitted is shown in FIG. 7. The frame consists of the following fields: SOF (Start of Frame), MESSAGE ID (a content of data), DESTINATION ID (an address of the node to which data are to be transmitted), DATA 1 and DATA 2 (data themselves), CRC (Cyclic Redundancy Check for detection of bit errors), CRC-DELIMITER (end of CRC), RSP (Response from a receiving node) and EOF (End of Frame). The field of MESSAGE ID and DESTINATION ID is 8 bits long, and each field of DATA 1 and DATA 2 contains one byte data, one byte being 8 bits long. CRC is 8 bits long, CRC-DELIMITER is 2 bits long, and RSP is also 2 bits long. The conventional frame described above includes two data fields, DATA 1 and DATA 2, each having a fixed length of 8 bytes. Therefore, the data space is not long enough in case the data volume is large. It may be possible to transmit a large volume of data by dividing them into two or more sections. In this case, however, efficiency of transmission becomes low because plural frames containing these divided data sections have to be formulated. It may be also possible to increase the number of data fields. In this case, however, the frame length becomes too long, which will cause congestion on the bus. In order to solve the problem of the fixed length of the data field, it has been proposed to make the data field length variable and to add a field for indicating the length of the data. Such a frame format has been used, for example, in the well known CAN system. In this system, when information indicating the length of the data is deformed by noise or any other reasons during the data transmission, the bit error check will not be performed correctly. For example, if the information originally indicating a data length of 8 bytes is changed to the one indicating a data length of 7 bytes, while the data length itself is 8 bytes, the last 8 bits of the data will be judged as CRC. In this case, the bit error check is done using the last 8 bits, and if the check result should be affirmative, the receiving node receives and processes the data though such a receipt is in error. Under this situation, since the RSP signal indicating a correct receipt of data transmission is not returned timely from the receiving node to the transmitting node, the transmitting node transmits again the same data, and the receiving node can receive the correct data this time. However, there is a possibility that the transmitting node does not transmit the data again even when such is necessary. That is, if the data are transmitted to plural receiving nodes, and one node receives the data in error while other nodes receive the data correctly, then the response signal RSP is returned timely from one of the other nodes correctly received the data. In this situation, the transmitting node does not repeat the data transmission, and, accordingly, the node received the data in error cannot be corrected by the correct data. US-A-5 293 571 discloses a receipt acknowledgment method which is applied to a multiplex transmission system comprising a plurality of multiplex nodes respectively connected to a common multiplex bus and equipped with a computer for communication. Messages transmitted from one node to another node via the bus include a start of message (SOM), a priority (PRI) including data for determining data priority, a message ID (ID), a control data area (CONT) including data indicating data length, a data area (DATA 1 to DATA 4) of the length (variable length) indicated by the data in the control data area, a cyclic redundancy code (CRC), an end of data (EOD), an ACK signal area and an end of message (EOM), in this order. EP-A-0 286 383 discloses a multiplex transmission system comprising a plurality of multiplex nodes mutually coupled together through a multiplex bus. Frames transmitted between the nodes include a variable quantity of data. In addition, they either include the data length or a specific PWM code indicating the end of the data (EOD). The specific PWM code is neither the logic "1" nor the logic "0". G. Kabatjanskii, A.J. Han Vinck and A.J. van Wijngaarden: "On combined synchronization and error control coding", Proceedings IEEE International Symposium on Information Theory, Trondheim, Norway, 27. June 1994 - 01. July 1994, page 62, discloses a synchronization method where the flag 01 j 0 is used to indicate the beginning and the end of a frame. In the data stream, the bit stuffing procedure inserts a 0 after j - 1 consecutive 1s to prevent the occurrence of the flag. It is an object of the present invention to provide an electronic control unit and a data communication system which can at least alleviate the above-mentioned problems. This object is achieved by an electronic control unit and a data communication system as outlined in the attached claims. Other objects and features of the present invention will become more readily apparent from a better understanding of the preferred embodiment described below with reference to the following drawings. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing a communication system, used in an automotive vehicle, according to the present invention, in which various nodes are connected to a common data bus; FIG. 2 is a diagram showing a node (electronic control unit) used in the communication system shown in FIG. 1 and components included therein; FIG. 3 shows a frame format of data to be transmitted in the communication system according to the present invention; FIG. 4 is a flow chart showing process steps in a communication IC used in an electronic control unit according to the present invention; FIG. 5 is a flow chart showing the process steps following the steps shown in FIG. 4; FIG. 6 is a diagram showing an example of a node connection in a conventional data communication system; and FIG. 7 shows an example of a frame format used in a conventional data communication system. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Referring to FIGS. 1 to 5, an embodiment according to the present invention will be described. In FIG. 1, a plurality of nodes 1 to n and 11 to 14, each composed of an electronic control unit (ECU), are connected to a common data bus L. The nodes (ECUs) 1 to n which control an engine, an instrument panel, an airconditioner, etc, respectively, constitute a node group D0. The nodes 11 to 14 are ECUs, each mounted on a respective door of an automotive vehicle, for locking/unlocking the doors and opening/closing power windows, and constitute another node group D1. All the nodes are connected to the common data bus L and perform data transmission among them equally and independently (Multi-Task Access). As shown in FIG. 2, each node (ECU) includes a central processing unit (CPU) 10 and a communication unit 20 including a communication integrated circuit (IC) 21 and a driver 22. The communication IC 21 formulates data to be transmitted to other nodes upon receipt of information from the CPU 10. The data to be transmitted are coded according to the NRZ and the bit stuffing rule. The data transmission is performed under the transmission protocol called non-destructive CSMA/CD. The communication IC 21 transmits the coded data from a transmission terminal TX to the driver 22 and receives data sent from the driver 22 at a receiving terminal Rx. The driver 22 makes the signal level of the data to be transmitted through the common data bus a dominant level (HIGH level in this embodiment), when data collision occurs on the common bus. The dominant level means a level having a high priority and is sometimes referred to as an active level, and another level having a low priority (LOW level in this embodiment) is referred to as a recessive level, a passive level or an inactive level. The communication IC 21 stores the memory of an individual destination ID which identifies the address of a particular node, a group destination ID which identifies the address of a group to which the particular node belongs, and a broadcast ID which designates all nodes. The communication IC 21 transfers data sent from the driver 22 to the CPU 10 when one of the IDs accords with the ID of its own node. FIG. 3 shows a frame format of the data to be transmitted. The frame consists of the following fields: SOF (Start of Frame), PRIORITY (transmission priority in case of collision), MESSAGE LENGTH (a length of a message), DESTINATION ID (an address of the node to which the data are to be transmitted), MESSAGE ID (a content of a message), DATA (data themselves), CRC (Cyclic Redundancy Check for detection of bit errors), EOM (End of Message), RSP (Response from a receiving node) and EOF (End of Frame). The SOF field is one bit long, having a dominant level indicating start of the frame. The PRIORITY field is 4 bits long, indicating priority of the frame when the transmission collision occurs on the common data bus. A signal "1 1 1 1" indicates the highest priority, and a signal "0000" indicates the lowest priority. The MESSAGE LENGTH field is 4 bits long, showing the number of bytes ML from the DESTINATION ID to the DATA. The DESTINATION ID field is 8 bits long, indicating an address to which the data is to be sent. The address shown therein is either address indicating individual nodes (individual ID), a group of nodes (group ID) or all nodes (broadcast ID). The MESSAGE ID field is 8 bits long, showing a content of the message. The DATA field has a variable length from one byte to eleven bytes, each byte being constituted by a 8 bits signal. The length of the DATA field is varied according to the data length to be sent. The CRC field is 8 bits long and contains a signal for checking bit errors. The EOM field is composed of an one bit recessive signal, a six bits dominant signal and another one bit recessive signal, the six bits dominant signal being interposed between both one bit recessive signals. Since the EOM includes the six consecutive dominant bits, it violates the bit stuffing rule because the bit stuffing rule used in the present embodiment does not permit consecutive dominant or recessive bits in excess of five. The bit stuffing rule violation is intentionally employed in the EOM so that the EOM signal is detected without fail at a receiving node. The RSP field is 2 bits long, and used as a field to show an one bit recessive signal and an one bit dominant signal sent from a receiving node when the receiving node receives the data successfully. The EOF field is composed of a six bits recessive signal indicating the end of a frame. A CRC calculation region includes the fields from PRIORITY to DATA, and an arbitration region includes the fields from PRIORITY to EOM. The bit stuffing rule is applied to the fields from SOF to CRC. The fields from DESTINATION ID to CRC are placed between the MESSAGE LENGTH field and the EOM field. Since the DATA field, the length of which is variable, is interposed between MESSAGE LENGTH and EOM in the frame format, the frame error can be detected without fail, even when the number of bytes ML or the EOM signal is changed or deformed by noise during the data transmission. Therefore, reliability of the data transmission in the system is greatly enhanced. Since the EOM signal is composed of a six bits consecutive dominant signal interposed between one bit recessive signals, there always appear two signal edges in the EOM signal, and accordingly, the EOM signal is surely detected. The DESTINATION ID includes not only the individual ID designating an individual node and the broadcast ID designating all the nodes but also the group ID designating a group of nodes (as exemplified as the group D0 and the group D1 in FIG. 1) which frequently receive common data. Therefore, the data which are necessary to the group can be transmitted only to that group without sending unnecessary information to other groups, thereby alleviating an operational load imposed on CPUs. For example, if the group ID designating the group D0 is set as the DESTINATION ID, the data for controlling the engine, the instrument panel and the airconditioner, etc. are transmitted to the group D0 without sending the same to the group D1. In case certain data are required by all the nodes, such data are transmitted to all of them under the broadcast ID. In this manner, the efficient data transmission can be carried out. Referring to FIGS. 4 and 5 showing a process flow in the communication IC 21, the data receiving process will be described. At a step 101, whether the SOF signal is received or not is checked. When it is received, the process moves to a step 102 where the respective signals of PRIORITY, MESSAGE LENGTH (ML), DESTINATION ID AND MESSAGE ID are received. Then, at a step 103 whether the EOM signal is received is checked. If not, the process moves to 104 where the DATA signals are received. Then, at a step 105 the number of the bytes received (byte-count) is incremented, and whether the byte-count has reached a number (ML-1) is checked at a following step 106. If the byte-count is below the number (ML-1), the process returns to the step 103 and the cycle from the step 103 to the step 106 is repeated until the EOM signal is received at the step 103. Since the number ML represents the number of bytes indicated by the MESSAGE LENGTH which includes all the number of bytes from the DESTINATION ID to the DATA (refer to FIG. 3), the number (ML-1) means the number of bytes from the beginning of DATA to the end of CRC (ML = 1 byte of DESTINATION ID + 1 byte of MESSAGE ID + x bytes of DATA; ML - 1 = x bytes of DATA + 1 byte of CRC). Therefore, the fact that the byte-count is below the number (ML-1) means that all the bytes up to the end of CRC have not been received yet. The step 103 checks whether the EOM signal is received, and if YES, the process moves to a step 107. At the step 107, whether the byte-count is equal to (ML-1) is checked. The fact that the byte-count is equal to (ML-1) means that all the DATA bytes and the CRC byte have been received. Then, the process moves to a step 108 where the bit error is checked with the CRC. The result of the CRC error check is judged at a step 109, and if it is affirmative the process moves to a step 111 (in FIG. 5). Whether the DESTINATION ID accords with either one of the individual ID, the group ID or the broadcast ID is checked at steps 111, 112 or 113, respectively. If either one of the answers is YES, the process moves to a step 114 where the MESSAGE ID and the DATA are sent to the CPU 10. If the DESTINATION ID does not accord with any one of the IDs, then the data are not sent to the CPU 10, and the process returns to the step 101, thereby alleviating the load of the CPU 10. In case where either one of the answers of the steps 106, 107 and 109 is NO, then it is judged that the data are not received correctly, and the data received by that time are disposed, for example, by destroying the data at a step 110. Since the signals contained in the fields from the PRIORITY to the EOF are composed of byte units each having an 8 bits length (the PRIORITY and the MESSAGE LENGTH, each being 4 bits long, make one byte by adding both), the process can be easily programmed in an 8 bits CPU. The communication IC 21 is not limited to the one using a CPU, but it may be composed of hard logic elements. Further, it may be integrated in the CPU 10. The common data line L shown in FIG. 1 may be changed to a data line constituted by two transmission wires. In the frame format shown in FIG. 3, the positions of the MESSAGE LENGTH and the DESTINATION ID may be exchanged, or the MESSAGE LENGTH may be placed between the MESSAGE ID and the DATA. As a transmission protocol, the non-destructive CSMA/CD is used in the embodiment described above. However, other transmission protocols such as the destructive CSMA/CD, or the token passing scheme (both are well known in the art) may be used. As a coding rule, the NRZ is used in the embodiment together with the bit stuffing rule. However, other coding rules such as a Manchester rule or a PWM rule may be used. According to the Manchester rule, one bit is divided into two parts, one part having a HIGH level and other part having a LOW level, and any bit indicating a HIGH starts with the part having the HIGH level and any bit indicating a LOW starts with the part having the LOW level, thereby making one edge always in the center of a bit. According to the PWM rule, one bit is divided into three parts composed of two consecutive HIGH parts followed by one LOW part or one HIGH part followed by two consecutive LOW parts. Any HIGH bit starts with the two consecutive HIGH parts and any LOW bit starts with the single HIGH part, thereby making one edge at a position of a two-thirds distance from the start of HIGH bit and at a position of an one-third distance from the start of LOW bit. Within the scope of the present invention, the NRZ coding rule may be used without combining the bit stuffing rule, if the Manchester or the PWM is applied to the EOM field. In this case, the EOM is detected because it violates the NRZ rule. Coding efficiency in this case, however, is somewhat sacrificed because two different coding rules are used in a frame. Further, the Manchester rule or the PWM rule may be used as a main coding rule in a frame, while applying the NRZ only to the EOM field. In this case, a decoder circuit will be a little more complex, compared with the case of the embodiment described above. While the present invention has been shown and described with reference to the foregoing preferred embodiment, it will be apparent to those skilled in the art that changes in form and detail may be made therein without departing from the scope of the invention as defined in the appended claims. In a data communication system in which many nodes are connected to a common data bus (L) so that each node can communicate with other nodes, a data frame to be transmitted from a node to other nodes includes a message (DATA, etc) having a variable length interposed between a signal (MESSAGE LENGTH) indicating the length of the message and a signal (EOM) indicating the end of the message in the frame. The message and the signals are coded according to a coding rule such as NRZ, and a bit stuffing rule is applied to the signal (MESSAGE LENGTH) indicating the length of the message and the message (DATA, etc) while another rule violating the bit stuffing rule is applied to the signal (EOM) indicating the end of the message. When the message length is changed due to noise or other causes in the course of data transmission, the signal (EOM) indicating the end of the message is clearly detected at a receiving end because it is coded according to a rule different from the rule applied to the message and other signals. Further, since the length of the message actually received at the receiving end can be cor ared with the signal indicating the length of the message, transmission error can be detected without fail.

Claims: An electronic control unit connected to a common data bus (L), the electronic control unit communicating with other electronic control units also connected to the common data bus under a predetermined transmission protocol through the common data bus, the electronic control unit comprising: a central processing unit (10) for controlling an electronic device; and communication means (20) for forming a communication frame that includes a message from the central processing unit to be transmitted to other electronic control units and other information necessary for the message transmission, wherein: the length of the message is variable; the message is placed between a signal indicating the length of the message (MESSAGE LENGTH) and an error check code (CRC), and a signal indicating an end of the message (EOM) is placed immediately after the error check code (CRC); the message, the signal indicating the length of the message (MESSAGE LENGTH) and the error check code (CRC) are coded according to a predetermined coding rule, and the signal indicating the end of the message (EOM) is coded according to another coding rule that violates the predetermined coding rule; the predetermined coding rule is NRZ (Non-Return-to-Zero) to which a bit stuffing rule is applied, the bit stuffing rule being a rule in which a reverse level bit is inserted in a bit stream when a certain number of the same level bits appears in series in the bit stream; the another coding rule violating the predetermined coding rule does not include the bit stuffing rule; the communication means (20) is arranged to check (103) whether the EOM signal indicating an end of the message is received, to disable transmission of the received message to the central processing unit when the EOM signal is not received, and when the EOM signal is received, to check (107) whether the length of the received message equals a number of bytes calculated from the signal indicating the length of the message (MESSAGE LENGTH), meaning that all message bytes and the error check code have been received; and the communication means (20) further is arranged to perform (108) a CRC error check only when the length of the received message equals said calculated number of bytes , and to disable transmission of the received message to the central processing unit when a result of the CRC error check is not affirmative. An electronic control unit as claimed in claim 1, wherein the predetermined data transmission protocol is non-destructive CSMA/CD. An electronic control unit as claimed in claim 1 or 2, wherein: the another coding rule violates the bit stuffing rule in having no reverse level bit inserted in the bit stream when the certain number of the same level bits appears in series in the bit stream. A data communication system comprising: a common data bus (L); and a plurality of electronic control units as claimed in any one of the preceding claims, each connected to the common data bus. A data communication system as claimed in claim 4, wherein: each electronic control unit has its individual address for receiving the message transmitted from other electronic control units; a plurality of electronic control units are divided into groups (D0, D1) each having its group address for receiving the message transmitted from other electronic control units; and the message includes either an individual address or a group address to which the message is to be delivered. A data communication system as claimed in claim 5, wherein the message includes a broadcast address in place of the individual or the group address, in case the message is to be delivered to all electronic control units.

Inventors: KISHIGAMI TOMOHISA, SASAKI AKIHIRO, SHINOJIMA YASUSHI, TANAKA AKIHIRO, UEHARA SHIGERU, KISHIGAMI, TOMOHISA, SASAKI, AKIHIRO, SHINOJIMA, YASUSHI, TANAKA, AKIHIRO, UEHARA, SHIGERU
Applicants: DENSO CORP, TOYOTA MOTOR CO LTD, DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
Application year: 1998
Main classification: H04L12
IPC codes: H04L29, H04L1, H04L12