METHOD FOR REDUCING THE STORAGE AND NUMBER OF COMPUTATIONS REQUIRED FOR INVERSE QUANTIZATION AND INVERSE SCAN IN MPEG VIDEO DECODING

Abstract: A method and device for performing inverse quantization and inverse scan on run/level code without expanding the run/level code into a matrix. The run is converted into a coordinate in the matrix. This coordinate can be used to find the inverse quantization value in the inverse quantization matrix. The inverse quantization value is multiplied by the level to produce a dequantized level. The run is replaced by the coordinate and the level is replaced by the dequantized level.

Description: Method for reducing the storage and number of computations required for inverse quantization and inverse scan in MPEG Video decoding. BACKGROUND OF THE INVENTION Field of the Invention This invention relates in general to video decoding and in particular to a method and device for reducing the storage and number of computations required for inverse quantization and inverse scan operations in an MPEG video decoder. Description of the Prior Art In an MPEG decoder, compressed video data is subjected to a series of processing steps. The MPEG video decoding process (either MPEG1, MPEG2 or MPEG4) begins with data stored in an input buffer called a rate buffer. From this buffer data is removed in chunks that represent whole video frames. Each video frame is comprised of a substructure of slices, which in turn are made up of macroblocks which in turn are made up of blocks. A block is an 8 x 8 matrix of discrete cosine transform coefficients (DCT). The various processing functions in the decoding process peel away the upper layers of the substructure until only macroblocks or blocks are being processed. Each step of decoding applies some transformation to the data so that its form is appropriate for subsequent processing operations. Fig. 1 shows a decoder 20 which performs the typical processing steps required to decompress a block of video data. These steps include fixed length decoding (FLD) 22, variable length decoding 24 (VLD), run/level decoding 26 (RLD), inverse zig-zag 28 (or inverse alternate scan) (IZZ), inverse differential pulse code modulation and inverse quantization 32 (IDPCM + IQ), inverse discrete cosine transform 34 (IDCT) and motion compensation 36 (MC). The fixed length decoder 22 (FLD) decodes the header information contained in the various substructures. The variable length decoder 24 decodes the remaining information of each macro block into 1 x N vectors, of runs and levels. The run indicates the number of zeros that proceed a non-zero value. The level is the non-zero value. The run level decoder 26 causes the greatest expansion of data as it decodes the data into its matrix form as shown in Fig. 2. As seen in Fig 2, the output of the VLD 24 produces a run R=10 and a level L=2. These are expanded into a matrix by using the inverse scan operation (IZZ) which causes the data from the run level decoder 26 to fill the matrix by following a particular path. The inverse quantizer 32 performs inverse quantization on each of the expanded matrix values by multiplying the expanded matrix by another 8 by 8 matrix containing scalar values. The inverse discrete cosine transform 34 transforms a block of frequency domain DCT coefficients into a block of spatial pixel values. The greatest expansion of the data occurs at the output of the RLD 26, and the inverse quantization must then be performed on this expanded data thus requiring the presence of large expansion buffers to accommodate the exploded data. SUMMARY OF THE INVENTION Accordingly, it is an object of the invention to perform inverse quantization and inverse scan on the level values only. It is a further object of the invention to eliminate the need for extra storage when performing inverse quantization. It is yet another object of the invention to reduce inter-processor bandwidth requirements in multi-processor systems. The invention accordingly comprises the several steps and the relation of one or more of such steps with respect to each of the others, and the apparatus embodying features of construction, combinations of elements and arrangement of parts which are adapted to effect such steps, all as exemplified in the following detailed disclosure, and the scope of the invention will be indicated in the claims. BRIEF DESCRIPTION OF THE DRAWINGS For a fuller understanding of the invention reference is had to the following drawings: Fig. 1 shows the processing steps in an MPEG decoder; Fig. 2 shows the expansion of the run level data into its matrix form; Fig. 3 shows the multiplication of the run level expanded matrix by the IQ scalar matrix to produce a third dequantized matrix; Fig. 4 shows the replacement of a run/level pair with a new coordinate/dequantized pair; Fig. 5 is a flow chart showing the method of the invention; and Figs. 6A and 6B show the relationships between the prior art video decoders and decoders in accordance with the invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The output of the VLD 24 produces 1 x N vectors each comprised of a variable number of run/level pairs. The run value of each pair indicates the number of zeros before the non-zero value is obtained in an 8 by 8 matrix of DCT values. So, for example, a run/level pair could be 10/2. Fig. 2 shows an example of an 8 by 8 matrix with a run of 10 zero values and a final level of 2. The path that the matrix is scanned is in accordance with the inverse scan operation. In Fig. 2, the inverse scan is a zig zag pattern where 10 zeros are collected until a final value of 2 is found. Thus, it has a run/level of 10/2. As shown in Fig. 3, the run level expanded matrix RLEM is reconstructed from the run level values and then it is multiplied by a scalar inverse quantization matrix SM, to form a resulting matrix RM. The fifth position (using a row major count) or the 10th position (using an inverse scan count) of the scalar matrix SM is multiplied by the level 2 (which is in the fifth position row major count, 10th position using an inverse scan count) of the 8 by 8 transform matrix. The resulting matrix is RM then subjected to the IDCT operation. As can be seen by this multiplication the zeroes of the transform matrix result in zeroes in the final matrix RM. This multiplication is therefore a waste of computation time and storage. Accordingly, in accordance with the invention, the run/level values are not expanded into the matrix before inverse quantization. Instead inverse quantization is performed on the levels only. Fig. 4 shows the information as it is transformed from its run/level values (shown at A) into its form after inverse scan and inverse quantization (shown at B) in accordance with the invention. As can be seen from Fig. 4 the data has not been expanded. The run/levels 10/2 have been converted to pointer positions and dequantized levels, e.g. 5/6. The pointer value 5 indicates the position in the 8 x 8 matrix where the value 6 should be found. This pointer position is the linear row-major count (as shown in the resulting matrix RM of Fig. 3). The value 6 is the result of the level 2 being multiplied by the scalar value 3 which is found in the same location in the scalar matrix SM as the 2 is found in the RLD matrix. The efficiency of the decoding process is improved by performing the inverse scan operation during inverse quantization as opposed to during RLD. This is achieved by translating the run value (in-place) to a row-major count that represents the location of the datum in the eventual DCT matrix as a simple offset into the block. At this point the IDCT can be performed after the expansion into the DCT matrix takes place. Accordingly, the RLD, IQ and IZZ do not have to have the large memories to accommodate the expanded matrices. Instead the run level format is carried throughout these processes. The method of decoding, in accordance with the invention, is shown in Fig. 5, in flow chart form, and described as follows: The 1 x N vectors, or run/levels with both zigzag and alternate scan ordering for the intra and non-intra quantization tables, are generated in a step 500. N is the number of coefficients in the coded block. The RLD-IZZ-IDPCM+IQ sequence of operation is replaced with the IDPCM+IQ, IZZ, RLD sequence by performing the following steps: For each slice (step 502) at the output of the VLD, and for each coded block (step 504) in a non-skipped macroblock, the DC coefficient is dequantized (as per ISO/IEC 13818-2) in a step 506. A run-index is set to 1 (step 508) and for each new run/level pair, the run- index is incremented by the size of the new run value in a step 510. In a step 512, the quantizer value is found in the appropriate zig-zag/alternate scan, intra/non-intra, matrix using the run-index as the index into the quantization matrix. In a step 514, each AC-coefficient is dequantized by multiplying the quantizer value by the level value of the run/level pair. In a step 516, the run-index is translated into its inverse scan position using a linear row-major count and the translated value is stored in-place of the run value of the run level pair. In a step 518, the slice is transmitted in its now dequantized, run/level form to the subsystem where the RLD expansion is to occur. RLD expansion is performed as a prelude to IDCT, at a point where the full reconstruction buffers are available. Thus the expansion buffers are not needed until inverse discrete cosine transformation must occur as shown in Figs. 6a and 6b. Numeral 61 in fig. 6a shows where the data is expanded in the prior art, at the output 62 of the RLD. In the present invention the 8 x 8 matrix is not constructed until after inverse quantization, and inverse scan, i.e at the output of the RLE, the run level expander. Therefore the expansion buffers are not needed for the IQ or IZZ steps. It will thus be seen that the objects set forth above among those made apparent from the preceding description, are efficiently attained and, since certain changes may be made in carrying out the above method and in the construction set forth without departing from the spirit and scope of the invention, it is intended that all matter contained in the above description and shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

Claims: CLAIMS: 1. A method of reducing the storage and number of computations for inverse quantization and inverse scan, comprising: reading m run/level codes which represent a matrix; decoding the run/level code without expanding it into the matrix by: performing inverse scan based on the run values of the run/level code to produce a coordinate representative of the position of the level in the matrix; performing inverse quantization on only the levels of the run level code to produce a dequantized level; and replacing the run with the coordinate and replacing the level with the dequantized level. 2. The method in accordance with Claim 1, wherein the step of performing inverse quantization includes the steps of: multiplying the level by a dequantization value found at the coordinate in an inverse quantization matrix. 3. The method in accordance with Claim 1, further including the step of expanding the coordinate and the dequantized level into its matrix form. 4. A device for performing inverse quantization and inverse scan on run/level code without expanding the run level code into a matrix, comprising: means for receiving run/level codes which represent the matrix; a decoder comprising: an inverse scanner for finding a coordinate value in the matrix corresponding to each of the levels and for replacing each of the runs with the coordinate values; an inverse quantizer for performing inverse quantization on only the levels of the run level code to produce dequantized levels and for replacing the levels with the dequantized levels. 5. The device in accordance with Claim 4, further including a multiplier for multiplying the level by a dequantization value found at the coordinate in an inverse quantization matrix.

Inventors: SINGH KENNETH S, SINGH, KENNETH, S.
Applicants: KONINKL PHILIPS ELECTRONICS NV, PHILIPS SVENSKA AB, KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS AB
Application year: 1998
Main classification: H04N7
IPC codes: G06T9, H04N7