Driving circuit for a display having a multi-electron source

Abstract: An apparatus for driving an electron emission element driven by two different potentials applied thereto includes a scanning drive circuit for applying a first potential to the electron emission element, a modulating drive circuit for applying a second potential to the electron emission element, and a timing control circuit for providing a delay time following application of the first potential in order to delay application of the second potential. The delay time is set to be longer than a time required for the damping of a ringing waveform, which is produced by application of the first potential, to 1% of the applied voltage. This makes it possible to reduce the effects of the ringing phenomenon.

Description: BACKGROUND OF THE INVENTION Field of the Invention This invention relates to the driving of elements, especially the driving of electron emission elements and the driving of elements whose frequency of response is higher than the ringing frequency of a voltage applied thereto. Description of the Related Art Two types of elements, namely hot cathode elements and cold cathode elements, are known as electron emission elements. Examples of cold cathode elements are electron emission elements of the field emission type (abbreviated to "FE" below), metal/insulator/metal type (abbreviated to "MIM" below) and surface-conduction type. Known examples of the FE type are described in W.P. Dyke and W.W. Dolan, "Field emission", Advance in Electron Physics, 8,89 (1956), and in C.A. Spindt, "Physical'properties of thin-film field emission cathodes with molybdenum cones", J. Appl. Phys., 47, 5248 (1976). A known example of the MIM type is described by C.A. Mead, "Operation of tunnel emission devices", J. Appl. Phys., 32, 646 (1961). An example of the surface-conduction electron emission element is described by M.I. Elinson, Radio. Eng. Electron Phys., 10, 1290, (1965). There other examples as well, as will be described later. The surface-conduction electron emission element makes use of a phenomenon in which an electron emission is produced in a small-area thin film, which has been formed on a substrate, by passing a current parallel to the film surface. Various examples of this surface-conduction electron emission element have been reported. One relies upon a thin film of SnO 2 according to Elinson, mentioned above. Other examples use a thin film of Au [G. Dittmer: "Thin Solid Films", 9, 317 (1972)]; a thin film of In 2 O 3 /SnO 2 (M. Hartwell and C. G. Fonstad: "IEEE Trans. E.D. Conf.", 519 (1975); and a thin film of carbon (Hisashi Araki, et al: "Vacuum", Vol. 26, No. 1, p. 22 (1983). Fig. 16 is a plan view of the element according to M. Hartwell, et al., described above. This element construction is typical of these surface-conduction electron emission elements. As shown in Fig. 16, numeral 3001 denotes a substrate. Numeral 3004 denotes an electrically conductive thin film comprising a metal oxide formed by sputtering and is formed into a flat shape resembling the letter "H" in the manner illustrated. The conductive film 3004 is subjected to an electrification process referred to as "electrification forming", described below, whereby an electron emission portion 3005 is formed. The spacing L in Fig. 17 is set to 0.5 - 1 mm, and the spacing W is set to 0.1 mm. For the sake of illustrative convenience, the electron emission portion 3005 is shown to have a rectangular shape at the center of the conductive film 3004. However, this is merely a schematic view and the actual position and shape of the electron emission portion are not necessarily represented faithfully here. In above-mentioned conventional surface-conduction electron emission elements, especially the element according to Hartwell, et al., generally the electron emission portion 3005 is formed on the conductive thin film 3004 by the so-called "electrification forming" process before electron emission is performed. Electrification forming refers to the formation of an electron emission portion by the passage of current. By way of example, a constant DC voltage or a DC voltage which rises at a very slow rate on the order of 1 V/min is impressed across the conductive thin film 3004 to pass a current through the film, thereby locally destroying, deforming or changing the property of the conductive thin film 3004 and forming the electron emission portion 3005, the electrical resistance of which is very high. A crack is produced in part of the conductive thin film 3004 that has been locally destroyed, deformed or changed in property. Electrons are emitted from the vicinity of the crack if a suitable voltage is applied to the conductive thin film 3004 after electrification forming. The surface-conduction electron emission element mentioned above is particularly simple in structure and easy to manufacture and therefore is advantageous in that a large number of elements can be formed over a large area. Accordingly, research has been directed to a method of arraying and driving a large number of elements, as disclosed in Japanese Patent Application Laid-Open No. 64-31332, filed by the applicant. Further, applications of surface-conduction electron emission elements that have been researched are image forming devices such as image display devices and image recording devices, as well as charged beam sources, etc. As for applications to image display devices, research has been conducted with regard to such devices using, in combination, surface-conduction type electron emission elements and phosphors which emit light in response to irradiation with an electron beam, as disclosed, for example, in the specifications of USP 5,066,833 and Japanese Patent Application Laid-Open (KOKAI) No. 2-257551 filed by the present applicant. The image display device using the combination of the surface-conduction type electron emission elements and phosphors is expected to have characteristics superior to those of the conventional image display device of other types. For example, in comparison with a liquid-crystal display device that has become so popular in recent years, the above-mentioned image display device emits its own light and therefore does not require backlighting. It also has a wider viewing angle. SUMMARY OF THE INVENTION The inventors have experimented with surface-conduction electron emission elements consisting of various materials, manufactured by various methods and having a variety of structures such as those described in the prior art above. Furthermore, the inventors have investigated multiple electron beam sources consisting of an array of a number of surface-conduction electron emission elements, and image display devices which employ these multiple electron beam sources. The inventors have tried to produce a multiple electron beam source based upon an electrical wiring method illustrated in Fig. 17, by way of example. Specifically, this is a multiple electron beam source obtained by arraying a number of surface-conduction electron emission elements two dimensionally and wiring the elements in the form of a matrix in the manner illustrated. In Fig. 17, numeral 4001 schematically illustrates a surface-conduction electron emission element, and numerals 4002, 4003 denote row-direction and column-direction wires, respectively. Though the row-direction wires 4002 and column-direction wires 4003 actually have limited electrical resistances, these are illustrated as wiring resistors 4004, 4005 in the drawing. This wiring shall be referred to as "simple matrix wiring". The matrix is shown as a 6 × 6 matrix for the sake of illustration, though the size of the matrix is not limited to this. For example, in case of a multiple electron beam source for an image display device, enough elements for presenting a desired image display would be arrayed and wired. In a multiple electron beam source obtained by wiring surface-conduction electron emission elements as a simple matrix, suitable electric signals are applied to the row-direction wires 4002 and column-direction wires 4003 in order to output the desired electron beams. For example, in order to drive the surface-conduction electron emission elements in any one row of the matrix, a selection voltage Vs is applied to the row-direction wire 4002 of the row to be selected and a non-selection voltage Vns is applied simultaneously to the row-direction wires 4002 of rows that are not to be selected. In synchronization with this operation, a driving voltage Ve for outputting an electron beam is applied to the column-direction wires 4003. In accordance with this method, a voltage of (Ve-Vs) is applied to the surface-conduction electron emission elements of the selected row and a voltage of (Ve-Vns) to the surface-conduction electron emission elements of the unselected rows if the voltage drop caused by the wiring resistances 4004 and 4005 is neglected. If Ve, Vs, Vns are made voltages of suitable sizes, electron beams of a desired intensity should be output solely by the surface-conduction electron emission elements of the selected row. If different driving voltages Ve are applied to respective ones of the column-direction wires, electron beams having different intensities should be output from respective ones of the elements of the selected row. Further, the speed of response of the surface-conduction electron emission elements is high. If the length of time the driving voltage Ve is applied is varied, therefore, then the length of time an electron beam is output should also be capable of being varied. Accordingly, a multiple electron beam source having surface-conduction electron emission elements wired as a simple matrix has a variety of possible applications. For example, if an electric signal conforming to image information is suitably applied, then the multiple electron beam source can be used ideally as the electron source for an image display device. In actuality, however, a multiple electron beam source having surface-conduction electron emission elements wired as a simple matrix involves the problems described below. In order to output the desired electron beams, the selection voltage Vs is applied to the row-direction wire of the row to be selected and the driving voltage Ve for outputting the electron beams is applied simultaneously to the column-direction wires, as described above. In general, the driving signal on the scanning side (namely the signal Vs) is output in such a manner that the time during which it is applied overlaps the time during which the driving signal on the modulating side (namely the signal Ve) is applied, as illustrated in Fig. 18. This reduces the effects of any shift in the on/off timings of these driving signals. A system comprising a display panel 4102 which uses a multiple electron beam source, a scanning drive circuit 4100, a modulating drive circuit 4101 and the connectors for connecting these circuits, as shown in Fig. 19A, has a capacitance component ascribed to the matrix wiring on the substrate of the multiple electron beam source, a resistance component due to the surface-conduction electron emission elements, and inductance components from the wiring. If the system of Fig. 19A is replaced by a simple electric circuit that is the equivalent, the result is as shown in Fig. 19B. A signal source V1 represents the scanning drive circuit 4100, a signal source V2 the modulating drive circuit 4101, L1 and L2 the inductance components of the connections, C the capacitance component between the matrix wires on the substrate of the multiple electron beam source, and R the resistance component of the surface-conduction electron emission elements. For the sake of simplicity, the inductance components of the matrix wiring is assumed to be so small as to be negligible. In the circuit of Fig. 19B, a driving signal of the kind shown in Fig. 20 is applied to a surface-conduction electron emission element when the rectangular waves shown in Fig. 18 are applied to the display panel 4102 as the driving signals by the scanning drive circuit 4100 and modulating drive circuit 4101. As illustrated in Fig. 20, a voltage V is applied to the element. More specifically, first the selection voltage Vs is output by the scanning drive circuit 4100 and then the driving voltage Ve is output by the modulating drive circuit 4101, so that the total voltage V applied is Ve - Vs. The encircled areas A and B illustrate partial enlargements of the signal waveform when the pulse rises. Ringing due to the LC components is produced at the positive-and negative-going transitions of the driving pulses. The amplitudes of ringing at the portions A and B differ for reasons described later. Problems caused by the ringing mentioned above are degraded controllability of electron emission current and deterioration caused by application of excessive voltage to the surface-conduction electron emission elements. The drive apparatus considered herein is drive apparatus of the type for driving an electron source device obtained by connecting, by one and another wirings, an electron emission element driven by two different potentials applied thereto, which as known from the disclosure of United States Patent US-A-4316123 comprises: first application means for applying a first potential to the electron emission element via the one wiring and second application means for applying a second potential to the electron emission element via the other wiring of the wirings. An object of the present invention is to make it possible to mitigate the effects of ringing described above. According to the present invention, the foregoing object is attained by providing delay means for providing a delay time Td following application of the first potential in order to delay application of the second potential; the delay time Td satisfying the following inequality when R, C and L represent a resistance value, capacitance component and inductance component of the electron source device, respectively: Td > (0.733/ζ) x (2π/ω 0 ) where ζ = 1/(2R) x (L / C) , ω 0 = 1/( LxC ) Preferably, the first application means applies the first potential to a row-direction wire of a multiple-element device obtained by wiring a plurality of said elements two-dimensionally into a matrix, and the second application means applies the second potential to a column-direction wire of the multiple-element device in state in which the first potential is being applied by the first application means. More preferably, the first application means applies the first potential to a plurality of row-direction wires while selecting these row-direction wires sequentially. More preferably, the second application means applies, the second potential based upon an image signal. More preferably, the first and second potentials are set to values that will not cause the element to be driven when the first potential is being applied and the second potential is not. The driving apparatus of the present invention may be included as part of an image forming apparatus that also includes the electron source device and also an image forming member on which an image is to be formed by driving of the electron emission element of the electron source. A drive method for driving an electron source device is defined in claim 8 according to the invention. Other features and advantages of the present invention will be apparent from the following description taken in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a diagram showing the drive circuitry of a display panel that is part of an image forming apparatus according to an embodiment of the present invention; Fig. 2 is an equivalent circuit diagram useful in describing the electrical characteristics of an electron source, drive circuit and connections shown in Fig. 1; Fig. 3 is a diagram useful in describing a transient signal waveform applied to the electron source; Fig. 4 is a perspective view, partially cut away, showing the display panel of an image display device according to an embodiment of the present invention; Figs. 5A and 5B are plan views showing an array of phosphors on a face plate of the display panel; Figs. 6A and 6B are plan and sectional views, respectively, of a planar-type surface-conduction electron emission element used in this embodiment; Figs. 7A ∼ 7E are sectional views useful in describing a process for manufacturing a planar-type surface-conduction electron emission element; Fig. 8 is a diagram showing an example of a voltage waveform applied when electrification forming is carried out; Fig. 9A is a diagram showing a voltage waveform applied when an electrification activation treatment is performed, and Fig. 9B shows a change in emission current Ie; Fig. 10 is a schematic sectional view useful in describing the basic construction of a vertical-type surface-conduction electron emission element; Figs. 11A ∼ 11F are sectional views useful in describing a process for manufacturing a vertical-type surface-conduction electron emission element used in this embodiment; Fig. 12 is a graph showing a typical characteristic of the surface-conduction electron emission element used in this embodiment; Fig. 13 is a plan view showing the substrate of a multiple electron beam source used in this embodiment; Fig. 14 is a sectional view of part of the substrate of the surface-conduction electron emission element used in this embodiment; Fig. 15 is a block diagram showing a multifunction image display apparatus using an image display device embodying the present invention; Fig. 16 is a diagram showing an example of a surface-conduction electron emission element according to the prior art; Fig. 17 is a diagram useful in describing a method of wiring an electron emission element attempted by the inventors; Fig. 18 is a diagram for describing a voltage waveform, which drives an ordinary multiple electron beam source, as well as the timing thereof; Fig. 19A shows an electron source, its drive circuits and the connections between them, and Fig. 19B is an equivalent circuit diagram useful in describing the electrical characteristics of this electron source, its drive circuits and the connections; and Fig. 20 is a diagram useful in describing a transient signal waveform applied to the electron source. DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will now be described with reference to the drawings. Fig. 1 illustrates the drive circuits of an image forming apparatus according to a preferred embodiment of the invention. Specifically, shown in Fig. 1 are a display panel 1 which uses a multiple electron beam source, a scanning drive circuit 2 for performing drive so as to scan selected lines to present a line sequential display, a modulating drive circuit 3 for outputting a modulating signal based upon an image, a timing control circuit 4 for controlling the timing at which the modulating signal is applied to the display panel 1, and connections 5, 6 between the display panel 1 and drive circuits 2, 3. Numeral 7 denotes a synchronizing signal separation unit which separates composite video signals into synchronizing signals and image data signals. The image data signals are supplied to the modulating drive circuit 3. The synchronizing signals are supplied to the timing control circuit 4. The timing control circuit 4 generates "B" and "D" based on the synchronizing signal and supplies them to the scanning drive circuit 2 and modulating drive circuit 3, respectively. As mentioned earlier, the driving signals applied to the electron emission elements develop ringing owing to a capacitance component ascribable to the matrix wiring on the substrate of the multiple electron beam source and inductance components due to induction in the connections between the electron source substrate and drive circuits. According to this embodiment, the timing control circuit 4 controls the application timing of the modulating signal in such a manner that the driving voltage from the modulating drive circuit 3 will be applied after the ringing of the driving voltage waveform, which is produced when the selection voltage from the scanning drive circuit 2 is applied, subsides. By thus controlling the timing at which the driving voltage is applied by the modulating drive circuit 3, the effects of ringing are reduced. In terms of operation of the circuit shown in Fig. 1, first the selection voltage from the scanning drive circuit 2 is applied to the desired line in accordance with a scanning control signal. Next, the driving voltage is applied from the modulating drive circuit 3 based on the image data signal corresponding to the selected line. The timing for applying the driving voltage is delayed by the timing control circuit 4 which provides a delay time that is longer than the time needed for settling of the rising of the driving signal caused by the selection voltage. A display is presented by performing this operation in regard to each line selected by sequential scanning. A desired delay time according to this embodiment will be described with reference to Figs. 2 and 3. Fig. 2 is a diagram obtained when the circuitry of Fig. 1 is replaced by a simplified electric circuit. Here L is substituted for the inductance components of the connections 5, 6 and matrix wiring on the substrate of the electron beam sources, C is substituted for the capacitance component and R is substituted for the resistance components of the plurality of surface-conduction electron emission elements on the selected line. Under these conditions it is possible to calculate the ringing waveform expressed by the following equation, where ω 0 represents the angular frequency of ringing, ζ the damping coefficient and V(t) the voltage applied to the surface-conduction electron emission elements: V(t) = 1-[ζ/ (1-ζ 2 ) *sin( (1-ζ 2 ) *ω 0 t)+cos( (1-ζ 2 ) *ω 0 t)]*exp(-ζω 0 t) where ω 0 = 1/(L×C) ζ = 1/(2R) × √ (L/C) Let Td represent the desired delay time. The component representing damping of the ringing waveform in the above equation for calculating V(t) is exp(-ζω 0 t) A time t1 that will make exp(-ζω 0 t) approximately 0.01 (i.e., 1 %) should be selected. In other words, we have exp(-ζω 0 t) = 0.01 Accordingly, this gives us t1 = 4.605(ζω 0 ) Further, since ω 0 = 2πf 0 holds, we have t1 = 0.733/(ζf 0 ) By selecting a delay time Td that is larger than t1, the transient voltage added upon the applied voltage by the ringing waveform can be damped to less than 1%. The delay time Td may be written as follows for the sake of simplicity: Td > 1/(ζf 0 ) [= 1/ζ × (2π/ω 0 )] The inductance component L that decides ω 0 and ζ is determined by the wiring length of the circuit, and the capacitance component C is decided primarily by the capacitance component of the insulating layer at the matrix wiring intersections and the capacitance component due to the capacitance between neighboring wiring patterns. The resistance component R is determined by the ON resistance of the elements when they are turned on and the OFF resistance of the elements when they are turned off. These components are parameters fixed based on the arrangement and dimension of the multiple electron beam source and the matrix wiring on the substrate. The inductance component L is decided by the wiring length of the circuit, as mentioned above, and can be measured by an LCR meter by selecting one line of the wiring for the scanning and using the lead-outs on both sides of this line as terminals. The inductance component due to the wiring on the modulating side can be measured in similar fashion. However, since several thousand wiring patterns on the modulating side are selected simultaneously when the elements are driven, the inductance components of each of the lines become parallel-connected and, hence, take on extremely small values. The capacitance component C is decided primarily by the capacitance component of the insulating layer at the matrix wiring intersections and the capacitance component due to the capacitance between neighboring wiring patterns, as mentioned above. In other words, in a manner similar to that when the elements are driven, the capacitance component C can be measured by an LCR meter by using one selected wiring pattern on the scanning side as one terminal and using the remaining wiring patterns on the scanning side and all wiring patterns on the modulating side collectively as the other terminal. The resistance component R is determined by the ON resistance of the elements when they are turned on and the OFF resistance of the elements when they are turned off, as mentioned above. In other words, the ON resistance can be measured by dividing, by the line current that flows into the scanning side, a value obtained by adding the applied voltage on the scanning side when a line is selected so as to turn on the elements of this line and the voltage (namely the total selection voltage) applied to all elements on the selected line from the modulating side. The OFF resistance can be measured upon turning off the ON elements, as by making the voltage on the modulating side zero, in such a manner that the selection voltage applied to all elements on the selected line will be half of the voltage applied when the elements were in the ON state. The value of Td mentioned above is decided in such a manner that voltage due to ringing will not exceed 1% of the applied voltage. This means that if the applied voltage at the time of turn-on is 14 V, then the voltage due to ringing will be 0.14 V. This level is the same as the margin, e.g., 0.25 V, of the driving voltage that may be assumed from the temperature characteristic and output variance of the drive circuit. In other words, since the set driving margin is taken by ringing, it is required that the settled state of the transient waveform due to ringing be limited to be on the order of several percent of the applied voltage. Accordingly, it will suffice if the delay time Td is decided so that the voltage due to ringing will not be more than several percent of the applied voltage, the value of 1% mentioned above not being a strict limitation. We shall investigate the aforementioned L, C, R values in an image display device having a diagonal size of 60 inches provided with an RGB pixel array of 2000 horizontal pixels × 1000 vertical pixels necessary for a high-quality image display. The lengths of the scanning wiring patterns and modulating wiring are 1.3 m and 0.7 m, respectively, and the capacitance component due to the scanning wiring that mainly decides the inductance component is about one µH. The capacitance component at the wiring cross points is 0.02 pF per cross point in a case where the width of the scanning wiring is about 300 µm, the width of the modulating wiring is about 100 µm and the thickness of the insulating layer is about 20 µm. Capacitance when one scanning line having an array of 2000 x 3 elements is selected is 120 pF. Here the capacitance between neighboring scanning lines is assumed to be relatively small. Further, OFF resistance is 3 MΩ per element in view of the voltage-current characteristic of the element. Accordingly, the off resistance is about 500 Ω per elements on the line. This means that the resonance frequency when the elements on one line of the matrix are driven is 14 MHz, based upon 1/[2π √ (L×C) ]. Further, ζ is 0.09 and Td serving as the standard is five microseconds. With regard to element response, operation is based upon tunnel current. Therefore, since rise time is on the order of nanoseconds, the elements operate in conformity with the above-described ringing waveform. The setting of the delay time Td influences the maximum brightness of the light emission because the delay time and maximum modulation time share the scanning interval of one line. More specifically, maximum brightness is decided by the time to be driven in a duration of the line scanning. For example, if the display frame frequency is 60 Hz and the number of scanning lines is 1000, then one scanning interval is about 17 µs. If a delay time Td of 5 µs has been set, maximum brightness will be reduced by about 30% based upon the equation 5/17 = 0.29. It is preferred that this embodiment be implemented by setting the amount of reduction to be less than 50%. In other words, the delay time Td should be made less than 50%, and preferably less than 30%, of the time during which the first potential is applied. As will be described later, surface-conduction electron emission elements according to this embodiment have a resistance component that exhibits a non-linear characteristic with respect to applied voltage. That is, the element exhibits a comparatively high resistance value when only the selection voltage Vs is being applied, and the resistance value decreases by one place when the driving voltage Ve is applied in addition to Vs. In driving a simple matrix, the usual practice is to select these voltages in accordance with the equation -Vs = Ve = 1/2(Ve-Vs). A surface-conduction electron emission element will exhibit a high resistance value when only Vs is applied and a low resistance value when Vs and Ve are applied. This change in the resistance component with respect to applied voltage means that the value of the damping coefficient ζ in the ringing phenomenon changes. As a result, a difference is produced in the damping characteristic of the ringing waveform. This is shown in Fig. 3. Ringing continues for a comparatively long time and the amplitude thereof is large during the time that only the selection voltage Vs is being applied. However, since the driving voltage Ve is applied upon being delayed by the delay time Td, which is longer than the time required for ringing to settle, the effects of ringing are negligible. In the case where the driving voltage Ve is applied, the damping coefficient ζ becomes several times larger. Consequently, ringing subsides quickly and becomes small in amplitude, as indicated at B in Fig. 3. This means that measures taken when only the selection voltage Vs is applied are effective in order to suppress the effects of ringing. By reducing the effects of ringing at the time of drive in the manner described above, it is possible to obtain a high-quality image forming apparatus whose gradation property is controlled. (Construction and method of manufacturing display panel) The construction of a display panel of an image display apparatus, as well as a method of manufacturing the panel, according to this embodiment of the present invention will now be described. Fig. 4 is a perspective view of the display panel used in this embodiment. Part of a panel is cut away to reveal the internal structure of the apparatus. The apparatus includes a rear plate 1005, a side wall 1006 and a face plate 1007. The rear plate 1005, side wall 1006 and face plate 1007 form a hermetic envelope for maintaining a vacuum within the display panel. In terms of assembling the hermetic vessel, the joints between the members require to be sealed to maintain sufficient strength and air-tightness. By way of example, a seal is achieved by coating the joints with frit glass and carrying out calcination in the atmosphere or in a nitrogen environment at a temperature of 400 ∼ 500°C for 10 min or more. The method of evacuating the interior of the hermetic vessel will be described later. A substrate 1001 is fixed to the rear plate 1005, which substrate has N × M surface-conduction electron emission elements 1002 formed thereon. (Here N, M are positive integers having a value of two or greater, with the number being set appropriately in conformity with the number of display pixels intended. For example, in a display apparatus the purpose of which is to display high-definition television, it is desired that the set numbers of elements be no less than N = 3000, M = 1000. In this embodiment, N = 3072, M = 1024 hold.) The N × M surface-conduction electron emission elements are matrix-wired by m-number of row-direction wiring patterns 1003 and n-number of column-direction wiring patterns 1004. The portion constituted by the components 1001 ∼ 1004 is referred to as a "multiple electron beam source". The method of manufacturing the multiple electron beam source and the structure thereof will be described later in greater detail. In this embodiment, the structure is such that the substrate 1001 of the multiple electron beam source is fixed to the rear plate 1005 of the hermetic envelope. However, in a case where the substrate 1001 of the multiple electron beam source has sufficient mechanical strength, the substrate 1001 may itself be used as the rear plate of the hermetic envelope. A phosphor film 1008 is formed on the underside of the face plate 1007. Since this embodiment relates to a color display apparatus, portions of the phosphor film 1008 are coated with phosphors of the three primary colors red, green and blue used in the field of CRT technology. The phosphor of each color is applied in the form of stripes, as shown in Fig. 5A, and a black conductor 1010 is provided between the phosphor stripes. The purpose of providing the black conductors 1010 is to assure that there will not be a shift in the display colors even if there is some deviation in the position irradiated with the electron beam, to prevent a decline in display contrast by preventing the reflection of external light, and to prevent the phosphor film from being charged up by the electron beam. Though the main ingredient used in the black conductor 1010 is graphite, any other material may be used so long as it is suited to the above-mentioned objectives. The application of the phosphors of the three primary colors is not limited to the stripe-shaped array shown in Fig. 5A. For example, a delta-shaped array, such as that shown in Fig. 5B, or other array may be adopted. In a case where a monochromatic display panel is fabricated, a monochromatic phosphor material may be used as the phosphor film 1008 and the black conductor material need not necessarily be used. Further, a metal back 1009 well known in the field of CRT technology is provided on the surface of the phosphor film 1008 on the side of the rear plate. The purpose of providing the metal back 1009 is to improve the utilization of light by reflecting part of the light emitted by the phosphor film 1008, to protect the phosphor film 1008 against damage due to bombardment by negative ions, to act as an electrode for applying an electron-beam acceleration voltage, and to act as a conduction path for the electrons that have excited the phosphor film 1008. The metal back 1009 is fabricated by a method which includes forming the phosphor film 1008 on the face plate substrate 1007, subsequently smoothing the surface of the phosphor film and vacuum-depositing aluminum on this surface. In a case where a phosphor material for low voltages is used as the phosphor film 1008, the metal back 1009 is unnecessary. Though not used in this embodiment, transparent electrodes made of a material such as ITO may be provided between the face plate substrate 1007 and the phosphor film 1008 in order to apply an accelerating voltage and for the purpose of improving the conductivity of the phosphor film 1008. Electrical connection terminals Dx1 ∼ DxM, Dy1 ∼ DyN and Hv having an air-tight structure are provided to electrically connect the display panel to an electric circuit, which is not shown. The terminals Dx1 ∼ Dxm are electrically connected to the row-direction wiring patterns 1003 of the multiple electron beam source, the terminals Dy1 ∼ DyN are electrically connected to the column-direction wiring patterns 1004 of the multiple electron beam source, and the terminal Hv is electrically connected to the metal back 1009 of the face plate. In order to evacuate the interior of the hermetic envelope, an exhaust pipe and a vacuum pump, not shown, are connected to the hermetic envelope after the hermetic envelope is assembled and the interior of the envelope is exhausted to a vacuum of 1 × 10 -7 torr. The exhaust pipe is then sealed. In order to maintain the degree of vacuum within the hermetic envelope, a getter film (not shown) is formed at a prescribed position inside the hermetic envelope immediately before or immediately after the pipe is sealed. The getter film is a film formed by heating a getter material, the main ingredient of which is Ba, for example, by a heater or by high-frequency heating to deposit the material. A vacuum on the order of 1 × 10 -5 ∼ 1 × 10 -7 torr is maintained inside the hermetic envelope by the adsorbing action of the getter film. The basic construction and method of manufacturing the display panel of this embodiment will now be described. The method of manufacturing the multiple electron beam source used in the display panel of the foregoing embodiment will be described next. If the multiple electron beam source used in the image display apparatus of this invention is an electron source obtained by wiring surface-conduction electron emission elements in the form of a simple matrix, there is no limitation upon the material, shape or method of manufacture of the surface-conduction electron emission elements. However, the inventors have discovered that, among the surface-conduction electron emission elements available, an element in which the electron emission portion or periphery thereof is formed from a film of finely divided particles excels in its electron emission characteristic, and that the element can be manufactured easily. Accordingly, it may be construed that such an element is most preferred for used in a multiple electron beam source in an image display apparatus having a high luminance and a large display screen. Accordingly, in the display panel of the foregoing embodiment, use was made of a surface-conduction electron emission element in which the electron emission portion or periphery thereof was formed from a film of finely divided particles. First, therefore, the basic construction, method of manufacture and characteristics of an ideal surface-conduction electron emission element will be described, and this will be followed by a description of the structure of a multiple electron beam source in which a large number of elements are wired in the form of a simple matrix. (Element construction ideal for surface-conduction electron emission elements, and method of manufacturing same) A planar-type and vertical-type element are the two typical types of construction of surface-conduction electron emission elements available as surface-conduction electron emission elements in which the electron emission portion or periphery thereof is formed from a film of finely divided particles. (Planar-type surface-conduction electron emission element) The element construction and manufacture of a planar-type surface-conduction electron emission element will be described first. Figs. 6A and 6B are plan and sectional views, respectively, for describing the construction of a planar-type surface-conduction electron emission element. Shown in Figs. 6A and 6B are a substrate 1101, element electrodes 1102, 1103, an electrically conductive thin film 1104, an electron emission portion 1105 formed by an electrification forming treatment, and a thin film 1113 formed by an electrification activation treatment. Examples of the substrate 1101 are various glass substrates such as quartz glass and blue glass, various substrates of a ceramic such as alumina, or a substrate obtained by depositing an insulating layer such as SiO 2 on the various substrates mentioned above. The element electrodes 1102, 1103, which are provided so as to oppose each other on the substrate 1101 substantially in parallel with the substrate surface, are formed from a material exhibiting electrical conductivity. Examples of the material that can be mentioned are the metals Ni, Cr, Au, Mo, W, Pt, Ti, Al, Cu, Pd and Ag or alloys of these metals, metal oxides such as In 2 O 3 -SnO 2 and semiconductor materials such as polysilicon. If a film manufacturing technique such as vacuum deposition and a patterning technique such as photolithography or etching are used in combination in order to form the electrodes, the electrode can be formed with ease. However, it is permissible to form the electrodes using another method (such as a printing technique). The shapes of the element electrodes 1102, 1103 are decided in conformity with the application and purpose of the electron emission element. In general, the spacing L between the electrodes may be a suitable value selected from a range of several hundred Ångströms (1 Å ≡ 0.1 nm) to several hundred microns (µm). Preferably, the range is on the order of several microns to tens of microns in order for the device to be used in a display apparatus. With regard to the thickness d of the element electrodes, a suitable numerical value is selected from a range of several hundred Angströms (1 Å ≡ 0.1nm) to several microns (µm). A film of finely divided particles is used at the portion of the electrically conductive thin film 1104. The film of finely divided particles mentioned here signifies a film (inclusive of island-shaped aggregates) containing a large number of finely divided particles as structural elements. If a film of finely divided particles is examined microscopically, usually the structure observed is one in which individual fine particles are arranged in spaced-apart relation, one in which the particles are adjacent to one another and one in which the particles overlap one another. The particle diameter of the finely divided particles used in the film of finely divided particles falls within a range of from several Angströms (1Å ≡ 0.1nm) to several hundred nm (thousand Ångströms), with the particularly preferred range being 1 to 20 nm (10 to 200 Å). The film thickness of the film of finely divided particles is suitably selected upon taking into consideration the following conditions: conditions necessary for achieving a good electrical connection between the element electrodes 1102 and 1103, conditions necessary for carrying out electrification forming, described later, and conditions necessary for obtaining a suitable value, described later, for the electrical resistance of the film of finely divided particles per se. More specifically, the film thickness is selected in the range of from several tertis nm (Ångströms) to several hundred nm (thousand Ångströms), preferably 1 to 50 nm (10 to 500 Å). Examples of the material used to form the film of finely divided particles are the metals Pd, Pt, Ru, Ag, Au, Ti, In, Cu, Cr, Fe, Zn, Sn, Ta, W and Pb, etc., the oxides PdO, SnO 2 , In 2 O 3 , PbO and Sb 2 O 3 , etc., the borides HfB 2 , ZrM 2 , LaB 6 , CeB 6 , YB 4 and GdB 4 , the carbides TiC, ZrC, HfC, TaC, SiC and WC, etc., the nitrides TiN, ZrN and HfN, etc., the semiconductors Si, Ge, etc., and carbon. The material may be selected appropriately from these. As mentioned above, the electrically conductive thin film 1104 is formed from a film of finely divided particles. The sheet resistance is set so as to fall within the range of from 10 3 to 10 7 Ω/π. Since it is preferred that the electrically conductive thin film 1104 come into good electrical contact with the element electrodes 1102, 1103 when connected thereto, the adopted structure is such that the film and the element electrodes partially overlap each other. As for the methods of achieving this overlap, one method is to build up the device from the bottom in the order of the substrate, element electrodes and electrically conductive film, as shown in the example of Figs. 6A and 6B. Depending upon the case, the device may be built up from the bottom in the order of the substrate, electrically conductive film and element electrodes. The electron emission portion 1105 is a crack-shaped portion formed in part of the electrically conductive thin film 1104 and, electrically speaking, has a resistance higher than that of the surrounding conductive thin film. The crack is formed by subjecting the electrically conductive thin film 1104 to an electrification forming treatment, described later. There are cases in which finely divided particles having a particle diameter of several Ångströms (1Å ≡ 0.1nm) to several hundred Ångströms are placed inside the crack. It should be noted that since it is difficult to illustrate, finely and accurately, the actual position and shape of the electron emission portion, only a schematic illustration is given in Figs. 6A and 6B. The thin film 1113 comprises carbon or a carbon compound and covers the electron emission portion 1105 and its vicinity. The thin film 1113 is formed by carrying out an electrification activation treatment, described later, after the electrification forming treatment. The thin film 1113 is one or a mixture of single-crystal graphite, polycrystalline graphite or amorphous carbon. The film thickness preferably is less than 50nm (500 Å), especially less than 30nm (300 Å). It should be noted that since it is difficult to precisely illustrate the actual position and shape of the thin film 1113, only a schematic illustration is given in Figs. 6A, 6B. Further, in the plan view of Fig. 6A, the element is shown with part of the thin film 1113 removed. The desired basic construction of the element has been described. The element set forth below was used in this embodiment. Blue glass was used as the substrate 1101, and a thin film of Ni was used as the element electrodes 1102, 1103. The thickness d of the element electrodes was 100 nm (1000 Å), and the electrode spacing L was 2 µm. Pd or PdO was used as the main ingredient of the film of finely divided particles, the thickness of the film of finely divided particles was about 10nm (100 Å), and the width W was 100 µm. The method of manufacturing the preferred planar-type of surface-conduction electron emission element will now be described. Figs. 7A ∼ 7E are sectional views for describing the process steps for manufacturing the surface-conduction electron emission element. Portions similar to those in Fig. 6A, 6B are designated by like reference numerals. 1) First, the element electrodes 1102, 1103 are formed on the substrate 1101, as shown in Fig. 7A. With regard to formation, the substrate 1101 is cleansed sufficiently in advance using a detergent,.pure water or an organic solvent, after which the element electrode material is deposited. (An example of the deposition method used is a vacuum film-forming technique such as vapor deposition or sputtering.) Thereafter, the deposited electrode material is patterned using photolithography to form the pair of electrodes 1102, 1103 shown in Fig. 7A. 2) Next, the electrically conductive thin film 1104 is formed, as shown in Fig. 7B. With regard to formation, the substrate of Fig. 7A is coated with an organic metal solution, the latter is allowed to dry, and heating and calcination treatments are applied to form a film of finely divided particles. Patterning is then carried out by photolithographic etching to obtain a prescribed shape. The organic metal solution is a solution of an organic metal compound in which the main element is the material of the finely divided particles used in the electrically conductive film. (Specifically, Pd was used as the main element in this embodiment. Further, the dipping method was employed as the method of application in this embodiment. However, other methods which may be used are the spinner method and spray method.) Further, besides the method of applying the organic metal solution used in this embodiment as the method of forming the electrically conductive thin film made of the film of finely divided particles, there are cases in which use is made of vacuum deposition and sputtering or chemical vapor deposition. 3) Next, as shown in Fig. 7C, a suitable voltage is applied across the element electrodes 1102 and 1103 from a forming power supply 1110, whereby an electrification forming treatment is carried out to form the electron emission portion 1105. The electrification forming treatment includes passing a current through the electrically conductive thin film 1104, which is made from the film of finely divided particles, to locally destroy, deform or change the property of this portion, thereby obtaining a structure ideal for performing electron emission. At the portion of the electrically conductive film, made of the film of finely divided particles, changed to a structure ideal for electron emission (i.e., the electron emission portion 1105), a crack suitable for a thin film is formed. When a comparison is made with the situation prior to formation of the electron emission portion 1105, it is seen that the electrical resistance measured between the element electrodes 1102 and 1103 after formation has increased to a major degree. In order to give a more detailed description of the electrification method, an example of a suitable voltage waveform supplied from the forming power supply 1110 is shown in Fig. 8. In a case where the electrically conductive film made of the film of finely divided particles is subjected to forming, a pulsed voltage is preferred. In the case of this embodiment, triangular pulses having a pulse width T1 were applied consecutively at a pulse interval T2, as illustrated in the Figure. At this time, the peak value Vpf of the triangular pulses was gradually increased. A monitoring pulse Pm for monitoring the formation of the electron emission portion 1105 was inserted between the triangular pulses at a suitable spacing and the current which flows at such time was measured by an ammeter 1111. In this embodiment, under a vacuum of, say, 1×10 -3 Pa (1 × 10 -5 Torr), the pulse width T1 and pulse interval T2 were made 1 ms and 10 ms, respectively, and the peak voltage Vpf was elevated at increments of 0.1 V every pulse. The monitoring pulse Pm was inserted at a rate of once per five of the triangular pulses. The voltage Vpm of the monitoring pulses was set to 0.1 V so that the forming treatment would not be adversely affected. Electrification applied for the forming treatment was terminated at the stage where the resistance between the terminal electrodes 1102, 1103 became 1 × 10 6 Ω, namely at the stage where the current measured by the ammeter 1111 at application of the monitoring pulse fell below 1 × 10 -7 A. The method described above is preferred in relation to the surface-conduction electron emission element of this embodiment. In a case where the material or film thickness of the film consisting of the finely divided particles or the design of the surface-conduction electron emission element such as the element-electrode spacing L is changed, it is desired that the conditions of electrification be altered accordingly. 4) Next, as shown in Fig. 7D, a suitable voltage from an activating power supply 1112 was impressed across the element electrodes 1102, 1103 to apply an electrification activation treatment, thereby improving the electron emission characteristic. This electrification activation treatment involves subjecting the electron emission portion 1105, which has been formed by the above-described electrification forming treatment, to electrification under suitable conditions and depositing carbon or a carbon compound in the vicinity of this portion. (In Fig. 7D, the deposit consisting of carbon or carbon compound is illustrated schematically as a member 1113.) By carrying out this electrification activation treatment, the emission current typically can be increased by more than 100 times, at the same applied voltage, in comparison with the current before application of the treatment. More specifically, by periodically applying voltage pulses in a vacuum ranging from 1×10 -2 to 1×10 -3 Pa (1 × 10 -4 to 1 × 10 -5 Torr), carbon or a carbon compound in which an organic compound present in the vacuum serves as the source is deposited. The deposit 1113 is one or a mixture of single-crystal graphite, polycrystalline graphite or amorphous carbon. The film thickness is less than 50nm (500 Å, preferably less than 30nm (300 Å). In order to give a more detailed description of the electrification method, an example of a suitable waveform supplied by the activation power supply 1112 is illustrated in Fig. 9A. In this embodiment, the electrification activation treatment was conducted by periodically applying rectangular waves of a fixed voltage. More specifically, the voltage Vac of the rectangular waves was made 14 V, the pulse width T3 was made 1 ms, and the pulse interval T4 was made 10 ms. The electrification conditions for activation mentioned above are desirable conditions in relation to the surface-conduction electron emission element of this embodiment. In a case where the design of the surface-conduction electron emission element is changed, it is desired that the conditions be changed accordingly. Numeral 1114 in Fig. 7D denotes an anode electrode for capturing the emission current Ie obtained from the surface-conduction electron emission element. The anode electrode is connected to a DC high-voltage power supply 1115 and to an ammeter 1116. (In a case where the activation treatment is carried out after the substrate 1101 is installed in the display panel, the phosphor surface of the display panel is used as the anode electrode 1114.) During the time that the voltage is being supplied from the activation power supply 1112, the emission current Ie is measured by the ammeter 1116 to monitor the progress of the electrification activation treatment, and the operation of the activation power supply 1112 is controlled. Fig. 9B illustrates an example of the emission current Ie measured by the ammeter 1116. When the pulsed voltage starts being supplied by the activation power supply 1112, the emission current Ie increases with the passage of time but eventually saturates and then almost stops increasing. At the moment the emission current Ie thus substantially saturates, the application of voltage from the activation power supply 1112 is halted and the activation treatment by electrification is terminated. It should be noted that the above-mentioned electrification conditions are preferred conditions in relation to the surface-conduction electron emission element of this embodiment. In a case where the design of the surface-conduction electron emission element is changed, it is desired that the conditions be changed accordingly. Thus, the planar-type surface-conduction electron emission element shown in Fig. 7E is manufactured as set forth above. (Vertical-type surface-conduction electron emission element) Next, one more typical construction of a surface-conduction electron emission element in which the electron emission portion or its periphery is formed from a film of finely divided particles, namely the construction of a vertical-type surface-conduction electron emission element, will be described. Fig. 10 is a schematic sectional view for describing the basic construction of the vertical-type element. Numeral 1201 denotes a substrate, 1202 and 1203 element electrodes, 1206 a step forming member, 1204 an electrically conductive thin film using a film of finely divided particles, 1205 an electron emission portion formed by an electrification forming treatment, and 1213 a thin film formed by an electrification activation treatment. The vertical-type element differs from the planar-type element in that one element electrode (1202) is provided on the step forming member 1206, and in that the electrically conductive thin film 1204 covers the side of the step forming member 1206. Accordingly, the element-electrode spacing L in the planar-type surface-conduction electron emission element shown in Fig. 6A is set as the height Ls of the step forming member 1206 in the vertical-type element. The substrate 1201, the element electrodes 1202, 1203 and the electrically conductive thin film 1204 using the film of finely divided particles can consist of the same materials mentioned in the description of planar-type element. An electrically insulating material such as SiO 2 is used as the step forming member 1206. A method of manufacturing the vertical-type surface-conduction electron emission element will now be described. Figs. 11A ∼ 11F are sectional views for describing the manufacturing steps. The reference characters of the various members are the same as those in Fig. 10. 1) First, the element electrode 1203 is formed on the substrate 1201, as shown in Fig. 11A. 2) Next, an insulating layer 1206 for forming the step forming member is built up, as shown in Fig. 11B. It will suffice if this insulating layer 1206 is formed by building up SiO 2 using the sputtering method. However, other film forming methods may be used, such as vacuum deposition or printing, by way of example. 3) Next, the element electrode 1202 is formed on the insulating layer 1206, as shown in Fig. 11C. 4) Next, part of the insulating layer 1206 is removed as by an etching process, thereby exposing the element electrode 1203, as shown in Fig. 11D. 5) Next, the electrically conductive thin film 1204 using the film of finely divided particles is formed, as shown in Fig. 11E. In order to form the electrically conductive thin film, it will suffice to use a film forming technique such as painting in the same manner as in the case of the planar-type element. 6) Next, an electrification forming treatment is carried out in the same manner as in the case of the planar-type element, thereby forming the electron emission portion. (It will suffice to carry out a treatment similar to the planar-type electrification forming treatment described using Fig. 7C.) 7) Next, as in the case of the planar-type element, the electrification activation treatment is performed to deposit carbon or a carbon compound in the vicinity of the electron emission portion. (It will suffice to carry out a treatment similar to the planar-type electrification activation treatment described using Fig. 7D.) Thus, the vertical-type surface-conduction electron emission element shown in Fig. 11F is manufactured as set forth above. (Characteristics of surface-conduction electron emission element used in display apparatus) The element construction and method of manufacturing the planar- and vertical-type surface-conduction electron emission elements have been described above. The characteristics of these elements used in a display apparatus will now be described. Fig. 12 illustrates a typical example of an (emission current Ie) vs. (applied element voltage Vf) characteristic and of an (element current If) vs. (applied element voltage Vf) characteristic of the elements used in a display apparatus. It should be noted that the emission current Ie is so much smaller than the element current If that it is difficult to use the same scale to illustrate it. Moreover, these characteristics are changed by changing the design parameters such as the size and shape of the elements. Accordingly, the two curves in the graph are each illustrated using arbitrary units. The elements used in this display apparatus have the following three characteristics in relation to the emission current Ie: First, when a voltage greater than a certain voltage (referred to as a threshold voltage Vth) is applied to the element, the emission current Ie suddenly increases. When the applied voltage is less than the threshold voltage Vth, on the other hand, almost no emission current Ie is detected. In other words, the element is a non-linear element having the clearly defined threshold voltage Vth with respect to the emission current Ie. Second, since the emission current Ie varies in dependence upon the voltage Vf applied to the element, the magnitude of the emission current Ie can be controlled by the voltage Vf. Third, since the response speed of the current Ie emitted from the element is high in response to a change in the voltage Vf applied to the element, the amount of charge of the electron beam emitted from the element can be controlled by the length of time over which the voltage Vf is applied. Because they possess the foregoing characteristics, surface-conduction electron emission elements are ideal for use in a display apparatus. For example, in a display apparatus in which a number of elements are provided to correspond to pixels of a displayed image, the display screen can be scanned sequentially to present a display if the first characteristic mentioned above is utilized. More specifically, a voltage greater than the threshold voltage Vth is suitably applied to driven elements in conformity with a desired light-emission luminance, and a voltage less than the threshold voltage Vth is applied to elements that are in an unselected state. By sequentially switching over elements driven, the display screen can be scanned sequentially to present a display. Further, by utilizing the second characteristic or third characteristic, the luminance of the emitted light can be controlled. This makes it possible to present a grayscale display. (Structure of multiple electron beam source having number of elements wired in form of simple matrix) Described next will be the structure of a multiple electron beam source obtained by arraying the aforesaid surface-conduction electron emission elements on a substrate and wiring the elements in the form of a simple matrix. Fig. 13 is a plan view of a multiple electron beam source used in the display panel of Fig. 4. Here surface-conduction electron emission elements similar to the type shown in Fig. 6A are arrayed on the substrate and these elements are wired in the form of a simple matrix by the row-direction wiring electrodes 1003 and column-direction wiring electrodes 1004. An insulating layer (not shown) is formed between the electrodes at the portions where the row-direction wiring electrodes 1003 and column-direction wiring electrodes 1004 intersect, thereby maintaining electrical insulation between the electrodes. Fig. 14 is a sectional view taken along lines A-A' of Fig. 13. It should be noted that the multiple electron source having this structure is manufactured by forming the row-direction wiring electrodes 1003, column-direction wiring electrodes 1004, inter-electrode insulating layer (not shown) and the element electrodes and electrically conductive thin film of the surface-conduction electron emission elements on the substrate in advance, and then applying the electrification forming treatment and electrification activation treatment by supplying current to each element via the row-direction wiring electrodes 1003 and column-direction wiring electrodes 1004. (Example of application to display panel) Fig. 15 is a diagram showing an example of a multifunction display apparatus constructed in such a manner that image information supplied from various image information sources, the foremost of which is a television broadcast, can be displayed on a display panel in which the surface-conduction electron emission elements described above are used as the electron beam source. Shown in Fig. 15 are a display panel 2100, a drive circuit 2101 for the display panel, a display controller 2102, a multiplexer 2103, a decoder 2104, an input/output interface circuit 2105, a CPU 2106, an image forming circuit 2107, image-memory interface circuits 2108, 2109 and 2110, an image-input interface circuit 2111, TV-signal receiving circuits 2112, 2113, and an input unit 2114. In a case where this display apparatus receives a signal containing both video information and audio information as in the manner of a television signal, for example, audio is of course reproduced at the same time that video is displayed. However, circuitry and speakers related to the reception, separation, reproduction, processing and storage of audio information not directly related to the features of this embodiment are not described. The functions of the various units will be described in line with the flow of the image signal. First, the TV-signal receiving circuit 2113 receives a TV image signal transmitted using a wireless transmission system that relies upon radio waves, optical communication through space, etc. The system of the TV signals received is not particularly limited. Examples of the systems are the NTSC system, PAL system and SECAM system, etc. A TV signal comprising a greater number of scanning lines (e.g., a so-called high-quality TV signal such as one based upon the MUSE system) is a signal source that is ideal for exploiting the advantages of the above-mentioned display panel suited to enlargement of screen area and to an increase in the number of pixels. A TV signal received by the TV-signal receiving circuit 2113 is output to the decoder 2104. The TV-signal receiving circuit 2112 receives the TV image signal transmitted by a cable transmission system using coaxial cable or optical fibers, etc. As in the case of the TV-signal receiving circuit 2113, the system of the received TV signal is not particularly limited. Further, the TV signal received by this circuit also is output to the decoder 2104. The image-input interface circuit 2111 is a circuit for accepting an image signal supplied by an image input unit such as a TV camera or image reading scanner. The accepted image signal is output to the decoder 2104. The image-memory interface circuit 2110 accepts an image signal that has been stored in a video tape recorder (hereinafter abbreviated to VTR) and outputs the accepted image signal to the decoder 2104. The image-memory interface circuit 2109 accepts an image signal that has been stored on a video disk and outputs the accepted image signal to the decoder 2104. The image-memory interface circuit 2108 accepts an image signal from a device storing still-picture data, such as a so-called still-picture disk, and outputs the accepted still-picture data to the decoder 2104. The input/output interface circuit 2105 is a circuit for connecting the display apparatus and an external computer, computer network or output device such as a printer. It is of course possible to input/output image data, character data and graphic information and, depending upon the case, it is possible to input/output control signals and numerical data between the CPU 2106, with which the display apparatus is equipped, and an external unit. The image generating circuit 2107 is for generating display image data based upon image data and character/graphic information entered from the outside via the input/output interface circuit 2105 or based upon image data character/graphic information output by the CPU 2106. By way of example, the circuit is internally provided with a rewritable memory for storing image data or character/graphic information, a read-only memory in which image patterns corresponding to character codes have been stored, and a circuit necessary for generating an image, such as a processor for executing image processing. The display image data generated by the image generating circuit 2107 is output to the decoder 2104. In certain cases, however, it is possible to input/output image data relative to an external computer network or printer via an input/output interface circuit 2105. The CPU 2106 mainly controls the operation of the display apparatus and operations relating to the generation, selection and editing of display images. For example, the CPU outputs a control signal to the multiplexer 2103 to suitable select or combine image signals displayed on the display panel. At this time the CPU generates a control signal for the display panel controller 2102 in conformity with the image signal displayed and suitably controls the operation of the display apparatus, such as the frequency of the screen display, the scanning method (interlaced or non-interlaced) and the number of screen scanning lines. Furthermore, the CPU outputs image data and character/graphic information directly to the image generating circuit 2107 or accesses the external computer or memory via the input/output interface circuit 2105 to enter the image data or character/graphic information. It goes without saying that the CPU 2106 may also be used for purposes other than these. For example, the CPU may be directly applied to a function for generating and processing information, as in the manner of a personal computer or word processor. Alternatively, the CPU may be connected to an external computer network via the input/output interface circuit 2105, as mentioned above, so as to perform an operation such as numerical computation in cooperation with external equipment. The input unit 2114 is for allowing the user to enter instructions, programs or data into the CPU 2106. Examples are a keyboard and mouse or various other input devices such as a joystick, bar code reader, audio recognition unit, etc. The decoder 2104 is a circuit for reversely converting various image signals, which enter from the units 2107 ∼ 2113, into color signals of the three primary colors or a luminance signal and I, Q signals. It is desired that the decoder 2104 be internally equipped with an image memory, as indicated by the dashed line. This is for the purpose of handling a television signal that requires an image memory when performing the reverse conversion, as in a MUSE system, by way of example. Providing the image memory is advantageous in that display of a still picture is facilitated and in that, in cooperation with the image generating circuit 2107 and CPU 2106, editing and image processing such as thinning out of pixels, interpolation, enlargement, reduction and synthesis are facilitated. The multiplexer 2103 suitably selects the display image based upon a control signal which enters from the CPU 2106. More specifically, the multiplexer 2103 selects a desired image signal from among the reversely-converted image signals which enter from the decoder 2104 and outputs the selected signal to the drive circuit 2101. In this case, by changing over and selecting the image signals within the display time of one screen, one screen can be divided up into a plurality of areas and images which differ depending upon the area can be displayed as in the manner of a so-called split-screen television. The display panel controller 2102 is a circuit which controls the operation of the drive circuit 2101 based upon the control signal which enters from the CPU 2106. With regard to the basic operation of the display panel, a signal for controlling the operating sequence of a driving power supply (not shown) for the display panel is output to the drive circuit 2101, by way of example. In relation to the method of driving the display panel, a signal for controlling, say, the screen display frequency or scanning method (interlaced or non-interlaced) is output to the drive circuit 2101. Further, there is a case in which a control signal relating to adjustment of picture quality, namely luminance of the display image, contrast, tone and sharpness, is output to the drive circuit 2101. The drive circuit 2101 is a circuit for generating a drive signal applied to the display panel 2100 and operates based upon the image signal which enters from the multiplexer 2103 and the control signal which enters from the display panel controller 2102. The functions of the various units are as described above. By using the arrangement shown in Fig. 15, image information which enters from a variety of image information sources can be displayed on the display panel 2100 in the display apparatus of this embodiment. Specifically, various image signals, the foremost of which is a television broadcast signal, are reversely converted in the decoder 2104, suitably selected in the multiplexer 2103 and entered into the drive circuit 2101. On the other hand, the display controller 2102 generates a control signal for controlling the operation of the drive circuit 2101 in dependence upon the image signal displayed. On the basis of the aforesaid image signal and control signal, the drive circuit 2101 applies a driving signal to the display panel 2100. As a result, an image is displayed on the display panel 2100. This series of operations is under the overall control of the CPU 2106. Further, in the display apparatus of this embodiment, the contribution of the image memory incorporated within the decoder 2104, the image generating circuit 2107 and CPU 2106 make it possible not only to display image information selected from a plurality of items of image information but also to subject the displayed image information to image processing such as enlargement, reduction, rotation, movement, edge emphasis, thinning-out, interpolation, color conversion and vertical-horizontal ratio conversion and to image editing such as synthesis, erasure, connection, substitution and fitting. Further, though not particularly touched upon in the description of this embodiment, it is permissible to provide a special-purpose circuit for performing processing and editing with regard also to audio information in the same manner as the image processing and image editing set forth above. Accordingly, the display apparatus of this invention is capable of being provided with various functions in a single unit, such as the functions of TV broadcast display equipment, office terminal equipment such as television conference terminal equipment, image editing equipment for handling still pictures and moving pictures, computer terminal equipment and word processors, games, etc. Thus, the display apparatus has wide application for industrial and private use. Fig. 15 merely shows an example of the construction of a display apparatus using a display panel in which surface-conduction electron emission elements are adopted as the electron beam source. However, it goes without saying that the invention is not limited to this arrangement. For example, circuits relating to functions not necessary for the particular purpose of use may be deleted from the structural elements of Fig. 15. Conversely, depending upon the purpose of use, structural elements may be additionally provided. For example, in a case where the display apparatus is used as a TV telephone, it would be ideal to add a transmitting/receiving circuit inclusive of a television camera, audio microphone, illumination equipment and modem to the structural elements. In this display apparatus, a display panel in which surface-conduction electron emission elements serve as the electron beam source can be reduced in thickness with ease. This makes it possible to reduce the overall size of the display apparatus in the depth direction. In addition, a display panel in which surface-conduction electron emission elements serve as the electron beam source can readily be enlarged in terms of screen size, and the display panel excels in its high luminance and viewing angle characteristic. This means that it is possible for the display apparatus to display, with excellent visual clarity, an image which is realistic and impressive. Thus, in accordance with the present invention, as described above, the effects of ringing at application of driving signals is reduced in an effective manner, the driving of elements is stabilized, the electron emission of an electron source, for example, is stabilized and formation of a high-quality image becomes possible. Further, in a case where constant-current supply means is used when a potential is applied, it is possible to relax the requirement for response time for the purpose of maintaining a constant current. As many apparently widely different embodiments of the present invention can be made without departing from the scope thereof, it is to be understood that the invention is not limited to the specific embodiments thereof except as defined in the appended claims.

Claims: A drive apparatus for driving an electron source device (1) obtained by connecting, by one and another wirings (5,6; 1003,1004), an electron emission element (1002) driven by two different potentials (V s ,V e ) applied thereto, comprising: first application means (2) for applying a first potential (V s ) to the electron emission element via the one wiring (5); 1003), and second application means (3) for applying a second potential (V e ) to the electron emission element via the other wiring (6;1004) of the wirings; wherein said drive apparatus is characterised by comprising delay means (4) for providing a delay time Td following application of the first potential in order to delay application of the second potential, said delay time Td satisfying the following inequality when R, C and L represent a resistance value, capacitance component and inductance component of the electron source device (1), respectively: Td > (0.733/ζ) x (2π/ω 0 ) where ζ = 1/(2R) x (L / C) , ω 0 = 1/( LxC ) An apparatus according to claim 1, wherein said first application means applies the first potential to a row-direction wire (1003) of a multiple-element device obtained by wiring a plurality of said elements (1002) two-dimensionally into a matrix; and said second application means applies the second potential to a column-direction wire (1004) of said multiple-element device in state in which the first potential is being applied by said first application means. An apparatus according to claim 2, wherein said first application means applies the first potential to a plurality of row-direction wires while selecting these two-direction wires sequentially. An apparatus according to claim 2 or 3, wherein said second application means applies the second potential based upon an image signal. An apparatus according to any one of claims 1 to 4, wherein the first and second potentials are set to have values that will not cause the element to be driven when the first potential is being applied and the second potential is not. An image forming apparatus characterised by comprising: a driving apparatus according to any one of claims 1 to 5; an electron source device (1,1001,1002) including an electron emission element (1002) driven by said driving apparatus, connected by one and another wirings (1003,1004); and an image forming member (1,1007-1009) on which an image is formed by driving of said electron emission element. An apparatus according to claim 6 wherein said electron emission element is a cold cathode element. A drive method for driving an electron source device (1) obtained by connecting, by one and another wirings, an electron emission element driven by two different potentials applied thereto, comprising: a first application step of applying a first potential to the electron emission element via the one wiring; and a second application step of applying a second potential to the electron emission element via the other wiring of the wirings; wherein said drive method is characterised by comprising a step of providing a delay time Td following application of the first potential in order to delay application of the second potential, said delay time Td satisfying the following inequality when R, C and L represent a resistance value, capacitance component and inductance component of the electron source device, respectively: Td > (0.733/ζ x (2π/ω 0 ) where ζ = 1/(2R) x 2 (L / C) , ω 0 = 1/( LxC ) A method according to claim 8 wherein said first application step applies the first potential to a row-direction wire of a multiple-element device obtained by wiring a plurality of said elements two-dimensionally into a matrix; and said second application step applies the second potential to a column-direction wire of said multiple-element device in state in which the first potential is being applied at said first application step. A method according to claim 9, wherein said first application step applies the first potential to a plurality of row-direction wires while selecting these row-direction wires sequentially. A method according to claim 9 or 10, wherein said second application step applies the second potential based upon an image signal. A method according to any one of claims 8 to 11, wherein the first and second potentials are set to values that will not cause the element to be driven when the first potential is being applied and the second potential is not.

Inventors: SUZUKI HIDETOSHI, YAMAGUCHI EIJI, SUZUKI, HIDETOSHI, YAMAGUCHI, EIJI
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1998
Main classification: G09G3
IPC codes: G09G3, H01J1