Integrated protection from the effects of a short circuit of the output of a flyback converter

Abstract: A method of protection from the effects of a persistent short circuit of the output of a DC-DC flyback converter self-oscillating either at a variable frequency or functioning at a fixed frequency in a discontinuous manner, using a transformer for storing and transferring energy to a load, having an auxiliary winding (AUS) for synchronizing the turning on of the power switch (POWER) that drives the winding (N1) of the transformer under a condition of null current in the primary winding when self-oscillating at a variable frequency, wherein the voltage induced back from the current flowing in a secondary winding (N2) of the transformer on said auxiliary winding (AUS) is rectified and filtered (D2, C2) to power, during a steady state of operation, the control circuitry (CONTROL) of the converter, the turning on of the power switch (POWER) being driven during a start-up or recovery phase by a primary control loop, when the supply voltage (VDD) of the control circuit reaches or is over a preestablished enabling threshold of the control circuit, a secondary control loop comprising a photocoupler of the output error voltage (ERROR AMP) to an input (COMP) of the control circuitry (CONTROL) to which it is connected a compensation capacitor (CCOMP), includes the steps of discriminating an output short circuit condition from a start-up or recovery condition by comparing (COMP1) the voltage (V AUS ) present on said auxiliary winding (AUS) with a preestablished threshold (Vref1) higher than the voltage (V AUS ) that is induced on the auxiliary winding (AUS) under a short circuit condition of the secondary winding (N2) of the flyback transformer and by comparing the voltage existing on said compensation capacitor (CCOMP) with a second threshold (Vref2) of value equal or close to the value of maximum charge of said compensation capacitor (CCOMP), within a time interval sufficiently delayed from the turn-off instant of the power switch (POWER); conditioning, by means of a (SET CC) signal resulting from the logic combination (AND) of the signal originating from said two comparisons (OUTZC, OUTCOMP), in said interval of definite time (MONO1), the enabling upon turning on (FF2, FF1, DRIVER) of the Power switch (POWER).

Description: FIELD OF THE INVENTION The invention relates to DC-DC flyback converters, functioning in a discontinuous mode. BACKGROUND OF THE INVENTION The strive toward compactness and the enacting of new power consumption rules require integrated devices performing functions in an increasingly intelligent fashion. Figure 1 depicts a flyback DC-DC converter in which the majority of the power and control components are integrated in an unique package, monolithic or hybrid. Flyback converters may be classified as: a) SOPS (Self Oscillating Power Supply) converters In these converters, by detecting the demagnetization of the transformer on an auxiliary winding AUS (verification of a complete transfer to the secondary circuit of the energy accumulated while driving the switch connected to the primary winding N1, during a subsequent off phase of the switch evidenced by the fact that the current across the primary winding becomes null so that the successive turning on of the power switch takes place with a null current in the primary winding), it is possible to control the turning on of the power transistor (POWER). In this way, a "discontinuous" functioning is realized different from a continuous functioning mode in which the power switch is turned on with current still flowing in the primary winding, as well as from the discontinuous functioning that is imposed by altering the switching frequency in function of the power absorbed by the load connected to the converter output (secondary circuit of the transformer.) b) Fixed frequency converters These converters are designed to operate in a discontinuous mode under nominal operating conditions. However, under other conditions such as for example during start-up conditions and when recovering from short circuit events, they work in a continuous manner, unless the monitoring of the demagnetization is effected, typically on an auxiliary winding Aus, for disabling the functioning of the oscillator that establishes the fixed switching frequency. One or the other configuration may be preferred depending on the application. In both cases there are control circuits CONTROL that carry out substantially the same functions. The integrated CONTROL circuit has a COMP pin, through which the information on the output voltage may be obtained by employing a photocoupler and to which an external capacitor, CCOMP, of few hundreds of nF is commonly coupled for compensating the output voltage control loop. Moreover, there are circuits that control the switchings of the power transistor employing also a network operating on a pulse by pulse basis that limits the current in the power transistor, circuits that generate reference voltages REFERENCE and histeresis circuits UNDERVOLTAGE. The UNDERVOLTAGE circuits define the start-up and recovery transients of the converter by intervening when the supply voltage VDD of the control circuitry, which typically at steady state is derived from the auxiliary winding AUS of the flyback transformer, is blown or accidentally drops below a certain threshold VDD off . In these events, the undervoltage circuit switches off the whole device and maintains it in such a disabled state until the voltage reaches or exceeds a second threshold VDD on higher than the former threshold, VDD off . At power on, a charging current of the supply capacitor C2 (of the order of few tens of µF) may be provided for a line connected in some way to the Valim node, for example by a resistor of adequate power dissipating characteristic and value. In certain cases such a charging line (resistor) may be integrated and for these reasons it is not shown in Figure 1. In the control circuits of SOPS converters there is also exists a pin, DEM, for synchronizing the turning on of the power transistor (POWER) under demagnetization conditions of the transformer. By contrast, in fixed frequency converters, the turn-on synchronization of the power transistor takes place by means of an oscillator that produces a dedicated clock signal and for this purpose, a pin, OSC, is often reserved for setting by the use of an external capacitor or R-C group the switching frequency. Commonly, this type of control circuits do not contemplate the presence of a DEM pin, unless the use of a network for verifying the demagnetization of the transformer and enabling the turn-on when also this condition is satisfied is contemplated. Verification of this condition is often implemented for preventing a continuous mode of operation, which would require an oversizing of some power components of the converter. Commonly, CLAMPER or SNUBBER circuits are used to limit the maximum voltage value on the power transistor and/or to avoid overlaps of the current and voltage waveforms during switching. Apart from the above mentioned undervoltage block, known converters do not have other protections against short circuit condition of the converter's output. In practice, if the output voltage becomes null because of a short circuit on the OUT terminals, in the secondary winding (and therefore on the diode D1) there will be, during the off phase of the power transistor, a current whose maximum value is given by: Isec cc = ( N1:N2 ) Ip max The voltage mirrored on the auxiliary winding AUS, coincides with the voltage on the secondary (which during a short circuit, will be equal to the voltage drop Vf on the diode D1), multiplied by their turn ratio (N3:N2), that is: V AUS(cc) = (N3:N2) V sec(cc) = (N3:N2) Vf(D1) This voltage is commonly less than the lower threshold VDD off of undervoltage, and in these conditions, the diode D2 during the off phase is nonconductive and therefore, during the successive switching cycles the current is supplied by the capacitor C2 which being no longer charged, discharges itself until dropping to threshold VDD off of undervoltage. If the short-circuit condition of the output persists, the VDD voltage will oscillate between the VDD on and VDD off determining a functioning as illustrated in Figure 2, with an average duty-cycle established by the currents absorbed by the integrated control circuit in these two functioning modes. However, the lower threshold of the undervoltage circuit may never be reached under short-circuit conditions, unless certain circuit arrangements are implemented in the converter scheme. In fact, the presence of parasitic inductances of the transformer cause, some damped oscillations during the turn-off phase of the power transistor, whose maximum peak may be high enough to maintain a charge state of the C2 capacitance above the threshold VDD off of undervoltage, keeping the device permanently turned on, and subjecting the power transistor to continuous and very demanding switching cycles, which in certain situations may lead to provoke the destruction of the device. To prevent this, it is a common practice to add protecting components, external to the integrated circuit. Known approaches, such as described in the European patent applications EP-A-0 211 765 and EP-A-0 638 985, have the following drawbacks. 1) The condition of short circuit is indirectly recognized by a discharging of the supply capacitor, with the consequent turning off of the device upon reaching the lower threshold of undervoltage. The power dissipated in such conditions is clearly tied to the charge and discharge transients of the supply capacitor. 2) There is a need to use external components for implementing a turn-off function according to 1). Indeed, the realization of an effective protection by means of a wholly integrated circuit appears very difficult because in these integrated circuits it is not possible to effect a correct control of the output voltage, and the short circuit condition may be indistinguishable from that of a normal start-up condition with a completely discharged output filter capacitor. PURPOSE AND SUMMARY INVENTION The purpose of this invention is to provided for a wholly integratable circuit that implements a protecting function against the effects of a short circuit at the output of a DC-DC flyback converter. This important objective is achieved, according to the present invention, by exploiting the fact that the mirrored voltage that is induced on the auxiliary winding of the flyback transformer during a short circuit event of the converter's output is exceptionally low. By comparing the voltage existing on the auxiliary winding with the supply voltage of the control device, or with a reference threshold whose value is sufficiently higher than the voltage induced on the auxiliary winding under short circuit conditions, it is possible to discriminate a condition of short circuit from a start-up or recovery condition, also in cooperation with an information obtained upon comparing the voltage on the terminals of the compensating capacitor of the secondary control loop that is commonly connected in parallel to the coupling phototransistor and which also allows discrimination of a condition of short-circuit from a start-up condition with a completely discharged output filtering capacitor. By combining the two information it is possible to reliably discriminate a short circuit event from other possible operating conditions, of the converter and thus permit an effective protection against the risk of damaging the integrated device, should the short circuit condition persists. The invention is defined in the appended claims 1 and 2. BRIEF DESCRIPTION OF THE DRAWINGS The different aspects and advantages of the invention will become even more evident through the following description of an embodiment and by referring to the annexed drawings, in which: Figure 1 is a basic diagram of a generic flyback converter (self-oscillating or fixed frequency); Figure 2 shows the diagrams of the supply voltage of the control circuitry and of the average current flowing in the secondary winding of the flyback transformer under short circuit conditions of the output; Figure 3 shows the diagrams of the voltage on the auxiliary winding of the flyback transformer in case of normal operating condition and in case of short circuit of the output of the converter; Figure 4 is a basic diagram of a flyback converter (optionally usable as a self-oscillating converter or as a fixed frequency converter) incorporating the protecting circuit of the invention; Figures 5, 6 and 7 show the waveforms of significative signals, obtained by simulation. DESCRIPTION OF AN EMBODIMENT OF THE INVENTION The terminal solution of the present invention will be more easily understood after analyzing further the effects of a short circuit on the waveforms of the voltage V AUS on the terminals of the auxiliary winding AUS of the flyback transformer of the converter. As already mentioned, if the converter output is in a short circuit condition, when the power switch in turned off, the voltage induced on the auxiliary winding of the transformer, apart from the initial oscillatory transient, stabilizes to a V AUScc value which is much lower than the voltage induced during the normal functioning of the converter, which is at least nominally higher than the supply voltage of the control circuitry of the integrated device that is typically derived therefrom by using a charging diode D2 and a supply capacitor C2 of large capacitance. Therefore, the invention is applicable to self-oscillating DC-DC flyback converters (SOPS) as well as to converters functioning at a fixed frequency, determined by an oscillator included in the control circuitry provided that the voltage V AUS on the terminals of the auxiliary winding of the transformer be detected. The diagrams of Figure 3 refer to the case of a fixed frequency converter. The method of the invention may be implemented by modifying the architecture of the integrated device as depicted by way of example in the diagram of Figure 4. By monitoring the voltage V AUS voltage on the auxiliary winding AUS of the transformer during a turn-off phase of the power switch, through a first comparator COMP1 whose reference threshold is Vref1 higher than V AUScc , it is possible to discriminate a possible short circuit condition from a "normal" operating condition, even though this does not completely resolve the problem of discriminating the event from a start-up condition with a completely discharged output filter capacitor. In fact, during an initial charging transient of the output capacitance, the comparator would behave as if under an output short circuit condition and any protecting intervent would unduly interrupt the start-up transient, impeding the system from starting up. This inability is effectively overcome by combining the outcome of the comparison of the voltage existing on the auxiliary winding with another information so that this combination may positively discriminate a condition of short circuit from a start-up, even when the output filter capacitance is totally discharged. In a current mode type of control, as in implemented by the basic control circuit of the converter, there is a relationship between the error voltage VCOMP provided by photocoupling the output of the error amplifier of the output voltage ERROR AMP to the CONTROL circuitry through the dedicated pin COMP and the current flowing in the power switch POWER. Therefore, there exists a maximum error voltage value VCOMP (max) error, tied to the maximum current that may flow through the power transistor, that limits the current on a pulse by pulse basis, therefore limiting the maximum power that may be transferred from the primary circuit to the secondary circuit When the integrated device is turned on and the VDD on threshold is reached, the compensating capacitor CCOMP is charged and during this charging transient the first switchings of the POWER switch take place with gradually increasing current levels (soft start-up process). During this charging transient of the compensation capacitor CCOMP, also the output filter capacitor C1 charges at least partially, thus raising the voltage V AUS being induced on the auxiliary winding, by an amount sufficient for the voltage on the COMP pin to reach a level close to its maximum value after the V AUS voltage has already exceeded the Vref1 threshold. Under these conditions, by the use of a second comparator COMP2 comparing the voltage on the compensation capacitor VCOMP with a second reference threshold Vref2 equal or close to the VCOMP max value, it is possible to ensure that the output of this second comparator COMP2 provides a perfectly discriminating information between a start-up condition and a short circuit one, so to implement a wholly integratable protection without requiring additional pins and the use of external components. In the scheme of Figure 4 the components and the functional blocks of the protecting circuit of the invention are identified by a dashed line perimeter, within the integrated converter device. In the illustrated example, integration of the power transistor that drives the primary winding of the flyback transformer is contemplated, the power transistor being integrated by using a so-called Smart Power technology which permits the realization of integrated power devices capable to withstand voltages that may reach or exceed a thousand Volts. However, it is evident that the protecting circuit of the invention may be integrated even using a low voltage fabrication technology for the device containing the control circuitry in case of converters employing externally connected discrete high voltage POWER switches. According to the preferred embodiment shown in Figure 4, the protecting circuit comprises also a T OFF(min) block whose function is to impose a minimum turn-off time and the sensing of a short circuit condition is carried out after such a masking interval, in a way to be sufficiently delayed from the turn-off instant of the power switch when oscillations on the V AUS voltage have decayed, in order to avert spurious comparisons by the two comparators COMP1 and COMP2. The minimum turn-off time or masking interval may be fixed so to safeguard a correct functioning of the converter at its typical switching frequencies. The signal comparisons by the two comparators COMP1 and COMP2 are performed within a definite time interval, precisely determined by the monostable circuit MONO1. Such time interval follows immediately the instant that defines the turn-off time and is sufficiently short to guarantee that the turn-off condition of the power switch be verified under all conditions. The logic combination of the signals existing on the outputs of the two comparators COMP1 and COMP2 performed through the AND gate during the interval of time defined by the monostable circuit MONO1, after the masking interval defined by the T OFF(min) circuit, ensures that only a short circuit condition of the comparator output produce a simultaneous high state of all the three signals so to cause the setting of the flip-flop FF2 and thereby a stable condition of a high logic value of the flip-flop FF2, a condition that keeps the POWE switch turned off by keeping the driving flip-flop FF 1 in a reset state. When the VDD voltage supply drops under of the lowest undervoltage threshold, the flip-flop FF2 is reset allowing for a new start-up transient. If the condition of short circuit persists, the device will be enabled to function only during the charging transient of the compensation capacitor CCOMP. However, such a time interval will be far shorter than the charging transient of the supply capacitor C2 (at least an order of magnitude less) during which, by contrast, the known converters remain active, thus providing for a remarkable reduction of the average power dissipation. Moreover, the wholly integratable circuit of the invention guarantees an automatic start-up of the converter once the condition of short circuit ceases to exist, if compared to protecting devices based on the use of latches whose reset may be made only by disconnecting the converter from the mains. The protecting circuit of the invention has been simulated and diagrams of operation are shown in Figures 5 and 6. The diagrams refer to the case of normal functioning of the converter loaded with a 2 ohm resistor for an output power of about 100 watt, and illustrate a start-up phase up to reaching a steady state of operation. Thereafter a short circuit condition is imposed (at the instant t=6ms in the diagrams of Figures 5 and 6) to verify the effectiveness of the intervention of the protecting circuit of the invention. Figure 7 highlights the waveforms of the supply voltage VDD and of the output of the FF2 flip-flop of the protecting circuit in a persisting short circuit condition of the converter output. The protecting circuit of the invention may be easily integrated in different architectures of converter's control circuits. The invention is useful and applicable to an ample range of flyback converters, as mentioned above. The protection of the integrated device from a short circuit does not require the use of any additional external component or of any pin in the case of SOPS or fixed frequency converters which already implement a sensing of the voltage V AUS through a dedicated pin DEM in SOPS or by engaging a pin in fixed frequency converters and in which there is not a verification of the demagnetization of the flyback transformer for preventing a continuous mode of operation. The power consumption of the converter under short circuit conditions is remarkably reduced by the protection circuit of the invention. This helps in complying with even more stringent specifications toward a maximization of power consumption that may be enacted in future.

Claims: A method of protecting a DC-DC flyback converter from an output short circuit, the DC-DC flyback converter self-oscillating either at a variable frequency or functioning at a fixed frequency in a discontinuous manner, including a transformer for storing and transferring energy to a load, having an auxiliary winding (Aus) for synchronizing the turning on of the power switch (POWER) that drives the winding (N1) of the transformer under a condition of null current in the primary winding when self-oscillating at a variable frequency, wherein the voltage induced back from the current flowing in a secondary winding (N2) of the transformer on said auxiliary winding (Aus) is rectified and filtered (D2, C2) to power, during a steady state of operation, the control circuitry (CONTROL) of the converter, the turning on of the power switch (POWER) being driven during a start-up or recovery phase by a primary control loop, when the supply voltage (VDD) of the control circuit reaches or is over a preestablished enabling threshold of the control circuit, a secondary control loop comprising a photocoupler of the output error voltage (ERROR AMP) to an input (COMP) of the control circuitry (CONTROL) to which it is connected a compensation capacitor (CCOMP), characterized in that it comprises the steps of discriminating an output short circuit condition from a start-up or recovery condition by comparing (COMP1) the voltage (V AUS ) present on said auxiliary winding (AUS) with a preestablished threshold (Vref1 ) higher than the voltage (V AUS ) that is induced on the auxiliary winding (AUS) under a short circuit condition of the secondary winding (N2) of the flyback transformer and by comparing the voltage present on said compensation capacitor (CCOMP) with a second threshold (Vref2) of a value substantially equal to the value of maximum charge of said compensation capacitor (CCOMP), within a time interval sufficiently delayed from the turn-off instant of the power switch (POWER); conditioning, by means of a (SET CC) signal resulting from the logic combination (AND) of the signal originating from said two comparisons (OUTZC, OUTCOMP), in said interval of definite time (MONO1), the enabling upon turning on (FF2, FF1, DRIVER) of the Power switch (POWER). A DC-DC flyback converter functioning in a self-oscillating mode of a variable frequency or at a fixed frequency in a discontinuous manner, having a flyback transformer for storing and transferring energy to a load, said transformer comprising an auxiliary winding (AUS) for synchronizing the turning on of a power switch (POWER) that drives the primary winding (N1) of the transformer under a condition of null current in the primary winding when operating with a self-oscillating mode at a variable frequency, means for charging a supply capacitor (C2) at the voltage that is induced on said auxiliary winding by current flowing in a secondary winding N2 of the transformer of a control circuitry of the converter, a primary control loop turning on the power switch (POWER) when the supply voltage (VDD) of the control circuit reaches or exceeds a preestablished threshold, a secondary control loop comprising a photocoupler of an output error voltage (ERROR AMP) to an input (COMP) of the CONTROL circuitry, a compensation capacitor (CCOMP) connected between said input COMP and ground, a driving flip-flop (FF1) set and reset by said control circuitry and a driver stage (DRIVER) of said power switch, and means for recognizing a short circuit condition of the converter output and for protecting the converter circuit from the effects of such condition, characterized in that said means are wholly co-integrated with said control circuitry, and consist of: a first comparator (COMP1) comparing the voltage (V AUS ) present on said auxiliary winding (AUS) with a first threshold (Vref1) whose value is greater than the voltage that is induced on said auxiliary winding during a short circuit condition of the secondary winding (N2) of the flyback transformer; a second comparator (COMP2) comparing the voltage present on said compensation capacitor (CCOMP) with a second threshold (Vref2) whose value is substantially equal to a maximum charging voltage of said compensation capacitor (CCOMP); a first monostable circuit (T OFF(min) ) functionally connected in cascade to the output node of a turn off command of the power switch of said control circuitry establishing a minimum duration of the off phase of the power switch driving a first reset input of a driving flip-flop (FF1); a second monostable circuit (MONO1) functionally connected circuit in cascade to said first monostable circuit (TOFF (min) ) and driving an input of a logic gate (AND), the other two inputs of which are respectively coupled to the outputs of said first (COMP1) and second comparator (COMP2), establishing a time interval wherein a coincidence of the conditions verified by said two comparators is asserted, immediately following the masking interval of said minimum duration of an off phase of the power switch, determined by said first monostable circuit T OFF(min) ; a second flip-flop (FF2) having a set input coupled to the output of said logic gate (AND), a reset input driven by the signal produced by said primary control loop and an output coupled to a second reset input of said driving flip-flop (FF1).

Inventors: SPAMPINATO SERGIO TOMMASO, TAGLIAVIA DONATO, SPAMPINATO, SERGIO TOMMASO, TAGLIAVIA, DONATO
Applicants: ST MICROELECTRONICS SRL, STMICROELECTRONICS S.R.L.
Application year: 1998
Main classification: H02M3
IPC codes: H02M1, H02M3