Automatic frequency control method and circuit

Abstract: During operation of a receiver, only when frame synchronization is established, the set value that the frequency control circuit determines for the VCO (6) is periodically stored into a non-volatile memory (11) together with current ambient temperature information of the VCO (6). When information that power supply has been turned on or that a changing over of the reception channel has occurred is received from an apparatus control processor (13), one of the stored values of the non-volatile memory (11) is read back into the frequency control circuit (5) in response to the current ambient temperature of the VCO (6) by a control circuit (10) and switches (7, 8), and is used as the initial set value for the VCO (6). This decreases the time required for convergence of AFC and improves the synchronization acquisition characteristic of the receiver.

Description: The present invention relates to an automatic frequency control (AFC) circuit for a receiver, and more particularly to a controlling method and circuit for the voltage controlled oscillator within a receiver which utilizes a local oscillator of its quasi-synchronous detection circuit to generate the reference frequency for AFC frequency control. Conventionally, in order to realize automatic frequency control (AFC) of a radio receiver, a control voltage is determined based on frequency error information obtained from a carrier regeneration circuit or some other circuit of the demodulator, and the control voltage is used to control a reference oscillator (typically a voltage controlled oscillator (VCO) or similar circuit) of a quasi-synchronous detector. FIG. 4 shows an exemplary construction of a conventional AFC circuit. Referring to FIG. 4, the AFC circuit shown is formed as an AFC control loop which includes a quasi-synchronous detection circuit 21, a low-pass filter 22, a demodulation circuit 23, a frequency control circuit 25 and a voltage controlled oscillator (VCO) 26. In operation, the voltage controlled oscillator (VCO) 26 normally oscillates with a reference frequency roughly synchronized with the received signal inputted from an antenna amplifier not shown to the quasi-synchronous detection circuit 21, and the oscillation output of the voltage controlled oscillator 26 is inputted to the quasi-synchronous detection circuit 21. The quasi-synchronous detection circuit 21 performs quasi-synchronous detection using the output of the voltage controlled oscillator 26 as a reference frequency. The low-pass filter 22 removes unnecessary frequency components and noise components from the received signal outputted from the quasi-synchronous detection circuit 21. In the demodulation circuit 23, a multiplier 231 synchronously detects the output of the low-pass filter 22 using a regenerated carrier outputted from a carrier regeneration circuit 232 to regenerate the received data. The carrier regeneration circuit 232 regenerates the received carrier from the synchronous detection output obtained from the multiplier 231 and outputs remaining frequency error information a of the received signal at the input of the demodulation circuit 23. The frequency control circuit 25 controls the control voltage for the VCO 26 based on the remaining frequency error information a so that the frequency error may be reduced. Generally, an oscillator to be used as the frequency reference to a quasi-synchronous detector such as, for example, the voltage controlled oscillator (VCO) 26 in the AFC circuit of FIG. 4 is required to have a high frequency accuracy and a high frequency stability, because the output thereof is multiplied up to a frequency of the radio frequency band. This becomes critical because any frequency error of the oscillator which arises from an initial deviation, aging, a temperature characteristic or some other factor is amplified by the multiplication. As a result, as viewed from the demodulation circuit in the following stage, any frequency error originating from the VCO is added to the frequency error of the signal being received. This makes the performance requirements upon the demodulator more severe (in terms of frequency synchronization acquisition range). In particular, if the VCO is reset for some reason, such as the turning on of the power supply to the apparatus or the changing over of a channel, then this gives rise to a problem of how to determine the initial set value for the VCO. In this instance, if the initial set value for the VCO after resetting is not close to the final converged value to be determined by AFC, then the frequency error arising from the frequency deviation of the VCO is superposed on the signal after detection, resulting in a degradation of the initial synchronization acquisition characteristic of the received signal. Meanwhile, in a system of the type wherein the bandwidth of each channel and the channel frequency interval are narrow with respect to a radio frequency (such as a low data rate satellite communication system), there is the possibility that incorrect synchronization to an adjacent channel may occur. Further, where the deviation of the VCO is excessively large, there is a problem in that the signal band of the signal after detection partially falls out of the pass band of the low pass filter 22, resulting in deterioration of the signal to noise ratio and hence in deterioration of the reception synchronization acquisition characteristic. Where digital demodulation is employed, synchronization acquisition can be improved by adding, within the synchronization acquisition process of the received signal, a step of estimating the frequency error between the frequencies of the VCO and the received signal using Fourier transform calculation. This countermeasure, however, is disadvantageous in that the required time for synchronization acquisition is elongated by a time corresponding to the calculation time required for the estimation. From the reasons described above, the conventional design requires the use of a high precision, highly stable (and consequently, expensive) oscillator which has low frequency fluctuation due to initial deviation, aging, or ambient temperature. It is the objective of the present invention to provide an automatic frequency control method and circuit, applicable for use with a receiver wherein the local oscillator of a quasi-synchronous dectection circuit is used to produce the reference frequency for AFC control, which would stabilize the frequency output of the reference oscillator of the quasi-synchronous detection circuit and thus suppress the influence of frequency deviations of the reference oscillator upon the reception characteristic of the receiver, leading to improvement of the signal synchronization acquisition characteristic and reduction of the cost of the receiver by enabling the use of lesser quality VCOs. The objective described above is achieved with the features of the claims. In a condition wherein frame synchronization has been established as a result of completion of frequency synchronization through the functioning of the AFC, the set value which is sent from the frequency control circuit to the VCO will have a value which compensates for all frequency error components which arise from various deviations of the VCO. During operation of the receiver, and only while frame synchronization is established, the set value for the VCO is periodically stored into the storage means together with current ambient temperature information of the VCO. This enables the AFC circuit to benefit from a "learning effect", whereby the AFC circuit builds up a database of optimal VCO settings for any given temperature which is unique to the VCO used in the receiver, and which compensates for any frequency error components arising from various deviations of that VCO. When information that power supply has been turned on or that a changing over of the reception channel has occurred is received from the apparatus control processor, then one of the values stored in the storage means which corresponds to the current ambient temperature is recalled from the storage means and is used as an initial set value for the VCO. Because the AFC commences its frequency acquisition process from an initial value which is much closer to its final convergence value, the time required for convergence of AFC is reduced. An advantage of this method is that even if a reference oscillator which is somewhat inferior in terms of the frequency accuracy and frequency stability is employed in the receiver, the learning function of the AFC circuit will compensate for frequency errors arising from initial deviation, aging or temperature characteristics of the reference oscillator, thus enabling performance comparable to that obtained employing a higher-quality reference oscillator. Thus, this method will enable the design of lower-cost receivers. Further, since the apparent frequency error of the received signal upon initial synchronization acquisition is reduced, the synchronization acquisition characteristic of the receiver is stabilized. Consequently, since a frequency estimation routine or the like need not be added, reduction of the AFC acquisition and synchronization acquisition time can be achieved. The above and other objectives, features and advantages of the present invention will become apparent from the following description and the appended claims, taken in conjunction with the accompanying drawings in which like parts or elements are denoted by like reference symbols. FIG. 1 is a block diagram of an automatic frequency control circuit to which the present invention is applied; FIGS. 2(a), 2(b) and 2(c) are tables illustrating switch control logic employed in the automatic frequency control circuit of FIG. 1; FIG. 3 is a time chart illustrating control operations for switches and a VCO of the automatic frequency control circuit of FIG. 1; and FIG. 4 is a block diagram showing a conventional automatic frequency control circuit. Referring first to FIG. 1, there is shown in block diagram form a receiver to which an automatic frequency control circuit according to the present invention is applied. The receiver shown includes a quasi-synchronous detection circuit 1, a low-pass filter (LPF) 2, a demodulation circuit 3, a multiplier 31, a carrier regeneration circuit 32, a frame synchronization circuit 4, a frequency control circuit 5, a VCO 6, switches 7, 8 and 9, a control circuit 10, a non-volatile memory 11, a temperature sensor 12, and an apparatus control processor 13. The switches 7, 8 and 9, control circuit 10, non-volatile memory 11 and temperature sensor 12 compose a reference oscillator compensation circuit. In operation, received data is regenerated and information a of the remaining frequency error component is detected by an identical process as that of the conventional AFC circuit described hereinabove with reference to FIG. 4. The frame synchronization circuit 4 establishes received frame synchronization from the received data and outputs current frame synchronization information. The frequency control circuit 5 calculates a control value for the VCO 6 from the remaining frequency error information a in a similar manner as in the conventional AFC circuit of FIG. 4 and outputs the calculated control value also to the non-volatile memory 11 through the switch 9. Further, the frequency control circuit 5 reads in a control value from the non-volatile memory 11 through the switch 7 and sets the control value as a frequency control circuit output value to the VCO 6. The non-volatile memory 11 includes n memory cells M1, M2, ..., Mn and can store n VCO set values corresponding to n temperature conditions or values, or more accurately, temperature ranges as seen in FIG. 2(b). The control circuit 10 controls the switches 7, 8 and 9 in response to information received from the temperature sensor 12, apparatus control processor 13 and frame synchronization circuit 4. An example of the control logic for such control is illustrated in FIGS. 2(a) to 2(c). In particular, the switch 7 allows the VCO control value stored in the memory to be read into the frequency control circuit 5 only once when the power supply to the receiver is turned on and the VCO 6 is reset. The switch 8 selects one of the memory cells of the non-volatile memory 11 into or from which data is to be stored or recalled in response to the temperature of the VCO 6. The switch 9 is closed to allow updating of the stored values of the memory cells of the non-volatile memory 11 only while frame synchronization is established. FIG. 3 shows an example of a time chart which illustrates controlling processes of the switches, storage of the memory cells and initialization of the VCO in response to the frame synchronization condition and the temperature. By the operations of the components of the automatic frequency control circuit described above, the VCO control value while frame synchronization is established (that is, while frequency synchronization acquisition is achieved sufficiently) is periodically stored into the non-volatile memory 11 together with information regarding the current VCO ambient temperature. Consequently, while the ambient temperature of the VCO varies, for example, as seen in FIG. 3, during operation of the receiver, different VCO control values are successively stored into the non-volatile memory 11 in a corresponding relationship to different ambient temperatures (temperature ranges). Then, when power supply is turned on next time after some interval of rest time (see FIG. 3), one of the set values stored in the non-volatile memory 11 which corresponds to the ambient temperature of the VCO then is set to the VCO and used as an initial set value for frequency control. Consequently, occurrence of the phenomenon in which a frequency deviation of the VCO which originates in the temperature characteristic and so forth adds a frequency error to the quasi-synchronous detection signal can be prevented. In addition, by nature the fact that the data within the non-volatile memory 11 is updated whenever the receiver is in use, this method will also compensate for frequency deviation of the VCO which originates from aging.

Claims: An automatic frequency control method, characterized in that it comprises the steps of: quasi-synchronously detecting the received signal using the oscillation output of a voltage controlled oscillator as a reference signal; regenerating the received carrier from the quasi-synchronous detection output to synchronously detect the quasi-synchronous detection output to regenerate the received data; feeding back remaining frequency error information of the quasi-synchronously detected signal to a frequency control circuit for controlling said voltage controlled oscillator; storing frequency control values successively outputted from said frequency control circuit in a corresponding relationship to ambient temperatures of said voltage controlled oscillator at the time; and reading out, upon turning on of the power supply or upon changing over of a channel, one of the frequency control values corresponding to the current ambient temperature of said voltage controlled oscillator and supplying the read out frequency control value as the initial set value to said voltage controlled oscillator. A method as set forth in claim 1, characterized in that the stored frequency control values are updated while frame synchronization with the reception channel is established. An automatic frequency control circuit for a receiver which includes a quasi-synchronous detection circuit (1) for quasi-synchronously detecting the received signal using a voltage controlled oscillator (6) as a reference oscillator, a demodulation circuit (3) for regenerating the received carrier from an output of said quasi-synchronous detection circuit (1) to synchronously detect the quasi-synchronous detection output to regenerate received data and outputting remaining frequency error information of the quasi-synchronously detected signal, and a frequency control circuit (5) for controlling said voltage controlled oscillator (6) based on the remaining frequency error information so that the frequency error may be reduced, characterized in that it comprises: temperature measurement means (12) for measuring an ambient temperature of said voltage controlled oscillator (6); storage means (11) for storing frequency control values successively outputted from said frequency control circuit (5) in a corresponding relationship to measurement temperatures of said temperature measurement means (12); means (7, 8, 9) operable upon turning on of the power supply to said receiver or upon changing over of a reception channel for reading out, in response to a current ambient temperature of said voltage controlled oscillator (6), that one of the frequency control values which corresponds to the ambient temperature from said storage means (11) and supplying the read out frequency control value as an initial set value to said voltage controlled oscillator (6); a frame synchronization circuit (4) for establishing frame synchronization based on the regenerated data output from said demodulation circuit (3); and controlling means (10) for controlling updating of the stored values of said storage means (11) in response to the frame synchronization condition. A circuit as set forth in claim 3 further comprising: an apparatus control processor (13) for providing reset information for said voltage controlled oscillator (6) upon turning on of power supply to said receiver or upon changing over of the reception channel; first selection means (7) for controlling the reading out of a frequency control value from said storage means (11); second selection means (9) for controlling the updating of the stored values of said storage means (11) in response to a frame synchronization condition; third selection means (8) for selecting an address of said storage means (11) into or from which a frequency control value is to be stored or read out in response to the current ambient temperature of said voltage controlled oscillator (6); and a control circuit (10) for controlling said first, second and third selection means based on the information from said apparatus control processor (13), temperature measurement means (12) and frame synchronization circuit (4).

Inventors: CHIBA KENICHIRO, CHIBA, KENICHIRO
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1998
Main classification: H03J7
IPC codes: H03L1, H04B1, H03J7