Completely integrated switch-on control-loop of a high voltage power transistor of a quasi resonant flyback converter

Abstract: A flyback DC-DC converter, autooscillating in a quasi resonant manner (QRC) during steady state operation, employing a flyback transformer for storing and transferring energy to a load having an auxiliary winding (AUS) whose voltage is compared by a comparator (COMP1) with a threshold (VREF1) to detect its crossing and as a consequence switch on through a control flip-flop (FF) a power transistor (POWER) driving the primary winding of said transformer for a new phase of conduction and accumulation of energy, whose duration is established by a secondary control loop of the output voltage (ERROR AMP, CONTROL) producing the switching off of the power transistor for a successive energy transfer phase toward the load of the energy stored in the transformer during the preceding conduction phase, has a wholly integrated control circuit that comprises a second comparator (HVCOMP) of the voltage existing on the current terminal of said power transistor (POWER) connected to the primary winding of the transformer in respect to the ground potential of the circuit; a logic gate (OR) having a first input connected to the output of said second comparator (HVCOMP) and an output coupled to the set terminal of said control flip-flop (FF); a delay network (ON DELAY) coupled in cascade to the output of said first comparator (COMP1) and having an output coupled to a second input of said logic gate (OR), so that under steady state functioning conditions of the converter, the setting of the flip-flop (FF) is done by said second comparator (HVCOMP) rather than by said first comparator (COMP1).

Description: FIELD OF APPLICATION OF INVENTION The present invention relates to flyback DC-DC converters, functioning in a quasi resonant or "zero voltage" switch-on mode that is switching on when the voltage on the current terminals of the switching element is in the vicinity of zero volts. BACKGROUND The quasi resonant functioning mode of flyback DC-DC converters at steady state conditions is particularly efficient because, compared to traditional flyback applications (hard switching mode), allows for a reduction of power dissipation during the switching phases as well as and a reduction of electromagnetic noise. Fig. 1 shows the basic scheme of a flyback converter for quasi resonant applications. The switching element Q1 is indicated as being a bipolar junction transistor though it may be of a different type. The D1 and C1 components allow for a quasi resonant functioning, also called QRC mode. In traditional applications, such as in hard-switching applications, their function is performed by dedicated snubber or clamper circuits. The type of control of the switchings of the (Q1) power switch is similar to that of selfoscillating circuits, commonly named SOPS (Self Oscillating Power Supply), because the switch-on is commanded always in the vicinity of the instant at which the current on the secondary winding of the flyback transformer becomes null. Hence, the converter always functions in a discontinuous manner, that is, with the current becoming null at every cycle, though remaining at the border between continuous and discontinuous functioning conditions. During the ON phase of Q1, the D2 diode is OFF and there is an accumulation of energy in the primary winding of the transformer, which is transferred to the secondary during the OFF phase of Q1. In this phase the voltage Vc on the Q1 terminals is Vc = Valim + (N1:N2)V2 (being V2 ≈ Vout) When the energy is completely transferred (I F(D2) =0), the voltage Vc oscillates at the resonant frequency given by ƒ r ≅ 1 2π L p C 1 By suitably sizing the electrical parameters it is possible to produce an oscillation capable of allowing the diode D1 to conduct for a short period of time in order to realize a control transistor of the Q1 power during this phase, thus eliminating of the switch-on losses. Therefore, the flyback converter belongs to the class of the so-called "zero-voltage quasi resonant" converters. US-A-5,796,597 discloses a switch-mode power supply with over-current protection employing a DC-DC flyback converter operating in a tuned switch mode under a current-mode control, on a current pulse-by-current pulse control basis. The data sheet and application notes for the devices of the STR-F6600 Series SMPS PRIMARY IC produced by the Japanese company Sanken Electric Co., Ltd., discloses the features of a family of integrated DC-DC flyback converter circuits functioning in a quasi resonant mode. These converters are frequently used in TV and VCR power supplies, wherein the input voltage Valim is obtained by rectifying and filtering the mains voltage. Such a preference is due also to the fact that the architecture of these converters allows for multiple outputs by simply increasing the number of secondary windings of the flyback transformer. The auxiliary winding AUS is used to self power the control circuit during steady state functioning. For such applications, during the switch-off phase, the power transistor Q1 that implement the switch must withstand voltages that may reach or even exceed a thousand volts. In case of a completely monolithic realization (control circuits and power device realized on the same chip), a fabrication technology usually referred as Smart Power, suitable for high voltage applications, must be used. Traditional QRC flyback converters are realized with discrete components, or in the form of an integrated device containing a low voltage control circuit, a high voltage power MOS transistor and eventually some of the passive components, after realized in so-called SMD technology. As depicted by way of an example in Fig. 3, the switch-on under a quasi resonant condition is obtained through an external TDELAY network connected to the AUS auxiliary winding and dimensioned so to synchronize the condition Vc ≈ 0 with the switching of a comparator of the control circuit contained in the CONTROL-IC block, within the time interval indicated as TDELAY in the diagrams of Fig. 2. Thence, the integrated circuit of the block CONTROL IC controls an self-oscillating or SOPS functioning mode of the converter. In fact, by replacing the delay block TDELAY with a resistor would produce in a classic hard-switching flyback application. In traditional circuits, the QRC function is thus obtained through external networks, which especially in TV applications, where there are large variations of either the supply voltage and the load, necessitate a substantial number of components, as illustrated in the detail of the block TDELAY of Fig. 3, however, other circuit topologies of the delay network may be used, depending on the specific characteristics of the application. Therefore, known circuits have the drawback of requiring the realization of a TDELAY network with discrete elements externally to the integrated circuit. Moreover, the switching under zero voltage conditions is tied to the precision of the TDELAY network (that is, to the spread of the actual values of the network components) as well as to the electrical parameters that establish the resonance frequency (the spread of the values of Lp and Cr). OBJECT AND SUMMARY OF THE INVENTION The scope of the present invention is to provide a QRC quasi resonant selfoscillating flyback DC-DC converter, wherein the synchronization of the switch-on of the power transistor, when the voltage thereon becomes null, is realized with a wholly integrated circuit. According to the present invention, this objective is obtained by monitoring, rather than the voltage existing on one auxiliary winding of the flyback transformer, as normally done in known circuits, the voltage existing on the current terminal of the power transistor connected to the primary winding of the flyback transformer and by controlling the "set" terminal of a driving flip-flop of the power transistor through a OR logic gate, to an input of which is coupled the output of the comparator of the voltage present on the current node of the power transistor, while the other input of which is coupled, through an integrated TDELAY network, to the output of the comparator of the voltage present on the auxiliary winding in respect to a reference voltage generated by a control circuit of the converter. The comparator of the voltage on the current terminal of the power transistor in respect to the ground potential of the circuit is integrated with the same high voltage fabrication technology, that is used to realize high voltage power transistors, that is the components of the input stage of the comparator, which are subject to voltages that may reach and exceed thousands of volts. The invention is more precisely defined in the appended claim 1. BRIEF DESCRIPTION OF THE DRAWINGS The various aspects and advantages of the invention will become even clearer through the following description of an embodiment and by referring to the attached drawings, wherein: Figure 1 is a basic scheme of a quasi resonant flyback converter; Figure 2 shows the waveforms of the current and voltage relative to the power transistor; Figure 3 shows a complete basic scheme of a typical QRC DC-DC flyback converter; Figure 4 shows a complete basic scheme of a QRC flyback DC-DC converter, made according to the present invention; Figure 5 shows the waveforms of the current through the power transistor and the voltage on the transistor current terminals for the start-up phase and steady state. Figure 6 reports a number of enlarged waveforms of significant signals. DESCRIPTION OF AN EMBODIMENT OF THE INVENTION Fig. 4 shows the basic scheme of an embodiment of a quasi resonant self-oscillating flyback converter of the invention. All the components included within the rectangular perimeter are integrated. The integrated circuit is performed at steady state through the V DD pin by charging a supply capacitor C of great capacitance through a diode D, whose anode, according to a common practice, is coupled to the voltage induced on the AUS auxiliary winding of the transformer. Even though this is not expressly indicated in Fig. 4, there will be means internal or external to the integrated circuit that ensure the charging of the C capacitance during the power-on phase. The secondary regulating loop of the output voltage commonly uses, an error amplifier ERROR AMP whose output is coupled, by way of the photo-diode and the photo-transistor, to the relative pin COMP of the integrated circuit to which is connected a compensation capacitor CCOMP of the secondary regulating loop of the output voltage. A primary regulating loop, whose function is explained in the ensuing description, is realized through the comparator COMP1 which compares the voltage of the auxiliary winding AUS with a pre-established threshold Vrefl, fixed by the control circuitry, represented as a whole by the CONTROL block of the diagram of Fig. 4. The secondary control loop of the output voltage switches off the switch POWER by driving the reset of the command flip-flop FF according to a traditional control scheme. According to a fundamental aspect of the invention, the synchronization of the switch-on of the POWER switch with the zero crossing instant of the HVC voltage on the current terminal of the power transistor POWER connected to the primary winding of the flyback transformer is effected by controlling the set command of the flip-flop FF through an OR logic gate, a first input of which is coupled to the output of a high voltage comparator HVCOMP of the voltage present existing on the current terminal of the POWER in respect to the ground potential of the circuit. Such a voltage coincides with the potential of the substrate of the integrated circuit. The output of the first comparator COMP1 is coupled to the second input of the OR logic gate, through a delay network ON DELAY functionally connected in cascade to the output of the COMP1 comparator. From Fig. 4 it may be easily verified that for a substrate voltage V sub =V HVC ≤0V, the output voltage of the high voltage comparator V OUT HVCOMP switches from a low logic state to a high logic state, provoking the setting of the flip-flop FF and thereby the switching on of the power transistor POWER. This realizes the synchronization of the switching on during the quasi resonant steady state functioning of the converter, without external components. In any case, the quasi resonance condition only exists during steady state operation but not during the start-up and recovery phases. During these phases, the output voltage is reduced and may be zero at the power on instant. Therefore, the voltage induced on the auxiliary winding is insufficiently ample to allow for oscillations of sufficient amplitude. Under such conditions, the control circuit must guarantee the switching on of the switch POWER and this function is performed by the comparator COMP1 through the Oo DELAY block and the OR logic gate. The ON DELAY block is designed to ensure that during the steady state selfoscillating functioning, the set of the command flip-flop FF be caused by the switching of the high voltage comparator HVCOMP rather than by the switching of the comparator COMP1. This ensures a POWER switching on of the power transistor POWER in a quasi resonant condition. This delay may also be fixed when designing the circuit, similarly to what was done for the delay block Tdelay of the traditional scheme of Fig. 3, in order to switch on the power switch at zero voltage conditions on its terminals. However, it is evident that without a second high voltage comparator HVCOMP a perfect synchronization of the switching cannot be guaranteed, and the circuit would be subject to the effects of the deviations from the nominal design values of the different components due to the fabricating process. Thus, the high voltage comparator HVCOMP ensures the correct functioning of the zero voltage quasi resonant converter of the invention, regardless of process spreads of the Lp and Cr values which fix the converter's resonance frequency. The circuit of the invention was computer simulated and Figures 5 and 6 report the main waveforms relative to the simulated functioning of the circuit of Fig. 4 with a resistive load coupled to the circuit output OUT. Upon observing the current and voltage waveforms on the power transistors POWER shown in Fig. 5, relative to a start-up phase and to a successive steady state condition, appear evident, initially, the hard-switching condition (current peaks at the switch-on due to the discharge of the capacitor Cr) and the successive passage to quasi resonant switchings (elimination of the peaks and thereby of the switching losses). Fig. 6 shows the waveforms of the preceding Fig. 5 in greater detail, together with the control voltage of the power transistor switchings and of the output voltages of the high voltage comparator HVCOMP and of the block ON DELAY, respectively, in correspondence of the passage from the hard-switching mode and the QRC mode.

Claims: A flyback DC-DC converter, self-oscillating in a quasi resonant manner (QRC) during steady state operation, employing a flyback transformer for storing and transferring energy to a load having an auxiliary winding (AUX) whose voltage is compared by a comparator (COMP1) with a threshold (VREF1) to detect its crossing and as a consequence switch on through a control flip-flop (FF) a power transistor (POWER) driving the primary winding of said transformer for a new phase of conduction and accumulation of energy, whose duration is established by a secondary control loop of the output voltage (ERROR AMP, CONTROL) producing the switching off of the power transistor for a successive energy transfer phase toward the load of the energy stored in the transformer during the preceding conduction phase, characterized in that the switchings control circuit is wholly integrated and comprises a second comparator (HVCOMP) of the voltage existing on the current terminal of said power transistor (POWER) connected to the primary winding of the transformer in respect to the ground potential of the circuit; a logic gate (OR) having a first input connected to the output of said second comparator (HVCOMP) and an output coupled to the set terminal of said control flip-flop (FF); a delay network (ON DELAY) coupled in cascade to the output of said first comparator (COMP1) and having an output coupled to a second input of said logic gate (OR), ensuring, under steady state functioning conditions of the converter, the setting of said flip-flop (FF) by said second comparator (HVCOMP) rather than by said first comparator (COMP1). The converter as defined in claim 1, characterized in that said second comparator (HVCOMP) is realized with components integrated with high voltage fabrication process.

Inventors: SPAMPINATO SERGIO TOMMASO, TAGLIAVIA DONATO, TORRES ANTONINO, SPAMPINATO, SERGIO TOMMASO, TAGLIAVIA, DONATO, TORRES, ANTONINO
Applicants: ST MICROELECTRONICS SRL, STMICROELECTRONICS S.R.L.
Application year: 1998
Main classification: H02M3
IPC codes: H02M3