Amplifier with programmable gain and input linearity usable in high-frequency lines

Abstract: An amplifier with programmable gain and input linearity, comprising an input stage (10), which is suitable to receive a voltage signal (V + , V - ) and perform current conversion thereof with compression, and an output stage (30), which is connected to the input stage (10) and is suitable to decompress the signal in output from the input stage, producing gain amplification thereof; the particularity of the amplifier is the fact that it further comprises at least one current amplifier stage (20) which is interposed between the input stage (10) and the output stage (30) and comprises at least one bipolar transistor (21, 22) which is series-connected to a load diode (23, 24) and to a current source (2I 2 ); programmable means (I 2 , I 2 *) for reducing the transconductance of the load diode (23, 24) being provided in the at least one amplifier stage (20) to determine a programmable amplification factor for the gain of the amplifier.

Description: The present invention relates to an amplifier with programmable gain and input linearity usable in high-frequency lines. Signal processing, for example for DVD (digital video disk), conventionally requires amplifiers which can be programmed with a wide gain range and high performance in terms of frequency. A data read channel is an example of a case in which signal processing requires a gain-programmable amplifier. Figure 1 accordingly illustrates four signals A, B, C and D which have different amplitudes and are voltage-added in a node 1 and then amplified in gain means 2 which set the gain, so as to obtain a sum signal which is sent to equalizer means 3 and finally to a buffer 4. The intended result is a dB-linear gain variation with a linear variation of the current. A gain setting circuit of the prior art is shown in Figure 2, in which a differential input stage, designated by the reference numeral 10, is connected to a differential output stage, designated by the reference numeral 11, and in which the gain A v is determined by a resistance ratio multiplied by a current ratio. In practice, the resistance ratio is determined by the ratio between the resistances of the output stage with respect to those of the input stage, while the current ratio is the ratio between the current of the output stage and the current of the input stage. Accordingly, the gain A v is determined by the following relation: A V = R L R E · I 2 I 1 The above-described circuit solution is effective as to gain programming, since said gain can be changed not only by varying the resistive ratio (which is difficult to implement and in any case entails large area occupation) but also by mainly varying the current ratio, which can be achieved easily with a modest utilization of the physical area of the device. Although the circuit of Figure 2 is efficient as to gain programmability, it is affected by drawbacks due to the high noise that it has in output. The noise is in fact amplified by the current ratio between the output stage and the input stage and this entails a situation which is unacceptable whenever noise is an important negative factor. EP-A-0 369 469 discloses a variable gain amplifier having a wider range wherein a gain can be controlled or varied. Patent Abstracts of Japan vol. 095, no. 008, 29 September 1995 & JP 07 135432 A, 23 May 1995 disclose a variable gain amplifier. The aim of the present invention is to provide an amplifier with programmable gain and input linearity usable in high-frequency lines and which allows to increase the gain without altering input linearity and without increasing current consumption excessively. Within this aim, an object of the present invention is to provide an amplifier with programmable gain and input linearity, usable in high-frequency lines, in which the gain of the amplifier is closely correlated to current variation. Another object of the present invention is to provide an amplifier with programmable gain and input linearity, usable in high-frequency lines, having high gain and high gain precision. Another object of the present invention is to provide an amplifier with programmable gain and input linearity, usable in high-frequency lines, which is highly reliable, relatively easy to implement and at competitive costs. This aim, these objects and others which will become apparent hereinafter are achieved by an amplifier with programmable gain and input linearity, as defined in appended claim 1. Further characteristics and advantages of the invention will become apparent from the description of preferred but not exclusive embodiments of the programmable amplifier according to the invention, illustrated only by way of non-limitative example in the accompanying drawings, wherein: Figure 1 is a conceptual diagram of a data read channel; Figure 2 is a circuit diagram of a programmable amplifier implemented according to the prior art; Figure 3 is a circuit diagram of a gain-programmable amplifier according to the present invention; Figure 4 is a circuit diagram of a second embodiment of a gain-programmable amplifier according to the present invention; and Figure 5 is a circuit diagram of another embodiment of the programmable amplifier according to the present invention. The programmable amplifier according to the present invention is therefore described in detail with reference to Figures 3 to 5. In particular, with reference to Figure 3, the circuit according to the invention comprises a first differential input stage 10 (similar to the differential input stage shown in Figure 2) composed of a first bipolar transistor 15 and of a second bipolar transistor 16, which are arranged so that their emitter terminals are connected to resistors R E and their collector terminals are connected to respective diodes 17 and 18. A current source 2I 1 is connected to the common point between the resistors R E . The first differential input stage (a differential stage is shown in this case, but the circuit according to the invention is equally valid if a single-input stage or a single-output output stage is used) is connected to at least one current amplifier stage, designated by the reference numeral 20, which is interposed between the differential input stage 10 and a differential output stage 30. The current amplifier stage 20 is constituted by a first bipolar transistor 21 and by a second bipolar transistor 22 which have common-connected emitter terminals; a current source 2I 2 is connected thereto. The base terminals of the bipolar transistors 21 and 22 are respectively connected to the collector terminals of the transistors 15 and 16, while voltage signals V + and V - are supplied to the base terminals of the transistors 15 and 16 of the first differential input stage. The collector terminals of the transistors 21 and 22 are connected, respectively, to diodes 23 and 24 in which the anode terminal is connected to the collector terminal of the respective transistor. Current sources I 2 * are respectively parallel-connected to the diodes 23 and 24. Finally, the second stage, i.e., the current amplifier stage 20, is connected to the output stage, which is also of the differential type (the same considerations made earlier apply to this case also) and is constituted by two transistors 31 and 32 in which the emitter terminals are common-connected and whereto a current source 2I 3 is connected. The collector terminals of the transistors 31 and 32 are respectively connected to resistors R L . The base terminals of the bipolar transistors 31 and 32 are respectively connected to the collector terminals of the transistors 21 and 22 of the current amplifier stage 20. The above-described circuit has a gain which is given by: A V = R L R E · gm2 gm1 · gm3 gm2* from which: A V = R L R E · I 2 I 1 · I 3 I 2 -I 2 * = R L R E · I 3 I 1 · I 2 I 2 -I 2 * The input stage 10 receives in input a pair of voltage signals and converts them into current signals, compressing them; said signals are sent to the second current amplifier stage 20, which amplifies the gain and then sends the signals thus amplified to the differential output stage 30, which converts the current signals back to voltage signals in order to have a voltage output. It is also possible, of course, to have a current output, which is useful for example when applying filters etcetera. The transconductance of the diodes 23 and 24 of the second current amplifier stage 20 can be modulated by varying the static current supplied by the sources I 2 *, which is independent of the current of the input stage 10. Thus, by increasing the static current considerably, it is possible to increase the gain because transconductance decreases. Accordingly, a further degree of freedom to increase the gain is obtained in addition to the one provided by varying the currents of the differential input and output stages, i.e., the currents I 1 and I 3 . The current sources I 2 * are therefore means for subtracting static current from the diodes 23 and 24 which thus allow to reduce the transconductances of the diodes 23 and 24. It is thus possible to mutually cascade-connect a plurality of stages 20 between the differential input stage 10 and the differential output stage 30, so as to have a cascade of a plurality of gain factors provided by a current ratio in which the static current of the sources I 2 * appears, In the gain formula, gm1, gm2, gm3 and gm2* are, respectively, the transconductances of the diodes 17 and 18, of the transistors 21 and 22, of the diodes 23 and 24 and of the transistors 31 and 32. Therefore, by varying the currents included in the gain formula it is possible to change the gain. In order to achieve high gain it is possible to have a small current I 1 ; however, a limit is set by input linearity (which is determined by 2I 1 .R E ). An alternative would be to increase the current I 3 , but in this case the power dissipated by the circuit also increases. Introducing the intermediate current amplifier stage 20 allows to increase gain without changing input linearity and without increasing current absorption excessively. The term I 2 I 2 -I 2 * can be varied continuously or stepwise by changing the current I 2 *. The limit of the above-described structure consists in preventing the term I 2 -I 2 * from becoming smaller than 0: in this case, the load diodes of the second stage 20, i.e., the diodes 23 and 24, switch off and the linear region is abandoned. As mentioned, it is possible to introduce a plurality of stages like the one illustrated above in order to further increase the gain. Figure 4 is a partial circuit diagram in which only one branch of the corresponding differential circuits is illustrated and the second branch is omitted; the diagram describes a circuit in which two current amplifier stages are interposed between the differential input stage 10 and the differential output stage 30; said amplifier stages are now designated by the reference numerals 20' and 20" and are provided according to the invention, like the stage 20 shown in Figure 3. In this case, gm4 is the transconductance of the bipolar transistors of the output stage 30, while gm3 and gm3* are, respectively, the transconductances of the bipolar transistors and of the diodes of the second current amplifier stage 20". Therefore, according to the circuit of Figure 4, the gain of the structure is: AV = R L R E · gm2 gm1 · gm3 gm2* · gm4 gm3* from which: A V = R L R E · I 2 I 1 · I 3 I 2 -I 2 * · I 4 I 3 -I 3 * A V = R L R E · I 4 I 1 · I 2 I 2 -I 2 * · I 3 I 3 -I 3 * If the currents are chosen so that their value is not very small, the output impedance of each stage is low and therefore the entire structure behaves like a single-pole amplifier which has a transfer function equal to: H(S) = A V 1+SR L C L The secondary poles are due to the impedance of the diodes and to the parasitic capacitors that occur on the respective nodes and are thus localized at high frequencies (this is true if the transconductance of the diodes is kept relatively high). Figure 4 illustrates a capacitor C L representing a load capacitance due to a load which is connected to the amplifier according to the invention. If the current I 4 of the differential output stage 30 is changed exponentially, it is possible to achieve dB-linear gain control. The above-described circuit has also been used optimally at high frequencies. The circuit shown in Figure 5 instead shows that the introduction of a control current I cont in the differential output stage allows to vary the current 2I 3 exponentially by varying it in a linear fashion; accordingly, in this case the gain of the amplifier also varies exponentially. In practice, the differential output stage 30 is formed, in this case, by a modified current mirror, as shown in Figure 5, in which an additional bipolar transistor 35 is provided which is connected, by means of its base terminal, to the collector terminal of a transistor 36 which receives, on its emitter terminal, a control current I cont and is connected to the transistor 37 by means of its base terminal. If the current I 3 varies in order to change the gain, the common-mode voltage in output from the stage 30 changes; accordingly, it can be useful to have a common-mode circuit, designated by the reference numeral 50 and shown in Figure 3. Said common-mode circuit is an amplifier which has a reference voltage and receives in input the voltages received on the collectors of the transistors 31 and 32 and provides feedback control in output of current sources 45 and 46. The amplifier thus controls the half-sum of the inputs taken from the collectors of the transistors 31 and 32 and compares said half-sum with the reference voltage in order to generate an error signal and control the current sources 45 and 46. The half-sum of the voltages in input to the common-mode circuit 50 must be equal to the reference voltage. In this case, the circuit 50 performs no action on the current sources 45 and 46. In practice it has been observed that the programmable amplifier according to the invention fully achieves the intended aim and objects, since it allows to program the gain while maintaining input linearity. It is also possible to achieve a high gain with high precision of said gain simultaneously with high performance in terms of frequency. This is due to the fact that frequency compensation is simpler than a circuit solution in which a cascade of voltage-gain stages is present, because all of the secondary poles are associated with low impedances and therefore with a high frequency (low impedances can be achieved because it is not necessary to provide voltage gain in the internal nodes of the circuit). Finally, the circuit according to the invention achieves low power dissipation and can have a current output, which is useful for applying for example filters etcetera. The amplifier thus conceived is susceptible of numerous modifications and variations, all of which are within the scope of the inventive concept; all the details may also be replaced with other technically equivalent elements. In practice, the materials employed, so long as they are compatible with the specific use, as well as the dimensions, may be any according to requirements and to the state of the art. Where technical features mentioned in any claim are followed by reference signs, those reference signs have been included for the sole purpose of increasing the intelligibility of the claims and accordingly such reference signs do not have any limiting effect on the interpretation of each element identified by way of example by such reference signs.

Claims: An amplifier with programmable gain and input linearity, comprising: an input stage (10), which is suitable to receive a voltage signal (V + , V - ) and perform current conversion thereof with compression; an output stage (30), which is connected to the input stage (10) and is suitable to decompress the signal in output from said input stage, producing gain amplification thereof; at least one current amplifier stage (20) which is interposed between said input stage (10) and said output stage (30) and comprises at least one bipolar transistor (21, 22) which is series-connected to a load diode (23, 24) and to a current source (2I 2 ); programmable means (I 2 , I 2 *) for reducing the transconductance of said load diode (23, 24) being provided in said at least one amplifier stage (20) to determine a programmable amplification factor for the gain of said amplifier, said programmable means comprising a static current source which is parallel-connected to said load diode; in said at least one current amplifier stage interposed between said input stage and said output stage, said static current source, together with said current source, producing an amplification factor for the gain of said amplifier which can be programmed by varying the value of said static current source. The amplifier according to claim 1, characterized in that said input stage (10), said output stage (30) and said at least one current amplifier stage (20) are differential stages. The amplifier according to claim 2, characterized in that said differential output stage (30) is connected to a common-mode feedback circuit (50) which receives in input the differential voltage signals in output from said output stage (30) and compares them with a reference voltage in order to generate a signal for driving a pair of current sources which are respectively parallel-connected to load resistors of said output stage. The amplifier according to claim 3, characterized in that said differential input stage (10) comprises two transistors (15, 16) which are arranged in a mirror configuration and in which corresponding load diodes (17, 18) are connected to the collector terminals, said collector terminals being connected to the base terminals of a pair of transistors (21, 22) of said at least one current amplifier stage. The amplifier according to claim 4, characterized in that said differential input stage (10) comprises two resistors (R E ) which are respectively connected to the emitter terminals of said pair of transistors of the differential input stage.

Inventors: MARCHESE STEFANO, PISATI VALERIO, PORTALURI SALVATORE, SAVO ALESSANDRO, MARCHESE, STEFANO, PISATI, VALERIO, PORTALURI, SALVATORE, SAVO, ALESSANDRO
Applicants: ST MICROELECTRONICS SRL, STMICROELECTRONICS S.R.L.
Application year: 1998
Main classification: H03G3
IPC codes: H03G1, H03G7