Method for inspecting active matrix substrate, active matrix substrate, liquid crystal display device and electronic equipment

Abstract: A digital driver (330), having the function of enabling an output terminal to be in high-impedance condition, for driving data lines, and an inspection circuit (340) provided at ends of the data lines opposite to the digital driver are provided. The inspection circuit (340) includes bidirectional switches provided for each of the plurality of respective data lines, and control means for controlling the switching of the switches. By using the inspection circuit provided at the opposite ends of the data lines, not only inspections of data-line disconnection or digital-driver output but also determination of whether or not there is a point defect can be performed. In addition, since the circuit is designed only for inspection, its size is extremely small, and the circuit can be disposed in a dead space.

Description: [Technical Field] The present invention relates to an active-matrix- substrate inspecting method, an active matrix substrate, a liquid crystal device and an electronic apparatus, and in particular, to techniques for inspecting a type of active matrix substrate in which a digital data-line driver (driver in which a digital signal is input and converted from digital to analog form to output an analog signal for driving data lines) (hereinafter referred to as a "digital driver") is formed on the substrate. [Background Art] In recent years, researches have been actively made on an active matrix substrate with a built-in driver in which driving circuits (drivers) for scanning lines and data lines are formed on a substrate, and a liquid-crystal display device using the substrate. Such an active matrix substrate is produced using low-temperature polysilicon techniques, for example. In order to put the products in which the above substrate is used on the market, it is required to perform an inspection of conforming article/non-conforming articles accurately from a liability guarantee point of view after the substrate is formed but before a panel is assembled. According to the study of the present inventor, the above-described inspection mainly requires basic inspections such as checking the drivers' output ability and detecting a disconnection of the data lines, and inspections of the characteristics of switching devices (TFTs, MIMs, etc) included in pixels and the leak characteristics of storage capacitors, which relate to an inspection on a point defect in an active matrix unit. In the case of a digital driver for driving the data lines (namely, digital-data-line driver), a method for performing simultaneous driving at predetermined timing (line-at-a-time driving method) has been employed as a result of paying attention to the ease of digital data storage. A display device with such a built-in digital-line-at-a-time-driving driver has not been realized, so that how the above-described highly reliable inspections are performed is not clear. WO 9624123A discloses a liquid crystal display device including a driving method and method of its inspection. The device comprises a plurality of data lines, pixels, scanning lines and a digital data line driver for driving the data lines. EP 0627722 discloses a light valve device with a failure detection circuit. The device comprises pixels, which include both thin-film type transistors and liquid crystal cells driven by liquid crystal driving electrodes, arranged in a matrix shape together with image signal lines and control signal lines connected to each of the transistors. US 5539326 discloses a method for testing the wiring or state of a liquid crystal display and thin film transistor. Accordingly, one object of the present invention is to establish a technique for inspecting an active matrix substrate including a digital driver mounted thereon so that highly reliable substrates and display devices, etc., can be put on the market. According to a first aspect of the present invention, there is provided an active matrix substrate, comprising: a plurality of data lines and a plurality of scanning lines, a plurality of pixels provided at intersections of the data lines and the scanning lines; a digital data line driver for driving the plurality of data lines; a plurality of switching devices, each switching device being provided for a respective one of the pixels; a plurality of storage capacitors for storing signals received from the digital data line driver via a corresponding data line and switching device, each pixel having one of the plurality of storage capacitors in a substrate condition; and an inspection circuit provided at ends of the plurality of data lines opposite to said digital data line driver, the inspection circuit being arranged to perform inspection of a signal stored by a storage capacitor of a pixel when an output terminal of the digital data line driver is in a high impedance condition. Since the digital driver for the data lines has a D/A converter in an output unit, it cannot inspect an active matrix unit (measurement of point defects) by reading a once output signal again via a commbn channel. However, according to the present invention, since the inspection circuit is provided at the opposite ends of the data lines to the digital driver, signals can be written in the capacitors (storage capacitors) in the active matrix unit by driving the data lines with the digital driver, and the written signals can be read out through the inspection circuit. Accordingly, determination of whether or not there is a point defect can be made. In signal reading with the inspection circuit, when the output of the digital driver (A/D conversion output) is on, defect determination based on signals read out from the storage capacitors is not secured. Thus, in a step for acquiring a basic signal for point-defect determination, the output of the inspection circuit needs to be switched off (set to be high-impedance condition). Therefore, the digital driver includes the function of enabling the output to be in high-impedance condition. In addition, since the inspection circuit is provided as a circuit used for inspection, it does not need to operate at high speed like as the digital driver, and it needs only a minimum function, for example, capable of performing inspection. Accordingly, according to the present invention, the digital driver has a structure including bi-directional switches (e.g., analog switches) and control means for controlling the switching of the switches. Its simplified circuit arrangement and no requirement of advanced operating characteristics need only a small transistor size, which is suitable for space reduction. Therefore, the inspection circuit can be mounted on the active matrix substrate, easily. The "inspection circuit" means a circuit mainly used for inspection and not having the function of driving the data lines like as the digital driver, but does not exclude the use of another object different from inspection and the inclusion of a component usable for an object other than inspection. Devices included in the inspection circuit may be produced, together with devices included in the digital driver, by an identical production process. On one active matrix substrate, a digital driver and an inspection circuit are produced by an identical process. For example, using low-temperature polysilicon-thin-film-transistor (TFT) techniques enables the production. The digital driver includes a switch in its output unit, and opening the switch causes the output unit to be in high-impedance condition. The switch is provided in the output unit in order to make the output of the digital driver be in high-impedance condition. The digital driver includes any one of a switched capacitor D/A converter, a resistor ladder D/A converter and a PWM D/A converter. Examples of a D/A converter mountable on an active matrix substrate of the present invention are shown. In a switched capacitor D/A converter, for example, switches are provided for each of the weighted capacitors, and the charge of each capacitor is combined with a coupling capacitor by control of the switching of the switches so as to generate a conversion voltage. In a resistor ladder D/A converter, for example, a resistance-divided voltage is selectively extracted by control of the switching of the switches provided at the output channels so as to generate a conversion voltage. In a PWM D/A converter, for example, the on-duration of a switch connected to a voltage source in which a voltage value varies with time (ramp-wave) is controlled in accordance with a digital data value so as to generate a conversion voltage. The control means in the inspection circuit performs point-at-a-time scanning of the bi-directional switches. The inspection circuit has, for example, a point-at-a-time scanning system of data lines using shift registers etc. and performs inspection by the point-at-a-time reading of data. When the number of the bi-directional switches is M (where M is a natural number not less than 2), the control means in the inspection circuit repeatedly performs the simultaneous driving of P (where P is a natural number) bi-directional switches Q (where Q is a natural number) times, whereby the driving M (M = P x Q) bidirectional switches in total is realized. The inspection circuit uses a method different from point-at-a-time scanning. At least a part of the inspection circuit is disposed in a space, which is in the active matrix substrate and not contributing to the realization of substantial functions, such as displaying an image. Since the inspection circuit needs only a small transistor size and a small occupied area, at least a part of the inspection circuit can be disposed in a space, which is in the active matrix substrate and not contributing to the realization of substantial functions, such as displaying an image, namely, a so-called dead space. Therefore, the enlargement of the active matrix substrate and liquid-crystal display device can be suppressed. The inspection circuit is disposed in a sealing position formed by sealing material in a panel production process. The position to be sealed by the sealing material in a panel production process is a dead space inevitably generated in the active matrix substrate. By disposing the inspection circuit in this space, the effective use of space can be achieved. Each of the inspection circuit and the digital driver is divided into plural pieces and disposed on the active matrix substrate. There are the cases that disposing separated circuits enables a dead space to be used more effectively. By the amount of the separation, the number of devices in one block is reduced, and enough space for the layout is produced. In addition, by the amount of reducing the number of devices, the operating frequency of a shift register or the like which operate in series can be reduced. The inspection circuit is separated into at least a first inspection circuit and a second inspection circuit, while the digital driver is separated into at least a first digital driver and a second digital driver, the first digital driver and the first inspection circuit are disposed to be mutually opposed, with the data lines provided therebetween, and the second digital driver and the second inspection circuit are disposed to be mutually opposed, with the data lines provided therebetween, and the first digital driver and the second inspection circuit are disposed at identical ends of the data lines, and the second digital driver and the first inspection circuit are disposed at identical ends of the data lines. There is formed a layout in which the separated identical-type circuits (each of the first circuit and the second circuit) are disposed at the opposite sides of the data lines provided between them. Since the circuits are dispersed and disposed on the top and bottom surfaces of the active matrix substrate, dead space around the display region is easy to effectively use. In particular, there are dead spaces, uniformly at sealing positions around (at the top and bottom of) the substrate, which is advantageous when the spaces are effectively used. In addition, the circuit separation reduces the number of devices in one circuit block in accordance with the number of separations, which produce enough space for the layout. By the amount of reducing the number of devices, the operating frequency of a shift register or the like which operates in series can be reduced. According to a second aspect of the present invention, there is provided a method for inspecting the active matrix substrate described in accordance with the first aspect of the present invention comprising the steps of: writing signals in the storage capacitors by using the data line driver; causing the output terminal of the data line driver to be in a high-impedance condition; and acquiring a basic signal to be a basis of inspection by reading the signals written in the storage capacitors with the inspection circuit, and inspecting an active matrix unit based on the acquired basic signal. Next, a basic method for inspecting an active matrix unit using an active matrix substrate is described as follows. The inspection of the digital driver itself and the disconnection inspection of the data lines are performed before each step is executed. Before the active matrix unit is inspected, the output characteristics of a digital driver itself and disconnection of data lines are inspected (preliminary inspection). According to the above-described active matrix substrate of the present invention, an inspection, an inspection circuit is disposed opposing to a digital driver, with data lines provided between them. Thus, the preliminary inspection can be easily performed based on the reception or the amplitude of the received signals and so on by the means that the line-at-a-time driving of each data line is performed, for example, once, by using the digital driver, then the inspection circuit is scanned by either line-at-a-time scanning or point-at-a-time scanning being synchronizing with the scanning of the data lines and the signals sent via the data lines are received. The step of inspecting the active matrix unit, based on the acquired basic signals, includes the step of considering the two-dimensional distribution of the basic signal characteristics in the active matrix unit. In many cases, the basic signal to be acquired for inspecting the active matrix unit includes considerable noise. Accordingly, it is effective to perform relative inspection with consideration on not only the absolute value of the signal characteristic but abnormality in the signal characteristic distribution (e.g., the existence of a particular portion indicating abnormality in the form of a significant point, compared with the neighborhood, and so on). The step of inspecting the active matrix unit, based on the acquired basic signal, includes the step of comparing the acquired basic signal with a sample signal, which is previously prepared. This is a method for inspection performed by comparison with a sample signal. The liquid crystal device is assembled with an active matrix substrate, and has high reliability having passed predetermined inspection. Further, the liquid crystal device comprises an active matrix substrate and has a high reliability having passed predetermined inspection. The electric apparatus including the liquid crystal device has also high reliability owing to the high reliability of the liquid cyrystal device. [Brief Description of the Drawings] Fig. 1 is a block diagram showing an apparatus for executing one example of an active-matrix-substrate inspecting method of the present invention. Fig. 2 is a block diagram showing an example of circuits mounted on an active matrix substrate of the present invention. Fig. 3 is a chart showing the schematic comparison between the size of a transistor included in the D/A converter in Fig. 2 and the size of a transistor included in the inspection circuit in Fig. 2. Fig. 4 is a sectional view of a main part of a liquid-crystal display device, showing an example in which the inspection circuit is disposed below a sealing material. Fig. 5 is a flowchart showing an outline of one embodiment of an active-matrix-substrate inspecting method of the present invention. Fig. 6 is a flowchart illustrating more specific details of the active-matrix-substrate inspecting method of an embodiment of the present invention. Fig. 7 is a flowchart showing more specific details of the point defect measurement in Fig. 6. Fig. 8 is a flowchart showing more specific details of the status determination in Fig. 6. Fig. 9 consists of (a) a plan view showing one example of the structure of one pixel included in an active matrix unit, and (b) an equivalent circuit diagram of the structure in (a). , Fig. 10 consists of (a) a plan view showing another example of the structure of one pixel included in the active matrix unit, and (b) an equivalent circuit diagram of the structure in (a). Fig. 11 is a chart illustrating an outline of a structural example of a capacitance-divisional D/A converter usable in the present invention. Fig. 12 is a diagram showing an structural example of the circuit of a part of the capacitance-divisional D/A converter in Fig. 11. Fig. 13 is a diagram illustrating an outline of a structural example of a resistance-divisional D/A converter usable in the present invention. Fig. 14 is a diagram illustrating an outline of a structural example of a PWM D/A converter usable in the present invention. Fig. 15 consists of (a) and (b) diagrams illustrating an outline of one example of the inspection circuits shown in Fig. 1 and Fig. 2, respectively. Fig. 16 is a diagram illustrating an outline of another example of the structure of the inspection circuits shown in Fig. 1 and Fig. 2. Fig. 17 is a diagram showing another example of a structure of the circuits mounted on the active matrix substrate of the present invention. Fig. 18 is a chart showing positions used when a glass substrate is cut in order to produce an active matrix substrate. Fig. 19 is a chart showing a layout of a scanning-line driving circuit, a data-line scanning circuit, an inspection circuit, and so on. Fig. 20 is a chart showing a first step in an embodiment of an active-matrix-substrate producing method of the present invention. Fig. 21 is a chart showing a second step in the embodiment of the active-matrix-substrate producing method of the present invention. Fig. 22 is a chart showing a third step in the embodiment of the active-matrix-substrate producing method of the present invention. Fig. 23 is a chart showing a fourth step in the embodiment of the active-matrix-substrate producing method of the present invention. Fig. 24 is a chart showing a fifth step in the embodiment of the active-matrix-substrate producing method of the present invention. Fig. 25 is a chart showing a sixth step in the embodiment of the active-matrix-substrate producing method of the present invention. Fig. 26 is a chart showing a seventh step in the embodiment of the active-matrix-substrate producing method of the present invention. Fig. 27 is a chart showing the structure of a liquid-crystal display device in which an active matrix substrate of the present invention is used. Fig. 28 is a chart showing one example (laptop computer) of an electronic apparatus in which an active matrix substrate of the present invention is used. Fig. 29 is a chart showing another example (liquid-crystal projector) of the electronic apparatus in which an active matrix substrate of the present invention is used. Fig. 30 consists of (a) a sectional structure view of the device taken on line A-A shown in Fig. 9(a), and (b) a sectional structure view of the device taken on line A-A shown in Fig. 10(a). In the drawings, the reference numerals denote the following. 10 test system controller 20 timing generator 30 data generator 40 high-speed amplifier and A/D converter 100 active-matrix-substrate tester 200 full-autoprover 210 prover controller 220 DUT board 300 active matrix substrate 310 active matrix unit 320 scanning liner driver 330 digital-data-line driver with an output-off function 340 inspection circuit [Best Mode for Carrying Out the Invention] A more detailed description will be given with reference to the following embodiments of the present invention which are shown in the drawings. (First Embodiment) (1) Outline of an Inspection System and its Operation Fig. 1 is a block diagram showing a whole composition of an apparatus for executing one example of an active-matrix-substrate inspecting method of the present invention. This embodiment describes a case where an active matrix substrate (hereinafter referred to as a "TFT substrate") having switching devices, in a pixel portion, composed of thin film transistors (TFTs), is inspected. In Fig. 1, a TFT substrate tester 100 includes a test system controller 10 for monitoring and controlling an inspection operation, a timing generator 20 for generating various timing signals, a data generator 30 for outputting data for inspection, a high-speed amplifier and A/D converter 40, and a data analyzer 50 to which data output from the A/D converter is input and which performs predetermined analysis. The full-autoprover 200 includes a prover controller 210 and a DUT board 220 as an interface of various signals. A TFT substrate 300 has an active matrix unit, a scanning line driver 320, a digital-data-line driver 330 with an output-off function (hereinafter simply referred to as a "digital-data-line driver"), and an inspection circuit 340. The output-off function is the function of enabling output to forcedly be in high impedance condition. In inspection, a probe (an inspection, terminal not shown in Fig. 1) of the full-autoprover is connected to a predetermined terminal (not shown in Fig. 1) in which the TFT substrate 300 is exposed. In addition, under the monitoring and control of the test system controller 10, timing signals and inspection data are output from the timing generator 20 and the data generator 30 in the TFT substrate tester 100. These are sent to the TFT substrate 300 via the DUT board 220 in the full-autoprover 200. The timing signals are input to the scanning-line driver 320 in the TFT substrate 300, the digital-data-line driver 330, and the inspection circuit 340, respectively, and the inspection data are input to the digital-data-line driver 330. After a predetermined inspection process ends (details of inspection operation will be described below), the inspection circuit 340 outputs an acquired analog signal (hereinafter referred to as a "basic signal"), which is a basis for inspection, and this basic signal is sent to the TFT tester 100 via the DUT board 220 in the full-autoprover 200. It is amplified and converted from analog to digital form by the high-speed amplifier and A/D converter in the TFT tester 10, and the converted data are input to the data analyzer 50, in which the predetermined analysis of them is performed. (2) Outline of Circuits Formed on the TFT Substrate 300 In Fig. 2, an example of a specific block diagram of the TFT substrate 300 shown in Fig. 1 is shown. In order to enable an inspection using the inspection system shown in Fig. 1 to be performed, the TFT substrate 300 needs to fulfill several necessary conditions. In other words, the necessary conditions are that the digital-data-line driver has an output-off function (the function of enabling output to be in high impedance condition) and that each pixel portion has a capacitance in substrate condition. As shown in Fig. 2, the digital-data-line driver 330, built into the TFT substrate 300, includes an m-bit shift register 400, a u-bit-data input terminal (D1 to Du, ux m switches SW1 to SWum, a ux m-bit latch A (reference numeral 410) and a latch B (reference numeral 420)), and an m-bit D/A converter 430. In this embodiment, the D/A converter 430 has an output-off function. The scanning line driver 320 includes an n-bit shift register 322. The active matrix unit includes a plurality of data lines X1 to Xm, a plurality of scanning lines Y1 to Yn, TFTs (M1), which are arranged in a matrix and are connected to respective scanning lines and the data lines, and storage capacitors (holding capacitors) C S1 . The existence of the storage capacitors C S1 enables point defects in substrate condition to be measured. In TFT substrate condition, no liquid crystal capacitors C LC exist. However, in Fig. 2, in consideration of the ease of understanding, the liquid crystal capacitors C LC are shown for convenience. In addition, terminals of the storage capacitors C S1 , opposite to their terminals to the TFTs (M1), are held to have a common potential V COM . (3) Specific Structures 1. Structure of Storage Capacitor In Fig. 9, (a) and (b), the structure of one pixel in the active matrix unit in Fig. 2 is shown. In Fig. 9, (a) shows its layout, and (b) shows its equivalent circuit. The sectional structure of the device taken on line A-A in Fig. 9(a) is shown in Fig. 30 (a). In Fig. 9 (a), reference numerals 5000, 5100 denote scanning lines, and reference numerals 5200, 5300 denote data lines. In addition, reference numeral 5400 denotes a capacitor line, and reference numeral 5500 denotes a pixel electrode. As is clear from Fig. 30(a), an insulating film 5520 similar to an insulating film 5510 is formed between an extension 5505 of the drain of a TFT, and a capacitor line 5400 simultaneously formed using a step for forming a scanning line (gate electrode) 5000, and an interlayer insulating film 5530 is formed between the capacitor line 5400 and the pixel electrode 5500. These constitute a storage capacitor (C S1 ) 5410. Reference numeral 5600 denotes an aperture (region through which light is transmitted), and K1, K2 denote contact regions. The storage capacitor (C S1 ) can be formed using the structure as shown in Fig. 10, (a) and (b). In Fig. 30(b), the sectional structure of the device taken on line A-A in Fig. 10(a) is shown. In Fig. 9, the capacitor lines are separately formed. However, in Fig. 10, the storage capacitor is formed by causing the extension of the TFT drain to overlap with an adjacent scanning line (gate electrode). In other words, as shown in Fig. 10(a) and Fig. 30(b), an insulating film 5130 similar to a gate insulating film 5120 is formed between a drain extension 5700 consisting of polysilicon, and an adjacent scanning line (gate electrode) 5100, and an interlayer insulating film 5140 is formed between the adjacent scanning line 5100 and the pixel electrode 5500. These constitute a storage capacitor 5420. In Fig. 10(a), portions corresponding to those in Fig. 9(a) are denoted by identical reference numerals. 2 ○ Structure of D/A Converter Those having structures shown in Fig. 11 to Fig. 14 can be utilized to the m-bit D/A converter 430 in Fig. 2. When a point defect inspection is performed, it is required that the output of a D/A converter is switched off after a signal is written in the capacitor of a pixel before. Accordingly, any of the D/A converters in Fig. 11 to Fig. 14 has an output-off function (the function of causing the output to be in high impedance condition). A specific description will be given below. Switched capacitor D/A Converter The D/A converter 430 in Fig. 11 is a switched capacitor D/A converter with an output-off function. In this converter, electric charge is accumulated in weighted capacitors (binary weight capacitors) C1 to C8, and when 8-bit input data D1 to D8 are "1", the corresponding switches (SW20 to SW28) are closed to transfer the electric charge between the respective capacitors (C1 to C8) and a coupling capacitor C30, whereby a conversion voltage corresponding to the 8-bit input data D1 to D8 is generated at an output terminal V OUT . In Fig. 11, the switches (SW1 to SW8) are reset switches for the capacitors C1 to C8, and V0 is a reset voltage. A switch C40 is a reset switch for the coupling capacitor C30. A switch control circuit 6000 is provided in order to forcedly open the switches SW20 to SW28 so that the output terminal V OUT is in floating condition (high impedance condition). In Fig. 12, the specific structure of the switch SW20 is shown. The switch SW20 includes a transfer gate composed of an n-MOS transistor M10, a p-MOS transistor M20 and an inverter INV1, and an n-MOS transistor M30 connected in series to the transfer gate. The switch control circuit 6000 causes the output corresponding to the input data D1 to be in high impedance condition by switching off the n-MOS transistor M30. The other switches corresponding to the other input data can similarly be set in high impedance condition. In Fig. 11 and Fig. 12, the switch control circuit 6000 is independently provided, and in Fig. 12, the special transistor (M30) for generating high impedance condition is provided. However, the arrangement is not always limited to these. For example, in Fig. 11 and Fig. 12, by using a reset signal or the like to forcedly fix the input data D1 to D8 to "0", the switch (SW20) in Fig. 11 and the transfer gates (M10, M20) in Fig. 12 can be switched off to set the output in high impedance condition. Resistor ladder D/A Converter The D/A converter 430 shown in Fig. 13 obtains a conversion output V OUT by controlling the opening and closing of switches SW100 to SW108 to select and extract a divided voltage obtained from each of the common connection points of resistors R1 to R8 connected in series. The opening and closing of the switches SW100 to SW108 is determined by the output of a decoder 7000. The switches SW100 to SW108 (switch group 7100) are controlled by a switch control circuit 7200 to be simultaneously opened, and the output can be set in high impedance condition. PWM D/A Converter The D/A converter 430 in Fig. 14 uses a PWM circuit 7502 to generate a pulse signal having a pulse width corresponding to the value of input data, and obtains a conversion output V OUT by using the pulse width to control the on-duration (closed condition duration) of a switch 7506. Reference numeral 7504 denotes a ramp-wave power supply, and reference numeral 7400 denotes a latch circuit in which image data are temporarily stored. In addition, the control by the switch control circuit 7508 enables the switch 7506 to be forcedly opened, and the output to be in high impedance condition. 3 ○ Structure of Inspection Circuit Those drawn in Fig. 15, (a) and (b), and Fig. 16 are usable as the inspection circuit 340 shown in Fig. 2. The "inspection circuit" means that it is used for inspection and but is not used intending to drive the data lines like as the data line driver, but it does not exclude to have a structure to be used for a purpose other than inspection or or to use the whole circuit for a purpose other than inspection. In the inspection circuit 342 in Fig. 15(a), MOS transistor-used analog switches SW X1 to SW xm are provided corresponding to each of data lines X1 to Xm, and the point-at-a-time scanning of the analog switches SW X1 to SW xm is performed with outputs from a shift register 7600, whereby basic signals to be a basis of the inspection can be obtained successively from an output terminal T OUT . The basic signals are sent to the DUT board 220 in the full-autoprover 200. In Fig. 15(b), one output from the shift register 7602 drives analog switches pairs (SW X1 to SW xm ), which is basically similar to that in Fig. 15(a) in the respect that point-at-a-time scanning is employed. By simultaneously driving two analog switches, the number of bits (the number of stages) only needs m/2 bits. In addition, the basic signals are obtained from two terminals T OUT1 and T OUT2 . In the inspection circuit 342 in Fig. 16, a technique different from point-at-a-time scanning is employed. In other words, the technique is that, when m analog switches SW X1 to SW xm are driven, p analog switches are simultaneously driven and the driving is repeatedly performed q times, whereby the driving of a total of m (m = px q) analog switches is realized. A switch control circuit 7300 successively switches on control lines G1 to Gq, and whenever each control line is switched on, basic signals are simultaneously obtained from output lines L1 to Lp. Since any of the above-described inspection circuits does not need a data-line driving ability, and has no requirement of high-speed driving for image display, its transistor size is allowed to be small, and it basically requires only a minimum operable ability. Accordingly, its occupied area can be extremely reduced, and it can be formed on a TFT substrate. Fig. 3 shows the comparison between the size of a MOS transistor at the output stage of the D/A converter 430 on the condition that the D/A converter can perform point-at-a-time driving, and the size of a MOS transistor constituting the inspection circuit 342. In other words, the channel width (W) of the MOS transistor M200 constituting the D/A converter 430, which is capable of point-at-a-time driving, needs at least 1000 µm or more. Conversely, the channel width (W) of the MOS transistor M300 constituting the inspection circuit 342 is preferably 100 µm or less. In other words, the size, which is necessary for the inspection-circuit transistor is 1/10 or less. As described above, since the small transistor size and the reduced occupied area are allowed, it is possible to dispose at least a part of the inspection circuit 342 in space of the TFT substrate which does not contribute to realize substantial functions such as image display, in other words, so-called dead space. Therefore, the enlargement of the TFT substrate and the liquid-crystal display device can be suppressed. For example, as shown in Fig. 4, the inspection circuit 342 can be disposed in a sealing position formed by the sealing material in a TFT-substrate panel Production process. In Fig. 4, for easy understanding, the sectional structure of a completed liquid-crystal display device is drawn. In Fig. 4, reference numeral 500 denotes a glass substrate, reference numeral 510 denotes an SiO 2 film, reference numeral 520 denotes a gate-insulating film, reference numerals 530, 540 denote interlayer insulating films, reference numerals 522, 524 denote source-drain layers, and reference numeral 526 denotes a gate electrode. The MOS transistor M300 constituting the inspection circuit is disposed in a sealing ,region A1 formed by a sealing material 550. The sealing position formed by the sealing material is a dead space inevitably generated in the active matrix substrate. By disposing the inspection circuit in this space, the space can effectively be used. In Fig. 4, reference numeral 560 denotes a opposite substrate, reference numeral 570, 572 denote alignment layers, and reference numeral 574 denotes liquid crystal. (4) Process for Inspecting a TFT Substrate 1. Outline A TFT-substrate inspection is broadly divided into a step (preliminary inspection step, step 600 - Fig.5) for detecting disconnections of signal lines and inspecting an output from a D/A converter, and a step (step 610) for inspecting point defects. The inspection (step 600) for detecting disconnections of signal lines and inspecting an output from a D/A converter is an inspection, which is realized by the basic structure of the active matrix substrate (Fig. 1, Fig. 2) of this embodiment. In the inspection, the inspection can performed, in general, by one scanning by switching on all the outputs of the digital-data-line driver 330 and using the inspection circuit 340 to receive the outputs. For example, in case that no output signals from the data line driver are transmitted via the data lines, it is determined that the data lines are disconnected, or the data line drive itself has a defect. The step (step 610) for inspecting point defects will be described below. 2. Specific Inspection Process In Fig. 6, an example of a specific inspection process will be shown. As to the flowchart in Fig. 6, a method in which inspection is performed in order of the required time for inspection, namely, an object requiring a short inspection time is inspected firstly, is employed, and according to this method, all necessary steps are inspected. However, the inspection process is not limited thereto, and in case that a defect is found, it is possible to stop performing the successive inspections. The inspection process in Fig. 6 will be in order described below. At first, determination of whether there is or not a TFT substrate, which have not been inspected, is made. (step 700). If there is a TFT substrate, which have not been inspected, the substrate is aligned to (mounted on) the system in Fig. 1 (step 700), and then the proving with the full-autoprover 220 in Fig. 1 is performed (step 720). In addition, a driver-consumed current is measured (step 730). This step determines whether a consuming current flowing in the data lines and a power supply for the scanning driver (and the inspection circuit) is in a normal range or not. In case that short-circuiting occurs in the power supply, an excess current flows, then the determination can be performed. Next, an end pulse of the scanning line driver is measured (step 740). In other words, a pulse is input in the first stage of the shift register, and determination of whether the pulse is output from the final stage at predetermined timing is performed. Since the pulse is a digital signal, instant determination can be performed. Next, an end pulse of the data line driver is measured similarly to the case of the scanning line driver (step 750). Next, short-circuit inspection of the data lines (signal lines) and the scanning lines is executed (step 760). In other words, a current flowing from the scanning line driver to the inspection circuit is measured with all the outputs of the scanning driver set to high level, and each switch in the inspection circuit switched on. If short-circuiting occurs in the interconnection, an excess current flows. Next, disconnection inspection of the data lines (signal line) and the scanning lines is executed (step 770). In other words, with all the outputs of the digital driver set to high level, a current change is detected by successively closing the switches of the inspection circuit. If there is a disconnection, the flowing current decreases, which enables the detection. Next, the outputs of the D/A converter are measured (step 780). Before point-defect inspection is performed, all the outputs of the D/A converter are inspected. In this inspection, in order to enhance its precision, it is preferable to check whether the output levels of signals having a plurality of gray scale: white, black and , intermediate tone, are proper or not. Specifically, a voltage set at a predetermined level is output to all the data lines (signal lines), then the output of the D/A converter is set to have high impedance condition after a given time, and the voltage of each inspection circuit (signal line) is detected using the inspection circuit. Next, point-defect measurement is performed (step 790). More specifically, this point-defect measurement is performed according to the process shown in Fig. 7. In other words, signals are written in the storage capacitors in the pixels (step 900) by switching on all out put of the digital data line driver so that the voltage set at a predetermined level is output to all the data lines (signal lines). Next, the outputs of the D/A converters of the digital-data-line driver are set to be a high impedance condition (step 910). Next, a fluctuation of potential for each pixel is detected(step 920) by selecting the scanning lines one by one with the switches are closed. In addition, if necessary, a plurality of detections (step 930) and the detections with different writing conditions (step 940) are executed. If an abnormality (defect) is found in any of each of the above steps, the defect address is detected if needed, and it is used as basic data for status determination (step 800 in Fig. 6). Since the basic data to be a basis for the detection are obtained in the above steps, comprehensive status determination is performed based on the basic data (step 810 in Fig. 6). , For example, the status determination is comprehensively performed such that, as shown in Fig. 8, the two-dimensional distribution of the basic data on the TFT substrate is considered to find whether or not a portion (significant point) showing a numerical value extremely different from that of the neighborhood (step 960), and an abnormality is searched by using sample data for comparison (step 970). In addition, the above inspection steps are performed in order for other chips, which have not been inspected (steps 820, 830 in Fig. 6). As described above, according to this embodiment, conforming-article inspection of an active matrix substrate with a built-in digital data-line driver can precisely be performed in short time. (Second Embodiment) A second embodiment of the present invention will be described using Fig. 17. A feature of this embodiment is that digital-data-line drivers and inspection circuits is disposed being divided into upward and downward, and the upward and downward separate circuits are disposed well closely each other to realize a compact structure. As shown in Fig. 17, the digital-data-line drivers are composed of the two: a first driver 8000A and a second driver 8000B. The structure of digital-data-line driver itself is identical to that in Fig. 2. However, the two-parts division causes the number of bits of each driver is 1/2 of that in Fig. 2. In addition, the inspection circuits are composed of the two: a first circuit 8100A and a second circuit 8100B. The first circuit 8100A is connected to even data lines (X2, X4 to Xm), and the second circuit 8100B is connected to odd data lines (X1, X3 to Xm-1). In Fig. 17, reference numerals S1, S2, S3, S4, Sm and Sm-1 denote analog switches, and reference numerals 8102 and 8104 denote one-stage shift registers. By dividing drivers and inspection circuits as described in this embodiment, various advantages, described below, can be obtained. In other words, dividing drivers and inspection circuits enables the number of devices constituting each circuit to be half, the occupied area to be reduced that much , and the arrangement of the devices to be performed with clearance. In addition, halving the number of shift-register stages also halves the operating frequency, which is advantageous in circuit design. Moreover, circuit division leads to the uniform arrangement of circuits disposed around pixels, which enables the efficient use of a dead space. For example, this is advantageous to utilize the dead space right under the sealing material, described in Fig. 4. In other words, the sealing material is provided so that its uniform width touches the periphery of the substrate, without exerting an excess stress on the substrate. Accordingly, the divided circuits and the reduced number of circuit devices are useful in enhancing the efficiency of using the dead space right under the sealing material. In particular, the device size of inspection-circuits is smaller than the driver device size. Thus, dividing the inspection circuit reduces the space, which is advantageous in layout design. In Fig. 19, an example of the arrangement of an inspection circuit etc. on an active matrix substrate (TFT substrate) is shown. Fig. 19 shows not only the layout of drivers etc. on the active matrix substrate but also vertically sectional and transversely sectional surfaces of a liquid crystal panel including the TFT substrate. In Fig. 19, reference numeral 9100 denotes an active matrix substrate (TFT substrate), reference numerals 8000A and 8000B denote a digital-data-line driver and an inspection circuit, and reference numeral 320 denotes a scanning line driver. In addition, reference numeral 8300 denotes a light-shielding pattern, in which there is an active matrix unit (pixels). Reference numeral 8400 denotes a mounting terminal unit, reference numeral 9200 denotes a sealing material, reference numeral 574 denotes liquid crystal, and reference numeral 9000 denotes a opposite substrate opposite substrate (color filter-formed substrate). As is clear from Fig. 19, any of the scanning line driver, the data line driver and the inspection circuit is disposed effectively utilizing the dead spaces around the active matrix substrate. Accordingly, this arrangement is adapted to effectively use the dead space in the sealing position by the sealing material. The liquid crystal panel (active matrix substrate 9100) shown in Fig. 19 is produced through a cutting step, for example, as shown in Fig. 18. In other words, in Fig. 18, an active matrix substrate (TFT substrate) 9100 and a opposite substrate (color-filter substrate) 9000 are adhered to each other by a large-size adhering technique, and then they are cut to produce six panels. In Fig. 18, cutting lines (L10, L11, L30, L31, L32, L33) indicated by alternate long and short dash lines are lines at which the active matrix substrate and the opposite substrate are simultaneously cut. Cutting lines (L20, L21) indicated by dotted lines are lines at which only the opposite substrate is cut. (Third Embodiment) In this embodiment, a method (production method using low-temperature polysilicon techniques) for producing thin film transistors (TFT) on an active matrix substrate will be described using Fig. 20 to Fig. 26. In the process in Fig. 20 to Fig. 26, capacitors (condenser) are also produced. Accordingly, this process can be used for not only the production of an inspection circuit and a shift registers of a driver but the production of the switched capacitor D/A converter in Fig. 11. Step 1 Initially, as shown in Fig. 20, a buffer layer 4100 is formed on a substrate 4000, and an amorphous silicon layer 4200 is formed on the buffer layer 4100. Step 2 Next, as shown in Fig. 21, annealing is performed by emitting a laser beam to the whole surface of the amorphous silicon layer 4200. As a result, the amorphous silicon is polycrystalized to form a polycrystal silicon layer 4220. Step 3 Next, as shown in Fig. 22, island regions 4230, 4240 and 4250 is formed by the patterning of the polycrystal silicon layer 4220 is performed. The island regions 4230, 4240 and 4250 are layers in which the active regions (source, drain) of a MOS transistor are formed. In addition, the island region 4250 is a layer to be one electrode of a thin film capacitor. Step 4 Next, as shown in Fig. 23, a mask layer 4300 is formed, and phosphorus (P) ions are doped into only the island region 4250 so that it has a low resistance. Step 5 Next, as shown in Fig. 24, a gate-insulating film 4400 is formed, and TaN layers 4500, 4510 and 4520 are formed on the gate-insulating film. The TaN layers 4500 and 4510 are layers to be MOS transistor gates, and the TaN layer 4520 is a layer to be another electrode of a thin film capacitor. Subsequently, a mask layer 4600 is formed, and phosphorus (P) ions are doped by self-align to form a source layer 4231 and a drain layer 4232 which are an n-type, with the gate TaN layer 4500 as a mask. Step 6 Next, as shown in Fig. 25, mask layers 4700a and 4700b are formed, and boron (B) ions are doped by self-align to form a source layer 4241 and a drain layer 4242 which are a p-type, with the gate TaN layer as a mask. Step 7 Subsequently, as shown in Fig. 26, an interlayer insulating film 4800 is formed and contact holes are formed in the interlayer insulating film before electrode layers 4900, 4910, 4920 and 4930 composed of ITO and Al are formed. The electrodes are connected to the TaN layers 4500, 4510 and 4520, and the polycrystal silicon layer 4250, as well, via the contact holes, though, which are not shown in Fig. 26. This completes an n-channel TFT, a p-channel TFT and a MOS capacitor. By using the above-described production process having common steps, production can be facilitated, which is advantageous also in cost. Further, since polysilicon has a carrier mobility extremely greater than amorphous silicon, high-speed operation is practical, which is advantageous in increasing circuit-operating speed. In addition, since conforming-article determination is performed using the above-described inspection method, the reliability of finished products can extremely be increased. As a result, high-quality products can be put into the market. Although the above-described production process uses low-temperature polysilicon TFT techniques, the production method is not always limited to this. For example, if predetermined circuit-operating speed is guaranteed, a process using amorphous silicon can be used. In addition to TFTs, two-terminal devices such as MIMs can be used as switching devices in pixels. (Fourth Embodiment) In this embodiment, a liquid crystal panel produced using an active matrix substrate of the present invention, and an electronic device including said panel etc. will be described by way of example. Any of these is a high-quality apparatus. 1. Liquid-crystal Display Device (Fig. 27) A liquid-crystal display device comprises a backlight 2000, a polarizer 2200, a TFT substrate 2300, liquid crystal 2400, a opposite substrate (color-filter substrate) 2500, and a polarizer 2600, for example as shown in Fig. 27. In this embodiment, as described above, a driving circuit 2310 (and an inspection circuit) is (/are) formed on a TFT substrate 2300. 2. Personal Computer (Fig. 28) Personal computer 1200 shown in Fig. 28 has a main unit provided with a keyboard 1202, and a liquid-crystal display screen 1206. 3. Liquid-crystal Projector (Fig. 29) Liquid-crystal projector 1100 shown in Fig. 29 is a projection-type projector with a transmissive liquid-crystal panel as a light bulb, and uses, for example, a three-plate-prism-method optical system. In Fig. 29, in the projector 1100, projection light emitted from a white-light-source lamp unit 1102 is separated by a plurality of mirrors 1106 and two dichroic mirrors 1108 in a light guide 1104 into three primary colors RGB, and each of them is guided to three liquid-crystal panels 1110R, 1110G and 1110B for displaying respective color images. The rays modulated by the respective liquid-crystal panels 1110R, 1110G and 1110B are incident on the dichroic prism 1112 from three directions. In the dichroic prism 1112, the red R and blue B rays are bent at 90°, and the green G ray travels straight. Thus, the respective color images are combined, and a color image is projected onto a screen etc. through a projection lens 1114. In addition, electronic apparatuses to which the present invention can be applied include an engineering workstation (EWS), a pager or a portable telephone, a word processor, a television, a view-finder or monitor-direct-view video-cassette recorder, an electronic pocketbook, an electronic desk calculator, a car-navigation system, a POS terminal, an apparatus with a touch panel, and so on. [Industrial Applicability] The present invention relates to an active-matrix-substrate inspecting method, an active matrix substrate, a liquid crystal device, and an electronic apparatus, and in particular, to techniques for inspecting a type of active matrix substrate in which a digital type digital data-line driver (driver in which a digital signal is input and converted from digital to analog form to output an analog signal for driving data lines: hereinafter referred to as a "digital driver") is formed on the substrate.

Claims: An active matrix substrate, comprising: a plurality of data lines and a plurality of scanning lines, a plurality of pixels provided at intersections of the data lines and the scanning lines; a digital data line driver (330) for driving the plurality of data lines; a plurality of switching devices (M1), each switching device being provided for a respective one of the pixels; a plurality of storage capacitors (CS1) for storing signals received from the digital data line driver via a corresponding data line and switching device, each pixel having one of the plurality of storage capacitors in a substrate condition; and an inspection circuit (342) provided at ends of the plurality of data lines opposite to said digital data line driver, the inspection circuit being arranged to perform inspection of a signal stored by a storage capacitor of a pixel when an output terminal of the digital data line driver is in a high impedance condition. An active matrix substrate according to claim 1, the data line driver having an output off function. An active matrix substrate according to claim 1 or claim 2, the inspection circuit being provided at ends of the plurality of data lines opposite to the data line driver; and the inspection circuit including bidirectional switches each of which is provided for a respective data line of the plurality of data lines and control means for controlling the switching of the bidirectional switches. An active matrix substrate according to any one of claims 1 to 3, elements of the inspection circuit and elements of the data line driver having a D/A converter being produced by an identical production process. An active matrix substrate according to any one of claims 1 to 4, the data line driver having a D/A converter having a switch in an output unit thereof, and the switch enabling the output terminal to be in a high-impedance condition when the switch is opened. An active matrix substrate according to any one of claims 1 to 5, the data line driver having a D/A converter including at least one of a switched capacitor D/A converter, a resistor ladder D/A converter and a PWM D/A converter. An active matrix substrate according to claim 3, the control means of the inspection circuit performing point-at-a-time scanning of the bidirectional switches. An active matrix substrate according to claim 3, wherein, when the number of the bidirectional switches is M, where M is a natural number of at least 2, the control means of the inspection circuit repeatedly performs simultaneous driving of P bidirectional switches Q times, where P and Q are natural numbers, thereby driving M bidirectional switches in total, where M=P x Q. An active matrix substrate according to any one of claims 1 to 6, at least a part of the inspection circuit being disposed in a space which is in the active matrix substrate but does not contribute to realise functions, such as displaying an image. An active matrix substrate according to claim 9, the inspection circuit being disposed in a sealing position where sealing material is to be disposed in a panel production process. An active matrix substrate according to any one of claims 1 to 10, the inspection circuit and the data line driver being divided into plural pieces. An active matrix substrate according to claim 11, the inspection circuit being separated into at least a first inspection circuit and a second inspection circuit, the data line driver being separated into at least a first data line driver and second data line driver, the first data line driver and the first inspection circuit being disposed with the plurality of data lines provided therebetween, and the second data line driver and the second inspection circuit being disposed with the plurality of data lines provided therebetween, the first data line driver and the second inspection circuit being disposed at identical ends of a first set of the plurality of data lines, and the second data line driver and the first inspection circuit being disposed at identical ends of the plurality of data lines. A method for inspecting the active matrix substrate as set forth in any one of the preceding claims comprising the steps of: writing signals in the storage capacitors by using the data line driver; causing the output terminal of the data line driver to be in a high-impedance condition; and acquiring a basic signal to be a basis of inspection by reading the signals written in the storage capacitors with the inspection circuit, and inspecting an active matrix unit based on the acquired basic signal. A method for inspecting an active matrix substrate according to claim 13, wherein the inspection of output function of said digital driver and the disconnection inspection of said data lines are performed before each step set forth in claim 13 is executed. A method for inspecting an active matrix substrate according to claim 13, wherein the step of inspecting the active matrix unit, based on the acquired basic signal includes the step of evaluating the two-dimensional distribution of the basic signal characteristics in said active matrix unit. A method for inspecting an active matrix substrate according to claim 13, wherein the step of inspecting the active matrix unit, based on the acquired basic signal includes the step of comparing the acquired basic signal with a prepared sample signal. A liquid crystal device including an active matrix substrate as set forth in any one of claims 1 to 12. An electronic apparatus including a liquid crystal device as set forth in claim 17.

Inventors: MATSUEDA YOJIRO, MATSUEDA, YOJIRO, MATSUEDA, Yojiro, Seiko Epson Corporation
Applicants: SEIKO EPSON CORP, SEIKO EPSON CORPORATION
Application year: 1998
Main classification: G09G3
IPC codes: G02F1, G09G3, H03M1, G09F9