FRAME CONVERSION

Abstract: A frame conversion device for switching from a plurality of image signals which are not synchronous and in the meantime outputting each image signal continuously and synchronously, and extracting a desired signal from such continuous image signal formed by these signals and then outputting it can be performed in parallel, is realized. The frame conversion device comprises a frame conversion unit (10, 20) for recording an image signal optionally selected from a plurality of input image signals, and a frame unit (40) for reproducing a recorded signal outputted from the frame conversion unit (10, 20) independently of the operation of the frame conversion unit (10, 20), wherein the frame conversion unit (10, 20) includes an identification signal assigning part (14, 24) which assigns an identification signal to a non-image region of an image signal selected from a plurality of input signals (CAM1-CAM4), a plurality of frame-converting storage parts (16, 26) which store the selected image signal, and a signal output part (31, 32) which selectively reads the image signal stored in each frame-converting storage means (16, 26), and wherein the frame unit (40) includes an identification signal detecting part (42) which detects the identification signal included in the image signal produced in the frame conversion unit (10, 20), a reproduction controlling part (44) which extracts a frame timing of the image signal assigned a predetermined identification signal, and a recording storage part (45) which, at the extracted frame timing, stores an image signal corresponding to the predetermined identification signal and continuously outputs the image signal.

Description: Frame conversion. The invention relates to a frame converting device having a function to continuously output a plurality of image signals in a synchronized state while switching the image signals from a plurality of asynchronous inputs, and a function to extract a desired one of the continuous image signals from such plural inputs and outputs the extracted signal, and particularly, to improvement of a monitoring function when reproducing a recorded signal. A known image switcher switches image signals from a plurality of cameras and the like and outputs the signals as one image signal. In switching such image signals, the input image signals from the cameras are often asynchronous with each other, but the disturbance of synchronous signals in the output image signals is inconvenient. In such case, all the input image signals are synchronized in advance by using a camera having a TBC (Time Base Corrector) function. Otherwise, asynchronous-synchronous conversion must be performed for each input by using a frame-converting device having a frame memory. First problem: a camera having the TBC function is expensive, and therefore it is difficult to use the camera in a low-price route. Further, in the frame-converting device, the number of frame memories is the same as that of input image signals. While an image signal is stored into one of the frame memories, reading from another frame memory is performed. Second problem: this type of device selects a either one of a first operation to switch the image signals from the plurality of cameras to outputs them as one image signal and to perform monitor display or VCR recording, or a second operation to extract a desired image signal from image signals from the plurality of cameras, switched to form one signal, and reproduced on a VCR or the like, and to perform display based on the extracted signal on the monitor. In such frame-converting device, the number of frame memories must be the same as that of input image signals. This increases the price of the device. Further, the monitor display, and the VCR recording operation and cannot be performed in parallel to the VCR reproduction operation. The present invention has been made to solve or at least mitigate the above- described problems, and has its object to realize a frame converting device which performs a first operation to continuously output a plurality of image signals in a synchronized state while switching the respective asynchronous image signals, by using fewer frame memories than the number of input image signals, in parallel to a second operation to extract a desired image signal from image signals switched to form one signal, and to output the extracted signal. Accordingly, a first aspect of the present invention provides a frame conversion device as recited in claim 1. Advantageous embodiments are defined in the dependent claims. This frame converting device time-divisionally stores and reads a plurality of image signals by means of less frame-conversion storage means than input image signals while switching the signal input means and the signal output means. Thus the device continuously outputs the image signals in a synchronized state while switching a plurality of asynchronous image signals with less frame memories than input signals. Further, the device detects the identification signals included in the image signals in frame units, extracts frame timing of an image signal with a predetermined identification signal from the image signals in frame units, stores the image signal of the frame timing, and continuously outputs the image signal. Thus, the device extracts a desired image signal from image signals switched to form one signal, and outputs the extracted image signal. As the device has the recording frame-converting unit and the reproduction frame unit, the device can perform these two operations in parallel. As to claim 3, the frame converting device can record the image signal from the recording frame-converting unit by the VCR, and when the recorded image is reproduced by the VCR, extract a desired image signal from image signals switched to form one signal by the reproduction frame unit. As to claim 4, when a desired image signal is extracted from image, switched to form one signal and outputted the frame-converting device can extract the desired image signal based on input from the operation means. These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter. In the drawings: Fig. 1 is a block diagram of a first embodiment of a frame conversion device according to the invention; Fig. 2 is a block diagram of a second embodiment of a frame conversion device according to the invention; and Fig. 3 is a time chart that, shows an operation statement of a frame conversion device as shown in Fig. 2. The following reference signs are used in the drawings: 1: CPU 11, 21 : switch (signal input means) 13, 23: AT) converter 14, 24: identification signal assigning part 15, 25: switch 16, 26: frame memory (storage means) 17, 27: D/A converter 31, 32: switch (signal output means) 40: frame unit for reproducing 41: A/D converter 42: ID detecting part 43: operating part 44: reproduction controlling part 45: frame memory 46: D/A converter 47: on-screen display part. Next, embodiments of the present invention will be described with reference to attached drawings. Fig. 1 is a block diagram showing the construction of a frame-converting device according to respective embodiments of the present invention. In Fig. 1, the device comprises a recording frame-converting unit having two routes, i.e., a first route (route A) 10 and a second route (route B) 20, each route having four inputs, and a reproduction frame unit 40. That is, the frame converting device of the present invention comprises the recording frame-converting unit and the reproduction frame unit 40 which operate independently of each other. In Fig. 1, reference numeral 1 denotes a CPU as control means for controlling respective elements of the device. The CPU 1 especially controls switching respective switches and controls writing/reading storage means. Numeral 11 denotes a switch as signal input means for switching inputs of four image signals CAM1 to CAM4 (television cameras 1 to 4). Numeral 13 denotes an A/D converter that converts an image signal passed through the switch 11 into a digital image signal. Numeral 14 denotes an identification signal supply unit which supplies an identification signal (ID1 to ID4) to a non-image area (vertical retrace period or the like) of the digital image signal so as to identify from which camera the signal comes Note that the identification signal supply unit 14 includes identification signal generators (ID_1 generator to ID_4 generator) for generating the respective identification signals and a switch 15 Numeral 16 denotes a frame memory as storage means for storing a plurality of switched digital image signals respectively in frame units Note that the frame memory 16 preferably is having independently operative input port and output port switches a memory Numeral 17 denotes a D/A converter that D/A converts the digital image signal read from the frame memory 16 into an analog image signal Note that the switch 11 to the D/A converter 17 constructs the first route (route A) Numeral 21 denotes a switch as signal input means for switching input of four image signals CAM5 to CAM8 (cameras 5 to 8) Numeral 23 denotes an A/D converter that converts the image signal passed through the switch 21 into a digital image signal Numeral 24 denotes an identification signal supply unit which supplies an identification signal (ID5 to ID8) to a non-image area (vertical retrace period or the like) of the digital image signal so as to identify from which camera the signal comes Note that the identification signal supply unit 24 includes identification signal generators (ID 5 generator to ID_8 generator) for generating the respective identification signals and a switch 25 Numeral 26 denotes a frame memory as storage means for storing a plurality of switched digital image signals respectively in frame units Note that the frame memory 26 preferably is having independently operative input port and output port such as a memory Numeral 27 denotes a D/A converter that D/A converts the digital image signal read from the frame memory 26 into an analog image signal Note that the switch 21 to the D/A converter 27 constructs the second route (route B) Further, numeral 31 denotes a monitor output switch as signal output means for alternately reading an image signals stored in the respective frame memories 16 and 26 by alternately switching the route A and the route B and outputting them Further, numeral 32 denotes a VCR output switch for outputting image signals for recording in an external VCR, as signal output means for alternately reading image signals stored in the respective frame memories 16 and 26 by alternately selecting the route A and the route B outputting them Numeral 41 denotes an A/D converter which A/D converts the image signal, that has been sent from the recording frame-converting unit then recorded by the VCR and reproduced by the VCR. Numeral 42 denotes an ID detector that detects the identification signal included in the A D converted digital image signal. Numeral 43 denotes an operation unit for operation of selection to extract a desired image signal. Numeral 44 denotes a reproduction controller which read/write controls the frame memory 45 based on the detected identification signal and the operation of selection, and controls a channel display on an on-screen display in accordance with the detected identification signal. The frame memory 45 is used for storing a desired image signal to reproduce under the control of the reproduction controller 44. Numeral 46 denotes a D/A converter that D/A converts the digital image signal read from the frame memory 45 into an analog image signal. Numeral 47 denotes an on-screen display unit (OSD) which superimpose-outputs a channel display in accordance with the identification signal on the analog image signal, under the control of the reproduction controller 44. Note that the on-screen display unit 47 comprises a character generator, a superimpose circuit and the like. The frame converting device having the above construction can continuously output synchronized image signals by storing respective asynchronous image of eight inputs in the recording frame-converting unit into two frame memories. Further, in parallel to this operation, the device detects the identification signals included in the image signals in frame units, extract frame timing of an image signal with a predetermined identification signal from the image signals in frame units, and the image signal of the frame timing and continuously outputs them. Thus, the device can extract a desired image signal from image signals switched to form one signal and outputs them. Hereinafter, the operation will be described with reference to a timing chart. Note that for the sake of simplification of explanation, description will be made by using a frame converting device shown in Fig. 2 for two inputs, two routes and one output (four input and one output) in each route, as the recording frame-converting unit. In Fig. 2, the elements identical to those in Fig. 1 have the same reference numerals, and overlapped explanation will be omitted. First, the CPU 1 generates a reference synchronizing signal for operating the respective elements of the device. In this case, the reference synchronizing signal may be a synchronizing signal independent of CAM1 to CAM4 or may be a synchronizing signal synchronized with any of CAMl to CAM4. Herein after as an example, a synchronizing signal of the signal CAMl is used as the reference synchronizing signal (Fig. 3(a)). Then the CPU 1 supplies a select A signal to the switch 11 for switching the input in the route A. The select A signal is used to alternately select the image signal from the CAMl and the image signal from the CAM2, in two-frame units. Similarly, the CPU 1 supplies a select B signal to the switch 21 for switching the input in the route B. the select B signal is used to alternately select the image signal from the CAM3 and the image signal from the CAM4, in two-frame units. Further, the select B signal is one-frame phase shifted from the select A signal. In this case, as the select A signal and the select B signal are switched in two- frame units, the asynchronous and inconstant timing image signal for one frame is included in any one of two frame periods. First, when the switch 11 is on the CAMl side in accordance with the select A signal (Fig. 3(b)), the image signal of the CAMl is passed through the switch 11 and converted by the A/D converter 13 into a digital image signal at a timing within the two-frame periods. In parallel to this operation, the identification signal ID_1 from the switch 15, have been switched in accordance with the select A signal, is supplied within the retrace period of the digital image signal. The signal is stored into the frame memory 16 (CAMl in Fig. 3(c)). Further, when the switch 11 is switched to the CAM2 side in accordance with the select A signal, the image signal to the CAM2 is passed through the switch 11 and converted by the A/D converter 13 into a digital image signal at a timing within the two-frame periods. In parallel to this operation, the identification signal LD_2 from the switch 15, have been switched in accordance with the select A signal, is supplied within the retrace period of the digital image signal. The signal is stored into the frame memory 16 (CAM2 in Fig. 3(c)). Further, when the switch 11 is switched to the CAM3 side in accordance with the select B signal (Fig. 3(d)), the image signal of the CAM3 is passed through the switch 21 and converted by the A/D converter 23 into a digital image signal at a timing within the two- frame periods. In parallel to this operation, the identification signal ID_3 from the switch 25, have been switched in accordance with the select B signal, is supplied within the retrace period of the digital image signal. The signal is stored into the frame memory 26 (CAM3 in Fig. 3(e)). Further, when the switch 21 is switched to the CAM4 side in accordance with the select B signal, the image signal of the CAM 4 is passed through the switch 21 and converted by the A/D converter 23 into a digital image signal at a timing within the two-frame periods. Then, in parallel to this operation, the identification signal ID 4 from the switch 25, switched in accordance with the select B signal, is supplied which the retrace period of the digital image signal. The signal is stored into the frame memory 26 (CAM4 in Fig. 3(c)). Further, reading from the frame memory 16 is performed at a timing of the last one frame within the respective two frame periods of the select A signal, based on the synchronizing signal (Fig. 3(a)). That is, when the select A signal is the CAMl in the last one frame period of the CAMl, the digital image signal of the CAMl is read from the frame memory 16 (CAMl in Fig. 3(f)). Further, when the select A signal in the last one frame period of the CAM2, the digital image signal of the CAM2 is read from the frame memory 16 (CAM2 in Fig. (f)). Note that the read digital image signal is converted by the D/A converter 17 into an analog image signal. Similarly, reading from the frame memory 26 is performed at a timing of the last one frame within the respective two frame periods of the select B signal, based on the synchronizing signal (Fig. 3(a)). That is, when the select B signal is in the last one frame period of the CAM3, the digital image signal of the CAM3 is read from the frame memory 26 (CAM3 in Fig. 3(g)). Further, when the select B signal is in the last one frame period of the CAM4, the digital image signal of the CAM4 is read from the frame memory 26 (CAM4 in Fig. (g)). Note that the read digital image signal is converted by the D/A converter 27 into an analog image signal. Then, the switch 31 is controlled to be switched for each one frame in synchronization with the synchronizing signal (Fig. 3(a)). As shown in Fig. 3(h), as the monitor output, an image signal in a synchronized state for each one frame, as CAMl CAM2 CAM3 CAM4.... is outputted. Further, the switch 32 is controlled to be switched for each one frame in synchronization with the synchronizing signal (Fig. 3(a)). As shown in Fig. 3(h), as the VCR output, an image signal in a synchronized state for each one frame, as CAMl CAM2 CAM3 CAM4.... is outputted. The monitor display is performed on an external display or the like by using the image signal. In this manner, the frame converting can device continuously outputs sequentially switched image signals in a synchronized state by storing four asynchronous output image signals into two frame memories. The recording is made by the external VCR based on the image signal. At this time, the recording of the external VCR is continuously made. Then, as the respective image signals are provided with the identification signal, it is possible to superpose a camera number or the like on a displayed image, for example, by utilizing the identification signals without recording character information indicative of the camera number or the like on a recording medium for the VCR, on the display device side which receives the monitor output or the VCR device side which receives the VCR output. Note that this construction can prevent miss of image information on the recording medium in comparison with a case of recording character information. Further, in the VCR device, it is possible to extract only an image of a desired camera from a signal recorded on a tape. That is, is reproduced the image tape where the signal from the recording frame-converting unit is recorded, and the reproduced image signal is supplied to a VCR input (the input side of the A D converter 41). Fig. 3(i) shows the image signal reproduced in this case. Note that input of the image signal into the A/D converter 41 is made independently of the operation of the recording frame-converting unit. Then, assuming that selection has been made at the operation unit 43 to select a channel 1 (CAMl), the reproduction controller 44 refers to the result of detection by the ID detector 42. Then the reproduction controller 44 performs read/write control on the frame memory 45, such that if the identification signal of the signal CAMl has been detected, the signal is written into the frame memory 45, on the other hand, if the identification signal of other signal than the CAMl, the selected signal is read from the frame memory 45 (Fig. 3(j)). Then, the digital image signal read from the frame memory 45 is D/A converted and outputted as an analog image signal. Further, on the on-screen display unit 47, display indicating that the image is based on the signal of the CAMl (channel display) is superimposed at a predetermined position in the image. In such manner, the image signal of the CAMl selected from the operation unit 43 is extracted, and continuously outputted to a PB monitor output. Note that as the PB monitor output is obtained independently of the operation of the recording frame-converting unit, the VCR recording can be performed in parallel to the VCR reproduction. Note that the description has been made as an example where four inputs of image signals are switched, however, even in case of eight inputs of image signals as shown in Fig. 1, image signals, sequentially switched in a synchronized state, can be outputted. Further, even if the number of CAM inputs is greater, the operation can be made without any problem. Further, in the example, the CAM input image signals are in an asynchronous state, however, even if synchronous image signals are inputted, the operation can be made λvithout any problem. Further, the asynchronous image signals from cameras have been used as the CAMl to CAM4, however, devices which generate various image signals can be employed as well as the television cameras. Further, in the above description, the CAMl is extracted in the reproduction frame unit 40, however, the image signal may be switched for another CAM image signal at arbitrary timing. Further, it may be arranged such that, if any operation has not been performed since the power was turned on, display is performed based on a predetermined image signal or an image signal with the least number. Further, display may be performed by switching the signals as CAMl CAM2 CAM3 CAM4 CAMl.... in predetermined second (a predetermined number of frames) units. That is, if the image signal from the VCR in Fig. 3(i) is used, the image signal is switched for each one frame and the display cannot be visible. However, if display is switched every several seconds, the situation of respective CAM inputs can be obtained. As described in detail above, the frame converting device described in this specification time-divisionally stores and reads a plurality of image signals with respect to a plurality of storage means fewer than the input image signals while switching the signal input means and the signal output means at predetermined timing. Thus, the device continuously outputs the image signals in a synchronized state while switching the asynchronous image signals. Further, the frame converting device detects identification signals included in the image signals in frame units, extract frame timing of an image signal with a predetermined identification signal from the image signals in frame units, and stores and continuously outputs the image signal of the frame timing. Thus, the device extracts and outputs a desired image signal from image signals switched to form one signal. Further, as the frame converting device of the present invention comprises a recording frame-converting unit and a reproduction frame unit, the two conversion processing operations can be realized, independently, and further in parallel in accordance with necessity, by one frame converting device, without preparing a frame converting device for recording and a frame converting device for reproduction. It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of other elements or steps than those listed in a claim. The invention can be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the device claim enumerating several means, several of these means can be embodied by one and the same item of hardware

Claims: CLAIMS. 1. A frame conversion device, comprising: a frame conversion unit (10, 20) for recording an image signal optionally selected from a plurality of input image signals (CAM1-CAM4); and a frame unit (40) for reproducing a recorded signal outputted from the frame conversion unit (10, 20) independently of the operation of the frame conversion unit (10, 20), wherein the frame conversion unit (10, 20) includes: a plurality of signal input means (11, 21) for obtaining a selected image signal from at least one image signal, identification signal assigning means (14, 24) for assigning to a non-image region of the selected image signal an identification signal for identifying the selected image signal, a plurality of frame-converting storage means (16, 26) for storing the selected image signal, and signal output means (31, 32) for selectively reading and then outputting the image signal stored in the plurality of frame-converting storage means (16, 26), and wherein the frame unit (40) includes: identification signal detecting means (42) for detecting the identification signal included in the image signal in a unit of frame produced in the frame conversion unit (10, 20), reproduction controlling means (44) for extracting a frame timing of the image signal assigned a predetermined identification signal from the image signals in a unit of frame, and storage means (45) for, at the frame timing extracted by the reproduction controlling means (44), storing an image signal corresponding to the predetermined identification signal and for continuously outputting said image signal. 2. A frame conversion device as claimed in claim 1, characterized by comprising a character generating means (47) for superimposing on the image signal stored in and then outputted from the storage means (45) to reproduce a display of character based on the identification signal included in said image signal. 3. A frame conversion device as claimed in claim 1, characterized in that the image signal supplied to the frame unit (40) is a signal from a video cassette recorder which records and reproduces the image signal outputted from the frame conversion unit (10, 20). 4. A frame conversion device as claimed in claim 1, characterized in that the frame timing of the image signal to which a predetermined identification signal to be extracted by the reproduction controlling means (44) is assigned, is based on an input operation from operating means (43). 5. A frame conversion method, comprising: obtaining (11, 21) a selected image signal from at least one image signal (CAM1-CAM4); assigning (14, 24) to a non-image region of the selected image signal an identification signal for identifying the selected image signal, storing (16, 26) the selected image signal, and selectively reading and then outputting (31, 32) the stored image signal, and independently of the above-mentioned steps: detecting (42) the identification signal included in the image signal; extracting (44) a frame timing of the image signal assigned a predetermined identification signal from the image signals in a frame, and storing (45) an image signal corresponding to the predetermined identification signal at the extracted frame timing, and continuously outputting said image signal.

Inventors: INABA YASUTAKE, YAMAMOTO MITAUO, YOSHIDA KOZO, INABA, YASUTAKE, YAMAMOTO, MITAUO, YOSHIDA, KOZO
Applicants: KONINKL PHILIPS ELECTRONICS NV, PHILIPS SVENSKA AB, KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS AB
Application year: 1998
Main classification: H04N5
IPC codes: G09G5, H04N5