Semiconductor apparatus, circuit board and combination thereof

Abstract: A semiconductor apparatus (40) includes a first set of connection terminals (46) and a second set of connection terminals (48). One ends of the first and second sets of connection terminals (46 and 48) are connected to a semiconductor chip (41). The other ends of the first set of connection terminals (46) are connected onto a first connection plane (50) outside of a package (42). The other ends of the second set of connection terminals (48) are connected onto a second connection plane (52) outside of the package (42).

Description: CROSS REFERENCE TO RELATED APPLICATION This application claims the priority of Application No. H09-042775, filed February 27, 1997 in Japan, the subject matter of which is incorporated herein by reference. TECHNICAL FIELD OF THE INVENTION The present invention relates to a semiconductor apparatus, and more particularly to a package design and mounting technique of a semiconductor apparatus. BACKGROUND OF THE INVENTION In most cases, semiconductor chips are incorporated into an individual protective package, connected onto a printed circuit board. In a conventional semiconductor apparatus, external terminals (connection terminals) extending from the protective package are bonded onto a flat plane of the printed circuit board. For example, in a flat package, leads (connection terminals) are bonded around the package onto the surface of the printed circuit board. The pitch (spacing) between two adjacent leads is designed to be small, such as 1.27 mm, so as to contribute to increasing the number of leads (terminals). Such a package is designed small in size and is shaped almost square, so that connecting lines (inner leads) in the package can be designed to have the same length; and therefore, it is easy to control impedance thereof. Such package design is useful for a high performance semiconductor apparatus. According to the conventional semiconductor apparatus, the connection terminals are connected onto the single plane of the printed circuit board, so that it is required to narrow the pitch between two adjacent terminals in order to increase the number of terminals. The pitch of the connection terminals is basically defined by the mounting technique, for example, 0.3 mm of pitch would be the minimum for QFP in reflow solder-bonding technique. Accordingly, in order to increase the number of the connection terminals, it is the only way to make a pitch of terminals narrower than 0.3 mm. According to the current mounting technology, however, it is difficult to mount the semiconductor apparatus, having the connection terminals with a pitch of less than 0.3 mm, onto the printed circuit board. US 4,530,003 describes a semiconductor device comprising a chip carrier housing for packaging at least one semiconductor chip and a plurality of connection leads electrically connected to the semiconductor chip. The first set of connection leads are arranged gradually in a horizontal plane and the second set of connection leads are formed as vertically oriented lead pins. US 5,450,289 discloses an arrangement for vertically mounting a semiconductor device to a printed circuit board in which a plurality of sequentially arranged external leads of the semiconductor device includes at least two different sets of non-consecutive ones of the external leads which have laterally outwardly extending foot portions lying in respective, vertically spaced-apart planes and in which the foot portions of the first and second one of the sets of non-consecutive external leads are respectively secured to respective first and second steps formed in one of a plurality of walls defining a cavity in the printed circuit board and a third set of the non-consecutive external leads are secured to a portion of a major surface of the printed circuit board adjacent the cavity. The published international application WO 97/02596 A discloses a surface-acoustic wave device comprising a package containing the electronic device therein and further including a resin substrate having a bottom surface serving as a first interconnection plate to which a set of connection terminals is attached. At least one side surface of connection terminal 2 has depressed portions serving as a second set of connection terminals arranged in a second connection plane. European patent application No. 0 113 292 A1 describes a base for an integrated circuit. The invention comprises at least two ranges of line outputs disposed in regular intervals according to a given pace on the circumference of a casing. These line outputs represent ending parts rising above the said casing in order to guarantee the connection to a load circuit with ranges shifted coherently one to the other. The article "A Mixed Solder Grip Array and Peripheral Leaded MCM Package" by Hassan Hashemi et al. (1994) teaches about MultiChip Module (MCM) package to house a 40MHz Digital Signal Processor Static RAM chipset. The package concept is that of a MCM-L substrate with more than one chip, where the chips are connected to the substrate by means if conventional gold wire bonding and the part is overmolded. A mix of solder balls and peripheral leads are used to interface to the package. The mix of package connectorization approaches is used to increase the routing resources, decouple the signal an power/ground distribution, and provide good terminal coupling between the package an the next level board. OBJECTS OF THE INVENTION Accordingly, an object of the invention is to provide a semiconductor apparatus which can be easily mounted onto a circuit board even though connection terminals are increased in number. Another object of the invention is to provide a circuit board that contributes to increase the number of connection terminals of a semiconductor apparatus. Additional objects, advantages and novel features of the invention will be set forth in part in the description that follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims. SUMMARY OF THE INVENTION According to the invention, a combination of a semiconductor apparatus and a circuit board as defined in claim 1 is provided. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a side view illustrating a conventional semiconductor apparatus. Fig. 2 is a side view illustrating a conventional semiconductor apparatus. Fig. 3 is a side view illustrating a conventional semiconductor apparatus. Fig. 4 is a side view illustrating a conventional semiconductor apparatus mounted directly onto a printed circuit board. Fig. 5 is a side view illustrating a conventional semiconductor apparatus mounted directly onto a printed circuit board. Fig. 6 is a side view illustrating a conventional semiconductor apparatus mounted to a printed circuit board with insert-mounting technique. Fig. 7 is a side view illustrating a semiconductor apparatus according to a preferred embodiment of the invention. Fig. 8 is a perspective view illustrating the semiconductor apparatus, shown in Fig. 7. Fig. 9 is a side view illustrating the semiconductor apparatus, shown in Figs. 7 and 8, mounted directly onto a printed circuit board. Fig. 10 is a side view illustrating the semiconductor apparatus, shown in Figs. 7 and 8, mounted to a printed circuit board. Fig. 11 is a side view illustrating a semiconductor apparatus according to an example of the invention. Fig. 12 is a side view illustrating the semiconductor apparatus, shown in Fig. 11, mounted directly onto a printed circuit board. Fig. 13 is a side view illustrating a semiconductor apparatus according to an example of the invention. Fig. 14 is a side view illustrating the semiconductor apparatus, shown in Fig. 13, mounted directly onto a printed circuit board. DETAILED DISCLOSURE OF THE INVENTION For better understanding of the invention, background technology is first described in conjunction with Figs. 1 to 6. Fig. 1 shows a typical conventional package, that is QFP (Quad Flat Package), QFJ (Quad Flat J-Lead), SOJ (Small Outline J-Lead) or the like. In Fig. 1, leads (connection terminals) 12 are arranged with a pitch of 0.8 mm and extend from a resin-molded package 10 outwardly. A semiconductor chip, not shown, is contained in the resin-molded package 10. In such a QFP type of package design, in order to increase the number of leads, a lead pitch (spacing) has been got narrower in the order of 1.0 mm, 0.8 mm, 0.65 mm, 0.5 mm, 0.4 mm to 0.3mm, as shown in Figs. 2 and 3. In Fig. 2, leads (connection terminals) 16 are arranged with a pitch of 0.65 mm and extend from a resin-molded package 14 outwardly. In Fig. 3, leads (connection terminals) 20 are arranged with a pitch of 0.50 mm and extend from a resin-molded package 18 outwardly. Fig. 4 shows a conventional semiconductor apparatus 22 mounted onto a surface of a printed circuit board 26 using surface mounting technique. Each ends of leads 24 are electrically connected onto the printed circuit board 26. Fig. 5 shows a conventional semiconductor apparatus 28 mounted onto a surface of a printed circuit board 26 using surface mounting technique. The semiconductor apparatus (package) 28 is of BGA (Ball Grid Array) type. Fig. 6 shows a conventional semiconductor apparatus 32 mounted onto a surface of a printed circuit board 36 using insert mounting technique. Leads 34, extending from the package (32) are inserted into through-holes of the printed circuit board 36. According to the above mentioned conventional semiconductor apparatuses, the leads (connection terminals) are connected onto the single plane of circuit board, so that it is required to narrow the pitch between two adjacent leads in order to increase the number of leads. Accordingly, in order to increase leads, the only way is to make a pitch of leads narrower than 0.3 mm. According to the current mounting technology, however, it is difficult to mount the semiconductor apparatus, having leads with a pitch of less than 0.3 mm, onto a circuit board. Figs. 7 and 8 show a semiconductor apparatus 40, according to a preferred embodiment of the invention. The semiconductor apparatus 40 includes a semiconductor chip 41, a resin package 42 protecting the semiconductor chip 41, and a resin substrate 44. The resin substrate 44 is shaped to have a bottom surface (first connection plane) 44a and a side surface with depressed portions (second connection plane) 44b. A first set of connection terminals 46 is attached on the bottom surface 44a of the resin substrate 44. A second set of connection terminals 48 is attached on the depressed portions 44b (second connection plane) of the resin substrate 44. The first and second sets of connection terminals 46 and 48 are arranged alternately to each other. The connection terminals 46 of the first set are arranged with a predetermined pitch to have an enough spacing between two adjacent terminals. The first and second sets of connection terminals 46 and 48 are arranged on the different planes 44a and 44b, so that the first and second sets of connection terminals 46 and 48 are completely insulated from each other. As a result, the different signals are transmitted through the first and second sets of connection terminals 46 and 48. The semiconductor apparatus 40 can be fabricated by conventional technique. Fig. 9 shows the semiconductor apparatus 40 mounted directly onto first and second printed-circuit boards 50 and 52. Having two different planes of circuit boards is one feature of the invention. The first printed-circuit board 50 is designed to have a horizontal upper surface. The second printed-circuit board 52 is arranged perpendicularly to the first printed-circuit board 50. The first and second printed-circuit board 50 and 52 are provided with wiring patterns (not shown) at locations corresponding to the first and second connection terminals 46 and 48. In fabrication (mounting process), the semiconductor apparatus 40 is first placed on the first printed-circuit board 50, then the first set of connection terminals 46 is electrically connected with adhesive material onto the wiring pattern of the first printed-circuit board 50. Next, the second set of connection terminals 48 is electrically connected with the adhesive material 54 onto the wiring pattern of the second printed-circuit board 52. The second set of connection terminals 48 is provided on the depressed plane 44b (second connection plane) of the resin substrate 44, and is electrically connected to the wiring pattern of the second printed-circuit board 52. In this process, the adhesive material 54 is partially inserted into the second set of connection terminals 48 that is shaped to be concave. Fig. 10 shows the semiconductor apparatus 40 mounted onto a printed-circuit board 60 using a socket 58. In the socket 58, contact pins 62 and 64 are connected to the first and second sets of connection terminals 46 and 48, respectively. The contact pins 62 and 64 extend out of the socket 58 to function as external pins. The contact pins 62 are arranged to face the first set of connection terminals 46 of the semiconductor apparatus 40, and the contact pins 64 are arranged to face the second set of connection terminals 48. The contact pins 62 are shaped to have flat tops 62a to be in contact with the first set of connection terminals 46, and the contact pins 64 are shaped to have guide portions 64a to be in contact with the second set of connection terminals 48. In fabrication (mounting process), the socket 58 is connected through the contact pins 62 and 64 to the printed-circuit board 60 in advance. Next, the semiconductor apparatus 40 is mounted into the socket 58, then the first set of connection terminals 46 is electrically connected to the contact pins 62 with adhesive material, and the second set of connection terminals 48 is electrically connected to the contact pins 64 with adhesive material 54. The adhesive material 54 may be put in advance onto the first and second sets of connection terminals 46 and 48, then the semiconductor apparatus 40 with the adhesive material 54 may be placed into the socket 58. As described above, according to the semiconductor apparatus 40 of the preferred embodiment, the first set of connection terminals 46 is arranged at the bottom surface (projected plane) 44a of the resin substrate 44, and the second set of connection terminals 48 is arranged on the second plane 44b, so that the semiconductor apparatus 40 can be provided with many terminals arranged with a narrow pitch. According to the conventional way, in which the terminals are connected onto a single plane of circuit board, it is difficult to mount the semiconductor apparatus having connection terminals with a less than 0.3 mm pitch, onto the circuit board. In contrast, according to the embodiment, the first and second sets of connection terminals 46 and 48 are connected to the different planes 50 and 52 (62a and 64a), so that the connection terminals 46 and 48 can be completely insulated from each other. Therefore, the pitch of the connection terminals in the package 42 can be narrowed and more terminals can be used for the semiconductor apparatus. According to the preferred embodiment, the first and second sets of connection terminals 46 and 48 are connected to the different planes 44a and 44b, so that the number of connection terminals 46 and 48 can be easily increased without narrowing the pitch of the terminals on the circuit board 50 (60). In other words, even if the connection terminals 46 and 48 are tightly arranged in the package 42, the connection terminals 46 and 48 can be arranged with enough spacing outside the package 42. Fig. 11 shows a semiconductor apparatus 70 according to an example of the invention. Fig. 12 shows the semiconductor apparatus 70 mounted onto first and second printed-circuit board 78 and 79. The semiconductor apparatus 70 includes a resin package 72 containing a semiconductor chip, not shown, a first set of connection terminals (leads) 74, and a second set of connection terminals (leads) 76. The first and second sets of connection terminals 74 and 76 extend from the package 72 toward a first plane A and a second plane B, respectively. The first and second sets of connection terminals 74 and 76 are arranged alternately to each other. The second plane B is arranged to be perpendicular to the plane A. The ends of the first set of connection terminals 74 are connected to the semiconductor chip in the resin package 72, and the other ends are perpendicularly bent to increase the area being in contact with the first plane A. The ends of the second set of connection terminals 76 are connected to the semiconductor chip in the resin package 72, and the other ends are perpendicularly bent to increase the area being in contact with the second plane B. According to the above described semiconductor apparatus 70, if the pitch of each set of terminals is designed to be 0.5 mm, the two adjacent terminals would have a spacing (pitch) of 0.25 mm in the resin package 72. Referring now to Fig. 12, the semiconductor apparatus 70 is mounted to first and second printed-circuit boards 78 and 79. The first and second printed-circuit boards 78 and 79 are provided with wiring patterns (not shown) at locations corresponding to the connection terminals 74 and 76. In fabrication (mounting process), the semiconductor apparatus 70 is placed on the first printed-circuit board 78, then the first set of connection terminals 74 is electrically connected with adhesive material onto the wiring pattern of the first printed-circuit board 78. Next, the second set of connection terminals 76 is electrically connected with the adhesive material onto the wiring pattern of the second printed-circuit board 79. The first and second printed-circuit boards 78 and 79 correspond to the first and second planes A and B, in Fig. 11. According to the above described example even if the pitch of each set of connection terminals 74 and 76 is designed to be 0.25 mm in the resin package 72, the two adjacent terminals to be connected onto the printed-circuit boards 78 and 79 would have a spacing (pitch) of 0.5 mm, and therefore, the semiconductor apparatus 70 is easily mounted. Fig. 13 shows a semiconductor apparatus 80 according to another example of the invention. Fig. 14 shows the semiconductor apparatus 80 mounted directly onto first and second printed-circuit boards 88 and 89. The semiconductor apparatus 80 includes a resin package 82 containing a semiconductor chip (not shown); a first set of connection terminals (leads) 84 extending from the resin package 82 toward a lower plane A (first plane); and a second set of connection terminals 86 extending from the resin package 82 parallel to a plane C (second plane). The first and second sets of connection terminals 84 and 86 are arranged alternately to each other. The first set of connection terminals 84 are shaped to have perpendicularly-bent ends to increase the area to be in contact with the plane A. The plane C is arranged perpendicular to the plane A. The second set of connection terminals 86 are in contact with the plane C without spacing between them. In the third preferred embodiment, if the pitch of each connection terminals 84 and 86 is designed to be 0.5 mm, the two adjacent terminals would have a spacing (pitch) of 0.25 mm in the resin package 82. Referring now to Fig. 14, the first and second printed-circuit boards 88 and 89 correspond to the first and second planes A and C, respectively. The first and second planes A and C are arranged parallel to each other. The first and second printed-circuit boards 88 and 89 are provided with wiring patterns (not shown) at locations corresponding to the connection terminals 84 and 86. In fabrication (mounting process), the semiconductor apparatus 80 is first placed on the first printed-circuit board 88, then the first set of connection terminals 84 is electrically connected with adhesive material onto the wiring pattern of the printed-circuit board 88. Next, the second set of connection terminals 86 is electrically connected with the adhesive material onto the wiring pattern of the second printed-circuit board 89. As described above, in the semiconductor apparatus 80, according to this example even if the pitch of the first and second set of connection terminals 84 and 86 is designed to be 0.25 mm in the resin package 82, the two adjacent terminals to be connected onto the printed-circuit boards 88 and 89 would have a spacing (pitch) of 0.5 mm. Therefore, the semiconductor apparatus 80 is easily mounted onto the circuit boards 88 and 89. In addition, the first and second printed-circuit boards 88 and 89 are arranged parallel to each other, so that the total thickness can be reduced. According to the invention, the first and second sets of connection terminals are connected to the different planes, so that the number of connection terminals can be easily increased without narrowing the pitch of the terminals on the circuit board. In other words, even if the connection terminals are tightly arranged in the package, the connection terminals can be arranged with enough spacing outside the package. The invention is applicable to any types of semiconductor apparatuses and any types of packages. It is clear that the pitch of the connection terminals is not limited by the above described embodiments. Fabrication process, the type of the chip substrate, the number of terminals, the arrangement of the package, not limited by the above described embodiment, and examples.

Claims: A combination of a semiconductor apparatus (40) and of a circuit board, wherein said semiconductor apparatus (40) comprises: a package (42) containing a semiconductor chip (41) inside, and a resin substrate (44) having a bottom surface (44a) serving as a first connection plane to which a first set of connection terminals (46) is attached, said resin substrate (44) having at least one side surface with depressed portions (44b) arranged in a second connection plane to which a second set of connection terminals (48) is attached, the first (46) and second set (48) of connection terminals are completely insulated from each other, and said circuit board comprises: a first printed-circuit board (50) having a horizontal upper surface serving as a first connection plane comprising a first wiring pattern, a second printed circuit board (52) arranged perpendicular to the first printed-circuit board (50) and having a vertical surface thereof serving as a second connection plane comprising a second wiring pattern, and wherein said first set of connection terminals (46) is electrically connected to said first wiring pattern, and said second set of connection terminals (48) is electrically connected to said second wiring pattern. The combination according to claim 1, wherein the first and second connecting planes are arranged perpendicular to each other. The combination according to claims 1 or 2, wherein the resin substrate (44) is of rectangular shape and comprises depressed portions (44b) on all four side faces thereof.

Inventors: KOBAYASHI HARUFUMI, KOBAYASHI, HARUFUMI
Applicants: OKI ELECTRIC IND CO LTD, OKI ELECTRIC INDUSTRY CO., LTD.
Application year: 1998
Main classification: H01L23
IPC codes: H01L23, H05K1