DEVICE FOR CHANGING LEVEL OF ANALOG SIGNAL

Abstract: The invention relates to a device for raising the level of an analog voltage. In the invention, the pulse frequency or pulse width of a pulse signal coupled through a transformer (T1) of a high-frequency chopper circuit is modulated by the amplitude of a low-frequency analog alternating voltage signal (Vin). The intermediate tap (12) of the secondary winding (M2) of the transformer is connected through a coil (L1) to the output of the device. A negative (D5), and, respectively, a positive (D4) rectifying element is connected to the ends of the secondary winding (M2). One of the rectifying elements is switched on in the positive half cycle of the analog input signal, and the other in the negative half cycle. As a result the waveform of an analog voltage provided at the output of the device follows the waveform of the analog input signal, the peak-to-peak amplitude of the output signal being approximately equal to the voltage amplitude across the secondary coil. The signal distortion can be reduced by feed-back.

Description: DEVICE FOR CHANGING LEVEL OF ANALOG SIGNAL FIELD OF THE INVENTION The invention relates to a device for raising the level of an analog voltage. BACKGROUND OF THE INVENTION Conventional manners of raising the level of a low-level alternating voltage signal, such as a sinusoidal signal, include various amplifier and transformer circuits. Particularly in battery-driven devices whose operating voltage is e.g. in the range 5 to 24 V, the problem is to generate voltage levels that are considerably higher than the operating voltage. Typically, chopper circuits have been used to form higher direct voltages of the battery voltage. Certain amplifier solutions enable a sinusoidal alternating voltage to be amplified in such a way that the peak-to-peak voltage of a signal at the amplifier output is higher than the operating voltage. Transformers have also been used for raising the level of an analog signal, the signal level being changed in proportion to the number of turns of the primary and secondary windings. The voltage levels achieved by amplifier circuits are, however, relatively low (about 2 x operating voltage), whereas the problem in transformer circuits is poor load capacity, which causes considerable distortion in the alternating voltage. However, applications requiring quite high, low-distortion, sinusoidal alternating voltages generated at a low operating voltage do exist. Such applications include e.g. battery-driven or battery-backupped telephone systems in which a ringing voltage of 25 Hz 75 VAC should be generated out of the battery voltage. An- other typical application is the generation of a mains voltage of 230 VAC 50 Hz out of e.g. a 12 V battery. DISCLOSURE OF THE INVENTION The object of the invention is a device for generating high alternating voltages out of a low operating voltage with low distortion. This is achieved with a device for changing the level of an analog alternating voltage signal, the device according to the invention being characterized in that it comprises a high-frequency chopper circuit for modulating the pulse width or pulse frequency of a high-frequency pulse signal to be fed into the primary side of a transformer by using a low-frequency analog input signal, and the secondary winding of the transformer having an intermediate tap, an LC circuit comprising an inductive component connected in series between the intermediate tap of the secondary winding of the transformer and the output of the device, a first rectifier, operationally connected to a first end of the secondary winding of the transformer, a second rectifier, operationally connected to a second end of the secondary winding of the transformer in opposite polarity with respect to the first rectifier, and a control circuit for activating the first rectifier only in a negative half cycle of the analog input signal and for activating the second rectifier only in a positive half cycle of the analog input signal. In the invention, a high-frequency chopper circuit (a switched mode circuit) is modulated by a lower-frequency analog alternating voltage signal whose level is to be raised or lowered. As a result, the pulse width or pulse frequency of a pulse signal to be coupled through the transformer of the chopper circuit, and, consequently, energy, is in proportion to the amplitude of the incoming analog signal. The secondary winding of the transformer of the chopper circuit is provided with an intermediate tap, coupled via an LC circuit to the output of the device. A high-frequency voltage is created across the secondary winding, the level of the voltage depending on the transformation ratio of the transformer. A negative and, respectively, a positive rectifying element is connected to the ends of the secondary winding, one of the elements being controlled to be switched on in the positive half cycle of the analog input signal and the other in its negative half cycle. In this way the energy fed through the secondary winding is alternately charged to the LC circuit and discharged therefrom, depending on which rectifying element is conductive. This way the output of the device is provided with an analog voltage whose wave- form follows the waveform of the original analog input signal, but whose peak- to-peak amplitude is of the same size as the voltage amplitude across the secondary winding. By means of the invention, very high-level sinusoidal alternating voltages can be generated or amplified for many purposes with an acceptable signal distortion. The distortion can, however, be further reduced by feeding back the analog output voltage of the device to control one or more primary side direct voltage operating points, critical to the generation of distor- tion. These include e.g. the detection of the zero transition point of the analog input signal; by controlling of the detection point (reference level) by the feedback, the switching of the rectifying elements becomes as accurate as possible. It is also possible to control the primary side pulse width or pulse fre- quency modulation range and, consequently, the amplitude ratio of the input signal and the output signal, by the feedback. In the following the invention will be described in more detailed by means of a preferred embodiment with reference to the attached drawing, in which Figure 1 is a switch diagram of a circuit according to the preferred em- bodiment of the invention. An analog sinusoidal input signal Vin is fed into an input 10 and via a decoupling capacitor C1 to an input buffer amplifier, composed of an operational amplifier A1 and resistors R1 and R2. The output of the amplifier A1 is connected to a zero transition point detector, composed of a differential ampli- fier A2. The output of the amplifier A1 is connected via a series resistor R3 to a full-wave rectifier, composed of Schottky diodes D1 and D2, an operational amplifier A3, an adjustable resistor R4 and a resistor R5. To be precise, the cathode of the diode D1 is connected to the resistor R3 and the anode to the non-inverted input of the amplifier A3 for rectifying the negative half cycle. Similarly, the anode of the diode D2 is connected to the resistor R3 and the cathode to the inverted input of the amplifier A3 for rectifying the positive half cycle. The adjustable resistor R4 is connected between the inputs of the amplifier A3 and is used to control the symmetry of the positive and negative half cycles in the rectification, as will be described below. The resistor R5 provides the negative feedback of the amplifier A3 and determines the amplification of the amplifier A3 together with the resistor R3. A transistor Q1 and a comparator A4 form a pulse width demodulator. A high-frequency (e.g. 100 to 200 kHz) square wave clock signal CLOCK from e.g. a signal generator, is fed into a clock input 11 and via a decoupling capacitor C2 to the base of the PNP transistor Q1. At a collector of a pulse modulator consisting of resistors R7 and R8, and the transistor Q1 , appears a ramp-like triangular wave signal, modulated from the square clock signal CLOCK. The amplitude of the triangular wave signal is between 0V and Vref. The voltage Vref is the emitter voltage of the transistor Q1 and it can be regulated via feedback, as will be described below. The triangular wave signal of the collector of Q1 is applied to the inverting input of the comparator A4. A full-wave rectified signal from the amplifier A3 is connected to the non-inverting input of the comparator A4 via an adjustable resistor R6. The direct current operating point of the full-wave rectified signal in relation to the Vref voltage is adjusted by means of the adjustable resistor R6 from the positive peak value slightly downwards exactly to the point at which the original half cycles of the full-wave rectified sinusoidal signal change. The crossover distortion is then zeroed. The comparator A4 controls a high-frequency chopper circuit, com- posed of transistors Q2, Q3 and F1 and a transformer M1. To be precise, the output stage of the comparator A4 is connected in series to a voltage divider R9, R10, which forms the base circuit of the PNP transistor Q2. The collector of the transistor Q2 is connected to the base of the NPN transistor Q3. The emitter of the transistor Q3 is connected to the gate of the NPN field-effect transistor F1. A Schottky diode D3 is connected between the base and emitter of the transistor Q3. When Q2 is conductive, the PNP transistor F1 receives gate control via the forward-biased Schottky diode D3. Owing to a low threshold voltage, D3 switches off the PNP transistor Q3. When Q2 is no longer conductive, the diode D3 becomes reverse-biased between the base and emitter of the PNP transistor Q3. Q3 then gets base current via a resistor R17 and is conductive. Its emitter rapidly switches down the gate of F3. Q3 thus operates as a current amplifier. The transistor F1 is connected in series with the primary winding M1 of the transformer T1. The intermediate tap 12 of the secondary winding M1 is connected via a series coil L1 to the output 13 of the circuit. A filter capacitor C3 and C4 is connected from each end of the coil L1 to 0V, respectively. The lower end of the secondary winding M2 of the transformer T1 is connected to a rectifying circuit, composed by the series connection of a rectifying diode D4 and an NPN field-effect transistor F2. To be precise, the an- ode of the diode D4 is connected to the secondary winding M2 and the cathode to the drain of the transistor F2. The source of the transistor F2 is connected to 0V. The upper end of the secondary winding M2 of the transformer T1 is connected to a rectifying circuit, composed of the series connection of a rectifying diode D5 and a PNP field-effect transistor F3. To be precise, the cathode of the diode D5 is connected to the secondary winding M2 and the anode to the drain of the transistor F3. The source of the transistor F3 is connected to OV. Thus, the rectifying circuits D4, F2 and D5, F3 are connected in opposite polarities with respect to one another and arranged to rectify the analog input signal in the different half cycles. The control circuit of the rectifying circuits D4, F2 and D5, F3 is composed of transistors Q4 and Q5. The output stage of the zero transition point detector A2 is connected in series with a voltage divider R12, R13, forming the bias of the base circuit of the transistor Q4. The collector of the transistor Q4 is connected to the base of the PNP transistor Q5. A reverse- biased Schottky diode D6 is connected between the base and emitter of the transistor Q5. The emitter of the transistor Q5 is connected to the gate of the NPN field-effect transistor F2. The emitter of Q5 is further connected via a series capacitor C5 to a connection point between Schottky diodes D7 and D8, con- nected in series between the gate of the PNP transistor F3 and OV. In the following the operation of the basic circuit will be described in detail. An incoming low-frequency (e.g. audio frequency, or 25 to 50 Hz) analog input signal is full-wave rectified by the rectifier D1 , D2, A3 and fed into the comparator A4. The comparator A4 compares the amplitude of the low- frequency full-wave rectified signal with the amplitude of a high-frequency triangular wave signal (from the transistor Q1). The output of the comparator A4 controls the NPN transistor F1 to be conductive via the buffer Q2 and Q3 when the level of the full-wave rectified signal falls below the level of a trian- gular wave signal received from the PNP transistor Q1. As a result, the comparator A4 controls the NPN transistor F1 to be conductive at the beginning of each cycle of the triangular wave until the amplitude of the triangular wave has in a ramp-like manner fallen below the amplitude of the full-wave rectified signal. Thereafter the output stage of the amplifier A4 is non-conductive until the amplitude of the triangular wave signal on the falling edge of the clock signal CLOCK has leaped to the value Vref, whereby the cycle ends and the amplitude of the triangular wave again starts to fall from the value Vref towards zero Vout. If the high-frequency clock signal is 100 kHz and the low-frequency analog signal is 50 Hz, this takes place 200 times during each cycle of the analog input signal. In other words, the amplitude and waveform of the input signal are sampled at a sampling frequency of 100 kHz. When the output stage of the comparator A4 is conductive, Q2, Q4 and F1 also conduct and couple the lower end of the winding M1 to the ground potential. When the output stage of the comparator A4 is non-conductive, Q2, Q4 and F1 , too, are non-conductive, the lower end of the winding M1 being in the operating voltage potential. This way the comparator A4 controls the transistors Q2, Q4 and F1 to couple to the primary winding M1 a high-frequency pulse voltage in which the pulse width and consequently the signal energy are in proportion to the amplitude of the incoming analog signal. The pulse-width modulated high-frequency pulse voltage is induced from the primary winding M1 to the secondary winding M2 forming a secondary voltage. The secondary voltage is N2/N1 times higher or lower than the primary voltage (which is about Vcc=12V), wherein N2/N1 is the transformation ratio of the transformer T1 (N1 = the number of turns of the winding M1 , N2 = the number of turns of the winding M2). Let us assume that the sinusoidal input voltage Vin has a positive half cycle, the voltage level in the inverting input of the zero transition point detector A2 being higher than the reference voltage Vref in the non-inverting input. The output stage of the amplifier A2 is thus conductive, i.e. its direct voltage is near zero Vout. This results in the transistors Q4 and F2 being con- ductive, and the transistors Q5 and F3 being non-conductive. To be precise, when Q4 is conductive and controls F2 to conduct, it simultaneously charges the positive terminal (+) of the capacitor C5 to about Vcc. There is only about e.g. 0.3V (Schottky diode) voltage at the anode of the diode since it is conductive. Thus the potential of the negative terminal (-) of the capacitor C5 is also about 0.3V. The diode D7 is not conductive and F3 receives no gate voltage. As a result, a pulse-like high-frequency current flows through the transistor F2, the rectifying diode D4, the lower half of the secondary winding M2, and the coil L1 to the output 13. The voltage across the coil L1 and consequently the output voltage Vout changes with the pulse width (energy) of the pulse current. The high-frequency signal is filtered off by the capacitors C3 and C4, and the remaining "envelope" provides the negative half cycle of the output voltage Vout, the shape of the half cycle following the shape of the input signal. Let us assume that a negative half cycle is starting at the sinusoidal input voltage Vin, the voltage level in the inverting input of the zero transition point detector A2 having fallen below the reference voltage Vref in the non- inverting input. The output stage of the amplifier A2 is thus in a non-conductive state, i.e. its direct voltage is near the operating voltage (12 V). This results in the transistors Q4 and F2 being non-conductive, and the transistors Q5 and F3 being conductive. To be precise, when Q4 stops being conductive, Q5 conducts, pulled down by the base resistor R15. At the same time F2 stops conducting. At the same time the emitter of Q5 couples the positive terminal (+) of the capacitor C5 so that it is near OV, the potential of the minus terminal of C5 being switched to almost -12V negative. This is because the diode D8 becomes reverse-biased. The diode D7 now conducts and couples the gate voltage of F3 to said almost -12V potential. As a result, the pulse-like high- frequency current flows from the output 13 through the coil L1 , the upper half of the secondary winding M2, the rectifying diode D5 and the transistor F3 to the ground. The voltage across the coil L1 (the voltage having opposite polarity compared with the above case) and, consequently, the output voltage Vout change with the pulse width (energy) of the pulse current. The high-frequency signal is filtered off by the capacitors C3 and C4, and the remaining "envelope" provides the positive half cycle of the output voltage Vout, the shape of the half cycle following the shape of the input signal. This way an output signal Vout, whose peak-to-peak voltage can be N2/N1*Vcc, very accurately resembling the input signal Vin, is achieved at the output of the device. The capacitors C8 to C16 are noise filter capacitors, and L2 is a noise filter coil. The distortion properties of the above circuit can be further improved by feedback of the analog Vout output voltage to control one or more direct current operating points that are critical to the generation of distortion on the primary side. In Figure 1 such a feedback is implemented through a decoupling capacitor C6 and the adjustable resistor R14 to the non-inverting input of an operational amplifier A5. A filter capacitor C7 and a voltage divider R15, R16 for setting the operating point of the amplifier are also coupled to the non- inverting input of the amplifier A5. The output of the amplifier A5, having a negative feedback, provides the reference voltage Vref, used in the pulse width modulator Q1 , A4 and in the zero transition point detector A2. The amount of feedback is set by the adjustable resistor R14. A change in the output voltage Vout causes the feedback to change the refer- ence voltage Vref in a proportion determined by R4 (1 MΩ) and the parallel connected resistors R15 and 16 (22 KΩ in parallel = 11 KΩ). As Vref in- creases, it causes the pulse width modulation range to reduce, i.e. the pulse width created by a given amplitude narrows as Vref increases. This in turn reduces the output voltage Vout, causing the feedback to reduce Vref. Owing to this feedback the circuit of the invention is stable in its operation and the out- put voltage is within the desired range without any clipping and distortion. The reference voltage Vref is also used in the zero transition point detector A2 to determine a direct current operating point in order for the amplifier A2 to be able to operate as a comparator. The reference voltage Vref is also used in the full-wave rectifier D1 , D2, A3. As Vref increases in the negative half cycle of the input voltage Vin, it raises the potential of the anode of the rectifying diode D1. Similarly, in the positive half cycle of the input voltage Vin, at point 13, the output voltage Vout reduces the voltage Vref by means of the feedback, causing the potential of the cathode of the rectifying diode D2 to fall. This way the threshold voltage of the diodes D1 and D2 is bypassed by controlling the voltage Vref, whereby the crossover distortion otherwise occurring at the zero transition point of the sinusoidal input voltage is removed as accurately as possible. The adjustable resistor R4 is used to equalize the possible different threshold voltages of the rectifying diodes D1 and D2. Instead of the pulse width modulation shown in Figure 1 , pulse frequency modulation can also be used. In this case the pulse frequency (and, consequently, energy) of a high-frequency pulse signal is in proportion to the amplitude of the analog input signal. Otherwise the circuit employing pulse frequency modulation can be implemented as the circuit of Figure 1. When required, a complete galvanic isolation may be implemented between the primary and secondary circuits by employing decoupling transformers or opto-couplers in all the locations where signals are transferred between the primary and secondary sides, such as feedback and control of the secondary side rectification. The Figure and the related description are intended only to illustrate the invention. The details of the invention may vary within the scope and spirit of the attached claims.

Claims: CLAIMS 1. A device for changing the level of an analog alternating voltage signal, characterized in that the device comprises a high-frequency chopper circuit for modulating a pulse width or pulse frequency of a high-frequency pulse signal to be fed into a primary side (M1) of a transformer (T1) by using a low-frequency analog input signal, and a secondary winding (M2) of the transformer having an intermediate tap (12), an LC circuit comprising an inductive component (L1), connected in series between the intermediate tap (12) of the secondary winding (M2) of the transformer and the output (13) of the device, a first rectifier (D5,F3), operationally connected to a first end of the secondary winding (M2) of the transformer, a second rectifier (D4,F2), operationally connected to a second end of the secondary winding (M2) of the transformer in opposite polarities with respect to the first rectifier, and a control circuit (A2,Q5) for activating the first rectifier (D5,F3) only in a negative half cycle of the analog input signal (Vin) and for activating the second rectifier (D4,F2) only in a positive half cycle of the analog input signal. 2. A device as claimed in claim 1, characterized in that the control circuit comprises a detector (A2) for detecting the zero transition point of the analog input signal as the negative and positive half cycles change, and that the device comprises means (R14.A5) for feeding back the analog output signal of the device to control the detection of the zero transition point. 3. A device as claimed in claim 1 or 2, characterized in that the device comprises a full-wave rectifier (D1,D2,A3) for full-wave rectifying the analog input signal before pulse frequency or pulse width modulation, means (R14,A5,R4) for feeding back the analog input signal of the device to control the symmetry of full-wave rectification. 4. A device as claimed in claim 1, 2 or 3, characterized in that the device comprises a modulator (Q1,A4) for pulse width or pulse frequency modulating a high-frequency pulse signal (CLOCK) according to the amplitude of the analog signal, means (R14.A5) for feeding back the analog output signal of the device to control the pulse width or pulse frequency modulation range of the modulator. 5. A device as claimed in claim 4, characterized in that the modulator comprises an input (11) for the high-frequency square wave clock signal (CLOCK), a signal modulator (Q1) for modulating the square wave clock signal into a triangular wave signal, a comparator (A4) for comparing the full-wave rectified analog input signal with the triangular wave signal and for generating a pulse for the chopper circuit when the level of the full-wave rectified analog signal is higher than the level of the triangular wave signal, means (R14.A5) for feeding back the analog output signal of the device to control the amplitude, and consequently the pulse width modulation range of the modulator, of the triangular wave generated by the signal modulator. 6. A device as claimed in claim 1, characterized in that the first rectifier comprises a series connection of a first diode (D5) and a first semiconductor switch (F3), and that the second rectifier comprises a series connection of a second diode (D4), coupled in opposite polarity with respect to the first diode (D5), and a second semiconductor switch (F2), and that the control circuit (A2,Q5) controls the first semiconductor switch (F3) to conduct in the negative half cycle of the analog input signal and the second semiconductor switch (F2) to conduct only in the positive half cycle of the analog input signal. 7. A device as claimed in claim 6, characterized in that the first semiconductor switch (F3) is a PNP transistor and the second semiconductor switch (F2) is an NPN transistor (F2).

Inventors: KOSKINEN MARTTI, KOSKINEN, MARTTI
Applicants: KOSKINEN MARTTI, NOKIA TELECOMMUNICATIONS OY, KOSKINEN, MARTTI
Application year: 1997
Main classification: H02M7
IPC codes: H03F3