A METHOD OF DATA PROTECTION

Abstract: A split field buffer table (500) provides a headerless formatted disk drive (400). The split field buffer table (500) includes information that represents the number of sectors between two sequential servo fields or wedges (51-54) and that represents that a sector is split and that represents the sector split byte count. It also includes information that represents the physical sector address of the first sector after the servo wedge (51-54). Also, a data protection scheme where CRC generated from that data is exclusive-ored with an LSA. After being stored, the CRC is regenerated for that data. The CRC encoded with the LSA is exclusive-ored with the LSA again to remove that LSA. The CRC bytes are compared to each other. If not equal, then it is known that either the wrong LSA data is being transferred, or that the data is corrupted. A transfer control table is used to manage sector defects or other transfer adjustments. Each entry of the table contains the affected PSA, a bit to signify whether the LSA should be incremented, an action, an interrupt/branch bit and, preferably, parity. The increment bit should be set for logically skipped sectors and reset for defective sectors. The interrupt/branch bit causes a preferred maskable interrupt and a branch flag typically when the last sector of a track has been read or written. The actions can be: take no action, skip the sector or skip the following indicated sectors.

Description: A METHOD OF DATA PROTECTION 1. Field of the Invention The present invention relates to disk drives and more particularly to headerless formatted data storage on a platter of a disk drive. 2. Background of the Invention Computer disk drives contain media that store data. The media typically are multiple platters that magnetically store the data. FIGURE 1 illustrates an example of a platter 100. Platter 100 contains embedded servo fields, gaps or wedges S1-S4 that extend radially from aperture 1 10. These servos do not have to be aligned. Platter 100 also includes zones Zl and Z2 where zone Zl is defined by aperture 110 and circumference 115. Zone Z2 is defined by circumferences 115 and 120. Typically, each zone contains multiple tracks that are each divided into multiple sectors. As shown, zones Zl and Z2 each include one track where the track of zone Zl is divided into sectors 1-6 and the track of zone Z2 is divided into sectors 1-11. Servo fields S1-S4 contain data that is pre- written during the manufacture of the disk drive that contains the platter. The servo data includes the location of the specific servo field, the cylinder, the head and the track of the platter. Servo fields Sl- S4 are used to position the heads of the disk drive for read/write operations. Data are stored on platter 100 between servo fields S1-S4 in the sectors. It is very common for at least one sector on platter 100 to be split into one or more fragments by a servo field. The data is recorded in a density defined as bits-per-inch (BPI). The BPI remains the same over the entire area of platter 100. Tracks located radially farther from aperture 110 than other tracks will have a greater length and will, therefore, be able to store more data. To exploit this increased storage capability, either the disk rotation speed must be increased while the data read/write rate is held constant or the disk rotation speed is maintained at a constant while the data read/write rate is increased. Since the former is impractical, the later has been chosen for conventional disk drives. Specifically, the data read/write rate is increased as the data is stored farther from aperture 110. However, due to certain considerations, this rate is increased only for each zone, i.e., the data read/write rate for all the tracks in a zone is the same. As platter 100 rotates, certain pulses are provided to a disk controller. A sector pulse is provided at the beginning of each sector. A servo pulse is typically provided during or at the end of a servo field or wedge. An index pulse is provided once every platter revolution. A sector 200 is typically divided into fields as shown in FIGURE 2. A header PLO field 205 includes bytes having a known pattern that are locked onto by, usually, a phase locked loop circuit in a disk controller for synchronization to the data stream from platter 100. A sync field 210 includes a recognized pattern to align the disk controller to the beginning of a following header/CRC field 215. Header/CRC field 215 includes bytes to identify the logical cylinder, head and sector. Alternatively, header/CRC field 215 can contain information known as a logical sector address (LSA). Header/CRC field 215 also includes bytes to flag a defect and, if there is a defect, where the sector has been re-mapped to on the disk drive. If the sector is fragmented or split by a servo field, header/CRC field 215 includes the number of data bytes in a fragment and the number of fragments of the split sector. Header/CRC field 215 also contains cyclic redundancy check (CRC) or error correction code (ECC) bytes for error protection or correction of the bytes in header/CRC field 215. A read- write (R-W) gap field 220 includes a fixed number of bytes to separate fields 215 and 225. Gap field 220 is provided so that a disk drive head has time to transition from a read operation to a write operation. A data PLO field 225 follows gap field 220 and includes bytes having a known pattern which is locked onto by a phase locked loop circuit in the disk controller for synchronization to the data stream from platter 100. A sync field 230 includes a recognized pattern to align the disk controller to the beginning of a following data/ECC field 235. Data/ECC field 235 includes the actual data stored on platter 100 and ECC that protects that stored data. From the discussion above it is apparent that fields 205, 210, 215 and 220 subtract from the available platter space for storing data. Such fields can occupy twenty or more bytes per sector. For example, a four gigabyte disk drive has eight million sectors. For those sectors, fields 205, 210 and 215 occupy one hundred sixty million bytes. As a result, approximately 4 percent of the disk drive is used for overhead. In addition, magneto-resistive head technology utilizes separate read and write heads. As a result, some disk drive formats require two sets of fields 205, 210 and 215 for each head. The use of header/CRC field 215 can cause other problems as well. To illustrate, header/CRC field 215 itself may not be readable due to a defect. This causes the entire sector to be mapped out as defective, thereby losing space and possibly valuable data. Also, a "soft" error may occur during a read of field 215, so that many retries are performed. The retries detract from data rate performance. ECC bytes can be used to overcome some defects, but add to the total number of header bytes and have an adverse affect on data rates. A further problem is bytes in header/CRC field 215 are increased when the number of splits or fragments in a sector are numerous. Furthermore, most disk controllers do not allow field 215 to be split around servo fields, thus limiting track layout. 3. Summary of the Invention The present invention includes the use of a split field buffer table to provide a headerless formatted disk drive. The split field buffer table includes information that represents the number of sectors between two sequential servo fields or wedges and that represents that a sector is split and that represents the sector split byte count. It also includes information that represents the physical sector address of the first sector after the servo wedge. The present invention also includes a data protection scheme where CRC generated from that data is exclusive-ored with an LSA. After being stored, the CRC is regenerated for that data. Also, the CRC encoded with the LSA is exclusive-ored with the LSA again to remove that LSA. The CRC bytes are compared to each other. If not equal, then it is known that either the wrong LSA data is being transferred, or that the data is corrupted. Another aspect of the present invention provides a transfer control table. The table is used to manage sector defects or other transfer adjustments. Each entry of the table contains the affected PSA, a bit to signify whether the LSA should be incremented, an action, an interrupt /branch bit and, preferably, parity. The increment bit should be set for logically skipped sectors and reset for defective sectors. The interrupt/branch bit causes a preferred maskable interrupt and a branch flag typically when the last sector of a track has been read or written. The actions can be take no action, skip the sector or skip the following indicated sectors. Numerous other advantages and features of the present invention will become readily apparent from the following detailed description of the invention and the embodiments thereof, from the claims and from the accompanying drawings in which details of the invention are fully and completely disclosed as a part of this specification. 4. Brief Description of the Drawing In the drawings, FIGURE 1 is a plan view of a disk drive platter; FIGURE 2 is illustrates the fields contained in a sector of the FIGURE 1 platter; FIGURE 3 is a block diagram of a disk controller; FIGURE 4 illustrates a plan view of a disk drive platter with defects and that stores data according to the present invention; FIGURE 5 is an illustration of a split field buffer table according to the present invention for controlling read and write operations of the FIGURE 4 platter; FIGURE 6 illustrates a disk write according to an aspect of the present invention; and FIGURE 7 illustrates a disk write according to an aspect of the present invention. 5. Detailed Description of the Preferred Embodiments While this invention is susceptible of embodiment in many different forms, there is shown in the drawings and will be described herein in detail specific embodiments thereof with the understanding that the present disclosure is to be considered as an exemplification of the principles of the invention and is not to be limited to the specific embodiments described. FIGURE 3 shows a disk controller 300. The components and circuits of disk controller 300 are conventional unless modified as explained below. Head 310 is coupled to a preamplifier and filter circuit 320. Preamplifier and filter circuit 320 is coupled to read/write channel 330 that is coupled to servo processor 340 and integrated data controller and bus interface 350. Servo processor 340 is coupled to head positioning or actuator 365 via drivers circuit 360. Servo processor is also coupled to a bus 370. Bus 370 is coupled to a drivers and spindle motor controller 375, a microcontroller 380, a ROM 385 and integrated data controller and bus interface 350. Drivers and spindle motor controller 375 is coupled to spindle motor 390. Integrated data controller and bus interface 350 is coupled to a buffer memory 395 and is coupled to a peripheral/host bus 397. Included in integrated data controller and bus interface 350 is a disk formatter 351 that utilizes a high speed byte wide data path between the disk (not shown) and buffer memory 395. Formatter 351 includes a headerless engine. According to the present invention, fields 205, 210, 215 and 220 (hereinafter referred to as "header") shown in FIGURE 2 are removed from each sector. To replace the functions of the header, the headerless engine uses a combination of information read per sector off the disk, information read from tables in the buffer, information from the servo system, and information written by the microprocessor. To identify sectors, the headerless engine uses two types of address fields: the Physical Sector Address (PSA), which refers to a 10-bit physical sector address, and the Logical Sector Address (LSA), which refers to a 32-bit logical address. The LSA is the same as the small computer system interface logical block address (SCSI LBA), except when multiple physical sectors are required to make up one SCSI LBA. In this case, each SCSI LBA will be made up of multiple LSA's. Positioning logic in formatter 351 is provided to handle sector defect, split, and PSA calculations for data seek and transfer operations between the disk and the host. Integrity logic in formatter 351 uses four bytes of buffer memory CRC to encode the LSA as a host-to-disk integrity check. The headerless engine does not require any change from most previous headered servo systems, does not rely on firmware for real-time critical functions, and has thorough checks to ensure data integrity. The headerless engine further provides proper flags for a sequencer in integrated data controller and bus interface 350 to control data transfers. These flags are architected to be a generic protocol such that the flags could easily be provided by other logic implementations, such as a lower cost, more firmware intensive method as in low-end disk controllers or a custom solution. The present invention will be further explained with reference to FIGURES 4 and 5. FIGURE 4 represents a platter storing data in a headerless format. By way of example, sector 2 of zone Zl and sectors 4, 7 and 8 of zone Z2 are indicated as defective. The defect can either be one detected after manufacture ("slip") or while in field use ("skip"). A split field buffer table is built at power-up to contain a data structure per zone. By preference the split field buffer table is stored in non-volatile memory and is then loaded into buffer memory 395 upon power-up. A split field buffer table representing the platter 400 shown in FIGURE 4 is illustrated in FIGURE 5. Split field buffer table 500 includes columns Zl and Z2 that correspond to zones Zl and Z2 (FIGURE 4), respectively. Split field buffer table 500 also includes entries S1-S4 that respectively correspond to servo wedges or fields S1-S4 shown in FIGURE 4. Each entry in split field buffer table 500 provides information for both zones Zl and Z2. The entries preferably include: Numsec, CDR and PSA. Numsec represents the number of sectors between two sequential servo fields or wedges. A "0" represents that the sector is split. CDR represents the sector split byte count, where "0" represents no sector split. PSA represents the physical sector address of the first sector after the servo wedge. To illustrate, the information provided by split field buffer table 500, entry S 1 , zone Z2, will be explained. Numsec =3, which means that there will be three sector pulses after servo wedge or field S 1. As shown in FIGURE 4, these three sector pulses are due to sectors 4, 5 and 6. Next, CDR =122, which means that sector 6 is split and that there are 122 bytes of data (represented by DI in FIGURE 4) before the next servo pulse from servo wedge S2. Finally, PSA = 4 means that the first physical sector address after servo wedge SI is 4 as shown in FIGURE 4. As microprocessor 380 initiates a new data seek, it programs a base buffer address for a zone or split field buffer table into a buffer pointer, which initiates loading of the table into buffer memory 395. This base buffer address represents, as an illustration, the address in buffer memory 395 that corresponds to column Zl . A preferred dedicated channel into buffer memory 395 (also used to access the Transfer Control table) reads a table entry during every servo wedge pulse until a sequencer stop is detected. This minimizes buffer memory 395 accesses since table loads occur during disk idle times. Note that the pointer is preferably re-written even when restarting a transfer within the same zone in order to initiate table loads. Optionally, the buffer channel may be left on if it is desired to start a data transfer before the next servo wedge. The buffer channel preferably arbitrates for buffer memory 395 immediately upon receiving a SERVO input signal and loads the table entry before the end of the servo wedge; the table entry loaded during a servo wedge is used for the subsequent sectors until the next servo wedge. Microprocessor 380 can load all zone tables into buffer memory 395 at power-up, or, to reduce buffer memory 395 space, microprocessor 380 can program the next zone table during a disk transfer and simply reprogram the table pointer after the transfer completes. The indexing of the entries of the split field buffer table during reads and writes is preferably controlled via a servo processor interface included in formatter 351. Formatter 351 receives from servo processor 340 via this servo processor interface information about where the head position over the disk before any data can be transferred. The servo interface receives an index pulse and a servo pulse from servo processor 340. A split table index counter tracks the current servo number by storing the present servo number. The index signal from servo processor 340 resets the split table index counter and it is incremented for each servo wedge by the servo signal. The split table index counter serves as the lower address bits used to index the entries of the split field buffer table 500 in buffer memory 395; it is combined with an upper split table base address register that represents the column or zone. As long as the number of servo gaps is constant for the drive, formatter 351 will always know which servo gap is next without needing to wait for an index pulse when seeking to a new zone. A table entry from split field buffer table 500 is fetched in response to each servo pulse. The servo count in split table index counter is used as an index to split field buffer table 500. A positional PSA counter is loaded at each servo gap and increments for every sector pulse thereafter. While the sequencer is not running, the PSA counter is loaded at each servo gap; if the sequencer is running, then the PSA counter is verified at each servo gap to ensure sector pulse integrity. On seeks, the base address for the zone table may be changed during the seek and the PSA counter will synchronize to the new zone on the sector pulse after the next servo gap. The PSA counter always runs, and so will reflect the true position for a zone after being synchronized to that zone. Note that this method allows unlimited splits per sector. Upon power up, the headerless engine preferably is synchronized to the disk. Upon the release of a disk formatter soft reset, the headerless engine will begin to count servo wedges but will not be synchronized to the true location on the disk. When the first index pulse is encountered, the servo counter will be reset and begin to accurately count servo wedges. The headerless engine is now ready to be given base addresses for its split field buffer tables. The microprocessor preferably loads a list of PSA addresses into the buffer to control the transfer. The list, also known as a transfer control table, is used to manage defects or other transfer adjustments. This list is preferably stored in a reserved segment of buffer memory 395 (FIGURE 3). Each entry contains the affected PSA, a bit to signify whether the LSA should be incremented, an action, an interrupt /branch bit and, preferably, parity. The increment bit should be set for logically skipped sectors and reset for defective sectors. The interrupt/branch bit causes a preferred maskable interrupt and a branch flag typically when the last sector of a track has been read or written. The action is preferably a "no-op", stop, single step or start and stop skips. The no-op action informs formatter 351 to take no action with the data, i.e., no data transfer. This action applies when the last sector of a track has been transferred and the head must change tracks. A stop action usually occurs when the last track sector is transferred. A single step informs formatter 351 to skip to the next PSA, whereas the start and stop skip actions cause formatter 351 to skip from start PSA to an end PSA when there are multiple contiguous sectors to be skipped. This list preferably is in the same order as the programmed transfer; that is from the first PSA to the last PSA within the programmed data transfer, including any wrap-overs to zero. During the data transfer, each entry of the transfer control table will be loaded and used for comparison to the start PSA to determine action. There is a separate address pointer for this transfer control buffer table and is accessed with the same start and stop method used for the split table. The process starts on a table pointer write and stops when the sequencer stops. The start of the table is loaded first, and each subsequent entry is loaded as the current entry is used. This provides for a "look ahead" scheme in that it is known before arriving at a pre-determined sector what action should be take. There is no ceiling to the list and the address pointer will increment to load entries until the sequencer stops. Note that a dummy entry preferably is added after the last valid entry since an additional entry will be fetched after the last one is used. Setting the first or last table entry as a no-op at the end, for example, is useful since the sequencer would stop before the start PSA counter would rotate back around. A dummy entry is also preferred when no defects are present on the target track. In this case, to ensure no PSA match occurs, an illegal value (such as 03FFh) should be used. A start PSA register indicates the beginning of the transfer, and a stop threshold register indicates the length of the transfer. A transfer counter register is reset upon a sequencer start and it is incremented the same as the LSA counter; that is, it is incremented each time the start PSA is incremented and the sector is not a defect. The transfer length should be set to the total amount of sectors that are either transferred or skipped "normally", i.e., skip non-defective sectors; the defect skips should not be included in the transfer length. After the sequencer is started, the positional PSA is compared with the start PSA on each SECTOR pulse. A comparison of the positional PSA is also done with the Transfer Control PSA. A start flag will be generated to the sequencer if the positional PSA matches the start PSA, the sector is not a defect/skip, and the buffer is ready. Any combination of skips and defects may be programmed within the transfer. When the transfer counter equals the transfer length register, a stop flag is generated to the sequencer. The explanation above is based on a hardware implementation of the transfer control table. If desired, firmware can be used to implement the transfer control table. The firmware accesses a table entry every servo wedge and programs formatter 351 with sectors to be skipped until the next servo wedge. The firmware preferably programs a bit mask containing defects and skips on a per servo basis. A preferred 32-bit register supports up to 32 sectors between servos. For every defective or skipped sector, a "0" would represent a skip and a "1" would represent a transfer. The sequencer should be operating at least one servo before sectors are transferred. "0"s should not be programmed until after the servo occurs. The firmware then programs "l"s when the transfer begins. This method does not differentiate between defects and regular skips. It is possible to have two bits per sector to differentiate between defects and skips, but this will double the size of the register to 64 bits. To ensure data integrity in a high-performance, multi-context headerless environment, the LSA is XOR'd with the buffer CRC. Both the buffer CRC and LSA are 4 bytes, allowing a simple XOR encode. This protection insures that the buffer segment written to disk and the buffer segment transferred to the host correlates with the expected LSA range. In both the host interface and the ECC block exists an LSA counter. The microprocessor programs the counter before a transfer with the buffer. The counter increments after each transfer. Unlike the PSA counter, the LSA counter in the ECC block may not increment on a defect. The buffer CRC bytes exist as protection against defects in both the buffer and the disk. On disk writes, the host exclusive-ORs the buffer CRC bytes with the LSA as they are transferred from the host to the buffer. The ECC block verifies the encoded CRC as it is written to the disk to check buffer and LSA integrity. On disk reads, the encoded CRC is stored in the buffer and corrected by the ECC as necessary. The host interface verifies the CRC and LSA as it is transferred from the buffer to the host, which also verifies any correction the ECC performed. A CRC error detected in the host interface indicates either the data became corrupted in the buffer or the ECC miscorrected the data, which has an extremely low probability. The ECC and host blocks are aware of the LSA, but the formatter works only with PSAs. The operation of data protection will be explained with reference to FIGURES 6 and 7. FIGURE 6 depicts a data read from a disk 600 to a host 610. Data is received in data formatter 615 from disk 600. The data includes data bytes, CRC bytes that is exclusive-ored with the LSA and ECC bytes. All this data is transferred to ECC block 620 where the data is checked for errors. The data minus the ECC bytes is sent to a buffer memory 625. The data is then sent to host interface 630 where the following steps occur. First, CRC bytes are regenerated for the data bytes only. Second, the CRC bytes that were exclusive-ored with LSA are exclusive-ored again with the LSA to remove the LSA. Then, the regenerated CRC bytes are compared to the twice-exclusive-ored CRC bytes. If these values are not equal, then it is known that either the wrong LSA data was read or that the data has been corrupted. Typically, the data is re-read again. If the error still occurs, host 610 is notified. FIGURE 7 depicts the writing of data from a host 700 to a disk 710. Data is received by a host interface 715 from host 700. Host interface 715 generates CRC bytes for the data and exclusive-ors the CRC bytes with the expected LSA. A buffer memory 720 receives the data and encoded CRC bytes, which are then transferred to a data formatter 725. The data and encoded CRC bytes are then transferred to an ECC block 730 which regenerates CRC bytes for the data and exclusive-ors the encoded CRC bytes with the LSA to remove the LSA. The regenerated CRC bytes are compared to the twice-exclusive-ored CRC. If the comparison is not true, then it is known that either the wrong LSA data was written or that the data has been corrupted. Typically, the data is re- written again. If the error still occurs, host 700 is notified.

Claims: WE CLAIM: 1. A method of providing data protection for a storage device comprising the steps of: encoding data protection data with address data; decoding the data protection data; regenerating the data protection data; and comparing the decoded data protection data to the regenerated data protection data.

Inventors: ELLIS JACKSON L, LY DAVIS M, SPRINGBERG DAVID M, ELLIS, JACKSON, L., LY, DAVIS, M., SPRINGBERG, DAVID, M.
Applicants: SYMBIOS INC, SYMBIOS, INC.
Application year: 1997
Main classification: H03M13
IPC codes: G06F11, G11B20, H03M13