Method for manufacturing a color plasma display panel with a barrier

Abstract: Barrier in a color plasma display panel (PDP) and a method for manufacturing the same are disclosed; the part ion of the color plasma display panel (PDP) including a barrier formed of frit glass between upper and lower substrates each having electrodes of a regualr interval for making a cell; and the method including the steps of coating a frit glass paste of a predetermined thickness on the lower substrate, drying and baking the coated frit glass paste to form a frit glass, defining unnecessary portions on a surface of the frit glass, and removing the unnecessary portions of the frit glass to form frit glass barriers spaced regular intervals apart from one another.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to color plasma display panels (PDPs), and more particularly, to a method for manufacturing barriers in a color PDP. Discussion of the Related Art Fig. 1 is a cross-sectional view showing a structure of a conventional color PDP Referring to Fig. 1, a color PDP includes an upper substrate and a lower substrate. The lower substrate includes a lower glass substrate 10, a first insulating layer 11 for preventing an electrode material from penetrating into the lower glass 10 on baking, a lower electrode 12 on the first insulating layer 11, and barriers 13 for preventing crosstalk between cells adjacent to the lower electrode 12. The upper substrate includes an upper glass substrate 15, a second insulating layer 16, a plurality of upper electrodes 17 on the second insulating layer 16, first and second dielectric layers 18 and 19 for maintaining surface charge generated in discharge of the upper electrode 17, and a protecting layer 20 for preventing damage of the first and second dielectric layers. A luminescent material 14 is formed on the barriers 13 and over the lower glass substrate 10. A mixed gas of argon and neon is injected to the space between the upper substrate and the lower substrate as to become non-active gas of a plasma state, thereby forming a discharge region. A method for manufacturing a color PDP having the above-described structure will be discussed. First, a first insulating layer 11 is formed on a transparent lower glass substrate 10 in order to prevent an electrode material from penetrating into the lower glass substrate 10 on baking. Secondly, a lower electrode 12 is formed on the insulating layer 11 and then dried and baked. Next, after completing the drying and the baking of the lower electrode 12, a barrier material is printed over the lower glass substrate 10 about 10-13 times by a printing process in order to prevent color mixture between adjacent discharge cells, thus forming barriers 13 by drying and baking. One of typical methods for forming barriers employs a thick film printing technique. In this method, the barriers are formed not by etching the barrier material but by printing it on a predetermined region a plurality of times. In the method of printing a thick film, utilizing a screen mask, a mixed paste mixed with ceramic powder and organic binder solvent is printed and dried 10 times and then baked at a temperature of 450-700 C°, thereby forming barriers. In this case, each time the barrier material is printed, the barriers grow 13-15 µm thick. Thus, the total thickness of the barrier is 130-150 µm. A material for forming the barriers is an insulating paste. Subsequently, a luminescent material is formed on the lower electrode 12 and the barriers 13, thus completing the lower substrate 12. As for the upper substrate, on the transparent upper glass substrate 15, there is formed a second insulating layer 16 on which upper electrodes 17 are formed. At this time, the upper electrodes 17 is a transparent electrode (ITO: indium-tin oxide) which is formed by depositing indium oxide and tin-oxide. Alternatively, a stacked metal electrode composed of three layers which are chromium-copper-chromium, can be used as the transparent electrode, thus improving voltage decrease. Next, in order to drop a driving voltage by charge generated at the interface, first and second dielectric layers 18 and 19 are formed. Then, a protecting layer 20 is formed on the second dielectric layer 19 to prevent damage of the first and second dielectric layers 18 and 19. Thereafter, the upper and lower substrates are sealed by means of a sealant, so as to form a sealed space. Then, a discharge gas is sealed within the sealed space. A hole (not shown) made in a corner of the bottom of the sealed space is connected to a glass tube (not shown) for gas injection, so that the gas sealed within the sealed panel is taken out. when the gas is taken out, the vacuum degree is generally 10 -6 - 10 -8 torr. The gas is injected (about 500 torr) by means of a gas injection equipment and then the glass tube is sealed by heat, thus forming a panel which completely seals the discharge gas. In such a conventional method for manufacturing barriers of a color plasma display, it is difficult to manufacture barriers of a desired quality by repeatedly printing a barrier material about 10 times. Further, since a baking temperature of the paste which is a barrier material is high, the upper and lower glass substrates are necessary to be annealed, or a special substrate has to be used, in order to prevent the quality decrease caused by variation of the glass dimension. Furthermore, due to limitations of the screen mask used for a printing, the barriers of the color PDP is not useful for any color PDP of a large size. Patent document WO 94/18694 discloses a flat panel display with internal barriers made of glass. These internal barriers may be formed by sintering ceramic tape at temperatures between 800°C-2000°C. The ceramic tape may be any of glass-ceramic tape, devitrifying glass tape, ceramic glass tape, ceramic tape or any other tape which has plastic binders and ceramic or glass particles which are flexible and workable in the unfired state and curable to a hard and rigid layer on firing. Document EP 0 722 179 A2 discloses a coatable insulator composition for use in the formation of a green tape comprising fine inorganic micropowders composed of amorphous glass and a refractory oxide in a volatile organic solvent solution of a binder composed of a polymer substance and a plasticizer. One important criteria of the glass of the insulator composition is that it is amorphous and non-crystalline at a softening point of at least 50°C below the firing temperature. Depending on the firing conditions, part of the amorphous glass in the insulated composition may crystallise. Glass frit components for use in the coatable insulator composition include, among others, zinc oxide, silicon oxide, lead oxide and boric oxide in varying proportions. The European Patent Office Abstract of Japanese publication 07161298 discloses a manner of manufacturing a plasma display panel by sand blasting glass paste layers which are subsequently baked. United States Patent 4,256,533 discloses a method for applying sealing glass to glass surfaces intermediate multiple layers, etching channels through the sealing glass and partially into a glass layer, and bonding the glass layers together to form a unitary glass display panel. The European Patent Office Abstract of Japanese publication 58142728 discloses a method of bonding a face plate panel to the funnel part of a cathode ray tube using a frit glass composition. The European Patent Office Abstract of Japanese publication 01027141 discloses a method of separating the front panel of a cathode ray tube from the funnel component, including the step of dissolving the frit glass solder using nitric acid. European Patent Office Abstract of Japanese publication 58184234 discloses a method of checking the invasion of acid and plating liquid between glass and iron. United States Patent 3,975,176 discloses a method of sealing the glass tubulation of a gaseous discharge display device to a glass substrate by using a preformed vitreous or de-vitrifiable solder glass annular member. United States Patent 4,692,662 discloses light-emitting cells of a display device which are individually provided with inner walls at least partially covered by white reflectors consisting of glass material containing transparent particles having different refractive index by 5 to 80% by weight. SUMMARY OF THE INVENTION Therefore, embodiments of the invention are directed to methods of manufacturing barriers of a color PDP that substantially address one or more of problems due to limitations and disadvantages of the related art. Additional features and advantages of these embodiments will be set forth in the description which follows and in part will be apparent from the description, or may be learned by practice thereof. The objectives and other advantages of these embodiments will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings. The invention provides a method for manufacturing a color plasma display panel as set out in claim 1. A barrier in as color plasma display panel so made includes a barrier formed of frit glass between upper and lower substrates each having electrodes of a regular interval for making a cell. Embodiments of the invention provide a method for manufacturing barriers of a color plasma display panel (PDP) including the steps of: coating a frit glass paste of a predetermined thickness on the lower substrate, drying and baking the coated frit glass paste to form a frit glass, defining unnecessary portions on a surface of the frit glass, and removing the unnecessary portions of the frit glass to form frit glass barriers spaced regular intervals apart from one another. BRIEF DESCRIPTION OF THE DRAWINGS These and various other objects, features, and advantages of the present invention will be readily understood with reference to the following detailed description read in conjunction with the accompanying drawings, in which: Fig. 1 is a cross-sectional view showing a unit cell structure of a conventional color PDP; and Fig. 2 is a flow chart showing a manufacturing process of barriers of a color Plasma display panel according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Fig. 2 is a flow chart showing a manufacturing process of barriers of a color Plasma display panel PDP) according to an embodiment of the present invention. Referring to Fig. 2, a 100-200 µm thick frit glass paste, which is made by mixing frit glass powder and a vehicle, is uniformly coated on the entire surface of a lower glass substrate 12 by employing a printing technique (S101). Herein, the main component of the frit glass power which is a glass of a crystallinity of a low melting point is a lead oxide (PbO). In case the frit glass powder is heat-treated at not less than the temperature of its softening point, it, unlike a general glass of a low melting point, is melted again at a temperature of higher than the temperature of 100 °C higher than the baking temperature even after the crystallization caused zn the first baking. Yet, since the frit glass powder is not changed at a temperature of less than the temperature of 100 °C higher than the baking temperature, its characteristics is excellent. Prior to baking, the frit glass powder is melted in a relatively low temperature of 370-380 °C and thus it is firmly fixed in a glass state. Yet, if it is heat-treated after fixing, the frit glass begin to be crystallized from its surface. The crystallized glass remain in a strong solid state at a temperature of less than about 500 °C at which the crystal of the frit glass begins to melt. As the process of the heat-treatment after the formation of the barriers, there are a process of baking the luminescent material and a process of depositing a sealant. Both of the two process are carried out at a temperature of 400-450 °C so that there is no possibility for the barriers of frit glass power to melt to have a changed form. Also, a black frit glass added to by a pigment is employed to improve the contrast of the color plasma display panel (PDP). The pigment employed to make the frit glass black-colored is a mixture of ferric oxide (Fe 2 O 3 ) and cobalt oxide (Co 2 O 3 ). The pigment mixture is 0.4-0.6 wt% of the total amount. In the frit glass, lead oxide (PbO) is 70-80 wt%, boric oxide (B 2 O 3 ) is 8-13 wt%, zinc oxide (ZnO) is 7-12 wt%, silicon oxide (SiO 2 ) is 3 wt%, and barium oxide (BaO) is 1 wt%. The heat expansion coefficient is adjusted by the amount of the BaO. In other words, the more the amount of BaO is, the bigger the heat expansion coefficient is. The 100-200 µm thick frit glass paster which has uniformly formed on the lower glass 10, is dried and then baked at a temperature of 430-450 °C (S102). Subsequently, on the frit glass paste which has been dried and baked, there is coated a photoresist film (S103), which is dried to have a specific moisture (S104). Next, utilizing a pattern mask, the dried photoresist film is subjected to exposure (S105) and then development (S106). Then the photoresist film is baked again at a temperature of less than 150 °C (S107) in order to prevent the photoresist layer from being damaged by a strong acid etchant. Next, the unnecessary frit glass is removed by etching (S108). In this case, the photoresist film used is a commercially available positive photoresist film to remove the exposed portions. The echant used is a wet etchant which is made by diluting acid. Sulfuric acid, hydrochloric acid, fluoric acid, and nitric acid can be available as an etchant. Among them, nitric acid is most commonly used. The frit glass is dipped or sprayed to be etched. The optimal temperature for etching is 35-50 °C and the concentration of the nitric acid is diluted by water to be 25-55%. The time of the etching is 1-5 min.. It is difficult to make a desired pattern width of the barriers which is under-cut. The under-cut commonly happens on etching by using an etchant. When the frit glass is etched by a predetermined depth, its upper portion is etched laterally. Thus, the upper portion is etched more than the lower portion, so that the pattern width of its upper portion is narrower than that of its lower portion. Etching direction is more invariable when the etching is carried out by spraying method rather than dipping, so that the under-cut amount can be reduced. In particular, the etching time can be reduced and the under-cut amount can be reduced when a temperature of the etchant is higher than 35 °C. Also, the higher the concentration of the acid is, the less the amount of the under-cut is. After finishing etching the frit glass, the frit glass is washed (S109) and then the remaining photoresist layer is removed (S110). The above method has the following advantages. Since the amount of variation of barriers can be decreased by reducing the temperature of baking a barrier material, performances of a PDP are improved, the time of baking is shortened, and heat shock inflicted on the glass is reduced. Further, the overall process is simplifed and the material cost is decreased, thereby improving the product competitiveness. Accordingly, a large-size PDP of a high resolution can be conveniently manufactured by using the method of the invention. Also, since the amount of the under-cut can be reduced, the method can be applied to barriers of a color PDP of a low resolution. °C°C It will be apparent to those skilled in the art that various modifications and variations can be made in the described methods of manufacturing barriers of a color PDP without departing from the scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of the described embodiments provided they come within the scope of the appended claims.

Claims: A method for manufacturing a color plasma display panel having upper and lower substrates, the method comprising the steps of: coating a frit glass paste of a predetermined thickness on the lower substrate; drying and baking the coated frit glass paste to form a crystalline frit glass which remains in a strong solid state at temperatures up to about 500°C, the baking temperature being in the range 400-450°C; defining unnecessary portions on a surface of the frit glass; and removing the unnecessary portions of the.frit glass to form frit glass barriers spaced at regular intervals apart from one another. The method as claimed in claim 1, wherein any one of sulfuric acid, hydrochloric acid, fluoric acid, and nitric acid is used as a dilute acid etchant to remove the frit glass. The method as claimed in claim 2, wherein a concentration of the dilute acid is 25-55%. The method of claim 1, wherein the frit glass in the frit glass paste melts at a temperature of 370-380°C. The method of claim 1, wherein the frit glass comprises lead oxide, boric oxide, zinc oxide, silicon dioxide and barium oxide as main constituents. The methodof claim 5, wherein the frit glass comprise 70-80% by weight lead oxide (PbO). The method of claim 5, wherein the fruit glass comprises 8-13% by weight boric oxide (B 2 O 3 ). The method of claim 5, wherein the frit glass comprises 7-12% by weight zinc oxide (ZnO). The method of claim 5, wherein the frit glass comprises 3% by weight silicon oxide (SiO 2 ). The method of claim 5, wherein the frit glass comprises 1% by weight barium oxide (BaO). The method of claim 5, wherein the lead oxide (PbO), boric oxide (B 2 O 3 ) and zinc oxide (ZnO) together are 95% by weight of the frit glass The method of claim 5, wherein the silicon oxide (SiO 2 ) and barium oxide (BaO) together are less than 4% by weight of the frit glass. The method of claim 5, wherein the frit glass comprises 0.4-0.6% by weight black pigment. The method of claim 13, wherein the black pigment comprises ferric oxide (Fe 2 O 3 ) and cobalt oxide (Co 2 O 3 ) in a predetermined proportion.

Inventors: KIM KUN WOO, KIM, KUN WOO
Applicants: LG ELECTRONICS INC, LG ELECTRONICS INC.
Application year: 1997
Main classification: H01J17
IPC codes: H01J11, H01J9, H01J17