TUNING-RANGE EXTENSION CIRCUIT FOR SYSTEMS UTILIZING MOSFETS AS TUNABLE RESISTORS

Abstract: A tuning range extension circuit for systems utilizing MOSFETs as tunable resistors is provided. The circuit utilizes an extra MOSFET in parallel to each existing MOSFET, in combination with a switching system. The switching system receives a tuning voltage, a supply voltage and reference voltages indicative of the operating limits of a filter. The switching system maintains the MOSFET of the system in a defined on or off mode by comparing the tuning voltage value to the reference voltage values, and switching the gates of the additional MOSFET between the tuning and supply voltages.

Description: Tuning-range extension circuit for systems utilizing MOSFETs as tunable resistors BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to filters. More particularly, it relates to a tuning- range extension for filters and systems utilizing MOSFETs as tunable resistors, for example, continuous-time integrated filters. The Prior Art The present invention has been developed for use in disk-drive read channels. In case of constant-density recording, the frequencies of signals vary greatly from the inner track to the outer track. Therefore, the bandwidth of the read-channel filters need to be adjusted accordingly. For this reason, widely tunable filters are imperative. A number of techniques to implement widely tunable filters are available. The most well-known form utilizes the dependence of the transconductance (g ιn ) of a bipolar transistor to its collector current. The tuning range that can be obtained in this way is a number of decades. The disadvantage of all these methods is that the obtainable signal-to- noise ratio (SNR) is small. The MOSFET-opamp-C integrator, upon which this invention is based, intrinsically has a much larger SNR. It is even possible with this method to closely approach fundamental limits for the SNR. This advantage can be translated into higher signal quality or lower power consumption. Especially at higher frequencies this is a great advantage, because under these circumstances, the power consumption tends to be high, and is sometimes prohibitively high. SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide an extended tuning range for continuous-time integrated filters. Another object of the invention is to provide a tuning range extension for continuous-time integrated filters that maintains a high signal-to-noise ratio. Yet another object of the invention is to provide a tuning range extension for continuous-time integrated filters that enables high signal quality. It is a further object of the invention to provide a tuning range extension for continuous-time integrated filters that does not require high power consumption when operating at higher frequencies. Another object of the invention is to provide a tuning range extension for continuous-time integrated filters that operates reliably and efficiently. The present invention provides a tuning range extension circuit for continuous- time integrated MOSFET-opamp-C filters. In these filters, ordinarily tunability is achieved by using pairs of MOSFETs as tunable resistors. The gate voltage of these transistors is the tuning voltage. The invention utilizes extra pairs of MOSFETs in parallel to each of the existing pairs in combination with a switching system which switches the gate voltages. The switching system receives a tuning voltage, a supply voltage and reference voltages indicative of the operating limits of the filter. During operation, the switching system maintains the MOSFETs of the integrated filter in a defined on or off mode by comparing the tuning voltage value to the reference voltage values, and switching the gates of the additional MOSFETs between the tuning and supply voltages. BRIEF DESCRIPTION OF THE DRAWINGS Other objects and features of the present invention will become apparent from the following detailed description considered in connection with the accompanying drawings which disclose several embodiments of the present invention. It should be understood, however, that the drawings are designed for the purpose of illustration only and not as a definition of the limits of the invention. In the drawings, wherein similar reference characters denote similar elements throughout the several views: FIG. 1 is a schematic diagram of a fifth-order opamp-MOSFET-c filter of the prior art; FIG. 2 is a schematic diagram of an opamp-MOSFET-c integrator of the prior art; FIG. 3 is a schematic diagram of an opamp-MOSFET-c integrator with extended tuning range according to the invention; FIG. 4 is a block diagram of a semi-automatic switching transmission according to the invention; FIG. 5 is a schematic diagram of a circuit for assessing the tuning mode of the filter; FIG. 6 is a block diagram of the combined circuits of FIGS. 4 and 5; FIG. 7 is a block diagram of a building block circuit for transmissions with more than two speeds; FIG. 8 is a block diagram of a three-speed semi-automatic transmission according to the invention; FIG. 9 is a block diagram of an implementation of the tuning range extension circuit according to the invention; FIG. 10 is a block diagram of the "gear control" block of FIG. 9; FIG. 1 1 is schematic diagram of a shift circuit according to the invention; FIG. 12 is a schematic diagram of another embodiment of the shift circuit according to the invention; FIG. 13 is a schematic diagram of a voltage generator according to the invention; FIG. 14 is a schematic diagram of a specific embodiment of the tuning assessment circuit according to the invention; and FIG. 15 is a schematic diagram of an embodiment of the inverting and non- inverting amplifier according to FIG. 14. DETAILED DESCRIPTION ON PREFERRED EMBODIMENTS A standard technique to realize integrated continuous-time filters results in a network of MOSFETs, capacitors and balanced operational amplifiers (opamps). An example of such a filter is shown in FIG. 1. Filter 10 is usually viewed as a network of opamp-MOSFET-C integrators 12, an instance of which is shown in FIG 2. This integrator has one differential input 11 , which consists of two lines that are in antiphase. In the Filter 10 of FIG. 1 , most integrators have more than 2 inputs. Extra inputs are customarily added to the integrators by adding extra MOSFETs to the inputs of the opamps. The MOSFETs are used as tunable resistors. The resistance between the source and the drain of the MOSFET can be varied by varying the gate voltage V g . In filter 10, the gates of all the MOSFETs have been tied together, so that the same tuning voltage V g is applied to all MOSFETs. Thus, the frequency response of the filter can be tuned via one single voltage input. This feature can be used to calibrate or adapt the filter. The tuning range of filter 10 is limited by a number of factors. The tuning voltage V g cannot, in most practical cases, be made higher than the highest (most positive) supply voltage or lower than the lowest (most negative) supply voltage. Apart from that, if the MOSFETs are of the n-channel type, the tuning voltage should at all times be larger than the sum of the largest of the instantaneous voltages at the drain or source of the MOSFETs, and the threshold voltage of the MOSFETs. For practical reasons, it is advisable to bias the sources and the drains of all MOSFETs in the filter at the same voltage. If this voltage is V bjs , the following tuning-voltage limits are found for n-channel MOSFETs. v^v A -v τ < v G < mpp (1) In this equation, V Λ is the signal amplitude at any source or drain, V τ is the threshold voltage of the MOSFETs, and V supp is the largest possible value of the supply voltage V supp . For several reasons, the signal-amplitude voltages are approximately the same everywhere in the circuit. If p-channel MOSFETs are used, and if the most negative supply voltage has been normalized to 0V, the tuning-voltage limits are as follows. v ,-vyv τ > V G >0 (2) Because the tuning voltage is constrained, the tuning range is constrained. For some applications, the tuning range that can be attained in this manner is too narrow and needs to be extended. The tuning range can be extended by connecting an extra pair of MOSFETs in parallel to each existing pair in the filter. FIG. 3 shows how the integrator of FIG. 2 is transformed by this operation. It is assumed that all MOSFETs are of the p-channel type, so that equation (2) applies. There are two groups of MOSFETs M,, M 2 and M-,, M 4 , each having a separate tuning line V lurι2 and V ,-.,.,, respectively. The tuning voltage V- un is applied to the gates of MOSFETs M 3 and M 4 via tuning line V lunl . Switch 14 enables the gates of MOSFETs M, and M 2 to be switched between the tuning voltage V^ and the supply voltage V sup . If the gates of MOSFETs Ml and M2 are connected to the supply voltage V sup , said MOSFETS are off, and the time constant of the integrator is controlled via MOSFETs M 3 and M 4 only. If the tuning voltage W lm is decreased (i.e. , made more negative), the integrator time constant decreases too. At the end of the tuning range, the tuning voltage W mn is zero. If then switch 14 is toggled to the "A" position (i.e. , V lun ), MOSFETs M, and M 2 are switched on, the integrator "switches gears", and the time constant decreases further. If, by this action the time constant would become too low, the tuning voltage V- ^ can be increased for readjustment. In this way, the integrator and the filter that is built with these integrators have two tuning sub-ranges, one for each position A and B of switch 14. If the tuning range needs to be continuous, the two tuning sub-ranges need to overlap. In the "off" situation, the gates of MOSFETs M, and M 2 are connected to the supply voltage V sup . The p-channel MOSFETs are switched off at all times if the gate voltage V π is higher than a minimum level defined by: V G > V b yV A+ V r (3) The transistors should be in a well-defined "on" or "off" mode during signal processing. Thus, with equations (2) and (3), this means that there is a "forbidden zone" for the gate voltages V G : During signal processing, the gate voltages V π should never be in this region. If they are, serious distortion will result. The switching mechanism of the invention makes sure that this only happens during a gear switch. The procedure described above helps to extend the tuning range, but results in a complicated tuning method, because both the tuning voltage V luπ and the position of switch 14 need to be controlled. Another complication is that the switch works abruptly, which is inconvenient in many applications. For instance, in tuning loops it may cause instability. Therefore, it would be desirable to have a single input, via which the extended tuning range can be covered in a continuous manner. This requires a circuit that automatically switches gears, or an automatic transmission. The position of switch 14 in FIG. 3 should be governed by the tuning voltage V tun itself. If the switch 14 is in position "A" and the tuning voltage V lun becomes too high, the switch 14 should be set to position "B" . Likewise, if the switch 14 is in position "B" and the tuning voltage V- un becomes too low, the switch 14 should be toggled to position "A". FIG. 4 shows a circuit that performs these functions. The upper section 21a of switch 20 performs the same function as switch 14 in FIG. 3. Switch 20 is operated by a comparator 22 that compares the incoming tuning voltage V,-.,- to one of two reference voltages, V cl and V c2 . Both these reference voltages V cl and V c2 are within the tuning-voltage limits set by equation (2), where reference voltage V cl is close to the upper limit, and reference voltage V c2 is close to the lower limit. The outputs V n -,-, and V^ correspond to the equally labelled points in FIG. 3. If the upper part 21a of switch 20 is in the position "A" as shown, both groups of MOSFETs in the filter are switched on. Comparator 22 compares the tuning voltage V lun to the reference voltage V cl , which is close to the upper limit of the tuning- voltage range. If the tuning voltage V^ becomes larger than the reference voltage V cl , comparator 22 detects this condition, and toggles switch 21b to the "B" position. The filter is switched to first gear and one group of MOSFETS is switched off. Comparator 22 now compares against reference voltage V c2 . If the tuning voltage V lun becomes smaller than the reference voltage V c2 , it is close to the lower limit and the system switches back to second gear. This tuning system is not monotonic, and there is no direct relationship between the tuning voltage V lun and the time constants of the integrators. To assess the time constants of the filter we use an extra set of MOSFETs that track the MOSFETs in the filter by virtue of general on-chip matching. This is shown in FIG. 5. The control voltage V cnlr , is buffered by two voltage amplifiers 52 and 54, with a gain of + 1 , and a gain of - 1 , respectively. In this way, the voltage across the channels of the two MOSFETs M rl and M r2 is balanced, which serves to mitigate non-linear effects. The voltage over these MOSFETs M rl and M r2 is set by V CI - lrl . The sum of the source currents I, is subtracted from current I cnlrl , and the difference is inverted by current amplifier 56 and integrated into a voltage by capacitor C t . A control loop (not shown) will stabilize the voltage over capacitor C f , so that the difference between current I, and current I cnlrl is forced to zero. Thus, the total source current I, will be equal to the current I c „ lr , . Because the source-drain voltage of MOFETs M rl and M r2 equals 2V c r |, the effective resistance of these two MOSFETs M rI and M r2 will be 2V cnlri /I cmil . If these MOSFETs M rl and M r2 match the MOSFETs in the filter with a possible scaling factor, all MOSFETs in the filter will be tuned to a value related to 2V cntrl /I cmrl . If a constant voltage or current is applied to either of the inputs V cnlr , or I cmrl , the other input can be used to tune the filter. In this way, the extended tuning range can be covered via a single tuning input. 7 FIG. 6 shows how a control loop can be established. This tuning mechanism is not only monotonic, it is also linear. If the ratio V cntrl /I cn l is derived from a stable off-chip resistor, the filter transfer function becomes stable, i.e. , independent of temperature and process variations. This can be very desirable. This scheme can be indefinitely extended for n tuning lines V,^,, V^ .. . N m ----,- Table 1 : Gear -y-tunl -J-tun2 Yuu.3 1 v γ tun V * sup v " sup 2 V v tun v v tun V τ sup 3 V γ tun v γ tun v * tun Table 1 shows a suggestion for the tuning-line voltages for a three-gear system based on p- channel MOSFETs. Other patterns are possible. Extension of the filter or the tuning assessment circuit is trivial: for each gear that needs to be added, an extra MOSFET must be paralleled to the existing parallel pairs, such as MOSFETs M, and M-, in FIG. 3 and MOSFETs M rl and M r2 in FIG. 5. Extension of the semi-automatic transmission part 18 in FIG. 4 is a bit more complex. FIG. 7 shows an elaboration of the basic circuit of FIG. 4. This modified circuit 70 can be used as a universal building block for the construction of automatic transmissions with more than two speeds. The incoming tuning voltage V m is applied to the input. The output voltage V out is one of the tuning voltages of the filter, and is supplied to the gates of a group of MOSFETs that act as tunable resistors. This output can be switched to the supply voltage V sup to switch this group off, or to the input of this circuit to switch the group on. The lock output lckout indicates the status of this stage; it is high if the corresponding MOSFET group is on, otherwise it is low. The lock input lckin is used to force the circuit in the state in which the group is on. FIG. 8 shows how two of these blocks can be interconnected to form a three- speed transmission 60. Suppose that block 70a is switched off, so that V^^ is switched to V sup . This is sensed by the comparator of block 70b. Since this voltage V sup is higher than either reference voltages V cl or V c2 , block 70b will also be off. According to Table 1 , the circuit is in first gear. Both lock outputs lckout and inputs lckin are low, and both 8 comparators 22 are switched to reference voltage V c2 . If the tuning voltage V^ becomes smaller than the reference voltage V c2 , this is sensed by block 70a only, because the input of block 70b is still switched to the supply voltage V sup . Therefore, only block 70a switches, the tuning voltage V- un2 starts following the tuning voltage V lun , and the circuit is in second gear. This will cause a feedback circuit like the one shown in FIG. 6 to raise the tuning voltage V lun to a level above the reference voltage V c2 . This should be done before block 70b switches, due to the fact that this block now also senses the tuning voltage V^. If this timing fails, and block 70b switches, the circuit will go to third gear, but it will automatically correct back to second gear when necessary. In second gear, the tuning voltage V,--^ follows the tuning voltage V mn . So if in this situation the tuning voltage V Wn again drops below the reference voltage V c2 , block 70b switches on, the circuit is in third gear, also resulting in a high level at the lock output lckout of block 70b, which forces block 70a to be on. This will ensure that if in this gear tuning voltage V, un rises above reference voltage V cl , only block 70b switches off, and the circuit switches down to second gear, never straight away to first. This assumes that the tuning voltage V lul - is reduced quickly enough after the gear change. The delay in the lock signal should be large enough to ensure the right timing. If, as mentioned above, due to bad timing, the circuit skips second gear when switching up from first, the lock signal will ensure a proper return to second gear. This requires the proper timing of the lock signal. If both the timings for switching up and down are wrong, second gear will not work at all. The three-gear semi-automatic transmission shown in FIG. 8 can be combined with an extended version of the tuning assessment circuit of FIG. 5 in a loop like the one shown in FIG. 6 to form a three-speed automatic transmission. FIG 9 shows a block diagram of an implementation. It is a three-gear system, so there are three tuning lines V tun |. 3 . The contents of the gear control block 18 is shown in FIG. 10, and is similar to the circuit of FIG. 8. The block 138 and block 139 correspond to the blocks 70a and 70b, respectively, in FIG. 8. Vsw 140 generates the threshold V cl and V c2 , which are called 'Vswh' and 'Vswl', respectively. A voltage buffer 102 has been added in the V mn line. The blocks 139 and 138 are shown in FIGS. 1 1 and 12, respectively. The differences between those circuits are the lock lck input and output. Block 139 has a lock output lck and no input, while block 138 has a lock input lck and no output. The comparator 22 has been realized with the pair M 3 and M . The switch consists of MOSFETs M 16 , M 17 , M 27 and M 29 . The circuit of FIG. 13 generates the reference voltages V cl and V c2 Reference voltage V is just a 200mV level generated by a resistive divider. Reference voltage V cl is the voltage V ba , - V + V, from equation (2) V bas is the same as Vbal in this figure. MOSFET M, has been biased in such a way that it generates -V A + V, To (partially) cancel the effects of the transconductance parameters of the MOSFETs. the drain current of MOSFET M, has been derived from the supply voltage VCC1 via MOSFET M 0 . FIG. 14 shows the tuning assessment circuit, which represents the circuit of FIG. 5. The inverting current amplifier has been realized as a pair of current mirrors M,,/M 12 and M 13 /M 14 . One of the reference MOSFETs has been realized as a parallel connection of two MOSFETs for matching purposes. "Vtbf" 120 contains the inverting and the non-inverting voltage amplifier. This block is shown in FIG. 15 The non-inverting amplifier consists of transistors Q u , Q, and Q 41 with a number of MOS bias-current sources. The inverting amplifier has been realized with transistors M 34 , M 1S , M 37 , M 38 , M 39 and resistors R 6 and R 7 . While several embodiments of the present invention has been shown and described, it is to be understood that many changes and modifications may be made thereunto without departing from the spirit and scope of the invention as defined in the appended claims.

Claims: CLAIMS: 1. A tuning range extension circuit for systems utilizing MOSFETs as tunable resistors, the tuning range extension circuit comprising: at least one additional MOSFET (M,,M 2 ) coupled in parallel to each existing MOSFET (M 3 ,M 4 ); switching means ( 14) having an input for receiving a tuning voltage (V,--,-), an input for receiving a supply (V sup ) or other voltage, and outputs coupled to the gates of the existing MOSFET (M 3 , M 4 ) and said at least one additional MOSFET (M, , M 2 ) said switching means (14) for selectively switching the gates of said MOSFETs (M* , M 2 ) between said tuning voltage (V lun ) and said supply (V sup ) or other voltage to produce a first control signal and a second control signal such that said control signals maintain said MOSFET (M,, M 2 ) in a defined on or off mode during signal processing; and whereby said at least one additional MOSFET (M„ M 2 ) , and the existing MOSFET (M 3 , M 4 ) form a network of tuned MOSFETs (M„ M 2 , M 3 , M 4 ). 2. The tuning range extension circuit according to claim 1 , further comprising: reference means having outputs for providing reference signals indicative of tuning voltage limits of said MOSFETs; said switching means (20) further comprising inputs (V.., . V c3 ) coupled to said outputs of said reference means; and a comparator circuit (22) having a first input coupled to said tuning voltage (V n ), a second input coupled to said reference means through said switching means (20) and an output coupled to said switching means (20), said comparator circuit comparing the received tuning voltage (V-,,) to one of said reference signals (V,, , V c --) and enabling said switching means (20) to switch between said reference signals when the tuning voltage (V t - approaches one of the reference signal values. 3. The tuning range extension circuit according to claim 2. further comprising assessment means for determining the effective values of the tuned MOSFET networks. 4. The tuning range extension circuit according to claim 3, wherein said assessment means comprises: a control current input (I,.-- . ---,) for receiving a control current; 11 a control voltage input (V c rl ) for receiving a control voltage; a pair of voltage amplifiers (52,54) each having an input coupled to said control voltage (V cntrl ) and an output, said pair of voltage amplifiers (52,54) having opposite gain values; tracking MOSFETs (M rl , M r2 ) coupled to said outputs of said voltage amplifiers (52,54) for tracking the existing MOSFETs (M 3 , M 4 ) in the system, the gates of said tracking MOSFETs (M rl , M r2 ) receiving the first and second control signals from said switching means; a comparing circuit (56) coupled to said control current and tracking MOSFETs (M rl , M r2 ) for comparing the drain-to-source current of said tracking MOSFETs (M rl , M r2 ) to said control current, said comparing circuit (56) having an output for outputting said tuning voltage (V. un ); and whereby when one of said control current (I cnlrl) and said control voltage (V cnlrl) are maintained constant, the other of said control current (I cmrl ) and voltage (V cmrl) provides the extended tuning range via a single tuning input. 5. The tuning range extension circuit according to claim 2, further comprising a logic circuit coupled between the output of said comparator circuit and said switching means (20), said logic circuit having a first input (lckin) for receiving a lock signal, a second input coupled to the output (lckout) of said comparator (22), and an output coupled to said switching means (20), said lock signal enabling the user to force the circuit into an on state. 6. The tuning range extension circuit according to claim 5, wherein said output of said comparator provides a lock out signal for determining the operating status of the stage of MOSFETs. 7. The tuning range extension circuit according to claim 5, wherein said logic gate comprises a logical OR gate. 8. The tuning range extension circuit according to claims 2 or 5, wherein said reference means comprises a first voltage source for producing a first reference voltage (V cl ) and a second voltage source for producing a second reference voltage (V c2 ), the first reference voltage having a value substantially equal to an upper limit of the tuning range, and the second reference voltage having a value substantially equal to a lower limit of the tuning range.

Inventors: GROENEWOLD GERRIT, GROENEWOLD, GERRIT
Applicants: KONINKL PHILIPS ELECTRONICS NV, PHILIPS NORDEN AB, KONINKLIJKE PHILIPS ELECTRONICS N.V.
Application year: 1997
Main classification: H03H11
IPC codes: H03H11