Step-up continuous mode DC-to-DC converter with integrated fuzzy logic current control

Abstract: A step-up continuous-mode DC-to-DC converter with integrated current control, comprising means (3) for comparing a voltage signal (Vout) in output from said converter and a reference signal (Vref) for generating an error signal (Ve) and means (7) for generating a compensation ramp which are suitable to generate a ramp signal which is added to a signal which is proportional to a current ramp that flows across the converter, the signal in output from the comparator means and the signal obtained from the sum being sent to additional comparator means (6), the output whereof, together with an oscillator signal (8), is sent to locking means (9) for driving a power transistor (20) of the converter, characterized in that fuzzy logic control means (11) are interposed between the comparator means (3) and the additional comparator means (6), the fuzzy logic control means (11) receiving in input the error signal output by the comparator means (3) and emitting in output a signal (Ve) which depends on the variation of the error signal over time to be sent to the additional comparator means (6).

Description: The present invention relates to a step-up continuous mode DC-to-DC converter with integrated fuzzy logic current control. The need is increasingly felt to have integrated DC-to-DC converters featuring a high performance in terms of transient load response, a wide stability range and a low cost. This need is particularly felt in fields of application where there is a tendency to increase integration density, minimizing the number and density of the circuit components. This is the case, for example, of converters for pagers, cellular telephones, hard disks, portable equipment and the like. The DC-to-DC converters according to the present invention are known in the literature as fixed-frequency step-up converters with duty cycle control. In most cases, duty cycle control is performed by means of a simple current-mode fedback linear adjustment diagram. The discontinuous operating mode of the converter does not entail linear control stability problems, since the closed-loop transfer function of the controller is of the first-order type, owing to the drop to zero of the inductor current, during each clock cycle. At the crossing frequency (unit loop gain), the transfer function assuredly has a phase margin of more than 90°, ensuring its stability. Moreover, in this operating mode the transfer function does not contain terms that depend on the load. Viceversa, in continuous-mode operation the lack of a drop to zero in the inductor current introduces a tendency of the system to respond to load transients with variations of the duty cycle which tend to destabilize the controlled system. Moreover, the use of a current-mode control diagram for continuous-mode operation introduces in the transfer function a term which depends on the output load, introducing an additional phase shift which adds to the one introduced by the output LC unit, making it extremely difficult, if not virtually impossible, to achieve optimum feedback loop compensation for a wide range of load and input conditions. The problem is particularly evident in operating conditions close to the limits of the specifications, with a highly variable load or with low supply voltages, where a high speed of response to transients in the load and in the supply voltage is required. US-A-4,975,820 discloses a DC-to-DC converter and a method of controlling a continuous mode DC-to-DC converter but does not disclose fuzzy logic means interposed between comparator means and additional comparator means. The problem linked to the current-mode control of a step-up converter in continuous-mode operation is usually dealt with by resorting to the so-called "current-mode with compensation ramp" method. According to this method, as shown in the block diagram of figure 1, a ramp signal is generated inside the circuit and is added to a signal which is proportional to the current ramp that flows across the inductor during the first step, in order to reduce the loop gain proportionally to the steady-state value of the duty cycle. In this manner, the instability problems arising for the continuous mode when the value of the duty cycle exceeds 50% are reduced considerably. The block diagram shown in figure 1 comprises, and designates with the reference numeral 1, a DC-to-DC converter which is supplied by a supply voltage 2 with an output voltage Vout. The reference numeral 3 designates an error amplifier which receives in input the output voltage Vout together with a reference voltage Vref indicated by the block 4. A block, designated by the reference numeral 5, is cascade-connected to the error amplifier 3 and indicates the gain of the error amplifier. The output voltage of the block 5, designated by Ve, is input to an additional comparator, designated by the reference numeral 6, which receives in input the ramp signal which is proportional to the switching current during the ON step with the addition of a compensation ramp signal designated by the reference numeral 7. The output of the amplifier 6, together with the output of an oscillator block 8, is sent to a duty cycle control logic block, designated by the reference numeral 9, the output whereof controls the DC-to-DC converter. The transfer function of the circuit illustrated in figure 1 has a zero with a positive real part, the value whereof depends, among other factors, on the load conditions and on the value of the duty cycle, in addition to a pair of conjugate complex poles, which tends to generate overshooting in response to transients. It should be noted that in the diagram of figure 1 the reference numeral 10 designates a load to which the voltage in output from the DC-to-DC converter is sent. This compensation method, however, is not effective for working over a wide range of load and supply conditions and also reduces the closed-loop gain of the regulating device, consequently reducing the dynamic performance. A second approach to the above-mentioned problems is a current-mode fuzzy logic control, which is the subject of European patent application no. 94830328.4 filed on July 1, 1994 in the name of this same Applicant. This approach uses an (external) fuzzy control algorithm whose operation is based on the acquisition of the input and output voltages, of the current across the inductor and optionally of the temperature of the power transistor. This solution, however, cannot be easily implemented on the chip. Moreover, it is difficult to acquire the instantaneous value of the inductor current. Fuzzy control of the duty cycle and optionally of the base current of the power transistor which also utilizes the temperature measured on the power transistor is also scarcely relevant from the practical point of view. Another drawback of the approach proposed in the above-cited patent application is that the control system, as mentioned, is inadequate as an architecture to be used in an integrated regulator, since it is based on the measurement of values which are not available during all the operating steps in low-power systems with a high degree of circuit integration, high efficiency, and a minimal number of passive components and control inputs. The aim of the present invention is therefore to provide a DC-to-DC converter which is capable of operating with a continuous-mode step-up or flyback configuration with integrated fuzzy logic current control. Within the scope of this aim, an object of the present invention is to provide a DC-to-DC converter with integrated fuzzy logic current control which allows to obtain an architecture which is extremely simplified with respect to other conventional nonlinear control approaches, including hitherto known fuzzy-logic approaches. Another object of the present invention is to provide a DC-to-DC converter with integrated fuzzy logic current control which can be integrated easily. Another object of the present invention is to provide a DC-to-DC converter with integrated fuzzy logic current control in which the fuzzy logic controller is introduced together with the already-known compensation ramp, preserving its functionality so as to allow the system to deal with the above-cited problems that restrict its use during continuous-mode operation. Another object of the present invention is to provide a DC-to-DC converter with integrated fuzzy logic current control in which the fuzzy logic controller block acts directly on the comparator block that provides the modulator for switching the power transistor on and off. Another object of the present invention is to provide a DC-to-DC converter with integrated fuzzy logic current control which is highly reliable and relatively easy to manufacture and at competitive costs. This aim, these objects and others which will become apparent hereinafter are achieved by a step-up continuous-mode DC-to-DC converter with integrated current control which comprises means for comparing a voltage signal in output from said converter and a reference signal for generating an error signal and means for generating a compensation ramp which are suitable to generate a ramp signal which is added to a signal which is proportional to a current ramp that flows across said converter, the signal in output from said comparator means and the signal obtained from said sum being sent to additional comparator means, the output whereof, together with an oscillator signal, is sent to means for driving a power transistor of said converter, characterized in that fuzzy logic control means are interposed between said comparator means and said additional comparator means, said fuzzy logic control means receiving in input the error signal output by said comparator means and emitting in output a signal which is proportional to the variation of said error signal over time to be sent to said additional comparator means. Further characteristics and advantages of the invention will become apparent from the description of a preferred but not exclusive embodiment of the DC-to-DC converter according to the invention, illustrated only by way of non-limitative example in the accompanying drawings, wherein: figure 1 is a block diagram of a DC-to-DC converter control with ramp compensation; figure 2 is a block diagram of a fuzzy logic control with ramp compensation, according to the present invention; figure 3 is a detailed block diagram of the fuzzy logic control implemented in the control diagram shown in figure 2, according to the present invention; figure 4 plots the membership function for the error signal in the fuzzy controller according to the present invention; figure 5 plots the membership function for the error derivative signal in the fuzzy control according to the present invention; figures 6A-6C respectively plot the behavior of the load current, of the output voltage and of the current on the inductor in a linear control of a known kind; figures 7A, 7B and 7C respectively plot the behavior of the load current, of the output voltage and of the inductor current in a fuzzy control according to the present invention, in contrast with the linear control plotted in figures 6A-6C; figures 8A-8C respectively plot the behavior of the supply voltage, of the output voltage and of the inductor current in a linear control of a DC-to-DC converter with slope compensation; figures 9A-9C respectively plot the behavior of the supply voltage, of the output voltage and of the inductor current in a fuzzy control of a DC-to-DC converter according to the present invention; and figure 10 is a circuit diagram, in block form, of the fuzzy controller for DC-to-DC converter according to the present invention. Figure 2 illustrates a block diagram of the fuzzy logic control with ramp compensation according to the present invention. In this control diagram, in which blocks that are similar to those of figure 1 have been assigned identical reference numerals, the output of the comparator 3 is sent to a fuzzy logic control, designated by the reference numeral 11, before being sent as a signal Ve to the comparator 6. In this case, the fuzzy logic controller block 11 acts directly on the comparator block 6, which provides the PWM modulator for switching on and off the power transistor, designated by the reference numeral 20 in figures 2 and 1. Figure 3 is instead a schematic block diagram of the fuzzy logic controller 11 included in the control diagram of figure 2. In figure 3, the reference numeral 30 designates the error signal which is output by the comparator block 3. The block 31 calculates the derivative of the error over time in order to obtain a slope signal which is input, together with the error signal 30, to a fuzzifying block 32, the output whereof is sent to a differential engine 33 which receives in input a rule base 34 and communicates bidirectionally with said rule base. The output of the differential engine 33 is sent to defuzzifying means 35, which provide in output an error voltage signal Ve which is then sent to the comparator block 6, as shown in figure 2. Figures 4 and 5 respectively plot the membership functions for the error signal 30 and for the derivative signal, designated by the reference numeral 36 in figure 3. In figure 4, the term eneg relates to the membership function of the negative error, the term ezero relates to the membership function for the zero value of the error, and the term epos relates to the membership function for a positive error signal. In figure 5, k designates the value of the slope of the error signal and therefore various membership functions of the error derivative signal 36 for different slope values, as k varies, are plotted. The following Table 1 lists the fuzzy logic rules in the example shown in figure 3 and in figure 2. IF (error is 'neg') then y1 is 0 IF (error is 'zero') and (slope is 'k') then y2 is 0 IF (error is 'zero') and (slope is '0.5k') then y3 is 0.2 IF (error is 'zero') and (slope is '0.3k') then y4 is 0.4 IF (error is 'zero') and (slope is '0.1k') then y5 is 0.6 IF (error is 'zero') and (slope is '0.05k') then y6 is 0.8 IF (error is 'pos' then y7 is 1 From the above description it is possible to deduce that this solution entails the following advantages: the circuit that implements the fuzzy logic regulator block, shown in figure 3, can be easily integrated on silicon together with the normal signal and power circuits. Moreover, a signal which is proportional to the current of the inductor is acquired only during the power-on step in order to use it in the current loop in the integrated circuit that provides the converter, as a partition of the emitter current of the power transistor 20: this produces a practically negligible loss in the power efficiency of the regulator and does not entail the use of external sense resistors in addition to the sense resistor 21 for the DC-to-DC converter 1 or of secondary windings on the inductor. The control action acts on the transfer function in a nonlinear manner within the voltage loop, compensating for the negative effects of load variations. The proposed control diagram can be applied to all regulators with current-mode control, requiring at the most the setting of the fuzzy logic control parameters (i.e., of the position of the membership functions in the antecedents and conclusions). Figures 6A-6C and 7A-7C illustrate the load regulation behavior, obtained by simulation, of the circuit with linear control and fuzzy control respectively. The figures clearly show that in order to ensure stability of the control loop when the gain or stage of the voltage loop is equal, in the linear case it is necessary to use a slope value for the compensation ramp, i.e. a value of k, which is higher than the value used in the case of the fuzzy nonlinear controller according to the present invention. This entails a drastic reduction in the loop gain in the linear case, when the operating mode of the converter changes from discontinuous to continuous, with a consequent increase in the value of the duty cycle. Accordingly, by using a linear regulator in the control architecture at issue, even if it is a well-compensated one, the result is a less advantageous load regulation value than in the fuzzy-logic solution. Figures 8A-8C and 9A-9C instead plot the line regulation behavior, obtained by simulation, of the circuit with linear control and with fuzzy control respectively. The same remarks made above also apply to the case of line regulation: the loss of performance as the input voltage varies in the case of linear control can be ascribed here to the lower unit value of the loop, which ensures the stability of the control action, that can be obtained with respect to the value obtained by using the fuzzy controller. Analysis of figures 6A-9C therefore clearly shows that the adoption of a nonlinear control system, integrated in an architecture of the current-mode type, is capable of improving the static performance of the control system in addition to ensuring better and more stable dynamic performance in terms of speed of response to transients and to overshoot sequences. The circuit that implements the fuzzy logic controller is designed to be included in a specifically designed integrated DC-to-DC converter architecture with a minimal area increase. Therefore, with reference to figure 10, a possible circuit diagram which implements the block diagram of the fuzzy control illustrated in figure 3 is shown. Figure 10 illustrates the analog circuit blocks that allow to provide the above-cited fuzzy controller. As regards the fuzzy antecedent part, each membership function is provided by means of transconductance operational amplifiers with suitably designed transconductance functions. In figure 10, the reference numeral 40 designates the membership function "eneg" shown in figure 4; the reference numeral 41 designates the membership function "ezero" shown in figure 4; and the reference numeral 42 designates the membership function "epos" shown in figure 4. Accordingly, the blocks 40, 41 and 42 illustrate the membership functions for the error signal 30, designated by V error in figure 10. As regards the error signal derivative signal, designated by the reference numeral 31 in figure 3 and by Vderiv i in figure 10, the membership functions are indicated respectively by the blocks 43-47, which correspond to the membership functions shown in figure 5 for values of the slope k which vary between 1 and 0.05. Membership functions of the "eneg" and "epos" type are implemented by means of a single controlled-transconductance differential block, while the bell-shaped functions of the "ezero" type are obtained by performing the current sum of the characteristics of saturation differential blocks. The resulting currents are filtered by filtering means, designated by the reference numerals 48, 49, 50, 51 and 52, which allow the lowest of the two currents to pass for fuzzy rules with "AND"-type logic (as an alternative, it is possible to implement multiplier circuits with Gilbert cells or equivalent devices, to implement the product of the degrees of membership of the inputs in the respective fuzzy sets, or, for fuzzy operators of the OR type, it is possible to use circuits which produce currents whose value is equal to the maximum input current), so as to provide, for each rule, the fuzzy differential engine 33. Finally, for the implementations of the defuzzifying means 35, since it is necessary to calculate a weighted sum, with respect to the values of the conclusions of the fuzzy rules, of the currents produced for each fuzzy rule, current-gain blocks, designated by the reference numerals 53, 54, 55, 56, 57, 58, 59 and 60 are used; said blocks can be obtained by means of circuits of the current-mirror type, designated by the reference numeral 61 by way of example in figure 10. The total sum of the currents is obtained in the adder node 62. In practice it has been observed that the DC converter with fuzzy control combined with ramp compensation achieves the above aim, since it allows to combine the advantages, in terms of speed of response to the input transients that are typical of current-mode control, with the flexibility of a fuzzy control system in the voltage loop, extending the stability range of the system beyond the limits set by conventional control systems. For the correct operation of the fuzzy logic controller block it is sufficient to supply in input the error signal of the output voltage with respect to the reference voltage, from which a signal is obtained which is proportional to its variation over time: this leads to a compact diagram featuring simple circuit implementation. The fuzzy logic controller block acts directly on the comparator block that provides the PWM modulator for switching on and off a power transistor. The DC-to-DC converter thus conceived is susceptible of numerous modifications and variations, all of which are within the scope of the inventive concept; all the details may also be replaced with other technically equivalent elements. In practice, the materials employed, so long as they are compatible with the specific use, as well as the dimensions, may be any according to requirements and to the state of the art. Where technical features mentioned in any claim are followed by reference signs, those reference signs have been included for the sole purpose of increasing the intelligibility of the claims and accordingly such reference signs do not have any limiting effect on the interpretation of each element identified by way of example by such reference signs.

Claims: A step-up DC-to-DC converter capable of operating in continuous mode with integrated current control, comprising means (3) for comparing a voltage signal (Vout) in output from said converter and a reference signal (Vref) for generating an error signal (30) and means (7) for generating a compensation ramp which are suitable to generate a ramp signal which is added to a signal which is proportional to a current ramp that flows across said converter, the signal in output from said comparator means and the signal obtained from said sum being sent to additional comparator means (6), the output whereof, together with an oscillator signal (8), is sent to lock means (9) for driving a power transistor (20) of said converter, characterized in that fuzzy logic control means (11) are interposed between said comparator means (3) and said additional comparator means (6), said fuzzy logic control means (11) receiving in input the error signal output by said comparator means (3) and emitting in output a signal (Ve) which is proportional to the variation of said error signal over time to be sent to said additional comparator means (6). The DC-to-DC converter according to claim 1, characterized in that said fuzzy logic control means (11) comprise fuzzifying means (32) which receive in input said error signal (30) and a signal (36) which represents the derivative of said error signal (30) over time; differential engine means (33) which are cascade-connected to said fuzzifying means (32) and are connected to a rule base (34); defuzzifying means (35) being provided which are cascade-connected to said differential engine means (33) to generate the signal that is suitable to be sent to said additional comparator means (6). The DC-to-DC converter according to claim 2, characterized in that said fuzzifying means (32) comprise membership functions (40-47) for said error signal (30) and said error signal derivative signal (36). The DC-to-DC converter according to one or more of the preceding claims, characterized in that said rule base (34) comprises rules having fuzzy antecedents and crisp or fuzzy conclusions. The DC-to-DC converter according to one or more of the preceding claims, characterized in that each membership function is provided by means of a transconductance operational amplifier for generating currents, said currents being filtered in filtering means (48-52) which are suitable to allow the passage of the lowest value of each pair of currents obtained respectively from the error signal (30) and from the error signal derivative signal (36). The DC-to-DC converter according to one or more of the preceding claims, characterized in that said defuzzifying means (35) comprise current-gain blocks (53-60) which receive in input the currents in output from said filtering means (48-52). The DC-to-DC converter according to one or more of the preceding claims, characterized in that said current-gain blocks (53-60) are provided by means of circuits of the current-mirror type (61). The DC-to-DC converter according to one or more of the preceding claims, characterized in that the output signals of said defuzzifying means (35) are added, through adder means (62), to generate said signal suitable to be sent to said additional comparator means (6). A method for controlling a continuous mode DC-to-DC converter with integrated current control, comprising the steps of: sensing a difference between an output voltage (Vout) of said converter and a reference voltage in order (Vref) to obtain an error signal (30); sensing a current of said converter and adding thereto a compensation current ramp; characterized in that it further comprises a fuzzy logic control step, the output-signal whereof is sent, together with said signal obtained from the sum of the sense current of said converter and of the ramp current, to additional comparator means (6), the output whereof, together with an oscillator signal, is used to drive a power transistor of said converter. The method according to claim 9, characterized in that said fuzzy logic control step comprises: sending to fuzzifying means (32) said error signal (30) and a signal (36) which is the derivative of said error signal (30); generating, by means of a rule base (34) constituted by antecedents and conclusions, current signals for providing a fuzzy differential engine (33); defuzzifying said current signals, calculating a weighted sum of said current signals produced for each fuzzy rule. The method according to claim 10, characterized in that said fuzzy logic control is integrated on silicon together with the power signal circuit.

Inventors: CRISCIONE MARCELLO, OCCHIPINTI LUIGI, CRISCIONE, MARCELLO, OCCHIPINTI, LUIGI
Applicants: ST MICROELECTRONICS SRL, STMICROELECTRONICS S.R.L.
Application year: 1997
Main classification: H02M1
IPC codes: H02M3, G05F1, G05B13