REDUCED COMPLEXITY SIGNAL CONVERTER

Abstract: In a signal converter, an input signal is combined with a feedback signal in a subtracter (10). Samples of the combined signal are mapped onto a larger number of output samples by a mapper (20). According to the present invention a single combined signal is used instead of a number of combined signals. This results in a reduced complexity. According to a further embodiment of the invention the signal converter comprises a noise shaping filter (18) between the subtracter (10) and the mapper (20).

Description: "Reduced complexity signal converter" The invention is related to a signal converter for converting an input signal into an output signal, the signal converter comprises combining means for deriving a combined signal from the input signal and a feedback signal, mapping means for deriving a plurality of samples of the output signal from samples of the combined signal, the mapping means being further arranged for deriving the feedback signal from samples of the combined signal. Such a signal converter is known from US Patent No. 5,272,655. Signal converters of this type are used, for example, in digital-to-analog converters operating according to the bit stream principle. In such converters, an input signal having a first sample frequency is transformed in an output signal having a second sample frequency. The input signal has a spectrum which is periodic with a period corresponding to the first sample frequency. Once the sample rate has been increased, the frequency spectrum of the output signal having the second sample rate continues to be periodic with a period corresponding to the first sample rate. However, a signal is desired which has a frequency spectrum that is only periodic with a period corresponding to the second (higher) sample rate. In order to realise this, a filter is required which eliminates the undesired frequency components. In a bitstream type converter, this filtering is performed by a low pass filter present in the feed forward path of die bitstream type converter. A problem with bit stream type converters, especially with high ratios of the second and first sample frequency is the high operating frequency of the sample rate converter. In the signal converter according to the above mentioned US patent, the operating frequency is reduced with a factor p. This is obtained by using mapper means which generates in response to one sample of the output signal of the combining means p samples of the output signal. The output samples are downsampled using a plurality of feedback filters. The feedback signals are combined with filtered input signals to obtain a plurality of difference signals. Each of mese difference signals are filtered using a separate filter and finally combined into the combined signal. The number of filters is equal to the order of the filtering required, which can result in an increased complexity. This increased complexity leads to a larger amount of silicon area if me signal converter is realised in hardware. The object of the present invention is to provide a signal converter according to the preamble of which the complexity has been reduced. Therefor the signal converter according to the present invention is characterised in that the combining means are arranged for deriving one single combined signal, and in that the mapping means are arranged for deriving the feed back signal representing a decimated and ami alias filtered output signal. The invention is based on the recognition that it is possible to replace the plurality of filters by one single filter which performs downsampling and a i aliasing filtering of the output signal in order to obtain the feedback signal. An embodiment of the invention is characterised in that the combining means comprise a noise shaping filter for obtaining the combined signal. By introducing a noise shaping filter for filtering the combined signal, it becomes possible to optimise both the noise shaping characteristics of the signal converter and the anti-aliasing filtering performed in the feed-back path. A further embodiment of the invention is characterised in that the mapping means are arranged for providing a further signal representing the downsampled output signal, and in that the noise shaping filter also is arranged for deriving a filtered further signal for obtaining the combined signal. The introduction of a further downsampled signal into the noise shaping filter, results in additional degrees of freedom, which can be exploited for optimising the sample rate according to the present invention. In particular it allows a substantial independent optimisation of the anti-aliasing filtering and the noise shaping characteristics. A further embodiment of the invention is characterised in that the decimating means have an impulse response corresponding at least partly to the impulse response of a comb filter. It has turned out that a comb filter is very suitable to perform the filtering operation in the feedback path. Its complexity is very low, and it can attain good suppression of aliasing components. They also have a substantially constant transfer function in the pass band. A further embodiment of the invention is characterised in that the mapping means are arranged for recursively determining the samples of the output signal from a filtered error signal, the error signal being representative of the difference between the input sample and a weighted sum of output samples already determined. By recursively determining the samples of the output signal from the filtered difference between an input sample and a weighted sum of output samples already determined, it is possible to suppress undesired signals in the ouφut signal by choosing a proper transfer function of the filter used for the filter operation. A further embodiment of the present invention is characterised in that the mapping means are arranged for filtering the error signal according to a high-pass transfer function. By using a high pass filtering function, it is possible to suppress undesired signals in the frequency band covering the input signal. Known signal converters often suffer from spurious signals in the frequency range of the input signal. The invention will now be explained with reference to the drawings. Herein shows: Fig. 1 , a signal converter, being here a sample rate converter according to the present invention; Fig. 2, a sample rate converter according to the invention in which a noise shaping filter is used; Fig. 3, a sample rate converter according to the invention using a second order noise shaping filter; Fig. 4, a sample rate converter according to the present invention using a third order noise shaping filter; Fig. 5, a mapper to be used with the present invention. In the sample rate converter according to Fig. 1 , an input signal Y(Z) having a sample rate R/q is applied to a first input of the combining means, being here a subtracter 1. The output signal of the subtracter 1 is connected to an input of mapping means 2. In the mapping means 2, the output signal of the subtracter 1 is connected to a mapper 3. The ouφut of the mapper 3 is connected to an input of weighted summing means 4 and to an input of a parallel to series converter 5. The ouφut of the weighted summing means 4 with ouφut signal X β CZ) is connected to a second input of the subtracter 1. The ouφut of the parallel to series converter 5, carrying ouφut signal X(z) constitutes the ouφut of the sample rate converter. In the sample rate converter according to Fig. 1 , the input signal Y(Z), the feedback signal X 0 (Z) and the signal B(Z) have a sample rate R/q, in which R is the sample rate of the ouφut signal X(z). The mapper 3 provides q ouφut samples per input sample B(Z). It is observed that in the notation used for the signals X,Y, and b the value of Z is equal to z q . The operation of the sample rate converter according to the invention is based on the recognition that if the ouφut signal x n is decimated after being filtered by a system filter F x (z) with impulse response {ho, h • • • , h κ .ι } the resulting sequence y n can be described by: κ-\ Yn = ∑ hf x n q-i <*> > 0 If the sequence x n is known, y n is a q-times decimated version of F x (z) • X(z) where X(z) is the z-transform of the sequence x^. In the sample rate converter according to the invention, the sequence x n has to be determined from y n . In order to do so, (1) can be written as: q-ϊ κ-\ ∑ l« • Xnq-i ~ Yn - ∑ i - X^^ (2 ) i * 0 i< * q From (2) it can be seen that a weighted sum over the sequence {x nq . q+ ι, • • • , X nq } can be recursively determined from y n and a weighted sum over the past sequence {x nq . + ι. • • • . x nq - q ) • ^ n me sample rate converter according to Fig. 1, the weighted sum over the past sequence is determined by the weighting summing means 4, and the substraction of the weighted sum over the past sequence from the input sample y n is performed by the subtracter 1. The weighted sum over the sequence { n q . q+ 1 , • • ■ , X τ , q } is available as the signal B n . The task of the mapper 3 is to provide the q samples of the sequence {x nq . q+ ι, • • • , nq } in response to the signal B n . This however cannot be done in a unique way, but there exist a large number of sequences {x nq . q+ ι» • • " . X nq } cn n ve a weighted sum B n . The values of x can be found with an exhaustive search minimizing the absolute value of the error between B n and the sum over the sequence {x nq . q+ ι, • ■ • , X nq } The weighted summing means 3 derive a decimated feedback signal from the ouφut signal. In order to reduce the amount of aliasing during decimation the filter F x (z) should have good suppression outside the frequency range of the input signal. In addition if spectrum correction is to be avoided, F x (z) should be substantially constant in the frequency range of the input signal. A suitable choice for the transfer function of the filter F x (z) is the transfer function of a comb filter or an approximation thereof. For the transfer function of the filter F x (z) can be written: 1 - z ' F x { z) = c- (3 ) r m 1 - z -1 In (3) c is the DC gain of the filter and m is the order of the filter F x (z). Introducing the property (l-t*^=(l-α) - (l +c.+e + • • • +a n n - '1 ) into (3) results in: For m=2, (4) can be expanded into If c is chosen such that c/q m is an integer power of 2, the filter according to (4) can be very easily be implemented. The weighted summing means can be realised in the form of a look up table having stored the samples h q ,h q+ 1 , • • • ,h κ .ι of the impulse response of (4). In this case the value of K is m - (q-l)-l . The inputs of the look up table are constituted by the sequence of ouφut samples {Xn q .κ+ι, • • " ■ *n q -q}- In the sample rate converter according to Fig. 2, the input is connected to an input of combining means 17. In the combining means 17, the input signal is applied to a first input of a subtracter 10. the ouφut of the subtracter 10 is connected to a first input of a noise shaping filter 18. The ouφut of the filter 18, constituting the ouφut of the combining means 17 are connected to an input of the mapping means 21. I the mapping means 21 the input signal B is applied to an input of a mapper 20. The ouφut of the mapper 20 is connected to an input of a parallel to serial converter 22, to an input of a look up table 14 and to the input of a delay element 16. The ouφut of the look up table, carrying the further signal, is connected to a second input of the noise shaping filter 18. The ouφut of the delay element 16 is connected to an input of a look up table 12. The ouφut of the look up table 12, carrying the feedback signal is connected to a second input of the subtracter 10. The embodiment according to Fig. 2 is based on the requirement to obtain noise shaping of the quantisation error introduced in the mapping process. This quantisation error can be modelled by an additive noise source whose ouφut signal is added to the output signal of the mapper. Because the structure of the sample rate converter resembles that of a sigma-delta modulator, the noise shaping properties of a sigma-delta modulator are taken as starting point for the derivation of the required changes of the structure of the sample rate converter according to the invention to incorporate noise shaping. For a sigma-delta modulator can be written: U(z) =M{z) -Y(z) +G{z) -E{z) (6) In (6) U(z) is the z-transform of the ouφut signal of the sigma-delta modulator, M(z) is the transfer function for the input signal of the sigma-delta modulator, Y(z) is the z-transform of the input signal, G(z) is the noise transfer function of the sigma-delta modulator, and E(z) is the z-transform of the quantisation error. For the following analysis the filter function F x (z) is rewritten as: If it is assumed that the error signal in the sample rate converter according to the invention has to be shaped with a noise transfer function G(Z) and that the expression for U(Z) of the sample rate converter according to the invention is similar to that of (6), with z being replaced by Z=z q due to the down sampling operation, (2) can be written as: X fχl (Z) = M(Z) [Y{Z)+G{Z) -E(Z)} -Z ~l X fχ2 {Z) (8) In (8) X f „(Z) is the q-times decimated version of F xl (z) X(z) and X fx2 (Z) is the q-times decimated version of F^z) -X(z). The signal B(Z) is equal to X fιl (Z)+E(Z). Substituting (8) in the above mentioned expression for B(Z) gives a value of B(Z) equal to: BIZ^^{YIZ)-Z-' Xfa IZ)}.2^λ Xf Z (9) The embodiment according to Fig.2 is arranged for implementing (9). The combination of the delay element 16 and the look up table 12 is arranged for determining the signal Z^X^Z) from the ouφut signal of the mapper 20 and the look up table 14 is arranged for determining the signal X f „(Z). The filter 18 is arranged for filtering the ouφut signal of the subtracter 10 according to the transfer function M(Z)/G(Z), and for filtering the ouφut signal of the look up table 14 by the transfer function {G(Z)-1}/G(Z). The transfer function G can be chosen according to similar stability criteria as used in the design of loop filters in sigma delta modulators. In the sample rate converter according to Fig. 3, an input signal is applied to an input of a sample and hold circuit 24. The ouφut of the sample and hold circuit 34 is connected to a first input of a subtracter 26. The ouφut of the adder 26 is connected to a first input of an adder 28. The ouφut of the adder 28 is connected to an input of a subtracter 30 and to an input of a delay element 38. The ouφut of the delay element 38 is connected to a second input of the adder 28. The ouφut of the subtracter 30 is connected to a first input of an adder 32. The ouφut of the adder 32 is connected to an input of a mapper 34 and to an input of a delay element 44. The ouφut of the delay element 44 is connected to a second input of the subtracter 32. The ouφut of the mapper 34 is connected to an input of a parallel to series converter 36 and to the input of a delay element 46. The ouφut of the delay element 46 is connected to an input of a look up table 40 and to an input of a look up table 42. The ouφut of the look up table 40, with ouφut signal X D , is connected to a second input of the subtracter 26. The ouφut of the look up table 42 is connected to a second input of the subtracter 30. The sample rate converter according to Fig. 3 is obtained by choosing G(Z) to be equal to (1-Z "1 ) 2 , and M(Z) being equal to 1. Substituting these value in (9) results in: Yl Z) -Z- l (Xf , (Z) +X f A Z) ) Z ~x X f ΛZ) B {Z) ~ xl Jχ2 - x2 ( 10 > CL-Z "1 ) 2 ( 1-Z "1 ) f ,, + f , a can be replaced by X fϋ with X fι3 being equal to: q-\ K-q xp in) - ∑ h, ; ■ x nq _ t + ∑ h q+i • x π< -_ ( ( 11 ) =0 ι=0 In the block diagram according to Fig. 3, the signal Z "l X fλJ (Z) is generated by the combination of the delay unit 46 and the look up table 40. The signal Z 'l X h) (Z) is generated by the combination of the delay unit 46 and the look up table 42. The transfer functions 1/(1-Z " ') and 1/(1-Z -1 ) 2 are realised by a cascade connection of two integrators, the first integrator comprising the adder 28 and the delay element 38, and the second integrator comprising the adder 32 and the delay element 46. If H(z) is chosen to be a second order comb filter having an impulse response defined by (5), f^k) can be written as: * ■ ** <*> - < 12 > Consequently, X fti can be generated by using only a few exclusive OR gates for adding the samples x,.^. In the sample rate converter according to Fig. 4, the input signal is applied to an input of a sample and hold circuit 24. The ouφut of the sample and hold circuit 24 is connected to a first input of a subtracter 26. The ouφut of the subtracter 26 is connected to a first input of an adder 43. The ouφut of me adder 43 is connected to an input of a delay element 45, an input of an adder 47 and to the input of a multiplier 54. The ouφut of the delay element 45 is connected to a second input of the adder 43. The ouφut of the adder 47 is connected to an input of a delay element 48, an input of an adder 50 and to the input of a multiplier 56. The ouφut of the delay element 48 is connected to a second input of the adder 47. The ouφut of the adder 50 is connected to an input of a delay element 52, and to an input of a multiplier 58. The ouφut of the delay element 52 is connected to a second input of the adder 50. The ouφut of the multiplier 54 is connected to a first input of an adder 60. The ouφut of the multiplier 56 is connected to a second input of the adder 60. The ouφut of the multiplier 58 is connected to a third input of the adder 60. The ouφut of the adder 60 is connected to an input of a mapper 62. The ouφut of the mapper 62 is connected to an input of a parallel to series converter 64 and to an input of a delay element 66. The ouφut of the delay element 66 is connected to an input of a look up table 41. The ouφut of the look up table 41 is connected to a second input of the subtracter 26. The sample rate converter according to Fig. 4 is obtained by choosing M(Z) to be equal to l-G(Z). The function G(Z) is chosen to be equal to: G { Z ) = ; C ( Z-l ) 2 . ( 13 ) ( Z- Pl ) ( Z-p,) ( Z-P 3 ) C being a constant. Substituting these values in (9) results in: B{Z) - 1" ?l ) {Y{Z)-X f ΛZ)-Z- γ X f ΛZ)} (14) G{Z) Jχl Jχ2 In which the term (1-G(Z)}/G(Z)} can be written as: l -G(Z) _ ( - t) (Z- 2 ) (Z- 3 ) -C(Z-l) 3 = aZ ^ bZ 1 ^ cZ?15) G(Z) (Z-l) 3 (Z-l) (Z-l) 2 (Z-l) 3 The look up table 41 in the converter according to Fig.4 is arranged for generating the signal X { Z) + Z^X^Z). The values chosen for a,b and c are 2.5, 1.5, and 0.75 respectively. The input of the mapper 34 according to Fig.5 is connected to an input of a quantizer 70. The ouφut of the quantiser, carrying an ouφut signal representing the quantisation level, is connected to an input of a ROM 72. At the ouφut of the ROM 72 the ouφut of the mapper is available. It is observed that the look up tables in the feed back path can be incorporated in the ROM 72. In that case the mapper 34 generates more than one ouφut signal. As was explained earlier, the task of the mapper 34 is to derive from an input signal B n a sequence of q samples x nq . q+ ι • • -x nq according to the equation -7-1 B n - ∑hrx,,^ ( 16 ) «-0 If the number of possible values of x is limited to p, the number of values of B n which exactly are equal to (18) cannot exceed q p . A way of implementing the mapper is to quantise the signal B n and use a ROM for generating the sequence x +1 • • -x- jq in response to the quantised version of B n . An improved mapping algorithm includes filtering of the quantisation error in such a way that the error signal does not have descrete frequency components in the frequency band of the input signal. The filter F xl (z) is a filter with impulse response h 0 ,hι, • ■ .h q ^.h q . j , with II Q ≠O. A vector x is defined as {x 0 ,Xι, - • ,x q .ι) and the vector Y is defined as {yo,yι, • • ,y q . \ }- The impulse response of the F xl (z) can be cast in a q x q lower triangular Toeplitz matrix: The relation between x and y can be described as H*x τ =Y T . It is observed that B n is equal to H q -x τ +e q , in which H q is the last row of the matrix H, and e q is the quantisation error involved with B π . The vector Y can now be expressed as: 10 H ~ ( 17 ) Y = Y+ in Which y 0' V l ' " ' • ' V q-2 ∞ StiI1 unknown, and ^ is the quantisation error in the samples y^ By stating initially h q _, x 0 =B, and X j • • • x q _ι =0, for the vector Y can now be found: B Y - -- — [ ι λ , • ■ • , h q . x ) (18) h q ~\ (20) is derived using H « x τ =Y T , with neglecting the errors e. When the errors t are known, the value of x can be calculated according to: x τ = H ~l { Ϋ T +€ T ) (19 ) .T _ H Λ ( Ϋ τ +e τ ) (22) has to be calculated recursively using starting values x 0 and e 0 . Due to the fact that H is a lower triangular Toeplitz matrix, its inverse has a special structure where all its diagonal elements are equal to l/h 0 , and all elements above the diagonal are zero. The elements h j j of H "1 can generally be described as h q q . i+j , where h q κ is the k m element in the q Λ row of H "1 . These relations can be used in a recursive procedure to find the values In (23) Q[z] is a quantisation operation which quantises the value z to one of the allowed quantisation values. (23) can be calculated by a mapper using a processor, or using a quantiser followed by a table. The quantiser levels of the quantiser can be determined beforehand by performing (23) for all possible values of B. The quantisation levels for the quantiser are those values at which the sequence x nq-q+ r • X n q Cnan g eS -

Claims: CLAIMS 1. Signal converter for converting an input signal into an ouφut signal, the signal converter comprises combining means for deriving a combined signal from the input signal and a feedback signal, mapping means for deriving a plurality of samples of the ouφut signal from samples of the combined signal, the mapping means being further arranged for deriving the feedback signal from samples of the combined signal, characterised in that the combining means are arranged for deriving one single combined signal, and in that the mapping means are arranged for deriving the feed back signal representing a decimated and anti alias filtered ouφut signal. 2. Signal converter according to claim 1, characterised in that the combined signal has a first sample rate, the mapping means are arranged for deriving from a sample of the combined signal a sequence of samples of the ouφut signal, said ouφut signal having a second sample rate larger than the first sample rate, and in that the mapping means comprise decimating means for deriving the feedback signal by decimating a signal representing the ouφut signal. 3. Signal converter according to claim 1 or claim 2, characterised in that the combining means comprise a noise shaping filter for obtaining the combined signal. 4. Signal converter according to claim 3, characterised in that the mapping means are arranged for providing a further signal representing the downsampled ouφut signal, and in that the noise shaping filter also is arranged for deriving a filtered further signal for obtaining the combined signal. 5. Signal converter according to one of the previous claims, characterised in that the decimating means have an impulse response corresponding at least partly to the impulse response of a comb filter. 6. Signal converter according to one of the previous claims, characterised in the the mapping means are arranged for recursively determining the samples of the ouφut signal from a filtered error signal, the error signal being representative of the difference between the input sample and a weighted sum of ouφut samples already determined. 7. Signal converter according to claim 5, characterised in that the mapping means are arranged for filtering the error signal according to a high-pass transfer function.

Inventors: DAGNACHEW BIRRO MEKONEN, DAGNACHEW, BIRRO, MEKONEN
Applicants: PHILIPS ELECTRONICS NV, PHILIPS NORDEN AB, PHILIPS ELECTRONICS N.V.
Application year: 1997
Main classification: H03H17
IPC codes: H03H17, H03M3