PARALLEL CONCATENATED TAIL-BITING CONVOLUTIONAL CODE AND DECODER THEREFOR

Abstract: A parallel concatenated convolutional coding scheme utilizes tail-biting nonrecursive systematic convolutional codes. The associated decoder iteratively utilizes circular maximum a posteriori decoding to produce hard and soft decision outputs. This encoding/decoding system results in improved error-correction performance for short messages.

Description: PARALLEL CONCATENATED TAIL-RrTTNfi CONVOLUTIONAL CODE AND DECODER THEREFOR Field of the Invention The present invention relates generally to error-correction coding for the communication of short messages over poor channels and, more particularly, to a parallel concatenated convolutional coding technique and a decoder therefor. Background of the Invention One form of parallel concatenated coding, referred to as either parallel concatenated convolutional coding (PCCC) or "turbo coding", has been the subject of recent coding research due to impressive demonstrated coding gains when applied to blocks of 10,000 or more bits. (See C. Berrou, A. Glavieux and P. Thitimajshima, "Near Shannon Limit Error-Correcting Coding and Decoding: Turbo-Codes," Proceedings ofthe IEEE International Conference on Communications, 1993, pp. 1064-1070; J.D. Andersen, "The TURBO Coding Scheme," Report IT- 146 ISSN 0105-854, Institute of Telecommunication, Technical University of Denmark, December 1994; and P. Robertson, "Illuminating the Structure of Code and Decoder of Parallel Concatenated Recursive Systematic (Turbo) Codes," 1994 IEEE Globecom Conference, pp. 1298-1303.) However, it has been shown that the performance of a turbo code degrades substantially as the length of the encoded data block decreases. This effect is due to the strong dependence of its component recursive systematic convolutional codes' weight structures on block length. A second issue is the proper termination of message blocks applied to a turbo encoder. As described by O. Joersson and H. Meyr in "Terminating the Trellis of Turbo- Codes," IEE Electronics Letters, vol. 30, no. 16, August 4, 1994, pp. 1285- 1286, the interleaving used in turbo encoders may make it impossible to terminate both the interleaved and non -interleaved encoder input sequences with a single set of tail bits. While it is possible to use a second tail sequence embedded into the message structure such that the encoder operating on the interleaved data sequence is properly terminated, this doubles die overhead associated with encoder termination and reduces the effective code rate. An altemative is not to terminate one of the encoder sequences, but this degrades performance of the encoder/decoder system, panicularly when applied to shon messages. In Terminating the Trellis of Turbo-Codes in die Same State," IEE Electronics Letters, 1995, vol. 31, no. 1, January 5, pp. 22-23, A.S. Barbulescu and S.S. Pietrobon reported a method that places restrictions on the interleaver design in order to terminate two component recursive systematic convolutional (RSC) encoders with a single termination bit sequence. Their performance results show some degradation compared to performance obtained by terminating both encoders when an optimized interleaver is used. In addition, published bit-error rate (BER) versus energy-per-bit-to-noise-power-spectral- density ratio (E^/N 0 ) data exhibit a flattening in BER over a range of Ei j /N 0 values when RSCs are utilized in the turbo encoder. Accordingly, it is desirable to provide an improved parallel concatenated coding technique for short data blocks. Summary of the Invention Ln accordance with the present invention, a parallel concatenated convolutional coding scheme utilizes tail-biting nonrecursive systematic convolutional (NSC) codes. The associated decoder iteratively utilizes circular maximum a posteriori (MAP) decoding to produce hard and soft decision outputs. Use of tail-biting codes solves the problem of termination of the input data sequences in turbo coding, thereby avoiding associated decoder performance degradation for shon messages. While NSC codes are generally weaker than recursive systematic convolutional (RSC) codes having the same memory asymptotically as the data block length increases, the free distance of a NSC code is less sensitive to data block length. Hence, parallel concatenated coding with NSC codes will perform better than with RSC codes having the same memory for messages that are shoner than some threshold data block size. Brief Description of the Drawings The features and advantages of the present invention will become apparent from the following detailed description ofthe invention when read with the accompanying drawings in which: FIG. 1 is a simplified block diagram illustrating a parallel concatenated encoder, FIG. 2 is a simplified block diagram illustrating a decoder for parallel concatenated codes; FIG. 3 is a simplified block diagram illustrating a tail-biting, nonrecursive systematic convolutional encoder for use in the coding scheme according to the present invention; FIG. 4 is a simplified block diagram illustrating a circular MAP decoder useful as a component decoder in a decoder for a parallel concatenated convolutional coding scheme according to the present invention; and FIG. 5 is a simplified block diagram illustrating an altemative embodiment of a circular MAP decoder useful as a component decoder for a parallel concatenated convolutional coding scheme according to the present invention Detailed Description of the Invention RG. 1 is a general block diagram of encoder signal processing 10 for parallel concatenated coding schemes. It comprises a plurality N of component encoders 12 which operate on blocks of data bits from a source. The data blocks are permuted by interleaving algorithms via interleavers 14. As shown, there are N-1 interleavers for N encoders 12. Finally, the component encoder outputs are combined into a single composite codeword by a composite codeword formatter 16. The composite codeword formatter is chosen to suit the characteristics of the channel, and it may be followed by a frame formatter chosen to suit the channel and communication system's ,.„„,, 40582 channel access technique. The frame formatter may also insert other necessary overhead such as control bits and synchronization symbols. A significant code rate advantage can be obtained in parallel concatenated coding if the component codes are systematic codes. The codewords (ouφut) generated by a systematic encoder include the original data bits provided as inputs to the encoder and additional parity bits. (The redundancy introduced by the parity bits is what yields a code's error correction capability.) Therefore, when systematic encoders are used in the parallel concatenated encoder shown in FIG. 1, the codewords produced by all component encoders 12 contain the input data bits. If formaner 16 forms a data packet or composite codeword comprising only the parity bits generated by each component encoder 12 and the block of information bits to be coded, a substantial improvement in the rate of the composite parallel concatenated code is realized by eliminating repetition of the information bits in the transmitted composite codeword. For example, if component encoder 1 and component encoder 2 of a parallel concatenated convolutional code (PCCC) encoder comprising two component codes are both rate 1/2 codes, the composite parallel concatenated code rate is increased from 1/4 for nonsystematic component codes to 1/3 when systematic component codes are used. Parallel concatenated coding schemes which utilize recursive systematic convolutional (RSC) codes have been die recent topic of much research. These parallel concatenated convolutional codes (PCCCs) are also commonly known in die literature as "turbo" codes. As noted hereinabove, it has been demonstrated that these PCCCs can achieve impressive performance in terms of bit error rate (BER) versus the energy per bit to noise power spectral density ratio (E^/N^ for the case of relatively large messages, i.e., ten ϋiousand or more bits. However, it has also been shown that the coding gain obtained with turbo codes degrades significandy with decreasing data block size because the recursive systematic convolutional component codes' strengths are quite sensitive to data block length. On the other hand, the performance of a nonrecursive systematic tail-biting convolutional code is independent of data block length for most practical purposes; the obtainable performance degrades only if the block of data bits encoded is less than a minimum size that is determined by the NSC's decision depth properties. FIG. 2 illustrates a general decoder 20 for parallel concatenated codes in block diagram form. Decoder 20 comprises the following: a composite-codeword-to-component-codeword converter 22 which converts the composite codeword received from a channel to individual received codewords for each component decoder 24; N component decoders 24 corresponding to the N component encoders of FIG. 1; the same type (or same) interleavers 14 mat are used in the parallel concatenated encoder (FIG. 1); and first and second deinterleavers 28 and 29, respectively, that each have a sequence reordering characteristic that is equivalent to a series concatenation of N-1 deinterleavers 30 corresponding to die N-1 interleavers used for encoding. The required ordering of these deinterleavers is shown in FIG. 2 and is the reverse of the ordering of the interleavers. The outputs of component decoders 24 are some type of soft- decision information on the estimated value of each data bit in the received codeword. For example, the outputs of the component decoders may be a first function of the probabilities that the decoded bits are 0 or 1 conditioned on the received sequence of symbols from the channel. One example of such a first function removes the influence of the conditional probability Pfd / = 0 \ Y / ) from a component decoder's soft-decision output that is inputted to a next sequential component decoder after an appropriate permutation, where Pfd/ = 0 \ Y } is die probability that the j 1 information bit at time t is 0 conditioned on the j ώ (systematic) bit ofthe received channel output symbol Y { . Alternatively, the soft-decision information outputted by component decoders 24 may be a function of the likelihood ratio . Pfd/ = ι \ Y ] L ) l - Pfd/ = o i y/v Λ ( d t ) = — Pfd/ , = 0 I Y j r } = Pfd/ ; = 0 I Yp z ~ • or as a function of the log-likelikelihood ratio log [ A ( d/ ) ] . PC17US97/06129 As shown, the Nth component decoder has a second output, i.e., a second function of the conditional probabilities for the decoded bit values or likelihood ratios above. An example of this second function is the product ol " Pfd: = 0 1 Y } } and the a priori probability that d { = 0 received from the previous component decoder. The decoder for parallel concatenated codes operates iteratively in the following way. The first component decoder (decoder 1) calculates a set of soft-decision values for the sequence of information bits encoded by the first component encoder based on the received codeword and any a priori information about the transmitted information bits. In the first iteration, if there is no a priori information on the source statistics, it is assumed that the bits are equally likely to be 0 or l(i.e., Pfbit = 0} = Pfbit = 1J = 1/2 ). The soft- decision values calculated by decoder 1 are then interleaved using the same type (or same) interleaver that was used in the encoder to permute the block of data bits for the second encoder. These permuted soft-decision values and the corresponding received codeword comprise the inputs to the next component decoder (decoder 2). The permuted soft-decision values received from the preceding component decoder and interleaver are utilized by the next component decoder as a priori information about the data bits to be decoded. The component decoders operate sequentially in this manner until the N th decoder has calculated a set of soft-decision outputs for the block of data bits that was encoded by the encoder. The next step is deinterleaving soft-decision values from the Nth decoder as described hereinabove. The first decoder then operates on the received codeword again using the new soft-decision values from the N th decoder as its a priori information. Decoder operation proceeds in this manner for die desired number of iterations. At the conclusion of the final iteration, the sequence of values which are a second function of the soft- decision outputs calculated by me N th decoder is deinterleaved in order to return the data to the order in which it was received by the PCCC encoder. The number of iterations can be a predetermined number, or it can be determined dynamically by detecting decoder convergence. The decoder provides soft-decision information which is a function of the probability Pfd j = 0 \ Y } ) ; that is, the conditional probability that the j 111 data bit in a k-bit symbol input to the encoder at time / is 0 given that the set of channel outputs Y } = fy } ,.-,y L } is received, ln addition, the decoder may provide hard-decision information as a function of its soft- decision output through a decision device which implements a decision rule, such as: K 0 >- pfd j r o \ γ L 1 } 1 < 2 d J 1 - That is, if P{d J t = 0 = 0 I Y L } / < j , then d j t = 7; otherwise, randomly assign d J the value 0 or 1. Typical turbo decoders utilize eidier maximum a posteriori (MAP) decoders, such as described by L.R. Bahl, J. Cocke, F. Jelinek and J. Raviv in "Optimal Decoding of Linear Codes for Minimizing Symbol error Rate," IEEE Transactions of Information Theory, March 1974, pp. 284-287, or soft output Viterbi algorithm (SOVA) decoders, as described by J. Hagenauer and P. Hoeher in "A Viterbi Algorithm with Soft-Decision Outputs and its Applications, 1989 IEEE Globecom Conference, pp. 1680- 1686. A MAP decoder produces the probability that a decoded bit value is 0 or 1. On the other hand, a SOVA decoder typically calculates the likelihood ratio Pf decoded bit is 1 } Pf decoded bit is 0 } for each decoded bit. It is apparent that this likelihood ratio can be obtained from Pf decoded bit is 0} and vice versa using Pf decoded bit is 0} = 1 - Pf decoded bit is 1). Some computational advantage has been found when eidier MAP or SOVA decoders work with the logarithm of likelihood ratios, mat is, ( Pf decoded bit is 1 } l ° s { Pf decoded bit is 0 J It has been demonstrated that the coding gain (error correction capability) obtained with turbo codes degrades signiϋcandy with decreasing data block size. Several authors have attributed this behavior primarily to the properties of RSC codes. It has been shown mat the distance property of a RSC code increases with increasing data block length. Conversely, the minimum distance of a RSC code decreases with decreasing data block length. A second problem is die difficulty in terminating all RSC codes comprising a turbo coding scheme due to interleaving. Disadvantageously, the adverse effects resulting from a lack of sequence termination or the imposition of restrictions on interleaver design are significant and become even more so with decreasing data block length. In accordance with the present invention, the component codes in a parallel concatenated convolutional coding scheme comprise tail-biting nonrecursive systematic convolutional codes. The use of such tail-biting codes solves the problem of termination of die input data sequences in turbo coding, thereby avoiding decoder performance degradation for shon messages. Although NSC codes are generally weaker than RSC codes having die same memory, the free distance of a NSC code is less sensitive to data block length. Hence, parallel concatenated coding with NSC codes will perform better than with RSC codes having the same memory for messages mat are shoner than a predetermined threshold data block size. The performance cross-over point is a function of desired decoded bit error rate, code rate, and code memory. FIG. 3 illustrates an example of rate ■ 1/2, memory = m tail- biting nonrecursive systematic convolutional encoder for use in the parallel concatenated convolutional coding (PCCC) scheme of the present invention. For purposes of description, an (n, k, m) encoder denotes and encoder wherein the input symbols comprise k bits, die ouφut symbols comprise n bits, and m = encoder memory in Jfc-bit symbols. For purposes of illustration, FIG. 3 is drawn for binary input symbols, i.e., k = /. However, the present invention is applicable to any values of k, n ,and m. Initially, a switch 50 is in the down position, and L input bits are shifted into a shift register 52, k at a time (one input symbol at a time for this example). After loading the L Λ bit into die encoder, the switch moves to the up position and encoding begins with the shift of die first bit from a second shift register 54 into the nonrecursive systematic encoder; the state of the encoder at this time is fbu bι.ι,..., bukm-l)}- hi this example, die encoder ouφut comprises die current input bit and a parity bit formed in block 56 (shown as modulo 2 addition for this example) as a function of the encoder state and the current input symbol. Encoding ends when die L/Λ bit is encoded. Anodier aspect of the present invention, the associated decoder for die hereinabove described parallel concatenated encoder, comprises a circular MAP decoder as described by the present inventors in commonly assigned, copending U.S. Patent Application No. (RD-24,923), which is incorporated by reference herein. In particular, U.S. Patent Application No. (RD-24,923) describes a circular MAP decoder useful for decoding tail-biting convolutional codes. The circular MAP decoder can deliver both an estimate of die encoded data block and reliability information to a data sink, e.g., a speech synthesis signal processor for use in transmission error concealment or protocol processor for packet data as a measure of block error probability for use in repeat request decisions. In particular, as described in U.S. Patent Application No. (RD- 24,923), a circular MAP decoder for error-correcting σellis codes that employ tail biting produces soft-decision ouφuts. The circular MAP decoder provides an estimate of the probabilities of the states in the first stage of die trellis, which probabilities replace the a priori knowledge of the starting state in a conventional MAP decoder. The circular MAP decoder provides die initial state probability distribution in eidier of two ways. The first involves a solution to an eigenvalue problem for which the resulting eigenvector is die desired initial state probability distribution; with knowledge of the starting state, die circular MAP decoder performs the rest of the decoding according to die conventional MAP decoding algorithm. The second is based on a recursion for which die iterations converge to a starting state distribution. After sufficient iterations, a state on the circular sequence of states is known with high probability, and die circular MAP decoder performs the rest of die decoding according to die conventional MAP decoding algorithm. The objective of the conventional MAP decoding algorithm is to find the conditional probabilities: Pf state m at time 1 1 receive channel outputs y j ,...,yιj . The term L in this expression represents the length of die data block in units of the number of encoder symbols. (The encoder for an (n, k) code operates on k- bit input symbols to generate n-bit output symbols.) The term y t is the channel output (symbol) at time t. The MAP decoding algoritiim actually first finds die probabilities: λ/m) = PfS, = m; Y } } (1 ) that is, die joint probability that the encoder state at time r, S { , is m and the set of channel outputs Y. = fy ]r ...,y L J is received. These are the desired probabilities multiplied by a constant (PfY, }, the probability of receiving the set of channel outputs fy 1 ,...,y l j) . Now define the elements of a matrix r * f by r t (i,j) = Pf state j ot time t; y t I state i at time t-1 .} The matrix F f is calculated as a function of the channel transition probability R(Y t , X), die probability p t (m\m') that the encoder makes a transition from state m' to m at time t, and die probability q t (X\m',m) that the encoder's output symbol is X given that die previous encoder state is m' and the present encoder state is m. In particular, each element of I " ) is calculated by summing over all possible encoder outputs X as follows: (2) γ t (m',m) = ∑/^mim'J q t (X\m',m) R(Y,, X) X SUBSTITUTE SHEET (RϋLE 26) The MAP decoder calculates L of diese matrices, one for each trellis stage. They are formed from die received channel output symbols and the nature of the trellis branches for a given code. Next define the M joint probability elements of a row vector α f by α,0V = Pf state j at time t; y 7 ,...,y f / (3) and the M conditional probability elements of a column vector β t by β t ϋ) = p {y t +ι>~yL ' stme J at time V ( 4 ) for j = 0,1,..., (M-l) where Λf is the number of encoder states. (Note that matrices and vectors are denoted herein by using boldface type.) The steps of the MAP decoding algorithm are as follows: (i) Calculate α,, ..., a L by the forward recursion: a t = a^ r t , t=l,...,L . (5) (ii) Calculate β j , .... β^ j by the backward recursion: β t = r ι + j β t+ I - t = L-l,...,I . (6) (iii) Calculate die elements of λ t by: λ/i) = α/i) β/i) , all i, t=l L (7) (iv) Find related quantities as needed. For example, leiA J be the set of states S t = fS J t> S 2 f ..., S*JV such that the j 01 element of S t , S J , is equal to zero. For a conventional non-recursive trellis code, S J = d J , the j* data bit at time /. Therefore, the decoder's soft-decision output is /US97/06129 12 where Pfήj = ∑λ L (m) and m m is the index that corresponds to a state S t . The decoder's hard-decision or decoded bit output is obtained by applying Pfd? - 0\Y J to the following decision rule: d j t = o Pfd J t = 0 \ Y L 1 } > L 2 ; t That is, if Pf ' d 1 t = 0 I Y L 1J > ( 2, then 3 j t = 0; if Pf 'd 1 t = 0 I Y L IJ < ^ 2 , then Η j t = 1 ; otherwise, randomly assign J the value 0 or 1. As anodier example of a related quantity for step (iv) hereinabove, the mauix of probabilities σ / comprises elements defined as follows: σ t (i, j) = P{S t -i = i; S t = j; Y L } } = a hl (i) γ t (i, j) β, (j) These probabilities are useful when it is desired to determine the a posteriori probability of die encoder output bits. In die standard application of the MAP decoding algorithm, the forward recursion is initialized by the vector Ct () = (1,0,....0), and the backward recursion is initialized by β L - (l,0,...0) τ . These initial conditions are based on assumptions that the encoder's initial state S 0 = 0 and its ending state S L = 0. One embodiment of the circular MAP decoder determines the initial state probability distribution by solving an eigenvalue problem as follows. Let a t , β t , -T f and λ, be as before, but take the initial a () and β L as follows: Set β L to the column vector (11 l...l) τ . Let O Q be an unknown (vector) variable. Then, (i) Calculate iT f for t - 1, 2, ... L according to equation (2). (ii) Find the largest eigenvalue of the matrix product T, T 2 ... T L . Normalize the corresponding eigenvector so diat its components sum to unity. This vector is the solution for a () . The eigenvalue is Pf Y . j . (iii) Form the succeeding a t by die forward recursion set forth in equation (5). (iv) Starting from β L , initialized as above, form the β f by the backward recursion set forth in equation (6). (v) Form die λ ( as in (7), as well as odier desired variables, such as, for example, the soft-decision output Pfd 1 = 0\Y } or the matrix of probabilities ϋ v described hereinabove. The inventors have shown that the unknown variable a () satisfies the matrix equation a o r ι r 2 a 0 = - > fA} From the fact that diis formula expresses a relationship among probabilities, we know that the product of T t matrices on the right has largest eigenvalue equal to Pf Y , I , and that the corresponding eigenvector must be a probability vector. With the initial β L = (lll...l) τ , equation (6) gives β L _ j . Thus, repeated applications of this backward recursion give all the β t . Once a 0 is known and β L is set, all computations in the circular MAP decoder of the present invention follow the conventional MAP decoding algorithm. FIG. 4 is a simplified block diagram illustrating a circular MAP decoder 110 for decoding an error-correcting tail-biting trellis code in accordance with the eigenvector method described hereinabove. Decoder 110 comprises a J) calculator 112 which calculates / " } as a function of the channel output y t . The F / calculator receives as inputs the following from a memory 130: the channel transition probability R(Y t , X), the probability p,(m\ιv') that die encoder makes a transition from state m' to m at time t, and the probability q t (X\m',m) that the encoder's output symbol is X given that the previous encoder state is m' and die present encoder state is in. The J " } calculator calculates each element of J " } by summing over all possible encoder outputs X in accordance with equation (2). The calculated values of J " } are provided to a matrix product calculator 114 to form the matrix product /Xy T 2 ... J ~ ^ using an identity matrix 116, e.g., received from memory, a switch 1 18 and a delay circuit 120. At lime t = 7, the identity matrix is applied as one input to the matrix product calculator. t- l For each subsequent time from t = 2 to t = L, the matrix product | ~ J Tj gels i=l fed back via die delay circuit to die mauix product calculator. Then, at time / = L, the resulting matrix product is provided via a switch 121 to a normalized eigenvector computer 122 which calculates die normalized eigenvector corresponding to the largest eigenvalue of the matrix product input thereto. With a o thus initialized, i.e., as this normalized eigenvector, the succeeding a t vectors are determined recursively according to equation (5) in a matrix product calculator 124 using a delay 126 and switch 128 circuitry, as shown. Appropriate values of J " } are retrieved from a memory 130, and the resulting a / are then stored in memory 130. The values of/7 / are determined in a matrix product calculator 132 using a switch 134 and delay 136 circuitry according to equation (6). Then, die probabilities λ / are calculated from the values of a , and β t in an element- by-element product calculator 140 according to equation (7). The values ol ' λ , are provided to a decoded bit value probability calculator 150 which determines the probability that the j* decoded bit at time t, d 1 ; , equals zero. This probability is provided to a threshold decision device 152 which implements the following decision rule: If the probability from calculator 150 is greater than 2 * then decide that the decoded bit is zero; if the probability is less than 2 , then decide that the decoded bit is one; if it equals 2 , then the decoded bit is randomly assigned the value 0 or 1. The output of the threshold decision device is the decoder's output bit at time t. The probability that the decoded bit equals zero Pfd/ = 0 I Y/ } is also shown in FIG. 4 as being provided to a soft output function block 154 for providing a function of the probability, i.e., f(Pfd = 0 I Y I), such as, for example, the likelihood ratio as the decoder's soft-decision output. Another useful function of Pfd = 0 I log likelihood ratio = log . Alternatively, a useful function for block 154 may simply be the identity function so that the soft output is just Pfd 1 = 0 I Y J }. An alternative embodiment of the circular MAP decoder determines the state probability distributions by a recursion method. In particular, in one embodiment (die dynamic convergence method), the recursion continues until decoder convergence is detected . In this recursion (or dynamic convergence) method, steps (ii) and (iii) of the eigenvector method described hereinabove are replaced as follows: (ii.a) Starting with an initial a () equal to (1/M 1/M), where M is the number of states in die trellis, calculate die forward recursion L times. Normalize the results so that the elements of each new a, sum to unity. Retain all L a, vectors. (ii.b) Let Ot () equal flt^ from the previous step and, starting at / = 7 , calculate the first L w a. probability vectors again. "min M-l That is, calculate a ( (m) = \o: h] (i) γ { (i,m) for m = 0, 1, .... M-l and t = i-0 1,2,...,L W where L is a suitable minimum number of trellis stages. w min min Normalize as before. Retain only the most recent sel of L α's found by the recursion in steps (ii.a) and (ii.b) and the a, found previously in step mm (ii.a). (ii.c) Compare α 7 from step (ii.b) to the previously found set from step w n mιn (ii.a). If the M corresponding elements of the new and old a L are within a w mιn tolerance range, proceed to step (iv) set forth hereinabove. Otherwise, continue to step (ii.d). (ii.d) Let t = t + 1 and calculate a { = Ot ( _ j r r Normalize as before. Retain only the most recent set of L crX calculated and the a, found previously in step (ii.a). (ii.e) Compare die new a t 's to die previously found set. If the M new and old a t 's are within a tolerance range, proceed to step (iv). Otherwise, continue with step (ii.d) if the two most recent vectors do not agree to within the tolerance range and if the number of recursions does not exceed a specified maximum (typically 2L); proceeding U\step (iv) otherwise. This method then continues with steps (iv) and (v) given hereinabove with respect to the eigenvector method to produce the soft-decision outputs and decoded output bits of the circular MAP decoder. In another alternative embodiment of the circular MAP decoder as described in U.S. Patent Application No. (RD-24,923), the recursion method described hereinabove is modified so diat die decoder only needs to process a predetermined, fixed number of trellis stages for a second time, that is, a predetermined wrap depth. This is advantageous for implementation purposes because die number of computations required for decoding is die same for every encoded message block. Consequendy, hardware and software complexities are reduced. One way to estimate die required wrap depth for MAP decoding of a tail-biting convolutional code is to determine it from hardware or software experimentation, requiring that a circular MAP decoder widi a variable wrap depth be implemented and experiments be conducted to measure die decoded bit error rate versus E| j /N 0 for successively increasing wrap depths. The minimum decoder wrap depth that provides the minimum probability of decoded bit error for a specified E /N g is found when further increases in wrap depth do not decrease the error probability. If a decoded bit error rate diat is greater than the minimum achievable at a specified EJ/N Q is tolerable, it is possible to reduce die required number of trellis stages processed by die circular MAP decoder. In particular, die wrap depdi search described hereinabove may simply be terminated when the desired average probability of bit error is obtained. Another way to determine the wrap depdi for a given code is by using die code's distance properties. To diis end, it is necessary to define two distinct decoder decision depths. As used herein, die term "correct path" refers to the sequence of states or a padi through die trellis diat results from encoding a block of data bits. The term "incorrect subset of a node" refers to die set of all incorrect (treUis) branches out of a correct padi node and their descendents. Both the decision depths defined below depend on die convolutional encoder. The decision depths are defined as follows: (i) Define die forward decision depdi for e-error conection, LF(e) , to be die first depth in die trellis at which all paths in die incorrect subset of a correct padi initial node, whedier later merging to the correct padi or not, lie more tiian a Hamming distance 2e from die correct padi. The significance of LF(e) is diat if tiiere are e or fewer errors forward of die initial node, and encoding is known to have begun diere, tiien die decoder must decode correcdy. A formal tabulation of forward decision depdis for convolutional codes was provided by J.B. Anderson and K. Balachandran in "Decision Depdis of Convolutional Codes", IEEE Transactions on Information Theory, vol. IT-35, pp. 455-59, March 1989. A number of properties of LF(e) are disclosed in diis reference and also by J.B. Anderson and S. Mohan in Source and Channel Coding - An Algorithmic Approach, Kluwer Academic Publishers, Norwell, MA, 1991. Chief among tiiese propenies is diat a simple linear relation exists between LF and e; for example, with rate 7/2 codes, LF is approximately 9.08e . (ii) Next define the unmerged decision depdi for e-error correction, LU(e) , to be the first depdi in die trellis at which all paths in die trellis diat never touch die correct padi lie more man a Hamming distance of 2e away from die correct path. The significance of LU(e) for soft-decision circular MAP decoding is diat the probability of identifying a state on the actual transmitted path is high after die decoder processes LU(e) trellis stages. Therefore, die minimum wrap depdi for circular MAP decoding is LU(e). Calculations of die depth LU(e) show diat it is always larger tiian LF(e) but that it obeys the same approximate law. This implies diat die minimum wrap depth can be estimated as die forward decision depdi LF(e) if die unmerged decision depth of a code is not known. By finding die minimum unmerged decision depth for a given encoder, we find die fewest number of trellis stages diat must be processed by a practical circular decoder diat generates soft-decision ouφuts. An algorithm to find LF(e), the forward decision depdi, was given by J.B. Anderson and K. Balachandran in "Decision Depdis of Convolutional Codes", cited hereinabove. Υo find LU(e): (i) Extend die code trellis from left to right, starting from all trellis nodes simultaneously, except for die zero-state. (ii) At each level, delete any paths that merge to the correct (all- zero) path; do not extend any paths out of die correct (zero) state node. (iii) At level k, find the least Hamming distance, or weight, among patiis terminating at nodes at this level. (iv) If diis least distance exceeds 2e, stop. Then, LU(e) = k. As described in U.S. Patent Application No. (RD-24,923), experimentation via computer simulation lead to two unexpected results: (1) wrapped processing of β ( improves decoder performance; and (2) the use of a wrap depdi of LU(e) + LF(e) ~ 2 LF(e) improves performance significantly. Hence, a preferred embodiment of the circular MAP decoder algorithm hased on recursion comprises the following steps: (i) Calculate F r for t - 1, 2, ... L according to equation (2). (ii) Starting with an initial a () equal to (1/M,..., 1/M), where M is the number of states in the trellis, calculate die forward recursion ol equation (5) (L + L w ) times for u = 1, 2, ... (L + L w ) where L w is the decoder's wrap depth. The trellis- level index t takes on the values ((u-1) mod L) + 1. When the decoder wraps around the received sequence of symbols from the channel, a L is treated as a ϋ . Normalize the results so that the elements of each new a t sum to unity. Retain the L most recent a vectors found via this recursion. (iii) Starling with an initial β^ equal to ( 1 7) 7 , calculate the backward recursion of equation (6) (L + L w ) times for u = 1, 2, ... (L + L w ). The trellis-level index / takes on the values L-(u mod L). When the decoder wraps around die received sequence, /3 7 is used as β L+] and F; is used as J " z. + 7 when calculating the dew β L . Normalize the results so that the elements of each new β t sum to unity. Again, retain the L most recent β vectors found via this recursion. ' The next step of this preferred recursion method is the same as step (v) set forth hereinabove widi respect to the eigenvector method to produce the soft-decisions and decoded bits output by the circular MAP decoder. FIG. 5 is a simplified block diagram illustrating a circular MAP decoder 180 in accordance widi diis preferred embodiment of the present invention. Decoder 180 comprises a 7 " ) calculator 182 which calculates r, as a function of the channel output y / . The channel outputs y^,...,y^ are provided to the J} calculator via a switch 184. With the switch in the down position, L channel output symbols are loaded into a / " / calculator 182 and a shift register 186 one at a time. Then, switch 184 is moved to the up position to allow die shift register to shift the first L w received symbols into the f} calculator again, i.e., to provide circular processing. The / " } calculator receives as inputs from memory 130 the channel transition probability R(Y { , X), the probability P t (m\m') that the encoder makes a transition from state m' to m at time /, and the probability q t (X\m\ m) that the encoder's output symbol is X given that the previous encoder state is m' and the present encoder state is m. The r, calculator calculates each element of fj by summing over all possible encoder outputs X in accordance with equation (2). The calculated values of r, are provided to a matrix product calculator 190 which multiplies the 7 " ) matrix by die α / -i matrix, which is provided recursively via a delay 192 and demultiplexer 194 circuit. Control signal CNTRL1 causes demultiplexer 194 to select a () from memory 196 as one input to matrix product calculator 190 when / = 7. When 2 5 / < L, control signal CNTRLl causes demultiplexer 194 to select a. ul from delay 192 as one input to matrix product calculator 190. Values of T t and Of , are stored in memory 196 as required. The β ι vectors are calculated recursively in a matrix product calculator 200 via a delay 202 and demultiplexer 204 circuit. Control signal CNTRL2 causes demultiplexer 204 to select β L from memory 196 as one input to matrix product calculator 200 when t - L-l. When L-2 > t ? 7, control signal CNTRL2 causes demultiplexer 204 to select β [+J from delay 102 as one input to matrix product calculator 2(K). The resulting values of β t are multiplied by the values of α / , obtained from memory 196, in an element-by- element product calculator 206 to provide the probabilities λ / , as described hereinabove. In the same manner as described hereinabove with reference to FIG. 4, the values of λ t are provided to a decoded bit value probability calculator 150, the output of which is provided to a threshold decision device 152, resulting in the decoder's decoded output bits. The conditional probability that the decoded bit equals zero (Pfd = 0 \ YJ }) is also shown in FIG. 5 as being provided to a soft output function block 154 for providing a function of the probability, T S97/06129 - 22 - i.e., ((Pfd/ = 0 I YJ}), such as, for example, the likelihood ratio as the decoder's soft-decision output. Another useful function ol log likelihood ratio . Alternatively, a useful function for block 154 may simply he the identity function so that the soft output is just Pfd/ = 0 I Y 1 } . In accordance with the present invention, il is possible to increase the rate of the parallel concatenated coding scheme comprising tail- biting nonrecursive systematic codes by deleting selected bits in the composite codeword formed by the composite codeword formatter according to an advantageously chosen pattern prior to transmitting the bits of the composite codeword over a channel. This technique is known as puncturing. This puncturing pattern is also known by the decoder. The following simple additional step performed by the received eomposite-cυdeword-io-component- codeword converter provides the desired decoder operation: the received composite-codeword-to-component-codeword converter merely inserts a neutral value for each known punctured bit during the formation of the received component codewords. For example, the neutral value is lor the case of antipodal signalling over an additive white Gau.ssian noise channel. The rest of the decoder's operation is as described hereinabove. It has heretofore been widely accepted thai nonrecursive systematic convolutional codes would not be useful as the component codes in a parallel concatenated coding scheme because of the superior distance properties of RSC codes for relatively large die data block lengths, as reported, for example in S. Benedetto and G. Montorsi, "Design of Parallel Concatenated Convolutional Codes," IEEE Transactions on Communications, to be published. However, as described hereinabove, die inventors have determined that die minimum distance of a NSC code is less sensitive to data block length and, dierefore, can be used advantageously in communication systems diat transmit shon blocks of data bits in very noisy channels. In addition, the inventors have determined that die use of tail-biting codes solves die problem of termination of input data sequences in turbo codes. Use of tail- biting convolutional codes as component codes in a parallel concatenated coding scheme has not been proposed heretofore. Hence, die present invention provides a parallel concatenated nonrecursive tail-biting systematic convolutional coding scheme with a decoder comprising circular MAP decoders for decoding die component tail-biting convolutional codes to provide better performance for shon data block lengths tiian in conventional turbo coding schemes, as measured in terms of bit error rate versus signal-to-noise ratio. While die preferred embodiments of die present invention have been shown and described herein, it will be obvious that such embodiments are provided by way of example only. Numerous variations, changes and substitutions will occur to diose of skill in die an without departing from the invention herein. Accordingly, it is intended that the invention be limited only by die spirit and scope of die appended claims.

Claims: PARALLEL CONCATENATED TML-BΠTNO CONVOLUTIONAL CODE AND DECODER THEREFOR WHAT IS CLAIMED IS: 1. A method for parallel concatenated convolutional encoding, comprising the steps of: providing a block of data bits to a parallel concatenated encoder comprising a plurality of N component encoders and N- 1 interleavers 5 connected in a parallel concatenation; encoding the block of data bits in a first one of the component encoders by applying a tail-biting nonrecursive systematic convolutional code thereto and thereby generating a corresponding first component codeword comprising the data bits and parity bits; o interleaving the block of data bits to provide a permuted block of data bits; encoding the resulting permuted block of data bits in a subsequent component encoder by applying a tail-biting nonrecursive systematic convolutional code thereto, and thereby generating a corresponding 5 second component codeword compnsmg the data bits and paπty bits; repeating the steps of interleaving and encoding the resulting permuted block of data bits through the remaining N-2 interleavers and the remaining N-2 component encoders, and thereby generating component codewords comprising the data bits and paπty bits; and 0 formatting the bits of the component codewords to provide a composite codeword. 2. The method of claim I wherein the formatting step is performed such that the composite codeword includes only one occurrence of each bit in the block of data bits. 3. The method of claim 1 wherein the formatting step is performed such that the composite codeword includes only selected ones of the bits comprising the component codewords according to a predetermined pattern. 4. A method for decoding parallel concatenated convolutional codes, comprising the steps of: receiving from a channel a composite codeword that comprises a formatted collection of bits from a plurality (N) of component codewords that have been generated by applying tail-biting nonrecursive systematic convolutional codes to a block of data bits in a parallel concatenated encoder, forming received component codewords from the received composite codeword, each respective received component codeword being received by a corresponding one of a plurality of N component decoders of a composite decoder, each respective component decoder also receiving a set of a priori soft-decision information for values of the data bits; decoding the received component codewords by a process of iterations through the N component decoders and N- 1 interleavers to provide soft-decision outputs from the composite decoder, the N component decoders each providing soft-decision information on each data bit in die data block in the order encoded by the corresponding component encoder, the N-1 interleavers each interleaving die soft-decision information from a preceding component decoder to provide a permuted block of soft information to a subsequent component decoder, the set of a priori soft-decision information for the first of the N component decoders being calculated assuming that the data bits' values are equally likely for the first iteration and thereafter comprising a first function of the soft-decision information, which first function of the soft-decision information is fed back from the N ,h component decoder via a first deinterleaver comprising N-1 deinterleavers corresponding to the N-1 interleavers, die N-1 deinterleavers of the first deinterleaver being applied in reverse order to the N- 1 interleavers, the set of a priori soft-decision information provided to each other component decoder comprising the first function of the soft-decision information from the previous sequential component decoder; and deinterleaving in a second deinterleaver to provide a second function of the soft-decision output from the N th component decoder as the composite decoder's soft-decision output using N-1 deinterleavers corresponding to the N- 1 interleavers, the N- 1 deinterleavers of the second deinterleaver being applied in reverse order to the N-1 interleavers. 5. The method of claim 4 wherein the number of iterations through the component decoders, interleavers and deinterleavers is a predetermined number. 6. The method of claim 4 wherein die iterations through the component decoders, interleavers and deinterleavers continues until decoder convergence is detected if the number of iterations is less than a maximum number; otherwise decoding terminates after the maximum number of iterations, and the composite decoder provides the second function of soft- decision outputs from the N^ component decoder as its soft-decision output via the second deinterleaver. 7. The method of claim 4, further comprising the step of implementing a decision rule to provide hard-decision outputs as a function of the composite decoder's soft-decision output. 8. The method of claim 4 wherein the formatted collection of bits has been punctured according to a predetermined pattern, the method for decoding further comprising the step of inserting neutral values for all punctured bits when forming the received component codewords. 9. The method of claim 4 wherein the decoding step is performed by the N component decoders comprising circular MAP decoders, the decoding step comprising solving an eigenvector problem. 10. The method of claim 4 wherein the decoding step is performed by the N component decoders comprising circular MAP decoders, the decoding step comprising a recursion method. 11. A method for encoding and decoding parallel concatenated convolutional codes, comprising the steps of: providing a block of data bits to a parallel concatenated encoder comprising a plurality of N component encoders and N-1 interleavers connected in a parallel concatenation; encoding the block of data bits in a first one of the component encoders by applying a tail-biting nonrecursive systematic convolutional code thereto and thereby generating a corresponding first component codeword comprising the data bits and parity bits; interleaving the block of data bits to provide a permuted block of data bits; encoding die resulting permuted block of data bits in a subsequent component encoder by applying a tail-biting nonrecursive systematic convolutional code thereto and thereby generating a corresponding second component codeword comprising the data bits and parity bits; repeating the steps of interleaving and encoding the resulting permuted block of data bits through the remaining N-2 interleavers and the remaining N-2 component encoders, and thereby generating component codewords comprising the data bits and parity bits; formatting the bits of the component codewords to provide a composite codeword; inputting die composite codeword to a channel; receiving a received composite codeword from a channel; forming received component codewords from the received composite codeword providing each respective received component codeword to a corresponding one of a plurality of N component decoders of a composite decoder, each respective component decoder also receiving a set of a priori probabilities for values of the data bits; decoding the received component codewords by a process of iterations through the N component decoders and N- 1 interleavers to provide soft-decision outputs from die composite decoder, the N component decoders each providing soft-decision information on each data bit in the data block in the order encoded by the corresponding component encoder, the N- 1 interleavers each interleaving the soft-decision information from a preceding component decoder to provide a permuted block of soft information to a subsequent component decoder, the set of a priori soft-decision information for the first of the N component decoders being calculated assuming mat the data bits' values are equally likely for the first iteration and thereafter comprising a first function of the soft-decision information, which first function of the soft-decision information is fed back from the N ώ decoder via a first deinterleaver comprising N-1 deinterleavers corresponding to the N-1 interleavers, the N-1 deinterleavers of the first deinterleaver being applied in reverse order to the N-1 interleavers, the set of a priori soft-decision information provided to each other component decoder comprising the first function of the soft-decision information from the previous sequential component decoder; and deinterleaving in a second deinterleaver to provide a second function of the soft-decision output from the N th component decoder as the composite decoder's soft-decision output using N-1 deinterleavers corresponding to the N- 1 interleavers, the N- 1 deinterleavers of the second deinterleaver being applied in reverse order to the N-1 interleavers. 12. The method of claim 1 1 wherein the formatting step is performed such that the composite codeword includes only one occurrence of each bit in the block of data bits. 13. The method of claim 1 1 wherein the formatting step is performed such that the composite codeword includes only selected ones of the bits comprising the component codewords according to a predetermined pattern. 14. The method of claim 11 wherein the number of iterations through the component decoders, interleavers and deinterleavers is a predetermined number. 15. The method of claim 11 wherein the iterations through the component decoders, N-1 interleavers and deinterleavers continues until decoder convergence is detected if the number of iterations is less than a maximum number; otherwise decoding terminates after the maximum number of iterations, and the composite decoder provides the second function of soft- decision outputs from the N* component decoder as its soft-decision output via the second deinterleaver. 16. The method of claim 1 1, further comprising the step of implementing a decision rule to provide hard-decision outputs as a function of the composite decoder's soft-decision output. 17. The method of claim 1 1 wherein the decoding step is performed by the N component decoders comprising circular MAP decoders, the decoding step comprising solving an eigenvector problem. 18. The method of claim 1 1 wherein the decoding step is performed by the N component decoders comprising circular MAP decoders, the decoding step comprising a recursion method. 19. The method of claim 1 1 wherein the formatting step further comprises puncturing selected ones of the bits from the component codewords which comprise the composite codeword according to a predetermined pattern, the method for decoding further comprising the step of inserting neutral values for all punctured bits when forming the received component codewords. 20. A parallel concatenated encoder, comprising: a plurality (N) of component encoders and a plurality (N- 1 ) of interleavers connected in a parallel concatenation for systematically applying tail-biting nonrecursive systematic convolutional codes to a block of data bits and various permutations of the block of data bits, and tiiereby generating component codewords comprising the data bits and parity bits ; and a composite codeword formatter for formatting the collection of bits from the component codewords to provide a composite codeword. 21. The encoder of claim 20 wherein the composite codeword formatter produces the composite codeword such that it includes only one occurrence of each bit in the block of data bits. 22. The encoder of claim 20 wherein the composite codeword produces the composite codeword such that it includes only selected ones of the bits comprising the component codewords according to a predetermined pattern. 23. A composite decoder for decoding parallel concatenated convolutional codes, comprising: a composite-codeword-to-component-codeword converter for receiving a composite codeword from a channel, the composite codeword comprising selected bits of a plurality of N component codewords that have been generated by applying tail-biting nonrecursive convolutional codes to a block of data bits in a parallel concatenated encoder, and forming a plurality of N corresponding received component codewords therefrom; a plurality (N) of component decoders, each respective decoder receiving a corresponding received component codeword from the composite- codeword-to-component-codeword converter, each respective decoder also receiving a set of a priori soft-decision information for values of the data bits, the N component decoders each providing soft-decision information on each data bit in die data block in the order encoded by a corresponding component encoder in the parallel concatenated encoder; a plurality of N-1 interleavers, each respective interleaver interleaving the soft-decision information from a corresponding component decoder to provide a permuted block of soft information to a subsequent component decoder, the received codewords being decoded by a process of iterations through the N component decoders and N- 1 interleavers to provide soft-decision output from the composite decoder; a first deinterleaver comprising N-1 deinterleavers corresponding to the N-1 interleavers, the N-1 deinterleavers of the first deinterleaver being applied in reverse order to die N-1 interleavers, the set of a priori soft-decision information for the first of the N component decoders being calculated assuming that the data bits' values are equally likely for the first iteration and thereafter comprising a first function of the soft-decision information, which first function of the soft-decision information is outputted by the N ώ decoder and fed back via the first deinterleaver, the set of a priori soft-decision information provided to each other component decoder comprising the first function of the soft-decision information from the previous sequential component decoder; and a second deinterleaver comprising N- 1 deinterleavers corresponding to the N-1 interleavers, the N-1 deinterleavers of the second deinterleaver being applied in reverse order to the N- 1 interleavers, the second deinterleaver deinterleaving a second function of the soft-decision output from the N th component decoder to provide the composite decoder's soft-decision ouφut. 24. The decoder of claim 23 wherein the number of iterations through the component decoders, interleavers and deinterleavers is a predetermined number. 25. The decoder of claim 23 wherein the iterations through the component decoders, interleavers and deinterleavers continues until decoder convergence is detected if the number of iterations is less than a maximum number; otherwise decoding terminates after the maximum number of iterations, and die composite decoder provides the second function of soft- decision outputs from the N Λ component decoder as its soft-decision output via the second deinterleaver. 26. The decoder of claim 23, further comprising a decision device for implementing a decision rule to provide hard-decision outputs as a function of the composite decoder's soft-decision ouφut. 27. The method of claim 23 wherein the N component decoders comprise circular MAP decoders which decode by solving an eigenvector problem. 28. The method of claim 23 wherein the N component decoders comprise circular MAP decoders which decode by using a recursion method. 29. An encoder and decoder system for encoding and decoding parallel concatenated convolutional codes, comprising: a parallel concatenated encoder comprising a plurality (N) of component encoders and a plurality (N-1) of encoder interleavers connected in a parallel concatenation for systematically applying tail-biting nonrecursive systematic convolutional codes to a block of data bits and various permutations of the block of data bits, and thereby generating component codewords comprising the data bits and parity bits; and a composite codeword formatter for formatting the collection of bits from the component codewords to provide a composite codeword; a composite-codeword-to-component-codeword converter for receiving the composite codeword from a channel and forming a plurality of N corresponding received component codewords therefrom; a plurality (N) of component decoders, each respective decoder receiving a corresponding received component codeword from the composite- codeword-to-component-codeword converter, each respective decoder also receiving a set of a priori soft-decision information for values of the data bits, the N component decoders each providing soft-decision information on each data bit in the data block in the order encoded by a corresponding component encoder in the parallel concatenated encoder; a plurality of N- 1 interleavers, each respective interleaver interleaving the soft-decision information from a corresponding component decoder to provide a permuted block of soft information to a subsequent component decoder, the received codewords being decoded by a process of iterations through the N component decoders and N-1 interleavers to provide soft-decision ouφut from die composite decoder; a first deinterleaver comprising N- 1 deinterleavers corresponding to the N-1 interleavers, the N-1 deinterleavers of the first deinterleaver being applied in reverse order to the N-1 interleavers, the set of a priori soft-decision information for the first of the N component decoders being calculated assuming that die data bits' values are equally likely for the first iteration and thereafter comprising a first function of the soft-decision information, which first function of the soft-decision information is outputted by the N* decoder and fed back via the first deinterleaver, the set of a priori soft-decision information provided to each other component decoder comprising the first function of the soft-decision information from the previous sequential component decoder; and a second deinterleaver comprising N- 1 deinterleavers corresponding to the N- 1 interleavers, the N- 1 deinterleavers of the second deinterleaver being applied in reverse order to the N-1 interleavers, the second deinterleaver deinterleaving a second function of the soft-decision output from the N th component decoder to provide the composite decoder's soft-decision output. 30. The encoder and decoder system of claim 29 wherein the composite codeword formatter produces the composite codeword such that it includes only one occurrence of each bit in the block of data bits. 31. The encoder and decoder system of claim 29 wherein the composite codeword produces the composite codeword such that it includes only selected ones of the bits comprising the component codewords according to a predetermined pattern. 32. The encoder and decoder system of claim 29 wherein the number of iterations through the component decoders, interleavers and deinterleavers is a predetermined number. 33. The encoder and decoder system of claim 29 wherein the iterations through the component decoders, interleavers and deinterleavers continues until decoder convergence is detected if the number of iterations is less than a maximum number; otherwise decoding terminates after the maximum number of iterations, and the composite decoder provides the second function of soft-decision outputs from the N th component decoder as its soft- decision output via the second deinterleaver. 34. The encoder and decoder system of claim 29, further comprising a decision device for implementing a decision rule to provide hard- decision ouφuts as a function of the decoder's soft-decision output. 35. The method of claim 29 wherein the N component decoders comprise circular MAP decoders which decode by solving an eigenvector problem. 36. The method of claim 29 wherein the N component decoders comprise circular MAP decoders which decode by using a recursion method.

Inventors: ANDERSON JOHN BAILEY, HLADIK STEPHEN MICHAEL, ANDERSON, JOHN, BAILEY, HLADIK, STEPHEN, MICHAEL
Applicants: GEN ELECTRIC, GENERAL ELECTRIC COMPANY
Application year: 1997
Main classification: H03M13
IPC codes: H03M13, H04L1