Generation of temperature compensated low noise symmetrical reference voltages

Abstract: Generation of symmetrical temperature compensated reference voltages in mixed type integrated circuits with a superior PSRR includes the use of a voltage-to-current conversion stage of a temperature independent bandgap voltage for producing eventually a differential pair of currents that are input to a pair of transresistance feedback operational amplifiers the feedback resistors of which are integrated in an interlaced form with a resistor employed in said conversion stage.

Description: FIELD OF APPLICATION OF THE INVENTION The present invention relates to analog circuits in general and in particular to Sigma-Delta analog/digital and digital/analog converter circuits. TECHNOLOGICAL BACKGROUND In particular applications, for example in switched-capacitor integrated circuits used in modern Sigma-Delta converters, there is a need for generating reference voltages, usually symmetrical about an analog (VCC/2) ground device, with a low noise and thermally compensated. Fig. 1 shows the circuit diagram of a classical second order Sigma-Delta modulator for an analog/digital converter (A/D). VH and VL are the reference voltage that define the maximum input dynamic excursion of the system. Fig. 2 shows a switched-capacitor biquadratic cell for filtering the digital bitstream in a generic Sigma-Delta digital/analog converter (D/A). Depending on the logical value of the bitstream ('1' or '0'), a positive voltage (VH) or a negative voltage (VL) referred to the input analog reference potential (analog ground) of the filter is applied. In both applications, as shown in Figures 1 and 2, the performances of the respective A/D and D/A converters depend on the "quality" of these reference voltages (VH and VL). In fact, a noise superimposed to such voltages is translated into an error of the charge stored in the input capacitances and hence on the integrated value at the output of the two structures, thus limiting the signal-to-noise ratio of these devices. Today, high resolution audio converters use reference voltage sources external to the converter chip, commonly realized on the printed circuit card starting from adequately filtered and compensated supplies. An alternative fully integrated solution adopted in some known devices is depicted in Fig. 3. Here the reference voltages are generated from the supply voltage using of a resistive divider and are buffered by low noise amplifiers. However, with this known solution, besides obtaining inaccurate voltage values (the value of an integrated resistance being definable with a precision of about ±15%), the rejection toward supply noise is null. Moreover, being these integrated circuits often of a "mixed" digital and analog type, the supply lines are affected by digital noise, correlated to the clock frequency of the digital circuitry, hence amplitudes of several tens of mV (RMS) of noise superimposed to the DC supply voltage (VCC), as well as on the reference voltages derived from it, are not uncommon. In order to filter this noise, large external capacitors (of several tens of µF) are normally used, which add to the total cost of the application. Another drawback of this known solution is the thermal drift of the reference voltages caused by temperature variations of the integrated resistors (of polysilicon or "well" type). The document WO 97/20262 discloses a dual source of a constant and of a PTAT current, composed of a bandgap reference circuit, a constant current control circuit controlled by a bandgap reference voltage and a PTAT current control circuit delivering a PTAT current that is dependent on the current delivered by the constant current control circuit rather than from a resistance value. In many integrated devices there exist particular circuits that, starting from an on-chip generation of the so-called BANDGAP voltage of the silicon (∼1.2 - 1.3V), which is constant with the temperature, generate reference voltages of adequate value either by the use of resistive voltage dividers or of analog multipliers. In any case, when generating symmetrical reference voltages for the peculiar applications mentioned above, their dependence from the temperature must be minimized, rejection of noise superimposed to the supply voltage must be maximized, and the voltages must be the least sensitive as possible to nonideal conditions as may arise because of the inevitable spread of the nominal value of the integrated components, resistivity of interconnections that may cause voltage differences due to undue voltage drops, etc.. PURPOSE AND SUMMARY OF THE INVENTION A circuit has been found and is the object of the present invention; generating temperature compensated low noise symmetrical reference voltages that effectively overcome the above mentioned problems and drawbacks of known circuits as currently used for this purpose. This important result is obtained, according to this invention, by employing a circuit having a first stage that converts a voltage independent from the temperature, typically a voltage produced by a normal bandgap circuit, in a current which is forced on an integrated resistor coupled to ground (thus becoming again sensitive to the changes of temperature), a cascade of current mirrors that derive from said current a differential pair of currents whose value is a replica of the value (immune to the noise superimposed to the supply voltage, but sensitive to thermal excursions) of the current forced through said integrated resistance, and a pair of transresistance feedback operational amplifiers having their noninverting input connected in common to a temperature compensated voltage, for example the same voltage produced by the bandgap circuit and on the respective inverting inputs of which are injected the currents of said differential pair, outputting from the respective operational amplifiers two symmetrical voltages referred to the voltage existing on the noninverting inputs (analog ground). These symmetrical reference voltages produced by the circuit are practically insensitive to the noise that may be superimposed on the supply voltage, being such a noise reduced by the rejection ratio of the PSRR of the two operational amplifiers. The dependence from the temperature that is inevitably reintroduced on the current forced through the integrated resistor coupled to ground, is effectively compensated by integrating the feedback resistors of the pair of output operational amplifiers, in an interlaced manner to said first resistor, by so defining the relative physical layout of integration. Therefore, all these integrated resistors will have practically the same temperature gradient, compensated by the resistive ratio between the feedback resistors and said first resistor. BRIEF DESCRIPTION OF THE FIGURES Figure 1 shows, as described above, the circuit diagram of a Sigma-Delta modulator of the second order for an A/D converter. Figure 2 shows, as described above, the circuit diagram of a noise-shaping biquadratic filter cell for a D/A converter. Figure 3 shows, as described above, a classical manner to generate symmetrical reference voltages about an analog ground. Figure 4 shows the circuit of the present invention. DESCRIPTION OF AN EMBODIMENT The basic diagram of the circuit of the invention generating two symmetrical voltages VH and VL is shown in Fig. 4. Starting from a low-noise and temperature independent reference voltage (VBG) generated for example by a common bandgap circuit integrated on the chip or derived from an external source through a dedicated pin, a voltage-to-current conversion is performed by a low noise, buffer configured operational amplifier, OPA, and an integrated resistor R1. The current so generated is: I1 = VBG/R1 By this conversion the current I1 becomes sensitive to the temperature drift of the absolute value of R1, but remains practically immune to the noise on the supply voltage, being such a noise attenuated according to the inherently high Power Supply Rejection Ratio (PSRR) of the operational amplifier OPA. The current so generated is mirrored through a plurality of current mirrors in cascade, depicted in Fig. 4 by the MOS transistors M1-M5. Such a cascade of current mirrors produces a differential pair of currents I1, replica of the same current I1 that is forced through the integrated resistor R1 of the voltage-to-current conversion stage. The noise eventually superimposed to the DC supply voltage VCC does not perturbate the "copying" of the current from the first (input) branch M1 to the two following (output) branches: M2 and M3, because the noise is applied equally to the source node of the output transistors M2 and M3 that have their gates in common. Indeed, the gate-source voltage (VGS) is identical for M1, M2 and M3. Moreover, the electronic noise and any physical.mismatch of the transistors may be reduced to negligible values, simply by incrementing the channel length and the gate area. The two currents of the differential pair of currents are respectively injected in and drawn out (depending on their sign) of the virtual ground node (that is the noninverting input node) of a pair of transresistance feedback operational amplifiers, so that the two operationals outputs the two symmetrical voltages VH and VL, referred to the VA voltage of the analog ground node A which, for example, may coincide with the temperature independent voltage VBG. The two operational amplifiers OPABUF1 and OPABUF2, apart from acting as a buffer for the circuits coupled to their outputs, respectively, for example a switched-capacitor filter, they "uncouple" the output symmetric voltages from the noise on the supply node by strongly attenuating it in function of the PSRR factor of the operational amplifier. Therefore, VH and VL take the following values: VH =VA+ I1*R2 VL = VA - I1*R2 whereby, by imposing VA = VBG and using the preceding relation for I1, the following equations are obtained: VH = VBG + VBG*R2/R1 VL = VBG - VBG*R2/R1 According to this generation scheme of VH and VL, besides retaining a substantial rejection of the supply noise, also an excellent thermal compensation is easily implemented. In fact, the resistors R1 and R2, are purposely realized in the same manner, most preferably according to a so-called interlaced physical layout, in order to exhibit the same thermal gradient, compensated by the ratio R2/R1. Moreover, the dependence of the VH and VL voltages from a the resistive ratio, has the advantage of reducing the effects of nonidealities of physical implementation (process spread) of the resistance. With the circuit of the invention accuracies of ±1% on the actual value of VH and VI may be easily attained, with a residual superimposed noise of only a few microvolt RMS.

Claims: A generator circuit of temperature compensated reference voltages symmetrical about an intermediate potential or analog ground potential, comprising a bandgap circuit generating a temperature independent voltage (VBG), a voltage-to-current conversion stage and a cascade of current mirrors of the current produced by said conversion stage, characterized in that said voltage-to-current conversion stage is composed of a buffer-configured operational amplifier (OPA), having a noninverting input (+) coupled to said temperature compensated voltage (VBG), a transistor (M) driven by the output of the operational amplifier (OPA) generating a current (I1) which is forced through an integrated resistor (R1) to a ground node of the circuit; said cascade of current mirror (M1, M2, M3, M4, M5) produce a differential pair of currents of a value replica of said generated current (I1); a pair of transresistance feedback operational amplifiers (OPABUF1, OPABUF2, R2) having respective noninverting nodes (+) are coupled in common to a node (A) to which a thermally compensated voltage is applied, and on the inverting nodes (-) of which are respectively injected the currents of said differential pair of currents, outputting said symmetrical reference voltages (VL, VH), referred to the voltage of said node (A); said resistor (R1) being interlacedly integrated with feedback resistors (R2) of said pair of operational amplifiers.

Inventors: ANGELICI MARCO, BIANCHESSI MARCO, DALLE FESTE SANDRO, SERINA NADIA, ANGELICI, MARCO, BIANCHESSI, MARCO, DALLE FESTE, SANDRO, SERINA, NADIA
Applicants: ST MICROELECTRONICS SRL, STMICROELECTRONICS S.R.L.
Application year: 1997
Main classification: H03M3
IPC codes: G05F3, G05F1, H01L21, H01L27