Method of forming an interlayer insulating film

Abstract: The invention is directed to a method of forming an interlayer insulating film. The film is formed from an organic silicon compound having the general formula R' x SiH 4-x (where R' is a phenyl or vinyl group and x is an integer of 1-3), which is used to form a silicon oxide film containing an organic component. Such a film may be used in semiconductor devices.

Description: BACKGROUND OF THE INVENTION The present invention relates to a method of forming an interlayer insulating film in a semiconductor device. Known interlayer insulating films formed in semiconductor devices include a silicon oxide film, a silicon oxide film composed of an organic SOG (Spin-On-Glass) containing an organic component, and an organic polymer film. In general, an interlayer insulating film formed in a semiconductor device is required to have a sufficiently low dielectric constant to achieve lower wiring capacitance and sufficiently high heat resistance to withstand a semiconductor manufacturing process. With the increasing miniaturization of an LSI formed on a semiconductor substrate, wiring capacitance which is parasitic capacitance between metal wires has remarkably increased, while degraded performance of the LSI due to a wiring delay caused thereby has presented a serious problem. The wiring capacitance is determined by the size of a space between the metal wires and by the magnitude of the dielectric constant of an interlayer insulating film present in the space. To reduce the wiring capacitance, therefore, it is important to reduce the dielectric constant of the interlayer insulating film. If an interlayer insulating film with low heat resistance is used, a thermal treatment at about 400 °C performed in a semiconductor manufacturing process will soften the interlayer insulating film and undulate wiring, which may cause a fatal failure such as a disconnection or short circuit. This is why the interlayer insulating film is required to have sufficiently high heat resistance to withstand the thermal treatment at about 400 °C. Since an interlayer insulating film composed of a silicon oxide film has an undesirably high dielectric constant, there has been proposed a fluorine-doped silicon oxide film made of silicon oxide doped with fluorine. Although the dielectric constant of the fluorine-doped silicon oxide film has been lowered by bonding a fluorine atom having low polarizability to a silicon atom composing the oxide film, the moisture absorbing property thereof increases with an increase in the amount of fluorine added thereto, so that a minimum dielectric constant attainable is about 3.5. Hence, it is difficult to use silicon oxide films including the fluorine-doped silicon oxide film as interlayer insulating films in an extremely miniaturized LSI. In place of silicon oxide films, the use of an organic SOG film or organic polymer film as an interlayer insulating film in an extremely miniaturized LSI is under consideration because of its low dielectric constant. The organic SOG film is formed by thermally curing a solution containing silica or'siloxane each having an organic component such as a methyl group or a phenyl group. Since the organic component remains in the film even after thermal curing, a low dielectric constant of about 3.0 is attained. As a first conventional embodiment, a method of forming an interlayer insulating film composed of an organic SOG film will be described with reference to FIGS. 4(a) to 4(d). First, as shown in FIG. 4(a), first-level metal wires 2 are formed on a semiconductor substrate 1, followed by a first silicon oxide film 3 formed over the entire surface of the semiconductor substrate 1 including the first-level metal wires 2 by plasma CVD using a gas mixture of, e.g., tetraethoxysilane and oxygen as a raw material. Thereafter, an organic SOG agent is applied onto the first silicon oxide film 3 by spin coating and thermally cured to form an organic SOG film 4. Then, as shown in FIG. 4(b), the entire surface of the organic SOG film 4 is etched back such that the portions thereof overlying the first-level metal wires 2 are removed. Next, as shown in FIG. 4(c), a second silicon oxide film 5 is formed over the entire surface of the silicon oxide film 3 including the remaining organic SOG film 4 by, e.g., plasma CVD using a gas mixture of, e.g., tetraethoxysilane and oxygen as a raw material. Next, as shown in FIG. 4(d), contact holes are formed in the first and second silicon oxide films 3 and 5 by using a resist pattern as a mask, which is then removed by using an oxygen plasma. Subsequently, a metal material is filled in the contact holes to form contacts. After that, second-level metal wires 7 are formed on the second silicon oxide film 5, resulting in a structure having an interlayer insulating film consisting of the first silicon oxide film 3, the organic SOG film 4, and the second silicon oxide film 5 between the first- and second-level metal wires 2 and 7. As a second conventional embodiment, a method of forming an interlayer insulating film composed of a fluorinated amorphous carbon film, which is an organic polymer film, will be described. As disclosed in a technical report (Extended Abstracts of the 1995 International Conference on Solid State Devices and Materials, Osaka, 1995, pp.177-179), a fluorinated amorphous carbon film is formed by plasma CVD using, as a raw material, a mixture of a hydrocarbon-based component such as CH 4 and a fluorine-containing component such as CF 4 . After the gas mixture is introduced into a reaction chamber of a parallel-plate plasma CVD apparatus, the pressure inside the reaction chamber is held at several hundreds of Torr. When RF power on the order of 100 to 300 W at 13.56 MHz is applied to parallel-plate electrodes in the reaction chamber, the gas mixture is partially decomposed to generate monomers, ions, and radicals, which undergo plasma polymerization, resulting in a fluorinated amorphous carbon film as a plasma polymerization film deposited on a semiconductor substrate. The fluorinated amorphous carbon film thus formed has a low dielectric constant of 2.0 to 2.5 immediately after deposition. However, since the foregoing organic SOG film is formed by repeatedly performing the steps of applying the organic SOG agent and thermally curing the applied organic SOG agent several times, it has the disadvantages of poor film formability resulting from a large amount of time required by the formation of the organic SOG film and high cost resulting from the major portion of the agent wasted during the spin coating. In the case where the etch-back process, as illustrated in FIG. 4(b), is not performed with respect to the entire surface of the organic film 4 before contact holes are formed in the organic SOG film 4 and in the first silicon oxide film 3 by using the resist pattern as a mask, which is then removed by using an oxygen plasma, and contacts are formed by filling the metal material in the contact holes, the following problems arise. In the step of removing the resist pattern by using the oxygen plasma, SiCH 3 contained in the organic SOG films 4 exposed at the sidewalls of the contact holes reacts with the oxygen plasma to generate SiOH, which is condensed by dehydration to generate H 2 O in the step of filling the metal material in the contact holes. The resulting H 2 O causes the oxidization and contamination of the metal forming the contacts, leading to faulty conduction at a contact. As for the organic polymer film composed of the fluorinated amorphous carbon film, it has the advantage of an extremely low dielectric constant over the organic SOG film but is inferior thereto in heat resistance because of its low glass transition temperature. When the conventional fluorinated amorphous carbon film is subjected to a thermal treatment at a temperature of 300 °C or more, the thickness of the film is significantly reduced, while the dielectric constant thereof is greatly increased. For example, if a fluorinated amorphous carbon film made from CH 4 and CF 4 and having a dielectric constant of 2.2 immediately after deposition is subjected to a thermal treatment at a temperature of 300 °C for 1 hour, the film contracts till the thickness thereof is reduced to about 65% of the original thickness immediately after deposition, which is a 35% reduction, while the dielectric constant thereof is increased to about 2.8. It is to be noted that the foregoing problems are not limited to the interlayer insulating film formed between upper and lower metallization layers but also arise in an interlayer insulating film between metal wires included in a single metallization layer. DE-A-4126759 discloses a method for producing an organic silicon-containing film from starting materials selected from silanes, alkoxysilanes and siloxanes. Oxygen is not involved in the reaction. SUMMARY OF THE INVENTION In view of the foregoing, the object of the present invention is to improve the film formability, cost efficiency, and processability of an interlayer insulating film composed of an organic SOG film. The present invention provides a method of forming an interlayer insulating film, wherein a material containing, as a main component, an organic silicon compound represented by the following general formula: R 1 x SiH 4-x (where R 1 is a phenyl group or a vinyl group; and x is an integer of 1 to 3) is caused to undergo plasma polymerization or react with an oxidizing agent to form an interlayer insulating film composed of a silicon oxide film containing an organic component. Preferred embodiments of the present invention are set fouth in the sub-claims. Since the resulting interlayer insulating film contains, as a main component, the organic silicon compound represented by the following general formula: R 1 x SiH 4-x (where R 1 is a phenyl group or a vinyl group; and x is an integer of 1 to 3), the proportion of SiCH 3 contained in the interlayer insulating film is much lower than contained in a conventional organic SOG film, though the dielectric constant thereof is equal to that of the conventional organic SOG film. Accordingly, even when the interlayer insulating film is exposed to an oxygen plasma, only a small amount of SiOH is generated and the dehydration condensation of SiOH does not occur in the step of filling a metal material in contact holes. As a result, H 2 O is not generated and hence the problem of faulty conduction at a contact does not occur. Moreover, since the silicon oxide film containing the organic component is formed by causing the material containing the organic silicon compound as the main component to undergo plasma polymerization or react with an oxidizing agent, it is no more necessary to perform the steps of applying an organic SOG agent and curing the applied organic SOG agent, resulting in excellent film formability. The organic silicon compound represented by the general formula: R 1 x SiH 4-x is preferably phenylsilane or diphenylsilane. According to another preferred embodiment of the invention, the organic silicon compound represented by the general formula: R 1 x SiH 4-x is vinylsilane or divinylsilane. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view of a plasma CVD apparatus for use in a method of forming an interlayer insulating film according to each of the embodiments of the present invention; FIGS. 2(a) to 2(d) are cross-sectional views illustrating individual process steps in accordance with a first method of manufacturing a semiconductor device to which the method of forming an interlayer insulating film according to each of the embodiments of the present invention is applied; FIGS. 3(a) to 3(d) are cross-sectional views illustrating individual process steps in accordance with a second method of manufacturing a semiconductor device to which the method of forming an interlayer insulating film according to each of the embodiments of the present invention is applied; FIGS. 4(a) to 4(d) are cross-sectional views illustrating individual process steps in accordance with a conventional method of forming an interlayer insulating film. DETAILED DESCRIPTION OF THE INVENTION Referring now to FIG. 1, a description will be given first to a CVD apparatus for use in a method of forming an interlayer insulating film according to the present invention, which will be described later. FIG. 1 schematically shows the structure of a parallel-plate plasma CVD apparatus. As shown in the drawing, a semiconductor substrate 12 made of silicon and a sample stage 13, which is to serve as a lower electrode, are disposed in a hermetic reaction chamber 11. The sample stage 13 is connected to a first RF power source 15 or to the ground via a' change-over switch 14. The sample stage 13 is internally provided with a heater (not shown) for heating the semiconductor substrate 12 placed on the sample stage 13 to a specified temperature. In a position opposing the sample stage 13 in the reaction chamber 11, there is provided a shower head 16, which is to serve as an upper electrode. The shower head 16 is connected to a second RF power source 17 for supplying RF power at 13.56 MHz. The reaction chamber 11 is provided with first, second, and third gas supply lines 21, 22, and 23 for introducing a gas into the reaction chamber 11. The first gas supply line 21 is provided with a first container 24 for containing a liquid raw material therein. When the first container 24 is supplied with carrier gas at a flow rate controlled by a mass flow controller (not shown), the bubbled gas is introduced from the first container 24 into the reaction chamber 11. The second gas supply line 22 is provided with a second container 25 for containing a liquid raw material therein. When the second container 25 is supplied with carrier gas at a flow rate controlled by a mass flow controller (not shown), the bubbled gas is introduced from the second container 25 into the reaction chamber 11. Since the reaction chamber 11 is connected to a vacuum pump 26, the reaction chamber 11 can be evacuated by driving the vacuum pump 26 so that the gases are exhausted from the reaction chamber 11. Below, a first method of manufacturing a semiconductor device to which the method of forming an interlayer insulating film according to the present invention is applied will be described with reference to FIGS. 2(a) to 2(d). First, as shown in FIG. 2(a), first metal wires 101 made of, e.g., aluminum are formed on a semiconductor substrate 100. Then, as shown in FIG. 2(b), an interlayer insulating film 102 is deposited over the semiconductor substrate 100 including the first metal wires 101. As for a method of forming the interlayer insulating film 102, it will be described later. Next, as shown in FIG. 2(c), the interlayer insulating film 102 is subjected to planarization. Thereafter, as shown in FIG. 2(d), a contact 103 is formed in the interlayer insulating film 102, followed by second metal wires 104 made of, e.g., aluminum which are formed on the interlayer insulating film 102. Below, a second method of manufacturing a semiconductor device to which the method of forming an interlayer insulating film according to the present invention is applied will be described with reference to FIGS. 3(a) to 3(d). First, as shown in FIG. 3(a), a first silicon nitride film 201, a first interlayer insulating film 202, a second silicon nitride film 203, and a second interlayer insulating film 204 are sequentially deposited on a semiconductor substrate 200. As for a method of forming the first and second interlayer insulating films 202 and 204, it will be described later. Next, as shown in FIG. 3(b), the second silicon nitride film 203 and the second interlayer insulating film 204 are patterned by photolithography to form openings 205 for forming a wiring pattern. Then, the first silicon nitride film 201 and the first interlayer insulating film 202 are patterned by photolithography to form openings for contacts. In this case, the second silicon nitride film 203 serves as an etching stopper against etching performed with respect to the second interlayer insulating film 204, while the first silicon nitride film 201 serves as an etching stopper against etching performed with respect to the first interlayer insulating film 202. Next, as shown in FIG. 3(c), a metal film 207 made of, e.g., copper is deposited over the entire surface of the semiconductor substrate 200 by sputtering or CVD and caused to reflow by a thermal treatment to be filled in the openings 205 for forming a wiring pattern and in the openings 206 for contacts. The metal film 207 is then subjected to CMP to form metal wires 208 and contacts 209 as shown in FIG. 3(d), resulting in buried wiring having a dual damascene structure. A description will be given to a method of forming the interlayer insulating film. First, the semiconductor substrate 12 is placed on the sample stage 13 heated to, e.g., 400 °C and grounded by the change-over switch 14 and then the reaction chamber 11 is evacuated by the vacuum pump 26. Next, the organic silicon compound is contained in the first container 24, while carrier gas composed of, e.g., argon is supplied at a flow rate of 480 cc/min to the first container 24 so that bubbled organic silicon compound is introduced into the reaction chamber 11. Next, the pressure inside the reaction chamber 11 is set to about 133 Pa (1.0 Torr) and RF power of 250 W at a frequency of 13.56 MHz is applied from the second RF power source 17 to the shower head 16 serving as the upper electrode. During the process, the organic silicon compound gas is partially decomposed to generate monomers, ions, and radicals as decomposition products, which are polymerized to form the interlayer insulating film made of the plasma polymerization film on the semiconductor substrate 12. Since the interlayer insulating film is formed by plasma CVD, it is unnecessary to repeatedly perform the steps of applying the organic SOG agent and thermally curing the applied SOG agent several times, resulting in improved film formability and lower cost. In addition, since the interlayer insulating film contains SiCH 3 in an amount much smaller than in the conventional organic SOG film, a minimum amount of SiOH is generated even when the interlayer insulating film is etched by using an oxygen plasma. Consequently, the step of filling metal in contact holes is free from the phenomenon that SiOH is condensed by dehydration to generate H 2 O and cause faulty conduction at a contact. Although the pressure inside the reaction chamber 11 has been set to about 133 Pa (1.0 Torr), it is not limited thereto but may be set at any value within the range of 13,3 Pa to 2666 Pa (100 mTorr to 20 Torr). More preferably, the pressure inside the reaction chamber 11 is within the range of 66,7 to 666,6 Pa (0.5 to 5.0 Torr). Although the semiconductor substrate 12 has been heated to 400 °C, it is not limited thereto but may be heated to any temperature within the range of 25 to 500 °C. If the semiconductor substrate 12 is heated to a temperature over 400 °C, however, aluminum composing the metal wires formed on the semiconductor substrate 12 will lose heat resistance, so that the semiconductor substrate 12 is preferably heated to a temperature equal to or lower than 400 °C. If the temperature of the semiconductor substrate 12 is less than 200 °C, on the other hand, an undesired component may be contained in the interlayer insulating film being formed, so that the semiconductor substrate 12 is preferably heated to a temperature of 200 °C or more. The RF power applied to the shower head 16 as the upper electrode may have any value within the range of 100 to 1000 W. More preferably, the RF power has a value within the range of 250 to 500 W. The interlayer insulating film may also be formed by causing the material having, as a main component, an organic silicon compound represented by the foregoing general formula: R 1 x SiH 4-x to react with an oxidizing agent made of, e.g., O 2 or H 2 O. In this case, O 2 gas, H 2 O gas, or the like is introduced into the reaction chamber 11 through the third gas supply line 23 in the CVD apparatus shown in FIG. 1. As compounds represented by the foregoing general formula: R 1 x SiH 4-x where R 1 is a phenyl group, there can be listed phenylsilane and diphenylsilane. As compounds represented by the foregoing general formula: R 1 x SiH 4-x where R 1 is a vinyl group, there can be listed vinylsilane or divinylsilane. Although the argon gas has been used as the carrier gas, hydrogen, nitrogen, or helium may also be used properly instead of the argon gas. Although the sample stage 13 as the lower electrode has been grounded, if the RF power is applied from the first RF power source 15 to the sample stage 13 by using the change-over switch 14, a plasma composed of a reactive gas generated in the reaction chamber 11 can be supplied efficiently to the sample stage 13, so that the speed at which the interlayer insulating film is formed is increased about two- to five-fold.

Claims: A method of forming an interlayer insulating film, wherein a material containing, as a main component, an organic silicon compound represented by the following general formula: R 1 x SiH 4-x (where R 1 is a phenyl group or a vinyl group; and x is an integer of 1 to 3) is caused to undergo plasma polymerization or react with an oxidizing agent to form an interlayer insulating film composed of a silicon oxide film containing an organic component. A method of forming an interlayer insulating film according to claim 1, wherein said organic silicon compound is phenylsilane or diphenylsilane. A method of forming an interlayer insulating film according to claim 1, wherein said organic silicon compound is vinylsilane or divinylsilane.

Inventors: AOI NOBUO, ARAI KOJI, SAWADA KAZUYUKI, SUGAHARA GAKU, AOI, NOBUO, ARAI, KOJI, SAWADA, KAZUYUKI, SUGAHARA, GAKU
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1997
Main classification: C23C16
IPC codes: C23C16, H01L21