Line location adjusting circuit for PAL EDTV receiver

Abstract: Disclosed is a line location adjusting circuit of a PAL system EDTV receiver for converting each line location of luminance high-band pixels average-arranged by an encoder into original line location, including: line memories (64 - 68) for receiving and delaying the luminance high-band pixel data in serial order by horizontal scanning line; an arithmetic circuit (70-84, 90-104) for multiplying the luminance high-band pixel data delayed and outputted in serial order from the line memories by predetermined coefficients, and for obtaining and producing upper-part correlation value and lower-part correlation value by adding the luminance high-band pixel data; a correlation selecting signal determiner (62) for comparing a predetermined threshold with a difference between upper-part correlation and lower-part correlation of each luminance low-band pixel data of even and odd fields extracted from a PAL system composite video baseband signal, and for producing a selecting signal(s) in response to a result obtained from the comparison; a selecting part (86, 106) for selectively producing correlation values inputted from the arithmetic circuit in response to the selecting signal outputted from the correlation selecting signal determiner; and a gain controller (88, 108) for multiplying each correlation value by a random gain and producing it in order to strengthen the luminance high-band pixel data outputted from the selecting part.

Description: The present invention relates to a line location adjusting circuit for PAL extended definition television EDTV receiver, and more particularly, to a line location adjusting circuit that may convert each line location of luminance high-band pixels arranged through the intra-field averaging circuit in an encoder into an original line location. The present application for a line location adjusting circuit for a PAL EDTV receiver; is based on Korean Application No. 39806/1995. The extended definition television (EDTV) system used in Europe is a new wide screen television format whose aspect ratio is 16:9, the system requires a technique for minimizing cross effects of Y signals and U/V signals that occur by the 180°-phase inversion of color subcarriers when a stationary picture is reproduced on television. In order to minimize such cross effects, the EDTV system's encoder converts composite video baseband signals CVBS into digital data to extract Y H and U/V signals. An intra-field averaging circuit (IFA) mixes each intra-field average value of the Y H and U/V signals in response to a motion detection signal generated from motion detector part, and converts the same into a composite video baseband signal (CVBS) of analogue quantity. In the meantime, the EDTV system's decoder extracts Y H and U/V signals by its contrary operation to the encoder's. The following description concerns the steps in the extraction of a luminance high-band signal Y H in a conventional EDTV system's decoder with reference to Figure 1. Figure 1 is a circuit diagram showing the steps in the extraction of a Y H signal in a European EDTV system's decoder. Input Y H + C of Figure 1 is a signal obtained by adding the CVBS to a luminance low-band signal Y L generated by filtering the CVBS through a low pass filter. The input Y H + C signal is filtered through a low pass filter 10, and a luminance low-band signal Y L_ E of the even field is inputted to adders 12 and 20. The input Y H + C signal is inputted to a low pass filter 24 through a field memory 22 to be filtered therethrough, and only a luminance low-band signal Y L_ O of the odd field is inputted to adders 26 and 28. Each signal Y L_ E and Y L_ O of the even and odd fields is added to the Y H + C signal by the adders 12 and 26, respectively, to generate a Y H signal through the adder 14 and multiplier 16. The Y H signal is inputted to a line location adjusting part 18, and is separated into a luminance high-band signal Y H_ E of the even field and luminance high-band signal Y H_ O of the odd field to be inputted to the adder 20 and 28, respectively. As a result, in the adder 20, the Y H_ E signal and Y L_ E signal of the even field, are added up to generate a luminance signal Y_E of the even field, and in the adder 28, the Y H_ O and Y L_ O signals of the odd field are added up to generate a luminance Y_O signal of the odd field. Figure 2 is block diagram showing the extraction of the Y H_ E and Y H_ O signals of the even and odd fields from the Y H signal inputted to the line location adjusting part 18. Figure 3 shows the correlation between the intra-field pixels for conventional line location adjustment. The steps in the extraction of the Y H_ E and Y H_ O signals of the even and odd fields by the correlation between the intra-field pixels from the Y H signal are described as follows referring to Figures 2 and 3. Referring first to Figure 3, the left side and right side shown in Figure 3 represent pixel positions of the odd and even fields, respectively. Reference letters H0 to H2 denote each position of the luminance high-band pixels are arranged through an intra-field addressing circuit of the encoder. Reference letters HO 0 to HO 2 and HE 0 to HE 2 denote each original location of the luminance high-band pixels of the odd and even fields. Reference letters HO' 0 to HO' 2 and HE' 0 to HE' 2 indicate each location of the luminance high-band pixels of the odd and even fields to be generated. The luminance high-band pixels H0 to H2, the object of location adjustment, become disposed between the luminance high-band pixels HO 0 to HO 2 of the even field by H 0 = (HO 0 +HE 0 )/2, H 1 = (HO 1 +HE 1 )/2, H 2 = (HO 2 +HE 2 )/2. For adjustment of location, the luminance high-band pixels H 1 of the odd and even fields are moved to HO' 1 +HE' 1 , respectively. The luminance high-band pixels H 0 to H 2 , the object of location adjustment, are delayed by 1H (horizontal scanning line) by delays 30, 32 and 34. As shown in Figure 2, the line location adjusting part 18 of the conventional EDTV system multiplies the pixels of the odd and even fields by coefficients of C 0 , C 1 and C 2 and C 2 , C 1 and C 0 , respectively, to extract Y H_ O and Y H_ E signal each. In the conventional line location adjusting part 18, however, the luminance high-band pixels H 0 to H 2 of three lines are multiplied by constants regardless of the correlation of intra-field neighbouring pixels to cause deterioration to resolution at closely adjacent parts of an image whose level is significantly varied. It is an aim of embodiments of the present invention to provide a line location adjusting circuit that can convert each line location of luminance high-band pixels average-arranged by an intra-field averaging circuit of an encoder of EDTV system into an original line location. According to an aspect of the present invention, there is provided a line location adjusting circuit of a PAL system EDTV receiver for converting each line location of luminance high-band pixels average-arranged by an encoder into original line location, the circuit including: line memories for receiving and delaying luminance high-band pixel data in serial order by one horizontal scanning line; an arithmetic circuit for multiplying the luminance high-band pixel data delayed and generated in serial order by the line memories by predetermined coefficients, and for obtaining and producing upper-part correlation and lower-part correlation values by adding the luminance high-band pixel data; a correlation selecting signal determiner for comparing a predetermined threshold with the absolute value of the difference between upper-part correlation and lower-part correlation of each luminance low-band pixel data of even and odd fields extracted from a PAL system composite video baseband signal, and for producing a selecting signal in response to a result obtained from the comparison; a selecting part for selecting between correlation values inputted from the arithmetic circuit in response to the selecting signal generated from the correlation selecting signal determiner; and a gain controller for multiplying each correlation value by a random gain and producing it in order to strengthen the luminance high-band pixel data generated from the selecting part. Preferably, the luminance high band pixel data of even and odd fields are extracted separately by providing one part of said arithmetic means, selecting means and gain controlling means to process said even field data and another set of said arithmetic means, selecting means and gain controlling means to process said odd field data. Said arithmetic means may include: multipliers for multiplying luminance high-band pixel data delayed and outputted to be different in order by each input and output terminal of said line memories by predetermined coefficients; adders for producing to said selecting means upper-part correlation value and lower-part correlation value obtained by adding values obtained through the multiplication; and dividers for producing an average value of said upper-part correlation value and lower-part correlation value to said selecting means. Preferably, said line memories include three line memories connected in series. Preferably, each of said luminance low-band pixel data of the odd field has a line location of the luminance high-band pixel data not average-arranged yet. Preferably, said luminance low-band pixel data of the even field are disposed on each upper and lower horizontal scanning line of said luminance low-band pixel data of said odd field. Preferably, the size of the upper-part correlation is indicative of an absolute value of the size obtained by subtracting said luminance low-band pixel data of the odd field by the luminance low-band pixel data of the even field of the horizontal scanning line existing on the upper part of the luminance low-band pixel data of said odd field, and the size of the lower-part correlation is indicative of an absolute value of the size obtained by subtracting said luminance low-band pixel data of the odd field by the luminance low-band pixel data of the even field of the horizontal scanning line existing on the lower part of the luminance low-band pixel data of said odd field. Preferably, said correlation selecting signal determining means outputs to said selecting means a selecting signal for outputting to said gain controlling means an average value generated from said dividers in case that a difference between said lower-part correlation and upper-part correlation is smaller than said threshold, and outputs a selecting signal for outputting the upper-part correlation value to said gain controlling means if the upper-part correlation is smaller than the lower-part one in absolute value by comparing the upper-part correlation and lower-part correlation with each other in absolute value when the difference between said lower-part correlation and upper-part correlation is larger than said threshold, and outputs a selecting signal for outputting the lower-part correlation value to said gain controlling means if the lower-part correlation is smaller than the upper-part one in absolute value. Preferably, said selecting signals outputted from said correlation selecting signal determining means are 2-bit data each. For a better understanding of the invention, and to show how embodiments of the same may be carried into effect, reference will now be made, by way of example, to the accompanying diagrammatic drawings, in which: Figure 1 is a detailed circuit diagram illustrating the steps in the extraction of a luminance high-band signal Y H in an European EDTV system's decoder; Figure 2 is detailed block diagram illustrating the extraction of luminance high-band signals Y H_ E and Y H_ O of the even and odd fields from the Y H signal inputted to a line location adjusting part 18; Figure 3 illustrates the correlation between the intra-field pixels for conventional line location adjustment; Figure 4 illustrates the correlation of intra-field luminance low-band pixels; Figure 5 illustrates a block diagram of a correlation detector 51 for detecting correlation between intra-field neighbouring luminance low-band pixels in accordance with an embodiment of the present invention; and Figure 6 illustrates a detailed circuit diagram of a line location adjusting part 18 for extracting a luminance high-band signal Y H_ E of the even field and a luminance high-band signal Y H_ O of the odd field from the average luminance high-band signal Y H . In the following description, like reference numerals are used to designate like components. Figure 4 depicts the correlation of intra-field luminance low-band pixels in accordance with embodiments of the present invention. Reference letter H 1 denotes an average luminance high-band pixel, and LO 0 to LO 2 and LE 0 and LE 2 indicate luminance low-band pixels of the odd and even fields OF and EF, respectively. Embodiments of the present invention use a luminance low-band pixel LO 1 disposed on the position to which the pixel H 1 is moved, and neighbouring luminance low-band pixels LE 1 and LE 2 . Upper-part correlation D 1 shows the relationship between the pixel LO 1 and neighbouring luminance low-band pixel LE 1 , and lower-part correlation D 2 shows the relationship between the pixel LO 1 and neighbouring luminance low-band pixel LE 2 . The upper-part correlation D 1 and lower-part correlation D 2 can be obtained by the circuitry of Figure 5. Figure 5 depicts a block diagram of a correlation detector 51 for detecting correlation between intra-field neighbouring luminance low-band pixels in accordance with the present invention. As shown in Figure 5, the pixel LO 1 inputted to the correlation detector 51 is added to the luminance low-band pixel LE 2 by an adder 54, and is then inputted to a correlation selecting signal determiner 62 as a value of D 2 substituted for an absolute value through an absolute circuit (ABS) 58. D 2 denotes a lower-part correlation, and has a value of |LO 1 -LE 2 |. The luminance low-band pixel LO 1 is added to the luminance low-band LE1 by an adder 56, and is then inputted to the correlation selecting signal determiner 62 as a value of D 1 substituted for an absolute value through an absolute circuit (ABS) 60. D 1 denotes a upper-part correlation, and has a value of |LO 1 -LE 1 |. The correlation selecting signal determiner 62 determines that a change between the upper and lower luminance low-band pixels is small if |D 2 -D 1 | is smaller than a threshold, and extracts a luminance high-band pixel HO' 1 of the odd field and a luminance high-band pixel HE' 1 of the even field by using all the luminance high-band pixels H 0 , H 1 and H 2 . If |D 2 -D 1 | is larger than a threshold, the correlation selecting signal determiner 62 detects one with the smaller absolute value than the other's of D 1 and D 2 . When D 1 is smaller than D 2 in absolute value, the correlation selecting signal determiner 62 determines that the upper part correlation is larger than the lower one and the luminance high-band pixels H 0 and H 1 are used. on the contrary, when D 2 is smaller than D 1 in absolute value, the correlation selecting signal determiner 62 determines that the lower part correlation is larger than the upper one and the luminance high-band pixels H 1 and H 2 are employed. The correlation selecting signal determiner 62 generates a selecting signal S with 2-bit data of "01" in case of |D 2 -D 1 | ≤ threshold, of "11" in case of D 1 ≥ D 2 , and of "00" in case of D 1 ≤ D 2. Figure 6 relates to a first preferred embodiment of the present invention, and depicts a detailed circuit diagram of the line location adjusting part 18 for separating a luminance high-band signal Y H_ E of the even field and a luminance high-band signal Y H_ O of the odd field that are respectively converted into their original line locations from the average luminance high-band signal Y H arranged by the encoder. The operation of an embodiment of the present invention is now described in detail with reference to Figure 6. Once the average luminance high-band signal Y H arranged by the encoder is applied to the line location adjusting part 18, the luminance high-band pixels H 0 to H 2 delayed by 1H are generated from the delays 64, 66 and 68 of the horizontal scanning line, respectively. Each of the luminance high-band pixels H 0 to H 2 is multiplied by predetermined coefficients C 0 , C 1 , b 0 and b 1 in multipliers 70, 72, 74, 76, 90, 92, 94 and 96 that constitutes an arithmetic circuit, and is processed through adders 78, 80, 82, 98, 100 and 102 and dividers 84 and 104 to be inputted to first and second multiplexers 86 and 106. The luminance high-band pixels H 2 and H 1 delayed and generated each from the left and right sides of the delay 66 of the horizontal scanning line are multiplied by predetermined coefficients b 0 and b 1 through the multipliers 90 and 92, arithmetic circuit of the odd field, and are added by the adder 98. A value obtained thereby which becomes a lower-part correlation value is inputted to terminal I4 of the second multiplexer 106. The luminance high-band pixels H 1 and H0 generated each from the left and right sides of the delay 68 are processed through the multipliers 94 and 96 and adder 100 of the odd field. A value obtained thereby which becomes a upper-part correlation value is inputted to terminal I6 of the second multiplexer 106. The luminance high-band pixels H 2 , H 1 and H 0 generated from the left and right sides of the respective delays 64, 66 and 68 are processed through the multipliers 90, 92, 94 and 96 and adders 98 and 100, arithmetic circuit of the odd field, and are inputted to the adder 102. The divider 104 finds an average value of the upper-part correlation value and lower-part correlation value, and the average value is inputted to terminal I5 of the second multiplexer 106. The lower-correlation value and upper-part correlation value and average value are inputted to input terminals I1, I2 and I3 of the first multiplexer 86, respectively, through the same arithmetic circuit as mentioned above. The first and second multiplexers 86 and 106, which finally select the location of the upper-line and lower-line of the luminance high-band pixels H 0 to H 2 arranged by the intra-field averaging circuit of the encoder, selectively output values inputted through the terminals I1 to I6 to gain controllers 88 and 108 in response to 2-bit data of the selecting signal S generated from the correlation detector 51 of Figure 5. When 2-bit data of the selecting signal S inputted to each terminal P1 and P2 of the first and second multiplexers 86 and 106 is "00", the lower-part correlation values inputted to the terminals I1 and I4 as the upper-part correlation D 1 are outputted to the gain controllers 88 and 108. If 2-bit data of the selecting signal S inputted to each terminal P1 and P2 of the first and second multiplexers 86 and 106 is "11", the upper-part correlation values inputted to the terminals I3 and I6 as the lower-part correlation D 2 are outputted to the gain controllers 88 and 108. When 2-bit data of the selecting signal S inputted to each terminal P1 and P2 of the first and second multiplexers 86 and 106 is "01" (if |D 2 -D 1 | is smaller than a threshold), an average value of the upper-part correlation value and lower-part correlation value through the terminals I2 and I5 is obtained and outputted to the gain controllers 88 and 108. The gain controllers 88 and 108 multiply each value by a random gain G through terminals G1 and G2 to enhance luminance high-band components. The gain controllers 88 and 108 generates each luminance high-band signal Y H_ E and Y H_ O of the even and odd fields whose line locations are converted into original ones not arranged yet by the encoder. As mentioned above, embodiments of the present invention can convert into the original line location each location of the luminance high-band pixels arranged by the IFA circuit of the encoder according to the upper-part correlation and lower-part correlation attained by using relationship between the intra-field luminance low-band pixels to prevent deterioration to the resolution of EDTV system. Therefore, it should be understood that the present invention is not limited to the particular embodiment disclosed herein as the best mode contemplated for carrying out the present invention, but rather that the present invention is not limited to the specific embodiments described in this specification except as defined in the appended claims.

Claims: A line location adjusting circuit of a PAL extended definition television receiver for converting each line location of luminance high-band pixels average-arranged by an encoder into original line location, comprising: line memories (64, 66, 68) for receiving and delaying luminance high-band pixel data (Y H ) in serial order by one horizontal scanning line; arithmetic means (70, 72, 74, 76, 90, 92, 94, 96) for multiplying said luminance high-band pixel data delayed and outputted in serial order from said line memory by predetermined coefficients (b 0 , b 1 , C 0 , C 1 ), and for obtaining and producing upper-part correlation and lower-part correlation values by adding (78, 80, 82, 98, 100, 102) said luminance high-band pixel data; correlation selecting signal determining means (62) for comparing a predetermined threshold with the absolute value of the difference (|D 2 - D 1 |) between upper-part correlation and lower-part correlation of each luminance low-band pixel data of even and odd fields extracted from a PAL system composite video baseband signal, and for producing a selecting signal (S) in response to a result obtained from said comparison; selecting means (86, 106) for selecting between correlation values inputted from said arithmetic means in response to the selecting signal(s) outputted from said correlation selecting signal determining means (62); and gain controlling means (88, 108) for multiplying each correlation value by a random gain (G) and producing it in order to strengthen the luminance high-band pixel data outputted from said selecting means (86, 106). The line location adjusting circuit according to claim 1, wherein the luminance high band pixel data of even and odd fields are extracted separately by providing one part of said arithmetic means, (70, 72, 74, 76, 78, 80, 82, 84), selecting means (86) and gain controlling means (88) to process said even field data and another part of said arithmetic means (90, 92, 94, 96, 98, 100, 102, 104) selecting means (106) and gain controlling means (108) to process said odd field data. The line location adjusting circuit according to claim 1 or 2, wherein said arithmetic means includes: multipliers (70, 72, 74, 76, 90, 92, 94, 96) for multiplying luminance high-band pixel data delayed and outputted to be different in order by each input and output terminal of said line memories (64, 66, 68) by predetermined coefficients; adders (78, 80, 82, 98, 100, 102) for producing to said selecting means (86, 106) upper-part correlation value and lower-part correlation value obtained by adding values obtained through the multiplication; and dividers (84, 104) for producing an average value of said upper-part correlation value and lower-part correlation value to said selecting means. The line location adjusting circuit according to claim 1, 2 or 3, wherein said line memories (64, 66, 68) include three line memories connected in series. The line location adjusting circuit according to any of the preceding claims wherein each of said luminance low-band pixel data of the odd field has a line location of the luminance high-band pixel data not average-arranged yet. The line location adjusting circuit according to any of the preceding claims, wherein said luminance low-band pixel data of the even field are disposed on each upper and lower horizontal scanning line of said luminance low-band pixel data of said odd field. The line location adjusting circuit according to claim 6, wherein the size of the upper-part correlation is indicative of an absolute value of the size obtained by subtracting said luminance low-band pixel data of the odd field by the luminance low-band pixel data of the even field of the horizontal scanning line existing on the upper part of the luminance low-band pixel data of said odd field, and the size of the lower-part correlation is indicative of an absolute value of the size obtained by subtracting said luminance low-band pixel data of the odd field by the luminance low-band pixel data of the even field of the horizontal scanning line existing on the lower part of the luminance low-band pixel data of said odd field. The line location adjusting circuit according to claim 3 or any of claims 4 to 7 as appendant thereto wherein said correlation selecting signal determining means outputs to said selecting means a selecting signal for outputting to said gain controlling means (88, 108) an average value generated from said dividers (84,104) in case that a difference between said lower-part correlation and upper-part correlation is smaller than said threshold, and outputs a selecting signal for outputting the upper-part correlation value to said gain controlling means (88, 108) if the upper-part correlation is smaller than the lower-part one in absolute value by comparing the upper-part correlation and lower-part correlation with each other in absolute value when the difference between said lower-part correlation and upper-part correlation is larger than said threshold, and outputs a selecting signal for outputting the lower-part correlation value to said gain controlling means (88, 108) if the lower-part correlation is smaller than the upper-part one in absolute value. The line location adjusting circuit according to claim 8, wherein said selecting signals outputted from said correlation selecting signal determining means (62) are 2-bit data each.

Inventors: KIM JEONG-WHUN, KIM, JEONG-WHUN
Applicants: SAMSUNG ELECTRONICS CO LTD, SAMSUNG ELECTRONICS CO., LTD.
Application year: 1996
Main classification: H04N5
IPC codes: H04N5, H04N11