Gamma correction circuit

Abstract: A gamma correction circuit includes a first look-up table in which minimum values of differences between output levels of a gamma correction curve and output levels of a straight line in respective sections formed by dividing a range from a minimum input level to a maximum input level into sixteen are stored. Furthermore, data of differences between the output levels of the gamma correction curve and levels obtained by adding the minimum values to the output levels of the straight line in the respective sections are stored in respective second look-up tables of sixteen. Then, one of the minimum values is read-out from the first look-up table according to upper four bits of input video data, and one of the second look-up tables is selectively enabled by the upper four bits, and data stored in the selected second look-up table is read-out in accordance with lower six bits of the input video data. Outputs from the first and second look-up tables are added to each other so as to output gamma correction data which is then added to the input video data, whereby a gamma characteristic of the input video data is corrected.

Description: BACKGROUND OF THE INVENTION Field of the invention The present invention relates to a gamma correction circuit. More specifically, the present invention relates to a gamma correction circuit in which video data obtained by photoelectric transfer and having a nonlinear characteristic is corrected in accordance with a gamma correction curve. Description of the prior art In conventional such a kind of gamma correction circuit 1 shown in Figure 5, data of differences between output levels y = γ(x) of a gamma correction curve and output levels y = x of video data shown in Figure 4 are stored in a look-up table 2 constituted by a ROM, and one of the data corresponding to input video data is read-out from the look-up table 2. Then, the data read-out is multiplied by a gamma correction coefficient γ by a multiplier 3, and upper ten bits of multiplication result data and the video data are added to each other by an adder 4. Therefore, the gamma correction characteristic can be changed in accordance with the gamma correction coefficient γ, and the video data can be corected by the gamma correction characteristic. However, in such a prior art, since the data of the differences between the output levels of the gamma correction curve and the output levels of the video data are written into the look-up table 2, it is needed to increase a memory capacity of the look-up table 2 in accordance with the gamma correction curve, i.e. an exponent of power. Japanese Patent Laid-open No. H6-233131, filed by Fuji Photo Film Co., Ltd., discloses a gamma correction curve that is approximated in a polygonal line form wherein stored in a look-up table are inclinations Δy of lines, reference output values y and input-data higher 2 bits D H . If there is data input, an inclination Δy and reference output value y are read from the look-up table correspondingly to the higher 2 bits of the input data. Thus gamma-corrected output data is determined based on the read-out inclination Δy and reference output value y as well as the input data lower 4 bits D L . SUMMARY OF THE INVENTION Therefore, a principal object of the present invention is to provide a novel gamma correction circuit. Another object of the present invention is to provide a gamma correction circuit capable of reducing a memory capacity of a look-up table These objects are solved by the features of claim 1. Advantageous embodiments are mentioned in the sub-claims. The range from the minimum input level to the maximum input level is divided into sixteen sections, for example, and the minimum value of the differences between the output levels of the gamma correction curve and the output levels of the straight line is stored in advance in the first look-up table for each of the sections. In addition, the straight line is for indicating an input and output characteristic of the video signal, for example, and the video signal is converted into the video data of ten bits, for example. Upper four bits of the video data are applied to the first look-up table as its address data, for example, and therefore, the minimum value corresponding to the level of the video data is read-out from the first look-up table. In contrast, the data of the differences between the output levels of the gamma correction curve and the data obtained by adding the minimum value to the output levels of the straight line are stored in advance in each of the second look-up tables of sixteen, for example. Lower six bits of the video data are applied to the respective second look-up tables as addresses therefor, and therefore, data corresponding to the level of the video signal, i.e. the lower six bits of the video data are read-out to be applied to a selection circuit. The upper four bits of the video data are also applied to the selection circuit as selection data, and therefore, the data corresponding to the level of the video signal, i.e. the upper four bits of the video data is selected. That is, one of the second look-up tables is selected. Thereafter, the minimum value read-out from the first look-up table and the data read-out from the selected second look-up table are added to each other by an adder to obtain gamma correction data. The gamma correction data is added to the input video data, whereby the gamma characteristic of the input video data is corrected. According to the present invention, since the data of the second look-up tables are optimized, it is possible to reduce a total memory capacity of the first and second look-up tables. The above described objects and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram showing one embodiment according to the present invention; Figure 2 is an illustrative view showing a first look-up table; Figure 3 is an illustrative view showing a second look-up tables; Figure 4 is a graph showing a gamma correction curve and an input and output characteristic of video data; and Figure 5 is a block diagram showing a prior art. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A gamma correction circuit 10 of this embodiment shown in Figure 1 includes an input terminal 14 which receives video data of ten bits, for example. Upper four bits included in the video data are applied to a selection circuit 18 and a first look-up table 20 as control data and address data D1, respectively, and lower six bits of the video data are applied to second look-up tables 12 of sixteen as address data D2. Therefore, the first look-up table is read-out by the address D1, i.e. the upper four bits of the video data, and the second look-up tables are read-out by the address D2, i.e. the lower six bits of the video data. Furthermore, the video data itself is applied to an adder 28. In the first look-up table 20, minimum value data b(D1) are stored in correspondence with respective address data D1 as shown in Figure 2. More specifically, a range from a minimum input level to a maximum input level of the video data, shown in Figure 4, is divided into sixteen sections. Then, with referring to Figure 4, in a case of the section from x 1 to x 2 , a difference between an output level y = γ (x 2 ) of the gamma correction curve and an output level y = x 2 of the video data becomes minimum out of differences between output levels y = γ (x) and output levels y = x. Such the minimum value data b(D1) for each of the sections is stored in each address represented by the address data D1 from "0" to "16" of the first look-up table 20. Furthermore, as shown in Figure 3, data c(D2) are stored in the respective second look-up tables 12 in correspondence with the address data D2 from "0" to "63" for each of the sections. More specifically, range of 0 ≦x ≦1023 is equally divided into the sixteen sections, and differences between the output levels y = γ (x) of the gamma correction curve and levels y = x + b(D1) obtained by adding the minimum value data b(D1) to the output levels y = x are stored in each of the second look-up tables 12 as the data c(D2). Accordingly, one of the data c(D2) is indicated by a following equation (1). c(D2) = γ(x) - (x + b(D1)) The data c(D2) corresponding to the address data D2 are outputted from the respective second look-up tables 12. However, since bit lengths of the respective data c(D2) are different from each other as understood from Figure 3, output bit lengths of the respective second look-up tables 12 become different from each other. Accordingly, dummy bits are added to upper portions of the respective data c(D2) which are read-out by bit expansion circuits 16 corresponding to the respective second look-up tables 12, whereby the bit lengths of the data c(D2) are uniformed to eight bits. The selection circuit 18 selects one of the data c(D2) in accordance with the control data. The selected data c(D2) is added with a dummy bit by a bit expansion circuit 22, and then applied to an adder 24. In contrast, the minimum value data b(D1) corresponding to the address data D1 is read-out from the first look-up table 20, and the minimum value data b(D1) is added to the data c(D2) from the bit expansion circuit 22 by the adder 24. Then, addition result data b(D1) + c(D2) is multiplied by a gamma correction coefficient γ of seven bits by a multiplier 26. Lower six bits of multiplication result data {b(D1) + c(D2)} × γ of sixteen bits are omitted by an omission circuit (not shown), and only upper ten bits of the multiplication result data are applied to an adder 28. Thus, by omitting the lower six bits, it is possible to multiple the addition result data b(D1) + c(D2) by a decimal number. That is, in a case where "128" is applied to the multiplier 26 as the gamma correction coefficient γ, the addition result value is doubled; however, in a case where "32" is applied to the multiplier 26 as the gamma correction coefficient γ, the addition result value is halved. The multiplication result data of ten bits are added to the video data of ten bits by the adder 28, and then, upper one bit is clipped by an overflow clip circuit 36. Accordingly, video data which is indicated by a following equation (2) and has been subjected to the gamma correction is outputted from the overflow clip circuit 36. y = x + {b(D1) + c(D2)} × γ Thus, since the data stored in the first look-up table 20 and the second look-up tables 12 are optimized, it is possible to drastically reduce a total memory capacity in comparison with the prior art. More specifically, though a memory capacity of 9216 bits (= 2 10 × 9) was necessary for the look-up table 2 of the gamma correction circuit 1 shown in Figure 5, the total memory capacity of the first look-up table 20 and the second look-up tables 12 of this embodiment becomes 5328 bits as indicated by a following equation (3), and it is possible to reduce the memory capacity for about 42 % in comparison with the prior art look-up table 2. 16 × 9 + 64 × (8 + 6 × 4 + 5 × 8 + 4 + 3 + 2) = 5328 bits In addition, the selection circuit 18 and the adder 24 are necessary for the gamma correction circuit 10 of this embodiment; however, since the selection circuit can be constituted by gates of about fifty, and the adder 24 can be constituted by gates of about 300, there is not a big problem even if the above described embodiment is to be incorporated into an IC. Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of the present invention being limited only by the terms of the appended claims.

Claims: A gamma correction circuit subjecting a gamma correction to an input video signal on the basis of the data read-out from a look-up table in accordance with a level of the input video signal characterized in that that said look-up table includes a first look-up table (20) which stores a minimum value of differences between output levels of a gamma correction curve and output levels of a straight line indicative of an input and output characteristic of an input video signal for each of sections formed by dividing a range from a minimum input level to a maximum input level, and a plurality of second look-up tables (12, ..., 12) in each of which data of differences between the output levels of the gamma correction curve and levels obtained by adding the minimum values to the output levels of the straight line for each of the sections are stored, and that said gamma correction circuit comprises: a selection means (18) for selecting one of the second look-up tables in accordance with the level of the input video signal; and a first addition means (24) which adds the minimum value read-out from the first look-up table in accordance with the level of the input video signal and the data read-out from the second look-up table selected by the selection means. A gamma correction circuit according to claim 1, wherein the video signal is a digital video data of a predetermined number of bits, and the level is predetermined by upper bits of the video data, and the second look-up table (12) is read-out by predetermined lower bits of the video data. A gamma correction circuit according to claim 2, further comprising a second addition means (28) for adding an output of said first addition means (24) and the video data to each other. A gamma correction circuit according to claim 1, further comprising; uniforming means (22) which uniforms bit lengths of the data outputted from the respective second look-up tables (12). A gamma correction circuit according to claim 4, wherein the uniforming means includes a plurality of bit expansion means (22) corresponding to the respective second look-up tables (12).

Inventors: OKADA HIDEFUMI, OKADA, HIDEFUMI
Applicants: SANYO ELECTRIC CO, SANYO ELECTRIC CO., LTD.
Application year: 1996
Main classification: H04N5
IPC codes: H04N5, G06T1