Processing, recording and reproducing video data

Abstract: A method and apparatus of processing a video data, for changing an arrangement of positions of macroblocks of video data, the video data being compressed (12) in units of macroblocks and recorded (14) on a magnetic tape recording medium (30), each macroblock of video data being formed by a plurality of video data, in which the following steps are carried out: adjoining recording positions of the macroblocks of video data on the magnetic tape recording medium (30), said video data being adjoined on an image on subsequent reproduction; and shuffling the macroblocks of the video data so that the macroblocks of video data are reproduced (50) as the adjoined macroblocks of video data of the reproduction image when the video data on the magnetic tape recording medium (30) are scanned at a speed which is a predetermined multiple of a normal speed.

Description: This invention relates to processing, recording and reproducing video data. In general, digital video data of a moving picture has been compressed and coded by dividing the video data contained in each of the frames into relatively small blocks, each consisting of, for example, 8 x 4 pixels and performing processing such as predictive coding in units of these blocks. At present, however, large macroblocks of, for example, 16 x 16 pixels are now being used for the compression and coding of video data. In order to prevent a burst-like data error from occurring at the reproduction and the error correction processing from becoming impossible due to occurrence of a large amount of error in the error correction data block (ECC block) by the same error correction code, the video data is recorded on a magnetic tape for video tape recorder (VTR tape) with the video data shuffled so that the distribution of the large macroblocks contained in the same ECC block becomes random on the helical tracks of the VTR tape. No problem occurs when reproducing at a usual (normal) reproduction speed the video data compressed and coded using large macroblocks and recorded on the VTR tape shuffled so that the distribution on the helical tracks becomes random as explained above. However, it is sometimes desired to reproduce such video data from the VTR tape at a high speed such double speed or triple speed. At high speed reproduction, the reproduction head of the video cassette recorder (VCR) does not scan (trace) along the helical tracks of the VTR tape, but traces the helical tracks at an angle in accordance with a speed, which is a predetermined multiple of a normal speed, for the high speed reproduction with respect to the longitudinal direction of the helical tracks. Accordingly, all of the video data recorded on each of the helical tracks are not reproduced at the high speed reproduction - only one part is reproduced. In the conventional shuffling, the video data is shuffled so that the distribution of the macroblocks contained in the same frame becomes constant on the helical tracks of the VTR tape, therefore where only part of the video data recorded on each of the helical tracks is reproduced, macroblocks spaced apart from each other on the image are reproduced from the same helical track. When the macroblock is relatively small, due to the properties of human vision, the individual macroblocks which are reproduced do not stand out and the entire image appears integrated, therefore there is a little effect exerted upon the viewer. However, the larger the macroblock, the more the individual macroblocks stand out and harder the reproduced image becomes to be viewed by the viewer. That is, in such a case, a plurality of rectangular areas (macroblocks) spaced apart from each other are reproduced at random and the image appears unnatural to the viewer as if it were divided into separate areas like a checkered flag. Such a phenomenon becomes conspicuous when the motion of the video is vigorous. Usually a plurality of recording magnetic heads and reproduction magnetic heads (recording/reproduction heads) are respectively disposed on a tape travelling surface of a rotation drum of a video cassette tape recorder for recording and reproducing (recording/reproducing) digital audio data and digital video data of a moving picture (audio and video data). These magnetic heads respectively scan specific helical tracks on the VTR tape to record and reproduce the shuffled audio and video data. The disadvantages, for example, clogging of a magnetic head (head clogging), sometimes occurs in one or more of the plurality of recording/reproduction heads of the tape travelling surface of the rotation drum of the VCR. In such a case, the recording and reproduction of the audio and video data recorded on the helical tracks corresponding to the recording/reproduction head in which trouble is caused continuously become impossible. Accordingly, a loss of image continuously occurs at the same position over the frames and cannot be corrected by interpolation on a time axis using the video data of the other frames. That is, for loss of image due to head clogging etc., it is necessary to interpolate and correct the loss by using the other video data in the same frame. However, when recording/reproducing video data shuffled by a pattern so that the video data recorded and reproduced by one scan of the recording/reproduction heads are collected together so as to correspond to a wide range of the screen, the area of the loss of the image due to head clogging etc. becomes large and interpolation in the same frame becomes impossible. Alternatively, it can be considered to use a powerful error correction code (ECC) having a high error correction ability so as to correct the loss of image due to head clogging etc. When adopting this method, however, the amount of data of the ECC code having a high error correction ability is large, and the proportion of it occupying the audio and video data becomes high, therefore it will prevent efficient recording of the audio and video data. JP-A-4033484 discloses a means of processing a digital video signal such that the order of data is changed from the order of scanning, the change being periodically revised in response to search speed to avoid an error caused at search reproduction from being fixed. EP-A-471118 discloses a way of encoding video data, wherein the screen is divided into rectangular units and when using variable length encoding two adjacent rectangles are encoded together. This is done to avoid inbalances in the different lengths of code. Furthermore, adjacent rectangle units are recorded in parallel by two heads to improve continuity of the picture on high speed reproduction. The invention is defined by claims 1 and 2. Embodiments of the invention can provide a video data processing method, a video data processing apparatus, and a video data recording and reproducing apparatus with which loss will not continuously occur at the same position of the image obtained by reproducing the video data from the VTR tape even in a case where clogging is caused in the recording/reproduction heads. Embodiments of the invention can provide a video data processing method, a video data processing apparatus, and a video data recording and reproducing apparatus with which loss will not continuously occur at the same position of the image no matter which shuffling pattern is used to shuffle the video data to be reproduced from the VTR tape. Embodiments of the invention can provide a video data processing method, a video data processing apparatus, and a video data recording and reproducing apparatus with which easy inter-frame correction is possible and the quality of the reproduced image does not largely deteriorate even in a case where head clogging is caused in the recording/reproduction heads of the rotation drum. An aspect of the invention provides a method of processing video data compressed in units of macroblocks, including the steps of: displaying a video data block containing at least one frame of video data in which an error is continuously occurred in a same portion, on a screen; and shuffling the video data block by changing a shuffling pattern for each video data block so that portions in which the error is continuously caused will not superimpose on each other on the screen; the step of shuffling the video data block comprising: dividing each video data block into a plurality of shuffling blocks, each shuffling block comprising a plurality of adjoining macroblocks comprising video data to be displayed on one area of the screen; and changing the order of the plurality of shuffling blocks. Preferably, embodiments of the invention also comprise a recording means for recording the plurality of shuffling blocks changed in order in a plurality of recording areas of a predetermined recording medium. Preferably, the recording means has a plurality of recording heads for recording each of the plurality of shuffling blocks by sequentially accessing each of the plurality of recording areas of the recording medium in a predetermined order. Also, preferably, the apparatus, further comprises: a reproducing means for reproducing the plurality of shuffling blocks from each of the plurality of recording areas of the recording medium and an order restoring means for restoring the order of the plurality of shuffling blocks to the order before the change based on the identification code contained in each of the reproduced plurality of shuffling blocks. Preferably, the recording means has a plurality of recording heads for recording each of the plurality of shuffling blocks by sequentially accessing each of the plurality of recording areas of the recording medium in a predetermined order. The invention will now be described by way of example with reference to the accompanying drawings, throughout which like parts are referred to by like references, and in which: Fig. 1 is a view of the configuration of a video cassette recorder according to an embodiment of the present invention; Fig. 2 is a view of the configuration of a recording unit shown in Fig. 1; Fig. 3 is a view of the configuration of a reproduction unit shown in Fig 1; Figs. 4A and 4B are views illustrating the configuration of a recording head unit and reproduction head unit shown in Fig. 1 for a case of four heads. Fig. 5 is a view of a method of dividing the video data when the compressing and coding system shown in Fig. 1 and Fig. 2 compresses and codes noncompressed video data; Figs. 6A to 6C are views of compressed video data output from the compressing and coding system shown in Fig. 1 to a recording system; Figs. 7A to 7D are views of the configuration of the recording block unit shown in Fig. 6 wherein a pack circuit shown in Fig. 2 multiplexes the compressed video data and the noncompressed audio data; Fig. 8 is a view of an ECC block stored in a memory circuit shown in Fig. 1; Fig. 9 is a view of a recording area of the memory circuit shown in Fig. 1; Fig. 10 is a view of a recording format of the video data, the audio data, and the system auxiliary data on a VTR tape shown in Fig. 1; Fig. 11 is a view of the recording position of the video data, the audio data, and the system auxiliary data shown in Fig. 10 on the VTR tape; Fig. 12 is a view of a method of dividing a macroblock; Fig. 13 is a view of the traces of part of the helical tracks from which the reproduction head unit 40 can reproduce 50 percent or more of the data when the reproduction unit shown in Fig. 3 performs 2-speed reproduction, 4-speed reproduction, 7-speed reproduction, 19-speed reproduction, and 37-speed reproduction; Figs. 14A and 14B are views of the area of the image updated whenever a reproduction head unit scans the VTR tape one time when the reproduction unit shown in Fig. 1 performs 2-speed reproduction; Figs. 15A and 15B are views of the area of the image updated whenever the reproduction head unit scans the VTR tape one time when the reproduction unit shown in Fig. 1 performs 4-speed reproduction; Figs. 16A and 16B are views of the area of the image updated whenever the reproduction head unit scans the VTR tape one time when the reproduction unit shown in Fig. 1 performs 7-speed reproduction; Figs. 17A and 17B are views of the area of the image updated whenever the reproduction head unit scans the VTR tape one time when the reproduction unit shown in Fig. 1 performs 19-speed reproduction; Figs. 18A and 18B are views of the area of the image updated whenever the reproduction head unit scans the VTR tape one time when the reproduction unit shown in Fig. 1 performs 37-speed reproduction; Figs. 19A to 19C are view of contents of a synchronization data ID shown in Fig. 9; Fig. 20 is a view illustrating part of an interleave pattern of video data for video data having a 525/60 configuration; Fig. 21 is a view illustrating part of the interleave pattern of video data for video data having a 525/60 configuration; Fig. 22 is a view illustrating part of the interleave pattern of video data for video data having a 525/60 configuration; Fig. 23 is a view illustrating part of the interleave pattern of video data for video data having a 525/60 configuration; Fig. 24 is a view illustrating part of the interleave pattern of video data for video data having a 625/50 configuration; Fig. 25 is a view illustrating part of the interleave pattern of video data for video data having a 625/50 configuration; Fig. 26 is a view illustrating part of the interleave pattern of video data for video data having a 625/50 configuration; Fig. 27 is a view illustrating part of the interleave pattern of video data for video data having a 625/50 configuration; Fig. 28 is a view of the interleave pattern of audio data contained in video data having a 525/60 configuration; Fig. 29 is a view of the interleave pattern of audio data contained in video data having a 625/50 configuration; Figs. 30A and 30B are views of helical tracks of a VTR tape which cannot be read from and a part on the picture corresponding to the data which cannot be read for a case of video data having a 525/60 configuration taking as an example a case where trouble occurs in a second recording head among the four recording heads of the recording head unit shown in Fig. 4 when track alternation by an SYNC and ID adding circuit shown in Fig. 2 is not carried out; Figs. 31A and 31B are views of helical tracks of a VTR tape which cannot be read from and a part on the picture corresponding to the data which cannot be read for a case of video data having a 625/50 configuration taking as an example a case where trouble occurs in a second recording head among the four recording heads of the recording head unit shown in Fig. 4 when track alternation by the SYNC and ID adding circuit shown in Fig. 2 is not carried out; Figs. 32A to 32C are views of a method of interpolating lost video data; Figs. 33A and 33B are views of helical tracks of the VTR tape which cannot be read from and a part on the picture corresponding to the data which cannot be read for a case of video data having a 525/60 configuration taking as an example a case where trouble occurs in a second recording head among the four recording heads of the recording head unit shown in Fig. 4 when the track alternation by the SYNC and ID adding circuit shown in Fig. 2 is being carried out; Figs. 34A and 34B are views of helical tracks of the VTR tape which cannot be read from and a part on the picture corresponding to the data which cannot be read for a case of video data having a 625/50 configuration taking as an example a case where trouble occurs in the second recording head among the four recording heads of the recording head unit shown in Fig. 4 when the track alternation by the SYNC and ID adding circuit shown in Fig. 2 is being carried out; Fig. 35 is a view of the video data recorded on the VTR tape by the recording head unit shown in Fig. 2; Figs. 36A and 36B are views of helical tracks of the VTR tape which cannot be read from and a part on the picture corresponding to the data which cannot be read for a case of video data having a 525/60 configuration taking as an example a case where trouble occurs in the second recording head among two recording heads of the recording head unit 20 when the track alternation by the SYNC and ID adding circuit shown in Fig. 2 is not carried out; Figs. 37A and 37B are views of helical tracks of the VTR tape which cannot be read from and a part on the picture corresponding to the data which cannot be read for a case of video data having a 625/50 configuration taking as an example a case where trouble occurs in the second recording head among two recording heads of the recording head unit 20 when the track alternation by the SYNC and ID adding circuit shown in Fig. 2 is not carried out; Figs. 38A and 38B are views of helical tracks of the VTR tape which cannot be read from and a part on the picture corresponding to the data which cannot be read for a case of video data having a 525/60 configuration taking as an example a case where trouble occurs in the second recording head among two recording heads of the recording head unit when the track alternation by the SYNC and ID adding circuit shown in Fig. 2 is being carried out, and Figs. 39A and 39B are views of helical tracks of the VTR tape which cannot be read from and a part on the picture corresponding to the data which cannot be read for a case of video data having a 625/50 configuration taking as an example a case where trouble occurs in the second recording head among two recording heads of the recording head unit when the track alternation by the SYNC and ID adding circuit shown in Fig. 2 is being carried out. Below, an explanation will be made of a first embodiment of a video data recording and reproducing apparatus of the present invention. In the context of the specification, the term "a video data" means a video data (picture data) and/or an audio data therefor. Figure 1 is a view of the configuration of a video cassette recorder (VCR) apparatus 1 as the video data recording and reproducing apparatus. The VCR apparatus 1 is constituted by a recording unit 10, a recording head unit 20, a reproduction head unit 40, a reproduction unit 48, a control unit 60, a tape travelling system 62, and a drum rotation system 64. The recording unit 10 is constituted by a compressing and coding system 12, a recording system 14, and a memory circuit 18. The reproduction unit 48 is constituted by a reproduction system 50, a memory unit 56, and an expansion and decoding system 58. The VCR apparatus 1 compresses and codes the audio and video data input from an external video processing apparatus (not shown), for example, an audio and video data relaying apparatus and audio and video data editing apparatus, in units of a predetermined number of frames (GOP: group of pictures) by a compression and coding system such as an MPEG (motion picture experts group). Further, in the same way as the conventional VCR apparatus, the VCR apparatus 1 shuffles the video data, in particular, it shuffles and records it on the VTR tape 2 contained in a cassette half together with the noncompressed audio data so that even in a case where trouble such as head clogging occurs at part of the plurality of recording heads and reproduction heads (recording and reproduction heads), loss will not continuously occur at the same position in the reproduced image. Further, the reproduction system 50 of the VCR apparatus 1 reads the audio and video data recorded on the VTR tape 2 as mentioned above, reproduces the audio and video data of the time of recording, and outputs this to the external video processing apparatus. Figure 2 is a view of the configuration of the recording unit 10 shown in Fig. 1. The recording system 14 of the recording unit 10 is constituted by a pack circuit 140, a write address control circuit 142, a shuffling ROM circuit 144, an outer code encoder 146, an interleave ROM circuit 148, a read address control circuit 150, a SYNC and ID adding circuit 150, and an inner code encoder 154. Figure 3 is a view of the configuration of the reproduction unit 48 shown in Fig. 1. The reproduction system 50 of the reproduction unit 48 is constituted by an inner code decoder circuit 500, an ID detecting circuit 510, a non-tracking control circuit 512, an outer code decoder circuit 518, a deshuffling ROM circuit 520, a read address control circuit 522, and a depack circuit 524. The memory unit 56 of the reproduction unit 48 is constituted by a memory circuit 560 and a jog memory circuit 562. Figures 4A and 4B are views illustrating the configuration of the recording head unit 20 and the reproduction head unit 40 shown in Fig. 1 for a case of four heads. In Fig. 4A, the recording head unit 20 has four recording heads 200, 202, 204, and 206. In Fig. 4B, the reproduction head unit 40 is constituted by the reproduction heads 400, 402, 404, and 406. Each of the reproduction heads 400, 402, 404, and 406 is constituted by reproduction heads of a positive azimuth angle (positive azimuth reproduction heads) a 11 , a 12 (A 1 ), a 21 , a 22 (A 2 ), a 31 , a 32 (A 3 ), and a 41 , a 42 (A 4 ) arranged on the tape travelling surface of the rotation drum 30 at a distance of an amount of one helical track of the VTR tape 2 and reproduction heads of a negative azimuth angle (negative azimuth reproduction heads) b 11 , b 12 (B 1 ), b 21 ,b 22 (B 2 ), b 31 , b 32 (B 3 ), and b 41 , b 42 (B 4 ) arranged on the tape travelling surface of the rotation drum 30 at symmetrical positions relative to the positive azimuth reproduction heads with respect to the rotational axis of the rotation drum 30 at a distance of an amount of one helical track of the VTR tape 2 similar to the positive azimuth reproduction heads. Below, the component parts of the VCR apparatus 1 will be explained. The control unit 60 controls the component parts of the VCR apparatus 1 according to the operation data input via operation buttons or a terminal provided at the VCR apparatus 1 by the user of the VCR apparatus 1 etc. The tape travelling system 62 makes the VTR tape 2 travel according to the control of the control unit 60. The rotation drum system 64 rotates the rotation drum 30 according to the control of the control unit 60 to make the recording head unit 20 and the reproduction head unit 40 arranged on the rotation drum 30 scan the helical tracks of the VTR tape 2. Below, an explanation will be made of the component parts relating to the operation when the VCR apparatus 1 records the audio and video data on the VTR tape 2. The recording unit 10 compresses and codes the noncompressed video data (INPUT DATA VIDEO) input from the external video processing apparatus by the compressing and coding system, for example, the MPEG system, and records the same on the VTR tape 2 together with the noncompressed audio signal (INPUT DATA AUDIO). Figure 5 is a view of the method of dividing the video data when the compressing and coding system 12 shown in Fig. 1 and Fig. 2 compresses and codes the noncompressed video data. In Fig. 5, one picture contains 720 pixels in a scanning line direction, contains 512 lines in a vertical direction in the case of video data having a 525/60 configuration (structure), and contains 608 lines in the vertical direction in the case of video data having a 625/50 configuration. Also, one macroblock consists of 16 pixels x 16 lines. Therefore, one picture is divided into 45 x 32 macroblocks in the case of video data having the 525/60 configuration and is divided into 45 x 38 macroblocks in the case of video data having the 625/50 configuration. In the recording unit 10 (Fig. 1), the compressing and coding system 12 divides the input noncompressed video data into macroblocks consisting of 16 pixels x 16 lines as shown in Fig. 5 and performs orthogonal transformation such as DCT (discrete cosine transformation), predictive coding, quantization, and variable length coding with respect to these macroblocks to compress and code the same in unit of GOPs. Figures 6A to 6C are views of the compressed video data output from the compressing and coding system 12 shown in Fig. 1 to the recording system 14. In Fig. 6A, a GOP of compressed video data contains for example two frames of compressed video data, that is, an I-frame (intra picture frame) which is compressed and coded closed in the frame and can be expanded and decoded without use of data of another frame and a B-frame (bi-directional picture frame) which is compressed and coded so as to have a correlation with the frames before and after it and is expanded and decoded by using the expanded and decoded data of the frames before and after it. In Fig. 6B, the compressing and coding system 12 outputs the generated compressed video data to the pack circuit 140 (Fig. 2) of the recording system 14 as a bit train with the I-frame at the head and the B-frame, having a relatively long processing time in the component parts after this, behind it. The recording system 14 (Fig. 1 and Fig. 2) uses the memory circuit 18 to shuffle the compressed video data, assembles it into a predetermined recording format, adds an error correction code (outer code (OUTER ECC) and inner code (INNER ECC), also referred to together as a product code) to this, and records the same on the helical tracks of the VTR tape 2 via the recording head unit 20. In the recording system 14, the pack circuit 140 performs processing based on the GOP data input from the compressing and coding system 12, packs in units of recording blocks of a fixed length shown in Fig. 6C and Figs. 7A to 7D the compressed video data of the variable length input from the compressing and coding system 12, the noncompressed audio data, and the system auxiliary data input from the control unit 60, and stores the same in the memory circuit 18 according to the write addresses generated by the write address control circuit 142. Further, the pack circuit 140 demultiplexes the macroblock position data (macroblock number) which is contained in the compressed video data and indicates the position of each of the macroblocks on the picture (Fig. 5) and outputs the same to the write address control circuit 142. Figures 7A to 7D are views of the configuration of the recording block unit shown in Fig. 6C by which the VCR apparatus 15 shown in Fig. 2 multiplexes the compressed video data and noncompressed audio data. In Fig. 7A, the recording block unit has a 126-byte configuration comprising, from the head, the areas of a synchronization data area SYNC of 2 bytes, an identification data area ID of 4 bytes, a data area (DATA) of 108 bytes, and an inner code (INNER PARITY) area. In Fig. 7B, 64 compressed video data (I-frame and B-frame) recording blocks construct one ECC (error correction code) block containing the video data. The ECC block contains 50 recording block units in which compressed video data is multiplexed in the data area (DATA) and 14 recording block units containing the outer code (OUTER PARITY). Note that, where the compressed video data has a 625/50 configuration, one GOP worth of video data is contained in 36 ECC blocks, and where the compressed video data has a 525/60 configuration, one GOP worth of video data is contained in 30 ECC blocks In Fig. 7C, 14 noncompressed audio data recording blocks constitute one ECC block containing the noncompressed audio data corresponding to the one GOP worth of video data. The ECC block contains 6 recording block units in which the noncompressed audio data is multiplexed in the data area (DATA) and 8 recording block units containing the outer code (OUTER PARITY). Note that, where the compressed video data has a 625/50 configuration, one GOP worth of the audio data is contained in 12 ECC blocks, and where the compressed video data has a 525/60 configuration, one GPO worth of the audio data is contained in 10 ECC blocks. A maximum of 4 channels of audio data (CH1 to CH4) are contained in one GOP. Note that, the noncompressed audio data has a fixed length. The pack circuit 140 equally divides the noncompressed audio data into fixed lengths and packs the same in each recording block unit. In Fig. 7D, the system auxiliary data generated by the control unit 60 etc. is added for every GOP worth of the audio and video data. As the system auxiliary data, in the data area (DATA), non-tracking control data (NT control) of 30 bytes used at the non-tracking processing (explained later referring to Fig. 3) in the non-tracking control circuit 512 of the reproduction system 50 and two management data (frame 0 data, frame 1 data) each consisting of 39 bytes used for managing the VTR tape 2 by the user are contained for every frame worth of data from the head. Note that, the system auxiliary data does not have the outer code added to it unlike the recording block unit for the video data and the recording block unit for the audio data and does not adopt the configuration of an ECC block, but to ensure the reliability of the system auxiliary data, for every recording area of a GOP of the audio and video data of the VTR tape 2, 32 system auxiliary data are repeatedly written in the case where the compressed video data has a 625/50 configuration, while 24 system auxiliary data are repeatedly written in the case where the compressed video data has a 525/60 configuration. Here, further, in contrast to the fact that the compressed video data has a variable length for every macroblock, the recording block unit has a fixed length, therefore the one macroblock worth of compressed video data is not always contained in one recording block unit. There is sometimes leftover space in the recording block unit or one macroblock of the compressed video data sometimes cannot be completely contained in one recording block unit. On the other hand, if data error occurs in the middle of a recording block unit, the data after the part in that recording block where the data error occurs can no longer be reproduced. Further, the DC component and low frequency component of each macroblock have a great influence upon the quality of the image after reproduction. For this reason, the pack circuit 140 packs the components of the compressed video data of each macroblock in the order of the lower frequency from the head of the data area (DATA) of the ECC block shown in Fig. 7B. When the components of the compressed video data are contained in the data area (DATA) in the order of the lower frequency and recorded on the VTR tape 2 in this way, so long as the data error is not caused at the head of the data area of the recording block unit, the DC component of the compressed video data having the greatest influence on the quality of the reproduced image can be reproduced even in the worst case. Accordingly, by packing the compressed video data in the recording block unit by this method, a situation where the image of the macroblock in which a data error is caused cannot be reproduced at all can be prevented and the deterioration of quality of the reproduced image can be suppressed to the lowest extent. Further, when adopting this method, a similar effect is exhibited even in a case where the VCR apparatus 1 reproduces the audio and video data from the VTR tape 2 at a high speed and therefore all of the data of each recording block unit cannot be read. Figure 8 is a view of the ECC block stored in the memory circuit 18 shown in Fig. 1. Figure 9 is a view of the recording area of the memory circuit 18 shown in Fig. 1. The compressed video data packed in the recording block units Figs. 7A to 7D by the recording system 14 as mentioned above is stored in the memory circuit 18 as shown in Fig. 8 and Fig. 9. In the memory circuit 18, the video ECC block Fig. 7B is stored, for example, from the 00h (h: hexadecimal expression) address to the 240h address (2 bytes (16 bits) per address) of the memory circuit 18 as shown in Fig. 9. The audio ECC block (Fig. 7C) is stored from for example the 240h address to the 300h address of the memory circuit 18. Further, the system auxiliary data (Fig. 7D) is stored from for example the 200h address to the 340h address of the memory circuit 18. Further, the 340h address to the 3FFh address of the memory circuit 18 are used as spare areas for audio delay. The shuffling ROM circuit 144 stores the address (shuffling pattern) of the memory circuit 18 corresponding to each of the recording block units which the pack circuit 140 tries to store in the memory circuit 18 and outputs the same to the write address control circuit 142 according to the control of the write address control circuit 142. That is, the write address control circuit 142 generates write addresses indicating which number recording block units of the ECC block the recording block units output by the pack circuit 140 will become according to the shuffling pattern input from the shuffling ROM circuit 144 and performs shuffling with respect to the ECC block and the system auxiliary data Figs. 7A to 7D. Note that, in the VCR apparatus 1, since the size of the macroblock is for example 16 pixels x 16 lines and is a relatively large, a shuffling pattern is stored in the shuffling ROM circuit 144. The pattern is used for shuffling so that mutually adjoining macroblocks are simultaneously recorded on the VTR tape 2 and are recorded to be collected on the VTR tape 2 as well for example whenever the recording head unit 20 scans the VTR tape 2 one time. That is, in the VCR 1 apparatus, at the time of recording, the compressed video data corresponding to a wide area of the picture is recorded by one scan of the recording head unit 20 and the compressed video data corresponding to the wide area of the picture is read from the VTR tape 2 by one scan of the reproduction head unit 40. Here, an explanation will be made of the shuffling pattern stored in the shuffling ROM circuit 144. Figure 10 is a view of the recording format of the video data, the audio data, and the system auxiliary data on the VTR tape 2 shown in Fig. 1. Figure 11 is a view of the recording position on the VTR tape 2 of the video data, the audio data, and the system auxiliary data shown in Fig. 10. In Fig. 10, one GOP worth of the video data having a 525/60 configuration is recorded on 10 helical tracks of the VTR tape 2, while one GOP worth of the video data having a 625/50 configuration is recorded on 12 helical tracks of the VTR tape 2. In Fig. 11, one GOP worth of the audio and video data is divided, a half each, to an upper side area and a lower side area of the helical tracks of the VTR tape 2. The audio data is recorded at the center of the VTR tape 2, and the video data is recorded at the two sides of the audio data. In a VCR apparatus recording noncompressed video data on the VTR tape, the shuffling is carried out for every pixel or, in the in-field compressing and coding system, the shuffling processing is carried out for every relatively small macroblock of 8 x 4 pixels. When the shuffling is carried out for every pixel or for every relatively small macroblock, to improve the error correction ability, the shuffling pattern is determined so that the adjoining pixels or macroblock in the same image are recorded at positions on the VTR tape 2 as far away as possible. Even if the shuffling is perform with such a shuffling pattern, since the area of the unit of shuffling on the image is small, even if part of the video data is reproduced by high speed reproduction, due to the characteristics of human vision, the picture appears integrated, therefore the viewer could sufficiently recognize the contents of the image. However, if shuffling by a shuffling pattern so that large macroblocks of 16 x 16 pixels are recorded at positions as far away as possible on the VTR tape 2, the time interval between reproduction of the adjoining macroblocks on the image becomes large, the boundaries of the macroblocks are clearly recognized by the viewer, and the image does not appear integrated. Accordingly, in this case, the image becomes like a checkered flag in state divided into individual macroblocks and it becomes very hard for the viewer to view the image. To overcome such the disadvantage, in the VCR 1, the adjoining macroblocks on the same image are recorded at adjacent positions on the VTR tape 2 so that the video data of a wide area of the same image is recorded whenever the recording head unit 20 scans the VTR tape 2 one time and in addition the adjoining macroblocks on the VTR tape 2 are contained in different ECC blocks so that these macroblocks are corrected for error by respectively different error correction codes (inner codes and outer codes). On the other hand, as shown in Fig. 10 and Fig. 11, there is the limiting condition that one GOP worth of the audio and video data is recorded on 10 or 12 helical tracks and the sector for recording the video data is divided into two areas by the sector for recording the audio data. In view of this restriction, the system is designed so that where the speed of the multiple speed reproduction is low, video data contained in a large rectangle on the picture is reproduced, while where the speed is high, the video data contained in a small rectangle is reproduced. Referring to Fig. 12 to Fig. 18, the shuffling pattern stored in the shuffling ROM circuit 144 will be explained in further detail for the case of video data having a 525/60 configuration. Figure 12 is a view of the method of dividing a macroblock. As shown at the left side in Fig. 12, when dividing the video data into macroblocks of 16 x 16 pixels, 45 macroblocks are formed in the scanning line (horizontal) direction and 32 macroblocks are formed in the vertical direction (43 x 32 in total). These 45 x 32 macroblocks are divided into five in the horizontal direction and four in the vertical direction (5 x 4 in total) and therefore divided into shuffling blocks each containing nine macroblocks in the horizontal direction and eight macroblocks in the vertical direction (9 x 8 in total). Among these 20 shuffling blocks, the 10 shuffling blocks which become upper side in the image are assigned to the lower side area (Fig. 11) of the helical tracks 01h to 0Ah of the VTR tape 2, and the 10 shuffling blocks (half-tone picture part) which become the lower side are assigned to the upper side area of the helical tracks 01h to 0Ah of the VTR tape 2. Each of the thus divided shuffling blocks is further divided into six shuffling units containing three shuffling blocks in the horizontal direction and two shuffling blocks in the vertical direction (3 x 2 in total) and further divided into 12 units consisting of three shuffling blocks in the horizontal direction and four shuffling blocks in the vertical direction (3 x 4 in total). The order indicated by the dotted line is added to the macroblocks contained in the shuffling unit. This order indicates the order of the recording and reproduction of the macroblocks contained in each of the shuffling blocks with respect to the VTR tape 2. Figure 13 is a view of traces of the part of helical tracks (Fig. 4B) from which the reproduction head unit 40 can reproduce 50 percent or more of the data when the reproduction unit 48 performs the 2 times speed reproduction which is a double speed of the normal speed, 4 times speed reproduction, 7 times speed reproduction, 19 times speed reproduction, and 37 times speed reproduction. Note that, in Fig. 13, the trace a to the trace e are traces of one of the reproduction heads 400, 402, 404, and 406 (Fig. 4B) of the cases of 2 times speed reproduction, 4 times speed reproduction, 7 times speed reproduction, 19 times speed reproduction and 37 times speed reproduction, respectively. Figure 14 to Fig. 18 are views of the area of the image updated whenever the reproduction head unit 40 scans the VTR tape 2 one time when the reproduction head unit 48 shown in Fig. 1 performs 2 times speed reproduction, 4 times speed reproduction, 7 times speed reproduction, 19 times speed reproduction, and 37 times speed reproduction, respectively. As will be explained later in the explanation of the non-tracking control circuit 512 of the reproduction unit 48, the reproduction unit 48 reproduces the audio and video data from the VTR tape 2 by the non-tracking system, therefore it can reproduce the audio and video data recorded in parts scanned by any one of the reproduction heads 400, 402, 404, and 406 of the helical tracks. As indicated by the trace a of Fig. 13, the reproduction unit 48 of the VCR 1 can reproduce the audio and video data both from the upper side area and the lower side area of the scanned helical tracks at the time of 2 times speed reproduction and 4 times speed reproduction. When the reproduction head unit 40 reads the shuffled audio and video data from the scanned helical tracks as shown in Fig. 12, for example, the read video data corresponds to the rectangular parts of two shuffling blocks of the half-tone picture in Fig. 14A and Fig. 15A and therefore it is possible to read successive video data of a wide area on the image. On the other hand, when the reproduction head unit 40 reproduces audio and video data shuffled at random similar to the conventional case from the helical tracks, as shown in Fig. 14B and Fig. 15B, video data which is discontinuous on the picture and corresponds to small rectangular parts each having a small area are read out and therefore an unnatural feeling will be given to the viewer as mentioned above. When the VCR apparatus 1 operates as 7 times speed reproduction, and the reproduction unit 48 of the VCR apparatus 1 reads audio and video data which was shuffled as shown in Fig. 12 from the part of the trace c of Fig. 13, for example, the read video data can be reproduced as the video data corresponding to two rectangular areas each containing 9 x 4 macroblocks of the half-tone picture in Fig. 16A. On the other hand, when the reproduction head unit 40 reproduces audio and video data which was shuffled at random from the helical tracks, the discontinuous video data on the picture corresponding to the rectangular parts each having a small area will be read as shown in Fig. 16B. When VCR apparatus 1 operates as 19 times speed reproduction and the reproduction unit 48 of the VCR 1 reads the audio and video data which was shuffled as shown in Fig. 12 from the part of the trace d of Fig. 13, for example, the read video data can be reproduces as the video data corresponding to six rectangular areas each containing 3 x 4 macroblocks of the half-tone picture in Fig. 17A. On the other hand, when the reproduction head unit 40 reproduces the audio and video data shuffled at random from the helical tracks, the discontinuous video data on the picture corresponding to the rectangular parts each having a small area will be read as shown in Fig. 17B. When the VCR apparatus 1 operates as 37 times speed reproduction and the reproduction unit 48 of the VCR apparatus 1 reads the audio and video data which was shuffled as shown in Fig. 12 from the part of the trace e of Fig. 13, for example, the read video data can be reproduced the video data corresponding to 12 rectangular areas each containing 3 x 2 macroblocks of the half-tone picture in Fig. 18A. On the other hand, when the reproduction head unit 40 reproduces the audio and video data shuffled at random from the helical tracks, the discontinuous video data on the picture corresponding to the rectangular parts each having a small area will be read as shown in Fig. 18B. As explained above referring to Fig. 12 to Fig. 18, when the shuffling pattern shown in Fig. 12 is used, whenever the reproduction head unit 40 scans the helical tracks of the VTR tape 2 one time, video data corresponding to a wide rectangular area in which the image is continuous can be read out and it becomes easy for the view to recognize the contents of the image at the time of high speed reproduction. The write address control circuit 142 reads the shuffling pattern from the shuffling ROM circuit 144 based on the macroblock position data input from the pack circuit 140, generates the addresses of the memory circuit 18 at which the recording block units which the pack circuit 140 tries to store in the memory circuit 18 are to be written according to the read out shuffling pattern, and performs the shuffling. Note that while the explanation was made of video data having a 525/60 configuration, the shuffling pattern shown in Fig. 12 can be applied even when video data having a 625/50 configuration is shuffled. Further, the SYNC and ID adding circuit 152 (Fig. 2) performs the interleaving for the audio and video data which was shuffled and given the outer code and performs the track alternation as will be mentioned later. That is, the recording block units are assigned to helical tracks of the actual VTR tape 2 by the shuffling by the write address control circuit 142 and the interleaving and track alternation by the SYNC and ID adding circuit 152. The outer code encoder 146 (Fig. 2) reads the audio and video data from the video ECC blocks and audio ECC blocks (Figs. 7A to 7D) recorded in the memory circuit 18 and generates the outer codes from the compressed video data or audio data contained in each data area (DATA). Further, the outer code encoder 146 stores the generated outer codes together with the audio and video data at addresses corresponding to the data area (DATA) and outer code area of the memory circuit 18. The SYNC and ID adding circuit 152 is activated by the recording start signal (REC START) input from the control unit 60 and generates the synchronization data SYNC. Further, the SYNC and ID adding circuit 152 generates the identification data ID and outputs the same to the SYNC and ID adding circuit 150. Further, the SYNC and ID adding circuit 152 performs the interleaving and track alternation mentioned later referring to Fig. 30 to Fig. 34. Here, an explanation will be made of the identification data ID generated by the SYNC and ID adding circuit 152. Figures 19A to 19C are views of the contents of the identification data ID shown in Fig. 9. As shown in Fig. 10, one GOP worth of the ECC block and system auxiliary data (SYSTEM AUX) recorded in the memory circuit 18 is recorded on 10 helical tracks of the VTR tape 2 in the case of video data having a 525/60 configuration and is recorded on 12 helical tracks of the VTR tape 2 in the case of video data of a 625/50 configuration. In the identification data ID, a synchronization block (Sync Block) ID and track ID are contained (hereinafter, they will be also simply referred to as the identification data ID together). To each of the recording block units of the ECC blocks and system auxiliary data, as indicated by the arrow A in Fig. 10, a synchronization block ID of 8 bits shown in Fig. 19A is added, and as indicated by the arrow B in Fig. 10, a track ID is added within a range of 01h to 0Ch with respect to the audio and video data having a 625/50 format while a track ID is added within a range of from 01h to 0Ah with respect to the audio and video data of a 525/60 format. As shown in Fig. 19B, the sixth bit of the identification data ID of the ECC block (Fig. 7C) for the audio data is used for identification of the system auxiliary data and the audio (AUDIO) data, the fifth and fourth bits are used for the identification of the channels (CH1 to CH4) of the audio data, and the third bit is used for the identification of the upper side area and the lower side area of the helical tracks. Further, as shown in Fig. 19C, the seventh bit of the identification data ID of the video data ECC block is used for the identification of the upper and lower sectors. The interleave ROM circuit 148 (Fig. 2) stores the interleave pattern indicating which number recording block units of which ECC block (Figs. 7A to 7D) the identification data ID correspond and outputs the interleave pattern stored according to the control of the read address control circuit 150 to the read address control circuit 150. The read address control circuit 150 controls the interleave ROM circuit 148 to read the interleave pattern and generates the reading address of the memory circuit 18 at which the recording block unit of the ECC block corresponding to the input identification data ID is recorded based on the interleave pattern. The memory circuit 18 outputs the recording block unit (ECC block) stored at the reading address generated by the read address control circuit 150 to the SYNC and ID adding circuit 152. The SYNC and ID adding circuit 152 divides the input recording block units (ECC blocks) corresponding to the helical tracks of the VTR tape 2, adds the identification data ID, performs the interleaving, further performs the track alternation, and outputs the resultant data to the inner code encoder 154. Here, referring to Fig. 20 to Fig. 29, a detailed explanation will be made of the interleaving by the SYNC and ID adding circuit 152. Note that, as mentioned above, only after the shuffling by the write address control circuit 142 and the interleaving and the track alternation by the SYNC and ID adding circuit 152 are the recording block units (synchronization blocks: SYNC Block; Fig. 6) assigned to the helical tracks of the VTR tape 2. The interleaving in the SYNC and ID adding circuit 152 is processing for uniformly assigning the recording block units (synchronization blocks) contained in the 30 (in the case of a 525/60 configuration) or the 36 (in the case of a 625/50 configuration) video data ECC blocks per GOP and the recording block units contained in the 10 (in the case of a 525/60 configuration) or the 12 (in the case of 625/50 configuration) audio data ECC blocks per GOP to 10 (in the case of a 525/60 configuration) or 12 (in the case of a 625/50 configuration) helical tracks of VTR tape 2. One object of the interleaving by the SYNC and ID adding circuit 152 is the improvement of the quality of the reproduced image by dispersing the data error in a plurality of ECC blocks and thereby suppressing the error within a range not exceeding the error correction ability in each ECC block even where a burst-like data error is caused at the time of reproduction. Further, another object of the interleaving by the SYNC and ID adding circuit 152 is to avoid the problem of loss of the image concentrating at a narrow range of the image making interpolation impossible or the loss of the picture becoming remarkable even if data error is caused in a plurality of adjoining macroblocks on the VTR tape 2 by packing the adjoining macroblocks on the VTR tape 2 in respectively different ECC blocks and thereby enabling error correction by respectively different error correction codes since the adjoining macroblocks in the image are recorded at adjacent positions also on the VTR tape 2 due to the shuffling by the write address control circuit 142. As shown in Fig. 11, the outer codes (outer parity) of each ECC block are arranged at the two sides of each recording block unit (synchronization block) of the audio and video data. By arranging them in this way, where a tape skew occurs on the VTR tape 2, even in a case where the VTR tape 2 and the reproduction heads 400, 402, 404, and 406 (Fig. 4) do not sufficiently contact each other, the audio and video data can be read as much as possible. Further, by arranging the outer codes in this way, when editing audio data of for example a first channel (CH1), even in a case where the data of the other sector is erroneously overwritten, there is the advantage that the probability of loss of only the outer code is large, and the possibility that the main data is saved is high. A concrete interleave pattern will be illustrated in Fig. 20 to Fig. 29. Figure 20 to Fig. 23 are views illustrating the interleave pattern of video data for video data having a 525/60 configuration. Note that parts of the interleave pattern are shown in Fig. 20 to Fig. 23. The numerical values in the drawings show the synchronization block IDs (SYNC BLOCK ID) and track IDs added to the recording block units as will be mentioned later in the explanation of the SYNC and ID adding circuit 152, and the numbers of the ECC blocks (ECC Block ID) and the synchronization block numbers corresponding to the track IDs and the synchronization block IDs. Figure 24 to Fig. 27 are views illustrating the interleave pattern of video data for video data having 625/50 configuration. Note that parts of the interleave pattern are shown in Fig. 24 to Fig. 27. The numerical values show the synchronization block IDs (SYNC BLOCK ID) and track IDs added to the recording block units as will be mentioned later in the explanation of the SYNC and ID adding circuit 152, and the numbers of the ECC blocks (ECC Block ID) and the synchronization block numbers corresponding to the track IDs and the symchronization block IDs. Figure 28 and Fig. 29 are views of the interleave pattern of the audio data for the case of video data having a 525/60 configuration and video data having a 625/50 configuration, respectively. The interleave patterns shown in Fig. 22 to Fig. 29 are stored in the interleave ROM circuit 148. Here, the track alternation by the SYNC and ID adding circuit 152 will be explained in detail referring to Fig. 30 to Fig. 34. Figures 30A and 30B and Figs. 31A and 31B are views of the helical tracks of the VTR tape 2 which cannot be read from and the parts on the picture corresponding to the data which cannot be read taking as an example a case where trouble occurs in the second recording head 202 among the four recording heads 200, 202, 204, and 206 of the recording head unit 20 shown in Fig. 4A when the track alternation by the SYNC and ID adding circuit 152 shown in Fig. 2 is not carried out. Note that, Figs. 30A and 30B are views show the case of audio and video data having a 525/60 configuration; and Fig. 31 the case of audio and video data having a 625/50 configuration. The correspondence between the tracks and the parts on the picture is simplified for the convenience of the illustration. As shown in Fig. 30A, the helical tracks of the track numbers (Track Nos.) 01h, 05h, 09h, ... correspond to the recording head 200, the helical tracks of the track numbers 02h, 06h, 0Ah, ... correspond to the recording head 202, the helical tracks of the track numbers 03h, 07h, 01h, ... correspond to the recording head 204, and the helical tracks of the track numbers 04h, 08h, 02h, ... correspond to the recording head 206. Here, when trouble such as head clogging occurs in the recording head 202 among the four recording heads 200, 202, 204, and 206 of the recording head unit 20 and the audio and video data can no longer be written on the VTR tape 2 by the recording head 202, the audio and video data (track ID = 02h, 06h, 0Ah ...) of the helical tracks scanned by the recording head 202 can no longer be recorded. Here, as mentioned above, the write address control circuit 142 and the shuffling ROM circuit 144 of the VCR 1 perform the shuffling with respect to the compressed video data with a shuffling pattern so that the adjoining macroblocks on the picture collect together. The audio and video data (track ID = 02h, 06h, 0Ah ...) correspond to for example the parts 02h, 06h, 0Ah ... on the picture shown in Fig. 30(B). Accordingly, as shown in Fig. 30(B), the audio and video data corresponding to the parts 02h, 06h, and 0Ah on the picture will not be recorded on the VTR tape 2 when trouble occurs in the recording head 202. In next GOP, however, although the video data corresponding to the parts 04h and 08h on the picture cannot be recorded, the recording data corresponding to the parts 02h, 06h, and 0Ah on the picture are normally recorded by the recording head 206. As shown in Figs. 31A and 31B, as the effect of the trouble of the recording head 202, for audio and video data having a 626/50 configuration, since one GOP worth of video data is recorded on 12 helical tracks, so far as trouble occurs in the recording head 202, the video data corresponding to the parts 02h, 06h, and 0Ah on the picture will not be recorded on the VTR tape 2. Figures 32A to 32C are views of the method for interpolation of the lost video data. As shown in Fig. 30A and Fig. 31A, even in a case where the audio and video data are not recorded on specific helical tracks, when for example a shuffling pattern designed so that the pixels of the video data after the shuffling will become random is stored in the shuffling ROM circuit 144 (Fig. 2), it is possible to interpolate the data of the pixels lost at the time of reproduction using the data of the surrounding pixels. As mentioned above, however, a shuffling pattern shuffling the data so that the adjoining macroblocks gather is stored in the shuffling ROM circuit 144 in the first embodiment. If the video data of the specific helical tracks are not recorded, the video data corresponding to a wide area on the picture will be lost together at the time of reproduction. The video data lost in this way cannot be interpolated by using the data of pixels on the periphery at the time of reproduction as shown in Fig. 32A. In addition, the loss of the audio and video data shown in Fig. 31A occurs successively over GOPs, therefore, as shown in Fig. 32C, the data cannot be interpolated by processing putting parts of the previous picture in the missing portions as they are at the time of reproduction (freezing processing). Therefore, the SYNC and ID adding circuit 152 performs the track alternation shown in Figs. 33A and 33B and Figs. 34A and 34B to prevent the video data of the same part on the picture from being continuously lost and enable freezing processing (Fig. 32C) using the video data reproduced at a time as near as possible to the time of reproduction even in a case where head clogging occurs in the recording head 202. Figures 33A and 33B and Figs. 34A and 34B are views of the helical tracks of the VTR tape 2 which cannot be read from and the parts on the picture corresponding to the data which cannot be read taking as an example a case where trouble occurs in the second recording head 202 among the four recording heads 200, 202, 204, and 206 of the recording head unit 20 shown in Fig. 4 when the track alternation by the SYNC and ID adding circuit 152 shown in Fig. 2 is being carried out. Note that, Figs. 33A and 33B show the case of audio and video data having a 525/60 configuration; and Figs. 34A and 34B show the case of audio and video data having a 625/50 configuration. In Figs. 33A and 33B and Figs. 34A and 34B, the correspondence between the tracks and the parts on the picture has been simplified without changing the fundamental concept of the present invention. As shown in Fig. 33A and Fig. 34B, the SYNC and ID adding circuit 152 alternates the audio and video data for each GOP to be recorded on the helical tracks of the VTR tape 2 between adjoining helical tracks. That is, in the case of a normal GOP for which the track alternation shown in Fig. 33A and Fig. 34A is not carried out, the SYNC and ID adding circuit 152 adds the track IDs to individual audio and video data to be recorded on the helical tracks of the VTR tape 2 having the track numbers (Track No) 01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah (01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah, 0Bh, 0Ch) (the contents outside the parentheses indicate the case of the 525/60 configuration, and the contents inside the parentheses indicate the case of the 625/50 configuration, the same is true in the explanation of operation of the SYNC and ID adding circuit 152) in an order of 01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah (01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah, 0Bh, 0Ch) and outputs the same to the inner code encoder circuit 154. On the other hand, in the case of the alternated GOP for the track alternation shown in Fig. 33A and Fig. 34A, the SYNC and ID adding circuit 152 adds the track IDs of for example 02h, 01h, 04h, 03h, 06h, 05h, 08, 07h, 0Ah, 09h (02h, 01h, 04h, 03h, 06h, 05h, 08, 07h, 0Ah, 09h, 0Ch, 0Bh) to the individual audio and video data to be recorded on the helical tracks of the VTR tape 2 having the track numbers (Track No), for example, 01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah (01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah, 0Bh, 0Ch) and outputs the resultant audio and video data in this order to the inner code encoder circuit 154. That is, by the processing of the SYNC and ID adding circuit 152, the track IDs of the audio and video data recorded on the VTR tape 2 and the track numbers no longer coincide at every other GOP (10 helical tracks (12 helical tracks)). Accordingly, as shown in Figs. 34A and 34B, even in a case where the recording head 202 cannot record the data on the helical tracks of the track numbers 02h, 06h, and 0Ah of the VTR tape 2, the audio and video data having the track IDs of 02h, 06h, and 0Ah are recorded on the helical tracks of the VTR tape 2 having the track numbers 01h, 05h, and 09h at intervals of one GOP, and as shown in Fig. 34B, at the time of reproduction, the images of the parts 01h, 05h, and 09h and the parts 02h, 06h. and 0Ah of the picture are alternately reproduced at intervals of one GOP. Accordingly, at the time of reproduction, by alternately performing the freezing processing (Fig. 32C) with respect to the parts 01h, 05h, and 09h and the parts 02h, 06h, and 0Ah of the picture, the image can be interpolated. Note that, even in the case shown in Figs. 33A and 33B, the data which becomes unable to be recording changes for every GOP, and therefore the image can be interpolated by performing the freezing processing. In comparison with a case where the track alternation shown in Figs. 30A and 30B and Figs. 31A and 31B is not carried out and the image of a specific part of the picture cannot be recorded at all, when the track alternation shown in Figs. 33A and 33B and Figs. 34A and 34B is carried out, the video data corresponding to all GOPs on the picture can be recorded on the VTR tape 2 at intervals of at least one GOP. Accordingly, when the track alternation is carried out, even in a case where trouble occurs in the recording head 202, interpolation by the freezing processing is possible and the quality of the reproduced picture is improved as a whole. The effect of improvement of quality of the reproduced picture at the time of occurrence of trouble by the track alternation explained above is similarly exhibited also in cases where trouble occurs in the recording heads 200, 204, and 206 other than the recording head 202. The inner code encoder circuit 154 generates 12 bits of inner code (Figs. 7A to 7C) from the audio and video data and system auxiliary data input from the SYNC and ID adding circuit 152, adds the generated inner code to the audio and video data as shown in Fig. 8, and outputs the same to the recording head unit 20. Figure 35 is a view of the video data recorded on the VTR tape 2 by the recording head unit 20 shown in Fig. 2. The recording head unit 20 records the audio and video data input from the inner code encoder circuit 154 on the helical tracks of the VTR tape 2. The recording positions of the macroblocks A, B, and C (Fig. 8) contained in the video data ECC stored in the memory circuit 18 from the component parts of the recording unit 10 become the positions A, B, and C in for example Fig. 35. In the picture shown in Fig. 5, the macroblocks A and B are adjacent to each other, but the macroblock C is located at a position away from the macroblocks A and B. Accordingly, as shown in Fig. 35, the macroblocks A and B are recorded at the adjacent positions on the VTR tape 2, and the macroblock C is recorded at a position away from the macroblocks A and B on the VTR tape 2. Note, the macroblocks A and B are distributed to different ECC blocks to improve the reliability with respect to the data error generated in a burst manner. Below, an explanation will be made of the component parts involved in the operation when the VCR apparatus 1 reproduces the audio and video data from the VTR tape 2. Each of the reproduction heads 400, 402, 404, and 406 of the reproduction head unit 40 (Fig. 4B) scans the helical tracks (Fig. 35) of the VTR tape 2, reproduces the audio and video data and the system auxiliary data ((PB DATA) Fig. 3; below, this will be also simply referred to as the audio and video data), and outputs the same to the inner code decoder circuit 500. In the reproduction system 50 of the reproduction unit 48 (Fig. 1, Fig. 3), the inner code decoder circuit 500 detects the data error by using the inner code contained in each of the ECC blocks (Figs. 7A to 7D) of the audio and video data input from each of the reproduction heads 400, 402, 404, and 406 and corrects the data error. When data error which cannot be corrected is caused in the audio and video data from each of the reproduction heads 400, 402, 404, and 406, the error flag is activated for every audio and video data in which the data error is caused and is output to the non-tracking control circuit 512. The ID detecting circuit 510 demultiplexes the identification data ID (Fig. 9 and Fig. 10) from the ECC block of the audio and video data input from the inner code decoder circuit 500, outputs the same to the write address control circuit 142, and outputs the audio and video data to the non-tracking control circuit 512. The non-tracking control circuit 512 performs the non-tracking control by using the system auxiliary data. That is, the non-tracking control circuit 512 selects the audio and video data having the lowest data error rate detected in the inner code decoder circuit 500 and outputs the same to the memory circuit 560. Here, an explanation will be made of the non-tracking control. On the VTR tape 2, the audio and video data is recorded by alternately inverting the azimuth angle of the adjoining helical tracks. In this way, when the azimuth angle is alternately inverted for every helical track, even if the helical tracks having different azimuth angles are traced by one of the reproduction heads 400, 402, 404, and 406 of the reproduction head unit 40, the recorded audio and video data cannot be reproduced. Further, even in a case where one or more of the reproduction heads among the reproduction heads 400, 402, 404, and 406 traces the helical tracks of the same azimuth angle, where the helical tracks are not correctly traced, a large amount of error is caused in the reproduced audio and video data. In the non-tracking control, this property regarding the azimuth angle of the reproduction heads and the helical tracks at the reproduction of the audio and video data is positively utilized. That is, as shown in Fig. 4B, the reproduction heads 400, 402, 404, and 406 include two positive azimuth heads and two negative azimuth heads at one helical track worth of intervals. The audio and video data read by the reproduction head among the four reproduction heads of the reproduction heads 400, 402, 404, and 406, in which the helical track and the azimuth angle coincide and which correctly traced the helical track, that is, the audio and video data in which the error rate becomes the lowest, is selected and output. By adoption of the non-tracking system, the conditions for the tracking control of the reproduction head with respect to the helical tracks of the VCR apparatus 1 are greatly eased. The deinterleave ROM circuit 516 corresponds to the interleave ROM circuit 148 of the recording unit 10, stores the deinterleave pattern for returning the audio and video data interleaved by the SYNC and ID adding circuit 152 (Fig. 2) to the arrangement before the interleave, and outputs the stored interleave data to the write address control circuit 514 under the control of the write address control circuit 514. The write address control circuit 514 controls the deinterleave ROM circuit 516 according to the identification data ID demultiplexed by the ID detecting circuit 510, reads the deinterleave pattern, generates the writing address of the audio and video data output by the non-tracking control circuit 512 based on the read deinterleave pattern, and makes the memory circuit 560 record the audio and video data output from the non-tracking control circuit 512 therein. By such a method, the write address control circuit 514 performs the deinterleaving for the audio and video data output by the SYNC and ID adding circuit 152 and returns the arrangement to that before the interleave. The audio and video data output from the non-tracking control circuit 512 is stored at the addresses of the memory circuit 560 generated by the inner code encoder circuit 154 and returned in arrangement to the same as the ECC blocks (Figs. 7A to 7D) of the original audio and video data. In this way, the audio and video data subjected to the track alternation is rearranged based on the identification data ID inserted at the time of recording, whereby the arrangement can be returned to the original one by exactly the same processing as that for the audio and video data for which the track alternation was not carried out. Further, the non-tracking control circuit 512 rearranges the ECC blocks returned to the original arrangement to the arrangement suited to the error correction using the outer code in the outer code decoder circuit 518 and outputs the result to the outer code decoder circuit 518. The outer code decoder circuit 518 corrects the error of the audio and video data by using the outer code contained in the ECC blocks of the audio and video data input from the non-tracking control circuit 512 and outputs the result to the jog memory circuit 562. The deshuffling ROM circuit 520 corresponds to the shuffling ROM circuit 144 of the recording unit 10, stores the deshuffling data for returning to the original arrangement the audio and video data which was shuffled by the write address control circuit 142 in the recording unit 10 and changed in arrangement, and outputs the deshuffling data to the read address control circuit 522 under the control of the read address control circuit 522. The read address control circuit 522 controls the deshuffling ROM circuit 520 based on the identification data ID of the audio and video data for which the depack circuit 524 requests the reading and makes this generate the deshuffling data, generates the reading address for returning the audio and video data stored in the jog memory circuit 562 to the arrangement at the time of the recording based on the deshuffling data generated by the deshuffling ROM circuit 520, and outputs the same to the jog memory circuit 562. Note that, the read address control circuit 522 generates the reading address for realizing special reproduction and outputs the same to the jog memory circuit 562 where a special reproduction, for example, jog shuttle reproduction, is to be carried out. The jog memory circuit 562 outputs the audio and video data stored at the reading address input to the depack circuit 524 in the arrangement at the time of the recording. The depack circuit 524 demultiplexes the audio data (OUTPUT AUDIO) from the recording block units of the audio and video data input from the jog memory circuit 562 and outputs the same to the external video processing apparatus corresponding to the pack circuit 140 of the recording unit 10, demultiplexes the video data and outputs the same to the expansion and decoding system 58, and further demultiplexes the system auxiliary data and outputs the same to the control unit 60. The expansion and decoding system 58 performs the expansion and decoding corresponding to the compressing and coding method in the compressing and coding system 12 (Fig. 2) with respect to the video data input from the depack circuit 524 and outputs the video data (OUTPUT VIDEO) corresponding to the original video data (INPUT VIDEO; Fig. 2) to the external video processing apparatus. Note that, where an error which cannot be corrected is caused in the input video data, the expansion and decoding system 58 performs interpolation by using the pixels on the periphery shown in Fig. 32A or interpolation by the freezing processing shown in Fig. 32C in accordance with the range where the error is caused and thereby corrects the loss of the image due to the head clogging or the like. Below, the operation of the VCR apparatus 1 at the time of recording will be explained. The compressing and coding system 12 (Fig. 2) divides the noncompressed video data input from the outside into macroblocks (Fig. 5) consisting of 16 pixels x 16 lines and compresses and codes the same. It thereby generates compressed video data (Figs. 6A to 6C) in which one GOP is comprised by 2 frames (I-frame, B-frame). In the recording system 14 (Fig. 1), the pack circuit 140 (Fig. 2) packs the compressed video data input from the compressing and coding system 12 and the noncompressed audio data input from the external portion in the recording block units (Fig. 6C) and stores the same in the memory circuit 18 in the form of the ECC blocks (Figs. 7A to 7D). At this time, by storing the audio and video data at the writing address of the memory circuit 18 generated by the write address control circuit 142, shuffling is applied to the audio and video data. The outer code encoder 146 reads the audio and video data contained in the ECC blocks (Figs. 7A to 7D) from the memory circuit 18, generates the outer codes, adds the generated outer codes to the audio and video data. and stores the result in the memory circuit 18. The SYNC and ID adding circuit 152 divides the audio and video data to which the outer codes are added corresponding to the helical tracks of the VTR tape 2 and adds the synchronization data SYNC and the track IDs (Fig. 9, Fig. 10) and, at the same time, performs the interleaving and the track alternation (Figs. 33A and 33B and Figs. 34A and 34B). The inner code encoder circuit 154 generates the inner codes (Figs. 7A to 7D) for the audio and video data for which the interleaving and the track alternation are carried out, adds the generated inner codes to the audio and video data, and outputs the resultant data to the recording head unit 20. The recording head unit 20 records the audio and video data to which the inner codes are added on the helical tracks (Fig. 35) of the VTR tape 2. Below, an explanation will be made of the operation of the VCR apparatus 1 at the time of reproduction. Each of the reproduction heads 400, 402, 404, and 406 (Fig. 4B) of the reproduction head unit 40 reproduces the audio and video data from the VTR tape 2. The inner code decoder circuit 500 detects the data error by using the inner codes contained in the audio and video data reproduced by each of the reproduction heads 400, 402, 404, and 406 and corrects the data error. Further, the inner code decoder circuit 500 activates the error flag where a data error which cannot be corrected is caused in the audio and video data. The ID detecting circuit 510 demultiplexes the identification data ID (Fig. 9, Fig. 10) from the ECC block of the audio and video data, outputs the same to the write address control circuit 514, and outputs the audio and video data to the non-tracking control circuit 512. The non-tracking control circuit 512 performs the non-tracking control by using the system auxiliary data, that is, the non-tracking control circuit 512 selects the audio and video data detected at the inner code decoder circuit 500 in which the data error rate is the lowest and outputs the same. The deinterleave ROM circuit 516 and the write address control circuit 514 perform the processing corresponding to the interleaving, that is, the processing for returning the audio and video data to the original arrangement (deinterleave) based on the identification data ID detected by the ID detecting circuit 510. The outer code decoder circuit 518 corrects the error of the audio and video data by using the outer code with respect to the audio and video data returned to the original order and makes the jog memory circuit 562 to store the same. The deshuffling ROM circuit 520 and the read address control circuit 522 generates the reading address for returning the arrangement of the audio and video data stored in the jog memory circuit 562 to the arrangement at the time of recording based on the identification data ID of the audio and video data for which the depack circuit 524 requests the reading and outputs the same to the jog memory circuit 562. Further, the read address control circuit 522 generates the reading address for special reproduction such as jog shuttle reproduction in accordance with the request of the control unit 60. The depack circuit 524 demultiplexes the audio data (OUTPUT AUDIO) from the audio and video data output by the jog memory circuit 562 and outputs the same to the external video processing apparatus and demultiplexes the video data and outputs the same to the expansion and decoding system 58. Further, the depack circuit 524 demultiplexes the system auxiliary data and outputs the same to the control unit 60. The expansion and decoding system 58 performs the expansion and decoding processing for the compressed video data by the compressing and coding method corresponding to the compressing and coding system 12 (Fig. 2) and outputs the video data (OUTPUT VIDEO) to the external video processing apparatus. Further, the expansion and decoding system 58 performs the interpolation (Figs. 32A and 32C) of the video data according to need to corrects the loss of the image. As explained above, according to the VCR apparatus 1, even if the compression and coding are carried out by using relatively large macroblocks and the video data recorded on the VTR tape 2 is reproduced at a high speed, the reproduced input does not become unnatural, the recognition of the contents becomes easy, and in addition the ability to correct error in the audio and video data is not lowered. Further, even in a case where head clogging occurs in a recording head or a reproduction head, the quality of the reproduced image is not deteriorated much. In addition, irrespective of the fact that such an effect can be obtained, there is almost no hardware which should be added in comparison with the conventional VCR. Further, in the first embodiment, the explanation was made of a case where trouble occurred in the recording head unit 20, but even in a case where trouble occurs in the reproduction head unit 40, a similar effect can be obtained according to the VCR 1. Note that, the numbers of heads of the recording head unit 20 and the reproduction head unit 40 were examples. It is satisfactory so far as each of the recording head unit 20 and the reproduction head unit 40 has at least two heads. Further, the track alternation shown in Figs. 33A and 33B and Figs. 34A and 34B is an example. It is also possible to perform the track alternation by another pattern. Further, the shuffling pattern and interleave pattern recorded in the shuffling ROM circuit 144 and the interleave ROM circuit 148 are examples. These can be changed to other patterns having an equivalent effect. Further, the configuration of the VCR apparatus 1 is an example. So far as the required functions and performance can be secured, there is no problem if the component parts are constituted in terms of hardware or constituted in terms of software. Below, another embodiment of the present invention will be explained. In this embodiment, the explanation will be made of track alternation in a case where each of the recording head unit 20 and the reproduction head unit 40 of the VCR apparatus 1 has two heads. In this embodiment, the recording head unit 20 has only two recording heads 200 and 204 (Fig. 4A), and the reproduction head unit 40 has two reproduction heads 400 and 404. Figures 36A and 36B and Figs. 37A and 37B are views of the helical tracks of the VTR tape 2 which cannot be read from and the parts on the picture corresponding to the data which cannot be read taking as an example a case where trouble occurs in the second recording head 204 among the two recording heads 200 and 204 of the recording head unit 20 shown in Fig. 4A when the track alternation by the SYNC and ID adding circuit 152 shown in Fig. 2 is not carried out. Note that, Figs. 36A and 36B show the case of the audio and video data having a 525/60 configuration; and Figs. 37A and 37B show the case of the audio and video data having a 625/50 configuration. The correspondence between the tracks and the parts on the picture is simplified for convenience of illustration. In Fig. 36A, the helical tracks of the track numbers (Track No.) 01h, 03h, 05h, ... correspond to the recording head 200, and the helical tracks of the track numbers 02h, 04h, 06h, ... correspond to the recording head 204. Here, when trouble such as head clogging occurs in the recording head 204 among the two recording heads 200 and 204 of the recording head unit 20 and the recording head 204 cannot write the audio and video data on the VTR tape 2, the audio and video data (track ID = 02h, 04h, 06h ...) of the helical tracks scanned by the recording head 204 can no longer be recorded. Here, as mentioned in the first embodiment, the write address control circuit 142 and the shuffling ROM circuit 144 of the VCR apparatus 1 perform shuffling with respect to the compressed video data with a shuffling pattern designed so that the adjoining macroblocks on the picture gather, and the audio and video data (track ID = 02h, 04h, 06h ...) correspond to for example the parts 02h, 06h, 0Ah ... on the picture shown in Fig. 36B. Accordingly, the audio and video data corresponding to the parts 02h, 04h, 06h, 08h, and 0Ah on the picture will not be recorded on the VTR tape 2 so long as trouble occurs in the recording head 204. As shown in Figs. 37A and 37B, regarding the effect of the trouble of the recording head 204, a similar effect is exerted concerning the audio and video data having a 626/50 configuration. Figures 38A and 38B and Figs. 39A and 39B are views of the helical tracks of the VTR tape 2 which cannot be read from and the parts of the picture corresponding to the data which cannot be read taking as an example a case where trouble occurs in the second recording head 204 among the two recording heads 200 and 204 of the recording head unit 20 shown in Fig. 4 when the track alternation by the SYNC and ID adding circuit 152 shown in Fig. 2 is being carried out. Note that, Figs. 38A and 38B show the case of audio and video data having a 525/60 configuration; and Fig. 39 shows the case of audio and video data having a 625/50 configuration. In Figs. 38A and 38B and Figs. 39A and 39B, the correspondence between the tracks and the parts on the picture has been simplified without changing fundamental concept. As shown in Figs. 38A and Fig. 39B, the SYNC and ID adding circuit 152 alternates the audio and video data to be recorded for each one GOP on each of the helical tracks of the VTR tape 2 between the adjoining helical tracks. That is, in the case of a normal GOP for which the track alternation shown in Fig. 38A and Fig. 39A is not carried out, the SYNC and ID adding circuit 152 adds the track IDs to the individual audio and video data to be recorded on the helical tracks of the VTR tape 2 having the track numbers (Track No) 01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah (01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah, 0Bh, 0Ch) (the contents outside the parentheses indicate the case of a 525/60 configuration, and the contents inside the parentheseses indicate the case of a 625/50 configuration, this same is true in the explanation of operation of the SYNC and ID adding circuit 152) in the order of 01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah (01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah, 0Bh, 0Ch) and outputs the same to the inner code encoder circuit 154. On the other hand, in the case of the alternated GOP for the track alternation shown in Fig. 38A and Fig. 39A, the SYNC and ID adding circuit 152 adds the track IDs of for example 02h, 01h, 04h, 03h, 06h, 05h, 08, 07h, 0Ah, 09h (02h, 01h, 04h, 03h, 06h, 05h, 08, 07h, 0Ah, 09h, 0Ch, 0Bh) to the individual audio and video data to be recorded on the helical tracks of the VTR tape 2 having the track numbers (Track No) of, for example, 01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah (01h, 02h, 03h, 04h, 05h, 06h, 07h, 08h, 09h, 0Ah, 0Bh, 0Ch) and outputs the resultant data in this order to the inner code encoder circuit 154. That is, by the processing of the SYNC and ID adding circuit 152, the track IDs of the audio and video data recorded on the VTR tape 2 and the track numbers no longer coincide for every other GOP (10 helical tracks (12 helical tracks)). Accordingly, even in a case where the recording head 204 cannot record the data on the helical tracks of the track numbers 02h, 04h, 06h, ... of the VTR tape 2, all audio and video data are recorded on the helical tracks of the VTR tape 2 having the track numbers 01h, 05h, and 09h at intervals of one GOP, and as shown in Fig. 38B and Fig. 39B, at the time of reproduction, the images of the parts 01h, 03h, 05h, ..., 0Bh and the parts 02h, 04h, 06h, ..., 0Ch of the picture are alternately reproduced at intervals of one GOP. Accordingly, at the time of reproduction, by alternately performing the freezing processing (Fig. 32C) with respect to the parts 01h, 03h, 05h, ..., 0Bh and the parts 02h, 04h, 06h, ..., 0Ch of the picture, the image can be interpolated. In comparison with a case where the track alternation shown in Figs. 36A and 36B and Figs. 37A and 37B is not carried out and the image of a specific part of the picture cannot be recorded at all, when the track alternation shown in Figs. 38A and 38B and Figs. 39A and 39B is carried out, the video data corresponding to all GOPs of the picture can be recorded on the VTR tape 2 at intervals of at least one GOP. Accordingly, when the track alternation is carried out, even in a case where trouble occurs in the recording head 204, interpolation by the freezing processing is possible and the quality of the reproduced picture is improved as a whole. Note that, even in a case where trouble occurs in the recording head 200, a similar effect can be obtained by the track alternation shown in the second embodiment. Further, the same modifications shown in the first embodiment are possible for a VCR apparatus 1 to which the track alternation shown in the second embodiment is applied. As explained above, according to the video data recording and reproducing apparatus such as the VCR apparatus, even in a case where the video data is compressed and coded and recorded on the VTR tape by using large macroblocks each consisting of 16 x 16 pixels and further is reproduced at a high speed for display, a reproduced input which is natural and easy to view can be obtained. Also, according to embodiments of the present invention, even in a case where clogging is caused in the recording/reproduction heads, loss will not be continuously caused at the same position of the image obtained by reproducing the video data from the VTR tape. Further, according to embodiments of the present invention, no matter which shuffling pattern is used to shuffle the video data to be reproduced from the VTR tape, loss will not be continuously caused at the same position of the image. According to embodiments of the present invention, even in a case where clogging is caused in the recording/reproduction heads of the rotation heads, inter-frame interpolation can be easily carried out and the quality of the reproduced image will not be largely deteriorated. In summary, embodiments of the invention relate to a video data processing method, a video data processing apparatus, and a video data recording and reproducing apparatus, in which a video signal is compressed and encoded on a relatively large macroblock and displayed so that, when reproducing the video data recorded on a video tape, the content of the reproduction video can be easily recognized even if when a high speed reproduction or when data error is occurred.

Claims: A method of processing video data compressed in units of macroblocks, including the steps of: displaying a video data block containing at least one frame of video data in which an error is continuously occurred in a same portion, on a screen; and shuffling the video data block by changing a shuffling pattern for each video data block so that portions in which the error is continuously caused will not superimpose on each other on the screen; the step of shuffling the video data block comprising: dividing each video data block into a plurality of shuffling blocks, each shuffling block comprising a plurality of adjoining macroblocks, the macroblocks comprising video data to be displayed on one area of the screen; and changing the order of the plurality of shuffling blocks. A video data processing apparatus for processing video data compressed in units of marcroblocks comprising: a shuffling means (142, 144, 148, 152) for performing shuffling for each of a plurality of video data blocks containing one or more frames of video data by changing a shuffling pattern for each video data block so that portions in which an error is continuously caused will not superimpose on each other on a screen, said shuffling means comprising; a video data dividing means (142, 144) for dividing each of the plurality of video data blocks into a predetermined plurality of shuffling blocks, each shuffling block comprising a plurality of adjoining macroblocks, the marcoblocks comprising video data to be displayed on one area of the screen; an identification code adding means (152) for adding an identification code indicating the order of each of the plurality of shuffling blocks to each of the shuffling blocks; and an order changing means (148, 150) for changing the order of the plurality of shuffling blocks added with the identification codes for each of the video data blocks. A video data processing apparatus according to claim 2 comprising; a recording means (20) for recording the plurality of shuffling blocks changed in order in a plurality of recording areas of a predetermined recording medium. A video data processing apparatus as set forth in claim 3, wherein the recording means (20) has a plurality of recording heads (200, 202, 204, 206) for recording each of the plurality of shuffling blocks by sequentially accessing each of the plurality of recording areas of the recording medium in a predetermined order. A video data recording and reproducing apparatus comprising a video processing apparatus as set forth in claim 4, and further comprising: a reproducing means (40) for reproducing the plurality of shuffling blocks from each of the plurality of recording areas of the recording medium and an order restoring means (514, 516, 520) for restoring the order of the plurality of shuffling blocks to the order before the change based on the identification code contained in each of the reproduced plurality of shuffling blocks. A video data recording and reproducing apparatus as set forth in claim 5, wherein: the recording means (20) has a plurality of the recording heads (200, 204) for recording each of the plurality of shuffling blocks by sequentially accessing each of the plurality of recording areas of the recording medium in a predetermined order.

Inventors: KATAGIRI TADASHI, SUGIYAMA AKIRA, YAMAMOTO KATSUYA, KATAGIRI, TADASHI, SUGIYAMA, AKIRA, YAMAMOTO, KATSUYA, KATAGIRI, TADASHI, C/O INTELL. PROP. DEP., SUGIYAMA, AKIRA, C/O INTELL. PROP. DEP., YAMAMOTO, KATSUYA, C/O INTELL. PROP. DEP.
Applicants: SONY CORP, SONY CORPORATION
Application year: 1996
Main classification: H04N9
IPC codes: H04N5