Apparatus and method of controlling driving selection of NTSC rejection filter

Abstract: An apparatus for controlling driving selection of an NTSC rejection filter includes an NTSC rejection filter (34) for rejection-filtering an NTSC signal component of a first input signal to output the filtered signal as a second input signal; first and second mean power level calculators (35, 43) for calculating the mean power level of the first and the second input signal of a field sync signal section; a first mean power difference calculator (39) for calculating the difference between a mean power level of the first input signal and a first reference mean power level of the field sync signal section in a preset 8-level input signal state; a second mean power difference calculator (47) for calculating the difference between a mean power level of the second input signal and a second reference mean power level of the field sync signal section in a preset 15-level input signal state; a driving selection determiner (52) for comparing the first and the second mean power differences to output a selection determination signal; and a selector for selecting the first or second input signal in response to the selection determination signal and outputting the selected input signal to an equalizer.

Description: The present invention relates to a receiving system related to an advanced TV (ATV) or a high definition TV (HDTV), and more particularly, though not exclusively, to an apparatus and method for controlling driving selection of an NTSC rejection filter (hereinafter, referred to as an NRF) to efficiently prevent the deterioration of an ATV broadcasting by NTSC signals when the ATV and the NTSC are concurrently broadcasting through a co-channel. Recently, as a transceiving system of the ATV which is for a next generation TV system, a GA-VSB (grand alliance-vestigial sideband) system is adopted. In this system, a concurrent broadcasting with the conventional NTSC system is under consideration. However, in such a case, an additional process relating the NRF must be provided to reduce the probable interference of a NTSC signal component with the ATV. The function of the NRF is efficiently to prevent the deterioration of the ATV broadcasting due to the interference of the NTSC signal component in a co-channel status in which the ATV and the NTSC are concurrently on air. The basic concept of the NRF is to remove the carrier components of the NTSC signals. The NRF driving has a merit in that the effect of the NTSC interference can be minimized. However, since a noise performance (S/N ratio) of the ATV system is reduced by 3dB, a determination to drive the NRF by searching the presence and strength of the interference of the NTSC signal component is required. Prior to the description of the necessity of NRF driving determination, the need for an NRF application in the GA-VSB system will be described to establish the clear understanding of the technical background. Then, a conventional determination method suggested for the NRF driving and its defects will be described. Referring to Figures 1A-1D showing the result of a GA-VSB simulation, the characteristic of the NTSC interference and the NRF result will be described. Figure 1A shows an NTSC signal; Figure 1B shows a modulated NTSC signal; Figure 1C shows the frequency spectrum of the modulated NTSC signal; and Figure 1D shows the frequency spectrum of the NRF result. The NTSC signal in the co-broadcasting of the NTSC and ATV has a particular carrier frequency offset (about 0.89MHz) with respect to the VSB signal. Thus, considering the VSB signal from the viewpoint of a baseband area, the NTSC signal appears to be modulated into a frequency as much as the frequency offset with respect to the VSB signal. That is, frequency-modulating of the color bar signal as shown in Figure 1A results in that in Figure 1B. Such NTSC signal comes to have the frequency characteristic as shown in Figure 1C and it can be seen that nearly entire energy (modulated carrier component) is concentrated on the frequency area of the particular frequency offset in view of the baseband of the VSB signal. Thus, the mere removing of the energy of the frequency area considerably reduces the interference of the NTSC signal component. That is, when the interfered NTSC signal component passes through the NRF, the modulated carrier component is removed as shown in Figure 1D (an energy value of 430 drops to 45 after passing) so that the affect of the NTSC signal with respect to the ATV signal is reduced. Next, the conventional NRF driving selection determination method suggested in the GA-VSB system will be described. The NRF driving selection determination method is disclosed in "Grand Alliance HDTV System Specification" submitted to the ACATS Technical Subgroup, Feb., 1994. The method utilizes a reference signal (field sync signal) and the structure thereof is shown in Figure 2. In Figure 2, a reference numeral 2 denotes an NTSC interference detector and a reference numeral 4 denotes an equalizer. The NTSC interference detector 2 is connected to a frequency & phase locked loop (FPLL) and the equalizer 4 is connected to a phase tracker loop (PTL). The NTSC interference detector 2 comprises a matched filter 10, first and second NRFs 12 and 16, first and second adders 18 and 24, first and second squaring circuits 20 and 26, first and second accumulators 22 and 28, an error power detector 30 and a multiplexer 14. To sum up the operation of the NTSC interference detector 2, a reference signal value stored in a receiver is subtracted from a received input signal value and the subtracted value is squared to accumulate. The accumulated value (an error value) is used for the determination of the NRF driving. In Figure 2, a signal B' output from the matched filter 10 is input to an input terminal 0 of the multiplexer 14. A signal A' which results from NTSC-reject-filtering the signal B' by the first NRF 12 is input to an input terminal 1 of the multiplexer 14. A first path constituted by the first adder 18, the first squaring circuit 20 and the first accumulator 22 is not the NRFed path and a second path constituted by the second adder 24, the second squaring circuit 26 and the second accumulator 28 is the path where the reference signal REF is NRFed. In the first path, difference between the input signal B' and the REF is output via the first adder 18 and the above output passes the first squaring circuit 20 and the first accumulator 22 to be squared and accumulated. Since the REF is a field sync signal, the output of the first adder 18 becomes an error value. At this time, the little difference between the input signal B' and the REF means that there are few errors, and otherwise, there are many errors. Thus, the output value B of the first accumulator 22 becomes an error power value. Next, in the second path, the difference between the signal A' which results from NRFing of the input signal B' by the first NRF 12 and a reference signal REF' which results from NRFing of the REF by the second NRF 16 is output via the second adder 24. The above output passes the second squaring circuit 26 and the second accumulator 28 to be squared and accumulated. Since the REF' is a field sync signal, the output of the second adder 24 becomes an NRFed error value. At this time, the little difference between the input signal A' and the REF' means that there are few NRFed errors, and otherwise, there are many NRFed errors. Thus, the output value A of the second accumulator 28 becomes an error power value. When the error power values A and B are applied to the error power detector 30, the error power detector 30 detects a degree of interference of the NTSC signal component on a channel by comparing the error power values B and A. As the NTSC signal component increases, the error power value B denotes a larger value than A since the value A is the NRFed error power value. The error power detector 30 controls the multiplexer 14 in selecting a signal of a path corresponding to the lower value by comparing the different error power values B and A. That is, when A>B, the error power detector 30 outputs "0" to a selection terminal S of the multiplexer 14 and the multiplexer 14 in response thereto selects and outputs the signal B' applied to the input terminal 0. When the signal B' is selected, the equalizer 4 acts as an 8-level equalizer. When A<B, the error power detector 30 outputs "1" to the selection terminal S of the multiplexer 14 and the multiplexer 14 in response thereto selects and outputs the signal A' applied to the input terminal 1. The output of the error power detector 30 is applied to the equalizer 4. When the multiplexer 14 selects the signal A', the equalizer 4 acts as a 15-level equalizer in response to the output of the error power detector 30. When the multiplexer 14 selects the signal B', the equalizer 4 acts as an 8-level equalizer in response to the output of the error power detector 30. The level equalizer 4 acting as a 15-level equalizer has a merit of removing the interfered NTSC signal component and a demerit of reducing noise performance (3dB). However, the level equalizer 4 acting as an 8-level equalizer has the complementary merit and demerit contrary to the 15-level equalizer. A reference numeral 6 in Figure 2 denotes a symbol timing restoring and field sync signal detector for applying a field sync signal to the equalizer 4. However, the above-described NRF driving selection determination method has the following problems. In a case of the conventional determination method suggested in the GA-VSB system, the interfered NTSC signal component is well detected to select the 15-level equalizer of the NRF driving when there is no multipath component in a signal. However, when there is the multipath component in a signal, the 8-level equalizer is tends to be selected although there exists the interfered NTSC signal component. This is because the error power value A applied to the error power detector 30 becomes larger than the B since the multipath component acts as noise in the signal. Thus, the interfered NTSC signal component is not NRFed. That is, the conventional determination method suggested in the GA-VSB system has a problem of malfunctioning in the presence of the multipath. It is an aim of preferred embodiments of the present invention to provide an apparatus and method for controlling the driving selection of the NRF to efficiently prevent the deterioration of the ATV broadcasting using NTSC signals in the co-channel where the ATV and NTSC are concurrently broadcasted. It is another aim of preferred embodiments of the present invention to provide an apparatus and method for preventing NRF driving malfunction in the presence of a multipath component in an input signal. It is still another aim of preferred embodiments of the present invention to provide an apparatus and method for efficiently driving the NRF through detecting the presence and degree of the interfered NTSC signal component. According to a first aspect of the present invention, there is provided an apparatus for controlling driving selection of an NTSC rejection filter comprising an NTSC rejection filter for rejection-filtering an NTSC signal component of a first input signal including an NTSC signal component and a multi path component to output the filtered signal as a second input signal; a first mean power level calculator for calculating the mean power level of the first input signal of a field sync signal section in response to a predetermined calculation section signal; a second mean power level calculator for calculating the mean power level of the second input signal of a field sync signal section in response to said predetermined calculation section signal; a first mean power difference calculator for calculating the difference between a mean power level of the first input signal and a first reference mean power level of the field sync signal section in a preset 8-level input signal state; a second mean power difference calculator for calculating the difference between a mean power level of the second input signal and a second reference mean power level of the field sync signal section in a preset 15-level input signal state; a driving selection determiner for comparing the first and second mean power differences for a predetermined period to output a selection determination signal; and a selector for selecting said first or second input signal in response to said selection determination signal and outputting the selected input signal to an equalizer. Suitably, said first reference mean power level of the field sync signal section in said preset 8-level input signal state is 25. Suitably, said second reference mean power level of the field sync signal section in said preset 15-level input signal state is 50. According to the present invention in a second aspect, there is provided and apparatus for controlling driving selection of an NTSC rejection filter comprising: an NTSC rejection filter for rejection-filtering an NTSC signal component of a first input signal including an NTSC signal component and a multipath component to output the filtered signal as a second input signal; a first mean power level calculator for calculating the mean power level of the first input signal of an arbitrary field section in response to a predetermined calculation section signal; a second mean power level calculator for calculating the mean power level of the second input signal of an arbitrary field section in response to said predetermined calculation section signal; a first mean power difference calculator for calculating the difference between a mean power level of the first input signal and a first reference mean power level of the arbitrary field section in a preset 8-level input signal state; a second mean power difference calculator for calculating the difference between a mean power level of the second input signal and a second reference mean power level of the arbitrary field section in a preset 15-level input signal state; a driving selection determiner for comparing the first and second mean power differences for a predetermined period to output a selection determination signal; and a selector for selecting said first or second input signal in response to said selection determination signal and outputting the selected input signal to an equalizer. Suitably, said first reference mean power level of the arbitrary field section in said preset 8-level input signal state is 21. Suitably, said second reference mean power level of the arbitrary field section in said preset 15-level input signal state is 21. According to the present invention in a third aspect, there is provided an apparatus for generating a control signal for selecting a first input signal which is not NTSC-rejection-filtered and a second input signal which is rejection-filtered by a rejection filter in order to control the driving selection of an NTSC rejection filter, said apparatus comprising: a comparing circuit or for comparing error values of said first input signal and said second input signal to output a comparison signal; a delay circuit comprised of a plurality of delayers for delaying the output of said comparing circuit by shifting in response to a predetermined clock; and a control signal generator for outputting a control signal of a first logic state when the respective output of the delayers of said delay circuit is all the first logic state and a control signal of a second logic state when the respective output of the delayers of said delay circuit is all the second logic state. Suitably, said control signal generator comprises: a first gate for outputting a first active signal when said outputs of delayers are all at said first logic state; a second gate for outputting a second active signal when said outputs of delayers are all at said second logic state; and a latch for outputting said first control signal in response to application of said first active signal and said second control signal in response to application of said second active signal. According to the present invention in a fourth aspect, there is provided a method for controlling driving selection of an NTSC rejection filter comprising the steps of: rejection-filtering an NTSC signal component of a first input signal including an NTSC signal component and a multipath component and outputting the filtered signal as a second input signal; calculating the mean power level of the first and the second input signals of a field sync signal section in response to a predetermined calculation section signal, respectively; calculating the difference between a mean power level of the first input signal and a first reference mean power level of the field sync signal section in a preset 8-level input signal state and calculating the difference between a mean power level of the second input signal and a second reference mean power level of the field sync signal section in a preset 15-level input signal state; comparing the first and second mean power differences for a predetermined period and outputting a selection determination signal; and selecting said first or the second input signal in response to said selection determination signal and outputting the selected input signal to an equalizer. According to the present invention in a fifth aspect, there is provided a method for controlling driving selection of an NTSC rejection filter comprising the steps of: rejection-filtering an NTSC signal component of a first input signal including an NTSC signal component and a multipath component and outputting the filtered signal as a second input signal; calculating the mean power level of the first and the second input signals of an arbitrary field section in response to a predetermined calculation section signal; calculating the difference between a mean power level of the first input signal and a first reference mean power level of the arbitrary field section in a preset 8-level input signal state and calculating the difference between a mean power level of the second input signal and a second reference mean power level of the arbitrary field section in a preset 15-level input signal state; comparing the first and second mean power differences for a predetermined period and outputting a selection determination signal; and selecting said first or second input signal in response to said selection determination signal and outputting the selected input signal to an equalizer. The present invention will be readily understood with reference to the following detailed description, by way of example only, taken in conjunction with the accompanying drawings; in which: Figure 1A is a graph indicating NTSC signals in a GA-VSB simulation; Figure 1B is a graph indicating modulated NTSC signals; Figure 1C is a graph indicating the frequency spectrum of the modulated NTSC signals; Figure 1D is a graph indicating the frequency spectrum of the NRF result; Figure 2 is a block diagram illustrating a conventional NTSC interference detector and an equalizer in the GA-VSB system; Figure 3 is a block diagram illustrating an NTSC interference detector according to the present invention; Figure 4 is a circuit diagram illustrating an NRF driving selection determiner of Figure 3; Figure 5 is a flowchart for explaining implementation of NRF driving selection control using a DSP; and Figures 6A-6B are graphs indicating the equalizing performance of 8-level and 15-level equalizers with respect to a multipath component among input signals. A preferred embodiment of the present invention will be fully discussed with reference to the accompanying drawings. Figure 3 shows the structure of an NTSC interference detector 32 according to the present invention. An NRF 34 is connected to the matched filter (10 of Figure 2) and for rejection-filtering an NTSC signal component in a first input signal including the NTSC signal component and a multipath component to output as a second input signal. A first mean power level calculator 35 constituted by a first squaring circuit 36 and a first accumulating & averaging circuit 38 for calculating the mean power level of the first input signal output from the matched filter 10 during a field sync signal section or a field section in response to an NTSC interference calculation section signal. A first mean power difference calculator 39 constituted by a first adder 40 and a first absolute value portion 42 for calculating difference between a first reference mean power level of a field sync signal section or a field section and a mean power level of the first input signal output from the first mean power level calculator 35 during a preset 15-/8-level input signal state. A second mean power level calculator 43 constituted by a second squaring circuit 44 and a second accumulating & averaging circuit 46 for calculating the mean power level of the second input signal output from the NRF 34 during a field sync signal section or a field section in response to the NTSC interference calculation section signal. A second mean power difference calculator 47 constituted by a second adder 48 and a second absolute value portion 50 for calculating the difference between a second reference mean power level of a field sync signal section or a filed section and a mean power level of the second input signal during a preset 15-/8-level input signal state. A driving selection determination portion 52 is for outputting a selection determination signal by comparing the first mean power difference calculated at the first mean power difference calculator 39 and the second mean power difference calculated at the second mean power difference calculator 47. A multiplexer 54 is for selecting the first input signal output from the matched filter 10 or the second input signal which is the first input signal passed through the NRF 34 in response to the selection determination signal applied from the driving selection determination portion 52 and outputting the selected signal to the equalizer 4. In detecting the interfered NTSC signal component, the determination method of the present invention is divided into a method using the field sync signal as a reference signal and another method using just random data as a reference signal and can be summarized into attachment of additional determination for controlling the NRF driving selection to increase discrimination under the circumstances of the multipath. Referring to Figure 3, the signal B' output from the matched filter 10 is input to the input terminal 0 of the multiplexer 54 and the signal A' which is the signal B' NRFed by the NRF 34 is input to the input terminal 1 of the multiplexer 54. Thus, it is preferable that the multiplexer 54 selects the input signal B' input to the input terminal 0 when a noise component such as the NTSC signal component is not present in the input signal, and otherwise, selects the signal A' input to the input terminal 1. When the multiplexer 54 selects the signal B', the equalizer 4 acts as an 8-level equalizer by a control signal CNT applied from the NRF driving selection determination portion 52. When the multiplexer 54 selects the A', the equalizer 4 acts as an 15-level equalizer by the control signal CNT applied from the NRF driving selection determination portion 52. It is apparent from Figures 6A and 6B that the equalizer 4 shows a superior equalizing function with respect to a common multipath component and strong NTSC interference when acting as a 15-level equalizer. Figure 6A shows a symbol error rate which indicates that the 15-level equalizer has less symbol error rate than the 8-level equalizer. Figure 6B shows that a value A obtained by an NRF process of an error power value of each field obtained for NRF driving selection is less than a value B which is obtained not through the above manner. Consequently, the 15-level equalizer is selected. In Figure 3, the first path constituted by the first mean power level calculator 35 and the first mean power difference calculator 47 is for calculating a mean power difference signal when the input signal is not NRFed. The second path constituted by the second mean power level calculator 43 and the second mean power difference calculator 47 is for calculating a mean power difference signal when the input signal is NRFed. On the first path, since the first mean power level calculator 35 calculates the mean power level of the input signal B' by performing multiplication at the first squaring circuit 36 and accumulative averaging at the first accumulating & averaging circuit 38. At this time, the NTSC interference calculation section signal is applied to the first accumulating & averaging circuit 38, and the signal is a reference signal for controlling the accumulative averaging of signals input during the field sync signal section or a field section. From the first mean power level calculated at the first mean power level calculator 35, a first reference mean power level RMP1 is subtracted at the first adder 40 of the first mean power difference calculator 39 and then made to be absolute at the first absolute value portion 42. The value of the first reference mean power level RMP1 varies according to whether the NTSC interference calculation section signal applied to the first accumulating & averaging circuit 38 is a signal corresponding to the field sync signal section or the signal during the field section. If the NTSC interference calculation section signal is a signal corresponding to the field sync signal section, the value of the first reference mean power level RMP1 becomes "25" because sample values of +5 and -5 only exist for the field sync signal section (when the input signal level is the 8-level). Thus, the mean value is obtained as follows. (+5) 2 + (-5) 2 2 = 25 If the NTSC interference calculation section signal is a signal corresponding to the arbitrary field signal section, the value of the first reference mean power level RMP1 becomes "21" because sample values of -7, -5, -3, -1, +1, +3, +5 and +7 exist for the arbitrary field section (when the input signal level is the 8-level). Thus, the mean of value is obtained as follows. (-7) 2 + (-5) 2 + (-3) 2 + (-1) 2 + (+1) 2 + (+3) 2 + (+5) 2 + (+7) 2 8 = 21 Thus, the first mean power difference signal B calculated at the first mean power difference calculator 39 is applied to the NRF driving selection determination portion 52. In the meantime, since the second mean power level calculator 43 on the second path calculates the mean power level of the input signal A' by performing multiplication at the second squaring circuit 34 and accumulative averaging at the second accumulating & averaging circuit 46. From the second mean power level calculated at the second mean power level calculator 43, a second reference mean power level RMP2 is subtracted at the second adder 48 of the second mean power difference calculator 47 and then made to be absolute at the second absolute value portion 50. The value of the second reference mean power level RMP2 varies according to whether the NTSC interference calculation section signal applied to the second accumulating & averaging circuit 43 is a signal corresponding to the field sync signal section or the signal during the arbitrary field section. If the NTSC interference calculation section signal is a signal corresponding to the field sync signal section, the value of the second reference mean power level RMP2 becomes "50", i.e. double the 8-level because sample values of +10, 0 and -10 only exist owing to the NRF for the field sync signal section (when the input signal level is the 15-level). If the NTSC interference calculation section signal is a signal corresponding to the arbitrary field signal section, the value of the second reference mean power level RMP2 becomes "42" because sample values of -14,-12, -10, -8, -6, -4, -2, 0, +2, +4, +6, +8, +10, +12 and +14 exist for the arbitrary field section (when the input signal level is the 15-level). Thus, the second mean power difference signal A calculated at the second mean power difference calculator 47 is applied to the NRF driving selection determination portion 52. Such values vary according to the change of the set level reference values, e.g., 5, -5, etc. The NRF driving selection determination portion 52 outputs a control signal CNT "0" at the initial stage so that the multiplexer 54 selects the first input signal B' not passing the NRF 34. Also, during operation, the NRF driving selection determination portion 52 compares the first and second mean power differences calculated at the first and second mean power difference calculators 39 and 47 and applies the CNT to the selection terminal of the multiplexer 54 if a state continues where the compared difference continues as much as n units. Since the CNT applied to not only the multiplexer 54 but also equalizer 4, it is used for determining the operation of the equalizer 4 as an 8-level equalizer or a 15-level equalizer. The structure of the NRF driving selection determination portion 52 can be realized by software using a DSP and by hardware of logic structure. Figure 4 shows the structure of the NRF driving selection determination portion 52 by hardware using logic structure. The NRF driving selection determination portion 52 comprises a comparator 60, n units of D-type flip-flops 60, 62, 64, 66 and 68 connected to the comparator 60 in serial, a NAND gate 70 for NAND-gating each output signal of the n units of D-type flip-flops 60, 62, 64, 66 and 68, an OR gate 72 for OR-gating respective output signal and reset signal Reset output from the n units of D-type flip-flops 60, 62, 64, 66 and 68, an AND gate 74 for AND gating the output and reset signal of the OR gate 72, and D-type flip-flop 76 where the output line of the NAND gate 70 is connected to a preset terminal PR and that of the AND gate 74 is connected to a clear terminal CLR . The operation of the NRF driving selection determination portion 52 having such a structure will be now described. The operation thereof can be summed up as to compare the first and second mean power differences B and A and make the output of the compared values into the control signal CNT only when the n units of the compared values is all "0" or "1". The comparator 60 compares the first and second mean power differences B and A and outputs "0" when A≥B and "1" when A<B. The serially connected n units of D-type flip-flops 60, 62, 64, 66 and 68 continuously shift the output signal of the comparator 60 in response to the clock signal CLK continuously applied only during the NTSC interference calculation section signal. The NAND gate 70 outputs "0" only when the output and reset signal of the n units of D-type flip-flops 60, 62, 64, 66 and 68 are all "1". The output of the NAND gate 70 is applied to the preset terminal PR of the D-type flip-flop 76. The OR gate 72 outputs "0" only when the output of the n units of D-type flip-flops 60, 62, 64, 66 and 68 are all "0". The AND gate 74 AND-gates the reset signal and the output of the OR gate 72 to apply to the clear terminal CLR of the D-type flip-flop 76. Thus, the D-type flip-flop 76 which is preset when the output of the NAND gate 70 is applied to as "0" outputs a control signal CNT=1 and cleared when the output of the AND gate 74 is applied to as "0" to output CNT=0. The reset signal applied to the NAND gate 70 and the AND gate 74 is used to initialize the NRF driving selection determination portion 52, and at this time, the reset signal is applied to as "0" and the control signal CNT becomes "0". Figure 5 is a flowchart for explaining the implementation of the NRF driving selection control using the DSP. The operation of steps 100-116 in Figure 5 can be summed up as searching the same selection of continuous n units using two variables M and N and outputting the result as a control signal "out". The control signal CNT output from the structure of Figures 4 and 5 is applied to the selection terminal S of the multiplexer 54 of Figure 3. Returning to Figure 3, the multiplexer 14 selects and outputs the first input signal B' applied to the input terminal 0 when the CNT applied from the NRF driving selection determination portion 52 is "0". When the first input signal B' is selected, the equalizer 4 acts as an 8-level equalizer. Also, the multiplexer 14 selects and outputs the signal A' applied to the input terminal 1 when the CNT applied from the NRF driving selection determination portion 52 is "1". When the second input signal A' is selected, the equalizer 4 acts as a 15-level equalizer. According to the structure of the NRF driving selection determination portion 52 as shown in Figures 4 and 5, the multiplexer 54 of Figure 2 is continuously adjusted. However, since it cannot be said that the effect of the co-channel NTSC at a fixed receiving position varies largely according to time, it is sufficiently considered that in the structure of the present invention channel condition is recognized only at the initial stage to select the input to the equalizer 4. As described above, it is noted through simulation according to preferred embodiments of the present invention that preferred embodiments according to the method according to the present invention reveal better results than the conventional determination method of the GA-VSB system in the operation available area of the equalizer. This results from removing in the preferred embodiments of present invention the malfunction of the GA-VSB system method under the circumstances of the multipath. Also, according to the comparison of level selection, less errors are found in the signal power method according to preferred embodiments of the present invention than in the conventional selection method in the GA-VSB. Therefore, it should be understood that the present invention is not limited to the particular embodiment disclosed herein as the best mode contemplated for carrying out the present invention, but rather that the present invention is not limited to the specific embodiments described in this specification except as defined in the appended claims.

Claims: An apparatus for controlling driving selection of an NTSC rejection filter comprising: an NTSC rejection filter (34) for rejection-filtering an NTSC signal component of a first input signal including an NTSC signal component and a multipath component to output the filtered signal as a second input signal; a first mean power level calculator (35) for calculating the mean power level of the first input signal of a field sync signal section in response to a predetermined calculation section signal; a second mean power level calculator (43) for calculating the mean power level of the second input signal of a field sync signal section in response to said predetermined calculation section signal; a first mean power difference calculator (39) for calculating the difference between a mean power level of the first input signal and a first reference mean power level of the field sync signal section in a preset 8-level input signal state; a second mean power difference calculator (47) for calculating the difference between a mean power level of the second input signal and a second reference mean power level of the field sync signal section in a preset 15-level input signal state; a driving selection determiner (52) for comparing the first and second mean power differences for a predetermined period to output a selection determination signal; and a selector (54) for selecting said first or second input signal in response to said selection determination signal and outputting the selected input signal to an equalizer. An apparatus as claimed in claim 1, wherein said first reference mean power level of the field sync signal section in said preset 8-level input signal state is 25. An apparatus as claimed in claim 1 or claim 2, wherein said second reference mean power level of the field sync signal section in said preset 15-level input signal state is 50. An apparatus for controlling driving selection of an NTSC rejection filter comprising: an NTSC rejection filter (34) for rejection-filtering an NTSC signal component of a first input signal including an NTSC signal component and a multipath component to output the filtered signal as a second input signal; a first mean power level calculator (35) for calculating the mean power level of the first input signal of an arbitrary field section in response to a predetermined calculation section signal; a second mean power level calculator (43) for calculating the mean power level of the second input signal of an arbitrary field section in response to said predetermined calculation section signal; a first mean power difference calculator (39) for calculating the difference between a mean power level of the first input signal and a first reference mean power level of the arbitrary field section in a preset 8-level input signal state; a second mean power difference calculator (47) for calculating the difference between a mean power level of the second input signal and a second reference mean power level of the arbitrary field section in a preset 15-level input signal state; a driving selection determiner (52) for comparing the first and second mean power differences for a predetermined period to output a selection determination signal; and a selector (54) for selecting said first or second input signal in response to said selection determination signal and outputting the selected input signal to an equalizer. An apparatus as claimed in claim 4, wherein said first reference mean power level of the arbitrary field section in said preset 8-level input signal state is 21. An apparatus as claimed in claim 4 or claim 5, wherein said second reference mean power level of the arbitrary field section in said preset 15-level input signal state is 21. An apparatus for generating a control signal for selecting a first input signal which is not NTSC-rejection-filtered and a second input signal which is rejection-filtered by a rejection filter in order to control the driving selection of an NTSC rejection filter, said apparatus comprising: a comparing circuit (60) for comparing error values of said first input signal and said second input signal to output a comparison signal; a delay circuit (62, 64, 66, 68) comprised of a plurality of delayers for delaying the output of said comparing circuit by shifting in response to a predetermined clock; and a control signal generator (70) for outputting a control signal of a first logic state when the respective output of the delayers of said delay circuit (62, 64, 66, 68) is all the first logic state and a control signal of a second logic state when the respective output of the delayers of said delay circuit (62, 64, 66, 68) is all the second logic state. An apparatus as claimed in claim 7, wherein said control signal generator comprises: a first gate (70) for outputting a first active signal when said outputs of delayers are all at said first logic state; a second gate (74) for outputting a second active signal when said outputs of delayers are all at said second logic state; and a latch (76) for outputting said first control signal in response to application of said first active signal and said second control signal in response to application of said second active signal. A method for controlling driving selection of an NTSC rejection filter comprising the steps of: rejection-filtering an NTSC signal component of a first input signal including an NTSC signal component and a multipath component and outputting the filtered signal as a second input signal; calculating the mean power level of the first and the second input signals of a field sync signal section in response to a predetermined calculation section signal, respectively; calculating the difference between a mean power level of the first input signal and a first reference mean power level of the field sync signal section in a preset 8-level input signal state and calculating the difference between a mean power level of the second input signal and a second reference mean power level of the field sync signal section in a preset 15-level input signal state; comparing the first and second mean power differences for a predetermined period and outputting a selection determination signal; and selecting said first or the second input signal in response to said selection determination signal and outputting the selected input signal to an equalizer. A method for controlling driving selection of an NTSC rejection filter comprising the steps of: rejection-filtering an NTSC signal component of a first input signal including an NTSC signal component and a multipath component and outputting the filtered signal as a second input signal; calculating the mean power level of the first and the second input signals of an arbitrary field section in response to a predetermined calculation section signal; calculating the difference between a mean power level of the first input signal and a first reference mean power level of the arbitrary field section in a preset 8-level input signal state and calculating the difference between a mean power level of the second input signal and a second reference mean power level of the arbitrary field section in a preset 15-level input signal state; comparing the first and second mean power differences for a predetermined period and outputting a selection determination signal; and selecting said first or second input signal in response to said selection determination signal and outputting the selected input signal to an equalizer.

Inventors: LEE MYEONG-HWAN, LEE, MYEONG-HWAN
Applicants: SAMSUNG ELECTRONICS CO LTD, SAMSUNG ELECTRONICS CO., LTD.
Application year: 1996
Main classification: H04N5
IPC codes: H04N5, H04N7