OFFSET-COMPENSATED LINEAR RF DETECTOR

Abstract: A known linear RF detector comprises a detector part having a detector diode (D1a) biased with a bias current (Ib), and a linearizer part having an operation amplifier (OA1) and a diode in its feedback path. The major drawback of the known detector concerns the output offset voltages, the values of which can be predicted only if the diodes are matched diodes and have the same temperature. Because of this, the detector part and the linearizer part cannot be placed on different circuit boards. The invention solves the problem by placing a transistor circuit (Q3a, Q2a) in the feedback path such that it generates an offset voltage at the output of the operation amplifier, the voltage being the sum of the base-emitter voltages of the transistors of the circuit. Further, a second transistor circuit (Q3b, Q2b) is arranged at the output of the operation amplifier such that it generates a voltage at the output of the operation amplifier that compensates for the sum of the base-emitter voltages of the transistor circuit. The voltages thus cancel each other and the output offset voltage of the detector is zero.

Description: Offset-compensated linear RF detector The Invention relates to a linear RF detector comprising a detector part having a detector diode biased with bias current, and a linearizer part having an operation amplifier to the inverting input of which is connected both the output of the detector part and the feedback path coming from the output of the operation amplifier. In a typical embodiment of the detector, the level of a received radio signal is detected, but the detector is also used for detecting the level of a transmitted radio signal. This application relates to the latter kind of detector. Requirements set for an RF detector include good linearity, high speed and zero output voltage when the input voltage is zero. Accuracy of detection should not suffer if the detector part and the linearizer part are placed on different circuit boards. A known detector is shown in fig. 1. It meets all the other requirements except that the output offset voltage is not zero but depends on the differences in temperature of the detector part and the linearizer part. The detector part comprises a detector diode DI, a capacitor C and a resistor R 0 , and the linearizer part comprises an operation amplifier 0A1 having a diode D2 and a resistor R in its feedback path. The signal whose level is to be detected is represented by generator V j Cosω , where V t is the amplitude to be detected. V k is a direct-current voltage used for biasing diode DI. Starting from the universal diode current equation I D =I s (T)e vd vt , where V τ is a voltage proportional to absolute temperature and I S (T) is a saturation current of the diode, it is possible to show that when diode DI has a temperature Tl, whereby the saturation current is I S1 (T1), and diode D2 has a temperature T2, whereby the saturation current is I S2 (T2), the output voltage V 0 of the detector is represented by formula (1): v 0 - -t(v iS v n ) - v k - y rj in( The first term of the formula is the desired part depending on the RF input voltage. The second term is a constant offset voltage, and the third term is a varying offset voltage depending on the temperatures and device matching of the diodes. The fourth term, where V D2 is a voltage over diode D2, generates both a temperature-dependent offset voltage and an error in that part of the output voltage which depends on amplitude V j . The part of output voltage V 0 that is dependent on voltage V i is given by a non-linear function f, where I 0 and I x are Bessel functions, and is obtained from formula (2) df _ I i Vi/ V τ ) → V V T dv i i t i V i / Vm.) vχ> v τ (2) The prior art detector circuit illustrated by fig. 1 has several advantages. First, according to formula (2) the diode bias current I b has theoretically, i.e. if the diode functions as an ideal diode, no effect on the part f(V A , V τl ) of the output voltage V 0 that is dependent on the input voltage. The bias current will have to be set at a large enough value to enable fast charge/discharge of the circuit capacitances. But on the other hand, although according to the simplified theory the performance of the circuit is not critical with respect to the bias current of the diode, there are, however, secondary influences, and so the bias current will have to be within a certain range. Second, resistor R 0 does not affect the output voltage in the transfer of the input voltage. Third, the detector is fast, if R 0 and C are sufficiently small. The fourth advantage is that the linear dynamic range of the detector is about 50 dB. The lowest input level to a 50Ω impedance is -20 dBm (sensitivity dV o /dVi has dropped to half of its nominal value) and the highest input level is +30 dBm, depending on the break down voltage of diode DI and supply voltage of the operation amplifier. The main disadvantage of the above-described known detector circuit concerns the output offset voltages, the values of which are predictable only if diodes DI and D2 are matched devices and have the same temperature, so they should preferably be on the same silicon chip. However, it is often advantageous to place the detector and the linearizing amplifier on different circuit boards. It should also be noted that if diodes DI and D2 are in the same package, RF energy will easily leak through diode D2 into the linearizing amplifier disturbing its operation. This is difficult to prevent, since D2 is in the feedback path of a fast amplifier, in the vicinity of which no filtering is allowed. A way of eliminating the offset voltage in a circuit according to fig. 1 is shown in fig. 2. In the figure, offset compensation is used outside the feedback path of the linearizing amplifier. Diodes Dla and D2a are matched devices and have the same temperature, and they are preferably in the same package. Biasing voltage V k is obtained by the use of a diode D2 that is similar to diodes Dla and Dlb. This makes the bias current independent of the forward voltage and the temperature of the diodes. The offset voltage of matched diodes Dla and Dlb at the output of the first operation amplifier 0A1 is 2*V k . The non-inverting amplification of the latter operation amplifier 0A2 is 2 and the inverting amplification is 1, so the final offset at output V is 2*V k - l*2V k = 0. The circuit of fig. 2 has exactly the same drawbacks as the circuit of fig. 1: the detector and the linearizing amplifier must be placed on the same circuit board, which raises EMC (Electro-Magnetic Compatibility) problems when the RF input level is high (more than 10 dBm). The RF energy leaks through diode Dlb into linearizer 0A1 and is rectified in the p-n junctions of diode Dlb and/or of the operation amplifiers. It is almost impossible to arrange an effective lowpass filter in the vicinity of Dlb, because the diode is in the feedback path of a fast amplifier. An extra operation amplifier reduces the speed of the detector and raises the price, especially since the detector must be fast. The object of the present invention is to provide a linear detector circuit that does not have the drawbacks involved in the offset voltages of the known detector. The object is thus to provide a detector whose output offset voltages have been eliminated and in which the detector and the linearizing amplifier may have different temperatures and which does not involve RF leakage into the linearizing amplifier. The object is achieved with the detector circuit disclosed in claim 1. By the use of a transistor instead of a diode in the feedback path of the linearizing amplifier in accordance with the invention, the output offset voltage is rendered independent of the biasing voltage of the detector diode. The detector part and the linearizer part can thus be made physically separate. In the feedback path, two transistors are connected such that the sum of their base-emitter voltages is essentially the same as the output offset voltage. At the output, one transistor circuit is preferably in a darlington configuration such that it generates an output voltage that compensates for the offset voltage generated by the transistor in the feedback path. When the voltage of the transistor circuit is added to or subtracted from the output voltage of the linearizing amplifier, the result is thus a zero offset voltage. In the following the invention will be described in greater detail by means of a preferred embodiment of the invention with reference to the attached drawings, in which fig. 1 shows a known linearizing detector, fig. 2 illustrates a known compensation method, fig. 3 illustrates a compensation principle according to the invention, fig. 4 illustrates compensation of offset voltages, fig. 5 illustrates compensation of offset voltages in a feedback path, fig. 6 illustrates compensation of the offset voltage by an operation amplifier, fig. 7 illustrates a modification of the compensation of the offset voltage. Fig. 3 illustrates the principle of the invention in a simplified form. In practice, the circuit will have to be supplemented with the values stated below. When the linear detector according to the invention as shown in fig. 3 is compared with the prior art detector shown in fig. 1, two differences appear: first, biasing voltage source V k has been transferred to the non-inverting input of the amplifier, so that the RF voltage source can be grounded directly. In addition, diode Dlb, which is preferably identical to and located on the same silicon chip as detector diode Dla (diode DI in fig. 1), is used for transferring voltage V k such that bias current I b becomes independent of the device and temperature. A suitable value for the bias current is e.g. 50μA. Second, diode D2 of fig. 1 in the feedback path of the operation amplifier has been replaced with transistor Q 2 , fig. 3. The replacement is possible since the collector current vs. base-emitter current of the transistor obeys the same law as the current vs. voltage of the diode. When transistor Q 2 is used in the feedback path, the reference level of output voltage V 0 is earth (■ base voltage of the transistor) instead of direct current V k that affects at the inputs of the amplifier. In reality, the circuit of fig. 3 does not, however, function in exactly the way described above, for the collector voltage of the transistor is lower than the base voltage by voltage V k . The base voltage must thus be dropped. This is implemented by adding transistor Q 3a to the base circuit of transistor Q 2 as shown in fig. 4. The drop in the base voltage is the base-emitter voltage of the added transistor Q 3a , which is operated with collector current I 3a . The current is obtained by connecting the emitter of the added transistor Q 3a through resistor R6 to negative voltage source -V B . This renders the output offset voltage of operation amplifier 0A1 equal to the base-emitter voltages of said transistors, one of the latter voltages corresponding to collector current I b and the other to collector current I 3β . Mathematically, this can be expressed by formula (3), in which subindex s represents saturation current: V ots ~ - n ) (3) The offset voltage is eliminated by raising the output voltage by an equal amount. This is performed by using the base-emitter voltage of darlington transistors Q 2 _' Q 3b having collector currents I 2b and I 3b so that formula (4) holds true: I-.I* - 3_J- 2_. (4) -' ■ s3a''-s2a ^s3b^s2b To realize this, matched transistor pairs Q 2a and Q 2b , and Q 3a and Q 3b , respectively, are used so that I. 2a = I. 2b and I. 2b ■ I. 3b . The compensation condition of the output offset voltage of linearizing amplifier OAl thus becomes: «3a ^b = ^»3b ^2b In principle, any combination of I 2b and I 3b can be used as long as the product of the currents is the right value. Although the above transistors do not accurately obey the exponential law, but are still matched pairs, the values I 2b = I b and I 3b = I 3a compensate for the output offset voltage. The resistor values of fig. 4 will not be discussed here. Determining of these values is obvious to a person skilled in the art. Resistors connected to supply voltage sources -V B and +V B can be replaced with current sources. Components Dla and Rl can be interchanged without affecting the operation of the circuit, so that a diode pair with a common anode can be used. In that case, however, most of the RF current will flow through capacitor C2, whereby it must be of a low loss type and grounded as directly as possible. Resistor R 7 , which connects the output of the operation amplifier to supply voltage -V B , is not essential to the operation of the circuit but can be used for reducing dissipation of the operation amplifier. The circuit of fig. 4 according to the invention gives a negative output voltage V 0 . A positive output voltage is obtained by inverting the diodes, replacing the NPN transistors with PNP transistors, and changing the polarities of supply voltages -V B and +V B . The above circuit will function sufficiently well in most applications, although it has some minor defects. If necessary, most of the defects can be eliminated by adding to circuit complexity. The error caused by the different temperatures of the detector and the linearizer part in that part of the output voltage which is dependent on the input voltage is not eliminated. The error, however, is zero when the input voltage is zero, and at most it is in the order of dozens of millivolts when the input voltage is high. The diode bias current I b and currents I 3a and I 2b are derived from the negative voltage, whereas the compensating current I 3b is obtained from the positive voltage. This increases the sensitivity to non- symmetrical supply voltage variations. The ratio of the collector current of transistor Q 2b to diode bias current I b is not very well defined and is dependent on the temperature due to imperfect matching of diodes D la and D lb , input offset voltage of the operation amplifier, and the temperature and device dependencies of the current gain of transistor Q 3b . If the resulting output offset voltage is too high, it can be eliminated by tuning, e.g. by making resistor R4 adjustable. It is to be understood that the above description and the accompanying figures are intended only to illustrate the present invention. It is obvious to a person skilled in the art that the invention can be varied and modified in many ways without deviating from the scope and spirit of the invention disclosed in the attached claims. Various alternatives are thus possible if the output impedance is to be zero. In the circuit of fig. 4, the output impedance is not zero. This, however, does not produce an offset error when the load is grounded, but only a small gain error. Fig. 5 shows a preferred embodiment of the invention where the output impedance is zero. In it, the offset compensating part has been transferred to the feedback path of the linearizing amplifier. The drawback is that the circuit has high complexity and that the consumption of current increases. Fig. 6 shows another embodiment of the inven¬ tion where the output impedance is zero. Another operation amplifier 0A2 is used therein. This embodiment utilizes a usually undesired characteristic of the simplest possible differential operation amplifier: non- inverting amplification is twice as great as the inverting amplification. Only one transistor Q 4 is thus needed to simulate the base-emitter voltage of two transistors. Fig. 7 shows yet another embodiment, in which the defect of the circuit of fig. 4 is taken into account, i.e. the defect that the circuit does not function correctly if current amplification of transistor Q 3b is too small. The base current of transistor Q 3b thus forms too large a part of current I 2b . The problem can be solved by turning transistor Q 2b into a 'super emitter follower' by adding one PNP transistor Q4.

Claims: Claims : 1. A linear RF detector comprising a detector part having a detector diode (Dla) biased with bias current (I b ), and a linearizer part having an operation amplifier (OAl) to the inverting input of which is connected both the output of the detector part and the feedback path coming from the output of the operation amplifier, c h a r a c t e r i z e d by the feedback path comprising a first transistor circuit (Q 3a , Q 2a ) in which the base of one transistor (Q 3a ) is grounded, the circuit being connected such that the transistor circuit generates an offset voltage at the output of the operation amplifier, the voltage being the sum of the base-emitter voltages of the transistors of the circuit; the output of the operation amplifier being connected to a second transistor circuit (Q 3b , Q 2b ) such that it generates a voltage at the output of the operation amplifier that compensates for the sum of the base-emitter voltages of the transistor circuit, whereby said voltages cancel each other and the output offset voltage of the detector is zero. 2. An RF detector according to claim 1, c h a r a c t e r i z e d by the first transistor circuit comprising a first transistor (Q 3a ) whose base is grounded and a second transistor (Q 2a ) whose base is connected to the emitter of the first transistor (Q 3a ) and whose collector current flows in the feedback path. 3. An RF detector according to claim 1, c h a r a c t e r i z e d by the second transistor circuit comprising a third transistor (Q 3b ) in a darlington configuration and a fourth transistor (Q 2b ) connected such that the output voltage of the detector is obtained from the collectors, the emitter of the third transistor (Q 3b ) being operationally connected to the output of the operation amplifier (OAl). 4. An RF detector according to claims 2 and 3, c h a r a c t e r i z e d in that the transistor circuits are designed such that ^3a ^b * 3b 2b holds true, I 2b and I 3b being the base currents of the transistors in the second transistor circuit, I b being the bias current of the detector diode and I 3a being the collector current of the first transistor in the first transistor circuit. 5. An RF detector according to claim 1, c h a r a c t e r i z e d in that the biasing voltage source (V k ) is connected to the non-inverting input of the operation amplifier (OAl) through a diode (Dlb) that is similar to the detector diode (Dla). 6. An RF detector according to claim 1, c h a r a c t e r i z e d in that said second transistor circuit is connected to the output of the operation amplifier such that it is located in the feedback path.

Inventors: DEKKER ANDRE, DEKKER, ANDRE
Applicants: DEKKER ANDRE, NOKIA TELECOMMUNICATIONS OY, DEKKER, ANDRE
Application year: 1996
Main classification: H03F3
IPC codes: H03F1, H03F3