Modulator and method of modulation and demodulation

Abstract: A modulation method is provided, wherein digital information is carried in the ratios of the amplitudes of temporally separated signals. Since the information is carried in the amplitude ratios, there is the possibility that the modulated signal will decrease monotonically, and steps are taken to prevent this.

Description: The present invention relates to a modulation and demodulation method, a modulator and a demodulator, used for digital communication. Recently, demand on fast and large capacity radio transmission techniques for realizing a PHS (Personal Handy phone System), a mobile phone system, a multi-media transmission system or a motion picture real-time transmission system via radio LAN or radio ATM has been increased. In order to satisfy this demand, it is necessary to increase band-width efficiency of these transmission systems. As one technique for increasing the band-width efficiency, utilization of a multi-level modulation method such as a multi-level FSK (Frequency Shift Keying) method, a multi-phase PSK (Phase Shift Keying) method or a multi-level QAM (Quadrature Amplitude Modulation) method is effective. Particularly, utilization of the multi-level QAM is advantageous for increasing frequency utilization efficiency and transmission power efficiency. Fig. 1a shows an example of a signal space diagram of a conventional square multi-level QAM (16 QAM) method. As is known, signal points of modulating signals in the square multi-level QAM are arranged in lines in parallel with the orthogonal I and Q axes at regular intervals. In this method, a QAM signal can be obtained by quadrature modulation wherein a carrier is modulated by baseband modulating signals of the in-phase channel (I channel) and the quadrature channel (Q channel). At a receiving side, demodulation is performed by detecting the distances along the I axis and the Q axis, I n and Q n respectively, between the signal points and the origin and by determining the original signal in accordance with the detected distances. Thus, in the square multi-level QAM method, it is necessary at the receiving side to detect the absolute phase by establishing phase synchronization of the carrier so that the phase angle and the amplitude always correspond to the signal points, and to keep the level of input signal applied to a demodulator constant. For establishing the signal points, it is necessary to detect an absolute phase plane. In order to detect the absolute phase plane, reproduction of the carrier frequency is needed. Frequency stability and phase noise of the carrier in general have a great influence on error ratio characteristics. Higher orders of multi-level QAM will result in poor frequency stability and lower acceptable error amount due to phase noise. Therefore, reproduction of the carrier frequency with high stability and low phase noise is required. Fig. 1b shows an example of a signal space diagram of a conventional star multi-level QAM (16 QAM) method. In this star multi-level QAM method, each code is mapped to a phase difference between the preceding and current codes  n and an amplitude r n . At a receiving side, demodulation is performed by detecting the phase difference and comparing the amplitudes, and then by deciding the original signal in accordance with the detected and compared results. Thus, in this star QAM method, it is not necessary at the receiving side to detect the absolute phase nor to keep the level of input signal applied to a demodulator constant because determination of the original signal with respect to amplitude is performed by comparing the amplitudes. Also, the star QAM method withstands relatively high phase noise. However, where more than two levels are mapped to amplitudes, an initial value or a reference value with respect to the amplitude values has to be established, and thus relationships between the signal points and the amplitude values have to be established by using a training signal. Also, if there occurs an incorrect decision of an amplitude ratio with the initial or reference value due to poor transmission conditions after establishment of the amplitude ratio, the initial establishment of the amplitude ratio with the initial or reference value has to be done again. Furthermore, according to the conventional star multi-level QAM, it is necessary to compare the detected amplitude ratio with the preceding detected amplitude ratio. This provides extremely complicated decision if the order of multi-level QAM increases. In the case that there are abrupt level changes due to movement of the transmitter or the receiver, or to fading, the multi-level QAM needs to be provided with an AGC (Automatic Gain Control) amplifier having very quick response characteristics. This is quite difficult to realize. Furthermore, since the carrier frequency tends to rise up to several tens of GHz and the phase noise will increase if the carrier frequency rises, it is extremely difficult to realize square multi-level QAM which requires a very precise carrier frequency. Contrary to this, the conventional star multi-level QAM can be proof against the level changes and the phase noise but it has to use a very complicated algorithm for the decision as above described. JP-A-07-50695 describes a digital modulating/demodulating apparatus including a demodulator for demodulating a modulated signal into a demodulated positional signal in response to a receipt of the modulated signal, a decoder for decoding the demodulated positional signal into a digital signal of N bits. A previous signal point on the constellation plane is defined by a previous demodulated positional signal and a current signal point on the constellation plane is defined by a current demodulated positional signal. The decoder outputs a digital signal of N bits, based on the difference between the amplitude and phase of the previous signal point and the amplitude and phase of the current signal point. "Modulation methods for PCNs" IEEE Communications Magazine, vol. 30, no. 12, December 1992, pages 90-95, Webb concludes that based on expected SNRs and interference levels variable rate QAM schemes are superior for PCNs to other modulation schemes including differential star QAM. For low BERs, 4PSK may often provide the best performance, whereas for high BERs, particularly when the SNR is high, 32- and 64-level star QAM are the most suitable. "Bandwidth efficient QAM schemes for Rayleigh fading channels" IEE Proceedings I. Solid-State and Electron Devices, vol. 138, no. 3, 1 June 1991, Stevenage, GB, pages 169-175, Webb et al describes techniques to improve the BER performance of 16-level QAM transmission over Rayleigh fading channels for PCN systems are presented. The residual BER was reduced by over an order of magnitude by changing the square QAM constellation to a circular constellation and introducing differential amplitude and phase encoding. "Differentially amplitude and phase coded QAM on Rayleigh fading channels" Proceedings of the Military Communications Conference, 6 - 8 November 1995, New York, US, pages 1026-1030, Chung et al evaluates the bit error probabilities (BEP) of differentially amplitude and phase encoded (DAPE) QAM over nonselective Rayleigh fading channels with switched diversity reception. A multiamplitude star constellation is utilised and the data is modulated onto the amplitude ratio and phase difference of the transmitted signal in two successive signalling intervals. The results show how the DAPE QAM can be optimized and how fading fluctuations and the order of switched diversity affect its performance. EP-A-0459823 describes a digital radio communications system in which, a transmit signal is delayed and sent on a first diversity channel and a nondelayed version of the signal sent on a second diversity channel. According to the present invention, there is provided a modulation and demodulation method for communication between a transmitting side and a receiving side, said method comprising the following steps: at the transmitting side, producing a modulating signal, wherein the amplitude ratio of the current instantaneous amplitude of said modulating signal and the instantaneous amplitude of said modulating signal n symbols previously in time, where n is a natural number, is set to correspond to a code to be transmitted; at the transmitting side, modulating a radio frequency or an intermediate frequency carrier with said modulating signal, to provide and transmit a modulated signal; at the receiving side, receiving the transmitted modulated signal to provide a received signal; and at the receiving side, decoding the transmitted code from the amplitude ratio of the current instantaneous amplitude of the received signal and the instantaneous amplitude of the received signal n symbols previously in time, characterised in that, the step of setting the amplitude ratio comprises selecting either a first amplitude ratio value, equal to or greater than 1 if the instantaneous amplitude of said modulating signal n symbols previously in time, or its product with the first amplitude ratio, is equal to or less than a threshold valued; or a second amplitude ratio value, equal to or smaller than 1, if the instantaneous amplitude of said modulating signal n symbols previously in time, or its product with the first amplitude ratio, exceeds the threshold value. By mapping a code to an amplitude ratio between instantaneous amplitudes separated by n symbols in time, the code can be decided independently of the received signal level. Thus, good demodulation characteristics can be expected even under a bad transmission condition of abrupt level changes. Furthermore, according to the present invention, since the amplitude ratio is selected to a first amplitude ratio value equal to or smaller than 1 or to a second amplitude ratio value equal to or greater than 1 so as to prevent the modulating signal from converging to zero and from diverging, the code can be mapped without convergence to zero and divergence of the instantaneous amplitude of the modulating signal. since information exists in the amplitude ratio between the symbols according to the present invention, multi-level QAM can be easily realized and also the decision for determining the signal points thereof will become easy. Furthermore, since it is not an essential condition to detect the absolute amplitude, quick synchronization of burst signals can be realized causing the transmission efficiency of a time division multiple access (TDMA) system and an asynchronous transmission system to greatly improve. If the amplitude ratio modulation system according to the present invention is combined with a conventional phase or frequency modulation system, transmission capacity can be easily increased without changing the structure of the conventional phase or frequency modulation system. Namely, according to the present invention, a fast and large capacity radio transmission can be easily attained without preparing a precise AGC amplifier and without performing complicated controls and processes for providing a training signal even under conditions of abrupt level changes such as under fading. According to the present invention, a modulator comprises a code mapping means for mapping a plurality of data to be transmitted to a code corresponding to a signal point in a signal space; an amplitude ratio setting means for providing at least one amplitude ratio corresponding to said mapped code; an n-symbol delay means for providing the instantaneous amplitude of an amplitude modulating signal an n symbols previously in time, where n is a natural number; and, an amplitude modulation means for amplitude modulating a radio frequency or an intermediate frequency carrier with the current instantaneous amplitude of said amplitude modulating signal, characterised in that the modulator further comprises an amplitude modulating signal production means for producing said amplitude modulating signal, the current instantaneous amplitude of which is proportional to the product of the instantaneous amplitude of said amplitude modulating signal n symbols previously in time and the or one of the amplitude ratios. It is preferred that the amplitude modulating signal production means comprises an amplitude ratio control means for controlling said amplitude ratio setting means so that it provides either a first amplitude ratio value equal to or smaller than 1 when the instantaneous amplitude of said amplitude modulating signal from n symbols previously in time exceeds a threshold value or a second amplitude ratio value equal to or greater than 1 when the instantaneous amplitude of said amplitude modulating signal from n symbols previously in time is less than the threshold value; and, a multiplying means for providing the product of the amplitude ratio provided by the amplitude ratio setting means and the instantaneous amplitude of said modulating signal from n symbols previously in time as the amplitude modulating signal. It is also preferred that said amplitude ratio setting means provides both a first amplitude ratio value equal to or smaller than 1 and a second amplitude ratio value equal to or greater than 1, and wherein said amplitude modulating signal production means comprises a first multiplying means for providing a first product of said first amplitude ratio value and the instantaneous amplitude of said amplitude modulating signal from n symbols previously in time, a second multiplying means for providing a second product of said second amplitude ratio value and the instantaneous amplitude of said amplitude modulating signal from n symbols previously in time, a selection means for selecting, in accordance with a selection signal, one of said first product and said second product to be the amplitude modulating signal, and a comparing means for providing the selection signal to said selection means so that said selection means selects said first product when the instantaneous amplitude of said amplitude modulating signal from n symbols previously in time is greater than a threshold value and that said selection means selects said second product when the instantaneous amplitude of said amplitude modulating signal from n symbols previously in time is equal to or smaller than the threshold value. It is preferred that said amplitude ratio setting means provides both the first amplitude ratio value and the second amplitude ratio value, and wherein said amplitude modulating signal production means comprises a first multiplying means for providing a first product of said first amplitude ratio value and the instantaneous amplitude of said amplitude modulating signal from n symbols previously in time, a second multiplying means for providing a second product of said second amplitude ratio value and the instantaneous amplitude of said amplitude modulating signal from n symbols previously in time, a selection means for selecting, in accordance with a selection signal, one of said first product and said second product to be the amplitude modulating signal, and a comparing means for providing the selection signal to said selection means so that said selection means selects said first product when said second product is greater than a threshold value and that said selection means selects said second product when said second product is equal to or smaller than the threshold value. Further objects and advantages of the present invention will be apparent from the following description of the preferred embodiments of the invention as illustrated in the accompanying drawings. Figs. 1a and 1b show the signal space diagrams of the conventional multi-level QAM methods already described; Fig. 2 shows a block diagram illustrating a substantial constitution of a modulating part in a transmitting side in a first embodiment according to the present invention; Fig. 3 shows a block diagram illustrating a substantial constitution of a demodulating part in a receiver ; Fig. 4 shows a block diagram illustrating a first concrete constitution of a modulator in the first embodiment according to the present invention; Fig. 5 shows a block diagram illustrating a second concrete constitution of the modulator in the first embodiment according to the present invention; Fig. 6 shows a block diagram illustrating a third concrete constitution of the modulator in the first embodiment according to the present invention; Fig. 7 shows a block diagram illustrating a first concrete constitution of a demodulator; Fig. 8 shows a block diagram illustrating an example of an amplitude ratio calculation circuit in the demodulator shown in Fig. 7; Fig. 9 shows a block diagram illustrating a second concrete constitution of the demodulator; Fig. 10 shows a block diagram illustrating a third concrete constitution of the demodulator Fig. 11 shows a block diagram illustrating a constitution of a composite modulation system of a phase modulation system and the modulation system in the first embodiment according to the present invention; Fig. 12 shows a block diagram illustrating a constitution of a composite modulation system of a frequency modulation system and the modulation system in the first embodiment according to the present invention; Fig. 13 shows a block diagram illustrating a fourth concrete constitution of the demodulator ; Fig. 14 shows a block diagram illustrating a substantial constitution of a modulating part in a transmitting side in a second embodiment according to the present invention; Fig. 15 shows a block diagram illustrating a substantial constitution of a demodulating part; Fig. 16 shows a block diagram illustrating a first concrete constitution of a modulator in the second embodiment according to the present invention; Fig. 17 shows a block diagram illustrating an example of an amplitude-phase modulation circuit in the modulator shown in Fig. 16; Fig. 18 shows a block diagram illustrating a second concrete constitution of the modulator in the second embodiment according to the present invention; Fig. 19 shows a block diagram illustrating a third concrete constitution of the modulator in the second embodiment according to the present invention; Fig. 20 shows a block diagram illustrating a first concrete constitution of a demodulator; Fig. 21 shows a block diagram illustrating a first example of an amplitude and absolute phase detection circuit in the demodulator shown in Fig. 20; Fig. 22 shows a block diagram illustrating a second example of the amplitude and absolute phase detection circuit in the demodulator shown in Fig. 20; Fig. 23 shows a block diagram illustrating a second concrete constitution of the demodulator; Fig. 24 formed by combining Figs. 24A and 24B shows a block diagram illustrating a third concrete constitution of the demodulator; Fig. 25 formed by combining Figs. 25A and 25B shows a block diagram illustrating a fourth concrete constitution of the demodulator; Fig. 26 shows a block diagram illustrating a substantial constitution of a modulating part in a transmitting side in a third embodiment according to the present invention: Fig. 27 shows a block diagram illustrating a substantial constitution of a demodulating part; Fig. 28 shows a block diagram illustrating a first concrete constitution of a modulator in the third embodiment according to the present invention; Fig. 29 shows a block diagram illustrating a second concrete constitution of the modulator in the third embodiment according to the present invention; Fig. 30 shows a block diagram illustrating a third concrete constitution of the modulator in the third embodiment according to the present invention; Fig. 31 shows a block diagram illustrating a first concrete constitution of a demodulator; Fig. 32 shows a block diagram illustrating an example of an amplitude and phase detection circuit in the demodulator shown in Fig. 31; Fig. 33 shows a block diagram illustrating a second concrete constitution of the demodulator; Fig. 34 shows a block diagram illustrating a third concrete constitution of the demodulator Fig. 35 shows a block diagram illustrating an example of a differential detection circuit in the demodulator shown in Fig. 34; Fig. 36 shows a block diagram illustrating a fourth concrete constitution of the demodulator; Fig. 37 formed by combining Figs. 37A and 37B shows a block diagram illustrating a fifth concrete constitution of the demodulator; Fig. 38 formed by combining Figs. 38A and 38B shows a block diagram illustrating a sixth concrete constitution of the demodulator; Figs. 39a and 39b show a first example of a signal space diagram of the multi-level QAM according to the present invention; and Figs. 40a and 40b show a second example of a signal space diagram of the multi-level QAM according to the present invention. In a first embodiment according to the present invention, a modulating part in a transmitting side is substantially constituted by a baseband processing unit 201 and an amplitude modulation unit 207 followed to this baseband processing unit 201 as shown in Fig. 2. The baseband processing unit 201 is provided with a code mapping unit 202, an amplitude ratio setting unit 203, an amplitude ratio control unit 204, an instantaneous amplitude production unit 205 and a n-symbol delay unit 206. Data to be transmitted are inputted into the baseband processing unit 201. In the processing unit 201, a plurality of inputted data are mapped to a single code at the code mapping unit 202. An amplitude ratio value corresponding to this mapped code is set at the amplitude ratio setting unit 203, and then the product of the set amplitude ratio value and an instantaneous amplitude at n symbols previously in time (n is a natural number) outputted from the n-symbol delay unit 206 is produced at the instantaneous amplitude production unit 205 as a current instantaneous amplitude. If only one amplitude ratio value is given for each of the mapped codes, the instantaneous amplitude from the production unit 205 may be gradually increased to diverge when codes corresponding to an amplitude ratio value greater than 1 are successively provided or the instantaneous amplitude from the production unit 205 may be gradually decreased to converge to 0 when codes corresponding to an amplitude ratio value smaller than 1 are successively provided. Thus, according to the present invention, two amplitude ratio values, a first amplitude ratio value equal to or smaller than 1 and a second amplitude ratio value equal to or greater than 1, are prepared for a single mapped code, and a threshold value of the amplitude ratio values is predetermined. In the amplitude ratio control unit 204, an instantaneous amplitude at n symbols previously is compared with the threshold value so that the first amplitude ratio equal to or smaller than 1 is outputted from the amplitude ratio setting unit 203 when the instantaneous amplitude at n symbols previously is greater than the threshold value and that the second amplitude ratio equal to or greater than 1 is outputted from the setting unit 203 when the instantaneous amplitude at n symbols previously is equal to or smaller than the threshold value. Thus decided amplitude ratio is applied to the instantaneous amplitude production unit 205 and the product of the decided amplitude ratio and an instantaneous amplitude at n symbols previously is produced therein. For example, an instantaneous amplitude at a time t A t can be obtained from a following equation (1a), where A t-n is an instantaneous amplitude at n symbols previously from the time t, r j is a first amplitude ratio equal to or smaller than 1 corresponding to the mapped code j, R j is a second amplitude ratio equal to or greater than 1 corresponding to the mapped code j, and s is a threshold value of the instantaneous amplitude. In this case, the instantaneous amplitude A t is within a range of r min ·s < A t ≦ R max ·s without diverging or converging to 0, where r min is the minimum value of r j and R max is the maximum value of R j . The instantaneous amplitude A t can be also obtained from a following equation (1b) instead of the equation (1a). In this case, the instantaneous amplitude A t is within a range of r min ·s ≦ A t < R max ·s without diverging or converging to 0. The instantaneous amplitude A t can be obtained by comparing R j ·A t-n with the threshold value s from a following equation (2a). In this case, the instantaneous amplitude A t is within a range of r min 2 ·s < A t ≦ s without diverging or converging to 0. The instantaneous amplitude A t can be also obtained from a following equation (2b) instead of the equation (2a). In this case, the instantaneous amplitude A t is within a range of r min 2 ·s ≦ A t < s without diverging or converging to 0. The intermediate frequency carrier or radio frequency carrier is modulated by thus obtained instantaneous amplitude A t at the amplitude modulation unit 207 to output an intermediate frequency (IF) wave or radio frequency (RF) wave. A demodulating part in a receiving side is substantially constituted by an amplitude detection unit 301, a n-symbol delay unit 302, an amplitude ratio calculation unit 303 and a decision unit 304. Received wave is inputted into the amplitude detection unit 301 and an instantaneous envelope level which is an amplitude component in the signal space is detected. Then, a ratio of the instantaneous envelope level at the current time and the instantaneous envelope level at n symbols previously provided from the n-symbol delay unit 302 is calculated at the amplitude ratio calculation unit 303. For example, the output from the calculation unit 303 will become as shown in a following equation (3a) and thus r j or R j corresponding to the mapped code can be obtained in case the modulated wave with an instantaneous amplitude produced by using the equation (1a) is demodulated. In case the modulated wave with an instantaneous amplitude produced by using the equation (1b) is demodulated, the output from the calculation unit 303 will become as shown in a following equation (3b) and thus r j or R j corresponding to the mapped code can be obtained. Thus, the amplitude ratio r j or R j corresponding to the mapped code can be obtained. Then, demodulated data can be provided from the decision unit 304 by deciding the code in accordance with the obtained amplitude ratio r j or R j . Hereinafter, it will be described with respect to constitutions of modulators in the first embodiment according to the present invention. Fig. 4 illustrates a first concrete constitution of a modulator in the first embodiment according to the present invention. In this example, the modulator substantially consists of a baseband processing circuit 401, a mixer 409 followed to this baseband processing circuit 401 and a carrier generator 410. The baseband processing circuit 401 is provided with a code mapping circuit 402, an amplitude ratio setting circuit 403, an amplitude ratio control circuit 404, a multiplier 405, a shift register 406, an D/A converter 407 and a LPF (Low Pass Filter) 408. Data to be transmitted are inputted into the baseband processing circuit 401. In the processing circuit 401, a plurality of inputted data are mapped to a single code at the code mapping circuit 402. An amplitude ratio value corresponding to this mapped code is set at the amplitude ratio setting circuit 403, and then the product of the set amplitude ratio value and an instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 405 as a current instantaneous amplitude A t . In the amplitude ratio setting circuit 403, two amplitude ratio values, a first amplitude ratio value r j equal to or smaller than 1 and a second amplitude ratio value R j equal to or greater than 1, are prepared for a single mapped code. In the amplitude ratio control circuit 404, an instantaneous amplitude at n symbols previously is compared with a predetermined threshold value so that the first amplitude ratio r j equal to or smaller than 1 is outputted from the amplitude ratio setting circuit 403 when the instantaneous amplitude at n symbols previously is greater than (equal to or greater than ) the threshold value and that the second amplitude ratio R j equal to or greater than 1 is outputted from the setting circuit 403 when the instantaneous amplitude at n symbols previously is equal to or smaller than (smaller than) the threshold value. For example, an instantaneous amplitude at a time t : A t can be obtained from a following equation (4a) or (4b), where A t-n is an instantaneous amplitude at n symbols previously from the time t, r j is a first amplitude ratio (≦ 1) corresponding to the mapped code j, R j is a second amplitude ratio (≧ 1) corresponding to the mapped code j, and a threshold value of the instantaneous amplitude is 1. The first and second amplitude ratios r j and R j are determined within one of four ranges of (A) r j ≦ 1 and R j ≧ 1, (B) r j ≦ 1 and R j > 1, (C) r j < 1 and R j ≧ 1, and (D) r j < 1 and R j > 1. These amplitude ratios r j and R j may be set by an equation (8) described later. If it is supposed that codes are "00", "01", "10" and "11", these amplitude ratios r j and R j can be set, as an example, as follows. (A) r j ≦ 1 and R j ≧ 1 code 00 01 10 11 amplitude ratio r j 1.0 0.9 0.8 0.7 amplitude ratio R j 1.0 1.1 1.2 1.3 (B) r j ≦ 1 and R j > 1 code 00 01 10 11 amplitude ratio r j 1.0 0.9 0.8 0.7 amplitude ratio R j 1.1 1.2 1.3 1.4 (C) r j < 1 and R j ≧ 1 code 00 01 10 11 amplitude ratio r j 0.9 0.8 0.7 0.6 amplitude ratio R j 1.0 1.1 1.2 1.3 (D) r j < 1 and R j > 1 code 00 01 10 11 amplitude ratio r j 0.9 0.8 0.7 0.6 amplitude ratio R j 1.1 1.2 1.3 1.4 Thus obtained instantaneous amplitude A t is converted into an analog signal at the D/A converter 407. The converted analog signal is smoothed and Nyquist pulse shaped at the LPF 408 and then outputted from the baseband processing circuit 401. A carrier signal with a frequency of f c from the carrier generator 410 is mixed with the output signal from the baseband processing circuit 401 at the mixer 409 so as to be amplitude-modulated. The modulated wave A t ·cos(2π ·f c ·t) is thus outputted. The code mapping circuit 402 and the amplitude ratio setting circuit 403 can be easily constituted by ROMs (Read Only Memories) and logic circuits, respectively. Similarly to this, the amplitude ratio control circuit 404 also can be easily constituted by a ROM and a logic circuit such as a comparator. Fig. 5 illustrates a second concrete constitution of a modulator in the first embodiment according to the present invention. In this example, the modulator substantially consists of a baseband processing circuit 501, the mixer 409 followed to this baseband processing circuit 501 and the carrier generator 410. The similar components in this modulator as these in the modulator shown in Fig. 4 are illustrated by using the same reference numerals, respectively. The baseband processing circuit 501 is provided with the code mapping circuit 402, an amplitude ratio setting circuit 502, multipliers 503 and 504, a selector 505, a comparator 506, the shift register 406, the D/A converter 407 and the LPF 408. Data to be transmitted are inputted into the baseband processing circuit 501. In the processing circuit 501, a plurality of inputted data are mapped to a single code at the code mapping circuit 402. Two amplitude ratio values corresponding to this mapped code, a first amplitude ratio value r j equal to or smaller than 1 and a second amplitude ratio value R j equal to or greater than 1, are set at the amplitude ratio setting circuit 502. The product r j ·A t-n of the set first amplitude ratio r j and an instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 503. Also the product R j ·A t- n of the set second amplitude ratio R j and the instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 504. These two products are inputted into the selector 505. The comparator 506 compares the instantaneous amplitude at n symbols previously A t-n with a threshold value to produce a selection signal. This selection signal is applied to the selector 505 so that the selector 505 outputs the product r j ·A t-n when the instantaneous amplitude at n symbols previously is greater than (equal to or greater than) the threshold value and outputs the product R j ·A t-n when the instantaneous amplitude at n symbols previously is equal to or smaller than (smaller than) the threshold value. For example, an instantaneous amplitude at a time t : A t can be obtained from a following equation (5a) or (5b), where A t-n is the instantaneous amplitude at n symbols previously from the time t, r j is the first amplitude ratio (≦ 1) corresponding to the mapped code j, R j is the second amplitude ratio (≧ 1) corresponding to the mapped code j, and the threshold value of the instantaneous amplitude is 1. The operation after that and another constitution of this modulator are the same as these in the modulator shown in Fig. 4. Fig. 6 illustrates a third concrete constitution of a modulator in the first embodiment according to the present invention. In this example, the modulator substantially consists of a baseband processing circuit 601, the mixer 409 followed to this baseband processing circuit 501 and the carrier generator 410. The similar components in this modulator as these in the modulators shown in Figs. 4 and 5 are illustrated by using the same reference numerals, respectively. The baseband processing circuit 601 is provided with the code mapping circuit 402, the amplitude ratio setting circuit 502, the multipliers 503 and 504, the selector 505, the comparator 506, the shift register 406, the D/A converter 407 and the LPF 408. Data to be transmitted are inputted into the baseband processing circuit 601. In the processing circuit 601, a plurality of inputted data are mapped to a single code at the code mapping circuit 402. Two amplitude ratio values corresponding to this mapped code, a first amplitude ratio value r j equal to or smaller than 1 and a second amplitude ratio value R j equal to or greater than 1, are set at the amplitude ratio setting circuit 502. The product r j ·A t-n of the set first amplitude ratio r j and an instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 503. Also the product R j ·A t- n of the set second amplitude ratio R j and the instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 504. These two products are inputted into the selector 505. The comparator 506 compares the product R j ·A t-n with a threshold value to produce a selection signal. This selection signal is applied to the selector 505 so that the selector 505 outputs the product r j ·A t-n when the product R j ·A t-n is greater than (equal to or greater than) the threshold value and outputs the product R j ·A t-n when the product R j ·A t-n is equal to or smaller than (smaller than) the threshold value. For example, an instantaneous amplitude at a time t : A t can be obtained from a following equation (6a) or (6b), where A t-n is the instantaneous amplitude at n symbols previously from the time t, r j is the first amplitude ratio (≦ 1) corresponding to the mapped code j, R j is the second amplitude ratio (≧ 1) corresponding to the mapped code j, and the threshold value of the instantaneous amplitude is 1. The operation after that and another constitution of this modulator are the same as these in the modulator shown in Fig. 5. Hereinafter, it will be described with respect to constitutions of demodulators in the first embodiment according to the present invention. Fig. 7 illustrates a first concrete constitution of a demodulator. In this example, the demodulator substantially consists of an amplitude detection circuit 701, a shift register 706 and an amplitude ratio calculation circuit 707 followed to the amplitude detection circuit 701 and a decision circuit 708. The amplitude detection circuit 701 is provided with a mixer 702, a carrier generator 703, a LPF (Low Pass Filter) 704 and an A/D converter 705. Received wave A t ·cos(2π ·f c ·t) is inputted into the amplitude detection circuit 701. In the amplitude detection circuit 701, the inputted wave is first mixed at the mixer 702 with a carrier signal cos(2π ·f c ·t) having a frequency of f c provided from the carrier generator 703 which will be constituted by a frequency synthesizer or an oscillator. Then, higher harmonic component of the output signal from the mixer 702 is eliminated at the LPF 704 to obtain an instantaneous envelope level which is an amplitude component in the signal space. The obtained instantaneous envelope level is then converted into a digital signal at the A/D converter 705 and the converted digital instantaneous envelope level is applied to the shift register 706 and to the amplitude ratio calculation circuit 707. In this calculation circuit 707, a ratio A t / A t-n of the instantaneous envelope level at the current time A t and the instantaneous envelope level at n symbols previously A t-n provided from the shift register 706 is calculated by a following equation (7a) or (7b). Thus, the amplitude ratio r j or R j corresponding to the mapped code can be obtained. Then, demodulated data can be provided from the decision circuit 708 by deciding the code in accordance with the obtained amplitude ratio r j or R j . For example, if the first amplitude ratio r j and the second amplitude ratio R j are predetermined as: r j = 1 - k 1 · j / (j m - 1), R j = 1 + k 2 · j /(j m - 1) where k 1 and k 2 are positive constants, and j m is a multi-level value of an mapped code j corresponding to the amplitude ratio, this mapped code j can be decided from the following relationship (9) between the code j and the amplitude ratio r j or R j provided as a calculation result from the amplitude ratio calculation circuit 707. j = (1 - r j ) · (j m - 1) / k 1 , or j = (R j - 1) · (j m - 1) / k 2 The amplitude ratio calculation circuit 707 and the decision circuit 708 can be easily constituted by ROMs (Read Only Memories) and logic circuits, respectively. Fig. 8 illustrates an example of the amplitude ratio calculation circuit 707 in the demodulator shown in Fig. 7. As will be apparent from the figure, this calculation circuit consists of two 2-1 selectors 801 and 802, a comparator 803, an inverter 804 and a divider 805. The comparator 803 compares the current instantaneous amplitude A t with the instantaneous amplitude n symbols previously A t-n . Depending upon the comparison result, the selector 801 selects a smaller one (A S ) of the amplitudes A t and A t-n and the selector 802 selects a larger one (A L ) of the amplitudes A t and A t-n . If A t is equal to A t-n , these selectors 801 and 802 will output the same amplitude A t = A t-n as the selected values. These selected values A S and A L are inputted into the divider 805 and a ratio A S / A L is obtained. It should be noted this ratio (amplitude ratio of A t and A t-n ) is always equal to or less than 1. Fig. 9 illustrates a second concrete constitution of a demodulator . In this example, the demodulator substantially consists of an amplitude detection circuit 901, the shift register 706 and the amplitude ratio calculation circuit 707 followed to the amplitude detection circuit 901 and the decision circuit 708. The similar components in this demodulator as these in the demodulator shown in Fig. 7 are illustrated by using the same reference numerals, respectively. The amplitude detection circuit 901 is provided with a hybrid 902, the mixer 702, the LPF 704, the A/D converter 705 and a square root calculation circuit 903. Received wave A t ·cos(2π ·f c ·t) is inputted into the amplitude detection circuit 901. In the amplitude detection circuit 901, the inputted wave is branched at the hybrid 902 and the branched waves are mixed at the mixer 702 with each other. Then, higher harmonic component of the output signal from the mixer 702 is eliminated at the LPF 704 to obtain a square value of instantaneous envelope level in the signal space (square-law detection). The obtained square value is converted into a digital signal at the A/D converter 705. Then, a square root of the converted digital square value is calculated at the square root calculation circuit 903. The calculated value which corresponds to an instantaneous amplitude component in the signal space diagram is then applied to the shift register 706 and to the amplitude ratio calculation circuit 707. In this calculation circuit 707, a ratio A t / A t-n of the instantaneous amplitude at the current time A t and the instantaneous amplitude at n symbols previously A t-n provided from the shift register 706. The operation after that and another constitution of this demodulator are the same as these in the demodulator shown in Fig. 7. Fig. 10 illustrates a third concrete constitution of a demodulator. In this example, the demodulator substantially consists of a LOG (logarithmic) amplifier 1001, the amplitude detection circuit 701, the shift register 706 and an amplitude ratio calculation circuit 1002 followed to the amplitude detection circuit 701 and the decision circuit 708. The similar components in this demodulator as these in the demodulator shown in Fig. 7 are illustrated by using the same reference numerals, respectively. The amplitude ratio calculation circuit 1002 is provided with a subtracter 1003 and a LOG-linear conversion circuit 1004. Received wave A t ·cos(2π·f c ·t) is inputted into the LOG amplifier 1001 to be logarithmically amplified as: log {G · A t · cos(2π · f c · t)} where G is a constant. Then, in the amplitude detection circuit 701, a logarithmically amplified value of an instantaneous envelope level log(G·A t ) in the signal space is detected. The obtained logarithmically amplified value is then applied to the shift register 706 and to the amplitude ratio calculation circuit 1002. In this calculation circuit 1002, difference between the logarithmically amplified value of an instantaneous envelope level log(G·A t ) at the current time and a logarithmically amplified value of an instantaneous envelope level at n symbols previously log(G·A t-n ) provided from the shift register 706 is calculated at the subtracter 1003 by a following equation. log (A t / A t-n ) = log (G · A t ) - log (G A t-n ) The calculated difference is inversely logarithmically converted at the LOG-linear conversion circuit 1004 so that a ratio A t / A t-n of the instantaneous envelope level at the current time A t and the instantaneous envelope level at n symbols previously A t-n is obtained by a following equation (12a) or (12b). The operation after that and another constitution of this demodulator are the same as these in the demodulator shown in Fig. 7. Although, the amplitude of the received wave is detected after the logarithmic amplification in this demodulator shown in Fig. 10, the amplitude can be detected before the logarithmic amplification. It should be noted that the digital signal processing area and the analog signal processing area can be optionally determined by locations at which the D/A converters and the A/D converters are inserted, and are not limited to these in the above-mentioned examples. According to the first embodiment, since it is not necessary to detect an absolute amplitude, good demodulation characteristics can be expected even under a bad transmission condition of abrupt level changes. Composite modulation and demodulation systems can be constituted by combining the aforementioned modulators and demodulators according to the present invention with modulators and demodulators of another modulation methods, respectively. Fig. 11 illustrates a constitution of a composite modulation system constituted by combining a phase modulation system and the amplitude ratio modulation system in the first embodiment according to the present invention. At a modulating part in a transmitting side, a phase-modulated wave from a phase modulator 1101 is mixed at a mixer 1103 with an instantaneous amplitude ratio provided from a modulating signal production circuit 1102 according to the present invention. Thus, the phase modulated signal is further modulated by the instantaneous amplitude ratio. At a demodulating part in a receiving side, a received modulated wave is branched by a hybrid 1104. The branched waves are applied to a phase demodulator 1105 so as to provide a phase demodulated signal and to a demodulator 1106 according to the present invention so as to provide an amplitude ratio demodulated signal. Fig. 12 illustrates a constitution of a composite modulation system constituted by combining a frequency modulation system and the amplitude ratio modulation system in the first embodiment according to the present invention. At a modulating part in a transmitting side, a frequency-modulated wave from a frequency modulator 1201 is mixed at the mixer 1103 with an instantaneous amplitude ratio provided from the modulating signal production circuit 1102 according to the present invention. Thus, the frequency modulated signal is further modulated by the instantaneous amplitude ratio. At a demodulating part in a receiving side, a received modulated wave is branched by the hybrid 1104. The branched waves are applied to a frequency demodulator 1202 so as to provide a frequency demodulated signal and to the demodulator 1106 according to the present invention so as to provide an amplitude ratio demodulated signal. According to these composite modulation systems, transmission capacity can be easily increased without changing the structure of the conventional phase or frequency modulation system only by combining the conventional phase or frequency modulation system with the amplitude ratio modulation system according to the present invention. Fig. 13 illustrates a fourth concrete constitution of a demodulator for diversity combining. In this example, the demodulator substantially consists of amplitude detection circuits 1301 1 -1301 N , a summing circuit 1302, the shift register 706 and the amplitude ratio calculation circuit 707 followed to the summing circuit 1302 and the decision circuit 708. The similar components in this demodulator as these in the demodulator shown in Fig. 7 are illustrated by using the same reference numerals, respectively. Received waves at the branches #1-#N are inputted into the amplitude detection circuits 1301 1 -1301 N . In the amplitude detection circuits 1301 1 -1301 N , instantaneous envelope levels of the respective branches are obtained. The obtained instantaneous envelope levels of the respective branches are summed at the summing circuit 1302 to provide an instantaneous amplitude signal. After that, the same operations as that in the demodulator of Fig. 7 are performed to obtain a ratio A t /A t-n of the instantaneous amplitude at the current time A t and the instantaneous amplitude at n symbols previously A t-n . Then, the demodulated data can be obtained. Another constitution of this demodulator are the same as these in the demodulator of Fig. 7. Since information exist in the amplitude ratio between the symbols not in the absolute amplitude according to the first embodiment of the present invention, diversity combining with the maximum gain is possible only by summing the detected amplitudes of the branches. As shown in Fig. 14, in a second embodiment according to the present invention, a modulating part in a transmitting side is substantially constituted by a code mapping unit 1401, an amplitude ratio processing part consisting of the amplitude ratio setting unit 203, the amplitude ratio control unit 204, the instantaneous amplitude production unit 205 and the n-symbol delay unit 206, a phase setting unit 1402, and an amplitude and phase modulation unit 1403. The similar components in this modulating side as these in the modulating side shown in Fig. 2 are illustrated by using the same reference numerals, respectively. Data to be transmitted are inputted into the code mapping unit 1401 wherein a plurality of the inputted data are mapped to a single code. An absolute phase  i in the signal space corresponding to this mapped code is set as an instantaneous phase  t at the phase setting unit 1402. Also, an amplitude ratio value corresponding to this mapped code is set at the amplitude ratio setting unit 203, and then the product of the set amplitude ratio value and an instantaneous amplitude at n symbols previously in time (n is a natural number) outputted from the n-symbol delay unit 206 is produced at the instantaneous amplitude production unit 205 as a current instantaneous amplitude A t . If only one amplitude ratio value is given for each of the mapped codes, the instantaneous amplitude from the production unit 205 may be gradually increased to diverge when codes corresponding to an amplitude ratio value greater than 1 are successively provided or the instantaneous amplitude from the production unit 205 may be gradually decreased to converge to 0 when codes corresponding to an amplitude ratio value smaller than 1 are successively provided. Thus, in this second embodiment also, two amplitude ratio values, a first amplitude ratio value equal to or smaller than 1 and a second amplitude ratio value equal to or greater than 1, are prepared for a single mapped code, and a threshold value of the amplitude ratio values is predetermined. In the amplitude ratio control unit 204, an instantaneous amplitude at n symbols previously is compared with the threshold value so that the first amplitude ratio equal to or smaller than 1 is outputted from the amplitude ratio setting unit 203 when the instantaneous amplitude at n symbols previously is greater than the threshold value and that the second amplitude ratio equal to or greater than 1 is outputted from the setting unit 203 when the instantaneous amplitude at n symbols previously is equal to or smaller than the threshold value. Thus decided amplitude ratio is applied to the instantaneous amplitude production unit 205 and the product of the decided amplitude ratio and an instantaneous amplitude at n symbols previously is produced therein. As a result, the instantaneous amplitude can be prevented from diverging or from converging to 0. Operations in the amplitude ratio processing part consisting of the amplitude ratio setting unit 203, the amplitude ratio control unit 204, the instantaneous amplitude production unit 205 and the n-symbol delay unit 206 are the same as these in the modulating side in the first embodiment shown in Fig. 2. The intermediate frequency carrier or radio frequency carrier is modulated by thus obtained instantaneous phase  t and instantaneous amplitude A t at the amplitude and phase modulation unit 1403 to output an amplitude and phase modulated intermediate frequency (IF) wave or radio frequency (RF) wave. As shown in Fig. 15, a demodulating part in a receiving side is substantially constituted by an amplitude and absolute phase detection unit 1501, the n-symbol delay unit 302, the amplitude ratio calculation unit 303 and a decision unit 1502. The similar components in this demodulating side as these in the demodulating side shown in Fig. 3 are illustrated by using the same reference numerals, respectively. Received wave is inputted into the amplitude and absolute phase detection unit 1501, and thus an absolute phase and an instantaneous envelope level in the signal space are detected. The absolute phase is detected by recovering a carrier in the received wave. As well as done in the first embodiment, a ratio of the instantaneous envelope level at the current time and the instantaneous envelope level at n symbols previously provided from the n-symbol delay unit 302 is calculated at the amplitude ratio calculation unit 303. Then, the demodulated data are provided from the decision unit 1502 by deciding the mapped code in accordance with the obtained absolute phase and amplitude ratio. Hereinafter, constitutions of modulators in the second embodiment according to the present invention are described. Fig. 16 illustrates a first concrete constitution of a modulator in the second embodiment according to the present invention. In this example, the modulator substantially consists of a code mapping circuit 1601, a phase setting circuit 1602, the amplitude ratio setting circuit 403, the amplitude ratio control circuit 404, the multiplier 405, the shift register 406, an amplitude and phase modulation circuit 1603 and the carrier generator 410. The similar components in this modulator as these in the modulator shown in Fig. 4 are illustrated by using the same reference numerals, respectively. Data to be transmitted are inputted into the code mapping circuit 1601. In the circuit 1601, a plurality of inputted data are mapped to a single code. An absolute phase  i in the signal space corresponding to this mapped code is set as an instantaneous phase  t at the phase setting circuit 1602. Also, an amplitude ratio value corresponding to this mapped code is set at the amplitude ratio setting circuit 403, and then the product of the set amplitude ratio value and an instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 405 as a current instantaneous amplitude A t . As is the similar manner in the modulator of the first embodiment shown in Fig. 4, in the amplitude ratio setting circuit 403, two amplitude ratio values, a first amplitude ratio value r j equal to or smaller than 1 and a second amplitude ratio value R j equal to or greater than 1, are prepared for a single mapped code. In the amplitude ratio control circuit 404, an instantaneous amplitude at n symbols previously is compared with a predetermined threshold value so that the first amplitude ratio r j equal to or smaller than 1 is outputted from the amplitude ratio setting circuit 403 when the instantaneous amplitude at n symbols previously is greater than (equal to or greater than ) the threshold value and that the second amplitude ratio R j equal to or greater than 1 is outputted from the setting circuit 403 when the instantaneous amplitude at n symbols previously is equal to or smaller than (smaller than) the threshold value. Accordingly, a finite instantaneous amplitude without diverging and converging to 0 can be obtained as is in the modulator of Fig. 4. The intermediate frequency carrier or radio frequency carrier is modulated by thus obtained instantaneous phase  t and instantaneous amplitude A t at the amplitude and phase modulation circuit 1603 to output an amplitude and phase modulated intermediate frequency (IF) wave or radio frequency (RF) wave. The code mapping circuit 1601 and the amplitude ratio setting circuit 1602 can be easily constituted by ROMs (Read Only Memories) and logic circuits, respectively. Fig. 17 illustrates an example of the amplitude and phase modulation circuit 1603 in the modulator shown in Fig. 16. As will be apparent from the figure, this modulation circuit consists of a cosine (COS) ROM 1701, a sine (SIN) ROM 1702, two multipliers 1703 and 1704, two band limiting filters 1705 and 1706, two D/A converters 1707 and 1708, two LPFs 1709 and 1710 and a quadrature modulator 1711. The quadrature modulator 1711 is provided with two mixers 1712 and 1713, an adder 1714, π/2 phase shifter 1715 and a hybrid 1716. The instantaneous phase  t is inputted into the COS ROM 1701 and the SIN ROM 1702 to provide its cosine component value cos t and sine component value sin t , respectively. The cosine component value is multiplied with the instantaneous amplitude A t at the multiplier 1703 and the sine component value is multiplied with the instantaneous amplitude A t at the multiplier 1704 to provide baseband signals of the rectangular coordinate system consisting of an amplitude in-phase component (I component) A t ·cos t and an amplitude quadrature component (Q component) A t ·sin t , respectively. The baseband signals are Nyquist pulse shaped at the band limiting filters 1705 and 1706, and then converted into analog signals at the D/A converters 1707 and 1708, respectively. These analog signals are then smoothed at the LPFs 1709 and 1710, respectively. At the quadrature modulator 1711, the smoothed analog signals quadrature modulate radio frequency or intermediate frequency carrier with a frequency of f c , which is applied from the carrier generator 410, to provide a modulated wave A t ·cos( t +2π·f c ·t) The amplitude and phase modulation circuit 1603 in the modulator shown in Fig. 16 can be constituted by any one of various known modulation circuits other than that shown in Fig. 17. Thus, the modulation circuit 1603 is not limited to that shown in Fig. 17. Fig. 18 illustrates a second concrete constitution of a modulator in the second embodiment according to the present invention. In this example, the modulator substantially consists of the code mapping circuit 1601, the phase setting circuit 1602, the amplitude ratio setting circuit 502, the multipliers 503 and 504, the selector 505, the comparator 506, the shift register 406, the amplitude and phase modulation circuit 1603 and the carrier generator 410. The similar components in this modulator as these in the modulator shown in Fig. 5 are illustrated by using the same reference numerals, respectively. Data to be transmitted are inputted into the code mapping circuit 1601. In the circuit 1601, a plurality of inputted data are mapped to a single code. An absolute phase  i in the signal space corresponding to this mapped code is set as an instantaneous phase  t at the phase setting circuit 1602. Also, two amplitude ratio values corresponding to this mapped code, a first amplitude ratio value r j equal to or smaller than 1 and a second amplitude ratio value R j equal to or greater than 1, are set at the amplitude ratio setting circuit 502 as is in the modulator of Fig. 5. The product r j ·A t-n of the set first amplitude ratio r j and an instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 503. Also the product R j ·A t-n of the set second amplitude ratio R j and the instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 504. These two products are inputted into the selector 505. The comparator 506 compares the instantaneous amplitude at n symbols previously A t-n with a threshold value to produce a selection signal. This selection signal is applied to the selector 505 so that the selector 505 outputs the product r j ·A t-n when the instantaneous amplitude at n symbols previously is greater than (equal to or greater than) the threshold value and outputs the product R j ·A t-n when the instantaneous amplitude at n symbols previously is equal to or smaller than (smaller than) the threshold value. Accordingly, a finite instantaneous amplitude without diverging and converging to 0 can be obtained as is in the modulator of Fig. 5. The intermediate frequency carrier or radio frequency carrier is modulated by thus obtained instantaneous phase  t and instantaneous amplitude A t at the amplitude and phase modulation circuit 1603 to output an amplitude and phase modulated intermediate frequency (IF) wave or radio frequency (RF) wave. The operation after that and another constitution of this modulator are the same as these in the modulator shown in Fig. 16. Fig. 19 illustrates a third concrete constitution of a modulator in the second embodiment according to the present invention. In this example, the modulator substantially consists of the code mapping circuit 1601, the phase setting circuit 1602, the amplitude ratio setting circuit 502, the multipliers 503 and 504, the selector 505, the comparator 506, the shift register 406, the amplitude and phase modulation circuit 1603 and the carrier generator 410. The similar components in this modulator as these in the modulator shown in Figs. 5 and 6 are illustrated by using the same reference numerals, respectively. Data to be transmitted are inputted into the code mapping circuit 1601. In the circuit 1601, a plurality of inputted data are mapped to a single code. An absolute phase  i in the signal space corresponding to this mapped code is set as an instantaneous phase  t at the phase setting circuit 1602. Also, two amplitude ratio values corresponding to this mapped code, a first amplitude ratio value r j equal to or smaller than 1 and a second amplitude ratio value R j equal to or greater than 1, are set at the amplitude ratio setting circuit 502 as is in the modulator of Fig. 5. The product r j ·A t-n of the set first amplitude ratio r j and an instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 503. Also the product R j ·A t-n of the set second amplitude ratio R j and the instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 504. These two products are inputted into the selector 505. The comparator 506 compares the product R j ·A t-n with a threshold value to produce a selection signal. This selection signal is applied to the selector 505 so that the selector 505 outputs the product r j ·A t-n when the product R j ·A t-n is greater than (equal to or greater than) the threshold value and outputs the product R j ·A t-n when the product R j ·A t-n is equal to or smaller than (smaller than) the threshold value. Accordingly, a finite instantaneous amplitude without diverging and converging to 0 can be obtained as is in the modulator of Fig. 6. The intermediate frequency carrier or radio frequency carrier is modulated by thus obtained instantaneous phase  t and instantaneous amplitude A t at the amplitude and phase modulation circuit 1603 to output an amplitude and phase modulated intermediate frequency (IF) wave or radio frequency (RF) wave. The operation after that and another constitution of this modulator are the same as these in the modulator shown in Fig. 18. Hereinafter, constitutions of demodulators in the second embodiment according to the present invention are described. Fig. 20 illustrates a first concrete constitution of a demodulator. In this example, the demodulator substantially consists of an amplitude and absolute phase detection circuit 2001, the shift register 706 and the amplitude ratio calculation circuit 707 followed to the detection circuit 2001 and a decision circuit 2002. The similar components in this demodulator as these in the demodulator shown in Fig. 7 are illustrated by using the same reference numerals, respectively. Received wave A t ·cos(2π ·f c ·t) is inputted into the amplitude and absolute phase detection circuit 2001, and thus an absolute phase  t and an instantaneous envelope level A t in the signal space are detected. With respect to phase, an instantaneous phase  t is the absolute phase  i detected by recovering a carrier in the received wave. With respect to amplitude, as well as done in the demodulator of Fig. 7 in the first embodiment, a ratio A t / A t-n of the instantaneous envelope level at the current time A t and the instantaneous envelope level at n symbols previously A t-n provided from the shift register 706 is calculated at the amplitude ratio calculation circuit 707 to provide r j or R j corresponding to the mapped code. Demodulated data can be obtained from the decision circuit 2002 by deciding the mapped code in accordance with thus obtained absolute phase  i and amplitude ratio r j or R j . For example, if the absolute phase  i , and the first amplitude ratio r j or the second amplitude ratio R j are predetermined at the transmitting side as:  i = 2π · i / i m where i m is a multi-level value of an mapped code i corresponding to the absolute phase, and r j = 1 - k 1 · j / (j m - 1), R j = 1 + k 2 · j / (j B - 1) where k 1 and k 2 are positive constants, and j m is a multi-level value of an mapped code j corresponding to the amplitude ratio, the mapped code i for absolute phase can be decided from the following relationship (15) between the code i and the detected absolute phase  i provided from the detection circuit 2001, i =  i · i m /2π and also the mapped code j for amplitude ratio can be decided from the following relationship (16) between the code j and the amplitude ratio r j or R j provided as a calculation result from the amplitude ratio calculation circuit 707. J = (1 - r j ) · (j m - 1) / k 1 , or j = (R j - 1) · (j m - 1) / k 2 The decision circuit 2002 can be easily constituted by ROM (Read Only Memory) and logic circuit. Fig. 21 illustrates an example of the amplitude and absolute phase detection circuit 2001 in the demodulator shown in Fig. 20. As will be apparent from the figure, this detection circuit 2001 consists of a hybrid 2101, a synchronous phase detection circuit 2102 and an amplitude detection circuit 2103. The received wave is branched at the hybrid 2101 and applied to the synchronous phase detection circuit 2102 and to the amplitude detection circuit 2103. In the synchronous phase detection circuit 2102, an absolute phase in the signal space is detected, and in the amplitude detection circuit 2103, an instantaneous envelope level which is an instantaneous amplitude in the signal space is detected. As for the synchronous phase detection circuit 2102, various absolute phase detectors such as a synchronous detector using carrier multiplying method or Costas circuit can be adapted. As for the amplitude detection circuit 2103, the amplitude detection circuit 701 shown in Fig. 7 can be adapted. Fig. 22 illustrates an another example of the amplitude and absolute phase detection circuit 2001 in the demodulator shown in Fig. 20. As will be apparent from this figure, this detection circuit 2001 consists of a quadrature detector 2201, a hybrid 2202, a carrier recovery circuit 2203, two A/D converters 2211 and 2212 and calculation circuits 2213 and 2214. The quadrature detector 2201 is provided with two hybrids 2204 and 2205, two mixers 2206 and 2207, a π/2 phase shifter 2208 and two LPFs 2209 and 2210. The received wave A t ·cos(2π ·f c ·t) is branched at the hybrid 2202 and applied to the quadrature detector 2201 and to the carrier recovery circuit 2203. In the carrier recovery circuit 2203, a carrier with a frequency f c is recovered from the received wave. In the quadrature detector 2201, the received wave is quadrature detected by this recovered carrier to provide baseband signals of the rectangular coordinate system consisting of I component I = A t ·cos t and Q component Q = A t ·sin t . The baseband signals are converted into digital signals at the A/D converters 2211 and 2212, respectively. These digital signals are then applied to the calculation circuit 2213 to provide an instantaneous phase  t which is the absolute phase  i in the signal space. Also these digital signals are applied to the calculation circuit 2214 to provide an instantaneous envelope level A t which is an instantaneous amplitude in the signal space. The amplitude and absolute phase detection circuit 2001 in the demodulator shown in Fig. 20 can be constituted by any one of various known detection circuits other than that shown in Fig. 22. Thus, the detection circuit 2001 is not limited to these shown in Figs. 21 and 22. Fig. 23 illustrates a second concrete constitution of a demodulator . In this example, the demodulator substantially consists of the LOG (logarithmic) amplifier 1001, the amplitude and absolute phase detection circuit 2001, the shift register 706 and the amplitude ratio calculation circuit 1002 followed to the amplitude and absolute phase detection circuit 2001 and the decision circuit 2002. The similar components in this demodulator as these in the demodulators shown in Figs. 10 and 20 are illustrated by using the same reference numerals, respectively. The amplitude ratio calculation circuit 1002 is provided with the subtracter 1003 and the LOG-linear conversion circuit 1004. Received wave A t ·cos(2π ·f c ·t) is inputted into the LOG amplifier 1001 to be logarithmically amplified as log {G A t · cos(2π · f c · t)}, where G is a constant. Then, in the amplitude and absolute phase detection circuit 2001, an absolute phase  t and an instantaneous amplitude A t are detected. With respect to phase, an instantaneous phase  t is the absolute phase  i detected by recovering a carrier in the received wave as well as done in the demodulator of Fig. 20. With respect to amplitude, as well as done in the demodulator of Fig. 10 in the first embodiment, a ratio A t / A t-n of the instantaneous amplitude at the current time A t and the instantaneous amplitude at n symbols previously A t-n provided from the shift register 706 is calculated at the amplitude ratio calculation circuit 1003 to provide r j or R j corresponding to the mapped code. Demodulated data can be obtained from the decision circuit 2002 by deciding the mapped code in accordance with thus obtained absolute phase  i and amplitude ratio r j or R j . Although, the amplitude of the received wave is detected after the logarithmic amplification in this demodulator shown in Fig. 23, the amplitude can be detected before the logarithmic amplification. According to the second embodiment as well as in the first embodiment, since it is not necessary to detect an absolute amplitude, good demodulation characteristics can be expected even under a bad transmission condition of abrupt level changes. Fig. 24 illustrates a third concrete constitution of a demodulator for diversity combining. In this example, the demodulator substantially consists of amplitude and absolute phase detection circuits 2401 1 -2401 N , a selection circuit 2402, the summing circuit 1302, the shift register 706 and the amplitude ratio calculation circuit 707 followed to the summing circuit 1302 and the decision circuit 2002. The similar components in this demodulator as these in the demodulators shown in Figs. 7, 13 and 20 are illustrated by using the same reference numerals, respectively. Received waves at the branches #1-#N are inputted into the amplitude and absolute phase detection circuits 2401 1 -2401 N . In the detection circuits 2401 1 -2401 N , absolute phases and instantaneous envelope levels which are instantaneous amplitudes, of the respective branches are obtained. The obtained absolute phases of the respective branches are inputted into the selection circuit 2402 and then one of the absolute phases is selected depending upon the instantaneous envelope levels of the respective branches (selection combining). On the other hand, the obtained instantaneous envelope levels of the respective branches are summed at the summing circuit 1302 to provide an instantaneous amplitude signal. After that, the same operations as that in the demodulator of Fig. 20 are performed to obtain a ratio A t / A t- n of the instantaneous amplitude at the current time A t and the instantaneous amplitude at n symbols previously A t-n . Then, the demodulated data can be obtained. Fig. 25 illustrates a fourth concrete constitution of a demodulator for diversity combining . In this example, the demodulator substantially consists of hybrids 2501 1 -2501 N , amplitude detection circuits 2502 1 -2502 N , a selection circuit 2503, the synchronous phase detection circuit 2102 followed to the selection circuit 2503, the summing circuit 1302, the shift register 706 and the amplitude ratio calculation circuit 707 followed to the summing circuit 1302 and the decision circuit 2002. The similar components in this demodulator as these in the demodulators shown in Figs. 7, 13, 20 and 21 are illustrated by using the same reference numerals, respectively. Received waves at the branches #1-#N are branched at the hybrids 2501 1 -2501 N , respectively and then inputted into the amplitude detection circuits 2502 1 -2502 N and into the selection circuit 2503, respectively. In the detection circuits 2502 1 -2502 N . instantaneous envelope levels which are instantaneous amplitudes, of the respective branches are detected. In the selection circuit 2503, one of the received waves is selected depending upon the detected instantaneous envelope levels form the respective detection circuits 2502 1 -2502 N . The selected received wave is applied to the synchronous phase detection circuit 2102 and thus an absolute phase  i is obtained. On the other hand, the obtained instantaneous envelope levels of the respective branches are summed at the summing circuit 1302 to provide an instantaneous amplitude signal. After that, the same operations as that in the demodulator of Fig. 20 are performed to obtain a ratio A t / A t-n of the instantaneous amplitude at the current time A t and the instantaneous amplitude at n symbols previously A t-n . Then, the demodulated data can be obtained. Since information exist in the amplitude ratio between the symbols not in the absolute amplitude according to the second embodiment as well as in the first embodiment of the present invention, diversity combining with the maximum gain is possible only by summing the detected amplitudes of the branches. With respect to phase combining, another combining methods such as an equal gain combining or maximal ratio combining can be utilized other than the aforementioned selection combining. As shown in Fig. 26, in a third embodiment according to the present invention, a modulating part in a transmitting side is substantially constituted by the code mapping unit 1401, an amplitude ratio processing part consisting of the amplitude ratio setting unit 203, the amplitude ratio control unit 204, the instantaneous amplitude production unit 205 and the n-symbol delay unit 206, a phase difference setting unit 2601, an instantaneous phase production unit 2602, a n-symbol delay unit 2603 and the amplitude and phase modulation unit 1403. The similar components in this modulating side as these in the modulating sides shown in Figs. 2 and 14 are illustrated by using the same reference numerals, respectively. Data to be transmitted are inputted into the code mapping unit 1401 wherein a plurality of the inputted data are mapped to a single code. A phase difference  i corresponding to this mapped code is set at the phase difference setting unit 2601. An instantaneous phase at n symbols previously in time (n is a natural number)  t-n outputted from the n-symbol delay unit 2603 is added to this phase difference  i to produce an instantaneous phase  t at the instantaneous phase production unit 2602. Also, an amplitude ratio corresponding to this mapped code is set at the amplitude ratio setting unit 203, and then the product of the set amplitude ratio value and an instantaneous amplitude at n symbols previously in time outputted from the n-symbol delay unit 206 is produced at the instantaneous amplitude production unit 205 as a current instantaneous amplitude A t . If only one amplitude ratio value is given for each of the mapped codes, the instantaneous amplitude from the production unit 205 may be gradually increased to diverge when codes corresponding to an amplitude ratio value greater than 1 are successively provided or the instantaneous amplitude from the production unit 205 may be gradually decreased to converge to 0 when codes corresponding to an amplitude ratio value smaller than 1 are successively provided. Thus, in this second embodiment also, two amplitude ratio values, a first amplitude ratio value equal to or smaller than 1 and a second amplitude ratio value equal to or greater than 1, are prepared for a single mapped code, and a threshold value of the amplitude ratio values is predetermined. In the amplitude ratio control unit 204, an instantaneous amplitude at n symbols previously is compared with the threshold value so that the first amplitude ratio equal to or smaller than 1 is outputted from the amplitude ratio setting unit 203 when the instantaneous amplitude at n symbols previously is greater than the threshold value and that the second amplitude ratio equal to or greater than 1 is outputted from the setting unit 203 when the instantaneous amplitude at n symbols previously is equal to or smaller than the threshold value. Thus decided amplitude ratio is applied to the instantaneous amplitude production unit 205 and the product of the decided amplitude ratio and an instantaneous amplitude at n symbols previously is produced therein. As a result, the instantaneous amplitude can be prevented from diverging or from converging to 0. Operations in the amplitude ratio processing part consisting of the amplitude ratio setting unit 203, the amplitude ratio control unit 204, the instantaneous amplitude production unit 205 and the n-symbol delay unit 206 are the same as these in the modulating side in the first embodiment shown in Fig. 2. The intermediate frequency carrier or radio frequency carrier is modulated by thus obtained instantaneous phase  t and instantaneous amplitude A t at the amplitude and phase modulation unit 1403 to output an amplitude and phase modulated intermediate frequency (IF) wave or radio frequency (RF) wave. As shown in Fig. 27, a demodulating part in a receiving side is substantially constituted by an amplitude and phase detection unit 2701, the n-symbol delay unit 302, the amplitude ratio calculation unit 303, a n-symbol delay unit 2702, a phase difference calculation unit 2703 and a decision unit 2704. The similar components in this demodulating side as these in the demodulating side shown in Fig. 3 are illustrated by using the same reference numerals, respectively. Received wave is inputted into the amplitude and phase detection unit 2701, and thus an instantaneous phase and an instantaneous amplitude are obtained by detecting a phase component and an amplitude component of the received wave. With respect to phase, a phase difference between an instantaneous phase at the current time and an instantaneous phase at n symbols previously provided from the n-symbol delay unit 2702 is calculated at the phase difference calculation unit 2703. With respect to amplitude, as well as done in the first embodiment, a ratio of the instantaneous envelope level at the current time and the instantaneous envelope level at n symbols previously provided from the n-symbol delay unit 302 is calculated at the amplitude ratio calculation unit 303. Then, the demodulated data are provided from the decision unit 2704 by deciding the mapped code in accordance with the obtained phase difference and amplitude ratio. Hereinafter, constitutions of modulators in the third embodiment according to the present invention are described. Fig. 28 illustrates a first concrete constitution of a modulator in the third embodiment according to the present invention. In this example, the modulator substantially consists of the code mapping circuit 1601, a phase difference processing part constituted by a phase difference setting circuit 2801, an adder 2802 and a shift register 2803, an amplitude ratio processing part constituted by the amplitude ratio setting circuit 403, the amplitude ratio control circuit 404, the multiplier 405 and the shift register 406, the amplitude and phase modulation circuit 1603 and the carrier generator 410. The similar components in this modulator as these in the modulators shown in Figs. 4 and 16 are illustrated by using the same reference numerals, respectively. Data to be transmitted are inputted into the code mapping circuit 1601. In the circuit 1601, a plurality of inputted data are mapped to a single code. A phase difference  i corresponding to this mapped code is set at the phase difference setting circuit 2801. An instantaneous phase  t =  i +  t-n is obtained by adding at the adder 2802 an instantaneous phase at n symbols previously in time (n is a natural number)  t-n outputted from the shift register 2803 to this phase difference  i . Also, an amplitude ratio corresponding to this mapped code is set at the amplitude ratio setting circuit 403, and then the product of the set amplitude ratio value and an instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 405 as a current instantaneous amplitude A t . As is the similar manner in the modulator of the first embodiment shown in Fig. 4, in the amplitude ratio setting circuit 403, two amplitude ratio values, a first amplitude ratio value r j equal to or smaller than 1 and a second amplitude ratio value R j equal to or greater than 1, are prepared for a single mapped code. In the amplitude ratio control circuit 404, an instantaneous amplitude at n symbols previously is compared with a predetermined threshold value so that the first amplitude ratio r j equal to or smaller than 1 is outputted from the amplitude ratio setting circuit 403 when the instantaneous amplitude at n symbols previously is greater than (equal to or greater than ) the threshold value and that the second amplitude ratio R j equal to or greater than 1 is outputted from the setting circuit 403 when the instantaneous amplitude at n symbols previously is equal to or smaller than (smaller than) the threshold value. Accordingly, a finite instantaneous amplitude without diverging and converging to 0 can be obtained as is in the modulator of Fig. 4. The intermediate frequency carrier or radio frequency carrier is modulated by thus obtained instantaneous phase  t and instantaneous amplitude A t at the amplitude and phase modulation circuit 1603 to output an amplitude and phase modulated intermediate frequency (IF) wave or radio frequency (RF) wave. Another constitutions of this modulator is the same as that in the modulator in the second embodiment shown in Fig. 16. Fig. 29 illustrates a second concrete constitution of a modulator in the third embodiment according to the present invention. In this example, the modulator substantially consists of the code mapping circuit 1601, a phase processing part constituted by the phase difference setting circuit 2801, the adder 2802 and the shift register 2803, an amplitude ratio processing part constituted by the amplitude ratio setting circuit 502, the multipliers 503 and 504, the selector 505, the comparator 506 and the shift register 406, the amplitude and phase modulation circuit 1603 and the carrier generator 410. The similar components in this modulator as these in the modulators shown in Figs. 5, 18 and 28 are illustrated by using the same reference numerals, respectively. Data to be transmitted are inputted into the code mapping circuit 1601. In the circuit 1601, a plurality of inputted data are mapped to a single code. A phase difference  i corresponding to this mapped code is set at the phase difference setting circuit 2801. An instantaneous phase  t =  i +  t-n is obtained by adding at the adder 2802 an instantaneous phase at n symbols previously in time (n is a natural number)  t-n outputted from the shift register 2803 to this phase difference  i . Also, two amplitude ratio values corresponding to this mapped code, a first amplitude ratio value r j equal to or smaller than 1 and a second amplitude ratio value R j equal to or greater than 1, are set at the amplitude ratio setting circuit 502 as is in the modulator of Fig. 5. The product r j ·A t-n of the set first amplitude ratio r j and an instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 503. Also the product R j ·A t-n of the set second amplitude ratio R j and the instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 504. These two products are inputted into the selector 505. The comparator 506 compares the instantaneous amplitude at n symbols previously A t-n with a threshold value to produce a selection signal. This selection signal is applied to the selector 505 so that the selector 505 outputs the product r j ·A t-n when the instantaneous amplitude at n symbols previously is greater than (equal to or greater than) the threshold value and outputs the product R j ·A t-n when the instantaneous amplitude at n symbols previously is equal to or smaller than (smaller than) the threshold value. Accordingly, a finite instantaneous amplitude without diverging and converging to 0 can be obtained as is in the modulator of Fig. 5. The intermediate frequency carrier or radio frequency carrier is modulated by thus obtained instantaneous phase  t and instantaneous amplitude A t at the amplitude and phase modulation circuit 1603 to output an amplitude and phase modulated intermediate frequency (IF) wave or radio frequency (RF) wave. The operation after that and another constitution of this modulator are the same as these in the modulator shown in Fig. 28. Fig. 30 illustrates a third concrete constitution of a modulator in the third embodiment according to the present invention. In this example, the modulator substantially consists of the code mapping circuit 1601, a phase processing part constituted by the phase difference setting circuit 2801, the adder 2802 and the shift register 2803, an amplitude ratio processing part constituted by the amplitude ratio setting circuit 502, the multipliers 503 and 504, the selector 505, the comparator 506 and the shift register 406, the amplitude and phase modulation circuit 1603 and the carrier generator 410. The similar components in this modulator as these in the modulators shown in Figs. 6, 19 and 29 are illustrated by using the same reference numerals, respectively. Data to be transmitted are inputted into the code mapping circuit 1601. In the circuit 1601, a plurality of inputted data are mapped to a single code. A phase difference  i corresponding to this mapped code is set at the phase difference setting circuit 2801. An instantaneous phase  t =  i +  t-n is obtained by adding at the adder 2802 an instantaneous phase at n symbols previously in time (n is a natural number)  t-n outputted from the shift register 2803 to this phase difference  i . Also, two amplitude ratio values corresponding to this mapped code, a first amplitude ratio value r j equal to or smaller than 1 and a second amplitude ratio value R j equal to or greater than 1, are set at the amplitude ratio setting circuit 502 as is in the modulator of Fig. 5. The product r j ·A t-n of the set first amplitude ratio r j and an instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 503. Also the product R j ·A t-n of the set second amplitude ratio R j and the instantaneous amplitude at n symbols previously A t-n outputted from the shift register 406 is produced at the multiplier 504. These two products are inputted into the selector 505. The comparator 506 compares the product R j ·A t-n with a threshold value to produce a selection signal. This selection signal is applied to the selector 505 so that the selector 505 outputs the product r j ·A t-n when the product R j ·A t-n is greater than (equal to or greater than) the threshold value and outputs the product R j ·A t-n when the product R j ·A t-n is equal to or smaller than (smaller than) the threshold value. Accordingly, a finite instantaneous amplitude without diverging and converging to 0 can be obtained as is in the modulator of Fig. 6. The intermediate frequency carrier or radio frequency carrier is modulated by thus obtained instantaneous phase  t and instantaneous amplitude A t at the amplitude and phase modulation circuit 1603 to output an amplitude and phase modulated intermediate frequency (IF) wave or radio frequency (RF) wave. The operation after that and another constitution of this modulator are the same as these in the modulator shown in Fig. 29. Hereinafter, constitutions of demodulators in the third embodiment according to the present invention are described. Fig. 31 illustrates a first concrete constitution of a demodulator. In this example, the demodulator substantially consists of an amplitude and phase detection circuit 3101, the shift register 706 and the amplitude ratio calculation circuit 707 followed to the detection circuit 3101, a shift register 3102 and a subtracter 3103 followed to the detection circuit 3101, and a decision circuit 3104. The similar components in this demodulator as these in the demodulator shown in Fig. 7 are illustrated by using the same reference numerals, respectively. Received wave A t ·cos( t + 2π ·f c ·t) is inputted into the amplitude and phase detection circuit 3101, and thus an instantaneous phase  t + 0 and an instantaneous amplitude A t are detected where  0 is a constant. With respect to phase, a phase difference  i =  t -  t-n between the instantaneous phase  t + 0 and an instantaneous phase at n symbols previously  t-n + 0 outputted from the shift register 3102 is calculated at the subtracter 3103. With respect to amplitude, as well as done in the demodulator of Fig. 7 in the first embodiment, a ratio A t / A t-n of the instantaneous envelope level at the current time At and the instantaneous envelope level at n symbols previously A t-n provided from the shift register 706 is calculated at the amplitude ratio calculation circuit 707 to provide r j or R j corresponding to the mapped code. Demodulated data can be obtained from the decision circuit 3104 by deciding the mapped code in accordance with thus obtained phase difference  i and amplitude ratio r j or R j . Fig. 32 illustrates an example of the amplitude and phase detection circuit 3101 in the demodulator shown in Fig. 31. As will be apparent from this figure, this detection circuit 3101 consists of a local signal generator 3201, the quadrature detector 2201, the two A/D converters 2211 and 2212 and the calculation circuits 2213 and 2214. The quadrature detector 2201 is provided with the two hybrids 2204 and 2205, the two mixers 2206 and 2207, the π/2 phase shifter 2208 and the two LPFs 2209 and 2210. Received wave A t ·cos( t + 2π ·f c ·t) is inputted into the quadrature detector 2201. In the quadrature detector 2201, the received wave is semi-synchronous quadrature detected by a local signal with a frequency of f c from the local signal generator 3201 to provide baseband signals of the rectangular coordinate system consisting of I component I = A t ·cos( t +  0 ) and Q component Q = A t ·sin( t +  0 ), where  0 is a constant. The baseband signals are converted into digital signals at the A/D converters 2211 and 2212, respectively. These digital signals are then applied to the calculation circuit 2213 to provide an instantaneous phase  t +  0 . Also these digital signals are applied to the calculation circuit 2214 to provide an instantaneous amplitude A t . The amplitude and phase detection circuit 3101 in the demodulator shown in Fig. 31 can be constituted by any one of various known detection circuits other than that shown in Fig. 32. Thus, the detection circuit 3201 is not limited to that shown in Fig. 32. Fig. 33 illustrates a second concrete constitution of a demodulator . In this example, the demodulator substantially consists of the LOG (logarithmic) amplifier 1001, the amplitude and phase detection circuit 3101, the shift register 706 and the amplitude ratio calculation circuit 1002 followed to the detection circuit 3101, the shift register 3102 and the subtracter 3103 followed to the detection circuit 3101, and the decision circuit 3104. The similar components in this demodulator as these in the demodulators shown in Figs. 23 and 31 are illustrated by using the same reference numerals, respectively. The amplitude ratio calculation circuit 1002 is provided with the subtracter 1003 and the LOG-linear conversion circuit 1004. Received wave A t ·cos( t + 2π·f c ·t) is inputted into the LOG amplifier 1001 to be logarithmically amplified as log {G· A t ·cos( t + 2π·f c ·t)}, where G is a constant. Then, in the amplitude and phase detection circuit 3101, an instantaneous phase  t and an instantaneous amplitude A t are detected. With respect to phase, a phase difference  i (= t -  t-n ) is obtained as well as done in the demodulator of Fig. 31. With respect to amplitude, as well as done in the demodulators of Figs. 23 and 31, a ratio A t / A t-n of the instantaneous amplitude at the current time A t and the instantaneous amplitude at n symbols previously A t-n provided from the shift register 706 is calculated at the amplitude ratio calculation circuit 1002 to provide r j or R j corresponding to the mapped code. Demodulated data can be obtained from the decision circuit 3104 by deciding the mapped code in accordance with thus obtained phase difference  i and amplitude ratio r j or R j . Although, the amplitude of the received wave is detected after the logarithmic amplification in this demodulator shown in Fig. 33, the amplitude can be detected before the logarithmic amplification. Fig. 34 illustrates a third concrete constitution of a demodulator . In this example, the demodulator substantially consists of a hybrid 3401, the amplitude detection circuit 701, the shift register 706 and the amplitude ratio calculation circuit 707 followed to the detection circuit 701, a differential detection circuit 3402 followed to the hybrid 3401 and the decision circuit 3104. The similar components in this demodulator as these in the demodulators shown in Figs. 7 and 31 are illustrated by using the same reference numerals, respectively. Received wave A t ·cos( t + 2π ·f c ·t) is branched at the hybrid 3401 and then inputted into the differential detection circuit 3402 and into the amplitude detection circuit 701. With respect to phase, a phase difference  i (= t -  t-n ) is obtained at the differential detection circuit 3402. With respect to amplitude, as well as done in the demodulator of Fig. 7, a ratio A t / A t-n of the instantaneous envelope level at the current time A t and the instantaneous envelope level at n symbols previously A t-n is obtained to provide r j or R j corresponding to the mapped code. Demodulated data can be obtained from the decision circuit 3104 by deciding the mapped code in accordance with thus obtained phase difference  i and amplitude ratio r j or R j . Fig. 35 illustrates an example of the differential detection circuit 3402 in the demodulator shown in Fig. 34. As will be apparent from this figure, this detection circuit 3402 consists of a limiter amplifier 3501, the hybrid 2202, a delay circuit 3502, a quadrature detector constituted by the two hybrids 2204 and 2205, the two mixers 2206 and 2207, the π/2 phase shifter 2208 and the two LPFs 2209 and 2210, the two A/D converters 2211 and 2212 and the calculation circuit 2213. Received wave A t ·cos( t + 2π ·f c ·t) is inputted to the limiter amplifier 1501, and converted into a constant amplitude signal A·cos( t + 2π ·f c ·t), where A is a constant. The converted signal is then branched at the hybrid 2202, and thus a branched signal A·cos( t + 2π ·f c ·t) and a signal delayed by n symbols at the delay circuit 3502 A·cos{ t-n + 2π ·f c ·(t-n·T)} are provided, where T is a time for one symbol. A quadrature component of the delayed signal A·sin{ t-n + 2π·f c ·(t-n·T)} is provided by the π/2 phase shifter 2208. Therefore, from the mixers 2206 and 2207, A 2 ·cos( t + 2 π·f c ·t)·cos{ t-n + 2π·f c ·(t-n·T)} and A 2 ·cos( t + 2π·f c ·t)·sin{ t-n + 2π ·f c ·(t-n·T)} are provided. These signals are passed through the LPFs 2209 and 2210, and thus A 2 ·cos( t -  t-n + 2π ·f c ·n·T) and A 2 ·sin( t -  t-n + 2π ·f c ·n·T) are obtained. These signals are converted into digital signals at the A/D converters 2211 and 2212, respectively, and applied to the calculation circuit 2213 to provide a phase difference of  t -  t-n . The differential detection circuit 3402 in the demodulator shown in Fig. 34 can be constituted by any one of various known detection circuits other than that shown in Fig. 35. Thus, the detection circuit 3402 is not limited to that shown in Fig. 35. Fig. 36 illustrates a fourth concrete constitution of a demodulator. In this example, the demodulator substantially consists of the hybrid 3401, the LOG (logarithmic) amplifier 1001, the amplitude detection circuit 701, the shift register 706 and the amplitude ratio calculation circuit 1002 followed to the detection circuit 701, the differential detection circuit 3402 followed to the hybrid 3401 and the decision circuit 3104. The similar components in this demodulator as these in the demodulators shown in Figs. 7, 33 and 34 are illustrated by using the same reference numerals, respectively. The amplitude ratio calculation circuit 1002 is provided with the subtracter 1003 and the LOG-linear conversion circuit 1004. Received wave is branched at the hybrid 3401 and then inputted into the differential detection circuit 3402 and into the LOG amplifier 1001. With respect to phase, a phase difference  i is obtained at the differential detection circuit 3402. With respect to amplitude, as well as done in the demodulator of Fig. 33, r j or R j corresponding to the mapped code is obtained. Demodulated data can be obtained from the decision circuit 3104 by deciding the mapped code in accordance with thus obtained phase difference  i and amplitude ratio r j or R j . Although, the amplitude of the received wave is detected after the logarithmic amplification in this demodulator shown in Fig. 36, the amplitude can be detected before the logarithmic amplification. Fig. 37 illustrates a fifth concrete constitution of a demodulator for diversity combining. In this example, the demodulator substantially consists of amplitude and phase detection circuits 3701 1 -3701 N , the selection circuit 2402, the summing circuit 1302, the shift register 706 and the amplitude ratio calculation circuit 707 followed to the summing circuit 1302, the shift register 3102 and the subtracter 3103 followed to the selection circuit 2402, and the decision circuit 3104. The similar components in this demodulator as these in the demodulators shown in Figs. 7, 13, 20 and 31 are illustrated by using the same reference numerals, respectively. Received waves at the branches #1-#N are inputted into the amplitude and phase detection circuits 3701 1 -3701 N . In the detection circuits 3701 1 -3701 N , instantaneous phases and instantaneous envelope levels which are instantaneous amplitudes, of the respective branches are obtained. The obtained instantaneous phases of the respective branches are inputted into the selection circuit 2402 and then one of the instantaneous phases is selected depending upon the instantaneous envelope levels of the respective branches (selection combining). A phase difference  i =  t -  t-n between the instantaneous phase  t + 0 and an instantaneous phase at n symbols previously  t-n + 0 outputted from the shift register 3102 is calculated at the subtracter 3103. On the other hand, the obtained instantaneous envelope levels of the respective branches are summed at the summing circuit 1302 to provide an instantaneous amplitude signal. After that, the same operations as that in the demodulator of Fig. 7 are performed to obtain a ratio A t / A t-n of the instantaneous amplitude at the current time A t and the instantaneous amplitude at n symbols previously A t-n . As a result, r j or R j corresponding to the mapped code is obtained. Demodulated data can be obtained from the decision circuit 3104 by deciding the mapped code in accordance with thus obtained phase difference  i and amplitude ratio r j or R j . Fig. 38 illustrates a sixth concrete constitution of a demodulator for diversity combining . In this example, the demodulator substantially consists of the hybrids 2501 1 -2501 N , the amplitude detection circuits 2502 1 -2502 N , the selection circuit 2503, the differential detection circuit 3402 followed to the selection circuit 2503, the summing circuit 1302, the shift register 706 and the amplitude ratio calculation circuit 707 followed to the summing circuit 1302 and the decision circuit 2002. The similar components in this demodulator as these in the demodulators shown in Figs. 7, 13, 25, 31 and 34 are illustrated by using the same reference numerals, respectively. Received waves at the branches #1-#N are branched at the hybrids 2501 1 -2501 N , respectively and then inputted into the amplitude detection circuits 2502 1 -2502 N and into the selection circuit 2503, respectively. In the detection circuits 2502 1 -2502 N , instantaneous envelope levels which are instantaneous amplitudes, of the respective branches are detected. In the selection circuit 2503, one of the received waves is selected depending upon the detected instantaneous envelope levels form the respective detection circuits 2502 1 -2502 N . The selected received wave is applied to the differential detection circuit 3402 and thus a phase difference  i is obtained. On the other hand, the obtained instantaneous envelope levels of the respective branches are summed at the summing circuit 1302 to provide an instantaneous amplitude signal. After that, the same operations as that in the demodulator of Fig. 7 are performed to obtain a ratio A t / A t-n of the instantaneous amplitude at the current time A t and the instantaneous amplitude at n symbols previously A t-n . As a result, r j or R j corresponding to the mapped code is obtained. Demodulated data can be obtained from the decision circuit 3104 by deciding the mapped code in accordance with thus obtained phase difference  i and amplitude ratio r j or R j . Since information exist in the amplitude ratio between the symbols not in the absolute amplitude according to the third embodiment as well as in the first and second embodiments of the present invention, diversity combining with the maximum gain is possible only by summing the detected amplitudes of the branches. With respect to phase combining, another combining methods such as an equal gain combining or maximal ratio combining can be utilized other than the aforementioned selection combining. Since it is not necessary to detect an absolute amplitude and also an absolute phase, good demodulation characteristics can be expected even under a bad transmission condition of abrupt level changes. Figs. 39a and 39b show a first example of signal space diagrams at the transmitting side and the receiving side after demodulation according to the present invention, respectively, and Figs. 40a and 40b show a second example of signal space diagrams at the transmitting side and the receiving side after demodulation according to the present invention, respectively. In the first example of Figs. 39a and 39b, as shown in Fig. 39b, distance between the origin and each signal point corresponds to r j or R j and an angle between the I axis and a line from the origin to each signal point corresponds to an absolute phase  i in the second embodiment or to a phase difference  i in the third embodiment. In this first example, furthermore, the multi-level value for phase is 8 and the multi-level value for amplitude is 2 (which is equivalent to 16 QAM). In the second example of Figs. 40a and 40b, as shown in Fig. 40b, distance between the origin and each signal point corresponds to r j or R j and an angle between the I axis and a line from the origin to each signal point corresponds to an absolute phase  i in the second embodiment or to a phase difference  i in the third embodiment. In this second example, furthermore, the multi-level value for phase is 16 and the multi-level value for amplitude is 4 (which is equivalent to 64 QAM). As will be understood from Figs. 39a and 40a, according to the present invention, each of signal points in the signal space diagrams at the transmitting sides are arranged in optional location in radial and annular shape not an absolute location as that in the conventional methods.

Claims: A modulation and demodulation method for communication between a transmitting side and a receiving side, said method comprising the following steps: at the transmitting side, producing a modulating signal, wherein the amplitude ratio of the current instantaneous amplitude of said modulating signal and the instantaneous amplitude of said modulating signal n symbols previously in time, where n is a natural number, is set to correspond to a code to be transmitted; at the transmitting side, modulating a radio frequency or an intermediate frequency carrier with said modulating signal, to provide and transmit a modulated signal; at the receiving side, receiving the transmitted modulated signal to provide a received signal; and at the receiving side, decoding the transmitted code from the amplitude ratio of the current instantaneous amplitude of the received signal and the instantaneous amplitude of the received signal n symbols previously in time, characterised in that , the step of setting the amplitude ratio comprises selecting either a first amplitude ratio value, equal to or greater than 1 if the instantaneous amplitude of said modulating signal n symbols previously in time, or its product with the first amplitude ratio, is equal to or less than a threshold value; or a second amplitude ratio value, equal to or smaller than 1, if the instantaneous amplitude of said modulating signal n symbols previously in time, or its product with the first amplitude ratio, exceeds the threshold value. A method according to claim 1, wherein the step of producing the modulating signal further comprises setting the absolute phase of said modulating signal to correspond to said code to be transmitted; and, at the receiving side, decoding the transmitted code from the absolute phase of said received signal and from said amplitude ratio. A method according to claim 1, wherein the step of producing the modulating signal further comprises setting the phase difference between the current instantaneous phase of said modulating signal and the instantaneous phase of said modulating signal said n symbols previously in time, to correspond to said code to be transmitted; and, at the receiving side, decoding the transmitted code from the phase difference between the current instantaneous phase of the received signal and the instantaneous phase of the received signal said n symbols previously in time and from the said amplitude ratio. A modulator comprising: a code mapping means (202) for mapping a plurality of data to be transmitted to a code corresponding to a signal point in a signal space; an amplitude ratio setting means (203) for providing at least one amplitude ratio corresponding to said mapped code; an n-symbol delay means (206) for providing the instantaneous amplitude of an amplitude modulating signal n symbols previously in time, where n is a natural number; and, an amplitude modulation means (207) for amplitude modulating a radio frequency or an intermediate frequency carrier with the current instantaneous amplitude of said amplitude modulating signal, characterised in that the modulator further comprises an amplitude modulating signal production means for producing said amplitude modulating signal, the current instantaneous amplitude of which is proportional to the product of the instantaneous amplitude of said amplitude modulating signal n symbols previously in time and one of the amplitude ratios. A modulator according to claim 4, further comprising a phase setting means (1602) for providing an absolute phase signal corresponding to said mapped code; and an amplitude and phase modulation means (1603) for modulating the radio frequency or intermediate frequency carrier with said absolute phase signal and the current instantaneous amplitude of said amplitude modulating signal. A modulator according to claim 4, further comprising: a phase difference setting means (2601) for providing a phase difference corresponding to said mapped code; a second n-symbol delay means (2603) for providing the instantaneous phase of a phase modulating signal said n symbols previously in time, where n is a natural number; an instantaneous phase production means (2602) for producing the current instantaneous phase of the phase modulating signal, equal to the sum of the phase difference and the instantaneous phase of the phase modulating signal said n symbols previously in time; and an amplitude and phase modulation means (1403) for modulating the radio frequency or intermediate frequency carrier with the current instantaneous phase of said phase modulating signal and the current instantaneous amplitude of said amplitude modulating signal. The modulator as claimed in any of claims 4 to 6, wherein the amplitude modulating signal production means comprises: an amplitude ratio control means (204) for controlling said amplitude ratio setting means (203) so that it provides either a first amplitude ratio value, equal to or smaller than 1, when the instantaneous amplitude of said amplitude modulating signal said n symbols previously in time exceeds a threshold value; or a second amplitude ratio value, equal to or greater than 1, when the instantaneous amplitude of said amplitude modulating signal said n symbols previously in time is less than the threshold value; and, a multiplying means (405) for providing the product of the amplitude ratio provided by the amplitude ratio setting means (203) and the instantaneous amplitude of said modulating signal said n symbols previously in time as the amplitude modulating signal. The modulator as claimed in any of claims 4 to 6, wherein said amplitude ratio setting means (203) provides both a first amplitude ratio value equal to or smaller than 1 and a second amplitude ratio value equal to or greater than 1, and wherein said amplitude modulating signal production means (204) comprises a first multiplying means (503) for providing a first product of said first amplitude ratio value and the instantaneous amplitude of said amplitude modulating signal said n symbols previously in time, a second multiplying means (504) for providing a second product of said second amplitude ratio value and the instantaneous amplitude of said amplitude modulating signal said n symbols previously in time, a selection means (505) for selecting, in accordance with a selection signal, one of said first product and said second product to be the amplitude modulating signal, and a comparing means (506) for providing the selection signal to said selection means so that said selection means selects said first product when the instantaneous amplitude of said amplitude modulating signal said n symbols previously in time is greater than a threshold value; and that said selection means selects said second product when the instantaneous amplitude of said amplitude modulating signal said n symbols previously in time is equal to or smaller than the threshold value. The modulator as claimed in any of claims 4 to 6, wherein said amplitude ratio setting means provides both the first amplitude ratio value and the second amplitude ratio value, and wherein said amplitude modulating signal production means comprises a first multiplying means (503) for providing a first product of said first amplitude ratio value and the instantaneous amplitude of said amplitude modulating signal said n symbols previously in time, a second multiplying means (504) for providing a second product of said second amplitude ratio value and the instantaneous amplitude of said amplitude modulating signal said n symbols previously in time, a selection means (505) for selecting, in accordance with a selection signal, one of said first product and said second product to be the amplitude modulating signal, and a comparing means (506) for providing the selection signal to said selection means so that said selection means selects said first product when said second product is greater than a threshold value; and that said selection means selects said second product when said second product is equal to or smaller than the threshold value.

Inventors: SHIRATO TADASHI, SUZUKI YOSHIFUMI, SHIRATO, TADASHI, SUZUKI, YOSHIFUMI
Applicants: NIPPON TELEGRAPH & TELEPHONE, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Application year: 1996
Main classification: H04L27
IPC codes: H04L27, H04L1