A two-stage fully differential operational amplifier with efficient common-mode feed back circuit

Abstract: The circuit of a two-stage fully differential amplifier composed of a differential input stage, two output stages and a common mode feedback circuit coupled to the output nodes of the amplifier includes a non-inverting stage coupled to a respective output node of the differential input stage for driving the respective output stage. Each auxiliary non-inverting stage of the two branches of the fully differential amplifier uses as a biasing current generator, the load device of the branch of the differential input stage to the output of which the non-inverting stage is coupled. The modified circuit of the fully differential amplifier permits the use of a null-consumption common mode feedback circuit as normally employed in a single stage fully differential amplifier.

Description: The present invention relates to integrated circuits and more in particular to a fully differential operational amplifier circuit ,that is, having a differential output Operational amplifiers are real building blocks and as such they are widely used in analog signal processing systems. In many applications it is convenient to use a fully differential operational amplifier, that is to say, having a differential output. As it is well known by an expert in the art, a fully differential operational amplifier requires a common mode feedback circuit in order to operate properly. The document "Analog Circuit Synthesis for large, realistic cells: designing a pipelined A/D converter with ASTRX/OBLX" by E.S. OCHOTTA ET AL., IEEE 1994 custom integrated circuit conference, 01-05-94 pages 365-368, discloses a two-stage fully differential amplifier with a common mode feedback circuit. The article "A family of Differential NMOS Analog Circuit for PCM Code Filter Chip, IEEE JSSC, Dec. 1982 is a review of this type of circuits. In substance, as it is shown in Figure 1, a fully differential amplifier amplifies a differential input signal (Vid) providing for differential output signal (Vod), and is provided with an auxiliary input (INCM), through which control of the common mode at the outputs nodes (Vcm) is exerted in order to position it exactly half-way between the voltages of the supply rails (V DD and V SS ). In single-stage fully differential amplifiers, the common mode feedback circuit may be considered extremely efficient as it does not imply any current consumption. As indicated in a simplified manner in Figure 2, V R and V B are two reference voltages, which can respectively be equal to about (V DD + V SS )/2 and V GSm3 . On the other hand, in those applications where it is essential to ensure the maximum output voltage swing (ideally equal to the supply voltage), like for instance in systems destined to function at low and extremely low supply voltage, it becomes necessary to employ two-stage at least, fully differential amplifiers. In these cases, the common mode feedback circuit cannot be realized as for a single-stage amplifier, according to the scheme shown in Figure 2, because two inversions would occur between the feedback node INCM and the output nodes, resulting in a positive feedback that would make the system unstable. Up until now, the approach for realizing a common mode control loop in a two-stage amplifier has been that of adding an inverting stage to the feedback circuit of Figure 2, in order to have three inversions in the common mode feedback circuit, according to a scheme shown in Figure 3. However, this known solution is inefficient because of the additional current consumption that is not even minimally exploited by the differential signal, since the differential signal practically does not "sees" this additional inverting stage. Especially in low voltage, battery-operated systems it is imperative to minimize the consumption. Hence, an object of the present invention is that of providing a circuit implementing an efficient common mode control in a two-stage fully differential amplifier, without causing any additional power consumption. This objective is fully met by the circuit of the invention. Essentially, the circuit of the two-stage fully differential amplifier of the invention is characterized in that it comprises an non-inverting stage having an input coupled to the respective output node of the differential input stage of the amplifier and an output coupled to a driving node of the respective second output stage of the operational amplifier. Each non-inverting stage advantageously uses as a biasing current generator the branch load device of the branch of the differential input stage to which the non-inverting stage is coupled. This modified structure of the two-stage fully differential amplifier circuit consents the use of a null consumption common mode feedback circuit, identical to that used in the case of a single-stage operational amplifier, thus eliminating any undue consumption of additional current. The different aspects and advantages of the circuit of the invention will become even more evident through the following description of an important embodiment and by referring to the attached drawings, wherein: Figure 1 as mentioned, is a functional scheme of an operational amplifier with a differential output; Figure 2 is the scheme of a differential output amplifier that include a common mode feedback circuit; Figure 3 shows a the scheme of a two-stage fully differential amplifier including a common mode feedback circuit according to the prior art, as previously described; Figure 4 shows a modified scheme of a two-stage fully differential amplifier including a common mode feedback circuit, according to the present invention. With reference to Figure 4, between the differential input stage of the amplifier, constituted by the pair of input transistors M1 and M2, the current generator Ib1 and by the load current generators Ib2, and each of the two output stages of the amplifier, respectively constituted by M5A and Ib3 and by M5B and Ib3, there exist an non-inverting stage. The two non-inverting stages are realized by the transistors M4C, M4B, M3C, M3A, M4A, M4D, M3D and M3B. Essentially, each of the two non-inverting stages uses as a biasing current generator of the same load device (Ib2) of the branch of the differential input stage, to the output node of which the inverting stage is coupled. Each non-inverting stage is composed of a differential pair of input transistors, respectively M3C, M3A and M3B, M3D, in a common source configuration, whose common source node is coupled to the output node of the respective branch of the differential input stage, and by a current mirror circuit acting as load. The input node of each of the two load current mirror circuits of the respective non-inverting stages is cross-coupled to the drain of a first input transistor of the non-inverting stage, whereas the second input of each non-inverting stage is biased at a constant reference voltage VB. This particular circuit structure of the two-stage fully differential amplifier of the invention is instrumental to the use as a common mode feedback circuit of a switched-capacitor circuit, CMFB, of null consumption, perfectly identical to the circuit used in the case of a single-stage differential output amplifier, not requiring an inverting stage in the feedback loop as shown in Figure 3. In fact, as it can be easily verified, the common mode feedback is negative. In the illustrated example V R may be equal to about (V DD + V SS )/2 and V B may be equal or greater than the sum V GSm3 +V DSAT, where V GSm3 is the gate-source voltage of the input transistors of the two non-inverting stages (M3A, .., M3D) and V DSAT that represents the minimum voltage for which the load current generators I b2 of the differential input stage become saturated.

Claims: A two-stage fully differential amplifier comprising a differential input stage (M1, M2, I b 1, I b 2) two output stages and a common mode feedback circuit (CMFB) coupled to the output nodes (OUT-, OUT+) of the amplifier, two non-inverting stages each driven by a respective output node of said differential input stage and having an output coupled to a driving node of a respective output stage (M5A, M5B I b 3), characterized in that each non-inverting stage is composed of a differential pair of input transistors (M3A-M3C, M3B-M3D), in common source configuration whose common source node is coupled to the output node of the respective branch of said differential input stage, a load current mirror circuit (M4A, M4B, M4C, M4D) and uses, as a biasing current generator, a load device (I b 2) of the branch of said differential input stage to the output of which the common source node of the non-inverting stage is coupled; the input nodes of said two current mirror circuits are cross-coupled to the drains of a first input transistor (M3A, M3B) of said differential pairs of input transistors of said two non-inverting stages, second inputs of said two non-inverting stages being coupled to a reference voltage (V B ); said common mode feedback circuit has an output (INCM) coupled in common to first input nodes of said two non-inverting stages; said reference voltage (V B ) being greater or equal to the sum of the gate-source voltage of the transistors of said differential pairs (M3A-M3C, M3B-M3D) of said two non-inverting stages and of the minimum saturation voltage of said load devices (I b 2) of the two branches of the input stage of the differential amplifier.

Inventors: NICOLLINI GERMANO, SENDEROWICZ DANIEL, NICOLLINI, GERMANO, SENDEROWICZ, DANIEL
Applicants: ST MICROELECTRONICS SRL, STMICROELECTRONICS S.R.L.
Application year: 1996
Main classification: H03F1
IPC codes: H03F3