OPTICALLY CONTROLLED HIGH-VOLTAGE SWITCH FOR AN IMPLANTABLE DEFIBRILLATOR

Abstract: An implantable defribillator with an optically-controlled high-voltage switch. A three-terminal high-voltage-tolerant semiconductor switch (88) exhibits high conductivity between its high-voltage terminal (HV) and its common terminal (COM) in response to a low control voltage applied between its control terminal (CRT) and its common terminal (COM), where the low control voltage exceeds a characteristic threshold value, and exhibits low conductivity between same where the control voltage is less than the characteristic threshold value. A photovoltaic coupler/isolator (82) having a light emitting device (90) and a photovoltaic device (92), optically coupled to and electrically isolated from each other, is in circuit communication across the control and common terminals. A low voltage current source (80) drives the light emitting device (90) of the photovoltaic coupler/isolator (82). A switch-off opto-isolator (84) having a light emitting device (94) and a light sensitive conductive device (96), optically coupled to and electrically isolated from each other, is in circuit communication across the control and common terminals of the semiconductor switch (88). A switch-off low voltage current source (86) drives the light emitting device (94) of the switch-off opto-isolator having a light sensitive conductive device, optically coupled and electrically isolated from each other, is in series circuit communication between the photovoltaic device and the semiconductor switch. A switch-on low voltage current source drives the light emitting device of the switch-on opto-isolator.

Description: Description Optically Controlled High- Voltage Switch for an Implantable Defibπllator Technical Field The present invention relates generally to implantable cardiac stimulators, and more particularly to circuitry in such devices for switching high voltages between a storage capacitor and a defibrillation electrode Background Art Present implantable defibπllators are designed to constantly sense mtra-cardiac electrogram signals and, upon sensing signal patterns indicative of fibrillation, automatically deliver defibrillation therapy Such therapy typically includes the application of high voltage, high energy shocks to cardiac tissue via implanted defibrillation leads and electrodes Implantable defibπllators, being battery powered devices, cannot provide electrical shocks directly from the power source at the high energy levels that are required It is therefore conventional to step up the voltage from the battery by applying a switched DC voltage to the primary winding of a transformer, rectifying the resulting high voltage AC output from the secondary winding of the transformer, and charging a high-voltage storage capacitor with the rectified high voltage The shock is generated by switching the terminals of the high-voltage storage capacitor into electrical contact with the defibrillation leads and discharging the capacitor through the leads, electrodes, and, ultimately, cardiac tissue It is therefore necessary to provide switching circuits in the implantable defibπllator, controlled by low voltage circuits, for switching the high voltages A biphasic shock waveform can reduce the threshold energy level necessary for successful defibrillation The biphasic waveform can be generated by initially discharging the stored energy in one direction between a pair of defibrillation electrodes, followed by a switched reversal of direction during the course of the discharge Alternatively, the discharge path can be switched duπng the course of the discharge by disconnecting the initial pair of electrodes from the storage capacitor and connecting a different second pair of electrodes The second pair of electrodes may or may not share a common electrode with the first pair of electrodes Either type of switching can be accomplished with an electronic circuit known as a bridge, including four or more semiconductor switch components constructed to tolerate the highest voltage of the stored energy Each semiconductor switch is typically characterized as having three terminals a common terminal a control terminal and a high voltage tolerant terminal, which may be designated COM, CTL and HV, respectively The common terminal (COM) is a reference for the control terminal (CTL) and the high voltage terminal (HV) The semiconductor switch components may be MOSFETs, IGBTs (insulated gate bipolar transistors) or MCTs (MOS-controlled thyπsters) Other devices are feasible also, such as bipolar transistors and GTO (gate-turn-off) thyπsters, at the cost of greater energy losses Disclosure of Invention It is an object of the present invention to control high-voltage switching circuitry in an implantable medical device, using low-voltage control circuitry, with only optical coupling between the low-voltage and high-voltage circuitry, and without substantial conductive, capacitive or magnetic coupling between the low-voltage and high voltage circuitry The invention has the advantage of greater isolation in a smaller physical volume, between the low- and high-voltage sides, than can be accomplished with transformer coupling, with excellent noise immunity, and with shorter turn-on and turn-off transition times than can be accomplished with conventional solid state photovoltaic relays In accordance with one aspect of the present invention, an optically-controlled high-voltage switch for an implantable defibπllator mcludes a three-terminal high-voltage-tolerant semiconductor switch having a high-voltage terminal, a common terminal, and a control terminal, and a photovoltaic coupler/isolator in circuit communication across the control and common terminals of the semiconductor switch A low voltage current source is in circuit communication with a light emitting device of the photovoltaic coupler/isolator A switch-off opto-isolator is in circuit communication across the control and common terminals of the semiconductor switch A switch-off low voltage current source is in circuit communication with a light emitting device of the switch-off opto-isolator Other aspects, objects and advantages of the present invention will be apparent from the following descriptions made with reference to the drawings Brief Description of the Drawings FIG 1 is a block diagram of an implantable cardiac stimulator, including a defibπllator FIG 2 is a schematic illustration oi a bridge circuit that is useful in an implantable defibπllator for switching high voltages between a storage capacitor and high-voltage defibrillation leads FIG 3 is a schematic illustration of one embodiment of a high-voltage semiconductor switch of the bridge circuit of FIG 2 together with optical isolation circuitry for isolating the high-voltage switch from the low-voltage control circuitry of the defibπllator FIG 4 is an alternative embodiment of the circuitry of FIG 3 FIG 5 is another alternative embodiment of the circuitry of FIG 3 FIG 6 is a further alternative embodiment of the circuitry of FIG 3 FIG 7 is another alternative embodiment of the circuitry of FIG 3 Best Mode for Carrying Out the Invention FIG 1 is a block diagram illustrating a rate adaptive pacemaker/defibπllator 10 within a hermetically sealed, implantable case 11 A microprocessor 12 preferably provides pacemaker control and computational facilities It will be appreciated that other forms of circuitry, such as analog or discrete digital circuitry can be used in place ot microprocessor 12 However, a microprocessor is preferred for its miniature size and its flexibility, both of which are of critical importance in the implantable systems in which it is envisioned the invention will find use A particularly energy efficient microprocessor which is designed specifically for use with implantable medical devices is fully descπbed in Gordon, et al , U S Patent No 4,404,972 The microprocessor 12 has input/output ports connected in a conventional manner via bidirectional bus 14 to a memory 16, an A-V interval timer 18, and a pacing interval timer 20 In addition, the A-V interval timer 18 and pacing interval timer 20 each has an output connected individually to a corresponding input port of the microprocessor 12 by lines 22 and 24 respectively Memory 16 preferably includes both ROM and RAM The microprocessor 12 may also contain additional ROM and RAM as described in the Gordon, et al U S Patent No 4,404,972 The pacemaker operating routine is stored in ROM The RAM stores various programmable parameters and variables The A-V and pacing interval timers 18 and 20 may be external to the microprocessor 12, as illustrated, or internal thereto, as described in the Gordon, et al U S Patent No 4,404,972 The timers 18, 20 are suitable conventional up or down counters of the type that are initially loaded with a count value and count up to or down from the value and output a roll-over bit upon completing the programmed count The initial count value is loaded into the timers 18, 20 on bus 14 and the respective roll-over bits are output to the microprocessor 12 on lines 22, 24 The microprocessor 12 preferably also has an input/output port connected to a telemetry interface 26 by line 28 The pacemaker when implanted is thus able to receive pacing, arrhythmia therapy, and rate control parameters from an external programmer and send data to an external receiver if desired Many suitable telemetry systems are known to those skilled in the art One such system and encoding arrangement is described in Armstrong, et al , U S Patent No 5,383,912 The microprocessor 12 output ports are connected to inputs of an atrial stimulus pulse generator 30 and a ventricle stimulus pulse generator 32 by control lines 34 and 36 respectively The microprocessor 12 transmits pulse parameter data, such as amplitude and width, as well as enable/disable and pulse initiation codes to the generators 30, 32 on the respective control lines The microprocessor 12 also has input ports connected to outputs of an atrial sense amplifier 38 and a ventricular sense amplifier 40 by lines 42 and 44 respectively The atrial and ventricular sense amplifiers 38, 40 detect occurrences of P-waves and R-waves The atrial sense amplifier 30 outputs a signal on line 42 to the microprocessor 12 when it detects a P-wave This signal is latched to the microprocessor 12 input pon by a conventional latch (not shown) The ventricular sense amplifier 40 outputs a signal on line 44 to the microprocessor 12 when it detects an R-wave This signal is also latched to the microprocessor 12 input port by a conventional latch (not shown) The input of the atrial sense amplifier 38 and the output of the atrial stimulus pulse generator 30 are connected to a first conductor 46, which passes through a conventional first lead 48 Lead 48 is inserted into a patient's heart 50 intravenously or in any other suitable manner The lead 48 has an electricalh conductive pacing/sensing tip 52 or tip and ring at its distal end which is electrically connected to the conductor 46 The pacing/sensing tip 52 is preferably lodged in the right atrium 55 The input of the ventricular sense amplifier 40 and the output of the ventricular stimulus pulse generator 32 are connected to a second conductor 54 The second conductor 54 passes through a conventional second lead 56 which is inserted intravenously or otherwise in the right ventricle 58 of the heart 50 The second lead 56 has an electrically conductive pacing/sensing tip 60 or tip and ring at its distal end The pacing/sensing tip 60 is electrically connected to the conductor 54 The pacing/sensing tip 60 is preferably lodged on the wall of the right ventricle 58. The conductors 46, 54 conduct the stimulus pulses generated by the atrial and ventricular stimulus pulse generators 30, 32 respectively, to the pacing/sensing tips 52, 60 The pacing/sensing tips 52, 60 and corresponding conductors 46, 54 also conduct cardiac electrical signals sensed in the right atrium and right ventricle to the atrial and ventricular amplifiers, 38, 40 respectively The sense amplifiers 38, 40 enhance the electrical signals The implantable cardiac stimulator 10 also has a defibπllator circuit 62 If fibrillation is detected through the atrial or ventricular sense amplifiers 38, 40, a high energy shock can be delivered through defibrillation leads and electrodes 64, 66 Detection algorithms for detection of tachycardias and fibrillation are described in Pless, et al , U S Patent 4,880,005 Although patch- type electrodes are suggested by the drawing, endocardial electrodes for defibrillation are also known The shock is controlled by a shock driver circuit 68, which will be more particularly described hereafter All of the aforementioned components are powered by a power supply 70 The power supply 70 may comprise either standard or rechargeable batteries or both, which may be dedicated to the operation of different parts of the stimulator 10 In the preferred embodiment of the invention, it is considered desirable to produce multi- phasic shocks for defibrillation through the shock driver 68 Circuitry for producing such wave forms is described in detail in U.S Patent No 4,800,883 to Wtnstrom In one of its simplest forms, the bridge of an implantable defibπllator may include four semiconductor switches, SSI - SS4, arranged as shown in FIG 2 The energy storage means Cl is commonly a capacitor sustaining a high voltage after being charged up by conventional voltage step-up and capacitor charging circuits In operation, switch controllers SCI and SC2 close semiconductor switches SSI and SS2, respectively, simultaneously As a result, lead Ll , which is connected to an implanted defibrillation electrode, is raised to a high voltage with respect to lead L2. which is connected to another implanted defibrillation electrode The high voltage differential between Ll and L2 diminishes over time as current flows into the cardiac tissue At some later time controllers SCI and SC2 open semiconductor switches SSI and SS2 before all the energy has been discharged from capacitor Cl Thereafter, switch controllers SC3 and SC4 close switches SS3 and SS4, respectively, simultaneously, so that current flows from capacitor Cl along leads Ll and L2 in the opposite direction Still later, controllers SC3 and SC4 open switches SS3 and SS4 As switches SSI and SS2 are closed, the voltage between the respective HV and COM terminals of each sw itch SSI and SS2 collapses almost to zero Simultaneously, as switches SS3 and SS4 are opened, the voltage between the respective HV and COM terminals of each switch SS3 and SS4 increases almost to the full voltage across Cl For that reason, it is undesirable to use the HV to COM voltages as DC supplies for the controllers SCI - SC4, as the components necessary to avoid transient feedback effects during switching (while withstanding the high voltage for a significant period of time) would have substantial physical size, deleteπously affecting the overall size of the implantable device A preferable approach, therefore, is to provide power to the switch controllers SCI - SC4 from the stable, regulated low voltage power supply of the implantable defibπllator that is used to provide power t o other control and sensing circuitry Such an approach demands, however, that the high voltage circuitry be effectively and reliably isolated from the low voltage circuitry to avoid damage to any of the components of the low voltage circuitry The present invention provides such desirable voltage isolation and provides other desirable advantages Referring to FIG 3, there is illustrated one embodiment of the present invention wherein the controller SCI of FIG 2 includes a pulse current source 80, a photovoltaic coupler/isolator 82 (such as a commercially available device, type DIG 11-15-3000), an opto-isolator 84 (such as a commercially available device, type 4N35), and a "switch-off" signal source 86 The semiconductor switch SSI of FIG 2 comprises a three-terminal high voltage semiconductor switch 88 (such as a commercially available IGBT device, type IRGPH40F) Each of the other controllers SC2, SC3 and SC4, and the other semiconductor switches SS2, SS3 and SS4 are comprised of similar circuitry and components Pulse current source 80 is electrically connected across a pair of terminals of an internal light-emitting device 90 of photovoltaic coupler/isolator 82 A pair of terminals of an internal array of photovoltaic devices 92 of photovoltaic coupler/isolator 82 are connected across the CTL and COM terminals of the semiconductor switch 88 Devices 90 and 92 are electrically isolated from each other on opposite sides of a low-voltage to high-voltage barrier VB Switch-off signal source 86 is connected across a pair of terminals of an internal light-emitting device 94 of opto- isolator 84 A pair of terminals of an internal light-sensitive device 96 of opto-isolator 84 are connected across the CTL and COM terminals of the semiconductor switch 88, in parallel with the internal array of photovoltaic devices 92 of photovoltaic coupler/isolator 82 Devices 94 and 96 are electrically isolated from each other on opposite sides of the low-voltage to high-voltage barrier VB To close semiconductor switch 88, pulse current source 80 forces current through ght- emitting device 90, causing device 90 to emit light and illuminate photovoltaic device 92, which in turn generates electrical current that flows into the CTL terminal of the semiconductor switch 88, causing an increase of voltage across the CTL and COM terminals As the CTL to COM voltage reaches a predetermined threshold that is characteristic of semiconductor switch 88, the semiconductor switch 88 turns on, or enters a state of high conductivity between the HV and COM terminals After switch 88 turns on, pulse current source 80 is switched off To open semiconductor switch 88, switch-off signal source 86 is activated Signal source 86 forces current through light-emitting device 94, causing device 94 to emit light and illuminate light-sensitive device 96, which can be a light-sensitive resistor, an opto-diode or an opto-transistor As a result, a path of high conductivity is made between the CTL and COM terminals of semiconductor switch 88 through light-sensitive device 9, such that the voltage between the CTL and COM terminals falls below the threshold that is necessary to keep semiconductor switch 5 turned on Semiconductor switch 88 therefore turns off, or enters a state of low conductivity between the HV and COM terminals One limitation of the embodiment of FIG 3 is that photovoltaic device 92 of the photovoltaic coupler/isolator 82 may not be optimized to inhibit current leakage therethrough in the reverse direction, I e , from CTL to COM, when pulsed current source 80 is turned off, thereby limiting the maximum time that the voltage between CTL and COM stays above the threshold that is required to maintain semiconductor switch 88 in a state of conduction That limitation could be compensated for by maintaining current from pulse current source 80 beyond the time when the turn- on threshold of semiconductor switch 88 is reached but at the cost of additional energy consumption that would decrease the life of the battery Another limitation of the embodiment of FIG 3 is that the impedance between terminals CTL and COM within semiconductor switch 88, while high, is not infinite, resulting in a further leakage path that limits the maximum time that semiconductor switch 88 can remain in a state of conduction after pulsed current source 80 is turned off In FIG 4, there is illustrated an improved embodiment that addresses the two limitations of the embodiment of FIG 3 described above In particular, reverse leakage through photovoltaic device 92 is reduced by providing a separate diode 98 in series with photovoltaic device 92 between photovoltaic coupler/isolator 82 and terminal CTL of semiconductor switch 88 Furthermore, reverse leakage between terminals CTL and COM within semiconductor switch 88 is partially compensated for by providing a capacitor 100 across terminals CTL and COM Capacitor 100 stores more energy than would be stored in semiconductor switch 88 alone, and therefore allows switch 88 to remain in a state of conduction for a longer peπod of time, given the leakage path between CTL and COM, than would otherwise be the case Another limitation of the above-described embodiments is the result of the slow rate of response of contemporary photovoltaic devices such as photovoltaic coupler/isolator 82 That slow rate of response can cause semiconductor switch 88 to make a slow transition between its low and high conductivity states, during which transition it may absorb excessive energy resulting in a reduced life or complete destruction In FIG 5, there is shown an improved embodiment that eliminates the restriction on switching time set by photovoltaic coupler/ isolator 82 The energy produced at the output of photovoltaic device 92 is stored in capacitor 60, which is isolated from the CTL terminal of semiconductor switch 88 by a second opto-isolator 102 that is in a state of low conductivity The storage of energy is accompanied by a rise of voltage across capacitor 100 The voltage contmues to rise until it exceeds the value of the threshold of semiconductor switch 88 At that point, the pulse current source 80 would be switched off Thereafter, ' switch-on" signal source 105 is activated to force current through light-emitting device 104, causing device 104 to emit light and illuminate hght- sensitive device 106, which can be a light-sensitive resistor, an opto-diode or an opto-transistor As a result, a path of high conductivity is made between capacitor 60 and terminal CTL, causmg charge to be transferred from capacitor 100 to the CTL input of semiconductor switch 88 Consequently, semiconductor switch 88 is turned on Opto-isolator 102 is chosen for fast switching from its low to high conductivity states, although the switching m the opposite order need not be as fast When it is required to switch off semiconductor switch 88, "switch-off" signal source 86 is activated to switch opto-isolator 96 to a state of high conductivity, thereby depleting the charge on both capacitor 100 and the CTL terminal of semiconductor switch 88 The voltage between terminals CTL and COM quickly falls below the threshold necessary to maintain switch 88 in a state of high conductivity between terminals HV and COM, and switch 88 is turned off Opto-isolator 96 is chosen for fast switching from its low to high conductivity states, although the switching in the opposite order need not be as fast Referring again to FIG 2, whenever switch SSI or SS3 is switched on first relative to switch SS4 or SS2, respectively, switch SS4 or SS2 experiences a rapidly rising voltage between its HV to COM terminals Due to capacitive coupling between the HV and COM terminals, this transient voltage gives rise to an inappropriate voltage across the CTL and COM terminals of switch SS4 or SS2 This CTL to COM voltage can reach the threshold of activation for the switch SS4 or SS2, resulting in switch SS4 or SS2 being switched on simultaneously with switch SSI or SS3, thereby "shorting' the energy storage means Cl and causing damage to or destruction of switches SSI and SS4, or switches SS3 and SS2, due to their power dissipation capacity being exceeded In FIG 6, there is illustrated a further embodiment in which protection is provided for semiconductor switch 88 to prevent it from being switched on unintentionally due to voltage transients between the HV and COM terminals giving rise to an unwanted, and possibly threshold- exceeding, voltage between the CTL and COM terminals, as discussed above The embodiment of FIG 5 differs from that of FIG 5 in that opto-isolator 84 is replaced by a depletion mode MOSFET 108 having its drain terminal D connected to the CTL terminal of switch 88, and having its source terminal S connected to the COM terminal of switch 88 MOSFET 108 remains in a state of high conductivity between its source S and drain D terminals so long as zero voltage is applied between its gate G and source S terminals, thereby "shorting" the CTL and COM terminals of switch 88 and protecting switch 88 from being switched on unintentionally Also, the COM terminal, rather than being connected to the bottom end of the photovoltaic array 92, is connected to the middle of the array The bottom end of the photovoltaic array 92 is connected through diode 1 10 to the gate terminal G of MOSFET 108, and a further capacitor 112 is connected across the source S and dram D terminals of MOSFET 108 An opto-isolator 1 14, similar to opto-isolator 84 of FIG 5, has an input connected to switch-off signal source 86 and an output connected across the source S and gate G terminals of MOSFET 108 To disable the protection of semiconductor switch 88, in preparation for turning switch 88 on, the pulse current source 80 is activated giving rise to a positive voltage at the upper end of photovoltaic array 92 relative to the COM terminal, as before A negative voltage is generated at the bottom end of photovoltaic array 92, relative to the COM terminal, causing diode 110 to conduct and causing a negative voltage to build up across capacitor 112 relative to the COM terminal, and at the gate G relative to source S of MOSFET 108 The negative gate to source voltage causes MOSFET 108 to be less conductive between its dram D and source S terminals Eventually, MOSFET 108 becomes in effect a high value resistor between the CTL and COM terminals, thereby disabling the protection of switch 88 After the pulse current source 80 has been switched off, the voltage across capacitor 112 maintains MOSFET 108 in its "off" state as switch 88 is turned on and until switch 88 is turned off again As before, opto-isolator 102 is activated by switch-on signal source 105, thereby connecting capacitor 100 across the CTL and COM terminals to turn on switch 88 To turn off switch 88 opto isolator 114 is activated by switch-off signal source 86. thereby making a path of high conductivity across capacitor 112 and between source S and gate G of MOSFET 108 and removing the voltage between source S and gate G so that MOSFET 108 again enters a state of high conductivity between its drain D and source S terminals Consequently, the voltage between the CTL and COM terminals, and across capacitor 100, quickly falls below the activation threshold of switch 88 and switch 88 enters a state of low conductivity between its HV and COM terminals FIG 7 illustrates an embodiment of the invention utilizing a single optical isolator in each controller In this embodiment the optical isolator 82 turns on the high voltage switch 88, 88' using current from the high voltage capacitor Cl In this embodiment, It is preferred to use slightly different circuitry for a pair of controllers, for example controller SCI and controller SC4 of FIG 2 A similar set of controllers would be used for controller SC3 and controller SC2 In the controller SC4, the pulse current source 80 drives the optical isolator 82 in the same manner as described above In this embodiment, however, the optical isolator turns on the high voltage switch 88 using current from the high-voltage capacitor Cl Activation of the optical isolator 82 charges the gate of MOSFET 120 which passes current from the high-voltage capacitor Cl through resistor 122 to the switch 88, opening the switch 88 and delivering charge through the high voltage lead Ll When the optical isolator 82 is turned off, the gate of switch 88 is discharged through JFET 124 shutting off the gate, and opening switch 88 A zener diode 126 is provided to guard against overload of the IGBT 88 In SCI, as illustrated in FIG 7, the pulse current source 80' drives the optical isolator 82' as described above A capacitor 130 is precharged from the high- voltage capacitor Cl This capacitor 130 is needed to hold the switch 88' since the voltage across 88' would drop to zero when switch 88 was opened The capacitor 130 is charged across resistor 128 The optical isolator 82' turns on the gate of a MOSFET 136 The MOSFET 136 in turn charges the gate of switch 88' , using the charge on capacitor 130, connecting the high voltage capacitor Cl to the lead Ll The switch 88' is turned off by discharging the capacitor 130 through a JFET 134 A zener diode 132 protects the switch 88' from overload The charge on capacitor 130 is maintained without further drain on the power capacitor Cl by current cut off circuit comprised of a MOSFET 138 and biasing resistor 140, together with a diode 142 which controls the direction of current flow through the circuit The advantage of the circuits described in connection with FIG 7 is that, while retaining good isolation through the use of an optical isolator they are physically smaller and electrically faster than circuits utilizing multiple optical isolators Each of the circuits described utilizes an optical isolator in an implantable defibπllator to control the application of high voltage defibπllator shocks, thus providing greater isolation between the low-high voltage sides of defibπllator circuitry without transformer coupling and with excellent noise immunity

Claims: WHAT IS CLAIMED IS 1 An implantable cardiac stimulator [10] comprising a hermetically sealed case [1 1], a power supply [70], circuit means [12] for controlling said stimulator, a defibπllator circuit [62] adapted to produce an electric shock to defibπllate a heart, and a high voltage switch [68] for controlling a high-voltage output of said defibπllator circuit, characterized m that said high voltage switch comprises an optically isolated controller [82] 2 The implantable cardiac stimulator of claim 1 wherein said optically isolated controller further comprises a three-terminal high- voltage-tolerant semiconductor switch having a high-voltage terminal, a common terminal, and a control terminal, and exhibiting high conductivity between said high- voltage terminal and said common terminal in response to a low control voltage applied between said control terminal and said common terminal, where said low control voltage exceeds a characteristic threshold value, and exhibiting low conductivity between said high- voltage terminal and said common terminal when the voltage between said control terminal and said common terminal is less than said characteristic threshold value, a photovoltaic coupler/isolator having a light emitting device and a photovoltaic device, in which said light emitting device is optically coupled to and electrically isolated from said photovoltaic device, said photovoltaic device being in circuit communication across said control and common terminals of said semiconductor switch, low voltage current source means in circuit communication with said light emitting device of said photovoltaic coupler/isolator for driving said light emitting device, a switch-off opto-isolator having a light emitting device and a light sensitive conductive device, in which said light emitting device is optically coupled to and electrically isolated from said light sensitive conductive device, and in which said light sensitive device exhibits low conductivity when not illuminated and exhibits high conductivity when illuminated, said light sensitive conductive device being in circuit communication across said control and common terminals of said semiconductor switch, and switch-off low voltage current source means in circuit communication with said light emitting device of said switch off opto-isolator for driving said light emitting device 3 The implantable cardiac stimulator of claim 2, and further including a switch-on opto-isolator having a light emitting device and a light sensitive conductive device, in which said light emitting device is optically coupled to and electrically isolated from said light sensitive conductive device, and in which said light sensitive device exhibits low conductivity when not illuminated and exhibits high conductivity when illuminated, said light sensitive conductive device being in series circuit communication between said photovoltaic device and said semiconductor switch, and switch-on low voltage current source means in circuit communication with said light emitting device of said switch-on opto-isolator for driving said light emitting device 4 The implantable cardiac stimulator of claim 2 or 3, and further including a diode in series circuit communication between said photovoltaic device and said semiconductor su itch to alleviate reverse current flow through said photovoltaic device when not illuminated 5 The implantable cardiac stimulator of claim any of claims 2 through 4, and further including a capacitor in circuit communication across said control and common terminals of said semiconductor switch to compensate for charge leakage between said control and common terminals within said semiconductor switch 6. The implantable cardiac stimulator of claim 1, comprising: a three-terminal high- voltage-tolerant semiconductor switch having a high-voltage terminal, a common terminal, and a control terminal, and exhibiting high conductivity between said high- voltage terminal and said common terminal in response to a low control voltage applied between said control terminal and said common terminal, where said low control voltage exceeds a characteristic threshold value, and exhibiting low conductivity between said high-voltage terminal and said common terminal when the voltage between said control terminal and said common terminal is less than said characteristic threshold value; a photovoltaic coupler/isolator having a light emitting device and a photovoltaic device, in which said light emitting device is optically coupled to and electrically isolated from said photovoltaic device, said photovoltaic device having a first output terminal, a second output terminal and a common output terminal and configured to generate voltage of opposite polarity at said first and second output terminals relative to said common output terminal, said first and second output terminals being in circuit communication across said control and common terminals of said semiconductor switch; low voltage current source means in circuit communication with said light emitting device of said photovoltaic coupler/isolator for driving said light emitting device; protection means for preventing said semiconductor switch from being turned on inadvertently by transient signals coupled between said high-voltage and control terminals, said protection means comprising a depletion-mode MOSFET having gate, source and drain terminals, with said source and drain terminals connected across said control and common terminals of said semiconductor switch, and with said gate terminal being in circuit communication with said second output terminal of said photovoltaic device; a switch-off opto-isolator having a light emitting device and a light sensitive conductive device, in which said light emitting device is optically coupled to and electrically isolated from said light sensitive conductive device, and in which said light sensitive device exhibits low conductivity when not illuminated and exhibits high conductivity when illuminated, said light sensitive conductive device being in circuit communication across said gate terminal of said depletion-mode MOSFET and said common terminal of said semiconductor switch; and a switch-off low voltage current source means in circuit communication with said light emitting device of said switch-off opto-isolator for driving said light emitting device. 7. The implantable cardiac stimulator of claim 6, and further including: a switch-on opto-isolator having a light emitting device and a light sensitive conductive device, in which said light emitting device is optically coupled to and electrically isolated from said light sensitive conductive device, and in which said light sensitive device exhibits low conductivity when not illuminated and exhibits high conductivity when illuminated, said light sensitive conductive device being in series circuit communication between said photovoltaic device and said semiconductor switch; and a switch-on low voltage current source means in circuit communication with said light emitting device of said switch-on opto-isolator for driving said light emitting device. 8. The implantable cardiac stimulator of claims 6 or 7, and further including: a diode in series circuit communication between at least one of said first and second output terminals of said photovoltaic device and said semiconductor switch to alleviate reverse current flow through said photovoltaic device when not illuminated. 9. The implantable cardiac stimulator of claim 6, 7 or 8, and further including: a capacitor in circuit communication across said control and common terminals of said semiconductor switch to compensate for charge leakage between said control and common terminals within said semiconductor switch. 10. The implantable cardiac stimulator of any of claims 6 through 9, and further including: a capacitor in circuit communication across said gate and source terminals of said depletion- mode MOSFET 11 The implantable cardiac stimulator according to claim 1 wherein said optically isolated controller further compnses an optical isolator [82] controlling a semiconductor switch [120, 136], said semiconductor switch [120, 136] being biased from a high voltage source [Cl], and wherein said semiconductor switch [120, 136] controls a switch [88] for connecting said high voltage source to an output to provide electrical shocks 12 The implantable cardiac stimulator according to claim 11 further comprising a capacitor [130] for providing a baising voltage across said semiconductor switch [136] 13 The implantable cardiac stimulator according to claim 12 further comprising circuit means [138] for charging said capacitor [130] from said high voltage source [Cl] 14 The implantable cardiac stimulator according to any of claims 11 through 13 further comprising switch means [124, 134] for discharging said semiconductor switch [120, 136] to turn off said switch [88] 15 The implantable cardiac stimulator according to any of claims 1 1 through 14 further comprising a zener diode [126, 132] connected across said switch [88] to prevent overloading said switch

Inventors: ARMSTRONG SCOTT A, COX TIMOTHY J, ARMSTRONG, SCOTT, A., COX, TIMOTHY, J.
Applicants: ARMSTRONG SCOTT A, COX TIMOTHY J, INTERMEDICS INC, ARMSTRONG, SCOTT, A., COX, TIMOTHY, J., INTERMEDICS, INC.
Application year: 1996
Main classification: A61N1
IPC codes: A61N1