SOUND DECODING DEVICE

Abstract: When errors occur in a received code sequence, an error concealment routine part 130 is actuated and a correct code sequence is generated based on a code sequence received before the errors are detected. A decoding routine part 21' executes a decoding process based on this code sequence and updates the internal state based on the decoded result. Thereafter, when the code errors are recovered, an error recovery routine part 140 is actuated. The error recovery routine part 140 re-estimates a correct code sequence during a time period when the errors are detected, based on a code sequence received before the errors are detected and a code sequence received after no more errors are detected, and generates a second estimated code sequence. The decode process part 21' executes the decoding process based on an internal state information for retaining the second estimated code sequence in an internal state storage part 23', and updates the internal state information based on the decoded result. By doing this, the quality of the decoded speech, which has recovered from code errors, can be improved.

Description: Technical Field This invention relates to a speech decoder suited to be used for digital speech communication. Background Art In a low bit rate speech coding algorithm, a coding algorithm, which i s based on a CELP (Code Excited Linear Prediction Coding) such as LD-GELP (ITU-T/G. 728), VSELP and SPI-CELP (RCR/STD27-C) is widely used. Althoug h it is not limited to such a CELP series speech coding algorithm, in order to car ry out a coding correctly in a coding algorithm having internal states in an enco der and in a decoder, it is essential that the internal state of the encoder is exac tly coincident with that of the decoder. Here, imagining, for example, an IIR fil ter of Fig. 6, the terms "internal state" corresponds to y(t-1), ·····, y(t-1) of the o utput signal sequences till last time. In other words, when a decoding is curren tly carried out utilizing a decoded result in the past as in the speech coding algo rithm, the decoded result in the past corresponds to the above-mentioned "inter nal state". An adaptive codebook is its representative example. However, the decoder sometimes carries out a decoding with a damag ed codes due to code errors occurrable on a transmission line. In that case, it oc curs that the internal state of the encoder is not coincident with that of the deco der. When such a non-coincidence of the internal states occurs, a decoding cann ot be carried out in a correct manner even if a correct code is used, and distortio n of the decoded speech continues for a while even after the recovery of the code errors. Thus, a large degradation of the quality is resulted. A speech decoder is known as a device capable of lessening the degrad ation of quality, which is employed in a PDC (Personal Digital Cellular telecom munication system) full rate algorithm as shown in Fig. 7. In Fig. 7, reference numeral 1 denotes an input code sequence process unit which comprises an inpu t code sequence process part 11 and input code sequence storage part 12. Refer ence numeral 2 denotes a decoding process unit which comprises a decoding pro cess part 21, an internal state process part 22, and an internal state storage pa rt 23. Reference numeral 3 denotes a error detection unit for detecting the erro rs of a received input code sequence In(i) (where i represents time and takes a v alue of i = 0, 1, 2, ·····) utilizing a CRC (Cyclic Redundancy Code). The error detection unit 3 outputs an error detection signal E to the i nput code sequence process part 11 and the decoding process part 21 when it de tects errors in the input code sequence In(i). The input code sequence process part 11 removes redundancy bits fro m the input code sequence In(i) and outputs the same in the form of a code sequ ence C(i) to the decoding process part 21 when no errors are detected in the inp ut code sequence In(i) and no error detection signal (E) is output from the error detection unit 3. This code sequence C(i) is also output to the code sequence sto rage part 12 and stored therein. Based on internal state information So(i) supplied from the internal s tate process part 22, the decoding process part 21 decodes the code sequence C (i), outputs a decoded speech SP(i), and outputs the internal state information S i(i) to the internal state process part 22 at the time point when the decoding pro cess is finished. The internal state process part 22 reads the internal state info rmation So(i) stored in the internal state storage part 23, outputs the same to t he decoding process part 21, prepares internal state information So(i+1) after th e completion of the routine in the decoding process part 21, based on the intern al state information Si(i) supplied from the decoding process part 21, and stores the internal state information Si(i+1) in the internal state storage part 23. By doing this, the contents stored in the internal state storage part 23 are updated to So(i+1) from So(i) when the decoding process is finished at time i. It is supposed that errors are found in the input code sequence In(t) a t time t and the detection signal E is output from the error detection unit 3. Th e input code sequence process part 11 replaces a code A by a code B, the code A corresponding to an LSP (Line Spectrum Pair, i.e., parameter of a synthesis or i nverse filter showing a spectrum envelope of the speech) and an LAG (i.e., delay quantity of the adaptive codebook showing the pitch cycle of the speech) contai ned in the code sequence C(t) from which the redundancy bits are already remo ved, the code B corresponding to the code sequence C(t-1) stored in the input co de sequence storage part 12. The input code sequence process part 11 outputs a code sequence C'(t) after the replacement. The contents of the input code seque nce storage part 12 at that time remain the same as code sequence C(t-1) and a re not updated. The decoding process part 21 carries out the above decoding pr ocess and updates the internal state utilizing the code sequence C'(t) supplied fr om the input code sequence process part 11. The LSP and LAG as objects for replacement have a high correlation approximately at time and are not abruptly changed with the passage of time. Accordingly, the values of the adjacent LSP and LAG computed for each predete rmined section are close to each other. Consequently, the distortion of the deco ded speech SP(t) is lessened when the decoding process is carried out based on t he correctly received code immediately before the detection of errors rather tha n when the decoding process is carried out based on the code containing errors. As a consequence, the degradation of quality can be reduced at the time point w hen the errors occur. However, when the LSP and LAG are replaced in a conventional man ner, it is seldom that the code sequence C'(t) after the replacement is coincident with the code sequence C(t) which is presumed to contain no errors. Accordingl y, an occurrence of code errors makes it even more difficult for the internal stat e information So(i+1) stored in the internal state storage unit 23 to coincide wit h the internal state of the encoder. Accordingly, even in the event that no error s are detected from as of , for example, time t+s onward and a correct code sequ ence C(t+s) can be obtained, the decoded speech SP(t+s) tends to be degraded du e to non-coincidence of the internal states. Especially, since the correlation bet ween the LSP and LAG is reduced as the time s during which the code errors oc cur is increased, the degree of non-coincidence of the internal states is further i ncreased and the degradation of the decoded speech SP(t+s) is increased, too. Document J.H. Chen et al.: "A Low-Delay CELP Coder for the CCITT 16kb/s Speech Coding Standard", IEEE Journal On Selected Areas In Commmunications, vol.10, no.5, June 1992, pages 830-849, XP000274718 New York, USA describes an LD-CELP G.728 standard decoder. Document C.R. Watkins and J.H.Chen: "Improving 16kb/s G.728 LD-CELP Speech Coder for Frame Erasure Channels", 1995 International Conference On Acoustics, Speech, And Signal Processing, vol.1, 9 May 1995, pages 241-244, XP000657975 New York, USA, deals with the problem how to minimize the negative effects of errors, specifically frame erasures, in a LD-CELP speech decoder and describes how to conceal internal states of LD-CELP coder for improved speech quality after error recovery using an extrapolated signal. This extrapolated signal can be produced merely based on the parameters received before frame erasure(s). The present invention has been accomplished under the above-mentioned background. It is, therefore, an object of the invention to provide a speech decoder and a corresponding method capable of improving the quality of decoded speech after the recovery from code errors. This object is solved by the advantageous measures indicated in claims 1 and 7. According to the present invention, a speech decoder basically compri ses error detection means for detecting whether or not a code sequence obtained by receiving a code sequence of a speech signal transmitted in the form of comp ressed digital data through a predetermined coding algorithm contains code err ors, first estimation means for estimating, when errors are detected in the recei ved code sequence by the error detection means, a correct code sequence based on a code sequence received before code errors were detected by the error detecti on means and outputting an estimated code sequence, decoding means for decod ing the estimated code sequence based on internal state information retained th erein and transforming the same into a speech signal, and updating means for u pdating the internal state information based on the decoded result achieved by the decoding means. The speech decoder is characterized by further comprising second estimation means for re-estimating a correct code sequence during a tim e period when errors are detected based on a code sequence received after no mo re errors are detected and outputting an estimated code sequence, when errors are detected in the received code sequence by the error detection means but no more errors are detected thereafter, the internal state information being update d based on the decoded result achieved by decoding the estimated code sequence output by the second estimation means. In this case, the second estimation me ans re-estimates a correct code sequence during the time period when errors are detected, based on the code sequence received after no more errors are detected, and outputs an estimated code sequence. The decoding means decodes this esti mated code sequence, and the updating means updates the internal state infor mation based on this decoded result. Accordingly, the enlarged discrepancy of t he internal state information between the encoder and the decoder during the ti me when the code errors occur, is compensated. Here, the second estimation means may re-estimate a correct code se quence during the time period when errors are detected based on a code sequenc e received before errors are detected and a code sequence received after no more errors are detected and output an estimated code sequence, when errors are det ected in the received code sequence by the detection means but no more errors a re detected after the passage of the predetermined time. The second estimation means may re-estimate a correct code sequenc e during a time period when errors are detected based on a code sequence receiv ed immediately after no more errors are detected among all code sequences rece ived after no more errors are detected, and output an estimated code sequence. Furthermore, the second estimation means may re-estimate a correct code sequ ence during a time period when errors are detected based on code sequences rec eived after no more errors are detected, and output an estimated code sequence. In the speech decoder, the second estimation means may estimate a c orrect code sequence based on a code sequence received immediately before the detection of the errors among all code sequences received before the errors are d etected. In that case, the first estimation means may estimate a correct code se quence based on a code sequence received immediately before the detection of th e errors among all code sequences received before the errors are detected, as in the case with the second estimation means. In the speech decoder, the second estimation means may estimate a c orrect code sequence based on code sequences received before the detection of th e errors. In that case, the first estimation means may estimate a correct code s equence based on a code sequence received immediately before the detection of t he errors among all code sequences received before the errors are detected, as in the case with the second estimation means. Since those speech decoders can es timate the code sequence with a high degree of accuracy, the quality of decoded speech during the time when code errors occur and after the recovery from the c ode errors can be more improved. The speech decoder may further comprise switch means for cutting off an external output of a speech signal during the time when the estimated code sequence output by the second estimation means is decoded. In that case, a dec oded speech generated during the time when the internal state information is u pdated can be avoided from being output outside as a delay component. Accordi ngly, the quality of the decoded speech recovered from the code errors can be ev en more increased. The internal state information may be an adaptive codebook. Brief Description of Drawings Fig. 1 is a block diagram showing a construction of a speech decoder a ccording to one embodiment of the present invention; Fig. 2 is a view showing a relation between errors contained in an inp ut code sequence and modes of routine operations of a speech decoder of Fig. 1; Fig. 3 is a view showing the transition of routine operation in the spe ech decoder of Fig. 1; Fig. 4 is a view showing specific an example of the routine operation i n the speech decoder of Fig. 1; Fig. 5 is a view showing the result of measurement of segmental SNR in an experiment utilizing the speech decoder of Fig. 1; Fig. 6 is a view exemplifying an IIR filter for explaining the internal states; and Fig. 7 is a block diagram showing a component configuration of a con ventional speech decoder. Best Mode for Carrying Out the Invention One embodiment of the present invention will now be described with reference to the accompanying drawings. 1. Construction of the Embodiment Fig. 1 is a block diagram showing a construction of a speech decoder a ccording to one embodiment of the present invention. In Fig. 1, an input code s equence process unit 1' comprises an input code sequence process part 11' and a n input code sequence storage part 12', whereas a decoding process unit 2' comp rises a decoding process part 21', an internal state process part 22', and an inte rnal state storage part 23'. The input code sequence process part 11' comprises selector circuits 110, 150 for selectively switching an operating action, a regular routine part 120 for carrying out a regular routine, an error concealment routi ne part 130 for carrying out a routine when errors occur, and an error recovery routine part 140 for recovering errors. Reference numeral 3 denotes a detecting unit and 4, a switch, respectively. The error detection unit 3 has the same construction as that of Fig. 3. This error detection unit 3 detects errors contained in an input code sequence In(i) transmitted through a transmission line, not shown, generates a detection signal E which becomes "1" when errors are detected in the input code sequence In(i) and it becomes "0" when no errors are detected, and outputs this error det ection signal E to the input code sequence process part 11' and the decoding pro cess part 21'. 2. Operation of the Embodiment 2-1: Overall Operation of the Embodiment An overall operation of the embodiment thus constructed will be descr ibed. The operation of this embodiment includes a regular routine, an error concealment routine and an error recovery routine. These routines are selected depending on the state of an error occurrable in the input code sequence. First, this will be described with reference to Fig. 2. Now, as shown in Fig. 2, when t he input code sequence is changed as "no errors → errors → no errors → no erro rs", the error detection signal E is changed as "0 → 1 → 0 → 0". In that case, th e routine operation is carried out as "regular routine → error concealment routi ne → error recovery routine and regular routine → error concealment routine" in this order. Fig. 3 shows the transition of routine operation. In Fig. 3, the erro r recovery routine and the regular routine are carried out after the error concea lment routine is finished and when the error detection signal E shows "0". That is, this operation is carried out only when the state of the input code sequence i s changed from "errors" to "no errors". Presuming that the input code sequence contains no errors during the time period from time 0 to time t, errors during th e time period from time t+1 to time t+s+1, and no errors during the time period from time t+s onward, the above routine operation will be specifically described with reference to Figs. 1 and 4. 2-2: Regular Routine The regular routine is described first. The error detection signal E de signates "0" during the time period from time 0 to time t. In that case, the regu lar routine is carried out at time t=1 and no errors are detected at time t. Ther efore, according to the above-mentioned state transition (see Fig. 3), the process proceeds from the regular routine again to the regular routine via the line of "0" In Fig. 1, when an input code sequence In(t) is supplied to the input c ode sequence unit 11', the selector circuit 110 selects a terminal A1 and supplie s the input code sequence In(t) to the regular routine part 120. Thereafter, whe n the regular process part 120 removes the redundancy bits from the input code sequence In(t) and supplies the same in the form of a code sequence C(t) to the selector circuit 150, the selector circuit 150 selects a terminal A5 and outputs t he code sequence C(t) to the decoding process part 21'. This code sequence C(t) is also output to the input code sequence storage unit 12' and stored thereon (na mely, the contents of storage are not updated but the code sequence C(t) is adde d thereto). The decoding process part 21' decodes the code sequence C(t) based on the internal state information So(t) supplied from the internal state process pa rt 22'. At that time, the switch 4 is in its ON-state and the decoded speech SP (t) is output to the following step. The decoding process part 21' also outputs th e internal state information Si(t) to the internal state process part 22' at the ti me point when the decoding routine is finished. The internal state process part 22' reads the internal state information So(t) stored in the internal state storag e part 23' and outputs the same to the decoding process part 21'. After the proc ess in the decoding process part 21' is finished, the internal state process part 2 2' generates internal state information So(t+1) based on the internal state infor mation Si(t) supplied from the unit 21' and newly stores the same into the inter nal state storage unit 23'. When the decoding process is finished at time t by th is, the internal state information read from the internal state storage unit 23' is changed from So(t) to So(t+1). 2-3: Error Concealment Routine The error concealment routine will now be described. In this example, the error detection signal designates "1" during the time period from time t+1 t o time t+s+1. In this case, since no errors occur at time t but errors occurs at ti me t+1, the error detection signal E designates "1". For this reason, according t o the above-mentioned state transition (see Fig. 3), the process proceeds from th e regular routine to the error routine via the line of "1" at the time point of time t+1. When the input code sequence In(t+1) is supplied to the input code se quence unit 11' at time t+1, the selector circuit 110 selects a terminal B1. At th at time, the code sequence C(t) is read from the input code storage part 12', and supplied to the error concealment routine part 130 via the selector circuit 110. Thereafter, the error concealment routine part 130 calculates an estimated cod e sequence C'(t+1) based on the code sequence C(t) and outputs the same. The e stimated code sequence C'(i) refers to a code sequence which can be obtained by replacing the corresponding part of C(i) by a code having time-wise a large corre lation such as the afore-mentioned LSP and LAG among the code sequence C(i-1) before errors occur, for example. Then, the selector circuit 150 selects a terminal B5 and outputs the e stimated code sequence C'(t+1) from the error routine part 130 to the decoding process part 21'. By doing this, the decoding process part 21' carries out the ab ove-mentioned decoding and addition of the internal state utilizing the estimate d code sequence C'(t+1) supplied from the input code sequence part 11'. During the time period from time t+2 to time t+s-1 following time t+2, the decoding pro cess part 21' also generates an estimated code sequence C'(t+2), ····C'(t+s·t) base d on the code sequence C(t) as shown in Fig. 4 and carries out the decoding proc ess and addition of the internal state based on them. The reason why the estimated code sequence C'(t+1) is utilized for th e error concealment routine as mentioned is that distortion of the decoded speec h can be reduced in view of the acoustic sense when the decoding routine is carr ied out based on the code sequence estimated from the correct code sequence bef ore errors occur rather than when the decoding routine is carried out based on t he code in which errors already occur, because the speech has a time-wise correl ation. 2-3: Error Recovery Routine The error recovery routine will now be described. Since no more error s occur from time t+s onward, the error detection signal E at time t+s designate s "0". In that case, according to the above-mentioned state transition (see Fig. 3), the process proceeds from the error routine to the error recovery routine and the regular routine via the line of "0". At time t+s, the switch 4 is brought into its OFF-state. At that time, in the input code sequence process part 11', the selector circuits, 110, 150 select the terminals C1, C5, respectively, to actuate the error recovery routine part 1 40. As shown in Fig. 4, the error recovery routine part 140 recalculates the cod e sequence C"(t), ·····, C''(t+s-1) in the error section, and outputs the result as a n estimated code sequence. In this case, the error recovery routine part 140 use s the correct code sequence C(t) before errors occur, which code sequence C(t) is a part of the contents of storage in the input code sequence storage unit 12' and the a new correct code sequence C(t+s) generated from the input code sequence In(t+s). In the decoding process unit 2', the decoding process part 21' carries o ut a decoding process based on the internal state information So(t) stored in the internal state storage unit 23', and the second estimated code sequence C"(t).T he internal state process part 22' prepares an So'(t+1) in accordance with the in ternal state information Si'(t) based on the result of decoding. The internal stat e information So(t+1) of the internal state storage part 23' is changed So'(t+1) (namely, re-updating). However, since the switch 4 is in its OFF-state at that t ime, no decoded speech is output and only the internal state is updated. Then, the same updating process as mentioned above are carried out based on the new ly restored internal state information So'(t+1) and the code sequence C''(t+1).S uch process is repeated up to the code sequence C''(t+s-1). As a consequence, th e internal state information of the internal state storage part 23' is updated to So'(t+1), ···So'(t+s-1), as shown in Fig. 4. When the internal state information is updated again up to So'(t+s), t he switch 4 is turned on and the above-mentioned regular routine is started bas ed on the internal state information So'(t+s) and the code sequence (t+s). That i s, at time t+s, presuming that the decoding process is carried at time t, ·····, t+ s-1 based on the code sequence C''(t), ·····? C''(t+s-1) and the contents of the inte rnal state storage part 23' are added, the decoding process and the addition of t he internal state storage unit 23' at time t+s are carried out. In this way, according to this embodiment, at the time point of time t +s when no more errors are detected, the contents of the internal state storage part 23' at time t+1, ·····, t+s-1 when errors occur, are updated again utilizing t he code sequence C''(t+1), ·····, C''(t+s-1). By doing this, the content of the inter nal state storage part 23' can be brought closer to that of the internal state sto rage part (not shown) on the encoder side. As a consequence, distortion at time t+s onward can be reduced. Moreover, since the switch 4 is turned off at time t +s, no delay component of the decoded speech is output. 3. Experimental Example An experiment was carried out, in which a speech decoder according t o the present invention was applied to an adaptive codebook of ACELP and erro rs were added to the LAG as parameters of the adaptive codebook. In this expe riment, the decoding process and the updating of the internal state were carried out on the basis of each sub-frame unit, and errors were added at the fifth and sixth sub-frames. Then, the segmental SNR was measured. Consequently, a re sult of measurement as shown in Fig. 5 was obtained. In Fig. 5, white squares i ndicate the segmental SNR when no interpolation is carried out at the time of c ode errors, whereas white circles indicate the segmental SNR when the interpol ation routine is carried out at the time of code errors. On the other hand, black squares indicate the segmental SNR when the error recovery routine is carried out at the error recovery frame (seventh sub-frame) and the interpolation routi ne was carried out. That is, the result of measurement indicated by the black s quares corresponds to the case in which the speech decoder according to this em bodiment is applied. For example, in the eleventh sub-frame, when the error recovery rout ine and the interpolation routine are carried out, the segmental SNR can be im proved by 4dB compared with the case wherein the interpolation routine is carri ed out and by 9dB compared with the case where no interpolation is carried out. In this way, it was ascertained that the error recovery routine extensively imp roves the segmental SNR after the code errors occur. 4. Modified Embodiments In the above embodiment, the estimated code sequence C'(t+1), ·····, C'(t+s-1) may be replaced not only by the LSP and LAG but also by other codes having a large aging correlation, or it may be calculated by other methods. Fur ther, the estimation may be carried out not only by utilizing the code sequence C(t) immediately before the occurrence of errors but also by utilizing the previo us correct code sequence C(t-1), C(t-2), ·····. In that case, the error recovery ro utine part 140 recalculates the code sequence C''(t+1), ·····, C''(t+s-1) of the erro r section utilizing the correct code sequence C(t-1), C(t-2), ····· immediately befo re the occurrence of errors as the content of the input code storage unit 12', and a new correct code sequence C(t+s) generated from the input code sequence In(t +s), and outputs the result. When the estimation is carried out utilizing both the correct code seq uence before the occurrence of errors and the correct code sequence after the rec overy from errors, the second estimated code sequence C''(t+1), ·····, C"(t+s-1) fo r updating the internal state information again may use only both the correct co de sequence after the recovery from errors and the code sequence C(t) immediat ely before the occurrence of errors, or may use the more previous correct code se quence C(t-1), C(t-2), ······. The second estimated code sequence C''(t+1), ·····, C''(t+s-1) for updat ing the internal state information again may be estimated only from the correct code sequence after the recovery from errors. The correct code sequence after t he recovery from errors may use only the code sequence C(t+s) immediately afte r the recovery from errors or may use the correct code sequence C(t+s),C(t+s+1), ·····. The second estimated code sequence C''(t+1), ·····, C''(t+s-1) is not nec essarily required to be calculated over the entire time period when the errors oc cur. It may calculates only a part of the time period and updates the internal st ate based on the result of calculation. In the systems in which some delay is allowed, it may be arranged su ch that the switch 4 is turned on at time t+s and the decoded speed is output. As for the internal state, it is preferred that an adaptive codebook as a representative speech coding algorithm is used. However, the internal state i s not necessarily limited to this.

Claims: A speech decoder that receives from a speech encoder code sequences representative of speech data and decodes said code sequences to recreate said speech data, said speech decoder comprising: (a) an error detecting unit for detecting whether a correct or incorrect code sequence is received; (b) a decoding unit for decoding said code sequences in succession, using internal decoding information, wherein said decoding unit, each time decoding one code sequence, updates said internal decoding information based on decoding of said one code sequence for decoding of a next code sequence; (c) a unit for supplying correct code sequences to said decoding unit for decoding to recreate said speech data; (d) an error concealment unit responsive to receipt of an incorrect code sequence for constructing a code sequence of first estimation, using a prior correct code sequence, and supplying said code sequence of first estimation to said decoding unit for decoding to recreate said speech data; and (e) an error recovery unit responsive to receipt of one or more correct code sequences subsequent to receipt of one or more incorrect code sequences for constructing one or more code sequences of second estimation, using said one or more correct code sequences, and supplying said one or more code sequences of second estimation to said decoding unit for decoding, wherein said decoding unit, as decoding said one or more code sequences of second estimation, redoes the updating of said internal decoding information previously done based on decoding of one or more code sequences of first estimation constructed in response to receipt of said one or more incorrect code sequences in order to make said internal decoding information coincident with internal encoding information of said speech encoder. A speech decoder according to claim 1, wherein said error recovery unit constructs said one or more code sequences of second estimation, using a correct code sequence received immediately subsequent to said one or more incorrect code sequences. A speech decoder according to claim 1, wherein said error recovery unit constructs said one or more code sequences of second estimation, using one or more correct code sequences received prior to said one or more incorrect code sequences and one or more correct code sequences received subsequent to said one or more incorrect code sequences. A speech decoder according to claim 1, wherein said error recovery unit further uses said one or more correct code sequences received prior to said one or more incorrect code sequences. A speech decoder according to claims 3 or 4, wherein said error recovery unit constructs said one or more code sequences of second estimation, using two correct code sequences immediately succeeding and preceding said one or more incorrect code sequences. A speech decoder according to claims 1 or 4, wherein said one or more code sequences of second estimation each correspond to one of said one or more incorrect code sequences. A speech decoder according to claims 1 or 4, wherein said error concealment unit constructs said code sequence of first estimation by replacing time-correlated codes contained in said incorrect code sequence with corresponding codes contained in said prior correct code sequence. A method of decoding code sequences representative of speech data received from a speech encoder to recreate said speech data, said method comprising the steps of: (a) detecting whether a correct or incorrect code sequence is received; (b) moving to and staying in a first mode when a correct code sequence is received, said first mode including the steps of decoding said correct code sequence, using internal decoding information, to recreate said speech data, and updating said internal decoding information based on decoding of said correct code sequence for decoding of a next code sequence; (c) moving to and staying in a second mode when an incorrect code sequence is received, said second mode including the steps of constructing a code sequence of first estimation, using a prior correct code sequence, decoding said code sequence of first estimation, using said internal decoding information, to recreate said speech data, and updating said internal decoding information based on decoding of said code sequence of first estimation for decoding of a next code sequence; and (d) moving from said second mode to a third mode when one or more correct code sequences are received subsequent to receipt of one or more incorrect code sequences, said third mode including the steps of constructing one or more code sequences of second estimation, using said one or more correct code sequence, redoing, as decoding said one or more code sequences of second estimation, the updating of said internal decoding information previously done based on one or more code sequences of first estimation constructed in response to receipt of said one or more incorrect code sequences in order to make said internal decoding information coincident with internal encoding information of said speech encoder, and moving to said first mode for decoding of said subsequent correct code sequence to recreate said speech data. A method according to claim 8, wherein said one or more code sequences of second estimation are constructed, using a correct code sequence received immediately subsequent to said one or more incorrect code sequences. A method according to claim 8, wherein said one or more code sequences of second estimation are constructed, using one or more correct code sequences received prior to said one or more incorrect code sequences and one or more correct code sequences received subsequent to said one or more incorrect code sequences. A method according to claim 8, wherein said third mode further uses one or more correct code sequences received prior to said one or more incorrect code sequences. A method according to claims 10 or 11, wherein said one or more code sequences of second estimation are constructed, using two correct code sequences immediately succeeding and preceding said one or more incorrect code sequences. A method according to claims 8 or 11, wherein said one or more code sequences of second estimation each correspond to one of said one or more incorrect code sequences. A method according to claims 8 or 11, wherein said code sequence of first estimation is constructed by replacing time-correlated codes contained in said incorrect code sequence with corresponding codes contained in said prior correct code sequence.

Inventors: NAKA NOBUHIKO, OHYA TOMOYUKI, NAKA, NOBUHIKO, OHYA, TOMOYUKI, NAKA, Nobuhiko, 302, Uinberu, Soho gumyoji, OHYA, Tomoyuki, 3-201, NTT-Hayashi-shataku
Applicants: NIPPON TELEGRAPH & TELEPHONE, NTT MOBILE COMMUNICATIONS NETWORK INC.
Application year: 1996
Main classification: H03M13
IPC codes: H04L1, G11B20, H03M13, G10L19