A LOW VOLTAGE TEMPERATURE AND VCC COMPENSATED RADIO FREQUENCY MIXER

Abstract: A radio frequency mixer (12) utilizing frequency and bias compensation for improved performance characteristics. The radio frequency mixer (12) receives bias signals that are dependent on the power supply voltage (VCCM) levels to internally balance the local oscillation (10) received and mix the perfectly bias balanced internally generated oscillation signal with the radio frequency input.

Description: A low voltage temperature and VCC compensated radio frequency mixer. Background of the invention Field of the invention The present invention relates to radio frequency mixers. More particularly, it relates to a more linearized radio frequency mixer utilizing frequency and bias compensation for improved performance. The prior art Presently, a standard Gilbert cell is used for mixer designs in radio frequency circuits. A Gilbert cell generally consists of a single or double differential pair of transistors in the lower tree of the mixer. Such mixer is shown in the United States Patent No. 4,344, 188. Under low voltage conditions, second order effects such as the intermediate frequency output riding on the large local oscillator feed-through, will cause clipping of the intermediate frequency signal and result in intermodulation products. In addition, small base- emitter voltages changes caused by temperature or second order bias dependencies will cause current and gain variations that limit the performance of the circuit. It is therefore desirable to have a radio frequency mixer that operates independent of temperature changes and variations in the power supply voltage level. Summary of the invention The present invention provides a radio frequency mixer that uses frequency and bias compensation to improve performance. According to the invention, an oscillator circuit provides the required local oscillator signal and an offset current signal to the mixer circuit. A bias network circuit generates a bias voltage signal and a bias current signal which are fed into the mixer circuit. The offset current signal and the bias current signal balance the internally generated local oscillator signal applied to the upper tree of the mixer. The bias current signal is dependent on power supply voltage values and thereby compensated the mixer for changes in the power supply voltage level. The bias voltage signal biases the lower tree of the mixer circuit to prevent any changes in the temperature and power supply voltage levels from effecting the mixing of the local oscillator and radio frequency inputs. It is therefore an object of the present invention to provide a radio frequency mixer that compensates for changes in temperature and power supply voltage levels. It is another object of the invention to provide a radio frequency mixer that utilizes bias signals dependent on the power supply voltage levels to optimize the signal swing headroom at all temperature and power supply voltage conditions. It is yet another object of the invention to provide a radio frequency mixer that uses an offset current signal to internally generate a perfectly balanced local oscillator differential pair to the external local oscillator signal for mixing with the radio frequency input. Another object of the invention is to provide a radio frequency mixer that overcomes the shortfalls of the prior art. It is a further object of the invention to provide a radio frequency mixer that operates efficiently and reliably. Brief description of the drawings Other objects and features of the present invention will become apparent from the following detailed description considered in connection with the accompanying drawings which disclose an embodiment of the present invention. It should be understood, however, that the drawings are designed for the purpose of illustration only and not as a definition of the limits of the invention. In the drawings, wherein similar reference characters denote similar elements throughout the several views: Figure 1 is a block diagram of the circuit according to the invention; Figure 2 is a schematic diagram of the oscillator/buffer of Figure 1 according to the invention; Figure 3 is a schematic diagram of the mixer circuit of Figure 1 according to the invention; and Figure 4 is a partial schematic diagram of the biasing circuit of Figure 1 according to the invention. Detailed description of preferred embodiments Turning now in detail to the drawings, Figure 1 is a block diagram of the radio frequency mixer showing the interconnections of the oscillator 10, mixer 12 and bias network 14 according to the invention. The voltage VCCM is the power supply for all blocks, and the GndM is the ground for all blocks. Mixer 12 has a positive input INP and a negative input INN for receiving a radio frequency input signal. Oscillator 10 generates the requisite local oscillator signal OscB needed for the mixer, and also provides an offset current signal lOFFSET to aid in the balancing of the mixer operation. Figure 2 is a schematic circuit diagram of oscillator 10 according to the invention. A transistor QOl performs the oscillator function. A resonating element can be connected to the base OscB of transistor QOl, and to the emitter OscE of transistor QOl. By connecting a resonator in various well-known conditions (e.g., Colpitts, Butler, etc.) transistor QOl will sustain an oscillation and thereby serves as an "on chip" oscillator. The frequency of the oscillation is dependent upon the resonator element used. Transistor Q05 is a lOx device and provides the biasing of transistor QOl. A lOx device indicates that there are actually ten transistors connected in parallel so that all of the bases, collectors and emitters respectively are connected to each other. Transistor Q02 is connected in parallel with QOl and serves as an on chip oscillator buffer. As result of this parallel connection, transistor Q02 will have the same signal at its base and emitter as that of transistor QOl . The oscillation signal OscBuf is taken from the emitter of transistor Q02. The signal OscBuf is taken from transistor Q02 and not from transistor QOl because taking the output from the emitter of transistor QOl would impact and alter the characteristics of the external resonator element, also connected to the emitter of transistor QOl . The object is to keep transistor QOl undisturbed from any loading that results when you take the old transistor Q02 by taking the signal from its emitter to drive another circuit, that load will not effect the operation of transistor QOl. Transistor Q06 is a lOx device and provides the biasing of Q02. Diode D01 acts as a protection device to transistor QOl. Diode D02 is also a protection device for transistor Q02. These protection devices D01, D02 prevent the accidental overload of the emitter of transistor QOl, or the connection OscE with a high voltage signal. In this instance, diode D01 will prevent the emitter voltage from exceeding the base voltage of transistor QOl . Thus, since diode D01 is arranged in opposite polarity with transistor QOl, if the emitter voltage is brought higher than the base, diode D01 will clamp the base-emitter junction of transistor QOl. Diode D02 will operate the same as diode D01. Transistor Q03 and transistor Q04 are biasing devices where the collector of transistor Q03 and the base of transistor Q04 are connected to a reference current source PTATIR4. The collector current of Q04 is designated as the signal lOFFSET which will be discussed further with the mixer. Figure 3 is a schematic diagram of the complete mixer circuit. The core of the mixer is composed of a lower tree 22 and an upper tree 24. Lower tree 22 includes a triple differential amplifier made up of transistors QMl, QM2, QMl l, QM12, QM3 and QM4. The use of a triple differential amplifier improves linearity and third order intermodulation products. The resistors XREE1, XREE2 and XREE6 provide the requisite biasing of the lower tree transistors. The upper tree 24 is made up of transistors QM5, QM6, QM7 and QM8. Any offset or unbalanced situation will cause leakage from the local oscillator into the output of the mixer. Thus, in order for the mixer to operate most efficiently, it is desirable to balance the upper tree of the mixer as equally as possible. The oscillator 10 provides the signal OscB to the mixer at the input OscB. Transistor QM21 is the buffer transistor of the mixer and receives the signal from the local oscillator at its base. Transistor QM21 is biased at its emitter by transistor QM33 and at its base by transistor QM30. Capacitor CM10 and resistor XRM14A are filter components for increasing the signal level at high frequencies from the incoming signal OscB. A replicating stage 20 performs the same as buffer transistor QM21, except that it does not have the oscillating signal at its input transistor QM20. Replicating stage 20 provides a bias voltage to the base of transistors QM8 and QM6 in the upper tree 24 equal to the voltage signals received by transistor QM5 and transistor QM7 through transistor QM21. Thus, transistor QM20 and resistor XRM32 is replicating the oscillator/buffer circuit on the other side of the mixer formed by transistor QM21 and resistor XRM31 to achieve an internally balanced local oscillator bias signal. This balances the mixer's upper tree at both sides and is required for a double balanced mixer. Mixer 12 is a four terminal device having two inputs INP and INN for receiving the positive and negative radio frequency inputs and two local oscillator inputs which are generated internally by transistor QM21 on one side and by transistor QM20 of the replicating stage 22 on the other. Replicating stage 20 is primarily for balancing the local oscillator signal bias within mixer 12. Transistors QM44 and QM45 and resistors XRM54, XRM55 are bias generators which generate all the bias currents going to the different transistors of the circuit. A reference current PTATIRS is used for the bias generators. PTAT stands for proportional to absolute temperature, and IR stands for implant resistor. Thus, this is a PTAT current source which is generated using an implant resistor. In order to make the circuit perform independently of temperature, the same kind of resistors must be used throughout the circuit, so that when you are determining the ratios, their temperature coefficients cancel each other. The circuitry for generating PTAT current sources is considered prior art and is not shown for brevity. A bias current IVCCPTAT is generated by the bias network 14. The bias current IVCCPTAT is a PTAT current source that is dependent on the power supply voltage VCCM. The input source VFX is a direct current reference source or bias voltage generated by the bias network 14. Mixer 12 has an output MOUT2. Referring to Figures 2 and 3 together, the base currents for transistors Q05, Q06 and Q03 (with Q05 and Q06 being lOx devices) are all provided through transistor Q04. Thus, the current lOFFSET is actually equal to the sum of the base currents of transistors Q03, Q05 and Q06. The current lOFFSET is then fed into the mixer circuit at the base of transistor QM20 in replicating stage 20. The addition of the current lOFFSET to the replicating stage 20 compensates for different base currents that transistor QM21 is seeing. Transistor QM21 is connected to the terminal OscB of the oscillator 10. The terminal OscB of the oscillator 10 is connected to the bases of transistors QOl and Q02, so the currents of transistors QOl and Q02 actually affect the bias of transistor QM21. Since terminal OscB is connected to the base of transistors QOl and Q02 which are connected to the base of transistor QM21 , all of the base currents for these three transistors QOl, Q02, QM21 are provided via resistor XRM31 from the power supply voltage VCCM. If there is no current lOFFSET fed into the replicating stage 20, then the current through resistor XRM32 is only the base current of transistor QM20, which is less than the base current of transistor QM21. In order for the base voltage of transistor QM20 and QM21 to be exactly the same, the same amount of current must be flowing through resistors XRM32 and XRM31. The current lOFFSET is generated by taking the collector current of transistor Q04 and adding it to the base of transistor QM20 so that now the current which is going through resistor XRM32 is also the same as the current going through resistor XRM31, and therefore we have the same base voltage for transistors QM20 and QM21, and therefore the same base voltage for transistors QM8 and QM5, respectively. The upper tree 24 of the mixer is now perfectly balanced and remains this way over temperature and power supply voltage VCCM variations. In other words, the current lOFFSET generated as the collector current of transistor Q04, tracks the base current of transistors QOl, Q02 and QM21 to guarantee symmetric operation or a perfectly balanced local oscillation signal. Capacitor COI of oscillator 10 is a filter capacitor to filter out any noise which might be coming in on the base of the transistors Q05 and Q06. The emitters of transistors QOl and Q02 are the output terminals OscE, OscBuf or access points of this oscillator. The large junction capacitance of transistors Q05 and Q06 (lOx devices), will cause the large oscillator signals at output terminals OscE and OscBuf to couple and come to the base of transistors Q05 and Q06. By inserting capacitor COI, we filter out or eliminate that potential problem. Capacitor COI acts like a low pass filter in this instance. With limiting voltage headroom under lower power supply voltage VCCM conditions, second order effects like clipping of the small intermediate frequency output riding on the large local oscillator feed-through, will reduce the mixer gain as well as produce unwanted spurious products. The use of capacitor CCI on the output MOUT2 reduces the leaked local oscillator and radio frequency levels in the output, thereby preventing signal clipping. Another second order effect is the local oscillator leakage from the emitter of transistor QM5 to the base of transistor QMl. This leaked signal behaves like a radio frequency signal and re-enters the mixer. This in effect, is like the local oscillator signal mixing with itself which results in a negative direct current shift on the collector of transistor QM5. The collector of transistor QM5 is tied to the power supply voltage VCCM and the intermediate frequency signal is picked from the collector of transistor QM7, thereby preventing premature limiting. Figure 4 is a simplified example of the biasing circuit 14 according to the invention. The biasing circuit 14 generates the bias signals VFX and IVCCPTAT for the mixer circuit. To generate these signals VFX, IVCCPTAT, a standard on-chip generated band gap voltage BGl is applied to the circuit. The band gap voltage does not change with the temperature and is fixed for silicon at 1.23 volts to the first order. The signal VFX is generated on the left hand side of the circuit. The signal VFX is generated from the band gap voltage BGl, but has a different absolute value which is more appropriate for the mixer. Band gap voltage BGl is applied to the base of transistor QV3. Transistors QV1, QV3, QV28, QV13 and QV4 and resistors XRV11 and XRV10 and the biasing transistor QV32 together form a non-inverting operational amplifier with a gain ratio of the resistors XRV10 and XRV11. The voltage signal VFX is then proportional to the band gap voltage BGl with a resistor ratio of the resistors XRV10 and XRV11. The reference current source PTAT CUR 3 is used to bias transistor QV32. The bias signal IVCCPTAT is generated on the right hand of the circuit. The signal IVCCPTAT is also generated from the same band gap voltage BGl going over transistors QB9 and QB10. The current IVCCPTAT is generated by the voltage difference converted over resistor XRB7. The signal IVCCPTAT is dependent on the power supply voltage VCC because as the power supply voltage VCC changes, the voltage at the base of transistor QB9 changes. In addition, the resistor ratio of resistors XRB6 and XRB7 changes as the power supply voltage VCC changes. This difference is then translated over resistor XRB7 and turned into the desired bias signal IVCCPTAT. The remaining current sources PTAT CUR1 and PTAT CUR2 are just reference current sources for the circuit. The voltage on resistor XRM31 in Figure 3 is used to control the voltage on the emitter of transistor QM5 for optimized signal swing headroom at all power supply voltage VCC and temperature conditions. The bias current IVCCPTAT has a power supply voltage VCC dependent value for this purpose. The use of the bias voltage VFX on the lower tree 22 of the mixer, which is also weakly dependent on the power supply voltage VCC results in optimized headroom, linearity and gain in all power supply voltage VCC levels. While one embodiment of the present invention has been shown and described, it is to be understood that many changes and modifications may be made hereunto without departing from the spirit and scope of the invention as defined in the appended claims.

Claims: CLAIMS 1. A mixer characterized in that it comprises: an oscillator circuit (10) for externally producing a local oscillator signal (OscB) and an offset current signal (lOFFSET); a bias network (14) for producing a bias voltage signal (VFX) and a bias current signal (IVCCPTAT); and a mixer circuit (12) connected to said oscillator circuit (10) and said bias network (14), said mixer circuit (12) having inputs (INP, INN) for receiving an input signal and said local oscillator (10), offset currents (lOFFSET), bias voltage and bias current signals, and producing at its output (MOUT) an intermediate frequency signal representative of the input signals. 2. The mixer (12) according to Claim 1, wherein said mixer circuit (12) further comprises: internal oscillating means (10) for receiving the local oscillator signal and generating an internal local oscillator signal; a replicating stage (20) for receiving the offset current signal (lOFFSET) and balancing the internally generated local oscillator bias signal within the mixer (12), said internal oscillating means (10) and said replicating stage (20) receiving the bias current signal; an upper tree circuit (24) for receiving the internally balanced local oscillator signal; and a lower tree circuit (22) for receiving the input and said bias voltage signal, said upper tree circuit (24) and said lower tree circuit (22) being connected to mix the input and the internally balanced local oscillator signal to produce said intermediate frequency output (MOUT2). 3. The mixer (12) according to Claim 2, wherein said lower tree circuit (22) of said mixer (12) comprises a triple differential amplifier (QMl, QM2, QMl l, QM12, QM3, QM4). 4. The mixer (12) according to Claim 2, wherein said upper tree circuit (24) comprises a first and second pair of transistor (QM5, QM6, QM7, QM8). 5. The mixer (12) according to Claim 2, wherein said internal oscillating means (10) comprises an oscillating transistor QOl . 6. The mixer (12) according to Claim 2, wherein said replicating stage (20) comprises a transistor (QM20) and a resistor (XRM32) connected to the base of said transistor (QM20) at one end, and to a power supply terminal (VCCM) at the opposite end. 7. The mixer (12) according to Claim 6, wherein replicating stage (20) generates identical bias signals to the bias signals generated at said internal oscillating means (10) in response to said offset signal (lOFFSET). 8. The mixer (12) according to Claim 2, wherein said bias current signal is dependent on the value of the power supply voltage (VCCM) and biases said internal oscillating means (10) and said replicating stage (20) to provide optimized signal swing headroom at all power supply voltage (VCCM) and temperature levels. 9. The mixer (12) according to Claim 2, wherein said bias voltage signal biases said lower tree circuit (22) of said mixer (12) to optimize headroom, linearity and gain in all power supply voltage levels (VCCM).

Inventors: BEHBAJANI FARBOD BEHBAHANI, FOTOWAT-AHMADY ALI, NAVID NASROLLAH SAEED NAVID, BEHBAJANI, FARBOD, BEHBAHANI, FOTOWAT-AHMADY, ALI, NAVID, NASROLLAH, SAEED, NAVID
Applicants: PHILIPS ELECTRONICS NV, PHILIPS NORDEN AB, PHILIPS ELECTRONICS N.V.
Application year: 1996
Main classification: H04B1
IPC codes: H03D7, H04B1