Vertical extension processing apparatus of a video screen and method, in video cassette recorders of PAL plus system

Abstract: A vertical extension processing apparatus for eliminating a dark bar generated during a fast forward operation in a VCR of a PAL plus system is disclosed. The vertical extension processing apparatus of a video screen for supplying a video signal of a video signal reproducing circuit to a video signal processor by eliminating top and bottom dark bars generated during a fast forward operation in a VCR of a PAL plus system includes: a vertical extension operation circuit (314) connected to the video signal reproducing circuit (312), for generating a vertical extension operation signal by vertically extending horizontal scanning lines of the video signal by a sampling clock signal to 3:4; and a switching circuit (316-320) connected to the video signal reproducing circuit (312) and to the vertical extension operation circuit (314), for forming, during a normal operation, a path between the video signal processing circuit and the video signal reproducing circuit (312) by a control signal to generate the video signal, and for forming, during the fast forward operation, a path between the video signal processing circuit (312) and the vertical extension operation circuit by the control signal to generate the vertical extension operation signal.

Description: The present invention relates to a video cassette recorder (VCR) of a PAL plus system and, more particularly, to an apparatus for eliminating a dark bar generated during a fast forward operation in a VCR of a PAL plus system. A display format of most television apparatuses used up to now has a screen ratio of 4:3 in display means achieved by an image display region of a typical cathode ray tube as well as in a screen for a projection television apparatus. Similarly, the screen ratio of most video sources is also 4:3. However, not all video sources have a screen ratio of 4:3. A PAL plus system is a television broadcasting system having the screen ratio of 16:9. The PAL plus system is compatible with the television having the screen ratio of 4:3. In a film for example, a film format is converted to a video tape format in order to be reproduced or transmitted to a television signal. When converting film sources to the video format, the screen ratio has been changed to 4:3 which is suitable for most television apparatuses. As one example of the film source, there is a wide screen source having the display format of the screen ratio of 16:9. When the film source is converted to the video format, an apparatus such as a flying spot telecine is used. The flying spot telecine has a window or a frame with a screen ratio of 4:3. Typically, the operator traces the center of an action in the film and simultaneously cuts the right and left portions of an image to move the window to the right and left. This is because the horizontal width of the image of the film becomes wider than that of the screen having the screen ratio of 4:3 when the vertical height of the image of the film is adjusted to the screen having the screen ratio of 4:3. Hence, a video signal converted to the screen ratio of 4:3 from the film source of the screen ratio of 16:9 loses its right and left portions corresponding to the cut portions from the image of the film. If the image of the wide screen is reduced until the horizontal width of the wide screen is equal to the right and left boundary lines of the screen having the screen ratio of 4:3, the vertical height of the image becomes smaller. Consequently, the image of the film source completely appears on the screen having the screen ratio of 4:3. In such a case, at the top and bottom of the screen having the screen ratio of 4:3, there is a portion in which the image is not filled. In order to escape a spurious signal which may be generated at such an image-free portion, a dark bar is transmitted to the top and bottom of the image converted to the screen ratio of 4:3. Such a display format is generally called a letter box format. If the video signal of the letter box format is displayed on a television of screen ratio 16:9 without processing the received signal, dissimilation that the image of the video source spreads to the right and left or a dark bar occurs. In the PAL plus system, the received video signal of the letter box format is processed to provide the video screen eliminating the dissimilation or the dark bar. However, in a VCR of the PAL plus system, the dissimilation that the image of the video source spreads to the right and left, and the top and bottom dark bars are generated during a fast forward operation, as shown in Figure 1. This is because the video signal is generated without signal processing during the fast forward operation. That is, since an image of one frame is constructed by being read from various frames, mutual dependence between fields within the frame is lost. Therefore, a basic precondition for converting the letter box format to the video signal of the screen ratio of 16:9 is lost, and the screen of the signal processing of the PAL plus system is very distorted. To prevent this, a wide screen signalling is corrected in the VCR of the PAL plus system so that the video signal should be processed by a PAL plus television during the fast forward operation in the PAL plus television. Then the PAL plus television has the top and bottom dark bars and generates the dissimilation. In eliminating the dissimilation and the dark bars during the fast forward operation in the PAL plus system, the video signal is extended to the vertical direction lest the image of the video source should spread to the right and left in the television screen having the screen ratio of 16:9 and simultaneously the top and bottom dark bars should appear. Patent abstract of Japan, volume 13, No. 539, November 30 1989, page 128, E853, JP-A-01221075 (Sony) discloses a processor for video signals. This document discloses an arrangement which aims to provide an excellent image quality even when the number of lines of reproduced video signals in one field varies. The abstract discloses reading date from a memory so that lines of reproduced video signals written in the memory or thinned or interpolated at a period corresponding to the speed of reproduction. The document discloses a decision circuit which controls a pair of controllers. When a high speed variable - speed reproduction mode is decided on, a write line address and read line address in the memory or controlled. By performing this control, for instance when reviewing, the number of lines of reproduced video signals in a field increases. It is an aim of embodiments of the present invention to provide a vertical extension processing apparatus of a video screen which eliminates top and bottom dark bars generated by vertically extending a video signal during a fast forward operation in a VCR of a PAL plus system. It is another aim to provide a vertical extension processing apparatus of a video screen which eliminates dissimilation generated by vertically extending a video signal during a fast forward operation in a VCR of a PAL plus system. According to an aspect of the invention, there is provided a vertical extension processing apparatus for supplying a video signal of video signal reproducing means to video signal processing means and prevent top and bottom dark bars being generated and output to a screen having a screen ratio of 4:3 during a fast forward operation in a video cassette recorder of a PAL plus system, said apparatus comprising: vertical extension operation means connected to said video signal reproducing means, for generating a vertical extension operation signal by vertically extending horizontal scanning lines of said video signal by a sampling clock signal to change the screen ratio by a factor 3:4 so as to change a PAL Plus signal having a screen ratio of 16:9 into a signal with a screen ratio of 4:3; and switching means connected to said video signal reproducing means and to said vertical extension operation means, the switching means having first and second switch states corresponding to a normal operation and a fast forward operation respectively, according to the condition of a control system, the switching means being arranged during a normal operation in which the control signal is in a first condition to form a path between said video signal processing means and said video signal reproducing means by a control signal to generate said video signal, and, during said fast forward operation, to form a path between said video signal processing means and said vertical extension operation means by said control signal to generate said vertical extension operation signal. Preferably, said vertical extension operation means comprises: first line memory means connected to said video signal reproducing means, for storing said horizontal scanning line by said sampling clock signal; second line memory means for storing said horizontal scanning line generated from said first line memory means by said sampling clock signal; and operation means consisting of coefficient multipliers and an adder, for vertically extending output data of said video signal reproducing means and said first and second line memory means to 3:4 by using the following operation equations; Lo1 = C0·Lin1 + C1·Lin2 + C2·Lin3 Lo2 = C3·Lin1 + C4·Lin2 + C5·Lin3 Lo3 = C6·Lin1 + C7·Lin2 + C8·Lin3 Lo4 = C9·Lin1 + C10·Lin2 + C11·Lin3 where Lo1, Lo2, Lo3 and Lo4 are data corresponding to said vertical extension operation signal, Lin1 is data corresponding to said horizontal scanning line generated from said video signal reproducing means, Lin2 is data corresponding to said horizontal scanning line generated from said first line memory means, Lin3 is data corresponding to said horizontal scanning line generated from the second line memory means, and C0, C1, C2, C3, C4, C5, C6, C7, C8, C9, C10 and C11 are vertical extension coefficients. The invention extends to a video recorder including the vertical extension processing apparatus according to the above aspect. According to a second aspect of the invention, there is provided method of eliminating top and bottom dark bars generated during a fast forward operation in a video cassette recorder of a PAL plus system, the method comprising: during playback connecting an output video signal of a video signal reproducing circuit of the video cassette recorder directly to a video signal processor; and during a fast forward operation connecting the output video signal of the reproducing circuit to the video signal processor via a vertical extension operation means, whereby said vertical extension operation means performs an extension operation by vertically extending horizontal scanning lines of said video signal by a sampling clock signal to change the screen ratio by a factor of 3:4 so as to change a PAL Plus signal having a screen ratio of 16:9 into a signal with a screen ratio of 4:3. Preferably, said method comprises, during a fast forward operation, the steps of: applying the video signal to an input terminal of a first line memory means and to a first input terminal of a first coefficient multiplier; applying an output signal of the first line memory means to an input of a second line memory means and to a first input terminal of a second coefficient multiplier; applying an output signal of the second line memory means to a first input terminal of a third coefficient multiplier; applying vertical extension coefficients to second input terminals of said first, second and third coefficient multipliers; and summing output signals from said coefficient multipliers and applying the resulting summed signal to said video signal processor. For a better understanding of the invention, and to show how embodiments of the same may be carried into effect, reference will now be made, by way of example, to the accompanying diagrammatic drawings, in which: Figure 1 is a view illustrating an image displayed on a screen having a screen ratio of 16:9 during a fast forward operation in a VCR of a PAL plus system according to the prior art; Figure 2 is a view illustrating an image displayed on a screen having a screen ratio of 16:9 during a fast forward operation in a VCR of a PAL plus system according to the present invention; and Figure 3 is a block diagram illustrating a vertical extension processing apparatus of a video screen in a VCR of a PAL plus system according to the present invention. In the following description, numerous specific details are set forth to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practised without these specific details. In other instances, well known functions and constructions have not been described so as not to obscure the present invention. A vertical extension processing apparatus of a video screen in a VCR of a PAL plus system is shown in Figure 3. A VCR video signal reproducing circuit 312 reproduces a video signal in the VCR and generates horizontal scanning lines. A switching circuit consisting of a first node N1 connected to the VCR video signal reproducing circuit 312, a first terminal 316, a second terminal 318, and a switching terminal 320 connected to a video signal processor is switched by a control signal generated from a controller (not shown). A ratio of dark bars to the entire screen of the total number of vertical lines is about 1/4. In order to eliminate the dark bars, the vertical lines of 4/4 should be restored from the vertical lines of 3/4. A vertical extension operation circuit 314 for vertical extension of 3:4 is connected between the first node N1 and the second terminal 318. A first line memory 31 connected to a second node N2 which is coupled to the first node N1 can store one line among the horizontal scanning lines. A second line memory 32 connected to the first line memory 31 has the same characteristic as the first line memory 31. A first coefficient multiplier 33 connected to the second node N2 sequentially multiplies input data by 4 vertical extension coefficients C0, C3, C6 and C9. A second coefficient multiplier 34 connected to a third node N3 sequentially multiplies input data by 4 vertical extension coefficients C1, C4, C7 and C10. A third coefficient multiplier 35 connected to the second line memory 32 sequentially multiplies input data by 4 vertical extension coefficients C2, C5, C8 and C11. An adder 36 connected to the first, second and third coefficient multipliers 33, 34 and 35 adds input data to one another and supplies a vertical operation signal to the second terminal 318. The first and second line memories 31 and 32 are constructed with first-in first-out (FIFO) memories. In operation, when a fast forward operation is not performed, the switching terminal 320 is switched to the first terminal 316 by the control signal. Then the video signal generated from the VCR video signal reproducing circuit 312 is supplied to the video signal processor through the switching circuit. When the fast forward operation is performed, the switching terminal 320 is switched to the second terminal 318. Then horizontal scanning line data of the video signal of the VCR video signal reproducing circuit 312 is applied to the first node N1 and to the second node N2. The first line memory 31 receiving the data of the second node N2 by a sampling clock signal supplies the horizontal scanning line data to the third node N3. The second line memory 32 receives the data of the third node N3 by the sampling clock signal. Thus, the horizontal scanning lines are sequentially applied to the first and second line memories 31 and 32. At the same time, the first coefficient multiplier 33 receives the data of the second node N2, and the second coefficient multiplier 34 receives the data of the third node N3. The third coefficient multiplier 35 receives the data of the second line memory 32. The coefficient multipliers 33, 34 and 35 respectively multiply the input data by respective vertical extension coefficients and supply respective results to the adder 36. The adder 36 adds data generated from the coefficient multipliers 33, 34 and 35 to one another and supplies the added result to the video signal processor through the switching circuit switched to the second terminal 318. Thus, vertically extended operation data is generated from the vertical extension operation circuit 314 by the following equations: Lo1 = C0·Lin1 + C1·Lin2 + C2·Lin3 Lo2 = C3·Lin1 + C4·Lin2 + C5·Lin3 Lo3 = C6·Lin1 + C7·Lin2 + C8·Lin3 Lo4 = C9·Lin1 + C10·Lin2 + C11·Lin3 where Lo1, Lo2, Lo3 and Lo4 are data corresponding to the vertical operation signal. Lin1 is data corresponding to the horizontal scanning line generated from the video signal reproducing circuit 312, Lin2 is data corresponding to the horizontal scanning line generated from the first line memory 31, and Lin3 is data corresponding to the horizontal scanning line generated from the second line memory 32. C0, C1, C2, C3, C4, C5, C6, C7, C8, C9, C10 and C11 are the vertical extension coefficients. As described above, during a normal operation, the video signal is generated through a conventional path, and during the fast forward operation, the video signal is generated through the vertical extension operation circuit 314. Thus, the video signal is vertically extended to eliminate the dark bars. Since the dark bars and dissimilation are eliminated during the fast forward operation, the better screen is achieved. It should be understood that the present invention is not limited to the particular embodiment disclosed herein as the best mode contemplated for carrying out the present invention, but rather that the present invention is not limited to the specific embodiments described in this specification except as defined in the appended claims.

Claims: A vertical extension processing apparatus for supplying a video signal of video signal reproducing means (312) to video signal processing means and prevent top and bottom dark bars being generated and output to a screen having a screen ratio of 4:3 during a fast forward operation in a video cassette recorder of a PAL plus system, said apparatus comprising: vertical extension operation means (314) connected to said video signal reproducing means (312), for generating a vertical extension operation signal by vertically extending horizontal scanning lines of said video signal by a sampling clock signal to change the screen ratio by a factor 3:4 so as to change a PAL Plus signal having a screen ratio of 16:9 into a signal with a screen ratio of 4:3; and switching means (316 - 320) connected to said video signal reproducing means (312) and to said vertical extension operation means (314), the switching means having first and second switch states corresponding to a normal operation and a fast forward operation respectively, according to the condition of a control system, the switching means being arranged during a normal operation in which the control signal is in a first condition to form a path between said video signal processing means and said video signal reproducing means (312) by a control signal to generate said video signal, and, during said fast forward operation, to form a path between said video signal processing means and said vertical extension operation means (314) by said control signal to generate said vertical extension operation signal. A vertical extension processing apparatus of a video screen as claimed in claim 1, wherein said vertical extension operation means (314) comprises: first line memory means (31) connected to said video signal reproducing means (312), for storing said horizontal scanning line by said sampling clock signal; second line memory means (32) for storing said horizontal scanning line generated from said first line memory means (31) by said sampling clock signal; and operation means consisting of coefficient multipliers (33-35) and an adder (36), for vertically extending output data of said video signal reproducing means and said first and second line memory means to 3:4 by using the following operation equations; Lo1 = C0·Lin1 + C1·Lin2 + C2·Lin3 Lo2 = C3·Lin1 + C4·Lin2 + C5·Lin3 Lo3 = C6·Lin1 + C7·Lin2 + C8·Lin3 Lo4 = C9·Lin1 + C10·Lin2 + C11·Lin3 where Lo1, Lo2, Lo3 and Lo4 are data corresponding to said vertical extension operation signal, Linl is data corresponding to said horizontal scanning line generated from said video signal reproducing means (312), Lin2 is data corresponding to said horizontal scanning line generated from said first line memory means (31), Lin3 is data corresponding to said horizontal scanning line generated from the second line memory means (32), and C0, C1, C2, C3, C4, C5, C6, C7, C8, C9, C10 and C11 are vertical extension coefficients. A video recorder including the vertical extension processing apparatus according to claim 1 or 2. A method of eliminating top and bottom dark bars generated during a fast forward operation in a video cassette recorder of a PAL plus system, the method comprising: during playback connecting an output video signal of a video signal reproducing circuit (312) of the video cassette recorder directly to a video signal processor; and during a fast forward operation connecting the output video signal of the reproducing circuit (312) to the video signal processor via a vertical extension operation means (314), whereby said vertical extension operation means (314) performs an extension operation by vertically extending horizontal scanning lines of said video signal by a sampling clock signal to change the screen ratio by a factor of 3:4 so as to change a PAL Plus signal having a screen ratio of 16:9 into a signal with a screen ratio of 4:3. A method according to claim 4, wherein said method comprises, during a fast forward operation, the steps of: applying the video signal to an input terminal of a first line memory means (31) and to a first input terminal of a first coefficient multiplier (33); applying an output signal of the first line memory means (31) to an input of a second line memory means (32) and to a first input terminal of a second coefficient multiplier; applying an output signal of the second line memory means (32) to a first input terminal of a third coefficient multiplier (35); applying vertical extension coefficients to second input terminals of said first, second and third coefficient multipliers (33-35); and summing output signals from said coefficient multipliers (33-35) and applying the resulting summed signal to said video signal processor.

Inventors: BAE KWANG-SEOG, BAE, KWANG-SEOG
Applicants: SAMSUNG ELECTRONICS CO LTD, SAMSUNG ELECTRONICS CO., LTD.
Application year: 1996
Main classification: H04N5
IPC codes: H04N5, H04N11