Short circuit protection of an audio/video data bus

Abstract: The present invention concerns a transmission circuit Tx of an audio/video data bus (AVB) that comprises: a clamping means D1, D2 connected between first and second output terminals 200, 210 of the transmission circuit Tx; biasing networks R3, R4 for respectively biasing the output terminals 210, 200 during one operational mode of the transmission circuit Tx; and switched biasing networks S1, R1, S2, R2 for respectively biasing the output terminals 200, 210 during a second operational mode of the transmission circuit Tx; the switched biasing networks S1, R1, S2, R2 being controlled by a digital input signal Din, wherein a means is provided for protecting the clamping means from short circuit connections to the transmission circuits voltage supply rails A, B.

Description: The present invention relates to short circuit protection of a transmission circuit. More particularly, the present invention relates to the short circuit protection of output signal clamping circuitry, within a transmission circuit, from connections to the voltage supply rails. The European Patent Application EP 0 400 908 describes a protection of output signal clamping circuitry within a transmission circuit. This protection is a ratio frequency interference (RFI) protection, but not a short circuit protection. In the following text, figures that illustrate various embodiments of the state of the art and/or the present invention may incorporate the same or similar elements. Therefore, where the same or similar elements occur throughout the various figures, they will be designated in the same manner. Figure 1 represents a block diagram illustrating two data transceivers 100, 100' of an audio/video bus AVB. Since the two illustrated transceivers 100, 100' include identical elements, only one of the transceivers will be described. Furthermore, it should be noted that the audio/video bus AVB can have approximately ten or more transceivers connected to it at any one time. Transceiver 100 includes a transmission circuit Tx that is provided with a digital input signal Din and a receiver circuit Rx that receives transmitted data. When transceiver 100 is in transmission mode (Tx-mode) its digital input signal Din is converted into a differential digital output signal Dout for transmission via a twisted pair 120. The twisted pair provides a cheap but effective transmission medium. There exist audio and video interface devices produced by SGS Thomson Microelectronics that allow easy connection and intelligent control of a plurality of the same, or similar, interface devices that share a common AVB. Such devices have to fulfil EIA/NCTA Joint Engineering Commitee recommendations for connecting consumer audio and video apparatus. Figure 2 illustrates a circuit diagram of the transmission circuit Tx of Figure 1. The transmission circuit Tx includes two switches S1, S2, four resistors R1-R4 and two diodes D1, D2. Diodes D1 and D2, are connected in opposition between the output terminals 200, 210 of the transmission circuit Tx. The respective anode and cathode terminals of diodes D1 and D2 are connected to the output terminal 200 and the respective cathode and anode terminals of diodes D1 and D2 are connected to the output terminal 210. Diodes D1 and D2 work in opposition as a signal clamp. That is to say, diodes D1 and D2 act such that they clamp the voltage level of the signal between terminals 200 and 210 to a voltage level of +/-Vf, depending upon which one of the two diodes is conducting: Vf denotes the forward voltage drop of diodes D1 and D2 when they are conducting. Switch S1 and resistor R1 are connected in series between a positive voltage supply rail A and the output terminal 200. Switch S2 and resistor R2 are connected in series between a negative voltage supply rail B and the output terminal 210. Switches S1 and S2 are controlled in unison by the digital input signal Din. Resistor R3 is connected between the supply rail A and the output terminal 210 and resistor R4 is connected between the supply rail B and the output terminal 200. When the transmission circuit Tx is in Tx-mode, switches S1 and S2 open and close in response to the signal Din. By way of an example, consider the following. However, it will be necessary to make a few assumptions. Firstly, assume that switches S1 and S2 close when the digital input signal Din has a logic 1 state and that they open when the digital input signal Din has a logic 0 state: it should be understood that the inverse case could have also been assumed. Secondly, assume that R1=R2, R3=R4 and R3>R1: for a typical transmission circuit Tx, typical values of R1 and R3 are respectively 500 ohms and 15 Kohms, for a typical supply voltage (VA-VB) of 10 volts. The typical values of resistors R1-R4 and of the supply voltage (VA-VB) will be valid for the complete text of this document unless otherwise stated. Resistors R3 and R4 deliberately have substantially larger values than resistors R1 and R2 so as to avoid excessive power dissipation since, unlike resistors R1 and R2, resistors R3 and R4 permanently conduct current when the supply voltages are present. Resistors R1 and R2 only conduct current when switches S1 and S2 are closed. Therefore when the transmission circuit is not in Tx mode, switches S1 and S2 are open. When the signal Din has a logic 1 state, i.e. when switches S1 and S2 are closed, the majority of the current flows via S1, R1, D1, R2 and S2, since this is the path of least resistance between the supply rails A and B. Figure 3 illustrates an equivalent circuit diagram of the transmission circuit Tx when switches S1 and 52 are closed. Diode D1 has a forward voltage drop Vf that is more positive at the output terminal 200 than at the output terminal 210, as indicated. The current flowing through diode D1 is approximately given by (VA-VB)/(R1+R2) = 10/1000 = 10 milliAmperes. Referring back to Figure 2, when the signal Din has a logic 0 state, i.e. when switches S1 and S2 are open, the current flowing between the supply rails A and B can only flow via R3, D2 and R4. Figure 4 illustrates an equivalent circuit diagram of the transmission circuit Tx when switches S1 and S2 are open. Diode D2 has a forward voltage drop, also denoted Vf, that is more positive at the output terminal 210 than at the output terminal 200, as indicated. The current flowing through diode D2 is approximately given by (VA-VB)/(R3+R4) = 10/30000 = 0.33 milliAmperes. Table 1 hereinafter illustrates the approximate short circuit current values IAB, flowing from supply rail A to supply rail B, that can be tolerated by the transmission circuit Tx as a result of various combinations of short circuit connections when switches S1 and S2 are open. Table 2 hereinafter illustrates the approximate short circuit currents IAB that can be tolerated by the transmission circuitry Tx as a result of various combinations of short circuit connections when switches S1 and S2 are closed. For Table 2, it should be noted that the respective resistance values of the parallel combinations of resistors R1, R3 and R2, R4 have, for reasons of simplifying the principle, been approximated to R1 and R2: this approximation is justified by the fact that the ratio R1:R3 = R2:R4 = 30:1. It should be understood that more accurate analysis of the currents IAB can readily be ascertained by those skilled in the art. Short Circuit (From: To) Current IAB (mA) See Ref. Figure 200:210 10/30000 = 0.33 Figure 5a 200:A 10/15000 = 0.66 Figure 5b 210:A 10/15000 = 0.66 Figure 5c 200:B 10/15000 = 0.66 Figure 5d 210:B 10/15000 = 0.66 Figure 5e (200+210):A 10/15000 = 0.66 Figure 5b (200+210):B 10/15000 = 0.66 Figure 5e Short Circuit (From: To) Current IAB (mA) See Ref. Figure 200:210 10/1000 = 10 Figure 6a 200:A 10/500 = 20 Figure 6b 210:A 10/500 = 20 Figure 6c 200:B 10/500 = 20 Figure 6d 210:B 10/500 = 20 Figure 6e (200+210):A 10/500 = 20 Figure 6c (200+210):B 10/500 = 20 Figure 6e Figures 5a-5e illustrate circuit representations of the short circuit combinations of the transmission circuit Tx as set out in Table 1. Figures 6a-6e illustrate approximate circuit representations of the short circuit combinations of the transmission circuit Tx as set out in Table 2. As noted earlier, the currents IAB for the combinations of short circuits, as set out in Tables 1 and 2, can be tolerated by the transmission circuit Tx. That is to say, the transmission circuit Tx will not work correctly but, it will not suffer any adverse damage or effects due to any of the aforementioned short circuits, i.e. the transmission circuit Tx will recover from these short circuit faults. Neither would any other transceiver 100' or transceivers suffer any adverse damage or effects. However, there are two possible short circuit conditions that are not illustrated in either of Tables 1 or 2. These two short circuit conditions are when the output terminals 200, 210 of the transmission circuit Tx are respectively connected directly to the positive and negative voltage supply rails A and B or vice-versa. Figure 7a illustrates the equivalent circuit diagram of the transmission circuit Tx when the output terminals 200, 210 are respectively connected directly to the positive and negative voltage supply rails A and B. Figure 7b illustrates the equivalent circuit diagram of the transmission circuit Tx when the output terminals 200, 210 are respectively connected directly to the negative and positive voltage supply rails B and A. Referring to Figure 7a, diode D1 is connected directly across the supply rails A and B such that a short circuit current IAB' flows. Since D1 is forward biased its impedance is negligible: diode D2 being reverse biased. Therefore, the current IAB' flowing through D1 will only be limited by the internal impedance of the voltage supply apparatus that is connected to the supply rails A, B. Since the internal impedance of the voltage supply apparatus will also negligible, the current IAB' will be very large, so much so that it will completely destroy D1. The transmission circuit Tx will not recover from this particular short circuit fault. Furthermore, there is also the possibility that such a short circuit will affect the other parts of the transceiver 100 and/or other transceivers 100' that are connected to the bus AVB. Referring to Figure 7b, this case is exactly the same as that referred to in relation to Figure 7a, except that in this case, it is diode D2 that is connected directly across the supply rails A and B: diode D1 being reverse biased. In a best case scenario, either of the short circuit faults associated with Figures 7a and 7b will produce a serious problem for the transmission circuit Tx that develops the fault. And in a worse case scenario, either of these short circuit faults will produce a serious problem for all of the other transceivers (100') connected to the AVB. Such scenarios are best avoided. Accordingly, it is an object of the present invention to overcome these short circuit problems. Another object of the present invention is to provide a fully recoverable arrangement for overcoming these short circuit problems. Other objects of the present invention include providing simple, cost effective, and integratable arrangements for overcoming these short circuit problems. In order to achieve these objects, the present invention proposes a transmission circuit that comprises an input terminal for receiving a digital input signal and first and second output terminals for providing differential output signals; clamping means, comprising a first and second uni-directional conduction means, said clamping means being operatively connected between the first and second output terminals, for clamping the levels of the differential output signals; a first resistive element connected between a first voltage supply rail and the second output terminal; a second resistive element connected between a second voltage supply rail and the first output terminal; third resistive element and first switching element that are series connected between the second output terminal and the second voltage supply rail; and a fourth resistive element and second switching element that are series connected between the first output terminal and the first voltage supply rail A; the first and second switching elements being controlled by the digital input signal, wherein the transmission circuit further comprises means for protecting the clamping means from short circuit connections directly to the first and second voltage supply rails, said means for protecting the clamping means comprising a means for monitoring the voltage difference between the first and second uni-directional conduction means; third switching elements that is controlled by the monitoring means, connected in series with the first uni-directional conduction means; the third switching element being open-circuited when the voltage on the first output terminal, with respect to the voltage on the second output terminal, exceeds a predetermined threshold voltage; and a forth switching element or at least one resistive element, connected in series with the second uni-directional conduction means. According to other embodiments of the present invention, the first and second uni-directional conduction means are diodes, where either one of them or both of them are diode connected transistors. Any of the switching elements can be implemented by bipolar and/or mosfet transistors. The diode connected transistor or transistors being n-type or p-type transistors that are implemented in a bipolar technology and/or a mosfet technology. According to another embodiment of the present invention, the transmission circuit is monolithically integrated on a semiconductor substrate. These and other objects, as well as other advantages and features, of the present invention will become apparent in light of the following detailed description and accompanying drawings among which: Figure 1 illustrates an already depicted block diagram illustrating two data transceivers of an audio/video bus; Figure 2 illustrates an already depicted circuit diagram of transmission circuitry of Figure 1; Figure 3 illustrates an already depicted equivalent circuit diagram of the transmission circuitry of Figure 2 when switches S1 and S2 are closed; Figure 4 illustrates an already depicted equivalent circuit diagram of the transmission circuitry of Figure 2 when switches S1 and S2 are open; Table 1 illustrates already depicted approximate short circuit current values IAB when switches S1 and S2 are open; Table 2 illustrates already depicted approximate short circuit current values IAB when switches S1 and S2 are closed; Figures 5a-5e illustrate already depicted circuit representations of combinations of short circuits of the transmission circuit of Figure 3; Figures 6a-6e illustrate already depicted approximate circuit representations of combinations of short circuits of the transmission circuit of Figure 4; Figures 7a and 7b illustrate already depicted equivalent circuit diagrams of the transmission circuit of Figure 2 when its output terminals directly connected to the voltage supply rails; Figures 8 and 9 illustrate equivalent circuit diagrams of embodiments of the transmission circuit of Figure 2, according to the present invention, when its output terminals are connected directly to the voltage supply rails; Figure 10 illustrates an equivalent circuit diagram of another embodiment of the transmission circuit of Figure 2, according to the present invention, when its output terminals are connected directly to the positive and negative voltage supply rails; and Figure 11 illustrates a circuit diagram of a preferred embodiment of the transmission circuit of Figure 2, according to the present invention. Figure 8 illustrates an equivalent circuit diagram of an embodiment of the transmission circuit Tx, according to the present invention, when its output terminals 200, 210 are respectively connected directly to the positive and negative voltage supply rails A and B. Included in Figure 8 is circuitry, according to the present invention, for protecting the clamping diodes D1 and D2 from respective short circuit connections of the output terminals 200 and 210 to the positive and negative voltage supply rails A and B. It comprises a protection circuitry for protecting the clamping means: the diodes D1, D2. This protection circuitry includes: two switches S3 and S4 that are respectively connected in series with the diodes D1 and D2; and circuitry 800 that monitors the voltages at the output terminals 200, 210 and that controls, i.e. opens and closes, the switches S3 and S4. This monitoring circuitry 800 can for example be a comparator. The operation of the monitoring circuitry 800 is such that, when the output terminals 200 and 210 are respectively connected to the positive and negative voltage supply rails A and B, it controls, at least switch S3, so that it opens. Thus, when S3 is open, the short circuit current IAB' can no longer flow via the clamping diode D1. Therefore, diode D1 and the transmission circuit Tx are both protected. The actual voltage difference DV between the output terminals 200, 210 above which the monitoring circuitry 800 opens switch S3, i.e. DVopen, can be set at any value above approximately 2Vf. However, it is preferable to set DVopen somewhere between approximately 3Vf and 1 volt. An advantage of setting the value of DVopen between 3Vf and 1 volt, for example, is that the monitoring circuitry 800 can quickly respond to the direct supply short circuits and it can also quickly respond to other indirect short circuit situations that would tend to alter the normal bias voltages of the output terminals 200, 210. The actual voltage difference DV between the output terminals 200, 210 at which the monitoring circuitry closes switch S3, i.e. DVclose, can be set at a value equal to or less than DVopen. Or to put it in other words, it is possible to introduce some hysterisis into the monitoring circuitry 800 for opening and closing S3. The voltage difference DV will fall below DVclose when the short circuit is removed and the transmission circuit can therefore continue to operate for the purpose for which it was intended. The monitoring circuitry 800 can, as illustrated, have two outputs 810 and 820 that respectively control switches S3 and S4. It is possible that rather than the monitoring circuitry 800 just opening switch 53 when DV exceeds its predetermined threshold, i.e. DVopen, it could also control, i.e. open, switch S4. Also, it is possible that the monitoring circuitry 800 can have just one output terminal that would control switches S3 and S4 in unison. An advantage of opening switch S4 in addition to 53 is that there would be none of the problems associated with stressing diode D2 with a reverse bias voltage. Furthermore, it is possible that there could be two monitoring circuits or comparators that monitor or compare the voltages at one of the output terminals with a suitable reference voltage. Figure 9 illustrates the same embodiment as that illustrated in Figure 8. However, in Figure 9 the output terminals 200, 210 of the transmission circuit Tx are respectively connected directly to the negative and positive voltage supply rails B and A. The above description for Figure 8 is valid for that of Figure 9 except that it is at least diode D2 that must be protected. Therefore, in order to avoid repetition, reference can be made to the above, while at the same time interchanging the relevant references. Figure 10 illustrates an equivalent circuit diagram of another embodiment of the transmission circuit Tx, according to the present invention, when its output terminals 200, 210 are respectively connected directly to the positive and negative voltage supply rails A and B. This particular figure includes the same elements and operates in the same manner as Figure 8. However, Figure 10 also includes two resistors R5 and R6 that are respectively connected in parallel with switches S3 and S4. Therefore, rather than switch S3 completely isolating diode D1 from one of the output terminals, and hence one of the supply terminals, switch S3 opens such that resistor R5 is no longer short circuited. Thus, the value of R5 can be chosen such that the current flowing through D1 does not exceed the forward current rating of D1. For example, R5 can have a value from approximately 200 ohms, which for a 10 volt supply would cause a current of approximately 50 milliAmperes to flow through D1. If the value of R5 was chosen to be 15 Kohms, then a current of approximately 0.66 milliAmperes would flow through D1. It should be noted that it does not really matter what the value of R5 is, provided of course that the current through D1 does not exceed the forward current rating, because during the normal operation of the transmission circuit R5 will be short circuited. The same principle applies to R6 when the output terminals 200, 210 are respectively connected directly to the negative and positive voltage supply rails B and A and when switch S4 is opened. Alternatively, (although not illustrated) D1 and/or D2 could have resistors placed in series with both their respective anode and cathode terminals: these additional resistors of course being placed in parallel with additional suitably controlled switches. Again the above description for Figure 8 is valid for that of Figure 10 in both permutations where the output terminals 200, 210 are directly connected to the supply rails. Figure 11 illustrates a circuit diagram of a transmission circuit Tx according to a preferred embodiment of the present invention. This transmission circuit Tx includes three switches S1, S2, S3, six resistors R1-R4, R6, R7, a diode D2, a p-type bipolar transistor T1 and monitoring circuitry 801. Diode D2, resistors R1-R4 and switches S1 and S2 are connected as described above in relation to Figure 2. Resistor R6 is illustrated as being connected between the anode of D2 and terminal 210 and resistor R7 is illustrated as being connected between the cathode of D2 and terminal 200. Alternatively, one of the resistors could be suppressed while preferably increasing the value of the other. However, the inventor found that by having two matched resistors the biasing of the terminals 200 and 210 was balanced, which is preferable. Diode D1 of Figure 2 has, in this preferred embodiment and in accordance with the present invention, been replaced by the transistor T1. The emitter and collector terminals of T1 are respectively connected to the output terminals 200 and 210. The base terminal of T1 is connected to one side of switch S3, the other side of switch S3 being connected to the output terminal 210. When switch S3 is closed transistor T1 acts as a diode connected transistor that performs the same function as diode D1. Furthermore, it is possible, and preferable in an integrated circuit solution, to implement diode D2 using a p-type transistor (not illustrated): an advantage of this would be that during the normal operation of the transmission circuit Tx the forward voltage drops between the output terminals 200, 210 could be made to be substantially identical. The monitoring circuitry 801 of this current figure is connected and operates as described above in relation to the monitoring circuitry 800 of Figure 8. It should be understood that the monitoring circuitry 801 of this particular figure only differs from the monitoring circuitry 800 of Figure 8 in that it has one output control terminal 810 that controls switch S3. The condition when S3 is required to open is when the voltage developed on terminal 200, with respect to terminal 210, becomes greater than DVopen. When S3 is open, it disconnects the base and collector terminals of T1. Therefore, T1 no longer acts as a diode connected transistor, but instead, it develops a very large impedance between its emitter and collector terminals, i.e. the respective output terminals 200 and 210. Therefore, no current flows from terminal 200 to terminal 210 since T1 and D2 present high impedance's between terminals 200 and 210: D2 being of course reverse biased. It should be understood that the emitter-collector breakdown voltage of T1, that has an open-circuit, i.e. flying, base terminal, must be greater than VA-VB so as to avoid any possible conduction between terminal 200 and 210. Once the monitoring circuitry 801 detects a voltage difference DV less than or equal to the value of DVopen it controls switch S3 such that S3 closes. In the case where the voltage developed on terminal 210, with respect to terminal 200, becomes positive, the monitoring circuit 801 does not have to open switch S3: however, it is possible that it can open S3. Whether or not S3 is opened or not, in this particular case it is resistors R6 and R7 that limit the amount of current flowing from terminal 210 to 200. The values of R6 and R7 can be approximately in the range of 100-1000 ohms. The actual values chosen for R6 and R7 is dependant upon two factors. The first factor is the amount of current that diode D2 can tolerate for an infinite short circuit condition. The second factor is more subtile. The inventor found that the need for a switch could be avoided by placing at least one resistor in series with diode D2 and between terminals 200 and 210 that has an appropriate value. The rationale behind this avoidance, the inventor discovered, is that during the normal operation of the transmission circuit Tx when switches S1 and S2 are open, the current IAB flows through the two large value resistors R3 and R4, that have typical values of 15 Kohms. Therefore, the introduction of one or more resistors that have, in comparison to resistors R3 and R4, low values, will not adversely affect the normal operation of the transmission circuit Tx. Yet, these one or more resistors can have a total resistance value that limits the short circuit current IAB' and thus protect the integrity of the diode D2 and thus the transmission circuit Tx. The resistors R3 and R4 are another way to protect the clamping means. The monitoring circuitries 800 and 801 are of a known type. For example they comprise differential amplifiers of which the switch over threshold may be set. For an hysterisis mode it is advised to provide two such differential amplifiers and a logic gates set. The switches S1-S4 are preferably MOSFETs. Some advantages of having a resistor, or preferably balanced resistors R6, R7, as opposed to a switch, include: reduced complexity, reduced cost, increased reliability and in the case of an integrated solution a smaller die area can be included. Many other alternative embodiments of the present invention will become apparent to those skilled in the art. For example, the bipolar transistor T1 can be replaced by a field effect transistor, more elaborate switching arrangements can be thought up and the monitoring circuitry 801 can be implemented using a variety of comparator type solutions. However, as stated earlier, such alternative arrangements and embodiments are intended to be covered by the scope of the present invention.

Claims: A transmission circuit (Tx) having an input terminal for receiving a digital input signal Din and first and second output terminals (200, 210) for providing first and second differential output signals, that comprises: a clamping means comprising a first and second uni-directional conduction means, said clamping means being operatively connected between the first and second output terminals (200, 210), for clamping the levels of the first and second differential output signals; a first resistive element (R3) connected between a first voltage supply rail A and the second output terminal (210); a second resistive element (R4) connected between a second voltage supply rail (B) and the first output terminal (200); a series connected third resistive element (R2) and first switching element (S2) that are connected between the second output terminal (210) and the second voltage supply rail (B); and a series connected fourth resistive element (R1) and second switching element (S1) that are connected between the first output terminal (200) and the first voltage supply rail (A); the first and second switching elements being controlled by the digital input signal (Din), characterised in that it further comprises means for protecting the clamping means from short circuit connections to the first and second voltage supply rails (A, B), said means for protecting the clamping means comprising a means (810) for monitoring the voltage difference between the first and second uni-directional conduction means; and third switching elements (S3,), that is controlled by the monitoring means (810), connected in series with the first uni-directional conduction means, the third switching element (S3) being open-circuited when the voltage on the first output terminal (200), with respect to the voltage on the second output terminal (210), exceeds a predetermined positive threshold; a forth switching element (S4) or at least one resistive element (R6), connected in series with the second uni-directional conduction means. A transmission circuit (Tx) according to claim 1, characterised in that the first and second uni-directional conduction means are operatively connected in opposition, the first uni-directional conduction means being connected such that when it is conducting it allows current to flow from the first output terminal (200) to the second output terminal (210) and the second uni-directional conduction means being connected such that when it is conducting it allows current to flow from the second output terminal (210) to the first output terminal (200). A transmission circuit according to claim 1 or 2, characterised in that the forth switching element (S4) is open circuited when the voltage on the second output terminal (210), with respect to the voltage on the first output terminal (200), exceeds a predetermined positive threshold. A transmission circuit (Tx) according to any of the claims 1-3, characterised in that the first and second uni-directional conduction means are diodes (D1, D2). A transmission circuit (Tx) according to any of the claims 1-3, characterised in that the first uni-directional conduction means is a diode connected transistor (T1) and the second uni-directional conduction means is a diode (D2). A transmission circuit (Tx) according to claim 5, characterised in that the diode (D2) is a diode connected transistor. A transmission circuit (Tx) according to claim 5, characterised in that the diode connected transistor (T1) is a p-type transistor. A transmission circuit (Tx) according to claim 6, characterised in that the diode connected transistors are p-type transistors. A transmission circuit (Tx) according to claims 1 and 5, characterised in that the third switching element (S3) is operatively connected between two terminals of the diode connected transistor (T1) and is controlled by the monitoring means (810) such that the third switching element (S3) is open-circuited when the voltage on the first output terminal (200), with respect to the voltage on the second output terminal (210), exceeds a predetermined positive threshold. A transmission circuit (Tx) according to claim 9, characterised in that the diode (D2) is a diode connected transistor. A transmission circuit (Tx) according to claim 9, characterised in that the diode connected transistor (T1) is a p-type transistor. A transmission circuit (Tx) according to claim 10, characterised in that the diode connected transistors are p-type transistors. A transmission circuit (Tx) according to claims 8 or 12, characterised in that the p-type transistors are bipolar transistors. A transmission circuit (Tx) according to any of the above claims, characterised in that it is monolithically integrated on a semiconductor substrate; A transmission circuit according to any of the above claims, characterised in that the digital input signal is that which is associated with an audio/video bus.

Inventors: JAFFARD JEAN-LUC, LE BRIZ OLIVIER, JAFFARD, JEAN-LUC, LE BRIZ, OLIVIER
Applicants: SGS THOMSON MICROELECTRONICS, STMICROELECTRONICS S.A.
Application year: 1996
Main classification: H04L25
IPC codes: H04L25