VARIABLE RATE TRANSMITTING METHOD, AND TRANSMITTER AND RECEIVER USING IT

Abstract: A variable rate transmission method that can vary the transmission rate of data. A transmitting side supplies a transmitted data sequence to an error detecting encoder (105) and a frame memory (103). The frame memory (103) stores data of a variable length to be transmitted in one frame. The error detecting encoder (105) calculates an error detecting code (such as CRC code) for each frame of the transmitted data. A multiplexer (104) adds the calculated error detecting code ahead of the transmitted data to place it at the initial position of the frame, and sequentially outputs the data sequence frame by frame. A receiving side calculates an error detecting code of the data in each transmitted frame in the same manner as the transmitting side, and compares the calculated error detecting code with the error detecting code at the initial position of the frame. The end bit of the frame data is decided as a position at which the two error detecting codes coincide. This makes it possible to transmit variable length data without informing the receiving side of the data length in each frame. This is equivalent that the transmission rate can be varied freely.

Description: TECHNICAL FIELD The present invention relates to a code division multiple access (CDMA) in mobile communications systems, and more particularly to a variable rate transmission method, a transmitter and receiver using the same method, which can realize apparent variable rate transmission by transmitting data contained in frames of a fixed length at a constant transmission rate. BACKGROUND ART In CDMA mobile communications, the output data (transmitted data) from a voice codec undergoes primary modulation, followed by secondary modulation using a pseudorandom sequence (spreading code sequence), to be spectrum-spread to a wideband signal and transmitted. The bit rate of the spreading code sequence is called a chip rate, and is tens to hundreds of times faster than the transmission rate. Generally, the primary modulation uses binary or quadrature phase shift keying, and the secondary modulation uses binary phase shift keying. Considering voice communications, the information amount of a transmitted voice signal is not constant, but varies from time to time. Accordingly, the transmission rate can be changed by dividing the transmitted data into frames of a fixed duration, and by transmitting data of a variable bit length in each frame, thereby achieving effective transmission of information in each frame period. This can obviate useless transmission, thereby saving power consumption of the transmitter. The following method is taken to transmit data of a different transmission rate in the CDMA system. First, data whose transmission rate is lower than the frame transmission rate is transmitted using a part of transmission frames (see, for example, R. Padovani, "Reverse link performance of IS-95 based cellular systems", IEEE Personal Communications, vol.1, pp.28-34, 3rd Quarter 1994). On the other hand, data whose transmission rate is higher than the frame transmission rate is divided into a plurality of transmission channels, and the divided data are spread using different spreading codes to be transmitted. It is necessary in this method, however, to provide a receiving side with the transmission rate information. Alternatively, when the transmission rate information is not provided, it is necessary to predetermine the values the transmission rate can take, to carry out the error detection of the received data for all the transmission rates, and to output the received data with the transmission rate at which the error is not detected as the right data. In this case, if an error occurs during the transmission of the transmission rate information, the effective length in the received frames cannot be decided, which makes it difficult to correctly recover the transmitted data at the receiving side even if no error has occurred during the data transmission. Thus, it is difficult for the conventional data transmission method to vary the transmission rate during the communications to achieve a variable rate transmission. In addition, when the data is transmitted at a rate considerably lower than a maximum transmission rate, burst transmission occurs because of blanks in the frames, during which data transmission is not carried out. Such burst-like transmission presents a problem in that it causes an EMI (Electromagnetic Interference). FEC (Forward Error Correction) of the transmitted data is generally used to improve the transmission quality in the case where many errors can occur during transmission as in a mobile communications environment. In this case, the transmitting side transmits transmitted data (including the transmission rate information) which has undergone error correcting encoding, and the receiving side carries out the error correcting decoding followed by extraction of the transmission rate information to decide the effective data length in each received frame. Accordingly, the transmission rate information cannot be obtained until the end of the error correcting decoding. Thus, the decoding is performed before deciding the data length to be decoded, and hence the error correction cannot fully achieve its effect. On the other hand, there are some data in the transmitted data that can greatly degrade the received data quality when they are corrupted. For example, control data requires transmission quality higher than voice data. Also, the voice data includes some which can greatly degrade the quality and others which cannot, depending on the voice encoding method. In other words, the transmitted data includes data of various degrees of importance. In view of this, a transmission method is adopted in TDMA (Time Division Multiple Access), which uses error correcting codes of different correcting power in accordance with the degree of importance of the transmitted data (see, for example, "Personal digital cellular telecommunication system RCR standard, RCR STD-27", Research & Development Center for Radio System). This method, however, lacks flexibility to transmit various data of different transmission rates. As described above, high speed data is divided and spread to a plurality of signals using different spreading codes, and the spread signals are combined to be transmitted. To demodulate such signals at a receiving side using coherent detection, the transmitting side must periodically inserts pilot symbols into transmitted data (see, for example, S. Sampei, "Fading Compensation for 16QAM in Land Mobile Communications", The Transactions of the Institute of Electronics, Information and Communication Engineers of Japan B-II, Vol. J72-B-II pp. 7-15, January 1989, or its revised version, S. Sampei, et al. "Rayleigh Fading Compensation for QAM in Land Mobile Radio Communications", IEEE Transactions on Vehicular Technology, VOL. 42. No. 2, MAY 1993). This method will make it necessary for the plurality of transmission channels to send the same pilot symbols when the method is applied to the signals spread with the plurality of the spreading codes. The respective channels, however, experience the same fading, and hence it is unnecessary to send the pilot symbols through the plurality of channels. Since multiple users share the same frequency band in CDMA, transmission of superfluous signals will reduce the number of users that can be accommodated in a limited frequency band because it will increase interference to other users by an amount corresponding to the transmission power necessary to send the superfluous signals. Furthermore, the high speed signal must be divided into a plurality of signals followed by spreading using different spreading codes and by combining of the spread signals, and the combined signal is converted into a radio frequency band followed by power amplification to be transmitted. If the plurality of spread signals are combined in the same phase, the amplitude of the combined signal will increase in proportion to the number of divided signals. This will require a high peak power liner transmission power amplifier. Such a power amplifier demanding large power consumption is unsuitable to portable telephones which require low power consumption. US-A-5341396 discloses the transmission of variable rate data in a CDMA communication system in which a parity bit is added to transmission data, and the number of chips at spread codes in one bit is varied according to changes in the data signal rate. US-A-5204876 discloses variable rate transmission in a CDMA communication system in which the encoding rate is adjusted according to the transmission rate, whilst the length of the spreading code is made variable. EP-A-0564937 discloses a transmission power control method using pilot signal transmission in a CDMA communication system. DISCLOSURE OF THE INVENTION An object of the present invention is to provide a variable rate transmission method, a transmitter and a receiver using the same method, which make it possible to freely change the transmission rate without providing a receiving side with the transmission rate information of transmitted data. Another object of the present invention is to provide a variable rate transmission method, a transmitter and a receiver, which can achieve data protection in accordance with the degree of importance of the data constituting in the transmitted data. Still another object of the present invention is to provide a variable rate transmission method, a transmitter and a receiver that can flexibly send data over a wide range from low to high rate. According to a first aspect of the present invention, there is provided a transmitter for transmitting variable length information data in a code division multiple access system, comprising: a frame memory for storing the information data which should be transmitted; an error detecting encoder for generating an error detecting code by error detecting encoding said information data; a multiplexer for assembling a frame by using said information data and said error detecting code; and a transmitting portion for transmitting the information data and the error detecting code, the transmitter being characterised in that: said multiplexer is arranged to use a blank when the sum of the length of said information data and the length of said error detecting code is less than the length of the frame, and said transmitting portion is arranged to pause transmission in the blank. According to a second aspect of the present invention, there is provided a variable length information data transmission method in a code division multiple access system, comprising the steps of: storing the information data which should be transmitted; generating an error detecting code by error detecting encoding the information data; and assembling a frame by using the information data and the error detecting code, and transmitting the information data and the error detecting code, the method being characterised in that in said assembling step a blank is provided when a sum of a length of the information data and a length of the error detecting code is less than the length of the frame, and in said transmitting step transmission is paused in the blank. According to a third aspect of the present invention, there is provided a receiver in a code division multiple access system for receiving a signal comprising a frame which includes variable length information data and an error detecting code of the information data, and further includes a blank when the sum of the length of said information data and the length of said error detecting code is less than the length of the frame, said receiver characterized by comprising: a demultiplexer for separating the error detecting code and received information data from the received signal by assuming a final bit of the received information data; an error detecting encoder for generating the error detecting code by encoding said received information data; and a comparator for comparing said generated error detecting code with the received error detecting code separated from the received signal, wherein the receiver is arranged to decide the received information data is proper information data when said generated error detecting code and said received error detecting code agree with each other. According to a fourth aspect of the present invention, there is provided a reception method in a code division multiple access system that receives a signal comprising a frame which includes variable length information data and an error detecting code of the information data, and further includes a blank when the sum of the length of said information data and the length of said error detecting code is less than the length of the frame, said reception method characterized by comprising the steps of: separating the error detecting code and received information data from the received signal by assuming the final bit position of the received information data ; error detecting encoding said received information data; and comparing an error detecting code generated by the error detecting encoding with the separated error detecting code, and if they agree with each other, outputting the received information data as the proper information data. According to a fifth aspect of the present invention, there is provided a receiver in a code division multiple access system for receiving a signal comprising a frame which includes variable length information data and an error detecting code of said information data which has been disposed after the information data, and further includes a blank when the sum of the length of said information data and the length of said error detecting code is less than the length of the frame, said receiver characterized by comprising: an error detection circuit for assuming a final bit of the received information data, and detecting an error of the received signal from the first bit to said assumed final bit of the received information data, wherein the assumed final bit is treated as the proper final bit when there is no error in the received signal, and error detecting process is repeated by shifting the assumed final bit when there is an error in the received signal. According to a sixth aspect of the present invention, there is provided a reception method in a code division multiple access system that receives a signal comprising a frame which includes variable length information data and an error detecting code of said information data which has been disposed after the information data, and further includes a blank when the sum of the length of said information data and the length of said error detecting code is less than the length of the frame, said reception method characterized by comprising the steps of: assuming a final bit in the received information data, and detecting an error of the received signal from the head of the received bits to the assumed final bit; and deciding that the assumed final bit is the proper final bit of the received information data when there is no error in the received signal, and repeating the process for detecting an error by shifting the assumed final bit when there is an error in the received signal. BRIEF DESCRIPTION OF THE DRAWINGS Figs. 1A and 1B are block diagrams showing a first embodiment of a transmitter and a receiver using the variable rate transmission method in accordance with the present invention; Figs. 2A and 2B are diagrams showing data sequences output from a multiplexer 4 of the first embodiment, wherein Fig. 2A illustrates the data when the transmission rate is maximum, and Fig. 2B illustrates the data when the transmission rate is less than the maximum; Fig. 3 is a schematic diagram showing a frame memory 106B of an interleaver 106 of Fig. 1A; Fig. 4 is a diagram showing the structure of a frame in the data sequence output from the frame memory 106B of Fig. 1A; Fig. 5 is a diagram illustrating processing behavior when frame memories 103 and 106B, each of which includes two sides, are used in the first embodiment; Figs. 6A and 6B are block diagrams showing a second embodiment of a transmitter and a receiver using the variable rate transmission method in accordance with the present invention; Figs. 7A and 7B are diagrams showing the output from the multiplexer 4 of Fig. 6A, wherein Fig. 7A illustrates the data when the transmission rate is maximum, and Fig. 7B illustrates the data when the transmission rate is less than the maximum; Figs. 8A and 8B are schematic diagrams illustrating data sequences output from the multiplexer 104 of Fig. 6A when transmission rate information is held in the preceding frame; Figs. 9A and 9B are block diagrams showing a third embodiment of a transmitter and a receiver using the variable rate transmission method in accordance with the present invention; Fig. 10 is a schematic diagram illustrating the operation of a repeater 121 of Fig. 9A, wherein Fig. 10(A) illustrates the output of the multiplexer 104 of Fig. 9A, Fig. 10(B) illustrates the output of an error correcting encoder of Fig. 9A, and Fig. 10(C) illustrates the output of the repeater 121; Figs. 11A and 11B are block diagrams showing a fourth embodiment of a transmitter and a receiver using the variable rate transmission method in accordance with the present invention; Fig. 12 is a schematic diagram illustrating the operation of the repeater 121 of Fig. 11A, wherein Fig. 12(A) illustrates the output of the multiplexer 104 of Fig. 11A, Fig. 12(B) illustrates the output of the error correcting encoder of Fig. 11A, and Fig. 12(C) illustrates the output of the repeater 121; Fig. 13 is a schematic diagram illustrating a bit repetition method of frame data in a fifth embodiment of a transmitter using the variable rate transmission method in accordance with the present invention; Figs. 14A and 14B are block diagrams showing a sixth embodiment of a transmitter and a receiver using the variable rate transmission method in accordance with the present invention; Fig. 15A is a block diagram showing the arrangement of a pilot symbol inserting block 130 of Fig. 14A; Fig. 15B is a block diagram showing the arrangement of a primary demodulator 152 of Fig. 14B; Fig. 16 is a schematic diagram illustrating the data structure output from the multiplexer 104 of Fig. 14A; Fig. 17 is a schematic diagram illustrating the order of writing to and reading from the frame memory 106B of Fig. 14A; Fig. 18 is a schematic diagram illustrating a modulated symbol sequence output from the pilot symbol inserting block 130 of Fig. 14A; Fig. 19 is a schematic diagram illustrating the slot structure of the sixth embodiment; Fig. 20 is a block diagram showing a seventh embodiment of a transmitter using the variable rate transmission method in accordance with the present invention; Fig. 21 is a schematic diagram illustrating power transmission control in the seventh embodiment; Fig. 22 is a schematic diagram illustrating an example of data stored in the frame memory 106B in an eighth embodiment of a transmitter using the variable rate transmission method in accordance with the present invention; Fig. 23 is a block diagram showing the major portion of the receiver of the eighth embodiment; Fig. 24 is a block diagram showing a ninth embodiment of a transmitter using the variable rate transmission method in accordance with the present invention; and Fig. 25 is a block diagram showing the major portion of the receiver of the fifth embodiment. BEST MODE FOR CARRYING OUT THE INVENTION The invention will now be described with reference to the accompanying drawings. EMBODIMENT 1 Figs. 1A and 1B are block diagrams showing a first embodiment of a transmitter and a receiver using the variable rate transmission method in accordance with the present invention. Fig. 1A shows the configuration of the transmitter. In Fig. 1A, a transmitted data sequence applied to an input terminal 101A is delivered to an error detecting encoder 102 and a frame memory 103. The frame memory 103 holds the data with the number of bits to be transmitted in one frame period. On the other hand, the error detecting encoder 102 calculates the error detecting code (CRC bits, for example) of the transmitted data of one frame. A multiplexer 104 outputs for each frame a data sequence consisting of the calculated error detecting code followed by the transmitted data. Figs. 2A and 2B illustrate the data sequences output from the multiplexer 104. Fig. 2A illustrates the data sequence when the transmission rate of the data is maximum, and Fig. 2B illustrates the data sequence when the transmission rate is less than the maximum. As shown in Fig. 2B, an idle time (a blank) takes place in each frame when the transmission rate is less than the maximum rate. The error detecting code is inserted at a fixed position in each frame. For example, in Figs. 2A and 2B, it is placed at the initial position of the frame. Returning to Fig. 1A, the data sequence of one frame, into which the error detecting code is inserted, undergoes error correcting encoding through an error correcting encoder 105, and is input to an interleaver 106. The interleaver 106 includes a controller 106A and a frame memory 106B. Fig. 3 is a schematic diagram illustrating the frame memory 106B of the interleaver 106. Although the frame memory 106B has two sides, that is side-A and side-B, Fig. 3 shows only one of them. Referring to this figure, an example of interleaving will be described. The interleaver 106 reads the data sequence of one frame in a direction different from that of writing to the frame memory 106B. That is, the interleaver 106 reads in the direction of columns the transmitted data which has been written in the direction of rows of the frame memory 106B. The data sequence thus interleaved is rewritten in the other side of the frame memory 106B. Incidentally, numbers #1 - #N attached to the left of the frame memory 106B indicate the order of writing the data, which will be described later in the sixth embodiment. Fig. 4 illustrates the frame structure of the data sequence output from the frame memory 106B. The data segments corresponding to individual rows of the frame memory 106B are called slots. Accordingly, if one side of the frame memory 106B corresponding to one frame consists of M bits/row * N rows as shown in Fig. 3, one slot consists of N bits and one frame consists of M slots, and the number of bits of one frame is N*M bits. Thus, the transmitted data undergoes error correcting encoding by the error correcting encoder 105, followed by the interleaving by the interleaver 106. As a result, the probability increases that the transmitted data can be corrected using the error correcting code for burst mode errors. The frame memories 103 and 106B in Fig. 1A each have two sides (side-A and side-B) to hold two frame data, respectively. The first frame data is written in the side-A of the frame memory 103, and then written in the side-A of the frame memory 106B after the error correcting encoding and the interleaving. The second frame data is written in the side-B of the frame memory 103, and then written in the side-B of the frame memory 106B after the error correcting encoding and the interleaving. Using the side-A and side-B alternately makes it possible to continue the processing of a series of data sequences. Fig. 5 illustrates the processing using the two-side frame memories. As shown in Fig. 5, the input data sequence of one frame is written in the frame memory 103, undergoes the combined processing of the error correcting encoding and the interleaving, and then the processed data is written into the frame memory 106B. As a result, the transmitted data sequence is delayed by an amount of one frame interval plus the processing time. The data sequence output from the frame memory 106B is phase modulated by a primary modulator 108, followed by phase modulation (spreading) through a secondary modulator 109. The secondary modulator 109 uses a spreading code sequence with a chip rate of integer multiple (usually from tens to hundreds of times) of the transmission rate of the transmitted data, thereby outputting the transmitted data from an output terminal 110. The primary modulator 108 does not carry out the modulation of the blank in each slot. The transmitter, carrying out the above-mentioned processing, transmits the variable number of bits in a fixed frame period. In other words, the spread data is sent at an apparent variable transmission rate. Fig. 1B is a block diagram showing the receiver. The receiver despreads the spread data fed from an input terminal 150 with a secondary demodulator 151. The despread data is detected by a primary demodulator 152, and is fed to a deinterleaver 153. The deinterleaver 153 includes a controller 153A and a frame memory 153B with two side arrangement, and operates in the reverse order of the input and output in the interleaver 106 at the transmitter. Specifically, the controller 153A writes the data into the frame memory 153B column by column (slot by slot), and reads the data row by row. This procedure enables the original data sequence of one frame to be recovered, thereby producing the error detecting code and the data sequence following it. The error detecting code and the data sequence undergo error correcting decoding through an error correcting decoder 154, and are fed to a demultiplexer 155. The demultiplexer 155 separates the error detecting code and the transmitted data sequence which are placed at fixed positions in the frame. This is carried out by synchronizing frames in the demultiplexer 155. The demultiplexed error detecting code is fed to an error detecting code memory 157 to be held therein. On the other hand, the data sequence is output from an output terminal 159 as received data, and is input to an error detecting encoder 156, as well. The error detecting encoder 156 performs the same error detecting encoding as that of the transmitter on the input data sequence, again. The error detecting code thus obtained is compared by a comparator 158 with the data sequence held in the error detecting code memory 157 bit by bit of the code. The comparator 158 produces a coincident signal from a terminal 160 when the entire bits agrees with each other. If no error has occurred during the transmission, the coincident signal will be output at the right number of bits of the transmitted data, in which case the received data sequence in the received frame is decided correct, and is output from the output terminal 159. The data transmission using the transmitter and receiver as described above makes it unnecessary to send from the transmitter to the receiver the information representing the number of bits of the frame. Accordingly, even if the number of bits in the frame (that is, the apparent transmission rate) is varied from frame to frame at the transmitting side, the receiving side can catch up with this correctly. In other words, the variable rate transmission can be achieved in which the apparent transmission rate can be varied frame by frame during the communications. Since the frame length is fixed, the receiver can always identify the frames correctly, even if frames without transmitted data are mixed. If an error occurs in the transmitted data, the comparator 158 can detect (misdetect) the coincident signal at a wrong position. In this case, the demultiplexer 155 will output either a part of the entire effective data in the frame as effective data, or data consisting of the entire effective data plus superfluous data following it. The transmitter and receiver of this embodiment, however, place the error detecting code in the fixed position in the frame, and hence, the probability of the misdetection can be reduced to a very small value by determining the number of bits of the error detecting code greater than that needed for detecting ordinary errors. In addition, limiting the number of bits allowed in one frame (for example, setting it at a multiple of two bits) will restrict the position at which the coincident signal of the comparator 158 is obtained, and this can further reduce the probability of outputting the coincident signal at a wrong position. EMBODIMENT 2 Figs. 6A and 6B are block diagrams showing a second embodiment of a transmitter and a receiver using the variable rate transmission method in accordance with the present invention. The second embodiment differs from the first embodiment in that it provides the transmission rate information from the transmitter to the receiver. More specifically, it differs in the following points. (1) The transmitter is provided with a transmission rate information memory 113. The transmission rate information memory 113 is a memory for storing the transmission rate information of the frame data held in the frame memory 103, that is, the information representing the number of bits of the frame data. The information is input to the transmission rate information memory 113 from a terminal 101B frame by frame. Thus, the transmitter sends the data of a variable bit number with the transmission rate information in a fixed frame period. (2) The multiplexer 104 inserts the transmission rate information before the error detecting code. Figs. 7A and 7B illustrate the output of the multiplexer 104. Fig. 7A illustrates the output when the transmission rate of the transmitted data is maximum, and Fig. 7B illustrates the output when the transmission rate is less than the maximum rate. In Fig. 7B, an idle time, that is, a blank including no data takes place in each frame. As shown in these figures, each frame consists of the transmission rate information, the error detecting code and the transmitted data. The frame differs from that of the first embodiment in that it is provided with the transmission rate information preceding the error detecting code. (3) The receiver is also provided with a transmission rate information memory 161. The transmission rate information memory 161 stores the transmission rate information extracted from the received data fed from the error correcting decoder 154. With such an arrangement, the transmitter sends the data as shown in Figs. 7A and 7B, after interleaving, modulating and spreading it. The receiver despreads, demodulates and deinterleaves the received data as in the first embodiment. Thus, the original data sequence of one frame is recovered, and the transmission rate information, the error detecting code and the transmitted data sequence are obtained. These are fed to the error correcting decoder 154 to undergo the error correcting encoding. The transmission rate information contained in the recovered output of the error correcting decoder 154 is input to the transmission rate information memory 161 to be stored, and is output from the terminal 162. On the other hand, the transmitted data sequence and the error detecting code are separated by the demultiplexer 155. The transmitted data is fed to the error detecting encoder 156, and the terminal 159 from which it is output as the received data. On the other hand, the error detecting code is input to the error detecting code memory 157 to be stored. The error detecting encoder 156 carries out the same error detecting encoding as that of the transmitter to the last bit of the input data sequence. The last bit is fed from the transmission rate information memory 161. This is the very point which differs from the first embodiment. After that, the processing proceeds as in the first embodiment. The comparator 158 compares the error detecting code output from the error detecting encoder 156 with the contents of the error detecting code memory 157 bit by bit, and outputs the coincident signal from the terminal 160 when all the bits agree with each other. If no error occurs during the transmission, the coincident signal is output to the terminal 160, in which case, it is decided that the transmitted data in the frame output from the terminal 159, and the transmission rate information output from the terminal 162 are both received correctly. When using a convolutional code as the error correcting code, and the maximum likelihood decoding as the decoding processing in this embodiment, the decoded result of the transmission rate information is first obtained by sequentially applying the maximum likelihood decoding, and then the error correcting decoding of the transmitted data is carried out to the last bit designated by the transmission rate information. In this case, increasing reliability is obtained of the decoded result of the transmission rate information as the input signal stored in the decoder increases, that is, as the encoded data sequence following the transmission rate data increases, because of the characteristics of the decoder. For this reason, it is preferable that the greatest possible fixed length data sequence such as error detecting code other than the transmitted data be placed immediately after the transmission rate information without interruption. Alternatively, the following method can be used to decode the transmitted data to the last bit. The transmitter adds tail bits immediately after the last bit, and performs the error correcting encoding on them. The receiver completes the error correcting decoding with the tail bits. Alternatively, the transmitter can insert the tail bits after the transmission rate information to be transmitted, and the receiver can once complete decoding at the tail bits, and then restart the decoding of the transmitted data to the last bit. In the processing described above, processings such as deinterleaving, error correcting decoding and error detecting encoding are carried out successively after writing the input data sequence of one frame into the frame memory 153A of the deinterleaver 153. Accordingly, the transmitted data sequence is delayed by an amount of one frame interval involved in the deinterleaving plus the processing time. To avoid such a delay, the following method can be taken. First, the transmitter places the transmission rate information associated with the current frame at the initial position of the preceding frame, which transmission rate information is stored in the transmission rate information memory 113. On the other hand, the receiver obtains the last bit of the transmitted data of the current frame on the basis of the transmission rate information in the preceding frame stored in the transmission rate information memory 161. Figs. 8A and 8B show the data sequence output from the multiplexer 104 of the transmitter in this case. When the transmission rate information is sent by the preceding frame, the receiver can obtain the number of bits of the effective data of the current frame before deinterleaving it. This makes it possible to eliminate the frame delay involved in the deinterleaving. As a result, the power of the received signal can be measured precisely during the transmission of the current effective data. This is required to achieve the transmission power control, in which the power of the received signal must be measured with minimum delay time to be fed back to the transmitting side. To transmit the transmission rate information by the preceding frame, a dummy frame is required to send the transmission rate information of the first frame at the beginning of the successive data transmission. According to the transmitter and receiver described above, the receiver performs the reencoding and coincident detection of the error detecting code to confirm the effectiveness of the transmitted data for each frame. Therefore, even if the received transmission rate information (that is, information representative of the number of transmitted bits in the frame) is wrong, the possibility (misdetection) of outputting transmitted data of wrong length can be reduced to a minimum. This makes possible to achieve a highly reliable, variable rate data transmission. When a data sequence is transmitted at a low transmission rate by the transmitter and receiver of the above-described first and second embodiments, an amount of the transmitted data per frame reduces. In such a case, a burst transmission occurs in which short data sequence is transmitted intermittently because the frame length is fixed. If it is known in advance that the number of bits (the total bits of the error detecting code and the data sequence) per frame is equal to or less than 1/K of the maximum bits of the frame where K is a positive integer, the burst mode transmission can be avoided by sending the data sequence with its individual bits repeated K times after carrying out the error correcting encoding of the data sequence. The following embodiments are an example of such a data transmission. EMBODIMENT 3 Figs. 9A and 9B are block diagrams showing a third embodiment of the transmitter and receiver using the variable rate transmission method in accordance with the present invention. This embodiment mainly differs from the first embodiment as shown in Figs. 1A and 1B in the following. (1) The transmitter is provided with a repeater 121 connected next to the error correcting encoder 105. As shown in Fig. 10(C), the repeater 121 has a function to repeat each bit in the frame K times (twice in Fig. 10(C)). Thus, a new data sequence is generated in which the bits of the output data from the error correcting encoder 105 as shown in Fig. 10(B) are each repeated K times. (2) A multiplier 123 for controlling the transmission power is connected between the primary modulator 108 and the secondary modulator 109. The data output from the repeater 121 is interleaved by the interleaver 106, followed by primary and secondary modulation, and the transmission thereof. Since the same bit is transmitted K times, the average transmission power of the bit increases by a factor of K as compared with the transmission power when repeating is not performed. The average transmission power is proportional to the power of interference to other users. To prevent the average transmission power increase due to the repetition of bits, the system in Fig. 9A is provided with the multiplier 123 connected after the primary modulator 108 so that the output of the primary modulator 108 is multiplied by the power factor of 1/K. (3) The receiver is provided with an integrator 171 and a thinning out circuit 172, which are connected immediately after the deinterleaver 153. The integrator 171 obtains an integral for each continuous K symbols of the deinterleaved received data sequence. The thinning out circuit 172 thins out the integrated output at every K symbol interval, and outputs the result. Both the circuits 171 and 172 carry out this processing only to the repeated portion of the transmitted data so that the other additional bits are passed without change. The operation of the embodiment will now be described. Fig. 10(A) shows the output of the multiplexer 104. Such arrangement of the frame including blanks will cause burst mode transmission. To avoid this, the error detecting code and transmitted data output from the error correcting encoder 105 (Fig. 10(B)) are input to the repeater 121 which repeats each bit K times (Fig. 10(C)). The repeating coefficient K is set so that the frame is filled as much as possible (K=2 in Fig. 10). Transmitting the output of the repeater 121 can eliminate the burst mode transmission. On the other hand, the receiver recovers the same data sequence as the output of the error correcting encoder 105 of the transmitter through the integrator 171 and the thinning out circuit 172. After that, the same processing as that of the first embodiment is carried out, thereby resulting in the final received data sequence. The number K of repetition used in the receiver must be identical to that used in the transmitter. Accordingly, it is necessary to send K to the receiver before the data transmission. This embodiment can achieve the variable rate transmission without the burst mode transmission even if the data transmission rate is substantially lower than the maximum rate. EMBODIMENT 4 Figs. 11A and 11B are block diagrams showing a fourth embodiment of the transmitter and receiver using the variable rate transmission method in accordance with the present invention. This embodiment is a combination of the second and third embodiments. Specifically, the transmission rate information memory 113 and transmission rate information memory 161 are added to the transmitter and receiver of the third embodiment, respectively. Fig. 12 is a diagram corresponding to Fig. 10 of the second embodiment. The present embodiment is characterized in that the transmission rate information is inserted immediately before the transmitted data. Since the other operation can be easily understood from the second and third embodiments, the description thereof will be omitted here. EMBODIMENT 5 In the third and fourth embodiments described above, the individual bits are repeated K times bit by bit. This, however, is not essential. For example, as shown in Fig. 13, each predetermined number of bits (4 bits in Fig. 13) can be repeated K times (twice in Fig. 13) as a set. In the receiver as shown in Fig. 25, a relocater 173 is connected between the deinterleaver 153 and the integrator 171, so that the relocater 173 extracts the same bit, and the integrator 171 integrates over every K bit interval. The other configuration is the same as that of Fig. 9B. This embodiment can achieve the same effect as that of the fourth embodiment. The above described first to fifth embodiments do not use pilot symbols. The pilot symbols have a predetermined fixed pattern, and are sent intermittently with transmitted data into which the pilot symbols are inserted periodically, or sent continuously through a dedicated channel. A receiver extracts the pilot symbols of the known pattern, and estimates fading of transmission paths to compensate fluctuations of a received signal due to fading. The following embodiments relate to the variable rate transmission system including such pilot symbols. EMBODIMENT 6 Figs. 14A and 14B are block diagrams showing a sixth embodiment of the transmitter and receiver using the variable rate transmission method in accordance with the present invention. The transmitter of Fig. 14A differs from that of Fig. 1A in the following. (1) A pilot symbol inserting circuit 130 for inserting the pilot symbols is connected between the primary modulator 108 and the secondary modulator 109. The pilot symbol inserting circuit 130 will be described later with reference to Fig. 15A. (2) The multiplexer 104 is supplied with control data from the input terminal 101B. The control data is important for a circuit connection or the like. (3) The frame memory 103 is removed, and the user data is directly applied to the multiplexer 104 from the input terminal 101A. On the other hand, the receiver as shown in Fig. 14B differs from the receiver as shown in Fig. 1B in the following. (1) The primary demodulator 152 has a different configuration from that of Fig. 1B. This will be described later with reference to Fig. 15B. (2) The position of the error detecting code in the frame is not specified in this embodiment, which differs from the first embodiment. Accordingly, the circuits from the demultiplexer 155 and forward are removed, and an error detection circuit 144 is connected to the output terminal of the error correcting decoder 154. The error detection circuit 144 shifts the data in each frame bit by bit, successively divides the data by predetermined data, and decides that the error detecting code is detected at the point where the data can be divided. Since the length of the error detecting code is known in advance, the last bit of the transmitted data can be found by identifying the error detecting code. Thus, the transmitted data can be extracted. Returning to Fig. 14A, the user data sequence applied to the input terminal 101A is divided into data with a duration of a predetermined frame period Tf. The error detecting encoder 102 calculates a check code (CRC bits, for example) for each frame of the user data, and supplies it to the multiplexer 104. The multiplexer 104 adds the control data fed from the input terminal 101B before the user data in each frame, and adds the check code from the error detecting encoder 102 at the end of the data in the frame, thereby forming one frame data. Fig. 16 illustrates the data output from the multiplexer 104. As shown in Fig. 16, blanks appear in the frame when the total bit number (which corresponds to the transmission rate) of the control data, user data and check code is less than the maximum bit number (maximum rate) that can be transmitted in one frame. The transmitted data of one frame undergoes error correcting encoding by the error correcting encoder 105, and is fed to the interleaver 106. The interleaver 106 reads the data of one frame which has been written in the frame memory 106B in the direction different from the writing direction as shown in Fig. 17. That is, the transmitted data of one frame written in the row direction of the interleaver 106 is read in the column direction at a predetermined rate. The read data undergoes phase modulation by the primary modulator 108, and is fed to the pilot symbol inserting circuit 130. The pilot symbol inserting circuit 130 periodically inserts the pilot symbols of a known pattern into the data supplied, thereby forming a modulated symbol sequence. Fig. 15A is a block diagram showing the configuration of the pilot symbol inserting circuit 130. The pilot symbols of a known pattern, which are periodically generated by a pilot symbol generator 131, are fed to a multiplexer 132. The multiplexer 132 multiplexes the data fed from the primary modulator 108 and the pilot symbols, thereby generating a modulated symbol sequence. Fig. 18 illustrates the arrangement of the modulated symbol sequence. In Fig. 18, a section sandwiched by the pilot symbols which are inserted periodically is called a slot. Assuming that one slot consists of N bits and one frame consists of M slots, one frame consists of N*M bits. The modulated symbol sequence is fed to the secondary modulator 109. The secondary modulator 109 multiplies the modulated symbol sequence by a spread code sequence with a chip rate of integer (tens to several hundreds) times the symbol rate, and delivers it from the output terminal 110 to a transmission power amplifier. The receiver, receiving the pilot symbols of the known pattern which have been periodically inserted into the data to be transmitted, estimates the phase of each symbol in the slot, and corrects the phase by using the pilot symbols. This compensates the phase of each symbol varied by the fading in the transmission. This processing is carried out by the primary demodulator 152. Fig. 15B is a block diagram showing the configuration of the primary demodulator 152. The despread signal fed from the secondary demodulator 151 is supplied to the quasi-coherent detector 181. The quasi-coherent detector 181 quasi-coherent detects the despread signal using the carrier of the same frequency as that of the transmitter, and supplies the detected output to a demultiplexer 182. The demultiplexer 182 divides the data obtained by the quasi-coherent detection into data symbols and the pilot symbols, and supplies the data symbols to a compensator 183 and the pilot symbols to a transfer function estimator 184. The transfer function estimator 184 estimates the transfer function of the propagation path from the pilot symbols, and supplies the transfer function to the compensator 183. The compensator 183 compensates the phases of the data symbols in response to the estimated transfer function, and provides the compensated output to a decision circuit 185. The decision circuit 185 decides the compensated data, and outputs the data symbols. Details of this processing is disclosed in the above-mentioned paper of S. Sampei. In the case where the pilot symbols are thus periodically inserted into the transmitted data to achieve the coherent detection, the accuracy of the estimation of the transmission path is best near the pilot symbols. Therefore, such data that requires high quality transmission should be placed near the pilot symbols before transmission in this embodiment. Specifically, writing to and reading from the frame memory 106B of the interleaver 106 in Fig. 14A is controlled so that the important data which requires high quality transmission, such as the control data is placed in the neighborhood of the pilot signals. This processing will now be described with reference to Figs. 3 and 19. As described before, Fig. 3 illustrates the arrangement of the frame data in the frame memory 106B of the interleaver 106. The number of bits in a row of the frame memory 106B is assumed to be equal to the number of slots M constituting one frame. In addition, the number of bits (that is, the number of rows) in one column is assumed to be equal to the number of bits N of one slot. One frame data including the check code for error detection is written bit by bit into the row direction of the frame memory 106B which is represented in the form of two-dimensions. The writing of one frame is carried out alternately from the top and bottom of the frame memory 106B row by row. The numbers attached to the rows of Fig. 3 represent the writing order. Since the control data is placed at the initial position of the frame, it is written in the rows of low numbers. In other words, this important data is written at the initial and final positions of the frame in the frame memory 106B. On the other hand, the data in the frame memory 106B is read in the column direction bit by bit. The column numbers 1-M correspond to the slot numbers of Fig. 18. By thus reading the data from the frame memory 106B, the important data (control data) will be mapped near the pilot symbols in each slot as shown in Fig. 19. In Fig. 19, a blank appears in the slot, which corresponds to the blank of each frame in Fig. 16. The receiver is provided with the deinterleaver 153 in correspondence with the interleaver 106. The deinterleaver 153 recovers the frame data from the slot data in the procedure opposite to that of the interleaver 106. By thus transmitting the data, the important control data can be transmitted in the portions near the pilot symbols at which errors will least occur. The error rate of the received data reduces as the received power increases. Thus, the data error rate can be reduced by controlling the transmission power in accordance with the degree of importance of the transmitted data. The following seventh embodiment is implemented along the lines of this. EMBODIMENT 7 Fig. 20 is a block diagram showing the seventh embodiment of the transmitter using the variable rate transmission method in accordance with the present invention. The transmitter differs from the transmitter of the sixth embodiment shown in Fig. 14A in that it is provided with a multiplier 141 next to the pilot symbol inserting circuit 130. The multiplier 141 multiplies the output of the pilot symbol inserting circuit 130 as shown in Fig. 19 by a predetermined power coefficient. The multiplier 141 multiplies a larger power coefficient as the degree of importance of the data increases. For example, the important pilot symbols and control data thereabout are multiplied by a maximum power coefficient. Fig. 21 is a schematic diagram illustrating the relationships between the types of data and the power coefficients. Predetermined numbers of bits are assigned to respective data in accordance with their types except for the blanks. The blanks are filled with a particular code to distinguish them from the other portions, and are multiplied by zero so that they are not transmitted. In other words, when the code representing the blanks, the power coefficient is placed zero so that their transmission is suppressed. Although the multiplier 141 of the power coefficient is inserted before the secondary modulator 109, it can be placed after the secondary modulator 109. Fig. 21 illustrates the control behavior of the transmission power in accordance with the degree of importance of the data. By thus controlling the transmission power, the important data are transmitted with larger transmission power, which makes it possible to reduce the error rate. In addition, since the blanks are not transmitted, extra transmission power can be suppressed. As a result, interference to other users are reduced, and the number of users accommodated in a given frequency band can be increased by that amount. EMBODIMENT 8 The foregoing first embodiment describes an example which transmits the data at various rates without providing the party with the transmission rate information representing the number of bits of the data in each frame. Figs. 22 and 23 show another embodiment which does not send the transmission rate information to the receiver. The transmitter of this embodiment is similar to that of the seventh embodiment as shown in Fig. 20. Fig. 22 illustrates the transmitted bit sequence written in the frame memory of the interleaver 106 of the transmitter when the transmission rate is less than the maximum transmission rate of the transmitter. The error detecting code (check code) is added to the end of the transmitted data in each frame, and a blank follows that. In the transmission, the transmitted data in the frame memory 106B is read column by column at a fixed rate, and is sequentially mapped to each slot to be sent. In Fig. 22, the space in which the transmitted data is absent corresponds to the blank in each slot. The primary modulator 108 does not modulate the blanks. As a result, the transmitted data of the variable bit number is transmitted in a fixed frame interval, at a constant transmission rate. Fig. 23 shows the major portion of the receiver for receiving the data thus transmitted. The receiver recovers the data of each frame by the deinterleaver 153 in the opposite procedure as that of the interleaver 106 in the transmitter. The procedure is the same as that of the first embodiment. The data of one frame is fed to the error detection circuit 144 connected to the output of the interleaver 106. The error detection circuit 144 detects the last bit of the transmitted data in the manner as described before. More specifically, the error detection circuit 144, shifting the data in the frame bit by bit, successively divides the data by the predetermined data, and decides that the error detecting code is received and the correct transmitted data is obtained at the point at which the data can be divided. The transmitted original data is obtained when the received data is output at that point. Transmitting and receiving in this way eliminates the need to send each time the transmission rate information representing the amount of data in each frame. In addition, the receiver can recover the data correctly even if the amount (apparent transmission rate) of the transmitted data in each frame varies. This is because even if the transmitted data is absent, the receiver can recognize this because of the fixed frame period. Thus, the variable rate transmission is implemented in which the apparent transmission rate (actually the bit number of data) can vary from frame to frame, even if the transmission rate information is not sent. It is necessary for the conventional variable rate transmission which does not send the transmission rate information in advance, to predetermine at intervals the values taken by the transmission rate, and this limits the number of transmission rates that can be handled. In contrast, this embodiment can achieve the transmission at any desired rates. A decision that no error has occurred can be made at a wrong position if an error takes place in the transmission. In this case, only a part of the transmitted data may be output as the effective data, or the transmitted data plus superfluous random data may be output as the effective data. Taking account of this, the number of bits of the transmitted data can be set at intervals, and this will make it possible to reduce the erroneous output of the data because the error detecting points are spaced apart. EMBODIMENT 9 This embodiment corresponds to the third embodiment, which avoids the burst mode transmission involved in the intermittent transmission of short data. If the transmission rate is equal to or less than 1/K of the maximum rate allowed by a single transmitting channel, the transmitted data undergoes the error correcting encoding, and each bit of the encoded data is repeated K times to form the frame data to be transmitted. The repetition number K is sent to the receiver at the beginning of the transmission. Fig. 24 shows the configuration of the transmitter. This embodiment differs from the transmitter of the seventh embodiment in the following. (1) The repeater 121 is connected to the output of the error correcting encoder 105. (2) The multiplier 141 is connected to the output of the pilot symbol inserting circuit 130 for multiplying the transmission power coefficient so that the transmission power is controlled to 1/K of that of the seventh embodiment as shown in Fig. 20, in which each bit of the data in the frame is not repeated. The data transmitted by this transmitter is demodulated by a receiver similar to that as shown in Fig. 9B to recover the transmitted data. By thus repeating each bit K times, the burst mode transmission can be avoided. In addition, the eighth embodiment can be used in combination with the ninth embodiment. In this case, if the repetition rate K has been sent to the receiver at the beginning of communications, the receiver can recover the transmitted data in accordance with the error detecting information even if the transmission rate varies frame by frame. Thus, excessive burst mode transmission can be avoided.

Claims: A transmitter for transmitting variable length information data in a code division multiple access system, comprising: a frame memory (103) for storing the information data which should be transmitted; an error detecting encoder (102) for generating an error detecting code by error detecting encoding said information data; a multiplexer (104) for assembling a frame by using said information data and said error detecting code; and a transmitting portion (108) for transmitting the information data and the error detecting code, the transmitter being characterised in that : said multiplexer is arranged to use a blank when the sum of the length of said information data and the length of said error detecting code is less than the length of the frame, and said transmitting portion (108) is arranged to pause transmission in the blank. The transmitter as claimed in claim 1, further comprising a transmission rate information memory (113) for storing transmission rate information which is the length of data which should be transmitted in the frame, wherein the multiplexer (104) assembles the frame by using the information data, the error detecting code and said transmission rate information, and a blank which is provided when a sum of the length of the information data, the length of the error detecting code and a length of the transmission rate information is less than the length of the frame, and disposes the error detecting code at a first fixed position in the frame and disposes the transmission rate information at a second fixed position in the frame. The transmitter as claimed in claim 1 or 2, further comprising: a repeating circuit (121) for assembling the frame by arranging repeatedly the data which should be transmitted in the frame K times, where K is an integer, when a length of the data which should be transmitted in the frame is less than or equal to 1/K of the length of the frame; and transmission power control means (123) for reducing transmission power of the data which should be transmitted and has been repeated K times, to 1/K of transmission power used when the data which should be transmitted has not been repeated. A variable length information data transmission method in a code division multiple access system, comprising the steps of: storing the information data which should be transmitted; generating an error detecting code by error detecting encoding the information data; and assembling a frame by using the information data and the error detecting code, and transmitting the information data and the error detecting code, the method being characterised in that in said assembling step a blank is provided when a sum of a length of the information data and a length of the error detecting code is less than the length of the frame, and in said transmitting step transmission is paused in the blank. The transmission method as claimed in claim 4, wherein the transmission method comprises the steps of: assembling the frame by using the information data, the error detecting code and transmission rate information which is a length of data which should be transmitted in the frame, and a blank which is provided when a sum of the length of the information data, the length of the error detecting code and a length of the transmission rate information is less than the length of the frame; disposing the error detecting code at a first fixed position in the frame and disposes the transmission rate information at a second fixed position in the frame; and transmitting the information data, the error detecting code and the transmission rate information, and pauses transmission in the blank. The transmission method as claimed in claim 4 or 5, wherein the transmission method repeats, when a length of the data which should be transmitted in the frame is less than or equal to 1/K of the length of the frame, the data which should be transmitted in the frame K times, where K is an integer, and transmits the data which should be transmitted and has been repeated K times by reducing transmission power to 1/K of transmission power used when the data which should be transmitted has not been repeated. A transmitter according to claim 1, wherein the multiplexer (104) is arranged to dispose the error detecting code after the information data. The transmitter as claimed in claim 7, wherein the information data comprises plural kinds of information whose degrees of importance are different from each other, and the transmitter further comprises: a pilot symbol inserting means (130) for adding pilot symbols in each frame; and an interleaver (106) for disposing near the pilot symbols, information whose degree of importance is high in the information data. The transmitter as claimed in claim 8, further comprising transmission power control means (141) for controlling transmission power of information in accordance with the degree of importance of the information. The transmitter as claimed in claim 7 or 8, further comprising: a repeating circuit (121) for assembling the frame by arranging repeatedly the data which should be transmitted in the frame K times, where K is an integer, when the length of the data which should be transmitted in the frame is less than or equal to 1/K of the length of the frame; and transmission power control means (141) for reducing the transmission power of the data which should be transmitted and has been repeated K times, to 1/K of transmission power used when the data which should be transmitted has not been repeated. The transmission method according to claim 4, wherein the error detecting code is disposed after the information data. The transmission method as claimed in claim 11, wherein the information data comprises plural kinds of information whose degrees of importance are different from each other, and the signal transmission method adds pilot symbols near information whose degree of importance is high in the information data in each frame. The transmission method as claimed in claim 12, wherein the transmission method controls transmission power of information in accordance with a degree of importance of the information. The transmission method as claimed in claim 11 or 12, wherein the transmission method repeats, when a length of the data which should be transmitted in the frame is less than or equal to 1/K of the length of the frame, the data which should be transmitted in the frame K times, where K is an integer, and transmits the data which should be transmitted and has been repeated K times by reducing transmission power to 1/K of the transmission power used when the data which should be transmitted has not been repeated. A receiver in a code division multiple access system for receiving a signal comprising a frame which includes variable length information data and an error detecting code of the information data, and further includes a blank when the sum of the length of said information data and the length of said error detecting code is less than the length of the frame, said receiver characterized by comprising: a demultiplexer (155) for separating the error detecting code and received information data from the received signal by assuming a final bit of the received information data; an error detecting encoder (156) for generating the error detecting code by encoding said received information data; and a comparator (158) for comparing said generated error detecting code with the received error detecting code separated from the received signal, wherein the receiver is arranged to decide the received information data is proper information data when said generated error detecting code and said received error detecting code agree with each other. The receiver as claimed in claim 15, wherein the receiver receives a signal including transmission rate information which is the length of data which should be transmitted in a frame, and the receiver further comprises a transmission rate information memory (161) for storing the transmission rate information extracted from the received signal, and wherein the error detecting encoder (156) error detecting encodes received data based on the transmission rate information extracted from the transmission rate information memory (161). The receiver as claimed in claim 15 or 16, wherein the receiver receives a signal in which each bit included in data which should be transmitted has been repeated K times, the receiver further comprises: an integrator (171) for obtaining an integral of the received signal for each continuous K bits in the received signal; and a thinning out circuit (172) for thinning out the received signal at every K bit interval, wherein the signal which has been thinned out at every K bit interval is provided to the demultiplexer (155). A reception method in a code division multiple access system that receives a signal comprising a frame which includes variable length information data and an error detecting code of the information data, and further includes a blank when the sum of the length of said information data and the length of said error detecting code is less than the length of the frame, said reception method characterized by comprising the steps of: separating the error detecting code and received information data from the received signal by assuming the final bit position of the received information data; error detecting encoding said received information data; and comparing an error detecting code generated by the error detecting encoding with the separated error detecting code, and if they agree with each other, outputting the received information data as the proper information data. The reception method as claimed in claim 18, wherein the reception method: receives a signal including transmission rate information which is a length of data which should be transmitted in a frame, and extracts the transmission rate information from the received signal; and separates the error detecting code and the received information data from the received signal based on the transmission rate information. The reception method as claimed in claim 18 or 19, wherein the reception method: receives a signal in which each bit included in data which should be transmitted has been repeated K times; adds the received signal for each continuous K bits in the received signal; and outputs the added received signal. A receiver in a code division multiple access system for receiving a signal comprising a frame which includes variable length information data and an error detecting code of said information data which, has been disposed after the information data, and further includes a blank when the sum of the length of said information data and the length of said error detecting code is less than the length of the frame, said receiver characterized by comprising: an error detection circuit (144) for assuming a final bit of the received information data, and detecting an error of the received signal from the first bit to said assumed final bit of the received information data, wherein the assumed final bit is treated as the proper final bit when there is no error in the received signal, and error detecting process is repeated by shifting the assumed final bit when there is an error in the received signal. The receiver as claimed in claim 21, wherein the error detection circuit divides the received bits from the head to the assumed final bit by a predetermined value, and decides that there is no error in said received bits when the residue becomes zero. The receiver as claimed in claim 21 or 22, wherein the error detection circuit decides that the position which is ahead of the decided final bit position of the received signal by the length of the error detecting code is the proper final bit position of the information data, and outputs the information data. The receiver as claimed in claim 21, wherein the receiver receives a signal including pilot symbols in addition to the information data and the error detecting code, and the receiver further comprises: a demultiplexer (182) for separating the pilot symbols and the received data other than the pilot symbols from the received signal; a transfer function estimator (184) for estimating transfer function of propagation path based on the separated pilot symbols; and a compensator (183) for compensating phases of the separated received data based on the estimated transfer function. A reception method in a code division multiple access system that receives a signal comprising a frame which includes variable length information data and an error detecting code of said information data which has been disposed after the information data, and further includes a blank when the sum of the length of said information data and the length of said error detecting code is less than the length of the frame, said reception method characterized by comprising the steps of: assuming a final bit in the received information data, and detecting an error of the received signal from the head of the received bits to the assumed final bit; and deciding that the assumed final bit is the proper final bit of the received information data when there is no error in the received signal, and repeating the process for detecting an error by shifting the assumed final bit when there is an error in the received signal. The reception method as claimed in claim 25, wherein the step of detecting an error divides the received signal from the head of the received signal to the assumed final bit by a predetermined value, and decides that there is no error in the received signal when the residue becomes zero. The reception method as claimed in claim 25 or 26, wherein the reception method decides that the position which is ahead of the decided final bit position of the received signal by the length of the error detecting code is the proper final bit position of the information data, and outputs the information data. The reception method as claimed in claim 25, wherein the reception method: receives a signal including pilot symbols in addition to the information data and the error detecting code; separates the pilot symbols and the received data other than the pilot symbols from the received signal; estimates transfer function of propagation path based on the separated pilot symbols; and compensates phases of the separated received data based on the estimated transfer function. A transmitter according to claim 1, wherein the multiplexer (104) is arranged to dispose the error detecting code at a fixed position in the frame. The transmission method according to claim 4, wherein the error detecting code is disposed at a fixed position in the frame.

Inventors: ADACHI FUMIYUKI, HIGASHI AKIHIRO, OHNO KOJI, OKUMURA YUKIHIKO, ADACHI, FUMIYUKI, HIGASHI, AKIHIRO, OHNO, KOJI, OKUMURA, YUKIHIKO, HIGASHI, Akihiro, Hayashi-syataku 3-301, OHNO, Koji, Tomioka-syataku 8-502
Applicants: NTT DOCOMO INC, NTT DOCOMO, INC.
Application year: 1996
Main classification: H04J13
IPC codes: H04B1, H04J3, H04L7, H04L1, H04J13