Method and apparatus for validating system operation

Abstract: A method and apparatus for providing system operation validation is disclosed. The method and apparatus for validation operates within a computer system comprising a central processing unit coupled to a programmable memory, and to a system device. The programmable memory may store programs and instructions executable on the CPU and a non-volatile memory is also provided for access by the CPU. The system operation validation is provided by a chip identifier located within a device memory within the system device, which memory also serves as a chip identifier register. Selected information stored within the non-volatile memory is used, along with the chip identifier, to generate a first encryption code associated with the system device. An encryption key is used to generate a second encryption code associated with the computer system. The first and second encryption codes are matched to provide a first level system operation validation. A second chip identifier is generated, which identifier is associated with the computer system. Both chip identifiers are compared to provide a second level system operation validation.

Description: 1. Technical Field: The present invention relates, generally, to a computer system having a non-volatile memory and, more specifically, to electronic security information being stored in the non-volatile memory. More specifically, the present invention relates to a computer system having a non-volatile memory with security information written into the non-volatile memory and a way of detecting when that information has been altered so as to prevent operation of the computer system once tampering has been detected. 2. Description of the Related Art: Electronic serial numbers are being employed in more and more electronic devices. These serial numbers are used for multiple purposes ranging from determining whether a device is still under warranty to providing a unique machine identification so that a software key is required to run on that specific machine serial number (this feature is provided in license managers such as NETLS). The objective of providing the electronic serial number is to allow software access to the serial number so that it can be tracked electronically or used as part of the software key encryption algorithm. There is an inherent weakness in the electronic serial number in that the manufacturer of the electronic device wants to control the machine serial number or unique data and that every machine serial number written must be unique. To provide the manufacturer the flexibility to write a different serial number on each machine, the machine is designed with some type of non-volatile memory (NVM) that the manufacturer can write (such as EPROM, PROM, ROS, EEPROM, flash type of memory or a track or header on a tape, DASD or optical diskette). Since the serial number is located in a programmable memory, it is easy for someone else to duplicate the serial number by simply copying the contents of one NVM media to another NVM media or writing a portion of the NVM media. By creating a duplicate serial number machine, all of the software programs that are licensed for the original machine can now be used on the duplicate serial number machine effectively bypassing the license manager checks. There are multiple ways in which a unique chip identifier can be programmed in a chip and made non changeable. The easiest way is to have a tie up or down signal feed a series of fuses, which in turn feed inputs to a register. These fuses can be blown by a laser as part of the normal chip manufacture process providing a unique chip identifier. The chip fuses are typically blown at the wafer level and contain the lot number, the wafer number, and the chip location on the wafer. Obviously many bits are needed (more than 64) on high volume chips since there is a high percentage of chips that are scrapped and the unique chip identifiers are never used. Chip fuses have been used for many years in DRAM and SRAM designs to select a different portion of the array to be used if found defective by manufacturing. The ability to produce unique chip identifiers is known in the industry. A second way a unique chip identifier can be built into a module is by using module laser delete chip I/O's. Module laser delete is done in a similar fashion as the chip laser delete in that a tie up or down signal is fed to a series of fuses which in turn go to chip I/O pins and from there to latches in a register. A laser is used to blow the fuse thus causing the data in the latch to be personalized. The register is then made available to the software. This method reduces the number of bits needed for the unique chip identifier since the chips have already been tested before mounting on the modules and most modules will test good. Again, since a fuse has been blown, it is not possible to duplicate easily another unique chip identifier. There are several encryption techniques that can be used that can provide the manufacturer the capability to detect any duplication or modification of the non-volatile memory data such as a serial number. One example of the encryption technique is the Message Authentication Code (MAC), which uses the Data Encryption Standard encryption algorithm. The MAC routine is passed a string of text data and an encryption key and returns an 8 byte MAC. Since the DES encryption encrypts 8 bytes at a time and the result of the previous 8 byte encryption is used with the next 8 bytes of encryption, the last 8 bytes of the encryption are dependent on all of the previous text data so any change in any of the previous data will be detected in the last 8 bytes of the encryption (the MAC). At the time the device is manufactured, the manufacturer will select an 8 byte encryption key that must be kept secret. The unique chip Identifier is included in the text portion of the data to be encrypted along with any other data the manufacturer wants to prevent being modified. A MAC is then generated and written along with the data in the non-volatile memory along with the data. The operating system software program then reads the non-volatile memory and the unique chip identifier from the hardware. If the unique chip identifier found in the text portion of the non-volatile memory does not compare with the one in the hardware, then the text has been altered (probably copied from another machine) and the software program can reject the device as being an invalid device. If the unique chip identifier in the non-volatile memory does match the one in the chip, then the software program verifies that the MAC is correct by generating a new MAC for the text of the non-volatile memory using the same key that was used to generate the MAC in manufacturing and then compares the MAC generated with the MAC in the non-volatile memory. If the MACs compare then the software program is assured that none of the text data that is covered by the MAC has been altered. Since only the manufacturer and the checking software knows the key to create the MAC AND the unique chip identifier is part of the text that created the MAC, it is not possible to alter the text or MAC unless the encryption key is known. Obviously the key must be kept secret and protected by the software and the manufacturer. Another encryption technique that can be used is RSA where the manufacturer uses a private key to encrypt the text where the unique chip identifier is again included in the text where modification detection is required. A public key is then used by the software program to decrypt the encrypted data and a comparison is made by the software program of the unique chip identifier in the hardware with that in the encrypted text. If there is a match then the text is valid, otherwise the text has been copied from another machine or has been otherwise altered. The advantage of the RSA is that two different keys are used for encryption and decryption and if the public key is known, the private key can not be determined whereas DES uses the same key for encryption and decryption so the software program must hide the key very well. This invention does not rely on any specific encryption technique only on the fact that the manufacturer can control access to the encryption key. Accordingly, what is needed is a computer system security arrangement using nonvolatile memory where critical data is written, which is monitored for detecting whether the information has been altered so the system may not be run in its altered state. European Patent Application EP-A-0 425 053 (TRT Telecommunications Radioelectriques et Telephoniques, N.V. Philips) - 2 May 1991 - entitled "Data processing system having memory card authenticating means, electronic circuit for use in that system and method for using this authentication" discloses a computer access control by memory card key. The microcomputer (PC) has an internal reader (RD) for a memory card, and an electronic circuit (3) connected to the microcomputer bus. The circuit generates a random code, and includes microprocessor (MP), timed boot circuit (MCD), security circuit (PSMC) and blocking circuit (CBB). A cryptographic procedure establishes coherence between a key associated with identifier numbers for the memory card (CAM) and a key associated with a corresponding number for the PC. The system is automatically blocked in the event of incoherence. The data processing system has microprocessor (MP) interfaced to an internal smart card reader (RD) and to security microcircuit (PSMC), and a main bus. Another data processor connected via the main bus to the microprocessor is under control of a random number (RN) and a reversible algorithm (ALG) from the system authentifying a smart card (CAM) presented to the reader. A first key (SK21) is generated from the identity quantities (NI, NOP) from the card and an associated second key (SK21) is generated from a second identity quantity (NI') from the security microcircuit. An authentification represented by correspondence among the two keys results in a correspondence signal. A start-up detector (MCD) registers an intiatiation of the authentifying and generates a first control signal to the microprocessor. A main bus blocking circuit (BBC) fed by the microprocessor and connected to the bus under control of the first control signal generates a bus-unblocking signal of predetermined duration. An absence of the correspondence signal before end of the duration drives said blocking circuit to generate and maintain a continuous bus blocking signal. European Patent Application EP-A-0 682 315 A1 (Automobiles PEUGEOT) claiming the priority of FR 9405839 dated 11 May 1994 entitled " Vehicular computer access unlocking by remote file loading tool" discloses a method for unlocking access to a file loader tool in event of agreement between codes derived from random number and key stored in computer memory and file. The tool has a microprocessor associated with a memory incorporating e.g. a non volatile store for a starting program, a flash memory for an application program for the functional equipment under computer control, a random-access data memory and an electrically erasable programmable read-only memory for computer identification data and the application program. The file loader verifies agreement between the transmitted identification data and the file, and generates an unlocking request causing the computer to produce a code from a stored key and a random number. Access is granted il this code agrees with another generated from a key held in the file. This method aims to control engines, gearboxes, or suspensions of air-conditioning system. The computer is protected against unauthorized program changes SUMMARY OF THE INVENTION It is therefore one object of the present invention defined in the appended claims to provide a computer system having a nonvolatile memory. It is another object of the present invention to provide electronic security information stored in the nonvolatile memory. It is yet another object of the present invention to provide a computer system having a nonvolatile memory with security information written into the nonvolatile memory and a way of detecting when that information has been altered so as to prevent operation of any portion of the computer system once tampering has been detected. The foregoing objects are achieved as is now described. According to the present invention, a method and apparatus for providing system operation validation is disclosed. The method and apparatus for validation operates within a computer system comprising a central processing unit coupled to a programmable memory, and to a system device. The programmable memory may store programs and instructions executable on the CPU and a non-volatile memory is also provided for access by the CPU. The system operation validation is provided by a chip identifier located within a device memory within the system device, which memory also serves as a chip identifier register. Selected information stored within the non-volatile memory is used, along with the chip identifier, to generate a first encryption code associated with the system device. An encryption key is used to generate a second encryption code associated with the computer system. The first and second encryption codes are matched to provide a first level system operation validation. A second chip identifier is generated, which identifier is associated with the computer system. Both chip identifiers are compared to provide a second level system operation validation. Examples of the devices associated with the computer system include field replaceable units wherein the chip identifier is a chip serial number that is uniquely identified with information stored in the non-volatile memory, such as an EPROM-type device, a DASD-type device, or microcode on a magnetic tape used in a tape drive device. The encryption codes may be message authentication codes. An alternative method for validating system operation is also disclosed where the method generates a unique device digital signature associated with the system device. The system then generates a unique system digital signature associated with the computer system. The system then evaluates both unique digital signatures for system validation. Once the digital signatures are validated, the system grants system operation to the system device. The digital signatures for both the system device and the computer system are based upon their respective chip identifiers or their encryption codes generated on selected information stored within memories associated with each device and system, respectively, or both. In either embodiment, the validation also is able to detect whether the selected information stored within either the system device or the computer system has been altered. The above as well as additional objects, features, and advantages of the present invention will become apparent in the following detailed written description. BRIEF DESCRIPTION OF THE DRAWINGS The novel features believed characteristic of the invention are set forth in the appended claims. The invention itself however, as well as a preferred mode of use, further objects and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying drawings, wherein: Figure 1 is a block diagram of a computer system upon which the present invention may be implemented; Figure 2 depicts a block diagram of a Message Authentication Code written into the non-volatile memory of Figure 1; Figure 3 is a block diagram of a flowchart representing a method of generating the Message Authentication Code of Figure 2; Figure 4 depicts a block diagram of a flowchart representing the comparison of the MAC codes for detecting alteration according to the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT With reference now to the figures and in particular with reference to Figure 1 , depicting a block diagram of a typical configuration, such as a programmable apparatus or computer system 10, upon which the invention is used. Computer system 10 includes a memory unit 12 connected to a central processing unit (CPU) 14. The memory unit 12 contains instructions and programs that are executed in CPU 14. These instructions are used to control a device 16, which may be an electro-mechanical device such as, for example, a DASD device, with an electronic device controller, tape reader or diskette reader, or an electronic device such as, for example, a cache controller. For example, the system may be directed to a microcode-load tape to work only with a designated processor in a designated system. Device 16 further includes a chip ID register 18 , which includes a unique chip identifier within the chip ID register 18 . The chip identifier is read by an instruction executed in CPU 14 . The unique chip identifier is built as part of the chip identifier register 18 so that each chip in a manufactured set has a different unique chip identifier. A non-volatile memory device (NVM) 20 is further connected to CPU 14 . NVM 20 contains various information that the device manufacturer uses as part of the device 16 control, such as DEVICE TYPE, DEVICE SERIAL NUMBER, and any other UNIQUE DEVICE DATA. To be able to detect any alteration in the NVM 20 , a CHIP ID is included so that any software programs in memory 12 can compare the chip ID in device 16 with the chip ID written in NVM 20 . Additionally, an encryption code, for example, a Message Authentication Code (MAC) is written in NVM 20 where the DEVICE TYPE, DEVICE SERIAL NUMBER, CHIP ID and UNIQUE DEVICE DATA are used as the text input to the MAC generation method. Further, an encryption key is further provided to which the software programs in memory 12 also have access. Figure 3 is a block diagram of a flowchart depicting the method used to generate the MAC shown in Figure 2. In step 310, a text storage area is established in NVM 20, to which the MAC is checked, consisting of 0-31 of the NVM address base. In this example, the text has a length of 32 bytes. In step 312 , a 64 bit key is used to encrypt the first eight (8) bytes of the text data using a data encryption scheme (DES) method, which is well known to those skilled in the art, to yield eight (8) bytes of encrypted data. Next, in step 314, these eight (8) bytes of encrypted data are exclusively ORed with the next eight (8) bytes of the text data. The results are then encrypted in step 316, using the DES method and the same key. The results are eight (8) bytes of encrypted data that include the current eight (8) bytes of the text, plus all the previous eight (8) byte blocks of text. The system continues to encrypt the remaining text using steps 314 and 316. In step 318, the system determines whether all the text has been encrypted and if so, in step 320, a resultant eight (8) bytes is used as the MAC, which is used to detect any change in any of the text that was used as input to generate the MAC. In step 322, the MAC is placed in NVM 20 at locations 32-39, shown in Figure 2. The MAC is used to provide a means, or digital signature, for detecting when a serial number or any other critical data written into NVM 20 is altered. Once there is modification or duplication detected, the software program stored in memory 12 can then take steps to prevent software programs from running on the altered device 16 . To provide modification detection of NVM 20 , the system uses several ID items. First, a unique chip identifier that is different from any other chip, which is non-alterable, is used as a standard by which the software determines the identity of the device and whether alterations have occurred. Second, the software programs are given the ability to read this chip identifier. Third, the non-volatile memory is included to hold the text covered by the encryption algorithm. The non-volatile memory is that non-volatile memory used to store data that the manufacturer wants to prevent from being altered (such as warranty data) using an encryption technique in which the unique chip identifier is used as part of the encryption algorithm or the chip identifier. While system 10 is operating, system code is retrieved from memory into CPU for execution. Prior to using device , the system code performs a chip identification and NVM content alteration detection test, which is illustrated in the flowchart of Figure 4. In step 410, the system reads the contents of NVM into memory . Next, in step 412, the system generates a Message Authentication Code of the first 32 bytes of the NVM data that was stored in memory , using the same key that the manufacturer used to create the MAC stored in bytes 3239 in NVM. In step 414, the system compares the MAC stored in memory from bytes 3239 of the NVM data with the MAC generated in step 412. If the MACS do not compare, then the NVM data is not valid and the device cannot be used and the system aborts in step 416. If the MACs do compare, the system, in step 418, reads the chip ID from the chip ID register into CPU . Next, in step 420, the system compares the chip ID field from bytes 1623 of the NVM data stored in memory with the chip ID field read from chip ID register read in step 418. If the fields compare, then the NVM data, is valid and system opération is granted in step 422; otherwise the NVM data has been copied from another system (because the MAC was good, it had to have been copied from another system) and the device cannot be used and the system aborts in step 416.

Claims: In a computer system comprising a central processing unit referred to as CPU (14) coupled to a programmable memory (12), which may store programs and instructions executable on said CPU, a system device (16), coupled to said CPU, and a non-volatile memory (20), coupled to said CPU, a system operation validator comprising: means for locating a chip identifier within in a chip identifier register (18) within said system device (16); means for utilizing selected information (120) stored within said non-volatile memory (20) and said chip identifier to generate a first encryption code associated with said system device (16); means for generating a second encryption code associated with said CPU (14) using a encryption key; means for determining (414) whether said encryption codes match for system operation validation; characterized in that said system further comprises: upon matching said encryption codes, means for generating (418) a second chip identifier associated with said CPU (14); means for determining (420) whether said chip identifiers match for system operation validation; upon matching said chip identifiers, means for granting (422) system operation. The system operation validator according to claim 1 wherein said system device (16) is a field-replaceable unit and said chip identifier is a chip serial number and said non-volatile memory (20) is a semiconductor-type device. The system operation validator according to claims 1 wherein said chip identifier is a chip serial number and said non-volatile memory is a magnetic media-type device or a tape-drive device with said information being stored as microcode on a tape or an optical type device. The system operation validator according to any one of claims 1 to 3 wherein said encryption codes are comprised of message authentication codes. In a computer system comprising a central processing unit referred to as CPU (14) coupled to a programmable memory (12), which may store programs and instructions executable on said CPU, a system device (16), coupled to said CPU, and a non-volatile memory (20), coupled to said CPU, a method for validating system operation comprising the steps of: locating a chip identifier within in a chip identifier register (18) within said system device (16); utilizing selected information (120) stored within said non-volatile memory (20) and said chip identifier to generate a first encryption code associated with said system device (16); generating a second encryption code associated with said CPU (14) using a encryption key; determining (414) whether said encryption codes match for system operation validation; characterized in that said method comprises the further steps of: upon matching said encryption codes, generating (418) a second chip identifier associated with said CPU (14); determining (420) whether said chip identifiers match for system operation validation; upon matching said chip identifiers, granting (422) system operation. The method according to claim 5 wherein said system device (16) is a field-replaceable unit and said chip identifier is a chip serial number and said non-volatile memory (20) is an EPROM-type device or a DASD-type device or a tape-drive device with said information being stored as microcode on a tape. The method according to any one of claims 5 to 6 wherein said encryption codes are comprised of message authentication codes.

Inventors: LEWIS DAVID O, LEWIS, DAVID O.
Applicants: IBM, INTERNATIONAL BUSINESS MACHINES CORPORATION
Application year: 1995
Main classification: G06F12
IPC codes: G06F21, G06F1, G06F12