Apparatus for starting a switched reluctance motor

Abstract: A switched reluctance motor includes a rotor (14) mounted for rotation about an axis (18) and including a plurality of rotor poles (22, 26, 30, 34). A stator (38) surrounds the rotor (14) and includes at least three stator phases. The motor also includes a circuit (94) for controlling the motor, the circuit (94) including a pulse generator (126) for supplying a seek current to each of the phases of the motor without causing rotation of the rotor (14). The seek currents in the phases each have a respective seek current rise time which is a function of the proximity of the rotor poles (22, 26, 30, 34) to the respective phases. The circuit (94) includes a series of counters (110) for measuring the amount of time required for the seek current in each phase to reach a predetermined seek current threshold and a comparator (114) for comparing the seek current rise times and for establishing a priority sequence determined by which of the phases has the lowest seek rise time, the intermediate seek current rise time, and the highest seek current rise time. The circuit (94) also includes a run signal generator (122) connected to the comparator (114) for energizing a selected one of the phases based upon the priority sequence to cause rotation of the rotor (14).

Description: The invention relates to switched reluctance ("SR") motors and particularly to an apparatus for determining which phase of an SR motor to commutate at a given moment. SR motors have multiple poles on both the stator and the rotor. There are windings or coils on the stator poles and each pair of windings on diametrically opposite stator poles is connected in series to form an electrically independent phase of the SR motor. There are no windings or magnets on the rotor. However, the rotor is made of a magnetically permeable material such as, for example, a ferrous alloy. In order to start an SR motor, it is necessary to determine the position of the rotor with respect to the stator. The position of the rotor with respect to the stator establishes which phase of the stator should be energized or commutated first. If the position of the rotor is not correctly determined, commutation of one of the stator phases may result in inefficient starting or reverse operation of the motor. However, many conventional sensors for determining rotor position are bulky, unreliable and expensive. EP-A-0462729 describes a brushless motor in which the rotor position can be determined whilst the rotor is stationary using an appropriate control circuit. According to the present invention there is provided a switched reluctance motor comprising: a rotor mounted for rotation about an axis and including a plurality of rotor poles; a stator surrounding said rotor and including at least three stator phases; and a circuit for controlling said motor, the circuit characterized in that the circuit includes pulse means for supplying a seek current to each of said phases of said motor without causing rotation of said rotor, said seek currents in said phases each having a respective seek current rise time which is a function of the proximity of said rotor poles to said respective phases; timing means for measuring the amount of time required for said seek current in each phase to reach a predetermined seek current threshold; comparing means for comparing said seek current rise times and for establishing a priority sequence determined by which of said phases has the lowest seek current rise time, the intermediate seek current rise time, and the highest seek current rise time; and energizing means connected to said comparing means for energizing a selected one of said phases based upon said priority sequence to cause rotation of said rotor. The rise time of current in a particular stator phase of an SR motor varies with the inductance of the phase. The inductance of a particular phase of an SR motor is a function of the angular position of the rotor poles with respect to the stator poles comprising the phase. Therefore, the position of the rotor poles can be detected by measuring the rise times of the current in each of the respective stator phases. The rise time of current in a particular phase varies with the inductance of the phase in accordance with the equation: V = L (dI/dT) where V is the voltage across the phase, L is the inductance of the phase, and dI/dT is the change in current with respect to time. In accordance with the present invention, the rise time of current in all three phases is tested and correlated to determine which phase has the highest, intermediate and lowest inductance (these are indicative of the exact position of the rotor poles with respect to the stator). The order of inductances is matched to a ROM based look-up table to determine which phase should be energized or commutated first. The invention provides an electronic circuit for starting a switched reluctance motor. The motor has a rotor mounted for rotation about an axis and the rotor includes a plurality of rotor poles. The motor also has a stator surrounding the rotor. The stator includes at least three stator pole pairs and at least three stator coils or windings wound around the respective stator pole pairs to form at least three electrically independent stator phases. The circuit of the invention employs a microprocessor and support circuitry in combination with a field programmable gate array. The use of a gate array in combination with a microprocessor reduces the number of components necessary to practice the invention and reduces the space requirements of the circuit. In general terms, the electronic circuit includes pulse means for supplying a seek current to each phase of the motor when the rotor is at rest, timing means for measuring the rise time required for the seek current in each of the phases to reach a predetermined seek current threshold, comparing means for comparing the rise times of the seek currents in the respective phases, and run means connected to the comparing means for sequentially energizing or commutating the phases in response to the comparison of seek times. More specifically, when the motor (i.e., the rotor) is at rest, the pulse means sends a low power seek current pulse to each phase of the SR motor. The current level in each phase is monitored and is measured against time (employing a clock in combination with a series of counters) and a rise time is established for the current in each phase to reach a predetermined seek current threshold, which is equal to roughly 2% to 3% of the maximum running current. The rise times are indicative of the inductances of the respective phases of the SR motor. An order of phase inductances (highest to lowest) is established and compared with combinations of phase inductances stored in a Read-Only-Memory (ROM) based look-up table. In response to a particular phase inductance order, the ROM outputs a control signal to energize a particular phase of the motor. A principal advantage of the invention is the use of a microprocessor and field programmable gate array to detect rotor position without the use of a discrete rotor position sensor. Another advantage of the invention is the provision of a simple circuit for starting and driving a switched reluctance motor at low speeds. Another advantage of the invention is the provision of a circuit that starts a switched reluctance motor and that limits the reverse rotation of the rotor upon starting to a maximum of 2° to 3°. Other features and advantages of the invention will become apparent to those skilled in the art upon review of the following detailed description, claims and drawings. DESCRIPTION OF THE DRAWINGS FIGURE 1 is a schematic view of a switched reluctance motor showing, in cross-section, the stator and the rotor of the switched reluctance motor. FIGURE 2 is a schematic diagram of the electronic circuit for starting the switched reluctance motor, with a simplified illustration of the phase leg of the circuit. FIGURE 3 is a graphic chart illustrating the phase inductances relative to the rotor pole positions, the order, from highest to lowest, of phase inductances relative to rotor pole positions, and the phase which is energized first in response to a particular order of phase inductances. FIGURE 4 is a graphic chart illustrating the phase currents versus time showing the simultaneous pulses being applied to each of the three windings. FIGURE 5 is a graphic chart illustrating the phase currents versus time with the slow ramp up of the selected phase and then the full run current being applied to the next appropriate phase. Before one embodiment of the invention is explained in detail, it is to be understood that the invention is not limited in its application to the details of the construction and the arrangements of the components set forth in the following description or illustrated in the drawings. The invention is capable of other embodiments and of being practiced or being carried out in various ways. Also, it is to be understood that the phraseology and terminology used herein is for the purpose of description and should not be regarding as limiting. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Shown in FIGURE 1 of the drawings is a schematic view of a switched reluctance motor 10. The switched reluctance motor 10 includes a rotor 14 mounted for rotation about an his 18. The rotor 14 includes four rotor poles 22, 26, 30, and 34. The rotor poles 22, 26, 30, and 34 are evenly spaced about the axis 18 and extend radially outward from the rotor 14 relative to the axis 18. The motor 10 also includes a stator 38 surrounding the rotor 14. The stator 38 has an inner surface 42 and six stator poles 46, 50, 54, 58, 62 and 66, extending from the inner surface 42 inwardly toward the rotor axis 18. The stator poles 46, 50, 54, 58, 62 and 66, are evenly spaced about the inner surface 42 of the stator 38. Because the motor 10 includes six stator poles and four rotor poles, the switched reluctance motor 10 shown in FIGURE 1 is referred to as 6/4 (six stator pole to four rotor pole ratio) switched reluctance motor. While this description will refer to the operation of the invention in terms of a 6/4 SR motor, it should be understood that any switched reluctance motor having any number of stator poles and rotor poles can be controlled with the circuit disclosed herein. The SR motor 10 also includes windings or coils 70, 74, 78, 82, 86 and 90, on the stator poles 46, 50, 54, 58, 62 and 66, respectively. The windings are made of a conductor of a precise gauge which is wound around the stator pole a precise number of times or turns. The gauge of the wire and the number of turns vary depending upon the application. While the description applies equally to any SR motor using any gauge wire or having any number of turns, in the embodiment shown in the drawings, each stator pole has 98 turns and the motor is referred to as a 98 turn 6/4 SR motor. The windings 70, 74, 78, 82, 86 and 90, on diametrically opposite stator poles 46, 50, 54, 58, 62 and 66, are connected in series to form three electrically independent phases 1, 2, and 3 of the SR motor 10. As shown in FIGURE 1, the windings 70 and 82 on stator poles 46 and 58, respectively, form pole pairs which together form Phase 1, the windings 74 and 86 on stator poles 50 and 62, respectively, form pole pairs which together form Phase 2, and the windings 78 and 90 on stator poles 54 and 66, respectively, form pole pairs which together form Phase 3. Because the rotor 14 is made of ferromagnetic material, energizing a particular phase of the motor 10 results in the formation of a magnetic attraction between the windings on the stator pole pairs comprising the energized phase and the rotor poles closest to the stator poles of the energized phase. By energizing the phases in a particular manner, the rotational direction and speed of the rotor 14 can be precisely controlled. FIGURE 2 illustrates a schematic diagram of an electronic circuit 94 for starting the SR motor 10 and energizing the SR motor 10 at low rotor speeds. The circuit 94 is connected to the motor 10 which is shown schematically as phase winding 1 (only one of the three is shown) connected between a positive supply voltage (+Vs) and a negative supply voltage (-Vs) via a switch or relay 98. This portion of the circuit 94 is duplicated as many times as there are phases on the particular SR motor 10. For the SR motor 10 shown in FIGURE 1 of the drawings, there are three phases and accordingly, this portion of the circuit 94 is repeated three times, i.e., there are three phase windings connected between the positive and negative supply voltages via three switches or relays 98. Only one of these circuit portions will be shown and described in detail. The circuit 94 for controlling the motor 10 includes current sensing means connected to the phase winding 1. While any conventional current sensor is appropriate, the sensing means of the embodiment shown in FIGURE 2 is a current sensor 102 which is mounted adjacent to the phase current pathway. In the preferred embodiment, a current sensor sold by the LEM Company is used. The current sensor outputs a voltage which is proportional to current. Current flowing through the phase 1 generates a corresponding signal in the sensor 102. The current sensor 102 prevents excess current loading in the phase 1. Preferably, the current sensing means also includes a comparator (not shown) connected to the current sensor 102. The comparator compares the analog signal (voltage) from the current sensor to a reference voltage. When the sensor signal exceeds the reference signal, a latch signal is input to the counter 110, which is explained below. The circuit 94 also includes a field programmable gate array 104 and a microprocessor 106 connected to the gate array 104. While any appropriate gate array and microprocessor could be used, the circuit 94 uses gate array XC3090-70PC84C manufactured by XILINX, Inc and microprocessor DSP56001RC33 manufactured by Motorola, Inc. The gate array 104 is defined and programmed in a manner consistent with this description and in a manner conventional in the art. Conventional programming hardware recommended by the manufacturer of gate array 104 is also used. Likewise, the microprocessor 106 is programmed in a manner consistent with this description and conventional in the art, with conventional programming hardware recommended by the device manufacturer. The field programmable gate array 104 includes a bank of counters 110. The counters 110 are connected to the current sensor 102 via the comparator (not shown). The counters 110 receive the digital output from the comparator (not shown) and measure the amount of time required for the current in the phase winding to reach a predetermined current threshold level, i.e., the seek current rise time. The counters 110 are set to zero when the seek current pulse is started. In other embodiments, other timing devices, such as an analog capacitor, could be used instead of the counters 110. The microprocessor 106 includes comparing means connected to the counters 110. The comparing means compares the seek current rise times from the phase windings and establishes a priority sequence determined by which of the phases 1, 2, or 3, has the lowest seek current rise time, which has the intermediate seek current rise time and which has the highest seek current rise time. The comparing means includes a comparator 114 connected to a read-only-memory (ROM) based memory array 118. The microprocessor 106 also includes energizing means connected to the comparator 114. The energizing means is a run signal generator 122 which generates commutation or run control signals to energize a selected phase 1, 2, or 3, based upon the order of priority of the seek current rise times. The microprocessor 106 also includes pulse means connected to the counters 110. The pulse means is a pulse signal generator 126 which generates seek pulse control signals. The microprocessor 106 also includes switch operating means connected to counters 110, pulse signal generator 126, run signal generator 122 and phase switches 98. The switch operating means is a switch controller 130. The switch controller 130 receives as inputs the pulse control signals and commutation control signals from the pulse signal generator 126 and run signal generator 122, respectively, and activates the phase switch 98 in response thereto to generate either a seek current pulse or a commutation current in the phase winding 1. In other embodiments, these functions could be accomplished by logic devices instead of the microprocessor 106. In operation, when the rotor 14 is at rest and the power switch (not shown) of the motor 10 is turned on, the pulse signal generator 126 of the microprocessor 106 sends control signals to the switch controller 130 which operates the switches 98 of the respective phases, 1, 2 and 3, in such a way as to energize the phases with seek current pulses (see Fig. 4). The seek current pulses are preferably low power and do not generate a sufficiently strong magnetic field in the phases, 1, 2 and 3, to result in rotation of the rotor 14. However, the current in the phase windings, 1, 2, and 3, resulting from the seek current pulses is monitored by the current sensor 102 and is input to the counters 110 of the field programmable gate array. The counters 110 monitor the phase current to calculate the seek current rise times of the seek current in the phases. As discussed above, the rise time of the current in a particular phase will vary with the inductance of the phase and the inductance of the phase is directly related to the proximity of the rotor poles 22, 26, 30, and 34, to the stator poles 46 and 58, 50 and 62, or 54 and 66, comprising the phases 1, 2 or 3, respectively. The seek current rise times of the current in the phases 1, 2 and 3 are transmitted from the counters 110 to the comparator 114. The comparator 114 determines which phase 1, 2 or 3 has the highest, the middle, and the lowest phase inductance. The ROM-based memory array 118 receives as an input the order of phase inductances and generates as an output a signal corresponding to a particular phase that is the first phase to be fired or energized with the high power run current. FIGURE 3 is a chart which illustrates the variation in phase inductances with respect to position of the rotor poles 22, 26, 30, and 34, and the results generated by the ROM-based memory array 118 given a particular order of phase inductances. By way of example, if a pair of rotor poles, e.g., 22 and 30, are just past alignment with the stator poles 46 and 58 (FIGURE 1) of phase 1 (slightly greater than 0° relative to phase 1), then phase 1 will have the highest inductance, phase 3 will have the middle level inductance and phase 2 will have the lowest inductance. FIGURE 4 is an illustration of possible seek pulse currents versus time. In this hypothetical case, phase 3 will be the phase that is energized with the run current first. As illustrated in Figure 5, as current is applied to phase 3, it slowly goes from zero to the desired run current. In other words, the current is ramped up. This brings the appropriate rotor and stator poles into alignment. Thereafter, the appropriate phase (phase 2) is fired and a low speed switching technique is implemented. Phase 3 was energized because energizing phase 1 would not result in rotor movement (or perhaps would result in a slight reverse, i.e., counter-clockwise movement) since the rotor poles 22 and 30 are already aligned (or are nearly aligned) with the stator poles comprising phase 1. On the other hand, energizing phase 2 would result in reverse (counter-clockwise) rotation of the rotor 14 with respect to the stator 38 because an attractive magnetic force would exist between stator poles 50 and 62 and the closest rotor poles 26 and 34. Still referring to FIGURE 3, it is possible that the order of inductance can be incorrectly determined. This may occur when the rotor poles are aligned so that two of the phase inductances are equal or nearly equal. This typically occurs at approximately the 15° division marks as shown in FIGURE 3. However, and as shown in FIGURE 3, an error with respect to which phase has the highest level inductance and which phase has the middle level inductance will still result in the same phase being energized or commutated first. If there is an error with respect to which phase has the lowest level inductance versus which phase has the middle level inductance, energizing the wrong phase first will result in a minimal reversal of 2° to 3° back to alignment of the previous phase. Other features and advantages of the invention are set forth in the following claims.

Claims: A switched reluctance motor comprising: a rotor (14) mounted for rotation about an axis (18) and including a plurality of rotor poles (22, 26, 30, 34); a stator (38) surrounding said rotor (14) and including at least three stator phases; and a circuit (94) for controlling said motor, the circuit (94) characterized in that the circuit includes pulse means (126) for supplying a seek current to each of said phases of said motor without causing rotation of said rotor (14), said seek currents in said phases each having a respective seek current rise time which is a function of the proximity of said rotor poles (22, 26, 30, 34) to said respective phases; timing means (110) for measuring the amount of time required for said seek current in each phase to reach a predetermined seek current threshold; comparing means (114) for comparing said seek current rise times and for establishing a priority sequence determined by which of said phases has the lowest seek current rise time, the intermediate seek current rise time, and the highest seek current rise time; and energizing means (122) connected to said comparing means (114) for energizing a selected one of said phases based upon said priority sequence to cause rotation of said rotor (14). A switched reluctance motor as claimed in Claim 1, wherein said circuit (94) comprises a microprocessor (106) and a field programmable gate array (104) connected to said microprocessor (106). A switched reluctance motor as claimed in Claim 1 or Claim 2, wherein said pulse means (126) is a pulse signal generator (126). A switched reluctance motor as claimed in Claim 3, wherein said circuit (94) further includes a power supply, at least three switches (98) for respectively connecting the phases to said power supply, and a switch controller (130) connected to said pulse signal generator (126) and to said switches (98) so that said switches (98) are operated to generate said seek currents in said respective phases. A switched reluctance motor as claimed in any one of the preceding claims, wherein said timing means (110) includes current sensing means (102) for detecting the amount of current in each of the phases and at least one counter (110) connected to said current sensing means (102). A switched reluctance motor as claimed in any one of the preceding claims, wherein said comparing means (114) includes a comparator (114) and at least one solid state memory array (118) connected to said comparator (114). A switched reluctance motor as claimed in Claim 6, wherein said solid state memory array (118) is a read-only-memory array (118). A switched reluctance motor as claimed in any one of the preceding claims, wherein said energizing means (122) includes a run signal generator (122) connected to said comparing means (114). A switched reluctance motor as claimed in any one of Claims 1 to 3, wherein said circuit (94) further includes an electrical energy source and a plurality of switches (98) connected between a respective phase of said motor and said electrical energy source. A switched reluctance motor as claimed in Claim 9, wherein said circuit (94) further includes a switch controller (130) connected to said pulse means (126) and to said energizing means (122) such that said switch controller (130) generates phase switch control signals to operate said switches (98) in response to signals generated by said pulse means (126) and said energizing means (122).

Inventors: VAN SISTINE THOMAS G, VAN SISTINE, THOMAS G.
Applicants: SMITH CORP A O, A.O. SMITH CORPORATION
Application year: 1995
Main classification: H02P6
IPC codes: H02P1, H02P6, H02P25