HEATER SYSTEM FOR A FLAT PANEL SUCH AS A LIQUID CRYSTAL DISPLAY

Abstract: A flat panel such as a liquid crystal display (20) includes an array of pixels (24) arranged in rows and columns. A gate line (26) interconnects each row of the array while a source line (28) interconnects each column of the array. Redundant gate drives (30) are connected to opposed ends of the gate lines and are controlled to select the pixels in one of the rows by driving the gate line of that selected row to a logic high condition. Data can be written to one or more pixels in the selected row by supplying data to the source lines connected to those pixels. In order to heat the LCD panel or maintain its temperature during operation, the gate drives can also be controlled to create a potential voltage difference across some or all of the gate lines. When the potential voltage difference exists, current flows in the gate lines. Electrical resistive losses result in the dissipation of heat within the liquid crystal display.

Description: HEATER SYSTEM FOR A FLAT PANEL SUCH AS A LIQUID CRYSTAL DISPLAY TECHNICAL FIELD The present invention relates to semiconductor switch arrays and in particular to a heater system for a semiconductor switch array. More particularly, the present invention relates to a heater system for a flat panel such as a liquid crystal display and to a method of heating a flat panel. BACKGROUND ART Semiconductor switch arrays and in particular thin film transistor ("TFT") switch arrays are used in active matrix liquid crystal display ("AMLCD") panels and flat panel detectors for radiation imaging. TFT based liquid crystal display panels are used in televisions and lap-top computer screens and present video information by modulating light intensity on a pixel-by-pixel basis. LCD panels of this nature include an array of pixels arranged in rows and columns. Gate lines interconnect the individual rows of the array while source lines interconnect the individual columns of the array. Each pixel includes a TFT switch which uses a semiconductor as a switch and which has a transparent drain electrode constituting the output pad of the pixel. Gate drivers are connected to the gate lines on opposite sides of the array to select the gate lines in succession so that data may be written to a given pixel via the associated source line and onto the transparent drain electrode. The voltage appearing on the transparent drain electrode modulates light via the LCD effect. In many LCD applications, it is necessary initially to pre-heat the LCD panel prior to operating the LCD panel to bring the liquid crystal material to at least a minimum temperature and then during normal operation continue to heat the LCD panel to maintain the liquid crystal material above the minimum temperature. Conventional heater assemblies for LCD panels typically are in the form of a glass pane having an Indium Tin Oxide ("ITO") coating on one of its surfaces. The pane is placed on the surface of the LCD panel and the coating is coupled across a DC potential voltage source. The ITO coating has a resistance in the order of 50 ohms and therefore, dissipates heat as current flows through the coating. The dissipated heat warms the LCD panel. Unfortunately, this technique of heating an LCD panel requires a separate assembly to be coupled to the LCD panel. It is therefore an object of the present invention to provide a novel method of heating a flat panel such as a liquid crystal display and a flat panel incorporating a heater assembly. SUMMARY OF THE INVENTION According to one aspect of the present invention there is provided a method of heating a flat panel including an array of pixels arranged in rows and columns, individual ones of one of the rows or columns of said array being interconnected by data lines and individual ones of the other of the rows or columns of said array being interconnected by select lines, said method comprising the step of: creating a potential voltage difference across at least some of said select lines to establish current flow in said at least some of said select lines, the resistance of said at least some of said select lines resulting in the dissipation of heat in said flat panel. According to another aspect of the present invention there is provided a flat panel comprising: an array of pixels arranged in rows and columns, individual ones of one of the rows or columns of said array being interconnected by data lines and individual ones of the other of said rows or columns of said array being interconnected by select lines; drives connected to opposed ends of said select lines, each of said drives including a driver associated with each select line and being responsive to input to select the pixels interconnected by the associated select line to actuate said pixels and allow data to be written to the selected pixels via said data lines; and control means to condition said drives to a heat mode and create a potential voltage difference across at least some of said select lines to establish current flow in said select lines, the resistance of said at least εome select lines resulting in the dissipation of heat in said flat panel. According to another aspect of the present invention there is provided a liquid crystal display comprising: an array of pixels arranged in rows and columns; a plurality of source lines, each interconnecting individual ones of one of the rows or columns of said array; a plurality of gate lines, each interconnecting individual ones of the other of the rows or columns of said array; gate drives connected to opposed ends of said gate lines, said gate drives being actuable to a first condition to select pixels to allow data to be written to selected pixels via said source lines, said gate drives being actuable to a second condition to create a potential voltage difference across at least some of said gate lines to establish current flow in said gate lines, the resistance of said at least some of said gate lines resulting in the dissipation of heat in said liquid crystal display, each of said gate drives including a plurality of gate drivers, each gate driver being associated with one of said gate lines, in said first condition the gate drivers of each gate drive connected to the same gate line being responsive to input to select the pixels connected to the associated gate line by connecting the gate line to a high potential voltage source, in said second condition, the gate drivers of each gate drive connected to the same gate line being responsive to input to connect the gate line between high and low potential voltage sources; and a control circuit to actuate said gate drives between said first and second conditions. In one embodiment, it is preferred that initially, the potential voltage difference is created across all of the select lines to pre-heat the flat panel to at least a minimum temperature thereafter, a potential voltage difference is created across only some of the select lines to maintain the temperature of the flat panel. In order to reduce DC effects, it is also preferred that the polarity of the potential voltage difference is reversed. In another embodiment, it is preferred that initially the potential voltage difference is created across all of the select lines to pre-heat the flat panel to at least a minimum temperature and thereafter, the magnitude of the potential difference across all of the select lines is reduced to dissipate less heat but still maintain the temperature of the flat panel. The present invention provides advantages in that the flat panel can be heated using its internal structure and therefore obviates the need for a separate heater assembly. BRIEF DESCRIPTION OF THE DRAWINGS An embodiment of the present invention will now be described more fully with reference to the accompanying drawings in which: Figure 1 is a schematic of an active matrix liquid crystal display; Figure 2 is a schematic of two gate drivers connected to a common gate line; Figure 3 is an equivalent circuit of the gate drivers and gate line of Figure 2 in a drive condition during normal operation; Figure 4 is an equivalent circuit of the gate drivers and gate line of Figure 2 in an off condition during normal operation; and Figure 5 is an equivalent circuit of the gate drivers and gate line of Figure 2 in a drive condition during a pre-heat operation. BEST MODE FOR CARRYING OUT THE INVENTION Referring now to Figure 1, a flat panel such as an active matrix liquid crystal display is shown and is generally indicated by reference numeral 20. The liquid crystal display 20 includes an LCD panel 22 constituted by an array of pixels 24 arranged in rows and columns. Each pixel 24 includes a thin film transistor switch 24a having a transparent drain electrode 24b constituting the output pad of the pixel. The pixels 24 in each row of the array are interconnected by a select line, in this case gate line 26 while the pixels 24 in each column of the array are interconnected by a data line, in this case source line 28. Gate drives 30 are connected to opposed sides of the LCD panel 22 and supply switching pulses to the gate lines 26. Each gate drive 30 includes an array of gate drivers 40 (see Figure 2) such as HV04 or HV06 gate drivers manufactured by Supertex. A control circuit 32 is connected to the gate drives 30 and controls their operation as will be described. An array of amplifiers 34 is connected to the source lines 28. The amplifiers 34 can be controlled to write data to a given pixel 24 in the array. Figures 2 and 3 better illustrate one of the gate drivers 40 in each of the two gate drives. As can be seen, each gate driver 40 is connected to a gate line 26 and biased by high and low potential voltage sources V PP and V^ respectively. The gate line is shown having a resistance R which is typically in the order of 10,000 ohms. Input to the gate drivers 40 is received from the control circuit 32. Each gate driver 40 is constituted by a pair of transistor switches 46 and 48 respectively. The transistor switches 46 and 48 are controlled by input from the control circuit 32 to connect one of the potential voltage sources Vp P or Vss to tne gate line 26. The gate drives 30 are capable of driving about 40mA through each gate line 26 and have total ground return currents equal to approximately 2.6A. They can also be configured so that the high potential voltage source V PP is equal to about 30V and so that the low potential voltage source Vss is a "t ground (i.e. V^ = OV) . During operation of the liquid crystal display 20, when it is desired to write data to a particular pixel 24 in the array, the gate drivers 40 of the gate drives 30 connected to the gate line 26 associated with that pixel are conditioned by the control circuit 32 to connect the gate line 26 to the high potential voltage sources V PP . Figure 3 shows the state of the transistor switches 46 and 48 of the gate drivers 40 in this "on" condition. In this condition, the voltage on the gate line 26 is equal to the high potential voltage source (i.e. V gIte = V PP ) . The gate drivers 40 that are connected to unselected gate lines 26 maintain the potential of those gate lines low (i.e. V gMc = Vgs) • Figure 4 shows the state of the transistor switches 46 and 48 of the gate drivers in this "off" condition. When the gate drives 30 have been conditioned to select a row of pixels, the bias on the gate line 26 turns the thin film transistor switch 24a of each pixel 24 connected to the gate line on. Once the thin film transistor switches are on, data can be written to any of these selected pixels by supplying data to the source line 28 connected to those pixels by way of the appropriate amplifiers 34. The data written to the pixels passes through the thin film transistor switches 24a onto the transparent drain electrodes 24b and appears as voltages thereon. The voltages on the drain electrodes modulate light via the LCD effect. As one will appreciate, during normal operation of the liquid crystal display, the gate drives 30 are redundant and are operated identically so that the gate drivers 40 of the gate drives 30 connected to the same gate line 26 are either both on or both off. During initial power-up of the liquid crystal display 20, it is often necessary to pre-heat the liquid crystal display to warm the liquid crystal material to at least a minimum temperature (typically 20°C) . Unlike prior art liquid crystal displays which require a separate heater assembly overlying the LCD panel to pre-heat the liquid crystal display, the liquid crystal display 20 uses the gate drives and gate lines 26 to pre-heat the liquid crystal display 20 as will now be described. As mentioned previously during normal operation of the liquid crystal display, the gate drives 30 are actuated by the control circuit 32 in an identical manner so that the gate drivers 40 of each gate drive connected to the same gate lines both either connect the gate lines to the potential voltage source V PP or to the potential voltage source ^. However, during pre-heat mode, the control circuit 32 actuates the gate drives 30 in a manner so that they do not operate identically. Specifically, during pre-heat, the gate drivers 40 of one of the gate drives 30 are driven to connect each gate line 26 to the high potential voltage source V PP while the gate drivers 40 of the other gate drive 30 are driven to connect the gate lines 26 to the low potential voltage source V^. This creates a potential voltage difference across the gate lines to establish current flow in the gate lines 26. In the case where V PP = 30V and V^ = OV, a 30V potential is created across each gate line 26. Figure 5 shows the state of the transistor switches 46 and 48 of the gate drivers 40 in the "pre-heat" condition. In this condition, a potential voltage is created across the gate line 26 establishing a current flow i equal to (V PP - V^) /R and power dissipation P equal to (V PP - Vss) 2 /R. As current flows in the gate lines, heat P is dissipated due to resistive losses. The dissipated heat P is equal to: P = v jat e * 1-V where: v = the potential created across the gate lines; ^ = the resistance of each gate line; and N g«te = the number of gate lines in the LCD panel. Thus, if the potential v = 30V, R^ = 10,000 Ω and N gate - 960 the total power dissipated as heat equals 86.4 W. Due to the significant amount of power dissipated as heat, in many instances only some of the gate lines 26 need to be used to pre-heat the liquid crystal display. For example. in the above case, if only 10% of the total gate lines 26 are used during pre-heat 8.64W of power will be dissipated as heat. Once the liquid crystal display 20 has been pre¬ heated, the temperature of the liquid crystal display can be maintained by using a select number of leading gate lines 26 in the LCD panel 22 to dissipate heat while using the remaining gate lines to operate the LCD panel in a conventional manner. For example, if the leading 50 gate lines are used for heating purposes, 4.5W of power can be delivered to the liquid crystal display 20. This mode of operation reduces LCD panel contrast but effectively removes the need for a separate heater element. In order to reduce any DC effects on the liquid crystal display, the polarity of the potential voltages V PP and Vss can ^ e alternated on a scan-by-scan basis for the leading gate lines used to supply heat to the liquid crystal display. Alternatively, the gate drives 30 can be conditioned during normal operation so that the high and low potential voltage sources V PP and V^ respectively, biasing each gate drive, are slightly offset to establish current flow in the gate lines 26 even though both gate drivers 40 connected to each gate line are either on or off. The current flow results in the dissipation of heat in the liquid crystal display 20. In order to reduce any DC effects, the polarity of the potential voltages V PP and Vss can be alternated on a scan-by-scan basis. Although the present invention has been described with particular reference to an active matrix liquid crystal display, those of skill in the art will appreciate that the heater system and method can be used in other environments. For example, in flat panels for radiation imaging, TFT switch arrays are also used and are driven by a pair of gate drives. In addition, the heater system and method can be used in other pixel arrays such as diode matrix LCD's, passive LCD's and ferroelectric LCD's, all of which use drivers to provide bias on the select lines interconnecting the pixels in the rows or columns of the array. As should be apparent to those of skill in the art, the present invention allows the flat panel to be heated using the select lines of the flat panel obviating the need for a separate heater element. It will also be appreciated that variations and modifications may be made to the present invention without departing from the scope thereof as defined by the appended claims.

Claims: WHAT IS CLAIMED IS: 1. A method of heating a flat panel including an array of pixels arranged in rows and columns, individual ones of one of the rows or columns of said array being interconnected by data lines and individual ones of the other of the rows or columns of said array being interconnected by select lines, said method comprising the step of: creating a potential voltage difference across at least some of said select lines to establish current flow in said at least some of said select lines, the resistance of said at least some of said select lines resulting in the dissipation of heat in said flat panel. 2. The method of claim 1 wherein initially a potential voltage difference is created across all of said select lines to pre-heat said flat panel to at least a minimum temperature and thereafter a potential voltage difference is created across only some of said select lines to maintain the temperature of said flat panel. 3. The method of claim 2 wherein said potential voltage is created by connecting one side of said select lines to high potential voltage source and the other side of said select lines to ground. 4. The method of claim 3 wherein after pre-heating said flat panel, some percentage of said select lines are biased to maintain the temperature of said flat panel. 5. The method of claim 3 further comprising the step of reversing the polarity of the potential voltage difference to inhibit DC effects on said flat panel. 6. The method of claim 1 wherein initially a potential voltage difference is created across all of said select lines to pre-heat said flat panel to at least a minimum temperature, said method further comprising the step of after pre-heating said flat panel, reducing the magnitude of the potential voltage difference across said select lines to dissipate less heat but still maintain the temperature of said flat panel. 7. The method of claim 6 further comprising the step of reversing the polarity of the potential voltage difference to inhibit DC effects on said flat panel. 8. The method of claim 1 wherein said flat panel is in the form of an active matrix liquid crystal display incorporating a TFT switch array and wherein said select lines are in the form of gate lines extending to gate electrodes of said TFT switches and said data lines are in the form of source lines extending to source electrodes of said TFT switches. 9. The method of claim 1 wherein said flat panel is one of a diode matrix LCD, a passive LCD, a ferroelectric LCD or a flat panel for radiation imaging. 10. A flat panel comprising: an array of pixels arranged in rows and columns, individual ones of one of the rows or columns of said array being interconnected by data lines and individual ones of the other of said rows or columns of said array being interconnected by select lines; drives connected to opposed ends of said select lines, each of said drives including a driver associated with each select line and being responsive to input to select the pixels interconnected by the associated select line to actuate said pixels and allow data to be written to the selected pixels via said data lines; and control means to condition said drives to a heat mode and create a potential voltage difference across at least some of said select lines to establish current flow in said select lines, the resistance of said at least some select lines resulting in the dissipation of heat in said flat panel. 11. A flat panel as defined in claim 10 wherein in said heat mode, said control means initially conditions all of said drivers to create a potential voltage difference across all of said select lines to pre-heat said flat panel to at least a minimum temperature and thereafter, conditions only some of said drivers to create a potential voltage difference across said select lines to maintain the temperature of said flat panel. 12. A flat panel as defined in claim 11 wherein said drives reverse the polarity of said potential voltage difference in response to said control means to inhibit DC effects on said flat panel. 13. A flat panel as defined in claim 10 wherein in said heat mode, said control means initially conditions all of said drivers to create a potential voltage difference across all of said select lines to pre-heat said flat panel to at least a minimum temperature and thereafter, conditions all of said drivers to create a potential voltage difference of reduced magnitude across said select lines to dissipate less heat but still maintain the temperature of said flat panel. 14. A flat panel as defined in claim 10 wherein said array of pixels includes a TFT switch array, said select lines being in the form of gate lines extending to gate electrodes of said TFT switches and said data lines being in the form of source lines extending to source electrodes of said TFT switches. 15. A flat panel as defined in claim 14 wherein said flat panel is an active matrix liquid crystal display. 16. A flat panel as defined in claim 10 wherein said flat panel is one of a diode matrix LCD, a passive LCD, a ferroelectric LCD or a flat panel for radiation imaging. 17. A liquid crystal display comprising: an array of pixels arranged in rows and columns; a plurality of source lines, each interconnecting individual ones of one of the rows or columns of said array; a plurality of gate lines, each interconnecting individual ones of the other of the rows or columns of said array; gate drives connected to opposed ends of each of said gate lines, said gate drives being actuable to a first condition to select pixels to allow data to be written to selected pixels via said source lines, said gate drives being actuable to a second condition to create a potential voltage difference across at least some of said gate lines to establish current flow in said gate lines, the resistance of said at least some of said gate lines resulting in the dissipation of heat in said liquid crystal display, each of said gate drives including a plurality of gate drivers, each gate driver being associated with one of said gate lines, in said first condition the gate drivers of each gate drive connected to the same gate line being responsive to input to select the pixels connected to the associated gate line by connecting the gate line to a high potential voltage source, in said second condition, the gate drivers of each gate drive connected to the same gate line being responsive to input to connect the gate line between high and low potential voltage sources; and a control circuit to actuate said gate drives between said first and second conditions. 18. A liquid crystal display as defined in claim 17 wherein in said first condition, a potential voltage difference is created across all of said gate lines to establish current flow therein. 19. A liquid crystal display as defined in claim 18 wherein in said first condition, the gate drivers connected to a select number of leading gate lines are maintained in said second condition to maintain the temperature of said liquid crystal display. 20. A liquid crystal display as defined in claim 18 wherein in said second condition, said gate drives reverse the polarity of said potential voltage difference to inhibit DC effects on said liquid crystal display.

Inventors: LEERENTVELD RAY, PILKINGTON T GORDON, LEERENTVELD, RAY, PILKINGTON, T., GORDON
Applicants: LEERENTVELD RAY, LITTON SYSTEMS CANADA, PILKINGTON T GORDON, LEERENTVELD, RAY, LITTON SYSTEMS CANADA LIMITED, PILKINGTON, T., GORDON
Application year: 1995
Main classification: G02F1
IPC codes: G02F1, G09F9