A method of high addressability error diffusion

Abstract: A method and system implements a high addressability characteristic into an error diffusion process. A grey level value representing a pixel is received. The grey level value has a first resolution which corresponds to an original input resolution. The grey level value is interpolated (S30) to generate subpixel grey level values which correspond to a second resolution. The second resolution is higher than the first resolution and corresponds to the high addressability characteristic. A threshold circuit thresholds the interpolated grey level value and generates (s180) an error value as a result of the threshold. The error value has a resolution corresponding to the first resolution. A portion of the error value is diffused (S190) to adjacent pixels on a next scanline.

Description: The present invention is directed to an error diffusion method for rendering grey images on binary output devices. More specifically, the present invention is directed to an error diffusion process having high addressability so that grey images can be rendered on an output device. There are many methods of rendering grey images on an output device. Moreover, error diffusion can render complex images that contain a mixture of text and picture reasonably well. This utilization of error diffusion eliminates the need to have image segmentation to separate the text from the picture so that the picture aspect of the document can be screened and the text aspect of the document can be threshold. Figure 1 illustrates a typical error diffusion technique. In Step S1 of this process, the video signal for pixel X is modified to include the accumulated error diffused to this pixel from previous threshold processes. The modified video signal value (X) is compared at Step S2 with the value 128, assuming a video range between 0 and 255. If Step S2 determines that the modified video signal value (X) is greater than or equal to 128, the process proceeds to Step S4 wherein a value is output to indicate the turning ON of pixel X. The process then proceeds to calculate the error associated with the threshold process at Step S6 wherein this error, Y, is calculate as being X - 255. On the other hand, if Step S2 determines that the modified video signal value (X) is less than 128, a signal is output at Step 53 indicating that the pixel X is to be turned OFF. The process then proceeds to Step S5 wherein the error, Y, is calculated as being equal to the value X. The error calculated in either Steps S5 or S6 is multiplied by weighting coefficients and distributed to downstream pixels in Step S7. Thus, the error from the threshold process is diffused to adjacent pixels. The coefficients conventionally used to diffuse the error to adjacent downstream pixels are illustrated in Figure 2. In Figure 2, X represents the current pixel being thresholded. The weighted error from this threshold process is diffused to adjacent downstream pixels according to preselected coefficients. For example, the weighting coefficient for the next pixel in the same scanline conventionally is 7/16, whereas the coefficient for the pixel that is one over in the fast scan direction and one down in the slow scan direction from the currently processed pixel is 1/16. This method provides good results, but with advances in marking or printing technology, a new error diffusion method is needed. More specifically, it has become possible to pulse width modulate a laser to print images with high addressability. To use error diffusion in combination with high addressability, one cannot simply perform the error diffusion at the high spatial resolution corresponding to the high addressability because the resulting subpixels would be too small for a typical print engine to render. Thus, it is desired to develop an error diffusion technique which can be effectively utilized with the present day highly addressable image output terminals without producing subpixels too small for rendering. EP-A-0602854 describes a method of quantising pixel values in an image formed by a plurality of pixels. The system uses dot-to-dot error diffusion in which an error is calculated for a dot consisting of a number of individual pixels. The error is then transferred to downstream pixels using the error diffusing method. A first aspect of the present invention provides method of generating an error from a threshold process, comprising the steps of: (a) thresholding a predetermined number of subpixel grey level values, the subpixel grey level values representing a grey level value (P) of a pixel having a first resolution, the subpixels having a second resolution higher than the first resolution; and (b) generating an error value (ei) by: bi) calculating a desired output, bii) calculating an actual output; and biii) calculating the error to be equal to the desired output minus the actual output, the error value having the first resolution. A second aspect of the present invention provides a system for generating an error from a threshold process, comprising: threshold means for thresholding a predetermined number of subpixel grey level values, the subpixel grey level values representing a grey level value (P) of a pixel having a first resolution, the subpixels having a second resolution higher than the first resolution; and error means for generating an error value (ei) by: i) calculating a desired output; ii) calculating an actual output; iii) calculating the error to be equal to the desired output minus the actual output, the error value having the first resolution. A third aspect of the present invention provides a printing system for rendering marks on a receiving medium, comprising: receiving means for receiving a grey level signal corresponding to a pixel having a first resolution; interpolation means for converting the grey level signal to a second resolution, the second resolution being higher than the first resolution; binarization means for binarizing the converted grey level signal so as to output a binary signal and an error signal, the error signal being calculated by: i) calculating a desired output; ii) calculating an actual output; iii) calculating the error to be equal to the desired output minus the actual output, the error signal having the first resolution; diffusing means for diffusing the error value to grey level signals corresponding to pixels adjacent to the pixel having the first resolution; and rendering means for converting the binary signal into a mark on the receiving medium. Further objects and advantages of the present invention will become apparent from the following descriptions of the various embodiments and characteristic features of the present invention, in conjunction with the drawings, wherein: Figure 1 shows a flowchart illustrating a typical error diffusion method; Figure 2 shows a diagram illustrating a typical weighting coefficient scheme; Figure 3 shows a graph illustrating subpixel interpolation for one embodiment of the present invention; Figure 4 shows a flowchart illustrating the error diffusion method using the interpolation schemes of Figure 3; Figure 5 shows a graph illustrating subpixel interpolation for a second embodiment of the present invention; Figure 6 shows a flow chart illustrating the error diffusion method of the present invention using the interpolation scheme of Figure 5; and Figure 7 and 8 show graphs illustrating the subpixel relationships for the interpolation schemes of Figures 3 and 5. In describing the present invention, it is assumed that the video value in a range between 0 and 255. However, any chosen range for the video signal can be utilized in conjunction with the present invention. As described above, in conventional error diffusion methods, the printing of the pixels is determined by comparing a modified input with a threshold. The modified input video signal is the input video signal, V, plus an accumulated error term, e I , determined from the processing of previous pixels. If the modified input video signal of the pixel is greater than or equal to the threshold, the output is a logical one and an error term of V + e I - 255 is propagated to the downstream pixels. If the modified input video signal is less than the threshold, the logical output is 0 and an error of V + e i is propagated downstream. It is noted that the present invention is being described for a binary system. However, the concepts the present invention are readily applicable to four level systems, etc. To extend the conventional error diffusion process to a high addressability environment, the binarization (threshold) is performed at a higher spatial resolution, but the error computation and propagation is performed at the original lower spatial resolution. This splitting of the process substantially prevents or reduces the number of isolated subpixels, thereby maintaining high image quality. This high resolution/low resolution method of the present invention will be explained in more detail below. In explaining the high addressability error diffusion process, it is assumed that the input grey level at pixel location i and pixel location i + 1 is represented by V I and V I+1 , respectively. The pixel values are assumed to be 8 bit integers wherein, for the sake of explanation, 0 denotes white and 255 denotes black. The rendering error, at the lower resolution, that passes from upstream pixels to the downstream pixel location is denoted by e I . It is noted that a feature of high addressability involves interpolation between pixels, the creation of subpixels. This interpolation impacts the high addressability error diffusion process. More specifically, depending on the way the interpolation is done, two distinct outputs can be obtained utilizing the high addressability error diffusion process of the present invention. Each one of these distinct outputs will be discussed below. As noted above, the high addressability error diffusion process of the present invention produces two distinct outputs depending upon the interpolation scheme. With respect to a first interpolation scheme, the steps for determining the printing or rendering of a subpixel are as follows. Initially, the modified pixel values P0 I = V I-1 + e I-1 = P1 I-1 and P1 i = V i + e I are computed at two locations corresponding to the input resolution. In this example, as illustrated in Figure 3, the subpixels are denoted by 0 to N-1. In Figure 3, the high addressability characteristic, N, is equal to 4. As illustrated in Figure 3, a line is drawn to connect the values P0 and P1. (The i subscripts have been dropped for simplicity.) Moreover, a dotted line is drawn to represent a threshold value of 128. (Again, it is noted that 0 to 255 is the range of the video signal; however, any range can be utilized.) The intersection of the line connecting P0 and P1 and the line representing the threshold at 128 determines which subpixels are to be rendered or printed. The X coordinate of the point of intersection is determined and normalized to N by the equation X = N (128 - P0)/(P1-P0). Next, it is determined which subpixels are to be turned ON. If X is less than or equal to 0 and if P1 is greater than or equal to 128, all the subpixels are ON; otherwise, all the subpixels are OFF. This decision represents the complete rendering or non-rendering of the pixel. To determine a partial rendering of the whole pixel, a subpixel analysis must be performed. In this instance, the value X must be compared to the individual subpixel values. It is noted, as illustrated in Figure 3, that the value of X does not necessarily compute to a whole number or subpixel, thereby making any analysis include a fractional component. To avoid this, X is converted to a whole number or subpixel value. For this conversion, n is allowed to be equal to the truncated integer value of X. The values n and X can then be utilized to determine which subpixels are to be turned ON and which subpixels are to be turned OFF. More specifically, if X is greater than 0, but less than n, and if P1 is less than 128, only the subpixels from 0 to n are turned ON and the rest of the subpixels are turned OFF; otherwise, the subpixels from 0 to n are turned OFF and the rest are turned ON. If X is greater than or equal to n and if P0 is greater than or equal to 128, all subpixels are turned ON; otherwise, all subpixels are turned OFF. This threshold process produces an error which needs to be propagated to downstream pixels. Moreover, as noted above, the error needs to be at the original low resolution input. The conversion to the original resolution is realized by determining the difference between the desired output, (P0 + P1)/2, and the actual output, namely b*255/N where b is the number of subpixels that were turned ON. The converted error is then multiplied by a set of weighting coefficients and distributed to the downstream pixels. Figure 4 illustrates the actual method utilized to carry out the interpolation and error distribution process described above. In Figure 4, at Step S10, the modified video input signal is divided into N subpixel values. At Step S20, the values P0 i and P1 I are calculated as described above. Next, at Step S30, the X-coordinate of the point of intersection is determined and normalized by multiplying the difference between 128 and P0 by the value N and dividing this product by the difference of P1 and P0. At Step S40, the normalized value X is compared with the value 0. If X is less than or equal to 0, Step 550 compares the value P1 with the value 128. If the value P1 is greater than or equal to 128, all the subpixels are set to an ON state at Step S60. However, if P1 is less than 128, Step S70 sets all the subpixels to an OFF state. On the other hand, if Step S40 determines that X is not less than or equal to 0, Step S90 determines the integer value of X and sets this integer value equal to Y. At Step S100, the integer value Y is compared with the values 0 and N. If the value Y lies between 0 and N, Step S110 determines whether the value P1 is less than or equal to 128. If the value P1 is less than or equal to 128, Step S120 sets the subpixels 0 to Y to the ON state and the subpixels Y + 1 to N to the OFF state. However, if Step S110 determines that the value P1 is greater than 128, Step S130 sets the subpixels 0 to Y to the OFF state and the subpixels Y + 1 to N to the ON state. If Step S100 determines that the value Y is not between the values 0 and N, Steps S140 determines whether the value P1 is greater than or equal to 128. If the value P1 is greater than or equal to 128, Step S160 sets all subpixels to the ON state. However, if Step S140 determines that the value P1 is less than 128, Step S150 sets all the subpixels to the OFF state. Upon completing the processes at either Steps 560, S70, S120, S130, S150, or S160, the error diffusion method of the present invention proceeds to Step S170. At Step S170, the number of ON subpixels is calculated and set equal to Z. Next, at Step S180, the error to be propagated to the downstream pixels is calculated. Namely, the error is calculated to represent the original low spatial resolution. Upon calculating the error in Step S180, Step S190 multiplies the error by weighting coefficients and distributes the weighted error terms to downstream pixels. The second interpolation method with respect to implementing the high addressability error diffusion method of the present invention will be describe as follows. Initially, the modified pixel values P0 I = V I + e I and P1 I = V I + 1 + e I are computed. Figure 5 illustrates the values P0 and P1 for the second version of the high addressability error diffusion method of the present invention. As in the first method, the subpixels are denoted by 0 to N-1 wherein, as in the previous case, the high addressability characteristic is N = 4. The interpolated subpixel values are computed as B n = P0 + n(P1-P0)/N for n = 0 to N - 1. The interpolated subpixel values are then compared with a threshold value which in the preferred embodiment is 128, assuming that the video value ranges from 0 to 255. If B n is greater than or equal to 128, the subpixel is turned ON; otherwise, the subpixel is turned OFF. In the second version, the error to be propagated to downstream pixels is computed as the desired output, (P0 + P1)/2, minus the actual output, namely, y*255/N wherein y is the number of subpixels turned ON. The error is then multiplied by a set of weighting coefficients and distributed to the downstream pixels as in the first version. Figure 6 illustrates the process utilized in the second interpolation version of the high addressability error diffusion method of the present invention. As in the Figure 4, the inputted modified video signal is divided into N subpixel units at Step S10. At Step S200, the P0 and P1 values are computed as noted above. At Step S210, the values Y and Z are set equal 0, wherein Y denotes the number of subpixels which are to be turned ON and Z denotes the addressability factor. At Step S220, Z is compared with N to determined whether all the subpixels within the modified video signal have been thresholded. If it is determined that subpixels remain to be thresholded, the process moves to Step S230 wherein the next subpixel value is computed. Step S240 then compares the computed subpixel value with the threshold value, namely 128. If the subpixel value is greater than or equal to the threshold value, Step 5260 sets the subpixel value to the ON state, and Step S270 increments the value Y indicating the number of subpixels that are set ON. However, if the subpixel value is less than 128, Step S250 sets the subpixel value to OFF. Upon the completion of either Step S250 or Step 270, the process proceeds to Step S280 wherein the high addressability value Z is incremented. This subroutine is repeated until all subpixel values within the modified video signal are compared with the threshold value. Upon completing the comparison of all subpixel values, the process advances to Step S290 wherein the number of ON subpixels are calculated. At Step S300, the error from the threshold process is calculated so that the value represents the original lower spatial resolution. Upon calculating the error, Step S310 multiplies the error by weighting coefficients and distributes the error to downstream pixels. Figure 7 illustrates the high addressability relationship between adjacent pixels utilizing the first interpolation version of high addressability error diffusion method. More specifically, it is noted that the P1 value of the present pixel is utilized as the P0 value for the next pixel. On the other hand, Figure 8 illustrates the high addressability relationship between pixels utilizing the second interpolation version of the high addressability error diffusion method. In this case, there is discontinuity between the P1 value of the previous pixel and the P0 value of the present pixel. Thus, from these two Figures, it can be seen that the error output from the two versions of the high addressability error diffusion methods will be different. The actual circuit utilized to implement the high addressability error diffusion will be described briefly below. A full discussion of the circuit is disclosed in EP-A-0 696 130 corresponding to U.S. Application Serial No. 08/285,572, filed concurrently herewith. In the circuit implementation, the input video signal is input into an error calculation circuit and a video modification circuit. An error component e FIFO , is also fed into the error calculation circuit. The error calculation circuit calculates the various possible error values that can result from the presently occurring binarization process. The selection of the proper error to be output by the error calculation circuit is based upon a received error selection signal which will be discussed in more detail below. The selected error value from the error calculation circuit is fed into a coefficient matrix circuit which distributes the error based upon a set of weighting coefficients. The coefficient matrix circuit splits the error values into the two components e FIFO and e FB . The feedback error, e FB , is output from the coefficient matrix circuit and fed back to the video modification circuit. The video modification circuit also receives e FIFO from a buffer. The video modification circuit produces the interpolated subpixel values for the high addressability error diffusion method wherein the interpolated subpixel values are fed into the binarization circuit along with a threshold value. In the preferred embodiment of the present invention, the threshold value is 128. However, it is noted that this threshold value can be any value. The binarization circuit binarizes the inputted video data so as to output binarized image data for utilization by an image rendering device. The binarization circuit also produces the error selection signal which is utilized by the error calculation circuit to choose the correct error value to be fed to the coefficient matrix circuit. This error selection signal represents the number of interpolated subpixels which are turned ON during the binarization process. Thus, the error calculation circuit may include a multiplexer to make this selection. The error calculation circuit is in parallel with the video modification circuit and the binarization circuit. Thus, the high addressability error diffusion method can be readily implemented in hardware so that the image data can be binarized within the time constraints and throughput specifications of a high output image rendering device. In describing the present invention, the terms pixel and subpixel have been utilized. These terms may refer to an electrical (or optical, if fiber optics are used) signal which represent the physically measureable optical properties at a physically definable area on a receiving medium. The receiving medium can be any tangible document, photoreceptor, or marking material transfer medium. Moreover, the terms pixel and subpixel may refer to an electrical (or optical, if fiber optics are used) signal which represent the physically measureable optical properties at a physically definable area on a display medium. A plurality of the physically definable areas for both situations represent the physically measureable optical properties of the entire physical image to be rendered by either a material marking device, electrical or magnetic marking device, or optical display device. Lastly, the term pixel may refer to an electrical (or optical, if fiber optics are used) signal which represents physical optical property data generated from a single photosensor cell when scanning a physical image so as to convert the physical optical properties of the physical image to an electronic or electrical representation. In other words, in this situation, a pixel is an electrical (or optical) representation of the physical optical properties of a physical image measured at a physically definable area on an optical sensor. Although the present invention has been described in detail above, various modifications will be apparent to skilled persons. For example, the preferred embodiment of the present invention has been described with respect to a printing system; however, this error diffusion method is readily implemented in a display system. Moreover, the high addressability error diffusion method of the present invention can be readily implemented on an ASIC, thereby enabling the placement of this process in a scanner, electronic subsystem, printer, or display device. Moreover, the present invention has been described with respect to a video range of 0 to 255. However, it is contemplated by the present invention that the video range can be any suitable range to describe the grey level of the pixel being processed. Furthermore, the present invention is readily applicable to any rendering system, not necessarily a binary output device. It is contemplated that the concepts of the present invention are readily applicable to a four-level output terminal or higher. Lastly, the present invention has been described with respect to a monochrome or black/white environment. However, the concepts of the present invention are readily applicable to a color environment. Namely, the high addressability error diffusion process of the present invention can be applied to each color space value representing the color pixel.

Claims: A method of generating an error from a threshold process, comprising the steps of: (a) thresholding (S40-S160;S240) a predetermined number of subpixel grey level values (B 0 ,B 1 , ...B n ), the subpixel grey level values representing a grey level value (P) of a pixel having a first resolution, the subpixels having a second resolution higher than the first resolution; and (b) generating (S180;S300) an error value (e i ) by: bi) calculating a desired output, bii) calculating an actual output; and biii) calculating the error to be equal to the desired output minus the actual output, the error value having the first resolution. The method as claimed in claim 1, further comprising the step of: (c) diffusing (S190;S310) the error value (e i ) to grey level values (P) of pixels adjacent to the pixel being thresholded. A method according to claim 1 or claim 2, wherein step (a) comprises the substeps of: (ai) receiving the grey level value (P) representing the pixel; (aii) converting (S10,S20;S200) the grey level value to the predetermined number of subpixel grey level values; and (aiii) thresholding the predetermined number of subpixel values. The method as claimed in claim 3, wherein said step (aii) comprises the substeps of: computing (S20;S200) a first grey level value (P0); and computing a second grey level value (P1); and preferably further comprises the substep of: computing a plurality of subpixel grey level values B n , the subpixel grey level values B n being equal to P0+n(P1-P0)/N, wherein n is equal to 0 to N-1, P0 is equal to the first grey level value, P1 is equal to the second grey value, and N is equal to a high addressability characteristic. The method as claimed in claim 4, wherein the desired output is equal to a sum of the first and second grey level values divided by two; and, wherein the actual output is equal to a number of subpixels having a grey level value equal to or greater than a threshold value multiplied by a maximum grey level value for a pixel divided by a high addressability characteristic. A system for generating an error from a threshold process, comprising: threshold means for thresholding a predetermined number of subpixel grey level values (B 0 ,B 1 ,...B n ), the subpixel grey level values representing a grey level value (P) of a pixel having a first resolution, the subpixels having a second resolution higher than the first resolution; and error means for generating an error value (e i ) by: i) calculating a desired output; ii) calculating an actual output; iii) calculating the error to be equal to the desired output minus the actual output, the error value having the first resolution. The system as claimed in claim 6, further comprising: diffusing means for diffusing the error value to grey level values of pixels adjacent to the pixel being thresholded. A system according to claim 6 or claim 7, the system further comprising: input means for receiving the grey level value representing the pixel; and high addressability means for converting the grey level value to the predetermined number of subpixel values. The system as claimed in claim 8, wherein said high addressability means computes a first grey level value (P0) and a second grey level value (P1). A printing system for rendering marks on a receiving medium, comprising: receiving means for receiving a grey level signal corresponding to a pixel having a first resolution; interpolation means for converting the grey level signal to a second resolution, the second resolution being higher than the first resolution; binarization means for binarizing the converted grey level signal so as to output a binary signal and an error signal, the error signal being calculated by: i) calculating a desired output; ii) calculating an actual output; iii) calculating the error to be equal to the desired output minus the actual output, the error signal having the first resolution; diffusing means for diffusing the error value to grey level signals corresponding to pixels adjacent to the pixel having the first resolution; and rendering means for converting the binary signal into a mark on the receiving medium.

Inventors: METCALFE DAVID J, SHIAU JENG-NAN, WILLIAMS LEON C, METCALFE, DAVID J., SHIAU, JENG-NAN, WILLIAMS, LEON C.
Applicants: XEROX CORP, XEROX CORPORATION
Application year: 1995
Main classification: H04N1
IPC codes: H04N1