Driver circuit for an injector

Abstract: An injector control circuit for a motor vehicle electronic injection system utilising current recirculation to control an injector actuation winding (L), provided with a circuit configuration comprising a constant current generator (IB1) operable to eliminate the problems of instability and sensitivity to supply line (VCC) interruptions to which prior art control circuits are subject.

Description: The invention relates to a control circuit for an injector of an internal combustion engine. More specifically the invention relates to an injector control circuit of the kind defined in the preamble of claim 1. The operating principle of a known electronic injection heat engine fuel supply system is based on the possibility of opening a path for the fuel by means of an electronically controlled valve called an injector. An injector is typically constituted by a nozzle which can be closed by a shutter element in the form of a pin or needle. This shutter element is typically urged by a spring towards the nozzle so as to shut it. Opening of the injector is triggered by a magnetic field which is obtained by controlling the current in an inductor wound around a core so as to withdraw the shutter element by overcoming the action of the associated spring. For the purpose of reducing the dissipation of power and therefore heat, the control operation is split into two phases: a first phase during which it is necessary to open the injector and therefore during which a high magnetic field is necessary (peak phase), a second, subsequent phase in which the injector must be maintained open, in which a magnetic field of lower intensity is sufficient (maintenance phase). In Figure 1 is plotted the typical variation of the injector control current Il, as a function of time t. As can be observed, the current Il in the injector winding or inductor has a peak Ip of high value in a first phase after which it falls to and remains substantially constant at a lower value Im. The undulating variation of the current Il in the maintenance phase is due to the use of control circuits of the commutation type which make it unnecessary to have active elements in the linear zone and therefore reduce the power dissipation. Because of problems related to the specific application, the transfer from the peak phase to the maintenance phase must take place rapidly, that is to say with a steep wave front. This can be achieved by recirculating the current Il at high voltage in the injector winding. For a better understanding, a prior art injector control circuit of the initially - defined kind, as disclosed for instance in FR-A-2 670 832, is shown in Figure 2. When the current Il in the winding L reaches the peak value Ip a voltage comparator CP commutes causing a DMOS transistor Q2 to turn off. The voltage comparator CP uses a measurement resistor RS to detect the current through the winding L and is connected to a voltage reference source Vref in such a way as to commute upon reaching the peak value Ip. The output of the comparator CP is connected by means of an interface circuit LOG to the gate terminal of the transistor Q2 which is in series with the winding L. The circuit further includes a bipolar PNP transistor Q1 the base of which is connected to the supply VCC of the circuit and the collector of which is connected to the gate of the transistor Q2. The emitter of the transistor Q1, on the other hand, is connected, as illustrated, to one terminal of a plurality of series connected zener diodes DZ1, DZ2, DZ3 ... DZn connected, as illustrated, to a common node A between the winding L and the DMOS transistor Q2. A resistor R3 is also provided as biasing resistor for the gate of the transistor Q2, connected between the gate of the transistor Q2 and ground, through which flows a current I. If the Lenz law is applied one has: v(t) = -Ldi(t)/dt. The voltage on the node A rises until it reaches a value given by: V(A) = VCC + VCL + Vbe(Q1) where: VCL = VDZ1 + ... + VDZn Where VDZ = the zener voltage. The number of zener diodes necessary depends on the voltage value at which it is desired to drain off the load current through the DMOS transistor Q2, which remains in conduction because of the current I which fixes its gate voltage. Through the recirculation the current Il falls to the maintenance value Im. This known prior art circuit, however, has problems of stability due to the fact that the resistor R3 which biases the gate of the DMOS transistor Q2 in the recirculation phase must be of low value in order to discharge the gate of the transistor Q2 quickly. Moreover the parameter gm = lc/vt of the transistor Q1 must be high since it is necessary to provide sufficient current to raise the voltage on the gate of the transistor Q2 whereby to hold it in conduction in the recirculation phase. Moreover, if an interruption occurs in the supply line whilst the recirculation phase is active the circuit finds itself with the PNP transistor Q1 having a low base voltage (even 0 volts), and therefore the collector of the transistor Q1 does not have a sufficient voltage to guarantee the conduction state of the transistor Q2. The recirculation to earth is no longer possible since the transistor Q2 does not remain control conductive. US-A-4 190 022 discloses a control circuit for an injector coil in which thermal variations of the coil resistance are corrected by driving the coil with a constant current. The object of the present invention is that of providing an injector control circuit in which the above-mentioned disadvantages can be resolved. According to the present invention this object is achieved by an injector control circuit having the features set out in claim 1. The invention will now be described, purely by way of non-limitative example, with reference to the attached drawings, in which: Figure 1 is a cartesian diagram illustrating the operation of the circuit to which the present invention relates and has already been described with reference to the prior art; Figure 2 is a circuit diagram of a prior art device and has already been described; Figure 3 is a block-schematic diagram of a possible embodiment of the circuit according to the present invention; Figure 4 is a block-schematic diagram of the embodiment of Figure 3; and Figures 5a, 5b and 5c are schematic circuit diagrams of alternative embodiments of the circuit according to the invention. In Figure 3 is shown a possible embodiment of an injector control circuit according to the present invention. The present invention essentially consists in: the introduction of a resistor R2, a transistor Q3, a current generator IB1 and a capacitor C between the terminal A and the collector of the transistor Q1 to eliminate the problems relating to the loss of stability, the positioning of two zener diodes (for example DZA and DZB) on the base of the transistor Q1 with the introduction of the resistor R1, operable to prevent losses, to resolve the problems related to the compatibility of the recirculation structure during interruptions to the supply line. In this case the voltage on the node A in the recirculation phase reaches the value given by: V(A) = VCC + VCL + Vbe(Q1) + R2*IZ where IZ is the current which flows through the zener diodes DZ1, ..., DZn. It is observed that the term VCL is the same as in the preceding case (Figure 2) because it is given by the sum of the voltages VDZ1 + ... + VDZn + VDZA + VDZB, the overall number of zener diodes being unchanged. In this way, if the voltage on the supply line should fall, the gate of the transistor Q2 remains biased and the transistor Q3 in conduction because the two zener diodes DZA, DZB connected to the base of the PNP transistor Q1 and supplied via the resistor R1 provide sufficient voltage to the base of the transistor Q1 for the collector of this transistor Q1 to have a sufficiently high voltage. There now follows an analysis relating to the stabilisation of the circuit according to the invention. The capacitor C, which is integrable, serves to return the circuit to a classic "dominant pole" structure in which the so-called pole-splitting of the capacitor C is effected for separating the input and output poles of the operational amplifier Amp of Figure 4. The circuit of Figure 4 is equivalent to the circuit of Figure 3 as far as the gain is concerned. These poles, of the transfer function of the circuit in question, are given by the parasitic capacities of the structure. Moreover, the gain-band product of the circuit is controlled in that gm is controlled. It can be seen that gm is controlled because the transistor Q1 is supplied with a constant current determined by the current generator IB1 and, moreover, if a very small gm should be sufficient it is possible to introduce an emitter degeneration constituted by the resistor R2. In fact, the current of the generator IB1 cannot be reduced excessively because it must be able to discharge the base of the transistor Q3 quickly. In this way, if the resistor R2 has a very high value one has that: gm = 1/R2 and therefore gm is controlled. Consequently, the biasing current of the two series of zener diodes is constant: IZ[DZA, DZB] = (Vbe(Q1) + R2*IB1)/R1 IZ[DZ1..DZn] = IB1 + (Vbe(Q1) + R2*IB1)/R1 Thus the fact that a lot of current is needed to put the transistor Q2 into conduction is no longer binding. The current in the zener diodes is adjustable through the current IB1. Numerous advantages are therefore obtained with the present invention. These advantages are substantially as follows: the feedback network of the recirculation structure is frequency compensated and therefore stable because the transistor Q1 is constant current biased, gm is controlled (as a consequence of the preceding point), the recirculation structure is compatible with interruptions in the supply line. If the integration technology adopted for manufacture of the circuit should not allow the use of the transistor Q2, because the biasing voltage is too high, it is possible to use a DMOS type transistor Q4 in its place. It is also possible to bias the collector of transistor Q3 on the drain terminal of the DMOS transistor Q2, as also the biasing of the transistor Q4. These above-mentioned alternative embodiments are illustrated in Figures 5a, 5b and 5c. Naturally, the principle of the invention remaining the same, the details of construction and the embodiments can be widely varied with respect to what has been described and illustrated, without by this departing from the scope of the present invention, as defined by the claims.

Claims: An injector control circuit for a heat engine electronic fuel injection system, comprising a voltage supply (VCC), a first transistor (Q2) connected between an injector actuation winding (L) and ground and operable to control the passage of an activation current (I1) in said injector actuation winding (L), and a second transistor (Q1) operable to generate a biasing voltage for a control terminal of the said first transistor (Q2), characterised in that it includes circuit means (IB1, Q3, R3, C) operable to stabilise the said biasing voltage on the said control terminal of the said first transistor (Q2), and further circuit means (DZA, DZB, R1) connected to a control terminal of the said second transistor (Q1), operable to allow the said biasing voltage to be maintained even in the case of short interruptions in the supply voltage (VCC) of the said circuit. A control circuit according to Claim 1, in which the said first transistor (Q2) is connected in series with the said winding (L) and the said second transistor (Q1) is a PNP bipolar transistor having: a base terminal connected to a first terminal of the said winding (L) and to the said voltage source (VCC), an emitter terminal connected to a plurality of zener diodes (DZ1, ..., DZn) connected in series to a common node (A) to a second terminal of the said winding (L) and to an input terminal of the said first transistor (Q2), and a collector terminal (B) connected to the said control terminal of the said first transistor (Q2) and to a control circuit (CP, LOG) operable to activate the said first transistor (Q2), characterised in that the said circuit means (IB1, Q3, R3, C) include a current generator circuit (IB1) connected in such a way as to draw current from the said control circuit of the said first transistor (Q2). A control circuit according to Claim 2, characterised in that the said current generator circuit (IB1) is a constant current generator. A control circuit according to Claim 2 or Claim 3, characterised in that the said circuit means (IB1, Q3, R2, C) include a third transistor (Q3) controlled by the said current generator circuit (IB1), connected in such a way as to pilot the said control terminal of the said first transistor (Q2). A control circuit according to Claim 4, characterised in that the said third transistor (Q3) is a DMOS transistor. A control circuit according to any of Claims 1 to 5, characterised in that the said circuit means (IB1, Q3, R3, C) include a capacitor (C) connected in such a way as to provide frequency stabilisation for the control circuit of the first transistor (Q2). A control circuit according to Claim 6, characterised in that the said capacitor (C) is connected between the said second terminal (A) of the said winding (L) and the said collector (B) of the said second transistor (Q1). A control circuit according to any of Claims 1 to 7, characterised in that the said further circuit means (DZA, DZB, R1) include at least one zener diode (DZA) connected between the said base of the second transistor (Q1) and the said voltage source (VCC). A control circuit according to Claim 8, characterised in that the said further circuit means (DZA, DZB, R1) include two zener diodes (DZA, DZB) connected in series between the said base of the second transistor (Q1) and the said voltage source (VCC). A control circuit according to any of Claims 1 to 9, characterised in that the said further circuit means (DZA, DZB, R1) include a first resistor (R1) connected between the said base and the said emitter of the said second transistor (Q1). A control circuit according to any of Claims 1 to 10, characterised in that it includes a second resistor (R2) connected between the said plurality of zener diodes (DZ1, ...., DZn) and the said emitter of the said second transistor (Q1). A control circuit according to Claim 10 and Claim 11, characterised in that the said first resistor (R1) is connected to a common node between the said second resistor (R2) and the said plurality of zener diodes (DZ1, ..., DZn). A control circuit according to any of Claims 8 to 12, characterised in that the cathode of the said at least one zener diode (DZA) is connected to the said base of the said second transistor (Q1). A control circuit according to any of Claims 1 to 13, characterised in that it is formed as an integrated circuit.

Inventors: GALLINARI MAURIZIO, MAGGIONI GIAMPIETRO, MAZZUCCO MICHELANGELO, GALLINARI, MAURIZIO, MAGGIONI, GIAMPIETRO, MAZZUCCO, MICHELANGELO
Applicants: MAGNETI MARELLI POWERTRAIN SPA, ST MICROELECTRONICS SRL, MAGNETI MARELLI POWERTRAIN S.P.A., STMICROELECTRONICS S.R.L.
Application year: 1995
Main classification: H01H47
IPC codes: H01H47, H03K17, F02D41