Flash disk card

Abstract: A flash disk card using a flash memory is provided with MPU for converting the cylinder, head and sector numbers, which are input from a host device, into a logical block address (LBA) and a sector address in block, determining a physical block address (PBA) having the same size as that of an erase block from the logical block address with reference to a logical/physical block address conversion table stored in the flash memory, and accessing the flash memory on the basis of the physical block address. The flash disk card permits a decrease in size of the address conversion table, can be constructed at low cost, and has no need for constructing the table at each time a power supply is turned on.

Description: The present invention relates to a flash disk. In particular, the present invention relates to a flash disk and/or flash disk card equipped with a flash memory used as an external storage medium for an information processing device. A known flash disk and/or flash disk card will be described below with reference to Figs. 10 to 14. Fig. 10 is a drawing illustrating the whole configuration of the known flash disk card. Fig. 11 is a drawing illustrating the configuration of an address conversion table of the known flash disk card. Fig. 12 is a drawing illustrating an addressing system of the known flash disk card. Fig. 13 is a drawing illustrating the configuration of a flash memory of the known flash disk card. Fig. 14 is a drawing illustrating a change in content of the address conversion table of the known flash disk card. In Fig. 10, a known flash disk card 1 comprises a flash disk control circuit 3 having a plurality of registers for receiving and transmitting cylinder, head and sector numbers or commands with a host device 2 such as a computer or the like, a MPU 4 for controlling the whole card, a logical/physical sector address conversion table 5 comprising 1 Mbit SRAM, a flash memory array 6, for example, having 20 Mbytes, and a sector buffer 7 comprising a RAM. As shown in Fig. 11, the logical/physical sector address conversion table 5 is adapted for converting logical sector addresses (LSA) into physical sector addresses (PSA) of the flash memory array 6. The flash memory array 6 which is an electrically rewritable nonvolatile memory requires an erasing operation requiring more time than reading and writing operations during data rewriting. The flash memory array 6 erases data in blocks of several kilo-bytes to several tens kilo-bytes or chips. This unit is greater than the sector size (512 bytes) which is the unit of data transfer of a hard disk device. Thus, the flash disk card 1 which emulates the hard disk device, i.e., performs a pseudo-operation, by using the flash memory array 6 generally employs the method of displaying only a flag indicating that the old sector is invalid without erasing data of the old sector in response to a command to update data in units of sectors, which command is output from the host device 2, and writing update data in a space area of the flash memory array 6. In this method, since the correspondence between the sector-unit address (logical sector address: LSA) specified by the host device 2 and the address (physical sector address: PSA) of the flash memory 6 where update data is actually written changes each time data is updated, the logical/physical sector address conversion table 5 shown in Fig. 11 is used. Like access to the hard disk device, the flash disk card 1 is accessed from the host device 2 by specifying a cylinder number, a head number and a sector number in four registers of the flash disk control circuit 3, as shown in Fig. 12. Two registers are used for higher and lower cylinder numbers. The cylinder number, head number and sector number are then converted into a logical sector address. This address conversion is performed on the basis of the following equation (1): LSA = (C × HpC + H) × SpH + S - 1 wherein C is the cylinder number, HpC is the number of heads per cylinder, H is the head number, SpH is the number of sectors per head, and S is the sector number. The MPU 4 converts the logical sector address (LSA) into the physical sector address (PSA) with reference to the logical/physical sector address conversion table 5. The physical sector address is used for operations of reading and writing data. Description will now be made of update of a content, for example, the content of logical sector address L2, of the flash memory 6. As shown in Fig. 13, the flash memory 6 has a data area having physical sector addresses of P0, P1, P2 to PX, and a space area having physical sector addresses from PY. In the flash memory 6, the logical sector addresses L0 to L2 are presently used (data is actually stored). The MPU 4 first reads the content of the present logical sector address L2 (physical sector address P2), confirms that the read data is effective, and then sets an invalid sector flag (mark Δ). The MPU 4 then checks the content of physical sector address PY of the space area, confirms that the sector is a spare sector, and then writes update data therein. The content of the physical sector address corresponding to logical sector address L2 of the logical/physical sector address conversion table 5 is converted from 2 to Y, as shown in Fig. 14. In this way, since the correspondence between the sector-unit address (LSA) specified by the host device 2 and the address (PSA) of the flash memory 6 where update data is actually written changes each time data is updated, the logical/physical sector address conversion table 5 is used. In a simple writing operation, the MPU 4 adds the logical/physical sector address conversion table 5 for causing the logical sector address to correspond to the physical sector address. Although SRAM is used for the logical/physical sector address conversion table 5 from the viewpoints of the rewriting frequency and high speed, the conversion table 5 is formed in units of sectors (512 bytes), thereby causing the problem that the size of the SRAM for the conversion table increases as the card capacity increases. In an example where the flash disk card 1 has 20 Mbytes, the number of sectors is 40 k, and 16 digits (2 bytes) are required for binary display of the 40 k sectors. The size of the SRAM for the conversion table is thus 80 kbytes, and SRAM with 1 Mbits (128 bytes) is finally required. The above known flash disk card 1 comprises the logical/physical sector address conversion table 5 which is formed in units of sectors, and thus has the problem that the size of the conversion table increases as the capacity of the card increases. Although the SRAM is used for storing the large conversion table, the SRAM is volatile and thus has the problem with respect to the need for constructing the table each time a power supply is turned on. From document EP-A-557 736, there is known a flash disk with a table to convert a logical block address to a physical block address to address a block-erasable block; further ID's called Alloc [0 ...] are stored within a block to permit access of data region wherever it is stored; the data is however not in sectors but of variable length. Furthermore, document GB-A-2251323 discloses a disk emulation for a non-volatile semiconductor memory. Furthermore, document WO9420906 discloses a flash file system. This document discloses the features of the preamble of claim 1. The present invention has been achieved for solving the above problems, and an object of the invention is to provide a flash disk which permits a decrease in size of an address conversion table, a decrease in rewriting frequency of the address conversion table, and an increase in life of the flash disk by uniforming the numbers of times of erasing in respective erase blocks of a flash memory. In accordance with the present invention, this object is achieved by a flash disk as defined in claim 1. Advantageous further developments are set out in the dependent claims. It is thus possible to decrease the size of the address conversion table and the rewriting frequency of contents in the address conversion table. In a flash disk in accordance with the present invention, the logical/physical block address conversion table is stored in the flash memory. The flash disk card can thus be formed at low cost, and has no need to construct the table each time a power supply is turned on. In a flash disk card in accordance with the present invention, information with respect to an erasing characteristic is stored in each physical block of the flash memory. It is thus possible to uniform deterioration in erase blocks, thereby increasing the life and realizing high reliability. Fig. 1 is a block diagram illustrating the configuration of a first embodiment of the present invention; Fig. 2 is a drawing illustrating a logical/physical block address conversion table in the first embodiment of the present invention; Fig. 3 is a drawing illustrating a configuration of logical and physical blocks in the first embodiment of the present invention; Fig. 4 is a drawing illustrating an addressing system in the first embodiment of the present invention; Fig. 5 is a flowchart illustrating a reading operation in the first embodiment of the present invention; Fig. 6 is a flowchart illustrating a writing operation in the first embodiment of the present invention; Fig. 7 is a drawing illustrating the configuration of a flash memory in the first embodiment of the present invention; Fig. 8 is a drawing illustrating a change in content of a logical/physical block address conversion table in the first embodiment of the present invention; Fig. 9 is a drawing illustrating a configuration of logical and physical blocks in a second embodiment of the present invention; Fig. 10 is a drawing illustrating the configuration of a privately known but unpublished flash disk card; Fig. 11 is a drawing illustrating a logical/physical sector address conversion table of the privately known but unpublished flash disk card; Fig. 12 is a drawing illustrating an addressing system of the privately known but unpublished flash disk card; Fig. 13 is a drawing illustrating the configuration of a flash memory of the privately known but unpublished flash disk card; and Fig. 14 is a drawing illustrating a change in content of the logical/physical sector address conversion table of the privately known but unpublished flash disk card. DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment An embodiment of the present invention is described with reference to Figs. 1 to 8. Fig. 1 is a block diagram illustrating the entire configuration of a first embodiment of the present invention. Fig. 2 is a drawing illustrating the configuration of a logical/physical block address conversion table of the first embodiment. Fig. 3 is a drawing illustrating the configuration of a physical block of the first embodiment. Fig. 4 is a drawing illustrating an addressing system of the first embodiment. Figs. 5 and 6 are flowcharts respectively illustrating reading and writing operations. Fig. 7 is a drawing illustrating the configuration of a flash memory of the first embodiment. Fig. 8 is a drawing illustrating a change in content of the logical/physical block address conversion table of the first embodiment. In these drawings, the same reference numerals denote the same or equivalent portions. In Fig. 1, flash disk card 1A comprises a flash disk control circuit 3, an in-card microprocessor unit (MPU) 4, a logical/physical block address conversion table 5A which is referred to by the MPU 4 during reading and writing operations, a flash memory array 6, and a sector buffer 7 comprising RAM. The logical/physical block address conversion table 5A is stored in a portion of the flash memory array 6. The logical/physical block address conversion table 5A may be stored in another flash memory. Reference numeral 2 denotes a host device for accessing the flash disk card 1A as an external storage medium. The logical/physical block address conversion table 5A shown in Fig. 2 is adapted for converting logical block addresses (LBA) to physical block addresses (PBA) of the flash memory 6. Logical and physical blocks have the same size as that of an erase block. In Fig. 3, a physical block comprises block ID and a predetermined number of sectors, each of the sectors comprising sector ID and a data area. Fig. 3 shows the state where sector addresses of 1 to m are used. At the top of the physical block, the block ID area is provided for storing a logical block number (logical block address) corresponding to this physical block, block status information indicating the state of the physical block used, data such as the number of times of erasing of the physical block, etc. Sector date and sector ID data of each sector are stored together subsequently to the block ID area. The sector ID data includes information such as a sector number (sector address) which indicates the position of the sector concerned in the physical block, an invalid sector flag indicating whether data of the sector is effective or invalid, a sector use flag indicating whether or not the sector is used, etc. Like in access to a hard disk device (not shown) , in access to the flash disk card 1A from the host device 2, as shown in Fig. 4, the cylinder number, head number and sector number are specified for the operation of reading or writing data in or from a a sector having a 512-byte size which is the unit of data transfer. In the flash disk card 1A in accordance with the first embodiment, the cylinder, head and sector addresses specified by the host device 2 are converted into a logical sector address (LSA) on the basis of equation (1), as in the known disk card. The addressing system is then converted on the basis of equation (2) below so as to specify a logical block address (LBA) of a block having the same size as that of the erase block of the flash memory 6 in the card, and a sector address (SA) in the logical block. In equation (2), LBA corresponds to the quotient, and SA corresponds to the residual. If the size of the erase block (logical block) is 64 kbytes, the possible number of sectors per block is 100 (50 kbytes) in view of block ID, sector ID, spare sectors; etc. LBA = LSA ÷ (number of sectors per block) In access to the flash memory 6 in the card, the MPU 4 determines the physical block address (PBA) with reference to the logical/physical block address conversion table 5A shown in Fig. 2, and the reading or writing operation is performed on a sector in the physical block by using the sector address (SA) in the logical block (Steps 10 to 14, Steps 30 to 34). As described above, in the flash disk card 1A in accordance with the first embodiment, since the logical/physical block address conversion table 5A is used, and the flash memory 6 is controlled for every erase block size, the size of the address conversion table can be decreased. For example, for the 20 Mbyte flash memory 6, if the size of the erase block (logical block) is 64 kbytes, the number of logical blocks is 320, and the sufficient size of the address conversion table 5A is 1 kbytes even if one block is displayed by using 2 bytes. Since the known address conversion table 5 requires 128 kbytes (1 Mbits), the size of the conversion table 5A in this embodiment is 1/128 of the known conversion table. In the reading operation, if the invalid sector flag in the sector ID is reset, the MPU 4 decides that the sector is effective, and then reads sector data (Steps 15 and 16). On the other hand, if the invalid sector flag is set, the MPU 4 decides that the sector is invalid and sets sector address pointer PP to sector (m + 1) next to sector m. Areas which are spare sectors at the beginning are successively retrieved for searching for an effective sector and reading sector data thereof (Steps 17 to 21). In Fig. 3, reference character m denotes the last logical sector number in the block. In Fig. 3, attention must be given to the point that one sector comprises sector ID and sector data in two stages. In the writing operation, if the sector use flag in the sector ID is reset, the MPU 4 decides that the sector is not used, and stores sector ID and sector data (Steps 35 and 36). On the other hand, if the sector use flag is set, the MPU 4 decides that the sector is being used, and performs an update operation as described below. An example where the content of sector 2 is updated is described below. The MPU 4 reads the content of present sector ID 2, confirms that data is effective, and then sets the invalid sector flag. The MPU 4 then checks the content of an address next to the last sector m in this block, confirms that the sector is a spare sector, and then writes new sector ID 2 and data of sector 2 (Steps 39 to 42). When the sector of the address next to the last sector m is not a spare sector, the sector address pointer is updated, and the same processing as described above is repeated (Step 44). As described above, in the first embodiment, a spare sector area is provided in each of the physical blocks so that when data of a sector in the physical block is updated, the data is written in the spare sector in the same physical block, thereby eliminating the need to update the logical/physical block address conversion table 5A each time a sector content is updated. Since the flash memory is cheaper than the SRAM and nonvolatile, it requires no reconstruction of the table each time the power supply is turned on, and can be used as a memory for storing the address conversion table 5A. The operation when update of sector data in the same physical block proceeds to leave no spare sector will be described below. In this case, m effective sectors in the physical block are transferred to another spare block in the initial (erased) state. The content of the physical block address corresponding to the corresponding logical block address in the logical/physical block address conversion table 5A is changed to the physical block address of this spare block. After sector data is completely transferred to the spare block, data on the number of times of erasing written in block ID of the old physical block is saved, and then the old block is erased. When the number of times of erasing is incremented by 1 and written in the block ID area, the old physical block becomes a new spare block. Namely, when the sector address pointer PP is equal to M (the last physical sector number in the block) (Step 43), the MPU 4 decides that there is no spare sector in the physical block. For example, as shown in Fig. 7, if there is no spare sector at physical block address 3, m effective sectors in the physical block are transferred to a spare block at physical block address 8 in the initial (erased) state. Namely, the sector ID and sector data which are the present update data are written at the corresponding sector address in the spare block, and all effective sectors at physical block address 3 are then copied into the corresponding sector addresses in physical block 8 (Steps 45 and 46). At this time, the content of the physical block address corresponding to the logical block address 3 in the logical/physical block address conversion table 5A is changed to the physical block address 8 of the spare block (Step 47). After sector data is completely transferred to the spare block, data on the number of times of erasing written in block ID of the old physical block 3 is saved, and the old physical block 3 is then erased. When the number of times of erasing is incremented by one and written in the block ID area, the old physical block 3 becomes a new spare block (Step 48). When there occurs the need to newly transfer data to the spare block, the numbers of times of erasing in the block ID areas of respective spare blocks are checked, and controlled so that the degrees of deterioration of the respective blocks become uniform, thereby permitting an increase in the number of times of rewriting (life) as a card, and the realization of a card with high reliability. Second Embodiment In the above first embodiment, sector ID and sector data of each of the sectors are stored together, as shown in Fig. 3. However, in the second embodiment, a sector ID area and a sector data area may be separately stored, as shown in Fig. 9. Third Embodiment In the above first embodiment, the number of times of erasing is written as a parameter indicating an erasing characteristic in the block ID. However, in the third embodiment, the time required for block erasing or the number of erasing pulses corresponding to the time is used as a parameter indicating an erasing characteristic. Thus, the degrees of deterioration of respective blocks can further be uniformed. A flash disk card using a flash memory is provided with MPU for converting the cylinder, head and sector numbers, which are input from a host device, into a logical block address (LBA) and a sector address in block, determining a physical block address (PBA) having the same size as that of an erase block from the logical block address with reference to a logical/physical block address conversion table stored in the flash memory, and accessing the flash memory on the basis of the physical block address. The flash disk card permits a decrease in size of the address conversion table, can be constructed at low cost, and has no need for constructing the table at each time a power supply is turned on.

Claims: A flash disk comprising: a main electrically rewritable nonvolatile flash memory (6) divided into blocks for storing data into uniform sized sectors within said memory blocks, each memory block having a physical block address (PBA) related to location of the memory block in said main memory (6) and a logical block address (LBA) related to contents of the memory block, individual memory blocks being erased as an erase block unit; and access means (3, 4, 5A) for converting an address input to said access means from outside said flash disk, into a logical block address of a memory block and a sector address in that memory block, for converting the logical block address into a physical block address, and for accessing said flash memory based on the physical block address and the sector address, characterized in that said address input from outside is a cylinder number, a head number, and a sector number, which are converted into said logical block address and said sector address in that memory block; each block contains spare sectors; and with each data stored in a sector within the block is stored a corresponding sector ID, which indicates the position of a sector within the block; said access means (3, 4, 5A) further being arranged to update sector data within said block by writing new sector data with the corresponding sector ID into a spare sector of a block and, when no spare sector is available, rewriting all effective sectors of the block and the new sector into another block which is in the erased state and erasing the old block. The flash disk according to claim 1 wherein said access means (3, 4, 5A) includes a logical/physical block address conversion table (5A) for converting logical block addresses into physical block addresses by referring to the logical/physical block address conversion table. The flash disk according to claim 2 wherein said access means (3, 4, 5A) includes a flash disk control circuit (3) for converting the cylinder number, the head number, and the sector number into a logical sector address and a microprocessor (4) for converting the logical sector address into the logical block address and the sector address. The flash disk according to claim 3 wherein if the logical sector address is LSA, the cylinder number is C, each cylinder has HpC heads, the head number is H, each head has SpH sectors, and the sector number is S, then LSA= (CxHpC+H)xSpH+S - 1. The flash disk according to claim 3 wherein if the logical block address is LBA, the logical sector address is LSA, and each block has SpB sectors, LBA= LSA/SpB and any remainder corresponds to a sector address SA within a memory block. The flash disk according to claim 2 wherein the, logical/physical block address conversion table (5A) stores logical block addresses and physical block addresses in one-to-one correspondence. The flash disk according to claim 6 wherein the logical/physical block address conversion table (5A) is stored in a second electrically rewritable nonvolatile flash memory. The flash disk according to claim 7 wherein said second electrically rewritable nonvolatile flash memory comprises a portion of said main electrically rewritable nonvolatile flash memory (6). The flash disk according to claim 7 wherein said second electrically rewritable nonvolatile flash memory is separate from said main electrically rewritable nonvolatile flash memory. The flash disk according to claim 7 wherein each memory block has a block ID area for storing the logical block address of the memory block and at least one sector. The flash disk according to claim 10 wherein each sector has a sector ID area for storing an invalid sector flag, a sector use flag, and the sector address, and a sector data area for storing data. The flash disk according to claim 11 wherein each sector ID area is contiguous to a sector data area in a memory block. The flash disk according to claim 11 wherein all sector ID areas in a memory block are arranged together, sequentially, in a memory block. The flash disk according to claim 11 wherein all sector data areas in a memory block are arranged together, sequentially, in a memory block. The flash disk according to claim 10 wherein the block ID area further stores an erasing characteristic. The flash disk according to claim 15 wherein the erasing characteristic is erasure cycles of the memory block. The flash disk according to claim 15 wherein the erasing characteristic is erasure time of the memory block. The flash disk according to claim 15 wherein the erasing characteristic is pulses required for erasure of the memory block. A flash disk according to claim 1, adapted for use with conventional memory access signals designating a memory address of a hard disk memory in terms of a cylinder number, a head number, and a sector number of the hard disk memory, each sector having a fixed memory capacity.

Inventors: SHINOHARA TAKAYUKI, SHINOHARA, TAKAYUKI, Shinohara, Takayuki, Mitsubishi Denki Kabushiki K.
Applicants: MITSUBISHI ELECTRIC CORP, MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1995
Main classification: G06F3
IPC codes: G06F3, G06K19, G06F12