Thermal imaging device

Abstract: A mesa-type structure (52) is formed from polyimide (or a similar polymer material) to achieve a supporting structure for mounting a focal plane array (30 and 130) on an integrated circuit substrate (70 and 170). In an exemplary thermal imaging system (20 and 120), a thermal isolation structure (50 and 150) is disposed on an integrated circuit substrate (70 and 170) for electrically connecting and mechanically bonding a corresponding focal plane array (30 and 130) of thermal sensors (40 and 140). Each mesa-type structure (52 and 152) initially includes a polyimide mesa (54) over which is formed a reinforcing layer (56 and 156) and a metal conductor (58, 158 and 168) that extends from the top of the mesa-type structure (52 and 152) to an adjacent contact pad (72, 172 and 174). After the focal plane array (30 and 130) is bonded to the corresponding array of mesa-type structures (52 and 152), the polyimide mesas (54) are removed to create void spaces (60 and 160). The resulting mesa-type structures (52 and 152) provide a thermally isolated, but electrically conductive path between the sensor signal electrode (44 and 144) of each thermal sensor (40 and 140) and the corresponding contact pad (72 and 172) on the integrated circuit substrate (70 and 170).

Description: TECHNICAL FIELD OF THE INVENTION This invention relates to a thermal isolation structure for hybrid solid state systems, and more particularly to thermal (infrared) imaging systems and methods of fabrication. BACKGROUND OF THE INVENTION One common application for thermal sensors is in thermal (infrared) imaging devices such as night vision equipment. One such class of thermal imaging devices includes a focal plane array of infrared detector elements or thermal sensors coupled to an integrated circuit substrate with a corresponding array of contact pads between the focal plane array and the integrated circuit substrate. The thermal sensors define the respective picture elements (or pixels) of the resulting thermal image. One type of thermal sensor includes a ferroelectric or pyroelectric element formed from ferroelectric material that exhibits a state of electrical polarization dependent upon temperature changes in response to thermal radiation. An infrared absorber and common electrode are disposed on one side of the ferroelectric elements. A sensor signal electrode is disposed on the opposite side of each ferroelectric element. The infrared absorber and common electrode typically extend across the surface of the focal plane array and are attached to each of the ferroelectric elements. Each ferroelectric element typically has its own separate sensor signal electrode. Each infrared detector element or thermal sensor is defined, in part, by the infrared absorber and common electrode and the respective sensor signal electrode, which constitute capacitive plates, and the ferroelectric element, which constitutes a dielectric or insulator disposed between the capacitive plates. To maximize thermal response and enhance thermal image accuracy, each ferroelectric element of the focal plane array is preferably isolated thermally from the integrated circuit substrate to ensure that the sensor signal associated with each thermal sensor accurately represents incident infrared radiation. Thermal isolation structures are typically disposed between the focal plane array and the integrated circuit substrate to provide both mechanical bonding and a sensor signal flow path while minimizing thermal diffusion from the respective thermal sensor to the integrated circuit substrate. Several approaches have been used to provide a thermal isolation structure between an array of thermal sensors and an underlying integrated circuit substrate. One approach is disclosed in United States Patent No. 4,663,529 entitled Thermal Imaging Device and a Method of Manufacturing a Thermal Imaging Device to Jenner, et al., in which a square grid of channels form a corresponding grid of pillars that define thermal sensor elements. Each pillar or sensor includes a central bore that is coated with a conductive layer. The conductive bores are dimensioned to be less in diameter than corresponding electrode bumps disposed on an integrated circuit substrate, such that when the focal plane array of pillars is disposed over an integrated circuit substrate with a corresponding array of electrode bumps, the conductive bore of each thermal sensor rests on, and is electrically connected to, a corresponding electrode bump. A disadvantage of this architecture is that mating the array of conductive-bore pillars with the corresponding electrode bump array requires close tolerances and exact alignment. Another disadvantage of this architecture is that photoresist is used as the structural material for the pillars, which are therefore structurally fragile and susceptible to damage by solvents. Another approach is disclosed in United States Patent No. 4,143,269 entitled Ferroelectric Imaging System to McCormack, et al., assigned to Texas Instruments Incorporated, the assignee of this invention, which includes a thermal isolation structure for a thermal sensor array having conductive vias formed in a thermal isolation layer (polyimide) that covers an integrated circuit substrate. In this architecture, vias are formed in the thermal isolation layer, exposing contact pads on the integrated circuit substrate. The sensor signal electrode for a thermal sensor is brought into contact with a corresponding conductive via, providing an electrical connection to the associated contact pad. A disadvantage of this architecture is that so much polyimide is present that total thermal resistance is relatively low. In addition, this architecture requires a relatively large number of process steps, thereby increasing costs. A further approach to providing a thermal isolation structure having thermal isolation mesas formed from polyimide is shown in United States Patent No. 5,047,644 entitled Polyimide Thermal Isolation Mesa for a Thermal Imaging System to Meissner, et al., assigned to Texas Instruments Incorporation, the assignee of this invention. In this approach, individual mesas formed from polyimide (or a similar polymer material) are disposed on an integrated circuit substrate in order to achieve a high thermal resistance. A metal conductor extends from over the top of each mesa down a mesa sidewall to an adjacent integrated circuit contact pad. The focal plane array is bonded to the corresponding array of thermal isolation measas, and a thermally isolate, but electrically conductive, path is thus provided between the integrated circuit substrate and each thermal sensor. An infrared detector in accordance with the present invention is defined in the appended claims. The present invention allows the fabricating of thermal (infrared) imaging systems having a focal plane array mechanically and electrically coupled to an associated integrated circuit substrate with enhanced thermal isolation by providing an array of mesa-type structures with thermally isolating void spaces formed between the focal plane array and the integrated circuit substrate. The present invention improves thermal isolation providing a relatively robust mesa-type structure for use during bonding of the component structure and providing thermally insulating void spaces in the mesa-type structure following the bonding operations. The mesa-type structure may be formed on and project from one of the component structures of the hybrid system. Improved thermal isolation is provided by a bonding and sensor signal interface having selected void spaces between each thermal sensor and an underlying integrated circuit substrate. Enhanced thermal isolation allows a reduction of the thickness of the ferroelectric element associated with each thermal sensor while maintaining a relatively high temperature change within the ferroelectric element in response to incident infrared radiation. For some applications, the thickness of the thermal isolation structure may also be reduced while maintaining the desired amount of thermal isolation between the thermal sensors and the integrated circuit substrate. The thermal isolation structure of an infrared detector incorporating the present invention allows an improvement of the signal-to-noise ratio associated with each thermal sensor and improvement of the overall net performance of the thermal imaging system, while at the same time, reducing the thickness of the ferroelectric element associated with each thermal sensor. The thermal isolation structure of an embodiment of the present invention may be fabricated in relatively few process steps. In one aspect of the present invention. Preferably, an array of mesa-type structures, each formed from selected polymer material, initially project from the integrated circuit substrate surface adjacent to the array of contact pads, and each mesa-type structure includes a mesa conductor for providing a signal path from the top of each mesa to the associated contact pad. The focal plane array may be disposed over the integrated circuit substrate in contact with the respective mesa-type structures such that, for each thermal sensor, the sensor signal output is coupled through a respective mesa conductor to the associated contact pad. After bonding the thermal sensors with their respective mesa-type structure, portions of the mesa-type structure may be removed by chemical etching to provide the desired void spaces for enhanced thermal isolation. Preferably, the thermal isolation mesa-type structure for a thermal imaging system is initially formed from a polyimide material with a silicon dioxide shell. Alternative configurations may include a polyimide mesa structure formed with sloped sidewalls or vertical sidewalls adjacent a respective contact pad of a circuit substrate, and a mesa-to-substrate signal path provided by a mesa-strip conductor formed over the top of the mesa and down one sidewall, extending over the adjacent integrated circuit contact pad. For any of these configurations, the polyimide portion of the mesa-type structure may be removed by etching techniques to produce void spaces with high resistance to thermal energy transfer after the thermal sensors have been mechanically and electrically bonded with the integrated circuit substrate. The focal plane array is preferably coupled to the circuit substrate by bump-bonding, with a bump-bonding conductive material (such as a bump-bonding metal) being provided on the top of each mesa-type structure and/or on each sensor signal electrode. A plurality of openings may be provided through the infrared absorber and common electrode for use in selective etching techniques to form the desired void spaces in the mesa-type structure. The polyimide portion of the mesa structure may be fabricated using photolithography techniques and either photosensitive or non-photosensitive polyimide. One fabrication method is to use photosensitive polyimide, forming the mesa structures by patterning a layer of polyimide on photoresist, and then developing the polyimide to remove the unexposed portions, leaving the polyimide portion of the mesa structure with the desired configuration and array. After curing, a thin layer of suitable material such as silicon dioxide may be formed on the exterior of the polyimide mesa using standard photolithography techniques. The mesa conductors may then be formed in conventional metal deposition procedures on the exterior of the silicon dioxide layer. After the bonding operation has been completed between the focal plane array and the integrated circuit substrate, the remaining polyimide portion of the mesa-type structure may be removed by using selected etching techniques. Other important technical advantages of the mesatype structures formed by a preferred method of the present invention include initially forming the mesa-type structures from a polyimide (or other polymer) material to provide mechanical support during the bonding process. The polyimide material is preferably resistant to solvents. The use of thermal isolation mesa-type structures allows flexibility in designing mesa and signal path configurations. BRIEF DESCRIPTION OF THE DRAWINGS For a more complete understanding of the present invention, and for further features and advantages, reference is now made to the following description, taken in conjunction with the accompanying drawings, in which: FIGURE 1 is a schematic representation of a thermal circuit associated with a thermal imaging system including a focal plane array of thermal sensors formed from ferroelectric elements, an integrated circuit substrate and a thermal isolation structure disposed therebetween; FIGURE 2 is an isometric drawing with portions broken away showing a thermal isolation structure having a mesa with sloped sidewalls and a mesa strip conductor for electrically connecting the top of the mesa to an associated contact pad on an integrated circuit substrate; FIGURE 3 is a drawing in section with portions broken away taken along line 3-3 of FIGURE 2; FIGURE 4 is an isometric drawing in elevation with portions broken away showing portions of a thermal imaging system having a focal plane array formed from a plurality of thermal sensors with ferroelectric elements and an integrated circuit substrate with the mesa-type thermal isolation structure of FIGURES 2 and 3; FIGURE 5 is an isometric drawing with portions broken away showing the thermal imaging system of FIGURE 4 after portions of the mesa-type thermal isolation structure have been removed by etching techniques to form selected void spaces; FIGURE 6 is a drawing in section with portions broken away showing a thermal imaging system having a focal plane array and a mesa-type thermal isolation structure and constituting an alternative embodiment of the present invention; and FIGURE 7 is an isometric drawing with portions broken away showing the thermal imaging system of FIGURE 6. DETAILED DESCRIPTION OF THE INVENTION The preferred embodiments of the present invention and its advantages are best understood by referring to FIGURES 1-7 of the drawings, like numerals being used for like and corresponding parts of the various drawings. Infrared detectors or thermal imaging systems are typically based upon either the generation of a change in voltage due to a change in temperature resulting from incident infrared radiation striking a thermal sensor or the generation of a change in voltage due to a photon-electron interaction within the material used to form the thermal sensor. This latter effect is sometimes called the internal photoelectric effect. Thermal imaging systems 20 and 120, which will be described later in more detail, function based upon the generation of a change in voltage due to a change in temperature of ferroelectric material resulting from the incident infrared radiation. One embodiment of the present invention is shown in connection with infrared detector or thermal imaging system 20. Some of the principal components or structures which comprise thermal imaging system 20 include focal plane array 30, thermal isolation structure 50, and integrated circuit substrate 70. Focal plane array 30 comprises a plurality of thermal sensors 40. The quantity and configuration of thermal sensors 40 depend upon the desired N X M focal plane array. The various components of thermal imaging system 20 are preferably contained in a housing (not shown) in a vacuum environment. Void spaces 60 provided by thermal isolation structure 50 are particularly effective with respect to providing thermal isolation in a vacuum environment. Thermal isolation structure 50 is used to provide mechanical support during bonding of focal plane array 30 with integrated circuit substrate 70, to thermally insulate focal plane array 30 from integrated circuit substrate 70 and to provide a sensor signal interface between thermal sensors 40 in focal plane array 30 and integrated circuit substrate 70. The sensor signal interface allows integrated circuit substrate 70 to process thermal images based on incident infrared radiation detected by focal plane array 30. Thermal isolation structure 50 of the present invention may be readily adaptable to an hybrid solid state system which will benefit from enhanced thermal isolation. Various types of semiconductor materials and integrated circuit substrates may be satisfactory used with the present invention. United States Patent No. 4,143,269 entitled Ferroelectric Imaging System provides information concerning infrared detectors fabricated from ferroelectric materials and a silicon switching matrix or integrated circuit substrate. Thermal imaging system 20, as shown in FIGURES 1 through 5, will produce a thermal image in response to incident infrared radiation striking focal plane array 30. The principal components of focal plane array 30 include infrared absorber and common electrode assembly 32 and a plurality of thermal sensors 40. Each thermal sensor 40 further comprises ferroelectric element 42 and sensor signal electrode 44 associated with each ferroelectric element 42. One side of each ferroelectric element 42 is attached to infrared absorber and common electrode assembly 32. Each sensor signal electrode 44 is attached to the opposite side of its associated ferroelectric element 44. Incident infrared radiation will produce a temperature change in ferroelectric elements 42 which changes the electrical polarization of the respective ferroelectric elements 42. The representative thermal image signal appearing on each sensor signal electrode 44 will depend upon the polarization and capacitance of the associated ferroelectric element 42, which in turn is a function of the incident infrared radiation. The thermal image signal from each thermal sensor 40 in the focal plane array 30 is individually coupled to integrated circuit substrate 70 through respective mesa-type structures 52 provided by thermal isolation structure 50. Each thermal sensor 40 is preferably electrically connected through its associated mesa-type structure 52 to a corresponding contact pad 72 on integrated circuit substrate 70. The thermal isolation structure associated with hybrid solid state systems often comprises two elements - - an electrical signal conductor element and a thermal isolation element. This general configuration for a thermal isolation structure can be represented by a thermal circuit with two parallel thermal current paths, one through the low-thermal-resistivity electrical signal conductor and one through the high-thermal-resistivity thermal isolation element. One of the design goals is to minimize total thermal current flow to maximize the thermal response of the respective ferroelectric element 42 of each thermal sensor 40. As shown in FIGURE 1, thermal isolation structure 50 is represented as thermal circuit 51 connected between sensor signal electrode 44, and the associated contact pad 72. A thermal current i T flows through thermal circuit 51 corresponding to thermal isolation structure 50, in two parallel thermal current paths -- a conductor component i C flows through a mesa strip conductor 58 having thermal resistance 59, and a mesa component i M which flows through mesa shell 56 and void space 60 represented by thermal resistance 57. Mesa shell 56 may sometimes be referred to as thin shell 56 or reinforcing film layer 56. The design goal is to maximize the total thermal resistance presented by thermal isolation structure 50, thereby minimizing the total thermal current i T = i C + i M . The thermal current through a material depends upon the thermal conductivity of the material and the volume of material (thermal capacitance). For mesa-type structure 52, mesa shell 56 and void space 60 exhibit very low thermal conductivity (i.e., very high thermal resistivity). The size of each mesa-type structure 52 will be dictated primarily by structural and thermal capacitance considerations, so that the thermal-current mesa component i M through each mesa-type structure 52 will typically be dictated primarily by structural requirements that determine the minimum allowable size of each mesa-type structure 52. Mesa strip conductor 58 which provides the sensor signal flow path will inevitably exhibit a relatively low thermal resistivity, and therefore a relatively high thermal conductivity. Accordingly, to increase the total thermal resistance provided by mesa strip conductor 58 and to minimize the corresponding thermal current conductor component i c , mesa strip conductor 58 should be configured with as small a cross sectional area to length ratio as possible. The recommended design approach is to first specify structural, sensor signal flow path and thermal isolation requirements for thermal isolation structure 50, which will determine its total area and volume. Next the configuration for mesa-type structures 52 is selected and the associated thermal resistance established along with the corresponding thermal-current mesa component i m . Once this thermal current component is established, a configuration for mesa strip conductor 58 and mesa shell 56 may be selected to achieve an overall thermal resistance that meets the thermal isolation requirements for thermal imaging system 20. Design selection is typically a reiterative process during which the configuration of mesa shell 56, void space 60 and mesa trip conductor 58 are varied to produce the desired structural integrity, sensor signal flow path, and thermal isolation. The presence of void spaces 60 often allows a reduction of the overall thickness of thermal isolation structure 50 as compared to a thermal isolation structure having solid mesas without voids 60. Also, thermal isolation structure 50 allows a reduction of the thickness of ferroelectric elements 42 which reduces manufacturing costs, while at the same time maintaining or improving the signal to noise ratio, and reducing MTF losses associated with the resulting thermal sensor. As shown in FIGURE 4, thermal imaging system 20 includes focal plane array 30 of individual thermal sensors or infrared detector elements 40, together with an integrated circuit substrate 70 that includes a corresponding array of signal contact pads 72. Thermal isolation structure 50 comprises an array of mesa-type structures 52, formed on integrated circuit substrate 70 adjacent to respective contact pads 72. Thermal isolation structure 50 provides mechanical support during bonding of focal plane array 30 with integrated circuit substrate 70, sensor signal connection between each thermal sensor 40 and its associated contact pad 72 and thermal isolation between focal plane array 30 and integrated circuit substrate 70. Each thermal sensor 40 includes a ferroelectric element 42 formed from a suitable ferroelectric material, such as BST (barium-strontium-titanate). Infrared absorber and common electrode assembly 32 and sensor signal electrode 44 are disposed on opposing surfaces of ferroelectric element 42. Infrared absorber and common electrode assembly 32 comprises a layer of infrared absorber or optical coating 34 formed from infrared absorber material, and a metal electrode or reflective plate 36. Metal electrode 36 performs several important functions including supplying voltage to one side of each ferroelectric element 42 and reflecting incident infrared radiation to increase the interaction with optical coating 34. Metallic bump-bonding material for providing a bump-bond 64 to an associated mesa-type structure 52 is preferably attached to each sensor signal electrode 44. For each thermal sensor 40, ferroelectric element 42, infrared absorber and common electrode assembly 32 and the respective sensor signal electrode 44 define a ferroelectric transducer. That is, the metal electrode 36 of the infrared absorber and common electrode assembly 32 and the respective sensor signal electrodes 44 constitute capacitor plates, while the ferroelectric material 42 constitutes a dielectric. The resulting capacitors are temperature-dependent, implementing a ferroelectric (or pyroelectric) transducer function. For each thermal sensor 40, thermal (infrared) radiation incident to focal plane array 30 is absorbed by the infrared absorber 34 and transmits heat through metal electrode 36 into the adjacent ferroelectric element 42. The resulting temperature change in ferroelectric element 42 causes a change in the state of electrical polarization and a change in capacitance. The corresponding sensor signal output available from the sensor signal electrode 44 depends upon the temperature-dependent polarization and capacitance of the respective ferroelectric transducer (i.e., thermal sensor 40). The integrated circuit substrate 70 comprises a conventional switching matrix and associated series of amplifiers. Integrated circuit substrate 70 is bonded to focal plane array 30, with each contact pad 72 being electrically connected to the associated sensor signal electrode 44 of a corresponding thermal sensor 40. Thermal isolation structure 50 prevents the integrated circuit substrate 70 from acting as a heat sink for the thermal energy stored in ferroelectric elements 42 of thermal sensors 40 and adversely affecting the associated sensor signal accuracy. Each polyimide mesa 54 is formed adjacent an associated contact pad 72. Mesa strip conductor 58 provides a signal path between the top of each mesa-type structure 52 and the adjacent contact pad 72. Recommended materials for the mesa strip conductors 58 include titanium and tungsten alloys because of their relatively low thermal conductivity and ease of application. Bump-bonding metal 62 is preferably formed on the top of each mesa-type structure 52, i.e., over the top portion of the mesa strip conductor 58 as shown in Figs 2 and 3. Bump-bonding metal 62 is selected to be compatible with bump-bonding metal (not shown) on the sensor signal electrode 44. Conventional bump-bonding procedures may be used to provide a good conductive bump bond 64 between the signal sensor electrode 44 of each thermal sensor element 40, and mesa strip conductor 58 of the corresponding mesa-type structure 52, resulting in good sensor signal connections between each thermal sensor 40 and the associated contact pad 72. Indium bump bonding techniques have been satisfactorily used to form a metal bump bond 64 between focal plane array 30 and thermal isolation structure 50. The configurations of the polyimide mesa 54 and the associated mesa strip conductor 58 are design choices, largely dependent upon thermal isolation and structural rigidity considerations. Alternative configurations for mesa 54 include a mesa with sloping sidewalls (described below), and a mesa with vertical sidewalls. For sloped-sidewall mesa 54, a mesa strip configuration for the conductor 58 is recommended, while for a vertical-sidewall mesa, a mesa-contour configuration as shown in United States Patent No. 5,047,644 may be more appropriate. These configurations are exemplary only, and other configurations for both the mesa-type structure 52 and the mesa strip conductor 58 will be apparent to those skilled in the art. In particular, while mesa-type structure 52 is shown as symmetrical in horizontal and vertical cross section, such symmetry is not required. The thermal isolation structure 50 of the present invention is readily adaptable to thermal imaging systems in general to provide a thermally insulating bonding and sensor signal interface between a focal plane array of thermal sensors and the associated integrated circuit substrate. Moreover, mesa-type structure 52 of the present invention has general applicability for various hybrid solid state systems. FIGURES 2 and 3 show enlarged elevation and section views of mesa-type structure 52 which provides a portion of thermal isolation structure 50 in accordance with the present invention. The mesa-type structures 52 of the present invention, including the exemplary thermal isolation structure 50 for thermal imaging system 20, are fabricated using conventional photolithographic techniques. Fabrication methods using photosensitive polyimide are described. However, for some applications, non-photosensitive polyimide may be used. Fabrication using photosensitive polyimide is recommended, because it generally requires fewer process steps. The first step is to apply the polyimide (photosensitive or non-photosensitive) to integrated circuit substrate 70 by spinning substrate 70 to flow the polyimide over the substrate to a uniform thickness. For the recommended fabrication method using photosensitive polyimide, the polyimide is then exposed using a mask that patterns the polyimide layer. The exposed polyimide is developed using an appropriate solvent to remove the non-exposed polyimide, leaving the patterned array of polyimide mesas 54 (each adjacent to a respective contact pad 72 on integrated circuit substrate 70). The desired sidewall configuration may be determined by appropriate exposure and development techniques. The assembly is then cured in an appropriate heat-curing process to stabilize and harden the desired array of polyimide mesas 54. Mesas 54 may be formed from other suitable materials in addition to polyimide. Using conventional photolithography techniques, a layer of silicon dioxide or other suitable material may be placed over mesas 54. The silicon dioxide layer is then removed using conventional organic etch chemistry to provide a thin shell 56 of silicon dioxide material having a thickness of 1000 to 2000Å extending over at least a portion of each polyimide mesa 54. The principal function of shell 56 is to provide reinforcement for the associated mesa strip conductor 58 so that the physical dimension of the mesa strip conductor may be minimized to reduce the associated thermal current (i c ). See FIGURE 1. Various configurations of polyimide mesa 54 and thin shell 56 may be used in addition to the configuration shown in FIGURES 2-5. Once the array of polyimide mesas 54 and associated thin shells 56 has been defined, the selected mesa strip conductors 58 are formed using conventional photolithography techniques on the exterior of each shell 56. Mesa strip conductors 58 may be formed by either an etch process or a lift process using patterned photoresist. Mesa strip conductors 58 are formed on the exterior of each shell 56 to extend from the top of the respective mesa-type structure 52 to the adjacent contact pad 72. Additional fabrication steps may be employed to deposit bump-bond metals 62 or conductive epoxies (not shown) to the top of a mesa-type structure 52 as desired. These additional fabrication steps are accomplished conventionally, with conventional materials the selection of which depends upon the specific application for thermal isolation structure 50 of the present invention. The thickness of the metal layers used to form the mesa strip conductors 58 is selected to provide conductors of a predetermined thickness corresponding to the conductor configuration selected and to achieve a selected conductor thermal resistance, as previously described. Infrared absorber and common electrode assembly 32 is preferably formed with a plurality of openings or elongated slots 38 extending through both infrared absorber layer 34 and reflective plate 36. For the embodiment of the present invention shown in FIGURES 4 and 5, openings 38 are sometimes referred to as "etch access ports." Focal plane array 30 may be bonded to integrated circuit substrate 70 by using bump bonding or other conventional techniques to mount focal plane array 30 on thermal isolation structure 50. During this bonding process, polyimide mesas 54 provides the necessary mechanical support for the selected bonding process as shown in FIGURE 4. Following the bonding of focal plane array 30 with integrated circuit substrate 70, various techniques may be used to remove polyimide mesas 54 and to create void space 60 within each thin shell 56. Openings 38 in infrared absorber and common electrode assembly 32 allow various isotropical etches to remove polyimide mesas 54 and form the resulting void spaces 60. For some applications, plasma etching may be the preferred technique to remove polyimide mesa 54. For other applications, various wet etching techniques may be satisfactorily used. Other photolithographic techniques may be selected to form void spaces 60 depending upon the type of material used to form mesas 54. The removal of polyimide mesas 54 to create voids 60 greatly increases the thermal resistance of mesa-type structure 52 and reduces the associated thermal current i M . See FIGURE 1. The precise structural configuration, and associated fabrication method, of mesa-type structures 52 in accordance with this invention are significantly dependent upon the application chosen for the resulting thermal isolation structure 50. Even within a particular application, such as the exemplary thermal imaging systems 20 and 120, numerous design choices will be routinely implemented by those skilled in the art. FIGURES 6 and 7 illustrate an alternative embodiment of the present invention in which thermal imaging system 120 comprises focal plane array 130, thermal isolation structure 150 and integrated circuit substrate 170. As previously noted for thermal imaging system 20, the various components of thermal imaging system 120 are preferably operated in a vacuum environment. Focal plane array 130 comprises a plurality of thermal sensors 140. Infrared absorber and common electrode assembly 32 of thermal imaging system 20 has been replaced by a plurality of individual, discrete infrared absorber and reflective plate assemblies 132. By forming focal plane array 130 with discrete infrared absorber and reflective plate assemblies 132, thermal conduction between adjacent thermal sensors 140 is further reduced which improves MTF for thermal imaging system 120. Thermal isolation structure 150 has been modified to provide two electrical contacts 158 and 168 to each thermal sensor 140. Each infrared absorber and reflective plate assembly 132 comprises a layer of optical coating 134 and a reflective plate 136. A plurality of slots 138 are formed around the exterior of each infrared absorber and reflective plate assembly 132 to separate each assembly 132 from adjacent assemblies 132. Since infrared absorber and reflective plate assemblies 132 are not connected with each other, bias voltage (V B ) cannot be applied to each ferroelectric element 142 through common electrode 36 as used in thermal imaging system 20. For the embodiment of the present invention shown in thermal imaging system 120, plate 136 is provided to support optical coating layer 134 and to reflect incident infrared radiation to increase the interaction with optical coating 134. Plate 136 is not used to provide bias voltage (V B ) to the ferroelectric transducer representated by ferroelectric element 142. The ferroelectric transducer or capacitor associated with each thermal temperature sensor 140 is defined in part by bias voltage electrode 145, ferroelectric element 142 and signal sensor electrode 144. Bias voltage electrode 145 and signal sensor electrode 144 are disposed on the same side of ferroelectric element 142 but separated from each other. Therefore, ferroelectric element 142 functions as a dielectric with respect to electrodes 144 and 145. Integrated circuit substrate 70 provides two electrical contact pads 172 and 174. A pair of mesa strip conductors 158 and 168 are provided on each mesa-type structure 152. Mesa strip conductor 168 provides bias voltage (V B ) from contact 174 to allow ferroelectric element 142 and electrodes 144 and 145 to function as a capacitor. Thermal isolation structure 150 with mesa-type structures 152 and void spaces 160 are formed in a manner similar to thermal isolation structure 50. Slots 138 provide access to mesa-types structures 152 to allow forming void spaces 160 using the desired photolithographic techniques. One of the principal differences includes the use of second mesa strip conductor 168 to provide bias voltage to electrode 145 and bump bonding metal 147 on electrode 145 joined with bump bonding metal 172 on the top of mesa-type structure 152. Although the present invention has been described with respect to a specific, preferred embodiment, various changes and modifications may be suggested to one skilled in the art, and it is intended that the present invention encompass such changes and modifications as fall within the scope of the appended claims.

Claims: An infrared detector (20,120) including a focal plane array (30,130) and an integrated circuit substrate (70, 170), comprising: a plurality of thermal sensors (40,140) for providing a sensor signal output representative of the amount of thermal radiation incident to the focal plane array; and an array of signal contact pads (72,172,174), disposed on the integrated circuit substrate, for receiving the sensor signal output from the respective thermal sensors; characterised in that a thermal isolation structure is formed by a plurality of mesa-type structures (52,152) each having a void space (60,160) and the mesa-type structures project from the integrated circuit substrate adjacent to each signal contact pad for mounting the focal plane array on the integrated circuit substrate. The detector of Claim 1 and including a plurality of openings (38) extending through the focal plane array. The detector of Claim 2 wherein the focal plane array (30) includes an infrared absorber and common electrode assembly (34,36), and the plurality of openings (38) extend through the infrared absorber and common electrode assembly (34,36) intermediate the thermal sensors (140). The detector of Claim 3, wherein the infrared absorber and common electrode assembly comprises a layer of optical coating (34) sensitive to infrared radiation disposed on a layer of reflective material (36); each thermal sensor (40) has a ferroelectric element (42) with the common electrode (36) coupled with one side of each ferroelectric element and a signal sensor electrode (44) coupled with the opposite side of the respective ferroelectric element; and the plurality of openings (38) extend through the layer of optical coating (34) and the layer of reflective material (36) intermediate the ferroelectric element of each thermal sensor. The detector of any preceding Claim, wherein, each mesa-type structure further comprises: a layer of reinforcing film (56) for partially defining the void space associated with each mesa-type structure; and a mesa strip conductor (58) disposed on a portion of the exterior of the layer of reinforcing film. The detector of Claim 1 wherein the plurality of thermal sensors comprises: a plurality of ferroelectric thermal sensors (140) each having a ferroelectric element (142) coupled to a respective infrared absorber and reflective plate assembly (132) disposed on one side of the respective ferrorelectric element and a sensor signal electrode (144) disposed on the opposite side of the ferroelectric element; and each infrared absorber and reflective plate assembly (132) is separate from adjacent infrared absorber and reflective plate assemblies (132). The detector of Claim 6, wherein each thermal sensor further comprises: a bias voltage electrode (145) coupled with the said opposite side of the ferroelectric element and spaced from the sensor signal electrode (144). A method of fabricating a thermal imaging system having a focal plane array mounted on an integrated circuit substrate with a thermal isolation structure disposed therebetween, comprising the steps of: forming the focal plane array from a plurality of thermal sensors which provide a sensor signal output representative of thermal radiation incident to the focal plane array; providing an integrated circuit substrate with an array of signal contact pads for receiving the sensor signal output from the respective thermal sensors; forming a plurality of mesa-type structures projecting from the integrated circuit substrate adjacent to each signal contact pad to provide a portion of the thermal isolation structure; mounting the focal plane array on the thermal isolation structure; and forming a void space in each mesa-type structure. The method of fabricating the system as defined in Claim 8, further comprising the step of forming a plurality of longitudinal openings extending through the focal plane array intermediate the respective thermal sensors. The method of fabricating the system as defined in claim 8 or Claim 9, further comprising the steps of: forming the mesa-type structures in part with polyimide material; mounting the focal plane array on the mesa-type structures; and removing the polyimide material within each mesa-type structure to form the void space. The method of fabricating the system as defined in any of Claims 8 to 10, further comprising the steps of: forming a layer of reinforcing material as part of each mesa-type structure; forming a mesa-strip conductor on the exterior of the each layer of reinforcing material; and placing bump bonding material on a portion of each mesa-strip conductor at the top of each mesa-type structure for forming a sensor signal flowpath with the respective thermal sensor. The method of fabricating the system as defined in Claim 11, further comprising the step of: placing corresponding bump bonding material on each thermal sensor. The method of fabricating the system as defined in any of Claims 8 to 12, further comprising the steps of: forming the focal plane array with an infrared absorber and common electrode assembly; coupling one side of a ferroelectric element associated with each thermal sensor to the infrared absorber and common electrode assembly; and forming a plurality of longitudinal openings in the infrared absorber and common electrode assembly intermediate the ferroelectric elements. The method of fabricating the system as defined in any of claims 8 to 12, further comprising the steps of: forming each thermal sensor with a ferroelectric element; forming the focal place array with an infrared absorber and reflective plate assembly; coupling one side of each ferroelectric element to the infrared absorber and reflective plate assembly; forming a plurality of longitudinal slots in the infrared absorber and reflective plate assembly intermediate the ferroelectric elements to provide a separate infrared absorber and reflective plate assembly associated with each thermal sensor; and using the longitudinal slots to provide access to the mesa-type structures to form the respective void spaces using photolithographic techniques.

Inventors: HANSON CHARLES M, OWEN ROBERT A, HANSON, CHARLES M, OWEN, ROBERT A., HANSON, CHARLES M. C/O TEXAS INSTRUMENTS INC., OWEN, ROBERT A., C/O TEXAS INSTRUMENTS INC.
Applicants: RAYTHEON TI SYST INC, RAYTHEON TI SYSTEMS, INC.
Application year: 1995
Main classification: H01L37
IPC codes: G01J5, H01L27, G01J1