Laser range finder power management system

Abstract: A power management system for a laser range finder including a microcontroller (13) which controls the supply of power by a series of linear regulators (71, 73, 75, 79) to analog electronics (24) and digital electronics (25) such that the respective electronics units (24, 25) are powered only during intervals when they require power during operation of the laser range finder. The linear regulators (71, 73, 75, 79) and a laser firing pulse generator circuit (67) are powered by simplified DC/DC converter circuitry (56, 61) which is, in turn, supplied with power by a solid state front end circuit subject to control by the microcontroller (13) and which includes first, second, and third transistors (Q 1 , Q 2 , Q 3 ) providing reverse voltage protection, overvoltage protection, and reduced power consumption.

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The subject invention relates to laser systems and, more particularly, to an improved power management system for laser range finders. 2. Description of Related Art Laser range finders are evolving into robust, modular, very small, low-cost devices. Cost is of primary importance and is affected by many factors. Not only is the electronics cost important, but the amount of power required directly affects the size and cost of the batteries, as well as the size of printed wiring boards. Conventional technology for powering laser range finders employs multiple DC/DC converters and preregulators that are operating at all times. For reverse voltage protection, conventional systems use large, unreliable mechanical relays or inefficient series diodes for reverse voltage protection. Overvoltage protection is typically accomplished by large, expensive overdesigning. In conventional range finder systems, the entire apparatus is typically powered, even though some components may not need power 99.9% of the time. OBJECTS AND SUMMARY OF THE INVENTION It is therefore an object of the invention to improve laser range finder systems; It is another object of the invention to improve apparatus for powering laser range finders; It is another object of the invention to reduce the size, complexity, and cost of laser range finders and, particularly, apparatus for powering them; It is another object of the invention to reduce the power consumption of laser range finders; and It is another object of the invention to improve overvoltage and reverse voltage protection circuitry for laser range finder power supplies. According to the invention, there is provided a power management apparatus in combination with a laser range finder system having digital circuitry and analog circuitry, the power management apparatus comprising: a power supply including a plurality of linear regulators, each responsive to a control signal to switch at least a first voltage to said digital circuitry and at least a second voltage to said analog circuitry, DC/DC converter circuitry for supplying power to said plurality of linear regulator circuits and a front end circuit for supplying power to said DC/DC converter circuitry, and for providing reverse and overvoltage protection to the apparatus, said front end circuit having an input line and a return line and further comprising a first diode (D 1 ) connected to said input line to prevent current flow in a selected direction and a first transistor circuit (Q 1 , C 1 , Z 1 , R 1 ) responsive to supply of a detector bias voltage (V O H S ) to turn on and short said first diode (D 1 ) and to thereafter prevent current flow in said selected direction, said front end circuit further including a second diode (D 3 ) connected to prevent current flow into said return line and a second transistor circuit (Q 2 , Z 2 , D 2 , R 2 , R 3 ) responsive to application of a voltage to said first diode (D 1 ) to turn on and short out said second diode (D 3 ), and to thereafter prevent current flow into said return line, said front end circuit further including a third transistor circuit (Q 3 , R 5 , C 2 , R 6 , Z 3 , R 7 ) connected between said input terminal and an output terminal of said front end circuit for limiting the voltage applied to said output terminal; and a programmable digital controller circuit) programmed to supply respective control signals to said linear regulators so as to supply power to said digital circuitry only when said digital circuitry requires power and so as to supply power to said analog circuitry only when said analog circuitry requires power. The major functional modules of the laser range finder comprising its analog and digital circuitry are powered only when needed, thereby eliminating considerable power consumption. Since the duty cycle of the resulting system is typically much less than 1%, most of the costly conventional DC to DC power converters can be replaced with small, low-cost linear regulators, which also can be switched on as needed. The power management architecture according to another aspect of the invention further employs active solid state circuitry at the front end of the power supply for providing overvoltage and reverse voltage protection in a power efficient manner. Thus, the preferred embodiment of the invention utilizes a low-cost power management approach for laser range finders, which not only reduces power consumption by more than an order of magnitude, but also incorporates unique solid state overvoltage protection and reverse voltage protection. The power management circuit of the preferred embodiment is a low-cost approach that allows the laser range finder to operate over very large swings in input power (5 volts to over 90 volts). This fact makes the laser range finder module very portable from system to system without regard to available power. For example, small battery operation, common 12-volt automotive battery, or military 24 volts can be used without having to change or modify the range finder electronics. The use of an active reverse voltage protection circuit eliminates over 2.5 watts of power dissipation from the system and eliminates large, costly, and unreliable relays. BRIEF DESCRIPTION OF THE DRAWINGS The objects and features of the present invention, which are believed to be novel, are set forth with particularity in the appended claims. The present invention, both as to its organization and manner of operation, together with further objects and advantages, may best be understood by reference to the following description, taken in connection with the accompanying drawings, of which. FIG. 1 is a schematic block diagram of a laser range finder power management system according to the preferred embodiment of the invention; FIG. 2 is a circuit block diagram of power supply circuitry according to the preferred embodiment; FIG. 3 is an electrical circuit diagram of front end power control circuitry according to the preferred embodiment; and FIG. 4 is a flowchart useful in illustrating the structure and operation of the power management circuitry of the preferred embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The following description is provided to enable any person skilled in the art to make and use the invention and sets forth the best modes contemplated by the inventor of carrying out his invention. Various modifications, however, will remain readily apparent to those skilled in the art, since the generic principles of the present invention have been defined herein specifically to provide a very power efficient, low-cost power management system for a laser range finder. As shown in FIG. 1, the preferred embodiment includes a microcontroller 13, which communicates over a first bus 14 with laser range finder detector and analog electronics 24 and over a second bus 15 with a laser range finder range counter and other associated digital electronics 25. The analog electronics 24 and digital electronics 25 may comprise conventional componentry of a conventional laser range finder. The microcontroller 13 may be a commercially-available component such as Part No. 87C552, as available from Philips Semiconductors, Sunnyvale, California. The microcontroller 13 interfaces via a power control bus 16 with the power supply apparatus, which includes a battery 37, an EMI filter 35, and a power supply 17. The battery 37 is connected via first and second terminals 19, 20 and an LRF ON/OFF switch 18 to the EMI filter 35, which outputs a filtered voltage over signal path 21 to the power supply unit 17. The power supply 17 provides a plurality of constant low-voltage power outputs 23, to be described in further detail below. The microcontroller 13 is actuated by a FIRE LRF switch 41, which includes a pushbutton 45 operative to close a circuit between respective first and second leads 43, 47. A reference voltage of 5 volts is supplied via a resistor 49, which is connected to the reference voltage source and to the second lead 47, which inputs to the microcontroller 13. An RS 485 system I/O 29 is connected via an I/O bus 118 to the microcontroller 13 for purposes of communicating between the microcontroller 13 and an associated fire control system. Two activating switches are illustrated in FIG. 1, the LRF ON/OFF switch 18 and the FIRE LRF switch 41. The LRF ON/OFF switch 18 turns power to the laser range finder (LRF) on and off, while the pushbutton 45 of the FIRE LRF switch 41 fires the laser range finder. The structure of the power supply 17 is illustrated in more detail in FIG. 2. The power supply circuit 17 includes an EMI filter 35, which supplies a filtered voltage to a power control circuit 51. The power control circuit 51 controls the supply of power over a bus 53 to a 10-volt DC/DC converter 55, a 7-volt DC/DC converter 61, and a PFN power supply unit 67. The 10-volt DC/DC converter 55 supplies a 10-volt DC output over an output bus 56 to a series of linear regulators 71, 73, 75, 77, and to the PFN power control unit 67. The 7-volt DC/DC booster converter 61 supplies a negative 7-volt DC output over an output bus 63 to a fifth linear regulator 79. The DC/DC converters 55, 61 are conventional boost converters chosen due to their simplicity and low cost. As known in the art, the boost converter inductor is very small and cheap. Thus, the low voltage power supply (LVPS) consists of +10-volt and -7-volt DC/DC boost converters 55, 61. The PFN power unit 67 powers a pulse forming network (PFN) including a PFN capacitor C PFN which is charged up to a voltage of, for example, 800 volts. This voltage is applied to a laser to generate optical energy and may vary from system to system, as may the value of C PFN . The 800 volts is divided down within the power unit 67 using a zener diode to generate 130 volts, which is output on a signal line 54 to the power control unit 51 and to the detector and analog electronics 24. The 130 volts particularly provides a 130-volt bias voltage for the conventional range finder detector, which converts optical signals into electrical signals, as known in the art. The PFN power unit 67 receives first and second inputs from the microcontroller 13, namely a PFN INH (inhibit) signal and a PFN DMP (dump) signal, and supplies first and second outputs, namely a flash lamp trigger bias signal (FLASH LMP TRGR BIAS) and a PFN Voltage Sense signal. The microcontroller 13 senses or samples the level of the voltage on the PFN capacitor C PFN via the Voltage Sense signal and stops the charging of that capacitor C PFN when its voltage reaches 800 volts. The microcontroller 13 can discharge the PFN capacitor C PFN via the PFN DMP signal, for example, for reset purposes when the system is turned off. The flash lamp trigger bias signal is generated to cause initial ionization in the laser prior to its firing, as known in the art. The linear regulators 71, 73, 75, 77, 79 are used to power the various analog and digital circuitry 24, 25 of the laser range finder and the microcontroller 13. The first linear regulator 71 supplies a +5-volt output on a signal line 70 for powering the digital circuitry 25 and receives an input of a control signal from the microcontroller 13 on a signal line 72. The second linear regulator 73 supplies a +5-volt output on a signal line 74 for powering the analog circuitry 24 and receives a control signal from the microcontroller 13 on a signal line 76. The third linear regulator 75 supplies a +2-voltage on a signal line 78 for powering the digital circuitry 25 and receives a control signal on a signal line 80 from the microcontroller 13. The fifth linear regulator 79 supplies a +5-volt output on signal line 85 for use by analog circuitry 24 and receives a control signal from the microcontroller 13 on a signal line 87. The microcontroller 13 thus is enabled to selectively switch power on and off to the analog and digital circuitry 24, 25 by applying appropriate on/off control signals on respective signal lines 72, 76, 80, and 87. The fourth linear regulator 77 supplies a +5-volt output on a signal line 85, which is used to power the microcontroller 13. Under full load. the microcontroller 13 uses less than 15 mA. Most of the time the microcontroller 13 is inactive or "asleep" and needs less than 5 mA. According to the preferred embodiment, conventional linear regulators 71, 73, 75, 77, 79 with integrated on/off control are used. The efficiency of the linear regulators 71, 73, 75, 77, 79 is not an issue because the system duty cycle is typically less than 1 %. Therefore, low cost and small size become more important than efficiency. FIG. 3 illustrates the front end power control circuit 51 in detail. As shown, the circuitry 51 includes first, second, and third N channel enhancement mode MOSFETs Q 1 , Q 3 , Q 2 , each having a source S, a drain D, and a gate G. An ON/OFF control signal 18 is supplied to the circuitry 51 from the operator "master ON/OFF switch. " The first transistor Q 1 has its source S connected to the 24 volts DC supplied by the EMF filter 35 at input terminal 21a. A first diode D 1 is connected across the source S and drain D of the first transistor Q 1 . D 1 is connected in parallel with the body diode of Q 1 . In applications where the currents are low, the first diode D 1 can be eliminated. Without D 1 , the circuit relies totally on the body diode of the first transistor Q 1 . The gate G of the first transistor Q 1 is connected to the first terminal of a first capacitor C 1 , whose opposite terminal is grounded. The gate G of the first transistor Q 1 is further connected to the junction 101 of a first resistor R 1 and the cathode of a first 35-volt zener diode Z 1 whose anode is grounded. The terminal of the resistor R 1 opposite the junction 101 is connected to a 130-volt supply. The drain D of the first transistor Q 1 is further connected to the anode of a second diode D 2 , whose cathode is connected to a first terminal of a second resistor R 2 . The second transistor Q 2 has its drain D connected to the return (RTN) line 21b of the 24-volt input voltage. The gate G of the second transistor Q 2 is connected to the cathode of a second zener diode Z 2 , to the second terminal of the second resistor R 2 , and to the respective first terminals of third and fourth resistors R 3 , R 4 . The source S of the second transistor Q 2 is connected to the anode of the second zener diode Z 2 and to the second terminal of the third resistor R 3 , and forms one output terminal 53b of the circuit 51. A third diode D 3 has its anode connected to the drain D of the second transistor Q 2 and its cathode connected to the source S of the second transistor Q 2 . In applications where the currents are low, the third diode D 3 can be eliminated. Without the third diode D 3 , the circuit relies totally on the body diode of the second transistor Q 2 . The third transistor Q 3 has its drain D connected to the drain D of the first transistor Q 1 and to a first terminal of a fifth resistor R 5 . The second terminal of the fifth resistor R 5 is connected to the gate G of the third transistor Q 3 and to the first terminal of a second capacitor C 2 whose second terminal is grounded. The gate G of the first transistor Q 3 is further connected to the cathode of a third zener diode Z 3 , to the first terminal of a sixth resistor R 6 and to the first terminal of a seventh resistor R 7 . The anode of the third zener diode Z 3 is grounded. The second terminals of the sixth and seventh resistors R 6 , R 7 are respectively connected to a switch SW 1 and to the 130-volt supply. The switch SW 1 has a first terminal connected to the second terminal of the fourth resistor R 4 and a second terminal connected to the second terminal of the sixth resistor R 6 , and a control terminal connected to bus 16 so as to receive the ON/OFF control signal from the operator. The source S of the third transistor Q 3 forms the output terminal 53a of the circuit 51. The front end power control circuit 51 of FIG. 3 provides reverse voltage protection, as well as overvoltage protection, via a 100% solid state circuit. The circuit 51 further provides low current ON/OFF control, provided through use of the switch SW 1 . Actuating this switch SW 1 shorts the gates G of the second and third transistors Q 2 and Q 3 to ground via resistors R 4 , R 6 , turning off the supply of voltage across the output terminals 53a, 53b of the circuit 51. The third transistor Q 3 thus enables turning the system off. Reverse voltage protection is provided by the first diode D 1 , which prevents current from flowing in the wrong direction at terminal 21a. The third transistor Q 3 also will not conduct current in the wrong direction. When the system powers up, the first transistor Q 1 is off and all current flows through the first diode D 1 . After initial power-up, the 130-volts from the PFN unit 67 is applied, which turns the first transistor Q 1 on and shorts out the first diode D 1 . The first transistor Q 1 thereafter saves power by shorting out diode D 1 . The input current is then exposed only to the small "on" resistance (.1Ω) of the first transistor Q 1 . This action improves overall efficiency by eliminating the forward voltage drop of the first diode D 1 during normal operation. The second transistor Q 2 supplies reverse voltage protection to the 24-volt return line, terminal 21b. The second transistor Q 2 is normally off so current cannot flow in at terminal 21b, but can flow out via the third diode D 3 , thereby providing a return path. When the first diode D 1 conducts, voltage is applied to the gate G of the second transistor Q 2 via the second diode D 2 and the current limiting second resistor R 2 . The second zener diode Z 2 limits the voltage which the gate G of the second transistor Q 2 will see to 35 volts. The application of voltage to the gate G of the second transistor Q 2 causes the second transistor Q 2 to come on, shorting the third diode D 3 and providing a low resistance return path. The second transistor Q 2 thus comes on more quickly than the first transistor Q 1 . The third transistor Q 3 additionally provides overvoltage protection and reverse voltage protection. The third transistor Q 3 becomes a variable resistor when the input voltage across the terminals 21a and 21b exceeds 35 volts. More specifically, when the voltage on the drain D of the third transistor Q 3 exceeds the 35-volt gate voltage dictated by the third zener diode Z 3 , the third transistor Q 3 begins to turn off, holding its source voltage to 35 volts or less. Thus, the third transistor Q 3 will drop enough voltage to prevent an overvoltage condition from occurring within the system. The first transistor Q 1 provides similar protection until it is turned off, at which point the third transistor Q 3 must drop all of the voltage other than the .7 volt dropped by the first diode D 1 . Such overvoltage protection is an important feature because it allows the circuitry to utilize lower voltage (cheaper) components such as capacitors. The overvoltage set point is achieved through the third zener diode Z 3 and, to a lesser extent, the first zener diode Z 1 , and can be set at any point. The power converters 55, 61 downstream of this circuit preferably can operate up to 40 volts. Therefore, the 35-volt zeners Z 1 , Z 2 , Z 3 offer some design margin. The third transistor Q 3 provides reverse voltage protection by preventing current from flowing in the reverse direction. The third transistor Q 3 is required for reverse voltage protection because the body diode of the first transistor Q 1 will conduct current under reverse voltage conditions. The overall operation of the power management system 11 of the preferred embodiment will now be described in further detail in conjunction with FIG. 4. As shown, the system 11 is first enabled by application of battery power, step 103, by closing the LRF ON/OFF switch 18. In response, switch SW 1 closes and charges the PFN capacitor C PFN , step 105 of FIG. 4. The range finder analog and digital electronics 24, 25 are unpowered during this time and remain so until subsequently activated by the microcontroller 13. At completion of step 105, the microcontroller 13 is in a low power "sleep" state and the system is using less than 10 mA of battery current. The microcontroller 13 can only be awakened by the FIRE LRF button 45, step 117, or an internal watchdog timer, step 111. The watchdog timer periodically wakes up the microcontroller 13 if it has been in the sleep state for an extended period of time. To do this, the watchdog timer generates an interrupt, which causes the microcontroller 13 to perform a background diagnostic and calibration routine, step 115, primarily to keep the laser range finder receiver calibrated when the range finder is not being operated. The FIRE LRF signal issues an interrupt to the microcontroller 13 and causes the microcontroller 13 to activate a laser ranging sequence, beginning with step 121 of FIG. 4. In step 121, the microcontroller 13 boots up, turns on the analog circuitry 24 via signal lines 76, 87, and initializes the system. After these operations, power is turned on to the digital range counter circuitry 25, step 123. The laser is then fired, step 125, and the return pulse detected. The microcontroller 13 delays for an interval equal to the maximum count of the range counter, step 127, and then latches the count of the range counter, step 129. The count is then output through the system I/O 29 to associated fire control circuitry, step 131. The microcontroller 13 then turns off the power to the analog circuitry 24 and the digital circuitry 25, step 133, and returns to recharge the PFN capacitor C PFN for the next firing operation before reentering the "sleep" state. The range counter which forms part of digital electronics 25 is only needed for 100 microseconds each time a laser pulse is sent. Therefore, the range counter and associated digital electronics 25 are powered separately by the linear regulators 71, 75. The objective is to activate the range counter electronics 25 only as necessary. The analog electronics 24 needs to be powered for other functions such as detector bias, threshold, offset nulling, and test purposes. These considerations require the analog electronics 24 to be powered during periods of time when the range counter electronics 25 is not needed. The microcontroller 13 is therefore programmed to track the laser range finder sequence and to activate the linear regulators 71, etc. only when their particular associated analog or digital circuitry requires power. Thus, the microcontroller 13 acts as the system state machine, sequencing power on and off to various functions as needed. The preferred embodiment just described exhibits numerous advantages. Since the system is triggered from a FIRE LRF interrupt, the system is not pulse repetition frequency (PRF) sensitive and can be slaved to an external trigger. This is important if the laser needs to fire or operate during some other benign system state. For example, the laser system generally produces large amounts of EMI. When operated with an FLIR (forward looking infrared) system, EMI can show up in the image or, worse, cause problems with scene-based nonuniformity correction (NUC) algorithms. The FLIR can send a signal to the LRF commanding the laser system to go through a ranging sequence during a line blank time or frame retrace time, thus not effecting the FLIR image. The invention further allows the commercial exploitation of high performance, battery-powered laser range finder systems utilizing off-the-shelf low-cost commercial ICs. Applications include automotive obstacle avoidance, commercial and industrial laser ranging systems, and sport applications. Sport applications may include a hunter using an integrated laser range finder and rifle scope. Power savings through implementation of the preferred embodiment is also considerable. For example, in one embodiment according to the invention, over 7.5 watts from the range counter and 5 watts from the receiver hybrid is saved, for a 1-Hz system. Those skilled in the art will appreciate that various adaptations and modifications of the just-described preferred embodiment can be configured without departing from the scope and spirit of the invention, particularly since the architecture of FIG. 1 is completely transparent to laser technology. For example, a diode pumped range finder system would not require charging a PFN capacitor. The invention can thus be applied to such a system with changes required only in some of the detailed operations of the preferred embodiment. Therefore, it is to be understood that, within the scope of the appended claims, the invention may be practiced other than as specifically described herein.

Claims: A power management apparatus in combination with a laser range finder system having digital circuitry (25) and analog circuitry (24), the power management apparatus comprising: a power supply (17) including a plurality of linear regulators (71,73,75,79), each responsive to a control signal to switch at least a first voltage to said digital circuitry (25) and at least a second voltage to said analog circuitry (24), DC/DC converter circuitry (55,61) for supplying power to said plurality of linear regulator circuits (71,73,75,79) and a front end circuit (51) for supplying power to said DC/DC converter circuitry (55,61), and for providing reverse and overvoltage protection to the apparatus, said front end circuit (5) having an input line (21a) and a return line (21b) and further comprising a first diode (D 1 ) connected to said input line (21a) to prevent current flow in a selected direction and a first transistor circuit (Q 1 , C 1 , Z 1 , R 1 ) responsive to supply of a detector bias voltage (V O H S ) to turn on and short said first diode (D 1 ) and to thereafter prevent current flow in said selected direction, said front end circuit further including a second diode (D 3 ) connected to prevent current flow into said return line (21b) and a second transistor circuit (Q 2 , Z 2 , D 2 , R 2 , R 3 ) responsive to application of a voltage to said first diode (D 1 ) to turn on and short out said second diode (D 3 ), and to thereafter prevent current flow into said return line (21b), said front end circuit further including a third transistor circuit (Q 3 , R 5 , C 2 , R 6 , Z 3 , R 7 ) connected between said input terminal (21a) and an output terminal (53a) of said front end circuit for limiting the voltage applied to said output terminal (53a); and a programmable digital controller circuit (13) programmed to supply respective control signals to said linear regulators (71,73,75,79) so as to supply power to said digital circuitry (25) only when said digital circuitry (25) requires power and so as to supply power to said analog circuitry (24) only when said analog circuitry (24) requires power. The apparatus of Claim 1 wherein said power supply further includes a voltage storage circuit (67, C PFN ) for developing and storing a laser firing voltage, and wherein said controller circuit (13) controls development of said firing voltage. The apparatus of Claim 2 wherein said voltage storage circuit (67) includes circuitry for generating a detector bias voltage (V O H S ) from the laser firing voltage. The apparatus of Claim 1 wherein said third transistor circuit (Q 3 , R 5 , C 2 , R 6 , Z 3 , R 7 ) further is responsive to a signal from said digital controller (13) to disable supply of power from said front end circuit to said DC/DC converter circuitry (55,61). The apparatus of Claim 4 wherein said third transistor circuit (Q 3 , R 5 , C 2 , R 6 , Z 3 , R 7 ) comprises a field effect transistor (Q 3 ) having a zener diode (Z 3 ) connected to its gate (G).

Inventors: NOURRCIER CHARLES E JR, NOURRCIER, CHARLES E., JR.
Applicants: RAYTHEON CO, RAYTHEON COMPANY
Application year: 1995
Main classification: G01S7
IPC codes: G01S17, G01S7