VACUUM MICROELECTRONIC DEVICE AND METHODOLOGY FOR FABRICATING SAME

Abstract: A vacuum state microelectronic device comprising at least a cathode, an anode, and a grid, disposed in a cavity, and formed by the wafer bonding of two planar substrates. The technology permits multiple vacuum state microelectronic devices (vacuum tubes) to be arrayed on a single substrate in an integrated manner so as to form a bond as strong as the substrate itself.

Description: Vacuum microelectronic device and methodology for fabricating same. This application is directed to vacuum microelectronic devices and methodology for producing such devices. Vacuum Microelectronics is the name given to the emerging technology of microelectronic "vacuum state" devices. Since these devices are based on the motion of electrons in vacuum, they are expected to be much faster than solid state devices in which the electron drift velocity is slower. In addition to higher speed, vacuum microelectronic devices are expected to be significantly more radiation hard. In the old vacuum "tube" technology, the electrons moved in a vacuum, but the devices were much larger and transmit distances much greater, so that technology was quickly replaced by solid state technology, where solid state devices could meet the performance requirements. Therefore, if "vacuum state" devices could be downsized to the small-size of solid state devices, it would be a significant advantage. The basic vacuum tube device, the classic triode, however, is based on thermionic emission and it is generally believed that the high temperatures and high power dissipation required for satisfactory operation are not acceptable in any microelectronic structure. Therefore, the vacuum microelectronic devices developed to date are based on a "cold" emission process: field assisted emission. These devices are based on emission from sharp points of suitable materials or from reverse biased shallow junction diodes. The equivalent of the cathode is the pointed emitter (cold cathode), which emits electrons, which are collected by an anode and modulated by a grid. These devices are in the early stages of research and have yet to demonstrate significant results. The structures that have been fabricated have to be placed in a vacuum chamber to be tested. This application is related to a new type of vacuum microelectronic devices. The new type of vacuum microelectronic devices has first and second substrates capable of withstanding heat and pressure; at least one of the substrates has at least one cavity with electrodes deposited in the cavity; the first and second substrates wafer are bonded together such that the substrates are joined together at all points of contact. This application is also directed to a new technology for vacuum state devices, which not only allows the fabrication of individually sealed vacuum microdevices, in which the vacuum space is closed and sealed so that a vacuum chamber is not required for their operation, but also allows the fabrication of vacuum microdevices based on thermionic emission (hot cathodes), which operate at high temperatures, which is not the case with existing approaches to vacuum microelectronics. The new technology is based on the formation of cavities in one or both of a pair of substrates, followed by alignment and wafer bonding of the substrates to seal the cavities. The basic structure, which is the equivalent of the traditional triode, is fabricated by using a process sequence similar to those used in our previous applications to form light emitting devices. The substrate may be of any material suitable for wafer bonding, such as quartz, sapphire, silicon or glass, depending on the anticipated operating conditions of the device. The wafer bonding process used can either be fusion bonding or anodic bonding, also depending on the substrate. Similar bonding processes are widely used in sensor applications. Fusion wafer bonding: In this process two flat wafers (e.g. quartz) are prepared with hydrophilic surfaces and brought into contact. The Van de Waal's forces pull the two wafers together and result in a bond at the interface. The two wafers are then annealed at high temperature (e.g. 1000 C), resulting in a chemical bond at the interface, which has the strength of the bulk material. Even though the temperature is elevated, bonding takes place at a temperature below the melting point of the material (quartz: approximately 1400°C). This means that the substrate will not deform during the bonding process. Anodic wafer bonding: In this process, two flat wafers are brought into contact as in the fusion wafer bonding process. However, the annealing is carried out at lower temperatures and with an electric field applied across the wafers. This process is useful for materials that have mobile ions and cannot be annealed at high temperatures (such as glass). The electric field results in the collection of positive and negative charges at the interface, which lead to high electric fields, which pull the wafers together. This process is more forgiving of the degree of wafer flatness, but is more difficult to implement and does not work with materials that are free of mobile ions. In the first step, a first electrode of an electron emissive material, such as W, Mo, other refractory metal or a suicide, is deposited on a first substrate and patterned. An intermediate layer of silicon dioxide is then deposited (by CVD, PECVD, SILOX or other methods) followed by another electrode which is deposited and patterned. The distance between the first and second electrodes can be adjusted simply by varying the thickness of the silicon dioxide. This distance will be, for example, the distance between the cathode and the grid. A second intermediate layer is then deposited, and the wafer is then planarized by reflowing of the layer or by any other planarizing method. A cavity is then etched around the electrodes, by using photolithography and selective etching. A third electrode, for example, the anode, is deposited on a second substrate. The second substrate is then planarized, aligned and bonded to the first, in a vacuum environment, resulting in a sealed cavity containing a vacuum environment. The fusion or anodic bonding results in a chemical bond at the interface, which has the strength of the bulk material. Contact holes to the electrodes are then opened up by either etching or "drilling" with a laser. Preferably, the third electrode is deposited and patterned inside a trench, which is etched on the second substrate. The trench is then filled, and planarized, after which a cavity surrounding the electrode is formed by photolithography and etching, prior to bonding. For better understanding of the invention, reference is made to the following drawings which are to be taken in conjunction with the detailed description to follow.: Figures 1A-1F illustrate a vacuum microelectronic device constructed in accordance with the invention with sectional views on the left and plan views on the right; Figure 2 is a plan view of a substrate containing multiple microelectronic vacuum devices and the interconnections therebetween; Figure 3 is an illustration of a point type microelectronic device constructed in accordance with the present invention; and Figures 4A-4E illustrate variations of the device configuration shown in Figures 1A-1F. As shown in Figs. 1A-1F, the construction of a vacuum microelectronic device begins with a first substrate 2 which will form one half of the device. Substrate 2 may be of any material suitable for use in a wafer bonding process. It is noted that substrate 2 need not be transparent, as is the case with respect to light emitting devices, as transparency is irrelevant to operation of an electron tube. Accordingly, substrate 2 can, for example, be quartz, sapphire, silicon or glass depending upon the anticipated operating conditions of the device. As is seen in Figure 1A a cathode 4 (electron emitter) is deposited and patterned on substrate 2. As seen in the top view of Fig. 1A, cathode 4 comprises end pads 6 and a serpentine active portion 8 joining the end pads. Cathode 4 is formed from a suitable electron emitting material, for example, a metal such as tungsten, molybdenum, other refractory metal or suicide. The serpentine configuration of portion 8 of cathode 4 serves both to increase the area for electron emission as well as to form an electrical resistance element to provide heating to promote electron emission. If necessary, a further coating on top of cathode 4 may be made to increase its electron emission or to facilitate its heating. As is seen in Figure IB, deposited over substrate 2 and cathode 4 is an intermediate layer 10 of silicon dioxide (SiC^) which may be deposited by any suitable deposition method such as CVD, PECVD, SILOX or others. Thereafter deposited on silicon dioxide layer 10 is a metal layer which is patterned to form a grid 12. As is seen in the top view of Figure IB, grid 12 includes a generally rectangular portion 14 with elongated slots 16 and 18 and a contact pad 20 joined to portion 14 by a bridging member 22. This particular shape of grid 12 may be made by conventional patterning processes, for example, photolithographic masking and etching. Furthermore, the grid may take any appropriate shape for the projected use of the device. It is only necessary that the grid be configured to permit the flow of electrons therethrough, as it functions as the electron modulating structure in a vacuum device. The thickness of silicon dioxide layer 410 defines the cathode-to-grid spacing, and may be adjusted in accordance with the proposed use and electrical requirements of the device. After deposition of grid 12, the substrate and deposited electrodes are planarized with a layer 24 of glass suitable for the bonding process, for example, by the deposition and reflowing of a second intermediate layer 24 of borosilicate glass or phosphorosilicate glass, or by any other planarizing method. Thereafter, a cavity 26 is etched through the planarizing layer 24, silicon dioxide layer 10 and substrate 2, using a selective etchant that leaves grid 12 and cathode 4 unaffected. As is seen in Fig. 1C, the cavity 26 and its associated electrodes is sized so that outermost portions of cathode 4 and grid 12 extend into the lateral surface of the cavity. Cavity 26 and its associated electrodes may be adjusted in size from micron size to many millimeters depending on the application of the device. A second substrate 30 forms the other half of the vacuum microelectronic device. Substrate 30, which may be the same or dissimilar material from that of substrate 2 (so long as it is suitable for wafer bonding to the first substrate) has a trench 32 etched therein. Patterned and deposited in trench 32 is anode 34 which in operation serves to collect the electrons emitted by cathode 6, as modulated by grid 12. As seen in the top view of Figure IE, anode 34 comprises a rectangular portion 36 and a contact pad 38 interconnected by a bridge 40. After deposition of anode 34 in trench 32, trench 32 is filled in with a deposit of planarizing material 43, and the upper surface of substrate 30 is restored to planarity. Thereafter, a cavity 44 is etched into the surface of substrate 30 and beneath anode 34. Cavity 44 is narrower than trench 32 so that anode 34 will be embedded in the side walls of cavity 44. After the etching of cavity 44, the second substrate 30 will appear as shown in Figure IE. Thereafter, substrate 30 is inverted, aligned and wafer bonded to substrate 2 in a vacuum environment. The wafer bonding process may be either fusion or anodic bonding, as described previously, and results in a bond across the entire interface 45 between substrates 2, 30, which bond has a strength comparable to that of the bulk material. In order to make contact with the now embedded electrodes, contact holes are made in the substrates by either etching or "drilling" with a laser. As shown in Figure IF, the contact holes 48 extend to contact pads 6 of cathode 4. Contact hole 50 (see top view) extends to contact pad 20 of grid 12 and a contact hole 52 extends to contact pad 38 of anode 34. Thereafter, conductive material is placed in openings 48, 50, 52 to provide electrical contact with the associated electrodes. Figure 2 illustrates an integrated arrangement of four microelectronic vacuum devices 62, 64, 66 and 68 on a single substrate 60. In this illustration only four separate devices are shown. However any number of devices may be placed on a single substrate dependent upon the needs of the circuit in question. Furthermore, conductive lead traces 70 similar to that of a printed circuit board may be placed on the surface of substrate 60 to interconnect the devices. The conductive traces could also be disposed on one of the substrates before the substrates are bonded together. As shown in Figure 2, devices 64, 66 have their various electronic elements interconnected. Device 68 remains alone and may be accessed separately by conductive leads 72 leading to the other circuit components of the total device. Thus, the present invention provides an integrated vacuum device suitable for use with a variety of electronic circuits. The size, configuration and number of vacuum state devices may be varied to suit the electronic needs of the circuit in question. Through deposition of further metallic and planarizing layers vacuum devices having more than one grid (tetrodes, pentodes, etc) may be constructed. Figure 3 illustrates a vacuum microelectronic device 478 based upon field emission rather than thermionic emission. In this device, the same reference numerals are used to illustrate the same structure as in Figure 1. In this device, cathode 4 is replaced with a cathode 80 which has a series of tips 82 for emitting electrons. The grid and the anode are basically the same. The above described structures and methodology are merely illustrative of the principles of the present invention. Numerous modifications and adaptations thereof will be readily apparent to those skilled in the art without departing from the spirit and scope of the present invention and the appended claims. For example, the cathode, the anode, or both of these electrodes may be in contact with the bottom of the cavity, as shown in the variations shown in Figs. 4A-4E; wherein in each variation, the first substrate 100 is bonded to the second substrate 110 to form a sealed cavity 120, within which is located cathode 130, grid 140 and anode 150. Of course, access to any of the electrodes may be via the bottom of the first substrate, as well as via the top of the second substrate. Finally, it will be appreciated that in any of the various device constructions shown, the cathode and anode positions may be reversed.

Claims: Claims: 1. A vacuum state electronic device comprising: first and second substrates having contacting surfaces; at least one cavity disposed in the contacting surface of at least one of the substrates, said cavity containing a vacuum; an electron emitting electrode disposed within the cavity; an electron receiving electrode disposed within the cavity; at least one electron modulating electrode disposed between the electron emitting electrode and the electron receiving electrode for modulating the flow of electrons therebetween; the first and second substrates being joined together by means of wafer bonding across their respective contacting surfaces to seal the cavity. 2. The electronic device as claimed in Claim 1 wherein at least one of the electrodes extends beyond the walls of the cavity into at least one of the substrates. 3. The electronic device as claimed in Claim 1 wherein the electron emitting electrode has a serpentine configuration in plain view. 4. The electronic device as claimed in Claim 1 wherein the electron modulating electrode includes at least two slots for passing the electrons. 5. The electronic device as claimed in Claim 1 wherein at least one of the electrodes includes at least one contact pad disposed within at least one of the substrates for electrical connection thereto. 6. The electronic device as claimed in Claim 5 wherein at least one of the substrates includes at least one aperture leading from the surface thereof to one or more contact pads. 7. The electronic device as claimed in Claim 6 further including conductive material disposed in the aperture for providing electrical connection to the pad. 8. The electronic device as claimed in Claim 7 further including conductive leads disposed along the surface of at least one of the substrates. 9. A method of fabricating a vacuum state electronic device comprising the steps of: providing a first substrate; depositing a first electrode on the first substrate; providing a first intermediate layer of material atop the first electrode; depositing a second electrode atop the intermediate layer; depositing a second intermediate layer atop the second electrode; forming a cavity through the second intermediate layer and the first intermediate layer; providing a second substrate; depositing a third electrode on the second substrate; positioning the first and second substrates in contact with one another so that the deposited electrodes therein are in face-to- face relation; and wafer bonding, in a vacuum, the first and second substrates together to seal the cavity. 10. The method as claimed in claim 9 further including the step of etching a cavity in the second substrate beneath the third electrode before wafer bonding to seal the cavities. 11. The method as claimed in Claim 9 further comprising the step of providing an aperture in at least one of the substrates to permit external electrical contact to at least one of the electrodes. 12. The method as claimed in Claim 9 further including the step of patterning the second electrode to form apertures therein to permit electrons to pass therethrough. 13. The method as claimed in Claim 9 wherein the first electrode is comprised of an electron emitting material. 14. The method of Claim 9 in which the cavity in the first and second intermediate layers extends into the first substrate.

Inventors: CAMMACK DAVID A, KHAN BABAR A, PINKER RONALD, CAMMACK, DAVID, A., KHAN, BABAR, A., PINKER, RONALD
Applicants: PHILIPS ELECTRONICS NV, PHILIPS NORDEN AB, PHILIPS ELECTRONICS N.V.
Application year: 1995
Main classification: H01J21
IPC codes: H01J9, H01J19, H01J21, H01L21