METHOD FOR SHARPENING EMITTER SITES USING LOW TEMPERATURE OXIDATION PROCESSES

Abstract: An improved method for sharpening emitter sites for cold cathode field emission displays (FEDs) includes the steps of: forming a projection on a baseplate; growing an oxide layer on the projection using a low temperature oxidation process; and then stripping the oxide layer. Preferred low temperature oxidation processes include: wet bath anodic oxidation, plasma assisted oxidation and high pressure oxidation. These low temperature oxidation processes grow an oxide film using a consumptive process in which oxygen reacts with a material of the projection. This permits emitter sites to be fabricated with less distortion and grain boundary formation than emitter sites formed with thermal oxidation. As an example, emitter sites can be formed of amorphous silicon. In addition, low temperature materials such as glass can be used in fabricating baseplates without the introduction of high temperature softening and stress.

Description: METHOD FOR SHARPENING EMITTER SITES USING LOW TEMPERATURE OXIDATION PROCESSES The present invention relates to field emission displays (FEDs) and to methods for sharpening emitter sites used in FEDs and other electronic equipment. Flat panel displays have recently been developed for visually displaying information generated by computers and other electronic devices. These displays can be made lighter and require less power than conventional cathode ray tube displays. One type of flat panel display is known as a cold cathode field emission display (FED). A cold cathode FED uses electron emissions to illuminate a cathodoluminescent screen and generate a visual image. A single pixel 10 of a FED is shown in Figure 1. The FED includes a baseplate 11 (i.e. , substrate) formed with a conductive layer 12. An emitter site 13 is formed on the conductive layer 12. The emitter site 13 is typically formed as a sharpened projection having a pointed apex. Alternately the emitter site 13 may be formed as a sharpened edge, as a multi-faceted structure (e.g., pyramidal) having a pointed apex or as an array of points. A gate electrode structure, or grid 15, is associated with the emitter site 13. The grid 15 and baseplate 11 are in electrical communication with a voltage source 20. When a sufficient voltage differential is established between the emitter site 13 and the grid 15, a Fowler-Nordheim electron emission is initiated from the emitter site 13. Electrons 17 emitted at the emitter site 13 impinge on a cathodoluminescent display screen 16. The display screen 16 includes an external glass face 14, a transparent electrode 19 and a phosphor coating 21. The electrons impinging on the phosphor coating 21 increase the energy level of phosphors contained within the coating 21. When the phosphors return to their normal energy level, photons of light are released to form a visual image. With a gated pixel 10, the grid 15 is electrically isolated from the baseplate 11 by an insulating layer 18. The insulating layer 18 also provides support for the grid 15 and prevents the breakdown of the voltage differential. The insulating layer 18 and grid 15 include a cavity 23 which surrounds the emitter site 13. Individual pixels of field emission displays are sometimes referred to as vacuum microelectronic triodes. The triode elements include the cathode (field emitter site), the anode (cathodoluminescent screen) and the gate (grid). U.S. Patent No. 5,210,472 to Casper et al.; U.S. Patent No. 5,232,549 to Cathey et al. ; U.S. Patent No. 5,205,770 to Lowrey et al.; U.S. Patent No. 5,186,670 to Doan et al.; and U.S. Patent No. 5,229,331 to Doan et al. disclose various methods for forming elements of field emission displays. Emitter sites for FEDs are typically formed of silicon or a metal such as molybdenum or tungsten. Other conductive materials such as carbon and diamond are also sometimes used. In order to provide a uniform resolution and brightness at the display screen, each emitter site should be uniformly shaped. In addition, emitter sites should be uniformly spaced from the display screen. Accordingly, different methods have been developed in the art for fabricating emitter sites on silicon and other substrates to insure a high degree of uniformity. As an example, U.S. Patent No. 5,151,061 to Sandhu, describes a method for forming self-aligned conical emitter sites on a silicon substrate. U.S. Patent No. 5,259,799 to Doan et al. describes a method for forming self-aligned emitter sites and gate structures for FEDs. In addition to being uniformly shaped and spaced, the emitter sites should also be sharp to permit optimal electron emission at moderate voltages. The voltage required to generate emission decreases dramatically with increased shaφness. For this reason during the FED fabrication process, thermal oxidation is typically used to shaφen emitter sites. As an example, with emitter sites formed of single crystal silicon, a thermal oxidation process can be used to form a layer of SiO 2 on a silicon projection. This surface oxide is then stripped using a wet etching process. Improved techniques have been developed recently for oxidation sharpening single crystal silicon emitter sites. One such technique is described in the technical article by Marcus et al. entitled, "Atomically Shaφ Silicon and Metal Field Emitters" ; IEEE Transactions On Electron Devices, Vol. 38, No. 10, October (1991). In the Marcus et al. process, the emitter sites are 5μm-high cones that are oxidation sharpened using a process in which single crystal silicon is thermally oxidized, preferably at a high temperature of 950 °C. The emitter sites formed by this process have a radius of curvature at the apex of less than 1 nm. Another method for forming and shaφening single crystal silicon emitter sites is disclosed in U.S. Patent No. 5,100,355 to Marcus et al. In this method a silicon protuberance is formed and then coated with a material which serves as a mold. The silicon is removed and the mold is filled with a metal. The mold is then removed to leave the metal protuberance. One problem associated with prior art oxidation shaφening processes for forming emitter sites is that in general, these processes are performed at relatively high temperatures. As an example, for thermal oxidation processes, temperatures are typically on the order of 900°-1100°C. High oxidation temperatures prevent the successful sharpening of emitter sites made from a variety of materials. In general, these high temperature oxidation shaφening processes have been used in the past only with single crystal silicon emitter sites and not amoφhous silicon. With emitter sites formed of amoφhous silicon, degradation occurs during transformation of the amoφhous silicon to polysilicon. At temperatures of about 600°C and above, amoφhous silicon can become polysilicon and generate grai boundaries and oxide fissures in an emitter site. Accelerated oxidation occurs along these grain boundaries and fissures. A second problem associated with the high temperature oxidation of amoφhous silicon is the formation of bumps or asperities on the surface of the emitter site. Again, this may cause a deformed or asymmetrical emitter site having non-uniform emissivity characteristics and poor resolution. In emitter sites that are designed to be symmetric, this results in poor resolution and high grid current. Materials other than amoφhous silicon, which are used in the construction of emitter sites, are also adversely effected by high temperature oxidation. As an example, emitter sites formed of metal, or metal-silicon composites may also experience distortion and grain boundary growth when subjected to high temperature oxidation processes. Furthermore, high temperature oxidation processes completely preclude the use of some materials for fabricating other components of field emission displays such as baseplates (11, Figure 1). As an example, float glass materials have relatively low strain and softening temperatures. With float glass, significant strain occurs at about 500°C and significant softening occurs at about 700°C. A further problem with high temperature oxidation sharpening processes are their adverse effect on circuit elements associated with the integrated circuitry for the emitter sites. Because the baseplate which contains the emitter sites is formed of various materials having different coefficients of thermal expansion, heating to high temperatures can cause stress failures. Aluminum alloy interconnects and contacts, may soften or flow at the high temperatures required by the oxidation process. In addition, it may sometimes be necessary to further shaφen or resharpen emitter sites in the presence of other circuit elements that may be adversely effected by the high temperatures. Figures 2A and 2B illustrate the use of a prior art high temperature oxidation process for shaφening emitter sites formed of amoφhous silicon. In Figure 2A, an array of conically shaped amoφhous silicon emitter sites 13 have been formed on a baseplate 11. As shown in Figure 2A, each emitter site 13 projects from a surface of the baseplate 11 and includes an apex 32 having a blunt shape. During the oxidation shaφening process, a layer of oxide 24 (Figure 2B) will be grown on the emitter site 13. After this oxide layer 24 is stripped, the radius of curvature at the apex 32 will be decreased and the emitter site 13 will be sharper. As shown in Figure 2B, during the oxidation sharpening process, a high temperature oxidizing gas 22 is directed over the emitter site 13 to form the oxide layer 24. This oxide layer 24 is subsequently stripped using a wet etch process. The high temperatures used during the oxidation process, however, will cause the amoφhous silicon to become polysilicon and generate grain boundaries 25 where oxidation rates are faster. This results in oxide fissures 26 extending into the body of the emitter site 13 producing deformation and asymmetry. One problem with this structure is that a deformed emitter site will provide a non uniform electron emission. This in turn will cause poor resolution and high grid current in the FED and in some cases a higher "turn on" voltage. Objects of the Invention In view of these and other shortcomings of prior art high temperature oxidation processes for sharpening emitter sites, there is a need in the art for improved methods for sharpening emitter sites. Accordingly, it is an object of the present invention to provide improved methods for shaφening emitter sites suitable for use in cold cathode field emission displays (FEDs) and other electronic equipment. It is a further object of the present invention to provide improved methods for shaφening emitter sites at relatively low temperatures to prevent distortion of the emitter sites and detriment to other components associated with the emitter sites. It is a still further object of the present invention to provide low temperature methods for shaφening emitter sites in order to reduce temperature stress and allow the use of improved materials such as amoφhous silicon emitter sites and glass baseplates. It is yet another object of the present invention to pro v ide improved methods for shaφening emitter sites that are efficient, compatible wkw large scale fabrication processes, and which produce high quality emitter sites. Other objects, advantages and capabilities of the present invention will become more apparent as the description proceeds. In accordance with the present invention, an improved method for shaφening emitter sites for cold cathode field emission displays is provided. The method of the invention, generally stated, includes the steps of: forming raised projections on a baseplate (substrate); using a low temperature consumptive oxidation process to form an oxide layer on the projection; and then stripping the oxide layer to expose and shaφen the projections to form emitter sites. By way of example, the projections can be conically shaped with a pointed apex, wedge shaped with a blade-like apex, or pyramidal (multi-faceted) in shape with a shaφened apex. Depending on the materials used, preferred low temperature consumptive oxidation processes for growing an oxide film to sharpen an emitter site include: wet bath anodic oxidation, plasma assisted oxidation, plasma cathodization and high pressure oxidation. In general, these low temperature oxidation processes utilize voltage or pressure rather than temperature, to enhance the rate of diffusion of an oxidizing or consumptive species into the emitter site. This overcomes many of the limitations associated with prior art high temperature thermal oxidation processes, such as the formation of grain boundaries and oxide fissures ir amoφhous silicon and metallic emitter sites. In addition, it permits low temperature materials, such as glass baseplates, to be used in the formation of various circuit components of display devices. Furthermore, the method of the invention can be used to sharpen, resharpen or further shaφen emitter sites, without detrimentally affecting circuit elements, such as metal interconnects, associated with display devices. Figure 1 is a schematic drawing showing a prior art FED pixel; Figure 2A is a schematic view of a prior art emitter site prior to oxidation shaφening; Figure 2B is a schematic view of an emitter site illustrating the formation of grain boundaries and oxide fissures during a prior art high temperature oxidation shaφening process; Figures 3A and 3B are schematic drawings of wet bath anodic oxidation systems for forming emitter sites in accordance with the invention; Figure 4A is a schematic drawing of a low temperature cathodic plasma oxidation system for forming emitter sites in accordance with the invention; Figure 4B is a schematic drawing of a low temperature plasma anodizing system for forming emitter sites in accordance with the invention; and Figure 5 is a schematic drawing of a high pressure oxidation system for forming emitter sites in accordance with the invention. Wet Bath Anodic Oxidation In one aspect of the present invention a wet bath anodic oxidation process is used to shaφen silicon emitter sites. Figure 3A illustrates a wet bath anodic oxidation system 52 suitable for forming an oxide layer on silicon emitter sites 53 formed on a baseplate 54. The baseplate 54, which is also sometimes referred to in the art as a substrate, is formed of a rigid material such as silicon or float glass. Float glass, which is also known as soda lime float glass, is a commerically available glass material that is fabricated from sand and lime using a furnace. The wet bath anodic oxidation system 52 includes an enclosed tank 56 filled with an electrolytic solution 58. Suitable electrolytic solutions include n-methyl acetanlide + deionized water + KNO 3 -Electrolytic solutions may also contain H 3 PO 4 /water or HN03/water. The baseplate 54 is attached to a holder 60 which is connected to a positive electrode 64 or anode. A cathode 66 formed of a conductive material such as stainless steel, or a same material as the emitter site 53, is connected to a negative electrode 68. In this system the oxide (i.e. , SiO 2 ) is grown instead of being deposited. This means that the grown oxide is a result of a chemical consumption of the silicon and not a deposition on the surface of silicon. Solid waste by-products are also produced by the consumptive process. The net result, however, is a shaφening effect (i.e. , decrease in radius of curvature at apex of emitter site 53) after the oxide is removed. In the system illustrated in Figure 3 A, the driving voltage applied between the negative electrode 68 and the positive electrode 64 is the single most important factor in determining the thickness of the oxide layer. Higher voltages will result in thicker oxides being grown. One theory of growth mechanism, which accounts for the voltage dependency, is that the silicon from the emitter site 53 migrates through the growing oxide layer to the solution where oxygen is being electrochemically produced. The migrating silicon atoms react with the oxygen to form additional oxidized silicon. The oxide can be formed at relatively low temperatures of less than 100 °C. For shaφening the emitter sites 53, oxide thickness are between about 500 to 5000A. A thickness of about lOOOA being preferred. By way of example, emitter sites 53, approximately 1,2 micron in height and conical in shape were fabricated using an etching process from boron doped 10-14 Ω-cm silicon. The emitter sites 53 were then shaφened by using a wet bath anodic oxidation process as illustrated in Figure 3 A. Subsequently, the oxide was removed by wet chemical removal. The electrolytic solution comprised by weight 97.05% n-methyl acetamide, 2.525% deionized water and 0.425% KNO 3 at a temperature of 70°C. The cathode 66 was formed of aluminum. An oxide film of HOOA was grown. The electrical current was held relatively constant duiiug a 43 minute growth period. The voltage increased from an initial 170 volts, to 236 volts at 10 minutes, 266 volts at 20 minutes, 296 volts at 30 minutes, 338 volts at 40 minutes and 350 volts at 43 minutes. After oxide growth the sample was rinsed in deionized water and then exposed to an HF solution containing 7: 1 buffered oxide etchant acid, for 40 seconds, to remove the oxide layer. This was followed by rinsing in deionized water, followed by drying. Because the wet bath anodic oxidation process is performed at such low temperatures, distortion of die emitter sites is minimized. In addition, me low temperature anodic oxidation process can be performed after various circuit element (e.g., aluminum contacts) have been formed without detriment to these elements. With reference to Figure 3B, a wet bath anodic oxidation system 70 similar to that shown in Figure 3A can be used to oxidize the surface of emitter sites 76 formed of a metal, silicon or a silicon-metal composite. In the wet bath anodic oxidation system 70, the baseplate 74 may be mounted on a holder 72. In this system, the baseplate 74 and emitter sites 76 are connected to a positive electrode and are the anode. A cathode plate 78 is connected to a negative electrode. The electrolytic. solution 80 is a solution which produces an oxide layer on the emitter sites 76 but does not dissolve the grown oxide nor the grown oxide 76. For molybdenum, silicon, tantalum or aluminum emitter sites, a suitable electrolytic solution contains 388 grams of n-methyl acetamide, 10 grams of H 2 0 and 1.7 grams of KNO 3 . Such a system can be operated at a temperature of less than 100°C. Plasma Assisted Oxidation Plasma assisted oxidation of silicon is similar to the wet bath system 52 (Figure 3A) described above except that the electrolyte is replaced with an oxygen plasma. This technique can be carried out in an oxygen discharge generated by radio frequency (RF) or a dc electron source. As an example, an oxygen plasma can be generated by the application of high-energy radio-frequency (RF) fields (e.g. 13.56 M Hz) contained at a reduced pressure (e.g., J torr). Such a plasma can be employed to grow oxide at a lower temperature (e.g. , 300°C - 700°C) than a thermal system that generally takes place above 800°C. With low temperature plasma assisted oxidation, oxygen ions are extracted from the plasma by the dc silicon anode causing the silicon to migrate and form a silicon dioxide layer on the substrate. The SiO 2 growth rate increases with increasing temperature, plasma density and substrate doping concentration. Plasma oxidation systems can be classified further into different types. In an "anodic plasma oxidation" system, the oxidized substrate is externally positively biased. In a "cathodic plasma oxidation" system the substrate is at floating potential, but because of confinement of the plasma, oxidation occurs on the surface facing away from the plasma. An anodic plasma oxidation system is described in the technical article by P. F. Schmidt and W. Michel entitled "Anodic Formation of Oxide Films on Silicon", Journal of the Electrochemical Society, April 1957, pages 230-236. A cathodic plasma oxidation system is described in the technical article by Kamal Eljabaly and Arnold Reisman entitled "Growth Kinetics and Annealing Studies of the "Cathodic" Plasma Oxidation of Silicon", Journal of the Electrochemical Society, Vol. 138, No. 4, April 1991. In addition, cathodic plasma oxidation processes are described in U.S. Patent Nos. 4,323,589 and 4,232,057 to A. K. Ray and A. Reisman and U.S. Patent No. 5,039,625 to Reisman et al. In accordance with the present invention, a cathodic plasma oxidation process can be used to sharpen emitter sites. Such a cathodic plasma oxidation process utilizes a process chamber in flow communication with highly purified oxygen gas (e.g., 99.993% 0 2 ). The oxygen gas is included in an inert gas such as argon. Figure 4A illustrates a cathodic plasma oxidation system 108. In the cathodic plasma oxidation system 108, high purity argon is produced by taking the boil-off from a liquid argon source. This argon gas is purified urther by passing it over a titanium bed in a two zone furnace 110. The first zone of the furnace is heated to strip the oxygen from any residual water vapor by oxidizing the titanium. The hydrogen released is then absorbed by the titanium in the second zone. The purified argon is then mixed with high purity oxygen (e.g. , bottled 0 2 with a purity of 99.993%). Mass flow controllers 112 and 114 control the gas flow into the process chamber of a reactor tube 118. The high purity gas mixture containing oxygen is injected through an o-ring joint 116 into the reactor tube 118. The reactor tube 118 is a vessel formed of fused silica. The interior of the reactor tube 118 is in flow communication with a turbo-molecular pump 120 that continuously pumps the system to a negative pressure. RF coils 122, 124 surround the reactor tube 118 and are coupled to one or more RF power supplies. The RF coils 122, 124 are used to effect wave coupling with the high purity gas mixture injected into die reactor tube 118. The RF coils 122, 124 each form separate areas within the reactor tube 118 wherein distinct plasma clouds are generated and confined. Silicon baseplates 126 on which the emitter sites 128 have been formed are held in a quartz boat within the reactor tube 118 peφendicular to the direction of gas flow. One side of each baseplate 126, containing the emitter sites 128, is outside of the plasma that is confined between the RF coils 122 or 124. Oxidation occurs on the emitter sites 128 which are facing away from the RF coils 122 or 124. Such a cathodic plasma system 108 can form oxides at a temperature of around 300°C to 700°C. The thickness of the oxide will depend on d e pressure, time, temperature, radio frequency and RF power. These parameters may be adjusted to obtain a desired oxide thickness. As an example, oxide thicknesses may range from 500A to 3000A. Figure 4B illustrates an anodic plasma oxidation system 82 suitable for oxidizing emitter sites formed of silicon, metal, or a metal silicon composite. In the anodic plasma oxidation system 82, an enclosed process chamber 84 is in flow communication with an 0 2 plasma source 92 maintained by a glow discharge serving as the oxygen reservoir. The process chamber is also in flow communication with a vacuum source 94. The process chamber 84 contains the baseplate 86, a cathode 88 and an anode 90. The baseplate 86 containing the emitter sites 87 is connected to a positive electrode and forms the anode 90. This arrangement permits the application of a positive bias to the emitter sites. In this system the mechanism of film growth is essentially similar to electrochemical anodization (Figure 3A) in that the oxide growth is a function of the anodizing voltage. Representative process variables include oxygen pressure (J Torr), power (e.g., 200W), and temperature (600°C to 800°C). Such an anodic plasma oxidation system 82 also permits the anodization of metals which may be dissolved by. the commonly used electrolytes. High Pressure Oxidation One other technique for low temperature oxidation of silicon is to grow the SiO 2 in a high pressure environment. Commercial high pressure oxidation systems are sold under die trademark HiPOx ® manufactured by GaSonics and under the trademark FOX ® manufactured by Thermco Systems. In addition, a low temperature, high pressure oxidation process for silicon is described in the technical article by L. E. Katz and L. C. Kimerling, entitled "Defect Formation During High Pressure, Low Temperature Steam Oxidation of Silicon," Journal of Electrochemical Society, Vol. 125, No. 10, pages 1680-1683 (1978). A high pressure oxidation system 96 is shown in Figure 5. The high pressure oxidation system 96 includes a quartz tube 98 reinforced with a stainless steel jacket 100. An inlet 102 is provided for a high pressure inert gas. Another inlet 104 is provided for a high pressure oxidant gas such as high purity water or a dry oxidant such as oxygen ions. The baseplate 106 having emitter sites 107 is placed within the quartz tube 98. The quartz tube 98 is sealed and die oxidant is pumped into the tube at elevated pressures of about 10 to 25 atmospheres. The entire system 96 is heated to a predetermined oxidation temperature. With such a high pressure oxidation system 96 the increased pressures allow an oxidation process to be performed at a lower temperature. A one atmosphere increase in pressure translates to about a 30 °C drop in temperature. As an example, temperatures as low as about 700°C can be used at pressure as high as about 25 atmospheres. Such a system 96 is particularly suited to growing oxide films on silicon. The growth of oxide films on silicon using high pressure steam is linear in time and directly proportional to pressure over a certain range of time, temperature and pressure. Whichever method of oxide formation is utilized (i.e. wet batii anodization, plasma assisted oxidation, or high pressure oxidation) following generation of the oxide layer, die surface oxide is stripped from me emitter site. For a silicon dioxide layer formed on a silicon substrate, the surface oxide may be stripped using a wet etchant, such as concentrated hydrofluoric acid or a buffered hydrofluoric solution. Other oxides can be stripped widi other etchants known in the art. In addition to a wet etch process for stripping the oxide layer, dry etch processes such as plasma etching may also be utilized. For enhanced shaφness and uniformity in the emitter sites, oxidation processing and stripping may be repeated several times Because of the low processing temperatures used with the method of the invention, sharpening can be performed without detriment to circuit elements such as solid state junctions and metal interconnects. This also permits shaφening to be performed after the solid state elements and metal interconnects for the FED cell have been substantially completed. While the method of die invention has been described widi reference to certain preferred embodiments, as will be apparent to those skilled in the art, certain changes and modifications can be made without departing from the scope of the invention as defined by die following claims.

Claims: CLAIMS: 1. A method for shaφening an emitter site for <; field emission display comprising: providing a baseplate; forming a projection on the baseplate said projection terminating in an apex; placing the baseplate in an electrolytic solution including a cathode, and electrically connecting the projection to a positive electrode and the cathode to a negative electrode of a power supply; applying a voltage to the projection and cathode; growing an oxide layer on the projection by a consumptive process in which oxygen from the electrolytic solution reacts with a material of the projection to form the oxide layer; removing die baseplate from the electrolytic solution; and tiien stripping the oxide layer from the projection. 2. The method as claimed in claim 1 and wherein the projection is formed of amoφhous silicon. 3. The method as claimed in claim 1 and wherein the projection is formed of single crystal silicon. 4. The method as claimed in claim 1 and wherein die baseplate is formed of silicon. 5. The method as claimed in claim 1 and wherein the baseplate is formed of a glass. 6. The method as claimed in claim 5 and wherein the projection is formed of amoφhous silicon. 7. The method as claimed in claim 5 and wherein the projection is formed of single crystal silicon. 8. The method as claimed in claim 1 and wherein me electrolytic solution is at a temperature of 20°C to 100°C. 9. The method as claimed in claim 1 and wherein stripping the oxide is widi a wet etchant. 10. A method for forming and shaφening an emitter site for a field emission display comprising: providing a baseplate; forming a silicon projection on die baseplate said projection terminating in an apex; providing a wet bath system including an electrolytic solution, a power supply having a positive electrode and a negative electrode, and a cathode in the electrolytic solution electrically connected to die negative electrode; placing die baseplate in die electrolytic solution with the projection in electrical communication wi i the positive electrode of the power supply; applying a driving voltage to the projection and cad ode; growing an oxide layer on die projection by a consumptive process in which oxygen from the electrolytic solution reacts with silicon on tne projection; removing d e baseplate from the electrolytic solution; and then stripping the oxide layer from the projection in order to shaφen the projection. 11. The method as claimed in claim 10 and wherein the electrolytic solution includes n-med yl acetamide and water. 12. The method as claimed in claim 10 and wherein the electrolytic solution includes a chemical selected from die group consisting of KNO 3 , H3PO and HN0 3 . 13. The method as claimed in claim 10 and wherein said method is performed after formation of various circuit elements on die baseplate. 14. The method as claimed in claim 10 and wherein the silicon projection is formed of amoφhous silicon. 15. The method as claimed in claim 10 and wherein the baseplate is formed of silicon. 16. The method as claimed in claim 10 and wherein the baseplate is formed of a glass. 17. The method as claimed in claim 16 and wherein the silicon projection is formed of amoφhous silicon. 18. The method as claimed in claim 16 and wherein die glass is soda lime float glass. 19. The method as claimed in claim 10 and wherein die electrolytic solution is at a temperature of 20°C to 100°C. 20. A method for shaφening an emitter site for a field emission display comprising: providing a baseplate; forming a projection on the baseplate said projection including an apex; forming a grown oxide layer on the projection using a plasma assisted oxidation process wherein die baseplate is placed in a process chamber maintained at a negative pressure and a plasma containing oxygen is generated within said process chamber such that oxygen in die plasma reacts widi die projection to form the oxide layer; removing me baseplate from the process chamber; and then stripping the oxide layer from the projection to shaφen said apex. 21. The method as claimed in claim 20 and wherein the plasma assisted oxidation process is a cathodic plasma oxidation process. 22. The method as claimed in claim 20 and wherein the plasma assisted oxidation process is an anodic plasma oxidation process. 23. The method as claimed in claim 20 and wherein the plasma assisted oxidation process is performed at a temperature of from 300 °C to 700°C. 24. The method as claimed in claim 20 and wherein the plasma assisted oxidation process is performed after formation of integrated circuit elements for the field emission display. 25. The method as claimed in claim 20 and wherein the plasma assisted oxidation process is repeated to further shaφen the projection. 26. A method for shaφening an emitter site for a cold cathode field emission display comprising: providing a baseplate; forming a projection on the baseplate, said projection terminating in an apex having a radius of curvature, said projection formed of a material selected from the group of materials consisting of amoφhous silicon, single crystal silicon, and metal; forming an oxide layer on the projection using a plasma assisted oxidation process wherein d e baseplate is placed in a process chamber including an oxygen containing plasma at a temperature of 300°C to 700°C and *ne oxide layer is grown on the projection; removing the baseplate from the process chamber; and then stripping die oxide layer from me projection in order to decrease die radius at die apex and shaφen the projection. 27. The method as claimed in claim 26 and wherein die oxygen containing gas includes purified oxygen and an inert gas. 28. The memod as claimed in claim 26 and wherein stripping the oxide layer is using a wet etchant. 29. The memod as claimed in claim 26 and wherein die oxide forming step and d e stripping step are repeated. 30. The method as claimed in claim 26 and wherein me plasma assisted oxidation process is a cathodic plasma oxidation process. 31. The method as claimed in claim 26 and wherein the plasma assisted oxidation process is an anodic plasma oxidation process. 32. A memod for shaφening an emitter site for a field emission display comprising: providing a baseplate; forming a silicon projection on the baseplate said projection terminating in an apex; forming a SiO 2 layer on the projection using a cathodic plasma oxidation process in which the baseplate is placed in a vacuum process chamber maintained at a temperature of about 300° - 700°C and a plasma containing oxygen is generated within die process chamber and confined such diat the projection faces away from the plasma; removing the baseplate from the process chamber; and dien stripping the oxide layer from die projection. 33. The method as claimed in claim 32 and wherein the baseplate is silicon and die projection is amoφhous silicon. 34. The method as claimed in claim 32 and wherein the baseplate is glass and die projection is amoφhous silicon. 35. The method as claimed in claim 32 and wherein the oxidation process is performed after formation of integrated circuit elements for die field emission display. 36. The method as claimed in claim 32 and wherein the plasma is generated using RF coils placed around d e process chamber. 37. A method for shaφening an emitter site for a field emission display comprising: providing a baseplate; forming a silicon projection on die baseplate said projection terminating in an apex; forming an oxide layer on the projection using a high pressure oxidation process in which the baseplate is placed in a process chamber maintained at a pressure of about 10 to 30 atmospheres and subjected to a gas containing oxygen; removing the baseplate from the process chamber; and dien stripping the oxide layer from the projection. 38. The method as claimed in claim 37 and wherein the high pressure oxidation process is performed after formation of integrated circuit elements for the field emission display. 39. The method as claimed in claim 37 and wherein the projection is formed of amoφhous silicon. 40. A method for shaφening an emitter site of a field emission display, comprising: providing a base plate having a projection formed thereon, said projection terminating in an apex; forming an oxide layer from said projection; and stripping said oxide layer from said projection. 41. The method of clia 40, wherein said projection comprises silicon. 42. The method of claim 41 , wherein said projection comprises amoφhous silicon. 43. The method of claim 41 , wherein said projection comprises single crystal silicon. 44. The method of cliam 40, wherein said oxide layer is grown through immersion of said base plate in an electrolytic solution. 45. The method of claim 40, wherein said oxide layer is grown by exposing said base plate to an oxygen-containing plasma.

Inventors: CATHEY DAVID A JR, CATHEY, DAVID, A., JR.
Applicants: MICRON DISPLAY TECH INC, MICRON DISPLAY TECHNOLOGY, INC.
Application year: 1995
Main classification: H01J9
IPC codes: H01J9