Heat-treatment method of groups III - V compound semiconductor materials

Abstract: When a film is formed on a wafer of groups III-V compound semiconductors by heating, slips incur in the periphery of the wafer because of residual inner stress of the wafer. The quality of an epitaxially grown crystal is surely damaged by these slips. The residual stress of the wafer is caused by the residual stress generated in an inner part of an ingot at the time of growing a crystal. Therefore, it is hoped to propose a wafer in which no slips are generated when the epitaxial growth is carried out. In this invention, an ingot is heated and cooled in a range between an upper limit temperature T h and a lower limit temperature T l where the upper limit temperature ranges more than 800°C and less than a melting point of a material of the ingot, and the lower limit temperature ranges more than 800°C and less than the upper limit temperature T h . The reciprocating movement of heating and cooling is repeated a plurality of times at a speed A of raising temperature and a speed B of lowering temperature where the speed A of raising temperature is lower than the speed B of lowering temperature. The residual stress is excluded by the heat-treatment method of this invention. No slips occur in the peripheral part of a wafer obtained by this invention.

Description: This invention relates to a heat-treatment method for reducing residual inner stress of groups III-V compound semiconductor materials, for example, GaAs, InP, and so on, and more particularly relates to an ingot annealing method of groups III-V V compound semiconductor crystals. Single crystals of groups III-V compound semiconductor materials are produced by the LEC (Liquid Encapsulating Czockralski) method or the HB (Horizontal Bridgman) method. Wafers are made by slicing a single ingot off. Various kinds of semiconductor films are able to be formed on a wafer by the epitaxial growth. The wafers have a great variety of utilities as substrates of semiconductor devices. Hence, various properties are required for the substrates in accordance with the intentions. To satisfy these requirements, compound semiconductor materials are sometimes dealt with by annealing in the step of ingots or wafers of the compound semiconductor materials. This invention claims the priority of Japanese Patent Application No. 6-284285 (JP-A-6-284285) filed October 24, 1994, which is incorporated herein by reference. Heat treatment of groups III-V compound semiconductors has been mainly practiced for the purpose of improving electrical properties. When a wafer is, for example, used as an FET (Field-Effect Transistor) substrate, it is a serious drawback that threshold values of switching fluctuate on a surface of the wafer. Such a fluctuation of the threshold values is caused by the fluctuation of electrical properties of the substrate. Many methods for solving the above disadvantage have been proposed. [1] Laid open patent application No. 1-242498 (242498/1989) Laid open date: September 27, 1989 Title of the invention: "HEAT-TREATMENT METHOD OF A GALLIUM ARSENIDE (GaAs) SINGLE CRYSTAL" The above-described application proposed a heat treatment of an In-doped GaAs ingot which had been grown by the LEC (Liquid Encapsulating Czockralski) method and then had been once cooled. An ingot just as it is or wafers were heated and kept at a high temperature T 1 ranging from 1050°C to 1200°C. Moreover, the ingot or the wafers were rapidly cooled and kept at a temperature T 2 ranging from 750 to 950°C. Then they were rapidly cooled again to room temperature. The application proposed the heat treatment consisting of two steps, i.e. maintenance at the temperature T 1 - rapid cooling - maintenance at the temperature T 2 - rapid cooling. It was reported that there existed fine defects even in In-doped, dislocation-free GaAs crystals, and thereby electrical properties were disturbed. Such fine defects are able to be observed on a GaAs crystal surface etched with molten KOH by the infrared scattering method. It was assumed that these fine defects would be caused not by the crystal dislocation but by the segregation of As. The heat treatment disclosed by the invention [1] was practiced so as to exclude the fine defects and raise the insulation of the substrate. The application said that the fine defects did not appear, if the cooling after the growth of the ingot was so rapid. The excess As was converted into liquid at the temperature T 1 , whereby fine defects were broken down. Hence, such a rapid cooling prevents As from re-condensation, and further, helps As to be distributed uniformly and to be solidified. The treatment at temperature T 2 was introduced in order to heighten the insulation of the substrate. The insulating ability of the entire crystal was raised and the fluctuation of resistivity came to be small by the heat-treatment at temperature T 2 . The heat-treatments carried out at the temperatures T 1 and T 2 were static, because the crystal was only kept at a constant temperature for a long time, for example, about two hours. [2] M.Kashiwa, Y. Otoki, M. Seki, S. Taharasako & S. Okubo, "Development of high quality 4-inch semi-insulating GaAs crystal wafers", Hitachi Cable Review No.9, p55 (August 1990) This document pointed out that fine defects were generated by the segregation of As of a GaAs crystal, as well as the application [1]. Further, the document aimed at generating EL2-levels. It wrote that all the conventional heat-treatments had been single step heat-treatments in which a crystal was heated up to a temperature of from 800 to 1000°C. This single step heat-treatment had been likely to be effective for excluding As precipitate, and had been effective only for removing the fluctuation of macroscopic property, i.e. fine defects. The document said there still existed the fluctuation of microscopic property which had never been removed by the prior single step heat-treatment. Such a fluctuation of the microscopic property could be revealed by measuring the photoluminescence or the infrared scattering light. The document insisted that it should be rather appropriate to make the defects such as EL2-levels positively in uniform distribution in order to produce an semi-insulating substrate with high resistance. It asserted that the resistance was heightened by improving the electrical property. Resistance was fixed at a high value by the EL2-levels, and was not lowered by the following heating. The document [2] proposed a three-step heat-treatment. A sample was dealt with by the three-step heating treatment wherein the sample was kept at a temperature T 1 more than 1100°C for several hours, was treated at another temperature T 2 ranging from 500°C to 600°C for several hours, and was maintained at another temperature T 3 ranging from 800°C to 1000°C for several hours. As precipitate was dissolved at the temperature T 1 , and the dissolved As spread into the crystal. The crystal was rapidly cooled at the transition from the temperature T 1 to the temperature T 2 . As formed finer precipitates at the temperature T 3 . These fine precipitates became mother nuclei of EL2-levels. Hence, the heat-treatment at the temperature T 2 was practiced for generating nuclei. When the crystal was heated up to the temperature T 3 , a lot of EL2-levels were grown from the nuclei, whereby the resistance of the crystal was increased to be a semi-insulating substrate. The microscopic property is equalized in the whole wafer due to the uniform generation of EL2-levels. The physical values measured by the photoluminescence or the infrared scattering were averaged in the crystal. [3] A heat-treatment method was disclosed in Laid Open Patent Application No.5-117097 (Laid Open Date: May 14, 1993), which dealt with a GaAs crystal by the heat-treatment having the steps of repeating raising and lowering temperature in the range of from 1100°C to 1230°C, and maintaining the GaAs crystal at a temperature ranging from 800°C to 1000°C for eliminating the thermal distortion of the crystal. This method may be called "two-step heat-treatment". In this method, however, the heating rate was the same as the cooling rate, i.e. a definite rate from 120°C/H to 600°C/H which was comparatively high. It said that such repetitions of cooling and heating were practiced not only for eliminating the thermal distortion from the crystal but also for making the EL2-levels disperse uniformly. The Inventors of the present invention, however, think that dislocations in the GaAs crystal would be increased by repeating the rapid heating and cooling. Further, it is hardly assumed that such a thermal distortion could be eliminated by the monotonous repetitions of symmetric cooling and heating. It is necessary to consider much more with regard to the exchange of the heat distribution and the stress distribution in the GaAs crystal by the heat-treatment. Objects of the present invention differ from that of the prior documents. Groups III-V compound semiconductor wafers, such as GaAs, InP, etc. are used for substrates on which films are epitaxially grown in order to make various devices. MOCVD (OMVPE), MBE, and so on are used as epitaxial growth methods. A wafer (as a substrate) is heated to a temperature of about hundreds of celsius degrees. When the wafer has residual inner stress at the periphery of the wafer, slips are generated at the periphery of the wafer. These are lattice defects brought about by slipping the lattice structure in a certain direction in the crystal. The lattices in the crystal are relatively easy to move by heating, and thereby dislocations occur in the crystal, and the inner stress in the crystal is released. Newly generated slips lower the quality of an epitaxially grown film, because the epitaxially grown film is greatly influenced by the crystal structure of the substrate. If the wafer were not heated, no slips would be sure to occur. However, the wafer must be heated for the epitaxial treatment. Therefore, there is no other means for suppressing the occurrence of slips but to remove the residual stress therein for suppressing the occurrence of slips. A large, heavy single crystal ingot is cut into slices as wafers by a slicer. There are a lot of methods to produce an ingot of a single crystal. In the case of producing groups III-V compound semiconductors, the vapor pressure of group V elements is so high that many improvements are provided with in order to prevent group V elements from dissociating. For example, in the LEC (Liquid Encapsulating Czockralski) method, a pressure vessel is furnished with a crucible, heaters, an upper shaft, a lower shaft and so on. A solid material and a liquid-encapsulating material are put in the crucible. The pressure vessel is sealed, and the materials are melted by the heaters. A seed crystal positioned at an end of the upper shaft is dipped into a melt in which the materials have been melted, and is pulled up from the melt. In the HB (Horizontal Bridgman) method, a solid material is put into a boat which is long in length, the boat is placed in a long quartz tube, and the long quartz tube is sealed. The solid material is melted in a chamber having a temperature gradient. After that, the solution is solidified from an end of the boat. A single crystal is grown by the steps of putting a solid material in a vessel, melting the solid material into a melt by heating, and solidifying the material melt gradually in every method. After the grown crystal is cooled, it is put out from the vessel. The temperature distribution during making the crystal is different from the temperature distribution during cooling the crystal, so that inner stresses in various directions remain at various parts in the crystal. According as the size of crystal becomes large, these stresses become greater. It is known that a single crystal ingot has a strong residual stress, and further slips are induced by the residual stress. It is, however, unclear what directions of the residual stress would occur in the crystal, or what parts of the crystal would incur the residual stress. Further, it is not exactly recognized how large the residual stresses are. Consequently, how to exclude such various residual stresses has never been known. It may be assumed that impurities should be doped into a crystal in order to form a strong lattice structure, because the strong lattice structure would prevent the crystal from generating slips. Such an impurity doping, however, influences electrical properties, so that it is not always employed for eliminating slips. It is desirable to provide a heat-treatment method which does not change electrical properties. It is an object of the present invention to improve the property of an ingot not so as to generate slips that are caused by the heat supplied when a crystal is epitaxially grown on a wafer sliced from the ingot. A further object of the present invention is to provide a method for preventing a crystal from generating slips not so as to degrade the electrical properties. A still further object of the present invention is to provide a heat-treatment method capable of an effective elimination of residual stress of compound semiconductor crystals. This invention proposes a heat-treatment method of changing the temperature of a crystal up and down by repeating the process of cooling and heating a crystal ingot of groups III-V compound semiconductors alternately in a temperature region from "T 1 " more than 800°C (T 0 ) to "T h " less than a melting point T m of the crystal, where the highest temperature is denoted by "T h ", the lowest temperature is denoted by "T 1 ", and the range therebetween is denoted by "T h ∼T 1 ". In this case, ascending speed A is lower than descending speed B. The highest temperature T h and the lowest temperature T 1 are surely included in the range between T 0 and T m . Repeating number n of heating and cooling the sample is defined to be more than two, i.e. n ≧ 2. The heat-treatment of the present invention differs from conventional heat-treatments in objects and techniques. In particular, the technique of this heat-treatment is absolutely different from that of conventional heat-treatments. Generally, prior heat-treatment means a treatment of maintaining a sample at an optimum temperature for a certain time. Therefore, the temperature of the sample is not changed during the heat-treatment. It is said that such a conventional heat-treatment has a static characteristic. By contrast, the heat-treatment of this invention has an extremely dynamic characteristic, because the process for raising and lowering temperature is repeated many times. In this heat-treatment method, a sample, which has been produced as a single crystal ingot, and has been once cooled, can be treated. In this case, the sample is heated from room temperature up to a temperature T h ranging from T 0 (800°C) to T m . After that, a zigzag heat-treatment repeating heating and cooling alternately is carried out. It is feasible that this heat-treatment is also applied to a hot crystal which has just been grown in a crystal growth chamber. In this case, there is no process for heating the crystal from room temperature. A crystal drawn up by the LEC method is supported by an upper shaft at a certain height, and the temperature of the crystal is changed up and down in a range of from T h to T 1 by controlling the power of the heaters. Otherwise, it is further possible to change the crystal temperature effectively by raising or lowering the upper shaft in the temperature gradient formed by the heaters installed in the chamber. There is no problem of contamination when a just grown single crystal is continually annealed by the heat-treatment. Further, curtailing the total energy consumption is effective therein. It takes the apparatus a long time to finishing the heat-treatment, so that the throughput of the apparatus for producing a single crystal is decreased. Since this heat-treatment can be practiced by both methods, a more suitable method should be selected case by case as considering the object and the economy. The method of this heat-treatment will be explained by referring to Fig.1 and Fig.2. A sectional shape of an object ingot is arbitrary, for example, a circular section, a rectangular section, a half-circular section, and so on. Here, Fig.2 shows an ingot of a compound semiconductor single crystal, which is shaped like a column having a diameter D and a length L. This ingot will be dealt with by the heat-treatment of the present invention. The ingot is sealed in a quartz tube, as shown in Fig.2. The quartz tube is put into a furnace. The temperature of the furnace is raised at the rate of E°C/H (hour), which starts from time t 0 . The temperature of the furnace reaches its upper limit temperature T h at t 1 . The ingot is not kept at the upper limit temperature T h . Further, the temperature of the furnace is immediately lowered at the rate of B°C/H, and reaches the predetermined lower limit temperature T 1 at t 2 . The ingot is, however, not maintained at the lower limit temperature. On the contrary, the chamber temperature is heighten at the rate of A°C/H. The chamber temperature reaches the upper limit temperature T h at t 3 . Next, the chamber temperature is lowered again at the rate of B°C/H, and comes to reach the lower limit temperature T 1 at t 4 . In the next step, the chamber temperature is raised at the rate of A°C/H, and comes to reach the upper limit temperature T h at t 5 . Further, the temperature is lowered at the rate of B°C/H. After that, the same procedure is repeated a plurality of times. When the temperature has attained the upper limit temperature T h at t 2n-1 in the last cycle, the temperature of the sample is monotonously lowered at the rate of F°C/H, and the sample is finally cooled to room temperature at t 2n . Repetition number of the descent and ascent of the temperature is n times. The sample is put out from the quartz tube. Then, the ingot is cut into slices, and the slices are processed to be wafers. The heat-treatment of this invention gives a plurality of reciprocating changes to the sample temperature in a range from T h to T 1 . This is a dynamic heat-treatment method which oscillates the sample temperature. Fig.1 is a temperature diagram, wherein a sample begins to be heated at room temperature, is repeatedly processed by the heat-treatment, in which cooling and heating are alternately repeated a plurality of times, and at last is cooled down to room temperature. Furthermore, it is feasible to anneal a crystal being just grown in a crystal growth chamber by this heat-treatment method. Further, it is possible to change T h and T 1 as a function of time within a range satisfying T m ≧ T h > T 1 ≧ 800°C. The reasons why this repeating heat-treatment method could reduce the residual stress generated in a crystal will be explained hereafter. Crystals, e.g. GaAs, InP, etc., as mentioned before, are made by the LEC method. The crystals made by each of the methods differ from each other in dislocation density and applications. The crystals are sliced into wafers and films, however, are grown on the wafers as substrates by the epitaxial growing method. The wafers made by other methods are also utilized for growing films epitaxially thereon. The temperatures are generally different between a middle part and an outer part of a crystal during the growth. The coordinate Z is taken in an axial direction. There exists a difference between the outer-part temperature W and the inner-part temperature Q at the same coordinate Z, which brings about the stresses caused by the difference of thermal expansion therebetween. Hence, the dislocations are generated in the crystal, and the crystal suffers a plastic deformation. If the plastic-deformed crystal is cooled and kept at room temperature, the relationship of stresses between the outer part and the inner part of the crystal is changed, which is contrary to the relationship of stresses therebetween during growing a crystal. Next, more detailed explanation about why this heat-treatment is suitable for decreasing the residual stress should be described by citing a crystal being produced by the LEC method as an example. The sample crystal has a rotational symmetry and a diameter of R. This crystal is suitable for clarifying the mechanisms of the heat-treatment of the present invention, because the crystal is excellent in symmetry. Two point, that is, an outer point and an inner point having the same coordinate Z, are assumed in the crystal. When the crystal has just been drawn from a melt in a crucible, the temperature W of a point (R, S, ) taken at the periphery of the crystal is higher than the temperature Q of the central point (0, Z ) of the crystal. This coordinate system is a cylindrical one. Thus the solid- liquid interface is convex downward. As mentioned above, since the temperature of the periphery is higher than that of the center, i.e. W > Q, compressive stress occurs in the circumferential direction at the point (R, Z, ), but tensile stress occurs in the circumferential direction at the point (0, Z, ). The peripheral part of the crystal is relatively apt to expand, and the center part of the crystal is relatively apt to contract. Therefore, the peripheral part is influenced by the center part that intends to shrink, and suffers the compressive stress from the center part. The center part is affected by the peripheral part that intends to expand, and suffers the tensile stress from the peripheral part. However, the temperature of the crystal that has just been drawn is so high that the dislocations are increased in the crystal, and thereby the stress is modified. Hence, the crystal is plastic-deformed so as to reduce the difference of the stresses between the peripheral part and the center part. This mechanism brings about the modification of the stresses. When the crystal is cooled and kept at room temperature, the temperature of the center part becomes the same as that of the peripheral part, i.e. W = Q . It may be supposed that the stress might have disappeared, but it is wrong. Hence, the stresses have been modified by the increase of the dislocations, and the crystal has been plastic-deformed at the high temperature so as to reduce the difference of stresses between the peripheral part and the center part. When the temperature is lowered to room temperature, the stresses are overcompensated by the plastic-deformation yielded at the high temperature. The fact means that the relationship of stresses between the peripheral part and the center part is reversed, that is, the tensile stress occurs at the peripheral part, and the compressive stress occurs at the center part. A strong tensile stress at the peripheral part becomes a cause of slips that are generated in a film epitaxially grown on a wafer of the crystal. When a film is epitaxially grown on a wafer as a substrate, the substrate must be heated, so that atoms forming a lattice structure are easy to move. In the case of a wafer, the temperature of the wafer is raising, as maintaining the tensional relation between the tensile stress of the peripheral part and the compressive stress of the center part, even if both parts are always heated to the same temperature at the same speed. The movements of the lattices, therefore, are activated, and the dislocations are easy to move, which induces the generation of slips. If a compressive stress exists in the circumferential direction at the center part, there exists a tensile stress in the circumferential direction at the peripheral part in order to maintain the complementary relation therebetween. Tensile stresses and compressive stresses correspond to two parts and two temperatures W and Q which vary in the heat-treatment. It is difficult to understand the mechanism intuitively because of a lot of variables. Independent variables, however, are actually few. Here, only the following two variables should be considered for an intuitive understanding. One variable is the difference ΔT between the temperatures W at the periphery and Q at the center. The other variable is the compressive stress σ in the circumferential direction at the peripheral part. σ is defined to be positive when the tensile stress in the circumferential direction occurs in the peripheral part and the compressive stress in the circumferential direction occurs in the center part. ΔT is a variable designating the difference (W - Q) neglecting the condition whether both the temperatures W and Q are high or low. It is unnecessary to consider the absolute values of the temperatures W and Q at the peripheral part and the center part. Only the difference therebetween should be an important factor to be considered. As explained hitherto, when a crystal is grown, ΔT is positive, so that the periphery of the crystal incurs compressive stress. Hence, when ΔT is positive, the compressive stress σ is also positive. If ΔT were simply proportional to σ, the compressive stress σ should also be zero when ΔT is zero, i.e. ΔT = 0. However, it is not correct. If ΔT becomes greater, σ is saturated. This is the modification of the stress. Such a stress modification is, in particular, apt to occur at high temperature. Fig.5 shows a stress-temperature chart showing the relationship between the compressive stress (σ) at the periphery, and the difference (ΔT) of the temperatures between the peripheral part (Tp) and the center part (Tc) of a crystal. Then ΔT = Tp - Tc. The abscissa shows ΔT and the ordinate shows the stress at the periphery, where the ordinate higher than the origin shows the compressive stress, and the ordinate lower than the origin shows the tensile stress. When a solid is made from material melt in a chamber for growing a crystal, ΔT is positive. Point (i) is a starting point of the crystal growth. The periphery of the crystal incurs compressive stress, but the compressive stress is so small due to the modification of the stress. The solid, i.e. crystal is cooled in the chamber after the growth (a) of the crystal. Point (b) shows the situation where ΔT is positive but the stress therebetween is zero in the meantime of cooling. The situation shown by point (b) is brought about by the modification of stress at point (a). Further, when the difference of temperature ΔT is decreased, and the crystal has completely been cooled to room temperature, ΔT is zero, i.e. ΔT = 0. In this situation, a strong tensile stress exists at the peripheral part of the crystal, as explained above. Point (c) shows that situation. The heat-treatment of this invention starts from point (c) at time t 0 in Fig.1 which is a graph showing also the relationship between temperatures and times. Since the heating starts from point (c) at t 0 , ΔT becomes positive (which means that the periphery is higher than the center in temperature). The crystal is heated up to the upper limit temperature T h at t 1 in Fig.1. The temperature is raised for a period of from t 0 to t 1 , so that ΔT is positive and nearly constant. The first right turning point (t 0 ∼t 1 ) is only a point in Fig.5 but is corresponds to the considerably long time interval between t 0 and t 1 in Fig.1. In the meantime, ΔT is constant, although the surface temperature Tp varied from T 1 to T h , because the center temperature varies from (T 1 -ΔT) to (T h -ΔT). Therefore, the tensile stress is decreased, and the compressive stress is increased, but compressive stress can not surpass because of large residual tensile stress. On the contrary, since the temperature is reduced during a period of from t 1 to t 2 , ΔT becomes negative. The left second turning point (t 1 ∼t 2 ) is only a small region in Fig.5 but corresponds a long interval from t 1 to t 2 in which the temperature Tp falls from T h to t 1 . The transition from the first right turning point (t 0 ∼t 1 ) to the second left tuning point (t 1 ∼t 2 ) at a moment of t 1 . Therefore, the tensile stress is heighten at a sudden in the rapid transition. The change of the stress is rather meaningless. The tensile stress is reduced in a considerably long period of from t 1 to t 2 , since the residual tensile stress is released. The stress curve in Fig.5 is slightly moved upward to the compressive stress side in the meantime of t 1 ∼t 2 . This increase of the compressive stress is important. Then the curve rapidly changes from point (t 1 ∼t 2 ) to the right second turning point (t 2 ∼t 3 ) at a moment of t2. The tensile stress decreases to e great extent, but this decrease is not important. ΔT is positive (ΔT A ) in a period (t 2 ∼t 3 ) which is a second rise of the temperature. But the increase of tensile stress is small because of the small temperature difference ΔT A . Then a rapid transition occurs at a moment at t 3 . The tensile stress is increased in the transition. The increase, however, is insignificant. The second left turning point (t 3 ∼t 4 ) induces a permanent increase of the compressive stress by the big negative ΔT B . The stress curve slightly moved upward in the period of t 3 ∼t 4 . Similar heat-treatment cycles are repeated, that is, the heat-treatment, which repeats the ascent (t 0 ∼t 1 , t 2 ∼t 3 , t 4 ∼t 5 , ···, t 2n-2 ∼t 2n-1 ) and the descent (t 1 ∼t 2 , t 3 ∼t 4 , t 5 ∼t 6 , ···, t 2n-1 ∼t 2n ) of the temperature alternately. The increase (W) of the compressive stress in the descents is bigger than the decease (U) of the compressive stress in the ascents. Thus, a heating cycle reduces the tensile stress by the difference (W-U). As the heat-treatment is repeated, the tensile stress gradually becomes smaller. Since the falling speed B is larger than the rising speed A, i.e. B > A, | ΔT B | > ΔT A . The quantity (W) of reducing the tensile stress by ΔT B (t 1 ∼t 2 , t 3 ∼t 4 , t 5 ∼t 6 , ···, t 2n-1 ∼t 2n ) becomes larger than the quantity (U) of increasing the tensile stress by ΔT A (t 0 ∼t 1 , t 2 ∼t 3 , t 4 ∼t 5 , ···, t 2n-2 ∼t 2n-1 ). As a whole, the residual tensile stress becomes smaller. At point (d), the temperature is reduced to room temperature. ΔT is zero at point (d). The stress is approaching to zero, but a little compressive stress or tensile stress may remain. The absolute value of the stress is decreased as compared with point (c). It is suitable for practicing these cycles to practice at a temperature more than 800°C, because the movement of dislocations becomes more active, and the residual tensile stress is easily released thereby. Further, cracks would incur sometimes, if the crystal is cooled at a temperature less than 800°C. Almost all the amounts of residual stress which has existed in a crystal is nearly eliminated from an ingot of groups III-V compound semiconductors by utilizing the heat-treatment of this invention. Dynamic heat-treatment of this invention is effective for releasing the inner stresses between an inside and an outside of the crystal. Slips hardly occur in an epitaxial film which is grown on a wafer as a substrate which is made by slicing an ingot dealt with by this heat-treatment. Epitaxial layers suffer no damages, so that epitaxial wafers of good quality can be produced. The invention will be more fully understood from the following description given by way of example only with reference to the several figures of the accompanying drawings in which, Fig.1 is a graph showing the temporal change of the temperature of a crystal in the heat-treatment of this invention. Fig.2 is a perspective view showing an ingot sealed in a quartz tube prepared for the heat-treatment of this invention. Fig.3 is a graph showing the temperature contribution in an axial direction of a chamber so as to explain the heat-treatment of this invention in which a temperature gradient is formed in a chamber, a crystal is moved to the front and the rear in the chamber provided with the temperature gradient, and the temperature of crystal is alternately heighten and lowered a plurality of times. Fig.4 is a perspective view showing the condition where other materials are placed near the front and the rear of the crystal in order to give a short crystal the temperature difference between an inside and an outside of the crystal. Fig. 5 is a graph for explaining the fundamentals of the heat-treatment of this invention where the difference of temperature ΔT is denoted by the abscissa, compressive stress is denoted by the ordinate higher than the origin, and tensile stress is denoted by the ordinate lower than the origin. To achieve the foregoing objects and in accordance with the purpose of the invention, embodiments will be broadly described herein. [Embodiment 1] A cylindrical GaAs single crystal ingot, that had a diameter of 100 mmΦ and a length of 200 mm, was sealed in a quartz tube. Heat-treatment, as shown in Fig.1, was practiced after the quartz tube had been put into a chamber. Speed E of raising temperature in the early stages was 40°C/H, i.e. E = 40°C/H. The upper limit of temperature T h of the heat-treatment was 1100°C, i.e. T h = 1100°C. The lower limit of temperature T 1 was 1000°C, i.e. T 1 = 1000°C. Speed A of raising temperature in a period where the temperature of the crystal was repeatedly heighten and lowered was 30°C/H, i.e. A = 30°C/H. Speed B of lowering temperature in the same period was 100°C/H, i.e. B = 100°C/H. The final speed F of lowering temperature after the heat-treatment was 100°C/H, i.e. F = 100°C/H. A repetition number n of the ascent and descent of temperature was 5, i.e. n = 5. The amplitude of the ascent and descent of temperature in the heat-treatment was 100°C. A unit time of lowering temperature during a period from t 2m-1 to t 2m was one hour (1 H). A unit time of raising temperature during a period from t 2m to t 2m+1 was 3H20M (3 hours and 20 minutes). One cycle of the heat-treatment took 4 hours and 20 minutes. The first stage of raising temperature to T 1 required 25 hours. Five heat-treatment cycles needed 21 hours and 40 minutes. The last descent of temperature from T 1 required 10 hours. An average residual strain | sr - s | of the ingot of the pre-heat-treatment was 3 × 10 -5 to 5 × 10 -5 . When a film was epitaxially grown on a wafer which was made by slicing the ingot of the pre-heat-treatment, the film suffered a lot of slips. An average residual strain (deformation) of the ingot of the post-heat-treatment was decreased to 0.5 × 10 -5 to 0.8 × 10 -5 . Therefore, the residual strain after the heat-treatment was reduced to about one-third to one-tenth of the residual strain before the heat-treatment. When a film was epitaxially grown on a wafer which was made by slicing the ingot dealt with by the heat-treatment, no slips were found out. An epitaxially formed film of good quality could be obtained by the heat-treatment of this invention. [Comparison example 1] A GaAs ingot having the same sizes as Embodiment 1 was dealt with by the heat-treated under the same conditions. Repetition number was 1, i.e. n = 1, which means that an opportunity to reach the upper limit temperature T h is only one. The residual strain therein was reduced to 2 ∼ 3 × 10 -5 , which was approximately a half of the residual strain of the starting ingot. This is, however, insufficient. When a compound semiconductor film was epitaxially grown on a wafer which was made by slicing the ingot produced thereby, slips occurred. If the repetition number is more than 2, i.e. n > 2, it is effective to depress the generation of slips. [Comparison example 2] The lower limit temperatures T 1 of all the samples were fixed at a temperature less than 800°C. The upper limit temperatures T h of the samples were fixed at a temperature either less than 800°C or more than 800°C. The repetition numbers n of all the examples were more than 2, i.e. n > 2. The result is insufficient, even if A < B is established. The ingot itself incurs cracks, and more particularly a sufficient residual strain can not be reduced when the upper limit temperature T h is less than 800°C, i.e. T h < 800°C. This fact indicates that a GaAs ingot must be processed by the heat-treatment having T h and T 1 being more than 800°C. [Comparison example 3] When the descent of temperature and the ascent of temperature are repeated in the present invention, there exists the requirement that the speed of raising temperature A is lower than that of lowering temperature B, i.e. A < B. By contrast, another heat-treatment satisfying the requirement A > B were investigated. The speed A of raising temperature was 100°C /H, and the speed B of lowering temperature was 30°C/H. Other parameters are the same as Embodiment [1]. An average residual strain ranged from 4 × 10 -5 to 6 × 10 -5 . As known from this result, the residual strain was, on the contrary, increased. It becomes clear that the heating-speed A should be lower and the cooling-speed B should be higher. Hence, it is apparent that the requirement of A < B is an important factor to establish an effective heat-treatment. [Embodiment 2] The Inventors of the present invention adopted GaAs crystals as samples, and investigated the upper limit and the lower limit of both the speed A of raising temperature and the speed B of lowering temperature in respect of the samples having various dislocation densities and different diameters. When GaAs crystals had impurity concentrations less than 10 18 cm -3 , boundary speed C can be defined. This boundary speed C is the speed of an absolute border between the speeds A and B, which satisfies the requirement A < C < B. It is discovered that the absolute boundary speed can be expressed by C = 4600 / D 2 (°C/H) , where a diameter D (cm) of each crystal is denoted by the unit of cm (centimeter). When D = 10 cm, for example, an absolute boundary speed C is 46°C/H, that is, A < 46°C/H < B. When films were epitaxially grown on wafers as the samples which were dealt with by the heat-treatment in the condition of A < 46°C < B, no slips occurred therein. When samples are not shaped like columns, an effective diameter D can be calculated from a sectional area S, that is, D is obtained by substituting S into the equation D = (4S/π) 1/2 . When crystals have ordinary sectional shapes, absolute boundary speed C is 3600/S, i.e. C = 3600/S. It is possible to calculate the absolute boundary speed C, even if crystals have a rectangular sections or a semicircular sections. [Embodiment 3] The Inventors of the present invention investigated the relationship between the speed E of raising temperature in the initial stage and the speed A of lowering temperature in the repeating stages, and the relationship between the speed F of lowering temperature in the last stage and the speed B of lowering temperature in the repeating stages. As a result, it is known that the residual stress is effectively reduced regardless of the various relationships according to the speeds therebetween. It becomes, however, clear that the relationship satisfying E < A and B < F is more effective. In this case, a simple relationship among the speeds is established, i.e. E < A < C < B < F. [Embodiment 4] A cylindrical InP ingot having a diameter D of 50 mmΦ and a length L of 100 mm was annealed with the heat-treatment of this invention. An average residual strain (distortion) ranged from 1 × 10 -5 to 2 × 10 -5 . When a film was epitaxially grown on a wafer made by slicing the InP ingot, a lot of slips occurred in the film. This sample was put into a quartz tube and the quartz tube was sealed. The tube was put into a chamber, as shown in Fig.3, wherein the chamber was provided with a temperature gradient. The quartz tube was moved to the front and the rear a plurality of times in the region having the temperature gradient, and whereby the temperature of the crystal was alternately raised and lowered. The abscissa does not show the time but the distance in Fig.3. The ordinate shows the temperature. In Fig.3, the temperature in the higher part of the chamber gives the upper limit temperature T h , and the temperature in the lower part of the chamber determines the lower limit temperature T 1 . T h = 950°C and T 1 = 850°C in this embodiment. A length of the transition region having the temperature gradient is 33 mm. The temperature gradient J is 3°C / mm. If the length of the region for moving the tube, i.e. amplitude, is determined, it is possible to associate the speeds of moving the quartz tube to the front and the rear with the speeds of lowering and raising temperature. The amplitude should be longer than the sum of the length of the crystal and the length of the transition region. Speed of moving the tube in the left direction, i.e. to the higher temperature side, is 20 mm/ H, i.e. V 1 = 20 mm/H. Speed of moving the tube in the right direction, i.e. to the lower temperature side, is V r = 70 mm/H. When an amplitude is 140 mm, speed of raising temperature is 14°C/H i.e. A = 14°C/H, and speed of lowering temperature is 50 °C/H, i.e. B = 50 °C/H. Such a reciprocating annealing was repeated eight times, i.e. n = 8. The residual strain of the ingot was reduced to 0.2 × 10 -5 to 0.5 × 10 -5 , which is one-fifth to one-fourth of the residual strain in the initial ingot. Slips were completely excluded. It is verified that this heat-treatment is very effective to prevent the crystal from the generation of slips. [Comparison example 4] An InP ingot as a sample, having the same sizes, i.e. length L = 100 mm, diameter D = 50 mm Φ, was processed by the heat-treatment in the same devices. The heat-treatment was carried out only once, i.e. n = 1. The residual strain is decreased to 0.8 × 10 -5 to 1 × 10 -5 . This result was, however, insufficient, and slips occurred at the time of the epitaxial growth. [Comparison example 5] An InP ingot as a sample, having the same sizes, i.e. L = 100 mm, D = 50 mmΦ, was annealed with by the heat-treatment in the same devices. Reciprocating motion of the heat-treatment was carried out eight times, i.e. n = 8. Speed of moving the tube in the left direction was fixed to be 70 mm/ H, and the speed in the right direction was fixed to be 20 mm/H. Hence, the speed of lowering temperature is smaller than that of raising temperature. As a result, the residual strain was increased to 3 × 10 -5 to 4 × 10 -5 . [Comparison example 6] An InP ingot as a sample, having the same sizes, i.e. L = 100 mm, D = 50 mmΦ, was dealt with by the heat-treatment in the same devices. The upper limit temperature T h is 800°C, and the lower limit temperature T 1 is 700°C. Cracks occurred in the crystal even if n = 1. [Comparison example 7] A GaAs ingot was dealt with by the heat-treatment in a chamber. A diameter D of the ingot was 100 mmΦ, i.e. D = 100 mmΦ, and a length L of the ingot was 100 mm, i.e. L = 100 mm. The ratio L/D is 1. As shown in Fig.1, the temperature of the chamber as a whole was changed by reciprocating in the range between T h (=1100°C) and T 1 (=1000°C). The residual strain came to be 1 × 10 -5 to 3 × 10 -5 , although n = 5. This was an insufficient result. The reason is that there is little difference of the effects of the heat-treatment between an outside and an inside of the ingot, because the ratio (L/D) of the sample crystal is only 1, which is so small. One of the most innovative ideas of this invention is to reduce the residual stress by utilizing the complementary delays of the change of temperature between the outside and the inside of the crystal. In this example, the ratio (L/D) of the crystal is not enough to cause a big difference of the temperature between the center and the periphery of the crystal. An input and an output of the heat through the end surfaces of the crystal is so great that it is difficult to cause the delays of the temperature changes therebetween. [Embodiment 5] As the above embodiments, a GaAs crystal having a diameter D of 100 mmΦ and a length L of 100 mm was annealed. Being sandwiched between two dummies made by opaque quartz, the GaAs crystal was put into a quartz tube. The tube is sealed. This sandwiching structure prevents the heat from coming and going at the end surfaces of the crystal. It is preferable that the dummies have the same diameter as the sample of the crystal. Further, a proper length are needed. Hence, both the dummies, which are shaped like quartz columns, have the same lengths (L d = 100 mm), and the same diameters (D = 100 mmΦ). A gap ΔG between the dummy and the crystal was 2 mm, i.e. ΔG = mm, as shown in Fig. 4. The temperature distribution shown in Fig.3 was given to the sample. T h = 1100°C, and T 1 = 1000°C. The same parameters as Embodiment 1 are chosen. The crystal is annealed with by the heat-treatment for five times, i.e. n = 5. The residual strain is reduced to 0.6 × 10 -5 to 0.9 × 10 -5 . When the ingot was sliced into wafers, and a film was epitaxially grown on the wafer, no slips were generated. A suitable gap ΔG should range from 0 to 30 mm. There is no problem that the dummies are in contact with the crystal, i.e. ΔG = 0. If the crystal comes in touch with the dummies at the start, some of the gap ΔG therebetween occurs, because the crystal is expanded and shrunk repeatedly. If the interval ΔG is so large, it is infeasible to cover the end surfaces of the crystal effectively. [Comparison example 8] The conditions were mostly the same as the embodiment 5 except for the gap ΔG. Here, the gaps between the sample and the quartz columns is 40 mm, i.e. ΔG = 40 mm. The same heat-treatment was carried out. The residual strain becomes 1 × 10 -5 to 3 × 10 -5 . The reduction of the residual strain is, however, insufficient.

Claims: A heat-treatment method of groups III-V compound semiconductor materials comprising the steps of: sealing a crystal of groups III-V compound semiconductors in a tube ; putting the tube in a chamber with heaters; heating the crystal from room temperature to an upper limit temperature T h ; cooling the crystal from the upper limit temperature T h to a lower limit temperature T 1 at a speed B [B °C/h] ; repeating heating and cooling the crystal between T 1 and T h more than twice at a speed A [A °C/h] of raising temperature and at the speed B [B °C/h] of lowering temperature; and cooling the crystal from the upper limit temperature T h to room temperature; wherein the upper limit temperature T h is less than a melting point of the crystal but more than 800°C, the lower limit temperature T 1 is less than the upper limit temperature T h but more than 800°C, the temperature of the chamber is uniformly changed in a range between the upper limit temperature T h and the lower limit temperature T 1 , and the speed B is higher than the speed A. A heat-treatment method as claimed in claim 1, wherein the crystal is a GaAs single crystal with an impurity concentration less than 10 18 cm -3 , the speed A of temperature change is less than 4600 D -2 (°C/H), and the speed B of temperature change is more than 4600 D -2 (°C/H), where D (cm) is a diameter of the GaAs crystal. A heat-treatment method as claimed in claim 1, wherein a temperature of the whole chamber is firstly raised from room temperature to the upper limit temperature T h at a rising rate E, the crystal is heated and cooled a plurality of times in a range between the upper limit temperature T h and the lower limit temperature T 1 by raising and lowering the temperature of the whole chamber, and the whole chamber is finally cooled down at a falling rate F for lowering temperature of the crystal from the lower limit temperature T 1 to room temperature. A heat-treatment method as claimed in claim 3, wherein the rising rate E is lower than the falling rate F. A heat-treatment method of groups III-V compound semiconductor materials comprising the steps of: sealing a crystal of groups III-V compound semiconductors in a tube ; putting the tube in a chamber with heaters; making a temperature distribution in the chamber having a higher temperature region kept at an upper limit temperature T h , a lower temperature region kept at a lower limit temperature T 1 and a transition region with a temperature gradient coupling the higher temperature region to the lower temperature region; and reciprocating the tube more than twice between the higher temperature region and the lower temperature region through the transition region for heating the crystal at a speed A [A °C/h] of raising temperature and for cooling the crystal at a speed B [B °C/h] of lowering temperature; wherein the upper limit temperature T h is less than a melting point of the crystal but more than 800°C, the lower limit temperature T 1 is less than the upper limit temperature T h but more than 800°C, the speed B of temperature change is determined to be greater than the speed A of temperature change by moving the crystal from the lower temperature region to the higher temperature region at a lower speed than a speed for moving the crystal from the higher temperature region to the lower temperature region. A heat-treatment method as claimed in claim 5, wherein the crystal is a GaAs single crystal with an impurity concentration less than 10 18 cm -3 , the speed A of temperature change is less than 4600 D -2 (°C/H), and the speed B of temperature change is more than 4600 D -2 (°C/H) where D (cm) is a diameter of the GaAs crystal. A heat-treatment method as claimed in claim 5, wherein the chamber is provided with a temperature distribution having the higher temperature region kept at T h and the lower temperature region kept at T 1 and the transition region therebetween which changes the temperature continuously, the temperature of the crystal is practically raised and lowered by moving the tube with the crystal relatively to the temperature distribution, the cycle of heating and cooling the crystal is repeated a plurality of times, and the crystal is cooled to room temperature by cooling the whole chamber. A heat-treatment method as claimed in claim 5, wherein the tube containing the crystal is positioned at the region which will be heated to T h in the chamber, the crystal is heated from room temperature to the upper limit temperature T h at the initial position, and the tube is then moved to the lower temperature region at T 1 for the first cooling to T 1 . A heat-treatment method as claimed in claim 5, wherein the tube containing the crystal is positioned at the region which will be heated to T h in the chamber, the crystal is heated from room temperature to T 1 at the initial position, and the tube is then moved to the higher temperature region at T h from the first heating in the heat-treatment. A heat-treatment method as claimed in claim 5, wherein the rising rate E from room temperature to T h is lower than the falling rate F from T h to room temperature. A heat-treatment method of groups III-V compound semiconductor materials comprising the steps of: preparing two dummies having end surface areas nearly identical with an end surface of a crystal to be treated; sandwiching the crystal between the dummies with a gap ranging from 0 to 30 mm; sealing the crystal with the two dummies in a tube; putting the tube into a chamber with heaters; heating the crystal with the dummies from room temperature to an upper limit temperature T h ; cooling the crystal with the dummies from T h to a lower limit temperature T 1 ; and repeating heating and cooling the crystal in the chamber more than twice at a speed A [A °C/h] of raising temperature and a speed B [B °C/h] of lowering temperature ; wherein the upper limit temperature T h is less than a melting point of the crystal but more than 800°C, the lower limit temperature T 1 is less than the upper limit temperature T h but more than 800°C, the temperature of the chamber is uniformly kept in a range between the upper limit temperature T h and the lower limit temperature T 1 , and the repetition of heating and cooling the crystal is carried out in a state where the speed B is higher than the speed A. A heat-treatment method of groups III-V compound semiconductor materials comprising the steps of: preparing two dummies having end surface areas nearly identical with an end surface of the crystal; sandwiching the crystal between the dummies with a gap ranging from 0 to 30 mm; sealing the crystal with the two dummies in a tube; putting the quartz tube into a chamber with heaters; and repeating heating and cooling the single crystal in the chamber more than twice at a speed A [A °C/h] of raising temperature and a speed B [B °C/h] of lowering temperature ; wherein a temperature of the whole chamber is firstly raised to the upper limit temperature T h , the crystal is heated and cooled a plurality of times in a range between the upper limit temperature T h and the lower limit temperature T 1 by repeating raising and lowering the temperature of the whole chamber, and the temperature of the whole chamber is finally cooled down from the lower limit temperature T 1 to room temperature. A heat-treatment method of groups III-V compound semiconductor materials comprising the steps of: preparing two dummies having end surface nearly identical with an end surface of the crystal to be treated; sandwiching the crystal between the dummies with a gap ranging from 0 to 30 mm; sealing the crystal in a tube with the two dummies; putting the tube in a chamber with heaters; making a temperature distribution having a high temperature region kept at an upper limit temperature T h , a lower temperature region kept at a lower limit temperature T 1 and a transition region changing temperature continuously from the higher temperature region to the lower temperature region; moving reciprocally the tube between the higher temperature region and the lower temperature region through the transition region for heating and cooling the crystal; and repeating the reciprocating movement of heating and cooling the single crystal at a speed A [A °C/h] of raising temperature and a speed B [B °C/h] of lowering temperature; wherein the upper limit temperature T h is less than a melting point of the crystal but more than 800°C, the lower limit temperature T 1 ranges less than the upper limit temperature T h but more than 800°C, the speed of moving from the higher temperature region to the lower temperature region is higher than the speed of moving from the lower temperature region to the higher temperature region, and the speed B is higher than the speed A. A heat-treatment method as claimed in claim 11, wherein the crystal is a GaAs crystal with an impurity concentration less than 10 18 cm -3 , the speed A of raising temperature is fixed to be less than 4600 D -2 (°C/H), and the speed B of lowering temperature is fixed to be more than 4600 D -2 (°C/H) where D (cm)is a diameter of the GaAs crystal. A heat-treatment method as claimed in claim 12, wherein the crystal is a GaAs crystal with an impurity concentration less than 10 18 cm -3 , the speed A of raising temperature is fixed to be less than 4600 D -2 (°C/H), and the speed B of lowering temperature is fixed to be more than 4600 D -2 (°C/H) where D (cm)is a diameter of the GaAs crystal. A heat-treatment method as claimed in claim 13, wherein the crystal is a GaAs crystal with an impurity concentration less than 10 18 cm -3 , the speed A of raising temperature is fixed to be less than 4600 D -2 , and the speed B of lowering temperature is fixed to be more than 4600 D -2 where D is a diameter of the GaAs crystal. A heat-treatment method of groups III-V compound semiconductor materials comprising the steps of: preparing an LEC growing apparatus having heaters, an upper shaft, a lower shaft for supporting a crucible and an outer vessel capable of controlling pressure of the growing apparatus fixing a seed crystal to the upper shaft; supplying a material into the crucible; closing the outer vessel; heating the material to be a melt by the heaters; dipping the seed crystal in the melt; growing a crystal of groups III-V compound semiconductors by pulling up a single crystal from the melt by raising the upper shaft; plucking the grown crystal out of the melt; and repeating heating and cooling the crystal in a range from an upper limit temperature T h to a lower limit temperature T 1 at a speed A [A °C/h] of raising temperature and a speed B [B °C/h] of lowering temperature by controlling the heaters or/ and by moving a position of the crystal relatively ; wherein the upper limit temperature T h ranges less than a melting point of the crystal and more than 800°C, the lower limit temperature T 1 ranges less than the upper limit temperature T h and more than 800°C, the speed of moving from the higher temperature region to the lower temperature region is higher than the speed of moving from the lower temperature region to the higher temperature region, and the speed B of lowering temperature is higher than the speed A of raising temperature. A heat-treatment method as claimed in claim 17, wherein the crystal is a GaAs crystal with an impurity concentration less than 10 18 cm -3 , the speed A of raising temperature is fixed to be less than 4600 D -2 (°C/H), and the speed B of lowering temperature is fixed to be more than 4600 D -2 (°C/H) where D (cm) is a diameter of the GaAs crystal.

Inventors: SAWADA SHIN-ICHI, SAWADA, SHIN-ICHI, Sawada, Shin-Ichi, c/o Osaka Works of
Applicants: SUMITOMO ELECTRIC INDUSTRIES, SUMITOMO ELECTRIC INDUSTRIES, LIMITED
Application year: 1995
Main classification: C30B33
IPC codes: C30B33, H01L21, C30B29